git.sur5r.net Git - groeck-it87/blob - it87.c

   1 /*
   2  *  it87.c - Part of lm_sensors, Linux kernel modules for hardware
   3  *           monitoring.
   4  *
   5  *  The IT8705F is an LPC-based Super I/O part that contains UARTs, a
   6  *  parallel port, an IR port, a MIDI port, a floppy controller, etc., in
   7  *  addition to an Environment Controller (Enhanced Hardware Monitor and
   8  *  Fan Controller)
   9  *
  10  *  This driver supports only the Environment Controller in the IT8705F and
  11  *  similar parts.  The other devices are supported by different drivers.
  12  *
  13  *  Supports: IT8603E  Super I/O chip w/LPC interface
  14  *            IT8607E  Super I/O chip w/LPC interface
  15  *            IT8620E  Super I/O chip w/LPC interface
  16  *            IT8622E  Super I/O chip w/LPC interface
  17  *            IT8623E  Super I/O chip w/LPC interface
  18  *            IT8628E  Super I/O chip w/LPC interface
  19  *            IT8705F  Super I/O chip w/LPC interface
  20  *            IT8712F  Super I/O chip w/LPC interface
  21  *            IT8716F  Super I/O chip w/LPC interface
  22  *            IT8718F  Super I/O chip w/LPC interface
  23  *            IT8720F  Super I/O chip w/LPC interface
  24  *            IT8721F  Super I/O chip w/LPC interface
  25  *            IT8726F  Super I/O chip w/LPC interface
  26  *            IT8728F  Super I/O chip w/LPC interface
  27  *            IT8732F  Super I/O chip w/LPC interface
  28  *            IT8758E  Super I/O chip w/LPC interface
  29  *            IT8771E  Super I/O chip w/LPC interface
  30  *            IT8772E  Super I/O chip w/LPC interface
  31  *            IT8781F  Super I/O chip w/LPC interface
  32  *            IT8782F  Super I/O chip w/LPC interface
  33  *            IT8783E/F Super I/O chip w/LPC interface
  34  *            IT8786E  Super I/O chip w/LPC interface
  35  *            IT8790E  Super I/O chip w/LPC interface
  36  *            IT8792E  Super I/O chip w/LPC interface
  37  *            Sis950   A clone of the IT8705F
  38  *
  39  *  Copyright (C) 2001 Chris Gauthron
  40  *  Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de>
  41  *
  42  *  This program is free software; you can redistribute it and/or modify
  43  *  it under the terms of the GNU General Public License as published by
  44  *  the Free Software Foundation; either version 2 of the License, or
  45  *  (at your option) any later version.
  46  *
  47  *  This program is distributed in the hope that it will be useful,
  48  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  49  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  50  *  GNU General Public License for more details.
  51  */
  52
  53 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  54
  55 #include <linux/bitops.h>
  56 #include <linux/module.h>
  57 #include <linux/init.h>
  58 #include <linux/slab.h>
  59 #include <linux/jiffies.h>
  60 #include <linux/platform_device.h>
  61 #include <linux/hwmon.h>
  62 #include <linux/hwmon-sysfs.h>
  63 #include <linux/hwmon-vid.h>
  64 #include <linux/err.h>
  65 #include <linux/mutex.h>
  66 #include <linux/sysfs.h>
  67 #include <linux/string.h>
  68 #include <linux/dmi.h>
  69 #include <linux/acpi.h>
  70 #include <linux/io.h>
  71 #include "compat.h"
  72
  73 #define DRVNAME "it87"
  74
  75 enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732,
  76              it8771, it8772, it8781, it8782, it8783, it8786, it8790,
  77              it8792, it8603, it8607, it8620, it8622, it8628 };
  78
  79 static unsigned short force_id;
  80 module_param(force_id, ushort, 0);
  81 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  82
  83 static struct platform_device *it87_pdev[2];
  84
  85 #define REG_2E  0x2e    /* The register to read/write */
  86 #define REG_4E  0x4e    /* Secondary register to read/write */
  87
  88 #define DEV     0x07    /* Register: Logical device select */
  89 #define PME     0x04    /* The device with the fan registers in it */
  90
  91 /* The device with the IT8718F/IT8720F VID value in it */
  92 #define GPIO    0x07
  93
  94 #define DEVID   0x20    /* Register: Device ID */
  95 #define DEVREV  0x22    /* Register: Device Revision */
  96
  97 static inline int superio_inb(int ioreg, int reg)
  98 {
  99         outb(reg, ioreg);
 100         return inb(ioreg + 1);
 101 }
 102
 103 static inline void superio_outb(int ioreg, int reg, int val)
 104 {
 105         outb(reg, ioreg);
 106         outb(val, ioreg + 1);
 107 }
 108
 109 static int superio_inw(int ioreg, int reg)
 110 {
 111         int val;
 112
 113         outb(reg++, ioreg);
 114         val = inb(ioreg + 1) << 8;
 115         outb(reg, ioreg);
 116         val |= inb(ioreg + 1);
 117         return val;
 118 }
 119
 120 static inline void superio_select(int ioreg, int ldn)
 121 {
 122         outb(DEV, ioreg);
 123         outb(ldn, ioreg + 1);
 124 }
 125
 126 static inline int superio_enter(int ioreg)
 127 {
 128         /*
 129          * Try to reserve ioreg and ioreg + 1 for exclusive access.
 130          */
 131         if (!request_muxed_region(ioreg, 2, DRVNAME))
 132                 return -EBUSY;
 133
 134         outb(0x87, ioreg);
 135         outb(0x01, ioreg);
 136         outb(0x55, ioreg);
 137         outb(ioreg == REG_4E ? 0xaa : 0x55, ioreg);
 138         return 0;
 139 }
 140
 141 static inline void superio_exit(int ioreg)
 142 {
 143         outb(0x02, ioreg);
 144         outb(0x02, ioreg + 1);
 145         release_region(ioreg, 2);
 146 }
 147
 148 /* Logical device 4 registers */
 149 #define IT8712F_DEVID 0x8712
 150 #define IT8705F_DEVID 0x8705
 151 #define IT8716F_DEVID 0x8716
 152 #define IT8718F_DEVID 0x8718
 153 #define IT8720F_DEVID 0x8720
 154 #define IT8721F_DEVID 0x8721
 155 #define IT8726F_DEVID 0x8726
 156 #define IT8728F_DEVID 0x8728
 157 #define IT8732F_DEVID 0x8732
 158 #define IT8792E_DEVID 0x8733
 159 #define IT8771E_DEVID 0x8771
 160 #define IT8772E_DEVID 0x8772
 161 #define IT8781F_DEVID 0x8781
 162 #define IT8782F_DEVID 0x8782
 163 #define IT8783E_DEVID 0x8783
 164 #define IT8786E_DEVID 0x8786
 165 #define IT8790E_DEVID 0x8790
 166 #define IT8603E_DEVID 0x8603
 167 #define IT8607E_DEVID 0x8607
 168 #define IT8620E_DEVID 0x8620
 169 #define IT8622E_DEVID 0x8622
 170 #define IT8623E_DEVID 0x8623
 171 #define IT8628E_DEVID 0x8628
 172 #define IT87_ACT_REG  0x30
 173 #define IT87_BASE_REG 0x60
 174
 175 /* Logical device 7 registers (IT8712F and later) */
 176 #define IT87_SIO_GPIO1_REG      0x25
 177 #define IT87_SIO_GPIO2_REG      0x26
 178 #define IT87_SIO_GPIO3_REG      0x27
 179 #define IT87_SIO_GPIO4_REG      0x28
 180 #define IT87_SIO_GPIO5_REG      0x29
 181 #define IT87_SIO_PINX1_REG      0x2a    /* Pin selection */
 182 #define IT87_SIO_PINX2_REG      0x2c    /* Pin selection */
 183 #define IT87_SIO_SPI_REG        0xef    /* SPI function pin select */
 184 #define IT87_SIO_VID_REG        0xfc    /* VID value */
 185 #define IT87_SIO_BEEP_PIN_REG   0xf6    /* Beep pin mapping */
 186
 187 /* Update battery voltage after every reading if true */
 188 static bool update_vbat;
 189
 190 /* Not all BIOSes properly configure the PWM registers */
 191 static bool fix_pwm_polarity;
 192
 193 /* Many IT87 constants specified below */
 194
 195 /* Length of ISA address segment */
 196 #define IT87_EXTENT 8
 197
 198 /* Length of ISA address segment for Environmental Controller */
 199 #define IT87_EC_EXTENT 2
 200
 201 /* Offset of EC registers from ISA base address */
 202 #define IT87_EC_OFFSET 5
 203
 204 /* Where are the ISA address/data registers relative to the EC base address */
 205 #define IT87_ADDR_REG_OFFSET 0
 206 #define IT87_DATA_REG_OFFSET 1
 207
 208 /*----- The IT87 registers -----*/
 209
 210 #define IT87_REG_CONFIG        0x00
 211
 212 #define IT87_REG_ALARM1        0x01
 213 #define IT87_REG_ALARM2        0x02
 214 #define IT87_REG_ALARM3        0x03
 215
 216 /*
 217  * The IT8718F and IT8720F have the VID value in a different register, in
 218  * Super-I/O configuration space.
 219  */
 220 #define IT87_REG_VID           0x0a
 221 /*
 222  * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
 223  * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
 224  * mode.
 225  */
 226 #define IT87_REG_FAN_DIV       0x0b
 227 #define IT87_REG_FAN_16BIT     0x0c
 228
 229 /*
 230  * Monitors:
 231  * - up to 13 voltage (0 to 7, battery, avcc, 10 to 12)
 232  * - up to 6 temp (1 to 6)
 233  * - up to 6 fan (1 to 6)
 234  */
 235
 236 static const u8 IT87_REG_FAN[]         = { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c };
 237 static const u8 IT87_REG_FAN_MIN[]     = { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e };
 238 static const u8 IT87_REG_FANX[]        = { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d };
 239 static const u8 IT87_REG_FANX_MIN[]    = { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f };
 240 static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59 };
 241
 242 #define IT87_REG_FAN_MAIN_CTRL 0x13
 243 #define IT87_REG_FAN_CTL       0x14
 244 static const u8 IT87_REG_PWM[]         = { 0x15, 0x16, 0x17, 0x7f, 0xa7, 0xaf };
 245 static const u8 IT87_REG_PWM_DUTY[]    = { 0x63, 0x6b, 0x73, 0x7b, 0xa3, 0xab };
 246
 247 static const u8 IT87_REG_VIN[]  = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26,
 248                                     0x27, 0x28, 0x2f, 0x2c, 0x2d, 0x2e };
 249
 250 #define IT87_REG_TEMP(nr)      (0x29 + (nr))
 251
 252 #define IT87_REG_VIN_MAX(nr)   (0x30 + (nr) * 2)
 253 #define IT87_REG_VIN_MIN(nr)   (0x31 + (nr) * 2)
 254 #define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
 255 #define IT87_REG_TEMP_LOW(nr)  (0x41 + (nr) * 2)
 256
 257 #define IT87_REG_VIN_ENABLE    0x50
 258 #define IT87_REG_TEMP_ENABLE   0x51
 259 #define IT87_REG_TEMP_EXTRA    0x55
 260 #define IT87_REG_BEEP_ENABLE   0x5c
 261
 262 #define IT87_REG_CHIPID        0x58
 263
 264 static const u8 IT87_REG_AUTO_BASE[] = { 0x60, 0x68, 0x70, 0x78, 0xa0, 0xa8 };
 265
 266 #define IT87_REG_AUTO_TEMP(nr, i) (IT87_REG_AUTO_BASE[nr] + (i))
 267 #define IT87_REG_AUTO_PWM(nr, i)  (IT87_REG_AUTO_BASE[nr] + 5 + (i))
 268
 269 #define IT87_REG_TEMP456_ENABLE 0x77
 270
 271 #define NUM_VIN                 ARRAY_SIZE(IT87_REG_VIN)
 272 #define NUM_VIN_LIMIT           8
 273 #define NUM_TEMP                6
 274 #define NUM_TEMP_OFFSET         ARRAY_SIZE(IT87_REG_TEMP_OFFSET)
 275 #define NUM_TEMP_LIMIT          3
 276 #define NUM_FAN                 ARRAY_SIZE(IT87_REG_FAN)
 277 #define NUM_FAN_DIV             3
 278 #define NUM_PWM                 ARRAY_SIZE(IT87_REG_PWM)
 279 #define NUM_AUTO_PWM            ARRAY_SIZE(IT87_REG_PWM)
 280
 281 struct it87_devices {
 282         const char *name;
 283         const char * const suffix;
 284         u32 features;
 285         u8 peci_mask;
 286         u8 old_peci_mask;
 287 };
 288
 289 #define FEAT_12MV_ADC           BIT(0)
 290 #define FEAT_NEWER_AUTOPWM      BIT(1)
 291 #define FEAT_OLD_AUTOPWM        BIT(2)
 292 #define FEAT_16BIT_FANS         BIT(3)
 293 #define FEAT_TEMP_OFFSET        BIT(4)
 294 #define FEAT_TEMP_PECI          BIT(5)
 295 #define FEAT_TEMP_OLD_PECI      BIT(6)
 296 #define FEAT_FAN16_CONFIG       BIT(7)  /* Need to enable 16-bit fans */
 297 #define FEAT_FIVE_FANS          BIT(8)  /* Supports five fans */
 298 #define FEAT_VID                BIT(9)  /* Set if chip supports VID */
 299 #define FEAT_IN7_INTERNAL       BIT(10) /* Set if in7 is internal */
 300 #define FEAT_SIX_FANS           BIT(11) /* Supports six fans */
 301 #define FEAT_10_9MV_ADC         BIT(12)
 302 #define FEAT_AVCC3              BIT(13) /* Chip supports in9/AVCC3 */
 303 #define FEAT_FIVE_PWM           BIT(14) /* Chip supports 5 pwm chn */
 304 #define FEAT_SIX_PWM            BIT(15) /* Chip supports 6 pwm chn */
 305 #define FEAT_PWM_FREQ2          BIT(16) /* Separate pwm freq 2 */
 306 #define FEAT_SIX_TEMP           BIT(17) /* Up to 6 temp sensors */
 307 #define FEAT_VIN3_5V            BIT(18) /* VIN3 connected to +5V */
 308
 309 static const struct it87_devices it87_devices[] = {
 310         [it87] = {
 311                 .name = "it87",
 312                 .suffix = "F",
 313                 .features = FEAT_OLD_AUTOPWM,   /* may need to overwrite */
 314         },
 315         [it8712] = {
 316                 .name = "it8712",
 317                 .suffix = "F",
 318                 .features = FEAT_OLD_AUTOPWM | FEAT_VID,
 319                                                 /* may need to overwrite */
 320         },
 321         [it8716] = {
 322                 .name = "it8716",
 323                 .suffix = "F",
 324                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 325                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2,
 326         },
 327         [it8718] = {
 328                 .name = "it8718",
 329                 .suffix = "F",
 330                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 331                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 332                   | FEAT_PWM_FREQ2,
 333                 .old_peci_mask = 0x4,
 334         },
 335         [it8720] = {
 336                 .name = "it8720",
 337                 .suffix = "F",
 338                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 339                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 340                   | FEAT_PWM_FREQ2,
 341                 .old_peci_mask = 0x4,
 342         },
 343         [it8721] = {
 344                 .name = "it8721",
 345                 .suffix = "F",
 346                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 347                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 348                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL
 349                   | FEAT_PWM_FREQ2,
 350                 .peci_mask = 0x05,
 351                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 352         },
 353         [it8728] = {
 354                 .name = "it8728",
 355                 .suffix = "F",
 356                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 357                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 358                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2,
 359                 .peci_mask = 0x07,
 360         },
 361         [it8732] = {
 362                 .name = "it8732",
 363                 .suffix = "F",
 364                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 365                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 366                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL,
 367                 .peci_mask = 0x07,
 368                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 369         },
 370         [it8771] = {
 371                 .name = "it8771",
 372                 .suffix = "E",
 373                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 374                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 375                   | FEAT_PWM_FREQ2,
 376                                 /* PECI: guesswork */
 377                                 /* 12mV ADC (OHM) */
 378                                 /* 16 bit fans (OHM) */
 379                                 /* three fans, always 16 bit (guesswork) */
 380                 .peci_mask = 0x07,
 381         },
 382         [it8772] = {
 383                 .name = "it8772",
 384                 .suffix = "E",
 385                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 386                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 387                   | FEAT_PWM_FREQ2,
 388                                 /* PECI (coreboot) */
 389                                 /* 12mV ADC (HWSensors4, OHM) */
 390                                 /* 16 bit fans (HWSensors4, OHM) */
 391                                 /* three fans, always 16 bit (datasheet) */
 392                 .peci_mask = 0x07,
 393         },
 394         [it8781] = {
 395                 .name = "it8781",
 396                 .suffix = "F",
 397                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 398                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
 399                 .old_peci_mask = 0x4,
 400         },
 401         [it8782] = {
 402                 .name = "it8782",
 403                 .suffix = "F",
 404                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 405                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
 406                 .old_peci_mask = 0x4,
 407         },
 408         [it8783] = {
 409                 .name = "it8783",
 410                 .suffix = "E/F",
 411                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 412                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
 413                 .old_peci_mask = 0x4,
 414         },
 415         [it8786] = {
 416                 .name = "it8786",
 417                 .suffix = "E",
 418                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 419                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 420                   | FEAT_PWM_FREQ2,
 421                 .peci_mask = 0x07,
 422         },
 423         [it8790] = {
 424                 .name = "it8790",
 425                 .suffix = "E",
 426                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 427                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 428                   | FEAT_PWM_FREQ2,
 429                 .peci_mask = 0x07,
 430         },
 431         [it8792] = {
 432                 .name = "it8792",
 433                 .suffix = "E",
 434                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 435                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 436                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL,
 437                 .peci_mask = 0x07,
 438                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 439         },
 440         [it8603] = {
 441                 .name = "it8603",
 442                 .suffix = "E",
 443                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 444                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 445                   | FEAT_AVCC3 | FEAT_PWM_FREQ2,
 446                 .peci_mask = 0x07,
 447         },
 448         [it8607] = {
 449                 .name = "it8607",
 450                 .suffix = "E",
 451                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 452                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 453                   | FEAT_AVCC3 | FEAT_PWM_FREQ2,
 454                 .peci_mask = 0x07,
 455         },
 456         [it8620] = {
 457                 .name = "it8620",
 458                 .suffix = "E",
 459                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 460                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 461                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 462                   | FEAT_SIX_TEMP | FEAT_VIN3_5V,
 463                 .peci_mask = 0x07,
 464         },
 465         [it8622] = {
 466                 .name = "it8622",
 467                 .suffix = "E",
 468                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 469                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 470                   | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
 471                   | FEAT_AVCC3 | FEAT_VIN3_5V,
 472                 .peci_mask = 0x07,
 473         },
 474         [it8628] = {
 475                 .name = "it8628",
 476                 .suffix = "E",
 477                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 478                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 479                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 480                   | FEAT_SIX_TEMP | FEAT_VIN3_5V,
 481                 .peci_mask = 0x07,
 482         },
 483 };
 484
 485 #define has_16bit_fans(data)    ((data)->features & FEAT_16BIT_FANS)
 486 #define has_12mv_adc(data)      ((data)->features & FEAT_12MV_ADC)
 487 #define has_10_9mv_adc(data)    ((data)->features & FEAT_10_9MV_ADC)
 488 #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
 489 #define has_old_autopwm(data)   ((data)->features & FEAT_OLD_AUTOPWM)
 490 #define has_temp_offset(data)   ((data)->features & FEAT_TEMP_OFFSET)
 491 #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \
 492                                  ((data)->peci_mask & BIT(nr)))
 493 #define has_temp_old_peci(data, nr) \
 494                                 (((data)->features & FEAT_TEMP_OLD_PECI) && \
 495                                  ((data)->old_peci_mask & BIT(nr)))
 496 #define has_fan16_config(data)  ((data)->features & FEAT_FAN16_CONFIG)
 497 #define has_five_fans(data)     ((data)->features & (FEAT_FIVE_FANS | \
 498                                                      FEAT_SIX_FANS))
 499 #define has_vid(data)           ((data)->features & FEAT_VID)
 500 #define has_in7_internal(data)  ((data)->features & FEAT_IN7_INTERNAL)
 501 #define has_six_fans(data)      ((data)->features & FEAT_SIX_FANS)
 502 #define has_avcc3(data)         ((data)->features & FEAT_AVCC3)
 503 #define has_five_pwm(data)      ((data)->features & (FEAT_FIVE_PWM \
 504                                                      | FEAT_SIX_PWM))
 505 #define has_six_pwm(data)       ((data)->features & FEAT_SIX_PWM)
 506 #define has_pwm_freq2(data)     ((data)->features & FEAT_PWM_FREQ2)
 507 #define has_six_temp(data)      ((data)->features & FEAT_SIX_TEMP)
 508 #define has_vin3_5v(data)       ((data)->features & FEAT_VIN3_5V)
 509
 510 struct it87_sio_data {
 511         enum chips type;
 512         /* Values read from Super-I/O config space */
 513         u8 revision;
 514         u8 vid_value;
 515         u8 beep_pin;
 516         u8 internal;    /* Internal sensors can be labeled */
 517         /* Features skipped based on config or DMI */
 518         u16 skip_in;
 519         u8 skip_vid;
 520         u8 skip_fan;
 521         u8 skip_pwm;
 522         u8 skip_temp;
 523 };
 524
 525 /*
 526  * For each registered chip, we need to keep some data in memory.
 527  * The structure is dynamically allocated.
 528  */
 529 struct it87_data {
 530         const struct attribute_group *groups[7];
 531         enum chips type;
 532         u32 features;
 533         u8 peci_mask;
 534         u8 old_peci_mask;
 535
 536         unsigned short addr;
 537         const char *name;
 538         struct mutex update_lock;
 539         char valid;             /* !=0 if following fields are valid */
 540         unsigned long last_updated;     /* In jiffies */
 541
 542         u16 in_scaled;          /* Internal voltage sensors are scaled */
 543         u16 in_internal;        /* Bitfield, internal sensors (for labels) */
 544         u16 has_in;             /* Bitfield, voltage sensors enabled */
 545         u8 in[NUM_VIN][3];              /* [nr][0]=in, [1]=min, [2]=max */
 546         u8 has_fan;             /* Bitfield, fans enabled */
 547         u16 fan[NUM_FAN][2];    /* Register values, [nr][0]=fan, [1]=min */
 548         u8 has_temp;            /* Bitfield, temp sensors enabled */
 549         s8 temp[NUM_TEMP][4];   /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
 550         u8 sensor;              /* Register value (IT87_REG_TEMP_ENABLE) */
 551         u8 extra;               /* Register value (IT87_REG_TEMP_EXTRA) */
 552         u8 fan_div[NUM_FAN_DIV];/* Register encoding, shifted right */
 553         bool has_vid;           /* True if VID supported */
 554         u8 vid;                 /* Register encoding, combined */
 555         u8 vrm;
 556         u32 alarms;             /* Register encoding, combined */
 557         bool has_beep;          /* true if beep supported */
 558         u8 beeps;               /* Register encoding */
 559         u8 fan_main_ctrl;       /* Register value */
 560         u8 fan_ctl;             /* Register value */
 561
 562         /*
 563          * The following 3 arrays correspond to the same registers up to
 564          * the IT8720F. The meaning of bits 6-0 depends on the value of bit
 565          * 7, and we want to preserve settings on mode changes, so we have
 566          * to track all values separately.
 567          * Starting with the IT8721F, the manual PWM duty cycles are stored
 568          * in separate registers (8-bit values), so the separate tracking
 569          * is no longer needed, but it is still done to keep the driver
 570          * simple.
 571          */
 572         u8 has_pwm;             /* Bitfield, pwm control enabled */
 573         u8 pwm_ctrl[NUM_PWM];   /* Register value */
 574         u8 pwm_duty[NUM_PWM];   /* Manual PWM value set by user */
 575         u8 pwm_temp_map[NUM_PWM];/* PWM to temp. chan. mapping (bits 1-0) */
 576
 577         /* Automatic fan speed control registers */
 578         u8 auto_pwm[NUM_AUTO_PWM][4];   /* [nr][3] is hard-coded */
 579         s8 auto_temp[NUM_AUTO_PWM][5];  /* [nr][0] is point1_temp_hyst */
 580 };
 581
 582 static int adc_lsb(const struct it87_data *data, int nr)
 583 {
 584         int lsb;
 585
 586         if (has_12mv_adc(data))
 587                 lsb = 120;
 588         else if (has_10_9mv_adc(data))
 589                 lsb = 109;
 590         else
 591                 lsb = 160;
 592         if (data->in_scaled & BIT(nr))
 593                 lsb <<= 1;
 594         return lsb;
 595 }
 596
 597 static u8 in_to_reg(const struct it87_data *data, int nr, long val)
 598 {
 599         val = DIV_ROUND_CLOSEST(val * 10, adc_lsb(data, nr));
 600         return clamp_val(val, 0, 255);
 601 }
 602
 603 static int in_from_reg(const struct it87_data *data, int nr, int val)
 604 {
 605         return DIV_ROUND_CLOSEST(val * adc_lsb(data, nr), 10);
 606 }
 607
 608 static inline u8 FAN_TO_REG(long rpm, int div)
 609 {
 610         if (rpm == 0)
 611                 return 255;
 612         rpm = clamp_val(rpm, 1, 1000000);
 613         return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
 614 }
 615
 616 static inline u16 FAN16_TO_REG(long rpm)
 617 {
 618         if (rpm == 0)
 619                 return 0xffff;
 620         return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
 621 }
 622
 623 #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
 624                                 1350000 / ((val) * (div)))
 625 /* The divider is fixed to 2 in 16-bit mode */
 626 #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
 627                              1350000 / ((val) * 2))
 628
 629 #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \
 630                                     ((val) + 500) / 1000), -128, 127))
 631 #define TEMP_FROM_REG(val) ((val) * 1000)
 632
 633 static u8 pwm_to_reg(const struct it87_data *data, long val)
 634 {
 635         if (has_newer_autopwm(data))
 636                 return val;
 637         else
 638                 return val >> 1;
 639 }
 640
 641 static int pwm_from_reg(const struct it87_data *data, u8 reg)
 642 {
 643         if (has_newer_autopwm(data))
 644                 return reg;
 645         else
 646                 return (reg & 0x7f) << 1;
 647 }
 648
 649 static int DIV_TO_REG(int val)
 650 {
 651         int answer = 0;
 652
 653         while (answer < 7 && (val >>= 1))
 654                 answer++;
 655         return answer;
 656 }
 657
 658 #define DIV_FROM_REG(val) BIT(val)
 659
 660 /*
 661  * PWM base frequencies. The frequency has to be divided by either 128 or 256,
 662  * depending on the chip type, to calculate the actual PWM frequency.
 663  *
 664  * Some of the chip datasheets suggest a base frequency of 51 kHz instead
 665  * of 750 kHz for the slowest base frequency, resulting in a PWM frequency
 666  * of 200 Hz. Sometimes both PWM frequency select registers are affected,
 667  * sometimes just one. It is unknown if this is a datasheet error or real,
 668  * so this is ignored for now.
 669  */
 670 static const unsigned int pwm_freq[8] = {
 671         48000000,
 672         24000000,
 673         12000000,
 674         8000000,
 675         6000000,
 676         3000000,
 677         1500000,
 678         750000,
 679 };
 680
 681 /*
 682  * Must be called with data->update_lock held, except during initialization.
 683  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 684  * would slow down the IT87 access and should not be necessary.
 685  */
 686 static int it87_read_value(struct it87_data *data, u8 reg)
 687 {
 688         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 689         return inb_p(data->addr + IT87_DATA_REG_OFFSET);
 690 }
 691
 692 /*
 693  * Must be called with data->update_lock held, except during initialization.
 694  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 695  * would slow down the IT87 access and should not be necessary.
 696  */
 697 static void it87_write_value(struct it87_data *data, u8 reg, u8 value)
 698 {
 699         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 700         outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
 701 }
 702
 703 static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
 704 {
 705         data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM[nr]);
 706         if (has_newer_autopwm(data)) {
 707                 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
 708                 data->pwm_duty[nr] = it87_read_value(data,
 709                                                      IT87_REG_PWM_DUTY[nr]);
 710         } else {
 711                 if (data->pwm_ctrl[nr] & 0x80)  /* Automatic mode */
 712                         data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
 713                 else                            /* Manual mode */
 714                         data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
 715         }
 716
 717         if (has_old_autopwm(data)) {
 718                 int i;
 719
 720                 for (i = 0; i < 5 ; i++)
 721                         data->auto_temp[nr][i] = it87_read_value(data,
 722                                                 IT87_REG_AUTO_TEMP(nr, i));
 723                 for (i = 0; i < 3 ; i++)
 724                         data->auto_pwm[nr][i] = it87_read_value(data,
 725                                                 IT87_REG_AUTO_PWM(nr, i));
 726         } else if (has_newer_autopwm(data)) {
 727                 int i;
 728
 729                 /*
 730                  * 0: temperature hysteresis (base + 5)
 731                  * 1: fan off temperature (base + 0)
 732                  * 2: fan start temperature (base + 1)
 733                  * 3: fan max temperature (base + 2)
 734                  */
 735                 data->auto_temp[nr][0] =
 736                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 5));
 737
 738                 for (i = 0; i < 3 ; i++)
 739                         data->auto_temp[nr][i + 1] =
 740                                 it87_read_value(data,
 741                                                 IT87_REG_AUTO_TEMP(nr, i));
 742                 /*
 743                  * 0: start pwm value (base + 3)
 744                  * 1: pwm slope (base + 4, 1/8th pwm)
 745                  */
 746                 data->auto_pwm[nr][0] =
 747                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 3));
 748                 data->auto_pwm[nr][1] =
 749                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 4));
 750         }
 751 }
 752
 753 static struct it87_data *it87_update_device(struct device *dev)
 754 {
 755         struct it87_data *data = dev_get_drvdata(dev);
 756         int i;
 757
 758         mutex_lock(&data->update_lock);
 759
 760         if (time_after(jiffies, data->last_updated + HZ + HZ / 2) ||
 761             !data->valid) {
 762                 if (update_vbat) {
 763                         /*
 764                          * Cleared after each update, so reenable.  Value
 765                          * returned by this read will be previous value
 766                          */
 767                         it87_write_value(data, IT87_REG_CONFIG,
 768                                 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
 769                 }
 770                 for (i = 0; i < NUM_VIN; i++) {
 771                         if (!(data->has_in & BIT(i)))
 772                                 continue;
 773
 774                         data->in[i][0] =
 775                                 it87_read_value(data, IT87_REG_VIN[i]);
 776
 777                         /* VBAT and AVCC don't have limit registers */
 778                         if (i >= NUM_VIN_LIMIT)
 779                                 continue;
 780
 781                         data->in[i][1] =
 782                                 it87_read_value(data, IT87_REG_VIN_MIN(i));
 783                         data->in[i][2] =
 784                                 it87_read_value(data, IT87_REG_VIN_MAX(i));
 785                 }
 786
 787                 for (i = 0; i < NUM_FAN; i++) {
 788                         /* Skip disabled fans */
 789                         if (!(data->has_fan & BIT(i)))
 790                                 continue;
 791
 792                         data->fan[i][1] =
 793                                 it87_read_value(data, IT87_REG_FAN_MIN[i]);
 794                         data->fan[i][0] = it87_read_value(data,
 795                                        IT87_REG_FAN[i]);
 796                         /* Add high byte if in 16-bit mode */
 797                         if (has_16bit_fans(data)) {
 798                                 data->fan[i][0] |= it87_read_value(data,
 799                                                 IT87_REG_FANX[i]) << 8;
 800                                 data->fan[i][1] |= it87_read_value(data,
 801                                                 IT87_REG_FANX_MIN[i]) << 8;
 802                         }
 803                 }
 804                 for (i = 0; i < NUM_TEMP; i++) {
 805                         if (!(data->has_temp & BIT(i)))
 806                                 continue;
 807                         data->temp[i][0] =
 808                                 it87_read_value(data, IT87_REG_TEMP(i));
 809
 810                         if (has_temp_offset(data) && i < NUM_TEMP_OFFSET)
 811                                 data->temp[i][3] =
 812                                   it87_read_value(data,
 813                                                   IT87_REG_TEMP_OFFSET[i]);
 814
 815                         if (i >= NUM_TEMP_LIMIT)
 816                                 continue;
 817
 818                         data->temp[i][1] =
 819                                 it87_read_value(data, IT87_REG_TEMP_LOW(i));
 820                         data->temp[i][2] =
 821                                 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
 822                 }
 823
 824                 /* Newer chips don't have clock dividers */
 825                 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
 826                         i = it87_read_value(data, IT87_REG_FAN_DIV);
 827                         data->fan_div[0] = i & 0x07;
 828                         data->fan_div[1] = (i >> 3) & 0x07;
 829                         data->fan_div[2] = (i & 0x40) ? 3 : 1;
 830                 }
 831
 832                 data->alarms =
 833                         it87_read_value(data, IT87_REG_ALARM1) |
 834                         (it87_read_value(data, IT87_REG_ALARM2) << 8) |
 835                         (it87_read_value(data, IT87_REG_ALARM3) << 16);
 836                 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
 837
 838                 data->fan_main_ctrl = it87_read_value(data,
 839                                 IT87_REG_FAN_MAIN_CTRL);
 840                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
 841                 for (i = 0; i < NUM_PWM; i++) {
 842                         if (!(data->has_pwm & BIT(i)))
 843                                 continue;
 844                         it87_update_pwm_ctrl(data, i);
 845                 }
 846
 847                 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
 848                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
 849                 /*
 850                  * The IT8705F does not have VID capability.
 851                  * The IT8718F and later don't use IT87_REG_VID for the
 852                  * same purpose.
 853                  */
 854                 if (data->type == it8712 || data->type == it8716) {
 855                         data->vid = it87_read_value(data, IT87_REG_VID);
 856                         /*
 857                          * The older IT8712F revisions had only 5 VID pins,
 858                          * but we assume it is always safe to read 6 bits.
 859                          */
 860                         data->vid &= 0x3f;
 861                 }
 862                 data->last_updated = jiffies;
 863                 data->valid = 1;
 864         }
 865
 866         mutex_unlock(&data->update_lock);
 867
 868         return data;
 869 }
 870
 871 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
 872                        char *buf)
 873 {
 874         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 875         struct it87_data *data = it87_update_device(dev);
 876         int index = sattr->index;
 877         int nr = sattr->nr;
 878
 879         return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
 880 }
 881
 882 static ssize_t set_in(struct device *dev, struct device_attribute *attr,
 883                       const char *buf, size_t count)
 884 {
 885         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 886         struct it87_data *data = dev_get_drvdata(dev);
 887         int index = sattr->index;
 888         int nr = sattr->nr;
 889         unsigned long val;
 890
 891         if (kstrtoul(buf, 10, &val) < 0)
 892                 return -EINVAL;
 893
 894         mutex_lock(&data->update_lock);
 895         data->in[nr][index] = in_to_reg(data, nr, val);
 896         it87_write_value(data,
 897                          index == 1 ? IT87_REG_VIN_MIN(nr)
 898                                     : IT87_REG_VIN_MAX(nr),
 899                          data->in[nr][index]);
 900         mutex_unlock(&data->update_lock);
 901         return count;
 902 }
 903
 904 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
 905 static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
 906                             0, 1);
 907 static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
 908                             0, 2);
 909
 910 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
 911 static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
 912                             1, 1);
 913 static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
 914                             1, 2);
 915
 916 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
 917 static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
 918                             2, 1);
 919 static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
 920                             2, 2);
 921
 922 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
 923 static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
 924                             3, 1);
 925 static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
 926                             3, 2);
 927
 928 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
 929 static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
 930                             4, 1);
 931 static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
 932                             4, 2);
 933
 934 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
 935 static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
 936                             5, 1);
 937 static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
 938                             5, 2);
 939
 940 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
 941 static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
 942                             6, 1);
 943 static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
 944                             6, 2);
 945
 946 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
 947 static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
 948                             7, 1);
 949 static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
 950                             7, 2);
 951
 952 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
 953 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0);
 954 static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in, NULL, 10, 0);
 955 static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in, NULL, 11, 0);
 956 static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in, NULL, 12, 0);
 957
 958 /* Up to 6 temperatures */
 959 static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
 960                          char *buf)
 961 {
 962         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 963         int nr = sattr->nr;
 964         int index = sattr->index;
 965         struct it87_data *data = it87_update_device(dev);
 966
 967         return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
 968 }
 969
 970 static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
 971                         const char *buf, size_t count)
 972 {
 973         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 974         int nr = sattr->nr;
 975         int index = sattr->index;
 976         struct it87_data *data = dev_get_drvdata(dev);
 977         long val;
 978         u8 reg, regval;
 979
 980         if (kstrtol(buf, 10, &val) < 0)
 981                 return -EINVAL;
 982
 983         mutex_lock(&data->update_lock);
 984
 985         switch (index) {
 986         default:
 987         case 1:
 988                 reg = IT87_REG_TEMP_LOW(nr);
 989                 break;
 990         case 2:
 991                 reg = IT87_REG_TEMP_HIGH(nr);
 992                 break;
 993         case 3:
 994                 regval = it87_read_value(data, IT87_REG_BEEP_ENABLE);
 995                 if (!(regval & 0x80)) {
 996                         regval |= 0x80;
 997                         it87_write_value(data, IT87_REG_BEEP_ENABLE, regval);
 998                 }
 999                 data->valid = 0;
1000                 reg = IT87_REG_TEMP_OFFSET[nr];
1001                 break;
1002         }
1003
1004         data->temp[nr][index] = TEMP_TO_REG(val);
1005         it87_write_value(data, reg, data->temp[nr][index]);
1006         mutex_unlock(&data->update_lock);
1007         return count;
1008 }
1009
1010 static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
1011 static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1012                             0, 1);
1013 static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1014                             0, 2);
1015 static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
1016                             set_temp, 0, 3);
1017 static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
1018 static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1019                             1, 1);
1020 static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1021                             1, 2);
1022 static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
1023                             set_temp, 1, 3);
1024 static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
1025 static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1026                             2, 1);
1027 static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1028                             2, 2);
1029 static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
1030                             set_temp, 2, 3);
1031 static SENSOR_DEVICE_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0);
1032 static SENSOR_DEVICE_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0);
1033 static SENSOR_DEVICE_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0);
1034
1035 static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
1036                               char *buf)
1037 {
1038         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1039         int nr = sensor_attr->index;
1040         struct it87_data *data = it87_update_device(dev);
1041         u8 reg = data->sensor;      /* In case value is updated while used */
1042         u8 extra = data->extra;
1043
1044         if ((has_temp_peci(data, nr) && (reg >> 6 == nr + 1)) ||
1045             (has_temp_old_peci(data, nr) && (extra & 0x80)))
1046                 return sprintf(buf, "6\n");  /* Intel PECI */
1047         if (reg & (1 << nr))
1048                 return sprintf(buf, "3\n");  /* thermal diode */
1049         if (reg & (8 << nr))
1050                 return sprintf(buf, "4\n");  /* thermistor */
1051         return sprintf(buf, "0\n");      /* disabled */
1052 }
1053
1054 static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
1055                              const char *buf, size_t count)
1056 {
1057         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1058         int nr = sensor_attr->index;
1059
1060         struct it87_data *data = dev_get_drvdata(dev);
1061         long val;
1062         u8 reg, extra;
1063
1064         if (kstrtol(buf, 10, &val) < 0)
1065                 return -EINVAL;
1066
1067         reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1068         reg &= ~(1 << nr);
1069         reg &= ~(8 << nr);
1070         if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6))
1071                 reg &= 0x3f;
1072         extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1073         if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6))
1074                 extra &= 0x7f;
1075         if (val == 2) { /* backwards compatibility */
1076                 dev_warn(dev,
1077                          "Sensor type 2 is deprecated, please use 4 instead\n");
1078                 val = 4;
1079         }
1080         /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */
1081         if (val == 3)
1082                 reg |= 1 << nr;
1083         else if (val == 4)
1084                 reg |= 8 << nr;
1085         else if (has_temp_peci(data, nr) && val == 6)
1086                 reg |= (nr + 1) << 6;
1087         else if (has_temp_old_peci(data, nr) && val == 6)
1088                 extra |= 0x80;
1089         else if (val != 0)
1090                 return -EINVAL;
1091
1092         mutex_lock(&data->update_lock);
1093         data->sensor = reg;
1094         data->extra = extra;
1095         it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
1096         if (has_temp_old_peci(data, nr))
1097                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1098         data->valid = 0;        /* Force cache refresh */
1099         mutex_unlock(&data->update_lock);
1100         return count;
1101 }
1102
1103 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1104                           set_temp_type, 0);
1105 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1106                           set_temp_type, 1);
1107 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1108                           set_temp_type, 2);
1109
1110 /* 6 Fans */
1111
1112 static int pwm_mode(const struct it87_data *data, int nr)
1113 {
1114         if (data->type != it8603 && nr < 3 && !(data->fan_main_ctrl & BIT(nr)))
1115                 return 0;                               /* Full speed */
1116         if (data->pwm_ctrl[nr] & 0x80)
1117                 return 2;                               /* Automatic mode */
1118         if ((data->type == it8603 || nr >= 3) &&
1119             data->pwm_duty[nr] == pwm_to_reg(data, 0xff))
1120                 return 0;                       /* Full speed */
1121
1122         return 1;                               /* Manual mode */
1123 }
1124
1125 static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
1126                         char *buf)
1127 {
1128         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1129         int nr = sattr->nr;
1130         int index = sattr->index;
1131         int speed;
1132         struct it87_data *data = it87_update_device(dev);
1133
1134         speed = has_16bit_fans(data) ?
1135                 FAN16_FROM_REG(data->fan[nr][index]) :
1136                 FAN_FROM_REG(data->fan[nr][index],
1137                              DIV_FROM_REG(data->fan_div[nr]));
1138         return sprintf(buf, "%d\n", speed);
1139 }
1140
1141 static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
1142                             char *buf)
1143 {
1144         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1145         struct it87_data *data = it87_update_device(dev);
1146         int nr = sensor_attr->index;
1147
1148         return sprintf(buf, "%lu\n", DIV_FROM_REG(data->fan_div[nr]));
1149 }
1150
1151 static ssize_t show_pwm_enable(struct device *dev,
1152                                struct device_attribute *attr, char *buf)
1153 {
1154         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1155         struct it87_data *data = it87_update_device(dev);
1156         int nr = sensor_attr->index;
1157
1158         return sprintf(buf, "%d\n", pwm_mode(data, nr));
1159 }
1160
1161 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
1162                         char *buf)
1163 {
1164         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1165         struct it87_data *data = it87_update_device(dev);
1166         int nr = sensor_attr->index;
1167
1168         return sprintf(buf, "%d\n",
1169                        pwm_from_reg(data, data->pwm_duty[nr]));
1170 }
1171
1172 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
1173                              char *buf)
1174 {
1175         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1176         struct it87_data *data = it87_update_device(dev);
1177         int nr = sensor_attr->index;
1178         unsigned int freq;
1179         int index;
1180
1181         if (has_pwm_freq2(data) && nr == 1)
1182                 index = (data->extra >> 4) & 0x07;
1183         else
1184                 index = (data->fan_ctl >> 4) & 0x07;
1185
1186         freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128);
1187
1188         return sprintf(buf, "%u\n", freq);
1189 }
1190
1191 static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
1192                        const char *buf, size_t count)
1193 {
1194         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1195         int nr = sattr->nr;
1196         int index = sattr->index;
1197
1198         struct it87_data *data = dev_get_drvdata(dev);
1199         long val;
1200         u8 reg;
1201
1202         if (kstrtol(buf, 10, &val) < 0)
1203                 return -EINVAL;
1204
1205         mutex_lock(&data->update_lock);
1206
1207         if (has_16bit_fans(data)) {
1208                 data->fan[nr][index] = FAN16_TO_REG(val);
1209                 it87_write_value(data, IT87_REG_FAN_MIN[nr],
1210                                  data->fan[nr][index] & 0xff);
1211                 it87_write_value(data, IT87_REG_FANX_MIN[nr],
1212                                  data->fan[nr][index] >> 8);
1213         } else {
1214                 reg = it87_read_value(data, IT87_REG_FAN_DIV);
1215                 switch (nr) {
1216                 case 0:
1217                         data->fan_div[nr] = reg & 0x07;
1218                         break;
1219                 case 1:
1220                         data->fan_div[nr] = (reg >> 3) & 0x07;
1221                         break;
1222                 case 2:
1223                         data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
1224                         break;
1225                 }
1226                 data->fan[nr][index] =
1227                   FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
1228                 it87_write_value(data, IT87_REG_FAN_MIN[nr],
1229                                  data->fan[nr][index]);
1230         }
1231
1232         mutex_unlock(&data->update_lock);
1233         return count;
1234 }
1235
1236 static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
1237                            const char *buf, size_t count)
1238 {
1239         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1240         struct it87_data *data = dev_get_drvdata(dev);
1241         int nr = sensor_attr->index;
1242         unsigned long val;
1243         int min;
1244         u8 old;
1245
1246         if (kstrtoul(buf, 10, &val) < 0)
1247                 return -EINVAL;
1248
1249         mutex_lock(&data->update_lock);
1250         old = it87_read_value(data, IT87_REG_FAN_DIV);
1251
1252         /* Save fan min limit */
1253         min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
1254
1255         switch (nr) {
1256         case 0:
1257         case 1:
1258                 data->fan_div[nr] = DIV_TO_REG(val);
1259                 break;
1260         case 2:
1261                 if (val < 8)
1262                         data->fan_div[nr] = 1;
1263                 else
1264                         data->fan_div[nr] = 3;
1265         }
1266         val = old & 0x80;
1267         val |= (data->fan_div[0] & 0x07);
1268         val |= (data->fan_div[1] & 0x07) << 3;
1269         if (data->fan_div[2] == 3)
1270                 val |= 0x1 << 6;
1271         it87_write_value(data, IT87_REG_FAN_DIV, val);
1272
1273         /* Restore fan min limit */
1274         data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
1275         it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan[nr][1]);
1276
1277         mutex_unlock(&data->update_lock);
1278         return count;
1279 }
1280
1281 /* Returns 0 if OK, -EINVAL otherwise */
1282 static int check_trip_points(struct device *dev, int nr)
1283 {
1284         const struct it87_data *data = dev_get_drvdata(dev);
1285         int i, err = 0;
1286
1287         if (has_old_autopwm(data)) {
1288                 for (i = 0; i < 3; i++) {
1289                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1290                                 err = -EINVAL;
1291                 }
1292                 for (i = 0; i < 2; i++) {
1293                         if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1294                                 err = -EINVAL;
1295                 }
1296         } else if (has_newer_autopwm(data)) {
1297                 for (i = 1; i < 3; i++) {
1298                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1299                                 err = -EINVAL;
1300                 }
1301         }
1302
1303         if (err) {
1304                 dev_err(dev,
1305                         "Inconsistent trip points, not switching to automatic mode\n");
1306                 dev_err(dev, "Adjust the trip points and try again\n");
1307         }
1308         return err;
1309 }
1310
1311 static ssize_t set_pwm_enable(struct device *dev, struct device_attribute *attr,
1312                               const char *buf, size_t count)
1313 {
1314         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1315         struct it87_data *data = dev_get_drvdata(dev);
1316         int nr = sensor_attr->index;
1317         long val;
1318
1319         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
1320                 return -EINVAL;
1321
1322         /* Check trip points before switching to automatic mode */
1323         if (val == 2) {
1324                 if (check_trip_points(dev, nr) < 0)
1325                         return -EINVAL;
1326         }
1327
1328         mutex_lock(&data->update_lock);
1329
1330         if (val == 0) {
1331                 if (nr < 3 && data->type != it8603) {
1332                         int tmp;
1333                         /* make sure the fan is on when in on/off mode */
1334                         tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1335                         it87_write_value(data, IT87_REG_FAN_CTL, tmp | BIT(nr));
1336                         /* set on/off mode */
1337                         data->fan_main_ctrl &= ~BIT(nr);
1338                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1339                                          data->fan_main_ctrl);
1340                 } else {
1341                         u8 ctrl;
1342
1343                         /* No on/off mode, set maximum pwm value */
1344                         data->pwm_duty[nr] = pwm_to_reg(data, 0xff);
1345                         it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1346                                          data->pwm_duty[nr]);
1347                         /* and set manual mode */
1348                         if (has_newer_autopwm(data)) {
1349                                 ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1350                                         data->pwm_temp_map[nr];
1351                         } else {
1352                                 ctrl = data->pwm_duty[nr];
1353                         }
1354                         data->pwm_ctrl[nr] = ctrl;
1355                         it87_write_value(data, IT87_REG_PWM[nr], ctrl);
1356                 }
1357         } else {
1358                 u8 ctrl;
1359
1360                 if (has_newer_autopwm(data)) {
1361                         ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1362                                 data->pwm_temp_map[nr];
1363                         if (val != 1)
1364                                 ctrl |= 0x80;
1365                 } else {
1366                         ctrl = (val == 1 ? data->pwm_duty[nr] : 0x80);
1367                 }
1368                 data->pwm_ctrl[nr] = ctrl;
1369                 it87_write_value(data, IT87_REG_PWM[nr], ctrl);
1370
1371                 if (data->type != it8603 && nr < 3) {
1372                         /* set SmartGuardian mode */
1373                         data->fan_main_ctrl |= BIT(nr);
1374                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1375                                          data->fan_main_ctrl);
1376                 }
1377         }
1378
1379         mutex_unlock(&data->update_lock);
1380         return count;
1381 }
1382
1383 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1384                        const char *buf, size_t count)
1385 {
1386         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1387         struct it87_data *data = dev_get_drvdata(dev);
1388         int nr = sensor_attr->index;
1389         long val;
1390
1391         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1392                 return -EINVAL;
1393
1394         mutex_lock(&data->update_lock);
1395         it87_update_pwm_ctrl(data, nr);
1396         if (has_newer_autopwm(data)) {
1397                 /*
1398                  * If we are in automatic mode, the PWM duty cycle register
1399                  * is read-only so we can't write the value.
1400                  */
1401                 if (data->pwm_ctrl[nr] & 0x80) {
1402                         mutex_unlock(&data->update_lock);
1403                         return -EBUSY;
1404                 }
1405                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1406                 it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1407                                  data->pwm_duty[nr]);
1408         } else {
1409                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1410                 /*
1411                  * If we are in manual mode, write the duty cycle immediately;
1412                  * otherwise, just store it for later use.
1413                  */
1414                 if (!(data->pwm_ctrl[nr] & 0x80)) {
1415                         data->pwm_ctrl[nr] = data->pwm_duty[nr];
1416                         it87_write_value(data, IT87_REG_PWM[nr],
1417                                          data->pwm_ctrl[nr]);
1418                 }
1419         }
1420         mutex_unlock(&data->update_lock);
1421         return count;
1422 }
1423
1424 static ssize_t set_pwm_freq(struct device *dev, struct device_attribute *attr,
1425                             const char *buf, size_t count)
1426 {
1427         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1428         struct it87_data *data = dev_get_drvdata(dev);
1429         int nr = sensor_attr->index;
1430         unsigned long val;
1431         int i;
1432
1433         if (kstrtoul(buf, 10, &val) < 0)
1434                 return -EINVAL;
1435
1436         val = clamp_val(val, 0, 1000000);
1437         val *= has_newer_autopwm(data) ? 256 : 128;
1438
1439         /* Search for the nearest available frequency */
1440         for (i = 0; i < 7; i++) {
1441                 if (val > (pwm_freq[i] + pwm_freq[i + 1]) / 2)
1442                         break;
1443         }
1444
1445         mutex_lock(&data->update_lock);
1446         if (nr == 0) {
1447                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
1448                 data->fan_ctl |= i << 4;
1449                 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
1450         } else {
1451                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x8f;
1452                 data->extra |= i << 4;
1453                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1454         }
1455         mutex_unlock(&data->update_lock);
1456
1457         return count;
1458 }
1459
1460 static ssize_t show_pwm_temp_map(struct device *dev,
1461                                  struct device_attribute *attr, char *buf)
1462 {
1463         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1464         struct it87_data *data = it87_update_device(dev);
1465         int nr = sensor_attr->index;
1466         int map;
1467
1468         map = data->pwm_temp_map[nr];
1469         if (map >= 3)
1470                 map = 0;        /* Should never happen */
1471         if (nr >= 3)            /* pwm channels 3..6 map to temp4..6 */
1472                 map += 3;
1473
1474         return sprintf(buf, "%d\n", (int)BIT(map));
1475 }
1476
1477 static ssize_t set_pwm_temp_map(struct device *dev,
1478                                 struct device_attribute *attr, const char *buf,
1479                                 size_t count)
1480 {
1481         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1482         struct it87_data *data = dev_get_drvdata(dev);
1483         int nr = sensor_attr->index;
1484         long val;
1485         u8 reg;
1486
1487         if (kstrtol(buf, 10, &val) < 0)
1488                 return -EINVAL;
1489
1490         if (nr >= 3)
1491                 val -= 3;
1492
1493         switch (val) {
1494         case BIT(0):
1495                 reg = 0x00;
1496                 break;
1497         case BIT(1):
1498                 reg = 0x01;
1499                 break;
1500         case BIT(2):
1501                 reg = 0x02;
1502                 break;
1503         default:
1504                 return -EINVAL;
1505         }
1506
1507         mutex_lock(&data->update_lock);
1508         it87_update_pwm_ctrl(data, nr);
1509         data->pwm_temp_map[nr] = reg;
1510         /*
1511          * If we are in automatic mode, write the temp mapping immediately;
1512          * otherwise, just store it for later use.
1513          */
1514         if (data->pwm_ctrl[nr] & 0x80) {
1515                 data->pwm_ctrl[nr] = (data->pwm_ctrl[nr] & 0xfc) |
1516                                                 data->pwm_temp_map[nr];
1517                 it87_write_value(data, IT87_REG_PWM[nr], data->pwm_ctrl[nr]);
1518         }
1519         mutex_unlock(&data->update_lock);
1520         return count;
1521 }
1522
1523 static ssize_t show_auto_pwm(struct device *dev, struct device_attribute *attr,
1524                              char *buf)
1525 {
1526         struct it87_data *data = it87_update_device(dev);
1527         struct sensor_device_attribute_2 *sensor_attr =
1528                         to_sensor_dev_attr_2(attr);
1529         int nr = sensor_attr->nr;
1530         int point = sensor_attr->index;
1531
1532         return sprintf(buf, "%d\n",
1533                        pwm_from_reg(data, data->auto_pwm[nr][point]));
1534 }
1535
1536 static ssize_t set_auto_pwm(struct device *dev, struct device_attribute *attr,
1537                             const char *buf, size_t count)
1538 {
1539         struct it87_data *data = dev_get_drvdata(dev);
1540         struct sensor_device_attribute_2 *sensor_attr =
1541                         to_sensor_dev_attr_2(attr);
1542         int nr = sensor_attr->nr;
1543         int point = sensor_attr->index;
1544         int regaddr;
1545         long val;
1546
1547         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1548                 return -EINVAL;
1549
1550         mutex_lock(&data->update_lock);
1551         data->auto_pwm[nr][point] = pwm_to_reg(data, val);
1552         if (has_newer_autopwm(data))
1553                 regaddr = IT87_REG_AUTO_TEMP(nr, 3);
1554         else
1555                 regaddr = IT87_REG_AUTO_PWM(nr, point);
1556         it87_write_value(data, regaddr, data->auto_pwm[nr][point]);
1557         mutex_unlock(&data->update_lock);
1558         return count;
1559 }
1560
1561 static ssize_t show_auto_pwm_slope(struct device *dev,
1562                                    struct device_attribute *attr, char *buf)
1563 {
1564         struct it87_data *data = it87_update_device(dev);
1565         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1566         int nr = sensor_attr->index;
1567
1568         return sprintf(buf, "%d\n", data->auto_pwm[nr][1] & 0x7f);
1569 }
1570
1571 static ssize_t set_auto_pwm_slope(struct device *dev,
1572                                   struct device_attribute *attr,
1573                                   const char *buf, size_t count)
1574 {
1575         struct it87_data *data = dev_get_drvdata(dev);
1576         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1577         int nr = sensor_attr->index;
1578         unsigned long val;
1579
1580         if (kstrtoul(buf, 10, &val) < 0 || val > 127)
1581                 return -EINVAL;
1582
1583         mutex_lock(&data->update_lock);
1584         data->auto_pwm[nr][1] = (data->auto_pwm[nr][1] & 0x80) | val;
1585         it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 4),
1586                          data->auto_pwm[nr][1]);
1587         mutex_unlock(&data->update_lock);
1588         return count;
1589 }
1590
1591 static ssize_t show_auto_temp(struct device *dev, struct device_attribute *attr,
1592                               char *buf)
1593 {
1594         struct it87_data *data = it87_update_device(dev);
1595         struct sensor_device_attribute_2 *sensor_attr =
1596                         to_sensor_dev_attr_2(attr);
1597         int nr = sensor_attr->nr;
1598         int point = sensor_attr->index;
1599         int reg;
1600
1601         if (has_old_autopwm(data) || point)
1602                 reg = data->auto_temp[nr][point];
1603         else
1604                 reg = data->auto_temp[nr][1] - (data->auto_temp[nr][0] & 0x1f);
1605
1606         return sprintf(buf, "%d\n", TEMP_FROM_REG(reg));
1607 }
1608
1609 static ssize_t set_auto_temp(struct device *dev, struct device_attribute *attr,
1610                              const char *buf, size_t count)
1611 {
1612         struct it87_data *data = dev_get_drvdata(dev);
1613         struct sensor_device_attribute_2 *sensor_attr =
1614                         to_sensor_dev_attr_2(attr);
1615         int nr = sensor_attr->nr;
1616         int point = sensor_attr->index;
1617         long val;
1618         int reg;
1619
1620         if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
1621                 return -EINVAL;
1622
1623         mutex_lock(&data->update_lock);
1624         if (has_newer_autopwm(data) && !point) {
1625                 reg = data->auto_temp[nr][1] - TEMP_TO_REG(val);
1626                 reg = clamp_val(reg, 0, 0x1f) | (data->auto_temp[nr][0] & 0xe0);
1627                 data->auto_temp[nr][0] = reg;
1628                 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 5), reg);
1629         } else {
1630                 reg = TEMP_TO_REG(val);
1631                 data->auto_temp[nr][point] = reg;
1632                 if (has_newer_autopwm(data))
1633                         point--;
1634                 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point), reg);
1635         }
1636         mutex_unlock(&data->update_lock);
1637         return count;
1638 }
1639
1640 static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
1641 static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1642                             0, 1);
1643 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
1644                           set_fan_div, 0);
1645
1646 static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
1647 static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1648                             1, 1);
1649 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
1650                           set_fan_div, 1);
1651
1652 static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
1653 static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1654                             2, 1);
1655 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
1656                           set_fan_div, 2);
1657
1658 static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
1659 static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1660                             3, 1);
1661
1662 static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
1663 static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1664                             4, 1);
1665
1666 static SENSOR_DEVICE_ATTR_2(fan6_input, S_IRUGO, show_fan, NULL, 5, 0);
1667 static SENSOR_DEVICE_ATTR_2(fan6_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1668                             5, 1);
1669
1670 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
1671                           show_pwm_enable, set_pwm_enable, 0);
1672 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0);
1673 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq,
1674                           set_pwm_freq, 0);
1675 static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO,
1676                           show_pwm_temp_map, set_pwm_temp_map, 0);
1677 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR,
1678                             show_auto_pwm, set_auto_pwm, 0, 0);
1679 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR,
1680                             show_auto_pwm, set_auto_pwm, 0, 1);
1681 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR,
1682                             show_auto_pwm, set_auto_pwm, 0, 2);
1683 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO,
1684                             show_auto_pwm, NULL, 0, 3);
1685 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
1686                             show_auto_temp, set_auto_temp, 0, 1);
1687 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1688                             show_auto_temp, set_auto_temp, 0, 0);
1689 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
1690                             show_auto_temp, set_auto_temp, 0, 2);
1691 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
1692                             show_auto_temp, set_auto_temp, 0, 3);
1693 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR,
1694                             show_auto_temp, set_auto_temp, 0, 4);
1695 static SENSOR_DEVICE_ATTR_2(pwm1_auto_start, S_IRUGO | S_IWUSR,
1696                             show_auto_pwm, set_auto_pwm, 0, 0);
1697 static SENSOR_DEVICE_ATTR(pwm1_auto_slope, S_IRUGO | S_IWUSR,
1698                           show_auto_pwm_slope, set_auto_pwm_slope, 0);
1699
1700 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
1701                           show_pwm_enable, set_pwm_enable, 1);
1702 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1);
1703 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, set_pwm_freq, 1);
1704 static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO,
1705                           show_pwm_temp_map, set_pwm_temp_map, 1);
1706 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR,
1707                             show_auto_pwm, set_auto_pwm, 1, 0);
1708 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR,
1709                             show_auto_pwm, set_auto_pwm, 1, 1);
1710 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR,
1711                             show_auto_pwm, set_auto_pwm, 1, 2);
1712 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO,
1713                             show_auto_pwm, NULL, 1, 3);
1714 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
1715                             show_auto_temp, set_auto_temp, 1, 1);
1716 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1717                             show_auto_temp, set_auto_temp, 1, 0);
1718 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
1719                             show_auto_temp, set_auto_temp, 1, 2);
1720 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
1721                             show_auto_temp, set_auto_temp, 1, 3);
1722 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR,
1723                             show_auto_temp, set_auto_temp, 1, 4);
1724 static SENSOR_DEVICE_ATTR_2(pwm2_auto_start, S_IRUGO | S_IWUSR,
1725                             show_auto_pwm, set_auto_pwm, 1, 0);
1726 static SENSOR_DEVICE_ATTR(pwm2_auto_slope, S_IRUGO | S_IWUSR,
1727                           show_auto_pwm_slope, set_auto_pwm_slope, 1);
1728
1729 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
1730                           show_pwm_enable, set_pwm_enable, 2);
1731 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2);
1732 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL, 2);
1733 static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO,
1734                           show_pwm_temp_map, set_pwm_temp_map, 2);
1735 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR,
1736                             show_auto_pwm, set_auto_pwm, 2, 0);
1737 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR,
1738                             show_auto_pwm, set_auto_pwm, 2, 1);
1739 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR,
1740                             show_auto_pwm, set_auto_pwm, 2, 2);
1741 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO,
1742                             show_auto_pwm, NULL, 2, 3);
1743 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
1744                             show_auto_temp, set_auto_temp, 2, 1);
1745 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1746                             show_auto_temp, set_auto_temp, 2, 0);
1747 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
1748                             show_auto_temp, set_auto_temp, 2, 2);
1749 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
1750                             show_auto_temp, set_auto_temp, 2, 3);
1751 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR,
1752                             show_auto_temp, set_auto_temp, 2, 4);
1753 static SENSOR_DEVICE_ATTR_2(pwm3_auto_start, S_IRUGO | S_IWUSR,
1754                             show_auto_pwm, set_auto_pwm, 2, 0);
1755 static SENSOR_DEVICE_ATTR(pwm3_auto_slope, S_IRUGO | S_IWUSR,
1756                           show_auto_pwm_slope, set_auto_pwm_slope, 2);
1757
1758 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IRUGO | S_IWUSR,
1759                           show_pwm_enable, set_pwm_enable, 3);
1760 static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 3);
1761 static SENSOR_DEVICE_ATTR(pwm4_freq, S_IRUGO, show_pwm_freq, NULL, 3);
1762 static SENSOR_DEVICE_ATTR(pwm4_auto_channels_temp, S_IRUGO,
1763                           show_pwm_temp_map, set_pwm_temp_map, 3);
1764 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp, S_IRUGO | S_IWUSR,
1765                             show_auto_temp, set_auto_temp, 2, 1);
1766 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1767                             show_auto_temp, set_auto_temp, 2, 0);
1768 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point2_temp, S_IRUGO | S_IWUSR,
1769                             show_auto_temp, set_auto_temp, 2, 2);
1770 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point3_temp, S_IRUGO | S_IWUSR,
1771                             show_auto_temp, set_auto_temp, 2, 3);
1772 static SENSOR_DEVICE_ATTR_2(pwm4_auto_start, S_IRUGO | S_IWUSR,
1773                             show_auto_pwm, set_auto_pwm, 3, 0);
1774 static SENSOR_DEVICE_ATTR(pwm4_auto_slope, S_IRUGO | S_IWUSR,
1775                           show_auto_pwm_slope, set_auto_pwm_slope, 3);
1776
1777 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IRUGO | S_IWUSR,
1778                           show_pwm_enable, set_pwm_enable, 4);
1779 static SENSOR_DEVICE_ATTR(pwm5, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 4);
1780 static SENSOR_DEVICE_ATTR(pwm5_freq, S_IRUGO, show_pwm_freq, NULL, 4);
1781 static SENSOR_DEVICE_ATTR(pwm5_auto_channels_temp, S_IRUGO,
1782                           show_pwm_temp_map, set_pwm_temp_map, 4);
1783 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp, S_IRUGO | S_IWUSR,
1784                             show_auto_temp, set_auto_temp, 2, 1);
1785 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1786                             show_auto_temp, set_auto_temp, 2, 0);
1787 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point2_temp, S_IRUGO | S_IWUSR,
1788                             show_auto_temp, set_auto_temp, 2, 2);
1789 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point3_temp, S_IRUGO | S_IWUSR,
1790                             show_auto_temp, set_auto_temp, 2, 3);
1791 static SENSOR_DEVICE_ATTR_2(pwm5_auto_start, S_IRUGO | S_IWUSR,
1792                             show_auto_pwm, set_auto_pwm, 4, 0);
1793 static SENSOR_DEVICE_ATTR(pwm5_auto_slope, S_IRUGO | S_IWUSR,
1794                           show_auto_pwm_slope, set_auto_pwm_slope, 4);
1795
1796 static SENSOR_DEVICE_ATTR(pwm6_enable, S_IRUGO | S_IWUSR,
1797                           show_pwm_enable, set_pwm_enable, 5);
1798 static SENSOR_DEVICE_ATTR(pwm6, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 5);
1799 static SENSOR_DEVICE_ATTR(pwm6_freq, S_IRUGO, show_pwm_freq, NULL, 5);
1800 static SENSOR_DEVICE_ATTR(pwm6_auto_channels_temp, S_IRUGO,
1801                           show_pwm_temp_map, set_pwm_temp_map, 5);
1802 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp, S_IRUGO | S_IWUSR,
1803                             show_auto_temp, set_auto_temp, 2, 1);
1804 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1805                             show_auto_temp, set_auto_temp, 2, 0);
1806 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point2_temp, S_IRUGO | S_IWUSR,
1807                             show_auto_temp, set_auto_temp, 2, 2);
1808 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point3_temp, S_IRUGO | S_IWUSR,
1809                             show_auto_temp, set_auto_temp, 2, 3);
1810 static SENSOR_DEVICE_ATTR_2(pwm6_auto_start, S_IRUGO | S_IWUSR,
1811                             show_auto_pwm, set_auto_pwm, 5, 0);
1812 static SENSOR_DEVICE_ATTR(pwm6_auto_slope, S_IRUGO | S_IWUSR,
1813                           show_auto_pwm_slope, set_auto_pwm_slope, 5);
1814
1815 /* Alarms */
1816 static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
1817                            char *buf)
1818 {
1819         struct it87_data *data = it87_update_device(dev);
1820
1821         return sprintf(buf, "%u\n", data->alarms);
1822 }
1823 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
1824
1825 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
1826                           char *buf)
1827 {
1828         struct it87_data *data = it87_update_device(dev);
1829         int bitnr = to_sensor_dev_attr(attr)->index;
1830
1831         return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
1832 }
1833
1834 static ssize_t clear_intrusion(struct device *dev,
1835                                struct device_attribute *attr, const char *buf,
1836                                size_t count)
1837 {
1838         struct it87_data *data = dev_get_drvdata(dev);
1839         int config;
1840         long val;
1841
1842         if (kstrtol(buf, 10, &val) < 0 || val != 0)
1843                 return -EINVAL;
1844
1845         mutex_lock(&data->update_lock);
1846         config = it87_read_value(data, IT87_REG_CONFIG);
1847         if (config < 0) {
1848                 count = config;
1849         } else {
1850                 config |= BIT(5);
1851                 it87_write_value(data, IT87_REG_CONFIG, config);
1852                 /* Invalidate cache to force re-read */
1853                 data->valid = 0;
1854         }
1855         mutex_unlock(&data->update_lock);
1856
1857         return count;
1858 }
1859
1860 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
1861 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
1862 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
1863 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
1864 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
1865 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
1866 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
1867 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
1868 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
1869 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
1870 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
1871 static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
1872 static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
1873 static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 7);
1874 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
1875 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
1876 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
1877 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
1878                           show_alarm, clear_intrusion, 4);
1879
1880 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
1881                          char *buf)
1882 {
1883         struct it87_data *data = it87_update_device(dev);
1884         int bitnr = to_sensor_dev_attr(attr)->index;
1885
1886         return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
1887 }
1888
1889 static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
1890                         const char *buf, size_t count)
1891 {
1892         int bitnr = to_sensor_dev_attr(attr)->index;
1893         struct it87_data *data = dev_get_drvdata(dev);
1894         long val;
1895
1896         if (kstrtol(buf, 10, &val) < 0 || (val != 0 && val != 1))
1897                 return -EINVAL;
1898
1899         mutex_lock(&data->update_lock);
1900         data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1901         if (val)
1902                 data->beeps |= BIT(bitnr);
1903         else
1904                 data->beeps &= ~BIT(bitnr);
1905         it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
1906         mutex_unlock(&data->update_lock);
1907         return count;
1908 }
1909
1910 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
1911                           show_beep, set_beep, 1);
1912 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
1913 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
1914 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
1915 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
1916 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
1917 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
1918 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
1919 /* fanX_beep writability is set later */
1920 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
1921 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
1922 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
1923 static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
1924 static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
1925 static SENSOR_DEVICE_ATTR(fan6_beep, S_IRUGO, show_beep, set_beep, 0);
1926 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
1927                           show_beep, set_beep, 2);
1928 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
1929 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
1930
1931 static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
1932                             char *buf)
1933 {
1934         struct it87_data *data = dev_get_drvdata(dev);
1935
1936         return sprintf(buf, "%u\n", data->vrm);
1937 }
1938
1939 static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
1940                              const char *buf, size_t count)
1941 {
1942         struct it87_data *data = dev_get_drvdata(dev);
1943         unsigned long val;
1944
1945         if (kstrtoul(buf, 10, &val) < 0)
1946                 return -EINVAL;
1947
1948         data->vrm = val;
1949
1950         return count;
1951 }
1952 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
1953
1954 static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
1955                             char *buf)
1956 {
1957         struct it87_data *data = it87_update_device(dev);
1958
1959         return sprintf(buf, "%ld\n", (long)vid_from_reg(data->vid, data->vrm));
1960 }
1961 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
1962
1963 static ssize_t show_label(struct device *dev, struct device_attribute *attr,
1964                           char *buf)
1965 {
1966         static const char * const labels[] = {
1967                 "+5V",
1968                 "5VSB",
1969                 "Vbat",
1970                 "AVCC",
1971         };
1972         static const char * const labels_it8721[] = {
1973                 "+3.3V",
1974                 "3VSB",
1975                 "Vbat",
1976                 "+3.3V",
1977         };
1978         struct it87_data *data = dev_get_drvdata(dev);
1979         int nr = to_sensor_dev_attr(attr)->index;
1980         const char *label;
1981
1982         if (has_vin3_5v(data) && nr == 0)
1983                 label = labels[0];
1984         else if (has_12mv_adc(data) || has_10_9mv_adc(data))
1985                 label = labels_it8721[nr];
1986         else
1987                 label = labels[nr];
1988
1989         return sprintf(buf, "%s\n", label);
1990 }
1991 static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
1992 static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
1993 static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
1994 /* AVCC3 */
1995 static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 3);
1996
1997 static umode_t it87_in_is_visible(struct kobject *kobj,
1998                                   struct attribute *attr, int index)
1999 {
2000         struct device *dev = container_of(kobj, struct device, kobj);
2001         struct it87_data *data = dev_get_drvdata(dev);
2002         int i = index / 5;      /* voltage index */
2003         int a = index % 5;      /* attribute index */
2004
2005         if (index >= 40) {      /* in8 and higher only have input attributes */
2006                 i = index - 40 + 8;
2007                 a = 0;
2008         }
2009
2010         if (!(data->has_in & BIT(i)))
2011                 return 0;
2012
2013         if (a == 4 && !data->has_beep)
2014                 return 0;
2015
2016         return attr->mode;
2017 }
2018
2019 static struct attribute *it87_attributes_in[] = {
2020         &sensor_dev_attr_in0_input.dev_attr.attr,
2021         &sensor_dev_attr_in0_min.dev_attr.attr,
2022         &sensor_dev_attr_in0_max.dev_attr.attr,
2023         &sensor_dev_attr_in0_alarm.dev_attr.attr,
2024         &sensor_dev_attr_in0_beep.dev_attr.attr,        /* 4 */
2025
2026         &sensor_dev_attr_in1_input.dev_attr.attr,
2027         &sensor_dev_attr_in1_min.dev_attr.attr,
2028         &sensor_dev_attr_in1_max.dev_attr.attr,
2029         &sensor_dev_attr_in1_alarm.dev_attr.attr,
2030         &sensor_dev_attr_in1_beep.dev_attr.attr,        /* 9 */
2031
2032         &sensor_dev_attr_in2_input.dev_attr.attr,
2033         &sensor_dev_attr_in2_min.dev_attr.attr,
2034         &sensor_dev_attr_in2_max.dev_attr.attr,
2035         &sensor_dev_attr_in2_alarm.dev_attr.attr,
2036         &sensor_dev_attr_in2_beep.dev_attr.attr,        /* 14 */
2037
2038         &sensor_dev_attr_in3_input.dev_attr.attr,
2039         &sensor_dev_attr_in3_min.dev_attr.attr,
2040         &sensor_dev_attr_in3_max.dev_attr.attr,
2041         &sensor_dev_attr_in3_alarm.dev_attr.attr,
2042         &sensor_dev_attr_in3_beep.dev_attr.attr,        /* 19 */
2043
2044         &sensor_dev_attr_in4_input.dev_attr.attr,
2045         &sensor_dev_attr_in4_min.dev_attr.attr,
2046         &sensor_dev_attr_in4_max.dev_attr.attr,
2047         &sensor_dev_attr_in4_alarm.dev_attr.attr,
2048         &sensor_dev_attr_in4_beep.dev_attr.attr,        /* 24 */
2049
2050         &sensor_dev_attr_in5_input.dev_attr.attr,
2051         &sensor_dev_attr_in5_min.dev_attr.attr,
2052         &sensor_dev_attr_in5_max.dev_attr.attr,
2053         &sensor_dev_attr_in5_alarm.dev_attr.attr,
2054         &sensor_dev_attr_in5_beep.dev_attr.attr,        /* 29 */
2055
2056         &sensor_dev_attr_in6_input.dev_attr.attr,
2057         &sensor_dev_attr_in6_min.dev_attr.attr,
2058         &sensor_dev_attr_in6_max.dev_attr.attr,
2059         &sensor_dev_attr_in6_alarm.dev_attr.attr,
2060         &sensor_dev_attr_in6_beep.dev_attr.attr,        /* 34 */
2061
2062         &sensor_dev_attr_in7_input.dev_attr.attr,
2063         &sensor_dev_attr_in7_min.dev_attr.attr,
2064         &sensor_dev_attr_in7_max.dev_attr.attr,
2065         &sensor_dev_attr_in7_alarm.dev_attr.attr,
2066         &sensor_dev_attr_in7_beep.dev_attr.attr,        /* 39 */
2067
2068         &sensor_dev_attr_in8_input.dev_attr.attr,       /* 40 */
2069         &sensor_dev_attr_in9_input.dev_attr.attr,       /* 41 */
2070         &sensor_dev_attr_in10_input.dev_attr.attr,      /* 41 */
2071         &sensor_dev_attr_in11_input.dev_attr.attr,      /* 41 */
2072         &sensor_dev_attr_in12_input.dev_attr.attr,      /* 41 */
2073         NULL
2074 };
2075
2076 static const struct attribute_group it87_group_in = {
2077         .attrs = it87_attributes_in,
2078         .is_visible = it87_in_is_visible,
2079 };
2080
2081 static umode_t it87_temp_is_visible(struct kobject *kobj,
2082                                     struct attribute *attr, int index)
2083 {
2084         struct device *dev = container_of(kobj, struct device, kobj);
2085         struct it87_data *data = dev_get_drvdata(dev);
2086         int i = index / 7;      /* temperature index */
2087         int a = index % 7;      /* attribute index */
2088
2089         if (index >= 21) {
2090                 i = index - 21 + 3;
2091                 a = 0;
2092         }
2093
2094         if (!(data->has_temp & BIT(i)))
2095                 return 0;
2096
2097         if (a == 5 && !has_temp_offset(data))
2098                 return 0;
2099
2100         if (a == 6 && !data->has_beep)
2101                 return 0;
2102
2103         return attr->mode;
2104 }
2105
2106 static struct attribute *it87_attributes_temp[] = {
2107         &sensor_dev_attr_temp1_input.dev_attr.attr,
2108         &sensor_dev_attr_temp1_max.dev_attr.attr,
2109         &sensor_dev_attr_temp1_min.dev_attr.attr,
2110         &sensor_dev_attr_temp1_type.dev_attr.attr,
2111         &sensor_dev_attr_temp1_alarm.dev_attr.attr,
2112         &sensor_dev_attr_temp1_offset.dev_attr.attr,    /* 5 */
2113         &sensor_dev_attr_temp1_beep.dev_attr.attr,      /* 6 */
2114
2115         &sensor_dev_attr_temp2_input.dev_attr.attr,     /* 7 */
2116         &sensor_dev_attr_temp2_max.dev_attr.attr,
2117         &sensor_dev_attr_temp2_min.dev_attr.attr,
2118         &sensor_dev_attr_temp2_type.dev_attr.attr,
2119         &sensor_dev_attr_temp2_alarm.dev_attr.attr,
2120         &sensor_dev_attr_temp2_offset.dev_attr.attr,
2121         &sensor_dev_attr_temp2_beep.dev_attr.attr,
2122
2123         &sensor_dev_attr_temp3_input.dev_attr.attr,     /* 14 */
2124         &sensor_dev_attr_temp3_max.dev_attr.attr,
2125         &sensor_dev_attr_temp3_min.dev_attr.attr,
2126         &sensor_dev_attr_temp3_type.dev_attr.attr,
2127         &sensor_dev_attr_temp3_alarm.dev_attr.attr,
2128         &sensor_dev_attr_temp3_offset.dev_attr.attr,
2129         &sensor_dev_attr_temp3_beep.dev_attr.attr,
2130
2131         &sensor_dev_attr_temp4_input.dev_attr.attr,     /* 21 */
2132         &sensor_dev_attr_temp5_input.dev_attr.attr,
2133         &sensor_dev_attr_temp6_input.dev_attr.attr,
2134         NULL
2135 };
2136
2137 static const struct attribute_group it87_group_temp = {
2138         .attrs = it87_attributes_temp,
2139         .is_visible = it87_temp_is_visible,
2140 };
2141
2142 static umode_t it87_is_visible(struct kobject *kobj,
2143                                struct attribute *attr, int index)
2144 {
2145         struct device *dev = container_of(kobj, struct device, kobj);
2146         struct it87_data *data = dev_get_drvdata(dev);
2147
2148         if ((index == 2 || index == 3) && !data->has_vid)
2149                 return 0;
2150
2151         if (index > 3 && !(data->in_internal & BIT(index - 4)))
2152                 return 0;
2153
2154         return attr->mode;
2155 }
2156
2157 static struct attribute *it87_attributes[] = {
2158         &dev_attr_alarms.attr,
2159         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
2160         &dev_attr_vrm.attr,                             /* 2 */
2161         &dev_attr_cpu0_vid.attr,                        /* 3 */
2162         &sensor_dev_attr_in3_label.dev_attr.attr,       /* 4 .. 7 */
2163         &sensor_dev_attr_in7_label.dev_attr.attr,
2164         &sensor_dev_attr_in8_label.dev_attr.attr,
2165         &sensor_dev_attr_in9_label.dev_attr.attr,
2166         NULL
2167 };
2168
2169 static const struct attribute_group it87_group = {
2170         .attrs = it87_attributes,
2171         .is_visible = it87_is_visible,
2172 };
2173
2174 static umode_t it87_fan_is_visible(struct kobject *kobj,
2175                                    struct attribute *attr, int index)
2176 {
2177         struct device *dev = container_of(kobj, struct device, kobj);
2178         struct it87_data *data = dev_get_drvdata(dev);
2179         int i = index / 5;      /* fan index */
2180         int a = index % 5;      /* attribute index */
2181
2182         if (index >= 15) {      /* fan 4..6 don't have divisor attributes */
2183                 i = (index - 15) / 4 + 3;
2184                 a = (index - 15) % 4;
2185         }
2186
2187         if (!(data->has_fan & BIT(i)))
2188                 return 0;
2189
2190         if (a == 3) {                           /* beep */
2191                 if (!data->has_beep)
2192                         return 0;
2193                 /* first fan beep attribute is writable */
2194                 if (i == __ffs(data->has_fan))
2195                         return attr->mode | S_IWUSR;
2196         }
2197
2198         if (a == 4 && has_16bit_fans(data))     /* divisor */
2199                 return 0;
2200
2201         return attr->mode;
2202 }
2203
2204 static struct attribute *it87_attributes_fan[] = {
2205         &sensor_dev_attr_fan1_input.dev_attr.attr,
2206         &sensor_dev_attr_fan1_min.dev_attr.attr,
2207         &sensor_dev_attr_fan1_alarm.dev_attr.attr,
2208         &sensor_dev_attr_fan1_beep.dev_attr.attr,       /* 3 */
2209         &sensor_dev_attr_fan1_div.dev_attr.attr,        /* 4 */
2210
2211         &sensor_dev_attr_fan2_input.dev_attr.attr,
2212         &sensor_dev_attr_fan2_min.dev_attr.attr,
2213         &sensor_dev_attr_fan2_alarm.dev_attr.attr,
2214         &sensor_dev_attr_fan2_beep.dev_attr.attr,
2215         &sensor_dev_attr_fan2_div.dev_attr.attr,        /* 9 */
2216
2217         &sensor_dev_attr_fan3_input.dev_attr.attr,
2218         &sensor_dev_attr_fan3_min.dev_attr.attr,
2219         &sensor_dev_attr_fan3_alarm.dev_attr.attr,
2220         &sensor_dev_attr_fan3_beep.dev_attr.attr,
2221         &sensor_dev_attr_fan3_div.dev_attr.attr,        /* 14 */
2222
2223         &sensor_dev_attr_fan4_input.dev_attr.attr,      /* 15 */
2224         &sensor_dev_attr_fan4_min.dev_attr.attr,
2225         &sensor_dev_attr_fan4_alarm.dev_attr.attr,
2226         &sensor_dev_attr_fan4_beep.dev_attr.attr,
2227
2228         &sensor_dev_attr_fan5_input.dev_attr.attr,      /* 19 */
2229         &sensor_dev_attr_fan5_min.dev_attr.attr,
2230         &sensor_dev_attr_fan5_alarm.dev_attr.attr,
2231         &sensor_dev_attr_fan5_beep.dev_attr.attr,
2232
2233         &sensor_dev_attr_fan6_input.dev_attr.attr,      /* 23 */
2234         &sensor_dev_attr_fan6_min.dev_attr.attr,
2235         &sensor_dev_attr_fan6_alarm.dev_attr.attr,
2236         &sensor_dev_attr_fan6_beep.dev_attr.attr,
2237         NULL
2238 };
2239
2240 static const struct attribute_group it87_group_fan = {
2241         .attrs = it87_attributes_fan,
2242         .is_visible = it87_fan_is_visible,
2243 };
2244
2245 static umode_t it87_pwm_is_visible(struct kobject *kobj,
2246                                    struct attribute *attr, int index)
2247 {
2248         struct device *dev = container_of(kobj, struct device, kobj);
2249         struct it87_data *data = dev_get_drvdata(dev);
2250         int i = index / 4;      /* pwm index */
2251         int a = index % 4;      /* attribute index */
2252
2253         if (!(data->has_pwm & BIT(i)))
2254                 return 0;
2255
2256         /* pwmX_auto_channels_temp is only writable if auto pwm is supported */
2257         if (a == 3 && (has_old_autopwm(data) || has_newer_autopwm(data)))
2258                 return attr->mode | S_IWUSR;
2259
2260         /* pwm2_freq is writable if there are two pwm frequency selects */
2261         if (has_pwm_freq2(data) && i == 1 && a == 2)
2262                 return attr->mode | S_IWUSR;
2263
2264         return attr->mode;
2265 }
2266
2267 static struct attribute *it87_attributes_pwm[] = {
2268         &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2269         &sensor_dev_attr_pwm1.dev_attr.attr,
2270         &sensor_dev_attr_pwm1_freq.dev_attr.attr,
2271         &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
2272
2273         &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2274         &sensor_dev_attr_pwm2.dev_attr.attr,
2275         &sensor_dev_attr_pwm2_freq.dev_attr.attr,
2276         &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
2277
2278         &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2279         &sensor_dev_attr_pwm3.dev_attr.attr,
2280         &sensor_dev_attr_pwm3_freq.dev_attr.attr,
2281         &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
2282
2283         &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2284         &sensor_dev_attr_pwm4.dev_attr.attr,
2285         &sensor_dev_attr_pwm4_freq.dev_attr.attr,
2286         &sensor_dev_attr_pwm4_auto_channels_temp.dev_attr.attr,
2287
2288         &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2289         &sensor_dev_attr_pwm5.dev_attr.attr,
2290         &sensor_dev_attr_pwm5_freq.dev_attr.attr,
2291         &sensor_dev_attr_pwm5_auto_channels_temp.dev_attr.attr,
2292
2293         &sensor_dev_attr_pwm6_enable.dev_attr.attr,
2294         &sensor_dev_attr_pwm6.dev_attr.attr,
2295         &sensor_dev_attr_pwm6_freq.dev_attr.attr,
2296         &sensor_dev_attr_pwm6_auto_channels_temp.dev_attr.attr,
2297
2298         NULL
2299 };
2300
2301 static const struct attribute_group it87_group_pwm = {
2302         .attrs = it87_attributes_pwm,
2303         .is_visible = it87_pwm_is_visible,
2304 };
2305
2306 static umode_t it87_auto_pwm_is_visible(struct kobject *kobj,
2307                                         struct attribute *attr, int index)
2308 {
2309         struct device *dev = container_of(kobj, struct device, kobj);
2310         struct it87_data *data = dev_get_drvdata(dev);
2311         int i = index / 11;     /* pwm index */
2312         int a = index % 11;     /* attribute index */
2313
2314         if (index >= 33) {      /* pwm 4..6 */
2315                 i = (index - 33) / 6 + 3;
2316                 a = (index - 33) % 6 + 4;
2317         }
2318
2319         if (!(data->has_pwm & BIT(i)))
2320                 return 0;
2321
2322         if (has_newer_autopwm(data)) {
2323                 if (a < 4)      /* no auto point pwm */
2324                         return 0;
2325                 if (a == 8)     /* no auto_point4 */
2326                         return 0;
2327         }
2328         if (has_old_autopwm(data)) {
2329                 if (a >= 9)     /* no pwm_auto_start, pwm_auto_slope */
2330                         return 0;
2331         }
2332
2333         return attr->mode;
2334 }
2335
2336 static struct attribute *it87_attributes_auto_pwm[] = {
2337         &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
2338         &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
2339         &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
2340         &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
2341         &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
2342         &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
2343         &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
2344         &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
2345         &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
2346         &sensor_dev_attr_pwm1_auto_start.dev_attr.attr,
2347         &sensor_dev_attr_pwm1_auto_slope.dev_attr.attr,
2348
2349         &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,    /* 11 */
2350         &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
2351         &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
2352         &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
2353         &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
2354         &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
2355         &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
2356         &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
2357         &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
2358         &sensor_dev_attr_pwm2_auto_start.dev_attr.attr,
2359         &sensor_dev_attr_pwm2_auto_slope.dev_attr.attr,
2360
2361         &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,    /* 22 */
2362         &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
2363         &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
2364         &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
2365         &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
2366         &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
2367         &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
2368         &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
2369         &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
2370         &sensor_dev_attr_pwm3_auto_start.dev_attr.attr,
2371         &sensor_dev_attr_pwm3_auto_slope.dev_attr.attr,
2372
2373         &sensor_dev_attr_pwm4_auto_point1_temp.dev_attr.attr,   /* 33 */
2374         &sensor_dev_attr_pwm4_auto_point1_temp_hyst.dev_attr.attr,
2375         &sensor_dev_attr_pwm4_auto_point2_temp.dev_attr.attr,
2376         &sensor_dev_attr_pwm4_auto_point3_temp.dev_attr.attr,
2377         &sensor_dev_attr_pwm4_auto_start.dev_attr.attr,
2378         &sensor_dev_attr_pwm4_auto_slope.dev_attr.attr,
2379
2380         &sensor_dev_attr_pwm5_auto_point1_temp.dev_attr.attr,
2381         &sensor_dev_attr_pwm5_auto_point1_temp_hyst.dev_attr.attr,
2382         &sensor_dev_attr_pwm5_auto_point2_temp.dev_attr.attr,
2383         &sensor_dev_attr_pwm5_auto_point3_temp.dev_attr.attr,
2384         &sensor_dev_attr_pwm5_auto_start.dev_attr.attr,
2385         &sensor_dev_attr_pwm5_auto_slope.dev_attr.attr,
2386
2387         &sensor_dev_attr_pwm6_auto_point1_temp.dev_attr.attr,
2388         &sensor_dev_attr_pwm6_auto_point1_temp_hyst.dev_attr.attr,
2389         &sensor_dev_attr_pwm6_auto_point2_temp.dev_attr.attr,
2390         &sensor_dev_attr_pwm6_auto_point3_temp.dev_attr.attr,
2391         &sensor_dev_attr_pwm6_auto_start.dev_attr.attr,
2392         &sensor_dev_attr_pwm6_auto_slope.dev_attr.attr,
2393
2394         NULL,
2395 };
2396
2397 static const struct attribute_group it87_group_auto_pwm = {
2398         .attrs = it87_attributes_auto_pwm,
2399         .is_visible = it87_auto_pwm_is_visible,
2400 };
2401
2402 /* SuperIO detection - will change isa_address if a chip is found */
2403 static int __init it87_find(int sioaddr, unsigned short *address,
2404                             struct it87_sio_data *sio_data)
2405 {
2406         int err;
2407         u16 chip_type;
2408         const char *board_vendor, *board_name;
2409         const struct it87_devices *config;
2410
2411         err = superio_enter(sioaddr);
2412         if (err)
2413                 return err;
2414
2415         err = -ENODEV;
2416         chip_type = force_id ? force_id : superio_inw(sioaddr, DEVID);
2417
2418         switch (chip_type) {
2419         case IT8705F_DEVID:
2420                 sio_data->type = it87;
2421                 break;
2422         case IT8712F_DEVID:
2423                 sio_data->type = it8712;
2424                 break;
2425         case IT8716F_DEVID:
2426         case IT8726F_DEVID:
2427                 sio_data->type = it8716;
2428                 break;
2429         case IT8718F_DEVID:
2430                 sio_data->type = it8718;
2431                 break;
2432         case IT8720F_DEVID:
2433                 sio_data->type = it8720;
2434                 break;
2435         case IT8721F_DEVID:
2436                 sio_data->type = it8721;
2437                 break;
2438         case IT8728F_DEVID:
2439                 sio_data->type = it8728;
2440                 break;
2441         case IT8732F_DEVID:
2442                 sio_data->type = it8732;
2443                 break;
2444         case IT8792E_DEVID:
2445                 sio_data->type = it8792;
2446                 break;
2447         case IT8771E_DEVID:
2448                 sio_data->type = it8771;
2449                 break;
2450         case IT8772E_DEVID:
2451                 sio_data->type = it8772;
2452                 break;
2453         case IT8781F_DEVID:
2454                 sio_data->type = it8781;
2455                 break;
2456         case IT8782F_DEVID:
2457                 sio_data->type = it8782;
2458                 break;
2459         case IT8783E_DEVID:
2460                 sio_data->type = it8783;
2461                 break;
2462         case IT8786E_DEVID:
2463                 sio_data->type = it8786;
2464                 break;
2465         case IT8790E_DEVID:
2466                 sio_data->type = it8790;
2467                 break;
2468         case IT8603E_DEVID:
2469         case IT8623E_DEVID:
2470                 sio_data->type = it8603;
2471                 break;
2472         case IT8607E_DEVID:
2473                 sio_data->type = it8607;
2474                 break;
2475         case IT8620E_DEVID:
2476                 sio_data->type = it8620;
2477                 break;
2478         case IT8622E_DEVID:
2479                 sio_data->type = it8622;
2480                 break;
2481         case IT8628E_DEVID:
2482                 sio_data->type = it8628;
2483                 break;
2484         case 0xffff:    /* No device at all */
2485                 goto exit;
2486         default:
2487                 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
2488                 goto exit;
2489         }
2490
2491         superio_select(sioaddr, PME);
2492         if (!(superio_inb(sioaddr, IT87_ACT_REG) & 0x01)) {
2493                 pr_info("Device not activated, skipping\n");
2494                 goto exit;
2495         }
2496
2497         *address = superio_inw(sioaddr, IT87_BASE_REG) & ~(IT87_EXTENT - 1);
2498         if (*address == 0) {
2499                 pr_info("Base address not set, skipping\n");
2500                 goto exit;
2501         }
2502
2503         err = 0;
2504         sio_data->revision = superio_inb(sioaddr, DEVREV) & 0x0f;
2505         pr_info("Found IT%04x%s chip at 0x%x, revision %d\n", chip_type,
2506                 it87_devices[sio_data->type].suffix,
2507                 *address, sio_data->revision);
2508
2509         config = &it87_devices[sio_data->type];
2510
2511         /* in7 (VSB or VCCH5V) is always internal on some chips */
2512         if (has_in7_internal(config))
2513                 sio_data->internal |= BIT(1);
2514
2515         /* in8 (Vbat) is always internal */
2516         sio_data->internal |= BIT(2);
2517
2518         /* in9 (AVCC3), always internal if supported */
2519         if (has_avcc3(config))
2520                 sio_data->internal |= BIT(3); /* in9 is AVCC */
2521         else
2522                 sio_data->skip_in |= BIT(9);
2523
2524         if (!has_five_pwm(config))
2525                 sio_data->skip_pwm |= BIT(3) | BIT(4) | BIT(5);
2526         else if (!has_six_pwm(config))
2527                 sio_data->skip_pwm |= BIT(5);
2528
2529         if (!has_vid(config))
2530                 sio_data->skip_vid = 1;
2531
2532         /* Read GPIO config and VID value from LDN 7 (GPIO) */
2533         if (sio_data->type == it87) {
2534                 /* The IT8705F has a different LD number for GPIO */
2535                 superio_select(sioaddr, 5);
2536                 sio_data->beep_pin = superio_inb(sioaddr,
2537                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2538         } else if (sio_data->type == it8783) {
2539                 int reg25, reg27, reg2a, reg2c, regef;
2540
2541                 superio_select(sioaddr, GPIO);
2542
2543                 reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2544                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2545                 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
2546                 reg2c = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2547                 regef = superio_inb(sioaddr, IT87_SIO_SPI_REG);
2548
2549                 /* Check if fan3 is there or not */
2550                 if ((reg27 & BIT(0)) || !(reg2c & BIT(2)))
2551                         sio_data->skip_fan |= BIT(2);
2552                 if ((reg25 & BIT(4)) ||
2553                     (!(reg2a & BIT(1)) && (regef & BIT(0))))
2554                         sio_data->skip_pwm |= BIT(2);
2555
2556                 /* Check if fan2 is there or not */
2557                 if (reg27 & BIT(7))
2558                         sio_data->skip_fan |= BIT(1);
2559                 if (reg27 & BIT(3))
2560                         sio_data->skip_pwm |= BIT(1);
2561
2562                 /* VIN5 */
2563                 if ((reg27 & BIT(0)) || (reg2c & BIT(2)))
2564                         sio_data->skip_in |= BIT(5); /* No VIN5 */
2565
2566                 /* VIN6 */
2567                 if (reg27 & BIT(1))
2568                         sio_data->skip_in |= BIT(6); /* No VIN6 */
2569
2570                 /*
2571                  * VIN7
2572                  * Does not depend on bit 2 of Reg2C, contrary to datasheet.
2573                  */
2574                 if (reg27 & BIT(2)) {
2575                         /*
2576                          * The data sheet is a bit unclear regarding the
2577                          * internal voltage divider for VCCH5V. It says
2578                          * "This bit enables and switches VIN7 (pin 91) to the
2579                          * internal voltage divider for VCCH5V".
2580                          * This is different to other chips, where the internal
2581                          * voltage divider would connect VIN7 to an internal
2582                          * voltage source. Maybe that is the case here as well.
2583                          *
2584                          * Since we don't know for sure, re-route it if that is
2585                          * not the case, and ask the user to report if the
2586                          * resulting voltage is sane.
2587                          */
2588                         if (!(reg2c & BIT(1))) {
2589                                 reg2c |= BIT(1);
2590                                 superio_outb(sioaddr, IT87_SIO_PINX2_REG,
2591                                              reg2c);
2592                                 pr_notice("Routing internal VCCH5V to in7.\n");
2593                         }
2594                         pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
2595                         pr_notice("Please report if it displays a reasonable voltage.\n");
2596                 }
2597
2598                 if (reg2c & BIT(0))
2599                         sio_data->internal |= BIT(0);
2600                 if (reg2c & BIT(1))
2601                         sio_data->internal |= BIT(1);
2602
2603                 sio_data->beep_pin = superio_inb(sioaddr,
2604                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2605         } else if (sio_data->type == it8603 || sio_data->type == it8607) {
2606                 int reg27, reg29;
2607
2608                 superio_select(sioaddr, GPIO);
2609
2610                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2611
2612                 /* Check if fan3 is there or not */
2613                 if (reg27 & BIT(6))
2614                         sio_data->skip_pwm |= BIT(2);
2615                 if (reg27 & BIT(7))
2616                         sio_data->skip_fan |= BIT(2);
2617
2618                 /* Check if fan2 is there or not */
2619                 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2620                 if (reg29 & BIT(1))
2621                         sio_data->skip_pwm |= BIT(1);
2622                 if (reg29 & BIT(2))
2623                         sio_data->skip_fan |= BIT(1);
2624
2625                 if (sio_data->type == it8603) {
2626                         sio_data->skip_in |= BIT(5); /* No VIN5 */
2627                         sio_data->skip_in |= BIT(6); /* No VIN6 */
2628                 }
2629
2630                 sio_data->beep_pin = superio_inb(sioaddr,
2631                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2632         } else if (sio_data->type == it8620 || sio_data->type == it8628) {
2633                 int reg;
2634
2635                 superio_select(sioaddr, GPIO);
2636
2637                 /* Check for pwm5 */
2638                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2639                 if (reg & BIT(6))
2640                         sio_data->skip_pwm |= BIT(4);
2641
2642                 /* Check for fan4, fan5 */
2643                 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2644                 if (!(reg & BIT(5)))
2645                         sio_data->skip_fan |= BIT(3);
2646                 if (!(reg & BIT(4)))
2647                         sio_data->skip_fan |= BIT(4);
2648
2649                 /* Check for pwm3, fan3 */
2650                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2651                 if (reg & BIT(6))
2652                         sio_data->skip_pwm |= BIT(2);
2653                 if (reg & BIT(7))
2654                         sio_data->skip_fan |= BIT(2);
2655
2656                 /* Check for pwm4 */
2657                 reg = superio_inb(sioaddr, IT87_SIO_GPIO4_REG);
2658                 if (reg & BIT(2))
2659                         sio_data->skip_pwm |= BIT(3);
2660
2661                 /* Check for pwm2, fan2 */
2662                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2663                 if (reg & BIT(1))
2664                         sio_data->skip_pwm |= BIT(1);
2665                 if (reg & BIT(2))
2666                         sio_data->skip_fan |= BIT(1);
2667                 /* Check for pwm6, fan6 */
2668                 if (!(reg & BIT(7))) {
2669                         sio_data->skip_pwm |= BIT(5);
2670                         sio_data->skip_fan |= BIT(5);
2671                 }
2672
2673                 /* Check if AVCC is on VIN3 */
2674                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2675                 if (reg & BIT(0))
2676                         sio_data->internal |= BIT(0);
2677                 else
2678                         sio_data->skip_in |= BIT(9);
2679
2680                 sio_data->beep_pin = superio_inb(sioaddr,
2681                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2682         } else if (sio_data->type == it8622) {
2683                 int reg;
2684
2685                 superio_select(sioaddr, GPIO);
2686
2687                 /* Check for pwm4, fan4 */
2688                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2689                 if (reg & BIT(6))
2690                         sio_data->skip_fan |= BIT(3);
2691                 if (reg & BIT(5))
2692                         sio_data->skip_pwm |= BIT(3);
2693
2694                 /* Check for pwm3, fan3, pwm5, fan5 */
2695                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2696                 if (reg & BIT(6))
2697                         sio_data->skip_pwm |= BIT(2);
2698                 if (reg & BIT(7))
2699                         sio_data->skip_fan |= BIT(2);
2700                 if (reg & BIT(3))
2701                         sio_data->skip_pwm |= BIT(4);
2702                 if (reg & BIT(1))
2703                         sio_data->skip_fan |= BIT(4);
2704
2705                 /* Check for pwm2, fan2 */
2706                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2707                 if (reg & BIT(1))
2708                         sio_data->skip_pwm |= BIT(1);
2709                 if (reg & BIT(2))
2710                         sio_data->skip_fan |= BIT(1);
2711
2712                 /* Check for AVCC */
2713                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2714                 if (!(reg & BIT(0)))
2715                         sio_data->skip_in |= BIT(9);
2716
2717                 sio_data->beep_pin = superio_inb(sioaddr,
2718                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2719         } else {
2720                 int reg;
2721                 bool uart6;
2722
2723                 superio_select(sioaddr, GPIO);
2724
2725                 /* Check for fan4, fan5 */
2726                 if (has_five_fans(config)) {
2727                         reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2728                         switch (sio_data->type) {
2729                         case it8718:
2730                                 if (reg & BIT(5))
2731                                         sio_data->skip_fan |= BIT(3);
2732                                 if (reg & BIT(4))
2733                                         sio_data->skip_fan |= BIT(4);
2734                                 break;
2735                         case it8720:
2736                         case it8721:
2737                         case it8728:
2738                                 if (!(reg & BIT(5)))
2739                                         sio_data->skip_fan |= BIT(3);
2740                                 if (!(reg & BIT(4)))
2741                                         sio_data->skip_fan |= BIT(4);
2742                                 break;
2743                         default:
2744                                 break;
2745                         }
2746                 }
2747
2748                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2749                 if (!sio_data->skip_vid) {
2750                         /* We need at least 4 VID pins */
2751                         if (reg & 0x0f) {
2752                                 pr_info("VID is disabled (pins used for GPIO)\n");
2753                                 sio_data->skip_vid = 1;
2754                         }
2755                 }
2756
2757                 /* Check if fan3 is there or not */
2758                 if (reg & BIT(6))
2759                         sio_data->skip_pwm |= BIT(2);
2760                 if (reg & BIT(7))
2761                         sio_data->skip_fan |= BIT(2);
2762
2763                 /* Check if fan2 is there or not */
2764                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2765                 if (reg & BIT(1))
2766                         sio_data->skip_pwm |= BIT(1);
2767                 if (reg & BIT(2))
2768                         sio_data->skip_fan |= BIT(1);
2769
2770                 if ((sio_data->type == it8718 || sio_data->type == it8720) &&
2771                     !(sio_data->skip_vid))
2772                         sio_data->vid_value = superio_inb(sioaddr,
2773                                                           IT87_SIO_VID_REG);
2774
2775                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2776
2777                 uart6 = sio_data->type == it8782 && (reg & BIT(2));
2778
2779                 /*
2780                  * The IT8720F has no VIN7 pin, so VCCH should always be
2781                  * routed internally to VIN7 with an internal divider.
2782                  * Curiously, there still is a configuration bit to control
2783                  * this, which means it can be set incorrectly. And even
2784                  * more curiously, many boards out there are improperly
2785                  * configured, even though the IT8720F datasheet claims
2786                  * that the internal routing of VCCH to VIN7 is the default
2787                  * setting. So we force the internal routing in this case.
2788                  *
2789                  * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
2790                  * If UART6 is enabled, re-route VIN7 to the internal divider
2791                  * if that is not already the case.
2792                  */
2793                 if ((sio_data->type == it8720 || uart6) && !(reg & BIT(1))) {
2794                         reg |= BIT(1);
2795                         superio_outb(sioaddr, IT87_SIO_PINX2_REG, reg);
2796                         pr_notice("Routing internal VCCH to in7\n");
2797                 }
2798                 if (reg & BIT(0))
2799                         sio_data->internal |= BIT(0);
2800                 if (reg & BIT(1))
2801                         sio_data->internal |= BIT(1);
2802
2803                 /*
2804                  * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
2805                  * While VIN7 can be routed to the internal voltage divider,
2806                  * VIN5 and VIN6 are not available if UART6 is enabled.
2807                  *
2808                  * Also, temp3 is not available if UART6 is enabled and TEMPIN3
2809                  * is the temperature source. Since we can not read the
2810                  * temperature source here, skip_temp is preliminary.
2811                  */
2812                 if (uart6) {
2813                         sio_data->skip_in |= BIT(5) | BIT(6);
2814                         sio_data->skip_temp |= BIT(2);
2815                 }
2816
2817                 sio_data->beep_pin = superio_inb(sioaddr,
2818                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2819         }
2820         if (sio_data->beep_pin)
2821                 pr_info("Beeping is supported\n");
2822
2823         /* Disable specific features based on DMI strings */
2824         board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
2825         board_name = dmi_get_system_info(DMI_BOARD_NAME);
2826         if (board_vendor && board_name) {
2827                 if (strcmp(board_vendor, "nVIDIA") == 0 &&
2828                     strcmp(board_name, "FN68PT") == 0) {
2829                         /*
2830                          * On the Shuttle SN68PT, FAN_CTL2 is apparently not
2831                          * connected to a fan, but to something else. One user
2832                          * has reported instant system power-off when changing
2833                          * the PWM2 duty cycle, so we disable it.
2834                          * I use the board name string as the trigger in case
2835                          * the same board is ever used in other systems.
2836                          */
2837                         pr_info("Disabling pwm2 due to hardware constraints\n");
2838                         sio_data->skip_pwm = BIT(1);
2839                 }
2840         }
2841
2842 exit:
2843         superio_exit(sioaddr);
2844         return err;
2845 }
2846
2847 /* Called when we have found a new IT87. */
2848 static void it87_init_device(struct platform_device *pdev)
2849 {
2850         struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
2851         struct it87_data *data = platform_get_drvdata(pdev);
2852         int tmp, i;
2853         u8 mask;
2854
2855         /*
2856          * For each PWM channel:
2857          * - If it is in automatic mode, setting to manual mode should set
2858          *   the fan to full speed by default.
2859          * - If it is in manual mode, we need a mapping to temperature
2860          *   channels to use when later setting to automatic mode later.
2861          *   Use a 1:1 mapping by default (we are clueless.)
2862          * In both cases, the value can (and should) be changed by the user
2863          * prior to switching to a different mode.
2864          * Note that this is no longer needed for the IT8721F and later, as
2865          * these have separate registers for the temperature mapping and the
2866          * manual duty cycle.
2867          */
2868         for (i = 0; i < NUM_AUTO_PWM; i++) {
2869                 data->pwm_temp_map[i] = i;
2870                 data->pwm_duty[i] = 0x7f;       /* Full speed */
2871                 data->auto_pwm[i][3] = 0x7f;    /* Full speed, hard-coded */
2872         }
2873
2874         /*
2875          * Some chips seem to have default value 0xff for all limit
2876          * registers. For low voltage limits it makes no sense and triggers
2877          * alarms, so change to 0 instead. For high temperature limits, it
2878          * means -1 degree C, which surprisingly doesn't trigger an alarm,
2879          * but is still confusing, so change to 127 degrees C.
2880          */
2881         for (i = 0; i < NUM_VIN_LIMIT; i++) {
2882                 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
2883                 if (tmp == 0xff)
2884                         it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
2885         }
2886         for (i = 0; i < NUM_TEMP_LIMIT; i++) {
2887                 tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
2888                 if (tmp == 0xff)
2889                         it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
2890         }
2891
2892         /*
2893          * Temperature channels are not forcibly enabled, as they can be
2894          * set to two different sensor types and we can't guess which one
2895          * is correct for a given system. These channels can be enabled at
2896          * run-time through the temp{1-3}_type sysfs accessors if needed.
2897          */
2898
2899         /* Check if voltage monitors are reset manually or by some reason */
2900         tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
2901         if ((tmp & 0xff) == 0) {
2902                 /* Enable all voltage monitors */
2903                 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
2904         }
2905
2906         /* Check if tachometers are reset manually or by some reason */
2907         mask = 0x70 & ~(sio_data->skip_fan << 4);
2908         data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
2909         if ((data->fan_main_ctrl & mask) == 0) {
2910                 /* Enable all fan tachometers */
2911                 data->fan_main_ctrl |= mask;
2912                 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
2913                                  data->fan_main_ctrl);
2914         }
2915         data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
2916
2917         tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
2918
2919         /* Set tachometers to 16-bit mode if needed */
2920         if (has_fan16_config(data)) {
2921                 if (~tmp & 0x07 & data->has_fan) {
2922                         dev_dbg(&pdev->dev,
2923                                 "Setting fan1-3 to 16-bit mode\n");
2924                         it87_write_value(data, IT87_REG_FAN_16BIT,
2925                                          tmp | 0x07);
2926                 }
2927         }
2928
2929         /* Check for additional fans */
2930         if (has_five_fans(data)) {
2931                 if (tmp & BIT(4))
2932                         data->has_fan |= BIT(3); /* fan4 enabled */
2933                 if (tmp & BIT(5))
2934                         data->has_fan |= BIT(4); /* fan5 enabled */
2935                 if (has_six_fans(data) && (tmp & BIT(2)))
2936                         data->has_fan |= BIT(5); /* fan6 enabled */
2937         }
2938
2939         /* Fan input pins may be used for alternative functions */
2940         data->has_fan &= ~sio_data->skip_fan;
2941
2942         /* Check if pwm5, pwm6 are enabled */
2943         if (has_six_pwm(data)) {
2944                 /* The following code may be IT8620E specific */
2945                 tmp = it87_read_value(data, IT87_REG_FAN_DIV);
2946                 if ((tmp & 0xc0) == 0xc0)
2947                         sio_data->skip_pwm |= BIT(4);
2948                 if (!(tmp & BIT(3)))
2949                         sio_data->skip_pwm |= BIT(5);
2950         }
2951
2952         /* Start monitoring */
2953         it87_write_value(data, IT87_REG_CONFIG,
2954                          (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
2955                          | (update_vbat ? 0x41 : 0x01));
2956 }
2957
2958 /* Return 1 if and only if the PWM interface is safe to use */
2959 static int it87_check_pwm(struct device *dev)
2960 {
2961         struct it87_data *data = dev_get_drvdata(dev);
2962         /*
2963          * Some BIOSes fail to correctly configure the IT87 fans. All fans off
2964          * and polarity set to active low is sign that this is the case so we
2965          * disable pwm control to protect the user.
2966          */
2967         int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
2968
2969         if ((tmp & 0x87) == 0) {
2970                 if (fix_pwm_polarity) {
2971                         /*
2972                          * The user asks us to attempt a chip reconfiguration.
2973                          * This means switching to active high polarity and
2974                          * inverting all fan speed values.
2975                          */
2976                         int i;
2977                         u8 pwm[3];
2978
2979                         for (i = 0; i < ARRAY_SIZE(pwm); i++)
2980                                 pwm[i] = it87_read_value(data,
2981                                                          IT87_REG_PWM[i]);
2982
2983                         /*
2984                          * If any fan is in automatic pwm mode, the polarity
2985                          * might be correct, as suspicious as it seems, so we
2986                          * better don't change anything (but still disable the
2987                          * PWM interface).
2988                          */
2989                         if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
2990                                 dev_info(dev,
2991                                          "Reconfiguring PWM to active high polarity\n");
2992                                 it87_write_value(data, IT87_REG_FAN_CTL,
2993                                                  tmp | 0x87);
2994                                 for (i = 0; i < 3; i++)
2995                                         it87_write_value(data,
2996                                                          IT87_REG_PWM[i],
2997                                                          0x7f & ~pwm[i]);
2998                                 return 1;
2999                         }
3000
3001                         dev_info(dev,
3002                                  "PWM configuration is too broken to be fixed\n");
3003                 }
3004
3005                 dev_info(dev,
3006                          "Detected broken BIOS defaults, disabling PWM interface\n");
3007                 return 0;
3008         } else if (fix_pwm_polarity) {
3009                 dev_info(dev,
3010                          "PWM configuration looks sane, won't touch\n");
3011         }
3012
3013         return 1;
3014 }
3015
3016 static int it87_probe(struct platform_device *pdev)
3017 {
3018         struct it87_data *data;
3019         struct resource *res;
3020         struct device *dev = &pdev->dev;
3021         struct it87_sio_data *sio_data = dev_get_platdata(dev);
3022         int enable_pwm_interface;
3023         struct device *hwmon_dev;
3024
3025         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3026         if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
3027                                  DRVNAME)) {
3028                 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
3029                         (unsigned long)res->start,
3030                         (unsigned long)(res->start + IT87_EC_EXTENT - 1));
3031                 return -EBUSY;
3032         }
3033
3034         data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
3035         if (!data)
3036                 return -ENOMEM;
3037
3038         data->addr = res->start;
3039         data->type = sio_data->type;
3040         data->features = it87_devices[sio_data->type].features;
3041         data->peci_mask = it87_devices[sio_data->type].peci_mask;
3042         data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
3043         /*
3044          * IT8705F Datasheet 0.4.1, 3h == Version G.
3045          * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
3046          * These are the first revisions with 16-bit tachometer support.
3047          */
3048         switch (data->type) {
3049         case it87:
3050                 if (sio_data->revision >= 0x03) {
3051                         data->features &= ~FEAT_OLD_AUTOPWM;
3052                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS;
3053                 }
3054                 break;
3055         case it8712:
3056                 if (sio_data->revision >= 0x08) {
3057                         data->features &= ~FEAT_OLD_AUTOPWM;
3058                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS |
3059                                           FEAT_FIVE_FANS;
3060                 }
3061                 break;
3062         default:
3063                 break;
3064         }
3065
3066         /* Now, we do the remaining detection. */
3067         if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80) ||
3068             it87_read_value(data, IT87_REG_CHIPID) != 0x90)
3069                 return -ENODEV;
3070
3071         platform_set_drvdata(pdev, data);
3072
3073         mutex_init(&data->update_lock);
3074
3075         /* Check PWM configuration */
3076         enable_pwm_interface = it87_check_pwm(dev);
3077
3078         /* Starting with IT8721F, we handle scaling of internal voltages */
3079         if (has_12mv_adc(data)) {
3080                 if (sio_data->internal & BIT(0))
3081                         data->in_scaled |= BIT(3);      /* in3 is AVCC */
3082                 if (sio_data->internal & BIT(1))
3083                         data->in_scaled |= BIT(7);      /* in7 is VSB */
3084                 if (sio_data->internal & BIT(2))
3085                         data->in_scaled |= BIT(8);      /* in8 is Vbat */
3086                 if (sio_data->internal & BIT(3))
3087                         data->in_scaled |= BIT(9);      /* in9 is AVCC */
3088         } else if (sio_data->type == it8781 || sio_data->type == it8782 ||
3089                    sio_data->type == it8783) {
3090                 if (sio_data->internal & BIT(0))
3091                         data->in_scaled |= BIT(3);      /* in3 is VCC5V */
3092                 if (sio_data->internal & BIT(1))
3093                         data->in_scaled |= BIT(7);      /* in7 is VCCH5V */
3094         }
3095
3096         data->has_temp = 0x07;
3097         if (sio_data->skip_temp & BIT(2)) {
3098                 if (sio_data->type == it8782 &&
3099                     !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
3100                         data->has_temp &= ~BIT(2);
3101         }
3102
3103         data->in_internal = sio_data->internal;
3104         data->has_in = 0x3ff & ~sio_data->skip_in;
3105
3106         if (has_six_temp(data)) {
3107                 u8 reg = it87_read_value(data, IT87_REG_TEMP456_ENABLE);
3108
3109                 /* Check for additional temperature sensors */
3110                 if ((reg & 0x03) >= 0x02)
3111                         data->has_temp |= BIT(3);
3112                 if (((reg >> 2) & 0x03) >= 0x02)
3113                         data->has_temp |= BIT(4);
3114                 if (((reg >> 4) & 0x03) >= 0x02)
3115                         data->has_temp |= BIT(5);
3116
3117                 /* Check for additional voltage sensors */
3118                 if ((reg & 0x03) == 0x01)
3119                         data->has_in |= BIT(10);
3120                 if (((reg >> 2) & 0x03) == 0x01)
3121                         data->has_in |= BIT(11);
3122                 if (((reg >> 4) & 0x03) == 0x01)
3123                         data->has_in |= BIT(12);
3124         }
3125
3126         data->has_beep = !!sio_data->beep_pin;
3127
3128         /* Initialize the IT87 chip */
3129         it87_init_device(pdev);
3130
3131         if (!sio_data->skip_vid) {
3132                 data->has_vid = true;
3133                 data->vrm = vid_which_vrm();
3134                 /* VID reading from Super-I/O config space if available */
3135                 data->vid = sio_data->vid_value;
3136         }
3137
3138         /* Prepare for sysfs hooks */
3139         data->groups[0] = &it87_group;
3140         data->groups[1] = &it87_group_in;
3141         data->groups[2] = &it87_group_temp;
3142         data->groups[3] = &it87_group_fan;
3143
3144         if (enable_pwm_interface) {
3145                 data->has_pwm = BIT(ARRAY_SIZE(IT87_REG_PWM)) - 1;
3146                 data->has_pwm &= ~sio_data->skip_pwm;
3147
3148                 data->groups[4] = &it87_group_pwm;
3149                 if (has_old_autopwm(data) || has_newer_autopwm(data))
3150                         data->groups[5] = &it87_group_auto_pwm;
3151         }
3152
3153         hwmon_dev = devm_hwmon_device_register_with_groups(dev,
3154                                         it87_devices[sio_data->type].name,
3155                                         data, data->groups);
3156         return PTR_ERR_OR_ZERO(hwmon_dev);
3157 }
3158
3159 static struct platform_driver it87_driver = {
3160         .driver = {
3161                 .name   = DRVNAME,
3162         },
3163         .probe  = it87_probe,
3164 };
3165
3166 static int __init it87_device_add(int index, unsigned short address,
3167                                   const struct it87_sio_data *sio_data)
3168 {
3169         struct platform_device *pdev;
3170         struct resource res = {
3171                 .start  = address + IT87_EC_OFFSET,
3172                 .end    = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
3173                 .name   = DRVNAME,
3174                 .flags  = IORESOURCE_IO,
3175         };
3176         int err;
3177
3178         err = acpi_check_resource_conflict(&res);
3179         if (err)
3180                 return err;
3181
3182         pdev = platform_device_alloc(DRVNAME, address);
3183         if (!pdev)
3184                 return -ENOMEM;
3185
3186         err = platform_device_add_resources(pdev, &res, 1);
3187         if (err) {
3188                 pr_err("Device resource addition failed (%d)\n", err);
3189                 goto exit_device_put;
3190         }
3191
3192         err = platform_device_add_data(pdev, sio_data,
3193                                        sizeof(struct it87_sio_data));
3194         if (err) {
3195                 pr_err("Platform data allocation failed\n");
3196                 goto exit_device_put;
3197         }
3198
3199         err = platform_device_add(pdev);
3200         if (err) {
3201                 pr_err("Device addition failed (%d)\n", err);
3202                 goto exit_device_put;
3203         }
3204
3205         it87_pdev[index] = pdev;
3206         return 0;
3207
3208 exit_device_put:
3209         platform_device_put(pdev);
3210         return err;
3211 }
3212
3213 static int __init sm_it87_init(void)
3214 {
3215         int sioaddr[2] = { REG_2E, REG_4E };
3216         struct it87_sio_data sio_data;
3217         unsigned short isa_address;
3218         bool found = false;
3219         int i, err;
3220
3221         err = platform_driver_register(&it87_driver);
3222         if (err)
3223                 return err;
3224
3225         for (i = 0; i < ARRAY_SIZE(sioaddr); i++) {
3226                 memset(&sio_data, 0, sizeof(struct it87_sio_data));
3227                 isa_address = 0;
3228                 err = it87_find(sioaddr[i], &isa_address, &sio_data);
3229                 if (err || isa_address == 0)
3230                         continue;
3231
3232                 err = it87_device_add(i, isa_address, &sio_data);
3233                 if (err)
3234                         goto exit_dev_unregister;
3235                 found = true;
3236         }
3237
3238         if (!found) {
3239                 err = -ENODEV;
3240                 goto exit_unregister;
3241         }
3242         return 0;
3243
3244 exit_dev_unregister:
3245         /* NULL check handled by platform_device_unregister */
3246         platform_device_unregister(it87_pdev[0]);
3247 exit_unregister:
3248         platform_driver_unregister(&it87_driver);
3249         return err;
3250 }
3251
3252 static void __exit sm_it87_exit(void)
3253 {
3254         /* NULL check handled by platform_device_unregister */
3255         platform_device_unregister(it87_pdev[1]);
3256         platform_device_unregister(it87_pdev[0]);
3257         platform_driver_unregister(&it87_driver);
3258 }
3259
3260 MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>");
3261 MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
3262 module_param(update_vbat, bool, 0);
3263 MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
3264 module_param(fix_pwm_polarity, bool, 0);
3265 MODULE_PARM_DESC(fix_pwm_polarity,
3266                  "Force PWM polarity to active high (DANGEROUS)");
3267 MODULE_LICENSE("GPL");
3268
3269 module_init(sm_it87_init);
3270 module_exit(sm_it87_exit);