git.sur5r.net Git - groeck-it87/blob - it87.c

   1 /*
   2  *  it87.c - Part of lm_sensors, Linux kernel modules for hardware
   3  *           monitoring.
   4  *
   5  *  The IT8705F is an LPC-based Super I/O part that contains UARTs, a
   6  *  parallel port, an IR port, a MIDI port, a floppy controller, etc., in
   7  *  addition to an Environment Controller (Enhanced Hardware Monitor and
   8  *  Fan Controller)
   9  *
  10  *  This driver supports only the Environment Controller in the IT8705F and
  11  *  similar parts.  The other devices are supported by different drivers.
  12  *
  13  *  Supports: IT8603E  Super I/O chip w/LPC interface
  14  *            IT8607E  Super I/O chip w/LPC interface
  15  *            IT8620E  Super I/O chip w/LPC interface
  16  *            IT8622E  Super I/O chip w/LPC interface
  17  *            IT8623E  Super I/O chip w/LPC interface
  18  *            IT8628E  Super I/O chip w/LPC interface
  19  *            IT8705F  Super I/O chip w/LPC interface
  20  *            IT8712F  Super I/O chip w/LPC interface
  21  *            IT8716F  Super I/O chip w/LPC interface
  22  *            IT8718F  Super I/O chip w/LPC interface
  23  *            IT8720F  Super I/O chip w/LPC interface
  24  *            IT8721F  Super I/O chip w/LPC interface
  25  *            IT8726F  Super I/O chip w/LPC interface
  26  *            IT8728F  Super I/O chip w/LPC interface
  27  *            IT8732F  Super I/O chip w/LPC interface
  28  *            IT8758E  Super I/O chip w/LPC interface
  29  *            IT8771E  Super I/O chip w/LPC interface
  30  *            IT8772E  Super I/O chip w/LPC interface
  31  *            IT8781F  Super I/O chip w/LPC interface
  32  *            IT8782F  Super I/O chip w/LPC interface
  33  *            IT8783E/F Super I/O chip w/LPC interface
  34  *            IT8786E  Super I/O chip w/LPC interface
  35  *            IT8790E  Super I/O chip w/LPC interface
  36  *            IT8792E  Super I/O chip w/LPC interface
  37  *            Sis950   A clone of the IT8705F
  38  *
  39  *  Copyright (C) 2001 Chris Gauthron
  40  *  Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de>
  41  *
  42  *  This program is free software; you can redistribute it and/or modify
  43  *  it under the terms of the GNU General Public License as published by
  44  *  the Free Software Foundation; either version 2 of the License, or
  45  *  (at your option) any later version.
  46  *
  47  *  This program is distributed in the hope that it will be useful,
  48  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  49  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  50  *  GNU General Public License for more details.
  51  */
  52
  53 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  54
  55 #include <linux/bitops.h>
  56 #include <linux/module.h>
  57 #include <linux/init.h>
  58 #include <linux/slab.h>
  59 #include <linux/jiffies.h>
  60 #include <linux/platform_device.h>
  61 #include <linux/hwmon.h>
  62 #include <linux/hwmon-sysfs.h>
  63 #include <linux/hwmon-vid.h>
  64 #include <linux/err.h>
  65 #include <linux/mutex.h>
  66 #include <linux/sysfs.h>
  67 #include <linux/string.h>
  68 #include <linux/dmi.h>
  69 #include <linux/acpi.h>
  70 #include <linux/io.h>
  71 #include "compat.h"
  72
  73 #define DRVNAME "it87"
  74
  75 enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732,
  76              it8771, it8772, it8781, it8782, it8783, it8786, it8790,
  77              it8792, it8603, it8607, it8620, it8622, it8628 };
  78
  79 static unsigned short force_id;
  80 module_param(force_id, ushort, 0);
  81 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  82
  83 static struct platform_device *it87_pdev[2];
  84
  85 #define REG_2E  0x2e    /* The register to read/write */
  86 #define REG_4E  0x4e    /* Secondary register to read/write */
  87
  88 #define DEV     0x07    /* Register: Logical device select */
  89 #define PME     0x04    /* The device with the fan registers in it */
  90
  91 /* The device with the IT8718F/IT8720F VID value in it */
  92 #define GPIO    0x07
  93
  94 #define DEVID   0x20    /* Register: Device ID */
  95 #define DEVREV  0x22    /* Register: Device Revision */
  96
  97 static inline int superio_inb(int ioreg, int reg)
  98 {
  99         outb(reg, ioreg);
 100         return inb(ioreg + 1);
 101 }
 102
 103 static inline void superio_outb(int ioreg, int reg, int val)
 104 {
 105         outb(reg, ioreg);
 106         outb(val, ioreg + 1);
 107 }
 108
 109 static int superio_inw(int ioreg, int reg)
 110 {
 111         int val;
 112
 113         outb(reg++, ioreg);
 114         val = inb(ioreg + 1) << 8;
 115         outb(reg, ioreg);
 116         val |= inb(ioreg + 1);
 117         return val;
 118 }
 119
 120 static inline void superio_select(int ioreg, int ldn)
 121 {
 122         outb(DEV, ioreg);
 123         outb(ldn, ioreg + 1);
 124 }
 125
 126 static inline int superio_enter(int ioreg)
 127 {
 128         /*
 129          * Try to reserve ioreg and ioreg + 1 for exclusive access.
 130          */
 131         if (!request_muxed_region(ioreg, 2, DRVNAME))
 132                 return -EBUSY;
 133
 134         outb(0x87, ioreg);
 135         outb(0x01, ioreg);
 136         outb(0x55, ioreg);
 137         outb(ioreg == REG_4E ? 0xaa : 0x55, ioreg);
 138         return 0;
 139 }
 140
 141 static inline void superio_exit(int ioreg)
 142 {
 143         outb(0x02, ioreg);
 144         outb(0x02, ioreg + 1);
 145         release_region(ioreg, 2);
 146 }
 147
 148 /* Logical device 4 registers */
 149 #define IT8712F_DEVID 0x8712
 150 #define IT8705F_DEVID 0x8705
 151 #define IT8716F_DEVID 0x8716
 152 #define IT8718F_DEVID 0x8718
 153 #define IT8720F_DEVID 0x8720
 154 #define IT8721F_DEVID 0x8721
 155 #define IT8726F_DEVID 0x8726
 156 #define IT8728F_DEVID 0x8728
 157 #define IT8732F_DEVID 0x8732
 158 #define IT8792E_DEVID 0x8733
 159 #define IT8771E_DEVID 0x8771
 160 #define IT8772E_DEVID 0x8772
 161 #define IT8781F_DEVID 0x8781
 162 #define IT8782F_DEVID 0x8782
 163 #define IT8783E_DEVID 0x8783
 164 #define IT8786E_DEVID 0x8786
 165 #define IT8790E_DEVID 0x8790
 166 #define IT8603E_DEVID 0x8603
 167 #define IT8607E_DEVID 0x8607
 168 #define IT8620E_DEVID 0x8620
 169 #define IT8622E_DEVID 0x8622
 170 #define IT8623E_DEVID 0x8623
 171 #define IT8628E_DEVID 0x8628
 172 #define IT87_ACT_REG  0x30
 173 #define IT87_BASE_REG 0x60
 174
 175 /* Logical device 7 registers (IT8712F and later) */
 176 #define IT87_SIO_GPIO1_REG      0x25
 177 #define IT87_SIO_GPIO2_REG      0x26
 178 #define IT87_SIO_GPIO3_REG      0x27
 179 #define IT87_SIO_GPIO4_REG      0x28
 180 #define IT87_SIO_GPIO5_REG      0x29
 181 #define IT87_SIO_PINX1_REG      0x2a    /* Pin selection */
 182 #define IT87_SIO_PINX2_REG      0x2c    /* Pin selection */
 183 #define IT87_SIO_SPI_REG        0xef    /* SPI function pin select */
 184 #define IT87_SIO_VID_REG        0xfc    /* VID value */
 185 #define IT87_SIO_BEEP_PIN_REG   0xf6    /* Beep pin mapping */
 186
 187 /* Update battery voltage after every reading if true */
 188 static bool update_vbat;
 189
 190 /* Not all BIOSes properly configure the PWM registers */
 191 static bool fix_pwm_polarity;
 192
 193 /* Many IT87 constants specified below */
 194
 195 /* Length of ISA address segment */
 196 #define IT87_EXTENT 8
 197
 198 /* Length of ISA address segment for Environmental Controller */
 199 #define IT87_EC_EXTENT 2
 200
 201 /* Offset of EC registers from ISA base address */
 202 #define IT87_EC_OFFSET 5
 203
 204 /* Where are the ISA address/data registers relative to the EC base address */
 205 #define IT87_ADDR_REG_OFFSET 0
 206 #define IT87_DATA_REG_OFFSET 1
 207
 208 /*----- The IT87 registers -----*/
 209
 210 #define IT87_REG_CONFIG        0x00
 211
 212 #define IT87_REG_ALARM1        0x01
 213 #define IT87_REG_ALARM2        0x02
 214 #define IT87_REG_ALARM3        0x03
 215
 216 /*
 217  * The IT8718F and IT8720F have the VID value in a different register, in
 218  * Super-I/O configuration space.
 219  */
 220 #define IT87_REG_VID           0x0a
 221 /*
 222  * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
 223  * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
 224  * mode.
 225  */
 226 #define IT87_REG_FAN_DIV       0x0b
 227 #define IT87_REG_FAN_16BIT     0x0c
 228
 229 /*
 230  * Monitors:
 231  * - up to 13 voltage (0 to 7, battery, avcc, 10 to 12)
 232  * - up to 6 temp (1 to 6)
 233  * - up to 6 fan (1 to 6)
 234  */
 235
 236 static const u8 IT87_REG_FAN[]         = { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c };
 237 static const u8 IT87_REG_FAN_MIN[]     = { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e };
 238 static const u8 IT87_REG_FANX[]        = { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d };
 239 static const u8 IT87_REG_FANX_MIN[]    = { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f };
 240 static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59 };
 241
 242 #define IT87_REG_FAN_MAIN_CTRL 0x13
 243 #define IT87_REG_FAN_CTL       0x14
 244 static const u8 IT87_REG_PWM[]         = { 0x15, 0x16, 0x17, 0x7f, 0xa7, 0xaf };
 245 static const u8 IT87_REG_PWM_DUTY[]    = { 0x63, 0x6b, 0x73, 0x7b, 0xa3, 0xab };
 246
 247 static const u8 IT87_REG_VIN[]  = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26,
 248                                     0x27, 0x28, 0x2f, 0x2c, 0x2d, 0x2e };
 249
 250 #define IT87_REG_TEMP(nr)      (0x29 + (nr))
 251
 252 #define IT87_REG_VIN_MAX(nr)   (0x30 + (nr) * 2)
 253 #define IT87_REG_VIN_MIN(nr)   (0x31 + (nr) * 2)
 254 #define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
 255 #define IT87_REG_TEMP_LOW(nr)  (0x41 + (nr) * 2)
 256
 257 #define IT87_REG_VIN_ENABLE    0x50
 258 #define IT87_REG_TEMP_ENABLE   0x51
 259 #define IT87_REG_TEMP_EXTRA    0x55
 260 #define IT87_REG_BEEP_ENABLE   0x5c
 261
 262 #define IT87_REG_CHIPID        0x58
 263
 264 static const u8 IT87_REG_AUTO_BASE[] = { 0x60, 0x68, 0x70, 0x78, 0xa0, 0xa8 };
 265
 266 #define IT87_REG_AUTO_TEMP(nr, i) (IT87_REG_AUTO_BASE[nr] + (i))
 267 #define IT87_REG_AUTO_PWM(nr, i)  (IT87_REG_AUTO_BASE[nr] + 5 + (i))
 268
 269 #define IT87_REG_TEMP456_ENABLE 0x77
 270
 271 #define NUM_VIN                 ARRAY_SIZE(IT87_REG_VIN)
 272 #define NUM_VIN_LIMIT           8
 273 #define NUM_TEMP                6
 274 #define NUM_TEMP_OFFSET         ARRAY_SIZE(IT87_REG_TEMP_OFFSET)
 275 #define NUM_TEMP_LIMIT          3
 276 #define NUM_FAN                 ARRAY_SIZE(IT87_REG_FAN)
 277 #define NUM_FAN_DIV             3
 278 #define NUM_PWM                 ARRAY_SIZE(IT87_REG_PWM)
 279 #define NUM_AUTO_PWM            ARRAY_SIZE(IT87_REG_PWM)
 280
 281 struct it87_devices {
 282         const char *name;
 283         const char * const suffix;
 284         u32 features;
 285         u8 peci_mask;
 286         u8 old_peci_mask;
 287 };
 288
 289 #define FEAT_12MV_ADC           BIT(0)
 290 #define FEAT_NEWER_AUTOPWM      BIT(1)
 291 #define FEAT_OLD_AUTOPWM        BIT(2)
 292 #define FEAT_16BIT_FANS         BIT(3)
 293 #define FEAT_TEMP_OFFSET        BIT(4)
 294 #define FEAT_TEMP_PECI          BIT(5)
 295 #define FEAT_TEMP_OLD_PECI      BIT(6)
 296 #define FEAT_FAN16_CONFIG       BIT(7)  /* Need to enable 16-bit fans */
 297 #define FEAT_FIVE_FANS          BIT(8)  /* Supports five fans */
 298 #define FEAT_VID                BIT(9)  /* Set if chip supports VID */
 299 #define FEAT_IN7_INTERNAL       BIT(10) /* Set if in7 is internal */
 300 #define FEAT_SIX_FANS           BIT(11) /* Supports six fans */
 301 #define FEAT_10_9MV_ADC         BIT(12)
 302 #define FEAT_AVCC3              BIT(13) /* Chip supports in9/AVCC3 */
 303 #define FEAT_FIVE_PWM           BIT(14) /* Chip supports 5 pwm chn */
 304 #define FEAT_SIX_PWM            BIT(15) /* Chip supports 6 pwm chn */
 305 #define FEAT_PWM_FREQ2          BIT(16) /* Separate pwm freq 2 */
 306 #define FEAT_SIX_TEMP           BIT(17) /* Up to 6 temp sensors */
 307 #define FEAT_VIN3_5V            BIT(18) /* VIN3 connected to +5V */
 308 #define FEAT_FOUR_FANS          BIT(19) /* Supports four fans */
 309 #define FEAT_FOUR_PWM           BIT(20) /* Supports four fan controls */
 310
 311 static const struct it87_devices it87_devices[] = {
 312         [it87] = {
 313                 .name = "it87",
 314                 .suffix = "F",
 315                 .features = FEAT_OLD_AUTOPWM,   /* may need to overwrite */
 316         },
 317         [it8712] = {
 318                 .name = "it8712",
 319                 .suffix = "F",
 320                 .features = FEAT_OLD_AUTOPWM | FEAT_VID,
 321                                                 /* may need to overwrite */
 322         },
 323         [it8716] = {
 324                 .name = "it8716",
 325                 .suffix = "F",
 326                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 327                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2,
 328         },
 329         [it8718] = {
 330                 .name = "it8718",
 331                 .suffix = "F",
 332                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 333                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 334                   | FEAT_PWM_FREQ2,
 335                 .old_peci_mask = 0x4,
 336         },
 337         [it8720] = {
 338                 .name = "it8720",
 339                 .suffix = "F",
 340                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 341                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 342                   | FEAT_PWM_FREQ2,
 343                 .old_peci_mask = 0x4,
 344         },
 345         [it8721] = {
 346                 .name = "it8721",
 347                 .suffix = "F",
 348                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 349                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 350                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL
 351                   | FEAT_PWM_FREQ2,
 352                 .peci_mask = 0x05,
 353                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 354         },
 355         [it8728] = {
 356                 .name = "it8728",
 357                 .suffix = "F",
 358                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 359                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 360                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2,
 361                 .peci_mask = 0x07,
 362         },
 363         [it8732] = {
 364                 .name = "it8732",
 365                 .suffix = "F",
 366                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 367                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 368                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_FOUR_FANS
 369                   | FEAT_FOUR_PWM,
 370                 .peci_mask = 0x07,
 371                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 372         },
 373         [it8771] = {
 374                 .name = "it8771",
 375                 .suffix = "E",
 376                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 377                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 378                   | FEAT_PWM_FREQ2,
 379                                 /* PECI: guesswork */
 380                                 /* 12mV ADC (OHM) */
 381                                 /* 16 bit fans (OHM) */
 382                                 /* three fans, always 16 bit (guesswork) */
 383                 .peci_mask = 0x07,
 384         },
 385         [it8772] = {
 386                 .name = "it8772",
 387                 .suffix = "E",
 388                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 389                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 390                   | FEAT_PWM_FREQ2,
 391                                 /* PECI (coreboot) */
 392                                 /* 12mV ADC (HWSensors4, OHM) */
 393                                 /* 16 bit fans (HWSensors4, OHM) */
 394                                 /* three fans, always 16 bit (datasheet) */
 395                 .peci_mask = 0x07,
 396         },
 397         [it8781] = {
 398                 .name = "it8781",
 399                 .suffix = "F",
 400                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 401                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
 402                 .old_peci_mask = 0x4,
 403         },
 404         [it8782] = {
 405                 .name = "it8782",
 406                 .suffix = "F",
 407                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 408                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
 409                 .old_peci_mask = 0x4,
 410         },
 411         [it8783] = {
 412                 .name = "it8783",
 413                 .suffix = "E/F",
 414                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 415                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
 416                 .old_peci_mask = 0x4,
 417         },
 418         [it8786] = {
 419                 .name = "it8786",
 420                 .suffix = "E",
 421                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 422                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 423                   | FEAT_PWM_FREQ2,
 424                 .peci_mask = 0x07,
 425         },
 426         [it8790] = {
 427                 .name = "it8790",
 428                 .suffix = "E",
 429                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 430                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 431                   | FEAT_PWM_FREQ2,
 432                 .peci_mask = 0x07,
 433         },
 434         [it8792] = {
 435                 .name = "it8792",
 436                 .suffix = "E",
 437                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 438                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 439                   | FEAT_PWM_FREQ2,
 440                 .peci_mask = 0x07,
 441         },
 442         [it8603] = {
 443                 .name = "it8603",
 444                 .suffix = "E",
 445                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 446                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 447                   | FEAT_AVCC3 | FEAT_PWM_FREQ2,
 448                 .peci_mask = 0x07,
 449         },
 450         [it8607] = {
 451                 .name = "it8607",
 452                 .suffix = "E",
 453                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 454                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 455                   | FEAT_AVCC3 | FEAT_PWM_FREQ2,
 456                 .peci_mask = 0x07,
 457         },
 458         [it8620] = {
 459                 .name = "it8620",
 460                 .suffix = "E",
 461                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 462                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 463                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 464                   | FEAT_SIX_TEMP | FEAT_VIN3_5V,
 465                 .peci_mask = 0x07,
 466         },
 467         [it8622] = {
 468                 .name = "it8622",
 469                 .suffix = "E",
 470                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 471                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 472                   | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
 473                   | FEAT_AVCC3 | FEAT_VIN3_5V,
 474                 .peci_mask = 0x07,
 475         },
 476         [it8628] = {
 477                 .name = "it8628",
 478                 .suffix = "E",
 479                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 480                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 481                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 482                   | FEAT_SIX_TEMP | FEAT_VIN3_5V,
 483                 .peci_mask = 0x07,
 484         },
 485 };
 486
 487 #define has_16bit_fans(data)    ((data)->features & FEAT_16BIT_FANS)
 488 #define has_12mv_adc(data)      ((data)->features & FEAT_12MV_ADC)
 489 #define has_10_9mv_adc(data)    ((data)->features & FEAT_10_9MV_ADC)
 490 #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
 491 #define has_old_autopwm(data)   ((data)->features & FEAT_OLD_AUTOPWM)
 492 #define has_temp_offset(data)   ((data)->features & FEAT_TEMP_OFFSET)
 493 #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \
 494                                  ((data)->peci_mask & BIT(nr)))
 495 #define has_temp_old_peci(data, nr) \
 496                                 (((data)->features & FEAT_TEMP_OLD_PECI) && \
 497                                  ((data)->old_peci_mask & BIT(nr)))
 498 #define has_fan16_config(data)  ((data)->features & FEAT_FAN16_CONFIG)
 499 #define has_five_fans(data)     ((data)->features & (FEAT_FIVE_FANS | \
 500                                                      FEAT_SIX_FANS))
 501 #define has_vid(data)           ((data)->features & FEAT_VID)
 502 #define has_in7_internal(data)  ((data)->features & FEAT_IN7_INTERNAL)
 503 #define has_six_fans(data)      ((data)->features & FEAT_SIX_FANS)
 504 #define has_avcc3(data)         ((data)->features & FEAT_AVCC3)
 505 #define has_five_pwm(data)      ((data)->features & (FEAT_FIVE_PWM \
 506                                                      | FEAT_SIX_PWM))
 507 #define has_six_pwm(data)       ((data)->features & FEAT_SIX_PWM)
 508 #define has_pwm_freq2(data)     ((data)->features & FEAT_PWM_FREQ2)
 509 #define has_six_temp(data)      ((data)->features & FEAT_SIX_TEMP)
 510 #define has_vin3_5v(data)       ((data)->features & FEAT_VIN3_5V)
 511 #define has_four_fans(data)     ((data)->features & (FEAT_FOUR_FANS | \
 512                                                      FEAT_FIVE_FANS | \
 513                                                      FEAT_SIX_FANS))
 514 #define has_four_pwm(data)      ((data)->features & (FEAT_FOUR_PWM | \
 515                                                      FEAT_FIVE_PWM \
 516                                                      | FEAT_SIX_PWM))
 517
 518 struct it87_sio_data {
 519         enum chips type;
 520         /* Values read from Super-I/O config space */
 521         u8 revision;
 522         u8 vid_value;
 523         u8 beep_pin;
 524         u8 internal;    /* Internal sensors can be labeled */
 525         /* Features skipped based on config or DMI */
 526         u16 skip_in;
 527         u8 skip_vid;
 528         u8 skip_fan;
 529         u8 skip_pwm;
 530         u8 skip_temp;
 531 };
 532
 533 /*
 534  * For each registered chip, we need to keep some data in memory.
 535  * The structure is dynamically allocated.
 536  */
 537 struct it87_data {
 538         const struct attribute_group *groups[7];
 539         enum chips type;
 540         u32 features;
 541         u8 peci_mask;
 542         u8 old_peci_mask;
 543
 544         unsigned short addr;
 545         const char *name;
 546         struct mutex update_lock;
 547         char valid;             /* !=0 if following fields are valid */
 548         unsigned long last_updated;     /* In jiffies */
 549
 550         u16 in_scaled;          /* Internal voltage sensors are scaled */
 551         u16 in_internal;        /* Bitfield, internal sensors (for labels) */
 552         u16 has_in;             /* Bitfield, voltage sensors enabled */
 553         u8 in[NUM_VIN][3];              /* [nr][0]=in, [1]=min, [2]=max */
 554         u8 has_fan;             /* Bitfield, fans enabled */
 555         u16 fan[NUM_FAN][2];    /* Register values, [nr][0]=fan, [1]=min */
 556         u8 has_temp;            /* Bitfield, temp sensors enabled */
 557         s8 temp[NUM_TEMP][4];   /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
 558         u8 sensor;              /* Register value (IT87_REG_TEMP_ENABLE) */
 559         u8 extra;               /* Register value (IT87_REG_TEMP_EXTRA) */
 560         u8 fan_div[NUM_FAN_DIV];/* Register encoding, shifted right */
 561         bool has_vid;           /* True if VID supported */
 562         u8 vid;                 /* Register encoding, combined */
 563         u8 vrm;
 564         u32 alarms;             /* Register encoding, combined */
 565         bool has_beep;          /* true if beep supported */
 566         u8 beeps;               /* Register encoding */
 567         u8 fan_main_ctrl;       /* Register value */
 568         u8 fan_ctl;             /* Register value */
 569
 570         /*
 571          * The following 3 arrays correspond to the same registers up to
 572          * the IT8720F. The meaning of bits 6-0 depends on the value of bit
 573          * 7, and we want to preserve settings on mode changes, so we have
 574          * to track all values separately.
 575          * Starting with the IT8721F, the manual PWM duty cycles are stored
 576          * in separate registers (8-bit values), so the separate tracking
 577          * is no longer needed, but it is still done to keep the driver
 578          * simple.
 579          */
 580         u8 has_pwm;             /* Bitfield, pwm control enabled */
 581         u8 pwm_ctrl[NUM_PWM];   /* Register value */
 582         u8 pwm_duty[NUM_PWM];   /* Manual PWM value set by user */
 583         u8 pwm_temp_map[NUM_PWM];/* PWM to temp. chan. mapping (bits 1-0) */
 584
 585         /* Automatic fan speed control registers */
 586         u8 auto_pwm[NUM_AUTO_PWM][4];   /* [nr][3] is hard-coded */
 587         s8 auto_temp[NUM_AUTO_PWM][5];  /* [nr][0] is point1_temp_hyst */
 588 };
 589
 590 static int adc_lsb(const struct it87_data *data, int nr)
 591 {
 592         int lsb;
 593
 594         if (has_12mv_adc(data))
 595                 lsb = 120;
 596         else if (has_10_9mv_adc(data))
 597                 lsb = 109;
 598         else
 599                 lsb = 160;
 600         if (data->in_scaled & BIT(nr))
 601                 lsb <<= 1;
 602         return lsb;
 603 }
 604
 605 static u8 in_to_reg(const struct it87_data *data, int nr, long val)
 606 {
 607         val = DIV_ROUND_CLOSEST(val * 10, adc_lsb(data, nr));
 608         return clamp_val(val, 0, 255);
 609 }
 610
 611 static int in_from_reg(const struct it87_data *data, int nr, int val)
 612 {
 613         return DIV_ROUND_CLOSEST(val * adc_lsb(data, nr), 10);
 614 }
 615
 616 static inline u8 FAN_TO_REG(long rpm, int div)
 617 {
 618         if (rpm == 0)
 619                 return 255;
 620         rpm = clamp_val(rpm, 1, 1000000);
 621         return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
 622 }
 623
 624 static inline u16 FAN16_TO_REG(long rpm)
 625 {
 626         if (rpm == 0)
 627                 return 0xffff;
 628         return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
 629 }
 630
 631 #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
 632                                 1350000 / ((val) * (div)))
 633 /* The divider is fixed to 2 in 16-bit mode */
 634 #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
 635                              1350000 / ((val) * 2))
 636
 637 #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \
 638                                     ((val) + 500) / 1000), -128, 127))
 639 #define TEMP_FROM_REG(val) ((val) * 1000)
 640
 641 static u8 pwm_to_reg(const struct it87_data *data, long val)
 642 {
 643         if (has_newer_autopwm(data))
 644                 return val;
 645         else
 646                 return val >> 1;
 647 }
 648
 649 static int pwm_from_reg(const struct it87_data *data, u8 reg)
 650 {
 651         if (has_newer_autopwm(data))
 652                 return reg;
 653         else
 654                 return (reg & 0x7f) << 1;
 655 }
 656
 657 static int DIV_TO_REG(int val)
 658 {
 659         int answer = 0;
 660
 661         while (answer < 7 && (val >>= 1))
 662                 answer++;
 663         return answer;
 664 }
 665
 666 #define DIV_FROM_REG(val) BIT(val)
 667
 668 /*
 669  * PWM base frequencies. The frequency has to be divided by either 128 or 256,
 670  * depending on the chip type, to calculate the actual PWM frequency.
 671  *
 672  * Some of the chip datasheets suggest a base frequency of 51 kHz instead
 673  * of 750 kHz for the slowest base frequency, resulting in a PWM frequency
 674  * of 200 Hz. Sometimes both PWM frequency select registers are affected,
 675  * sometimes just one. It is unknown if this is a datasheet error or real,
 676  * so this is ignored for now.
 677  */
 678 static const unsigned int pwm_freq[8] = {
 679         48000000,
 680         24000000,
 681         12000000,
 682         8000000,
 683         6000000,
 684         3000000,
 685         1500000,
 686         750000,
 687 };
 688
 689 /*
 690  * Must be called with data->update_lock held, except during initialization.
 691  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 692  * would slow down the IT87 access and should not be necessary.
 693  */
 694 static int it87_read_value(struct it87_data *data, u8 reg)
 695 {
 696         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 697         return inb_p(data->addr + IT87_DATA_REG_OFFSET);
 698 }
 699
 700 /*
 701  * Must be called with data->update_lock held, except during initialization.
 702  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 703  * would slow down the IT87 access and should not be necessary.
 704  */
 705 static void it87_write_value(struct it87_data *data, u8 reg, u8 value)
 706 {
 707         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 708         outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
 709 }
 710
 711 static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
 712 {
 713         data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM[nr]);
 714         if (has_newer_autopwm(data)) {
 715                 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
 716                 data->pwm_duty[nr] = it87_read_value(data,
 717                                                      IT87_REG_PWM_DUTY[nr]);
 718         } else {
 719                 if (data->pwm_ctrl[nr] & 0x80)  /* Automatic mode */
 720                         data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
 721                 else                            /* Manual mode */
 722                         data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
 723         }
 724
 725         if (has_old_autopwm(data)) {
 726                 int i;
 727
 728                 for (i = 0; i < 5 ; i++)
 729                         data->auto_temp[nr][i] = it87_read_value(data,
 730                                                 IT87_REG_AUTO_TEMP(nr, i));
 731                 for (i = 0; i < 3 ; i++)
 732                         data->auto_pwm[nr][i] = it87_read_value(data,
 733                                                 IT87_REG_AUTO_PWM(nr, i));
 734         } else if (has_newer_autopwm(data)) {
 735                 int i;
 736
 737                 /*
 738                  * 0: temperature hysteresis (base + 5)
 739                  * 1: fan off temperature (base + 0)
 740                  * 2: fan start temperature (base + 1)
 741                  * 3: fan max temperature (base + 2)
 742                  */
 743                 data->auto_temp[nr][0] =
 744                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 5));
 745
 746                 for (i = 0; i < 3 ; i++)
 747                         data->auto_temp[nr][i + 1] =
 748                                 it87_read_value(data,
 749                                                 IT87_REG_AUTO_TEMP(nr, i));
 750                 /*
 751                  * 0: start pwm value (base + 3)
 752                  * 1: pwm slope (base + 4, 1/8th pwm)
 753                  */
 754                 data->auto_pwm[nr][0] =
 755                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 3));
 756                 data->auto_pwm[nr][1] =
 757                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 4));
 758         }
 759 }
 760
 761 static struct it87_data *it87_update_device(struct device *dev)
 762 {
 763         struct it87_data *data = dev_get_drvdata(dev);
 764         int i;
 765
 766         mutex_lock(&data->update_lock);
 767
 768         if (time_after(jiffies, data->last_updated + HZ + HZ / 2) ||
 769             !data->valid) {
 770                 if (update_vbat) {
 771                         /*
 772                          * Cleared after each update, so reenable.  Value
 773                          * returned by this read will be previous value
 774                          */
 775                         it87_write_value(data, IT87_REG_CONFIG,
 776                                 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
 777                 }
 778                 for (i = 0; i < NUM_VIN; i++) {
 779                         if (!(data->has_in & BIT(i)))
 780                                 continue;
 781
 782                         data->in[i][0] =
 783                                 it87_read_value(data, IT87_REG_VIN[i]);
 784
 785                         /* VBAT and AVCC don't have limit registers */
 786                         if (i >= NUM_VIN_LIMIT)
 787                                 continue;
 788
 789                         data->in[i][1] =
 790                                 it87_read_value(data, IT87_REG_VIN_MIN(i));
 791                         data->in[i][2] =
 792                                 it87_read_value(data, IT87_REG_VIN_MAX(i));
 793                 }
 794
 795                 for (i = 0; i < NUM_FAN; i++) {
 796                         /* Skip disabled fans */
 797                         if (!(data->has_fan & BIT(i)))
 798                                 continue;
 799
 800                         data->fan[i][1] =
 801                                 it87_read_value(data, IT87_REG_FAN_MIN[i]);
 802                         data->fan[i][0] = it87_read_value(data,
 803                                        IT87_REG_FAN[i]);
 804                         /* Add high byte if in 16-bit mode */
 805                         if (has_16bit_fans(data)) {
 806                                 data->fan[i][0] |= it87_read_value(data,
 807                                                 IT87_REG_FANX[i]) << 8;
 808                                 data->fan[i][1] |= it87_read_value(data,
 809                                                 IT87_REG_FANX_MIN[i]) << 8;
 810                         }
 811                 }
 812                 for (i = 0; i < NUM_TEMP; i++) {
 813                         if (!(data->has_temp & BIT(i)))
 814                                 continue;
 815                         data->temp[i][0] =
 816                                 it87_read_value(data, IT87_REG_TEMP(i));
 817
 818                         if (has_temp_offset(data) && i < NUM_TEMP_OFFSET)
 819                                 data->temp[i][3] =
 820                                   it87_read_value(data,
 821                                                   IT87_REG_TEMP_OFFSET[i]);
 822
 823                         if (i >= NUM_TEMP_LIMIT)
 824                                 continue;
 825
 826                         data->temp[i][1] =
 827                                 it87_read_value(data, IT87_REG_TEMP_LOW(i));
 828                         data->temp[i][2] =
 829                                 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
 830                 }
 831
 832                 /* Newer chips don't have clock dividers */
 833                 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
 834                         i = it87_read_value(data, IT87_REG_FAN_DIV);
 835                         data->fan_div[0] = i & 0x07;
 836                         data->fan_div[1] = (i >> 3) & 0x07;
 837                         data->fan_div[2] = (i & 0x40) ? 3 : 1;
 838                 }
 839
 840                 data->alarms =
 841                         it87_read_value(data, IT87_REG_ALARM1) |
 842                         (it87_read_value(data, IT87_REG_ALARM2) << 8) |
 843                         (it87_read_value(data, IT87_REG_ALARM3) << 16);
 844                 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
 845
 846                 data->fan_main_ctrl = it87_read_value(data,
 847                                 IT87_REG_FAN_MAIN_CTRL);
 848                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
 849                 for (i = 0; i < NUM_PWM; i++) {
 850                         if (!(data->has_pwm & BIT(i)))
 851                                 continue;
 852                         it87_update_pwm_ctrl(data, i);
 853                 }
 854
 855                 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
 856                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
 857                 /*
 858                  * The IT8705F does not have VID capability.
 859                  * The IT8718F and later don't use IT87_REG_VID for the
 860                  * same purpose.
 861                  */
 862                 if (data->type == it8712 || data->type == it8716) {
 863                         data->vid = it87_read_value(data, IT87_REG_VID);
 864                         /*
 865                          * The older IT8712F revisions had only 5 VID pins,
 866                          * but we assume it is always safe to read 6 bits.
 867                          */
 868                         data->vid &= 0x3f;
 869                 }
 870                 data->last_updated = jiffies;
 871                 data->valid = 1;
 872         }
 873
 874         mutex_unlock(&data->update_lock);
 875
 876         return data;
 877 }
 878
 879 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
 880                        char *buf)
 881 {
 882         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 883         struct it87_data *data = it87_update_device(dev);
 884         int index = sattr->index;
 885         int nr = sattr->nr;
 886
 887         return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
 888 }
 889
 890 static ssize_t set_in(struct device *dev, struct device_attribute *attr,
 891                       const char *buf, size_t count)
 892 {
 893         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 894         struct it87_data *data = dev_get_drvdata(dev);
 895         int index = sattr->index;
 896         int nr = sattr->nr;
 897         unsigned long val;
 898
 899         if (kstrtoul(buf, 10, &val) < 0)
 900                 return -EINVAL;
 901
 902         mutex_lock(&data->update_lock);
 903         data->in[nr][index] = in_to_reg(data, nr, val);
 904         it87_write_value(data,
 905                          index == 1 ? IT87_REG_VIN_MIN(nr)
 906                                     : IT87_REG_VIN_MAX(nr),
 907                          data->in[nr][index]);
 908         mutex_unlock(&data->update_lock);
 909         return count;
 910 }
 911
 912 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
 913 static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
 914                             0, 1);
 915 static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
 916                             0, 2);
 917
 918 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
 919 static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
 920                             1, 1);
 921 static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
 922                             1, 2);
 923
 924 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
 925 static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
 926                             2, 1);
 927 static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
 928                             2, 2);
 929
 930 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
 931 static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
 932                             3, 1);
 933 static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
 934                             3, 2);
 935
 936 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
 937 static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
 938                             4, 1);
 939 static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
 940                             4, 2);
 941
 942 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
 943 static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
 944                             5, 1);
 945 static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
 946                             5, 2);
 947
 948 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
 949 static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
 950                             6, 1);
 951 static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
 952                             6, 2);
 953
 954 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
 955 static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
 956                             7, 1);
 957 static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
 958                             7, 2);
 959
 960 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
 961 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0);
 962 static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in, NULL, 10, 0);
 963 static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in, NULL, 11, 0);
 964 static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in, NULL, 12, 0);
 965
 966 /* Up to 6 temperatures */
 967 static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
 968                          char *buf)
 969 {
 970         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 971         int nr = sattr->nr;
 972         int index = sattr->index;
 973         struct it87_data *data = it87_update_device(dev);
 974
 975         return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
 976 }
 977
 978 static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
 979                         const char *buf, size_t count)
 980 {
 981         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 982         int nr = sattr->nr;
 983         int index = sattr->index;
 984         struct it87_data *data = dev_get_drvdata(dev);
 985         long val;
 986         u8 reg, regval;
 987
 988         if (kstrtol(buf, 10, &val) < 0)
 989                 return -EINVAL;
 990
 991         mutex_lock(&data->update_lock);
 992
 993         switch (index) {
 994         default:
 995         case 1:
 996                 reg = IT87_REG_TEMP_LOW(nr);
 997                 break;
 998         case 2:
 999                 reg = IT87_REG_TEMP_HIGH(nr);
1000                 break;
1001         case 3:
1002                 regval = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1003                 if (!(regval & 0x80)) {
1004                         regval |= 0x80;
1005                         it87_write_value(data, IT87_REG_BEEP_ENABLE, regval);
1006                 }
1007                 data->valid = 0;
1008                 reg = IT87_REG_TEMP_OFFSET[nr];
1009                 break;
1010         }
1011
1012         data->temp[nr][index] = TEMP_TO_REG(val);
1013         it87_write_value(data, reg, data->temp[nr][index]);
1014         mutex_unlock(&data->update_lock);
1015         return count;
1016 }
1017
1018 static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
1019 static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1020                             0, 1);
1021 static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1022                             0, 2);
1023 static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
1024                             set_temp, 0, 3);
1025 static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
1026 static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1027                             1, 1);
1028 static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1029                             1, 2);
1030 static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
1031                             set_temp, 1, 3);
1032 static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
1033 static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1034                             2, 1);
1035 static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1036                             2, 2);
1037 static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
1038                             set_temp, 2, 3);
1039 static SENSOR_DEVICE_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0);
1040 static SENSOR_DEVICE_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0);
1041 static SENSOR_DEVICE_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0);
1042
1043 static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
1044                               char *buf)
1045 {
1046         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1047         int nr = sensor_attr->index;
1048         struct it87_data *data = it87_update_device(dev);
1049         u8 reg = data->sensor;      /* In case value is updated while used */
1050         u8 extra = data->extra;
1051
1052         if ((has_temp_peci(data, nr) && (reg >> 6 == nr + 1)) ||
1053             (has_temp_old_peci(data, nr) && (extra & 0x80)))
1054                 return sprintf(buf, "6\n");  /* Intel PECI */
1055         if (reg & (1 << nr))
1056                 return sprintf(buf, "3\n");  /* thermal diode */
1057         if (reg & (8 << nr))
1058                 return sprintf(buf, "4\n");  /* thermistor */
1059         return sprintf(buf, "0\n");      /* disabled */
1060 }
1061
1062 static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
1063                              const char *buf, size_t count)
1064 {
1065         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1066         int nr = sensor_attr->index;
1067
1068         struct it87_data *data = dev_get_drvdata(dev);
1069         long val;
1070         u8 reg, extra;
1071
1072         if (kstrtol(buf, 10, &val) < 0)
1073                 return -EINVAL;
1074
1075         reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1076         reg &= ~(1 << nr);
1077         reg &= ~(8 << nr);
1078         if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6))
1079                 reg &= 0x3f;
1080         extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1081         if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6))
1082                 extra &= 0x7f;
1083         if (val == 2) { /* backwards compatibility */
1084                 dev_warn(dev,
1085                          "Sensor type 2 is deprecated, please use 4 instead\n");
1086                 val = 4;
1087         }
1088         /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */
1089         if (val == 3)
1090                 reg |= 1 << nr;
1091         else if (val == 4)
1092                 reg |= 8 << nr;
1093         else if (has_temp_peci(data, nr) && val == 6)
1094                 reg |= (nr + 1) << 6;
1095         else if (has_temp_old_peci(data, nr) && val == 6)
1096                 extra |= 0x80;
1097         else if (val != 0)
1098                 return -EINVAL;
1099
1100         mutex_lock(&data->update_lock);
1101         data->sensor = reg;
1102         data->extra = extra;
1103         it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
1104         if (has_temp_old_peci(data, nr))
1105                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1106         data->valid = 0;        /* Force cache refresh */
1107         mutex_unlock(&data->update_lock);
1108         return count;
1109 }
1110
1111 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1112                           set_temp_type, 0);
1113 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1114                           set_temp_type, 1);
1115 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1116                           set_temp_type, 2);
1117
1118 /* 6 Fans */
1119
1120 static int pwm_mode(const struct it87_data *data, int nr)
1121 {
1122         if (data->type != it8603 && nr < 3 && !(data->fan_main_ctrl & BIT(nr)))
1123                 return 0;                               /* Full speed */
1124         if (data->pwm_ctrl[nr] & 0x80)
1125                 return 2;                               /* Automatic mode */
1126         if ((data->type == it8603 || nr >= 3) &&
1127             data->pwm_duty[nr] == pwm_to_reg(data, 0xff))
1128                 return 0;                       /* Full speed */
1129
1130         return 1;                               /* Manual mode */
1131 }
1132
1133 static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
1134                         char *buf)
1135 {
1136         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1137         int nr = sattr->nr;
1138         int index = sattr->index;
1139         int speed;
1140         struct it87_data *data = it87_update_device(dev);
1141
1142         speed = has_16bit_fans(data) ?
1143                 FAN16_FROM_REG(data->fan[nr][index]) :
1144                 FAN_FROM_REG(data->fan[nr][index],
1145                              DIV_FROM_REG(data->fan_div[nr]));
1146         return sprintf(buf, "%d\n", speed);
1147 }
1148
1149 static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
1150                             char *buf)
1151 {
1152         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1153         struct it87_data *data = it87_update_device(dev);
1154         int nr = sensor_attr->index;
1155
1156         return sprintf(buf, "%lu\n", DIV_FROM_REG(data->fan_div[nr]));
1157 }
1158
1159 static ssize_t show_pwm_enable(struct device *dev,
1160                                struct device_attribute *attr, char *buf)
1161 {
1162         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1163         struct it87_data *data = it87_update_device(dev);
1164         int nr = sensor_attr->index;
1165
1166         return sprintf(buf, "%d\n", pwm_mode(data, nr));
1167 }
1168
1169 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
1170                         char *buf)
1171 {
1172         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1173         struct it87_data *data = it87_update_device(dev);
1174         int nr = sensor_attr->index;
1175
1176         return sprintf(buf, "%d\n",
1177                        pwm_from_reg(data, data->pwm_duty[nr]));
1178 }
1179
1180 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
1181                              char *buf)
1182 {
1183         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1184         struct it87_data *data = it87_update_device(dev);
1185         int nr = sensor_attr->index;
1186         unsigned int freq;
1187         int index;
1188
1189         if (has_pwm_freq2(data) && nr == 1)
1190                 index = (data->extra >> 4) & 0x07;
1191         else
1192                 index = (data->fan_ctl >> 4) & 0x07;
1193
1194         freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128);
1195
1196         return sprintf(buf, "%u\n", freq);
1197 }
1198
1199 static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
1200                        const char *buf, size_t count)
1201 {
1202         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1203         int nr = sattr->nr;
1204         int index = sattr->index;
1205
1206         struct it87_data *data = dev_get_drvdata(dev);
1207         long val;
1208         u8 reg;
1209
1210         if (kstrtol(buf, 10, &val) < 0)
1211                 return -EINVAL;
1212
1213         mutex_lock(&data->update_lock);
1214
1215         if (has_16bit_fans(data)) {
1216                 data->fan[nr][index] = FAN16_TO_REG(val);
1217                 it87_write_value(data, IT87_REG_FAN_MIN[nr],
1218                                  data->fan[nr][index] & 0xff);
1219                 it87_write_value(data, IT87_REG_FANX_MIN[nr],
1220                                  data->fan[nr][index] >> 8);
1221         } else {
1222                 reg = it87_read_value(data, IT87_REG_FAN_DIV);
1223                 switch (nr) {
1224                 case 0:
1225                         data->fan_div[nr] = reg & 0x07;
1226                         break;
1227                 case 1:
1228                         data->fan_div[nr] = (reg >> 3) & 0x07;
1229                         break;
1230                 case 2:
1231                         data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
1232                         break;
1233                 }
1234                 data->fan[nr][index] =
1235                   FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
1236                 it87_write_value(data, IT87_REG_FAN_MIN[nr],
1237                                  data->fan[nr][index]);
1238         }
1239
1240         mutex_unlock(&data->update_lock);
1241         return count;
1242 }
1243
1244 static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
1245                            const char *buf, size_t count)
1246 {
1247         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1248         struct it87_data *data = dev_get_drvdata(dev);
1249         int nr = sensor_attr->index;
1250         unsigned long val;
1251         int min;
1252         u8 old;
1253
1254         if (kstrtoul(buf, 10, &val) < 0)
1255                 return -EINVAL;
1256
1257         mutex_lock(&data->update_lock);
1258         old = it87_read_value(data, IT87_REG_FAN_DIV);
1259
1260         /* Save fan min limit */
1261         min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
1262
1263         switch (nr) {
1264         case 0:
1265         case 1:
1266                 data->fan_div[nr] = DIV_TO_REG(val);
1267                 break;
1268         case 2:
1269                 if (val < 8)
1270                         data->fan_div[nr] = 1;
1271                 else
1272                         data->fan_div[nr] = 3;
1273         }
1274         val = old & 0x80;
1275         val |= (data->fan_div[0] & 0x07);
1276         val |= (data->fan_div[1] & 0x07) << 3;
1277         if (data->fan_div[2] == 3)
1278                 val |= 0x1 << 6;
1279         it87_write_value(data, IT87_REG_FAN_DIV, val);
1280
1281         /* Restore fan min limit */
1282         data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
1283         it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan[nr][1]);
1284
1285         mutex_unlock(&data->update_lock);
1286         return count;
1287 }
1288
1289 /* Returns 0 if OK, -EINVAL otherwise */
1290 static int check_trip_points(struct device *dev, int nr)
1291 {
1292         const struct it87_data *data = dev_get_drvdata(dev);
1293         int i, err = 0;
1294
1295         if (has_old_autopwm(data)) {
1296                 for (i = 0; i < 3; i++) {
1297                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1298                                 err = -EINVAL;
1299                 }
1300                 for (i = 0; i < 2; i++) {
1301                         if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1302                                 err = -EINVAL;
1303                 }
1304         } else if (has_newer_autopwm(data)) {
1305                 for (i = 1; i < 3; i++) {
1306                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1307                                 err = -EINVAL;
1308                 }
1309         }
1310
1311         if (err) {
1312                 dev_err(dev,
1313                         "Inconsistent trip points, not switching to automatic mode\n");
1314                 dev_err(dev, "Adjust the trip points and try again\n");
1315         }
1316         return err;
1317 }
1318
1319 static ssize_t set_pwm_enable(struct device *dev, struct device_attribute *attr,
1320                               const char *buf, size_t count)
1321 {
1322         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1323         struct it87_data *data = dev_get_drvdata(dev);
1324         int nr = sensor_attr->index;
1325         long val;
1326
1327         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
1328                 return -EINVAL;
1329
1330         /* Check trip points before switching to automatic mode */
1331         if (val == 2) {
1332                 if (check_trip_points(dev, nr) < 0)
1333                         return -EINVAL;
1334         }
1335
1336         mutex_lock(&data->update_lock);
1337
1338         if (val == 0) {
1339                 if (nr < 3 && data->type != it8603) {
1340                         int tmp;
1341                         /* make sure the fan is on when in on/off mode */
1342                         tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1343                         it87_write_value(data, IT87_REG_FAN_CTL, tmp | BIT(nr));
1344                         /* set on/off mode */
1345                         data->fan_main_ctrl &= ~BIT(nr);
1346                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1347                                          data->fan_main_ctrl);
1348                 } else {
1349                         u8 ctrl;
1350
1351                         /* No on/off mode, set maximum pwm value */
1352                         data->pwm_duty[nr] = pwm_to_reg(data, 0xff);
1353                         it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1354                                          data->pwm_duty[nr]);
1355                         /* and set manual mode */
1356                         if (has_newer_autopwm(data)) {
1357                                 ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1358                                         data->pwm_temp_map[nr];
1359                         } else {
1360                                 ctrl = data->pwm_duty[nr];
1361                         }
1362                         data->pwm_ctrl[nr] = ctrl;
1363                         it87_write_value(data, IT87_REG_PWM[nr], ctrl);
1364                 }
1365         } else {
1366                 u8 ctrl;
1367
1368                 if (has_newer_autopwm(data)) {
1369                         ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1370                                 data->pwm_temp_map[nr];
1371                         if (val != 1)
1372                                 ctrl |= 0x80;
1373                 } else {
1374                         ctrl = (val == 1 ? data->pwm_duty[nr] : 0x80);
1375                 }
1376                 data->pwm_ctrl[nr] = ctrl;
1377                 it87_write_value(data, IT87_REG_PWM[nr], ctrl);
1378
1379                 if (data->type != it8603 && nr < 3) {
1380                         /* set SmartGuardian mode */
1381                         data->fan_main_ctrl |= BIT(nr);
1382                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1383                                          data->fan_main_ctrl);
1384                 }
1385         }
1386
1387         mutex_unlock(&data->update_lock);
1388         return count;
1389 }
1390
1391 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1392                        const char *buf, size_t count)
1393 {
1394         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1395         struct it87_data *data = dev_get_drvdata(dev);
1396         int nr = sensor_attr->index;
1397         long val;
1398
1399         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1400                 return -EINVAL;
1401
1402         mutex_lock(&data->update_lock);
1403         it87_update_pwm_ctrl(data, nr);
1404         if (has_newer_autopwm(data)) {
1405                 /*
1406                  * If we are in automatic mode, the PWM duty cycle register
1407                  * is read-only so we can't write the value.
1408                  */
1409                 if (data->pwm_ctrl[nr] & 0x80) {
1410                         mutex_unlock(&data->update_lock);
1411                         return -EBUSY;
1412                 }
1413                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1414                 it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1415                                  data->pwm_duty[nr]);
1416         } else {
1417                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1418                 /*
1419                  * If we are in manual mode, write the duty cycle immediately;
1420                  * otherwise, just store it for later use.
1421                  */
1422                 if (!(data->pwm_ctrl[nr] & 0x80)) {
1423                         data->pwm_ctrl[nr] = data->pwm_duty[nr];
1424                         it87_write_value(data, IT87_REG_PWM[nr],
1425                                          data->pwm_ctrl[nr]);
1426                 }
1427         }
1428         mutex_unlock(&data->update_lock);
1429         return count;
1430 }
1431
1432 static ssize_t set_pwm_freq(struct device *dev, struct device_attribute *attr,
1433                             const char *buf, size_t count)
1434 {
1435         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1436         struct it87_data *data = dev_get_drvdata(dev);
1437         int nr = sensor_attr->index;
1438         unsigned long val;
1439         int i;
1440
1441         if (kstrtoul(buf, 10, &val) < 0)
1442                 return -EINVAL;
1443
1444         val = clamp_val(val, 0, 1000000);
1445         val *= has_newer_autopwm(data) ? 256 : 128;
1446
1447         /* Search for the nearest available frequency */
1448         for (i = 0; i < 7; i++) {
1449                 if (val > (pwm_freq[i] + pwm_freq[i + 1]) / 2)
1450                         break;
1451         }
1452
1453         mutex_lock(&data->update_lock);
1454         if (nr == 0) {
1455                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
1456                 data->fan_ctl |= i << 4;
1457                 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
1458         } else {
1459                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x8f;
1460                 data->extra |= i << 4;
1461                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1462         }
1463         mutex_unlock(&data->update_lock);
1464
1465         return count;
1466 }
1467
1468 static ssize_t show_pwm_temp_map(struct device *dev,
1469                                  struct device_attribute *attr, char *buf)
1470 {
1471         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1472         struct it87_data *data = it87_update_device(dev);
1473         int nr = sensor_attr->index;
1474         int map;
1475
1476         map = data->pwm_temp_map[nr];
1477         if (map >= 3)
1478                 map = 0;        /* Should never happen */
1479         if (nr >= 3)            /* pwm channels 3..6 map to temp4..6 */
1480                 map += 3;
1481
1482         return sprintf(buf, "%d\n", (int)BIT(map));
1483 }
1484
1485 static ssize_t set_pwm_temp_map(struct device *dev,
1486                                 struct device_attribute *attr, const char *buf,
1487                                 size_t count)
1488 {
1489         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1490         struct it87_data *data = dev_get_drvdata(dev);
1491         int nr = sensor_attr->index;
1492         long val;
1493         u8 reg;
1494
1495         if (kstrtol(buf, 10, &val) < 0)
1496                 return -EINVAL;
1497
1498         if (nr >= 3)
1499                 val -= 3;
1500
1501         switch (val) {
1502         case BIT(0):
1503                 reg = 0x00;
1504                 break;
1505         case BIT(1):
1506                 reg = 0x01;
1507                 break;
1508         case BIT(2):
1509                 reg = 0x02;
1510                 break;
1511         default:
1512                 return -EINVAL;
1513         }
1514
1515         mutex_lock(&data->update_lock);
1516         it87_update_pwm_ctrl(data, nr);
1517         data->pwm_temp_map[nr] = reg;
1518         /*
1519          * If we are in automatic mode, write the temp mapping immediately;
1520          * otherwise, just store it for later use.
1521          */
1522         if (data->pwm_ctrl[nr] & 0x80) {
1523                 data->pwm_ctrl[nr] = (data->pwm_ctrl[nr] & 0xfc) |
1524                                                 data->pwm_temp_map[nr];
1525                 it87_write_value(data, IT87_REG_PWM[nr], data->pwm_ctrl[nr]);
1526         }
1527         mutex_unlock(&data->update_lock);
1528         return count;
1529 }
1530
1531 static ssize_t show_auto_pwm(struct device *dev, struct device_attribute *attr,
1532                              char *buf)
1533 {
1534         struct it87_data *data = it87_update_device(dev);
1535         struct sensor_device_attribute_2 *sensor_attr =
1536                         to_sensor_dev_attr_2(attr);
1537         int nr = sensor_attr->nr;
1538         int point = sensor_attr->index;
1539
1540         return sprintf(buf, "%d\n",
1541                        pwm_from_reg(data, data->auto_pwm[nr][point]));
1542 }
1543
1544 static ssize_t set_auto_pwm(struct device *dev, struct device_attribute *attr,
1545                             const char *buf, size_t count)
1546 {
1547         struct it87_data *data = dev_get_drvdata(dev);
1548         struct sensor_device_attribute_2 *sensor_attr =
1549                         to_sensor_dev_attr_2(attr);
1550         int nr = sensor_attr->nr;
1551         int point = sensor_attr->index;
1552         int regaddr;
1553         long val;
1554
1555         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1556                 return -EINVAL;
1557
1558         mutex_lock(&data->update_lock);
1559         data->auto_pwm[nr][point] = pwm_to_reg(data, val);
1560         if (has_newer_autopwm(data))
1561                 regaddr = IT87_REG_AUTO_TEMP(nr, 3);
1562         else
1563                 regaddr = IT87_REG_AUTO_PWM(nr, point);
1564         it87_write_value(data, regaddr, data->auto_pwm[nr][point]);
1565         mutex_unlock(&data->update_lock);
1566         return count;
1567 }
1568
1569 static ssize_t show_auto_pwm_slope(struct device *dev,
1570                                    struct device_attribute *attr, char *buf)
1571 {
1572         struct it87_data *data = it87_update_device(dev);
1573         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1574         int nr = sensor_attr->index;
1575
1576         return sprintf(buf, "%d\n", data->auto_pwm[nr][1] & 0x7f);
1577 }
1578
1579 static ssize_t set_auto_pwm_slope(struct device *dev,
1580                                   struct device_attribute *attr,
1581                                   const char *buf, size_t count)
1582 {
1583         struct it87_data *data = dev_get_drvdata(dev);
1584         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1585         int nr = sensor_attr->index;
1586         unsigned long val;
1587
1588         if (kstrtoul(buf, 10, &val) < 0 || val > 127)
1589                 return -EINVAL;
1590
1591         mutex_lock(&data->update_lock);
1592         data->auto_pwm[nr][1] = (data->auto_pwm[nr][1] & 0x80) | val;
1593         it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 4),
1594                          data->auto_pwm[nr][1]);
1595         mutex_unlock(&data->update_lock);
1596         return count;
1597 }
1598
1599 static ssize_t show_auto_temp(struct device *dev, struct device_attribute *attr,
1600                               char *buf)
1601 {
1602         struct it87_data *data = it87_update_device(dev);
1603         struct sensor_device_attribute_2 *sensor_attr =
1604                         to_sensor_dev_attr_2(attr);
1605         int nr = sensor_attr->nr;
1606         int point = sensor_attr->index;
1607         int reg;
1608
1609         if (has_old_autopwm(data) || point)
1610                 reg = data->auto_temp[nr][point];
1611         else
1612                 reg = data->auto_temp[nr][1] - (data->auto_temp[nr][0] & 0x1f);
1613
1614         return sprintf(buf, "%d\n", TEMP_FROM_REG(reg));
1615 }
1616
1617 static ssize_t set_auto_temp(struct device *dev, struct device_attribute *attr,
1618                              const char *buf, size_t count)
1619 {
1620         struct it87_data *data = dev_get_drvdata(dev);
1621         struct sensor_device_attribute_2 *sensor_attr =
1622                         to_sensor_dev_attr_2(attr);
1623         int nr = sensor_attr->nr;
1624         int point = sensor_attr->index;
1625         long val;
1626         int reg;
1627
1628         if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
1629                 return -EINVAL;
1630
1631         mutex_lock(&data->update_lock);
1632         if (has_newer_autopwm(data) && !point) {
1633                 reg = data->auto_temp[nr][1] - TEMP_TO_REG(val);
1634                 reg = clamp_val(reg, 0, 0x1f) | (data->auto_temp[nr][0] & 0xe0);
1635                 data->auto_temp[nr][0] = reg;
1636                 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 5), reg);
1637         } else {
1638                 reg = TEMP_TO_REG(val);
1639                 data->auto_temp[nr][point] = reg;
1640                 if (has_newer_autopwm(data))
1641                         point--;
1642                 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point), reg);
1643         }
1644         mutex_unlock(&data->update_lock);
1645         return count;
1646 }
1647
1648 static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
1649 static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1650                             0, 1);
1651 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
1652                           set_fan_div, 0);
1653
1654 static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
1655 static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1656                             1, 1);
1657 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
1658                           set_fan_div, 1);
1659
1660 static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
1661 static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1662                             2, 1);
1663 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
1664                           set_fan_div, 2);
1665
1666 static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
1667 static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1668                             3, 1);
1669
1670 static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
1671 static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1672                             4, 1);
1673
1674 static SENSOR_DEVICE_ATTR_2(fan6_input, S_IRUGO, show_fan, NULL, 5, 0);
1675 static SENSOR_DEVICE_ATTR_2(fan6_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1676                             5, 1);
1677
1678 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
1679                           show_pwm_enable, set_pwm_enable, 0);
1680 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0);
1681 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq,
1682                           set_pwm_freq, 0);
1683 static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO,
1684                           show_pwm_temp_map, set_pwm_temp_map, 0);
1685 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR,
1686                             show_auto_pwm, set_auto_pwm, 0, 0);
1687 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR,
1688                             show_auto_pwm, set_auto_pwm, 0, 1);
1689 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR,
1690                             show_auto_pwm, set_auto_pwm, 0, 2);
1691 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO,
1692                             show_auto_pwm, NULL, 0, 3);
1693 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
1694                             show_auto_temp, set_auto_temp, 0, 1);
1695 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1696                             show_auto_temp, set_auto_temp, 0, 0);
1697 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
1698                             show_auto_temp, set_auto_temp, 0, 2);
1699 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
1700                             show_auto_temp, set_auto_temp, 0, 3);
1701 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR,
1702                             show_auto_temp, set_auto_temp, 0, 4);
1703 static SENSOR_DEVICE_ATTR_2(pwm1_auto_start, S_IRUGO | S_IWUSR,
1704                             show_auto_pwm, set_auto_pwm, 0, 0);
1705 static SENSOR_DEVICE_ATTR(pwm1_auto_slope, S_IRUGO | S_IWUSR,
1706                           show_auto_pwm_slope, set_auto_pwm_slope, 0);
1707
1708 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
1709                           show_pwm_enable, set_pwm_enable, 1);
1710 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1);
1711 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, set_pwm_freq, 1);
1712 static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO,
1713                           show_pwm_temp_map, set_pwm_temp_map, 1);
1714 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR,
1715                             show_auto_pwm, set_auto_pwm, 1, 0);
1716 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR,
1717                             show_auto_pwm, set_auto_pwm, 1, 1);
1718 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR,
1719                             show_auto_pwm, set_auto_pwm, 1, 2);
1720 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO,
1721                             show_auto_pwm, NULL, 1, 3);
1722 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
1723                             show_auto_temp, set_auto_temp, 1, 1);
1724 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1725                             show_auto_temp, set_auto_temp, 1, 0);
1726 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
1727                             show_auto_temp, set_auto_temp, 1, 2);
1728 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
1729                             show_auto_temp, set_auto_temp, 1, 3);
1730 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR,
1731                             show_auto_temp, set_auto_temp, 1, 4);
1732 static SENSOR_DEVICE_ATTR_2(pwm2_auto_start, S_IRUGO | S_IWUSR,
1733                             show_auto_pwm, set_auto_pwm, 1, 0);
1734 static SENSOR_DEVICE_ATTR(pwm2_auto_slope, S_IRUGO | S_IWUSR,
1735                           show_auto_pwm_slope, set_auto_pwm_slope, 1);
1736
1737 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
1738                           show_pwm_enable, set_pwm_enable, 2);
1739 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2);
1740 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL, 2);
1741 static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO,
1742                           show_pwm_temp_map, set_pwm_temp_map, 2);
1743 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR,
1744                             show_auto_pwm, set_auto_pwm, 2, 0);
1745 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR,
1746                             show_auto_pwm, set_auto_pwm, 2, 1);
1747 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR,
1748                             show_auto_pwm, set_auto_pwm, 2, 2);
1749 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO,
1750                             show_auto_pwm, NULL, 2, 3);
1751 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
1752                             show_auto_temp, set_auto_temp, 2, 1);
1753 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1754                             show_auto_temp, set_auto_temp, 2, 0);
1755 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
1756                             show_auto_temp, set_auto_temp, 2, 2);
1757 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
1758                             show_auto_temp, set_auto_temp, 2, 3);
1759 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR,
1760                             show_auto_temp, set_auto_temp, 2, 4);
1761 static SENSOR_DEVICE_ATTR_2(pwm3_auto_start, S_IRUGO | S_IWUSR,
1762                             show_auto_pwm, set_auto_pwm, 2, 0);
1763 static SENSOR_DEVICE_ATTR(pwm3_auto_slope, S_IRUGO | S_IWUSR,
1764                           show_auto_pwm_slope, set_auto_pwm_slope, 2);
1765
1766 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IRUGO | S_IWUSR,
1767                           show_pwm_enable, set_pwm_enable, 3);
1768 static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 3);
1769 static SENSOR_DEVICE_ATTR(pwm4_freq, S_IRUGO, show_pwm_freq, NULL, 3);
1770 static SENSOR_DEVICE_ATTR(pwm4_auto_channels_temp, S_IRUGO,
1771                           show_pwm_temp_map, set_pwm_temp_map, 3);
1772 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp, S_IRUGO | S_IWUSR,
1773                             show_auto_temp, set_auto_temp, 2, 1);
1774 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1775                             show_auto_temp, set_auto_temp, 2, 0);
1776 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point2_temp, S_IRUGO | S_IWUSR,
1777                             show_auto_temp, set_auto_temp, 2, 2);
1778 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point3_temp, S_IRUGO | S_IWUSR,
1779                             show_auto_temp, set_auto_temp, 2, 3);
1780 static SENSOR_DEVICE_ATTR_2(pwm4_auto_start, S_IRUGO | S_IWUSR,
1781                             show_auto_pwm, set_auto_pwm, 3, 0);
1782 static SENSOR_DEVICE_ATTR(pwm4_auto_slope, S_IRUGO | S_IWUSR,
1783                           show_auto_pwm_slope, set_auto_pwm_slope, 3);
1784
1785 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IRUGO | S_IWUSR,
1786                           show_pwm_enable, set_pwm_enable, 4);
1787 static SENSOR_DEVICE_ATTR(pwm5, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 4);
1788 static SENSOR_DEVICE_ATTR(pwm5_freq, S_IRUGO, show_pwm_freq, NULL, 4);
1789 static SENSOR_DEVICE_ATTR(pwm5_auto_channels_temp, S_IRUGO,
1790                           show_pwm_temp_map, set_pwm_temp_map, 4);
1791 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp, S_IRUGO | S_IWUSR,
1792                             show_auto_temp, set_auto_temp, 2, 1);
1793 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1794                             show_auto_temp, set_auto_temp, 2, 0);
1795 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point2_temp, S_IRUGO | S_IWUSR,
1796                             show_auto_temp, set_auto_temp, 2, 2);
1797 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point3_temp, S_IRUGO | S_IWUSR,
1798                             show_auto_temp, set_auto_temp, 2, 3);
1799 static SENSOR_DEVICE_ATTR_2(pwm5_auto_start, S_IRUGO | S_IWUSR,
1800                             show_auto_pwm, set_auto_pwm, 4, 0);
1801 static SENSOR_DEVICE_ATTR(pwm5_auto_slope, S_IRUGO | S_IWUSR,
1802                           show_auto_pwm_slope, set_auto_pwm_slope, 4);
1803
1804 static SENSOR_DEVICE_ATTR(pwm6_enable, S_IRUGO | S_IWUSR,
1805                           show_pwm_enable, set_pwm_enable, 5);
1806 static SENSOR_DEVICE_ATTR(pwm6, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 5);
1807 static SENSOR_DEVICE_ATTR(pwm6_freq, S_IRUGO, show_pwm_freq, NULL, 5);
1808 static SENSOR_DEVICE_ATTR(pwm6_auto_channels_temp, S_IRUGO,
1809                           show_pwm_temp_map, set_pwm_temp_map, 5);
1810 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp, S_IRUGO | S_IWUSR,
1811                             show_auto_temp, set_auto_temp, 2, 1);
1812 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1813                             show_auto_temp, set_auto_temp, 2, 0);
1814 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point2_temp, S_IRUGO | S_IWUSR,
1815                             show_auto_temp, set_auto_temp, 2, 2);
1816 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point3_temp, S_IRUGO | S_IWUSR,
1817                             show_auto_temp, set_auto_temp, 2, 3);
1818 static SENSOR_DEVICE_ATTR_2(pwm6_auto_start, S_IRUGO | S_IWUSR,
1819                             show_auto_pwm, set_auto_pwm, 5, 0);
1820 static SENSOR_DEVICE_ATTR(pwm6_auto_slope, S_IRUGO | S_IWUSR,
1821                           show_auto_pwm_slope, set_auto_pwm_slope, 5);
1822
1823 /* Alarms */
1824 static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
1825                            char *buf)
1826 {
1827         struct it87_data *data = it87_update_device(dev);
1828
1829         return sprintf(buf, "%u\n", data->alarms);
1830 }
1831 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
1832
1833 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
1834                           char *buf)
1835 {
1836         struct it87_data *data = it87_update_device(dev);
1837         int bitnr = to_sensor_dev_attr(attr)->index;
1838
1839         return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
1840 }
1841
1842 static ssize_t clear_intrusion(struct device *dev,
1843                                struct device_attribute *attr, const char *buf,
1844                                size_t count)
1845 {
1846         struct it87_data *data = dev_get_drvdata(dev);
1847         int config;
1848         long val;
1849
1850         if (kstrtol(buf, 10, &val) < 0 || val != 0)
1851                 return -EINVAL;
1852
1853         mutex_lock(&data->update_lock);
1854         config = it87_read_value(data, IT87_REG_CONFIG);
1855         if (config < 0) {
1856                 count = config;
1857         } else {
1858                 config |= BIT(5);
1859                 it87_write_value(data, IT87_REG_CONFIG, config);
1860                 /* Invalidate cache to force re-read */
1861                 data->valid = 0;
1862         }
1863         mutex_unlock(&data->update_lock);
1864
1865         return count;
1866 }
1867
1868 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
1869 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
1870 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
1871 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
1872 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
1873 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
1874 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
1875 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
1876 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
1877 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
1878 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
1879 static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
1880 static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
1881 static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 7);
1882 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
1883 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
1884 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
1885 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
1886                           show_alarm, clear_intrusion, 4);
1887
1888 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
1889                          char *buf)
1890 {
1891         struct it87_data *data = it87_update_device(dev);
1892         int bitnr = to_sensor_dev_attr(attr)->index;
1893
1894         return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
1895 }
1896
1897 static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
1898                         const char *buf, size_t count)
1899 {
1900         int bitnr = to_sensor_dev_attr(attr)->index;
1901         struct it87_data *data = dev_get_drvdata(dev);
1902         long val;
1903
1904         if (kstrtol(buf, 10, &val) < 0 || (val != 0 && val != 1))
1905                 return -EINVAL;
1906
1907         mutex_lock(&data->update_lock);
1908         data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1909         if (val)
1910                 data->beeps |= BIT(bitnr);
1911         else
1912                 data->beeps &= ~BIT(bitnr);
1913         it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
1914         mutex_unlock(&data->update_lock);
1915         return count;
1916 }
1917
1918 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
1919                           show_beep, set_beep, 1);
1920 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
1921 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
1922 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
1923 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
1924 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
1925 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
1926 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
1927 /* fanX_beep writability is set later */
1928 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
1929 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
1930 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
1931 static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
1932 static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
1933 static SENSOR_DEVICE_ATTR(fan6_beep, S_IRUGO, show_beep, set_beep, 0);
1934 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
1935                           show_beep, set_beep, 2);
1936 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
1937 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
1938
1939 static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
1940                             char *buf)
1941 {
1942         struct it87_data *data = dev_get_drvdata(dev);
1943
1944         return sprintf(buf, "%u\n", data->vrm);
1945 }
1946
1947 static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
1948                              const char *buf, size_t count)
1949 {
1950         struct it87_data *data = dev_get_drvdata(dev);
1951         unsigned long val;
1952
1953         if (kstrtoul(buf, 10, &val) < 0)
1954                 return -EINVAL;
1955
1956         data->vrm = val;
1957
1958         return count;
1959 }
1960 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
1961
1962 static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
1963                             char *buf)
1964 {
1965         struct it87_data *data = it87_update_device(dev);
1966
1967         return sprintf(buf, "%ld\n", (long)vid_from_reg(data->vid, data->vrm));
1968 }
1969 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
1970
1971 static ssize_t show_label(struct device *dev, struct device_attribute *attr,
1972                           char *buf)
1973 {
1974         static const char * const labels[] = {
1975                 "+5V",
1976                 "5VSB",
1977                 "Vbat",
1978                 "AVCC",
1979         };
1980         static const char * const labels_it8721[] = {
1981                 "+3.3V",
1982                 "3VSB",
1983                 "Vbat",
1984                 "+3.3V",
1985         };
1986         struct it87_data *data = dev_get_drvdata(dev);
1987         int nr = to_sensor_dev_attr(attr)->index;
1988         const char *label;
1989
1990         if (has_vin3_5v(data) && nr == 0)
1991                 label = labels[0];
1992         else if (has_12mv_adc(data) || has_10_9mv_adc(data))
1993                 label = labels_it8721[nr];
1994         else
1995                 label = labels[nr];
1996
1997         return sprintf(buf, "%s\n", label);
1998 }
1999 static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
2000 static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
2001 static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
2002 /* AVCC3 */
2003 static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 3);
2004
2005 static umode_t it87_in_is_visible(struct kobject *kobj,
2006                                   struct attribute *attr, int index)
2007 {
2008         struct device *dev = container_of(kobj, struct device, kobj);
2009         struct it87_data *data = dev_get_drvdata(dev);
2010         int i = index / 5;      /* voltage index */
2011         int a = index % 5;      /* attribute index */
2012
2013         if (index >= 40) {      /* in8 and higher only have input attributes */
2014                 i = index - 40 + 8;
2015                 a = 0;
2016         }
2017
2018         if (!(data->has_in & BIT(i)))
2019                 return 0;
2020
2021         if (a == 4 && !data->has_beep)
2022                 return 0;
2023
2024         return attr->mode;
2025 }
2026
2027 static struct attribute *it87_attributes_in[] = {
2028         &sensor_dev_attr_in0_input.dev_attr.attr,
2029         &sensor_dev_attr_in0_min.dev_attr.attr,
2030         &sensor_dev_attr_in0_max.dev_attr.attr,
2031         &sensor_dev_attr_in0_alarm.dev_attr.attr,
2032         &sensor_dev_attr_in0_beep.dev_attr.attr,        /* 4 */
2033
2034         &sensor_dev_attr_in1_input.dev_attr.attr,
2035         &sensor_dev_attr_in1_min.dev_attr.attr,
2036         &sensor_dev_attr_in1_max.dev_attr.attr,
2037         &sensor_dev_attr_in1_alarm.dev_attr.attr,
2038         &sensor_dev_attr_in1_beep.dev_attr.attr,        /* 9 */
2039
2040         &sensor_dev_attr_in2_input.dev_attr.attr,
2041         &sensor_dev_attr_in2_min.dev_attr.attr,
2042         &sensor_dev_attr_in2_max.dev_attr.attr,
2043         &sensor_dev_attr_in2_alarm.dev_attr.attr,
2044         &sensor_dev_attr_in2_beep.dev_attr.attr,        /* 14 */
2045
2046         &sensor_dev_attr_in3_input.dev_attr.attr,
2047         &sensor_dev_attr_in3_min.dev_attr.attr,
2048         &sensor_dev_attr_in3_max.dev_attr.attr,
2049         &sensor_dev_attr_in3_alarm.dev_attr.attr,
2050         &sensor_dev_attr_in3_beep.dev_attr.attr,        /* 19 */
2051
2052         &sensor_dev_attr_in4_input.dev_attr.attr,
2053         &sensor_dev_attr_in4_min.dev_attr.attr,
2054         &sensor_dev_attr_in4_max.dev_attr.attr,
2055         &sensor_dev_attr_in4_alarm.dev_attr.attr,
2056         &sensor_dev_attr_in4_beep.dev_attr.attr,        /* 24 */
2057
2058         &sensor_dev_attr_in5_input.dev_attr.attr,
2059         &sensor_dev_attr_in5_min.dev_attr.attr,
2060         &sensor_dev_attr_in5_max.dev_attr.attr,
2061         &sensor_dev_attr_in5_alarm.dev_attr.attr,
2062         &sensor_dev_attr_in5_beep.dev_attr.attr,        /* 29 */
2063
2064         &sensor_dev_attr_in6_input.dev_attr.attr,
2065         &sensor_dev_attr_in6_min.dev_attr.attr,
2066         &sensor_dev_attr_in6_max.dev_attr.attr,
2067         &sensor_dev_attr_in6_alarm.dev_attr.attr,
2068         &sensor_dev_attr_in6_beep.dev_attr.attr,        /* 34 */
2069
2070         &sensor_dev_attr_in7_input.dev_attr.attr,
2071         &sensor_dev_attr_in7_min.dev_attr.attr,
2072         &sensor_dev_attr_in7_max.dev_attr.attr,
2073         &sensor_dev_attr_in7_alarm.dev_attr.attr,
2074         &sensor_dev_attr_in7_beep.dev_attr.attr,        /* 39 */
2075
2076         &sensor_dev_attr_in8_input.dev_attr.attr,       /* 40 */
2077         &sensor_dev_attr_in9_input.dev_attr.attr,       /* 41 */
2078         &sensor_dev_attr_in10_input.dev_attr.attr,      /* 41 */
2079         &sensor_dev_attr_in11_input.dev_attr.attr,      /* 41 */
2080         &sensor_dev_attr_in12_input.dev_attr.attr,      /* 41 */
2081         NULL
2082 };
2083
2084 static const struct attribute_group it87_group_in = {
2085         .attrs = it87_attributes_in,
2086         .is_visible = it87_in_is_visible,
2087 };
2088
2089 static umode_t it87_temp_is_visible(struct kobject *kobj,
2090                                     struct attribute *attr, int index)
2091 {
2092         struct device *dev = container_of(kobj, struct device, kobj);
2093         struct it87_data *data = dev_get_drvdata(dev);
2094         int i = index / 7;      /* temperature index */
2095         int a = index % 7;      /* attribute index */
2096
2097         if (index >= 21) {
2098                 i = index - 21 + 3;
2099                 a = 0;
2100         }
2101
2102         if (!(data->has_temp & BIT(i)))
2103                 return 0;
2104
2105         if (a == 5 && !has_temp_offset(data))
2106                 return 0;
2107
2108         if (a == 6 && !data->has_beep)
2109                 return 0;
2110
2111         return attr->mode;
2112 }
2113
2114 static struct attribute *it87_attributes_temp[] = {
2115         &sensor_dev_attr_temp1_input.dev_attr.attr,
2116         &sensor_dev_attr_temp1_max.dev_attr.attr,
2117         &sensor_dev_attr_temp1_min.dev_attr.attr,
2118         &sensor_dev_attr_temp1_type.dev_attr.attr,
2119         &sensor_dev_attr_temp1_alarm.dev_attr.attr,
2120         &sensor_dev_attr_temp1_offset.dev_attr.attr,    /* 5 */
2121         &sensor_dev_attr_temp1_beep.dev_attr.attr,      /* 6 */
2122
2123         &sensor_dev_attr_temp2_input.dev_attr.attr,     /* 7 */
2124         &sensor_dev_attr_temp2_max.dev_attr.attr,
2125         &sensor_dev_attr_temp2_min.dev_attr.attr,
2126         &sensor_dev_attr_temp2_type.dev_attr.attr,
2127         &sensor_dev_attr_temp2_alarm.dev_attr.attr,
2128         &sensor_dev_attr_temp2_offset.dev_attr.attr,
2129         &sensor_dev_attr_temp2_beep.dev_attr.attr,
2130
2131         &sensor_dev_attr_temp3_input.dev_attr.attr,     /* 14 */
2132         &sensor_dev_attr_temp3_max.dev_attr.attr,
2133         &sensor_dev_attr_temp3_min.dev_attr.attr,
2134         &sensor_dev_attr_temp3_type.dev_attr.attr,
2135         &sensor_dev_attr_temp3_alarm.dev_attr.attr,
2136         &sensor_dev_attr_temp3_offset.dev_attr.attr,
2137         &sensor_dev_attr_temp3_beep.dev_attr.attr,
2138
2139         &sensor_dev_attr_temp4_input.dev_attr.attr,     /* 21 */
2140         &sensor_dev_attr_temp5_input.dev_attr.attr,
2141         &sensor_dev_attr_temp6_input.dev_attr.attr,
2142         NULL
2143 };
2144
2145 static const struct attribute_group it87_group_temp = {
2146         .attrs = it87_attributes_temp,
2147         .is_visible = it87_temp_is_visible,
2148 };
2149
2150 static umode_t it87_is_visible(struct kobject *kobj,
2151                                struct attribute *attr, int index)
2152 {
2153         struct device *dev = container_of(kobj, struct device, kobj);
2154         struct it87_data *data = dev_get_drvdata(dev);
2155
2156         if ((index == 2 || index == 3) && !data->has_vid)
2157                 return 0;
2158
2159         if (index > 3 && !(data->in_internal & BIT(index - 4)))
2160                 return 0;
2161
2162         return attr->mode;
2163 }
2164
2165 static struct attribute *it87_attributes[] = {
2166         &dev_attr_alarms.attr,
2167         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
2168         &dev_attr_vrm.attr,                             /* 2 */
2169         &dev_attr_cpu0_vid.attr,                        /* 3 */
2170         &sensor_dev_attr_in3_label.dev_attr.attr,       /* 4 .. 7 */
2171         &sensor_dev_attr_in7_label.dev_attr.attr,
2172         &sensor_dev_attr_in8_label.dev_attr.attr,
2173         &sensor_dev_attr_in9_label.dev_attr.attr,
2174         NULL
2175 };
2176
2177 static const struct attribute_group it87_group = {
2178         .attrs = it87_attributes,
2179         .is_visible = it87_is_visible,
2180 };
2181
2182 static umode_t it87_fan_is_visible(struct kobject *kobj,
2183                                    struct attribute *attr, int index)
2184 {
2185         struct device *dev = container_of(kobj, struct device, kobj);
2186         struct it87_data *data = dev_get_drvdata(dev);
2187         int i = index / 5;      /* fan index */
2188         int a = index % 5;      /* attribute index */
2189
2190         if (index >= 15) {      /* fan 4..6 don't have divisor attributes */
2191                 i = (index - 15) / 4 + 3;
2192                 a = (index - 15) % 4;
2193         }
2194
2195         if (!(data->has_fan & BIT(i)))
2196                 return 0;
2197
2198         if (a == 3) {                           /* beep */
2199                 if (!data->has_beep)
2200                         return 0;
2201                 /* first fan beep attribute is writable */
2202                 if (i == __ffs(data->has_fan))
2203                         return attr->mode | S_IWUSR;
2204         }
2205
2206         if (a == 4 && has_16bit_fans(data))     /* divisor */
2207                 return 0;
2208
2209         return attr->mode;
2210 }
2211
2212 static struct attribute *it87_attributes_fan[] = {
2213         &sensor_dev_attr_fan1_input.dev_attr.attr,
2214         &sensor_dev_attr_fan1_min.dev_attr.attr,
2215         &sensor_dev_attr_fan1_alarm.dev_attr.attr,
2216         &sensor_dev_attr_fan1_beep.dev_attr.attr,       /* 3 */
2217         &sensor_dev_attr_fan1_div.dev_attr.attr,        /* 4 */
2218
2219         &sensor_dev_attr_fan2_input.dev_attr.attr,
2220         &sensor_dev_attr_fan2_min.dev_attr.attr,
2221         &sensor_dev_attr_fan2_alarm.dev_attr.attr,
2222         &sensor_dev_attr_fan2_beep.dev_attr.attr,
2223         &sensor_dev_attr_fan2_div.dev_attr.attr,        /* 9 */
2224
2225         &sensor_dev_attr_fan3_input.dev_attr.attr,
2226         &sensor_dev_attr_fan3_min.dev_attr.attr,
2227         &sensor_dev_attr_fan3_alarm.dev_attr.attr,
2228         &sensor_dev_attr_fan3_beep.dev_attr.attr,
2229         &sensor_dev_attr_fan3_div.dev_attr.attr,        /* 14 */
2230
2231         &sensor_dev_attr_fan4_input.dev_attr.attr,      /* 15 */
2232         &sensor_dev_attr_fan4_min.dev_attr.attr,
2233         &sensor_dev_attr_fan4_alarm.dev_attr.attr,
2234         &sensor_dev_attr_fan4_beep.dev_attr.attr,
2235
2236         &sensor_dev_attr_fan5_input.dev_attr.attr,      /* 19 */
2237         &sensor_dev_attr_fan5_min.dev_attr.attr,
2238         &sensor_dev_attr_fan5_alarm.dev_attr.attr,
2239         &sensor_dev_attr_fan5_beep.dev_attr.attr,
2240
2241         &sensor_dev_attr_fan6_input.dev_attr.attr,      /* 23 */
2242         &sensor_dev_attr_fan6_min.dev_attr.attr,
2243         &sensor_dev_attr_fan6_alarm.dev_attr.attr,
2244         &sensor_dev_attr_fan6_beep.dev_attr.attr,
2245         NULL
2246 };
2247
2248 static const struct attribute_group it87_group_fan = {
2249         .attrs = it87_attributes_fan,
2250         .is_visible = it87_fan_is_visible,
2251 };
2252
2253 static umode_t it87_pwm_is_visible(struct kobject *kobj,
2254                                    struct attribute *attr, int index)
2255 {
2256         struct device *dev = container_of(kobj, struct device, kobj);
2257         struct it87_data *data = dev_get_drvdata(dev);
2258         int i = index / 4;      /* pwm index */
2259         int a = index % 4;      /* attribute index */
2260
2261         if (!(data->has_pwm & BIT(i)))
2262                 return 0;
2263
2264         /* pwmX_auto_channels_temp is only writable if auto pwm is supported */
2265         if (a == 3 && (has_old_autopwm(data) || has_newer_autopwm(data)))
2266                 return attr->mode | S_IWUSR;
2267
2268         /* pwm2_freq is writable if there are two pwm frequency selects */
2269         if (has_pwm_freq2(data) && i == 1 && a == 2)
2270                 return attr->mode | S_IWUSR;
2271
2272         return attr->mode;
2273 }
2274
2275 static struct attribute *it87_attributes_pwm[] = {
2276         &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2277         &sensor_dev_attr_pwm1.dev_attr.attr,
2278         &sensor_dev_attr_pwm1_freq.dev_attr.attr,
2279         &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
2280
2281         &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2282         &sensor_dev_attr_pwm2.dev_attr.attr,
2283         &sensor_dev_attr_pwm2_freq.dev_attr.attr,
2284         &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
2285
2286         &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2287         &sensor_dev_attr_pwm3.dev_attr.attr,
2288         &sensor_dev_attr_pwm3_freq.dev_attr.attr,
2289         &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
2290
2291         &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2292         &sensor_dev_attr_pwm4.dev_attr.attr,
2293         &sensor_dev_attr_pwm4_freq.dev_attr.attr,
2294         &sensor_dev_attr_pwm4_auto_channels_temp.dev_attr.attr,
2295
2296         &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2297         &sensor_dev_attr_pwm5.dev_attr.attr,
2298         &sensor_dev_attr_pwm5_freq.dev_attr.attr,
2299         &sensor_dev_attr_pwm5_auto_channels_temp.dev_attr.attr,
2300
2301         &sensor_dev_attr_pwm6_enable.dev_attr.attr,
2302         &sensor_dev_attr_pwm6.dev_attr.attr,
2303         &sensor_dev_attr_pwm6_freq.dev_attr.attr,
2304         &sensor_dev_attr_pwm6_auto_channels_temp.dev_attr.attr,
2305
2306         NULL
2307 };
2308
2309 static const struct attribute_group it87_group_pwm = {
2310         .attrs = it87_attributes_pwm,
2311         .is_visible = it87_pwm_is_visible,
2312 };
2313
2314 static umode_t it87_auto_pwm_is_visible(struct kobject *kobj,
2315                                         struct attribute *attr, int index)
2316 {
2317         struct device *dev = container_of(kobj, struct device, kobj);
2318         struct it87_data *data = dev_get_drvdata(dev);
2319         int i = index / 11;     /* pwm index */
2320         int a = index % 11;     /* attribute index */
2321
2322         if (index >= 33) {      /* pwm 4..6 */
2323                 i = (index - 33) / 6 + 3;
2324                 a = (index - 33) % 6 + 4;
2325         }
2326
2327         if (!(data->has_pwm & BIT(i)))
2328                 return 0;
2329
2330         if (has_newer_autopwm(data)) {
2331                 if (a < 4)      /* no auto point pwm */
2332                         return 0;
2333                 if (a == 8)     /* no auto_point4 */
2334                         return 0;
2335         }
2336         if (has_old_autopwm(data)) {
2337                 if (a >= 9)     /* no pwm_auto_start, pwm_auto_slope */
2338                         return 0;
2339         }
2340
2341         return attr->mode;
2342 }
2343
2344 static struct attribute *it87_attributes_auto_pwm[] = {
2345         &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
2346         &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
2347         &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
2348         &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
2349         &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
2350         &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
2351         &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
2352         &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
2353         &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
2354         &sensor_dev_attr_pwm1_auto_start.dev_attr.attr,
2355         &sensor_dev_attr_pwm1_auto_slope.dev_attr.attr,
2356
2357         &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,    /* 11 */
2358         &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
2359         &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
2360         &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
2361         &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
2362         &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
2363         &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
2364         &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
2365         &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
2366         &sensor_dev_attr_pwm2_auto_start.dev_attr.attr,
2367         &sensor_dev_attr_pwm2_auto_slope.dev_attr.attr,
2368
2369         &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,    /* 22 */
2370         &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
2371         &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
2372         &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
2373         &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
2374         &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
2375         &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
2376         &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
2377         &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
2378         &sensor_dev_attr_pwm3_auto_start.dev_attr.attr,
2379         &sensor_dev_attr_pwm3_auto_slope.dev_attr.attr,
2380
2381         &sensor_dev_attr_pwm4_auto_point1_temp.dev_attr.attr,   /* 33 */
2382         &sensor_dev_attr_pwm4_auto_point1_temp_hyst.dev_attr.attr,
2383         &sensor_dev_attr_pwm4_auto_point2_temp.dev_attr.attr,
2384         &sensor_dev_attr_pwm4_auto_point3_temp.dev_attr.attr,
2385         &sensor_dev_attr_pwm4_auto_start.dev_attr.attr,
2386         &sensor_dev_attr_pwm4_auto_slope.dev_attr.attr,
2387
2388         &sensor_dev_attr_pwm5_auto_point1_temp.dev_attr.attr,
2389         &sensor_dev_attr_pwm5_auto_point1_temp_hyst.dev_attr.attr,
2390         &sensor_dev_attr_pwm5_auto_point2_temp.dev_attr.attr,
2391         &sensor_dev_attr_pwm5_auto_point3_temp.dev_attr.attr,
2392         &sensor_dev_attr_pwm5_auto_start.dev_attr.attr,
2393         &sensor_dev_attr_pwm5_auto_slope.dev_attr.attr,
2394
2395         &sensor_dev_attr_pwm6_auto_point1_temp.dev_attr.attr,
2396         &sensor_dev_attr_pwm6_auto_point1_temp_hyst.dev_attr.attr,
2397         &sensor_dev_attr_pwm6_auto_point2_temp.dev_attr.attr,
2398         &sensor_dev_attr_pwm6_auto_point3_temp.dev_attr.attr,
2399         &sensor_dev_attr_pwm6_auto_start.dev_attr.attr,
2400         &sensor_dev_attr_pwm6_auto_slope.dev_attr.attr,
2401
2402         NULL,
2403 };
2404
2405 static const struct attribute_group it87_group_auto_pwm = {
2406         .attrs = it87_attributes_auto_pwm,
2407         .is_visible = it87_auto_pwm_is_visible,
2408 };
2409
2410 /* SuperIO detection - will change isa_address if a chip is found */
2411 static int __init it87_find(int sioaddr, unsigned short *address,
2412                             struct it87_sio_data *sio_data)
2413 {
2414         int err;
2415         u16 chip_type;
2416         const char *board_vendor, *board_name;
2417         const struct it87_devices *config;
2418
2419         err = superio_enter(sioaddr);
2420         if (err)
2421                 return err;
2422
2423         err = -ENODEV;
2424         chip_type = force_id ? force_id : superio_inw(sioaddr, DEVID);
2425
2426         switch (chip_type) {
2427         case IT8705F_DEVID:
2428                 sio_data->type = it87;
2429                 break;
2430         case IT8712F_DEVID:
2431                 sio_data->type = it8712;
2432                 break;
2433         case IT8716F_DEVID:
2434         case IT8726F_DEVID:
2435                 sio_data->type = it8716;
2436                 break;
2437         case IT8718F_DEVID:
2438                 sio_data->type = it8718;
2439                 break;
2440         case IT8720F_DEVID:
2441                 sio_data->type = it8720;
2442                 break;
2443         case IT8721F_DEVID:
2444                 sio_data->type = it8721;
2445                 break;
2446         case IT8728F_DEVID:
2447                 sio_data->type = it8728;
2448                 break;
2449         case IT8732F_DEVID:
2450                 sio_data->type = it8732;
2451                 break;
2452         case IT8792E_DEVID:
2453                 sio_data->type = it8792;
2454                 break;
2455         case IT8771E_DEVID:
2456                 sio_data->type = it8771;
2457                 break;
2458         case IT8772E_DEVID:
2459                 sio_data->type = it8772;
2460                 break;
2461         case IT8781F_DEVID:
2462                 sio_data->type = it8781;
2463                 break;
2464         case IT8782F_DEVID:
2465                 sio_data->type = it8782;
2466                 break;
2467         case IT8783E_DEVID:
2468                 sio_data->type = it8783;
2469                 break;
2470         case IT8786E_DEVID:
2471                 sio_data->type = it8786;
2472                 break;
2473         case IT8790E_DEVID:
2474                 sio_data->type = it8790;
2475                 break;
2476         case IT8603E_DEVID:
2477         case IT8623E_DEVID:
2478                 sio_data->type = it8603;
2479                 break;
2480         case IT8607E_DEVID:
2481                 sio_data->type = it8607;
2482                 break;
2483         case IT8620E_DEVID:
2484                 sio_data->type = it8620;
2485                 break;
2486         case IT8622E_DEVID:
2487                 sio_data->type = it8622;
2488                 break;
2489         case IT8628E_DEVID:
2490                 sio_data->type = it8628;
2491                 break;
2492         case 0xffff:    /* No device at all */
2493                 goto exit;
2494         default:
2495                 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
2496                 goto exit;
2497         }
2498
2499         superio_select(sioaddr, PME);
2500         if (!(superio_inb(sioaddr, IT87_ACT_REG) & 0x01)) {
2501                 pr_info("Device not activated, skipping\n");
2502                 goto exit;
2503         }
2504
2505         *address = superio_inw(sioaddr, IT87_BASE_REG) & ~(IT87_EXTENT - 1);
2506         if (*address == 0) {
2507                 pr_info("Base address not set, skipping\n");
2508                 goto exit;
2509         }
2510
2511         err = 0;
2512         sio_data->revision = superio_inb(sioaddr, DEVREV) & 0x0f;
2513         pr_info("Found IT%04x%s chip at 0x%x, revision %d\n", chip_type,
2514                 it87_devices[sio_data->type].suffix,
2515                 *address, sio_data->revision);
2516
2517         config = &it87_devices[sio_data->type];
2518
2519         /* in7 (VSB or VCCH5V) is always internal on some chips */
2520         if (has_in7_internal(config))
2521                 sio_data->internal |= BIT(1);
2522
2523         /* in8 (Vbat) is always internal */
2524         sio_data->internal |= BIT(2);
2525
2526         /* in9 (AVCC3), always internal if supported */
2527         if (has_avcc3(config))
2528                 sio_data->internal |= BIT(3); /* in9 is AVCC */
2529         else
2530                 sio_data->skip_in |= BIT(9);
2531
2532         if (!has_four_pwm(config))
2533                 sio_data->skip_pwm |= BIT(3) | BIT(4) | BIT(5);
2534         else if (!has_five_pwm(config))
2535                 sio_data->skip_pwm |= BIT(4) | BIT(5);
2536         else if (!has_six_pwm(config))
2537                 sio_data->skip_pwm |= BIT(5);
2538
2539         if (!has_vid(config))
2540                 sio_data->skip_vid = 1;
2541
2542         /* Read GPIO config and VID value from LDN 7 (GPIO) */
2543         if (sio_data->type == it87) {
2544                 /* The IT8705F has a different LD number for GPIO */
2545                 superio_select(sioaddr, 5);
2546                 sio_data->beep_pin = superio_inb(sioaddr,
2547                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2548         } else if (sio_data->type == it8783) {
2549                 int reg25, reg27, reg2a, reg2c, regef;
2550
2551                 superio_select(sioaddr, GPIO);
2552
2553                 reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2554                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2555                 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
2556                 reg2c = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2557                 regef = superio_inb(sioaddr, IT87_SIO_SPI_REG);
2558
2559                 /* Check if fan3 is there or not */
2560                 if ((reg27 & BIT(0)) || !(reg2c & BIT(2)))
2561                         sio_data->skip_fan |= BIT(2);
2562                 if ((reg25 & BIT(4)) ||
2563                     (!(reg2a & BIT(1)) && (regef & BIT(0))))
2564                         sio_data->skip_pwm |= BIT(2);
2565
2566                 /* Check if fan2 is there or not */
2567                 if (reg27 & BIT(7))
2568                         sio_data->skip_fan |= BIT(1);
2569                 if (reg27 & BIT(3))
2570                         sio_data->skip_pwm |= BIT(1);
2571
2572                 /* VIN5 */
2573                 if ((reg27 & BIT(0)) || (reg2c & BIT(2)))
2574                         sio_data->skip_in |= BIT(5); /* No VIN5 */
2575
2576                 /* VIN6 */
2577                 if (reg27 & BIT(1))
2578                         sio_data->skip_in |= BIT(6); /* No VIN6 */
2579
2580                 /*
2581                  * VIN7
2582                  * Does not depend on bit 2 of Reg2C, contrary to datasheet.
2583                  */
2584                 if (reg27 & BIT(2)) {
2585                         /*
2586                          * The data sheet is a bit unclear regarding the
2587                          * internal voltage divider for VCCH5V. It says
2588                          * "This bit enables and switches VIN7 (pin 91) to the
2589                          * internal voltage divider for VCCH5V".
2590                          * This is different to other chips, where the internal
2591                          * voltage divider would connect VIN7 to an internal
2592                          * voltage source. Maybe that is the case here as well.
2593                          *
2594                          * Since we don't know for sure, re-route it if that is
2595                          * not the case, and ask the user to report if the
2596                          * resulting voltage is sane.
2597                          */
2598                         if (!(reg2c & BIT(1))) {
2599                                 reg2c |= BIT(1);
2600                                 superio_outb(sioaddr, IT87_SIO_PINX2_REG,
2601                                              reg2c);
2602                                 pr_notice("Routing internal VCCH5V to in7.\n");
2603                         }
2604                         pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
2605                         pr_notice("Please report if it displays a reasonable voltage.\n");
2606                 }
2607
2608                 if (reg2c & BIT(0))
2609                         sio_data->internal |= BIT(0);
2610                 if (reg2c & BIT(1))
2611                         sio_data->internal |= BIT(1);
2612
2613                 sio_data->beep_pin = superio_inb(sioaddr,
2614                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2615         } else if (sio_data->type == it8603 || sio_data->type == it8607) {
2616                 int reg27, reg29;
2617
2618                 superio_select(sioaddr, GPIO);
2619
2620                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2621
2622                 /* Check if fan3 is there or not */
2623                 if (reg27 & BIT(6))
2624                         sio_data->skip_pwm |= BIT(2);
2625                 if (reg27 & BIT(7))
2626                         sio_data->skip_fan |= BIT(2);
2627
2628                 /* Check if fan2 is there or not */
2629                 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2630                 if (reg29 & BIT(1))
2631                         sio_data->skip_pwm |= BIT(1);
2632                 if (reg29 & BIT(2))
2633                         sio_data->skip_fan |= BIT(1);
2634
2635                 if (sio_data->type == it8603) {
2636                         sio_data->skip_in |= BIT(5); /* No VIN5 */
2637                         sio_data->skip_in |= BIT(6); /* No VIN6 */
2638                 }
2639
2640                 sio_data->beep_pin = superio_inb(sioaddr,
2641                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2642         } else if (sio_data->type == it8620 || sio_data->type == it8628) {
2643                 int reg;
2644
2645                 superio_select(sioaddr, GPIO);
2646
2647                 /* Check for pwm5 */
2648                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2649                 if (reg & BIT(6))
2650                         sio_data->skip_pwm |= BIT(4);
2651
2652                 /* Check for fan4, fan5 */
2653                 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2654                 if (!(reg & BIT(5)))
2655                         sio_data->skip_fan |= BIT(3);
2656                 if (!(reg & BIT(4)))
2657                         sio_data->skip_fan |= BIT(4);
2658
2659                 /* Check for pwm3, fan3 */
2660                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2661                 if (reg & BIT(6))
2662                         sio_data->skip_pwm |= BIT(2);
2663                 if (reg & BIT(7))
2664                         sio_data->skip_fan |= BIT(2);
2665
2666                 /* Check for pwm4 */
2667                 reg = superio_inb(sioaddr, IT87_SIO_GPIO4_REG);
2668                 if (reg & BIT(2))
2669                         sio_data->skip_pwm |= BIT(3);
2670
2671                 /* Check for pwm2, fan2 */
2672                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2673                 if (reg & BIT(1))
2674                         sio_data->skip_pwm |= BIT(1);
2675                 if (reg & BIT(2))
2676                         sio_data->skip_fan |= BIT(1);
2677                 /* Check for pwm6, fan6 */
2678                 if (!(reg & BIT(7))) {
2679                         sio_data->skip_pwm |= BIT(5);
2680                         sio_data->skip_fan |= BIT(5);
2681                 }
2682
2683                 /* Check if AVCC is on VIN3 */
2684                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2685                 if (reg & BIT(0))
2686                         sio_data->internal |= BIT(0);
2687                 else
2688                         sio_data->skip_in |= BIT(9);
2689
2690                 sio_data->beep_pin = superio_inb(sioaddr,
2691                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2692         } else if (sio_data->type == it8622) {
2693                 int reg;
2694
2695                 superio_select(sioaddr, GPIO);
2696
2697                 /* Check for pwm4, fan4 */
2698                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2699                 if (reg & BIT(6))
2700                         sio_data->skip_fan |= BIT(3);
2701                 if (reg & BIT(5))
2702                         sio_data->skip_pwm |= BIT(3);
2703
2704                 /* Check for pwm3, fan3, pwm5, fan5 */
2705                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2706                 if (reg & BIT(6))
2707                         sio_data->skip_pwm |= BIT(2);
2708                 if (reg & BIT(7))
2709                         sio_data->skip_fan |= BIT(2);
2710                 if (reg & BIT(3))
2711                         sio_data->skip_pwm |= BIT(4);
2712                 if (reg & BIT(1))
2713                         sio_data->skip_fan |= BIT(4);
2714
2715                 /* Check for pwm2, fan2 */
2716                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2717                 if (reg & BIT(1))
2718                         sio_data->skip_pwm |= BIT(1);
2719                 if (reg & BIT(2))
2720                         sio_data->skip_fan |= BIT(1);
2721
2722                 /* Check for AVCC */
2723                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2724                 if (!(reg & BIT(0)))
2725                         sio_data->skip_in |= BIT(9);
2726
2727                 sio_data->beep_pin = superio_inb(sioaddr,
2728                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2729         } else if (sio_data->type == it8732) {
2730                 int reg;
2731
2732                 superio_select(sioaddr, GPIO);
2733
2734                 /* Check for pwm2, fan2 */
2735                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2736                 if (reg & BIT(1))
2737                         sio_data->skip_pwm |= BIT(1);
2738                 if (reg & BIT(2))
2739                         sio_data->skip_fan |= BIT(1);
2740
2741                 /* Check for pwm3, fan3, fan4 */
2742                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2743                 if (reg & BIT(6))
2744                         sio_data->skip_pwm |= BIT(2);
2745                 if (reg & BIT(7))
2746                         sio_data->skip_fan |= BIT(2);
2747                 if (reg & BIT(5))
2748                         sio_data->skip_fan |= BIT(3);
2749
2750                 /* Check if AVCC is on VIN3 */
2751                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2752                 if (reg & BIT(0))
2753                         sio_data->internal |= BIT(0);
2754
2755                 sio_data->beep_pin = superio_inb(sioaddr,
2756                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2757         } else {
2758                 int reg;
2759                 bool uart6;
2760
2761                 superio_select(sioaddr, GPIO);
2762
2763                 /* Check for fan4, fan5 */
2764                 if (has_five_fans(config)) {
2765                         reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2766                         switch (sio_data->type) {
2767                         case it8718:
2768                                 if (reg & BIT(5))
2769                                         sio_data->skip_fan |= BIT(3);
2770                                 if (reg & BIT(4))
2771                                         sio_data->skip_fan |= BIT(4);
2772                                 break;
2773                         case it8720:
2774                         case it8721:
2775                         case it8728:
2776                                 if (!(reg & BIT(5)))
2777                                         sio_data->skip_fan |= BIT(3);
2778                                 if (!(reg & BIT(4)))
2779                                         sio_data->skip_fan |= BIT(4);
2780                                 break;
2781                         default:
2782                                 break;
2783                         }
2784                 }
2785
2786                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2787                 if (!sio_data->skip_vid) {
2788                         /* We need at least 4 VID pins */
2789                         if (reg & 0x0f) {
2790                                 pr_info("VID is disabled (pins used for GPIO)\n");
2791                                 sio_data->skip_vid = 1;
2792                         }
2793                 }
2794
2795                 /* Check if fan3 is there or not */
2796                 if (reg & BIT(6))
2797                         sio_data->skip_pwm |= BIT(2);
2798                 if (reg & BIT(7))
2799                         sio_data->skip_fan |= BIT(2);
2800
2801                 /* Check if fan2 is there or not */
2802                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2803                 if (reg & BIT(1))
2804                         sio_data->skip_pwm |= BIT(1);
2805                 if (reg & BIT(2))
2806                         sio_data->skip_fan |= BIT(1);
2807
2808                 if ((sio_data->type == it8718 || sio_data->type == it8720) &&
2809                     !(sio_data->skip_vid))
2810                         sio_data->vid_value = superio_inb(sioaddr,
2811                                                           IT87_SIO_VID_REG);
2812
2813                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2814
2815                 uart6 = sio_data->type == it8782 && (reg & BIT(2));
2816
2817                 /*
2818                  * The IT8720F has no VIN7 pin, so VCCH should always be
2819                  * routed internally to VIN7 with an internal divider.
2820                  * Curiously, there still is a configuration bit to control
2821                  * this, which means it can be set incorrectly. And even
2822                  * more curiously, many boards out there are improperly
2823                  * configured, even though the IT8720F datasheet claims
2824                  * that the internal routing of VCCH to VIN7 is the default
2825                  * setting. So we force the internal routing in this case.
2826                  *
2827                  * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
2828                  * If UART6 is enabled, re-route VIN7 to the internal divider
2829                  * if that is not already the case.
2830                  */
2831                 if ((sio_data->type == it8720 || uart6) && !(reg & BIT(1))) {
2832                         reg |= BIT(1);
2833                         superio_outb(sioaddr, IT87_SIO_PINX2_REG, reg);
2834                         pr_notice("Routing internal VCCH to in7\n");
2835                 }
2836                 if (reg & BIT(0))
2837                         sio_data->internal |= BIT(0);
2838                 if (reg & BIT(1))
2839                         sio_data->internal |= BIT(1);
2840
2841                 /*
2842                  * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
2843                  * While VIN7 can be routed to the internal voltage divider,
2844                  * VIN5 and VIN6 are not available if UART6 is enabled.
2845                  *
2846                  * Also, temp3 is not available if UART6 is enabled and TEMPIN3
2847                  * is the temperature source. Since we can not read the
2848                  * temperature source here, skip_temp is preliminary.
2849                  */
2850                 if (uart6) {
2851                         sio_data->skip_in |= BIT(5) | BIT(6);
2852                         sio_data->skip_temp |= BIT(2);
2853                 }
2854
2855                 sio_data->beep_pin = superio_inb(sioaddr,
2856                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2857         }
2858         if (sio_data->beep_pin)
2859                 pr_info("Beeping is supported\n");
2860
2861         /* Disable specific features based on DMI strings */
2862         board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
2863         board_name = dmi_get_system_info(DMI_BOARD_NAME);
2864         if (board_vendor && board_name) {
2865                 if (strcmp(board_vendor, "nVIDIA") == 0 &&
2866                     strcmp(board_name, "FN68PT") == 0) {
2867                         /*
2868                          * On the Shuttle SN68PT, FAN_CTL2 is apparently not
2869                          * connected to a fan, but to something else. One user
2870                          * has reported instant system power-off when changing
2871                          * the PWM2 duty cycle, so we disable it.
2872                          * I use the board name string as the trigger in case
2873                          * the same board is ever used in other systems.
2874                          */
2875                         pr_info("Disabling pwm2 due to hardware constraints\n");
2876                         sio_data->skip_pwm = BIT(1);
2877                 }
2878         }
2879
2880 exit:
2881         superio_exit(sioaddr);
2882         return err;
2883 }
2884
2885 /* Called when we have found a new IT87. */
2886 static void it87_init_device(struct platform_device *pdev)
2887 {
2888         struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
2889         struct it87_data *data = platform_get_drvdata(pdev);
2890         int tmp, i;
2891         u8 mask;
2892
2893         /*
2894          * For each PWM channel:
2895          * - If it is in automatic mode, setting to manual mode should set
2896          *   the fan to full speed by default.
2897          * - If it is in manual mode, we need a mapping to temperature
2898          *   channels to use when later setting to automatic mode later.
2899          *   Use a 1:1 mapping by default (we are clueless.)
2900          * In both cases, the value can (and should) be changed by the user
2901          * prior to switching to a different mode.
2902          * Note that this is no longer needed for the IT8721F and later, as
2903          * these have separate registers for the temperature mapping and the
2904          * manual duty cycle.
2905          */
2906         for (i = 0; i < NUM_AUTO_PWM; i++) {
2907                 data->pwm_temp_map[i] = i;
2908                 data->pwm_duty[i] = 0x7f;       /* Full speed */
2909                 data->auto_pwm[i][3] = 0x7f;    /* Full speed, hard-coded */
2910         }
2911
2912         /*
2913          * Some chips seem to have default value 0xff for all limit
2914          * registers. For low voltage limits it makes no sense and triggers
2915          * alarms, so change to 0 instead. For high temperature limits, it
2916          * means -1 degree C, which surprisingly doesn't trigger an alarm,
2917          * but is still confusing, so change to 127 degrees C.
2918          */
2919         for (i = 0; i < NUM_VIN_LIMIT; i++) {
2920                 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
2921                 if (tmp == 0xff)
2922                         it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
2923         }
2924         for (i = 0; i < NUM_TEMP_LIMIT; i++) {
2925                 tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
2926                 if (tmp == 0xff)
2927                         it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
2928         }
2929
2930         /*
2931          * Temperature channels are not forcibly enabled, as they can be
2932          * set to two different sensor types and we can't guess which one
2933          * is correct for a given system. These channels can be enabled at
2934          * run-time through the temp{1-3}_type sysfs accessors if needed.
2935          */
2936
2937         /* Check if voltage monitors are reset manually or by some reason */
2938         tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
2939         if ((tmp & 0xff) == 0) {
2940                 /* Enable all voltage monitors */
2941                 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
2942         }
2943
2944         /* Check if tachometers are reset manually or by some reason */
2945         mask = 0x70 & ~(sio_data->skip_fan << 4);
2946         data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
2947         if ((data->fan_main_ctrl & mask) == 0) {
2948                 /* Enable all fan tachometers */
2949                 data->fan_main_ctrl |= mask;
2950                 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
2951                                  data->fan_main_ctrl);
2952         }
2953         data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
2954
2955         tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
2956
2957         /* Set tachometers to 16-bit mode if needed */
2958         if (has_fan16_config(data)) {
2959                 if (~tmp & 0x07 & data->has_fan) {
2960                         dev_dbg(&pdev->dev,
2961                                 "Setting fan1-3 to 16-bit mode\n");
2962                         it87_write_value(data, IT87_REG_FAN_16BIT,
2963                                          tmp | 0x07);
2964                 }
2965         }
2966
2967         /* Check for additional fans */
2968         if (has_four_fans(data) && (tmp & BIT(4)))
2969                 data->has_fan |= BIT(3); /* fan4 enabled */
2970         if (has_five_fans(data) && (tmp & BIT(5)))
2971                 data->has_fan |= BIT(4); /* fan5 enabled */
2972         if (!has_fan16_config(data) && has_six_fans(data) && (tmp & BIT(2)))
2973                 data->has_fan |= BIT(5); /* fan6 enabled */
2974
2975         /* Fan input pins may be used for alternative functions */
2976         data->has_fan &= ~sio_data->skip_fan;
2977
2978         /* Check if pwm5, pwm6 are enabled */
2979         if (has_six_pwm(data)) {
2980                 /* The following code may be IT8620E specific */
2981                 tmp = it87_read_value(data, IT87_REG_FAN_DIV);
2982                 if ((tmp & 0xc0) == 0xc0)
2983                         sio_data->skip_pwm |= BIT(4);
2984                 if (!(tmp & BIT(3)))
2985                         sio_data->skip_pwm |= BIT(5);
2986         }
2987
2988         /* Start monitoring */
2989         it87_write_value(data, IT87_REG_CONFIG,
2990                          (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
2991                          | (update_vbat ? 0x41 : 0x01));
2992 }
2993
2994 /* Return 1 if and only if the PWM interface is safe to use */
2995 static int it87_check_pwm(struct device *dev)
2996 {
2997         struct it87_data *data = dev_get_drvdata(dev);
2998         /*
2999          * Some BIOSes fail to correctly configure the IT87 fans. All fans off
3000          * and polarity set to active low is sign that this is the case so we
3001          * disable pwm control to protect the user.
3002          */
3003         int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
3004
3005         if ((tmp & 0x87) == 0) {
3006                 if (fix_pwm_polarity) {
3007                         /*
3008                          * The user asks us to attempt a chip reconfiguration.
3009                          * This means switching to active high polarity and
3010                          * inverting all fan speed values.
3011                          */
3012                         int i;
3013                         u8 pwm[3];
3014
3015                         for (i = 0; i < ARRAY_SIZE(pwm); i++)
3016                                 pwm[i] = it87_read_value(data,
3017                                                          IT87_REG_PWM[i]);
3018
3019                         /*
3020                          * If any fan is in automatic pwm mode, the polarity
3021                          * might be correct, as suspicious as it seems, so we
3022                          * better don't change anything (but still disable the
3023                          * PWM interface).
3024                          */
3025                         if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
3026                                 dev_info(dev,
3027                                          "Reconfiguring PWM to active high polarity\n");
3028                                 it87_write_value(data, IT87_REG_FAN_CTL,
3029                                                  tmp | 0x87);
3030                                 for (i = 0; i < 3; i++)
3031                                         it87_write_value(data,
3032                                                          IT87_REG_PWM[i],
3033                                                          0x7f & ~pwm[i]);
3034                                 return 1;
3035                         }
3036
3037                         dev_info(dev,
3038                                  "PWM configuration is too broken to be fixed\n");
3039                 }
3040
3041                 dev_info(dev,
3042                          "Detected broken BIOS defaults, disabling PWM interface\n");
3043                 return 0;
3044         } else if (fix_pwm_polarity) {
3045                 dev_info(dev,
3046                          "PWM configuration looks sane, won't touch\n");
3047         }
3048
3049         return 1;
3050 }
3051
3052 static int it87_probe(struct platform_device *pdev)
3053 {
3054         struct it87_data *data;
3055         struct resource *res;
3056         struct device *dev = &pdev->dev;
3057         struct it87_sio_data *sio_data = dev_get_platdata(dev);
3058         int enable_pwm_interface;
3059         struct device *hwmon_dev;
3060
3061         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3062         if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
3063                                  DRVNAME)) {
3064                 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
3065                         (unsigned long)res->start,
3066                         (unsigned long)(res->start + IT87_EC_EXTENT - 1));
3067                 return -EBUSY;
3068         }
3069
3070         data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
3071         if (!data)
3072                 return -ENOMEM;
3073
3074         data->addr = res->start;
3075         data->type = sio_data->type;
3076         data->features = it87_devices[sio_data->type].features;
3077         data->peci_mask = it87_devices[sio_data->type].peci_mask;
3078         data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
3079         /*
3080          * IT8705F Datasheet 0.4.1, 3h == Version G.
3081          * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
3082          * These are the first revisions with 16-bit tachometer support.
3083          */
3084         switch (data->type) {
3085         case it87:
3086                 if (sio_data->revision >= 0x03) {
3087                         data->features &= ~FEAT_OLD_AUTOPWM;
3088                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS;
3089                 }
3090                 break;
3091         case it8712:
3092                 if (sio_data->revision >= 0x08) {
3093                         data->features &= ~FEAT_OLD_AUTOPWM;
3094                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS |
3095                                           FEAT_FIVE_FANS;
3096                 }
3097                 break;
3098         default:
3099                 break;
3100         }
3101
3102         /* Now, we do the remaining detection. */
3103         if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80) ||
3104             it87_read_value(data, IT87_REG_CHIPID) != 0x90)
3105                 return -ENODEV;
3106
3107         platform_set_drvdata(pdev, data);
3108
3109         mutex_init(&data->update_lock);
3110
3111         /* Check PWM configuration */
3112         enable_pwm_interface = it87_check_pwm(dev);
3113
3114         /* Starting with IT8721F, we handle scaling of internal voltages */
3115         if (has_12mv_adc(data)) {
3116                 if (sio_data->internal & BIT(0))
3117                         data->in_scaled |= BIT(3);      /* in3 is AVCC */
3118                 if (sio_data->internal & BIT(1))
3119                         data->in_scaled |= BIT(7);      /* in7 is VSB */
3120                 if (sio_data->internal & BIT(2))
3121                         data->in_scaled |= BIT(8);      /* in8 is Vbat */
3122                 if (sio_data->internal & BIT(3))
3123                         data->in_scaled |= BIT(9);      /* in9 is AVCC */
3124         } else if (sio_data->type == it8781 || sio_data->type == it8782 ||
3125                    sio_data->type == it8783) {
3126                 if (sio_data->internal & BIT(0))
3127                         data->in_scaled |= BIT(3);      /* in3 is VCC5V */
3128                 if (sio_data->internal & BIT(1))
3129                         data->in_scaled |= BIT(7);      /* in7 is VCCH5V */
3130         }
3131
3132         data->has_temp = 0x07;
3133         if (sio_data->skip_temp & BIT(2)) {
3134                 if (sio_data->type == it8782 &&
3135                     !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
3136                         data->has_temp &= ~BIT(2);
3137         }
3138
3139         data->in_internal = sio_data->internal;
3140         data->has_in = 0x3ff & ~sio_data->skip_in;
3141
3142         if (has_six_temp(data)) {
3143                 u8 reg = it87_read_value(data, IT87_REG_TEMP456_ENABLE);
3144
3145                 /* Check for additional temperature sensors */
3146                 if ((reg & 0x03) >= 0x02)
3147                         data->has_temp |= BIT(3);
3148                 if (((reg >> 2) & 0x03) >= 0x02)
3149                         data->has_temp |= BIT(4);
3150                 if (((reg >> 4) & 0x03) >= 0x02)
3151                         data->has_temp |= BIT(5);
3152
3153                 /* Check for additional voltage sensors */
3154                 if ((reg & 0x03) == 0x01)
3155                         data->has_in |= BIT(10);
3156                 if (((reg >> 2) & 0x03) == 0x01)
3157                         data->has_in |= BIT(11);
3158                 if (((reg >> 4) & 0x03) == 0x01)
3159                         data->has_in |= BIT(12);
3160         }
3161
3162         data->has_beep = !!sio_data->beep_pin;
3163
3164         /* Initialize the IT87 chip */
3165         it87_init_device(pdev);
3166
3167         if (!sio_data->skip_vid) {
3168                 data->has_vid = true;
3169                 data->vrm = vid_which_vrm();
3170                 /* VID reading from Super-I/O config space if available */
3171                 data->vid = sio_data->vid_value;
3172         }
3173
3174         /* Prepare for sysfs hooks */
3175         data->groups[0] = &it87_group;
3176         data->groups[1] = &it87_group_in;
3177         data->groups[2] = &it87_group_temp;
3178         data->groups[3] = &it87_group_fan;
3179
3180         if (enable_pwm_interface) {
3181                 data->has_pwm = BIT(ARRAY_SIZE(IT87_REG_PWM)) - 1;
3182                 data->has_pwm &= ~sio_data->skip_pwm;
3183
3184                 data->groups[4] = &it87_group_pwm;
3185                 if (has_old_autopwm(data) || has_newer_autopwm(data))
3186                         data->groups[5] = &it87_group_auto_pwm;
3187         }
3188
3189         hwmon_dev = devm_hwmon_device_register_with_groups(dev,
3190                                         it87_devices[sio_data->type].name,
3191                                         data, data->groups);
3192         return PTR_ERR_OR_ZERO(hwmon_dev);
3193 }
3194
3195 static struct platform_driver it87_driver = {
3196         .driver = {
3197                 .name   = DRVNAME,
3198         },
3199         .probe  = it87_probe,
3200 };
3201
3202 static int __init it87_device_add(int index, unsigned short address,
3203                                   const struct it87_sio_data *sio_data)
3204 {
3205         struct platform_device *pdev;
3206         struct resource res = {
3207                 .start  = address + IT87_EC_OFFSET,
3208                 .end    = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
3209                 .name   = DRVNAME,
3210                 .flags  = IORESOURCE_IO,
3211         };
3212         int err;
3213
3214         err = acpi_check_resource_conflict(&res);
3215         if (err)
3216                 return err;
3217
3218         pdev = platform_device_alloc(DRVNAME, address);
3219         if (!pdev)
3220                 return -ENOMEM;
3221
3222         err = platform_device_add_resources(pdev, &res, 1);
3223         if (err) {
3224                 pr_err("Device resource addition failed (%d)\n", err);
3225                 goto exit_device_put;
3226         }
3227
3228         err = platform_device_add_data(pdev, sio_data,
3229                                        sizeof(struct it87_sio_data));
3230         if (err) {
3231                 pr_err("Platform data allocation failed\n");
3232                 goto exit_device_put;
3233         }
3234
3235         err = platform_device_add(pdev);
3236         if (err) {
3237                 pr_err("Device addition failed (%d)\n", err);
3238                 goto exit_device_put;
3239         }
3240
3241         it87_pdev[index] = pdev;
3242         return 0;
3243
3244 exit_device_put:
3245         platform_device_put(pdev);
3246         return err;
3247 }
3248
3249 static int __init sm_it87_init(void)
3250 {
3251         int sioaddr[2] = { REG_2E, REG_4E };
3252         struct it87_sio_data sio_data;
3253         unsigned short isa_address;
3254         bool found = false;
3255         int i, err;
3256
3257         err = platform_driver_register(&it87_driver);
3258         if (err)
3259                 return err;
3260
3261         for (i = 0; i < ARRAY_SIZE(sioaddr); i++) {
3262                 memset(&sio_data, 0, sizeof(struct it87_sio_data));
3263                 isa_address = 0;
3264                 err = it87_find(sioaddr[i], &isa_address, &sio_data);
3265                 if (err || isa_address == 0)
3266                         continue;
3267
3268                 err = it87_device_add(i, isa_address, &sio_data);
3269                 if (err)
3270                         goto exit_dev_unregister;
3271                 found = true;
3272         }
3273
3274         if (!found) {
3275                 err = -ENODEV;
3276                 goto exit_unregister;
3277         }
3278         return 0;
3279
3280 exit_dev_unregister:
3281         /* NULL check handled by platform_device_unregister */
3282         platform_device_unregister(it87_pdev[0]);
3283 exit_unregister:
3284         platform_driver_unregister(&it87_driver);
3285         return err;
3286 }
3287
3288 static void __exit sm_it87_exit(void)
3289 {
3290         /* NULL check handled by platform_device_unregister */
3291         platform_device_unregister(it87_pdev[1]);
3292         platform_device_unregister(it87_pdev[0]);
3293         platform_driver_unregister(&it87_driver);
3294 }
3295
3296 MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>");
3297 MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
3298 module_param(update_vbat, bool, 0);
3299 MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
3300 module_param(fix_pwm_polarity, bool, 0);
3301 MODULE_PARM_DESC(fix_pwm_polarity,
3302                  "Force PWM polarity to active high (DANGEROUS)");
3303 MODULE_LICENSE("GPL");
3304
3305 module_init(sm_it87_init);
3306 module_exit(sm_it87_exit);