git.sur5r.net Git - groeck-it87/blob - it87.c

   1 /*
   2  *  it87.c - Part of lm_sensors, Linux kernel modules for hardware
   3  *           monitoring.
   4  *
   5  *  The IT8705F is an LPC-based Super I/O part that contains UARTs, a
   6  *  parallel port, an IR port, a MIDI port, a floppy controller, etc., in
   7  *  addition to an Environment Controller (Enhanced Hardware Monitor and
   8  *  Fan Controller)
   9  *
  10  *  This driver supports only the Environment Controller in the IT8705F and
  11  *  similar parts.  The other devices are supported by different drivers.
  12  *
  13  *  Supports: IT8603E  Super I/O chip w/LPC interface
  14  *            IT8607E  Super I/O chip w/LPC interface
  15  *            IT8620E  Super I/O chip w/LPC interface
  16  *            IT8622E  Super I/O chip w/LPC interface
  17  *            IT8623E  Super I/O chip w/LPC interface
  18  *            IT8628E  Super I/O chip w/LPC interface
  19  *            IT8665E  Super I/O chip w/LPC interface
  20  *            IT8686E  Super I/O chip w/LPC interface
  21  *            IT8705F  Super I/O chip w/LPC interface
  22  *            IT8712F  Super I/O chip w/LPC interface
  23  *            IT8716F  Super I/O chip w/LPC interface
  24  *            IT8718F  Super I/O chip w/LPC interface
  25  *            IT8720F  Super I/O chip w/LPC interface
  26  *            IT8721F  Super I/O chip w/LPC interface
  27  *            IT8726F  Super I/O chip w/LPC interface
  28  *            IT8728F  Super I/O chip w/LPC interface
  29  *            IT8732F  Super I/O chip w/LPC interface
  30  *            IT8758E  Super I/O chip w/LPC interface
  31  *            IT8771E  Super I/O chip w/LPC interface
  32  *            IT8772E  Super I/O chip w/LPC interface
  33  *            IT8781F  Super I/O chip w/LPC interface
  34  *            IT8782F  Super I/O chip w/LPC interface
  35  *            IT8783E/F Super I/O chip w/LPC interface
  36  *            IT8786E  Super I/O chip w/LPC interface
  37  *            IT8790E  Super I/O chip w/LPC interface
  38  *            IT8792E  Super I/O chip w/LPC interface
  39  *            Sis950   A clone of the IT8705F
  40  *
  41  *  Copyright (C) 2001 Chris Gauthron
  42  *  Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de>
  43  *
  44  *  This program is free software; you can redistribute it and/or modify
  45  *  it under the terms of the GNU General Public License as published by
  46  *  the Free Software Foundation; either version 2 of the License, or
  47  *  (at your option) any later version.
  48  *
  49  *  This program is distributed in the hope that it will be useful,
  50  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  51  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  52  *  GNU General Public License for more details.
  53  */
  54
  55 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  56
  57 #include <linux/bitops.h>
  58 #include <linux/module.h>
  59 #include <linux/init.h>
  60 #include <linux/slab.h>
  61 #include <linux/jiffies.h>
  62 #include <linux/platform_device.h>
  63 #include <linux/hwmon.h>
  64 #include <linux/hwmon-sysfs.h>
  65 #include <linux/hwmon-vid.h>
  66 #include <linux/err.h>
  67 #include <linux/mutex.h>
  68 #include <linux/sysfs.h>
  69 #include <linux/string.h>
  70 #include <linux/dmi.h>
  71 #include <linux/acpi.h>
  72 #include <linux/io.h>
  73 #include "compat.h"
  74
  75 #define DRVNAME "it87"
  76
  77 enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732,
  78              it8771, it8772, it8781, it8782, it8783, it8786, it8790,
  79              it8792, it8603, it8607, it8620, it8622, it8628, it8665,
  80              it8686 };
  81
  82 static unsigned short force_id;
  83 module_param(force_id, ushort, 0);
  84 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  85
  86 static struct platform_device *it87_pdev[2];
  87
  88 #define REG_2E  0x2e    /* The register to read/write */
  89 #define REG_4E  0x4e    /* Secondary register to read/write */
  90
  91 #define DEV     0x07    /* Register: Logical device select */
  92 #define PME     0x04    /* The device with the fan registers in it */
  93
  94 /* The device with the IT8718F/IT8720F VID value in it */
  95 #define GPIO    0x07
  96
  97 #define DEVID   0x20    /* Register: Device ID */
  98 #define DEVREV  0x22    /* Register: Device Revision */
  99
 100 static inline int superio_inb(int ioreg, int reg)
 101 {
 102         outb(reg, ioreg);
 103         return inb(ioreg + 1);
 104 }
 105
 106 static inline void superio_outb(int ioreg, int reg, int val)
 107 {
 108         outb(reg, ioreg);
 109         outb(val, ioreg + 1);
 110 }
 111
 112 static int superio_inw(int ioreg, int reg)
 113 {
 114         int val;
 115
 116         outb(reg++, ioreg);
 117         val = inb(ioreg + 1) << 8;
 118         outb(reg, ioreg);
 119         val |= inb(ioreg + 1);
 120         return val;
 121 }
 122
 123 static inline void superio_select(int ioreg, int ldn)
 124 {
 125         outb(DEV, ioreg);
 126         outb(ldn, ioreg + 1);
 127 }
 128
 129 static inline int superio_enter(int ioreg)
 130 {
 131         /*
 132          * Try to reserve ioreg and ioreg + 1 for exclusive access.
 133          */
 134         if (!request_muxed_region(ioreg, 2, DRVNAME))
 135                 return -EBUSY;
 136
 137         outb(0x87, ioreg);
 138         outb(0x01, ioreg);
 139         outb(0x55, ioreg);
 140         outb(ioreg == REG_4E ? 0xaa : 0x55, ioreg);
 141         return 0;
 142 }
 143
 144 static inline void superio_exit(int ioreg)
 145 {
 146         outb(0x02, ioreg);
 147         outb(0x02, ioreg + 1);
 148         release_region(ioreg, 2);
 149 }
 150
 151 /* Logical device 4 registers */
 152 #define IT8712F_DEVID 0x8712
 153 #define IT8705F_DEVID 0x8705
 154 #define IT8716F_DEVID 0x8716
 155 #define IT8718F_DEVID 0x8718
 156 #define IT8720F_DEVID 0x8720
 157 #define IT8721F_DEVID 0x8721
 158 #define IT8726F_DEVID 0x8726
 159 #define IT8728F_DEVID 0x8728
 160 #define IT8732F_DEVID 0x8732
 161 #define IT8792E_DEVID 0x8733
 162 #define IT8771E_DEVID 0x8771
 163 #define IT8772E_DEVID 0x8772
 164 #define IT8781F_DEVID 0x8781
 165 #define IT8782F_DEVID 0x8782
 166 #define IT8783E_DEVID 0x8783
 167 #define IT8786E_DEVID 0x8786
 168 #define IT8790E_DEVID 0x8790
 169 #define IT8603E_DEVID 0x8603
 170 #define IT8607E_DEVID 0x8607
 171 #define IT8620E_DEVID 0x8620
 172 #define IT8622E_DEVID 0x8622
 173 #define IT8623E_DEVID 0x8623
 174 #define IT8628E_DEVID 0x8628
 175 #define IT8665E_DEVID 0x8665
 176 #define IT8686E_DEVID 0x8686
 177 #define IT87_ACT_REG  0x30
 178 #define IT87_BASE_REG 0x60
 179
 180 /* Logical device 7 registers (IT8712F and later) */
 181 #define IT87_SIO_GPIO1_REG      0x25
 182 #define IT87_SIO_GPIO2_REG      0x26
 183 #define IT87_SIO_GPIO3_REG      0x27
 184 #define IT87_SIO_GPIO4_REG      0x28
 185 #define IT87_SIO_GPIO5_REG      0x29
 186 #define IT87_SIO_GPIO9_REG      0xd3
 187 #define IT87_SIO_PINX1_REG      0x2a    /* Pin selection */
 188 #define IT87_SIO_PINX2_REG      0x2c    /* Pin selection */
 189 #define IT87_SIO_PINX4_REG      0x2d    /* Pin selection */
 190 #define IT87_SIO_SPI_REG        0xef    /* SPI function pin select */
 191 #define IT87_SIO_VID_REG        0xfc    /* VID value */
 192 #define IT87_SIO_BEEP_PIN_REG   0xf6    /* Beep pin mapping */
 193
 194 /* Update battery voltage after every reading if true */
 195 static bool update_vbat;
 196
 197 /* Not all BIOSes properly configure the PWM registers */
 198 static bool fix_pwm_polarity;
 199
 200 /* Many IT87 constants specified below */
 201
 202 /* Length of ISA address segment */
 203 #define IT87_EXTENT 8
 204
 205 /* Length of ISA address segment for Environmental Controller */
 206 #define IT87_EC_EXTENT 2
 207
 208 /* Offset of EC registers from ISA base address */
 209 #define IT87_EC_OFFSET 5
 210
 211 /* Where are the ISA address/data registers relative to the EC base address */
 212 #define IT87_ADDR_REG_OFFSET 0
 213 #define IT87_DATA_REG_OFFSET 1
 214
 215 /*----- The IT87 registers -----*/
 216
 217 #define IT87_REG_CONFIG        0x00
 218
 219 #define IT87_REG_ALARM1        0x01
 220 #define IT87_REG_ALARM2        0x02
 221 #define IT87_REG_ALARM3        0x03
 222
 223 #define IT87_REG_BANK           0x06
 224
 225 /*
 226  * The IT8718F and IT8720F have the VID value in a different register, in
 227  * Super-I/O configuration space.
 228  */
 229 #define IT87_REG_VID           0x0a
 230 /*
 231  * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
 232  * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
 233  * mode.
 234  */
 235 #define IT87_REG_FAN_DIV       0x0b
 236 #define IT87_REG_FAN_16BIT     0x0c
 237
 238 /*
 239  * Monitors:
 240  * - up to 13 voltage (0 to 7, battery, avcc, 10 to 12)
 241  * - up to 6 temp (1 to 6)
 242  * - up to 6 fan (1 to 6)
 243  */
 244
 245 static const u8 IT87_REG_FAN[]         = { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c };
 246 static const u8 IT87_REG_FAN_MIN[]     = { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e };
 247 static const u8 IT87_REG_FANX[]        = { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d };
 248 static const u8 IT87_REG_FANX_MIN[]    = { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f };
 249 static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59 };
 250
 251 #define IT87_REG_FAN_MAIN_CTRL 0x13
 252 #define IT87_REG_FAN_CTL       0x14
 253 static const u8 IT87_REG_PWM[]         = { 0x15, 0x16, 0x17, 0x7f, 0xa7, 0xaf };
 254 static const u8 IT87_REG_PWM_DUTY[]    = { 0x63, 0x6b, 0x73, 0x7b, 0xa3, 0xab };
 255
 256 static const u8 IT87_REG_VIN[]  = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26,
 257                                     0x27, 0x28, 0x2f, 0x2c, 0x2d, 0x2e };
 258
 259 #define IT87_REG_TEMP(nr)      (0x29 + (nr))
 260
 261 #define IT87_REG_VIN_MAX(nr)   (0x30 + (nr) * 2)
 262 #define IT87_REG_VIN_MIN(nr)   (0x31 + (nr) * 2)
 263 #define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
 264 #define IT87_REG_TEMP_LOW(nr)  (0x41 + (nr) * 2)
 265
 266 #define IT87_REG_VIN_ENABLE    0x50
 267 #define IT87_REG_TEMP_ENABLE   0x51
 268 #define IT87_REG_TEMP_EXTRA    0x55
 269 #define IT87_REG_BEEP_ENABLE   0x5c
 270
 271 #define IT87_REG_CHIPID        0x58
 272
 273 static const u8 IT87_REG_AUTO_BASE[] = { 0x60, 0x68, 0x70, 0x78, 0xa0, 0xa8 };
 274
 275 #define IT87_REG_AUTO_TEMP(nr, i) (IT87_REG_AUTO_BASE[nr] + (i))
 276 #define IT87_REG_AUTO_PWM(nr, i)  (IT87_REG_AUTO_BASE[nr] + 5 + (i))
 277
 278 #define IT87_REG_TEMP456_ENABLE 0x77
 279
 280 #define NUM_VIN                 ARRAY_SIZE(IT87_REG_VIN)
 281 #define NUM_VIN_LIMIT           8
 282 #define NUM_TEMP                6
 283 #define NUM_TEMP_OFFSET         ARRAY_SIZE(IT87_REG_TEMP_OFFSET)
 284 #define NUM_TEMP_LIMIT          3
 285 #define NUM_FAN                 ARRAY_SIZE(IT87_REG_FAN)
 286 #define NUM_FAN_DIV             3
 287 #define NUM_PWM                 ARRAY_SIZE(IT87_REG_PWM)
 288 #define NUM_AUTO_PWM            ARRAY_SIZE(IT87_REG_PWM)
 289
 290 struct it87_devices {
 291         const char *name;
 292         const char * const suffix;
 293         u32 features;
 294         u8 peci_mask;
 295         u8 old_peci_mask;
 296 };
 297
 298 #define FEAT_12MV_ADC           BIT(0)
 299 #define FEAT_NEWER_AUTOPWM      BIT(1)
 300 #define FEAT_OLD_AUTOPWM        BIT(2)
 301 #define FEAT_16BIT_FANS         BIT(3)
 302 #define FEAT_TEMP_OFFSET        BIT(4)
 303 #define FEAT_TEMP_PECI          BIT(5)
 304 #define FEAT_TEMP_OLD_PECI      BIT(6)
 305 #define FEAT_FAN16_CONFIG       BIT(7)  /* Need to enable 16-bit fans */
 306 #define FEAT_FIVE_FANS          BIT(8)  /* Supports five fans */
 307 #define FEAT_VID                BIT(9)  /* Set if chip supports VID */
 308 #define FEAT_IN7_INTERNAL       BIT(10) /* Set if in7 is internal */
 309 #define FEAT_SIX_FANS           BIT(11) /* Supports six fans */
 310 #define FEAT_10_9MV_ADC         BIT(12)
 311 #define FEAT_AVCC3              BIT(13) /* Chip supports in9/AVCC3 */
 312 #define FEAT_FIVE_PWM           BIT(14) /* Chip supports 5 pwm chn */
 313 #define FEAT_SIX_PWM            BIT(15) /* Chip supports 6 pwm chn */
 314 #define FEAT_PWM_FREQ2          BIT(16) /* Separate pwm freq 2 */
 315 #define FEAT_SIX_TEMP           BIT(17) /* Up to 6 temp sensors */
 316 #define FEAT_VIN3_5V            BIT(18) /* VIN3 connected to +5V */
 317 #define FEAT_FOUR_FANS          BIT(19) /* Supports four fans */
 318 #define FEAT_FOUR_PWM           BIT(20) /* Supports four fan controls */
 319 #define FEAT_BANK_SEL           BIT(21) /* Chip has multi-bank support */
 320 #define FEAT_SCALING            BIT(22) /* Internal voltage scaling */
 321
 322 static const struct it87_devices it87_devices[] = {
 323         [it87] = {
 324                 .name = "it87",
 325                 .suffix = "F",
 326                 .features = FEAT_OLD_AUTOPWM,   /* may need to overwrite */
 327         },
 328         [it8712] = {
 329                 .name = "it8712",
 330                 .suffix = "F",
 331                 .features = FEAT_OLD_AUTOPWM | FEAT_VID,
 332                                                 /* may need to overwrite */
 333         },
 334         [it8716] = {
 335                 .name = "it8716",
 336                 .suffix = "F",
 337                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 338                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2,
 339         },
 340         [it8718] = {
 341                 .name = "it8718",
 342                 .suffix = "F",
 343                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 344                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 345                   | FEAT_PWM_FREQ2,
 346                 .old_peci_mask = 0x4,
 347         },
 348         [it8720] = {
 349                 .name = "it8720",
 350                 .suffix = "F",
 351                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 352                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 353                   | FEAT_PWM_FREQ2,
 354                 .old_peci_mask = 0x4,
 355         },
 356         [it8721] = {
 357                 .name = "it8721",
 358                 .suffix = "F",
 359                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 360                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 361                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL
 362                   | FEAT_PWM_FREQ2 | FEAT_SCALING,
 363                 .peci_mask = 0x05,
 364                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 365         },
 366         [it8728] = {
 367                 .name = "it8728",
 368                 .suffix = "F",
 369                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 370                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 371                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_SCALING,
 372                 .peci_mask = 0x07,
 373         },
 374         [it8732] = {
 375                 .name = "it8732",
 376                 .suffix = "F",
 377                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 378                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 379                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_FOUR_FANS
 380                   | FEAT_FOUR_PWM,
 381                 .peci_mask = 0x07,
 382                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 383         },
 384         [it8771] = {
 385                 .name = "it8771",
 386                 .suffix = "E",
 387                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 388                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 389                   | FEAT_PWM_FREQ2 | FEAT_SCALING,
 390                                 /* PECI: guesswork */
 391                                 /* 12mV ADC (OHM) */
 392                                 /* 16 bit fans (OHM) */
 393                                 /* three fans, always 16 bit (guesswork) */
 394                 .peci_mask = 0x07,
 395         },
 396         [it8772] = {
 397                 .name = "it8772",
 398                 .suffix = "E",
 399                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 400                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 401                   | FEAT_PWM_FREQ2 | FEAT_SCALING,
 402                                 /* PECI (coreboot) */
 403                                 /* 12mV ADC (HWSensors4, OHM) */
 404                                 /* 16 bit fans (HWSensors4, OHM) */
 405                                 /* three fans, always 16 bit (datasheet) */
 406                 .peci_mask = 0x07,
 407         },
 408         [it8781] = {
 409                 .name = "it8781",
 410                 .suffix = "F",
 411                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 412                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
 413                 .old_peci_mask = 0x4,
 414         },
 415         [it8782] = {
 416                 .name = "it8782",
 417                 .suffix = "F",
 418                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 419                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
 420                 .old_peci_mask = 0x4,
 421         },
 422         [it8783] = {
 423                 .name = "it8783",
 424                 .suffix = "E/F",
 425                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 426                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
 427                 .old_peci_mask = 0x4,
 428         },
 429         [it8786] = {
 430                 .name = "it8786",
 431                 .suffix = "E",
 432                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 433                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 434                   | FEAT_PWM_FREQ2,
 435                 .peci_mask = 0x07,
 436         },
 437         [it8790] = {
 438                 .name = "it8790",
 439                 .suffix = "E",
 440                 .features = FEAT_NEWER_AUTOPWM | FEAT_10_9MV_ADC | FEAT_SCALING
 441                   | FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI
 442                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2,
 443                 .peci_mask = 0x07,
 444         },
 445         [it8792] = {
 446                 .name = "it8792",
 447                 .suffix = "E",
 448                 .features = FEAT_NEWER_AUTOPWM | FEAT_10_9MV_ADC | FEAT_SCALING
 449                   | FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI
 450                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2,
 451                 .peci_mask = 0x07,
 452         },
 453         [it8603] = {
 454                 .name = "it8603",
 455                 .suffix = "E",
 456                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 457                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 458                   | FEAT_AVCC3 | FEAT_PWM_FREQ2 | FEAT_SCALING,
 459                 .peci_mask = 0x07,
 460         },
 461         [it8607] = {
 462                 .name = "it8607",
 463                 .suffix = "E",
 464                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 465                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 466                   | FEAT_AVCC3 | FEAT_PWM_FREQ2 | FEAT_SCALING,
 467                 .peci_mask = 0x07,
 468         },
 469         [it8620] = {
 470                 .name = "it8620",
 471                 .suffix = "E",
 472                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 473                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 474                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 475                   | FEAT_SIX_TEMP | FEAT_VIN3_5V | FEAT_SCALING,
 476                 .peci_mask = 0x07,
 477         },
 478         [it8622] = {
 479                 .name = "it8622",
 480                 .suffix = "E",
 481                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 482                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 483                   | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
 484                   | FEAT_AVCC3 | FEAT_VIN3_5V | FEAT_SCALING,
 485                 .peci_mask = 0x07,
 486         },
 487         [it8628] = {
 488                 .name = "it8628",
 489                 .suffix = "E",
 490                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 491                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 492                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 493                   | FEAT_SIX_TEMP | FEAT_SCALING,
 494                 .peci_mask = 0x07,
 495         },
 496         [it8665] = {
 497                 .name = "it8665",
 498                 .suffix = "E",
 499                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 500                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 501                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_SIX_FANS
 502                   | FEAT_SIX_PWM | FEAT_BANK_SEL,
 503                 .peci_mask = 0x07,
 504         },
 505         [it8686] = {
 506                 .name = "it8686",
 507                 .suffix = "E",
 508                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 509                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 510                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 511                   | FEAT_SIX_TEMP | FEAT_BANK_SEL | FEAT_SCALING,
 512                 .peci_mask = 0x07,
 513         },
 514 };
 515
 516 #define has_16bit_fans(data)    ((data)->features & FEAT_16BIT_FANS)
 517 #define has_12mv_adc(data)      ((data)->features & FEAT_12MV_ADC)
 518 #define has_10_9mv_adc(data)    ((data)->features & FEAT_10_9MV_ADC)
 519 #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
 520 #define has_old_autopwm(data)   ((data)->features & FEAT_OLD_AUTOPWM)
 521 #define has_temp_offset(data)   ((data)->features & FEAT_TEMP_OFFSET)
 522 #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \
 523                                  ((data)->peci_mask & BIT(nr)))
 524 #define has_temp_old_peci(data, nr) \
 525                                 (((data)->features & FEAT_TEMP_OLD_PECI) && \
 526                                  ((data)->old_peci_mask & BIT(nr)))
 527 #define has_fan16_config(data)  ((data)->features & FEAT_FAN16_CONFIG)
 528 #define has_five_fans(data)     ((data)->features & (FEAT_FIVE_FANS | \
 529                                                      FEAT_SIX_FANS))
 530 #define has_vid(data)           ((data)->features & FEAT_VID)
 531 #define has_in7_internal(data)  ((data)->features & FEAT_IN7_INTERNAL)
 532 #define has_six_fans(data)      ((data)->features & FEAT_SIX_FANS)
 533 #define has_avcc3(data)         ((data)->features & FEAT_AVCC3)
 534 #define has_five_pwm(data)      ((data)->features & (FEAT_FIVE_PWM \
 535                                                      | FEAT_SIX_PWM))
 536 #define has_six_pwm(data)       ((data)->features & FEAT_SIX_PWM)
 537 #define has_pwm_freq2(data)     ((data)->features & FEAT_PWM_FREQ2)
 538 #define has_six_temp(data)      ((data)->features & FEAT_SIX_TEMP)
 539 #define has_vin3_5v(data)       ((data)->features & FEAT_VIN3_5V)
 540 #define has_four_fans(data)     ((data)->features & (FEAT_FOUR_FANS | \
 541                                                      FEAT_FIVE_FANS | \
 542                                                      FEAT_SIX_FANS))
 543 #define has_four_pwm(data)      ((data)->features & (FEAT_FOUR_PWM | \
 544                                                      FEAT_FIVE_PWM \
 545                                                      | FEAT_SIX_PWM))
 546 #define has_bank_sel(data)      ((data)->features & FEAT_BANK_SEL)
 547 #define has_scaling(data)       ((data)->features & FEAT_SCALING)
 548
 549 struct it87_sio_data {
 550         enum chips type;
 551         /* Values read from Super-I/O config space */
 552         u8 revision;
 553         u8 vid_value;
 554         u8 beep_pin;
 555         u8 internal;    /* Internal sensors can be labeled */
 556         /* Features skipped based on config or DMI */
 557         u16 skip_in;
 558         u8 skip_vid;
 559         u8 skip_fan;
 560         u8 skip_pwm;
 561         u8 skip_temp;
 562 };
 563
 564 /*
 565  * For each registered chip, we need to keep some data in memory.
 566  * The structure is dynamically allocated.
 567  */
 568 struct it87_data {
 569         const struct attribute_group *groups[7];
 570         enum chips type;
 571         u32 features;
 572         u8 bank;
 573         u8 peci_mask;
 574         u8 old_peci_mask;
 575
 576         unsigned short addr;
 577         const char *name;
 578         struct mutex update_lock;
 579         char valid;             /* !=0 if following fields are valid */
 580         unsigned long last_updated;     /* In jiffies */
 581
 582         u16 in_scaled;          /* Internal voltage sensors are scaled */
 583         u16 in_internal;        /* Bitfield, internal sensors (for labels) */
 584         u16 has_in;             /* Bitfield, voltage sensors enabled */
 585         u8 in[NUM_VIN][3];              /* [nr][0]=in, [1]=min, [2]=max */
 586         u8 has_fan;             /* Bitfield, fans enabled */
 587         u16 fan[NUM_FAN][2];    /* Register values, [nr][0]=fan, [1]=min */
 588         u8 has_temp;            /* Bitfield, temp sensors enabled */
 589         s8 temp[NUM_TEMP][4];   /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
 590         u8 sensor;              /* Register value (IT87_REG_TEMP_ENABLE) */
 591         u8 extra;               /* Register value (IT87_REG_TEMP_EXTRA) */
 592         u8 fan_div[NUM_FAN_DIV];/* Register encoding, shifted right */
 593         bool has_vid;           /* True if VID supported */
 594         u8 vid;                 /* Register encoding, combined */
 595         u8 vrm;
 596         u32 alarms;             /* Register encoding, combined */
 597         bool has_beep;          /* true if beep supported */
 598         u8 beeps;               /* Register encoding */
 599         u8 fan_main_ctrl;       /* Register value */
 600         u8 fan_ctl;             /* Register value */
 601
 602         /*
 603          * The following 3 arrays correspond to the same registers up to
 604          * the IT8720F. The meaning of bits 6-0 depends on the value of bit
 605          * 7, and we want to preserve settings on mode changes, so we have
 606          * to track all values separately.
 607          * Starting with the IT8721F, the manual PWM duty cycles are stored
 608          * in separate registers (8-bit values), so the separate tracking
 609          * is no longer needed, but it is still done to keep the driver
 610          * simple.
 611          */
 612         u8 has_pwm;             /* Bitfield, pwm control enabled */
 613         u8 pwm_ctrl[NUM_PWM];   /* Register value */
 614         u8 pwm_duty[NUM_PWM];   /* Manual PWM value set by user */
 615         u8 pwm_temp_map[NUM_PWM];/* PWM to temp. chan. mapping (bits 1-0) */
 616
 617         /* Automatic fan speed control registers */
 618         u8 auto_pwm[NUM_AUTO_PWM][4];   /* [nr][3] is hard-coded */
 619         s8 auto_temp[NUM_AUTO_PWM][5];  /* [nr][0] is point1_temp_hyst */
 620 };
 621
 622 static int adc_lsb(const struct it87_data *data, int nr)
 623 {
 624         int lsb;
 625
 626         if (has_12mv_adc(data))
 627                 lsb = 120;
 628         else if (has_10_9mv_adc(data))
 629                 lsb = 109;
 630         else
 631                 lsb = 160;
 632         if (data->in_scaled & BIT(nr))
 633                 lsb <<= 1;
 634         return lsb;
 635 }
 636
 637 static u8 in_to_reg(const struct it87_data *data, int nr, long val)
 638 {
 639         val = DIV_ROUND_CLOSEST(val * 10, adc_lsb(data, nr));
 640         return clamp_val(val, 0, 255);
 641 }
 642
 643 static int in_from_reg(const struct it87_data *data, int nr, int val)
 644 {
 645         return DIV_ROUND_CLOSEST(val * adc_lsb(data, nr), 10);
 646 }
 647
 648 static inline u8 FAN_TO_REG(long rpm, int div)
 649 {
 650         if (rpm == 0)
 651                 return 255;
 652         rpm = clamp_val(rpm, 1, 1000000);
 653         return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
 654 }
 655
 656 static inline u16 FAN16_TO_REG(long rpm)
 657 {
 658         if (rpm == 0)
 659                 return 0xffff;
 660         return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
 661 }
 662
 663 #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
 664                                 1350000 / ((val) * (div)))
 665 /* The divider is fixed to 2 in 16-bit mode */
 666 #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
 667                              1350000 / ((val) * 2))
 668
 669 #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \
 670                                     ((val) + 500) / 1000), -128, 127))
 671 #define TEMP_FROM_REG(val) ((val) * 1000)
 672
 673 static u8 pwm_to_reg(const struct it87_data *data, long val)
 674 {
 675         if (has_newer_autopwm(data))
 676                 return val;
 677         else
 678                 return val >> 1;
 679 }
 680
 681 static int pwm_from_reg(const struct it87_data *data, u8 reg)
 682 {
 683         if (has_newer_autopwm(data))
 684                 return reg;
 685         else
 686                 return (reg & 0x7f) << 1;
 687 }
 688
 689 static int DIV_TO_REG(int val)
 690 {
 691         int answer = 0;
 692
 693         while (answer < 7 && (val >>= 1))
 694                 answer++;
 695         return answer;
 696 }
 697
 698 #define DIV_FROM_REG(val) BIT(val)
 699
 700 /*
 701  * PWM base frequencies. The frequency has to be divided by either 128 or 256,
 702  * depending on the chip type, to calculate the actual PWM frequency.
 703  *
 704  * Some of the chip datasheets suggest a base frequency of 51 kHz instead
 705  * of 750 kHz for the slowest base frequency, resulting in a PWM frequency
 706  * of 200 Hz. Sometimes both PWM frequency select registers are affected,
 707  * sometimes just one. It is unknown if this is a datasheet error or real,
 708  * so this is ignored for now.
 709  */
 710 static const unsigned int pwm_freq[8] = {
 711         48000000,
 712         24000000,
 713         12000000,
 714         8000000,
 715         6000000,
 716         3000000,
 717         1500000,
 718         750000,
 719 };
 720
 721 static int _it87_read_value(struct it87_data *data, u8 reg)
 722 {
 723         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 724         return inb_p(data->addr + IT87_DATA_REG_OFFSET);
 725 }
 726
 727 static void _it87_write_value(struct it87_data *data, u8 reg, u8 value)
 728 {
 729         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 730         outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
 731 }
 732
 733 static void it87_set_bank(struct it87_data *data, u8 bank)
 734 {
 735         if (has_bank_sel(data) && bank != data->bank) {
 736                 u8 breg = _it87_read_value(data, IT87_REG_BANK);
 737
 738                 breg &= 0x1f;
 739                 breg |= (bank << 5);
 740                 data->bank = bank;
 741                 _it87_write_value(data, IT87_REG_BANK, breg);
 742         }
 743 }
 744
 745 /*
 746  * Must be called with data->update_lock held, except during initialization.
 747  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 748  * would slow down the IT87 access and should not be necessary.
 749  */
 750 static int it87_read_value(struct it87_data *data, u16 reg)
 751 {
 752         it87_set_bank(data, reg >> 8);
 753         return _it87_read_value(data, reg & 0xff);
 754 }
 755
 756 /*
 757  * Must be called with data->update_lock held, except during initialization.
 758  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 759  * would slow down the IT87 access and should not be necessary.
 760  */
 761 static void it87_write_value(struct it87_data *data, u16 reg, u8 value)
 762 {
 763         it87_set_bank(data, reg >> 8);
 764         _it87_write_value(data, reg & 0xff, value);
 765 }
 766
 767 static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
 768 {
 769         data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM[nr]);
 770         if (has_newer_autopwm(data)) {
 771                 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
 772                 data->pwm_duty[nr] = it87_read_value(data,
 773                                                      IT87_REG_PWM_DUTY[nr]);
 774         } else {
 775                 if (data->pwm_ctrl[nr] & 0x80)  /* Automatic mode */
 776                         data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
 777                 else                            /* Manual mode */
 778                         data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
 779         }
 780
 781         if (has_old_autopwm(data)) {
 782                 int i;
 783
 784                 for (i = 0; i < 5 ; i++)
 785                         data->auto_temp[nr][i] = it87_read_value(data,
 786                                                 IT87_REG_AUTO_TEMP(nr, i));
 787                 for (i = 0; i < 3 ; i++)
 788                         data->auto_pwm[nr][i] = it87_read_value(data,
 789                                                 IT87_REG_AUTO_PWM(nr, i));
 790         } else if (has_newer_autopwm(data)) {
 791                 int i;
 792
 793                 /*
 794                  * 0: temperature hysteresis (base + 5)
 795                  * 1: fan off temperature (base + 0)
 796                  * 2: fan start temperature (base + 1)
 797                  * 3: fan max temperature (base + 2)
 798                  */
 799                 data->auto_temp[nr][0] =
 800                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 5));
 801
 802                 for (i = 0; i < 3 ; i++)
 803                         data->auto_temp[nr][i + 1] =
 804                                 it87_read_value(data,
 805                                                 IT87_REG_AUTO_TEMP(nr, i));
 806                 /*
 807                  * 0: start pwm value (base + 3)
 808                  * 1: pwm slope (base + 4, 1/8th pwm)
 809                  */
 810                 data->auto_pwm[nr][0] =
 811                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 3));
 812                 data->auto_pwm[nr][1] =
 813                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 4));
 814         }
 815 }
 816
 817 static struct it87_data *it87_update_device(struct device *dev)
 818 {
 819         struct it87_data *data = dev_get_drvdata(dev);
 820         int i;
 821
 822         mutex_lock(&data->update_lock);
 823
 824         if (time_after(jiffies, data->last_updated + HZ + HZ / 2) ||
 825             !data->valid) {
 826                 if (update_vbat) {
 827                         /*
 828                          * Cleared after each update, so reenable.  Value
 829                          * returned by this read will be previous value
 830                          */
 831                         it87_write_value(data, IT87_REG_CONFIG,
 832                                 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
 833                 }
 834                 for (i = 0; i < NUM_VIN; i++) {
 835                         if (!(data->has_in & BIT(i)))
 836                                 continue;
 837
 838                         data->in[i][0] =
 839                                 it87_read_value(data, IT87_REG_VIN[i]);
 840
 841                         /* VBAT and AVCC don't have limit registers */
 842                         if (i >= NUM_VIN_LIMIT)
 843                                 continue;
 844
 845                         data->in[i][1] =
 846                                 it87_read_value(data, IT87_REG_VIN_MIN(i));
 847                         data->in[i][2] =
 848                                 it87_read_value(data, IT87_REG_VIN_MAX(i));
 849                 }
 850
 851                 for (i = 0; i < NUM_FAN; i++) {
 852                         /* Skip disabled fans */
 853                         if (!(data->has_fan & BIT(i)))
 854                                 continue;
 855
 856                         data->fan[i][1] =
 857                                 it87_read_value(data, IT87_REG_FAN_MIN[i]);
 858                         data->fan[i][0] = it87_read_value(data,
 859                                        IT87_REG_FAN[i]);
 860                         /* Add high byte if in 16-bit mode */
 861                         if (has_16bit_fans(data)) {
 862                                 data->fan[i][0] |= it87_read_value(data,
 863                                                 IT87_REG_FANX[i]) << 8;
 864                                 data->fan[i][1] |= it87_read_value(data,
 865                                                 IT87_REG_FANX_MIN[i]) << 8;
 866                         }
 867                 }
 868                 for (i = 0; i < NUM_TEMP; i++) {
 869                         if (!(data->has_temp & BIT(i)))
 870                                 continue;
 871                         data->temp[i][0] =
 872                                 it87_read_value(data, IT87_REG_TEMP(i));
 873
 874                         if (has_temp_offset(data) && i < NUM_TEMP_OFFSET)
 875                                 data->temp[i][3] =
 876                                   it87_read_value(data,
 877                                                   IT87_REG_TEMP_OFFSET[i]);
 878
 879                         if (i >= NUM_TEMP_LIMIT)
 880                                 continue;
 881
 882                         data->temp[i][1] =
 883                                 it87_read_value(data, IT87_REG_TEMP_LOW(i));
 884                         data->temp[i][2] =
 885                                 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
 886                 }
 887
 888                 /* Newer chips don't have clock dividers */
 889                 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
 890                         i = it87_read_value(data, IT87_REG_FAN_DIV);
 891                         data->fan_div[0] = i & 0x07;
 892                         data->fan_div[1] = (i >> 3) & 0x07;
 893                         data->fan_div[2] = (i & 0x40) ? 3 : 1;
 894                 }
 895
 896                 data->alarms =
 897                         it87_read_value(data, IT87_REG_ALARM1) |
 898                         (it87_read_value(data, IT87_REG_ALARM2) << 8) |
 899                         (it87_read_value(data, IT87_REG_ALARM3) << 16);
 900                 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
 901
 902                 data->fan_main_ctrl = it87_read_value(data,
 903                                 IT87_REG_FAN_MAIN_CTRL);
 904                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
 905                 for (i = 0; i < NUM_PWM; i++) {
 906                         if (!(data->has_pwm & BIT(i)))
 907                                 continue;
 908                         it87_update_pwm_ctrl(data, i);
 909                 }
 910
 911                 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
 912                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
 913                 /*
 914                  * The IT8705F does not have VID capability.
 915                  * The IT8718F and later don't use IT87_REG_VID for the
 916                  * same purpose.
 917                  */
 918                 if (data->type == it8712 || data->type == it8716) {
 919                         data->vid = it87_read_value(data, IT87_REG_VID);
 920                         /*
 921                          * The older IT8712F revisions had only 5 VID pins,
 922                          * but we assume it is always safe to read 6 bits.
 923                          */
 924                         data->vid &= 0x3f;
 925                 }
 926                 data->last_updated = jiffies;
 927                 data->valid = 1;
 928         }
 929
 930         mutex_unlock(&data->update_lock);
 931
 932         return data;
 933 }
 934
 935 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
 936                        char *buf)
 937 {
 938         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 939         struct it87_data *data = it87_update_device(dev);
 940         int index = sattr->index;
 941         int nr = sattr->nr;
 942
 943         return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
 944 }
 945
 946 static ssize_t set_in(struct device *dev, struct device_attribute *attr,
 947                       const char *buf, size_t count)
 948 {
 949         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 950         struct it87_data *data = dev_get_drvdata(dev);
 951         int index = sattr->index;
 952         int nr = sattr->nr;
 953         unsigned long val;
 954
 955         if (kstrtoul(buf, 10, &val) < 0)
 956                 return -EINVAL;
 957
 958         mutex_lock(&data->update_lock);
 959         data->in[nr][index] = in_to_reg(data, nr, val);
 960         it87_write_value(data,
 961                          index == 1 ? IT87_REG_VIN_MIN(nr)
 962                                     : IT87_REG_VIN_MAX(nr),
 963                          data->in[nr][index]);
 964         mutex_unlock(&data->update_lock);
 965         return count;
 966 }
 967
 968 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
 969 static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
 970                             0, 1);
 971 static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
 972                             0, 2);
 973
 974 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
 975 static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
 976                             1, 1);
 977 static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
 978                             1, 2);
 979
 980 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
 981 static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
 982                             2, 1);
 983 static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
 984                             2, 2);
 985
 986 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
 987 static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
 988                             3, 1);
 989 static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
 990                             3, 2);
 991
 992 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
 993 static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
 994                             4, 1);
 995 static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
 996                             4, 2);
 997
 998 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
 999 static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
1000                             5, 1);
1001 static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
1002                             5, 2);
1003
1004 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
1005 static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
1006                             6, 1);
1007 static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
1008                             6, 2);
1009
1010 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
1011 static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
1012                             7, 1);
1013 static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
1014                             7, 2);
1015
1016 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
1017 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0);
1018 static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in, NULL, 10, 0);
1019 static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in, NULL, 11, 0);
1020 static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in, NULL, 12, 0);
1021
1022 /* Up to 6 temperatures */
1023 static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
1024                          char *buf)
1025 {
1026         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1027         int nr = sattr->nr;
1028         int index = sattr->index;
1029         struct it87_data *data = it87_update_device(dev);
1030
1031         return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
1032 }
1033
1034 static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
1035                         const char *buf, size_t count)
1036 {
1037         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1038         int nr = sattr->nr;
1039         int index = sattr->index;
1040         struct it87_data *data = dev_get_drvdata(dev);
1041         long val;
1042         u8 reg, regval;
1043
1044         if (kstrtol(buf, 10, &val) < 0)
1045                 return -EINVAL;
1046
1047         mutex_lock(&data->update_lock);
1048
1049         switch (index) {
1050         default:
1051         case 1:
1052                 reg = IT87_REG_TEMP_LOW(nr);
1053                 break;
1054         case 2:
1055                 reg = IT87_REG_TEMP_HIGH(nr);
1056                 break;
1057         case 3:
1058                 regval = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1059                 if (!(regval & 0x80)) {
1060                         regval |= 0x80;
1061                         it87_write_value(data, IT87_REG_BEEP_ENABLE, regval);
1062                 }
1063                 data->valid = 0;
1064                 reg = IT87_REG_TEMP_OFFSET[nr];
1065                 break;
1066         }
1067
1068         data->temp[nr][index] = TEMP_TO_REG(val);
1069         it87_write_value(data, reg, data->temp[nr][index]);
1070         mutex_unlock(&data->update_lock);
1071         return count;
1072 }
1073
1074 static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
1075 static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1076                             0, 1);
1077 static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1078                             0, 2);
1079 static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
1080                             set_temp, 0, 3);
1081 static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
1082 static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1083                             1, 1);
1084 static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1085                             1, 2);
1086 static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
1087                             set_temp, 1, 3);
1088 static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
1089 static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1090                             2, 1);
1091 static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1092                             2, 2);
1093 static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
1094                             set_temp, 2, 3);
1095 static SENSOR_DEVICE_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0);
1096 static SENSOR_DEVICE_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0);
1097 static SENSOR_DEVICE_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0);
1098
1099 static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
1100                               char *buf)
1101 {
1102         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1103         int nr = sensor_attr->index;
1104         struct it87_data *data = it87_update_device(dev);
1105         u8 reg = data->sensor;      /* In case value is updated while used */
1106         u8 extra = data->extra;
1107
1108         if ((has_temp_peci(data, nr) && (reg >> 6 == nr + 1)) ||
1109             (has_temp_old_peci(data, nr) && (extra & 0x80)))
1110                 return sprintf(buf, "6\n");  /* Intel PECI */
1111         if (reg & (1 << nr))
1112                 return sprintf(buf, "3\n");  /* thermal diode */
1113         if (reg & (8 << nr))
1114                 return sprintf(buf, "4\n");  /* thermistor */
1115         return sprintf(buf, "0\n");      /* disabled */
1116 }
1117
1118 static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
1119                              const char *buf, size_t count)
1120 {
1121         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1122         int nr = sensor_attr->index;
1123
1124         struct it87_data *data = dev_get_drvdata(dev);
1125         long val;
1126         u8 reg, extra;
1127
1128         if (kstrtol(buf, 10, &val) < 0)
1129                 return -EINVAL;
1130
1131         reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1132         reg &= ~(1 << nr);
1133         reg &= ~(8 << nr);
1134         if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6))
1135                 reg &= 0x3f;
1136         extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1137         if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6))
1138                 extra &= 0x7f;
1139         if (val == 2) { /* backwards compatibility */
1140                 dev_warn(dev,
1141                          "Sensor type 2 is deprecated, please use 4 instead\n");
1142                 val = 4;
1143         }
1144         /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */
1145         if (val == 3)
1146                 reg |= 1 << nr;
1147         else if (val == 4)
1148                 reg |= 8 << nr;
1149         else if (has_temp_peci(data, nr) && val == 6)
1150                 reg |= (nr + 1) << 6;
1151         else if (has_temp_old_peci(data, nr) && val == 6)
1152                 extra |= 0x80;
1153         else if (val != 0)
1154                 return -EINVAL;
1155
1156         mutex_lock(&data->update_lock);
1157         data->sensor = reg;
1158         data->extra = extra;
1159         it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
1160         if (has_temp_old_peci(data, nr))
1161                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1162         data->valid = 0;        /* Force cache refresh */
1163         mutex_unlock(&data->update_lock);
1164         return count;
1165 }
1166
1167 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1168                           set_temp_type, 0);
1169 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1170                           set_temp_type, 1);
1171 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1172                           set_temp_type, 2);
1173
1174 /* 6 Fans */
1175
1176 static int pwm_mode(const struct it87_data *data, int nr)
1177 {
1178         if (data->type != it8603 && nr < 3 && !(data->fan_main_ctrl & BIT(nr)))
1179                 return 0;                               /* Full speed */
1180         if (data->pwm_ctrl[nr] & 0x80)
1181                 return 2;                               /* Automatic mode */
1182         if ((data->type == it8603 || nr >= 3) &&
1183             data->pwm_duty[nr] == pwm_to_reg(data, 0xff))
1184                 return 0;                       /* Full speed */
1185
1186         return 1;                               /* Manual mode */
1187 }
1188
1189 static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
1190                         char *buf)
1191 {
1192         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1193         int nr = sattr->nr;
1194         int index = sattr->index;
1195         int speed;
1196         struct it87_data *data = it87_update_device(dev);
1197
1198         speed = has_16bit_fans(data) ?
1199                 FAN16_FROM_REG(data->fan[nr][index]) :
1200                 FAN_FROM_REG(data->fan[nr][index],
1201                              DIV_FROM_REG(data->fan_div[nr]));
1202         return sprintf(buf, "%d\n", speed);
1203 }
1204
1205 static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
1206                             char *buf)
1207 {
1208         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1209         struct it87_data *data = it87_update_device(dev);
1210         int nr = sensor_attr->index;
1211
1212         return sprintf(buf, "%lu\n", DIV_FROM_REG(data->fan_div[nr]));
1213 }
1214
1215 static ssize_t show_pwm_enable(struct device *dev,
1216                                struct device_attribute *attr, char *buf)
1217 {
1218         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1219         struct it87_data *data = it87_update_device(dev);
1220         int nr = sensor_attr->index;
1221
1222         return sprintf(buf, "%d\n", pwm_mode(data, nr));
1223 }
1224
1225 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
1226                         char *buf)
1227 {
1228         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1229         struct it87_data *data = it87_update_device(dev);
1230         int nr = sensor_attr->index;
1231
1232         return sprintf(buf, "%d\n",
1233                        pwm_from_reg(data, data->pwm_duty[nr]));
1234 }
1235
1236 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
1237                              char *buf)
1238 {
1239         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1240         struct it87_data *data = it87_update_device(dev);
1241         int nr = sensor_attr->index;
1242         unsigned int freq;
1243         int index;
1244
1245         if (has_pwm_freq2(data) && nr == 1)
1246                 index = (data->extra >> 4) & 0x07;
1247         else
1248                 index = (data->fan_ctl >> 4) & 0x07;
1249
1250         freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128);
1251
1252         return sprintf(buf, "%u\n", freq);
1253 }
1254
1255 static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
1256                        const char *buf, size_t count)
1257 {
1258         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1259         int nr = sattr->nr;
1260         int index = sattr->index;
1261
1262         struct it87_data *data = dev_get_drvdata(dev);
1263         long val;
1264         u8 reg;
1265
1266         if (kstrtol(buf, 10, &val) < 0)
1267                 return -EINVAL;
1268
1269         mutex_lock(&data->update_lock);
1270
1271         if (has_16bit_fans(data)) {
1272                 data->fan[nr][index] = FAN16_TO_REG(val);
1273                 it87_write_value(data, IT87_REG_FAN_MIN[nr],
1274                                  data->fan[nr][index] & 0xff);
1275                 it87_write_value(data, IT87_REG_FANX_MIN[nr],
1276                                  data->fan[nr][index] >> 8);
1277         } else {
1278                 reg = it87_read_value(data, IT87_REG_FAN_DIV);
1279                 switch (nr) {
1280                 case 0:
1281                         data->fan_div[nr] = reg & 0x07;
1282                         break;
1283                 case 1:
1284                         data->fan_div[nr] = (reg >> 3) & 0x07;
1285                         break;
1286                 case 2:
1287                         data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
1288                         break;
1289                 }
1290                 data->fan[nr][index] =
1291                   FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
1292                 it87_write_value(data, IT87_REG_FAN_MIN[nr],
1293                                  data->fan[nr][index]);
1294         }
1295
1296         mutex_unlock(&data->update_lock);
1297         return count;
1298 }
1299
1300 static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
1301                            const char *buf, size_t count)
1302 {
1303         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1304         struct it87_data *data = dev_get_drvdata(dev);
1305         int nr = sensor_attr->index;
1306         unsigned long val;
1307         int min;
1308         u8 old;
1309
1310         if (kstrtoul(buf, 10, &val) < 0)
1311                 return -EINVAL;
1312
1313         mutex_lock(&data->update_lock);
1314         old = it87_read_value(data, IT87_REG_FAN_DIV);
1315
1316         /* Save fan min limit */
1317         min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
1318
1319         switch (nr) {
1320         case 0:
1321         case 1:
1322                 data->fan_div[nr] = DIV_TO_REG(val);
1323                 break;
1324         case 2:
1325                 if (val < 8)
1326                         data->fan_div[nr] = 1;
1327                 else
1328                         data->fan_div[nr] = 3;
1329         }
1330         val = old & 0x80;
1331         val |= (data->fan_div[0] & 0x07);
1332         val |= (data->fan_div[1] & 0x07) << 3;
1333         if (data->fan_div[2] == 3)
1334                 val |= 0x1 << 6;
1335         it87_write_value(data, IT87_REG_FAN_DIV, val);
1336
1337         /* Restore fan min limit */
1338         data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
1339         it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan[nr][1]);
1340
1341         mutex_unlock(&data->update_lock);
1342         return count;
1343 }
1344
1345 /* Returns 0 if OK, -EINVAL otherwise */
1346 static int check_trip_points(struct device *dev, int nr)
1347 {
1348         const struct it87_data *data = dev_get_drvdata(dev);
1349         int i, err = 0;
1350
1351         if (has_old_autopwm(data)) {
1352                 for (i = 0; i < 3; i++) {
1353                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1354                                 err = -EINVAL;
1355                 }
1356                 for (i = 0; i < 2; i++) {
1357                         if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1358                                 err = -EINVAL;
1359                 }
1360         } else if (has_newer_autopwm(data)) {
1361                 for (i = 1; i < 3; i++) {
1362                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1363                                 err = -EINVAL;
1364                 }
1365         }
1366
1367         if (err) {
1368                 dev_err(dev,
1369                         "Inconsistent trip points, not switching to automatic mode\n");
1370                 dev_err(dev, "Adjust the trip points and try again\n");
1371         }
1372         return err;
1373 }
1374
1375 static ssize_t set_pwm_enable(struct device *dev, struct device_attribute *attr,
1376                               const char *buf, size_t count)
1377 {
1378         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1379         struct it87_data *data = dev_get_drvdata(dev);
1380         int nr = sensor_attr->index;
1381         long val;
1382
1383         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
1384                 return -EINVAL;
1385
1386         /* Check trip points before switching to automatic mode */
1387         if (val == 2) {
1388                 if (check_trip_points(dev, nr) < 0)
1389                         return -EINVAL;
1390         }
1391
1392         mutex_lock(&data->update_lock);
1393
1394         if (val == 0) {
1395                 if (nr < 3 && data->type != it8603) {
1396                         int tmp;
1397                         /* make sure the fan is on when in on/off mode */
1398                         tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1399                         it87_write_value(data, IT87_REG_FAN_CTL, tmp | BIT(nr));
1400                         /* set on/off mode */
1401                         data->fan_main_ctrl &= ~BIT(nr);
1402                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1403                                          data->fan_main_ctrl);
1404                 } else {
1405                         u8 ctrl;
1406
1407                         /* No on/off mode, set maximum pwm value */
1408                         data->pwm_duty[nr] = pwm_to_reg(data, 0xff);
1409                         it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1410                                          data->pwm_duty[nr]);
1411                         /* and set manual mode */
1412                         if (has_newer_autopwm(data)) {
1413                                 ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1414                                         data->pwm_temp_map[nr];
1415                         } else {
1416                                 ctrl = data->pwm_duty[nr];
1417                         }
1418                         data->pwm_ctrl[nr] = ctrl;
1419                         it87_write_value(data, IT87_REG_PWM[nr], ctrl);
1420                 }
1421         } else {
1422                 u8 ctrl;
1423
1424                 if (has_newer_autopwm(data)) {
1425                         ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1426                                 data->pwm_temp_map[nr];
1427                         if (val != 1)
1428                                 ctrl |= 0x80;
1429                 } else {
1430                         ctrl = (val == 1 ? data->pwm_duty[nr] : 0x80);
1431                 }
1432                 data->pwm_ctrl[nr] = ctrl;
1433                 it87_write_value(data, IT87_REG_PWM[nr], ctrl);
1434
1435                 if (data->type != it8603 && nr < 3) {
1436                         /* set SmartGuardian mode */
1437                         data->fan_main_ctrl |= BIT(nr);
1438                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1439                                          data->fan_main_ctrl);
1440                 }
1441         }
1442
1443         mutex_unlock(&data->update_lock);
1444         return count;
1445 }
1446
1447 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1448                        const char *buf, size_t count)
1449 {
1450         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1451         struct it87_data *data = dev_get_drvdata(dev);
1452         int nr = sensor_attr->index;
1453         long val;
1454
1455         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1456                 return -EINVAL;
1457
1458         mutex_lock(&data->update_lock);
1459         it87_update_pwm_ctrl(data, nr);
1460         if (has_newer_autopwm(data)) {
1461                 /*
1462                  * If we are in automatic mode, the PWM duty cycle register
1463                  * is read-only so we can't write the value.
1464                  */
1465                 if (data->pwm_ctrl[nr] & 0x80) {
1466                         mutex_unlock(&data->update_lock);
1467                         return -EBUSY;
1468                 }
1469                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1470                 it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1471                                  data->pwm_duty[nr]);
1472         } else {
1473                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1474                 /*
1475                  * If we are in manual mode, write the duty cycle immediately;
1476                  * otherwise, just store it for later use.
1477                  */
1478                 if (!(data->pwm_ctrl[nr] & 0x80)) {
1479                         data->pwm_ctrl[nr] = data->pwm_duty[nr];
1480                         it87_write_value(data, IT87_REG_PWM[nr],
1481                                          data->pwm_ctrl[nr]);
1482                 }
1483         }
1484         mutex_unlock(&data->update_lock);
1485         return count;
1486 }
1487
1488 static ssize_t set_pwm_freq(struct device *dev, struct device_attribute *attr,
1489                             const char *buf, size_t count)
1490 {
1491         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1492         struct it87_data *data = dev_get_drvdata(dev);
1493         int nr = sensor_attr->index;
1494         unsigned long val;
1495         int i;
1496
1497         if (kstrtoul(buf, 10, &val) < 0)
1498                 return -EINVAL;
1499
1500         val = clamp_val(val, 0, 1000000);
1501         val *= has_newer_autopwm(data) ? 256 : 128;
1502
1503         /* Search for the nearest available frequency */
1504         for (i = 0; i < 7; i++) {
1505                 if (val > (pwm_freq[i] + pwm_freq[i + 1]) / 2)
1506                         break;
1507         }
1508
1509         mutex_lock(&data->update_lock);
1510         if (nr == 0) {
1511                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
1512                 data->fan_ctl |= i << 4;
1513                 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
1514         } else {
1515                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x8f;
1516                 data->extra |= i << 4;
1517                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1518         }
1519         mutex_unlock(&data->update_lock);
1520
1521         return count;
1522 }
1523
1524 static ssize_t show_pwm_temp_map(struct device *dev,
1525                                  struct device_attribute *attr, char *buf)
1526 {
1527         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1528         struct it87_data *data = it87_update_device(dev);
1529         int nr = sensor_attr->index;
1530         int map;
1531
1532         map = data->pwm_temp_map[nr];
1533         if (map >= 3)
1534                 map = 0;        /* Should never happen */
1535         if (nr >= 3)            /* pwm channels 3..6 map to temp4..6 */
1536                 map += 3;
1537
1538         return sprintf(buf, "%d\n", (int)BIT(map));
1539 }
1540
1541 static ssize_t set_pwm_temp_map(struct device *dev,
1542                                 struct device_attribute *attr, const char *buf,
1543                                 size_t count)
1544 {
1545         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1546         struct it87_data *data = dev_get_drvdata(dev);
1547         int nr = sensor_attr->index;
1548         long val;
1549         u8 reg;
1550
1551         if (kstrtol(buf, 10, &val) < 0)
1552                 return -EINVAL;
1553
1554         if (nr >= 3)
1555                 val -= 3;
1556
1557         switch (val) {
1558         case BIT(0):
1559                 reg = 0x00;
1560                 break;
1561         case BIT(1):
1562                 reg = 0x01;
1563                 break;
1564         case BIT(2):
1565                 reg = 0x02;
1566                 break;
1567         default:
1568                 return -EINVAL;
1569         }
1570
1571         mutex_lock(&data->update_lock);
1572         it87_update_pwm_ctrl(data, nr);
1573         data->pwm_temp_map[nr] = reg;
1574         /*
1575          * If we are in automatic mode, write the temp mapping immediately;
1576          * otherwise, just store it for later use.
1577          */
1578         if (data->pwm_ctrl[nr] & 0x80) {
1579                 data->pwm_ctrl[nr] = (data->pwm_ctrl[nr] & 0xfc) |
1580                                                 data->pwm_temp_map[nr];
1581                 it87_write_value(data, IT87_REG_PWM[nr], data->pwm_ctrl[nr]);
1582         }
1583         mutex_unlock(&data->update_lock);
1584         return count;
1585 }
1586
1587 static ssize_t show_auto_pwm(struct device *dev, struct device_attribute *attr,
1588                              char *buf)
1589 {
1590         struct it87_data *data = it87_update_device(dev);
1591         struct sensor_device_attribute_2 *sensor_attr =
1592                         to_sensor_dev_attr_2(attr);
1593         int nr = sensor_attr->nr;
1594         int point = sensor_attr->index;
1595
1596         return sprintf(buf, "%d\n",
1597                        pwm_from_reg(data, data->auto_pwm[nr][point]));
1598 }
1599
1600 static ssize_t set_auto_pwm(struct device *dev, struct device_attribute *attr,
1601                             const char *buf, size_t count)
1602 {
1603         struct it87_data *data = dev_get_drvdata(dev);
1604         struct sensor_device_attribute_2 *sensor_attr =
1605                         to_sensor_dev_attr_2(attr);
1606         int nr = sensor_attr->nr;
1607         int point = sensor_attr->index;
1608         int regaddr;
1609         long val;
1610
1611         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1612                 return -EINVAL;
1613
1614         mutex_lock(&data->update_lock);
1615         data->auto_pwm[nr][point] = pwm_to_reg(data, val);
1616         if (has_newer_autopwm(data))
1617                 regaddr = IT87_REG_AUTO_TEMP(nr, 3);
1618         else
1619                 regaddr = IT87_REG_AUTO_PWM(nr, point);
1620         it87_write_value(data, regaddr, data->auto_pwm[nr][point]);
1621         mutex_unlock(&data->update_lock);
1622         return count;
1623 }
1624
1625 static ssize_t show_auto_pwm_slope(struct device *dev,
1626                                    struct device_attribute *attr, char *buf)
1627 {
1628         struct it87_data *data = it87_update_device(dev);
1629         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1630         int nr = sensor_attr->index;
1631
1632         return sprintf(buf, "%d\n", data->auto_pwm[nr][1] & 0x7f);
1633 }
1634
1635 static ssize_t set_auto_pwm_slope(struct device *dev,
1636                                   struct device_attribute *attr,
1637                                   const char *buf, size_t count)
1638 {
1639         struct it87_data *data = dev_get_drvdata(dev);
1640         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1641         int nr = sensor_attr->index;
1642         unsigned long val;
1643
1644         if (kstrtoul(buf, 10, &val) < 0 || val > 127)
1645                 return -EINVAL;
1646
1647         mutex_lock(&data->update_lock);
1648         data->auto_pwm[nr][1] = (data->auto_pwm[nr][1] & 0x80) | val;
1649         it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 4),
1650                          data->auto_pwm[nr][1]);
1651         mutex_unlock(&data->update_lock);
1652         return count;
1653 }
1654
1655 static ssize_t show_auto_temp(struct device *dev, struct device_attribute *attr,
1656                               char *buf)
1657 {
1658         struct it87_data *data = it87_update_device(dev);
1659         struct sensor_device_attribute_2 *sensor_attr =
1660                         to_sensor_dev_attr_2(attr);
1661         int nr = sensor_attr->nr;
1662         int point = sensor_attr->index;
1663         int reg;
1664
1665         if (has_old_autopwm(data) || point)
1666                 reg = data->auto_temp[nr][point];
1667         else
1668                 reg = data->auto_temp[nr][1] - (data->auto_temp[nr][0] & 0x1f);
1669
1670         return sprintf(buf, "%d\n", TEMP_FROM_REG(reg));
1671 }
1672
1673 static ssize_t set_auto_temp(struct device *dev, struct device_attribute *attr,
1674                              const char *buf, size_t count)
1675 {
1676         struct it87_data *data = dev_get_drvdata(dev);
1677         struct sensor_device_attribute_2 *sensor_attr =
1678                         to_sensor_dev_attr_2(attr);
1679         int nr = sensor_attr->nr;
1680         int point = sensor_attr->index;
1681         long val;
1682         int reg;
1683
1684         if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
1685                 return -EINVAL;
1686
1687         mutex_lock(&data->update_lock);
1688         if (has_newer_autopwm(data) && !point) {
1689                 reg = data->auto_temp[nr][1] - TEMP_TO_REG(val);
1690                 reg = clamp_val(reg, 0, 0x1f) | (data->auto_temp[nr][0] & 0xe0);
1691                 data->auto_temp[nr][0] = reg;
1692                 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 5), reg);
1693         } else {
1694                 reg = TEMP_TO_REG(val);
1695                 data->auto_temp[nr][point] = reg;
1696                 if (has_newer_autopwm(data))
1697                         point--;
1698                 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point), reg);
1699         }
1700         mutex_unlock(&data->update_lock);
1701         return count;
1702 }
1703
1704 static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
1705 static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1706                             0, 1);
1707 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
1708                           set_fan_div, 0);
1709
1710 static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
1711 static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1712                             1, 1);
1713 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
1714                           set_fan_div, 1);
1715
1716 static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
1717 static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1718                             2, 1);
1719 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
1720                           set_fan_div, 2);
1721
1722 static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
1723 static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1724                             3, 1);
1725
1726 static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
1727 static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1728                             4, 1);
1729
1730 static SENSOR_DEVICE_ATTR_2(fan6_input, S_IRUGO, show_fan, NULL, 5, 0);
1731 static SENSOR_DEVICE_ATTR_2(fan6_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1732                             5, 1);
1733
1734 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
1735                           show_pwm_enable, set_pwm_enable, 0);
1736 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0);
1737 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq,
1738                           set_pwm_freq, 0);
1739 static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO,
1740                           show_pwm_temp_map, set_pwm_temp_map, 0);
1741 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR,
1742                             show_auto_pwm, set_auto_pwm, 0, 0);
1743 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR,
1744                             show_auto_pwm, set_auto_pwm, 0, 1);
1745 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR,
1746                             show_auto_pwm, set_auto_pwm, 0, 2);
1747 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO,
1748                             show_auto_pwm, NULL, 0, 3);
1749 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
1750                             show_auto_temp, set_auto_temp, 0, 1);
1751 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1752                             show_auto_temp, set_auto_temp, 0, 0);
1753 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
1754                             show_auto_temp, set_auto_temp, 0, 2);
1755 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
1756                             show_auto_temp, set_auto_temp, 0, 3);
1757 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR,
1758                             show_auto_temp, set_auto_temp, 0, 4);
1759 static SENSOR_DEVICE_ATTR_2(pwm1_auto_start, S_IRUGO | S_IWUSR,
1760                             show_auto_pwm, set_auto_pwm, 0, 0);
1761 static SENSOR_DEVICE_ATTR(pwm1_auto_slope, S_IRUGO | S_IWUSR,
1762                           show_auto_pwm_slope, set_auto_pwm_slope, 0);
1763
1764 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
1765                           show_pwm_enable, set_pwm_enable, 1);
1766 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1);
1767 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, set_pwm_freq, 1);
1768 static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO,
1769                           show_pwm_temp_map, set_pwm_temp_map, 1);
1770 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR,
1771                             show_auto_pwm, set_auto_pwm, 1, 0);
1772 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR,
1773                             show_auto_pwm, set_auto_pwm, 1, 1);
1774 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR,
1775                             show_auto_pwm, set_auto_pwm, 1, 2);
1776 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO,
1777                             show_auto_pwm, NULL, 1, 3);
1778 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
1779                             show_auto_temp, set_auto_temp, 1, 1);
1780 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1781                             show_auto_temp, set_auto_temp, 1, 0);
1782 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
1783                             show_auto_temp, set_auto_temp, 1, 2);
1784 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
1785                             show_auto_temp, set_auto_temp, 1, 3);
1786 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR,
1787                             show_auto_temp, set_auto_temp, 1, 4);
1788 static SENSOR_DEVICE_ATTR_2(pwm2_auto_start, S_IRUGO | S_IWUSR,
1789                             show_auto_pwm, set_auto_pwm, 1, 0);
1790 static SENSOR_DEVICE_ATTR(pwm2_auto_slope, S_IRUGO | S_IWUSR,
1791                           show_auto_pwm_slope, set_auto_pwm_slope, 1);
1792
1793 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
1794                           show_pwm_enable, set_pwm_enable, 2);
1795 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2);
1796 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL, 2);
1797 static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO,
1798                           show_pwm_temp_map, set_pwm_temp_map, 2);
1799 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR,
1800                             show_auto_pwm, set_auto_pwm, 2, 0);
1801 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR,
1802                             show_auto_pwm, set_auto_pwm, 2, 1);
1803 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR,
1804                             show_auto_pwm, set_auto_pwm, 2, 2);
1805 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO,
1806                             show_auto_pwm, NULL, 2, 3);
1807 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
1808                             show_auto_temp, set_auto_temp, 2, 1);
1809 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1810                             show_auto_temp, set_auto_temp, 2, 0);
1811 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
1812                             show_auto_temp, set_auto_temp, 2, 2);
1813 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
1814                             show_auto_temp, set_auto_temp, 2, 3);
1815 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR,
1816                             show_auto_temp, set_auto_temp, 2, 4);
1817 static SENSOR_DEVICE_ATTR_2(pwm3_auto_start, S_IRUGO | S_IWUSR,
1818                             show_auto_pwm, set_auto_pwm, 2, 0);
1819 static SENSOR_DEVICE_ATTR(pwm3_auto_slope, S_IRUGO | S_IWUSR,
1820                           show_auto_pwm_slope, set_auto_pwm_slope, 2);
1821
1822 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IRUGO | S_IWUSR,
1823                           show_pwm_enable, set_pwm_enable, 3);
1824 static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 3);
1825 static SENSOR_DEVICE_ATTR(pwm4_freq, S_IRUGO, show_pwm_freq, NULL, 3);
1826 static SENSOR_DEVICE_ATTR(pwm4_auto_channels_temp, S_IRUGO,
1827                           show_pwm_temp_map, set_pwm_temp_map, 3);
1828 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp, S_IRUGO | S_IWUSR,
1829                             show_auto_temp, set_auto_temp, 2, 1);
1830 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1831                             show_auto_temp, set_auto_temp, 2, 0);
1832 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point2_temp, S_IRUGO | S_IWUSR,
1833                             show_auto_temp, set_auto_temp, 2, 2);
1834 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point3_temp, S_IRUGO | S_IWUSR,
1835                             show_auto_temp, set_auto_temp, 2, 3);
1836 static SENSOR_DEVICE_ATTR_2(pwm4_auto_start, S_IRUGO | S_IWUSR,
1837                             show_auto_pwm, set_auto_pwm, 3, 0);
1838 static SENSOR_DEVICE_ATTR(pwm4_auto_slope, S_IRUGO | S_IWUSR,
1839                           show_auto_pwm_slope, set_auto_pwm_slope, 3);
1840
1841 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IRUGO | S_IWUSR,
1842                           show_pwm_enable, set_pwm_enable, 4);
1843 static SENSOR_DEVICE_ATTR(pwm5, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 4);
1844 static SENSOR_DEVICE_ATTR(pwm5_freq, S_IRUGO, show_pwm_freq, NULL, 4);
1845 static SENSOR_DEVICE_ATTR(pwm5_auto_channels_temp, S_IRUGO,
1846                           show_pwm_temp_map, set_pwm_temp_map, 4);
1847 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp, S_IRUGO | S_IWUSR,
1848                             show_auto_temp, set_auto_temp, 2, 1);
1849 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1850                             show_auto_temp, set_auto_temp, 2, 0);
1851 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point2_temp, S_IRUGO | S_IWUSR,
1852                             show_auto_temp, set_auto_temp, 2, 2);
1853 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point3_temp, S_IRUGO | S_IWUSR,
1854                             show_auto_temp, set_auto_temp, 2, 3);
1855 static SENSOR_DEVICE_ATTR_2(pwm5_auto_start, S_IRUGO | S_IWUSR,
1856                             show_auto_pwm, set_auto_pwm, 4, 0);
1857 static SENSOR_DEVICE_ATTR(pwm5_auto_slope, S_IRUGO | S_IWUSR,
1858                           show_auto_pwm_slope, set_auto_pwm_slope, 4);
1859
1860 static SENSOR_DEVICE_ATTR(pwm6_enable, S_IRUGO | S_IWUSR,
1861                           show_pwm_enable, set_pwm_enable, 5);
1862 static SENSOR_DEVICE_ATTR(pwm6, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 5);
1863 static SENSOR_DEVICE_ATTR(pwm6_freq, S_IRUGO, show_pwm_freq, NULL, 5);
1864 static SENSOR_DEVICE_ATTR(pwm6_auto_channels_temp, S_IRUGO,
1865                           show_pwm_temp_map, set_pwm_temp_map, 5);
1866 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp, S_IRUGO | S_IWUSR,
1867                             show_auto_temp, set_auto_temp, 2, 1);
1868 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1869                             show_auto_temp, set_auto_temp, 2, 0);
1870 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point2_temp, S_IRUGO | S_IWUSR,
1871                             show_auto_temp, set_auto_temp, 2, 2);
1872 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point3_temp, S_IRUGO | S_IWUSR,
1873                             show_auto_temp, set_auto_temp, 2, 3);
1874 static SENSOR_DEVICE_ATTR_2(pwm6_auto_start, S_IRUGO | S_IWUSR,
1875                             show_auto_pwm, set_auto_pwm, 5, 0);
1876 static SENSOR_DEVICE_ATTR(pwm6_auto_slope, S_IRUGO | S_IWUSR,
1877                           show_auto_pwm_slope, set_auto_pwm_slope, 5);
1878
1879 /* Alarms */
1880 static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
1881                            char *buf)
1882 {
1883         struct it87_data *data = it87_update_device(dev);
1884
1885         return sprintf(buf, "%u\n", data->alarms);
1886 }
1887 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
1888
1889 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
1890                           char *buf)
1891 {
1892         struct it87_data *data = it87_update_device(dev);
1893         int bitnr = to_sensor_dev_attr(attr)->index;
1894
1895         return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
1896 }
1897
1898 static ssize_t clear_intrusion(struct device *dev,
1899                                struct device_attribute *attr, const char *buf,
1900                                size_t count)
1901 {
1902         struct it87_data *data = dev_get_drvdata(dev);
1903         int config;
1904         long val;
1905
1906         if (kstrtol(buf, 10, &val) < 0 || val != 0)
1907                 return -EINVAL;
1908
1909         mutex_lock(&data->update_lock);
1910         config = it87_read_value(data, IT87_REG_CONFIG);
1911         if (config < 0) {
1912                 count = config;
1913         } else {
1914                 config |= BIT(5);
1915                 it87_write_value(data, IT87_REG_CONFIG, config);
1916                 /* Invalidate cache to force re-read */
1917                 data->valid = 0;
1918         }
1919         mutex_unlock(&data->update_lock);
1920
1921         return count;
1922 }
1923
1924 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
1925 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
1926 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
1927 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
1928 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
1929 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
1930 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
1931 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
1932 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
1933 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
1934 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
1935 static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
1936 static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
1937 static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 7);
1938 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
1939 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
1940 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
1941 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
1942                           show_alarm, clear_intrusion, 4);
1943
1944 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
1945                          char *buf)
1946 {
1947         struct it87_data *data = it87_update_device(dev);
1948         int bitnr = to_sensor_dev_attr(attr)->index;
1949
1950         return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
1951 }
1952
1953 static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
1954                         const char *buf, size_t count)
1955 {
1956         int bitnr = to_sensor_dev_attr(attr)->index;
1957         struct it87_data *data = dev_get_drvdata(dev);
1958         long val;
1959
1960         if (kstrtol(buf, 10, &val) < 0 || (val != 0 && val != 1))
1961                 return -EINVAL;
1962
1963         mutex_lock(&data->update_lock);
1964         data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1965         if (val)
1966                 data->beeps |= BIT(bitnr);
1967         else
1968                 data->beeps &= ~BIT(bitnr);
1969         it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
1970         mutex_unlock(&data->update_lock);
1971         return count;
1972 }
1973
1974 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
1975                           show_beep, set_beep, 1);
1976 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
1977 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
1978 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
1979 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
1980 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
1981 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
1982 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
1983 /* fanX_beep writability is set later */
1984 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
1985 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
1986 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
1987 static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
1988 static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
1989 static SENSOR_DEVICE_ATTR(fan6_beep, S_IRUGO, show_beep, set_beep, 0);
1990 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
1991                           show_beep, set_beep, 2);
1992 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
1993 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
1994
1995 static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
1996                             char *buf)
1997 {
1998         struct it87_data *data = dev_get_drvdata(dev);
1999
2000         return sprintf(buf, "%u\n", data->vrm);
2001 }
2002
2003 static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
2004                              const char *buf, size_t count)
2005 {
2006         struct it87_data *data = dev_get_drvdata(dev);
2007         unsigned long val;
2008
2009         if (kstrtoul(buf, 10, &val) < 0)
2010                 return -EINVAL;
2011
2012         data->vrm = val;
2013
2014         return count;
2015 }
2016 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
2017
2018 static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
2019                             char *buf)
2020 {
2021         struct it87_data *data = it87_update_device(dev);
2022
2023         return sprintf(buf, "%ld\n", (long)vid_from_reg(data->vid, data->vrm));
2024 }
2025 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
2026
2027 static ssize_t show_label(struct device *dev, struct device_attribute *attr,
2028                           char *buf)
2029 {
2030         static const char * const labels[] = {
2031                 "+5V",
2032                 "5VSB",
2033                 "Vbat",
2034                 "AVCC",
2035         };
2036         static const char * const labels_it8721[] = {
2037                 "+3.3V",
2038                 "3VSB",
2039                 "Vbat",
2040                 "+3.3V",
2041         };
2042         struct it87_data *data = dev_get_drvdata(dev);
2043         int nr = to_sensor_dev_attr(attr)->index;
2044         const char *label;
2045
2046         if (has_vin3_5v(data) && nr == 0)
2047                 label = labels[0];
2048         else if (has_12mv_adc(data) || has_10_9mv_adc(data))
2049                 label = labels_it8721[nr];
2050         else
2051                 label = labels[nr];
2052
2053         return sprintf(buf, "%s\n", label);
2054 }
2055 static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
2056 static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
2057 static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
2058 /* AVCC3 */
2059 static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 3);
2060
2061 static umode_t it87_in_is_visible(struct kobject *kobj,
2062                                   struct attribute *attr, int index)
2063 {
2064         struct device *dev = container_of(kobj, struct device, kobj);
2065         struct it87_data *data = dev_get_drvdata(dev);
2066         int i = index / 5;      /* voltage index */
2067         int a = index % 5;      /* attribute index */
2068
2069         if (index >= 40) {      /* in8 and higher only have input attributes */
2070                 i = index - 40 + 8;
2071                 a = 0;
2072         }
2073
2074         if (!(data->has_in & BIT(i)))
2075                 return 0;
2076
2077         if (a == 4 && !data->has_beep)
2078                 return 0;
2079
2080         return attr->mode;
2081 }
2082
2083 static struct attribute *it87_attributes_in[] = {
2084         &sensor_dev_attr_in0_input.dev_attr.attr,
2085         &sensor_dev_attr_in0_min.dev_attr.attr,
2086         &sensor_dev_attr_in0_max.dev_attr.attr,
2087         &sensor_dev_attr_in0_alarm.dev_attr.attr,
2088         &sensor_dev_attr_in0_beep.dev_attr.attr,        /* 4 */
2089
2090         &sensor_dev_attr_in1_input.dev_attr.attr,
2091         &sensor_dev_attr_in1_min.dev_attr.attr,
2092         &sensor_dev_attr_in1_max.dev_attr.attr,
2093         &sensor_dev_attr_in1_alarm.dev_attr.attr,
2094         &sensor_dev_attr_in1_beep.dev_attr.attr,        /* 9 */
2095
2096         &sensor_dev_attr_in2_input.dev_attr.attr,
2097         &sensor_dev_attr_in2_min.dev_attr.attr,
2098         &sensor_dev_attr_in2_max.dev_attr.attr,
2099         &sensor_dev_attr_in2_alarm.dev_attr.attr,
2100         &sensor_dev_attr_in2_beep.dev_attr.attr,        /* 14 */
2101
2102         &sensor_dev_attr_in3_input.dev_attr.attr,
2103         &sensor_dev_attr_in3_min.dev_attr.attr,
2104         &sensor_dev_attr_in3_max.dev_attr.attr,
2105         &sensor_dev_attr_in3_alarm.dev_attr.attr,
2106         &sensor_dev_attr_in3_beep.dev_attr.attr,        /* 19 */
2107
2108         &sensor_dev_attr_in4_input.dev_attr.attr,
2109         &sensor_dev_attr_in4_min.dev_attr.attr,
2110         &sensor_dev_attr_in4_max.dev_attr.attr,
2111         &sensor_dev_attr_in4_alarm.dev_attr.attr,
2112         &sensor_dev_attr_in4_beep.dev_attr.attr,        /* 24 */
2113
2114         &sensor_dev_attr_in5_input.dev_attr.attr,
2115         &sensor_dev_attr_in5_min.dev_attr.attr,
2116         &sensor_dev_attr_in5_max.dev_attr.attr,
2117         &sensor_dev_attr_in5_alarm.dev_attr.attr,
2118         &sensor_dev_attr_in5_beep.dev_attr.attr,        /* 29 */
2119
2120         &sensor_dev_attr_in6_input.dev_attr.attr,
2121         &sensor_dev_attr_in6_min.dev_attr.attr,
2122         &sensor_dev_attr_in6_max.dev_attr.attr,
2123         &sensor_dev_attr_in6_alarm.dev_attr.attr,
2124         &sensor_dev_attr_in6_beep.dev_attr.attr,        /* 34 */
2125
2126         &sensor_dev_attr_in7_input.dev_attr.attr,
2127         &sensor_dev_attr_in7_min.dev_attr.attr,
2128         &sensor_dev_attr_in7_max.dev_attr.attr,
2129         &sensor_dev_attr_in7_alarm.dev_attr.attr,
2130         &sensor_dev_attr_in7_beep.dev_attr.attr,        /* 39 */
2131
2132         &sensor_dev_attr_in8_input.dev_attr.attr,       /* 40 */
2133         &sensor_dev_attr_in9_input.dev_attr.attr,       /* 41 */
2134         &sensor_dev_attr_in10_input.dev_attr.attr,      /* 41 */
2135         &sensor_dev_attr_in11_input.dev_attr.attr,      /* 41 */
2136         &sensor_dev_attr_in12_input.dev_attr.attr,      /* 41 */
2137         NULL
2138 };
2139
2140 static const struct attribute_group it87_group_in = {
2141         .attrs = it87_attributes_in,
2142         .is_visible = it87_in_is_visible,
2143 };
2144
2145 static umode_t it87_temp_is_visible(struct kobject *kobj,
2146                                     struct attribute *attr, int index)
2147 {
2148         struct device *dev = container_of(kobj, struct device, kobj);
2149         struct it87_data *data = dev_get_drvdata(dev);
2150         int i = index / 7;      /* temperature index */
2151         int a = index % 7;      /* attribute index */
2152
2153         if (index >= 21) {
2154                 i = index - 21 + 3;
2155                 a = 0;
2156         }
2157
2158         if (!(data->has_temp & BIT(i)))
2159                 return 0;
2160
2161         if (a == 5 && !has_temp_offset(data))
2162                 return 0;
2163
2164         if (a == 6 && !data->has_beep)
2165                 return 0;
2166
2167         return attr->mode;
2168 }
2169
2170 static struct attribute *it87_attributes_temp[] = {
2171         &sensor_dev_attr_temp1_input.dev_attr.attr,
2172         &sensor_dev_attr_temp1_max.dev_attr.attr,
2173         &sensor_dev_attr_temp1_min.dev_attr.attr,
2174         &sensor_dev_attr_temp1_type.dev_attr.attr,
2175         &sensor_dev_attr_temp1_alarm.dev_attr.attr,
2176         &sensor_dev_attr_temp1_offset.dev_attr.attr,    /* 5 */
2177         &sensor_dev_attr_temp1_beep.dev_attr.attr,      /* 6 */
2178
2179         &sensor_dev_attr_temp2_input.dev_attr.attr,     /* 7 */
2180         &sensor_dev_attr_temp2_max.dev_attr.attr,
2181         &sensor_dev_attr_temp2_min.dev_attr.attr,
2182         &sensor_dev_attr_temp2_type.dev_attr.attr,
2183         &sensor_dev_attr_temp2_alarm.dev_attr.attr,
2184         &sensor_dev_attr_temp2_offset.dev_attr.attr,
2185         &sensor_dev_attr_temp2_beep.dev_attr.attr,
2186
2187         &sensor_dev_attr_temp3_input.dev_attr.attr,     /* 14 */
2188         &sensor_dev_attr_temp3_max.dev_attr.attr,
2189         &sensor_dev_attr_temp3_min.dev_attr.attr,
2190         &sensor_dev_attr_temp3_type.dev_attr.attr,
2191         &sensor_dev_attr_temp3_alarm.dev_attr.attr,
2192         &sensor_dev_attr_temp3_offset.dev_attr.attr,
2193         &sensor_dev_attr_temp3_beep.dev_attr.attr,
2194
2195         &sensor_dev_attr_temp4_input.dev_attr.attr,     /* 21 */
2196         &sensor_dev_attr_temp5_input.dev_attr.attr,
2197         &sensor_dev_attr_temp6_input.dev_attr.attr,
2198         NULL
2199 };
2200
2201 static const struct attribute_group it87_group_temp = {
2202         .attrs = it87_attributes_temp,
2203         .is_visible = it87_temp_is_visible,
2204 };
2205
2206 static umode_t it87_is_visible(struct kobject *kobj,
2207                                struct attribute *attr, int index)
2208 {
2209         struct device *dev = container_of(kobj, struct device, kobj);
2210         struct it87_data *data = dev_get_drvdata(dev);
2211
2212         if ((index == 2 || index == 3) && !data->has_vid)
2213                 return 0;
2214
2215         if (index > 3 && !(data->in_internal & BIT(index - 4)))
2216                 return 0;
2217
2218         return attr->mode;
2219 }
2220
2221 static struct attribute *it87_attributes[] = {
2222         &dev_attr_alarms.attr,
2223         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
2224         &dev_attr_vrm.attr,                             /* 2 */
2225         &dev_attr_cpu0_vid.attr,                        /* 3 */
2226         &sensor_dev_attr_in3_label.dev_attr.attr,       /* 4 .. 7 */
2227         &sensor_dev_attr_in7_label.dev_attr.attr,
2228         &sensor_dev_attr_in8_label.dev_attr.attr,
2229         &sensor_dev_attr_in9_label.dev_attr.attr,
2230         NULL
2231 };
2232
2233 static const struct attribute_group it87_group = {
2234         .attrs = it87_attributes,
2235         .is_visible = it87_is_visible,
2236 };
2237
2238 static umode_t it87_fan_is_visible(struct kobject *kobj,
2239                                    struct attribute *attr, int index)
2240 {
2241         struct device *dev = container_of(kobj, struct device, kobj);
2242         struct it87_data *data = dev_get_drvdata(dev);
2243         int i = index / 5;      /* fan index */
2244         int a = index % 5;      /* attribute index */
2245
2246         if (index >= 15) {      /* fan 4..6 don't have divisor attributes */
2247                 i = (index - 15) / 4 + 3;
2248                 a = (index - 15) % 4;
2249         }
2250
2251         if (!(data->has_fan & BIT(i)))
2252                 return 0;
2253
2254         if (a == 3) {                           /* beep */
2255                 if (!data->has_beep)
2256                         return 0;
2257                 /* first fan beep attribute is writable */
2258                 if (i == __ffs(data->has_fan))
2259                         return attr->mode | S_IWUSR;
2260         }
2261
2262         if (a == 4 && has_16bit_fans(data))     /* divisor */
2263                 return 0;
2264
2265         return attr->mode;
2266 }
2267
2268 static struct attribute *it87_attributes_fan[] = {
2269         &sensor_dev_attr_fan1_input.dev_attr.attr,
2270         &sensor_dev_attr_fan1_min.dev_attr.attr,
2271         &sensor_dev_attr_fan1_alarm.dev_attr.attr,
2272         &sensor_dev_attr_fan1_beep.dev_attr.attr,       /* 3 */
2273         &sensor_dev_attr_fan1_div.dev_attr.attr,        /* 4 */
2274
2275         &sensor_dev_attr_fan2_input.dev_attr.attr,
2276         &sensor_dev_attr_fan2_min.dev_attr.attr,
2277         &sensor_dev_attr_fan2_alarm.dev_attr.attr,
2278         &sensor_dev_attr_fan2_beep.dev_attr.attr,
2279         &sensor_dev_attr_fan2_div.dev_attr.attr,        /* 9 */
2280
2281         &sensor_dev_attr_fan3_input.dev_attr.attr,
2282         &sensor_dev_attr_fan3_min.dev_attr.attr,
2283         &sensor_dev_attr_fan3_alarm.dev_attr.attr,
2284         &sensor_dev_attr_fan3_beep.dev_attr.attr,
2285         &sensor_dev_attr_fan3_div.dev_attr.attr,        /* 14 */
2286
2287         &sensor_dev_attr_fan4_input.dev_attr.attr,      /* 15 */
2288         &sensor_dev_attr_fan4_min.dev_attr.attr,
2289         &sensor_dev_attr_fan4_alarm.dev_attr.attr,
2290         &sensor_dev_attr_fan4_beep.dev_attr.attr,
2291
2292         &sensor_dev_attr_fan5_input.dev_attr.attr,      /* 19 */
2293         &sensor_dev_attr_fan5_min.dev_attr.attr,
2294         &sensor_dev_attr_fan5_alarm.dev_attr.attr,
2295         &sensor_dev_attr_fan5_beep.dev_attr.attr,
2296
2297         &sensor_dev_attr_fan6_input.dev_attr.attr,      /* 23 */
2298         &sensor_dev_attr_fan6_min.dev_attr.attr,
2299         &sensor_dev_attr_fan6_alarm.dev_attr.attr,
2300         &sensor_dev_attr_fan6_beep.dev_attr.attr,
2301         NULL
2302 };
2303
2304 static const struct attribute_group it87_group_fan = {
2305         .attrs = it87_attributes_fan,
2306         .is_visible = it87_fan_is_visible,
2307 };
2308
2309 static umode_t it87_pwm_is_visible(struct kobject *kobj,
2310                                    struct attribute *attr, int index)
2311 {
2312         struct device *dev = container_of(kobj, struct device, kobj);
2313         struct it87_data *data = dev_get_drvdata(dev);
2314         int i = index / 4;      /* pwm index */
2315         int a = index % 4;      /* attribute index */
2316
2317         if (!(data->has_pwm & BIT(i)))
2318                 return 0;
2319
2320         /* pwmX_auto_channels_temp is only writable if auto pwm is supported */
2321         if (a == 3 && (has_old_autopwm(data) || has_newer_autopwm(data)))
2322                 return attr->mode | S_IWUSR;
2323
2324         /* pwm2_freq is writable if there are two pwm frequency selects */
2325         if (has_pwm_freq2(data) && i == 1 && a == 2)
2326                 return attr->mode | S_IWUSR;
2327
2328         return attr->mode;
2329 }
2330
2331 static struct attribute *it87_attributes_pwm[] = {
2332         &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2333         &sensor_dev_attr_pwm1.dev_attr.attr,
2334         &sensor_dev_attr_pwm1_freq.dev_attr.attr,
2335         &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
2336
2337         &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2338         &sensor_dev_attr_pwm2.dev_attr.attr,
2339         &sensor_dev_attr_pwm2_freq.dev_attr.attr,
2340         &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
2341
2342         &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2343         &sensor_dev_attr_pwm3.dev_attr.attr,
2344         &sensor_dev_attr_pwm3_freq.dev_attr.attr,
2345         &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
2346
2347         &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2348         &sensor_dev_attr_pwm4.dev_attr.attr,
2349         &sensor_dev_attr_pwm4_freq.dev_attr.attr,
2350         &sensor_dev_attr_pwm4_auto_channels_temp.dev_attr.attr,
2351
2352         &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2353         &sensor_dev_attr_pwm5.dev_attr.attr,
2354         &sensor_dev_attr_pwm5_freq.dev_attr.attr,
2355         &sensor_dev_attr_pwm5_auto_channels_temp.dev_attr.attr,
2356
2357         &sensor_dev_attr_pwm6_enable.dev_attr.attr,
2358         &sensor_dev_attr_pwm6.dev_attr.attr,
2359         &sensor_dev_attr_pwm6_freq.dev_attr.attr,
2360         &sensor_dev_attr_pwm6_auto_channels_temp.dev_attr.attr,
2361
2362         NULL
2363 };
2364
2365 static const struct attribute_group it87_group_pwm = {
2366         .attrs = it87_attributes_pwm,
2367         .is_visible = it87_pwm_is_visible,
2368 };
2369
2370 static umode_t it87_auto_pwm_is_visible(struct kobject *kobj,
2371                                         struct attribute *attr, int index)
2372 {
2373         struct device *dev = container_of(kobj, struct device, kobj);
2374         struct it87_data *data = dev_get_drvdata(dev);
2375         int i = index / 11;     /* pwm index */
2376         int a = index % 11;     /* attribute index */
2377
2378         if (index >= 33) {      /* pwm 4..6 */
2379                 i = (index - 33) / 6 + 3;
2380                 a = (index - 33) % 6 + 4;
2381         }
2382
2383         if (!(data->has_pwm & BIT(i)))
2384                 return 0;
2385
2386         if (has_newer_autopwm(data)) {
2387                 if (a < 4)      /* no auto point pwm */
2388                         return 0;
2389                 if (a == 8)     /* no auto_point4 */
2390                         return 0;
2391         }
2392         if (has_old_autopwm(data)) {
2393                 if (a >= 9)     /* no pwm_auto_start, pwm_auto_slope */
2394                         return 0;
2395         }
2396
2397         return attr->mode;
2398 }
2399
2400 static struct attribute *it87_attributes_auto_pwm[] = {
2401         &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
2402         &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
2403         &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
2404         &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
2405         &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
2406         &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
2407         &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
2408         &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
2409         &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
2410         &sensor_dev_attr_pwm1_auto_start.dev_attr.attr,
2411         &sensor_dev_attr_pwm1_auto_slope.dev_attr.attr,
2412
2413         &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,    /* 11 */
2414         &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
2415         &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
2416         &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
2417         &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
2418         &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
2419         &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
2420         &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
2421         &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
2422         &sensor_dev_attr_pwm2_auto_start.dev_attr.attr,
2423         &sensor_dev_attr_pwm2_auto_slope.dev_attr.attr,
2424
2425         &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,    /* 22 */
2426         &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
2427         &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
2428         &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
2429         &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
2430         &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
2431         &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
2432         &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
2433         &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
2434         &sensor_dev_attr_pwm3_auto_start.dev_attr.attr,
2435         &sensor_dev_attr_pwm3_auto_slope.dev_attr.attr,
2436
2437         &sensor_dev_attr_pwm4_auto_point1_temp.dev_attr.attr,   /* 33 */
2438         &sensor_dev_attr_pwm4_auto_point1_temp_hyst.dev_attr.attr,
2439         &sensor_dev_attr_pwm4_auto_point2_temp.dev_attr.attr,
2440         &sensor_dev_attr_pwm4_auto_point3_temp.dev_attr.attr,
2441         &sensor_dev_attr_pwm4_auto_start.dev_attr.attr,
2442         &sensor_dev_attr_pwm4_auto_slope.dev_attr.attr,
2443
2444         &sensor_dev_attr_pwm5_auto_point1_temp.dev_attr.attr,
2445         &sensor_dev_attr_pwm5_auto_point1_temp_hyst.dev_attr.attr,
2446         &sensor_dev_attr_pwm5_auto_point2_temp.dev_attr.attr,
2447         &sensor_dev_attr_pwm5_auto_point3_temp.dev_attr.attr,
2448         &sensor_dev_attr_pwm5_auto_start.dev_attr.attr,
2449         &sensor_dev_attr_pwm5_auto_slope.dev_attr.attr,
2450
2451         &sensor_dev_attr_pwm6_auto_point1_temp.dev_attr.attr,
2452         &sensor_dev_attr_pwm6_auto_point1_temp_hyst.dev_attr.attr,
2453         &sensor_dev_attr_pwm6_auto_point2_temp.dev_attr.attr,
2454         &sensor_dev_attr_pwm6_auto_point3_temp.dev_attr.attr,
2455         &sensor_dev_attr_pwm6_auto_start.dev_attr.attr,
2456         &sensor_dev_attr_pwm6_auto_slope.dev_attr.attr,
2457
2458         NULL,
2459 };
2460
2461 static const struct attribute_group it87_group_auto_pwm = {
2462         .attrs = it87_attributes_auto_pwm,
2463         .is_visible = it87_auto_pwm_is_visible,
2464 };
2465
2466 /* SuperIO detection - will change isa_address if a chip is found */
2467 static int __init it87_find(int sioaddr, unsigned short *address,
2468                             struct it87_sio_data *sio_data)
2469 {
2470         int err;
2471         u16 chip_type;
2472         const char *board_vendor, *board_name;
2473         const struct it87_devices *config;
2474
2475         err = superio_enter(sioaddr);
2476         if (err)
2477                 return err;
2478
2479         err = -ENODEV;
2480         chip_type = superio_inw(sioaddr, DEVID);
2481         if (chip_type == 0xffff)
2482                 goto exit;
2483
2484         if (force_id)
2485                 chip_type = force_id;
2486
2487         switch (chip_type) {
2488         case IT8705F_DEVID:
2489                 sio_data->type = it87;
2490                 break;
2491         case IT8712F_DEVID:
2492                 sio_data->type = it8712;
2493                 break;
2494         case IT8716F_DEVID:
2495         case IT8726F_DEVID:
2496                 sio_data->type = it8716;
2497                 break;
2498         case IT8718F_DEVID:
2499                 sio_data->type = it8718;
2500                 break;
2501         case IT8720F_DEVID:
2502                 sio_data->type = it8720;
2503                 break;
2504         case IT8721F_DEVID:
2505                 sio_data->type = it8721;
2506                 break;
2507         case IT8728F_DEVID:
2508                 sio_data->type = it8728;
2509                 break;
2510         case IT8732F_DEVID:
2511                 sio_data->type = it8732;
2512                 break;
2513         case IT8792E_DEVID:
2514                 sio_data->type = it8792;
2515                 break;
2516         case IT8771E_DEVID:
2517                 sio_data->type = it8771;
2518                 break;
2519         case IT8772E_DEVID:
2520                 sio_data->type = it8772;
2521                 break;
2522         case IT8781F_DEVID:
2523                 sio_data->type = it8781;
2524                 break;
2525         case IT8782F_DEVID:
2526                 sio_data->type = it8782;
2527                 break;
2528         case IT8783E_DEVID:
2529                 sio_data->type = it8783;
2530                 break;
2531         case IT8786E_DEVID:
2532                 sio_data->type = it8786;
2533                 break;
2534         case IT8790E_DEVID:
2535                 sio_data->type = it8790;
2536                 break;
2537         case IT8603E_DEVID:
2538         case IT8623E_DEVID:
2539                 sio_data->type = it8603;
2540                 break;
2541         case IT8607E_DEVID:
2542                 sio_data->type = it8607;
2543                 break;
2544         case IT8620E_DEVID:
2545                 sio_data->type = it8620;
2546                 break;
2547         case IT8622E_DEVID:
2548                 sio_data->type = it8622;
2549                 break;
2550         case IT8628E_DEVID:
2551                 sio_data->type = it8628;
2552                 break;
2553         case IT8665E_DEVID:
2554                 sio_data->type = it8665;
2555                 break;
2556         case IT8686E_DEVID:
2557                 sio_data->type = it8686;
2558                 break;
2559         case 0xffff:    /* No device at all */
2560                 goto exit;
2561         default:
2562                 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
2563                 goto exit;
2564         }
2565
2566         superio_select(sioaddr, PME);
2567         if (!(superio_inb(sioaddr, IT87_ACT_REG) & 0x01)) {
2568                 pr_info("Device not activated, skipping\n");
2569                 goto exit;
2570         }
2571
2572         *address = superio_inw(sioaddr, IT87_BASE_REG) & ~(IT87_EXTENT - 1);
2573         if (*address == 0) {
2574                 pr_info("Base address not set, skipping\n");
2575                 goto exit;
2576         }
2577
2578         err = 0;
2579         sio_data->revision = superio_inb(sioaddr, DEVREV) & 0x0f;
2580         pr_info("Found IT%04x%s chip at 0x%x, revision %d\n", chip_type,
2581                 it87_devices[sio_data->type].suffix,
2582                 *address, sio_data->revision);
2583
2584         config = &it87_devices[sio_data->type];
2585
2586         /* in7 (VSB or VCCH5V) is always internal on some chips */
2587         if (has_in7_internal(config))
2588                 sio_data->internal |= BIT(1);
2589
2590         /* in8 (Vbat) is always internal */
2591         sio_data->internal |= BIT(2);
2592
2593         /* in9 (AVCC3), always internal if supported */
2594         if (has_avcc3(config))
2595                 sio_data->internal |= BIT(3); /* in9 is AVCC */
2596         else
2597                 sio_data->skip_in |= BIT(9);
2598
2599         if (!has_four_pwm(config))
2600                 sio_data->skip_pwm |= BIT(3) | BIT(4) | BIT(5);
2601         else if (!has_five_pwm(config))
2602                 sio_data->skip_pwm |= BIT(4) | BIT(5);
2603         else if (!has_six_pwm(config))
2604                 sio_data->skip_pwm |= BIT(5);
2605
2606         if (!has_vid(config))
2607                 sio_data->skip_vid = 1;
2608
2609         /* Read GPIO config and VID value from LDN 7 (GPIO) */
2610         if (sio_data->type == it87) {
2611                 /* The IT8705F has a different LD number for GPIO */
2612                 superio_select(sioaddr, 5);
2613                 sio_data->beep_pin = superio_inb(sioaddr,
2614                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2615         } else if (sio_data->type == it8783) {
2616                 int reg25, reg27, reg2a, reg2c, regef;
2617
2618                 superio_select(sioaddr, GPIO);
2619
2620                 reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2621                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2622                 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
2623                 reg2c = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2624                 regef = superio_inb(sioaddr, IT87_SIO_SPI_REG);
2625
2626                 /* Check if fan3 is there or not */
2627                 if ((reg27 & BIT(0)) || !(reg2c & BIT(2)))
2628                         sio_data->skip_fan |= BIT(2);
2629                 if ((reg25 & BIT(4)) ||
2630                     (!(reg2a & BIT(1)) && (regef & BIT(0))))
2631                         sio_data->skip_pwm |= BIT(2);
2632
2633                 /* Check if fan2 is there or not */
2634                 if (reg27 & BIT(7))
2635                         sio_data->skip_fan |= BIT(1);
2636                 if (reg27 & BIT(3))
2637                         sio_data->skip_pwm |= BIT(1);
2638
2639                 /* VIN5 */
2640                 if ((reg27 & BIT(0)) || (reg2c & BIT(2)))
2641                         sio_data->skip_in |= BIT(5); /* No VIN5 */
2642
2643                 /* VIN6 */
2644                 if (reg27 & BIT(1))
2645                         sio_data->skip_in |= BIT(6); /* No VIN6 */
2646
2647                 /*
2648                  * VIN7
2649                  * Does not depend on bit 2 of Reg2C, contrary to datasheet.
2650                  */
2651                 if (reg27 & BIT(2)) {
2652                         /*
2653                          * The data sheet is a bit unclear regarding the
2654                          * internal voltage divider for VCCH5V. It says
2655                          * "This bit enables and switches VIN7 (pin 91) to the
2656                          * internal voltage divider for VCCH5V".
2657                          * This is different to other chips, where the internal
2658                          * voltage divider would connect VIN7 to an internal
2659                          * voltage source. Maybe that is the case here as well.
2660                          *
2661                          * Since we don't know for sure, re-route it if that is
2662                          * not the case, and ask the user to report if the
2663                          * resulting voltage is sane.
2664                          */
2665                         if (!(reg2c & BIT(1))) {
2666                                 reg2c |= BIT(1);
2667                                 superio_outb(sioaddr, IT87_SIO_PINX2_REG,
2668                                              reg2c);
2669                                 pr_notice("Routing internal VCCH5V to in7.\n");
2670                         }
2671                         pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
2672                         pr_notice("Please report if it displays a reasonable voltage.\n");
2673                 }
2674
2675                 if (reg2c & BIT(0))
2676                         sio_data->internal |= BIT(0);
2677                 if (reg2c & BIT(1))
2678                         sio_data->internal |= BIT(1);
2679
2680                 sio_data->beep_pin = superio_inb(sioaddr,
2681                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2682         } else if (sio_data->type == it8603 || sio_data->type == it8607) {
2683                 int reg27, reg29;
2684
2685                 superio_select(sioaddr, GPIO);
2686
2687                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2688
2689                 /* Check if fan3 is there or not */
2690                 if (reg27 & BIT(6))
2691                         sio_data->skip_pwm |= BIT(2);
2692                 if (reg27 & BIT(7))
2693                         sio_data->skip_fan |= BIT(2);
2694
2695                 /* Check if fan2 is there or not */
2696                 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2697                 if (reg29 & BIT(1))
2698                         sio_data->skip_pwm |= BIT(1);
2699                 if (reg29 & BIT(2))
2700                         sio_data->skip_fan |= BIT(1);
2701
2702                 if (sio_data->type == it8603) {
2703                         sio_data->skip_in |= BIT(5); /* No VIN5 */
2704                         sio_data->skip_in |= BIT(6); /* No VIN6 */
2705                 }
2706
2707                 sio_data->beep_pin = superio_inb(sioaddr,
2708                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2709         } else if (sio_data->type == it8620 || sio_data->type == it8628 ||
2710                    sio_data->type == it8686) {
2711                 int reg;
2712
2713                 superio_select(sioaddr, GPIO);
2714
2715                 /* Check for pwm5 */
2716                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2717                 if (reg & BIT(6))
2718                         sio_data->skip_pwm |= BIT(4);
2719
2720                 /* Check for fan4, fan5 */
2721                 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2722                 if (!(reg & BIT(5)))
2723                         sio_data->skip_fan |= BIT(3);
2724                 if (!(reg & BIT(4)))
2725                         sio_data->skip_fan |= BIT(4);
2726
2727                 /* Check for pwm3, fan3 */
2728                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2729                 if (reg & BIT(6))
2730                         sio_data->skip_pwm |= BIT(2);
2731                 if (reg & BIT(7))
2732                         sio_data->skip_fan |= BIT(2);
2733
2734                 /* Check for pwm4 */
2735                 reg = superio_inb(sioaddr, IT87_SIO_GPIO4_REG);
2736                 if (reg & BIT(2))
2737                         sio_data->skip_pwm |= BIT(3);
2738
2739                 /* Check for pwm2, fan2 */
2740                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2741                 if (reg & BIT(1))
2742                         sio_data->skip_pwm |= BIT(1);
2743                 if (reg & BIT(2))
2744                         sio_data->skip_fan |= BIT(1);
2745                 /* Check for pwm6, fan6 */
2746                 if (!(reg & BIT(7))) {
2747                         sio_data->skip_pwm |= BIT(5);
2748                         sio_data->skip_fan |= BIT(5);
2749                 }
2750
2751                 /* Check if AVCC is on VIN3 */
2752                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2753                 if (reg & BIT(0))
2754                         sio_data->internal |= BIT(0);
2755                 else
2756                         sio_data->skip_in |= BIT(9);
2757
2758                 sio_data->beep_pin = superio_inb(sioaddr,
2759                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2760         } else if (sio_data->type == it8622) {
2761                 int reg;
2762
2763                 superio_select(sioaddr, GPIO);
2764
2765                 /* Check for pwm4, fan4 */
2766                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2767                 if (reg & BIT(6))
2768                         sio_data->skip_fan |= BIT(3);
2769                 if (reg & BIT(5))
2770                         sio_data->skip_pwm |= BIT(3);
2771
2772                 /* Check for pwm3, fan3, pwm5, fan5 */
2773                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2774                 if (reg & BIT(6))
2775                         sio_data->skip_pwm |= BIT(2);
2776                 if (reg & BIT(7))
2777                         sio_data->skip_fan |= BIT(2);
2778                 if (reg & BIT(3))
2779                         sio_data->skip_pwm |= BIT(4);
2780                 if (reg & BIT(1))
2781                         sio_data->skip_fan |= BIT(4);
2782
2783                 /* Check for pwm2, fan2 */
2784                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2785                 if (reg & BIT(1))
2786                         sio_data->skip_pwm |= BIT(1);
2787                 if (reg & BIT(2))
2788                         sio_data->skip_fan |= BIT(1);
2789
2790                 /* Check for AVCC */
2791                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2792                 if (!(reg & BIT(0)))
2793                         sio_data->skip_in |= BIT(9);
2794
2795                 sio_data->beep_pin = superio_inb(sioaddr,
2796                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2797         } else if (sio_data->type == it8732) {
2798                 int reg;
2799
2800                 superio_select(sioaddr, GPIO);
2801
2802                 /* Check for pwm2, fan2 */
2803                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2804                 if (reg & BIT(1))
2805                         sio_data->skip_pwm |= BIT(1);
2806                 if (reg & BIT(2))
2807                         sio_data->skip_fan |= BIT(1);
2808
2809                 /* Check for pwm3, fan3, fan4 */
2810                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2811                 if (reg & BIT(6))
2812                         sio_data->skip_pwm |= BIT(2);
2813                 if (reg & BIT(7))
2814                         sio_data->skip_fan |= BIT(2);
2815                 if (reg & BIT(5))
2816                         sio_data->skip_fan |= BIT(3);
2817
2818                 /* Check if AVCC is on VIN3 */
2819                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2820                 if (reg & BIT(0))
2821                         sio_data->internal |= BIT(0);
2822
2823                 sio_data->beep_pin = superio_inb(sioaddr,
2824                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2825         } else if (sio_data->type == it8665) {
2826                 int reg;
2827
2828                 superio_select(sioaddr, GPIO);
2829
2830                 /* Check for pwm2 */
2831                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2832                 if (reg & BIT(1))
2833                         sio_data->skip_pwm |= BIT(1);
2834
2835                 /* Check for fan2 */
2836                 reg = superio_inb(sioaddr, IT87_SIO_PINX4_REG);
2837                 if (reg & BIT(4))
2838                         sio_data->skip_fan |= BIT(1);
2839
2840                 /* Check for pwm3, fan3 */
2841                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2842                 if (reg & BIT(6))
2843                         sio_data->skip_pwm |= BIT(2);
2844                 if (reg & BIT(7))
2845                         sio_data->skip_fan |= BIT(2);
2846
2847                 /* Check for pwm5, fan5 */
2848                 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2849                 if (reg & BIT(5))
2850                         sio_data->skip_pwm |= BIT(4);
2851                 if (!(reg & BIT(4)))
2852                         sio_data->skip_fan |= BIT(4);
2853
2854                 /* Check for pwm4, fan4, pwm6, fan6 */
2855                 reg = superio_inb(sioaddr, IT87_SIO_GPIO9_REG);
2856                 if (reg & BIT(2))
2857                         sio_data->skip_pwm |= BIT(3);
2858                 if (reg & BIT(3))
2859                         sio_data->skip_fan |= BIT(3);
2860                 if (reg & BIT(0))
2861                         sio_data->skip_pwm |= BIT(5);
2862                 if (reg & BIT(1))
2863                         sio_data->skip_fan |= BIT(5);
2864
2865                 sio_data->beep_pin = superio_inb(sioaddr,
2866                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2867         } else {
2868                 int reg;
2869                 bool uart6;
2870
2871                 superio_select(sioaddr, GPIO);
2872
2873                 /* Check for fan4, fan5 */
2874                 if (has_five_fans(config)) {
2875                         reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2876                         switch (sio_data->type) {
2877                         case it8718:
2878                                 if (reg & BIT(5))
2879                                         sio_data->skip_fan |= BIT(3);
2880                                 if (reg & BIT(4))
2881                                         sio_data->skip_fan |= BIT(4);
2882                                 break;
2883                         case it8720:
2884                         case it8721:
2885                         case it8728:
2886                                 if (!(reg & BIT(5)))
2887                                         sio_data->skip_fan |= BIT(3);
2888                                 if (!(reg & BIT(4)))
2889                                         sio_data->skip_fan |= BIT(4);
2890                                 break;
2891                         default:
2892                                 break;
2893                         }
2894                 }
2895
2896                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2897                 if (!sio_data->skip_vid) {
2898                         /* We need at least 4 VID pins */
2899                         if (reg & 0x0f) {
2900                                 pr_info("VID is disabled (pins used for GPIO)\n");
2901                                 sio_data->skip_vid = 1;
2902                         }
2903                 }
2904
2905                 /* Check if fan3 is there or not */
2906                 if (reg & BIT(6))
2907                         sio_data->skip_pwm |= BIT(2);
2908                 if (reg & BIT(7))
2909                         sio_data->skip_fan |= BIT(2);
2910
2911                 /* Check if fan2 is there or not */
2912                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2913                 if (reg & BIT(1))
2914                         sio_data->skip_pwm |= BIT(1);
2915                 if (reg & BIT(2))
2916                         sio_data->skip_fan |= BIT(1);
2917
2918                 if ((sio_data->type == it8718 || sio_data->type == it8720) &&
2919                     !(sio_data->skip_vid))
2920                         sio_data->vid_value = superio_inb(sioaddr,
2921                                                           IT87_SIO_VID_REG);
2922
2923                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2924
2925                 uart6 = sio_data->type == it8782 && (reg & BIT(2));
2926
2927                 /*
2928                  * The IT8720F has no VIN7 pin, so VCCH should always be
2929                  * routed internally to VIN7 with an internal divider.
2930                  * Curiously, there still is a configuration bit to control
2931                  * this, which means it can be set incorrectly. And even
2932                  * more curiously, many boards out there are improperly
2933                  * configured, even though the IT8720F datasheet claims
2934                  * that the internal routing of VCCH to VIN7 is the default
2935                  * setting. So we force the internal routing in this case.
2936                  *
2937                  * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
2938                  * If UART6 is enabled, re-route VIN7 to the internal divider
2939                  * if that is not already the case.
2940                  */
2941                 if ((sio_data->type == it8720 || uart6) && !(reg & BIT(1))) {
2942                         reg |= BIT(1);
2943                         superio_outb(sioaddr, IT87_SIO_PINX2_REG, reg);
2944                         pr_notice("Routing internal VCCH to in7\n");
2945                 }
2946                 if (reg & BIT(0))
2947                         sio_data->internal |= BIT(0);
2948                 if (reg & BIT(1))
2949                         sio_data->internal |= BIT(1);
2950
2951                 /*
2952                  * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
2953                  * While VIN7 can be routed to the internal voltage divider,
2954                  * VIN5 and VIN6 are not available if UART6 is enabled.
2955                  *
2956                  * Also, temp3 is not available if UART6 is enabled and TEMPIN3
2957                  * is the temperature source. Since we can not read the
2958                  * temperature source here, skip_temp is preliminary.
2959                  */
2960                 if (uart6) {
2961                         sio_data->skip_in |= BIT(5) | BIT(6);
2962                         sio_data->skip_temp |= BIT(2);
2963                 }
2964
2965                 sio_data->beep_pin = superio_inb(sioaddr,
2966                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2967         }
2968         if (sio_data->beep_pin)
2969                 pr_info("Beeping is supported\n");
2970
2971         /* Disable specific features based on DMI strings */
2972         board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
2973         board_name = dmi_get_system_info(DMI_BOARD_NAME);
2974         if (board_vendor && board_name) {
2975                 if (strcmp(board_vendor, "nVIDIA") == 0 &&
2976                     strcmp(board_name, "FN68PT") == 0) {
2977                         /*
2978                          * On the Shuttle SN68PT, FAN_CTL2 is apparently not
2979                          * connected to a fan, but to something else. One user
2980                          * has reported instant system power-off when changing
2981                          * the PWM2 duty cycle, so we disable it.
2982                          * I use the board name string as the trigger in case
2983                          * the same board is ever used in other systems.
2984                          */
2985                         pr_info("Disabling pwm2 due to hardware constraints\n");
2986                         sio_data->skip_pwm = BIT(1);
2987                 }
2988         }
2989
2990 exit:
2991         superio_exit(sioaddr);
2992         return err;
2993 }
2994
2995 /* Called when we have found a new IT87. */
2996 static void it87_init_device(struct platform_device *pdev)
2997 {
2998         struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
2999         struct it87_data *data = platform_get_drvdata(pdev);
3000         int tmp, i;
3001         u8 mask;
3002
3003         /*
3004          * For each PWM channel:
3005          * - If it is in automatic mode, setting to manual mode should set
3006          *   the fan to full speed by default.
3007          * - If it is in manual mode, we need a mapping to temperature
3008          *   channels to use when later setting to automatic mode later.
3009          *   Use a 1:1 mapping by default (we are clueless.)
3010          * In both cases, the value can (and should) be changed by the user
3011          * prior to switching to a different mode.
3012          * Note that this is no longer needed for the IT8721F and later, as
3013          * these have separate registers for the temperature mapping and the
3014          * manual duty cycle.
3015          */
3016         for (i = 0; i < NUM_AUTO_PWM; i++) {
3017                 data->pwm_temp_map[i] = i;
3018                 data->pwm_duty[i] = 0x7f;       /* Full speed */
3019                 data->auto_pwm[i][3] = 0x7f;    /* Full speed, hard-coded */
3020         }
3021
3022         /*
3023          * Some chips seem to have default value 0xff for all limit
3024          * registers. For low voltage limits it makes no sense and triggers
3025          * alarms, so change to 0 instead. For high temperature limits, it
3026          * means -1 degree C, which surprisingly doesn't trigger an alarm,
3027          * but is still confusing, so change to 127 degrees C.
3028          */
3029         for (i = 0; i < NUM_VIN_LIMIT; i++) {
3030                 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
3031                 if (tmp == 0xff)
3032                         it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
3033         }
3034         for (i = 0; i < NUM_TEMP_LIMIT; i++) {
3035                 tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
3036                 if (tmp == 0xff)
3037                         it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
3038         }
3039
3040         /*
3041          * Temperature channels are not forcibly enabled, as they can be
3042          * set to two different sensor types and we can't guess which one
3043          * is correct for a given system. These channels can be enabled at
3044          * run-time through the temp{1-3}_type sysfs accessors if needed.
3045          */
3046
3047         /* Check if voltage monitors are reset manually or by some reason */
3048         tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
3049         if ((tmp & 0xff) == 0) {
3050                 /* Enable all voltage monitors */
3051                 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
3052         }
3053
3054         /* Check if tachometers are reset manually or by some reason */
3055         mask = 0x70 & ~(sio_data->skip_fan << 4);
3056         data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
3057         if ((data->fan_main_ctrl & mask) == 0) {
3058                 /* Enable all fan tachometers */
3059                 data->fan_main_ctrl |= mask;
3060                 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
3061                                  data->fan_main_ctrl);
3062         }
3063         data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
3064
3065         tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
3066
3067         /* Set tachometers to 16-bit mode if needed */
3068         if (has_fan16_config(data)) {
3069                 if (~tmp & 0x07 & data->has_fan) {
3070                         dev_dbg(&pdev->dev,
3071                                 "Setting fan1-3 to 16-bit mode\n");
3072                         it87_write_value(data, IT87_REG_FAN_16BIT,
3073                                          tmp | 0x07);
3074                 }
3075         }
3076
3077         /* Check for additional fans */
3078         if (has_four_fans(data) && (tmp & BIT(4)))
3079                 data->has_fan |= BIT(3); /* fan4 enabled */
3080         if (has_five_fans(data) && (tmp & BIT(5)))
3081                 data->has_fan |= BIT(4); /* fan5 enabled */
3082         if (has_six_fans(data)) {
3083                 switch (data->type) {
3084                 case it8620:
3085                 case it8628:
3086                 case it8686:
3087                         if (tmp & BIT(2))
3088                                 data->has_fan |= BIT(5); /* fan6 enabled */
3089                         break;
3090                 case it8665:
3091                         tmp = it87_read_value(data, IT87_REG_FAN_DIV);
3092                         if (tmp & BIT(3))
3093                                 data->has_fan |= BIT(5); /* fan6 enabled */
3094                         break;
3095                 default:
3096                         break;
3097                 }
3098         }
3099
3100         /* Fan input pins may be used for alternative functions */
3101         data->has_fan &= ~sio_data->skip_fan;
3102
3103         /* Check if pwm6 is enabled */
3104         if (has_six_pwm(data)) {
3105                 switch (data->type) {
3106                 case it8620:
3107                 case it8686:
3108                         tmp = it87_read_value(data, IT87_REG_FAN_DIV);
3109                         if (!(tmp & BIT(3)))
3110                                 sio_data->skip_pwm |= BIT(5);
3111                         break;
3112                 default:
3113                         break;
3114                 }
3115         }
3116
3117         /* Start monitoring */
3118         it87_write_value(data, IT87_REG_CONFIG,
3119                          (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
3120                          | (update_vbat ? 0x41 : 0x01));
3121 }
3122
3123 /* Return 1 if and only if the PWM interface is safe to use */
3124 static int it87_check_pwm(struct device *dev)
3125 {
3126         struct it87_data *data = dev_get_drvdata(dev);
3127         /*
3128          * Some BIOSes fail to correctly configure the IT87 fans. All fans off
3129          * and polarity set to active low is sign that this is the case so we
3130          * disable pwm control to protect the user.
3131          */
3132         int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
3133
3134         if ((tmp & 0x87) == 0) {
3135                 if (fix_pwm_polarity) {
3136                         /*
3137                          * The user asks us to attempt a chip reconfiguration.
3138                          * This means switching to active high polarity and
3139                          * inverting all fan speed values.
3140                          */
3141                         int i;
3142                         u8 pwm[3];
3143
3144                         for (i = 0; i < ARRAY_SIZE(pwm); i++)
3145                                 pwm[i] = it87_read_value(data,
3146                                                          IT87_REG_PWM[i]);
3147
3148                         /*
3149                          * If any fan is in automatic pwm mode, the polarity
3150                          * might be correct, as suspicious as it seems, so we
3151                          * better don't change anything (but still disable the
3152                          * PWM interface).
3153                          */
3154                         if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
3155                                 dev_info(dev,
3156                                          "Reconfiguring PWM to active high polarity\n");
3157                                 it87_write_value(data, IT87_REG_FAN_CTL,
3158                                                  tmp | 0x87);
3159                                 for (i = 0; i < 3; i++)
3160                                         it87_write_value(data,
3161                                                          IT87_REG_PWM[i],
3162                                                          0x7f & ~pwm[i]);
3163                                 return 1;
3164                         }
3165
3166                         dev_info(dev,
3167                                  "PWM configuration is too broken to be fixed\n");
3168                 }
3169
3170                 dev_info(dev,
3171                          "Detected broken BIOS defaults, disabling PWM interface\n");
3172                 return 0;
3173         } else if (fix_pwm_polarity) {
3174                 dev_info(dev,
3175                          "PWM configuration looks sane, won't touch\n");
3176         }
3177
3178         return 1;
3179 }
3180
3181 static int it87_probe(struct platform_device *pdev)
3182 {
3183         struct it87_data *data;
3184         struct resource *res;
3185         struct device *dev = &pdev->dev;
3186         struct it87_sio_data *sio_data = dev_get_platdata(dev);
3187         int enable_pwm_interface;
3188         struct device *hwmon_dev;
3189
3190         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3191         if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
3192                                  DRVNAME)) {
3193                 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
3194                         (unsigned long)res->start,
3195                         (unsigned long)(res->start + IT87_EC_EXTENT - 1));
3196                 return -EBUSY;
3197         }
3198
3199         data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
3200         if (!data)
3201                 return -ENOMEM;
3202
3203         data->addr = res->start;
3204         data->type = sio_data->type;
3205         data->features = it87_devices[sio_data->type].features;
3206         data->peci_mask = it87_devices[sio_data->type].peci_mask;
3207         data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
3208         data->bank = 0xff;
3209
3210         /*
3211          * IT8705F Datasheet 0.4.1, 3h == Version G.
3212          * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
3213          * These are the first revisions with 16-bit tachometer support.
3214          */
3215         switch (data->type) {
3216         case it87:
3217                 if (sio_data->revision >= 0x03) {
3218                         data->features &= ~FEAT_OLD_AUTOPWM;
3219                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS;
3220                 }
3221                 break;
3222         case it8712:
3223                 if (sio_data->revision >= 0x08) {
3224                         data->features &= ~FEAT_OLD_AUTOPWM;
3225                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS |
3226                                           FEAT_FIVE_FANS;
3227                 }
3228                 break;
3229         default:
3230                 break;
3231         }
3232
3233         /* Now, we do the remaining detection. */
3234         if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80) ||
3235             it87_read_value(data, IT87_REG_CHIPID) != 0x90)
3236                 return -ENODEV;
3237
3238         platform_set_drvdata(pdev, data);
3239
3240         mutex_init(&data->update_lock);
3241
3242         /* Check PWM configuration */
3243         enable_pwm_interface = it87_check_pwm(dev);
3244
3245         /* Starting with IT8721F, we handle scaling of internal voltages */
3246         if (has_scaling(data)) {
3247                 if (sio_data->internal & BIT(0))
3248                         data->in_scaled |= BIT(3);      /* in3 is AVCC */
3249                 if (sio_data->internal & BIT(1))
3250                         data->in_scaled |= BIT(7);      /* in7 is VSB */
3251                 if (sio_data->internal & BIT(2))
3252                         data->in_scaled |= BIT(8);      /* in8 is Vbat */
3253                 if (sio_data->internal & BIT(3))
3254                         data->in_scaled |= BIT(9);      /* in9 is AVCC */
3255         } else if (sio_data->type == it8781 || sio_data->type == it8782 ||
3256                    sio_data->type == it8783) {
3257                 if (sio_data->internal & BIT(0))
3258                         data->in_scaled |= BIT(3);      /* in3 is VCC5V */
3259                 if (sio_data->internal & BIT(1))
3260                         data->in_scaled |= BIT(7);      /* in7 is VCCH5V */
3261         }
3262
3263         data->has_temp = 0x07;
3264         if (sio_data->skip_temp & BIT(2)) {
3265                 if (sio_data->type == it8782 &&
3266                     !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
3267                         data->has_temp &= ~BIT(2);
3268         }
3269
3270         data->in_internal = sio_data->internal;
3271         data->has_in = 0x3ff & ~sio_data->skip_in;
3272
3273         if (has_six_temp(data)) {
3274                 u8 reg = it87_read_value(data, IT87_REG_TEMP456_ENABLE);
3275
3276                 /* Check for additional temperature sensors */
3277                 if ((reg & 0x03) >= 0x02)
3278                         data->has_temp |= BIT(3);
3279                 if (((reg >> 2) & 0x03) >= 0x02)
3280                         data->has_temp |= BIT(4);
3281                 if (((reg >> 4) & 0x03) >= 0x02)
3282                         data->has_temp |= BIT(5);
3283
3284                 /* Check for additional voltage sensors */
3285                 if ((reg & 0x03) == 0x01)
3286                         data->has_in |= BIT(10);
3287                 if (((reg >> 2) & 0x03) == 0x01)
3288                         data->has_in |= BIT(11);
3289                 if (((reg >> 4) & 0x03) == 0x01)
3290                         data->has_in |= BIT(12);
3291         }
3292
3293         data->has_beep = !!sio_data->beep_pin;
3294
3295         /* Initialize the IT87 chip */
3296         it87_init_device(pdev);
3297
3298         if (!sio_data->skip_vid) {
3299                 data->has_vid = true;
3300                 data->vrm = vid_which_vrm();
3301                 /* VID reading from Super-I/O config space if available */
3302                 data->vid = sio_data->vid_value;
3303         }
3304
3305         /* Prepare for sysfs hooks */
3306         data->groups[0] = &it87_group;
3307         data->groups[1] = &it87_group_in;
3308         data->groups[2] = &it87_group_temp;
3309         data->groups[3] = &it87_group_fan;
3310
3311         if (enable_pwm_interface) {
3312                 data->has_pwm = BIT(ARRAY_SIZE(IT87_REG_PWM)) - 1;
3313                 data->has_pwm &= ~sio_data->skip_pwm;
3314
3315                 data->groups[4] = &it87_group_pwm;
3316                 if (has_old_autopwm(data) || has_newer_autopwm(data))
3317                         data->groups[5] = &it87_group_auto_pwm;
3318         }
3319
3320         hwmon_dev = devm_hwmon_device_register_with_groups(dev,
3321                                         it87_devices[sio_data->type].name,
3322                                         data, data->groups);
3323         return PTR_ERR_OR_ZERO(hwmon_dev);
3324 }
3325
3326 static struct platform_driver it87_driver = {
3327         .driver = {
3328                 .name   = DRVNAME,
3329         },
3330         .probe  = it87_probe,
3331 };
3332
3333 static int __init it87_device_add(int index, unsigned short address,
3334                                   const struct it87_sio_data *sio_data)
3335 {
3336         struct platform_device *pdev;
3337         struct resource res = {
3338                 .start  = address + IT87_EC_OFFSET,
3339                 .end    = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
3340                 .name   = DRVNAME,
3341                 .flags  = IORESOURCE_IO,
3342         };
3343         int err;
3344
3345         err = acpi_check_resource_conflict(&res);
3346         if (err)
3347                 return err;
3348
3349         pdev = platform_device_alloc(DRVNAME, address);
3350         if (!pdev)
3351                 return -ENOMEM;
3352
3353         err = platform_device_add_resources(pdev, &res, 1);
3354         if (err) {
3355                 pr_err("Device resource addition failed (%d)\n", err);
3356                 goto exit_device_put;
3357         }
3358
3359         err = platform_device_add_data(pdev, sio_data,
3360                                        sizeof(struct it87_sio_data));
3361         if (err) {
3362                 pr_err("Platform data allocation failed\n");
3363                 goto exit_device_put;
3364         }
3365
3366         err = platform_device_add(pdev);
3367         if (err) {
3368                 pr_err("Device addition failed (%d)\n", err);
3369                 goto exit_device_put;
3370         }
3371
3372         it87_pdev[index] = pdev;
3373         return 0;
3374
3375 exit_device_put:
3376         platform_device_put(pdev);
3377         return err;
3378 }
3379
3380 static int __init sm_it87_init(void)
3381 {
3382         int sioaddr[2] = { REG_2E, REG_4E };
3383         struct it87_sio_data sio_data;
3384         unsigned short isa_address;
3385         bool found = false;
3386         int i, err;
3387
3388         err = platform_driver_register(&it87_driver);
3389         if (err)
3390                 return err;
3391
3392         for (i = 0; i < ARRAY_SIZE(sioaddr); i++) {
3393                 memset(&sio_data, 0, sizeof(struct it87_sio_data));
3394                 isa_address = 0;
3395                 err = it87_find(sioaddr[i], &isa_address, &sio_data);
3396                 if (err || isa_address == 0)
3397                         continue;
3398
3399                 err = it87_device_add(i, isa_address, &sio_data);
3400                 if (err)
3401                         goto exit_dev_unregister;
3402                 found = true;
3403         }
3404
3405         if (!found) {
3406                 err = -ENODEV;
3407                 goto exit_unregister;
3408         }
3409         return 0;
3410
3411 exit_dev_unregister:
3412         /* NULL check handled by platform_device_unregister */
3413         platform_device_unregister(it87_pdev[0]);
3414 exit_unregister:
3415         platform_driver_unregister(&it87_driver);
3416         return err;
3417 }
3418
3419 static void __exit sm_it87_exit(void)
3420 {
3421         /* NULL check handled by platform_device_unregister */
3422         platform_device_unregister(it87_pdev[1]);
3423         platform_device_unregister(it87_pdev[0]);
3424         platform_driver_unregister(&it87_driver);
3425 }
3426
3427 MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>");
3428 MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
3429 module_param(update_vbat, bool, 0);
3430 MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
3431 module_param(fix_pwm_polarity, bool, 0);
3432 MODULE_PARM_DESC(fix_pwm_polarity,
3433                  "Force PWM polarity to active high (DANGEROUS)");
3434 MODULE_LICENSE("GPL");
3435
3436 module_init(sm_it87_init);
3437 module_exit(sm_it87_exit);