git.sur5r.net Git - groeck-it87/blob - it87.c

   1 /*
   2  *  it87.c - Part of lm_sensors, Linux kernel modules for hardware
   3  *           monitoring.
   4  *
   5  *  The IT8705F is an LPC-based Super I/O part that contains UARTs, a
   6  *  parallel port, an IR port, a MIDI port, a floppy controller, etc., in
   7  *  addition to an Environment Controller (Enhanced Hardware Monitor and
   8  *  Fan Controller)
   9  *
  10  *  This driver supports only the Environment Controller in the IT8705F and
  11  *  similar parts.  The other devices are supported by different drivers.
  12  *
  13  *  Supports: IT8603E  Super I/O chip w/LPC interface
  14  *            IT8607E  Super I/O chip w/LPC interface
  15  *            IT8613E  Super I/O chip w/LPC interface
  16  *            IT8620E  Super I/O chip w/LPC interface
  17  *            IT8622E  Super I/O chip w/LPC interface
  18  *            IT8623E  Super I/O chip w/LPC interface
  19  *            IT8625E  Super I/O chip w/LPC interface
  20  *            IT8628E  Super I/O chip w/LPC interface
  21  *            IT8655E  Super I/O chip w/LPC interface
  22  *            IT8665E  Super I/O chip w/LPC interface
  23  *            IT8686E  Super I/O chip w/LPC interface
  24  *            IT8705F  Super I/O chip w/LPC interface
  25  *            IT8712F  Super I/O chip w/LPC interface
  26  *            IT8716F  Super I/O chip w/LPC interface
  27  *            IT8718F  Super I/O chip w/LPC interface
  28  *            IT8720F  Super I/O chip w/LPC interface
  29  *            IT8721F  Super I/O chip w/LPC interface
  30  *            IT8726F  Super I/O chip w/LPC interface
  31  *            IT8728F  Super I/O chip w/LPC interface
  32  *            IT8732F  Super I/O chip w/LPC interface
  33  *            IT8758E  Super I/O chip w/LPC interface
  34  *            IT8771E  Super I/O chip w/LPC interface
  35  *            IT8772E  Super I/O chip w/LPC interface
  36  *            IT8781F  Super I/O chip w/LPC interface
  37  *            IT8782F  Super I/O chip w/LPC interface
  38  *            IT8783E/F Super I/O chip w/LPC interface
  39  *            IT8786E  Super I/O chip w/LPC interface
  40  *            IT8790E  Super I/O chip w/LPC interface
  41  *            IT8792E  Super I/O chip w/LPC interface
  42  *            Sis950   A clone of the IT8705F
  43  *
  44  *  Copyright (C) 2001 Chris Gauthron
  45  *  Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de>
  46  *
  47  *  This program is free software; you can redistribute it and/or modify
  48  *  it under the terms of the GNU General Public License as published by
  49  *  the Free Software Foundation; either version 2 of the License, or
  50  *  (at your option) any later version.
  51  *
  52  *  This program is distributed in the hope that it will be useful,
  53  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  54  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  55  *  GNU General Public License for more details.
  56  */
  57
  58 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  59
  60 #include <linux/bitops.h>
  61 #include <linux/module.h>
  62 #include <linux/init.h>
  63 #include <linux/slab.h>
  64 #include <linux/jiffies.h>
  65 #include <linux/platform_device.h>
  66 #include <linux/hwmon.h>
  67 #include <linux/hwmon-sysfs.h>
  68 #include <linux/hwmon-vid.h>
  69 #include <linux/err.h>
  70 #include <linux/mutex.h>
  71 #include <linux/sysfs.h>
  72 #include <linux/string.h>
  73 #include <linux/dmi.h>
  74 #include <linux/acpi.h>
  75 #include <linux/io.h>
  76 #include "compat.h"
  77 #include "version.h"
  78
  79 #define DRVNAME "it87"
  80
  81 enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732,
  82              it8771, it8772, it8781, it8782, it8783, it8786, it8790,
  83              it8792, it8603, it8607, it8613, it8620, it8622, it8625, it8628,
  84              it8655, it8665, it8686 };
  85
  86 static unsigned short force_id;
  87 module_param(force_id, ushort, 0);
  88 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  89
  90 static bool ignore_resource_conflict;
  91 module_param(ignore_resource_conflict, bool, 0);
  92 MODULE_PARM_DESC(ignore_resource_conflict, "Ignore ACPI resource conflict");
  93
  94 static bool mmio;
  95 module_param(mmio, bool, 0);
  96 MODULE_PARM_DESC(mmio, "Use MMIO if available");
  97
  98 static struct platform_device *it87_pdev[2];
  99
 100 #define REG_2E  0x2e    /* The register to read/write */
 101 #define REG_4E  0x4e    /* Secondary register to read/write */
 102
 103 #define DEV     0x07    /* Register: Logical device select */
 104 #define PME     0x04    /* The device with the fan registers in it */
 105
 106 /* The device with the IT8718F/IT8720F VID value in it */
 107 #define GPIO    0x07
 108
 109 #define DEVID   0x20    /* Register: Device ID */
 110 #define DEVREV  0x22    /* Register: Device Revision */
 111
 112 static inline void __superio_enter(int ioreg)
 113 {
 114         outb(0x87, ioreg);
 115         outb(0x01, ioreg);
 116         outb(0x55, ioreg);
 117         outb(ioreg == REG_4E ? 0xaa : 0x55, ioreg);
 118 }
 119
 120 static inline int superio_inb(int ioreg, int reg)
 121 {
 122         int val;
 123
 124         outb(reg, ioreg);
 125         val = inb(ioreg + 1);
 126
 127         return val;
 128 }
 129
 130 static inline void superio_outb(int ioreg, int reg, int val)
 131 {
 132         outb(reg, ioreg);
 133         outb(val, ioreg + 1);
 134 }
 135
 136 static int superio_inw(int ioreg, int reg)
 137 {
 138         return (superio_inb(ioreg, reg) << 8) | superio_inb(ioreg, reg + 1);
 139 }
 140
 141 static inline void superio_select(int ioreg, int ldn)
 142 {
 143         outb(DEV, ioreg);
 144         outb(ldn, ioreg + 1);
 145 }
 146
 147 static inline int superio_enter(int ioreg)
 148 {
 149         /*
 150          * Try to reserve ioreg and ioreg + 1 for exclusive access.
 151          */
 152         if (!request_muxed_region(ioreg, 2, DRVNAME))
 153                 return -EBUSY;
 154
 155         __superio_enter(ioreg);
 156         return 0;
 157 }
 158
 159 static inline void superio_exit(int ioreg, bool doexit)
 160 {
 161         if (doexit) {
 162                 outb(0x02, ioreg);
 163                 outb(0x02, ioreg + 1);
 164         }
 165         release_region(ioreg, 2);
 166 }
 167
 168 /* Logical device 4 registers */
 169 #define IT8712F_DEVID 0x8712
 170 #define IT8705F_DEVID 0x8705
 171 #define IT8716F_DEVID 0x8716
 172 #define IT8718F_DEVID 0x8718
 173 #define IT8720F_DEVID 0x8720
 174 #define IT8721F_DEVID 0x8721
 175 #define IT8726F_DEVID 0x8726
 176 #define IT8728F_DEVID 0x8728
 177 #define IT8732F_DEVID 0x8732
 178 #define IT8792E_DEVID 0x8733
 179 #define IT8771E_DEVID 0x8771
 180 #define IT8772E_DEVID 0x8772
 181 #define IT8781F_DEVID 0x8781
 182 #define IT8782F_DEVID 0x8782
 183 #define IT8783E_DEVID 0x8783
 184 #define IT8786E_DEVID 0x8786
 185 #define IT8790E_DEVID 0x8790
 186 #define IT8603E_DEVID 0x8603
 187 #define IT8607E_DEVID 0x8607
 188 #define IT8613E_DEVID 0x8613
 189 #define IT8620E_DEVID 0x8620
 190 #define IT8622E_DEVID 0x8622
 191 #define IT8623E_DEVID 0x8623
 192 #define IT8625E_DEVID 0x8625
 193 #define IT8628E_DEVID 0x8628
 194 #define IT8655E_DEVID 0x8655
 195 #define IT8665E_DEVID 0x8665
 196 #define IT8686E_DEVID 0x8686
 197
 198 /* Logical device 4 (Environmental Monitor) registers */
 199 #define IT87_ACT_REG            0x30
 200 #define IT87_BASE_REG           0x60
 201 #define IT87_SPECIAL_CFG_REG    0xf3    /* special configuration register */
 202
 203 /* Global configuration registers (IT8712F and later) */
 204 #define IT87_EC_HWM_MIO_REG     0x24    /* MMIO configuration register */
 205 #define IT87_SIO_GPIO1_REG      0x25
 206 #define IT87_SIO_GPIO2_REG      0x26
 207 #define IT87_SIO_GPIO3_REG      0x27
 208 #define IT87_SIO_GPIO4_REG      0x28
 209 #define IT87_SIO_GPIO5_REG      0x29
 210 #define IT87_SIO_GPIO9_REG      0xd3
 211 #define IT87_SIO_PINX1_REG      0x2a    /* Pin selection */
 212 #define IT87_SIO_PINX2_REG      0x2c    /* Pin selection */
 213 #define IT87_SIO_PINX4_REG      0x2d    /* Pin selection */
 214
 215 /* Logical device 7 (GPIO) registers (IT8712F and later) */
 216 #define IT87_SIO_SPI_REG        0xef    /* SPI function pin select */
 217 #define IT87_SIO_VID_REG        0xfc    /* VID value */
 218 #define IT87_SIO_BEEP_PIN_REG   0xf6    /* Beep pin mapping */
 219
 220 /* Update battery voltage after every reading if true */
 221 static bool update_vbat;
 222
 223 /* Not all BIOSes properly configure the PWM registers */
 224 static bool fix_pwm_polarity;
 225
 226 /* Many IT87 constants specified below */
 227
 228 /* Length of ISA address segment */
 229 #define IT87_EXTENT 8
 230
 231 /* Length of ISA address segment for Environmental Controller */
 232 #define IT87_EC_EXTENT 2
 233
 234 /* Offset of EC registers from ISA base address */
 235 #define IT87_EC_OFFSET 5
 236
 237 /* Where are the ISA address/data registers relative to the EC base address */
 238 #define IT87_ADDR_REG_OFFSET 0
 239 #define IT87_DATA_REG_OFFSET 1
 240
 241 /*----- The IT87 registers -----*/
 242
 243 #define IT87_REG_CONFIG        0x00
 244
 245 #define IT87_REG_ALARM1        0x01
 246 #define IT87_REG_ALARM2        0x02
 247 #define IT87_REG_ALARM3        0x03
 248
 249 #define IT87_REG_BANK           0x06
 250
 251 /*
 252  * The IT8718F and IT8720F have the VID value in a different register, in
 253  * Super-I/O configuration space.
 254  */
 255 #define IT87_REG_VID           0x0a
 256 /*
 257  * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
 258  * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
 259  * mode.
 260  */
 261 #define IT87_REG_FAN_DIV       0x0b
 262 #define IT87_REG_FAN_16BIT     0x0c
 263
 264 /*
 265  * Monitors:
 266  * - up to 13 voltage (0 to 7, battery, avcc, 10 to 12)
 267  * - up to 6 temp (1 to 6)
 268  * - up to 6 fan (1 to 6)
 269  */
 270
 271 static const u8 IT87_REG_FAN[] =        { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c };
 272 static const u8 IT87_REG_FAN_MIN[] =    { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e };
 273 static const u8 IT87_REG_FANX[] =       { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d };
 274 static const u8 IT87_REG_FANX_MIN[] =   { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f };
 275
 276 static const u8 IT87_REG_FAN_8665[] =   { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x93 };
 277 static const u8 IT87_REG_FAN_MIN_8665[] =
 278                                         { 0x10, 0x11, 0x12, 0x84, 0x86, 0xb2 };
 279 static const u8 IT87_REG_FANX_8665[] =  { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x94 };
 280 static const u8 IT87_REG_FANX_MIN_8665[] =
 281                                         { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0xb3 };
 282
 283 static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59, 0x5a, 0x90, 0x91 };
 284
 285 static const u8 IT87_REG_TEMP_OFFSET_8686[] = { 0x56, 0x57, 0x59, 0x90, 0x91, 0x92 };
 286
 287 #define IT87_REG_FAN_MAIN_CTRL 0x13
 288 #define IT87_REG_FAN_CTL       0x14
 289
 290 static const u8 IT87_REG_PWM[] =        { 0x15, 0x16, 0x17, 0x7f, 0xa7, 0xaf };
 291 static const u8 IT87_REG_PWM_8665[] =   { 0x15, 0x16, 0x17, 0x1e, 0x1f, 0x92 };
 292
 293 static const u8 IT87_REG_PWM_DUTY[] =   { 0x63, 0x6b, 0x73, 0x7b, 0xa3, 0xab };
 294
 295 static const u8 IT87_REG_VIN[]  = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26,
 296                                     0x27, 0x28, 0x2f, 0x2c, 0x2d, 0x2e };
 297
 298 #define IT87_REG_TEMP(nr)      (0x29 + (nr))
 299
 300 #define IT87_REG_VIN_MAX(nr)   (0x30 + (nr) * 2)
 301 #define IT87_REG_VIN_MIN(nr)   (0x31 + (nr) * 2)
 302
 303 static const u8 IT87_REG_TEMP_HIGH[] =  { 0x40, 0x42, 0x44, 0x46, 0xb4, 0xb6 };
 304 static const u8 IT87_REG_TEMP_LOW[] =   { 0x41, 0x43, 0x45, 0x47, 0xb5, 0xb7 };
 305
 306 static const u8 IT87_REG_TEMP_HIGH_8686[] =
 307                                         { 0x40, 0x42, 0x44, 0xb4, 0xb6, 0xb8 };
 308 static const u8 IT87_REG_TEMP_LOW_8686[] =
 309                                         { 0x41, 0x43, 0x45, 0xb5, 0xb7, 0xb9 };
 310
 311 #define IT87_REG_VIN_ENABLE    0x50
 312 #define IT87_REG_TEMP_ENABLE   0x51
 313 #define IT87_REG_TEMP_EXTRA    0x55
 314 #define IT87_REG_BEEP_ENABLE   0x5c
 315
 316 #define IT87_REG_CHIPID        0x58
 317
 318 static const u8 IT87_REG_AUTO_BASE[] = { 0x60, 0x68, 0x70, 0x78, 0xa0, 0xa8 };
 319
 320 #define IT87_REG_AUTO_TEMP(nr, i) (IT87_REG_AUTO_BASE[nr] + (i))
 321 #define IT87_REG_AUTO_PWM(nr, i)  (IT87_REG_AUTO_BASE[nr] + 5 + (i))
 322
 323 #define IT87_REG_TEMP456_ENABLE 0x77
 324
 325 static const u16 IT87_REG_TEMP_SRC1[] = { 0x21d, 0x21e, 0x21f };
 326 #define IT87_REG_TEMP_SRC2      0x23d
 327
 328 #define NUM_VIN                 ARRAY_SIZE(IT87_REG_VIN)
 329 #define NUM_VIN_LIMIT           8
 330 #define NUM_TEMP                6
 331 #define NUM_FAN                 ARRAY_SIZE(IT87_REG_FAN)
 332 #define NUM_FAN_DIV             3
 333 #define NUM_PWM                 ARRAY_SIZE(IT87_REG_PWM)
 334 #define NUM_AUTO_PWM            ARRAY_SIZE(IT87_REG_PWM)
 335
 336 struct it87_devices {
 337         const char *name;
 338         const char * const suffix;
 339         u32 features;
 340         u8 num_temp_limit;
 341         u8 num_temp_offset;
 342         u8 num_temp_map;        /* Number of temperature sources for pwm */
 343         u8 peci_mask;
 344         u8 old_peci_mask;
 345         u8 smbus_bitmap;        /* SMBus enable bits in extra config register */
 346         u8 ec_special_config;
 347 };
 348
 349 #define FEAT_12MV_ADC           BIT(0)
 350 #define FEAT_NEWER_AUTOPWM      BIT(1)
 351 #define FEAT_OLD_AUTOPWM        BIT(2)
 352 #define FEAT_16BIT_FANS         BIT(3)
 353 #define FEAT_TEMP_PECI          BIT(5)
 354 #define FEAT_TEMP_OLD_PECI      BIT(6)
 355 #define FEAT_FAN16_CONFIG       BIT(7)  /* Need to enable 16-bit fans */
 356 #define FEAT_FIVE_FANS          BIT(8)  /* Supports five fans */
 357 #define FEAT_VID                BIT(9)  /* Set if chip supports VID */
 358 #define FEAT_IN7_INTERNAL       BIT(10) /* Set if in7 is internal */
 359 #define FEAT_SIX_FANS           BIT(11) /* Supports six fans */
 360 #define FEAT_10_9MV_ADC         BIT(12)
 361 #define FEAT_AVCC3              BIT(13) /* Chip supports in9/AVCC3 */
 362 #define FEAT_FIVE_PWM           BIT(14) /* Chip supports 5 pwm chn */
 363 #define FEAT_SIX_PWM            BIT(15) /* Chip supports 6 pwm chn */
 364 #define FEAT_PWM_FREQ2          BIT(16) /* Separate pwm freq 2 */
 365 #define FEAT_SIX_TEMP           BIT(17) /* Up to 6 temp sensors */
 366 #define FEAT_VIN3_5V            BIT(18) /* VIN3 connected to +5V */
 367 #define FEAT_FOUR_FANS          BIT(19) /* Supports four fans */
 368 #define FEAT_FOUR_PWM           BIT(20) /* Supports four fan controls */
 369 #define FEAT_BANK_SEL           BIT(21) /* Chip has multi-bank support */
 370 #define FEAT_SCALING            BIT(22) /* Internal voltage scaling */
 371 #define FEAT_FANCTL_ONOFF       BIT(23) /* chip has FAN_CTL ON/OFF */
 372 #define FEAT_11MV_ADC           BIT(24)
 373 #define FEAT_NEW_TEMPMAP        BIT(25) /* new temp input selection */
 374 #define FEAT_MMIO               BIT(26) /* Chip supports MMIO */
 375
 376 static const struct it87_devices it87_devices[] = {
 377         [it87] = {
 378                 .name = "it87",
 379                 .suffix = "F",
 380                 .features = FEAT_OLD_AUTOPWM | FEAT_FANCTL_ONOFF,
 381                                                 /* may need to overwrite */
 382                 .num_temp_limit = 3,
 383                 .num_temp_offset = 0,
 384                 .num_temp_map = 3,
 385         },
 386         [it8712] = {
 387                 .name = "it8712",
 388                 .suffix = "F",
 389                 .features = FEAT_OLD_AUTOPWM | FEAT_VID | FEAT_FANCTL_ONOFF,
 390                                                 /* may need to overwrite */
 391                 .num_temp_limit = 3,
 392                 .num_temp_offset = 0,
 393                 .num_temp_map = 3,
 394         },
 395         [it8716] = {
 396                 .name = "it8716",
 397                 .suffix = "F",
 398                 .features = FEAT_16BIT_FANS | FEAT_VID
 399                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2
 400                   | FEAT_FANCTL_ONOFF,
 401                 .num_temp_limit = 3,
 402                 .num_temp_offset = 3,
 403                 .num_temp_map = 3,
 404         },
 405         [it8718] = {
 406                 .name = "it8718",
 407                 .suffix = "F",
 408                 .features = FEAT_16BIT_FANS | FEAT_VID
 409                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 410                   | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 411                 .num_temp_limit = 3,
 412                 .num_temp_offset = 3,
 413                 .num_temp_map = 3,
 414                 .old_peci_mask = 0x4,
 415         },
 416         [it8720] = {
 417                 .name = "it8720",
 418                 .suffix = "F",
 419                 .features = FEAT_16BIT_FANS | FEAT_VID
 420                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 421                   | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 422                 .num_temp_limit = 3,
 423                 .num_temp_offset = 3,
 424                 .num_temp_map = 3,
 425                 .old_peci_mask = 0x4,
 426         },
 427         [it8721] = {
 428                 .name = "it8721",
 429                 .suffix = "F",
 430                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 431                   | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 432                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL
 433                   | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF,
 434                 .num_temp_limit = 3,
 435                 .num_temp_offset = 3,
 436                 .num_temp_map = 3,
 437                 .peci_mask = 0x05,
 438                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 439         },
 440         [it8728] = {
 441                 .name = "it8728",
 442                 .suffix = "F",
 443                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 444                   | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 445                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_SCALING
 446                   | FEAT_FANCTL_ONOFF,
 447                 .num_temp_limit = 6,
 448                 .num_temp_offset = 3,
 449                 .num_temp_map = 3,
 450                 .peci_mask = 0x07,
 451         },
 452         [it8732] = {
 453                 .name = "it8732",
 454                 .suffix = "F",
 455                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 456                   | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 457                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_FOUR_FANS
 458                   | FEAT_FOUR_PWM | FEAT_FANCTL_ONOFF,
 459                 .num_temp_limit = 3,
 460                 .num_temp_offset = 3,
 461                 .num_temp_map = 3,
 462                 .peci_mask = 0x07,
 463                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 464         },
 465         [it8771] = {
 466                 .name = "it8771",
 467                 .suffix = "E",
 468                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 469                   | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 470                   | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF,
 471                                 /* PECI: guesswork */
 472                                 /* 12mV ADC (OHM) */
 473                                 /* 16 bit fans (OHM) */
 474                                 /* three fans, always 16 bit (guesswork) */
 475                 .num_temp_limit = 3,
 476                 .num_temp_offset = 3,
 477                 .num_temp_map = 3,
 478                 .peci_mask = 0x07,
 479         },
 480         [it8772] = {
 481                 .name = "it8772",
 482                 .suffix = "E",
 483                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 484                   | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 485                   | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF,
 486                                 /* PECI (coreboot) */
 487                                 /* 12mV ADC (HWSensors4, OHM) */
 488                                 /* 16 bit fans (HWSensors4, OHM) */
 489                                 /* three fans, always 16 bit (datasheet) */
 490                 .num_temp_limit = 3,
 491                 .num_temp_offset = 3,
 492                 .num_temp_map = 3,
 493                 .peci_mask = 0x07,
 494         },
 495         [it8781] = {
 496                 .name = "it8781",
 497                 .suffix = "F",
 498                 .features = FEAT_16BIT_FANS
 499                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
 500                   | FEAT_FANCTL_ONOFF,
 501                 .num_temp_limit = 3,
 502                 .num_temp_offset = 3,
 503                 .num_temp_map = 3,
 504                 .old_peci_mask = 0x4,
 505         },
 506         [it8782] = {
 507                 .name = "it8782",
 508                 .suffix = "F",
 509                 .features = FEAT_16BIT_FANS
 510                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
 511                   | FEAT_FANCTL_ONOFF,
 512                 .num_temp_limit = 3,
 513                 .num_temp_offset = 3,
 514                 .num_temp_map = 3,
 515                 .old_peci_mask = 0x4,
 516         },
 517         [it8783] = {
 518                 .name = "it8783",
 519                 .suffix = "E/F",
 520                 .features = FEAT_16BIT_FANS
 521                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
 522                   | FEAT_FANCTL_ONOFF,
 523                 .num_temp_limit = 3,
 524                 .num_temp_offset = 3,
 525                 .num_temp_map = 3,
 526                 .old_peci_mask = 0x4,
 527         },
 528         [it8786] = {
 529                 .name = "it8786",
 530                 .suffix = "E",
 531                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 532                   | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 533                   | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 534                 .num_temp_limit = 3,
 535                 .num_temp_offset = 3,
 536                 .num_temp_map = 3,
 537                 .peci_mask = 0x07,
 538         },
 539         [it8790] = {
 540                 .name = "it8790",
 541                 .suffix = "E",
 542                 .features = FEAT_NEWER_AUTOPWM | FEAT_10_9MV_ADC | FEAT_SCALING
 543                   | FEAT_16BIT_FANS | FEAT_TEMP_PECI
 544                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 545                 .num_temp_limit = 3,
 546                 .num_temp_offset = 3,
 547                 .num_temp_map = 3,
 548                 .peci_mask = 0x07,
 549         },
 550         [it8792] = {
 551                 .name = "it8792",
 552                 .suffix = "E",
 553                 .features = FEAT_NEWER_AUTOPWM | FEAT_10_9MV_ADC | FEAT_SCALING
 554                   | FEAT_16BIT_FANS | FEAT_TEMP_PECI
 555                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 556                 .num_temp_limit = 3,
 557                 .num_temp_offset = 3,
 558                 .num_temp_map = 3,
 559                 .peci_mask = 0x07,
 560         },
 561         [it8603] = {
 562                 .name = "it8603",
 563                 .suffix = "E",
 564                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 565                   | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 566                   | FEAT_AVCC3 | FEAT_PWM_FREQ2 | FEAT_SCALING,
 567                 .num_temp_limit = 3,
 568                 .num_temp_offset = 3,
 569                 .num_temp_map = 4,
 570                 .peci_mask = 0x07,
 571         },
 572         [it8607] = {
 573                 .name = "it8607",
 574                 .suffix = "E",
 575                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 576                   | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL | FEAT_NEW_TEMPMAP
 577                   | FEAT_AVCC3 | FEAT_PWM_FREQ2 | FEAT_SCALING
 578                   | FEAT_FANCTL_ONOFF,
 579                 .num_temp_limit = 3,
 580                 .num_temp_offset = 3,
 581                 .num_temp_map = 6,
 582                 .peci_mask = 0x07,
 583         },
 584         [it8613] = {
 585                 .name = "it8613",
 586                 .suffix = "E",
 587                 .features = FEAT_NEWER_AUTOPWM | FEAT_11MV_ADC | FEAT_16BIT_FANS
 588                   | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 589                   | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
 590                   | FEAT_AVCC3 | FEAT_SCALING | FEAT_NEW_TEMPMAP,
 591                 .num_temp_limit = 6,
 592                 .num_temp_offset = 6,
 593                 .num_temp_map = 6,
 594                 .peci_mask = 0x07,
 595         },
 596         [it8620] = {
 597                 .name = "it8620",
 598                 .suffix = "E",
 599                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 600                   | FEAT_TEMP_PECI | FEAT_SIX_FANS
 601                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 602                   | FEAT_SIX_TEMP | FEAT_VIN3_5V | FEAT_SCALING
 603                   | FEAT_FANCTL_ONOFF,
 604                 .num_temp_limit = 3,
 605                 .num_temp_offset = 3,
 606                 .num_temp_map = 3,
 607                 .peci_mask = 0x07,
 608         },
 609         [it8622] = {
 610                 .name = "it8622",
 611                 .suffix = "E",
 612                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 613                   | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 614                   | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
 615                   | FEAT_AVCC3 | FEAT_VIN3_5V | FEAT_SCALING,
 616                 .num_temp_limit = 3,
 617                 .num_temp_offset = 3,
 618                 .num_temp_map = 4,
 619                 .peci_mask = 0x0f,
 620                 .smbus_bitmap = BIT(1) | BIT(2),
 621         },
 622         [it8625] = {
 623                 .name = "it8625",
 624                 .suffix = "E",
 625                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 626                   | FEAT_AVCC3 | FEAT_NEW_TEMPMAP
 627                   | FEAT_11MV_ADC | FEAT_IN7_INTERNAL | FEAT_SIX_FANS
 628                   | FEAT_SIX_PWM | FEAT_BANK_SEL | FEAT_SCALING,
 629                 .num_temp_limit = 6,
 630                 .num_temp_offset = 6,
 631                 .num_temp_map = 6,
 632                 .smbus_bitmap = BIT(1) | BIT(2),
 633         },
 634         [it8628] = {
 635                 .name = "it8628",
 636                 .suffix = "E",
 637                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 638                   | FEAT_TEMP_PECI | FEAT_SIX_FANS
 639                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 640                   | FEAT_SIX_TEMP | FEAT_SCALING | FEAT_AVCC3
 641                   | FEAT_FANCTL_ONOFF,
 642                 .num_temp_limit = 6,
 643                 .num_temp_offset = 3,
 644                 .num_temp_map = 3,
 645                 .peci_mask = 0x07,
 646         },
 647         [it8655] = {
 648                 .name = "it8655",
 649                 .suffix = "E",
 650                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 651                   | FEAT_AVCC3 | FEAT_NEW_TEMPMAP | FEAT_SCALING
 652                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_BANK_SEL
 653                   | FEAT_MMIO,
 654                 .num_temp_limit = 6,
 655                 .num_temp_offset = 6,
 656                 .num_temp_map = 6,
 657                 .smbus_bitmap = BIT(2),
 658         },
 659         [it8665] = {
 660                 .name = "it8665",
 661                 .suffix = "E",
 662                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 663                   | FEAT_AVCC3 | FEAT_NEW_TEMPMAP | FEAT_SCALING
 664                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_SIX_FANS
 665                   | FEAT_SIX_PWM | FEAT_BANK_SEL | FEAT_MMIO,
 666                 .num_temp_limit = 6,
 667                 .num_temp_offset = 6,
 668                 .num_temp_map = 6,
 669                 .smbus_bitmap = BIT(2),
 670         },
 671         [it8686] = {
 672                 .name = "it8686",
 673                 .suffix = "E",
 674                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 675                   | FEAT_SIX_FANS | FEAT_NEW_TEMPMAP
 676                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 677                   | FEAT_SIX_TEMP | FEAT_BANK_SEL | FEAT_SCALING | FEAT_AVCC3,
 678                 .num_temp_limit = 6,
 679                 .num_temp_offset = 6,
 680                 .num_temp_map = 7,
 681                 .smbus_bitmap = BIT(1) | BIT(2),
 682         },
 683 };
 684
 685 #define has_16bit_fans(data)    ((data)->features & FEAT_16BIT_FANS)
 686 #define has_12mv_adc(data)      ((data)->features & FEAT_12MV_ADC)
 687 #define has_10_9mv_adc(data)    ((data)->features & FEAT_10_9MV_ADC)
 688 #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
 689 #define has_old_autopwm(data)   ((data)->features & FEAT_OLD_AUTOPWM)
 690 #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \
 691                                  ((data)->peci_mask & BIT(nr)))
 692 #define has_temp_old_peci(data, nr) \
 693                                 (((data)->features & FEAT_TEMP_OLD_PECI) && \
 694                                  ((data)->old_peci_mask & BIT(nr)))
 695 #define has_fan16_config(data)  ((data)->features & FEAT_FAN16_CONFIG)
 696 #define has_five_fans(data)     ((data)->features & (FEAT_FIVE_FANS | \
 697                                                      FEAT_SIX_FANS))
 698 #define has_vid(data)           ((data)->features & FEAT_VID)
 699 #define has_in7_internal(data)  ((data)->features & FEAT_IN7_INTERNAL)
 700 #define has_six_fans(data)      ((data)->features & FEAT_SIX_FANS)
 701 #define has_avcc3(data)         ((data)->features & FEAT_AVCC3)
 702 #define has_five_pwm(data)      ((data)->features & (FEAT_FIVE_PWM \
 703                                                      | FEAT_SIX_PWM))
 704 #define has_six_pwm(data)       ((data)->features & FEAT_SIX_PWM)
 705 #define has_pwm_freq2(data)     ((data)->features & FEAT_PWM_FREQ2)
 706 #define has_six_temp(data)      ((data)->features & FEAT_SIX_TEMP)
 707 #define has_vin3_5v(data)       ((data)->features & FEAT_VIN3_5V)
 708 #define has_four_fans(data)     ((data)->features & (FEAT_FOUR_FANS | \
 709                                                      FEAT_FIVE_FANS | \
 710                                                      FEAT_SIX_FANS))
 711 #define has_four_pwm(data)      ((data)->features & (FEAT_FOUR_PWM | \
 712                                                      FEAT_FIVE_PWM \
 713                                                      | FEAT_SIX_PWM))
 714 #define has_bank_sel(data)      ((data)->features & FEAT_BANK_SEL)
 715 #define has_scaling(data)       ((data)->features & FEAT_SCALING)
 716 #define has_fanctl_onoff(data)  ((data)->features & FEAT_FANCTL_ONOFF)
 717 #define has_11mv_adc(data)      ((data)->features & FEAT_11MV_ADC)
 718 #define has_new_tempmap(data)   ((data)->features & FEAT_NEW_TEMPMAP)
 719 #define has_mmio(data)          ((data)->features & FEAT_MMIO)
 720
 721 struct it87_sio_data {
 722         enum chips type;
 723         u8 sioaddr;
 724         u8 doexit;
 725         /* Values read from Super-I/O config space */
 726         u8 revision;
 727         u8 vid_value;
 728         u8 beep_pin;
 729         u8 internal;    /* Internal sensors can be labeled */
 730         /* Features skipped based on config or DMI */
 731         u16 skip_in;
 732         u8 skip_vid;
 733         u8 skip_fan;
 734         u8 skip_pwm;
 735         u8 skip_temp;
 736         u8 smbus_bitmap;
 737         u8 ec_special_config;
 738 };
 739
 740 /*
 741  * For each registered chip, we need to keep some data in memory.
 742  * The structure is dynamically allocated.
 743  */
 744 struct it87_data {
 745         const struct attribute_group *groups[7];
 746         enum chips type;
 747         u32 features;
 748         u8 peci_mask;
 749         u8 old_peci_mask;
 750
 751         u8 smbus_bitmap;        /* !=0 if SMBus needs to be disabled */
 752         u8 ec_special_config;   /* EC special config register restore value */
 753         u8 sioaddr;             /* SIO port address */
 754         bool doexit;            /* true if exit from sio config is ok */
 755
 756         void __iomem *mmio;     /* Remapped MMIO address if available */
 757         int (*read)(struct it87_data *, u16);
 758         void (*write)(struct it87_data *, u16, u8);
 759
 760         const u8 *REG_FAN;
 761         const u8 *REG_FANX;
 762         const u8 *REG_FAN_MIN;
 763         const u8 *REG_FANX_MIN;
 764
 765         const u8 *REG_PWM;
 766
 767         const u8 *REG_TEMP_OFFSET;
 768         const u8 *REG_TEMP_LOW;
 769         const u8 *REG_TEMP_HIGH;
 770
 771         unsigned short addr;
 772         const char *name;
 773         struct mutex update_lock;
 774         char valid;             /* !=0 if following fields are valid */
 775         unsigned long last_updated;     /* In jiffies */
 776
 777         u16 in_scaled;          /* Internal voltage sensors are scaled */
 778         u16 in_internal;        /* Bitfield, internal sensors (for labels) */
 779         u16 has_in;             /* Bitfield, voltage sensors enabled */
 780         u8 in[NUM_VIN][3];              /* [nr][0]=in, [1]=min, [2]=max */
 781         u8 has_fan;             /* Bitfield, fans enabled */
 782         u16 fan[NUM_FAN][2];    /* Register values, [nr][0]=fan, [1]=min */
 783         u8 has_temp;            /* Bitfield, temp sensors enabled */
 784         s8 temp[NUM_TEMP][4];   /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
 785         u8 num_temp_limit;      /* Number of temperature limit registers */
 786         u8 num_temp_offset;     /* Number of temperature offset registers */
 787         u8 temp_src[4];         /* Up to 4 temperature source registers */
 788         u8 sensor;              /* Register value (IT87_REG_TEMP_ENABLE) */
 789         u8 extra;               /* Register value (IT87_REG_TEMP_EXTRA) */
 790         u8 fan_div[NUM_FAN_DIV];/* Register encoding, shifted right */
 791         bool has_vid;           /* True if VID supported */
 792         u8 vid;                 /* Register encoding, combined */
 793         u8 vrm;
 794         u32 alarms;             /* Register encoding, combined */
 795         bool has_beep;          /* true if beep supported */
 796         u8 beeps;               /* Register encoding */
 797         u8 fan_main_ctrl;       /* Register value */
 798         u8 fan_ctl;             /* Register value */
 799
 800         /*
 801          * The following 3 arrays correspond to the same registers up to
 802          * the IT8720F. The meaning of bits 6-0 depends on the value of bit
 803          * 7, and we want to preserve settings on mode changes, so we have
 804          * to track all values separately.
 805          * Starting with the IT8721F, the manual PWM duty cycles are stored
 806          * in separate registers (8-bit values), so the separate tracking
 807          * is no longer needed, but it is still done to keep the driver
 808          * simple.
 809          */
 810         u8 has_pwm;             /* Bitfield, pwm control enabled */
 811         u8 pwm_ctrl[NUM_PWM];   /* Register value */
 812         u8 pwm_duty[NUM_PWM];   /* Manual PWM value set by user */
 813         u8 pwm_temp_map[NUM_PWM];/* PWM to temp. chan. mapping (bits 1-0) */
 814         u8 pwm_temp_map_mask;   /* 0x03 for old, 0x07 for new temp map */
 815         u8 pwm_temp_map_shift;  /* 0 for old, 3 for new temp map */
 816         u8 pwm_num_temp_map;    /* from config data, 3..7 depending on chip */
 817
 818         /* Automatic fan speed control registers */
 819         u8 auto_pwm[NUM_AUTO_PWM][4];   /* [nr][3] is hard-coded */
 820         s8 auto_temp[NUM_AUTO_PWM][5];  /* [nr][0] is point1_temp_hyst */
 821 };
 822
 823 static int adc_lsb(const struct it87_data *data, int nr)
 824 {
 825         int lsb;
 826
 827         if (has_12mv_adc(data))
 828                 lsb = 120;
 829         else if (has_10_9mv_adc(data))
 830                 lsb = 109;
 831         else if (has_11mv_adc(data))
 832                 lsb = 110;
 833         else
 834                 lsb = 160;
 835         if (data->in_scaled & BIT(nr))
 836                 lsb <<= 1;
 837         return lsb;
 838 }
 839
 840 static u8 in_to_reg(const struct it87_data *data, int nr, long val)
 841 {
 842         val = DIV_ROUND_CLOSEST(val * 10, adc_lsb(data, nr));
 843         return clamp_val(val, 0, 255);
 844 }
 845
 846 static int in_from_reg(const struct it87_data *data, int nr, int val)
 847 {
 848         return DIV_ROUND_CLOSEST(val * adc_lsb(data, nr), 10);
 849 }
 850
 851 static inline u8 FAN_TO_REG(long rpm, int div)
 852 {
 853         if (rpm == 0)
 854                 return 255;
 855         rpm = clamp_val(rpm, 1, 1000000);
 856         return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
 857 }
 858
 859 static inline u16 FAN16_TO_REG(long rpm)
 860 {
 861         if (rpm == 0)
 862                 return 0xffff;
 863         return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
 864 }
 865
 866 #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
 867                                 1350000 / ((val) * (div)))
 868 /* The divider is fixed to 2 in 16-bit mode */
 869 #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
 870                              1350000 / ((val) * 2))
 871
 872 #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \
 873                                     ((val) + 500) / 1000), -128, 127))
 874 #define TEMP_FROM_REG(val) ((val) * 1000)
 875
 876 static u8 pwm_to_reg(const struct it87_data *data, long val)
 877 {
 878         if (has_newer_autopwm(data))
 879                 return val;
 880         else
 881                 return val >> 1;
 882 }
 883
 884 static int pwm_from_reg(const struct it87_data *data, u8 reg)
 885 {
 886         if (has_newer_autopwm(data))
 887                 return reg;
 888         else
 889                 return (reg & 0x7f) << 1;
 890 }
 891
 892 static int DIV_TO_REG(int val)
 893 {
 894         int answer = 0;
 895
 896         while (answer < 7 && (val >>= 1))
 897                 answer++;
 898         return answer;
 899 }
 900
 901 #define DIV_FROM_REG(val) BIT(val)
 902
 903 static u8 temp_map_from_reg(const struct it87_data *data, u8 reg)
 904 {
 905         u8 map;
 906
 907         map  = (reg >> data->pwm_temp_map_shift) & data->pwm_temp_map_mask;
 908         if (map >= data->pwm_num_temp_map)      /* map is 0-based */
 909                 map = 0;
 910
 911         return map;
 912 }
 913
 914 static u8 temp_map_to_reg(const struct it87_data *data, int nr, u8 map)
 915 {
 916         u8 ctrl = data->pwm_ctrl[nr];
 917
 918         return (ctrl & ~(data->pwm_temp_map_mask << data->pwm_temp_map_shift)) |
 919                (map << data->pwm_temp_map_shift);
 920 }
 921
 922 /*
 923  * PWM base frequencies. The frequency has to be divided by either 128 or 256,
 924  * depending on the chip type, to calculate the actual PWM frequency.
 925  *
 926  * Some of the chip datasheets suggest a base frequency of 51 kHz instead
 927  * of 750 kHz for the slowest base frequency, resulting in a PWM frequency
 928  * of 200 Hz. Sometimes both PWM frequency select registers are affected,
 929  * sometimes just one. It is unknown if this is a datasheet error or real,
 930  * so this is ignored for now.
 931  */
 932 static const unsigned int pwm_freq[8] = {
 933         48000000,
 934         24000000,
 935         12000000,
 936         8000000,
 937         6000000,
 938         3000000,
 939         1500000,
 940         750000,
 941 };
 942
 943 static int smbus_disable(struct it87_data *data)
 944 {
 945         int err;
 946
 947         if (data->smbus_bitmap) {
 948                 err = superio_enter(data->sioaddr);
 949                 if (err)
 950                         return err;
 951                 superio_select(data->sioaddr, PME);
 952                 superio_outb(data->sioaddr, IT87_SPECIAL_CFG_REG,
 953                              data->ec_special_config & ~data->smbus_bitmap);
 954                 superio_exit(data->sioaddr, data->doexit);
 955         }
 956         return 0;
 957 }
 958
 959 static int smbus_enable(struct it87_data *data)
 960 {
 961         int err;
 962
 963         if (data->smbus_bitmap) {
 964                 err = superio_enter(data->sioaddr);
 965                 if (err)
 966                         return err;
 967
 968                 superio_select(data->sioaddr, PME);
 969                 superio_outb(data->sioaddr, IT87_SPECIAL_CFG_REG,
 970                              data->ec_special_config);
 971                 superio_exit(data->sioaddr, data->doexit);
 972         }
 973         return 0;
 974 }
 975
 976 static int _it87_io_read(struct it87_data *data, u16 reg)
 977 {
 978         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 979         return inb_p(data->addr + IT87_DATA_REG_OFFSET);
 980 }
 981
 982 static void _it87_io_write(struct it87_data *data, u16 reg, u8 value)
 983 {
 984         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 985         outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
 986 }
 987
 988 static u8 it87_io_set_bank(struct it87_data *data, u8 bank)
 989 {
 990         u8 _bank = bank;
 991
 992         if (has_bank_sel(data)) {
 993                 u8 breg = _it87_io_read(data, IT87_REG_BANK);
 994
 995                 _bank = breg >> 5;
 996                 if (bank != _bank) {
 997                         breg &= 0x1f;
 998                         breg |= (bank << 5);
 999                         _it87_io_write(data, IT87_REG_BANK, breg);
1000                 }
1001         }
1002         return _bank;
1003 }
1004
1005 /*
1006  * Must be called with data->update_lock held, except during initialization.
1007  * Must be called with SMBus accesses disabled.
1008  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
1009  * would slow down the IT87 access and should not be necessary.
1010  */
1011 static int it87_io_read(struct it87_data *data, u16 reg)
1012 {
1013         u8 bank;
1014         int val;
1015
1016         bank = it87_io_set_bank(data, reg >> 8);
1017         val = _it87_io_read(data, reg & 0xff);
1018         it87_io_set_bank(data, bank);
1019
1020         return val;
1021 }
1022
1023 /*
1024  * Must be called with data->update_lock held, except during initialization.
1025  * Must be called with SMBus accesses disabled
1026  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
1027  * would slow down the IT87 access and should not be necessary.
1028  */
1029 static void it87_io_write(struct it87_data *data, u16 reg, u8 value)
1030 {
1031         u8 bank;
1032
1033         bank = it87_io_set_bank(data, reg >> 8);
1034         _it87_io_write(data, reg & 0xff, value);
1035         it87_io_set_bank(data, bank);
1036 }
1037
1038 static int it87_mmio_read(struct it87_data *data, u16 reg)
1039 {
1040         return readb(data->mmio + reg);
1041 }
1042
1043 static void it87_mmio_write(struct it87_data *data, u16 reg, u8 value)
1044 {
1045         writeb(value, data->mmio + reg);
1046 }
1047
1048 static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
1049 {
1050         u8 ctrl;
1051
1052         ctrl = data->read(data, data->REG_PWM[nr]);
1053         data->pwm_ctrl[nr] = ctrl;
1054         if (has_newer_autopwm(data)) {
1055                 data->pwm_temp_map[nr] = temp_map_from_reg(data, ctrl);
1056                 data->pwm_duty[nr] = data->read(data, IT87_REG_PWM_DUTY[nr]);
1057         } else {
1058                 if (ctrl & 0x80)        /* Automatic mode */
1059                         data->pwm_temp_map[nr] = temp_map_from_reg(data, ctrl);
1060                 else                            /* Manual mode */
1061                         data->pwm_duty[nr] = ctrl & 0x7f;
1062         }
1063
1064         if (has_old_autopwm(data)) {
1065                 int i;
1066
1067                 for (i = 0; i < 5 ; i++)
1068                         data->auto_temp[nr][i] = data->read(data,
1069                                                 IT87_REG_AUTO_TEMP(nr, i));
1070                 for (i = 0; i < 3 ; i++)
1071                         data->auto_pwm[nr][i] = data->read(data,
1072                                                 IT87_REG_AUTO_PWM(nr, i));
1073         } else if (has_newer_autopwm(data)) {
1074                 int i;
1075
1076                 /*
1077                  * 0: temperature hysteresis (base + 5)
1078                  * 1: fan off temperature (base + 0)
1079                  * 2: fan start temperature (base + 1)
1080                  * 3: fan max temperature (base + 2)
1081                  */
1082                 data->auto_temp[nr][0] =
1083                         data->read(data, IT87_REG_AUTO_TEMP(nr, 5));
1084
1085                 for (i = 0; i < 3 ; i++)
1086                         data->auto_temp[nr][i + 1] =
1087                                 data->read(data, IT87_REG_AUTO_TEMP(nr, i));
1088                 /*
1089                  * 0: start pwm value (base + 3)
1090                  * 1: pwm slope (base + 4, 1/8th pwm)
1091                  */
1092                 data->auto_pwm[nr][0] =
1093                         data->read(data, IT87_REG_AUTO_TEMP(nr, 3));
1094                 data->auto_pwm[nr][1] =
1095                         data->read(data, IT87_REG_AUTO_TEMP(nr, 4));
1096         }
1097 }
1098
1099 static int it87_lock(struct it87_data *data)
1100 {
1101         int err;
1102
1103         mutex_lock(&data->update_lock);
1104         err = smbus_disable(data);
1105         if (err)
1106                 mutex_unlock(&data->update_lock);
1107         return err;
1108 }
1109
1110 static void it87_unlock(struct it87_data *data)
1111 {
1112         smbus_enable(data);
1113         mutex_unlock(&data->update_lock);
1114 }
1115
1116 static struct it87_data *it87_update_device(struct device *dev)
1117 {
1118         struct it87_data *data = dev_get_drvdata(dev);
1119         int err;
1120         int i;
1121
1122         err = it87_lock(data);
1123         if (err)
1124                 return ERR_PTR(err);
1125
1126         if (time_after(jiffies, data->last_updated + HZ + HZ / 2) ||
1127             !data->valid) {
1128                 if (update_vbat) {
1129                         /*
1130                          * Cleared after each update, so reenable.  Value
1131                          * returned by this read will be previous value
1132                          */
1133                         data->write(data, IT87_REG_CONFIG,
1134                                     data->read(data, IT87_REG_CONFIG) | 0x40);
1135                 }
1136                 for (i = 0; i < NUM_VIN; i++) {
1137                         if (!(data->has_in & BIT(i)))
1138                                 continue;
1139
1140                         data->in[i][0] = data->read(data, IT87_REG_VIN[i]);
1141
1142                         /* VBAT and AVCC don't have limit registers */
1143                         if (i >= NUM_VIN_LIMIT)
1144                                 continue;
1145
1146                         data->in[i][1] = data->read(data, IT87_REG_VIN_MIN(i));
1147                         data->in[i][2] = data->read(data, IT87_REG_VIN_MAX(i));
1148                 }
1149
1150                 for (i = 0; i < NUM_FAN; i++) {
1151                         /* Skip disabled fans */
1152                         if (!(data->has_fan & BIT(i)))
1153                                 continue;
1154
1155                         data->fan[i][1] = data->read(data, data->REG_FAN_MIN[i]);
1156                         data->fan[i][0] = data->read(data, data->REG_FAN[i]);
1157                         /* Add high byte if in 16-bit mode */
1158                         if (has_16bit_fans(data)) {
1159                                 data->fan[i][0] |= data->read(data,
1160                                                 data->REG_FANX[i]) << 8;
1161                                 data->fan[i][1] |= data->read(data,
1162                                                 data->REG_FANX_MIN[i]) << 8;
1163                         }
1164                 }
1165                 for (i = 0; i < NUM_TEMP; i++) {
1166                         if (!(data->has_temp & BIT(i)))
1167                                 continue;
1168                         data->temp[i][0] =
1169                                 data->read(data, IT87_REG_TEMP(i));
1170
1171                         if (i >= data->num_temp_limit)
1172                                 continue;
1173
1174                         if (i < data->num_temp_offset)
1175                                 data->temp[i][3] =
1176                                   data->read(data, data->REG_TEMP_OFFSET[i]);
1177
1178                         data->temp[i][1] =
1179                                 data->read(data, data->REG_TEMP_LOW[i]);
1180                         data->temp[i][2] =
1181                                 data->read(data, data->REG_TEMP_HIGH[i]);
1182                 }
1183
1184                 /* Newer chips don't have clock dividers */
1185                 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
1186                         i = data->read(data, IT87_REG_FAN_DIV);
1187                         data->fan_div[0] = i & 0x07;
1188                         data->fan_div[1] = (i >> 3) & 0x07;
1189                         data->fan_div[2] = (i & 0x40) ? 3 : 1;
1190                 }
1191
1192                 data->alarms =
1193                         data->read(data, IT87_REG_ALARM1) |
1194                         (data->read(data, IT87_REG_ALARM2) << 8) |
1195                         (data->read(data, IT87_REG_ALARM3) << 16);
1196                 data->beeps = data->read(data, IT87_REG_BEEP_ENABLE);
1197
1198                 data->fan_main_ctrl = data->read(data, IT87_REG_FAN_MAIN_CTRL);
1199                 data->fan_ctl = data->read(data, IT87_REG_FAN_CTL);
1200                 for (i = 0; i < NUM_PWM; i++) {
1201                         if (!(data->has_pwm & BIT(i)))
1202                                 continue;
1203                         it87_update_pwm_ctrl(data, i);
1204                 }
1205
1206                 data->sensor = data->read(data, IT87_REG_TEMP_ENABLE);
1207                 data->extra = data->read(data, IT87_REG_TEMP_EXTRA);
1208                 /*
1209                  * The IT8705F does not have VID capability.
1210                  * The IT8718F and later don't use IT87_REG_VID for the
1211                  * same purpose.
1212                  */
1213                 if (data->type == it8712 || data->type == it8716) {
1214                         data->vid = data->read(data, IT87_REG_VID);
1215                         /*
1216                          * The older IT8712F revisions had only 5 VID pins,
1217                          * but we assume it is always safe to read 6 bits.
1218                          */
1219                         data->vid &= 0x3f;
1220                 }
1221                 data->last_updated = jiffies;
1222                 data->valid = 1;
1223         }
1224         it87_unlock(data);
1225         return data;
1226 }
1227
1228 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
1229                        char *buf)
1230 {
1231         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1232         struct it87_data *data = it87_update_device(dev);
1233         int index = sattr->index;
1234         int nr = sattr->nr;
1235
1236         if (IS_ERR(data))
1237                 return PTR_ERR(data);
1238
1239         return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
1240 }
1241
1242 static ssize_t set_in(struct device *dev, struct device_attribute *attr,
1243                       const char *buf, size_t count)
1244 {
1245         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1246         struct it87_data *data = dev_get_drvdata(dev);
1247         int index = sattr->index;
1248         int nr = sattr->nr;
1249         unsigned long val;
1250         int err;
1251
1252         if (kstrtoul(buf, 10, &val) < 0)
1253                 return -EINVAL;
1254
1255         err = it87_lock(data);
1256         if (err)
1257                 return err;
1258
1259         data->in[nr][index] = in_to_reg(data, nr, val);
1260         data->write(data, index == 1 ? IT87_REG_VIN_MIN(nr)
1261                                      : IT87_REG_VIN_MAX(nr),
1262                     data->in[nr][index]);
1263         it87_unlock(data);
1264         return count;
1265 }
1266
1267 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
1268 static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
1269                             0, 1);
1270 static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
1271                             0, 2);
1272
1273 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
1274 static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
1275                             1, 1);
1276 static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
1277                             1, 2);
1278
1279 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
1280 static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
1281                             2, 1);
1282 static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
1283                             2, 2);
1284
1285 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
1286 static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
1287                             3, 1);
1288 static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
1289                             3, 2);
1290
1291 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
1292 static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
1293                             4, 1);
1294 static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
1295                             4, 2);
1296
1297 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
1298 static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
1299                             5, 1);
1300 static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
1301                             5, 2);
1302
1303 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
1304 static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
1305                             6, 1);
1306 static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
1307                             6, 2);
1308
1309 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
1310 static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
1311                             7, 1);
1312 static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
1313                             7, 2);
1314
1315 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
1316 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0);
1317 static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in, NULL, 10, 0);
1318 static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in, NULL, 11, 0);
1319 static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in, NULL, 12, 0);
1320
1321 /* Up to 6 temperatures */
1322 static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
1323                          char *buf)
1324 {
1325         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1326         int nr = sattr->nr;
1327         int index = sattr->index;
1328         struct it87_data *data = it87_update_device(dev);
1329
1330         if (IS_ERR(data))
1331                 return PTR_ERR(data);
1332
1333         return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
1334 }
1335
1336 static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
1337                         const char *buf, size_t count)
1338 {
1339         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1340         int nr = sattr->nr;
1341         int index = sattr->index;
1342         struct it87_data *data = dev_get_drvdata(dev);
1343         long val;
1344         u8 reg, regval;
1345         int err;
1346
1347         if (kstrtol(buf, 10, &val) < 0)
1348                 return -EINVAL;
1349
1350         err = it87_lock(data);
1351         if (err)
1352                 return err;
1353
1354         switch (index) {
1355         default:
1356         case 1:
1357                 reg = data->REG_TEMP_LOW[nr];
1358                 break;
1359         case 2:
1360                 reg = data->REG_TEMP_HIGH[nr];
1361                 break;
1362         case 3:
1363                 regval = data->read(data, IT87_REG_BEEP_ENABLE);
1364                 if (!(regval & 0x80)) {
1365                         regval |= 0x80;
1366                         data->write(data, IT87_REG_BEEP_ENABLE, regval);
1367                 }
1368                 data->valid = 0;
1369                 reg = data->REG_TEMP_OFFSET[nr];
1370                 break;
1371         }
1372
1373         data->temp[nr][index] = TEMP_TO_REG(val);
1374         data->write(data, reg, data->temp[nr][index]);
1375         it87_unlock(data);
1376         return count;
1377 }
1378
1379 static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
1380 static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1381                             0, 1);
1382 static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1383                             0, 2);
1384 static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
1385                             set_temp, 0, 3);
1386 static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
1387 static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1388                             1, 1);
1389 static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1390                             1, 2);
1391 static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
1392                             set_temp, 1, 3);
1393 static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
1394 static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1395                             2, 1);
1396 static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1397                             2, 2);
1398 static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
1399                             set_temp, 2, 3);
1400 static SENSOR_DEVICE_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0);
1401 static SENSOR_DEVICE_ATTR_2(temp4_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1402                             3, 1);
1403 static SENSOR_DEVICE_ATTR_2(temp4_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1404                             3, 2);
1405 static SENSOR_DEVICE_ATTR_2(temp4_offset, S_IRUGO | S_IWUSR, show_temp,
1406                             set_temp, 3, 3);
1407 static SENSOR_DEVICE_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0);
1408 static SENSOR_DEVICE_ATTR_2(temp5_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1409                             4, 1);
1410 static SENSOR_DEVICE_ATTR_2(temp5_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1411                             4, 2);
1412 static SENSOR_DEVICE_ATTR_2(temp5_offset, S_IRUGO | S_IWUSR, show_temp,
1413                             set_temp, 4, 3);
1414 static SENSOR_DEVICE_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0);
1415 static SENSOR_DEVICE_ATTR_2(temp6_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1416                             5, 1);
1417 static SENSOR_DEVICE_ATTR_2(temp6_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1418                             5, 2);
1419 static SENSOR_DEVICE_ATTR_2(temp6_offset, S_IRUGO | S_IWUSR, show_temp,
1420                             set_temp, 5, 3);
1421
1422 static const u8 temp_types_8686[NUM_TEMP][9] = {
1423         { 0, 8, 8, 8, 8, 8, 8, 8, 7 },
1424         { 0, 6, 8, 8, 6, 0, 0, 0, 7 },
1425         { 0, 6, 5, 8, 6, 0, 0, 0, 7 },
1426         { 4, 8, 8, 8, 8, 8, 8, 8, 7 },
1427         { 4, 6, 8, 8, 6, 0, 0, 0, 7 },
1428         { 4, 6, 5, 8, 6, 0, 0, 0, 7 },
1429 };
1430
1431 static int get_temp_type(struct it87_data *data, int index)
1432 {
1433         u8 reg, extra;
1434         int ttype, type = 0;
1435
1436         if (has_bank_sel(data)) {
1437                 u8 src1, src2;
1438
1439                 src1 = (data->temp_src[index / 2] >> ((index % 2) * 4)) & 0x0f;
1440
1441                 switch (data->type) {
1442                 case it8686:
1443                         if (src1 < 9)
1444                                 type = temp_types_8686[index][src1];
1445                         break;
1446                 case it8625:
1447                         if (index < 3)
1448                                 break;
1449                 case it8655:
1450                 case it8665:
1451                         if (src1 < 3) {
1452                                 index = src1;
1453                                 break;
1454                         }
1455                         src2 = data->temp_src[3];
1456                         switch(src1) {
1457                         case 3:
1458                                 type = (src2 & BIT(index)) ? 6 : 5;
1459                                 break;
1460                         case 4 ... 8:
1461                                 type = (src2 & BIT(index)) ? 4 : 6;
1462                                 break;
1463                         case 9:
1464                                 type = (src2 & BIT(index)) ? 5 : 0;
1465                                 break;
1466                         default:
1467                                 break;
1468                         }
1469                         return type;
1470                 default:
1471                         return 0;
1472                 }
1473         }
1474         if (type)
1475                 return type;
1476
1477         /* Dectect PECI vs. AMDTSI if possible */
1478         ttype = 6;
1479         if ((has_temp_peci(data, index)) && data->type != it8721) {
1480                 extra = data->read(data, 0x98); /* PCH/AMDTSI host status */
1481                 if (extra & BIT(6))
1482                         ttype = 5;
1483         }
1484
1485         reg = data->read(data, IT87_REG_TEMP_ENABLE);
1486
1487         /* Per chip special detection */
1488         switch (data->type) {
1489         case it8622:
1490                 if (!(reg & 0xc0) && index == 3)
1491                         type = ttype;
1492                 break;
1493         default:
1494                 break;
1495         }
1496
1497         if (type || index >= 3)
1498                 return type;
1499
1500         extra = data->read(data, IT87_REG_TEMP_EXTRA);
1501
1502         if ((has_temp_peci(data, index) && (reg >> 6 == index + 1)) ||
1503             (has_temp_old_peci(data, index) && (extra & 0x80)))
1504                 type = ttype;           /* Intel PECI or AMDTSI */
1505         if (reg & BIT(index))
1506                 type = 3;               /* thermal diode */
1507         else if (reg & BIT(index + 3))
1508                 type = 4;               /* thermistor */
1509
1510         return type;
1511 }
1512
1513 static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
1514                               char *buf)
1515 {
1516         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1517         struct it87_data *data = it87_update_device(dev);
1518         int type;
1519
1520         if (IS_ERR(data))
1521                 return PTR_ERR(data);
1522
1523         type = get_temp_type(data, sensor_attr->index);
1524         return sprintf(buf, "%d\n", type);
1525 }
1526
1527 static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
1528                              const char *buf, size_t count)
1529 {
1530         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1531         int nr = sensor_attr->index;
1532
1533         struct it87_data *data = dev_get_drvdata(dev);
1534         long val;
1535         u8 reg, extra;
1536         int err;
1537
1538         if (kstrtol(buf, 10, &val) < 0)
1539                 return -EINVAL;
1540
1541         err = it87_lock(data);
1542         if (err)
1543                 return err;
1544
1545         reg = data->read(data, IT87_REG_TEMP_ENABLE);
1546         reg &= ~(1 << nr);
1547         reg &= ~(8 << nr);
1548         if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6))
1549                 reg &= 0x3f;
1550         extra = data->read(data, IT87_REG_TEMP_EXTRA);
1551         if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6))
1552                 extra &= 0x7f;
1553         if (val == 2) { /* backwards compatibility */
1554                 dev_warn(dev,
1555                          "Sensor type 2 is deprecated, please use 4 instead\n");
1556                 val = 4;
1557         }
1558         /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */
1559         if (val == 3)
1560                 reg |= 1 << nr;
1561         else if (val == 4)
1562                 reg |= 8 << nr;
1563         else if (has_temp_peci(data, nr) && val == 6)
1564                 reg |= (nr + 1) << 6;
1565         else if (has_temp_old_peci(data, nr) && val == 6)
1566                 extra |= 0x80;
1567         else if (val != 0) {
1568                 count = -EINVAL;
1569                 goto unlock;
1570         }
1571
1572         data->sensor = reg;
1573         data->extra = extra;
1574         data->write(data, IT87_REG_TEMP_ENABLE, data->sensor);
1575         if (has_temp_old_peci(data, nr))
1576                 data->write(data, IT87_REG_TEMP_EXTRA, data->extra);
1577         data->valid = 0;        /* Force cache refresh */
1578 unlock:
1579         it87_unlock(data);
1580         return count;
1581 }
1582
1583 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1584                           set_temp_type, 0);
1585 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1586                           set_temp_type, 1);
1587 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1588                           set_temp_type, 2);
1589 static SENSOR_DEVICE_ATTR(temp4_type, S_IRUGO | S_IWUSR, show_temp_type,
1590                           set_temp_type, 3);
1591 static SENSOR_DEVICE_ATTR(temp5_type, S_IRUGO | S_IWUSR, show_temp_type,
1592                           set_temp_type, 4);
1593 static SENSOR_DEVICE_ATTR(temp6_type, S_IRUGO | S_IWUSR, show_temp_type,
1594                           set_temp_type, 5);
1595
1596 /* 6 Fans */
1597
1598 static int pwm_mode(const struct it87_data *data, int nr)
1599 {
1600         if (has_fanctl_onoff(data) && nr < 3 &&
1601             !(data->fan_main_ctrl & BIT(nr)))
1602                 return 0;                               /* Full speed */
1603         if (data->pwm_ctrl[nr] & 0x80)
1604                 return 2;                               /* Automatic mode */
1605         if ((!has_fanctl_onoff(data) || nr >= 3) &&
1606             data->pwm_duty[nr] == pwm_to_reg(data, 0xff))
1607                 return 0;                       /* Full speed */
1608
1609         return 1;                               /* Manual mode */
1610 }
1611
1612 static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
1613                         char *buf)
1614 {
1615         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1616         int nr = sattr->nr;
1617         int index = sattr->index;
1618         int speed;
1619         struct it87_data *data = it87_update_device(dev);
1620
1621         if (IS_ERR(data))
1622                 return PTR_ERR(data);
1623
1624         speed = has_16bit_fans(data) ?
1625                 FAN16_FROM_REG(data->fan[nr][index]) :
1626                 FAN_FROM_REG(data->fan[nr][index],
1627                              DIV_FROM_REG(data->fan_div[nr]));
1628         return sprintf(buf, "%d\n", speed);
1629 }
1630
1631 static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
1632                             char *buf)
1633 {
1634         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1635         struct it87_data *data = it87_update_device(dev);
1636         int nr = sensor_attr->index;
1637
1638         if (IS_ERR(data))
1639                 return PTR_ERR(data);
1640
1641         return sprintf(buf, "%lu\n", DIV_FROM_REG(data->fan_div[nr]));
1642 }
1643
1644 static ssize_t show_pwm_enable(struct device *dev,
1645                                struct device_attribute *attr, char *buf)
1646 {
1647         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1648         struct it87_data *data = it87_update_device(dev);
1649         int nr = sensor_attr->index;
1650
1651         if (IS_ERR(data))
1652                 return PTR_ERR(data);
1653
1654         return sprintf(buf, "%d\n", pwm_mode(data, nr));
1655 }
1656
1657 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
1658                         char *buf)
1659 {
1660         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1661         struct it87_data *data = it87_update_device(dev);
1662         int nr = sensor_attr->index;
1663
1664         if (IS_ERR(data))
1665                 return PTR_ERR(data);
1666
1667         return sprintf(buf, "%d\n",
1668                        pwm_from_reg(data, data->pwm_duty[nr]));
1669 }
1670
1671 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
1672                              char *buf)
1673 {
1674         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1675         struct it87_data *data = it87_update_device(dev);
1676         int nr = sensor_attr->index;
1677         unsigned int freq;
1678         int index;
1679
1680         if (IS_ERR(data))
1681                 return PTR_ERR(data);
1682
1683         if (has_pwm_freq2(data) && nr == 1)
1684                 index = (data->extra >> 4) & 0x07;
1685         else
1686                 index = (data->fan_ctl >> 4) & 0x07;
1687
1688         freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128);
1689
1690         return sprintf(buf, "%u\n", freq);
1691 }
1692
1693 static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
1694                        const char *buf, size_t count)
1695 {
1696         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1697         int nr = sattr->nr;
1698         int index = sattr->index;
1699
1700         struct it87_data *data = dev_get_drvdata(dev);
1701         long val;
1702         int err;
1703         u8 reg;
1704
1705         if (kstrtol(buf, 10, &val) < 0)
1706                 return -EINVAL;
1707
1708         err = it87_lock(data);
1709         if (err)
1710                 return err;
1711
1712         if (has_16bit_fans(data)) {
1713                 data->fan[nr][index] = FAN16_TO_REG(val);
1714                 data->write(data, data->REG_FAN_MIN[nr],
1715                             data->fan[nr][index] & 0xff);
1716                 data->write(data, data->REG_FANX_MIN[nr],
1717                             data->fan[nr][index] >> 8);
1718         } else {
1719                 reg = data->read(data, IT87_REG_FAN_DIV);
1720                 switch (nr) {
1721                 case 0:
1722                         data->fan_div[nr] = reg & 0x07;
1723                         break;
1724                 case 1:
1725                         data->fan_div[nr] = (reg >> 3) & 0x07;
1726                         break;
1727                 case 2:
1728                         data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
1729                         break;
1730                 }
1731                 data->fan[nr][index] =
1732                   FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
1733                 data->write(data, data->REG_FAN_MIN[nr], data->fan[nr][index]);
1734         }
1735         it87_unlock(data);
1736         return count;
1737 }
1738
1739 static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
1740                            const char *buf, size_t count)
1741 {
1742         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1743         struct it87_data *data = dev_get_drvdata(dev);
1744         int nr = sensor_attr->index;
1745         unsigned long val;
1746         int min, err;
1747         u8 old;
1748
1749         if (kstrtoul(buf, 10, &val) < 0)
1750                 return -EINVAL;
1751
1752         err = it87_lock(data);
1753         if (err)
1754                 return err;
1755
1756         old = data->read(data, IT87_REG_FAN_DIV);
1757
1758         /* Save fan min limit */
1759         min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
1760
1761         switch (nr) {
1762         case 0:
1763         case 1:
1764                 data->fan_div[nr] = DIV_TO_REG(val);
1765                 break;
1766         case 2:
1767                 if (val < 8)
1768                         data->fan_div[nr] = 1;
1769                 else
1770                         data->fan_div[nr] = 3;
1771         }
1772         val = old & 0x80;
1773         val |= (data->fan_div[0] & 0x07);
1774         val |= (data->fan_div[1] & 0x07) << 3;
1775         if (data->fan_div[2] == 3)
1776                 val |= 0x1 << 6;
1777         data->write(data, IT87_REG_FAN_DIV, val);
1778
1779         /* Restore fan min limit */
1780         data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
1781         data->write(data, data->REG_FAN_MIN[nr], data->fan[nr][1]);
1782         it87_unlock(data);
1783         return count;
1784 }
1785
1786 /* Returns 0 if OK, -EINVAL otherwise */
1787 static int check_trip_points(struct device *dev, int nr)
1788 {
1789         const struct it87_data *data = dev_get_drvdata(dev);
1790         int i, err = 0;
1791
1792         if (has_old_autopwm(data)) {
1793                 for (i = 0; i < 3; i++) {
1794                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1795                                 err = -EINVAL;
1796                 }
1797                 for (i = 0; i < 2; i++) {
1798                         if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1799                                 err = -EINVAL;
1800                 }
1801         } else if (has_newer_autopwm(data)) {
1802                 for (i = 1; i < 3; i++) {
1803                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1804                                 err = -EINVAL;
1805                 }
1806         }
1807
1808         if (err) {
1809                 dev_err(dev,
1810                         "Inconsistent trip points, not switching to automatic mode\n");
1811                 dev_err(dev, "Adjust the trip points and try again\n");
1812         }
1813         return err;
1814 }
1815
1816 static ssize_t set_pwm_enable(struct device *dev, struct device_attribute *attr,
1817                               const char *buf, size_t count)
1818 {
1819         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1820         struct it87_data *data = dev_get_drvdata(dev);
1821         int nr = sensor_attr->index;
1822         long val;
1823         int err;
1824
1825         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
1826                 return -EINVAL;
1827
1828         /* Check trip points before switching to automatic mode */
1829         if (val == 2) {
1830                 if (check_trip_points(dev, nr) < 0)
1831                         return -EINVAL;
1832         }
1833
1834         err = it87_lock(data);
1835         if (err)
1836                 return err;;
1837
1838         it87_update_pwm_ctrl(data, nr);
1839
1840         if (val == 0) {
1841                 if (nr < 3 && has_fanctl_onoff(data)) {
1842                         int tmp;
1843                         /* make sure the fan is on when in on/off mode */
1844                         tmp = data->read(data, IT87_REG_FAN_CTL);
1845                         data->write(data, IT87_REG_FAN_CTL, tmp | BIT(nr));
1846                         /* set on/off mode */
1847                         data->fan_main_ctrl &= ~BIT(nr);
1848                         data->write(data, IT87_REG_FAN_MAIN_CTRL,
1849                                     data->fan_main_ctrl);
1850                 } else {
1851                         u8 ctrl;
1852
1853                         /* No on/off mode, set maximum pwm value */
1854                         data->pwm_duty[nr] = pwm_to_reg(data, 0xff);
1855                         data->write(data, IT87_REG_PWM_DUTY[nr],
1856                                     data->pwm_duty[nr]);
1857                         /* and set manual mode */
1858                         if (has_newer_autopwm(data)) {
1859                                 ctrl = temp_map_to_reg(data, nr,
1860                                                        data->pwm_temp_map[nr]);
1861                                 ctrl &= 0x7f;
1862                         } else {
1863                                 ctrl = data->pwm_duty[nr];
1864                         }
1865                         data->pwm_ctrl[nr] = ctrl;
1866                         data->write(data, data->REG_PWM[nr], ctrl);
1867                 }
1868         } else {
1869                 u8 ctrl;
1870
1871                 if (has_newer_autopwm(data)) {
1872                         ctrl = temp_map_to_reg(data, nr,
1873                                                data->pwm_temp_map[nr]);
1874                         if (val == 1)
1875                                 ctrl &= 0x7f;
1876                         else
1877                                 ctrl |= 0x80;
1878                 } else {
1879                         ctrl = (val == 1 ? data->pwm_duty[nr] : 0x80);
1880                 }
1881                 data->pwm_ctrl[nr] = ctrl;
1882                 data->write(data, data->REG_PWM[nr], ctrl);
1883
1884                 if (has_fanctl_onoff(data) && nr < 3) {
1885                         /* set SmartGuardian mode */
1886                         data->fan_main_ctrl |= BIT(nr);
1887                         data->write(data, IT87_REG_FAN_MAIN_CTRL,
1888                                     data->fan_main_ctrl);
1889                 }
1890         }
1891         it87_unlock(data);
1892         return count;
1893 }
1894
1895 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1896                        const char *buf, size_t count)
1897 {
1898         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1899         struct it87_data *data = dev_get_drvdata(dev);
1900         int nr = sensor_attr->index;
1901         long val;
1902         int err;
1903
1904         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1905                 return -EINVAL;
1906
1907         err = it87_lock(data);
1908         if (err)
1909                 return err;
1910
1911         it87_update_pwm_ctrl(data, nr);
1912         if (has_newer_autopwm(data)) {
1913                 /*
1914                  * If we are in automatic mode, the PWM duty cycle register
1915                  * is read-only so we can't write the value.
1916                  */
1917                 if (data->pwm_ctrl[nr] & 0x80) {
1918                         count = -EBUSY;
1919                         goto unlock;
1920                 }
1921                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1922                 data->write(data, IT87_REG_PWM_DUTY[nr],
1923                             data->pwm_duty[nr]);
1924         } else {
1925                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1926                 /*
1927                  * If we are in manual mode, write the duty cycle immediately;
1928                  * otherwise, just store it for later use.
1929                  */
1930                 if (!(data->pwm_ctrl[nr] & 0x80)) {
1931                         data->pwm_ctrl[nr] = data->pwm_duty[nr];
1932                         data->write(data, data->REG_PWM[nr],
1933                                     data->pwm_ctrl[nr]);
1934                 }
1935         }
1936 unlock:
1937         it87_unlock(data);
1938         return count;
1939 }
1940
1941 static ssize_t set_pwm_freq(struct device *dev, struct device_attribute *attr,
1942                             const char *buf, size_t count)
1943 {
1944         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1945         struct it87_data *data = dev_get_drvdata(dev);
1946         int nr = sensor_attr->index;
1947         unsigned long val;
1948         int err;
1949         int i;
1950
1951         if (kstrtoul(buf, 10, &val) < 0)
1952                 return -EINVAL;
1953
1954         val = clamp_val(val, 0, 1000000);
1955         val *= has_newer_autopwm(data) ? 256 : 128;
1956
1957         /* Search for the nearest available frequency */
1958         for (i = 0; i < 7; i++) {
1959                 if (val > (pwm_freq[i] + pwm_freq[i + 1]) / 2)
1960                         break;
1961         }
1962
1963         err = it87_lock(data);
1964         if (err)
1965                 return err;
1966
1967         if (nr == 0) {
1968                 data->fan_ctl = data->read(data, IT87_REG_FAN_CTL) & 0x8f;
1969                 data->fan_ctl |= i << 4;
1970                 data->write(data, IT87_REG_FAN_CTL, data->fan_ctl);
1971         } else {
1972                 data->extra = data->read(data, IT87_REG_TEMP_EXTRA) & 0x8f;
1973                 data->extra |= i << 4;
1974                 data->write(data, IT87_REG_TEMP_EXTRA, data->extra);
1975         }
1976         it87_unlock(data);
1977         return count;
1978 }
1979
1980 static ssize_t show_pwm_temp_map(struct device *dev,
1981                                  struct device_attribute *attr, char *buf)
1982 {
1983         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1984         struct it87_data *data = it87_update_device(dev);
1985         int nr = sensor_attr->index;
1986
1987         if (IS_ERR(data))
1988                 return PTR_ERR(data);
1989
1990         return sprintf(buf, "%d\n", data->pwm_temp_map[nr] + 1);
1991 }
1992
1993 static ssize_t set_pwm_temp_map(struct device *dev,
1994                                 struct device_attribute *attr, const char *buf,
1995                                 size_t count)
1996 {
1997         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1998         struct it87_data *data = dev_get_drvdata(dev);
1999         int nr = sensor_attr->index;
2000         unsigned long val;
2001         int err;
2002         u8 map;
2003
2004         if (kstrtoul(buf, 10, &val) < 0)
2005                 return -EINVAL;
2006
2007         if (!val || val > data->pwm_num_temp_map)
2008                 return -EINVAL;
2009
2010         map = val - 1;
2011
2012         err = it87_lock(data);
2013         if (err)
2014                 return err;
2015
2016         it87_update_pwm_ctrl(data, nr);
2017         data->pwm_temp_map[nr] = map;
2018         /*
2019          * If we are in automatic mode, write the temp mapping immediately;
2020          * otherwise, just store it for later use.
2021          */
2022         if (data->pwm_ctrl[nr] & 0x80) {
2023                 data->pwm_ctrl[nr] = temp_map_to_reg(data, nr, map);
2024                 data->write(data, data->REG_PWM[nr], data->pwm_ctrl[nr]);
2025         }
2026         it87_unlock(data);
2027         return count;
2028 }
2029
2030 static ssize_t show_auto_pwm(struct device *dev, struct device_attribute *attr,
2031                              char *buf)
2032 {
2033         struct it87_data *data = it87_update_device(dev);
2034         struct sensor_device_attribute_2 *sensor_attr =
2035                         to_sensor_dev_attr_2(attr);
2036         int nr = sensor_attr->nr;
2037         int point = sensor_attr->index;
2038
2039         if (IS_ERR(data))
2040                 return PTR_ERR(data);
2041
2042         return sprintf(buf, "%d\n",
2043                        pwm_from_reg(data, data->auto_pwm[nr][point]));
2044 }
2045
2046 static ssize_t set_auto_pwm(struct device *dev, struct device_attribute *attr,
2047                             const char *buf, size_t count)
2048 {
2049         struct it87_data *data = dev_get_drvdata(dev);
2050         struct sensor_device_attribute_2 *sensor_attr =
2051                         to_sensor_dev_attr_2(attr);
2052         int nr = sensor_attr->nr;
2053         int point = sensor_attr->index;
2054         int regaddr;
2055         long val;
2056         int err;
2057
2058         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
2059                 return -EINVAL;
2060
2061         err = it87_lock(data);
2062         if (err)
2063                 return err;
2064
2065         data->auto_pwm[nr][point] = pwm_to_reg(data, val);
2066         if (has_newer_autopwm(data))
2067                 regaddr = IT87_REG_AUTO_TEMP(nr, 3);
2068         else
2069                 regaddr = IT87_REG_AUTO_PWM(nr, point);
2070         data->write(data, regaddr, data->auto_pwm[nr][point]);
2071         it87_unlock(data);
2072         return count;
2073 }
2074
2075 static ssize_t show_auto_pwm_slope(struct device *dev,
2076                                    struct device_attribute *attr, char *buf)
2077 {
2078         struct it87_data *data = it87_update_device(dev);
2079         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
2080         int nr = sensor_attr->index;
2081
2082         if (IS_ERR(data))
2083                 return PTR_ERR(data);
2084
2085         return sprintf(buf, "%d\n", data->auto_pwm[nr][1] & 0x7f);
2086 }
2087
2088 static ssize_t set_auto_pwm_slope(struct device *dev,
2089                                   struct device_attribute *attr,
2090                                   const char *buf, size_t count)
2091 {
2092         struct it87_data *data = dev_get_drvdata(dev);
2093         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
2094         int nr = sensor_attr->index;
2095         unsigned long val;
2096         int err;
2097
2098         if (kstrtoul(buf, 10, &val) < 0 || val > 127)
2099                 return -EINVAL;
2100
2101         err = it87_lock(data);
2102         if (err)
2103                 return err;
2104
2105         data->auto_pwm[nr][1] = (data->auto_pwm[nr][1] & 0x80) | val;
2106         data->write(data, IT87_REG_AUTO_TEMP(nr, 4), data->auto_pwm[nr][1]);
2107         it87_unlock(data);
2108         return count;
2109 }
2110
2111 static ssize_t show_auto_temp(struct device *dev, struct device_attribute *attr,
2112                               char *buf)
2113 {
2114         struct it87_data *data = it87_update_device(dev);
2115         struct sensor_device_attribute_2 *sensor_attr =
2116                         to_sensor_dev_attr_2(attr);
2117         int nr = sensor_attr->nr;
2118         int point = sensor_attr->index;
2119         int reg;
2120
2121         if (IS_ERR(data))
2122                 return PTR_ERR(data);
2123
2124         if (has_old_autopwm(data) || point)
2125                 reg = data->auto_temp[nr][point];
2126         else
2127                 reg = data->auto_temp[nr][1] - (data->auto_temp[nr][0] & 0x1f);
2128
2129         return sprintf(buf, "%d\n", TEMP_FROM_REG(reg));
2130 }
2131
2132 static ssize_t set_auto_temp(struct device *dev, struct device_attribute *attr,
2133                              const char *buf, size_t count)
2134 {
2135         struct it87_data *data = dev_get_drvdata(dev);
2136         struct sensor_device_attribute_2 *sensor_attr =
2137                         to_sensor_dev_attr_2(attr);
2138         int nr = sensor_attr->nr;
2139         int point = sensor_attr->index;
2140         long val;
2141         int reg;
2142         int err;
2143
2144         if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
2145                 return -EINVAL;
2146
2147         err = it87_lock(data);
2148         if (err)
2149                 return err;
2150
2151         if (has_newer_autopwm(data) && !point) {
2152                 reg = data->auto_temp[nr][1] - TEMP_TO_REG(val);
2153                 reg = clamp_val(reg, 0, 0x1f) | (data->auto_temp[nr][0] & 0xe0);
2154                 data->auto_temp[nr][0] = reg;
2155                 data->write(data, IT87_REG_AUTO_TEMP(nr, 5), reg);
2156         } else {
2157                 reg = TEMP_TO_REG(val);
2158                 data->auto_temp[nr][point] = reg;
2159                 if (has_newer_autopwm(data))
2160                         point--;
2161                 data->write(data, IT87_REG_AUTO_TEMP(nr, point), reg);
2162         }
2163         it87_unlock(data);
2164         return count;
2165 }
2166
2167 static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
2168 static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
2169                             0, 1);
2170 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
2171                           set_fan_div, 0);
2172
2173 static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
2174 static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
2175                             1, 1);
2176 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
2177                           set_fan_div, 1);
2178
2179 static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
2180 static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
2181                             2, 1);
2182 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
2183                           set_fan_div, 2);
2184
2185 static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
2186 static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
2187                             3, 1);
2188
2189 static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
2190 static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
2191                             4, 1);
2192
2193 static SENSOR_DEVICE_ATTR_2(fan6_input, S_IRUGO, show_fan, NULL, 5, 0);
2194 static SENSOR_DEVICE_ATTR_2(fan6_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
2195                             5, 1);
2196
2197 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
2198                           show_pwm_enable, set_pwm_enable, 0);
2199 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0);
2200 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq,
2201                           set_pwm_freq, 0);
2202 static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO,
2203                           show_pwm_temp_map, set_pwm_temp_map, 0);
2204 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR,
2205                             show_auto_pwm, set_auto_pwm, 0, 0);
2206 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR,
2207                             show_auto_pwm, set_auto_pwm, 0, 1);
2208 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR,
2209                             show_auto_pwm, set_auto_pwm, 0, 2);
2210 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO,
2211                             show_auto_pwm, NULL, 0, 3);
2212 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
2213                             show_auto_temp, set_auto_temp, 0, 1);
2214 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2215                             show_auto_temp, set_auto_temp, 0, 0);
2216 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
2217                             show_auto_temp, set_auto_temp, 0, 2);
2218 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
2219                             show_auto_temp, set_auto_temp, 0, 3);
2220 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR,
2221                             show_auto_temp, set_auto_temp, 0, 4);
2222 static SENSOR_DEVICE_ATTR_2(pwm1_auto_start, S_IRUGO | S_IWUSR,
2223                             show_auto_pwm, set_auto_pwm, 0, 0);
2224 static SENSOR_DEVICE_ATTR(pwm1_auto_slope, S_IRUGO | S_IWUSR,
2225                           show_auto_pwm_slope, set_auto_pwm_slope, 0);
2226
2227 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
2228                           show_pwm_enable, set_pwm_enable, 1);
2229 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1);
2230 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, set_pwm_freq, 1);
2231 static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO,
2232                           show_pwm_temp_map, set_pwm_temp_map, 1);
2233 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR,
2234                             show_auto_pwm, set_auto_pwm, 1, 0);
2235 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR,
2236                             show_auto_pwm, set_auto_pwm, 1, 1);
2237 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR,
2238                             show_auto_pwm, set_auto_pwm, 1, 2);
2239 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO,
2240                             show_auto_pwm, NULL, 1, 3);
2241 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
2242                             show_auto_temp, set_auto_temp, 1, 1);
2243 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2244                             show_auto_temp, set_auto_temp, 1, 0);
2245 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
2246                             show_auto_temp, set_auto_temp, 1, 2);
2247 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
2248                             show_auto_temp, set_auto_temp, 1, 3);
2249 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR,
2250                             show_auto_temp, set_auto_temp, 1, 4);
2251 static SENSOR_DEVICE_ATTR_2(pwm2_auto_start, S_IRUGO | S_IWUSR,
2252                             show_auto_pwm, set_auto_pwm, 1, 0);
2253 static SENSOR_DEVICE_ATTR(pwm2_auto_slope, S_IRUGO | S_IWUSR,
2254                           show_auto_pwm_slope, set_auto_pwm_slope, 1);
2255
2256 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
2257                           show_pwm_enable, set_pwm_enable, 2);
2258 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2);
2259 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL, 2);
2260 static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO,
2261                           show_pwm_temp_map, set_pwm_temp_map, 2);
2262 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR,
2263                             show_auto_pwm, set_auto_pwm, 2, 0);
2264 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR,
2265                             show_auto_pwm, set_auto_pwm, 2, 1);
2266 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR,
2267                             show_auto_pwm, set_auto_pwm, 2, 2);
2268 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO,
2269                             show_auto_pwm, NULL, 2, 3);
2270 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
2271                             show_auto_temp, set_auto_temp, 2, 1);
2272 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2273                             show_auto_temp, set_auto_temp, 2, 0);
2274 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
2275                             show_auto_temp, set_auto_temp, 2, 2);
2276 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
2277                             show_auto_temp, set_auto_temp, 2, 3);
2278 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR,
2279                             show_auto_temp, set_auto_temp, 2, 4);
2280 static SENSOR_DEVICE_ATTR_2(pwm3_auto_start, S_IRUGO | S_IWUSR,
2281                             show_auto_pwm, set_auto_pwm, 2, 0);
2282 static SENSOR_DEVICE_ATTR(pwm3_auto_slope, S_IRUGO | S_IWUSR,
2283                           show_auto_pwm_slope, set_auto_pwm_slope, 2);
2284
2285 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IRUGO | S_IWUSR,
2286                           show_pwm_enable, set_pwm_enable, 3);
2287 static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 3);
2288 static SENSOR_DEVICE_ATTR(pwm4_freq, S_IRUGO, show_pwm_freq, NULL, 3);
2289 static SENSOR_DEVICE_ATTR(pwm4_auto_channels_temp, S_IRUGO,
2290                           show_pwm_temp_map, set_pwm_temp_map, 3);
2291 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp, S_IRUGO | S_IWUSR,
2292                             show_auto_temp, set_auto_temp, 2, 1);
2293 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2294                             show_auto_temp, set_auto_temp, 2, 0);
2295 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point2_temp, S_IRUGO | S_IWUSR,
2296                             show_auto_temp, set_auto_temp, 2, 2);
2297 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point3_temp, S_IRUGO | S_IWUSR,
2298                             show_auto_temp, set_auto_temp, 2, 3);
2299 static SENSOR_DEVICE_ATTR_2(pwm4_auto_start, S_IRUGO | S_IWUSR,
2300                             show_auto_pwm, set_auto_pwm, 3, 0);
2301 static SENSOR_DEVICE_ATTR(pwm4_auto_slope, S_IRUGO | S_IWUSR,
2302                           show_auto_pwm_slope, set_auto_pwm_slope, 3);
2303
2304 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IRUGO | S_IWUSR,
2305                           show_pwm_enable, set_pwm_enable, 4);
2306 static SENSOR_DEVICE_ATTR(pwm5, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 4);
2307 static SENSOR_DEVICE_ATTR(pwm5_freq, S_IRUGO, show_pwm_freq, NULL, 4);
2308 static SENSOR_DEVICE_ATTR(pwm5_auto_channels_temp, S_IRUGO,
2309                           show_pwm_temp_map, set_pwm_temp_map, 4);
2310 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp, S_IRUGO | S_IWUSR,
2311                             show_auto_temp, set_auto_temp, 2, 1);
2312 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2313                             show_auto_temp, set_auto_temp, 2, 0);
2314 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point2_temp, S_IRUGO | S_IWUSR,
2315                             show_auto_temp, set_auto_temp, 2, 2);
2316 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point3_temp, S_IRUGO | S_IWUSR,
2317                             show_auto_temp, set_auto_temp, 2, 3);
2318 static SENSOR_DEVICE_ATTR_2(pwm5_auto_start, S_IRUGO | S_IWUSR,
2319                             show_auto_pwm, set_auto_pwm, 4, 0);
2320 static SENSOR_DEVICE_ATTR(pwm5_auto_slope, S_IRUGO | S_IWUSR,
2321                           show_auto_pwm_slope, set_auto_pwm_slope, 4);
2322
2323 static SENSOR_DEVICE_ATTR(pwm6_enable, S_IRUGO | S_IWUSR,
2324                           show_pwm_enable, set_pwm_enable, 5);
2325 static SENSOR_DEVICE_ATTR(pwm6, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 5);
2326 static SENSOR_DEVICE_ATTR(pwm6_freq, S_IRUGO, show_pwm_freq, NULL, 5);
2327 static SENSOR_DEVICE_ATTR(pwm6_auto_channels_temp, S_IRUGO,
2328                           show_pwm_temp_map, set_pwm_temp_map, 5);
2329 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp, S_IRUGO | S_IWUSR,
2330                             show_auto_temp, set_auto_temp, 2, 1);
2331 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2332                             show_auto_temp, set_auto_temp, 2, 0);
2333 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point2_temp, S_IRUGO | S_IWUSR,
2334                             show_auto_temp, set_auto_temp, 2, 2);
2335 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point3_temp, S_IRUGO | S_IWUSR,
2336                             show_auto_temp, set_auto_temp, 2, 3);
2337 static SENSOR_DEVICE_ATTR_2(pwm6_auto_start, S_IRUGO | S_IWUSR,
2338                             show_auto_pwm, set_auto_pwm, 5, 0);
2339 static SENSOR_DEVICE_ATTR(pwm6_auto_slope, S_IRUGO | S_IWUSR,
2340                           show_auto_pwm_slope, set_auto_pwm_slope, 5);
2341
2342 /* Alarms */
2343 static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
2344                            char *buf)
2345 {
2346         struct it87_data *data = it87_update_device(dev);
2347
2348         if (IS_ERR(data))
2349                 return PTR_ERR(data);
2350
2351         return sprintf(buf, "%u\n", data->alarms);
2352 }
2353 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
2354
2355 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
2356                           char *buf)
2357 {
2358         struct it87_data *data = it87_update_device(dev);
2359         int bitnr = to_sensor_dev_attr(attr)->index;
2360
2361         if (IS_ERR(data))
2362                 return PTR_ERR(data);
2363
2364         return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
2365 }
2366
2367 static ssize_t clear_intrusion(struct device *dev,
2368                                struct device_attribute *attr, const char *buf,
2369                                size_t count)
2370 {
2371         struct it87_data *data = dev_get_drvdata(dev);
2372         int err, config;
2373         long val;
2374
2375         if (kstrtol(buf, 10, &val) < 0 || val != 0)
2376                 return -EINVAL;
2377
2378         err = it87_lock(data);
2379         if (err)
2380                 return err;
2381
2382         config = data->read(data, IT87_REG_CONFIG);
2383         config |= BIT(5);
2384         data->write(data, IT87_REG_CONFIG, config);
2385         /* Invalidate cache to force re-read */
2386         data->valid = 0;
2387         it87_unlock(data);
2388         return count;
2389 }
2390
2391 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
2392 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
2393 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
2394 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
2395 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
2396 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
2397 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
2398 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
2399 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
2400 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
2401 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
2402 static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
2403 static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
2404 static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 7);
2405 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
2406 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
2407 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
2408 static SENSOR_DEVICE_ATTR(temp4_alarm, S_IRUGO, show_alarm, NULL, 19);
2409 static SENSOR_DEVICE_ATTR(temp5_alarm, S_IRUGO, show_alarm, NULL, 20);
2410 static SENSOR_DEVICE_ATTR(temp6_alarm, S_IRUGO, show_alarm, NULL, 21);
2411 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
2412                           show_alarm, clear_intrusion, 4);
2413
2414 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
2415                          char *buf)
2416 {
2417         struct it87_data *data = it87_update_device(dev);
2418         int bitnr = to_sensor_dev_attr(attr)->index;
2419
2420         if (IS_ERR(data))
2421                 return PTR_ERR(data);
2422
2423         return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
2424 }
2425
2426 static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
2427                         const char *buf, size_t count)
2428 {
2429         int bitnr = to_sensor_dev_attr(attr)->index;
2430         struct it87_data *data = dev_get_drvdata(dev);
2431         long val;
2432         int err;
2433
2434         if (kstrtol(buf, 10, &val) < 0 || (val != 0 && val != 1))
2435                 return -EINVAL;
2436
2437         err = it87_lock(data);
2438         if (err)
2439                 return err;
2440
2441         data->beeps = data->read(data, IT87_REG_BEEP_ENABLE);
2442         if (val)
2443                 data->beeps |= BIT(bitnr);
2444         else
2445                 data->beeps &= ~BIT(bitnr);
2446         data->write(data, IT87_REG_BEEP_ENABLE, data->beeps);
2447         it87_unlock(data);
2448         return count;
2449 }
2450
2451 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
2452                           show_beep, set_beep, 1);
2453 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
2454 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
2455 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
2456 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
2457 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
2458 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
2459 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
2460 /* fanX_beep writability is set later */
2461 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
2462 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
2463 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
2464 static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
2465 static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
2466 static SENSOR_DEVICE_ATTR(fan6_beep, S_IRUGO, show_beep, set_beep, 0);
2467 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
2468                           show_beep, set_beep, 2);
2469 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
2470 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
2471 static SENSOR_DEVICE_ATTR(temp4_beep, S_IRUGO, show_beep, NULL, 2);
2472 static SENSOR_DEVICE_ATTR(temp5_beep, S_IRUGO, show_beep, NULL, 2);
2473 static SENSOR_DEVICE_ATTR(temp6_beep, S_IRUGO, show_beep, NULL, 2);
2474
2475 static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
2476                             char *buf)
2477 {
2478         struct it87_data *data = dev_get_drvdata(dev);
2479
2480         return sprintf(buf, "%u\n", data->vrm);
2481 }
2482
2483 static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
2484                              const char *buf, size_t count)
2485 {
2486         struct it87_data *data = dev_get_drvdata(dev);
2487         unsigned long val;
2488
2489         if (kstrtoul(buf, 10, &val) < 0)
2490                 return -EINVAL;
2491
2492         data->vrm = val;
2493
2494         return count;
2495 }
2496 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
2497
2498 static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
2499                             char *buf)
2500 {
2501         struct it87_data *data = it87_update_device(dev);
2502
2503         if (IS_ERR(data))
2504                 return PTR_ERR(data);
2505
2506         return sprintf(buf, "%ld\n", (long)vid_from_reg(data->vid, data->vrm));
2507 }
2508 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
2509
2510 static ssize_t show_label(struct device *dev, struct device_attribute *attr,
2511                           char *buf)
2512 {
2513         static const char * const labels[] = {
2514                 "+5V",
2515                 "5VSB",
2516                 "Vbat",
2517                 "AVCC",
2518         };
2519         static const char * const labels_it8721[] = {
2520                 "+3.3V",
2521                 "3VSB",
2522                 "Vbat",
2523                 "+3.3V",
2524         };
2525         struct it87_data *data = dev_get_drvdata(dev);
2526         int nr = to_sensor_dev_attr(attr)->index;
2527         const char *label;
2528
2529         if (has_vin3_5v(data) && nr == 0)
2530                 label = labels[0];
2531         else if (has_12mv_adc(data) || has_10_9mv_adc(data) ||
2532                  has_11mv_adc(data))
2533                 label = labels_it8721[nr];
2534         else
2535                 label = labels[nr];
2536
2537         return sprintf(buf, "%s\n", label);
2538 }
2539 static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
2540 static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
2541 static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
2542 /* AVCC3 */
2543 static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 3);
2544
2545 static umode_t it87_in_is_visible(struct kobject *kobj,
2546                                   struct attribute *attr, int index)
2547 {
2548         struct device *dev = container_of(kobj, struct device, kobj);
2549         struct it87_data *data = dev_get_drvdata(dev);
2550         int i = index / 5;      /* voltage index */
2551         int a = index % 5;      /* attribute index */
2552
2553         if (index >= 40) {      /* in8 and higher only have input attributes */
2554                 i = index - 40 + 8;
2555                 a = 0;
2556         }
2557
2558         if (!(data->has_in & BIT(i)))
2559                 return 0;
2560
2561         if (a == 4 && !data->has_beep)
2562                 return 0;
2563
2564         return attr->mode;
2565 }
2566
2567 static struct attribute *it87_attributes_in[] = {
2568         &sensor_dev_attr_in0_input.dev_attr.attr,
2569         &sensor_dev_attr_in0_min.dev_attr.attr,
2570         &sensor_dev_attr_in0_max.dev_attr.attr,
2571         &sensor_dev_attr_in0_alarm.dev_attr.attr,
2572         &sensor_dev_attr_in0_beep.dev_attr.attr,        /* 4 */
2573
2574         &sensor_dev_attr_in1_input.dev_attr.attr,
2575         &sensor_dev_attr_in1_min.dev_attr.attr,
2576         &sensor_dev_attr_in1_max.dev_attr.attr,
2577         &sensor_dev_attr_in1_alarm.dev_attr.attr,
2578         &sensor_dev_attr_in1_beep.dev_attr.attr,        /* 9 */
2579
2580         &sensor_dev_attr_in2_input.dev_attr.attr,
2581         &sensor_dev_attr_in2_min.dev_attr.attr,
2582         &sensor_dev_attr_in2_max.dev_attr.attr,
2583         &sensor_dev_attr_in2_alarm.dev_attr.attr,
2584         &sensor_dev_attr_in2_beep.dev_attr.attr,        /* 14 */
2585
2586         &sensor_dev_attr_in3_input.dev_attr.attr,
2587         &sensor_dev_attr_in3_min.dev_attr.attr,
2588         &sensor_dev_attr_in3_max.dev_attr.attr,
2589         &sensor_dev_attr_in3_alarm.dev_attr.attr,
2590         &sensor_dev_attr_in3_beep.dev_attr.attr,        /* 19 */
2591
2592         &sensor_dev_attr_in4_input.dev_attr.attr,
2593         &sensor_dev_attr_in4_min.dev_attr.attr,
2594         &sensor_dev_attr_in4_max.dev_attr.attr,
2595         &sensor_dev_attr_in4_alarm.dev_attr.attr,
2596         &sensor_dev_attr_in4_beep.dev_attr.attr,        /* 24 */
2597
2598         &sensor_dev_attr_in5_input.dev_attr.attr,
2599         &sensor_dev_attr_in5_min.dev_attr.attr,
2600         &sensor_dev_attr_in5_max.dev_attr.attr,
2601         &sensor_dev_attr_in5_alarm.dev_attr.attr,
2602         &sensor_dev_attr_in5_beep.dev_attr.attr,        /* 29 */
2603
2604         &sensor_dev_attr_in6_input.dev_attr.attr,
2605         &sensor_dev_attr_in6_min.dev_attr.attr,
2606         &sensor_dev_attr_in6_max.dev_attr.attr,
2607         &sensor_dev_attr_in6_alarm.dev_attr.attr,
2608         &sensor_dev_attr_in6_beep.dev_attr.attr,        /* 34 */
2609
2610         &sensor_dev_attr_in7_input.dev_attr.attr,
2611         &sensor_dev_attr_in7_min.dev_attr.attr,
2612         &sensor_dev_attr_in7_max.dev_attr.attr,
2613         &sensor_dev_attr_in7_alarm.dev_attr.attr,
2614         &sensor_dev_attr_in7_beep.dev_attr.attr,        /* 39 */
2615
2616         &sensor_dev_attr_in8_input.dev_attr.attr,       /* 40 */
2617         &sensor_dev_attr_in9_input.dev_attr.attr,       /* 41 */
2618         &sensor_dev_attr_in10_input.dev_attr.attr,      /* 42 */
2619         &sensor_dev_attr_in11_input.dev_attr.attr,      /* 43 */
2620         &sensor_dev_attr_in12_input.dev_attr.attr,      /* 44 */
2621         NULL
2622 };
2623
2624 static const struct attribute_group it87_group_in = {
2625         .attrs = it87_attributes_in,
2626         .is_visible = it87_in_is_visible,
2627 };
2628
2629 static umode_t it87_temp_is_visible(struct kobject *kobj,
2630                                     struct attribute *attr, int index)
2631 {
2632         struct device *dev = container_of(kobj, struct device, kobj);
2633         struct it87_data *data = dev_get_drvdata(dev);
2634         int i = index / 7;      /* temperature index */
2635         int a = index % 7;      /* attribute index */
2636
2637         if (!(data->has_temp & BIT(i)))
2638                 return 0;
2639
2640         if (a && i >= data->num_temp_limit)
2641                 return 0;
2642
2643         if (a == 3) {
2644                 int type = get_temp_type(data, i);
2645
2646                 if (type == 0)
2647                         return 0;
2648                 if (has_bank_sel(data))
2649                         return 0444;
2650                 return attr->mode;
2651         }
2652
2653         if (a == 5 && i >= data->num_temp_offset)
2654                 return 0;
2655
2656         if (a == 6 && !data->has_beep)
2657                 return 0;
2658
2659         return attr->mode;
2660 }
2661
2662 static struct attribute *it87_attributes_temp[] = {
2663         &sensor_dev_attr_temp1_input.dev_attr.attr,
2664         &sensor_dev_attr_temp1_max.dev_attr.attr,
2665         &sensor_dev_attr_temp1_min.dev_attr.attr,
2666         &sensor_dev_attr_temp1_type.dev_attr.attr,      /* 3 */
2667         &sensor_dev_attr_temp1_alarm.dev_attr.attr,
2668         &sensor_dev_attr_temp1_offset.dev_attr.attr,    /* 5 */
2669         &sensor_dev_attr_temp1_beep.dev_attr.attr,      /* 6 */
2670
2671         &sensor_dev_attr_temp2_input.dev_attr.attr,     /* 7 */
2672         &sensor_dev_attr_temp2_max.dev_attr.attr,
2673         &sensor_dev_attr_temp2_min.dev_attr.attr,
2674         &sensor_dev_attr_temp2_type.dev_attr.attr,
2675         &sensor_dev_attr_temp2_alarm.dev_attr.attr,
2676         &sensor_dev_attr_temp2_offset.dev_attr.attr,
2677         &sensor_dev_attr_temp2_beep.dev_attr.attr,
2678
2679         &sensor_dev_attr_temp3_input.dev_attr.attr,     /* 14 */
2680         &sensor_dev_attr_temp3_max.dev_attr.attr,
2681         &sensor_dev_attr_temp3_min.dev_attr.attr,
2682         &sensor_dev_attr_temp3_type.dev_attr.attr,
2683         &sensor_dev_attr_temp3_alarm.dev_attr.attr,
2684         &sensor_dev_attr_temp3_offset.dev_attr.attr,
2685         &sensor_dev_attr_temp3_beep.dev_attr.attr,
2686
2687         &sensor_dev_attr_temp4_input.dev_attr.attr,     /* 21 */
2688         &sensor_dev_attr_temp4_max.dev_attr.attr,
2689         &sensor_dev_attr_temp4_min.dev_attr.attr,
2690         &sensor_dev_attr_temp4_type.dev_attr.attr,
2691         &sensor_dev_attr_temp4_alarm.dev_attr.attr,
2692         &sensor_dev_attr_temp4_offset.dev_attr.attr,
2693         &sensor_dev_attr_temp4_beep.dev_attr.attr,
2694
2695         &sensor_dev_attr_temp5_input.dev_attr.attr,
2696         &sensor_dev_attr_temp5_max.dev_attr.attr,
2697         &sensor_dev_attr_temp5_min.dev_attr.attr,
2698         &sensor_dev_attr_temp5_type.dev_attr.attr,
2699         &sensor_dev_attr_temp5_alarm.dev_attr.attr,
2700         &sensor_dev_attr_temp5_offset.dev_attr.attr,
2701         &sensor_dev_attr_temp5_beep.dev_attr.attr,
2702
2703         &sensor_dev_attr_temp6_input.dev_attr.attr,
2704         &sensor_dev_attr_temp6_max.dev_attr.attr,
2705         &sensor_dev_attr_temp6_min.dev_attr.attr,
2706         &sensor_dev_attr_temp6_type.dev_attr.attr,
2707         &sensor_dev_attr_temp6_alarm.dev_attr.attr,
2708         &sensor_dev_attr_temp6_offset.dev_attr.attr,
2709         &sensor_dev_attr_temp6_beep.dev_attr.attr,
2710         NULL
2711 };
2712
2713 static const struct attribute_group it87_group_temp = {
2714         .attrs = it87_attributes_temp,
2715         .is_visible = it87_temp_is_visible,
2716 };
2717
2718 static umode_t it87_is_visible(struct kobject *kobj,
2719                                struct attribute *attr, int index)
2720 {
2721         struct device *dev = container_of(kobj, struct device, kobj);
2722         struct it87_data *data = dev_get_drvdata(dev);
2723
2724         if ((index == 2 || index == 3) && !data->has_vid)
2725                 return 0;
2726
2727         if (index > 3 && !(data->in_internal & BIT(index - 4)))
2728                 return 0;
2729
2730         return attr->mode;
2731 }
2732
2733 static struct attribute *it87_attributes[] = {
2734         &dev_attr_alarms.attr,
2735         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
2736         &dev_attr_vrm.attr,                             /* 2 */
2737         &dev_attr_cpu0_vid.attr,                        /* 3 */
2738         &sensor_dev_attr_in3_label.dev_attr.attr,       /* 4 .. 7 */
2739         &sensor_dev_attr_in7_label.dev_attr.attr,
2740         &sensor_dev_attr_in8_label.dev_attr.attr,
2741         &sensor_dev_attr_in9_label.dev_attr.attr,
2742         NULL
2743 };
2744
2745 static const struct attribute_group it87_group = {
2746         .attrs = it87_attributes,
2747         .is_visible = it87_is_visible,
2748 };
2749
2750 static umode_t it87_fan_is_visible(struct kobject *kobj,
2751                                    struct attribute *attr, int index)
2752 {
2753         struct device *dev = container_of(kobj, struct device, kobj);
2754         struct it87_data *data = dev_get_drvdata(dev);
2755         int i = index / 5;      /* fan index */
2756         int a = index % 5;      /* attribute index */
2757
2758         if (index >= 15) {      /* fan 4..6 don't have divisor attributes */
2759                 i = (index - 15) / 4 + 3;
2760                 a = (index - 15) % 4;
2761         }
2762
2763         if (!(data->has_fan & BIT(i)))
2764                 return 0;
2765
2766         if (a == 3) {                           /* beep */
2767                 if (!data->has_beep)
2768                         return 0;
2769                 /* first fan beep attribute is writable */
2770                 if (i == __ffs(data->has_fan))
2771                         return attr->mode | S_IWUSR;
2772         }
2773
2774         if (a == 4 && has_16bit_fans(data))     /* divisor */
2775                 return 0;
2776
2777         return attr->mode;
2778 }
2779
2780 static struct attribute *it87_attributes_fan[] = {
2781         &sensor_dev_attr_fan1_input.dev_attr.attr,
2782         &sensor_dev_attr_fan1_min.dev_attr.attr,
2783         &sensor_dev_attr_fan1_alarm.dev_attr.attr,
2784         &sensor_dev_attr_fan1_beep.dev_attr.attr,       /* 3 */
2785         &sensor_dev_attr_fan1_div.dev_attr.attr,        /* 4 */
2786
2787         &sensor_dev_attr_fan2_input.dev_attr.attr,
2788         &sensor_dev_attr_fan2_min.dev_attr.attr,
2789         &sensor_dev_attr_fan2_alarm.dev_attr.attr,
2790         &sensor_dev_attr_fan2_beep.dev_attr.attr,
2791         &sensor_dev_attr_fan2_div.dev_attr.attr,        /* 9 */
2792
2793         &sensor_dev_attr_fan3_input.dev_attr.attr,
2794         &sensor_dev_attr_fan3_min.dev_attr.attr,
2795         &sensor_dev_attr_fan3_alarm.dev_attr.attr,
2796         &sensor_dev_attr_fan3_beep.dev_attr.attr,
2797         &sensor_dev_attr_fan3_div.dev_attr.attr,        /* 14 */
2798
2799         &sensor_dev_attr_fan4_input.dev_attr.attr,      /* 15 */
2800         &sensor_dev_attr_fan4_min.dev_attr.attr,
2801         &sensor_dev_attr_fan4_alarm.dev_attr.attr,
2802         &sensor_dev_attr_fan4_beep.dev_attr.attr,
2803
2804         &sensor_dev_attr_fan5_input.dev_attr.attr,      /* 19 */
2805         &sensor_dev_attr_fan5_min.dev_attr.attr,
2806         &sensor_dev_attr_fan5_alarm.dev_attr.attr,
2807         &sensor_dev_attr_fan5_beep.dev_attr.attr,
2808
2809         &sensor_dev_attr_fan6_input.dev_attr.attr,      /* 23 */
2810         &sensor_dev_attr_fan6_min.dev_attr.attr,
2811         &sensor_dev_attr_fan6_alarm.dev_attr.attr,
2812         &sensor_dev_attr_fan6_beep.dev_attr.attr,
2813         NULL
2814 };
2815
2816 static const struct attribute_group it87_group_fan = {
2817         .attrs = it87_attributes_fan,
2818         .is_visible = it87_fan_is_visible,
2819 };
2820
2821 static umode_t it87_pwm_is_visible(struct kobject *kobj,
2822                                    struct attribute *attr, int index)
2823 {
2824         struct device *dev = container_of(kobj, struct device, kobj);
2825         struct it87_data *data = dev_get_drvdata(dev);
2826         int i = index / 4;      /* pwm index */
2827         int a = index % 4;      /* attribute index */
2828
2829         if (!(data->has_pwm & BIT(i)))
2830                 return 0;
2831
2832         /* pwmX_auto_channels_temp is only writable if auto pwm is supported */
2833         if (a == 3 && (has_old_autopwm(data) || has_newer_autopwm(data)))
2834                 return attr->mode | S_IWUSR;
2835
2836         /* pwm2_freq is writable if there are two pwm frequency selects */
2837         if (has_pwm_freq2(data) && i == 1 && a == 2)
2838                 return attr->mode | S_IWUSR;
2839
2840         return attr->mode;
2841 }
2842
2843 static struct attribute *it87_attributes_pwm[] = {
2844         &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2845         &sensor_dev_attr_pwm1.dev_attr.attr,
2846         &sensor_dev_attr_pwm1_freq.dev_attr.attr,
2847         &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
2848
2849         &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2850         &sensor_dev_attr_pwm2.dev_attr.attr,
2851         &sensor_dev_attr_pwm2_freq.dev_attr.attr,
2852         &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
2853
2854         &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2855         &sensor_dev_attr_pwm3.dev_attr.attr,
2856         &sensor_dev_attr_pwm3_freq.dev_attr.attr,
2857         &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
2858
2859         &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2860         &sensor_dev_attr_pwm4.dev_attr.attr,
2861         &sensor_dev_attr_pwm4_freq.dev_attr.attr,
2862         &sensor_dev_attr_pwm4_auto_channels_temp.dev_attr.attr,
2863
2864         &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2865         &sensor_dev_attr_pwm5.dev_attr.attr,
2866         &sensor_dev_attr_pwm5_freq.dev_attr.attr,
2867         &sensor_dev_attr_pwm5_auto_channels_temp.dev_attr.attr,
2868
2869         &sensor_dev_attr_pwm6_enable.dev_attr.attr,
2870         &sensor_dev_attr_pwm6.dev_attr.attr,
2871         &sensor_dev_attr_pwm6_freq.dev_attr.attr,
2872         &sensor_dev_attr_pwm6_auto_channels_temp.dev_attr.attr,
2873
2874         NULL
2875 };
2876
2877 static const struct attribute_group it87_group_pwm = {
2878         .attrs = it87_attributes_pwm,
2879         .is_visible = it87_pwm_is_visible,
2880 };
2881
2882 static umode_t it87_auto_pwm_is_visible(struct kobject *kobj,
2883                                         struct attribute *attr, int index)
2884 {
2885         struct device *dev = container_of(kobj, struct device, kobj);
2886         struct it87_data *data = dev_get_drvdata(dev);
2887         int i = index / 11;     /* pwm index */
2888         int a = index % 11;     /* attribute index */
2889
2890         if (index >= 33) {      /* pwm 4..6 */
2891                 i = (index - 33) / 6 + 3;
2892                 a = (index - 33) % 6 + 4;
2893         }
2894
2895         if (!(data->has_pwm & BIT(i)))
2896                 return 0;
2897
2898         if (has_newer_autopwm(data)) {
2899                 if (a < 4)      /* no auto point pwm */
2900                         return 0;
2901                 if (a == 8)     /* no auto_point4 */
2902                         return 0;
2903         }
2904         if (has_old_autopwm(data)) {
2905                 if (a >= 9)     /* no pwm_auto_start, pwm_auto_slope */
2906                         return 0;
2907         }
2908
2909         return attr->mode;
2910 }
2911
2912 static struct attribute *it87_attributes_auto_pwm[] = {
2913         &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
2914         &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
2915         &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
2916         &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
2917         &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
2918         &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
2919         &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
2920         &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
2921         &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
2922         &sensor_dev_attr_pwm1_auto_start.dev_attr.attr,
2923         &sensor_dev_attr_pwm1_auto_slope.dev_attr.attr,
2924
2925         &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,    /* 11 */
2926         &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
2927         &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
2928         &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
2929         &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
2930         &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
2931         &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
2932         &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
2933         &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
2934         &sensor_dev_attr_pwm2_auto_start.dev_attr.attr,
2935         &sensor_dev_attr_pwm2_auto_slope.dev_attr.attr,
2936
2937         &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,    /* 22 */
2938         &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
2939         &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
2940         &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
2941         &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
2942         &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
2943         &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
2944         &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
2945         &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
2946         &sensor_dev_attr_pwm3_auto_start.dev_attr.attr,
2947         &sensor_dev_attr_pwm3_auto_slope.dev_attr.attr,
2948
2949         &sensor_dev_attr_pwm4_auto_point1_temp.dev_attr.attr,   /* 33 */
2950         &sensor_dev_attr_pwm4_auto_point1_temp_hyst.dev_attr.attr,
2951         &sensor_dev_attr_pwm4_auto_point2_temp.dev_attr.attr,
2952         &sensor_dev_attr_pwm4_auto_point3_temp.dev_attr.attr,
2953         &sensor_dev_attr_pwm4_auto_start.dev_attr.attr,
2954         &sensor_dev_attr_pwm4_auto_slope.dev_attr.attr,
2955
2956         &sensor_dev_attr_pwm5_auto_point1_temp.dev_attr.attr,
2957         &sensor_dev_attr_pwm5_auto_point1_temp_hyst.dev_attr.attr,
2958         &sensor_dev_attr_pwm5_auto_point2_temp.dev_attr.attr,
2959         &sensor_dev_attr_pwm5_auto_point3_temp.dev_attr.attr,
2960         &sensor_dev_attr_pwm5_auto_start.dev_attr.attr,
2961         &sensor_dev_attr_pwm5_auto_slope.dev_attr.attr,
2962
2963         &sensor_dev_attr_pwm6_auto_point1_temp.dev_attr.attr,
2964         &sensor_dev_attr_pwm6_auto_point1_temp_hyst.dev_attr.attr,
2965         &sensor_dev_attr_pwm6_auto_point2_temp.dev_attr.attr,
2966         &sensor_dev_attr_pwm6_auto_point3_temp.dev_attr.attr,
2967         &sensor_dev_attr_pwm6_auto_start.dev_attr.attr,
2968         &sensor_dev_attr_pwm6_auto_slope.dev_attr.attr,
2969
2970         NULL,
2971 };
2972
2973 static const struct attribute_group it87_group_auto_pwm = {
2974         .attrs = it87_attributes_auto_pwm,
2975         .is_visible = it87_auto_pwm_is_visible,
2976 };
2977
2978 /* SuperIO detection - will change isa_address if a chip is found */
2979 static int __init it87_find(int sioaddr, unsigned short *address,
2980                             phys_addr_t *mmio_address, struct it87_sio_data *sio_data)
2981 {
2982         const struct it87_devices *config;
2983         phys_addr_t base = 0;
2984         bool doexit = true;
2985         char mmio_str[32];
2986         u16 chip_type;
2987         int err;
2988
2989         err = superio_enter(sioaddr);
2990         if (err)
2991                 return err;
2992
2993         sio_data->sioaddr = sioaddr;
2994
2995         err = -ENODEV;
2996         chip_type = superio_inw(sioaddr, DEVID);
2997         if (chip_type == 0xffff)
2998                 goto exit;
2999
3000         if (force_id)
3001                 chip_type = force_id;
3002
3003         switch (chip_type) {
3004         case IT8705F_DEVID:
3005                 sio_data->type = it87;
3006                 break;
3007         case IT8712F_DEVID:
3008                 sio_data->type = it8712;
3009                 break;
3010         case IT8716F_DEVID:
3011         case IT8726F_DEVID:
3012                 sio_data->type = it8716;
3013                 break;
3014         case IT8718F_DEVID:
3015                 sio_data->type = it8718;
3016                 break;
3017         case IT8720F_DEVID:
3018                 sio_data->type = it8720;
3019                 break;
3020         case IT8721F_DEVID:
3021                 sio_data->type = it8721;
3022                 break;
3023         case IT8728F_DEVID:
3024                 sio_data->type = it8728;
3025                 break;
3026         case IT8732F_DEVID:
3027                 sio_data->type = it8732;
3028                 break;
3029         case IT8792E_DEVID:
3030                 sio_data->type = it8792;
3031                 /*
3032                  * Disabling configuration mode on IT8792E can result in system
3033                  * hang-ups and access failures to the Super-IO chip at the
3034                  * second SIO address. Never exit configuration mode on this
3035                  * chip to avoid the problem.
3036                  */
3037                 doexit = false;
3038                 break;
3039         case IT8771E_DEVID:
3040                 sio_data->type = it8771;
3041                 break;
3042         case IT8772E_DEVID:
3043                 sio_data->type = it8772;
3044                 break;
3045         case IT8781F_DEVID:
3046                 sio_data->type = it8781;
3047                 break;
3048         case IT8782F_DEVID:
3049                 sio_data->type = it8782;
3050                 break;
3051         case IT8783E_DEVID:
3052                 sio_data->type = it8783;
3053                 break;
3054         case IT8786E_DEVID:
3055                 sio_data->type = it8786;
3056                 break;
3057         case IT8790E_DEVID:
3058                 sio_data->type = it8790;
3059                 doexit = false;         /* See IT8792E comment above */
3060                 break;
3061         case IT8603E_DEVID:
3062         case IT8623E_DEVID:
3063                 sio_data->type = it8603;
3064                 break;
3065         case IT8607E_DEVID:
3066                 sio_data->type = it8607;
3067                 break;
3068         case IT8613E_DEVID:
3069                 sio_data->type = it8613;
3070                 break;
3071         case IT8620E_DEVID:
3072                 sio_data->type = it8620;
3073                 break;
3074         case IT8622E_DEVID:
3075                 sio_data->type = it8622;
3076                 break;
3077         case IT8625E_DEVID:
3078                 sio_data->type = it8625;
3079                 break;
3080         case IT8628E_DEVID:
3081                 sio_data->type = it8628;
3082                 break;
3083         case IT8655E_DEVID:
3084                 sio_data->type = it8655;
3085                 break;
3086         case IT8665E_DEVID:
3087                 sio_data->type = it8665;
3088                 break;
3089         case IT8686E_DEVID:
3090                 sio_data->type = it8686;
3091                 break;
3092         case 0xffff:    /* No device at all */
3093                 goto exit;
3094         default:
3095                 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
3096                 goto exit;
3097         }
3098
3099         superio_select(sioaddr, PME);
3100         if (!(superio_inb(sioaddr, IT87_ACT_REG) & 0x01)) {
3101                 pr_info("Device not activated, skipping\n");
3102                 goto exit;
3103         }
3104
3105         *address = superio_inw(sioaddr, IT87_BASE_REG) & ~(IT87_EXTENT - 1);
3106         if (*address == 0) {
3107                 pr_info("Base address not set, skipping\n");
3108                 goto exit;
3109         }
3110
3111         sio_data->doexit = doexit;
3112
3113         err = 0;
3114         sio_data->revision = superio_inb(sioaddr, DEVREV) & 0x0f;
3115
3116         config = &it87_devices[sio_data->type];
3117
3118         if (has_mmio(config) && mmio) {
3119                 u8 reg;
3120
3121                 reg = superio_inb(sioaddr, IT87_EC_HWM_MIO_REG);
3122                 if (reg & BIT(5)) {
3123                         base = 0xf0000000 + ((reg & 0x0f) << 24);
3124                         base += (reg & 0xc0) << 14;
3125                 }
3126         }
3127         *mmio_address = base;
3128
3129         mmio_str[0] = '\0';
3130         if (base)
3131                 snprintf(mmio_str, sizeof(mmio_str), " [MMIO at %pa]", &base);
3132
3133         pr_info("Found IT%04x%s chip at 0x%x%s, revision %d\n", chip_type,
3134                 it87_devices[sio_data->type].suffix,
3135                 *address, mmio_str, sio_data->revision);
3136
3137         /* in7 (VSB or VCCH5V) is always internal on some chips */
3138         if (has_in7_internal(config))
3139                 sio_data->internal |= BIT(1);
3140
3141         /* in8 (Vbat) is always internal */
3142         sio_data->internal |= BIT(2);
3143
3144         /* in9 (AVCC3), always internal if supported */
3145         if (has_avcc3(config))
3146                 sio_data->internal |= BIT(3); /* in9 is AVCC */
3147         else
3148                 sio_data->skip_in |= BIT(9);
3149
3150         if (!has_four_pwm(config))
3151                 sio_data->skip_pwm |= BIT(3) | BIT(4) | BIT(5);
3152         else if (!has_five_pwm(config))
3153                 sio_data->skip_pwm |= BIT(4) | BIT(5);
3154         else if (!has_six_pwm(config))
3155                 sio_data->skip_pwm |= BIT(5);
3156
3157         if (!has_vid(config))
3158                 sio_data->skip_vid = 1;
3159
3160         /* Read GPIO config and VID value from LDN 7 (GPIO) */
3161         if (sio_data->type == it87) {
3162                 /* The IT8705F has a different LD number for GPIO */
3163                 superio_select(sioaddr, 5);
3164                 sio_data->beep_pin = superio_inb(sioaddr,
3165                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3166         } else if (sio_data->type == it8783) {
3167                 int reg25, reg27, reg2a, reg2c, regef;
3168
3169                 superio_select(sioaddr, GPIO);
3170
3171                 reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
3172                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3173                 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
3174                 reg2c = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3175                 regef = superio_inb(sioaddr, IT87_SIO_SPI_REG);
3176
3177                 /* Check if fan3 is there or not */
3178                 if ((reg27 & BIT(0)) || !(reg2c & BIT(2)))
3179                         sio_data->skip_fan |= BIT(2);
3180                 if ((reg25 & BIT(4)) ||
3181                     (!(reg2a & BIT(1)) && (regef & BIT(0))))
3182                         sio_data->skip_pwm |= BIT(2);
3183
3184                 /* Check if fan2 is there or not */
3185                 if (reg27 & BIT(7))
3186                         sio_data->skip_fan |= BIT(1);
3187                 if (reg27 & BIT(3))
3188                         sio_data->skip_pwm |= BIT(1);
3189
3190                 /* VIN5 */
3191                 if ((reg27 & BIT(0)) || (reg2c & BIT(2)))
3192                         sio_data->skip_in |= BIT(5); /* No VIN5 */
3193
3194                 /* VIN6 */
3195                 if (reg27 & BIT(1))
3196                         sio_data->skip_in |= BIT(6); /* No VIN6 */
3197
3198                 /*
3199                  * VIN7
3200                  * Does not depend on bit 2 of Reg2C, contrary to datasheet.
3201                  */
3202                 if (reg27 & BIT(2)) {
3203                         /*
3204                          * The data sheet is a bit unclear regarding the
3205                          * internal voltage divider for VCCH5V. It says
3206                          * "This bit enables and switches VIN7 (pin 91) to the
3207                          * internal voltage divider for VCCH5V".
3208                          * This is different to other chips, where the internal
3209                          * voltage divider would connect VIN7 to an internal
3210                          * voltage source. Maybe that is the case here as well.
3211                          *
3212                          * Since we don't know for sure, re-route it if that is
3213                          * not the case, and ask the user to report if the
3214                          * resulting voltage is sane.
3215                          */
3216                         if (!(reg2c & BIT(1))) {
3217                                 reg2c |= BIT(1);
3218                                 superio_outb(sioaddr, IT87_SIO_PINX2_REG,
3219                                              reg2c);
3220                                 pr_notice("Routing internal VCCH5V to in7.\n");
3221                         }
3222                         pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
3223                         pr_notice("Please report if it displays a reasonable voltage.\n");
3224                 }
3225
3226                 if (reg2c & BIT(0))
3227                         sio_data->internal |= BIT(0);
3228                 if (reg2c & BIT(1))
3229                         sio_data->internal |= BIT(1);
3230
3231                 sio_data->beep_pin = superio_inb(sioaddr,
3232                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3233         } else if (sio_data->type == it8603 || sio_data->type == it8607) {
3234                 int reg27, reg29;
3235
3236                 superio_select(sioaddr, GPIO);
3237
3238                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3239
3240                 /* Check if fan3 is there or not */
3241                 if (reg27 & BIT(6))
3242                         sio_data->skip_pwm |= BIT(2);
3243                 if (reg27 & BIT(7))
3244                         sio_data->skip_fan |= BIT(2);
3245
3246                 /* Check if fan2 is there or not */
3247                 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3248                 if (reg29 & BIT(1))
3249                         sio_data->skip_pwm |= BIT(1);
3250                 if (reg29 & BIT(2))
3251                         sio_data->skip_fan |= BIT(1);
3252
3253                 switch (sio_data->type) {
3254                 case it8603:
3255                         sio_data->skip_in |= BIT(5); /* No VIN5 */
3256                         sio_data->skip_in |= BIT(6); /* No VIN6 */
3257                         break;
3258                 case it8607:
3259                         sio_data->skip_pwm |= BIT(0);/* No fan1 */
3260                         sio_data->skip_fan |= BIT(0);
3261                 default:
3262                         break;
3263                 }
3264
3265                 sio_data->beep_pin = superio_inb(sioaddr,
3266                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3267         } else if (sio_data->type == it8613) {
3268                 int reg27, reg29, reg2a;
3269
3270                 superio_select(sioaddr, GPIO);
3271
3272                 /* Check for pwm3, fan3, pwm5, fan5 */
3273                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3274                 if (reg27 & BIT(1))
3275                         sio_data->skip_fan |= BIT(4);
3276                 if (reg27 & BIT(3))
3277                         sio_data->skip_pwm |= BIT(4);
3278                 if (reg27 & BIT(6))
3279                         sio_data->skip_pwm |= BIT(2);
3280                 if (reg27 & BIT(7))
3281                         sio_data->skip_fan |= BIT(2);
3282
3283                 /* Check for pwm2, fan2 */
3284                 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3285                 if (reg29 & BIT(1))
3286                         sio_data->skip_pwm |= BIT(1);
3287                 if (reg29 & BIT(2))
3288                         sio_data->skip_fan |= BIT(1);
3289
3290                 /* Check for pwm4, fan4 */
3291                 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
3292                 if (!(reg2a & BIT(0)) || (reg29 & BIT(7))) {
3293                         sio_data->skip_fan |= BIT(3);
3294                         sio_data->skip_pwm |= BIT(3);
3295                 }
3296
3297                 sio_data->skip_pwm |= BIT(0); /* No pwm1 */
3298                 sio_data->skip_fan |= BIT(0); /* No fan1 */
3299                 sio_data->skip_in |= BIT(3);  /* No VIN3 */
3300                 sio_data->skip_in |= BIT(6);  /* No VIN6 */
3301
3302                 sio_data->beep_pin = superio_inb(sioaddr,
3303                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3304         } else if (sio_data->type == it8620 || sio_data->type == it8628 ||
3305                    sio_data->type == it8686) {
3306                 int reg;
3307
3308                 superio_select(sioaddr, GPIO);
3309
3310                 /* Check for pwm5 */
3311                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
3312                 if (reg & BIT(6))
3313                         sio_data->skip_pwm |= BIT(4);
3314
3315                 /* Check for fan4, fan5 */
3316                 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
3317                 if (!(reg & BIT(5)))
3318                         sio_data->skip_fan |= BIT(3);
3319                 if (!(reg & BIT(4)))
3320                         sio_data->skip_fan |= BIT(4);
3321
3322                 /* Check for pwm3, fan3 */
3323                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3324                 if (reg & BIT(6))
3325                         sio_data->skip_pwm |= BIT(2);
3326                 if (reg & BIT(7))
3327                         sio_data->skip_fan |= BIT(2);
3328
3329                 /* Check for pwm4 */
3330                 reg = superio_inb(sioaddr, IT87_SIO_GPIO4_REG);
3331                 if (reg & BIT(2))
3332                         sio_data->skip_pwm |= BIT(3);
3333
3334                 /* Check for pwm2, fan2 */
3335                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3336                 if (reg & BIT(1))
3337                         sio_data->skip_pwm |= BIT(1);
3338                 if (reg & BIT(2))
3339                         sio_data->skip_fan |= BIT(1);
3340                 /* Check for pwm6, fan6 */
3341                 if (!(reg & BIT(7))) {
3342                         sio_data->skip_pwm |= BIT(5);
3343                         sio_data->skip_fan |= BIT(5);
3344                 }
3345
3346                 /* Check if AVCC is on VIN3 */
3347                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3348                 if (reg & BIT(0)) {
3349                         /* For it8686, the bit just enables AVCC3 */
3350                         if (sio_data->type != it8686)
3351                                 sio_data->internal |= BIT(0);
3352                 } else {
3353                         sio_data->internal &= ~BIT(3);
3354                         sio_data->skip_in |= BIT(9);
3355                 }
3356
3357                 sio_data->beep_pin = superio_inb(sioaddr,
3358                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3359         } else if (sio_data->type == it8622) {
3360                 int reg;
3361
3362                 superio_select(sioaddr, GPIO);
3363
3364                 /* Check for pwm4, fan4 */
3365                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
3366                 if (reg & BIT(6))
3367                         sio_data->skip_fan |= BIT(3);
3368                 if (reg & BIT(5))
3369                         sio_data->skip_pwm |= BIT(3);
3370
3371                 /* Check for pwm3, fan3, pwm5, fan5 */
3372                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3373                 if (reg & BIT(6))
3374                         sio_data->skip_pwm |= BIT(2);
3375                 if (reg & BIT(7))
3376                         sio_data->skip_fan |= BIT(2);
3377                 if (reg & BIT(3))
3378                         sio_data->skip_pwm |= BIT(4);
3379                 if (reg & BIT(1))
3380                         sio_data->skip_fan |= BIT(4);
3381
3382                 /* Check for pwm2, fan2 */
3383                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3384                 if (reg & BIT(1))
3385                         sio_data->skip_pwm |= BIT(1);
3386                 if (reg & BIT(2))
3387                         sio_data->skip_fan |= BIT(1);
3388
3389                 /* Check for AVCC */
3390                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3391                 if (!(reg & BIT(0)))
3392                         sio_data->skip_in |= BIT(9);
3393
3394                 sio_data->beep_pin = superio_inb(sioaddr,
3395                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3396         } else if (sio_data->type == it8732) {
3397                 int reg;
3398
3399                 superio_select(sioaddr, GPIO);
3400
3401                 /* Check for pwm2, fan2 */
3402                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3403                 if (reg & BIT(1))
3404                         sio_data->skip_pwm |= BIT(1);
3405                 if (reg & BIT(2))
3406                         sio_data->skip_fan |= BIT(1);
3407
3408                 /* Check for pwm3, fan3, fan4 */
3409                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3410                 if (reg & BIT(6))
3411                         sio_data->skip_pwm |= BIT(2);
3412                 if (reg & BIT(7))
3413                         sio_data->skip_fan |= BIT(2);
3414                 if (reg & BIT(5))
3415                         sio_data->skip_fan |= BIT(3);
3416
3417                 /* Check if AVCC is on VIN3 */
3418                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3419                 if (reg & BIT(0))
3420                         sio_data->internal |= BIT(0);
3421
3422                 sio_data->beep_pin = superio_inb(sioaddr,
3423                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3424         } else if (sio_data->type == it8655) {
3425                 int reg;
3426
3427                 superio_select(sioaddr, GPIO);
3428
3429                 /* Check for pwm2 */
3430                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3431                 if (reg & BIT(1))
3432                         sio_data->skip_pwm |= BIT(1);
3433
3434                 /* Check for fan2 */
3435                 reg = superio_inb(sioaddr, IT87_SIO_PINX4_REG);
3436                 if (reg & BIT(4))
3437                         sio_data->skip_fan |= BIT(1);
3438
3439                 /* Check for pwm3, fan3 */
3440                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3441                 if (reg & BIT(6))
3442                         sio_data->skip_pwm |= BIT(2);
3443                 if (reg & BIT(7))
3444                         sio_data->skip_fan |= BIT(2);
3445
3446                 sio_data->beep_pin = superio_inb(sioaddr,
3447                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3448         } else if (sio_data->type == it8665 || sio_data->type == it8625) {
3449                 int reg27, reg29, reg2d, regd3;
3450
3451                 superio_select(sioaddr, GPIO);
3452
3453                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3454                 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3455                 reg2d = superio_inb(sioaddr, IT87_SIO_PINX4_REG);
3456                 regd3 = superio_inb(sioaddr, IT87_SIO_GPIO9_REG);
3457
3458                 /* Check for pwm2, fan2 */
3459                 if (reg29 & BIT(1))
3460                         sio_data->skip_pwm |= BIT(1);
3461                 /*
3462                  * Note: Table 6-1 in datasheet claims that FAN_TAC2
3463                  * would be enabled with 29h[2]=0.
3464                  */
3465                 if (reg2d & BIT(4))
3466                         sio_data->skip_fan |= BIT(1);
3467
3468                 /* Check for pwm3, fan3 */
3469                 if (reg27 & BIT(6))
3470                         sio_data->skip_pwm |= BIT(2);
3471                 if (reg27 & BIT(7))
3472                         sio_data->skip_fan |= BIT(2);
3473
3474                 /* Check for pwm4, fan4, pwm5, fan5 */
3475                 if (sio_data->type == it8625) {
3476                         int reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
3477
3478                         if (reg25 & BIT(6))
3479                                 sio_data->skip_fan |= BIT(3);
3480                         if (reg25 & BIT(5))
3481                                 sio_data->skip_pwm |= BIT(3);
3482                         if (reg27 & BIT(3))
3483                                 sio_data->skip_pwm |= BIT(4);
3484                         if (reg27 & BIT(1))
3485                                 sio_data->skip_fan |= BIT(4);
3486                 } else {
3487                         int reg26 = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
3488
3489                         if (regd3 & BIT(2))
3490                                 sio_data->skip_pwm |= BIT(3);
3491                         if (regd3 & BIT(3))
3492                                 sio_data->skip_fan |= BIT(3);
3493                         if (reg26 & BIT(5))
3494                                 sio_data->skip_pwm |= BIT(4);
3495                         if (reg26 & BIT(4))
3496                                 sio_data->skip_fan |= BIT(4);
3497                 }
3498
3499                 /* Check for pwm6, fan6 */
3500                 if (regd3 & BIT(0))
3501                         sio_data->skip_pwm |= BIT(5);
3502                 if (regd3 & BIT(1))
3503                         sio_data->skip_fan |= BIT(5);
3504
3505                 sio_data->beep_pin = superio_inb(sioaddr,
3506                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3507         } else {
3508                 int reg;
3509                 bool uart6;
3510
3511                 superio_select(sioaddr, GPIO);
3512
3513                 /* Check for fan4, fan5 */
3514                 if (has_five_fans(config)) {
3515                         reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
3516                         switch (sio_data->type) {
3517                         case it8718:
3518                                 if (reg & BIT(5))
3519                                         sio_data->skip_fan |= BIT(3);
3520                                 if (reg & BIT(4))
3521                                         sio_data->skip_fan |= BIT(4);
3522                                 break;
3523                         case it8720:
3524                         case it8721:
3525                         case it8728:
3526                                 if (!(reg & BIT(5)))
3527                                         sio_data->skip_fan |= BIT(3);
3528                                 if (!(reg & BIT(4)))
3529                                         sio_data->skip_fan |= BIT(4);
3530                                 break;
3531                         default:
3532                                 break;
3533                         }
3534                 }
3535
3536                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3537                 if (!sio_data->skip_vid) {
3538                         /* We need at least 4 VID pins */
3539                         if (reg & 0x0f) {
3540                                 pr_info("VID is disabled (pins used for GPIO)\n");
3541                                 sio_data->skip_vid = 1;
3542                         }
3543                 }
3544
3545                 /* Check if fan3 is there or not */
3546                 if (reg & BIT(6))
3547                         sio_data->skip_pwm |= BIT(2);
3548                 if (reg & BIT(7))
3549                         sio_data->skip_fan |= BIT(2);
3550
3551                 /* Check if fan2 is there or not */
3552                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3553                 if (reg & BIT(1))
3554                         sio_data->skip_pwm |= BIT(1);
3555                 if (reg & BIT(2))
3556                         sio_data->skip_fan |= BIT(1);
3557
3558                 if ((sio_data->type == it8718 || sio_data->type == it8720) &&
3559                     !(sio_data->skip_vid))
3560                         sio_data->vid_value = superio_inb(sioaddr,
3561                                                           IT87_SIO_VID_REG);
3562
3563                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3564
3565                 uart6 = sio_data->type == it8782 && (reg & BIT(2));
3566
3567                 /*
3568                  * The IT8720F has no VIN7 pin, so VCCH should always be
3569                  * routed internally to VIN7 with an internal divider.
3570                  * Curiously, there still is a configuration bit to control
3571                  * this, which means it can be set incorrectly. And even
3572                  * more curiously, many boards out there are improperly
3573                  * configured, even though the IT8720F datasheet claims
3574                  * that the internal routing of VCCH to VIN7 is the default
3575                  * setting. So we force the internal routing in this case.
3576                  *
3577                  * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
3578                  * If UART6 is enabled, re-route VIN7 to the internal divider
3579                  * if that is not already the case.
3580                  */
3581                 if ((sio_data->type == it8720 || uart6) && !(reg & BIT(1))) {
3582                         reg |= BIT(1);
3583                         superio_outb(sioaddr, IT87_SIO_PINX2_REG, reg);
3584                         pr_notice("Routing internal VCCH to in7\n");
3585                 }
3586                 if (reg & BIT(0))
3587                         sio_data->internal |= BIT(0);
3588                 if (reg & BIT(1))
3589                         sio_data->internal |= BIT(1);
3590
3591                 /*
3592                  * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
3593                  * While VIN7 can be routed to the internal voltage divider,
3594                  * VIN5 and VIN6 are not available if UART6 is enabled.
3595                  *
3596                  * Also, temp3 is not available if UART6 is enabled and TEMPIN3
3597                  * is the temperature source. Since we can not read the
3598                  * temperature source here, skip_temp is preliminary.
3599                  */
3600                 if (uart6) {
3601                         sio_data->skip_in |= BIT(5) | BIT(6);
3602                         sio_data->skip_temp |= BIT(2);
3603                 }
3604
3605                 sio_data->beep_pin = superio_inb(sioaddr,
3606                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3607         }
3608         if (sio_data->beep_pin)
3609                 pr_info("Beeping is supported\n");
3610
3611         if (config->smbus_bitmap && !base) {
3612                 u8 reg;
3613
3614                 superio_select(sioaddr, PME);
3615                 reg = superio_inb(sioaddr, IT87_SPECIAL_CFG_REG);
3616                 sio_data->ec_special_config = reg;
3617                 sio_data->smbus_bitmap = reg & config->smbus_bitmap;
3618         }
3619
3620 exit:
3621         superio_exit(sioaddr, doexit);
3622         return err;
3623 }
3624
3625 static void it87_init_regs(struct platform_device *pdev)
3626 {
3627         struct it87_data *data = platform_get_drvdata(pdev);
3628
3629         /* Initialize chip specific register pointers */
3630         switch (data->type) {
3631         case it8628:
3632         case it8686:
3633                 data->REG_FAN = IT87_REG_FAN;
3634                 data->REG_FANX = IT87_REG_FANX;
3635                 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3636                 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3637                 data->REG_PWM = IT87_REG_PWM;
3638                 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET_8686;
3639                 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW_8686;
3640                 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH_8686;
3641                 break;
3642         case it8625:
3643         case it8655:
3644         case it8665:
3645                 data->REG_FAN = IT87_REG_FAN_8665;
3646                 data->REG_FANX = IT87_REG_FANX_8665;
3647                 data->REG_FAN_MIN = IT87_REG_FAN_MIN_8665;
3648                 data->REG_FANX_MIN = IT87_REG_FANX_MIN_8665;
3649                 data->REG_PWM = IT87_REG_PWM_8665;
3650                 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
3651                 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
3652                 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
3653                 break;
3654         case it8622:
3655                 data->REG_FAN = IT87_REG_FAN;
3656                 data->REG_FANX = IT87_REG_FANX;
3657                 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3658                 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3659                 data->REG_PWM = IT87_REG_PWM_8665;
3660                 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
3661                 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
3662                 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
3663                 break;
3664         case it8613:
3665                 data->REG_FAN = IT87_REG_FAN;
3666                 data->REG_FANX = IT87_REG_FANX;
3667                 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3668                 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3669                 data->REG_PWM = IT87_REG_PWM_8665;
3670                 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
3671                 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
3672                 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
3673                 break;
3674         default:
3675                 data->REG_FAN = IT87_REG_FAN;
3676                 data->REG_FANX = IT87_REG_FANX;
3677                 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3678                 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3679                 data->REG_PWM = IT87_REG_PWM;
3680                 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
3681                 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
3682                 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
3683                 break;
3684         }
3685
3686         if (data->mmio) {
3687                 data->read = it87_mmio_read;
3688                 data->write = it87_mmio_write;
3689         } else if (has_bank_sel(data)) {
3690                 data->read = it87_io_read;
3691                 data->write = it87_io_write;
3692         } else {
3693                 data->read = _it87_io_read;
3694                 data->write = _it87_io_write;
3695         }
3696 }
3697
3698 /* Called when we have found a new IT87. */
3699 static void it87_init_device(struct platform_device *pdev)
3700 {
3701         struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
3702         struct it87_data *data = platform_get_drvdata(pdev);
3703         int tmp, i;
3704         u8 mask;
3705
3706         if (has_new_tempmap(data)) {
3707                 data->pwm_temp_map_shift = 3;
3708                 data->pwm_temp_map_mask = 0x07;
3709         } else {
3710                 data->pwm_temp_map_shift = 0;
3711                 data->pwm_temp_map_mask = 0x03;
3712         }
3713
3714         /*
3715          * For each PWM channel:
3716          * - If it is in automatic mode, setting to manual mode should set
3717          *   the fan to full speed by default.
3718          * - If it is in manual mode, we need a mapping to temperature
3719          *   channels to use when later setting to automatic mode later.
3720          *   Map to the first sensor by default (we are clueless.)
3721          * In both cases, the value can (and should) be changed by the user
3722          * prior to switching to a different mode.
3723          * Note that this is no longer needed for the IT8721F and later, as
3724          * these have separate registers for the temperature mapping and the
3725          * manual duty cycle.
3726          */
3727         for (i = 0; i < NUM_AUTO_PWM; i++) {
3728                 data->pwm_temp_map[i] = 0;
3729                 data->pwm_duty[i] = 0x7f;       /* Full speed */
3730                 data->auto_pwm[i][3] = 0x7f;    /* Full speed, hard-coded */
3731         }
3732
3733         /*
3734          * Some chips seem to have default value 0xff for all limit
3735          * registers. For low voltage limits it makes no sense and triggers
3736          * alarms, so change to 0 instead. For high temperature limits, it
3737          * means -1 degree C, which surprisingly doesn't trigger an alarm,
3738          * but is still confusing, so change to 127 degrees C.
3739          */
3740         for (i = 0; i < NUM_VIN_LIMIT; i++) {
3741                 tmp = data->read(data, IT87_REG_VIN_MIN(i));
3742                 if (tmp == 0xff)
3743                         data->write(data, IT87_REG_VIN_MIN(i), 0);
3744         }
3745         for (i = 0; i < data->num_temp_limit; i++) {
3746                 tmp = data->read(data, data->REG_TEMP_HIGH[i]);
3747                 if (tmp == 0xff)
3748                         data->write(data, data->REG_TEMP_HIGH[i], 127);
3749         }
3750
3751         /*
3752          * Temperature channels are not forcibly enabled, as they can be
3753          * set to two different sensor types and we can't guess which one
3754          * is correct for a given system. These channels can be enabled at
3755          * run-time through the temp{1-3}_type sysfs accessors if needed.
3756          */
3757
3758         /* Check if voltage monitors are reset manually or by some reason */
3759         tmp = data->read(data, IT87_REG_VIN_ENABLE);
3760         if ((tmp & 0xff) == 0) {
3761                 /* Enable all voltage monitors */
3762                 data->write(data, IT87_REG_VIN_ENABLE, 0xff);
3763         }
3764
3765         /* Check if tachometers are reset manually or by some reason */
3766         mask = 0x70 & ~(sio_data->skip_fan << 4);
3767         data->fan_main_ctrl = data->read(data, IT87_REG_FAN_MAIN_CTRL);
3768         if ((data->fan_main_ctrl & mask) == 0) {
3769                 /* Enable all fan tachometers */
3770                 data->fan_main_ctrl |= mask;
3771                 data->write(data, IT87_REG_FAN_MAIN_CTRL, data->fan_main_ctrl);
3772         }
3773         data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
3774
3775         tmp = data->read(data, IT87_REG_FAN_16BIT);
3776
3777         /* Set tachometers to 16-bit mode if needed */
3778         if (has_fan16_config(data)) {
3779                 if (~tmp & 0x07 & data->has_fan) {
3780                         dev_dbg(&pdev->dev,
3781                                 "Setting fan1-3 to 16-bit mode\n");
3782                         data->write(data, IT87_REG_FAN_16BIT, tmp | 0x07);
3783                 }
3784         }
3785
3786         /* Check for additional fans */
3787         if (has_four_fans(data) && (tmp & BIT(4)))
3788                 data->has_fan |= BIT(3); /* fan4 enabled */
3789         if (has_five_fans(data) && (tmp & BIT(5)))
3790                 data->has_fan |= BIT(4); /* fan5 enabled */
3791         if (has_six_fans(data)) {
3792                 switch (data->type) {
3793                 case it8620:
3794                 case it8628:
3795                 case it8686:
3796                         if (tmp & BIT(2))
3797                                 data->has_fan |= BIT(5); /* fan6 enabled */
3798                         break;
3799                 case it8625:
3800                 case it8665:
3801                         tmp = data->read(data, IT87_REG_FAN_DIV);
3802                         if (tmp & BIT(3))
3803                                 data->has_fan |= BIT(5); /* fan6 enabled */
3804                         break;
3805                 default:
3806                         break;
3807                 }
3808         }
3809
3810         /* Fan input pins may be used for alternative functions */
3811         data->has_fan &= ~sio_data->skip_fan;
3812
3813         /* Check if pwm6 is enabled */
3814         if (has_six_pwm(data)) {
3815                 switch (data->type) {
3816                 case it8620:
3817                 case it8686:
3818                         tmp = data->read(data, IT87_REG_FAN_DIV);
3819                         if (!(tmp & BIT(3)))
3820                                 sio_data->skip_pwm |= BIT(5);
3821                         break;
3822                 default:
3823                         break;
3824                 }
3825         }
3826
3827         if (has_bank_sel(data)) {
3828                 for (i = 0; i < 3; i++)
3829                         data->temp_src[i] =
3830                                 data->read(data, IT87_REG_TEMP_SRC1[i]);
3831                 data->temp_src[3] = data->read(data, IT87_REG_TEMP_SRC2);
3832         }
3833
3834         /* Start monitoring */
3835         data->write(data, IT87_REG_CONFIG,
3836                     (data->read(data, IT87_REG_CONFIG) & 0x3e) |
3837                                         (update_vbat ? 0x41 : 0x01));
3838 }
3839
3840 /* Return 1 if and only if the PWM interface is safe to use */
3841 static int it87_check_pwm(struct device *dev)
3842 {
3843         struct it87_data *data = dev_get_drvdata(dev);
3844         /*
3845          * Some BIOSes fail to correctly configure the IT87 fans. All fans off
3846          * and polarity set to active low is sign that this is the case so we
3847          * disable pwm control to protect the user.
3848          */
3849         int tmp = data->read(data, IT87_REG_FAN_CTL);
3850
3851         if ((tmp & 0x87) == 0) {
3852                 if (fix_pwm_polarity) {
3853                         /*
3854                          * The user asks us to attempt a chip reconfiguration.
3855                          * This means switching to active high polarity and
3856                          * inverting all fan speed values.
3857                          */
3858                         int i;
3859                         u8 pwm[3];
3860
3861                         for (i = 0; i < ARRAY_SIZE(pwm); i++)
3862                                 pwm[i] = data->read(data,
3863                                                          data->REG_PWM[i]);
3864
3865                         /*
3866                          * If any fan is in automatic pwm mode, the polarity
3867                          * might be correct, as suspicious as it seems, so we
3868                          * better don't change anything (but still disable the
3869                          * PWM interface).
3870                          */
3871                         if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
3872                                 dev_info(dev,
3873                                          "Reconfiguring PWM to active high polarity\n");
3874                                 data->write(data, IT87_REG_FAN_CTL, tmp | 0x87);
3875                                 for (i = 0; i < 3; i++)
3876                                         data->write(data, data->REG_PWM[i],
3877                                                     0x7f & ~pwm[i]);
3878                                 return 1;
3879                         }
3880
3881                         dev_info(dev,
3882                                  "PWM configuration is too broken to be fixed\n");
3883                 }
3884
3885                 dev_info(dev,
3886                          "Detected broken BIOS defaults, disabling PWM interface\n");
3887                 return 0;
3888         } else if (fix_pwm_polarity) {
3889                 dev_info(dev,
3890                          "PWM configuration looks sane, won't touch\n");
3891         }
3892
3893         return 1;
3894 }
3895
3896 static int it87_probe(struct platform_device *pdev)
3897 {
3898         struct it87_data *data;
3899         struct resource *res;
3900         struct device *dev = &pdev->dev;
3901         struct it87_sio_data *sio_data = dev_get_platdata(dev);
3902         int enable_pwm_interface;
3903         struct device *hwmon_dev;
3904         int err;
3905
3906         data = devm_kzalloc(dev, sizeof(struct it87_data), GFP_KERNEL);
3907         if (!data)
3908                 return -ENOMEM;
3909
3910         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3911         if (res) {
3912                 if (!devm_request_region(dev, res->start, IT87_EC_EXTENT,
3913                                          DRVNAME)) {
3914                         dev_err(dev, "Failed to request region %pR\n", res);
3915                         return -EBUSY;
3916                 }
3917         } else {
3918                 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
3919                 data->mmio = devm_ioremap_resource(dev, res);
3920                 if (IS_ERR(data->mmio))
3921                         return PTR_ERR(data->mmio);
3922         }
3923
3924         data->addr = res->start;
3925         data->type = sio_data->type;
3926         data->sioaddr = sio_data->sioaddr;
3927         data->smbus_bitmap = sio_data->smbus_bitmap;
3928         data->ec_special_config = sio_data->ec_special_config;
3929         data->doexit = sio_data->doexit;
3930         data->features = it87_devices[sio_data->type].features;
3931         data->num_temp_limit = it87_devices[sio_data->type].num_temp_limit;
3932         data->num_temp_offset = it87_devices[sio_data->type].num_temp_offset;
3933         data->pwm_num_temp_map = it87_devices[sio_data->type].num_temp_map;
3934         data->peci_mask = it87_devices[sio_data->type].peci_mask;
3935         data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
3936
3937         /*
3938          * IT8705F Datasheet 0.4.1, 3h == Version G.
3939          * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
3940          * These are the first revisions with 16-bit tachometer support.
3941          */
3942         switch (data->type) {
3943         case it87:
3944                 if (sio_data->revision >= 0x03) {
3945                         data->features &= ~FEAT_OLD_AUTOPWM;
3946                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS;
3947                 }
3948                 break;
3949         case it8712:
3950                 if (sio_data->revision >= 0x08) {
3951                         data->features &= ~FEAT_OLD_AUTOPWM;
3952                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS |
3953                                           FEAT_FIVE_FANS;
3954                 }
3955                 break;
3956         default:
3957                 break;
3958         }
3959
3960         platform_set_drvdata(pdev, data);
3961
3962         mutex_init(&data->update_lock);
3963
3964         /* Initialize register pointers */
3965         it87_init_regs(pdev);
3966
3967         err = smbus_disable(data);
3968         if (err)
3969                 return err;
3970
3971         /* Now, we do the remaining detection. */
3972         if ((data->read(data, IT87_REG_CONFIG) & 0x80) ||
3973             data->read(data, IT87_REG_CHIPID) != 0x90) {
3974                 smbus_enable(data);
3975                 return -ENODEV;
3976         }
3977
3978         /* Check PWM configuration */
3979         enable_pwm_interface = it87_check_pwm(dev);
3980
3981         /* Starting with IT8721F, we handle scaling of internal voltages */
3982         if (has_scaling(data)) {
3983                 if (sio_data->internal & BIT(0))
3984                         data->in_scaled |= BIT(3);      /* in3 is AVCC */
3985                 if (sio_data->internal & BIT(1))
3986                         data->in_scaled |= BIT(7);      /* in7 is VSB */
3987                 if (sio_data->internal & BIT(2))
3988                         data->in_scaled |= BIT(8);      /* in8 is Vbat */
3989                 if (sio_data->internal & BIT(3))
3990                         data->in_scaled |= BIT(9);      /* in9 is AVCC */
3991         } else if (sio_data->type == it8781 || sio_data->type == it8782 ||
3992                    sio_data->type == it8783) {
3993                 if (sio_data->internal & BIT(0))
3994                         data->in_scaled |= BIT(3);      /* in3 is VCC5V */
3995                 if (sio_data->internal & BIT(1))
3996                         data->in_scaled |= BIT(7);      /* in7 is VCCH5V */
3997         }
3998
3999         data->has_temp = 0x07;
4000         if (sio_data->skip_temp & BIT(2)) {
4001                 if (sio_data->type == it8782 &&
4002                     !(data->read(data, IT87_REG_TEMP_EXTRA) & 0x80))
4003                         data->has_temp &= ~BIT(2);
4004         }
4005
4006         data->in_internal = sio_data->internal;
4007         data->has_in = 0x3ff & ~sio_data->skip_in;
4008
4009         if (has_six_temp(data)) {
4010                 u8 reg = data->read(data, IT87_REG_TEMP456_ENABLE);
4011
4012                 /* Check for additional temperature sensors */
4013                 if ((reg & 0x03) >= 0x02)
4014                         data->has_temp |= BIT(3);
4015                 if (((reg >> 2) & 0x03) >= 0x02)
4016                         data->has_temp |= BIT(4);
4017                 if (((reg >> 4) & 0x03) >= 0x02)
4018                         data->has_temp |= BIT(5);
4019
4020                 /* Check for additional voltage sensors */
4021                 if ((reg & 0x03) == 0x01)
4022                         data->has_in |= BIT(10);
4023                 if (((reg >> 2) & 0x03) == 0x01)
4024                         data->has_in |= BIT(11);
4025                 if (((reg >> 4) & 0x03) == 0x01)
4026                         data->has_in |= BIT(12);
4027         }
4028
4029         data->has_beep = !!sio_data->beep_pin;
4030
4031         /* Initialize the IT87 chip */
4032         it87_init_device(pdev);
4033
4034         smbus_enable(data);
4035
4036         if (!sio_data->skip_vid) {
4037                 data->has_vid = true;
4038                 data->vrm = vid_which_vrm();
4039                 /* VID reading from Super-I/O config space if available */
4040                 data->vid = sio_data->vid_value;
4041         }
4042
4043         /* Prepare for sysfs hooks */
4044         data->groups[0] = &it87_group;
4045         data->groups[1] = &it87_group_in;
4046         data->groups[2] = &it87_group_temp;
4047         data->groups[3] = &it87_group_fan;
4048
4049         if (enable_pwm_interface) {
4050                 data->has_pwm = BIT(ARRAY_SIZE(IT87_REG_PWM)) - 1;
4051                 data->has_pwm &= ~sio_data->skip_pwm;
4052
4053                 data->groups[4] = &it87_group_pwm;
4054                 if (has_old_autopwm(data) || has_newer_autopwm(data))
4055                         data->groups[5] = &it87_group_auto_pwm;
4056         }
4057
4058         hwmon_dev = devm_hwmon_device_register_with_groups(dev,
4059                                         it87_devices[sio_data->type].name,
4060                                         data, data->groups);
4061         return PTR_ERR_OR_ZERO(hwmon_dev);
4062 }
4063
4064 static struct platform_driver it87_driver = {
4065         .driver = {
4066                 .name   = DRVNAME,
4067         },
4068         .probe  = it87_probe,
4069 };
4070
4071 static int __init it87_device_add(int index, unsigned short sio_address,
4072                                   phys_addr_t mmio_address,
4073                                   const struct it87_sio_data *sio_data)
4074 {
4075         struct platform_device *pdev;
4076         struct resource res = {
4077                 .name   = DRVNAME,
4078         };
4079         int err;
4080
4081         if (mmio_address) {
4082                 res.start = mmio_address;
4083                 res.end = mmio_address + 0x400 - 1;
4084                 res.flags = IORESOURCE_MEM;
4085         } else {
4086                 res.start = sio_address + IT87_EC_OFFSET;
4087                 res.end = sio_address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1;
4088                 res.flags = IORESOURCE_IO;
4089         }
4090
4091         err = acpi_check_resource_conflict(&res);
4092         if (err) {
4093                 if (!ignore_resource_conflict)
4094                         return err;
4095         }
4096
4097         pdev = platform_device_alloc(DRVNAME, sio_address);
4098         if (!pdev)
4099                 return -ENOMEM;
4100
4101         err = platform_device_add_resources(pdev, &res, 1);
4102         if (err) {
4103                 pr_err("Device resource addition failed (%d)\n", err);
4104                 goto exit_device_put;
4105         }
4106
4107         err = platform_device_add_data(pdev, sio_data,
4108                                        sizeof(struct it87_sio_data));
4109         if (err) {
4110                 pr_err("Platform data allocation failed\n");
4111                 goto exit_device_put;
4112         }
4113
4114         err = platform_device_add(pdev);
4115         if (err) {
4116                 pr_err("Device addition failed (%d)\n", err);
4117                 goto exit_device_put;
4118         }
4119
4120         it87_pdev[index] = pdev;
4121         return 0;
4122
4123 exit_device_put:
4124         platform_device_put(pdev);
4125         return err;
4126 }
4127
4128 struct it87_dmi_data {
4129         bool sio2_force_config; /* force sio2 into configuration mode   */
4130         u8 skip_pwm;            /* pwm channels to skip for this board  */
4131 };
4132
4133 /*
4134  * On various Gigabyte AM4 boards (AB350, AX370), the second Super-IO chip
4135  * (IT8792E) needs to be in configuration mode before accessing the first
4136  * due to a bug in IT8792E which otherwise results in LPC bus access errors.
4137  * This needs to be done before accessing the first Super-IO chip since
4138  * the second chip may have been accessed prior to loading this driver.
4139  *
4140  * The problem is also reported to affect IT8795E, which is used on X299 boards
4141  * and has the same chip ID as IT8792E (0x8733). It also appears to affect
4142  * systems with IT8790E, which is used on some Z97X-Gaming boards as well as
4143  * Z87X-OC.
4144  * DMI entries for those systems will be added as they become available and
4145  * as the problem is confirmed to affect those boards.
4146  */
4147 static struct it87_dmi_data gigabyte_sio2_force = {
4148         .sio2_force_config = true,
4149 };
4150
4151 /*
4152  * On the Shuttle SN68PT, FAN_CTL2 is apparently not
4153  * connected to a fan, but to something else. One user
4154  * has reported instant system power-off when changing
4155  * the PWM2 duty cycle, so we disable it.
4156  * I use the board name string as the trigger in case
4157  * the same board is ever used in other systems.
4158  */
4159 static struct it87_dmi_data nvidia_fn68pt = {
4160         .skip_pwm = BIT(1),
4161 };
4162
4163 static const struct dmi_system_id it87_dmi_table[] __initconst = {
4164         {
4165                 .matches = {
4166                         DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."),
4167                         DMI_MATCH(DMI_BOARD_NAME, "AB350"),
4168                 },
4169                 .driver_data = &gigabyte_sio2_force,
4170         },
4171         {
4172                 .matches = {
4173                         DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."),
4174                         DMI_MATCH(DMI_BOARD_NAME, "AX370"),
4175                 },
4176                 .driver_data = &gigabyte_sio2_force,
4177         },
4178         {
4179                 .matches = {
4180                         DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."),
4181                         DMI_MATCH(DMI_BOARD_NAME, "Z97X-Gaming G1"),
4182                 },
4183                 .driver_data = &gigabyte_sio2_force,
4184         },
4185         {
4186                 .matches = {
4187                         DMI_MATCH(DMI_BOARD_VENDOR, "nVIDIA"),
4188                         DMI_MATCH(DMI_BOARD_NAME, "FN68PT"),
4189                 },
4190                 .driver_data = &nvidia_fn68pt,
4191         },
4192         { }
4193 };
4194
4195 static int __init sm_it87_init(void)
4196 {
4197         const struct dmi_system_id *dmi = dmi_first_match(it87_dmi_table);
4198         struct it87_dmi_data *dmi_data = NULL;
4199         int sioaddr[2] = { REG_2E, REG_4E };
4200         struct it87_sio_data sio_data;
4201         unsigned short isa_address;
4202         phys_addr_t mmio_address;
4203         bool found = false;
4204         int i, err;
4205
4206         pr_info("it87 driver version %s\n", IT87_DRIVER_VERSION);
4207
4208         if (dmi)
4209                 dmi_data = dmi->driver_data;
4210
4211         err = platform_driver_register(&it87_driver);
4212         if (err)
4213                 return err;
4214
4215         if (dmi_data && dmi_data->sio2_force_config)
4216                 __superio_enter(REG_4E);
4217
4218         for (i = 0; i < ARRAY_SIZE(sioaddr); i++) {
4219                 memset(&sio_data, 0, sizeof(struct it87_sio_data));
4220                 isa_address = 0;
4221                 mmio_address = 0;
4222                 err = it87_find(sioaddr[i], &isa_address, &mmio_address,
4223                                 &sio_data);
4224                 if (err || isa_address == 0)
4225                         continue;
4226
4227                 if (dmi_data)
4228                         sio_data.skip_pwm |= dmi_data->skip_pwm;
4229                 err = it87_device_add(i, isa_address, mmio_address, &sio_data);
4230                 if (err)
4231                         goto exit_dev_unregister;
4232                 found = true;
4233         }
4234
4235         if (!found) {
4236                 err = -ENODEV;
4237                 goto exit_unregister;
4238         }
4239         return 0;
4240
4241 exit_dev_unregister:
4242         /* NULL check handled by platform_device_unregister */
4243         platform_device_unregister(it87_pdev[0]);
4244 exit_unregister:
4245         platform_driver_unregister(&it87_driver);
4246         return err;
4247 }
4248
4249 static void __exit sm_it87_exit(void)
4250 {
4251         /* NULL check handled by platform_device_unregister */
4252         platform_device_unregister(it87_pdev[1]);
4253         platform_device_unregister(it87_pdev[0]);
4254         platform_driver_unregister(&it87_driver);
4255 }
4256
4257 MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>");
4258 MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
4259 module_param(update_vbat, bool, 0);
4260 MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
4261 module_param(fix_pwm_polarity, bool, 0);
4262 MODULE_PARM_DESC(fix_pwm_polarity,
4263                  "Force PWM polarity to active high (DANGEROUS)");
4264 MODULE_LICENSE("GPL");
4265
4266 module_init(sm_it87_init);
4267 module_exit(sm_it87_exit);