git.sur5r.net Git - groeck-it87/blob - it87.c

   1 /*
   2  *  it87.c - Part of lm_sensors, Linux kernel modules for hardware
   3  *           monitoring.
   4  *
   5  *  The IT8705F is an LPC-based Super I/O part that contains UARTs, a
   6  *  parallel port, an IR port, a MIDI port, a floppy controller, etc., in
   7  *  addition to an Environment Controller (Enhanced Hardware Monitor and
   8  *  Fan Controller)
   9  *
  10  *  This driver supports only the Environment Controller in the IT8705F and
  11  *  similar parts.  The other devices are supported by different drivers.
  12  *
  13  *  Supports: IT8603E  Super I/O chip w/LPC interface
  14  *            IT8607E  Super I/O chip w/LPC interface
  15  *            IT8613E  Super I/O chip w/LPC interface
  16  *            IT8620E  Super I/O chip w/LPC interface
  17  *            IT8622E  Super I/O chip w/LPC interface
  18  *            IT8623E  Super I/O chip w/LPC interface
  19  *            IT8628E  Super I/O chip w/LPC interface
  20  *            IT8655E  Super I/O chip w/LPC interface
  21  *            IT8665E  Super I/O chip w/LPC interface
  22  *            IT8686E  Super I/O chip w/LPC interface
  23  *            IT8705F  Super I/O chip w/LPC interface
  24  *            IT8712F  Super I/O chip w/LPC interface
  25  *            IT8716F  Super I/O chip w/LPC interface
  26  *            IT8718F  Super I/O chip w/LPC interface
  27  *            IT8720F  Super I/O chip w/LPC interface
  28  *            IT8721F  Super I/O chip w/LPC interface
  29  *            IT8726F  Super I/O chip w/LPC interface
  30  *            IT8728F  Super I/O chip w/LPC interface
  31  *            IT8732F  Super I/O chip w/LPC interface
  32  *            IT8758E  Super I/O chip w/LPC interface
  33  *            IT8771E  Super I/O chip w/LPC interface
  34  *            IT8772E  Super I/O chip w/LPC interface
  35  *            IT8781F  Super I/O chip w/LPC interface
  36  *            IT8782F  Super I/O chip w/LPC interface
  37  *            IT8783E/F Super I/O chip w/LPC interface
  38  *            IT8786E  Super I/O chip w/LPC interface
  39  *            IT8790E  Super I/O chip w/LPC interface
  40  *            IT8792E  Super I/O chip w/LPC interface
  41  *            Sis950   A clone of the IT8705F
  42  *
  43  *  Copyright (C) 2001 Chris Gauthron
  44  *  Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de>
  45  *
  46  *  This program is free software; you can redistribute it and/or modify
  47  *  it under the terms of the GNU General Public License as published by
  48  *  the Free Software Foundation; either version 2 of the License, or
  49  *  (at your option) any later version.
  50  *
  51  *  This program is distributed in the hope that it will be useful,
  52  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  53  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  54  *  GNU General Public License for more details.
  55  */
  56
  57 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  58
  59 #include <linux/bitops.h>
  60 #include <linux/module.h>
  61 #include <linux/init.h>
  62 #include <linux/slab.h>
  63 #include <linux/jiffies.h>
  64 #include <linux/platform_device.h>
  65 #include <linux/hwmon.h>
  66 #include <linux/hwmon-sysfs.h>
  67 #include <linux/hwmon-vid.h>
  68 #include <linux/err.h>
  69 #include <linux/mutex.h>
  70 #include <linux/sysfs.h>
  71 #include <linux/string.h>
  72 #include <linux/dmi.h>
  73 #include <linux/acpi.h>
  74 #include <linux/io.h>
  75 #include "compat.h"
  76
  77 #define DRVNAME "it87"
  78
  79 /* Necessary API not (yet) exported in upstream kernel */
  80 /* #define __IT87_USE_ACPI_MUTEX */
  81
  82 enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732,
  83              it8771, it8772, it8781, it8782, it8783, it8786, it8790,
  84              it8792, it8603, it8607, it8613, it8620, it8622, it8628, it8655,
  85              it8665, it8686 };
  86
  87 static unsigned short force_id;
  88 module_param(force_id, ushort, 0);
  89 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  90
  91 static struct platform_device *it87_pdev[2];
  92 static bool it87_sio4e_broken;
  93 #ifdef __IT87_USE_ACPI_MUTEX
  94 static acpi_handle it87_acpi_sio_handle;
  95 static char *it87_acpi_sio_mutex;
  96 #endif
  97
  98 #define REG_2E  0x2e    /* The register to read/write */
  99 #define REG_4E  0x4e    /* Secondary register to read/write */
 100
 101 #define DEV     0x07    /* Register: Logical device select */
 102 #define PME     0x04    /* The device with the fan registers in it */
 103
 104 /* The device with the IT8718F/IT8720F VID value in it */
 105 #define GPIO    0x07
 106
 107 #define DEVID   0x20    /* Register: Device ID */
 108 #define DEVREV  0x22    /* Register: Device Revision */
 109
 110 static inline void __superio_enter(int ioreg)
 111 {
 112         outb(0x87, ioreg);
 113         outb(0x01, ioreg);
 114         outb(0x55, ioreg);
 115         outb(ioreg == REG_4E ? 0xaa : 0x55, ioreg);
 116 }
 117
 118 static inline int superio_inb(int ioreg, int reg)
 119 {
 120         int val;
 121
 122         outb(reg, ioreg);
 123         val = inb(ioreg + 1);
 124         if (it87_sio4e_broken && ioreg == 0x4e && val == 0xff) {
 125                 __superio_enter(ioreg);
 126                 outb(reg, ioreg);
 127                 val = inb(ioreg + 1);
 128                 pr_warn("Retry access 0x4e:0x%x -> 0x%x\n", reg, val);
 129         }
 130
 131         return val;
 132 }
 133
 134 static inline void superio_outb(int ioreg, int reg, int val)
 135 {
 136         outb(reg, ioreg);
 137         outb(val, ioreg + 1);
 138 }
 139
 140 static int superio_inw(int ioreg, int reg)
 141 {
 142         return (superio_inb(ioreg, reg) << 8) | superio_inb(ioreg, reg + 1);
 143 }
 144
 145 static inline void superio_select(int ioreg, int ldn)
 146 {
 147         outb(DEV, ioreg);
 148         outb(ldn, ioreg + 1);
 149 }
 150
 151 static inline int superio_enter(int ioreg)
 152 {
 153 #ifdef __IT87_USE_ACPI_MUTEX
 154         if (it87_acpi_sio_mutex) {
 155                 acpi_status status;
 156
 157                 status = acpi_acquire_mutex(NULL, it87_acpi_sio_mutex, 0x10);
 158                 if (ACPI_FAILURE(status)) {
 159                         pr_err("Failed to acquire ACPI mutex\n");
 160                         return -EBUSY;
 161                 }
 162         }
 163 #endif
 164         /*
 165          * Try to reserve ioreg and ioreg + 1 for exclusive access.
 166          */
 167         if (!request_muxed_region(ioreg, 2, DRVNAME))
 168                 goto error;
 169
 170         __superio_enter(ioreg);
 171         return 0;
 172
 173 error:
 174 #ifdef __IT87_USE_ACPI_MUTEX
 175         if (it87_acpi_sio_mutex)
 176                 acpi_release_mutex(it87_acpi_sio_handle, NULL);
 177 #endif
 178         return -EBUSY;
 179 }
 180
 181 static inline void superio_exit(int ioreg)
 182 {
 183         if (!it87_sio4e_broken || ioreg != 0x4e) {
 184                 outb(0x02, ioreg);
 185                 outb(0x02, ioreg + 1);
 186         }
 187         release_region(ioreg, 2);
 188 #ifdef __IT87_USE_ACPI_MUTEX
 189         if (it87_acpi_sio_mutex)
 190                 acpi_release_mutex(it87_acpi_sio_handle, NULL);
 191 #endif
 192 }
 193
 194 /* Logical device 4 registers */
 195 #define IT8712F_DEVID 0x8712
 196 #define IT8705F_DEVID 0x8705
 197 #define IT8716F_DEVID 0x8716
 198 #define IT8718F_DEVID 0x8718
 199 #define IT8720F_DEVID 0x8720
 200 #define IT8721F_DEVID 0x8721
 201 #define IT8726F_DEVID 0x8726
 202 #define IT8728F_DEVID 0x8728
 203 #define IT8732F_DEVID 0x8732
 204 #define IT8792E_DEVID 0x8733
 205 #define IT8771E_DEVID 0x8771
 206 #define IT8772E_DEVID 0x8772
 207 #define IT8781F_DEVID 0x8781
 208 #define IT8782F_DEVID 0x8782
 209 #define IT8783E_DEVID 0x8783
 210 #define IT8786E_DEVID 0x8786
 211 #define IT8790E_DEVID 0x8790
 212 #define IT8603E_DEVID 0x8603
 213 #define IT8607E_DEVID 0x8607
 214 #define IT8613E_DEVID 0x8613
 215 #define IT8620E_DEVID 0x8620
 216 #define IT8622E_DEVID 0x8622
 217 #define IT8623E_DEVID 0x8623
 218 #define IT8628E_DEVID 0x8628
 219 #define IT8655E_DEVID 0x8655
 220 #define IT8665E_DEVID 0x8665
 221 #define IT8686E_DEVID 0x8686
 222 #define IT87_ACT_REG  0x30
 223 #define IT87_BASE_REG 0x60
 224
 225 /* Logical device 7 registers (IT8712F and later) */
 226 #define IT87_SIO_GPIO1_REG      0x25
 227 #define IT87_SIO_GPIO2_REG      0x26
 228 #define IT87_SIO_GPIO3_REG      0x27
 229 #define IT87_SIO_GPIO4_REG      0x28
 230 #define IT87_SIO_GPIO5_REG      0x29
 231 #define IT87_SIO_GPIO9_REG      0xd3
 232 #define IT87_SIO_PINX1_REG      0x2a    /* Pin selection */
 233 #define IT87_SIO_PINX2_REG      0x2c    /* Pin selection */
 234 #define IT87_SIO_PINX4_REG      0x2d    /* Pin selection */
 235 #define IT87_SIO_SPI_REG        0xef    /* SPI function pin select */
 236 #define IT87_SIO_VID_REG        0xfc    /* VID value */
 237 #define IT87_SIO_BEEP_PIN_REG   0xf6    /* Beep pin mapping */
 238
 239 /* Update battery voltage after every reading if true */
 240 static bool update_vbat;
 241
 242 /* Not all BIOSes properly configure the PWM registers */
 243 static bool fix_pwm_polarity;
 244
 245 /* Many IT87 constants specified below */
 246
 247 /* Length of ISA address segment */
 248 #define IT87_EXTENT 8
 249
 250 /* Length of ISA address segment for Environmental Controller */
 251 #define IT87_EC_EXTENT 2
 252
 253 /* Offset of EC registers from ISA base address */
 254 #define IT87_EC_OFFSET 5
 255
 256 /* Where are the ISA address/data registers relative to the EC base address */
 257 #define IT87_ADDR_REG_OFFSET 0
 258 #define IT87_DATA_REG_OFFSET 1
 259
 260 /*----- The IT87 registers -----*/
 261
 262 #define IT87_REG_CONFIG        0x00
 263
 264 #define IT87_REG_ALARM1        0x01
 265 #define IT87_REG_ALARM2        0x02
 266 #define IT87_REG_ALARM3        0x03
 267
 268 #define IT87_REG_BANK           0x06
 269
 270 /*
 271  * The IT8718F and IT8720F have the VID value in a different register, in
 272  * Super-I/O configuration space.
 273  */
 274 #define IT87_REG_VID           0x0a
 275 /*
 276  * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
 277  * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
 278  * mode.
 279  */
 280 #define IT87_REG_FAN_DIV       0x0b
 281 #define IT87_REG_FAN_16BIT     0x0c
 282
 283 /*
 284  * Monitors:
 285  * - up to 13 voltage (0 to 7, battery, avcc, 10 to 12)
 286  * - up to 6 temp (1 to 6)
 287  * - up to 6 fan (1 to 6)
 288  */
 289
 290 static const u8 IT87_REG_FAN[] =        { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c };
 291 static const u8 IT87_REG_FAN_MIN[] =    { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e };
 292 static const u8 IT87_REG_FANX[] =       { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d };
 293 static const u8 IT87_REG_FANX_MIN[] =   { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f };
 294
 295 static const u8 IT87_REG_FAN_8665[] =   { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x93 };
 296 static const u8 IT87_REG_FAN_MIN_8665[] =
 297                                         { 0x10, 0x11, 0x12, 0x84, 0x86, 0xb2 };
 298 static const u8 IT87_REG_FANX_8665[] =  { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x94 };
 299 static const u8 IT87_REG_FANX_MIN_8665[] =
 300                                         { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0xb3 };
 301
 302 static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59, 0x5a, 0x90, 0x91 };
 303
 304 static const u8 IT87_REG_TEMP_OFFSET_8686[] = { 0x56, 0x57, 0x59, 0x90, 0x91, 0x92 };
 305
 306 #define IT87_REG_FAN_MAIN_CTRL 0x13
 307 #define IT87_REG_FAN_CTL       0x14
 308
 309 static const u8 IT87_REG_PWM[] =        { 0x15, 0x16, 0x17, 0x7f, 0xa7, 0xaf };
 310 static const u8 IT87_REG_PWM_8665[] =   { 0x15, 0x16, 0x17, 0x1e, 0x1f, 0x92 };
 311
 312 static const u8 IT87_REG_PWM_DUTY[] =   { 0x63, 0x6b, 0x73, 0x7b, 0xa3, 0xab };
 313
 314 static const u8 IT87_REG_VIN[]  = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26,
 315                                     0x27, 0x28, 0x2f, 0x2c, 0x2d, 0x2e };
 316
 317 #define IT87_REG_TEMP(nr)      (0x29 + (nr))
 318
 319 #define IT87_REG_VIN_MAX(nr)   (0x30 + (nr) * 2)
 320 #define IT87_REG_VIN_MIN(nr)   (0x31 + (nr) * 2)
 321
 322 static const u8 IT87_REG_TEMP_HIGH[] =  { 0x40, 0x42, 0x44, 0x46, 0xb4, 0xb6 };
 323 static const u8 IT87_REG_TEMP_LOW[] =   { 0x41, 0x43, 0x45, 0x47, 0xb5, 0xb7 };
 324
 325 static const u8 IT87_REG_TEMP_HIGH_8686[] =
 326                                         { 0x40, 0x42, 0x44, 0xb4, 0xb6, 0xb8 };
 327 static const u8 IT87_REG_TEMP_LOW_8686[] =
 328                                         { 0x41, 0x43, 0x45, 0xb5, 0xb7, 0xb9 };
 329
 330 #define IT87_REG_VIN_ENABLE    0x50
 331 #define IT87_REG_TEMP_ENABLE   0x51
 332 #define IT87_REG_TEMP_EXTRA    0x55
 333 #define IT87_REG_BEEP_ENABLE   0x5c
 334
 335 #define IT87_REG_CHIPID        0x58
 336
 337 static const u8 IT87_REG_AUTO_BASE[] = { 0x60, 0x68, 0x70, 0x78, 0xa0, 0xa8 };
 338
 339 #define IT87_REG_AUTO_TEMP(nr, i) (IT87_REG_AUTO_BASE[nr] + (i))
 340 #define IT87_REG_AUTO_PWM(nr, i)  (IT87_REG_AUTO_BASE[nr] + 5 + (i))
 341
 342 #define IT87_REG_TEMP456_ENABLE 0x77
 343
 344 static const u16 IT87_REG_TEMP_SRC1[] = { 0x21d, 0x21e, 0x21f };
 345 #define IT87_REG_TEMP_SRC2      0x23d
 346
 347 #define NUM_VIN                 ARRAY_SIZE(IT87_REG_VIN)
 348 #define NUM_VIN_LIMIT           8
 349 #define NUM_TEMP                6
 350 #define NUM_FAN                 ARRAY_SIZE(IT87_REG_FAN)
 351 #define NUM_FAN_DIV             3
 352 #define NUM_PWM                 ARRAY_SIZE(IT87_REG_PWM)
 353 #define NUM_AUTO_PWM            ARRAY_SIZE(IT87_REG_PWM)
 354
 355 struct it87_devices {
 356         const char *name;
 357         const char * const suffix;
 358         u32 features;
 359         u8 num_temp_limit;
 360         u8 peci_mask;
 361         u8 old_peci_mask;
 362 };
 363
 364 #define FEAT_12MV_ADC           BIT(0)
 365 #define FEAT_NEWER_AUTOPWM      BIT(1)
 366 #define FEAT_OLD_AUTOPWM        BIT(2)
 367 #define FEAT_16BIT_FANS         BIT(3)
 368 #define FEAT_TEMP_OFFSET        BIT(4)
 369 #define FEAT_TEMP_PECI          BIT(5)
 370 #define FEAT_TEMP_OLD_PECI      BIT(6)
 371 #define FEAT_FAN16_CONFIG       BIT(7)  /* Need to enable 16-bit fans */
 372 #define FEAT_FIVE_FANS          BIT(8)  /* Supports five fans */
 373 #define FEAT_VID                BIT(9)  /* Set if chip supports VID */
 374 #define FEAT_IN7_INTERNAL       BIT(10) /* Set if in7 is internal */
 375 #define FEAT_SIX_FANS           BIT(11) /* Supports six fans */
 376 #define FEAT_10_9MV_ADC         BIT(12)
 377 #define FEAT_AVCC3              BIT(13) /* Chip supports in9/AVCC3 */
 378 #define FEAT_FIVE_PWM           BIT(14) /* Chip supports 5 pwm chn */
 379 #define FEAT_SIX_PWM            BIT(15) /* Chip supports 6 pwm chn */
 380 #define FEAT_PWM_FREQ2          BIT(16) /* Separate pwm freq 2 */
 381 #define FEAT_SIX_TEMP           BIT(17) /* Up to 6 temp sensors */
 382 #define FEAT_VIN3_5V            BIT(18) /* VIN3 connected to +5V */
 383 #define FEAT_FOUR_FANS          BIT(19) /* Supports four fans */
 384 #define FEAT_FOUR_PWM           BIT(20) /* Supports four fan controls */
 385 #define FEAT_BANK_SEL           BIT(21) /* Chip has multi-bank support */
 386 #define FEAT_SCALING            BIT(22) /* Internal voltage scaling */
 387 #define FEAT_FANCTL_ONOFF       BIT(23) /* chip has FAN_CTL ON/OFF */
 388 #define FEAT_11MV_ADC           BIT(24)
 389 #define FEAT_NEW_TEMPMAP        BIT(25) /* new temp input selection */
 390
 391 static const struct it87_devices it87_devices[] = {
 392         [it87] = {
 393                 .name = "it87",
 394                 .suffix = "F",
 395                 .features = FEAT_OLD_AUTOPWM | FEAT_FANCTL_ONOFF,
 396                                                 /* may need to overwrite */
 397                 .num_temp_limit = 3,
 398         },
 399         [it8712] = {
 400                 .name = "it8712",
 401                 .suffix = "F",
 402                 .features = FEAT_OLD_AUTOPWM | FEAT_VID | FEAT_FANCTL_ONOFF,
 403                                                 /* may need to overwrite */
 404                 .num_temp_limit = 3,
 405         },
 406         [it8716] = {
 407                 .name = "it8716",
 408                 .suffix = "F",
 409                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 410                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2
 411                   | FEAT_FANCTL_ONOFF,
 412                 .num_temp_limit = 3,
 413         },
 414         [it8718] = {
 415                 .name = "it8718",
 416                 .suffix = "F",
 417                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 418                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 419                   | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 420                 .num_temp_limit = 3,
 421                 .old_peci_mask = 0x4,
 422         },
 423         [it8720] = {
 424                 .name = "it8720",
 425                 .suffix = "F",
 426                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 427                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 428                   | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 429                 .num_temp_limit = 3,
 430                 .old_peci_mask = 0x4,
 431         },
 432         [it8721] = {
 433                 .name = "it8721",
 434                 .suffix = "F",
 435                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 436                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 437                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL
 438                   | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF,
 439                 .num_temp_limit = 3,
 440                 .peci_mask = 0x05,
 441                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 442         },
 443         [it8728] = {
 444                 .name = "it8728",
 445                 .suffix = "F",
 446                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 447                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 448                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_SCALING
 449                   | FEAT_FANCTL_ONOFF,
 450                 .num_temp_limit = 3,
 451                 .peci_mask = 0x07,
 452         },
 453         [it8732] = {
 454                 .name = "it8732",
 455                 .suffix = "F",
 456                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 457                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 458                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_FOUR_FANS
 459                   | FEAT_FOUR_PWM | FEAT_FANCTL_ONOFF,
 460                 .num_temp_limit = 3,
 461                 .peci_mask = 0x07,
 462                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 463         },
 464         [it8771] = {
 465                 .name = "it8771",
 466                 .suffix = "E",
 467                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 468                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 469                   | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF,
 470                                 /* PECI: guesswork */
 471                                 /* 12mV ADC (OHM) */
 472                                 /* 16 bit fans (OHM) */
 473                                 /* three fans, always 16 bit (guesswork) */
 474                 .num_temp_limit = 3,
 475                 .peci_mask = 0x07,
 476         },
 477         [it8772] = {
 478                 .name = "it8772",
 479                 .suffix = "E",
 480                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 481                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 482                   | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF,
 483                                 /* PECI (coreboot) */
 484                                 /* 12mV ADC (HWSensors4, OHM) */
 485                                 /* 16 bit fans (HWSensors4, OHM) */
 486                                 /* three fans, always 16 bit (datasheet) */
 487                 .num_temp_limit = 3,
 488                 .peci_mask = 0x07,
 489         },
 490         [it8781] = {
 491                 .name = "it8781",
 492                 .suffix = "F",
 493                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 494                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
 495                   | FEAT_FANCTL_ONOFF,
 496                 .num_temp_limit = 3,
 497                 .old_peci_mask = 0x4,
 498         },
 499         [it8782] = {
 500                 .name = "it8782",
 501                 .suffix = "F",
 502                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 503                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
 504                   | FEAT_FANCTL_ONOFF,
 505                 .num_temp_limit = 3,
 506                 .old_peci_mask = 0x4,
 507         },
 508         [it8783] = {
 509                 .name = "it8783",
 510                 .suffix = "E/F",
 511                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 512                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
 513                   | FEAT_FANCTL_ONOFF,
 514                 .num_temp_limit = 3,
 515                 .old_peci_mask = 0x4,
 516         },
 517         [it8786] = {
 518                 .name = "it8786",
 519                 .suffix = "E",
 520                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 521                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 522                   | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 523                 .num_temp_limit = 3,
 524                 .peci_mask = 0x07,
 525         },
 526         [it8790] = {
 527                 .name = "it8790",
 528                 .suffix = "E",
 529                 .features = FEAT_NEWER_AUTOPWM | FEAT_10_9MV_ADC | FEAT_SCALING
 530                   | FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI
 531                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 532                 .num_temp_limit = 3,
 533                 .peci_mask = 0x07,
 534         },
 535         [it8792] = {
 536                 .name = "it8792",
 537                 .suffix = "E",
 538                 .features = FEAT_NEWER_AUTOPWM | FEAT_10_9MV_ADC | FEAT_SCALING
 539                   | FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI
 540                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 541                 .num_temp_limit = 3,
 542                 .peci_mask = 0x07,
 543         },
 544         [it8603] = {
 545                 .name = "it8603",
 546                 .suffix = "E",
 547                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 548                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 549                   | FEAT_AVCC3 | FEAT_PWM_FREQ2 | FEAT_SCALING,
 550                 .num_temp_limit = 3,
 551                 .peci_mask = 0x07,
 552         },
 553         [it8607] = {
 554                 .name = "it8607",
 555                 .suffix = "E",
 556                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 557                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 558                   | FEAT_AVCC3 | FEAT_PWM_FREQ2 | FEAT_SCALING
 559                   | FEAT_FANCTL_ONOFF,
 560                 .num_temp_limit = 3,
 561                 .peci_mask = 0x07,
 562         },
 563         [it8613] = {
 564                 .name = "it8613",
 565                 .suffix = "E",
 566                 .features = FEAT_NEWER_AUTOPWM | FEAT_11MV_ADC | FEAT_16BIT_FANS
 567                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 568                   | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
 569                   | FEAT_AVCC3 | FEAT_SCALING | FEAT_NEW_TEMPMAP,
 570                 .num_temp_limit = 6,
 571                 .peci_mask = 0x07,
 572         },
 573         [it8620] = {
 574                 .name = "it8620",
 575                 .suffix = "E",
 576                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 577                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 578                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 579                   | FEAT_SIX_TEMP | FEAT_VIN3_5V | FEAT_SCALING
 580                   | FEAT_FANCTL_ONOFF,
 581                 .num_temp_limit = 3,
 582                 .peci_mask = 0x07,
 583         },
 584         [it8622] = {
 585                 .name = "it8622",
 586                 .suffix = "E",
 587                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 588                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 589                   | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
 590                   | FEAT_AVCC3 | FEAT_VIN3_5V | FEAT_SCALING,
 591                 .num_temp_limit = 3,
 592                 .peci_mask = 0x07,
 593         },
 594         [it8628] = {
 595                 .name = "it8628",
 596                 .suffix = "E",
 597                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 598                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 599                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 600                   | FEAT_SIX_TEMP | FEAT_SCALING | FEAT_AVCC3
 601                   | FEAT_FANCTL_ONOFF,
 602                 .num_temp_limit = 3,
 603                 .peci_mask = 0x07,
 604         },
 605         [it8655] = {
 606                 .name = "it8655",
 607                 .suffix = "E",
 608                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 609                   | FEAT_TEMP_OFFSET | FEAT_AVCC3 | FEAT_NEW_TEMPMAP
 610                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_BANK_SEL,
 611                 .num_temp_limit = 6,
 612         },
 613         [it8665] = {
 614                 .name = "it8665",
 615                 .suffix = "E",
 616                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 617                   | FEAT_TEMP_OFFSET | FEAT_AVCC3 | FEAT_NEW_TEMPMAP
 618                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_SIX_FANS
 619                   | FEAT_SIX_PWM | FEAT_BANK_SEL,
 620                 .num_temp_limit = 6,
 621         },
 622         [it8686] = {
 623                 .name = "it8686",
 624                 .suffix = "E",
 625                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 626                   | FEAT_TEMP_OFFSET | FEAT_SIX_FANS | FEAT_NEW_TEMPMAP
 627                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 628                   | FEAT_SIX_TEMP | FEAT_BANK_SEL | FEAT_SCALING | FEAT_AVCC3,
 629                 .num_temp_limit = 6,
 630         },
 631 };
 632
 633 #define has_16bit_fans(data)    ((data)->features & FEAT_16BIT_FANS)
 634 #define has_12mv_adc(data)      ((data)->features & FEAT_12MV_ADC)
 635 #define has_10_9mv_adc(data)    ((data)->features & FEAT_10_9MV_ADC)
 636 #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
 637 #define has_old_autopwm(data)   ((data)->features & FEAT_OLD_AUTOPWM)
 638 #define has_temp_offset(data)   ((data)->features & FEAT_TEMP_OFFSET)
 639 #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \
 640                                  ((data)->peci_mask & BIT(nr)))
 641 #define has_temp_old_peci(data, nr) \
 642                                 (((data)->features & FEAT_TEMP_OLD_PECI) && \
 643                                  ((data)->old_peci_mask & BIT(nr)))
 644 #define has_fan16_config(data)  ((data)->features & FEAT_FAN16_CONFIG)
 645 #define has_five_fans(data)     ((data)->features & (FEAT_FIVE_FANS | \
 646                                                      FEAT_SIX_FANS))
 647 #define has_vid(data)           ((data)->features & FEAT_VID)
 648 #define has_in7_internal(data)  ((data)->features & FEAT_IN7_INTERNAL)
 649 #define has_six_fans(data)      ((data)->features & FEAT_SIX_FANS)
 650 #define has_avcc3(data)         ((data)->features & FEAT_AVCC3)
 651 #define has_five_pwm(data)      ((data)->features & (FEAT_FIVE_PWM \
 652                                                      | FEAT_SIX_PWM))
 653 #define has_six_pwm(data)       ((data)->features & FEAT_SIX_PWM)
 654 #define has_pwm_freq2(data)     ((data)->features & FEAT_PWM_FREQ2)
 655 #define has_six_temp(data)      ((data)->features & FEAT_SIX_TEMP)
 656 #define has_vin3_5v(data)       ((data)->features & FEAT_VIN3_5V)
 657 #define has_four_fans(data)     ((data)->features & (FEAT_FOUR_FANS | \
 658                                                      FEAT_FIVE_FANS | \
 659                                                      FEAT_SIX_FANS))
 660 #define has_four_pwm(data)      ((data)->features & (FEAT_FOUR_PWM | \
 661                                                      FEAT_FIVE_PWM \
 662                                                      | FEAT_SIX_PWM))
 663 #define has_bank_sel(data)      ((data)->features & FEAT_BANK_SEL)
 664 #define has_scaling(data)       ((data)->features & FEAT_SCALING)
 665 #define has_fanctl_onoff(data)  ((data)->features & FEAT_FANCTL_ONOFF)
 666 #define has_11mv_adc(data)      ((data)->features & FEAT_11MV_ADC)
 667 #define has_new_tempmap(data)   ((data)->features & FEAT_NEW_TEMPMAP)
 668
 669 struct it87_sio_data {
 670         enum chips type;
 671         /* Values read from Super-I/O config space */
 672         u8 revision;
 673         u8 vid_value;
 674         u8 beep_pin;
 675         u8 internal;    /* Internal sensors can be labeled */
 676         /* Features skipped based on config or DMI */
 677         u16 skip_in;
 678         u8 skip_vid;
 679         u8 skip_fan;
 680         u8 skip_pwm;
 681         u8 skip_temp;
 682 };
 683
 684 /*
 685  * For each registered chip, we need to keep some data in memory.
 686  * The structure is dynamically allocated.
 687  */
 688 struct it87_data {
 689         const struct attribute_group *groups[7];
 690         enum chips type;
 691         u32 features;
 692         u8 bank;
 693         u8 peci_mask;
 694         u8 old_peci_mask;
 695
 696         const u8 *REG_FAN;
 697         const u8 *REG_FANX;
 698         const u8 *REG_FAN_MIN;
 699         const u8 *REG_FANX_MIN;
 700
 701         const u8 *REG_PWM;
 702
 703         const u8 *REG_TEMP_OFFSET;
 704         const u8 *REG_TEMP_LOW;
 705         const u8 *REG_TEMP_HIGH;
 706
 707         unsigned short addr;
 708         const char *name;
 709         struct mutex update_lock;
 710         char valid;             /* !=0 if following fields are valid */
 711         unsigned long last_updated;     /* In jiffies */
 712
 713         u16 in_scaled;          /* Internal voltage sensors are scaled */
 714         u16 in_internal;        /* Bitfield, internal sensors (for labels) */
 715         u16 has_in;             /* Bitfield, voltage sensors enabled */
 716         u8 in[NUM_VIN][3];              /* [nr][0]=in, [1]=min, [2]=max */
 717         u8 has_fan;             /* Bitfield, fans enabled */
 718         u16 fan[NUM_FAN][2];    /* Register values, [nr][0]=fan, [1]=min */
 719         u8 has_temp;            /* Bitfield, temp sensors enabled */
 720         s8 temp[NUM_TEMP][4];   /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
 721         u8 num_temp_limit;      /* Number of temp limit/offset registers */
 722         u8 sensor;              /* Register value (IT87_REG_TEMP_ENABLE) */
 723         u8 extra;               /* Register value (IT87_REG_TEMP_EXTRA) */
 724         u8 fan_div[NUM_FAN_DIV];/* Register encoding, shifted right */
 725         bool has_vid;           /* True if VID supported */
 726         u8 vid;                 /* Register encoding, combined */
 727         u8 vrm;
 728         u32 alarms;             /* Register encoding, combined */
 729         bool has_beep;          /* true if beep supported */
 730         u8 beeps;               /* Register encoding */
 731         u8 fan_main_ctrl;       /* Register value */
 732         u8 fan_ctl;             /* Register value */
 733
 734         /*
 735          * The following 3 arrays correspond to the same registers up to
 736          * the IT8720F. The meaning of bits 6-0 depends on the value of bit
 737          * 7, and we want to preserve settings on mode changes, so we have
 738          * to track all values separately.
 739          * Starting with the IT8721F, the manual PWM duty cycles are stored
 740          * in separate registers (8-bit values), so the separate tracking
 741          * is no longer needed, but it is still done to keep the driver
 742          * simple.
 743          */
 744         u8 has_pwm;             /* Bitfield, pwm control enabled */
 745         u8 pwm_ctrl[NUM_PWM];   /* Register value */
 746         u8 pwm_duty[NUM_PWM];   /* Manual PWM value set by user */
 747         u8 pwm_temp_map[NUM_PWM];/* PWM to temp. chan. mapping (bits 1-0) */
 748
 749         /* Automatic fan speed control registers */
 750         u8 auto_pwm[NUM_AUTO_PWM][4];   /* [nr][3] is hard-coded */
 751         s8 auto_temp[NUM_AUTO_PWM][5];  /* [nr][0] is point1_temp_hyst */
 752 };
 753
 754 static int adc_lsb(const struct it87_data *data, int nr)
 755 {
 756         int lsb;
 757
 758         if (has_12mv_adc(data))
 759                 lsb = 120;
 760         else if (has_10_9mv_adc(data))
 761                 lsb = 109;
 762         else if (has_11mv_adc(data))
 763                 lsb = 110;
 764         else
 765                 lsb = 160;
 766         if (data->in_scaled & BIT(nr))
 767                 lsb <<= 1;
 768         return lsb;
 769 }
 770
 771 static u8 in_to_reg(const struct it87_data *data, int nr, long val)
 772 {
 773         val = DIV_ROUND_CLOSEST(val * 10, adc_lsb(data, nr));
 774         return clamp_val(val, 0, 255);
 775 }
 776
 777 static int in_from_reg(const struct it87_data *data, int nr, int val)
 778 {
 779         return DIV_ROUND_CLOSEST(val * adc_lsb(data, nr), 10);
 780 }
 781
 782 static inline u8 FAN_TO_REG(long rpm, int div)
 783 {
 784         if (rpm == 0)
 785                 return 255;
 786         rpm = clamp_val(rpm, 1, 1000000);
 787         return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
 788 }
 789
 790 static inline u16 FAN16_TO_REG(long rpm)
 791 {
 792         if (rpm == 0)
 793                 return 0xffff;
 794         return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
 795 }
 796
 797 #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
 798                                 1350000 / ((val) * (div)))
 799 /* The divider is fixed to 2 in 16-bit mode */
 800 #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
 801                              1350000 / ((val) * 2))
 802
 803 #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \
 804                                     ((val) + 500) / 1000), -128, 127))
 805 #define TEMP_FROM_REG(val) ((val) * 1000)
 806
 807 static u8 pwm_to_reg(const struct it87_data *data, long val)
 808 {
 809         if (has_newer_autopwm(data))
 810                 return val;
 811         else
 812                 return val >> 1;
 813 }
 814
 815 static int pwm_from_reg(const struct it87_data *data, u8 reg)
 816 {
 817         if (has_newer_autopwm(data))
 818                 return reg;
 819         else
 820                 return (reg & 0x7f) << 1;
 821 }
 822
 823 static int DIV_TO_REG(int val)
 824 {
 825         int answer = 0;
 826
 827         while (answer < 7 && (val >>= 1))
 828                 answer++;
 829         return answer;
 830 }
 831
 832 #define DIV_FROM_REG(val) BIT(val)
 833
 834 /*
 835  * PWM base frequencies. The frequency has to be divided by either 128 or 256,
 836  * depending on the chip type, to calculate the actual PWM frequency.
 837  *
 838  * Some of the chip datasheets suggest a base frequency of 51 kHz instead
 839  * of 750 kHz for the slowest base frequency, resulting in a PWM frequency
 840  * of 200 Hz. Sometimes both PWM frequency select registers are affected,
 841  * sometimes just one. It is unknown if this is a datasheet error or real,
 842  * so this is ignored for now.
 843  */
 844 static const unsigned int pwm_freq[8] = {
 845         48000000,
 846         24000000,
 847         12000000,
 848         8000000,
 849         6000000,
 850         3000000,
 851         1500000,
 852         750000,
 853 };
 854
 855 static int _it87_read_value(struct it87_data *data, u8 reg)
 856 {
 857         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 858         return inb_p(data->addr + IT87_DATA_REG_OFFSET);
 859 }
 860
 861 static void _it87_write_value(struct it87_data *data, u8 reg, u8 value)
 862 {
 863         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 864         outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
 865 }
 866
 867 static void it87_set_bank(struct it87_data *data, u8 bank)
 868 {
 869         if (has_bank_sel(data) && bank != data->bank) {
 870                 u8 breg = _it87_read_value(data, IT87_REG_BANK);
 871
 872                 breg &= 0x1f;
 873                 breg |= (bank << 5);
 874                 data->bank = bank;
 875                 _it87_write_value(data, IT87_REG_BANK, breg);
 876         }
 877 }
 878
 879 /*
 880  * Must be called with data->update_lock held, except during initialization.
 881  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 882  * would slow down the IT87 access and should not be necessary.
 883  */
 884 static int it87_read_value(struct it87_data *data, u16 reg)
 885 {
 886         it87_set_bank(data, reg >> 8);
 887         return _it87_read_value(data, reg & 0xff);
 888 }
 889
 890 /*
 891  * Must be called with data->update_lock held, except during initialization.
 892  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 893  * would slow down the IT87 access and should not be necessary.
 894  */
 895 static void it87_write_value(struct it87_data *data, u16 reg, u8 value)
 896 {
 897         it87_set_bank(data, reg >> 8);
 898         _it87_write_value(data, reg & 0xff, value);
 899 }
 900
 901 static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
 902 {
 903         data->pwm_ctrl[nr] = it87_read_value(data, data->REG_PWM[nr]);
 904         if (has_newer_autopwm(data)) {
 905                 if (has_new_tempmap(data))
 906                         data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x38;
 907                 else
 908                         data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
 909                 data->pwm_duty[nr] = it87_read_value(data,
 910                                                      IT87_REG_PWM_DUTY[nr]);
 911         } else {
 912                 if (data->pwm_ctrl[nr] & 0x80)  /* Automatic mode */
 913                         data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
 914                 else                            /* Manual mode */
 915                         data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
 916         }
 917
 918         if (has_old_autopwm(data)) {
 919                 int i;
 920
 921                 for (i = 0; i < 5 ; i++)
 922                         data->auto_temp[nr][i] = it87_read_value(data,
 923                                                 IT87_REG_AUTO_TEMP(nr, i));
 924                 for (i = 0; i < 3 ; i++)
 925                         data->auto_pwm[nr][i] = it87_read_value(data,
 926                                                 IT87_REG_AUTO_PWM(nr, i));
 927         } else if (has_newer_autopwm(data)) {
 928                 int i;
 929
 930                 /*
 931                  * 0: temperature hysteresis (base + 5)
 932                  * 1: fan off temperature (base + 0)
 933                  * 2: fan start temperature (base + 1)
 934                  * 3: fan max temperature (base + 2)
 935                  */
 936                 data->auto_temp[nr][0] =
 937                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 5));
 938
 939                 for (i = 0; i < 3 ; i++)
 940                         data->auto_temp[nr][i + 1] =
 941                                 it87_read_value(data,
 942                                                 IT87_REG_AUTO_TEMP(nr, i));
 943                 /*
 944                  * 0: start pwm value (base + 3)
 945                  * 1: pwm slope (base + 4, 1/8th pwm)
 946                  */
 947                 data->auto_pwm[nr][0] =
 948                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 3));
 949                 data->auto_pwm[nr][1] =
 950                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 4));
 951         }
 952 }
 953
 954 static struct it87_data *it87_update_device(struct device *dev)
 955 {
 956         struct it87_data *data = dev_get_drvdata(dev);
 957         int i;
 958
 959         mutex_lock(&data->update_lock);
 960
 961         if (time_after(jiffies, data->last_updated + HZ + HZ / 2) ||
 962             !data->valid) {
 963                 if (update_vbat) {
 964                         /*
 965                          * Cleared after each update, so reenable.  Value
 966                          * returned by this read will be previous value
 967                          */
 968                         it87_write_value(data, IT87_REG_CONFIG,
 969                                 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
 970                 }
 971                 for (i = 0; i < NUM_VIN; i++) {
 972                         if (!(data->has_in & BIT(i)))
 973                                 continue;
 974
 975                         data->in[i][0] =
 976                                 it87_read_value(data, IT87_REG_VIN[i]);
 977
 978                         /* VBAT and AVCC don't have limit registers */
 979                         if (i >= NUM_VIN_LIMIT)
 980                                 continue;
 981
 982                         data->in[i][1] =
 983                                 it87_read_value(data, IT87_REG_VIN_MIN(i));
 984                         data->in[i][2] =
 985                                 it87_read_value(data, IT87_REG_VIN_MAX(i));
 986                 }
 987
 988                 for (i = 0; i < NUM_FAN; i++) {
 989                         /* Skip disabled fans */
 990                         if (!(data->has_fan & BIT(i)))
 991                                 continue;
 992
 993                         data->fan[i][1] =
 994                                 it87_read_value(data, data->REG_FAN_MIN[i]);
 995                         data->fan[i][0] = it87_read_value(data,
 996                                        data->REG_FAN[i]);
 997                         /* Add high byte if in 16-bit mode */
 998                         if (has_16bit_fans(data)) {
 999                                 data->fan[i][0] |= it87_read_value(data,
1000                                                 data->REG_FANX[i]) << 8;
1001                                 data->fan[i][1] |= it87_read_value(data,
1002                                                 data->REG_FANX_MIN[i]) << 8;
1003                         }
1004                 }
1005                 for (i = 0; i < NUM_TEMP; i++) {
1006                         if (!(data->has_temp & BIT(i)))
1007                                 continue;
1008                         data->temp[i][0] =
1009                                 it87_read_value(data, IT87_REG_TEMP(i));
1010
1011                         if (i >= data->num_temp_limit)
1012                                 continue;
1013
1014                         if (has_temp_offset(data))
1015                                 data->temp[i][3] =
1016                                   it87_read_value(data,
1017                                                   data->REG_TEMP_OFFSET[i]);
1018
1019                         data->temp[i][1] =
1020                                 it87_read_value(data, data->REG_TEMP_LOW[i]);
1021                         data->temp[i][2] =
1022                                 it87_read_value(data, data->REG_TEMP_HIGH[i]);
1023                 }
1024
1025                 /* Newer chips don't have clock dividers */
1026                 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
1027                         i = it87_read_value(data, IT87_REG_FAN_DIV);
1028                         data->fan_div[0] = i & 0x07;
1029                         data->fan_div[1] = (i >> 3) & 0x07;
1030                         data->fan_div[2] = (i & 0x40) ? 3 : 1;
1031                 }
1032
1033                 data->alarms =
1034                         it87_read_value(data, IT87_REG_ALARM1) |
1035                         (it87_read_value(data, IT87_REG_ALARM2) << 8) |
1036                         (it87_read_value(data, IT87_REG_ALARM3) << 16);
1037                 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1038
1039                 data->fan_main_ctrl = it87_read_value(data,
1040                                 IT87_REG_FAN_MAIN_CTRL);
1041                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
1042                 for (i = 0; i < NUM_PWM; i++) {
1043                         if (!(data->has_pwm & BIT(i)))
1044                                 continue;
1045                         it87_update_pwm_ctrl(data, i);
1046                 }
1047
1048                 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1049                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1050                 /*
1051                  * The IT8705F does not have VID capability.
1052                  * The IT8718F and later don't use IT87_REG_VID for the
1053                  * same purpose.
1054                  */
1055                 if (data->type == it8712 || data->type == it8716) {
1056                         data->vid = it87_read_value(data, IT87_REG_VID);
1057                         /*
1058                          * The older IT8712F revisions had only 5 VID pins,
1059                          * but we assume it is always safe to read 6 bits.
1060                          */
1061                         data->vid &= 0x3f;
1062                 }
1063                 data->last_updated = jiffies;
1064                 data->valid = 1;
1065         }
1066
1067         mutex_unlock(&data->update_lock);
1068
1069         return data;
1070 }
1071
1072 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
1073                        char *buf)
1074 {
1075         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1076         struct it87_data *data = it87_update_device(dev);
1077         int index = sattr->index;
1078         int nr = sattr->nr;
1079
1080         return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
1081 }
1082
1083 static ssize_t set_in(struct device *dev, struct device_attribute *attr,
1084                       const char *buf, size_t count)
1085 {
1086         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1087         struct it87_data *data = dev_get_drvdata(dev);
1088         int index = sattr->index;
1089         int nr = sattr->nr;
1090         unsigned long val;
1091
1092         if (kstrtoul(buf, 10, &val) < 0)
1093                 return -EINVAL;
1094
1095         mutex_lock(&data->update_lock);
1096         data->in[nr][index] = in_to_reg(data, nr, val);
1097         it87_write_value(data,
1098                          index == 1 ? IT87_REG_VIN_MIN(nr)
1099                                     : IT87_REG_VIN_MAX(nr),
1100                          data->in[nr][index]);
1101         mutex_unlock(&data->update_lock);
1102         return count;
1103 }
1104
1105 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
1106 static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
1107                             0, 1);
1108 static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
1109                             0, 2);
1110
1111 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
1112 static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
1113                             1, 1);
1114 static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
1115                             1, 2);
1116
1117 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
1118 static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
1119                             2, 1);
1120 static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
1121                             2, 2);
1122
1123 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
1124 static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
1125                             3, 1);
1126 static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
1127                             3, 2);
1128
1129 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
1130 static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
1131                             4, 1);
1132 static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
1133                             4, 2);
1134
1135 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
1136 static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
1137                             5, 1);
1138 static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
1139                             5, 2);
1140
1141 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
1142 static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
1143                             6, 1);
1144 static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
1145                             6, 2);
1146
1147 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
1148 static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
1149                             7, 1);
1150 static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
1151                             7, 2);
1152
1153 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
1154 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0);
1155 static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in, NULL, 10, 0);
1156 static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in, NULL, 11, 0);
1157 static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in, NULL, 12, 0);
1158
1159 /* Up to 6 temperatures */
1160 static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
1161                          char *buf)
1162 {
1163         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1164         int nr = sattr->nr;
1165         int index = sattr->index;
1166         struct it87_data *data = it87_update_device(dev);
1167
1168         return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
1169 }
1170
1171 static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
1172                         const char *buf, size_t count)
1173 {
1174         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1175         int nr = sattr->nr;
1176         int index = sattr->index;
1177         struct it87_data *data = dev_get_drvdata(dev);
1178         long val;
1179         u8 reg, regval;
1180
1181         if (kstrtol(buf, 10, &val) < 0)
1182                 return -EINVAL;
1183
1184         mutex_lock(&data->update_lock);
1185
1186         switch (index) {
1187         default:
1188         case 1:
1189                 reg = data->REG_TEMP_LOW[nr];
1190                 break;
1191         case 2:
1192                 reg = data->REG_TEMP_HIGH[nr];
1193                 break;
1194         case 3:
1195                 regval = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1196                 if (!(regval & 0x80)) {
1197                         regval |= 0x80;
1198                         it87_write_value(data, IT87_REG_BEEP_ENABLE, regval);
1199                 }
1200                 data->valid = 0;
1201                 reg = data->REG_TEMP_OFFSET[nr];
1202                 break;
1203         }
1204
1205         data->temp[nr][index] = TEMP_TO_REG(val);
1206         it87_write_value(data, reg, data->temp[nr][index]);
1207         mutex_unlock(&data->update_lock);
1208         return count;
1209 }
1210
1211 static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
1212 static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1213                             0, 1);
1214 static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1215                             0, 2);
1216 static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
1217                             set_temp, 0, 3);
1218 static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
1219 static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1220                             1, 1);
1221 static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1222                             1, 2);
1223 static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
1224                             set_temp, 1, 3);
1225 static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
1226 static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1227                             2, 1);
1228 static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1229                             2, 2);
1230 static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
1231                             set_temp, 2, 3);
1232 static SENSOR_DEVICE_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0);
1233 static SENSOR_DEVICE_ATTR_2(temp4_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1234                             3, 1);
1235 static SENSOR_DEVICE_ATTR_2(temp4_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1236                             3, 2);
1237 static SENSOR_DEVICE_ATTR_2(temp4_offset, S_IRUGO | S_IWUSR, show_temp,
1238                             set_temp, 3, 3);
1239 static SENSOR_DEVICE_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0);
1240 static SENSOR_DEVICE_ATTR_2(temp5_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1241                             4, 1);
1242 static SENSOR_DEVICE_ATTR_2(temp5_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1243                             4, 2);
1244 static SENSOR_DEVICE_ATTR_2(temp5_offset, S_IRUGO | S_IWUSR, show_temp,
1245                             set_temp, 4, 3);
1246 static SENSOR_DEVICE_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0);
1247 static SENSOR_DEVICE_ATTR_2(temp6_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1248                             5, 1);
1249 static SENSOR_DEVICE_ATTR_2(temp6_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1250                             5, 2);
1251 static SENSOR_DEVICE_ATTR_2(temp6_offset, S_IRUGO | S_IWUSR, show_temp,
1252                             set_temp, 5, 3);
1253
1254 static int get_temp_type(struct it87_data *data, int index)
1255 {
1256         u8 reg, extra;
1257         int type = 0;
1258
1259         if (has_bank_sel(data)) {
1260                 int s1reg = IT87_REG_TEMP_SRC1[index/2] >> ((index % 2) * 4);
1261                 u8 src1, src2;
1262
1263                 src1 = (it87_read_value(data, s1reg) >> ((index % 2) * 4)) & 0x0f;
1264                 src2 = it87_read_value(data, IT87_REG_TEMP_SRC2);
1265
1266                 switch (data->type) {
1267                 case it8686:
1268                         switch (src1) {
1269                         case 0:
1270                                 if (index >= 3)
1271                                         return 4;
1272                                 break;
1273                         case 1:
1274                                 if (index == 1 || index == 2 ||
1275                                           index == 4 || index == 5)
1276                                         return 6;
1277                                 break;
1278                         case 2:
1279                                 if (index == 2 || index == 6)
1280                                         return 5;
1281                                 break;
1282                         default:
1283                                 break;
1284                         }
1285                         break;
1286                 case it8655:
1287                 case it8665:
1288                         if (src1 < 3) {
1289                                 index = src1;
1290                                 break;
1291                         }
1292                         switch(src1) {
1293                         case 3:
1294                                 type = (src2 & BIT(index)) ? 6 : 5;
1295                                 break;
1296                         case 4 ... 8:
1297                                 type = (src2 & BIT(index)) ? 4 : 6;
1298                                 break;
1299                         case 9:
1300                                 type = (src2 & BIT(index)) ? 5 : 0;
1301                                 break;
1302                         default:
1303                                 break;
1304                         }
1305                         return type;
1306                 default:
1307                         return 0;
1308                 }
1309         }
1310         if (index >= 3)
1311                 return 0;
1312
1313         reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1314         extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1315
1316         if ((has_temp_peci(data, index) && (reg >> 6 == index + 1)) ||
1317             (has_temp_old_peci(data, index) && (extra & 0x80)))
1318                 type = 6;               /* Intel PECI */
1319         if (reg & BIT(index))
1320                 type = 3;               /* thermal diode */
1321         else if (reg & BIT(index + 3))
1322                 type = 4;               /* thermistor */
1323
1324         return type;
1325 }
1326
1327 static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
1328                               char *buf)
1329 {
1330         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1331         struct it87_data *data = it87_update_device(dev);
1332         int type = get_temp_type(data, sensor_attr->index);
1333
1334         return sprintf(buf, "%d\n", type);
1335 }
1336
1337 static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
1338                              const char *buf, size_t count)
1339 {
1340         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1341         int nr = sensor_attr->index;
1342
1343         struct it87_data *data = dev_get_drvdata(dev);
1344         long val;
1345         u8 reg, extra;
1346
1347         if (kstrtol(buf, 10, &val) < 0)
1348                 return -EINVAL;
1349
1350         reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1351         reg &= ~(1 << nr);
1352         reg &= ~(8 << nr);
1353         if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6))
1354                 reg &= 0x3f;
1355         extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1356         if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6))
1357                 extra &= 0x7f;
1358         if (val == 2) { /* backwards compatibility */
1359                 dev_warn(dev,
1360                          "Sensor type 2 is deprecated, please use 4 instead\n");
1361                 val = 4;
1362         }
1363         /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */
1364         if (val == 3)
1365                 reg |= 1 << nr;
1366         else if (val == 4)
1367                 reg |= 8 << nr;
1368         else if (has_temp_peci(data, nr) && val == 6)
1369                 reg |= (nr + 1) << 6;
1370         else if (has_temp_old_peci(data, nr) && val == 6)
1371                 extra |= 0x80;
1372         else if (val != 0)
1373                 return -EINVAL;
1374
1375         mutex_lock(&data->update_lock);
1376         data->sensor = reg;
1377         data->extra = extra;
1378         it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
1379         if (has_temp_old_peci(data, nr))
1380                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1381         data->valid = 0;        /* Force cache refresh */
1382         mutex_unlock(&data->update_lock);
1383         return count;
1384 }
1385
1386 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1387                           set_temp_type, 0);
1388 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1389                           set_temp_type, 1);
1390 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1391                           set_temp_type, 2);
1392 static SENSOR_DEVICE_ATTR(temp4_type, S_IRUGO | S_IWUSR, show_temp_type,
1393                           set_temp_type, 3);
1394 static SENSOR_DEVICE_ATTR(temp5_type, S_IRUGO | S_IWUSR, show_temp_type,
1395                           set_temp_type, 4);
1396 static SENSOR_DEVICE_ATTR(temp6_type, S_IRUGO | S_IWUSR, show_temp_type,
1397                           set_temp_type, 5);
1398
1399 /* 6 Fans */
1400
1401 static int pwm_mode(const struct it87_data *data, int nr)
1402 {
1403         if (has_fanctl_onoff(data) && nr < 3 &&
1404             !(data->fan_main_ctrl & BIT(nr)))
1405                 return 0;                               /* Full speed */
1406         if (data->pwm_ctrl[nr] & 0x80)
1407                 return 2;                               /* Automatic mode */
1408         if ((!has_fanctl_onoff(data) || nr >= 3) &&
1409             data->pwm_duty[nr] == pwm_to_reg(data, 0xff))
1410                 return 0;                       /* Full speed */
1411
1412         return 1;                               /* Manual mode */
1413 }
1414
1415 static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
1416                         char *buf)
1417 {
1418         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1419         int nr = sattr->nr;
1420         int index = sattr->index;
1421         int speed;
1422         struct it87_data *data = it87_update_device(dev);
1423
1424         speed = has_16bit_fans(data) ?
1425                 FAN16_FROM_REG(data->fan[nr][index]) :
1426                 FAN_FROM_REG(data->fan[nr][index],
1427                              DIV_FROM_REG(data->fan_div[nr]));
1428         return sprintf(buf, "%d\n", speed);
1429 }
1430
1431 static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
1432                             char *buf)
1433 {
1434         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1435         struct it87_data *data = it87_update_device(dev);
1436         int nr = sensor_attr->index;
1437
1438         return sprintf(buf, "%lu\n", DIV_FROM_REG(data->fan_div[nr]));
1439 }
1440
1441 static ssize_t show_pwm_enable(struct device *dev,
1442                                struct device_attribute *attr, char *buf)
1443 {
1444         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1445         struct it87_data *data = it87_update_device(dev);
1446         int nr = sensor_attr->index;
1447
1448         return sprintf(buf, "%d\n", pwm_mode(data, nr));
1449 }
1450
1451 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
1452                         char *buf)
1453 {
1454         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1455         struct it87_data *data = it87_update_device(dev);
1456         int nr = sensor_attr->index;
1457
1458         return sprintf(buf, "%d\n",
1459                        pwm_from_reg(data, data->pwm_duty[nr]));
1460 }
1461
1462 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
1463                              char *buf)
1464 {
1465         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1466         struct it87_data *data = it87_update_device(dev);
1467         int nr = sensor_attr->index;
1468         unsigned int freq;
1469         int index;
1470
1471         if (has_pwm_freq2(data) && nr == 1)
1472                 index = (data->extra >> 4) & 0x07;
1473         else
1474                 index = (data->fan_ctl >> 4) & 0x07;
1475
1476         freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128);
1477
1478         return sprintf(buf, "%u\n", freq);
1479 }
1480
1481 static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
1482                        const char *buf, size_t count)
1483 {
1484         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1485         int nr = sattr->nr;
1486         int index = sattr->index;
1487
1488         struct it87_data *data = dev_get_drvdata(dev);
1489         long val;
1490         u8 reg;
1491
1492         if (kstrtol(buf, 10, &val) < 0)
1493                 return -EINVAL;
1494
1495         mutex_lock(&data->update_lock);
1496
1497         if (has_16bit_fans(data)) {
1498                 data->fan[nr][index] = FAN16_TO_REG(val);
1499                 it87_write_value(data, data->REG_FAN_MIN[nr],
1500                                  data->fan[nr][index] & 0xff);
1501                 it87_write_value(data, data->REG_FANX_MIN[nr],
1502                                  data->fan[nr][index] >> 8);
1503         } else {
1504                 reg = it87_read_value(data, IT87_REG_FAN_DIV);
1505                 switch (nr) {
1506                 case 0:
1507                         data->fan_div[nr] = reg & 0x07;
1508                         break;
1509                 case 1:
1510                         data->fan_div[nr] = (reg >> 3) & 0x07;
1511                         break;
1512                 case 2:
1513                         data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
1514                         break;
1515                 }
1516                 data->fan[nr][index] =
1517                   FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
1518                 it87_write_value(data, data->REG_FAN_MIN[nr],
1519                                  data->fan[nr][index]);
1520         }
1521
1522         mutex_unlock(&data->update_lock);
1523         return count;
1524 }
1525
1526 static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
1527                            const char *buf, size_t count)
1528 {
1529         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1530         struct it87_data *data = dev_get_drvdata(dev);
1531         int nr = sensor_attr->index;
1532         unsigned long val;
1533         int min;
1534         u8 old;
1535
1536         if (kstrtoul(buf, 10, &val) < 0)
1537                 return -EINVAL;
1538
1539         mutex_lock(&data->update_lock);
1540         old = it87_read_value(data, IT87_REG_FAN_DIV);
1541
1542         /* Save fan min limit */
1543         min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
1544
1545         switch (nr) {
1546         case 0:
1547         case 1:
1548                 data->fan_div[nr] = DIV_TO_REG(val);
1549                 break;
1550         case 2:
1551                 if (val < 8)
1552                         data->fan_div[nr] = 1;
1553                 else
1554                         data->fan_div[nr] = 3;
1555         }
1556         val = old & 0x80;
1557         val |= (data->fan_div[0] & 0x07);
1558         val |= (data->fan_div[1] & 0x07) << 3;
1559         if (data->fan_div[2] == 3)
1560                 val |= 0x1 << 6;
1561         it87_write_value(data, IT87_REG_FAN_DIV, val);
1562
1563         /* Restore fan min limit */
1564         data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
1565         it87_write_value(data, data->REG_FAN_MIN[nr], data->fan[nr][1]);
1566
1567         mutex_unlock(&data->update_lock);
1568         return count;
1569 }
1570
1571 /* Returns 0 if OK, -EINVAL otherwise */
1572 static int check_trip_points(struct device *dev, int nr)
1573 {
1574         const struct it87_data *data = dev_get_drvdata(dev);
1575         int i, err = 0;
1576
1577         if (has_old_autopwm(data)) {
1578                 for (i = 0; i < 3; i++) {
1579                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1580                                 err = -EINVAL;
1581                 }
1582                 for (i = 0; i < 2; i++) {
1583                         if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1584                                 err = -EINVAL;
1585                 }
1586         } else if (has_newer_autopwm(data)) {
1587                 for (i = 1; i < 3; i++) {
1588                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1589                                 err = -EINVAL;
1590                 }
1591         }
1592
1593         if (err) {
1594                 dev_err(dev,
1595                         "Inconsistent trip points, not switching to automatic mode\n");
1596                 dev_err(dev, "Adjust the trip points and try again\n");
1597         }
1598         return err;
1599 }
1600
1601 static ssize_t set_pwm_enable(struct device *dev, struct device_attribute *attr,
1602                               const char *buf, size_t count)
1603 {
1604         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1605         struct it87_data *data = dev_get_drvdata(dev);
1606         int nr = sensor_attr->index;
1607         long val;
1608
1609         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
1610                 return -EINVAL;
1611
1612         /* Check trip points before switching to automatic mode */
1613         if (val == 2) {
1614                 if (check_trip_points(dev, nr) < 0)
1615                         return -EINVAL;
1616         }
1617
1618         mutex_lock(&data->update_lock);
1619
1620         if (val == 0) {
1621                 if (nr < 3 && has_fanctl_onoff(data)) {
1622                         int tmp;
1623                         /* make sure the fan is on when in on/off mode */
1624                         tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1625                         it87_write_value(data, IT87_REG_FAN_CTL, tmp | BIT(nr));
1626                         /* set on/off mode */
1627                         data->fan_main_ctrl &= ~BIT(nr);
1628                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1629                                          data->fan_main_ctrl);
1630                 } else {
1631                         u8 ctrl;
1632
1633                         /* No on/off mode, set maximum pwm value */
1634                         data->pwm_duty[nr] = pwm_to_reg(data, 0xff);
1635                         it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1636                                          data->pwm_duty[nr]);
1637                         /* and set manual mode */
1638                         if (has_newer_autopwm(data)) {
1639                                 ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1640                                         data->pwm_temp_map[nr];
1641                         } else {
1642                                 ctrl = data->pwm_duty[nr];
1643                         }
1644                         data->pwm_ctrl[nr] = ctrl;
1645                         it87_write_value(data, data->REG_PWM[nr], ctrl);
1646                 }
1647         } else {
1648                 u8 ctrl;
1649
1650                 if (has_newer_autopwm(data)) {
1651                         ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1652                                 data->pwm_temp_map[nr];
1653                         if (val != 1)
1654                                 ctrl |= 0x80;
1655                 } else {
1656                         ctrl = (val == 1 ? data->pwm_duty[nr] : 0x80);
1657                 }
1658                 data->pwm_ctrl[nr] = ctrl;
1659                 it87_write_value(data, data->REG_PWM[nr], ctrl);
1660
1661                 if (has_fanctl_onoff(data) && nr < 3) {
1662                         /* set SmartGuardian mode */
1663                         data->fan_main_ctrl |= BIT(nr);
1664                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1665                                          data->fan_main_ctrl);
1666                 }
1667         }
1668
1669         mutex_unlock(&data->update_lock);
1670         return count;
1671 }
1672
1673 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1674                        const char *buf, size_t count)
1675 {
1676         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1677         struct it87_data *data = dev_get_drvdata(dev);
1678         int nr = sensor_attr->index;
1679         long val;
1680
1681         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1682                 return -EINVAL;
1683
1684         mutex_lock(&data->update_lock);
1685         it87_update_pwm_ctrl(data, nr);
1686         if (has_newer_autopwm(data)) {
1687                 /*
1688                  * If we are in automatic mode, the PWM duty cycle register
1689                  * is read-only so we can't write the value.
1690                  */
1691                 if (data->pwm_ctrl[nr] & 0x80) {
1692                         mutex_unlock(&data->update_lock);
1693                         return -EBUSY;
1694                 }
1695                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1696                 it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1697                                  data->pwm_duty[nr]);
1698         } else {
1699                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1700                 /*
1701                  * If we are in manual mode, write the duty cycle immediately;
1702                  * otherwise, just store it for later use.
1703                  */
1704                 if (!(data->pwm_ctrl[nr] & 0x80)) {
1705                         data->pwm_ctrl[nr] = data->pwm_duty[nr];
1706                         it87_write_value(data, data->REG_PWM[nr],
1707                                          data->pwm_ctrl[nr]);
1708                 }
1709         }
1710         mutex_unlock(&data->update_lock);
1711         return count;
1712 }
1713
1714 static ssize_t set_pwm_freq(struct device *dev, struct device_attribute *attr,
1715                             const char *buf, size_t count)
1716 {
1717         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1718         struct it87_data *data = dev_get_drvdata(dev);
1719         int nr = sensor_attr->index;
1720         unsigned long val;
1721         int i;
1722
1723         if (kstrtoul(buf, 10, &val) < 0)
1724                 return -EINVAL;
1725
1726         val = clamp_val(val, 0, 1000000);
1727         val *= has_newer_autopwm(data) ? 256 : 128;
1728
1729         /* Search for the nearest available frequency */
1730         for (i = 0; i < 7; i++) {
1731                 if (val > (pwm_freq[i] + pwm_freq[i + 1]) / 2)
1732                         break;
1733         }
1734
1735         mutex_lock(&data->update_lock);
1736         if (nr == 0) {
1737                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
1738                 data->fan_ctl |= i << 4;
1739                 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
1740         } else {
1741                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x8f;
1742                 data->extra |= i << 4;
1743                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1744         }
1745         mutex_unlock(&data->update_lock);
1746
1747         return count;
1748 }
1749
1750 static ssize_t show_pwm_temp_map(struct device *dev,
1751                                  struct device_attribute *attr, char *buf)
1752 {
1753         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1754         struct it87_data *data = it87_update_device(dev);
1755         int nr = sensor_attr->index;
1756         int map;
1757
1758         map = data->pwm_temp_map[nr];
1759         if (has_new_tempmap(data)) {
1760                 map >>= 3;
1761                 if (map >= 6)
1762                         map = 0;        /* Should never happen */
1763         } else {
1764                 if (map >= 3)
1765                         map = 0;        /* Should never happen */
1766                 if (nr >= 3)            /* pwm channels 3..6 map to temp4..6 */
1767                         map += 3;
1768         }
1769
1770         return sprintf(buf, "%d\n", (int)BIT(map));
1771 }
1772
1773 static ssize_t set_pwm_temp_map(struct device *dev,
1774                                 struct device_attribute *attr, const char *buf,
1775                                 size_t count)
1776 {
1777         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1778         struct it87_data *data = dev_get_drvdata(dev);
1779         int nr = sensor_attr->index;
1780         long val;
1781         u8 reg;
1782
1783         if (kstrtol(buf, 10, &val) < 0)
1784                 return -EINVAL;
1785
1786         if (nr >= 3 && !has_new_tempmap(data))
1787                 val -= 3;
1788
1789         switch (val) {
1790         case BIT(0):
1791                 reg = 0x00;
1792                 break;
1793         case BIT(1):
1794                 reg = 0x01;
1795                 break;
1796         case BIT(2):
1797                 reg = 0x02;
1798                 break;
1799         case BIT(3):
1800                 reg = 0x03;
1801                 break;
1802         case BIT(4):
1803                 reg = 0x04;
1804                 break;
1805         case BIT(5):
1806                 reg = 0x05;
1807                 break;
1808         case BIT(6):
1809                 reg = 0x06;
1810                 break;
1811         default:
1812                 return -EINVAL;
1813         }
1814
1815         if (has_new_tempmap(data))
1816                 reg <<= 3;
1817         else if (reg > 0x02)
1818                 return -EINVAL;
1819
1820         mutex_lock(&data->update_lock);
1821         it87_update_pwm_ctrl(data, nr);
1822         data->pwm_temp_map[nr] = reg;
1823         /*
1824          * If we are in automatic mode, write the temp mapping immediately;
1825          * otherwise, just store it for later use.
1826          */
1827         if (data->pwm_ctrl[nr] & 0x80) {
1828                 u8 mask = has_new_tempmap(data) ? 0xc7 : 0xfc;
1829
1830                 data->pwm_ctrl[nr] = (data->pwm_ctrl[nr] & mask) |
1831                                                 data->pwm_temp_map[nr];
1832                 it87_write_value(data, data->REG_PWM[nr], data->pwm_ctrl[nr]);
1833         }
1834         mutex_unlock(&data->update_lock);
1835         return count;
1836 }
1837
1838 static ssize_t show_auto_pwm(struct device *dev, struct device_attribute *attr,
1839                              char *buf)
1840 {
1841         struct it87_data *data = it87_update_device(dev);
1842         struct sensor_device_attribute_2 *sensor_attr =
1843                         to_sensor_dev_attr_2(attr);
1844         int nr = sensor_attr->nr;
1845         int point = sensor_attr->index;
1846
1847         return sprintf(buf, "%d\n",
1848                        pwm_from_reg(data, data->auto_pwm[nr][point]));
1849 }
1850
1851 static ssize_t set_auto_pwm(struct device *dev, struct device_attribute *attr,
1852                             const char *buf, size_t count)
1853 {
1854         struct it87_data *data = dev_get_drvdata(dev);
1855         struct sensor_device_attribute_2 *sensor_attr =
1856                         to_sensor_dev_attr_2(attr);
1857         int nr = sensor_attr->nr;
1858         int point = sensor_attr->index;
1859         int regaddr;
1860         long val;
1861
1862         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1863                 return -EINVAL;
1864
1865         mutex_lock(&data->update_lock);
1866         data->auto_pwm[nr][point] = pwm_to_reg(data, val);
1867         if (has_newer_autopwm(data))
1868                 regaddr = IT87_REG_AUTO_TEMP(nr, 3);
1869         else
1870                 regaddr = IT87_REG_AUTO_PWM(nr, point);
1871         it87_write_value(data, regaddr, data->auto_pwm[nr][point]);
1872         mutex_unlock(&data->update_lock);
1873         return count;
1874 }
1875
1876 static ssize_t show_auto_pwm_slope(struct device *dev,
1877                                    struct device_attribute *attr, char *buf)
1878 {
1879         struct it87_data *data = it87_update_device(dev);
1880         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1881         int nr = sensor_attr->index;
1882
1883         return sprintf(buf, "%d\n", data->auto_pwm[nr][1] & 0x7f);
1884 }
1885
1886 static ssize_t set_auto_pwm_slope(struct device *dev,
1887                                   struct device_attribute *attr,
1888                                   const char *buf, size_t count)
1889 {
1890         struct it87_data *data = dev_get_drvdata(dev);
1891         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1892         int nr = sensor_attr->index;
1893         unsigned long val;
1894
1895         if (kstrtoul(buf, 10, &val) < 0 || val > 127)
1896                 return -EINVAL;
1897
1898         mutex_lock(&data->update_lock);
1899         data->auto_pwm[nr][1] = (data->auto_pwm[nr][1] & 0x80) | val;
1900         it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 4),
1901                          data->auto_pwm[nr][1]);
1902         mutex_unlock(&data->update_lock);
1903         return count;
1904 }
1905
1906 static ssize_t show_auto_temp(struct device *dev, struct device_attribute *attr,
1907                               char *buf)
1908 {
1909         struct it87_data *data = it87_update_device(dev);
1910         struct sensor_device_attribute_2 *sensor_attr =
1911                         to_sensor_dev_attr_2(attr);
1912         int nr = sensor_attr->nr;
1913         int point = sensor_attr->index;
1914         int reg;
1915
1916         if (has_old_autopwm(data) || point)
1917                 reg = data->auto_temp[nr][point];
1918         else
1919                 reg = data->auto_temp[nr][1] - (data->auto_temp[nr][0] & 0x1f);
1920
1921         return sprintf(buf, "%d\n", TEMP_FROM_REG(reg));
1922 }
1923
1924 static ssize_t set_auto_temp(struct device *dev, struct device_attribute *attr,
1925                              const char *buf, size_t count)
1926 {
1927         struct it87_data *data = dev_get_drvdata(dev);
1928         struct sensor_device_attribute_2 *sensor_attr =
1929                         to_sensor_dev_attr_2(attr);
1930         int nr = sensor_attr->nr;
1931         int point = sensor_attr->index;
1932         long val;
1933         int reg;
1934
1935         if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
1936                 return -EINVAL;
1937
1938         mutex_lock(&data->update_lock);
1939         if (has_newer_autopwm(data) && !point) {
1940                 reg = data->auto_temp[nr][1] - TEMP_TO_REG(val);
1941                 reg = clamp_val(reg, 0, 0x1f) | (data->auto_temp[nr][0] & 0xe0);
1942                 data->auto_temp[nr][0] = reg;
1943                 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 5), reg);
1944         } else {
1945                 reg = TEMP_TO_REG(val);
1946                 data->auto_temp[nr][point] = reg;
1947                 if (has_newer_autopwm(data))
1948                         point--;
1949                 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point), reg);
1950         }
1951         mutex_unlock(&data->update_lock);
1952         return count;
1953 }
1954
1955 static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
1956 static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1957                             0, 1);
1958 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
1959                           set_fan_div, 0);
1960
1961 static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
1962 static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1963                             1, 1);
1964 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
1965                           set_fan_div, 1);
1966
1967 static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
1968 static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1969                             2, 1);
1970 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
1971                           set_fan_div, 2);
1972
1973 static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
1974 static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1975                             3, 1);
1976
1977 static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
1978 static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1979                             4, 1);
1980
1981 static SENSOR_DEVICE_ATTR_2(fan6_input, S_IRUGO, show_fan, NULL, 5, 0);
1982 static SENSOR_DEVICE_ATTR_2(fan6_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1983                             5, 1);
1984
1985 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
1986                           show_pwm_enable, set_pwm_enable, 0);
1987 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0);
1988 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq,
1989                           set_pwm_freq, 0);
1990 static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO,
1991                           show_pwm_temp_map, set_pwm_temp_map, 0);
1992 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR,
1993                             show_auto_pwm, set_auto_pwm, 0, 0);
1994 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR,
1995                             show_auto_pwm, set_auto_pwm, 0, 1);
1996 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR,
1997                             show_auto_pwm, set_auto_pwm, 0, 2);
1998 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO,
1999                             show_auto_pwm, NULL, 0, 3);
2000 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
2001                             show_auto_temp, set_auto_temp, 0, 1);
2002 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2003                             show_auto_temp, set_auto_temp, 0, 0);
2004 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
2005                             show_auto_temp, set_auto_temp, 0, 2);
2006 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
2007                             show_auto_temp, set_auto_temp, 0, 3);
2008 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR,
2009                             show_auto_temp, set_auto_temp, 0, 4);
2010 static SENSOR_DEVICE_ATTR_2(pwm1_auto_start, S_IRUGO | S_IWUSR,
2011                             show_auto_pwm, set_auto_pwm, 0, 0);
2012 static SENSOR_DEVICE_ATTR(pwm1_auto_slope, S_IRUGO | S_IWUSR,
2013                           show_auto_pwm_slope, set_auto_pwm_slope, 0);
2014
2015 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
2016                           show_pwm_enable, set_pwm_enable, 1);
2017 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1);
2018 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, set_pwm_freq, 1);
2019 static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO,
2020                           show_pwm_temp_map, set_pwm_temp_map, 1);
2021 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR,
2022                             show_auto_pwm, set_auto_pwm, 1, 0);
2023 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR,
2024                             show_auto_pwm, set_auto_pwm, 1, 1);
2025 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR,
2026                             show_auto_pwm, set_auto_pwm, 1, 2);
2027 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO,
2028                             show_auto_pwm, NULL, 1, 3);
2029 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
2030                             show_auto_temp, set_auto_temp, 1, 1);
2031 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2032                             show_auto_temp, set_auto_temp, 1, 0);
2033 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
2034                             show_auto_temp, set_auto_temp, 1, 2);
2035 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
2036                             show_auto_temp, set_auto_temp, 1, 3);
2037 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR,
2038                             show_auto_temp, set_auto_temp, 1, 4);
2039 static SENSOR_DEVICE_ATTR_2(pwm2_auto_start, S_IRUGO | S_IWUSR,
2040                             show_auto_pwm, set_auto_pwm, 1, 0);
2041 static SENSOR_DEVICE_ATTR(pwm2_auto_slope, S_IRUGO | S_IWUSR,
2042                           show_auto_pwm_slope, set_auto_pwm_slope, 1);
2043
2044 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
2045                           show_pwm_enable, set_pwm_enable, 2);
2046 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2);
2047 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL, 2);
2048 static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO,
2049                           show_pwm_temp_map, set_pwm_temp_map, 2);
2050 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR,
2051                             show_auto_pwm, set_auto_pwm, 2, 0);
2052 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR,
2053                             show_auto_pwm, set_auto_pwm, 2, 1);
2054 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR,
2055                             show_auto_pwm, set_auto_pwm, 2, 2);
2056 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO,
2057                             show_auto_pwm, NULL, 2, 3);
2058 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
2059                             show_auto_temp, set_auto_temp, 2, 1);
2060 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2061                             show_auto_temp, set_auto_temp, 2, 0);
2062 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
2063                             show_auto_temp, set_auto_temp, 2, 2);
2064 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
2065                             show_auto_temp, set_auto_temp, 2, 3);
2066 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR,
2067                             show_auto_temp, set_auto_temp, 2, 4);
2068 static SENSOR_DEVICE_ATTR_2(pwm3_auto_start, S_IRUGO | S_IWUSR,
2069                             show_auto_pwm, set_auto_pwm, 2, 0);
2070 static SENSOR_DEVICE_ATTR(pwm3_auto_slope, S_IRUGO | S_IWUSR,
2071                           show_auto_pwm_slope, set_auto_pwm_slope, 2);
2072
2073 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IRUGO | S_IWUSR,
2074                           show_pwm_enable, set_pwm_enable, 3);
2075 static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 3);
2076 static SENSOR_DEVICE_ATTR(pwm4_freq, S_IRUGO, show_pwm_freq, NULL, 3);
2077 static SENSOR_DEVICE_ATTR(pwm4_auto_channels_temp, S_IRUGO,
2078                           show_pwm_temp_map, set_pwm_temp_map, 3);
2079 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp, S_IRUGO | S_IWUSR,
2080                             show_auto_temp, set_auto_temp, 2, 1);
2081 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2082                             show_auto_temp, set_auto_temp, 2, 0);
2083 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point2_temp, S_IRUGO | S_IWUSR,
2084                             show_auto_temp, set_auto_temp, 2, 2);
2085 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point3_temp, S_IRUGO | S_IWUSR,
2086                             show_auto_temp, set_auto_temp, 2, 3);
2087 static SENSOR_DEVICE_ATTR_2(pwm4_auto_start, S_IRUGO | S_IWUSR,
2088                             show_auto_pwm, set_auto_pwm, 3, 0);
2089 static SENSOR_DEVICE_ATTR(pwm4_auto_slope, S_IRUGO | S_IWUSR,
2090                           show_auto_pwm_slope, set_auto_pwm_slope, 3);
2091
2092 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IRUGO | S_IWUSR,
2093                           show_pwm_enable, set_pwm_enable, 4);
2094 static SENSOR_DEVICE_ATTR(pwm5, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 4);
2095 static SENSOR_DEVICE_ATTR(pwm5_freq, S_IRUGO, show_pwm_freq, NULL, 4);
2096 static SENSOR_DEVICE_ATTR(pwm5_auto_channels_temp, S_IRUGO,
2097                           show_pwm_temp_map, set_pwm_temp_map, 4);
2098 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp, S_IRUGO | S_IWUSR,
2099                             show_auto_temp, set_auto_temp, 2, 1);
2100 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2101                             show_auto_temp, set_auto_temp, 2, 0);
2102 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point2_temp, S_IRUGO | S_IWUSR,
2103                             show_auto_temp, set_auto_temp, 2, 2);
2104 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point3_temp, S_IRUGO | S_IWUSR,
2105                             show_auto_temp, set_auto_temp, 2, 3);
2106 static SENSOR_DEVICE_ATTR_2(pwm5_auto_start, S_IRUGO | S_IWUSR,
2107                             show_auto_pwm, set_auto_pwm, 4, 0);
2108 static SENSOR_DEVICE_ATTR(pwm5_auto_slope, S_IRUGO | S_IWUSR,
2109                           show_auto_pwm_slope, set_auto_pwm_slope, 4);
2110
2111 static SENSOR_DEVICE_ATTR(pwm6_enable, S_IRUGO | S_IWUSR,
2112                           show_pwm_enable, set_pwm_enable, 5);
2113 static SENSOR_DEVICE_ATTR(pwm6, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 5);
2114 static SENSOR_DEVICE_ATTR(pwm6_freq, S_IRUGO, show_pwm_freq, NULL, 5);
2115 static SENSOR_DEVICE_ATTR(pwm6_auto_channels_temp, S_IRUGO,
2116                           show_pwm_temp_map, set_pwm_temp_map, 5);
2117 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp, S_IRUGO | S_IWUSR,
2118                             show_auto_temp, set_auto_temp, 2, 1);
2119 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2120                             show_auto_temp, set_auto_temp, 2, 0);
2121 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point2_temp, S_IRUGO | S_IWUSR,
2122                             show_auto_temp, set_auto_temp, 2, 2);
2123 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point3_temp, S_IRUGO | S_IWUSR,
2124                             show_auto_temp, set_auto_temp, 2, 3);
2125 static SENSOR_DEVICE_ATTR_2(pwm6_auto_start, S_IRUGO | S_IWUSR,
2126                             show_auto_pwm, set_auto_pwm, 5, 0);
2127 static SENSOR_DEVICE_ATTR(pwm6_auto_slope, S_IRUGO | S_IWUSR,
2128                           show_auto_pwm_slope, set_auto_pwm_slope, 5);
2129
2130 /* Alarms */
2131 static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
2132                            char *buf)
2133 {
2134         struct it87_data *data = it87_update_device(dev);
2135
2136         return sprintf(buf, "%u\n", data->alarms);
2137 }
2138 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
2139
2140 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
2141                           char *buf)
2142 {
2143         struct it87_data *data = it87_update_device(dev);
2144         int bitnr = to_sensor_dev_attr(attr)->index;
2145
2146         return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
2147 }
2148
2149 static ssize_t clear_intrusion(struct device *dev,
2150                                struct device_attribute *attr, const char *buf,
2151                                size_t count)
2152 {
2153         struct it87_data *data = dev_get_drvdata(dev);
2154         int config;
2155         long val;
2156
2157         if (kstrtol(buf, 10, &val) < 0 || val != 0)
2158                 return -EINVAL;
2159
2160         mutex_lock(&data->update_lock);
2161         config = it87_read_value(data, IT87_REG_CONFIG);
2162         if (config < 0) {
2163                 count = config;
2164         } else {
2165                 config |= BIT(5);
2166                 it87_write_value(data, IT87_REG_CONFIG, config);
2167                 /* Invalidate cache to force re-read */
2168                 data->valid = 0;
2169         }
2170         mutex_unlock(&data->update_lock);
2171
2172         return count;
2173 }
2174
2175 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
2176 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
2177 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
2178 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
2179 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
2180 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
2181 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
2182 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
2183 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
2184 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
2185 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
2186 static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
2187 static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
2188 static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 7);
2189 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
2190 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
2191 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
2192 static SENSOR_DEVICE_ATTR(temp4_alarm, S_IRUGO, show_alarm, NULL, 19);
2193 static SENSOR_DEVICE_ATTR(temp5_alarm, S_IRUGO, show_alarm, NULL, 20);
2194 static SENSOR_DEVICE_ATTR(temp6_alarm, S_IRUGO, show_alarm, NULL, 21);
2195 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
2196                           show_alarm, clear_intrusion, 4);
2197
2198 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
2199                          char *buf)
2200 {
2201         struct it87_data *data = it87_update_device(dev);
2202         int bitnr = to_sensor_dev_attr(attr)->index;
2203
2204         return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
2205 }
2206
2207 static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
2208                         const char *buf, size_t count)
2209 {
2210         int bitnr = to_sensor_dev_attr(attr)->index;
2211         struct it87_data *data = dev_get_drvdata(dev);
2212         long val;
2213
2214         if (kstrtol(buf, 10, &val) < 0 || (val != 0 && val != 1))
2215                 return -EINVAL;
2216
2217         mutex_lock(&data->update_lock);
2218         data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
2219         if (val)
2220                 data->beeps |= BIT(bitnr);
2221         else
2222                 data->beeps &= ~BIT(bitnr);
2223         it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
2224         mutex_unlock(&data->update_lock);
2225         return count;
2226 }
2227
2228 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
2229                           show_beep, set_beep, 1);
2230 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
2231 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
2232 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
2233 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
2234 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
2235 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
2236 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
2237 /* fanX_beep writability is set later */
2238 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
2239 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
2240 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
2241 static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
2242 static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
2243 static SENSOR_DEVICE_ATTR(fan6_beep, S_IRUGO, show_beep, set_beep, 0);
2244 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
2245                           show_beep, set_beep, 2);
2246 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
2247 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
2248 static SENSOR_DEVICE_ATTR(temp4_beep, S_IRUGO, show_beep, NULL, 2);
2249 static SENSOR_DEVICE_ATTR(temp5_beep, S_IRUGO, show_beep, NULL, 2);
2250 static SENSOR_DEVICE_ATTR(temp6_beep, S_IRUGO, show_beep, NULL, 2);
2251
2252 static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
2253                             char *buf)
2254 {
2255         struct it87_data *data = dev_get_drvdata(dev);
2256
2257         return sprintf(buf, "%u\n", data->vrm);
2258 }
2259
2260 static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
2261                              const char *buf, size_t count)
2262 {
2263         struct it87_data *data = dev_get_drvdata(dev);
2264         unsigned long val;
2265
2266         if (kstrtoul(buf, 10, &val) < 0)
2267                 return -EINVAL;
2268
2269         data->vrm = val;
2270
2271         return count;
2272 }
2273 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
2274
2275 static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
2276                             char *buf)
2277 {
2278         struct it87_data *data = it87_update_device(dev);
2279
2280         return sprintf(buf, "%ld\n", (long)vid_from_reg(data->vid, data->vrm));
2281 }
2282 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
2283
2284 static ssize_t show_label(struct device *dev, struct device_attribute *attr,
2285                           char *buf)
2286 {
2287         static const char * const labels[] = {
2288                 "+5V",
2289                 "5VSB",
2290                 "Vbat",
2291                 "AVCC",
2292         };
2293         static const char * const labels_it8721[] = {
2294                 "+3.3V",
2295                 "3VSB",
2296                 "Vbat",
2297                 "+3.3V",
2298         };
2299         struct it87_data *data = dev_get_drvdata(dev);
2300         int nr = to_sensor_dev_attr(attr)->index;
2301         const char *label;
2302
2303         if (has_vin3_5v(data) && nr == 0)
2304                 label = labels[0];
2305         else if (has_12mv_adc(data) || has_10_9mv_adc(data) ||
2306                  has_11mv_adc(data))
2307                 label = labels_it8721[nr];
2308         else
2309                 label = labels[nr];
2310
2311         return sprintf(buf, "%s\n", label);
2312 }
2313 static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
2314 static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
2315 static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
2316 /* AVCC3 */
2317 static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 3);
2318
2319 static umode_t it87_in_is_visible(struct kobject *kobj,
2320                                   struct attribute *attr, int index)
2321 {
2322         struct device *dev = container_of(kobj, struct device, kobj);
2323         struct it87_data *data = dev_get_drvdata(dev);
2324         int i = index / 5;      /* voltage index */
2325         int a = index % 5;      /* attribute index */
2326
2327         if (index >= 40) {      /* in8 and higher only have input attributes */
2328                 i = index - 40 + 8;
2329                 a = 0;
2330         }
2331
2332         if (!(data->has_in & BIT(i)))
2333                 return 0;
2334
2335         if (a == 4 && !data->has_beep)
2336                 return 0;
2337
2338         return attr->mode;
2339 }
2340
2341 static struct attribute *it87_attributes_in[] = {
2342         &sensor_dev_attr_in0_input.dev_attr.attr,
2343         &sensor_dev_attr_in0_min.dev_attr.attr,
2344         &sensor_dev_attr_in0_max.dev_attr.attr,
2345         &sensor_dev_attr_in0_alarm.dev_attr.attr,
2346         &sensor_dev_attr_in0_beep.dev_attr.attr,        /* 4 */
2347
2348         &sensor_dev_attr_in1_input.dev_attr.attr,
2349         &sensor_dev_attr_in1_min.dev_attr.attr,
2350         &sensor_dev_attr_in1_max.dev_attr.attr,
2351         &sensor_dev_attr_in1_alarm.dev_attr.attr,
2352         &sensor_dev_attr_in1_beep.dev_attr.attr,        /* 9 */
2353
2354         &sensor_dev_attr_in2_input.dev_attr.attr,
2355         &sensor_dev_attr_in2_min.dev_attr.attr,
2356         &sensor_dev_attr_in2_max.dev_attr.attr,
2357         &sensor_dev_attr_in2_alarm.dev_attr.attr,
2358         &sensor_dev_attr_in2_beep.dev_attr.attr,        /* 14 */
2359
2360         &sensor_dev_attr_in3_input.dev_attr.attr,
2361         &sensor_dev_attr_in3_min.dev_attr.attr,
2362         &sensor_dev_attr_in3_max.dev_attr.attr,
2363         &sensor_dev_attr_in3_alarm.dev_attr.attr,
2364         &sensor_dev_attr_in3_beep.dev_attr.attr,        /* 19 */
2365
2366         &sensor_dev_attr_in4_input.dev_attr.attr,
2367         &sensor_dev_attr_in4_min.dev_attr.attr,
2368         &sensor_dev_attr_in4_max.dev_attr.attr,
2369         &sensor_dev_attr_in4_alarm.dev_attr.attr,
2370         &sensor_dev_attr_in4_beep.dev_attr.attr,        /* 24 */
2371
2372         &sensor_dev_attr_in5_input.dev_attr.attr,
2373         &sensor_dev_attr_in5_min.dev_attr.attr,
2374         &sensor_dev_attr_in5_max.dev_attr.attr,
2375         &sensor_dev_attr_in5_alarm.dev_attr.attr,
2376         &sensor_dev_attr_in5_beep.dev_attr.attr,        /* 29 */
2377
2378         &sensor_dev_attr_in6_input.dev_attr.attr,
2379         &sensor_dev_attr_in6_min.dev_attr.attr,
2380         &sensor_dev_attr_in6_max.dev_attr.attr,
2381         &sensor_dev_attr_in6_alarm.dev_attr.attr,
2382         &sensor_dev_attr_in6_beep.dev_attr.attr,        /* 34 */
2383
2384         &sensor_dev_attr_in7_input.dev_attr.attr,
2385         &sensor_dev_attr_in7_min.dev_attr.attr,
2386         &sensor_dev_attr_in7_max.dev_attr.attr,
2387         &sensor_dev_attr_in7_alarm.dev_attr.attr,
2388         &sensor_dev_attr_in7_beep.dev_attr.attr,        /* 39 */
2389
2390         &sensor_dev_attr_in8_input.dev_attr.attr,       /* 40 */
2391         &sensor_dev_attr_in9_input.dev_attr.attr,       /* 41 */
2392         &sensor_dev_attr_in10_input.dev_attr.attr,      /* 42 */
2393         &sensor_dev_attr_in11_input.dev_attr.attr,      /* 43 */
2394         &sensor_dev_attr_in12_input.dev_attr.attr,      /* 44 */
2395         NULL
2396 };
2397
2398 static const struct attribute_group it87_group_in = {
2399         .attrs = it87_attributes_in,
2400         .is_visible = it87_in_is_visible,
2401 };
2402
2403 static umode_t it87_temp_is_visible(struct kobject *kobj,
2404                                     struct attribute *attr, int index)
2405 {
2406         struct device *dev = container_of(kobj, struct device, kobj);
2407         struct it87_data *data = dev_get_drvdata(dev);
2408         int i = index / 7;      /* temperature index */
2409         int a = index % 7;      /* attribute index */
2410
2411         if (!(data->has_temp & BIT(i)))
2412                 return 0;
2413
2414         if (a && i >= data->num_temp_limit)
2415                 return 0;
2416
2417         if (a == 3) {
2418                 int type = get_temp_type(data, i);
2419
2420                 if (type == 0)
2421                         return 0;
2422                 if (has_bank_sel(data))
2423                         return 0444;
2424                 return attr->mode;
2425         }
2426
2427         if (a == 5 && !has_temp_offset(data))
2428                 return 0;
2429
2430         if (a == 6 && !data->has_beep)
2431                 return 0;
2432
2433         return attr->mode;
2434 }
2435
2436 static struct attribute *it87_attributes_temp[] = {
2437         &sensor_dev_attr_temp1_input.dev_attr.attr,
2438         &sensor_dev_attr_temp1_max.dev_attr.attr,
2439         &sensor_dev_attr_temp1_min.dev_attr.attr,
2440         &sensor_dev_attr_temp1_type.dev_attr.attr,      /* 3 */
2441         &sensor_dev_attr_temp1_alarm.dev_attr.attr,
2442         &sensor_dev_attr_temp1_offset.dev_attr.attr,    /* 5 */
2443         &sensor_dev_attr_temp1_beep.dev_attr.attr,      /* 6 */
2444
2445         &sensor_dev_attr_temp2_input.dev_attr.attr,     /* 7 */
2446         &sensor_dev_attr_temp2_max.dev_attr.attr,
2447         &sensor_dev_attr_temp2_min.dev_attr.attr,
2448         &sensor_dev_attr_temp2_type.dev_attr.attr,
2449         &sensor_dev_attr_temp2_alarm.dev_attr.attr,
2450         &sensor_dev_attr_temp2_offset.dev_attr.attr,
2451         &sensor_dev_attr_temp2_beep.dev_attr.attr,
2452
2453         &sensor_dev_attr_temp3_input.dev_attr.attr,     /* 14 */
2454         &sensor_dev_attr_temp3_max.dev_attr.attr,
2455         &sensor_dev_attr_temp3_min.dev_attr.attr,
2456         &sensor_dev_attr_temp3_type.dev_attr.attr,
2457         &sensor_dev_attr_temp3_alarm.dev_attr.attr,
2458         &sensor_dev_attr_temp3_offset.dev_attr.attr,
2459         &sensor_dev_attr_temp3_beep.dev_attr.attr,
2460
2461         &sensor_dev_attr_temp4_input.dev_attr.attr,     /* 21 */
2462         &sensor_dev_attr_temp4_max.dev_attr.attr,
2463         &sensor_dev_attr_temp4_min.dev_attr.attr,
2464         &sensor_dev_attr_temp4_type.dev_attr.attr,
2465         &sensor_dev_attr_temp4_alarm.dev_attr.attr,
2466         &sensor_dev_attr_temp4_offset.dev_attr.attr,
2467         &sensor_dev_attr_temp4_beep.dev_attr.attr,
2468
2469         &sensor_dev_attr_temp5_input.dev_attr.attr,
2470         &sensor_dev_attr_temp5_max.dev_attr.attr,
2471         &sensor_dev_attr_temp5_min.dev_attr.attr,
2472         &sensor_dev_attr_temp5_type.dev_attr.attr,
2473         &sensor_dev_attr_temp5_alarm.dev_attr.attr,
2474         &sensor_dev_attr_temp5_offset.dev_attr.attr,
2475         &sensor_dev_attr_temp5_beep.dev_attr.attr,
2476
2477         &sensor_dev_attr_temp6_input.dev_attr.attr,
2478         &sensor_dev_attr_temp6_max.dev_attr.attr,
2479         &sensor_dev_attr_temp6_min.dev_attr.attr,
2480         &sensor_dev_attr_temp6_type.dev_attr.attr,
2481         &sensor_dev_attr_temp6_alarm.dev_attr.attr,
2482         &sensor_dev_attr_temp6_offset.dev_attr.attr,
2483         &sensor_dev_attr_temp6_beep.dev_attr.attr,
2484         NULL
2485 };
2486
2487 static const struct attribute_group it87_group_temp = {
2488         .attrs = it87_attributes_temp,
2489         .is_visible = it87_temp_is_visible,
2490 };
2491
2492 static umode_t it87_is_visible(struct kobject *kobj,
2493                                struct attribute *attr, int index)
2494 {
2495         struct device *dev = container_of(kobj, struct device, kobj);
2496         struct it87_data *data = dev_get_drvdata(dev);
2497
2498         if ((index == 2 || index == 3) && !data->has_vid)
2499                 return 0;
2500
2501         if (index > 3 && !(data->in_internal & BIT(index - 4)))
2502                 return 0;
2503
2504         return attr->mode;
2505 }
2506
2507 static struct attribute *it87_attributes[] = {
2508         &dev_attr_alarms.attr,
2509         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
2510         &dev_attr_vrm.attr,                             /* 2 */
2511         &dev_attr_cpu0_vid.attr,                        /* 3 */
2512         &sensor_dev_attr_in3_label.dev_attr.attr,       /* 4 .. 7 */
2513         &sensor_dev_attr_in7_label.dev_attr.attr,
2514         &sensor_dev_attr_in8_label.dev_attr.attr,
2515         &sensor_dev_attr_in9_label.dev_attr.attr,
2516         NULL
2517 };
2518
2519 static const struct attribute_group it87_group = {
2520         .attrs = it87_attributes,
2521         .is_visible = it87_is_visible,
2522 };
2523
2524 static umode_t it87_fan_is_visible(struct kobject *kobj,
2525                                    struct attribute *attr, int index)
2526 {
2527         struct device *dev = container_of(kobj, struct device, kobj);
2528         struct it87_data *data = dev_get_drvdata(dev);
2529         int i = index / 5;      /* fan index */
2530         int a = index % 5;      /* attribute index */
2531
2532         if (index >= 15) {      /* fan 4..6 don't have divisor attributes */
2533                 i = (index - 15) / 4 + 3;
2534                 a = (index - 15) % 4;
2535         }
2536
2537         if (!(data->has_fan & BIT(i)))
2538                 return 0;
2539
2540         if (a == 3) {                           /* beep */
2541                 if (!data->has_beep)
2542                         return 0;
2543                 /* first fan beep attribute is writable */
2544                 if (i == __ffs(data->has_fan))
2545                         return attr->mode | S_IWUSR;
2546         }
2547
2548         if (a == 4 && has_16bit_fans(data))     /* divisor */
2549                 return 0;
2550
2551         return attr->mode;
2552 }
2553
2554 static struct attribute *it87_attributes_fan[] = {
2555         &sensor_dev_attr_fan1_input.dev_attr.attr,
2556         &sensor_dev_attr_fan1_min.dev_attr.attr,
2557         &sensor_dev_attr_fan1_alarm.dev_attr.attr,
2558         &sensor_dev_attr_fan1_beep.dev_attr.attr,       /* 3 */
2559         &sensor_dev_attr_fan1_div.dev_attr.attr,        /* 4 */
2560
2561         &sensor_dev_attr_fan2_input.dev_attr.attr,
2562         &sensor_dev_attr_fan2_min.dev_attr.attr,
2563         &sensor_dev_attr_fan2_alarm.dev_attr.attr,
2564         &sensor_dev_attr_fan2_beep.dev_attr.attr,
2565         &sensor_dev_attr_fan2_div.dev_attr.attr,        /* 9 */
2566
2567         &sensor_dev_attr_fan3_input.dev_attr.attr,
2568         &sensor_dev_attr_fan3_min.dev_attr.attr,
2569         &sensor_dev_attr_fan3_alarm.dev_attr.attr,
2570         &sensor_dev_attr_fan3_beep.dev_attr.attr,
2571         &sensor_dev_attr_fan3_div.dev_attr.attr,        /* 14 */
2572
2573         &sensor_dev_attr_fan4_input.dev_attr.attr,      /* 15 */
2574         &sensor_dev_attr_fan4_min.dev_attr.attr,
2575         &sensor_dev_attr_fan4_alarm.dev_attr.attr,
2576         &sensor_dev_attr_fan4_beep.dev_attr.attr,
2577
2578         &sensor_dev_attr_fan5_input.dev_attr.attr,      /* 19 */
2579         &sensor_dev_attr_fan5_min.dev_attr.attr,
2580         &sensor_dev_attr_fan5_alarm.dev_attr.attr,
2581         &sensor_dev_attr_fan5_beep.dev_attr.attr,
2582
2583         &sensor_dev_attr_fan6_input.dev_attr.attr,      /* 23 */
2584         &sensor_dev_attr_fan6_min.dev_attr.attr,
2585         &sensor_dev_attr_fan6_alarm.dev_attr.attr,
2586         &sensor_dev_attr_fan6_beep.dev_attr.attr,
2587         NULL
2588 };
2589
2590 static const struct attribute_group it87_group_fan = {
2591         .attrs = it87_attributes_fan,
2592         .is_visible = it87_fan_is_visible,
2593 };
2594
2595 static umode_t it87_pwm_is_visible(struct kobject *kobj,
2596                                    struct attribute *attr, int index)
2597 {
2598         struct device *dev = container_of(kobj, struct device, kobj);
2599         struct it87_data *data = dev_get_drvdata(dev);
2600         int i = index / 4;      /* pwm index */
2601         int a = index % 4;      /* attribute index */
2602
2603         if (!(data->has_pwm & BIT(i)))
2604                 return 0;
2605
2606         /* pwmX_auto_channels_temp is only writable if auto pwm is supported */
2607         if (a == 3 && (has_old_autopwm(data) || has_newer_autopwm(data)))
2608                 return attr->mode | S_IWUSR;
2609
2610         /* pwm2_freq is writable if there are two pwm frequency selects */
2611         if (has_pwm_freq2(data) && i == 1 && a == 2)
2612                 return attr->mode | S_IWUSR;
2613
2614         return attr->mode;
2615 }
2616
2617 static struct attribute *it87_attributes_pwm[] = {
2618         &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2619         &sensor_dev_attr_pwm1.dev_attr.attr,
2620         &sensor_dev_attr_pwm1_freq.dev_attr.attr,
2621         &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
2622
2623         &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2624         &sensor_dev_attr_pwm2.dev_attr.attr,
2625         &sensor_dev_attr_pwm2_freq.dev_attr.attr,
2626         &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
2627
2628         &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2629         &sensor_dev_attr_pwm3.dev_attr.attr,
2630         &sensor_dev_attr_pwm3_freq.dev_attr.attr,
2631         &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
2632
2633         &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2634         &sensor_dev_attr_pwm4.dev_attr.attr,
2635         &sensor_dev_attr_pwm4_freq.dev_attr.attr,
2636         &sensor_dev_attr_pwm4_auto_channels_temp.dev_attr.attr,
2637
2638         &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2639         &sensor_dev_attr_pwm5.dev_attr.attr,
2640         &sensor_dev_attr_pwm5_freq.dev_attr.attr,
2641         &sensor_dev_attr_pwm5_auto_channels_temp.dev_attr.attr,
2642
2643         &sensor_dev_attr_pwm6_enable.dev_attr.attr,
2644         &sensor_dev_attr_pwm6.dev_attr.attr,
2645         &sensor_dev_attr_pwm6_freq.dev_attr.attr,
2646         &sensor_dev_attr_pwm6_auto_channels_temp.dev_attr.attr,
2647
2648         NULL
2649 };
2650
2651 static const struct attribute_group it87_group_pwm = {
2652         .attrs = it87_attributes_pwm,
2653         .is_visible = it87_pwm_is_visible,
2654 };
2655
2656 static umode_t it87_auto_pwm_is_visible(struct kobject *kobj,
2657                                         struct attribute *attr, int index)
2658 {
2659         struct device *dev = container_of(kobj, struct device, kobj);
2660         struct it87_data *data = dev_get_drvdata(dev);
2661         int i = index / 11;     /* pwm index */
2662         int a = index % 11;     /* attribute index */
2663
2664         if (index >= 33) {      /* pwm 4..6 */
2665                 i = (index - 33) / 6 + 3;
2666                 a = (index - 33) % 6 + 4;
2667         }
2668
2669         if (!(data->has_pwm & BIT(i)))
2670                 return 0;
2671
2672         if (has_newer_autopwm(data)) {
2673                 if (a < 4)      /* no auto point pwm */
2674                         return 0;
2675                 if (a == 8)     /* no auto_point4 */
2676                         return 0;
2677         }
2678         if (has_old_autopwm(data)) {
2679                 if (a >= 9)     /* no pwm_auto_start, pwm_auto_slope */
2680                         return 0;
2681         }
2682
2683         return attr->mode;
2684 }
2685
2686 static struct attribute *it87_attributes_auto_pwm[] = {
2687         &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
2688         &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
2689         &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
2690         &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
2691         &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
2692         &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
2693         &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
2694         &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
2695         &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
2696         &sensor_dev_attr_pwm1_auto_start.dev_attr.attr,
2697         &sensor_dev_attr_pwm1_auto_slope.dev_attr.attr,
2698
2699         &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,    /* 11 */
2700         &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
2701         &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
2702         &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
2703         &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
2704         &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
2705         &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
2706         &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
2707         &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
2708         &sensor_dev_attr_pwm2_auto_start.dev_attr.attr,
2709         &sensor_dev_attr_pwm2_auto_slope.dev_attr.attr,
2710
2711         &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,    /* 22 */
2712         &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
2713         &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
2714         &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
2715         &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
2716         &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
2717         &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
2718         &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
2719         &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
2720         &sensor_dev_attr_pwm3_auto_start.dev_attr.attr,
2721         &sensor_dev_attr_pwm3_auto_slope.dev_attr.attr,
2722
2723         &sensor_dev_attr_pwm4_auto_point1_temp.dev_attr.attr,   /* 33 */
2724         &sensor_dev_attr_pwm4_auto_point1_temp_hyst.dev_attr.attr,
2725         &sensor_dev_attr_pwm4_auto_point2_temp.dev_attr.attr,
2726         &sensor_dev_attr_pwm4_auto_point3_temp.dev_attr.attr,
2727         &sensor_dev_attr_pwm4_auto_start.dev_attr.attr,
2728         &sensor_dev_attr_pwm4_auto_slope.dev_attr.attr,
2729
2730         &sensor_dev_attr_pwm5_auto_point1_temp.dev_attr.attr,
2731         &sensor_dev_attr_pwm5_auto_point1_temp_hyst.dev_attr.attr,
2732         &sensor_dev_attr_pwm5_auto_point2_temp.dev_attr.attr,
2733         &sensor_dev_attr_pwm5_auto_point3_temp.dev_attr.attr,
2734         &sensor_dev_attr_pwm5_auto_start.dev_attr.attr,
2735         &sensor_dev_attr_pwm5_auto_slope.dev_attr.attr,
2736
2737         &sensor_dev_attr_pwm6_auto_point1_temp.dev_attr.attr,
2738         &sensor_dev_attr_pwm6_auto_point1_temp_hyst.dev_attr.attr,
2739         &sensor_dev_attr_pwm6_auto_point2_temp.dev_attr.attr,
2740         &sensor_dev_attr_pwm6_auto_point3_temp.dev_attr.attr,
2741         &sensor_dev_attr_pwm6_auto_start.dev_attr.attr,
2742         &sensor_dev_attr_pwm6_auto_slope.dev_attr.attr,
2743
2744         NULL,
2745 };
2746
2747 static const struct attribute_group it87_group_auto_pwm = {
2748         .attrs = it87_attributes_auto_pwm,
2749         .is_visible = it87_auto_pwm_is_visible,
2750 };
2751
2752 /* SuperIO detection - will change isa_address if a chip is found */
2753 static int __init it87_find(int sioaddr, unsigned short *address,
2754                             struct it87_sio_data *sio_data)
2755 {
2756         int err;
2757         u16 chip_type;
2758         const struct it87_devices *config;
2759
2760         err = superio_enter(sioaddr);
2761         if (err)
2762                 return err;
2763
2764         err = -ENODEV;
2765         chip_type = superio_inw(sioaddr, DEVID);
2766         if (chip_type == 0xffff)
2767                 goto exit;
2768
2769         if (force_id)
2770                 chip_type = force_id;
2771
2772         switch (chip_type) {
2773         case IT8705F_DEVID:
2774                 sio_data->type = it87;
2775                 break;
2776         case IT8712F_DEVID:
2777                 sio_data->type = it8712;
2778                 break;
2779         case IT8716F_DEVID:
2780         case IT8726F_DEVID:
2781                 sio_data->type = it8716;
2782                 break;
2783         case IT8718F_DEVID:
2784                 sio_data->type = it8718;
2785                 break;
2786         case IT8720F_DEVID:
2787                 sio_data->type = it8720;
2788                 break;
2789         case IT8721F_DEVID:
2790                 sio_data->type = it8721;
2791                 break;
2792         case IT8728F_DEVID:
2793                 sio_data->type = it8728;
2794                 break;
2795         case IT8732F_DEVID:
2796                 sio_data->type = it8732;
2797                 break;
2798         case IT8792E_DEVID:
2799                 sio_data->type = it8792;
2800                 break;
2801         case IT8771E_DEVID:
2802                 sio_data->type = it8771;
2803                 break;
2804         case IT8772E_DEVID:
2805                 sio_data->type = it8772;
2806                 break;
2807         case IT8781F_DEVID:
2808                 sio_data->type = it8781;
2809                 break;
2810         case IT8782F_DEVID:
2811                 sio_data->type = it8782;
2812                 break;
2813         case IT8783E_DEVID:
2814                 sio_data->type = it8783;
2815                 break;
2816         case IT8786E_DEVID:
2817                 sio_data->type = it8786;
2818                 break;
2819         case IT8790E_DEVID:
2820                 sio_data->type = it8790;
2821                 break;
2822         case IT8603E_DEVID:
2823         case IT8623E_DEVID:
2824                 sio_data->type = it8603;
2825                 break;
2826         case IT8607E_DEVID:
2827                 sio_data->type = it8607;
2828                 break;
2829         case IT8613E_DEVID:
2830                 sio_data->type = it8613;
2831                 break;
2832         case IT8620E_DEVID:
2833                 sio_data->type = it8620;
2834                 break;
2835         case IT8622E_DEVID:
2836                 sio_data->type = it8622;
2837                 break;
2838         case IT8628E_DEVID:
2839                 sio_data->type = it8628;
2840                 break;
2841         case IT8655E_DEVID:
2842                 sio_data->type = it8655;
2843                 break;
2844         case IT8665E_DEVID:
2845                 sio_data->type = it8665;
2846                 break;
2847         case IT8686E_DEVID:
2848                 sio_data->type = it8686;
2849                 break;
2850         case 0xffff:    /* No device at all */
2851                 goto exit;
2852         default:
2853                 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
2854                 goto exit;
2855         }
2856
2857         superio_select(sioaddr, PME);
2858         if (!(superio_inb(sioaddr, IT87_ACT_REG) & 0x01)) {
2859                 pr_info("Device not activated, skipping\n");
2860                 goto exit;
2861         }
2862
2863         *address = superio_inw(sioaddr, IT87_BASE_REG) & ~(IT87_EXTENT - 1);
2864         if (*address == 0) {
2865                 pr_info("Base address not set, skipping\n");
2866                 goto exit;
2867         }
2868
2869         err = 0;
2870         sio_data->revision = superio_inb(sioaddr, DEVREV) & 0x0f;
2871         pr_info("Found IT%04x%s chip at 0x%x, revision %d\n", chip_type,
2872                 it87_devices[sio_data->type].suffix,
2873                 *address, sio_data->revision);
2874
2875         config = &it87_devices[sio_data->type];
2876
2877         /* in7 (VSB or VCCH5V) is always internal on some chips */
2878         if (has_in7_internal(config))
2879                 sio_data->internal |= BIT(1);
2880
2881         /* in8 (Vbat) is always internal */
2882         sio_data->internal |= BIT(2);
2883
2884         /* in9 (AVCC3), always internal if supported */
2885         if (has_avcc3(config))
2886                 sio_data->internal |= BIT(3); /* in9 is AVCC */
2887         else
2888                 sio_data->skip_in |= BIT(9);
2889
2890         if (!has_four_pwm(config))
2891                 sio_data->skip_pwm |= BIT(3) | BIT(4) | BIT(5);
2892         else if (!has_five_pwm(config))
2893                 sio_data->skip_pwm |= BIT(4) | BIT(5);
2894         else if (!has_six_pwm(config))
2895                 sio_data->skip_pwm |= BIT(5);
2896
2897         if (!has_vid(config))
2898                 sio_data->skip_vid = 1;
2899
2900         /* Read GPIO config and VID value from LDN 7 (GPIO) */
2901         if (sio_data->type == it87) {
2902                 /* The IT8705F has a different LD number for GPIO */
2903                 superio_select(sioaddr, 5);
2904                 sio_data->beep_pin = superio_inb(sioaddr,
2905                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2906         } else if (sio_data->type == it8783) {
2907                 int reg25, reg27, reg2a, reg2c, regef;
2908
2909                 superio_select(sioaddr, GPIO);
2910
2911                 reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2912                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2913                 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
2914                 reg2c = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2915                 regef = superio_inb(sioaddr, IT87_SIO_SPI_REG);
2916
2917                 /* Check if fan3 is there or not */
2918                 if ((reg27 & BIT(0)) || !(reg2c & BIT(2)))
2919                         sio_data->skip_fan |= BIT(2);
2920                 if ((reg25 & BIT(4)) ||
2921                     (!(reg2a & BIT(1)) && (regef & BIT(0))))
2922                         sio_data->skip_pwm |= BIT(2);
2923
2924                 /* Check if fan2 is there or not */
2925                 if (reg27 & BIT(7))
2926                         sio_data->skip_fan |= BIT(1);
2927                 if (reg27 & BIT(3))
2928                         sio_data->skip_pwm |= BIT(1);
2929
2930                 /* VIN5 */
2931                 if ((reg27 & BIT(0)) || (reg2c & BIT(2)))
2932                         sio_data->skip_in |= BIT(5); /* No VIN5 */
2933
2934                 /* VIN6 */
2935                 if (reg27 & BIT(1))
2936                         sio_data->skip_in |= BIT(6); /* No VIN6 */
2937
2938                 /*
2939                  * VIN7
2940                  * Does not depend on bit 2 of Reg2C, contrary to datasheet.
2941                  */
2942                 if (reg27 & BIT(2)) {
2943                         /*
2944                          * The data sheet is a bit unclear regarding the
2945                          * internal voltage divider for VCCH5V. It says
2946                          * "This bit enables and switches VIN7 (pin 91) to the
2947                          * internal voltage divider for VCCH5V".
2948                          * This is different to other chips, where the internal
2949                          * voltage divider would connect VIN7 to an internal
2950                          * voltage source. Maybe that is the case here as well.
2951                          *
2952                          * Since we don't know for sure, re-route it if that is
2953                          * not the case, and ask the user to report if the
2954                          * resulting voltage is sane.
2955                          */
2956                         if (!(reg2c & BIT(1))) {
2957                                 reg2c |= BIT(1);
2958                                 superio_outb(sioaddr, IT87_SIO_PINX2_REG,
2959                                              reg2c);
2960                                 pr_notice("Routing internal VCCH5V to in7.\n");
2961                         }
2962                         pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
2963                         pr_notice("Please report if it displays a reasonable voltage.\n");
2964                 }
2965
2966                 if (reg2c & BIT(0))
2967                         sio_data->internal |= BIT(0);
2968                 if (reg2c & BIT(1))
2969                         sio_data->internal |= BIT(1);
2970
2971                 sio_data->beep_pin = superio_inb(sioaddr,
2972                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2973         } else if (sio_data->type == it8603 || sio_data->type == it8607) {
2974                 int reg27, reg29;
2975
2976                 superio_select(sioaddr, GPIO);
2977
2978                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2979
2980                 /* Check if fan3 is there or not */
2981                 if (reg27 & BIT(6))
2982                         sio_data->skip_pwm |= BIT(2);
2983                 if (reg27 & BIT(7))
2984                         sio_data->skip_fan |= BIT(2);
2985
2986                 /* Check if fan2 is there or not */
2987                 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2988                 if (reg29 & BIT(1))
2989                         sio_data->skip_pwm |= BIT(1);
2990                 if (reg29 & BIT(2))
2991                         sio_data->skip_fan |= BIT(1);
2992
2993                 if (sio_data->type == it8603) {
2994                         sio_data->skip_in |= BIT(5); /* No VIN5 */
2995                         sio_data->skip_in |= BIT(6); /* No VIN6 */
2996                 }
2997
2998                 sio_data->beep_pin = superio_inb(sioaddr,
2999                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3000         } else if (sio_data->type == it8613) {
3001                 int reg27, reg29, reg2a;
3002
3003                 superio_select(sioaddr, GPIO);
3004
3005                 /* Check for pwm3, fan3, pwm5, fan5 */
3006                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3007                 if (reg27 & BIT(1))
3008                         sio_data->skip_fan |= BIT(4);
3009                 if (reg27 & BIT(3))
3010                         sio_data->skip_pwm |= BIT(4);
3011                 if (reg27 & BIT(6))
3012                         sio_data->skip_pwm |= BIT(2);
3013                 if (reg27 & BIT(7))
3014                         sio_data->skip_fan |= BIT(2);
3015
3016                 /* Check for pwm2, fan2 */
3017                 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3018                 if (reg29 & BIT(1))
3019                         sio_data->skip_pwm |= BIT(1);
3020                 if (reg29 & BIT(2))
3021                         sio_data->skip_fan |= BIT(1);
3022
3023                 /* Check for pwm4, fan4 */
3024                 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
3025                 if (!(reg2a & BIT(0)) || (reg29 & BIT(7))) {
3026                         sio_data->skip_fan |= BIT(3);
3027                         sio_data->skip_pwm |= BIT(3);
3028                 }
3029
3030                 sio_data->skip_pwm |= BIT(0); /* No pwm1 */
3031                 sio_data->skip_fan |= BIT(0); /* No fan1 */
3032                 sio_data->skip_in |= BIT(3);  /* No VIN3 */
3033                 sio_data->skip_in |= BIT(6);  /* No VIN6 */
3034
3035                 sio_data->beep_pin = superio_inb(sioaddr,
3036                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3037         } else if (sio_data->type == it8620 || sio_data->type == it8628 ||
3038                    sio_data->type == it8686) {
3039                 int reg;
3040
3041                 superio_select(sioaddr, GPIO);
3042
3043                 /* Check for pwm5 */
3044                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
3045                 if (reg & BIT(6))
3046                         sio_data->skip_pwm |= BIT(4);
3047
3048                 /* Check for fan4, fan5 */
3049                 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
3050                 if (!(reg & BIT(5)))
3051                         sio_data->skip_fan |= BIT(3);
3052                 if (!(reg & BIT(4)))
3053                         sio_data->skip_fan |= BIT(4);
3054
3055                 /* Check for pwm3, fan3 */
3056                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3057                 if (reg & BIT(6))
3058                         sio_data->skip_pwm |= BIT(2);
3059                 if (reg & BIT(7))
3060                         sio_data->skip_fan |= BIT(2);
3061
3062                 /* Check for pwm4 */
3063                 reg = superio_inb(sioaddr, IT87_SIO_GPIO4_REG);
3064                 if (reg & BIT(2))
3065                         sio_data->skip_pwm |= BIT(3);
3066
3067                 /* Check for pwm2, fan2 */
3068                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3069                 if (reg & BIT(1))
3070                         sio_data->skip_pwm |= BIT(1);
3071                 if (reg & BIT(2))
3072                         sio_data->skip_fan |= BIT(1);
3073                 /* Check for pwm6, fan6 */
3074                 if (!(reg & BIT(7))) {
3075                         sio_data->skip_pwm |= BIT(5);
3076                         sio_data->skip_fan |= BIT(5);
3077                 }
3078
3079                 /* Check if AVCC is on VIN3 */
3080                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3081                 if (reg & BIT(0)) {
3082                         /* For it8686, the bit just enables AVCC3 */
3083                         if (sio_data->type != it8686)
3084                                 sio_data->internal |= BIT(0);
3085                 } else {
3086                         sio_data->internal &= ~BIT(3);
3087                         sio_data->skip_in |= BIT(9);
3088                 }
3089
3090                 sio_data->beep_pin = superio_inb(sioaddr,
3091                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3092         } else if (sio_data->type == it8622) {
3093                 int reg;
3094
3095                 superio_select(sioaddr, GPIO);
3096
3097                 /* Check for pwm4, fan4 */
3098                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
3099                 if (reg & BIT(6))
3100                         sio_data->skip_fan |= BIT(3);
3101                 if (reg & BIT(5))
3102                         sio_data->skip_pwm |= BIT(3);
3103
3104                 /* Check for pwm3, fan3, pwm5, fan5 */
3105                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3106                 if (reg & BIT(6))
3107                         sio_data->skip_pwm |= BIT(2);
3108                 if (reg & BIT(7))
3109                         sio_data->skip_fan |= BIT(2);
3110                 if (reg & BIT(3))
3111                         sio_data->skip_pwm |= BIT(4);
3112                 if (reg & BIT(1))
3113                         sio_data->skip_fan |= BIT(4);
3114
3115                 /* Check for pwm2, fan2 */
3116                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3117                 if (reg & BIT(1))
3118                         sio_data->skip_pwm |= BIT(1);
3119                 if (reg & BIT(2))
3120                         sio_data->skip_fan |= BIT(1);
3121
3122                 /* Check for AVCC */
3123                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3124                 if (!(reg & BIT(0)))
3125                         sio_data->skip_in |= BIT(9);
3126
3127                 sio_data->beep_pin = superio_inb(sioaddr,
3128                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3129         } else if (sio_data->type == it8732) {
3130                 int reg;
3131
3132                 superio_select(sioaddr, GPIO);
3133
3134                 /* Check for pwm2, fan2 */
3135                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3136                 if (reg & BIT(1))
3137                         sio_data->skip_pwm |= BIT(1);
3138                 if (reg & BIT(2))
3139                         sio_data->skip_fan |= BIT(1);
3140
3141                 /* Check for pwm3, fan3, fan4 */
3142                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3143                 if (reg & BIT(6))
3144                         sio_data->skip_pwm |= BIT(2);
3145                 if (reg & BIT(7))
3146                         sio_data->skip_fan |= BIT(2);
3147                 if (reg & BIT(5))
3148                         sio_data->skip_fan |= BIT(3);
3149
3150                 /* Check if AVCC is on VIN3 */
3151                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3152                 if (reg & BIT(0))
3153                         sio_data->internal |= BIT(0);
3154
3155                 sio_data->beep_pin = superio_inb(sioaddr,
3156                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3157         } else if (sio_data->type == it8655) {
3158                 int reg;
3159
3160                 superio_select(sioaddr, GPIO);
3161
3162                 /* Check for pwm2 */
3163                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3164                 if (reg & BIT(1))
3165                         sio_data->skip_pwm |= BIT(1);
3166
3167                 /* Check for fan2 */
3168                 reg = superio_inb(sioaddr, IT87_SIO_PINX4_REG);
3169                 if (reg & BIT(4))
3170                         sio_data->skip_fan |= BIT(1);
3171
3172                 /* Check for pwm3, fan3 */
3173                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3174                 if (reg & BIT(6))
3175                         sio_data->skip_pwm |= BIT(2);
3176                 if (reg & BIT(7))
3177                         sio_data->skip_fan |= BIT(2);
3178
3179                 sio_data->beep_pin = superio_inb(sioaddr,
3180                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3181         } else if (sio_data->type == it8665) {
3182                 int reg;
3183
3184                 superio_select(sioaddr, GPIO);
3185
3186                 /* Check for pwm2 */
3187                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3188                 if (reg & BIT(1))
3189                         sio_data->skip_pwm |= BIT(1);
3190
3191                 /* Check for fan2 */
3192                 reg = superio_inb(sioaddr, IT87_SIO_PINX4_REG);
3193                 if (reg & BIT(4))
3194                         sio_data->skip_fan |= BIT(1);
3195
3196                 /* Check for pwm3, fan3 */
3197                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3198                 if (reg & BIT(6))
3199                         sio_data->skip_pwm |= BIT(2);
3200                 if (reg & BIT(7))
3201                         sio_data->skip_fan |= BIT(2);
3202
3203                 /* Check for pwm5, fan5 */
3204                 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
3205                 if (reg & BIT(5))
3206                         sio_data->skip_pwm |= BIT(4);
3207                 if (!(reg & BIT(4)))
3208                         sio_data->skip_fan |= BIT(4);
3209
3210                 /* Check for pwm4, fan4, pwm6, fan6 */
3211                 reg = superio_inb(sioaddr, IT87_SIO_GPIO9_REG);
3212                 if (reg & BIT(2))
3213                         sio_data->skip_pwm |= BIT(3);
3214                 if (reg & BIT(3))
3215                         sio_data->skip_fan |= BIT(3);
3216                 if (reg & BIT(0))
3217                         sio_data->skip_pwm |= BIT(5);
3218                 if (reg & BIT(1))
3219                         sio_data->skip_fan |= BIT(5);
3220
3221                 sio_data->beep_pin = superio_inb(sioaddr,
3222                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3223         } else {
3224                 int reg;
3225                 bool uart6;
3226
3227                 superio_select(sioaddr, GPIO);
3228
3229                 /* Check for fan4, fan5 */
3230                 if (has_five_fans(config)) {
3231                         reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
3232                         switch (sio_data->type) {
3233                         case it8718:
3234                                 if (reg & BIT(5))
3235                                         sio_data->skip_fan |= BIT(3);
3236                                 if (reg & BIT(4))
3237                                         sio_data->skip_fan |= BIT(4);
3238                                 break;
3239                         case it8720:
3240                         case it8721:
3241                         case it8728:
3242                                 if (!(reg & BIT(5)))
3243                                         sio_data->skip_fan |= BIT(3);
3244                                 if (!(reg & BIT(4)))
3245                                         sio_data->skip_fan |= BIT(4);
3246                                 break;
3247                         default:
3248                                 break;
3249                         }
3250                 }
3251
3252                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3253                 if (!sio_data->skip_vid) {
3254                         /* We need at least 4 VID pins */
3255                         if (reg & 0x0f) {
3256                                 pr_info("VID is disabled (pins used for GPIO)\n");
3257                                 sio_data->skip_vid = 1;
3258                         }
3259                 }
3260
3261                 /* Check if fan3 is there or not */
3262                 if (reg & BIT(6))
3263                         sio_data->skip_pwm |= BIT(2);
3264                 if (reg & BIT(7))
3265                         sio_data->skip_fan |= BIT(2);
3266
3267                 /* Check if fan2 is there or not */
3268                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3269                 if (reg & BIT(1))
3270                         sio_data->skip_pwm |= BIT(1);
3271                 if (reg & BIT(2))
3272                         sio_data->skip_fan |= BIT(1);
3273
3274                 if ((sio_data->type == it8718 || sio_data->type == it8720) &&
3275                     !(sio_data->skip_vid))
3276                         sio_data->vid_value = superio_inb(sioaddr,
3277                                                           IT87_SIO_VID_REG);
3278
3279                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3280
3281                 uart6 = sio_data->type == it8782 && (reg & BIT(2));
3282
3283                 /*
3284                  * The IT8720F has no VIN7 pin, so VCCH should always be
3285                  * routed internally to VIN7 with an internal divider.
3286                  * Curiously, there still is a configuration bit to control
3287                  * this, which means it can be set incorrectly. And even
3288                  * more curiously, many boards out there are improperly
3289                  * configured, even though the IT8720F datasheet claims
3290                  * that the internal routing of VCCH to VIN7 is the default
3291                  * setting. So we force the internal routing in this case.
3292                  *
3293                  * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
3294                  * If UART6 is enabled, re-route VIN7 to the internal divider
3295                  * if that is not already the case.
3296                  */
3297                 if ((sio_data->type == it8720 || uart6) && !(reg & BIT(1))) {
3298                         reg |= BIT(1);
3299                         superio_outb(sioaddr, IT87_SIO_PINX2_REG, reg);
3300                         pr_notice("Routing internal VCCH to in7\n");
3301                 }
3302                 if (reg & BIT(0))
3303                         sio_data->internal |= BIT(0);
3304                 if (reg & BIT(1))
3305                         sio_data->internal |= BIT(1);
3306
3307                 /*
3308                  * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
3309                  * While VIN7 can be routed to the internal voltage divider,
3310                  * VIN5 and VIN6 are not available if UART6 is enabled.
3311                  *
3312                  * Also, temp3 is not available if UART6 is enabled and TEMPIN3
3313                  * is the temperature source. Since we can not read the
3314                  * temperature source here, skip_temp is preliminary.
3315                  */
3316                 if (uart6) {
3317                         sio_data->skip_in |= BIT(5) | BIT(6);
3318                         sio_data->skip_temp |= BIT(2);
3319                 }
3320
3321                 sio_data->beep_pin = superio_inb(sioaddr,
3322                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3323         }
3324         if (sio_data->beep_pin)
3325                 pr_info("Beeping is supported\n");
3326
3327 exit:
3328         superio_exit(sioaddr);
3329         return err;
3330 }
3331
3332 /* Called when we have found a new IT87. */
3333 static void it87_init_device(struct platform_device *pdev)
3334 {
3335         struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
3336         struct it87_data *data = platform_get_drvdata(pdev);
3337         int tmp, i;
3338         u8 mask;
3339
3340         /* Initialize chip specific register pointers */
3341         switch (data->type) {
3342         case it8686:
3343                 data->REG_FAN = IT87_REG_FAN;
3344                 data->REG_FANX = IT87_REG_FANX;
3345                 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3346                 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3347                 data->REG_PWM = IT87_REG_PWM;
3348                 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET_8686;
3349                 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW_8686;
3350                 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH_8686;
3351                 break;
3352         case it8655:
3353         case it8665:
3354                 data->REG_FAN = IT87_REG_FAN_8665;
3355                 data->REG_FANX = IT87_REG_FANX_8665;
3356                 data->REG_FAN_MIN = IT87_REG_FAN_MIN_8665;
3357                 data->REG_FANX_MIN = IT87_REG_FANX_MIN_8665;
3358                 data->REG_PWM = IT87_REG_PWM_8665;
3359                 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
3360                 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
3361                 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
3362                 break;
3363         case it8622:
3364                 data->REG_FAN = IT87_REG_FAN;
3365                 data->REG_FANX = IT87_REG_FANX;
3366                 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3367                 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3368                 data->REG_PWM = IT87_REG_PWM_8665;
3369                 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
3370                 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
3371                 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
3372                 break;
3373         case it8613:
3374                 data->REG_FAN = IT87_REG_FAN;
3375                 data->REG_FANX = IT87_REG_FANX;
3376                 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3377                 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3378                 data->REG_PWM = IT87_REG_PWM_8665;
3379                 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
3380                 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
3381                 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
3382                 break;
3383         default:
3384                 data->REG_FAN = IT87_REG_FAN;
3385                 data->REG_FANX = IT87_REG_FANX;
3386                 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3387                 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3388                 data->REG_PWM = IT87_REG_PWM;
3389                 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
3390                 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
3391                 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
3392                 break;
3393         }
3394
3395         /*
3396          * For each PWM channel:
3397          * - If it is in automatic mode, setting to manual mode should set
3398          *   the fan to full speed by default.
3399          * - If it is in manual mode, we need a mapping to temperature
3400          *   channels to use when later setting to automatic mode later.
3401          *   Use a 1:1 mapping by default (we are clueless.)
3402          * In both cases, the value can (and should) be changed by the user
3403          * prior to switching to a different mode.
3404          * Note that this is no longer needed for the IT8721F and later, as
3405          * these have separate registers for the temperature mapping and the
3406          * manual duty cycle.
3407          */
3408         for (i = 0; i < NUM_AUTO_PWM; i++) {
3409                 data->pwm_temp_map[i] = i;
3410                 data->pwm_duty[i] = 0x7f;       /* Full speed */
3411                 data->auto_pwm[i][3] = 0x7f;    /* Full speed, hard-coded */
3412         }
3413
3414         /*
3415          * Some chips seem to have default value 0xff for all limit
3416          * registers. For low voltage limits it makes no sense and triggers
3417          * alarms, so change to 0 instead. For high temperature limits, it
3418          * means -1 degree C, which surprisingly doesn't trigger an alarm,
3419          * but is still confusing, so change to 127 degrees C.
3420          */
3421         for (i = 0; i < NUM_VIN_LIMIT; i++) {
3422                 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
3423                 if (tmp == 0xff)
3424                         it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
3425         }
3426         for (i = 0; i < data->num_temp_limit; i++) {
3427                 tmp = it87_read_value(data, data->REG_TEMP_HIGH[i]);
3428                 if (tmp == 0xff)
3429                         it87_write_value(data, data->REG_TEMP_HIGH[i], 127);
3430         }
3431
3432         /*
3433          * Temperature channels are not forcibly enabled, as they can be
3434          * set to two different sensor types and we can't guess which one
3435          * is correct for a given system. These channels can be enabled at
3436          * run-time through the temp{1-3}_type sysfs accessors if needed.
3437          */
3438
3439         /* Check if voltage monitors are reset manually or by some reason */
3440         tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
3441         if ((tmp & 0xff) == 0) {
3442                 /* Enable all voltage monitors */
3443                 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
3444         }
3445
3446         /* Check if tachometers are reset manually or by some reason */
3447         mask = 0x70 & ~(sio_data->skip_fan << 4);
3448         data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
3449         if ((data->fan_main_ctrl & mask) == 0) {
3450                 /* Enable all fan tachometers */
3451                 data->fan_main_ctrl |= mask;
3452                 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
3453                                  data->fan_main_ctrl);
3454         }
3455         data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
3456
3457         tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
3458
3459         /* Set tachometers to 16-bit mode if needed */
3460         if (has_fan16_config(data)) {
3461                 if (~tmp & 0x07 & data->has_fan) {
3462                         dev_dbg(&pdev->dev,
3463                                 "Setting fan1-3 to 16-bit mode\n");
3464                         it87_write_value(data, IT87_REG_FAN_16BIT,
3465                                          tmp | 0x07);
3466                 }
3467         }
3468
3469         /* Check for additional fans */
3470         if (has_four_fans(data) && (tmp & BIT(4)))
3471                 data->has_fan |= BIT(3); /* fan4 enabled */
3472         if (has_five_fans(data) && (tmp & BIT(5)))
3473                 data->has_fan |= BIT(4); /* fan5 enabled */
3474         if (has_six_fans(data)) {
3475                 switch (data->type) {
3476                 case it8620:
3477                 case it8628:
3478                 case it8686:
3479                         if (tmp & BIT(2))
3480                                 data->has_fan |= BIT(5); /* fan6 enabled */
3481                         break;
3482                 case it8665:
3483                         tmp = it87_read_value(data, IT87_REG_FAN_DIV);
3484                         if (tmp & BIT(3))
3485                                 data->has_fan |= BIT(5); /* fan6 enabled */
3486                         break;
3487                 default:
3488                         break;
3489                 }
3490         }
3491
3492         /* Fan input pins may be used for alternative functions */
3493         data->has_fan &= ~sio_data->skip_fan;
3494
3495         /* Check if pwm6 is enabled */
3496         if (has_six_pwm(data)) {
3497                 switch (data->type) {
3498                 case it8620:
3499                 case it8686:
3500                         tmp = it87_read_value(data, IT87_REG_FAN_DIV);
3501                         if (!(tmp & BIT(3)))
3502                                 sio_data->skip_pwm |= BIT(5);
3503                         break;
3504                 default:
3505                         break;
3506                 }
3507         }
3508
3509         /* Start monitoring */
3510         it87_write_value(data, IT87_REG_CONFIG,
3511                          (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
3512                          | (update_vbat ? 0x41 : 0x01));
3513 }
3514
3515 /* Return 1 if and only if the PWM interface is safe to use */
3516 static int it87_check_pwm(struct device *dev)
3517 {
3518         struct it87_data *data = dev_get_drvdata(dev);
3519         /*
3520          * Some BIOSes fail to correctly configure the IT87 fans. All fans off
3521          * and polarity set to active low is sign that this is the case so we
3522          * disable pwm control to protect the user.
3523          */
3524         int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
3525
3526         if ((tmp & 0x87) == 0) {
3527                 if (fix_pwm_polarity) {
3528                         /*
3529                          * The user asks us to attempt a chip reconfiguration.
3530                          * This means switching to active high polarity and
3531                          * inverting all fan speed values.
3532                          */
3533                         int i;
3534                         u8 pwm[3];
3535
3536                         for (i = 0; i < ARRAY_SIZE(pwm); i++)
3537                                 pwm[i] = it87_read_value(data,
3538                                                          data->REG_PWM[i]);
3539
3540                         /*
3541                          * If any fan is in automatic pwm mode, the polarity
3542                          * might be correct, as suspicious as it seems, so we
3543                          * better don't change anything (but still disable the
3544                          * PWM interface).
3545                          */
3546                         if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
3547                                 dev_info(dev,
3548                                          "Reconfiguring PWM to active high polarity\n");
3549                                 it87_write_value(data, IT87_REG_FAN_CTL,
3550                                                  tmp | 0x87);
3551                                 for (i = 0; i < 3; i++)
3552                                         it87_write_value(data,
3553                                                          data->REG_PWM[i],
3554                                                          0x7f & ~pwm[i]);
3555                                 return 1;
3556                         }
3557
3558                         dev_info(dev,
3559                                  "PWM configuration is too broken to be fixed\n");
3560                 }
3561
3562                 dev_info(dev,
3563                          "Detected broken BIOS defaults, disabling PWM interface\n");
3564                 return 0;
3565         } else if (fix_pwm_polarity) {
3566                 dev_info(dev,
3567                          "PWM configuration looks sane, won't touch\n");
3568         }
3569
3570         return 1;
3571 }
3572
3573 static int it87_probe(struct platform_device *pdev)
3574 {
3575         struct it87_data *data;
3576         struct resource *res;
3577         struct device *dev = &pdev->dev;
3578         struct it87_sio_data *sio_data = dev_get_platdata(dev);
3579         int enable_pwm_interface;
3580         struct device *hwmon_dev;
3581
3582         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3583         if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
3584                                  DRVNAME)) {
3585                 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
3586                         (unsigned long)res->start,
3587                         (unsigned long)(res->start + IT87_EC_EXTENT - 1));
3588                 return -EBUSY;
3589         }
3590
3591         data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
3592         if (!data)
3593                 return -ENOMEM;
3594
3595         data->addr = res->start;
3596         data->type = sio_data->type;
3597         data->features = it87_devices[sio_data->type].features;
3598         data->num_temp_limit = it87_devices[sio_data->type].num_temp_limit;
3599         data->peci_mask = it87_devices[sio_data->type].peci_mask;
3600         data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
3601         data->bank = 0xff;
3602
3603         /*
3604          * IT8705F Datasheet 0.4.1, 3h == Version G.
3605          * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
3606          * These are the first revisions with 16-bit tachometer support.
3607          */
3608         switch (data->type) {
3609         case it87:
3610                 if (sio_data->revision >= 0x03) {
3611                         data->features &= ~FEAT_OLD_AUTOPWM;
3612                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS;
3613                 }
3614                 break;
3615         case it8712:
3616                 if (sio_data->revision >= 0x08) {
3617                         data->features &= ~FEAT_OLD_AUTOPWM;
3618                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS |
3619                                           FEAT_FIVE_FANS;
3620                 }
3621                 break;
3622         default:
3623                 break;
3624         }
3625
3626         /* Now, we do the remaining detection. */
3627         if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80) ||
3628             it87_read_value(data, IT87_REG_CHIPID) != 0x90)
3629                 return -ENODEV;
3630
3631         platform_set_drvdata(pdev, data);
3632
3633         mutex_init(&data->update_lock);
3634
3635         /* Check PWM configuration */
3636         enable_pwm_interface = it87_check_pwm(dev);
3637
3638         /* Starting with IT8721F, we handle scaling of internal voltages */
3639         if (has_scaling(data)) {
3640                 if (sio_data->internal & BIT(0))
3641                         data->in_scaled |= BIT(3);      /* in3 is AVCC */
3642                 if (sio_data->internal & BIT(1))
3643                         data->in_scaled |= BIT(7);      /* in7 is VSB */
3644                 if (sio_data->internal & BIT(2))
3645                         data->in_scaled |= BIT(8);      /* in8 is Vbat */
3646                 if (sio_data->internal & BIT(3))
3647                         data->in_scaled |= BIT(9);      /* in9 is AVCC */
3648         } else if (sio_data->type == it8781 || sio_data->type == it8782 ||
3649                    sio_data->type == it8783) {
3650                 if (sio_data->internal & BIT(0))
3651                         data->in_scaled |= BIT(3);      /* in3 is VCC5V */
3652                 if (sio_data->internal & BIT(1))
3653                         data->in_scaled |= BIT(7);      /* in7 is VCCH5V */
3654         }
3655
3656         data->has_temp = 0x07;
3657         if (sio_data->skip_temp & BIT(2)) {
3658                 if (sio_data->type == it8782 &&
3659                     !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
3660                         data->has_temp &= ~BIT(2);
3661         }
3662
3663         data->in_internal = sio_data->internal;
3664         data->has_in = 0x3ff & ~sio_data->skip_in;
3665
3666         if (has_six_temp(data)) {
3667                 u8 reg = it87_read_value(data, IT87_REG_TEMP456_ENABLE);
3668
3669                 /* Check for additional temperature sensors */
3670                 if ((reg & 0x03) >= 0x02)
3671                         data->has_temp |= BIT(3);
3672                 if (((reg >> 2) & 0x03) >= 0x02)
3673                         data->has_temp |= BIT(4);
3674                 if (((reg >> 4) & 0x03) >= 0x02)
3675                         data->has_temp |= BIT(5);
3676
3677                 /* Check for additional voltage sensors */
3678                 if ((reg & 0x03) == 0x01)
3679                         data->has_in |= BIT(10);
3680                 if (((reg >> 2) & 0x03) == 0x01)
3681                         data->has_in |= BIT(11);
3682                 if (((reg >> 4) & 0x03) == 0x01)
3683                         data->has_in |= BIT(12);
3684         }
3685
3686         data->has_beep = !!sio_data->beep_pin;
3687
3688         /* Initialize the IT87 chip */
3689         it87_init_device(pdev);
3690
3691         if (!sio_data->skip_vid) {
3692                 data->has_vid = true;
3693                 data->vrm = vid_which_vrm();
3694                 /* VID reading from Super-I/O config space if available */
3695                 data->vid = sio_data->vid_value;
3696         }
3697
3698         /* Prepare for sysfs hooks */
3699         data->groups[0] = &it87_group;
3700         data->groups[1] = &it87_group_in;
3701         data->groups[2] = &it87_group_temp;
3702         data->groups[3] = &it87_group_fan;
3703
3704         if (enable_pwm_interface) {
3705                 data->has_pwm = BIT(ARRAY_SIZE(IT87_REG_PWM)) - 1;
3706                 data->has_pwm &= ~sio_data->skip_pwm;
3707
3708                 data->groups[4] = &it87_group_pwm;
3709                 if (has_old_autopwm(data) || has_newer_autopwm(data))
3710                         data->groups[5] = &it87_group_auto_pwm;
3711         }
3712
3713         hwmon_dev = devm_hwmon_device_register_with_groups(dev,
3714                                         it87_devices[sio_data->type].name,
3715                                         data, data->groups);
3716         return PTR_ERR_OR_ZERO(hwmon_dev);
3717 }
3718
3719 static struct platform_driver it87_driver = {
3720         .driver = {
3721                 .name   = DRVNAME,
3722         },
3723         .probe  = it87_probe,
3724 };
3725
3726 static int __init it87_device_add(int index, unsigned short address,
3727                                   const struct it87_sio_data *sio_data)
3728 {
3729         struct platform_device *pdev;
3730         struct resource res = {
3731                 .start  = address + IT87_EC_OFFSET,
3732                 .end    = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
3733                 .name   = DRVNAME,
3734                 .flags  = IORESOURCE_IO,
3735         };
3736         int err;
3737
3738         err = acpi_check_resource_conflict(&res);
3739         if (err)
3740                 return err;
3741
3742         pdev = platform_device_alloc(DRVNAME, address);
3743         if (!pdev)
3744                 return -ENOMEM;
3745
3746         err = platform_device_add_resources(pdev, &res, 1);
3747         if (err) {
3748                 pr_err("Device resource addition failed (%d)\n", err);
3749                 goto exit_device_put;
3750         }
3751
3752         err = platform_device_add_data(pdev, sio_data,
3753                                        sizeof(struct it87_sio_data));
3754         if (err) {
3755                 pr_err("Platform data allocation failed\n");
3756                 goto exit_device_put;
3757         }
3758
3759         err = platform_device_add(pdev);
3760         if (err) {
3761                 pr_err("Device addition failed (%d)\n", err);
3762                 goto exit_device_put;
3763         }
3764
3765         it87_pdev[index] = pdev;
3766         return 0;
3767
3768 exit_device_put:
3769         platform_device_put(pdev);
3770         return err;
3771 }
3772
3773 struct it87_dmi_data {
3774         bool sio4e_broken;      /* SIO accesses @ 0x4e are broken       */
3775         char *sio_mutex;        /* SIO ACPI mutex                       */
3776         u8 skip_pwm;            /* pwm channels to skip for this board  */
3777 };
3778
3779 /*
3780  * On Gigabyte AB350 and AX370 boards, accesses to the Super-IO chip
3781  * at address 0x4e/0x4f can result in a system hang.
3782  * Accesses to address 0x2e/0x2f need to be mutex protected.
3783  */
3784 static struct it87_dmi_data gigabyte_ab350_gaming = {
3785         .sio4e_broken = true,
3786         .sio_mutex = "\\_SB.PCI0.SBRG.SIO1.MUT0",
3787 };
3788
3789 /*
3790  * On the Shuttle SN68PT, FAN_CTL2 is apparently not
3791  * connected to a fan, but to something else. One user
3792  * has reported instant system power-off when changing
3793  * the PWM2 duty cycle, so we disable it.
3794  * I use the board name string as the trigger in case
3795  * the same board is ever used in other systems.
3796  */
3797 static struct it87_dmi_data nvidia_fn68pt = {
3798         .skip_pwm = BIT(1),
3799 };
3800
3801 static const struct dmi_system_id it87_dmi_table[] __initconst = {
3802         {
3803                 .matches = {
3804                         DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."),
3805                         DMI_MATCH(DMI_BOARD_NAME, "AB350-Gaming-CF"),
3806                 },
3807                 .driver_data = &gigabyte_ab350_gaming,
3808         },
3809         {
3810                 .matches = {
3811                         DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."),
3812                         DMI_MATCH(DMI_BOARD_NAME, "AB350-Gaming 3-CF"),
3813                 },
3814                 .driver_data = &gigabyte_ab350_gaming,
3815         },
3816         {
3817                 .matches = {
3818                         DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."),
3819                         DMI_MATCH(DMI_BOARD_NAME, "AX370-Gaming K7"),
3820                 },
3821                 .driver_data = &gigabyte_ab350_gaming,
3822         },
3823         {
3824                 .matches = {
3825                         DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."),
3826                         DMI_MATCH(DMI_BOARD_NAME, "AX370-Gaming 5"),
3827                 },
3828                 .driver_data = &gigabyte_ab350_gaming,
3829         },
3830         {
3831                 .matches = {
3832                         DMI_MATCH(DMI_BOARD_VENDOR, "nVIDIA"),
3833                         DMI_MATCH(DMI_BOARD_NAME, "FN68PT"),
3834                 },
3835                 .driver_data = &nvidia_fn68pt,
3836         },
3837         { }
3838 };
3839
3840 static int __init sm_it87_init(void)
3841 {
3842         const struct dmi_system_id *dmi = dmi_first_match(it87_dmi_table);
3843         struct it87_dmi_data *dmi_data = NULL;
3844         int sioaddr[2] = { REG_2E, REG_4E };
3845         struct it87_sio_data sio_data;
3846         unsigned short isa_address;
3847         bool found = false;
3848         int i, err;
3849
3850         if (dmi)
3851                 dmi_data = dmi->driver_data;
3852
3853         if (dmi_data) {
3854                 it87_sio4e_broken = dmi_data->sio4e_broken;
3855 #ifdef __IT87_USE_ACPI_MUTEX
3856                 if (dmi_data->sio_mutex) {
3857                         static acpi_status status;
3858
3859                         status = acpi_get_handle(NULL, dmi_data->sio_mutex,
3860                                                  &it87_acpi_sio_handle);
3861                         if (ACPI_SUCCESS(status)) {
3862                                 it87_acpi_sio_mutex = dmi_data->sio_mutex;
3863                                 pr_debug("Found ACPI SIO mutex %s\n",
3864                                          dmi_data->sio_mutex);
3865                         } else {
3866                                 pr_warn("ACPI SIO mutex %s not found\n",
3867                                         dmi_data->sio_mutex);
3868                         }
3869                 }
3870 #endif /* __IT87_USE_ACPI_MUTEX */
3871         }
3872
3873         err = platform_driver_register(&it87_driver);
3874         if (err)
3875                 return err;
3876
3877         for (i = 0; i < ARRAY_SIZE(sioaddr); i++) {
3878                 /*
3879                  * Accessing the second Super-IO chi can result in board
3880                  * hangs. Disable until we figure out what is going on.
3881                  */
3882                 if (it87_sio4e_broken && sioaddr[i] == 0x4e)
3883                         continue;
3884                 memset(&sio_data, 0, sizeof(struct it87_sio_data));
3885                 isa_address = 0;
3886                 err = it87_find(sioaddr[i], &isa_address, &sio_data);
3887                 if (err || isa_address == 0)
3888                         continue;
3889
3890                 if (dmi_data)
3891                         sio_data.skip_pwm |= dmi_data->skip_pwm;
3892                 err = it87_device_add(i, isa_address, &sio_data);
3893                 if (err)
3894                         goto exit_dev_unregister;
3895                 found = true;
3896         }
3897
3898         if (!found) {
3899                 err = -ENODEV;
3900                 goto exit_unregister;
3901         }
3902         return 0;
3903
3904 exit_dev_unregister:
3905         /* NULL check handled by platform_device_unregister */
3906         platform_device_unregister(it87_pdev[0]);
3907 exit_unregister:
3908         platform_driver_unregister(&it87_driver);
3909         return err;
3910 }
3911
3912 static void __exit sm_it87_exit(void)
3913 {
3914         /* NULL check handled by platform_device_unregister */
3915         platform_device_unregister(it87_pdev[1]);
3916         platform_device_unregister(it87_pdev[0]);
3917         platform_driver_unregister(&it87_driver);
3918 }
3919
3920 MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>");
3921 MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
3922 module_param(update_vbat, bool, 0);
3923 MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
3924 module_param(fix_pwm_polarity, bool, 0);
3925 MODULE_PARM_DESC(fix_pwm_polarity,
3926                  "Force PWM polarity to active high (DANGEROUS)");
3927 MODULE_LICENSE("GPL");
3928
3929 module_init(sm_it87_init);
3930 module_exit(sm_it87_exit);