git.sur5r.net Git - groeck-it87/blob - it87.c

   1 /*
   2  *  it87.c - Part of lm_sensors, Linux kernel modules for hardware
   3  *           monitoring.
   4  *
   5  *  The IT8705F is an LPC-based Super I/O part that contains UARTs, a
   6  *  parallel port, an IR port, a MIDI port, a floppy controller, etc., in
   7  *  addition to an Environment Controller (Enhanced Hardware Monitor and
   8  *  Fan Controller)
   9  *
  10  *  This driver supports only the Environment Controller in the IT8705F and
  11  *  similar parts.  The other devices are supported by different drivers.
  12  *
  13  *  Supports: IT8603E  Super I/O chip w/LPC interface
  14  *            IT8607E  Super I/O chip w/LPC interface
  15  *            IT8613E  Super I/O chip w/LPC interface
  16  *            IT8620E  Super I/O chip w/LPC interface
  17  *            IT8622E  Super I/O chip w/LPC interface
  18  *            IT8623E  Super I/O chip w/LPC interface
  19  *            IT8628E  Super I/O chip w/LPC interface
  20  *            IT8655E  Super I/O chip w/LPC interface
  21  *            IT8665E  Super I/O chip w/LPC interface
  22  *            IT8686E  Super I/O chip w/LPC interface
  23  *            IT8705F  Super I/O chip w/LPC interface
  24  *            IT8712F  Super I/O chip w/LPC interface
  25  *            IT8716F  Super I/O chip w/LPC interface
  26  *            IT8718F  Super I/O chip w/LPC interface
  27  *            IT8720F  Super I/O chip w/LPC interface
  28  *            IT8721F  Super I/O chip w/LPC interface
  29  *            IT8726F  Super I/O chip w/LPC interface
  30  *            IT8728F  Super I/O chip w/LPC interface
  31  *            IT8732F  Super I/O chip w/LPC interface
  32  *            IT8758E  Super I/O chip w/LPC interface
  33  *            IT8771E  Super I/O chip w/LPC interface
  34  *            IT8772E  Super I/O chip w/LPC interface
  35  *            IT8781F  Super I/O chip w/LPC interface
  36  *            IT8782F  Super I/O chip w/LPC interface
  37  *            IT8783E/F Super I/O chip w/LPC interface
  38  *            IT8786E  Super I/O chip w/LPC interface
  39  *            IT8790E  Super I/O chip w/LPC interface
  40  *            IT8792E  Super I/O chip w/LPC interface
  41  *            Sis950   A clone of the IT8705F
  42  *
  43  *  Copyright (C) 2001 Chris Gauthron
  44  *  Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de>
  45  *
  46  *  This program is free software; you can redistribute it and/or modify
  47  *  it under the terms of the GNU General Public License as published by
  48  *  the Free Software Foundation; either version 2 of the License, or
  49  *  (at your option) any later version.
  50  *
  51  *  This program is distributed in the hope that it will be useful,
  52  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  53  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  54  *  GNU General Public License for more details.
  55  */
  56
  57 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  58
  59 #include <linux/bitops.h>
  60 #include <linux/module.h>
  61 #include <linux/init.h>
  62 #include <linux/slab.h>
  63 #include <linux/jiffies.h>
  64 #include <linux/platform_device.h>
  65 #include <linux/hwmon.h>
  66 #include <linux/hwmon-sysfs.h>
  67 #include <linux/hwmon-vid.h>
  68 #include <linux/err.h>
  69 #include <linux/mutex.h>
  70 #include <linux/sysfs.h>
  71 #include <linux/string.h>
  72 #include <linux/dmi.h>
  73 #include <linux/acpi.h>
  74 #include <linux/io.h>
  75 #include "compat.h"
  76
  77 #define DRVNAME "it87"
  78
  79 /* Necessary API not (yet) exported in upstream kernel */
  80 /* #define __IT87_USE_ACPI_MUTEX */
  81
  82 enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732,
  83              it8771, it8772, it8781, it8782, it8783, it8786, it8790,
  84              it8792, it8603, it8607, it8613, it8620, it8622, it8628, it8655,
  85              it8665, it8686 };
  86
  87 static unsigned short force_id;
  88 module_param(force_id, ushort, 0);
  89 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  90
  91 static struct platform_device *it87_pdev[2];
  92 static bool it87_sio4e_broken;
  93 #ifdef __IT87_USE_ACPI_MUTEX
  94 static acpi_handle it87_acpi_sio_handle;
  95 static char *it87_acpi_sio_mutex;
  96 #endif
  97
  98 #define REG_2E  0x2e    /* The register to read/write */
  99 #define REG_4E  0x4e    /* Secondary register to read/write */
 100
 101 #define DEV     0x07    /* Register: Logical device select */
 102 #define PME     0x04    /* The device with the fan registers in it */
 103
 104 /* The device with the IT8718F/IT8720F VID value in it */
 105 #define GPIO    0x07
 106
 107 #define DEVID   0x20    /* Register: Device ID */
 108 #define DEVREV  0x22    /* Register: Device Revision */
 109
 110 static inline void __superio_enter(int ioreg)
 111 {
 112         outb(0x87, ioreg);
 113         outb(0x01, ioreg);
 114         outb(0x55, ioreg);
 115         outb(ioreg == REG_4E ? 0xaa : 0x55, ioreg);
 116 }
 117
 118 static inline int superio_inb(int ioreg, int reg)
 119 {
 120         int val;
 121
 122         outb(reg, ioreg);
 123         val = inb(ioreg + 1);
 124         if (it87_sio4e_broken && ioreg == 0x4e && val == 0xff) {
 125                 __superio_enter(ioreg);
 126                 outb(reg, ioreg);
 127                 val = inb(ioreg + 1);
 128                 pr_warn("Retry access 0x4e:0x%x -> 0x%x\n", reg, val);
 129         }
 130
 131         return val;
 132 }
 133
 134 static inline void superio_outb(int ioreg, int reg, int val)
 135 {
 136         outb(reg, ioreg);
 137         outb(val, ioreg + 1);
 138 }
 139
 140 static int superio_inw(int ioreg, int reg)
 141 {
 142         return (superio_inb(ioreg, reg) << 8) | superio_inb(ioreg, reg + 1);
 143 }
 144
 145 static inline void superio_select(int ioreg, int ldn)
 146 {
 147         outb(DEV, ioreg);
 148         outb(ldn, ioreg + 1);
 149 }
 150
 151 static inline int superio_enter(int ioreg)
 152 {
 153 #ifdef __IT87_USE_ACPI_MUTEX
 154         if (it87_acpi_sio_mutex) {
 155                 acpi_status status;
 156
 157                 status = acpi_acquire_mutex(NULL, it87_acpi_sio_mutex, 0x10);
 158                 if (ACPI_FAILURE(status)) {
 159                         pr_err("Failed to acquire ACPI mutex\n");
 160                         return -EBUSY;
 161                 }
 162         }
 163 #endif
 164         /*
 165          * Try to reserve ioreg and ioreg + 1 for exclusive access.
 166          */
 167         if (!request_muxed_region(ioreg, 2, DRVNAME))
 168                 goto error;
 169
 170         __superio_enter(ioreg);
 171         return 0;
 172
 173 error:
 174 #ifdef __IT87_USE_ACPI_MUTEX
 175         if (it87_acpi_sio_mutex)
 176                 acpi_release_mutex(it87_acpi_sio_handle, NULL);
 177 #endif
 178         return -EBUSY;
 179 }
 180
 181 static inline void superio_exit(int ioreg)
 182 {
 183         if (!it87_sio4e_broken || ioreg != 0x4e) {
 184                 outb(0x02, ioreg);
 185                 outb(0x02, ioreg + 1);
 186         }
 187         release_region(ioreg, 2);
 188 #ifdef __IT87_USE_ACPI_MUTEX
 189         if (it87_acpi_sio_mutex)
 190                 acpi_release_mutex(it87_acpi_sio_handle, NULL);
 191 #endif
 192 }
 193
 194 /* Logical device 4 registers */
 195 #define IT8712F_DEVID 0x8712
 196 #define IT8705F_DEVID 0x8705
 197 #define IT8716F_DEVID 0x8716
 198 #define IT8718F_DEVID 0x8718
 199 #define IT8720F_DEVID 0x8720
 200 #define IT8721F_DEVID 0x8721
 201 #define IT8726F_DEVID 0x8726
 202 #define IT8728F_DEVID 0x8728
 203 #define IT8732F_DEVID 0x8732
 204 #define IT8792E_DEVID 0x8733
 205 #define IT8771E_DEVID 0x8771
 206 #define IT8772E_DEVID 0x8772
 207 #define IT8781F_DEVID 0x8781
 208 #define IT8782F_DEVID 0x8782
 209 #define IT8783E_DEVID 0x8783
 210 #define IT8786E_DEVID 0x8786
 211 #define IT8790E_DEVID 0x8790
 212 #define IT8603E_DEVID 0x8603
 213 #define IT8607E_DEVID 0x8607
 214 #define IT8613E_DEVID 0x8613
 215 #define IT8620E_DEVID 0x8620
 216 #define IT8622E_DEVID 0x8622
 217 #define IT8623E_DEVID 0x8623
 218 #define IT8628E_DEVID 0x8628
 219 #define IT8655E_DEVID 0x8655
 220 #define IT8665E_DEVID 0x8665
 221 #define IT8686E_DEVID 0x8686
 222 #define IT87_ACT_REG  0x30
 223 #define IT87_BASE_REG 0x60
 224
 225 /* Logical device 7 registers (IT8712F and later) */
 226 #define IT87_SIO_GPIO1_REG      0x25
 227 #define IT87_SIO_GPIO2_REG      0x26
 228 #define IT87_SIO_GPIO3_REG      0x27
 229 #define IT87_SIO_GPIO4_REG      0x28
 230 #define IT87_SIO_GPIO5_REG      0x29
 231 #define IT87_SIO_GPIO9_REG      0xd3
 232 #define IT87_SIO_PINX1_REG      0x2a    /* Pin selection */
 233 #define IT87_SIO_PINX2_REG      0x2c    /* Pin selection */
 234 #define IT87_SIO_PINX4_REG      0x2d    /* Pin selection */
 235 #define IT87_SIO_SPI_REG        0xef    /* SPI function pin select */
 236 #define IT87_SIO_VID_REG        0xfc    /* VID value */
 237 #define IT87_SIO_BEEP_PIN_REG   0xf6    /* Beep pin mapping */
 238
 239 /* Update battery voltage after every reading if true */
 240 static bool update_vbat;
 241
 242 /* Not all BIOSes properly configure the PWM registers */
 243 static bool fix_pwm_polarity;
 244
 245 /* Many IT87 constants specified below */
 246
 247 /* Length of ISA address segment */
 248 #define IT87_EXTENT 8
 249
 250 /* Length of ISA address segment for Environmental Controller */
 251 #define IT87_EC_EXTENT 2
 252
 253 /* Offset of EC registers from ISA base address */
 254 #define IT87_EC_OFFSET 5
 255
 256 /* Where are the ISA address/data registers relative to the EC base address */
 257 #define IT87_ADDR_REG_OFFSET 0
 258 #define IT87_DATA_REG_OFFSET 1
 259
 260 /*----- The IT87 registers -----*/
 261
 262 #define IT87_REG_CONFIG        0x00
 263
 264 #define IT87_REG_ALARM1        0x01
 265 #define IT87_REG_ALARM2        0x02
 266 #define IT87_REG_ALARM3        0x03
 267
 268 #define IT87_REG_BANK           0x06
 269
 270 /*
 271  * The IT8718F and IT8720F have the VID value in a different register, in
 272  * Super-I/O configuration space.
 273  */
 274 #define IT87_REG_VID           0x0a
 275 /*
 276  * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
 277  * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
 278  * mode.
 279  */
 280 #define IT87_REG_FAN_DIV       0x0b
 281 #define IT87_REG_FAN_16BIT     0x0c
 282
 283 /*
 284  * Monitors:
 285  * - up to 13 voltage (0 to 7, battery, avcc, 10 to 12)
 286  * - up to 6 temp (1 to 6)
 287  * - up to 6 fan (1 to 6)
 288  */
 289
 290 static const u8 IT87_REG_FAN[] =        { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c };
 291 static const u8 IT87_REG_FAN_MIN[] =    { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e };
 292 static const u8 IT87_REG_FANX[] =       { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d };
 293 static const u8 IT87_REG_FANX_MIN[] =   { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f };
 294
 295 static const u8 IT87_REG_FAN_8665[] =   { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x93 };
 296 static const u8 IT87_REG_FAN_MIN_8665[] =
 297                                         { 0x10, 0x11, 0x12, 0x84, 0x86, 0xb2 };
 298 static const u8 IT87_REG_FANX_8665[] =  { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x94 };
 299 static const u8 IT87_REG_FANX_MIN_8665[] =
 300                                         { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0xb3 };
 301
 302 static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59, 0x5a, 0x90, 0x91 };
 303
 304 static const u8 IT87_REG_TEMP_OFFSET_8686[] = { 0x56, 0x57, 0x59, 0x90, 0x91, 0x92 };
 305
 306 #define IT87_REG_FAN_MAIN_CTRL 0x13
 307 #define IT87_REG_FAN_CTL       0x14
 308
 309 static const u8 IT87_REG_PWM[] =        { 0x15, 0x16, 0x17, 0x7f, 0xa7, 0xaf };
 310 static const u8 IT87_REG_PWM_8665[] =   { 0x15, 0x16, 0x17, 0x1e, 0x1f, 0x92 };
 311
 312 static const u8 IT87_REG_PWM_DUTY[] =   { 0x63, 0x6b, 0x73, 0x7b, 0xa3, 0xab };
 313
 314 static const u8 IT87_REG_VIN[]  = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26,
 315                                     0x27, 0x28, 0x2f, 0x2c, 0x2d, 0x2e };
 316
 317 #define IT87_REG_TEMP(nr)      (0x29 + (nr))
 318
 319 #define IT87_REG_VIN_MAX(nr)   (0x30 + (nr) * 2)
 320 #define IT87_REG_VIN_MIN(nr)   (0x31 + (nr) * 2)
 321
 322 static const u8 IT87_REG_TEMP_HIGH[] =  { 0x40, 0x42, 0x44, 0x46, 0xb4, 0xb6 };
 323 static const u8 IT87_REG_TEMP_LOW[] =   { 0x41, 0x43, 0x45, 0x47, 0xb5, 0xb7 };
 324
 325 static const u8 IT87_REG_TEMP_HIGH_8686[] =
 326                                         { 0x40, 0x42, 0x44, 0xb4, 0xb6, 0xb8 };
 327 static const u8 IT87_REG_TEMP_LOW_8686[] =
 328                                         { 0x41, 0x43, 0x45, 0xb5, 0xb7, 0xb9 };
 329
 330 #define IT87_REG_VIN_ENABLE    0x50
 331 #define IT87_REG_TEMP_ENABLE   0x51
 332 #define IT87_REG_TEMP_EXTRA    0x55
 333 #define IT87_REG_BEEP_ENABLE   0x5c
 334
 335 #define IT87_REG_CHIPID        0x58
 336
 337 static const u8 IT87_REG_AUTO_BASE[] = { 0x60, 0x68, 0x70, 0x78, 0xa0, 0xa8 };
 338
 339 #define IT87_REG_AUTO_TEMP(nr, i) (IT87_REG_AUTO_BASE[nr] + (i))
 340 #define IT87_REG_AUTO_PWM(nr, i)  (IT87_REG_AUTO_BASE[nr] + 5 + (i))
 341
 342 #define IT87_REG_TEMP456_ENABLE 0x77
 343
 344 static const u16 IT87_REG_TEMP_SRC1[] = { 0x21d, 0x21e, 0x21f };
 345 #define IT87_REG_TEMP_SRC2      0x23d
 346
 347 #define NUM_VIN                 ARRAY_SIZE(IT87_REG_VIN)
 348 #define NUM_VIN_LIMIT           8
 349 #define NUM_TEMP                6
 350 #define NUM_FAN                 ARRAY_SIZE(IT87_REG_FAN)
 351 #define NUM_FAN_DIV             3
 352 #define NUM_PWM                 ARRAY_SIZE(IT87_REG_PWM)
 353 #define NUM_AUTO_PWM            ARRAY_SIZE(IT87_REG_PWM)
 354
 355 struct it87_devices {
 356         const char *name;
 357         const char * const suffix;
 358         u32 features;
 359         u8 num_temp_limit;
 360         u8 peci_mask;
 361         u8 old_peci_mask;
 362 };
 363
 364 #define FEAT_12MV_ADC           BIT(0)
 365 #define FEAT_NEWER_AUTOPWM      BIT(1)
 366 #define FEAT_OLD_AUTOPWM        BIT(2)
 367 #define FEAT_16BIT_FANS         BIT(3)
 368 #define FEAT_TEMP_OFFSET        BIT(4)
 369 #define FEAT_TEMP_PECI          BIT(5)
 370 #define FEAT_TEMP_OLD_PECI      BIT(6)
 371 #define FEAT_FAN16_CONFIG       BIT(7)  /* Need to enable 16-bit fans */
 372 #define FEAT_FIVE_FANS          BIT(8)  /* Supports five fans */
 373 #define FEAT_VID                BIT(9)  /* Set if chip supports VID */
 374 #define FEAT_IN7_INTERNAL       BIT(10) /* Set if in7 is internal */
 375 #define FEAT_SIX_FANS           BIT(11) /* Supports six fans */
 376 #define FEAT_10_9MV_ADC         BIT(12)
 377 #define FEAT_AVCC3              BIT(13) /* Chip supports in9/AVCC3 */
 378 #define FEAT_FIVE_PWM           BIT(14) /* Chip supports 5 pwm chn */
 379 #define FEAT_SIX_PWM            BIT(15) /* Chip supports 6 pwm chn */
 380 #define FEAT_PWM_FREQ2          BIT(16) /* Separate pwm freq 2 */
 381 #define FEAT_SIX_TEMP           BIT(17) /* Up to 6 temp sensors */
 382 #define FEAT_VIN3_5V            BIT(18) /* VIN3 connected to +5V */
 383 #define FEAT_FOUR_FANS          BIT(19) /* Supports four fans */
 384 #define FEAT_FOUR_PWM           BIT(20) /* Supports four fan controls */
 385 #define FEAT_BANK_SEL           BIT(21) /* Chip has multi-bank support */
 386 #define FEAT_SCALING            BIT(22) /* Internal voltage scaling */
 387 #define FEAT_FANCTL_ONOFF       BIT(23) /* chip has FAN_CTL ON/OFF */
 388 #define FEAT_11MV_ADC           BIT(24)
 389
 390 static const struct it87_devices it87_devices[] = {
 391         [it87] = {
 392                 .name = "it87",
 393                 .suffix = "F",
 394                 .features = FEAT_OLD_AUTOPWM | FEAT_FANCTL_ONOFF,
 395                                                 /* may need to overwrite */
 396                 .num_temp_limit = 3,
 397         },
 398         [it8712] = {
 399                 .name = "it8712",
 400                 .suffix = "F",
 401                 .features = FEAT_OLD_AUTOPWM | FEAT_VID | FEAT_FANCTL_ONOFF,
 402                                                 /* may need to overwrite */
 403                 .num_temp_limit = 3,
 404         },
 405         [it8716] = {
 406                 .name = "it8716",
 407                 .suffix = "F",
 408                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 409                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2
 410                   | FEAT_FANCTL_ONOFF,
 411                 .num_temp_limit = 3,
 412         },
 413         [it8718] = {
 414                 .name = "it8718",
 415                 .suffix = "F",
 416                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 417                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 418                   | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 419                 .num_temp_limit = 3,
 420                 .old_peci_mask = 0x4,
 421         },
 422         [it8720] = {
 423                 .name = "it8720",
 424                 .suffix = "F",
 425                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 426                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 427                   | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 428                 .num_temp_limit = 3,
 429                 .old_peci_mask = 0x4,
 430         },
 431         [it8721] = {
 432                 .name = "it8721",
 433                 .suffix = "F",
 434                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 435                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 436                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL
 437                   | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF,
 438                 .num_temp_limit = 3,
 439                 .peci_mask = 0x05,
 440                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 441         },
 442         [it8728] = {
 443                 .name = "it8728",
 444                 .suffix = "F",
 445                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 446                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 447                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_SCALING
 448                   | FEAT_FANCTL_ONOFF,
 449                 .num_temp_limit = 3,
 450                 .peci_mask = 0x07,
 451         },
 452         [it8732] = {
 453                 .name = "it8732",
 454                 .suffix = "F",
 455                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 456                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 457                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_FOUR_FANS
 458                   | FEAT_FOUR_PWM | FEAT_FANCTL_ONOFF,
 459                 .num_temp_limit = 3,
 460                 .peci_mask = 0x07,
 461                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 462         },
 463         [it8771] = {
 464                 .name = "it8771",
 465                 .suffix = "E",
 466                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 467                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 468                   | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF,
 469                                 /* PECI: guesswork */
 470                                 /* 12mV ADC (OHM) */
 471                                 /* 16 bit fans (OHM) */
 472                                 /* three fans, always 16 bit (guesswork) */
 473                 .num_temp_limit = 3,
 474                 .peci_mask = 0x07,
 475         },
 476         [it8772] = {
 477                 .name = "it8772",
 478                 .suffix = "E",
 479                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 480                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 481                   | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF,
 482                                 /* PECI (coreboot) */
 483                                 /* 12mV ADC (HWSensors4, OHM) */
 484                                 /* 16 bit fans (HWSensors4, OHM) */
 485                                 /* three fans, always 16 bit (datasheet) */
 486                 .num_temp_limit = 3,
 487                 .peci_mask = 0x07,
 488         },
 489         [it8781] = {
 490                 .name = "it8781",
 491                 .suffix = "F",
 492                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 493                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
 494                   | FEAT_FANCTL_ONOFF,
 495                 .num_temp_limit = 3,
 496                 .old_peci_mask = 0x4,
 497         },
 498         [it8782] = {
 499                 .name = "it8782",
 500                 .suffix = "F",
 501                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 502                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
 503                   | FEAT_FANCTL_ONOFF,
 504                 .num_temp_limit = 3,
 505                 .old_peci_mask = 0x4,
 506         },
 507         [it8783] = {
 508                 .name = "it8783",
 509                 .suffix = "E/F",
 510                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 511                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
 512                   | FEAT_FANCTL_ONOFF,
 513                 .num_temp_limit = 3,
 514                 .old_peci_mask = 0x4,
 515         },
 516         [it8786] = {
 517                 .name = "it8786",
 518                 .suffix = "E",
 519                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 520                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 521                   | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 522                 .num_temp_limit = 3,
 523                 .peci_mask = 0x07,
 524         },
 525         [it8790] = {
 526                 .name = "it8790",
 527                 .suffix = "E",
 528                 .features = FEAT_NEWER_AUTOPWM | FEAT_10_9MV_ADC | FEAT_SCALING
 529                   | FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI
 530                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 531                 .num_temp_limit = 3,
 532                 .peci_mask = 0x07,
 533         },
 534         [it8792] = {
 535                 .name = "it8792",
 536                 .suffix = "E",
 537                 .features = FEAT_NEWER_AUTOPWM | FEAT_10_9MV_ADC | FEAT_SCALING
 538                   | FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI
 539                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 540                 .num_temp_limit = 3,
 541                 .peci_mask = 0x07,
 542         },
 543         [it8603] = {
 544                 .name = "it8603",
 545                 .suffix = "E",
 546                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 547                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 548                   | FEAT_AVCC3 | FEAT_PWM_FREQ2 | FEAT_SCALING,
 549                 .num_temp_limit = 3,
 550                 .peci_mask = 0x07,
 551         },
 552         [it8607] = {
 553                 .name = "it8607",
 554                 .suffix = "E",
 555                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 556                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 557                   | FEAT_AVCC3 | FEAT_PWM_FREQ2 | FEAT_SCALING
 558                   | FEAT_FANCTL_ONOFF,
 559                 .num_temp_limit = 3,
 560                 .peci_mask = 0x07,
 561         },
 562         [it8613] = {
 563                 .name = "it8613",
 564                 .suffix = "E",
 565                 .features = FEAT_NEWER_AUTOPWM | FEAT_11MV_ADC | FEAT_16BIT_FANS
 566                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 567                   | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
 568                   | FEAT_AVCC3 | FEAT_SCALING,
 569                 .num_temp_limit = 6,
 570                 .peci_mask = 0x07,
 571         },
 572         [it8620] = {
 573                 .name = "it8620",
 574                 .suffix = "E",
 575                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 576                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 577                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 578                   | FEAT_SIX_TEMP | FEAT_VIN3_5V | FEAT_SCALING
 579                   | FEAT_FANCTL_ONOFF,
 580                 .num_temp_limit = 3,
 581                 .peci_mask = 0x07,
 582         },
 583         [it8622] = {
 584                 .name = "it8622",
 585                 .suffix = "E",
 586                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 587                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 588                   | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
 589                   | FEAT_AVCC3 | FEAT_VIN3_5V | FEAT_SCALING,
 590                 .num_temp_limit = 3,
 591                 .peci_mask = 0x07,
 592         },
 593         [it8628] = {
 594                 .name = "it8628",
 595                 .suffix = "E",
 596                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 597                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 598                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 599                   | FEAT_SIX_TEMP | FEAT_SCALING | FEAT_AVCC3
 600                   | FEAT_FANCTL_ONOFF,
 601                 .num_temp_limit = 3,
 602                 .peci_mask = 0x07,
 603         },
 604         [it8655] = {
 605                 .name = "it8655",
 606                 .suffix = "E",
 607                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 608                   | FEAT_TEMP_OFFSET | FEAT_AVCC3
 609                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_BANK_SEL,
 610                 .num_temp_limit = 6,
 611         },
 612         [it8665] = {
 613                 .name = "it8665",
 614                 .suffix = "E",
 615                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 616                   | FEAT_TEMP_OFFSET | FEAT_AVCC3
 617                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_SIX_FANS
 618                   | FEAT_SIX_PWM | FEAT_BANK_SEL,
 619                 .num_temp_limit = 6,
 620         },
 621         [it8686] = {
 622                 .name = "it8686",
 623                 .suffix = "E",
 624                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 625                   | FEAT_TEMP_OFFSET | FEAT_SIX_FANS
 626                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 627                   | FEAT_SIX_TEMP | FEAT_BANK_SEL | FEAT_SCALING | FEAT_AVCC3,
 628                 .num_temp_limit = 6,
 629         },
 630 };
 631
 632 #define has_16bit_fans(data)    ((data)->features & FEAT_16BIT_FANS)
 633 #define has_12mv_adc(data)      ((data)->features & FEAT_12MV_ADC)
 634 #define has_10_9mv_adc(data)    ((data)->features & FEAT_10_9MV_ADC)
 635 #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
 636 #define has_old_autopwm(data)   ((data)->features & FEAT_OLD_AUTOPWM)
 637 #define has_temp_offset(data)   ((data)->features & FEAT_TEMP_OFFSET)
 638 #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \
 639                                  ((data)->peci_mask & BIT(nr)))
 640 #define has_temp_old_peci(data, nr) \
 641                                 (((data)->features & FEAT_TEMP_OLD_PECI) && \
 642                                  ((data)->old_peci_mask & BIT(nr)))
 643 #define has_fan16_config(data)  ((data)->features & FEAT_FAN16_CONFIG)
 644 #define has_five_fans(data)     ((data)->features & (FEAT_FIVE_FANS | \
 645                                                      FEAT_SIX_FANS))
 646 #define has_vid(data)           ((data)->features & FEAT_VID)
 647 #define has_in7_internal(data)  ((data)->features & FEAT_IN7_INTERNAL)
 648 #define has_six_fans(data)      ((data)->features & FEAT_SIX_FANS)
 649 #define has_avcc3(data)         ((data)->features & FEAT_AVCC3)
 650 #define has_five_pwm(data)      ((data)->features & (FEAT_FIVE_PWM \
 651                                                      | FEAT_SIX_PWM))
 652 #define has_six_pwm(data)       ((data)->features & FEAT_SIX_PWM)
 653 #define has_pwm_freq2(data)     ((data)->features & FEAT_PWM_FREQ2)
 654 #define has_six_temp(data)      ((data)->features & FEAT_SIX_TEMP)
 655 #define has_vin3_5v(data)       ((data)->features & FEAT_VIN3_5V)
 656 #define has_four_fans(data)     ((data)->features & (FEAT_FOUR_FANS | \
 657                                                      FEAT_FIVE_FANS | \
 658                                                      FEAT_SIX_FANS))
 659 #define has_four_pwm(data)      ((data)->features & (FEAT_FOUR_PWM | \
 660                                                      FEAT_FIVE_PWM \
 661                                                      | FEAT_SIX_PWM))
 662 #define has_bank_sel(data)      ((data)->features & FEAT_BANK_SEL)
 663 #define has_scaling(data)       ((data)->features & FEAT_SCALING)
 664 #define has_fanctl_onoff(data)  ((data)->features & FEAT_FANCTL_ONOFF)
 665 #define has_11mv_adc(data)      ((data)->features & FEAT_11MV_ADC)
 666
 667 struct it87_sio_data {
 668         enum chips type;
 669         /* Values read from Super-I/O config space */
 670         u8 revision;
 671         u8 vid_value;
 672         u8 beep_pin;
 673         u8 internal;    /* Internal sensors can be labeled */
 674         /* Features skipped based on config or DMI */
 675         u16 skip_in;
 676         u8 skip_vid;
 677         u8 skip_fan;
 678         u8 skip_pwm;
 679         u8 skip_temp;
 680 };
 681
 682 /*
 683  * For each registered chip, we need to keep some data in memory.
 684  * The structure is dynamically allocated.
 685  */
 686 struct it87_data {
 687         const struct attribute_group *groups[7];
 688         enum chips type;
 689         u32 features;
 690         u8 bank;
 691         u8 peci_mask;
 692         u8 old_peci_mask;
 693
 694         const u8 *REG_FAN;
 695         const u8 *REG_FANX;
 696         const u8 *REG_FAN_MIN;
 697         const u8 *REG_FANX_MIN;
 698
 699         const u8 *REG_PWM;
 700
 701         const u8 *REG_TEMP_OFFSET;
 702         const u8 *REG_TEMP_LOW;
 703         const u8 *REG_TEMP_HIGH;
 704
 705         unsigned short addr;
 706         const char *name;
 707         struct mutex update_lock;
 708         char valid;             /* !=0 if following fields are valid */
 709         unsigned long last_updated;     /* In jiffies */
 710
 711         u16 in_scaled;          /* Internal voltage sensors are scaled */
 712         u16 in_internal;        /* Bitfield, internal sensors (for labels) */
 713         u16 has_in;             /* Bitfield, voltage sensors enabled */
 714         u8 in[NUM_VIN][3];              /* [nr][0]=in, [1]=min, [2]=max */
 715         u8 has_fan;             /* Bitfield, fans enabled */
 716         u16 fan[NUM_FAN][2];    /* Register values, [nr][0]=fan, [1]=min */
 717         u8 has_temp;            /* Bitfield, temp sensors enabled */
 718         s8 temp[NUM_TEMP][4];   /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
 719         u8 num_temp_limit;      /* Number of temp limit/offset registers */
 720         u8 sensor;              /* Register value (IT87_REG_TEMP_ENABLE) */
 721         u8 extra;               /* Register value (IT87_REG_TEMP_EXTRA) */
 722         u8 fan_div[NUM_FAN_DIV];/* Register encoding, shifted right */
 723         bool has_vid;           /* True if VID supported */
 724         u8 vid;                 /* Register encoding, combined */
 725         u8 vrm;
 726         u32 alarms;             /* Register encoding, combined */
 727         bool has_beep;          /* true if beep supported */
 728         u8 beeps;               /* Register encoding */
 729         u8 fan_main_ctrl;       /* Register value */
 730         u8 fan_ctl;             /* Register value */
 731
 732         /*
 733          * The following 3 arrays correspond to the same registers up to
 734          * the IT8720F. The meaning of bits 6-0 depends on the value of bit
 735          * 7, and we want to preserve settings on mode changes, so we have
 736          * to track all values separately.
 737          * Starting with the IT8721F, the manual PWM duty cycles are stored
 738          * in separate registers (8-bit values), so the separate tracking
 739          * is no longer needed, but it is still done to keep the driver
 740          * simple.
 741          */
 742         u8 has_pwm;             /* Bitfield, pwm control enabled */
 743         u8 pwm_ctrl[NUM_PWM];   /* Register value */
 744         u8 pwm_duty[NUM_PWM];   /* Manual PWM value set by user */
 745         u8 pwm_temp_map[NUM_PWM];/* PWM to temp. chan. mapping (bits 1-0) */
 746
 747         /* Automatic fan speed control registers */
 748         u8 auto_pwm[NUM_AUTO_PWM][4];   /* [nr][3] is hard-coded */
 749         s8 auto_temp[NUM_AUTO_PWM][5];  /* [nr][0] is point1_temp_hyst */
 750 };
 751
 752 static int adc_lsb(const struct it87_data *data, int nr)
 753 {
 754         int lsb;
 755
 756         if (has_12mv_adc(data))
 757                 lsb = 120;
 758         else if (has_10_9mv_adc(data))
 759                 lsb = 109;
 760         else if (has_11mv_adc(data))
 761                 lsb = 110;
 762         else
 763                 lsb = 160;
 764         if (data->in_scaled & BIT(nr))
 765                 lsb <<= 1;
 766         return lsb;
 767 }
 768
 769 static u8 in_to_reg(const struct it87_data *data, int nr, long val)
 770 {
 771         val = DIV_ROUND_CLOSEST(val * 10, adc_lsb(data, nr));
 772         return clamp_val(val, 0, 255);
 773 }
 774
 775 static int in_from_reg(const struct it87_data *data, int nr, int val)
 776 {
 777         return DIV_ROUND_CLOSEST(val * adc_lsb(data, nr), 10);
 778 }
 779
 780 static inline u8 FAN_TO_REG(long rpm, int div)
 781 {
 782         if (rpm == 0)
 783                 return 255;
 784         rpm = clamp_val(rpm, 1, 1000000);
 785         return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
 786 }
 787
 788 static inline u16 FAN16_TO_REG(long rpm)
 789 {
 790         if (rpm == 0)
 791                 return 0xffff;
 792         return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
 793 }
 794
 795 #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
 796                                 1350000 / ((val) * (div)))
 797 /* The divider is fixed to 2 in 16-bit mode */
 798 #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
 799                              1350000 / ((val) * 2))
 800
 801 #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \
 802                                     ((val) + 500) / 1000), -128, 127))
 803 #define TEMP_FROM_REG(val) ((val) * 1000)
 804
 805 static u8 pwm_to_reg(const struct it87_data *data, long val)
 806 {
 807         if (has_newer_autopwm(data))
 808                 return val;
 809         else
 810                 return val >> 1;
 811 }
 812
 813 static int pwm_from_reg(const struct it87_data *data, u8 reg)
 814 {
 815         if (has_newer_autopwm(data))
 816                 return reg;
 817         else
 818                 return (reg & 0x7f) << 1;
 819 }
 820
 821 static int DIV_TO_REG(int val)
 822 {
 823         int answer = 0;
 824
 825         while (answer < 7 && (val >>= 1))
 826                 answer++;
 827         return answer;
 828 }
 829
 830 #define DIV_FROM_REG(val) BIT(val)
 831
 832 /*
 833  * PWM base frequencies. The frequency has to be divided by either 128 or 256,
 834  * depending on the chip type, to calculate the actual PWM frequency.
 835  *
 836  * Some of the chip datasheets suggest a base frequency of 51 kHz instead
 837  * of 750 kHz for the slowest base frequency, resulting in a PWM frequency
 838  * of 200 Hz. Sometimes both PWM frequency select registers are affected,
 839  * sometimes just one. It is unknown if this is a datasheet error or real,
 840  * so this is ignored for now.
 841  */
 842 static const unsigned int pwm_freq[8] = {
 843         48000000,
 844         24000000,
 845         12000000,
 846         8000000,
 847         6000000,
 848         3000000,
 849         1500000,
 850         750000,
 851 };
 852
 853 static int _it87_read_value(struct it87_data *data, u8 reg)
 854 {
 855         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 856         return inb_p(data->addr + IT87_DATA_REG_OFFSET);
 857 }
 858
 859 static void _it87_write_value(struct it87_data *data, u8 reg, u8 value)
 860 {
 861         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 862         outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
 863 }
 864
 865 static void it87_set_bank(struct it87_data *data, u8 bank)
 866 {
 867         if (has_bank_sel(data) && bank != data->bank) {
 868                 u8 breg = _it87_read_value(data, IT87_REG_BANK);
 869
 870                 breg &= 0x1f;
 871                 breg |= (bank << 5);
 872                 data->bank = bank;
 873                 _it87_write_value(data, IT87_REG_BANK, breg);
 874         }
 875 }
 876
 877 /*
 878  * Must be called with data->update_lock held, except during initialization.
 879  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 880  * would slow down the IT87 access and should not be necessary.
 881  */
 882 static int it87_read_value(struct it87_data *data, u16 reg)
 883 {
 884         it87_set_bank(data, reg >> 8);
 885         return _it87_read_value(data, reg & 0xff);
 886 }
 887
 888 /*
 889  * Must be called with data->update_lock held, except during initialization.
 890  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 891  * would slow down the IT87 access and should not be necessary.
 892  */
 893 static void it87_write_value(struct it87_data *data, u16 reg, u8 value)
 894 {
 895         it87_set_bank(data, reg >> 8);
 896         _it87_write_value(data, reg & 0xff, value);
 897 }
 898
 899 static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
 900 {
 901         data->pwm_ctrl[nr] = it87_read_value(data, data->REG_PWM[nr]);
 902         if (has_newer_autopwm(data)) {
 903                 if (data->type == it8613)
 904                         data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x38;
 905                 else
 906                         data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
 907                 data->pwm_duty[nr] = it87_read_value(data,
 908                                                      IT87_REG_PWM_DUTY[nr]);
 909         } else {
 910                 if (data->pwm_ctrl[nr] & 0x80)  /* Automatic mode */
 911                         data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
 912                 else                            /* Manual mode */
 913                         data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
 914         }
 915
 916         if (has_old_autopwm(data)) {
 917                 int i;
 918
 919                 for (i = 0; i < 5 ; i++)
 920                         data->auto_temp[nr][i] = it87_read_value(data,
 921                                                 IT87_REG_AUTO_TEMP(nr, i));
 922                 for (i = 0; i < 3 ; i++)
 923                         data->auto_pwm[nr][i] = it87_read_value(data,
 924                                                 IT87_REG_AUTO_PWM(nr, i));
 925         } else if (has_newer_autopwm(data)) {
 926                 int i;
 927
 928                 /*
 929                  * 0: temperature hysteresis (base + 5)
 930                  * 1: fan off temperature (base + 0)
 931                  * 2: fan start temperature (base + 1)
 932                  * 3: fan max temperature (base + 2)
 933                  */
 934                 data->auto_temp[nr][0] =
 935                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 5));
 936
 937                 for (i = 0; i < 3 ; i++)
 938                         data->auto_temp[nr][i + 1] =
 939                                 it87_read_value(data,
 940                                                 IT87_REG_AUTO_TEMP(nr, i));
 941                 /*
 942                  * 0: start pwm value (base + 3)
 943                  * 1: pwm slope (base + 4, 1/8th pwm)
 944                  */
 945                 data->auto_pwm[nr][0] =
 946                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 3));
 947                 data->auto_pwm[nr][1] =
 948                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 4));
 949         }
 950 }
 951
 952 static struct it87_data *it87_update_device(struct device *dev)
 953 {
 954         struct it87_data *data = dev_get_drvdata(dev);
 955         int i;
 956
 957         mutex_lock(&data->update_lock);
 958
 959         if (time_after(jiffies, data->last_updated + HZ + HZ / 2) ||
 960             !data->valid) {
 961                 if (update_vbat) {
 962                         /*
 963                          * Cleared after each update, so reenable.  Value
 964                          * returned by this read will be previous value
 965                          */
 966                         it87_write_value(data, IT87_REG_CONFIG,
 967                                 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
 968                 }
 969                 for (i = 0; i < NUM_VIN; i++) {
 970                         if (!(data->has_in & BIT(i)))
 971                                 continue;
 972
 973                         data->in[i][0] =
 974                                 it87_read_value(data, IT87_REG_VIN[i]);
 975
 976                         /* VBAT and AVCC don't have limit registers */
 977                         if (i >= NUM_VIN_LIMIT)
 978                                 continue;
 979
 980                         data->in[i][1] =
 981                                 it87_read_value(data, IT87_REG_VIN_MIN(i));
 982                         data->in[i][2] =
 983                                 it87_read_value(data, IT87_REG_VIN_MAX(i));
 984                 }
 985
 986                 for (i = 0; i < NUM_FAN; i++) {
 987                         /* Skip disabled fans */
 988                         if (!(data->has_fan & BIT(i)))
 989                                 continue;
 990
 991                         data->fan[i][1] =
 992                                 it87_read_value(data, data->REG_FAN_MIN[i]);
 993                         data->fan[i][0] = it87_read_value(data,
 994                                        data->REG_FAN[i]);
 995                         /* Add high byte if in 16-bit mode */
 996                         if (has_16bit_fans(data)) {
 997                                 data->fan[i][0] |= it87_read_value(data,
 998                                                 data->REG_FANX[i]) << 8;
 999                                 data->fan[i][1] |= it87_read_value(data,
1000                                                 data->REG_FANX_MIN[i]) << 8;
1001                         }
1002                 }
1003                 for (i = 0; i < NUM_TEMP; i++) {
1004                         if (!(data->has_temp & BIT(i)))
1005                                 continue;
1006                         data->temp[i][0] =
1007                                 it87_read_value(data, IT87_REG_TEMP(i));
1008
1009                         if (i >= data->num_temp_limit)
1010                                 continue;
1011
1012                         if (has_temp_offset(data))
1013                                 data->temp[i][3] =
1014                                   it87_read_value(data,
1015                                                   data->REG_TEMP_OFFSET[i]);
1016
1017                         data->temp[i][1] =
1018                                 it87_read_value(data, data->REG_TEMP_LOW[i]);
1019                         data->temp[i][2] =
1020                                 it87_read_value(data, data->REG_TEMP_HIGH[i]);
1021                 }
1022
1023                 /* Newer chips don't have clock dividers */
1024                 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
1025                         i = it87_read_value(data, IT87_REG_FAN_DIV);
1026                         data->fan_div[0] = i & 0x07;
1027                         data->fan_div[1] = (i >> 3) & 0x07;
1028                         data->fan_div[2] = (i & 0x40) ? 3 : 1;
1029                 }
1030
1031                 data->alarms =
1032                         it87_read_value(data, IT87_REG_ALARM1) |
1033                         (it87_read_value(data, IT87_REG_ALARM2) << 8) |
1034                         (it87_read_value(data, IT87_REG_ALARM3) << 16);
1035                 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1036
1037                 data->fan_main_ctrl = it87_read_value(data,
1038                                 IT87_REG_FAN_MAIN_CTRL);
1039                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
1040                 for (i = 0; i < NUM_PWM; i++) {
1041                         if (!(data->has_pwm & BIT(i)))
1042                                 continue;
1043                         it87_update_pwm_ctrl(data, i);
1044                 }
1045
1046                 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1047                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1048                 /*
1049                  * The IT8705F does not have VID capability.
1050                  * The IT8718F and later don't use IT87_REG_VID for the
1051                  * same purpose.
1052                  */
1053                 if (data->type == it8712 || data->type == it8716) {
1054                         data->vid = it87_read_value(data, IT87_REG_VID);
1055                         /*
1056                          * The older IT8712F revisions had only 5 VID pins,
1057                          * but we assume it is always safe to read 6 bits.
1058                          */
1059                         data->vid &= 0x3f;
1060                 }
1061                 data->last_updated = jiffies;
1062                 data->valid = 1;
1063         }
1064
1065         mutex_unlock(&data->update_lock);
1066
1067         return data;
1068 }
1069
1070 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
1071                        char *buf)
1072 {
1073         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1074         struct it87_data *data = it87_update_device(dev);
1075         int index = sattr->index;
1076         int nr = sattr->nr;
1077
1078         return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
1079 }
1080
1081 static ssize_t set_in(struct device *dev, struct device_attribute *attr,
1082                       const char *buf, size_t count)
1083 {
1084         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1085         struct it87_data *data = dev_get_drvdata(dev);
1086         int index = sattr->index;
1087         int nr = sattr->nr;
1088         unsigned long val;
1089
1090         if (kstrtoul(buf, 10, &val) < 0)
1091                 return -EINVAL;
1092
1093         mutex_lock(&data->update_lock);
1094         data->in[nr][index] = in_to_reg(data, nr, val);
1095         it87_write_value(data,
1096                          index == 1 ? IT87_REG_VIN_MIN(nr)
1097                                     : IT87_REG_VIN_MAX(nr),
1098                          data->in[nr][index]);
1099         mutex_unlock(&data->update_lock);
1100         return count;
1101 }
1102
1103 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
1104 static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
1105                             0, 1);
1106 static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
1107                             0, 2);
1108
1109 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
1110 static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
1111                             1, 1);
1112 static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
1113                             1, 2);
1114
1115 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
1116 static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
1117                             2, 1);
1118 static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
1119                             2, 2);
1120
1121 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
1122 static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
1123                             3, 1);
1124 static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
1125                             3, 2);
1126
1127 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
1128 static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
1129                             4, 1);
1130 static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
1131                             4, 2);
1132
1133 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
1134 static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
1135                             5, 1);
1136 static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
1137                             5, 2);
1138
1139 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
1140 static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
1141                             6, 1);
1142 static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
1143                             6, 2);
1144
1145 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
1146 static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
1147                             7, 1);
1148 static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
1149                             7, 2);
1150
1151 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
1152 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0);
1153 static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in, NULL, 10, 0);
1154 static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in, NULL, 11, 0);
1155 static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in, NULL, 12, 0);
1156
1157 /* Up to 6 temperatures */
1158 static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
1159                          char *buf)
1160 {
1161         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1162         int nr = sattr->nr;
1163         int index = sattr->index;
1164         struct it87_data *data = it87_update_device(dev);
1165
1166         return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
1167 }
1168
1169 static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
1170                         const char *buf, size_t count)
1171 {
1172         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1173         int nr = sattr->nr;
1174         int index = sattr->index;
1175         struct it87_data *data = dev_get_drvdata(dev);
1176         long val;
1177         u8 reg, regval;
1178
1179         if (kstrtol(buf, 10, &val) < 0)
1180                 return -EINVAL;
1181
1182         mutex_lock(&data->update_lock);
1183
1184         switch (index) {
1185         default:
1186         case 1:
1187                 reg = data->REG_TEMP_LOW[nr];
1188                 break;
1189         case 2:
1190                 reg = data->REG_TEMP_HIGH[nr];
1191                 break;
1192         case 3:
1193                 regval = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1194                 if (!(regval & 0x80)) {
1195                         regval |= 0x80;
1196                         it87_write_value(data, IT87_REG_BEEP_ENABLE, regval);
1197                 }
1198                 data->valid = 0;
1199                 reg = data->REG_TEMP_OFFSET[nr];
1200                 break;
1201         }
1202
1203         data->temp[nr][index] = TEMP_TO_REG(val);
1204         it87_write_value(data, reg, data->temp[nr][index]);
1205         mutex_unlock(&data->update_lock);
1206         return count;
1207 }
1208
1209 static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
1210 static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1211                             0, 1);
1212 static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1213                             0, 2);
1214 static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
1215                             set_temp, 0, 3);
1216 static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
1217 static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1218                             1, 1);
1219 static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1220                             1, 2);
1221 static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
1222                             set_temp, 1, 3);
1223 static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
1224 static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1225                             2, 1);
1226 static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1227                             2, 2);
1228 static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
1229                             set_temp, 2, 3);
1230 static SENSOR_DEVICE_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0);
1231 static SENSOR_DEVICE_ATTR_2(temp4_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1232                             3, 1);
1233 static SENSOR_DEVICE_ATTR_2(temp4_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1234                             3, 2);
1235 static SENSOR_DEVICE_ATTR_2(temp4_offset, S_IRUGO | S_IWUSR, show_temp,
1236                             set_temp, 3, 3);
1237 static SENSOR_DEVICE_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0);
1238 static SENSOR_DEVICE_ATTR_2(temp5_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1239                             4, 1);
1240 static SENSOR_DEVICE_ATTR_2(temp5_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1241                             4, 2);
1242 static SENSOR_DEVICE_ATTR_2(temp5_offset, S_IRUGO | S_IWUSR, show_temp,
1243                             set_temp, 4, 3);
1244 static SENSOR_DEVICE_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0);
1245 static SENSOR_DEVICE_ATTR_2(temp6_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1246                             5, 1);
1247 static SENSOR_DEVICE_ATTR_2(temp6_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1248                             5, 2);
1249 static SENSOR_DEVICE_ATTR_2(temp6_offset, S_IRUGO | S_IWUSR, show_temp,
1250                             set_temp, 5, 3);
1251
1252 static int get_temp_type(struct it87_data *data, int index)
1253 {
1254         u8 reg, extra;
1255         int type = 0;
1256
1257         if (has_bank_sel(data)) {
1258                 int s1reg = IT87_REG_TEMP_SRC1[index/2] >> ((index % 2) * 4);
1259                 u8 src1, src2;
1260
1261                 src1 = (it87_read_value(data, s1reg) >> ((index % 2) * 4)) & 0x0f;
1262                 src2 = it87_read_value(data, IT87_REG_TEMP_SRC2);
1263
1264                 switch (data->type) {
1265                 case it8686:
1266                         switch (src1) {
1267                         case 0:
1268                                 if (index >= 3)
1269                                         return 4;
1270                                 break;
1271                         case 1:
1272                                 if (index == 1 || index == 2 ||
1273                                           index == 4 || index == 5)
1274                                         return 6;
1275                                 break;
1276                         case 2:
1277                                 if (index == 2 || index == 6)
1278                                         return 5;
1279                                 break;
1280                         default:
1281                                 break;
1282                         }
1283                         break;
1284                 case it8655:
1285                 case it8665:
1286                         if (src1 < 3) {
1287                                 index = src1;
1288                                 break;
1289                         }
1290                         switch(src1) {
1291                         case 3:
1292                                 type = (src2 & BIT(index)) ? 6 : 5;
1293                                 break;
1294                         case 4 ... 8:
1295                                 type = (src2 & BIT(index)) ? 4 : 6;
1296                                 break;
1297                         case 9:
1298                                 type = (src2 & BIT(index)) ? 5 : 0;
1299                                 break;
1300                         default:
1301                                 break;
1302                         }
1303                         return type;
1304                 default:
1305                         return 0;
1306                 }
1307         }
1308         if (index >= 3)
1309                 return 0;
1310
1311         reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1312         extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1313
1314         if ((has_temp_peci(data, index) && (reg >> 6 == index + 1)) ||
1315             (has_temp_old_peci(data, index) && (extra & 0x80)))
1316                 type = 6;               /* Intel PECI */
1317         if (reg & BIT(index))
1318                 type = 3;               /* thermal diode */
1319         else if (reg & BIT(index + 3))
1320                 type = 4;               /* thermistor */
1321
1322         return type;
1323 }
1324
1325 static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
1326                               char *buf)
1327 {
1328         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1329         struct it87_data *data = it87_update_device(dev);
1330         int type = get_temp_type(data, sensor_attr->index);
1331
1332         return sprintf(buf, "%d\n", type);
1333 }
1334
1335 static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
1336                              const char *buf, size_t count)
1337 {
1338         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1339         int nr = sensor_attr->index;
1340
1341         struct it87_data *data = dev_get_drvdata(dev);
1342         long val;
1343         u8 reg, extra;
1344
1345         if (kstrtol(buf, 10, &val) < 0)
1346                 return -EINVAL;
1347
1348         reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1349         reg &= ~(1 << nr);
1350         reg &= ~(8 << nr);
1351         if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6))
1352                 reg &= 0x3f;
1353         extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1354         if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6))
1355                 extra &= 0x7f;
1356         if (val == 2) { /* backwards compatibility */
1357                 dev_warn(dev,
1358                          "Sensor type 2 is deprecated, please use 4 instead\n");
1359                 val = 4;
1360         }
1361         /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */
1362         if (val == 3)
1363                 reg |= 1 << nr;
1364         else if (val == 4)
1365                 reg |= 8 << nr;
1366         else if (has_temp_peci(data, nr) && val == 6)
1367                 reg |= (nr + 1) << 6;
1368         else if (has_temp_old_peci(data, nr) && val == 6)
1369                 extra |= 0x80;
1370         else if (val != 0)
1371                 return -EINVAL;
1372
1373         mutex_lock(&data->update_lock);
1374         data->sensor = reg;
1375         data->extra = extra;
1376         it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
1377         if (has_temp_old_peci(data, nr))
1378                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1379         data->valid = 0;        /* Force cache refresh */
1380         mutex_unlock(&data->update_lock);
1381         return count;
1382 }
1383
1384 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1385                           set_temp_type, 0);
1386 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1387                           set_temp_type, 1);
1388 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1389                           set_temp_type, 2);
1390 static SENSOR_DEVICE_ATTR(temp4_type, S_IRUGO | S_IWUSR, show_temp_type,
1391                           set_temp_type, 3);
1392 static SENSOR_DEVICE_ATTR(temp5_type, S_IRUGO | S_IWUSR, show_temp_type,
1393                           set_temp_type, 4);
1394 static SENSOR_DEVICE_ATTR(temp6_type, S_IRUGO | S_IWUSR, show_temp_type,
1395                           set_temp_type, 5);
1396
1397 /* 6 Fans */
1398
1399 static int pwm_mode(const struct it87_data *data, int nr)
1400 {
1401         if (has_fanctl_onoff(data) && nr < 3 &&
1402             !(data->fan_main_ctrl & BIT(nr)))
1403                 return 0;                               /* Full speed */
1404         if (data->pwm_ctrl[nr] & 0x80)
1405                 return 2;                               /* Automatic mode */
1406         if ((!has_fanctl_onoff(data) || nr >= 3) &&
1407             data->pwm_duty[nr] == pwm_to_reg(data, 0xff))
1408                 return 0;                       /* Full speed */
1409
1410         return 1;                               /* Manual mode */
1411 }
1412
1413 static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
1414                         char *buf)
1415 {
1416         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1417         int nr = sattr->nr;
1418         int index = sattr->index;
1419         int speed;
1420         struct it87_data *data = it87_update_device(dev);
1421
1422         speed = has_16bit_fans(data) ?
1423                 FAN16_FROM_REG(data->fan[nr][index]) :
1424                 FAN_FROM_REG(data->fan[nr][index],
1425                              DIV_FROM_REG(data->fan_div[nr]));
1426         return sprintf(buf, "%d\n", speed);
1427 }
1428
1429 static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
1430                             char *buf)
1431 {
1432         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1433         struct it87_data *data = it87_update_device(dev);
1434         int nr = sensor_attr->index;
1435
1436         return sprintf(buf, "%lu\n", DIV_FROM_REG(data->fan_div[nr]));
1437 }
1438
1439 static ssize_t show_pwm_enable(struct device *dev,
1440                                struct device_attribute *attr, char *buf)
1441 {
1442         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1443         struct it87_data *data = it87_update_device(dev);
1444         int nr = sensor_attr->index;
1445
1446         return sprintf(buf, "%d\n", pwm_mode(data, nr));
1447 }
1448
1449 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
1450                         char *buf)
1451 {
1452         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1453         struct it87_data *data = it87_update_device(dev);
1454         int nr = sensor_attr->index;
1455
1456         return sprintf(buf, "%d\n",
1457                        pwm_from_reg(data, data->pwm_duty[nr]));
1458 }
1459
1460 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
1461                              char *buf)
1462 {
1463         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1464         struct it87_data *data = it87_update_device(dev);
1465         int nr = sensor_attr->index;
1466         unsigned int freq;
1467         int index;
1468
1469         if (has_pwm_freq2(data) && nr == 1)
1470                 index = (data->extra >> 4) & 0x07;
1471         else
1472                 index = (data->fan_ctl >> 4) & 0x07;
1473
1474         freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128);
1475
1476         return sprintf(buf, "%u\n", freq);
1477 }
1478
1479 static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
1480                        const char *buf, size_t count)
1481 {
1482         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1483         int nr = sattr->nr;
1484         int index = sattr->index;
1485
1486         struct it87_data *data = dev_get_drvdata(dev);
1487         long val;
1488         u8 reg;
1489
1490         if (kstrtol(buf, 10, &val) < 0)
1491                 return -EINVAL;
1492
1493         mutex_lock(&data->update_lock);
1494
1495         if (has_16bit_fans(data)) {
1496                 data->fan[nr][index] = FAN16_TO_REG(val);
1497                 it87_write_value(data, data->REG_FAN_MIN[nr],
1498                                  data->fan[nr][index] & 0xff);
1499                 it87_write_value(data, data->REG_FANX_MIN[nr],
1500                                  data->fan[nr][index] >> 8);
1501         } else {
1502                 reg = it87_read_value(data, IT87_REG_FAN_DIV);
1503                 switch (nr) {
1504                 case 0:
1505                         data->fan_div[nr] = reg & 0x07;
1506                         break;
1507                 case 1:
1508                         data->fan_div[nr] = (reg >> 3) & 0x07;
1509                         break;
1510                 case 2:
1511                         data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
1512                         break;
1513                 }
1514                 data->fan[nr][index] =
1515                   FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
1516                 it87_write_value(data, data->REG_FAN_MIN[nr],
1517                                  data->fan[nr][index]);
1518         }
1519
1520         mutex_unlock(&data->update_lock);
1521         return count;
1522 }
1523
1524 static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
1525                            const char *buf, size_t count)
1526 {
1527         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1528         struct it87_data *data = dev_get_drvdata(dev);
1529         int nr = sensor_attr->index;
1530         unsigned long val;
1531         int min;
1532         u8 old;
1533
1534         if (kstrtoul(buf, 10, &val) < 0)
1535                 return -EINVAL;
1536
1537         mutex_lock(&data->update_lock);
1538         old = it87_read_value(data, IT87_REG_FAN_DIV);
1539
1540         /* Save fan min limit */
1541         min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
1542
1543         switch (nr) {
1544         case 0:
1545         case 1:
1546                 data->fan_div[nr] = DIV_TO_REG(val);
1547                 break;
1548         case 2:
1549                 if (val < 8)
1550                         data->fan_div[nr] = 1;
1551                 else
1552                         data->fan_div[nr] = 3;
1553         }
1554         val = old & 0x80;
1555         val |= (data->fan_div[0] & 0x07);
1556         val |= (data->fan_div[1] & 0x07) << 3;
1557         if (data->fan_div[2] == 3)
1558                 val |= 0x1 << 6;
1559         it87_write_value(data, IT87_REG_FAN_DIV, val);
1560
1561         /* Restore fan min limit */
1562         data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
1563         it87_write_value(data, data->REG_FAN_MIN[nr], data->fan[nr][1]);
1564
1565         mutex_unlock(&data->update_lock);
1566         return count;
1567 }
1568
1569 /* Returns 0 if OK, -EINVAL otherwise */
1570 static int check_trip_points(struct device *dev, int nr)
1571 {
1572         const struct it87_data *data = dev_get_drvdata(dev);
1573         int i, err = 0;
1574
1575         if (has_old_autopwm(data)) {
1576                 for (i = 0; i < 3; i++) {
1577                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1578                                 err = -EINVAL;
1579                 }
1580                 for (i = 0; i < 2; i++) {
1581                         if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1582                                 err = -EINVAL;
1583                 }
1584         } else if (has_newer_autopwm(data)) {
1585                 for (i = 1; i < 3; i++) {
1586                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1587                                 err = -EINVAL;
1588                 }
1589         }
1590
1591         if (err) {
1592                 dev_err(dev,
1593                         "Inconsistent trip points, not switching to automatic mode\n");
1594                 dev_err(dev, "Adjust the trip points and try again\n");
1595         }
1596         return err;
1597 }
1598
1599 static ssize_t set_pwm_enable(struct device *dev, struct device_attribute *attr,
1600                               const char *buf, size_t count)
1601 {
1602         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1603         struct it87_data *data = dev_get_drvdata(dev);
1604         int nr = sensor_attr->index;
1605         long val;
1606
1607         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
1608                 return -EINVAL;
1609
1610         /* Check trip points before switching to automatic mode */
1611         if (val == 2) {
1612                 if (check_trip_points(dev, nr) < 0)
1613                         return -EINVAL;
1614         }
1615
1616         mutex_lock(&data->update_lock);
1617
1618         if (val == 0) {
1619                 if (nr < 3 && has_fanctl_onoff(data)) {
1620                         int tmp;
1621                         /* make sure the fan is on when in on/off mode */
1622                         tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1623                         it87_write_value(data, IT87_REG_FAN_CTL, tmp | BIT(nr));
1624                         /* set on/off mode */
1625                         data->fan_main_ctrl &= ~BIT(nr);
1626                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1627                                          data->fan_main_ctrl);
1628                 } else {
1629                         u8 ctrl;
1630
1631                         /* No on/off mode, set maximum pwm value */
1632                         data->pwm_duty[nr] = pwm_to_reg(data, 0xff);
1633                         it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1634                                          data->pwm_duty[nr]);
1635                         /* and set manual mode */
1636                         if (has_newer_autopwm(data)) {
1637                                 ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1638                                         data->pwm_temp_map[nr];
1639                         } else {
1640                                 ctrl = data->pwm_duty[nr];
1641                         }
1642                         data->pwm_ctrl[nr] = ctrl;
1643                         it87_write_value(data, data->REG_PWM[nr], ctrl);
1644                 }
1645         } else {
1646                 u8 ctrl;
1647
1648                 if (has_newer_autopwm(data)) {
1649                         ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1650                                 data->pwm_temp_map[nr];
1651                         if (val != 1)
1652                                 ctrl |= 0x80;
1653                 } else {
1654                         ctrl = (val == 1 ? data->pwm_duty[nr] : 0x80);
1655                 }
1656                 data->pwm_ctrl[nr] = ctrl;
1657                 it87_write_value(data, data->REG_PWM[nr], ctrl);
1658
1659                 if (has_fanctl_onoff(data) && nr < 3) {
1660                         /* set SmartGuardian mode */
1661                         data->fan_main_ctrl |= BIT(nr);
1662                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1663                                          data->fan_main_ctrl);
1664                 }
1665         }
1666
1667         mutex_unlock(&data->update_lock);
1668         return count;
1669 }
1670
1671 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1672                        const char *buf, size_t count)
1673 {
1674         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1675         struct it87_data *data = dev_get_drvdata(dev);
1676         int nr = sensor_attr->index;
1677         long val;
1678
1679         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1680                 return -EINVAL;
1681
1682         mutex_lock(&data->update_lock);
1683         it87_update_pwm_ctrl(data, nr);
1684         if (has_newer_autopwm(data)) {
1685                 /*
1686                  * If we are in automatic mode, the PWM duty cycle register
1687                  * is read-only so we can't write the value.
1688                  */
1689                 if (data->pwm_ctrl[nr] & 0x80) {
1690                         mutex_unlock(&data->update_lock);
1691                         return -EBUSY;
1692                 }
1693                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1694                 it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1695                                  data->pwm_duty[nr]);
1696         } else {
1697                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1698                 /*
1699                  * If we are in manual mode, write the duty cycle immediately;
1700                  * otherwise, just store it for later use.
1701                  */
1702                 if (!(data->pwm_ctrl[nr] & 0x80)) {
1703                         data->pwm_ctrl[nr] = data->pwm_duty[nr];
1704                         it87_write_value(data, data->REG_PWM[nr],
1705                                          data->pwm_ctrl[nr]);
1706                 }
1707         }
1708         mutex_unlock(&data->update_lock);
1709         return count;
1710 }
1711
1712 static ssize_t set_pwm_freq(struct device *dev, struct device_attribute *attr,
1713                             const char *buf, size_t count)
1714 {
1715         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1716         struct it87_data *data = dev_get_drvdata(dev);
1717         int nr = sensor_attr->index;
1718         unsigned long val;
1719         int i;
1720
1721         if (kstrtoul(buf, 10, &val) < 0)
1722                 return -EINVAL;
1723
1724         val = clamp_val(val, 0, 1000000);
1725         val *= has_newer_autopwm(data) ? 256 : 128;
1726
1727         /* Search for the nearest available frequency */
1728         for (i = 0; i < 7; i++) {
1729                 if (val > (pwm_freq[i] + pwm_freq[i + 1]) / 2)
1730                         break;
1731         }
1732
1733         mutex_lock(&data->update_lock);
1734         if (nr == 0) {
1735                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
1736                 data->fan_ctl |= i << 4;
1737                 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
1738         } else {
1739                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x8f;
1740                 data->extra |= i << 4;
1741                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1742         }
1743         mutex_unlock(&data->update_lock);
1744
1745         return count;
1746 }
1747
1748 static ssize_t show_pwm_temp_map(struct device *dev,
1749                                  struct device_attribute *attr, char *buf)
1750 {
1751         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1752         struct it87_data *data = it87_update_device(dev);
1753         int nr = sensor_attr->index;
1754         int map;
1755
1756         map = data->pwm_temp_map[nr];
1757         if (data->type == it8613) {
1758                 map >>= 3;
1759                 if (map >= 7)
1760                         map = 0;        /* Should never happen */
1761         } else {
1762                 if (map >= 3)
1763                         map = 0;        /* Should never happen */
1764                 if (nr >= 3)            /* pwm channels 3..6 map to temp4..6 */
1765                         map += 3;
1766         }
1767
1768         return sprintf(buf, "%d\n", (int)BIT(map));
1769 }
1770
1771 static ssize_t set_pwm_temp_map(struct device *dev,
1772                                 struct device_attribute *attr, const char *buf,
1773                                 size_t count)
1774 {
1775         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1776         struct it87_data *data = dev_get_drvdata(dev);
1777         int nr = sensor_attr->index;
1778         long val;
1779         u8 reg;
1780
1781         if (kstrtol(buf, 10, &val) < 0)
1782                 return -EINVAL;
1783
1784         if (nr >= 3 && data->type != it8613)
1785                 val -= 3;
1786
1787         switch (val) {
1788         case BIT(0):
1789                 reg = 0x00;
1790                 break;
1791         case BIT(1):
1792                 reg = 0x01;
1793                 break;
1794         case BIT(2):
1795                 reg = 0x02;
1796                 break;
1797         case BIT(3):
1798                 reg = 0x03;
1799                 break;
1800         case BIT(4):
1801                 reg = 0x04;
1802                 break;
1803         case BIT(5):
1804                 reg = 0x05;
1805                 break;
1806         case BIT(5) | BIT(6):
1807                 reg = 0x06;
1808                 break;
1809         default:
1810                 return -EINVAL;
1811         }
1812
1813         if (data->type == it8613)
1814                 reg <<= 3;
1815         else if (reg > 0x02)
1816                 return -EINVAL;
1817
1818         mutex_lock(&data->update_lock);
1819         it87_update_pwm_ctrl(data, nr);
1820         data->pwm_temp_map[nr] = reg;
1821         /*
1822          * If we are in automatic mode, write the temp mapping immediately;
1823          * otherwise, just store it for later use.
1824          */
1825         if (data->pwm_ctrl[nr] & 0x80) {
1826                 data->pwm_ctrl[nr] = (data->pwm_ctrl[nr] & 0xfc) |
1827                                                 data->pwm_temp_map[nr];
1828                 it87_write_value(data, data->REG_PWM[nr], data->pwm_ctrl[nr]);
1829         }
1830         mutex_unlock(&data->update_lock);
1831         return count;
1832 }
1833
1834 static ssize_t show_auto_pwm(struct device *dev, struct device_attribute *attr,
1835                              char *buf)
1836 {
1837         struct it87_data *data = it87_update_device(dev);
1838         struct sensor_device_attribute_2 *sensor_attr =
1839                         to_sensor_dev_attr_2(attr);
1840         int nr = sensor_attr->nr;
1841         int point = sensor_attr->index;
1842
1843         return sprintf(buf, "%d\n",
1844                        pwm_from_reg(data, data->auto_pwm[nr][point]));
1845 }
1846
1847 static ssize_t set_auto_pwm(struct device *dev, struct device_attribute *attr,
1848                             const char *buf, size_t count)
1849 {
1850         struct it87_data *data = dev_get_drvdata(dev);
1851         struct sensor_device_attribute_2 *sensor_attr =
1852                         to_sensor_dev_attr_2(attr);
1853         int nr = sensor_attr->nr;
1854         int point = sensor_attr->index;
1855         int regaddr;
1856         long val;
1857
1858         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1859                 return -EINVAL;
1860
1861         mutex_lock(&data->update_lock);
1862         data->auto_pwm[nr][point] = pwm_to_reg(data, val);
1863         if (has_newer_autopwm(data))
1864                 regaddr = IT87_REG_AUTO_TEMP(nr, 3);
1865         else
1866                 regaddr = IT87_REG_AUTO_PWM(nr, point);
1867         it87_write_value(data, regaddr, data->auto_pwm[nr][point]);
1868         mutex_unlock(&data->update_lock);
1869         return count;
1870 }
1871
1872 static ssize_t show_auto_pwm_slope(struct device *dev,
1873                                    struct device_attribute *attr, char *buf)
1874 {
1875         struct it87_data *data = it87_update_device(dev);
1876         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1877         int nr = sensor_attr->index;
1878
1879         return sprintf(buf, "%d\n", data->auto_pwm[nr][1] & 0x7f);
1880 }
1881
1882 static ssize_t set_auto_pwm_slope(struct device *dev,
1883                                   struct device_attribute *attr,
1884                                   const char *buf, size_t count)
1885 {
1886         struct it87_data *data = dev_get_drvdata(dev);
1887         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1888         int nr = sensor_attr->index;
1889         unsigned long val;
1890
1891         if (kstrtoul(buf, 10, &val) < 0 || val > 127)
1892                 return -EINVAL;
1893
1894         mutex_lock(&data->update_lock);
1895         data->auto_pwm[nr][1] = (data->auto_pwm[nr][1] & 0x80) | val;
1896         it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 4),
1897                          data->auto_pwm[nr][1]);
1898         mutex_unlock(&data->update_lock);
1899         return count;
1900 }
1901
1902 static ssize_t show_auto_temp(struct device *dev, struct device_attribute *attr,
1903                               char *buf)
1904 {
1905         struct it87_data *data = it87_update_device(dev);
1906         struct sensor_device_attribute_2 *sensor_attr =
1907                         to_sensor_dev_attr_2(attr);
1908         int nr = sensor_attr->nr;
1909         int point = sensor_attr->index;
1910         int reg;
1911
1912         if (has_old_autopwm(data) || point)
1913                 reg = data->auto_temp[nr][point];
1914         else
1915                 reg = data->auto_temp[nr][1] - (data->auto_temp[nr][0] & 0x1f);
1916
1917         return sprintf(buf, "%d\n", TEMP_FROM_REG(reg));
1918 }
1919
1920 static ssize_t set_auto_temp(struct device *dev, struct device_attribute *attr,
1921                              const char *buf, size_t count)
1922 {
1923         struct it87_data *data = dev_get_drvdata(dev);
1924         struct sensor_device_attribute_2 *sensor_attr =
1925                         to_sensor_dev_attr_2(attr);
1926         int nr = sensor_attr->nr;
1927         int point = sensor_attr->index;
1928         long val;
1929         int reg;
1930
1931         if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
1932                 return -EINVAL;
1933
1934         mutex_lock(&data->update_lock);
1935         if (has_newer_autopwm(data) && !point) {
1936                 reg = data->auto_temp[nr][1] - TEMP_TO_REG(val);
1937                 reg = clamp_val(reg, 0, 0x1f) | (data->auto_temp[nr][0] & 0xe0);
1938                 data->auto_temp[nr][0] = reg;
1939                 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 5), reg);
1940         } else {
1941                 reg = TEMP_TO_REG(val);
1942                 data->auto_temp[nr][point] = reg;
1943                 if (has_newer_autopwm(data))
1944                         point--;
1945                 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point), reg);
1946         }
1947         mutex_unlock(&data->update_lock);
1948         return count;
1949 }
1950
1951 static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
1952 static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1953                             0, 1);
1954 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
1955                           set_fan_div, 0);
1956
1957 static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
1958 static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1959                             1, 1);
1960 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
1961                           set_fan_div, 1);
1962
1963 static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
1964 static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1965                             2, 1);
1966 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
1967                           set_fan_div, 2);
1968
1969 static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
1970 static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1971                             3, 1);
1972
1973 static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
1974 static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1975                             4, 1);
1976
1977 static SENSOR_DEVICE_ATTR_2(fan6_input, S_IRUGO, show_fan, NULL, 5, 0);
1978 static SENSOR_DEVICE_ATTR_2(fan6_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1979                             5, 1);
1980
1981 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
1982                           show_pwm_enable, set_pwm_enable, 0);
1983 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0);
1984 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq,
1985                           set_pwm_freq, 0);
1986 static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO,
1987                           show_pwm_temp_map, set_pwm_temp_map, 0);
1988 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR,
1989                             show_auto_pwm, set_auto_pwm, 0, 0);
1990 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR,
1991                             show_auto_pwm, set_auto_pwm, 0, 1);
1992 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR,
1993                             show_auto_pwm, set_auto_pwm, 0, 2);
1994 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO,
1995                             show_auto_pwm, NULL, 0, 3);
1996 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
1997                             show_auto_temp, set_auto_temp, 0, 1);
1998 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1999                             show_auto_temp, set_auto_temp, 0, 0);
2000 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
2001                             show_auto_temp, set_auto_temp, 0, 2);
2002 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
2003                             show_auto_temp, set_auto_temp, 0, 3);
2004 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR,
2005                             show_auto_temp, set_auto_temp, 0, 4);
2006 static SENSOR_DEVICE_ATTR_2(pwm1_auto_start, S_IRUGO | S_IWUSR,
2007                             show_auto_pwm, set_auto_pwm, 0, 0);
2008 static SENSOR_DEVICE_ATTR(pwm1_auto_slope, S_IRUGO | S_IWUSR,
2009                           show_auto_pwm_slope, set_auto_pwm_slope, 0);
2010
2011 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
2012                           show_pwm_enable, set_pwm_enable, 1);
2013 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1);
2014 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, set_pwm_freq, 1);
2015 static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO,
2016                           show_pwm_temp_map, set_pwm_temp_map, 1);
2017 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR,
2018                             show_auto_pwm, set_auto_pwm, 1, 0);
2019 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR,
2020                             show_auto_pwm, set_auto_pwm, 1, 1);
2021 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR,
2022                             show_auto_pwm, set_auto_pwm, 1, 2);
2023 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO,
2024                             show_auto_pwm, NULL, 1, 3);
2025 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
2026                             show_auto_temp, set_auto_temp, 1, 1);
2027 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2028                             show_auto_temp, set_auto_temp, 1, 0);
2029 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
2030                             show_auto_temp, set_auto_temp, 1, 2);
2031 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
2032                             show_auto_temp, set_auto_temp, 1, 3);
2033 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR,
2034                             show_auto_temp, set_auto_temp, 1, 4);
2035 static SENSOR_DEVICE_ATTR_2(pwm2_auto_start, S_IRUGO | S_IWUSR,
2036                             show_auto_pwm, set_auto_pwm, 1, 0);
2037 static SENSOR_DEVICE_ATTR(pwm2_auto_slope, S_IRUGO | S_IWUSR,
2038                           show_auto_pwm_slope, set_auto_pwm_slope, 1);
2039
2040 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
2041                           show_pwm_enable, set_pwm_enable, 2);
2042 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2);
2043 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL, 2);
2044 static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO,
2045                           show_pwm_temp_map, set_pwm_temp_map, 2);
2046 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR,
2047                             show_auto_pwm, set_auto_pwm, 2, 0);
2048 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR,
2049                             show_auto_pwm, set_auto_pwm, 2, 1);
2050 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR,
2051                             show_auto_pwm, set_auto_pwm, 2, 2);
2052 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO,
2053                             show_auto_pwm, NULL, 2, 3);
2054 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
2055                             show_auto_temp, set_auto_temp, 2, 1);
2056 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2057                             show_auto_temp, set_auto_temp, 2, 0);
2058 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
2059                             show_auto_temp, set_auto_temp, 2, 2);
2060 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
2061                             show_auto_temp, set_auto_temp, 2, 3);
2062 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR,
2063                             show_auto_temp, set_auto_temp, 2, 4);
2064 static SENSOR_DEVICE_ATTR_2(pwm3_auto_start, S_IRUGO | S_IWUSR,
2065                             show_auto_pwm, set_auto_pwm, 2, 0);
2066 static SENSOR_DEVICE_ATTR(pwm3_auto_slope, S_IRUGO | S_IWUSR,
2067                           show_auto_pwm_slope, set_auto_pwm_slope, 2);
2068
2069 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IRUGO | S_IWUSR,
2070                           show_pwm_enable, set_pwm_enable, 3);
2071 static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 3);
2072 static SENSOR_DEVICE_ATTR(pwm4_freq, S_IRUGO, show_pwm_freq, NULL, 3);
2073 static SENSOR_DEVICE_ATTR(pwm4_auto_channels_temp, S_IRUGO,
2074                           show_pwm_temp_map, set_pwm_temp_map, 3);
2075 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp, S_IRUGO | S_IWUSR,
2076                             show_auto_temp, set_auto_temp, 2, 1);
2077 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2078                             show_auto_temp, set_auto_temp, 2, 0);
2079 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point2_temp, S_IRUGO | S_IWUSR,
2080                             show_auto_temp, set_auto_temp, 2, 2);
2081 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point3_temp, S_IRUGO | S_IWUSR,
2082                             show_auto_temp, set_auto_temp, 2, 3);
2083 static SENSOR_DEVICE_ATTR_2(pwm4_auto_start, S_IRUGO | S_IWUSR,
2084                             show_auto_pwm, set_auto_pwm, 3, 0);
2085 static SENSOR_DEVICE_ATTR(pwm4_auto_slope, S_IRUGO | S_IWUSR,
2086                           show_auto_pwm_slope, set_auto_pwm_slope, 3);
2087
2088 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IRUGO | S_IWUSR,
2089                           show_pwm_enable, set_pwm_enable, 4);
2090 static SENSOR_DEVICE_ATTR(pwm5, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 4);
2091 static SENSOR_DEVICE_ATTR(pwm5_freq, S_IRUGO, show_pwm_freq, NULL, 4);
2092 static SENSOR_DEVICE_ATTR(pwm5_auto_channels_temp, S_IRUGO,
2093                           show_pwm_temp_map, set_pwm_temp_map, 4);
2094 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp, S_IRUGO | S_IWUSR,
2095                             show_auto_temp, set_auto_temp, 2, 1);
2096 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2097                             show_auto_temp, set_auto_temp, 2, 0);
2098 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point2_temp, S_IRUGO | S_IWUSR,
2099                             show_auto_temp, set_auto_temp, 2, 2);
2100 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point3_temp, S_IRUGO | S_IWUSR,
2101                             show_auto_temp, set_auto_temp, 2, 3);
2102 static SENSOR_DEVICE_ATTR_2(pwm5_auto_start, S_IRUGO | S_IWUSR,
2103                             show_auto_pwm, set_auto_pwm, 4, 0);
2104 static SENSOR_DEVICE_ATTR(pwm5_auto_slope, S_IRUGO | S_IWUSR,
2105                           show_auto_pwm_slope, set_auto_pwm_slope, 4);
2106
2107 static SENSOR_DEVICE_ATTR(pwm6_enable, S_IRUGO | S_IWUSR,
2108                           show_pwm_enable, set_pwm_enable, 5);
2109 static SENSOR_DEVICE_ATTR(pwm6, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 5);
2110 static SENSOR_DEVICE_ATTR(pwm6_freq, S_IRUGO, show_pwm_freq, NULL, 5);
2111 static SENSOR_DEVICE_ATTR(pwm6_auto_channels_temp, S_IRUGO,
2112                           show_pwm_temp_map, set_pwm_temp_map, 5);
2113 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp, S_IRUGO | S_IWUSR,
2114                             show_auto_temp, set_auto_temp, 2, 1);
2115 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2116                             show_auto_temp, set_auto_temp, 2, 0);
2117 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point2_temp, S_IRUGO | S_IWUSR,
2118                             show_auto_temp, set_auto_temp, 2, 2);
2119 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point3_temp, S_IRUGO | S_IWUSR,
2120                             show_auto_temp, set_auto_temp, 2, 3);
2121 static SENSOR_DEVICE_ATTR_2(pwm6_auto_start, S_IRUGO | S_IWUSR,
2122                             show_auto_pwm, set_auto_pwm, 5, 0);
2123 static SENSOR_DEVICE_ATTR(pwm6_auto_slope, S_IRUGO | S_IWUSR,
2124                           show_auto_pwm_slope, set_auto_pwm_slope, 5);
2125
2126 /* Alarms */
2127 static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
2128                            char *buf)
2129 {
2130         struct it87_data *data = it87_update_device(dev);
2131
2132         return sprintf(buf, "%u\n", data->alarms);
2133 }
2134 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
2135
2136 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
2137                           char *buf)
2138 {
2139         struct it87_data *data = it87_update_device(dev);
2140         int bitnr = to_sensor_dev_attr(attr)->index;
2141
2142         return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
2143 }
2144
2145 static ssize_t clear_intrusion(struct device *dev,
2146                                struct device_attribute *attr, const char *buf,
2147                                size_t count)
2148 {
2149         struct it87_data *data = dev_get_drvdata(dev);
2150         int config;
2151         long val;
2152
2153         if (kstrtol(buf, 10, &val) < 0 || val != 0)
2154                 return -EINVAL;
2155
2156         mutex_lock(&data->update_lock);
2157         config = it87_read_value(data, IT87_REG_CONFIG);
2158         if (config < 0) {
2159                 count = config;
2160         } else {
2161                 config |= BIT(5);
2162                 it87_write_value(data, IT87_REG_CONFIG, config);
2163                 /* Invalidate cache to force re-read */
2164                 data->valid = 0;
2165         }
2166         mutex_unlock(&data->update_lock);
2167
2168         return count;
2169 }
2170
2171 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
2172 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
2173 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
2174 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
2175 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
2176 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
2177 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
2178 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
2179 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
2180 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
2181 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
2182 static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
2183 static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
2184 static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 7);
2185 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
2186 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
2187 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
2188 static SENSOR_DEVICE_ATTR(temp4_alarm, S_IRUGO, show_alarm, NULL, 19);
2189 static SENSOR_DEVICE_ATTR(temp5_alarm, S_IRUGO, show_alarm, NULL, 20);
2190 static SENSOR_DEVICE_ATTR(temp6_alarm, S_IRUGO, show_alarm, NULL, 21);
2191 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
2192                           show_alarm, clear_intrusion, 4);
2193
2194 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
2195                          char *buf)
2196 {
2197         struct it87_data *data = it87_update_device(dev);
2198         int bitnr = to_sensor_dev_attr(attr)->index;
2199
2200         return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
2201 }
2202
2203 static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
2204                         const char *buf, size_t count)
2205 {
2206         int bitnr = to_sensor_dev_attr(attr)->index;
2207         struct it87_data *data = dev_get_drvdata(dev);
2208         long val;
2209
2210         if (kstrtol(buf, 10, &val) < 0 || (val != 0 && val != 1))
2211                 return -EINVAL;
2212
2213         mutex_lock(&data->update_lock);
2214         data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
2215         if (val)
2216                 data->beeps |= BIT(bitnr);
2217         else
2218                 data->beeps &= ~BIT(bitnr);
2219         it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
2220         mutex_unlock(&data->update_lock);
2221         return count;
2222 }
2223
2224 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
2225                           show_beep, set_beep, 1);
2226 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
2227 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
2228 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
2229 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
2230 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
2231 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
2232 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
2233 /* fanX_beep writability is set later */
2234 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
2235 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
2236 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
2237 static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
2238 static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
2239 static SENSOR_DEVICE_ATTR(fan6_beep, S_IRUGO, show_beep, set_beep, 0);
2240 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
2241                           show_beep, set_beep, 2);
2242 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
2243 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
2244 static SENSOR_DEVICE_ATTR(temp4_beep, S_IRUGO, show_beep, NULL, 2);
2245 static SENSOR_DEVICE_ATTR(temp5_beep, S_IRUGO, show_beep, NULL, 2);
2246 static SENSOR_DEVICE_ATTR(temp6_beep, S_IRUGO, show_beep, NULL, 2);
2247
2248 static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
2249                             char *buf)
2250 {
2251         struct it87_data *data = dev_get_drvdata(dev);
2252
2253         return sprintf(buf, "%u\n", data->vrm);
2254 }
2255
2256 static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
2257                              const char *buf, size_t count)
2258 {
2259         struct it87_data *data = dev_get_drvdata(dev);
2260         unsigned long val;
2261
2262         if (kstrtoul(buf, 10, &val) < 0)
2263                 return -EINVAL;
2264
2265         data->vrm = val;
2266
2267         return count;
2268 }
2269 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
2270
2271 static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
2272                             char *buf)
2273 {
2274         struct it87_data *data = it87_update_device(dev);
2275
2276         return sprintf(buf, "%ld\n", (long)vid_from_reg(data->vid, data->vrm));
2277 }
2278 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
2279
2280 static ssize_t show_label(struct device *dev, struct device_attribute *attr,
2281                           char *buf)
2282 {
2283         static const char * const labels[] = {
2284                 "+5V",
2285                 "5VSB",
2286                 "Vbat",
2287                 "AVCC",
2288         };
2289         static const char * const labels_it8721[] = {
2290                 "+3.3V",
2291                 "3VSB",
2292                 "Vbat",
2293                 "+3.3V",
2294         };
2295         struct it87_data *data = dev_get_drvdata(dev);
2296         int nr = to_sensor_dev_attr(attr)->index;
2297         const char *label;
2298
2299         if (has_vin3_5v(data) && nr == 0)
2300                 label = labels[0];
2301         else if (has_12mv_adc(data) || has_10_9mv_adc(data) ||
2302                  has_11mv_adc(data))
2303                 label = labels_it8721[nr];
2304         else
2305                 label = labels[nr];
2306
2307         return sprintf(buf, "%s\n", label);
2308 }
2309 static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
2310 static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
2311 static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
2312 /* AVCC3 */
2313 static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 3);
2314
2315 static umode_t it87_in_is_visible(struct kobject *kobj,
2316                                   struct attribute *attr, int index)
2317 {
2318         struct device *dev = container_of(kobj, struct device, kobj);
2319         struct it87_data *data = dev_get_drvdata(dev);
2320         int i = index / 5;      /* voltage index */
2321         int a = index % 5;      /* attribute index */
2322
2323         if (index >= 40) {      /* in8 and higher only have input attributes */
2324                 i = index - 40 + 8;
2325                 a = 0;
2326         }
2327
2328         if (!(data->has_in & BIT(i)))
2329                 return 0;
2330
2331         if (a == 4 && !data->has_beep)
2332                 return 0;
2333
2334         return attr->mode;
2335 }
2336
2337 static struct attribute *it87_attributes_in[] = {
2338         &sensor_dev_attr_in0_input.dev_attr.attr,
2339         &sensor_dev_attr_in0_min.dev_attr.attr,
2340         &sensor_dev_attr_in0_max.dev_attr.attr,
2341         &sensor_dev_attr_in0_alarm.dev_attr.attr,
2342         &sensor_dev_attr_in0_beep.dev_attr.attr,        /* 4 */
2343
2344         &sensor_dev_attr_in1_input.dev_attr.attr,
2345         &sensor_dev_attr_in1_min.dev_attr.attr,
2346         &sensor_dev_attr_in1_max.dev_attr.attr,
2347         &sensor_dev_attr_in1_alarm.dev_attr.attr,
2348         &sensor_dev_attr_in1_beep.dev_attr.attr,        /* 9 */
2349
2350         &sensor_dev_attr_in2_input.dev_attr.attr,
2351         &sensor_dev_attr_in2_min.dev_attr.attr,
2352         &sensor_dev_attr_in2_max.dev_attr.attr,
2353         &sensor_dev_attr_in2_alarm.dev_attr.attr,
2354         &sensor_dev_attr_in2_beep.dev_attr.attr,        /* 14 */
2355
2356         &sensor_dev_attr_in3_input.dev_attr.attr,
2357         &sensor_dev_attr_in3_min.dev_attr.attr,
2358         &sensor_dev_attr_in3_max.dev_attr.attr,
2359         &sensor_dev_attr_in3_alarm.dev_attr.attr,
2360         &sensor_dev_attr_in3_beep.dev_attr.attr,        /* 19 */
2361
2362         &sensor_dev_attr_in4_input.dev_attr.attr,
2363         &sensor_dev_attr_in4_min.dev_attr.attr,
2364         &sensor_dev_attr_in4_max.dev_attr.attr,
2365         &sensor_dev_attr_in4_alarm.dev_attr.attr,
2366         &sensor_dev_attr_in4_beep.dev_attr.attr,        /* 24 */
2367
2368         &sensor_dev_attr_in5_input.dev_attr.attr,
2369         &sensor_dev_attr_in5_min.dev_attr.attr,
2370         &sensor_dev_attr_in5_max.dev_attr.attr,
2371         &sensor_dev_attr_in5_alarm.dev_attr.attr,
2372         &sensor_dev_attr_in5_beep.dev_attr.attr,        /* 29 */
2373
2374         &sensor_dev_attr_in6_input.dev_attr.attr,
2375         &sensor_dev_attr_in6_min.dev_attr.attr,
2376         &sensor_dev_attr_in6_max.dev_attr.attr,
2377         &sensor_dev_attr_in6_alarm.dev_attr.attr,
2378         &sensor_dev_attr_in6_beep.dev_attr.attr,        /* 34 */
2379
2380         &sensor_dev_attr_in7_input.dev_attr.attr,
2381         &sensor_dev_attr_in7_min.dev_attr.attr,
2382         &sensor_dev_attr_in7_max.dev_attr.attr,
2383         &sensor_dev_attr_in7_alarm.dev_attr.attr,
2384         &sensor_dev_attr_in7_beep.dev_attr.attr,        /* 39 */
2385
2386         &sensor_dev_attr_in8_input.dev_attr.attr,       /* 40 */
2387         &sensor_dev_attr_in9_input.dev_attr.attr,       /* 41 */
2388         &sensor_dev_attr_in10_input.dev_attr.attr,      /* 42 */
2389         &sensor_dev_attr_in11_input.dev_attr.attr,      /* 43 */
2390         &sensor_dev_attr_in12_input.dev_attr.attr,      /* 44 */
2391         NULL
2392 };
2393
2394 static const struct attribute_group it87_group_in = {
2395         .attrs = it87_attributes_in,
2396         .is_visible = it87_in_is_visible,
2397 };
2398
2399 static umode_t it87_temp_is_visible(struct kobject *kobj,
2400                                     struct attribute *attr, int index)
2401 {
2402         struct device *dev = container_of(kobj, struct device, kobj);
2403         struct it87_data *data = dev_get_drvdata(dev);
2404         int i = index / 7;      /* temperature index */
2405         int a = index % 7;      /* attribute index */
2406
2407         if (!(data->has_temp & BIT(i)))
2408                 return 0;
2409
2410         if (a && i >= data->num_temp_limit)
2411                 return 0;
2412
2413         if (a == 3) {
2414                 int type = get_temp_type(data, i);
2415
2416                 if (type == 0)
2417                         return 0;
2418                 if (has_bank_sel(data))
2419                         return 0444;
2420                 return attr->mode;
2421         }
2422
2423         if (a == 5 && !has_temp_offset(data))
2424                 return 0;
2425
2426         if (a == 6 && !data->has_beep)
2427                 return 0;
2428
2429         return attr->mode;
2430 }
2431
2432 static struct attribute *it87_attributes_temp[] = {
2433         &sensor_dev_attr_temp1_input.dev_attr.attr,
2434         &sensor_dev_attr_temp1_max.dev_attr.attr,
2435         &sensor_dev_attr_temp1_min.dev_attr.attr,
2436         &sensor_dev_attr_temp1_type.dev_attr.attr,      /* 3 */
2437         &sensor_dev_attr_temp1_alarm.dev_attr.attr,
2438         &sensor_dev_attr_temp1_offset.dev_attr.attr,    /* 5 */
2439         &sensor_dev_attr_temp1_beep.dev_attr.attr,      /* 6 */
2440
2441         &sensor_dev_attr_temp2_input.dev_attr.attr,     /* 7 */
2442         &sensor_dev_attr_temp2_max.dev_attr.attr,
2443         &sensor_dev_attr_temp2_min.dev_attr.attr,
2444         &sensor_dev_attr_temp2_type.dev_attr.attr,
2445         &sensor_dev_attr_temp2_alarm.dev_attr.attr,
2446         &sensor_dev_attr_temp2_offset.dev_attr.attr,
2447         &sensor_dev_attr_temp2_beep.dev_attr.attr,
2448
2449         &sensor_dev_attr_temp3_input.dev_attr.attr,     /* 14 */
2450         &sensor_dev_attr_temp3_max.dev_attr.attr,
2451         &sensor_dev_attr_temp3_min.dev_attr.attr,
2452         &sensor_dev_attr_temp3_type.dev_attr.attr,
2453         &sensor_dev_attr_temp3_alarm.dev_attr.attr,
2454         &sensor_dev_attr_temp3_offset.dev_attr.attr,
2455         &sensor_dev_attr_temp3_beep.dev_attr.attr,
2456
2457         &sensor_dev_attr_temp4_input.dev_attr.attr,     /* 21 */
2458         &sensor_dev_attr_temp4_max.dev_attr.attr,
2459         &sensor_dev_attr_temp4_min.dev_attr.attr,
2460         &sensor_dev_attr_temp4_type.dev_attr.attr,
2461         &sensor_dev_attr_temp4_alarm.dev_attr.attr,
2462         &sensor_dev_attr_temp4_offset.dev_attr.attr,
2463         &sensor_dev_attr_temp4_beep.dev_attr.attr,
2464
2465         &sensor_dev_attr_temp5_input.dev_attr.attr,
2466         &sensor_dev_attr_temp5_max.dev_attr.attr,
2467         &sensor_dev_attr_temp5_min.dev_attr.attr,
2468         &sensor_dev_attr_temp5_type.dev_attr.attr,
2469         &sensor_dev_attr_temp5_alarm.dev_attr.attr,
2470         &sensor_dev_attr_temp5_offset.dev_attr.attr,
2471         &sensor_dev_attr_temp5_beep.dev_attr.attr,
2472
2473         &sensor_dev_attr_temp6_input.dev_attr.attr,
2474         &sensor_dev_attr_temp6_max.dev_attr.attr,
2475         &sensor_dev_attr_temp6_min.dev_attr.attr,
2476         &sensor_dev_attr_temp6_type.dev_attr.attr,
2477         &sensor_dev_attr_temp6_alarm.dev_attr.attr,
2478         &sensor_dev_attr_temp6_offset.dev_attr.attr,
2479         &sensor_dev_attr_temp6_beep.dev_attr.attr,
2480         NULL
2481 };
2482
2483 static const struct attribute_group it87_group_temp = {
2484         .attrs = it87_attributes_temp,
2485         .is_visible = it87_temp_is_visible,
2486 };
2487
2488 static umode_t it87_is_visible(struct kobject *kobj,
2489                                struct attribute *attr, int index)
2490 {
2491         struct device *dev = container_of(kobj, struct device, kobj);
2492         struct it87_data *data = dev_get_drvdata(dev);
2493
2494         if ((index == 2 || index == 3) && !data->has_vid)
2495                 return 0;
2496
2497         if (index > 3 && !(data->in_internal & BIT(index - 4)))
2498                 return 0;
2499
2500         return attr->mode;
2501 }
2502
2503 static struct attribute *it87_attributes[] = {
2504         &dev_attr_alarms.attr,
2505         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
2506         &dev_attr_vrm.attr,                             /* 2 */
2507         &dev_attr_cpu0_vid.attr,                        /* 3 */
2508         &sensor_dev_attr_in3_label.dev_attr.attr,       /* 4 .. 7 */
2509         &sensor_dev_attr_in7_label.dev_attr.attr,
2510         &sensor_dev_attr_in8_label.dev_attr.attr,
2511         &sensor_dev_attr_in9_label.dev_attr.attr,
2512         NULL
2513 };
2514
2515 static const struct attribute_group it87_group = {
2516         .attrs = it87_attributes,
2517         .is_visible = it87_is_visible,
2518 };
2519
2520 static umode_t it87_fan_is_visible(struct kobject *kobj,
2521                                    struct attribute *attr, int index)
2522 {
2523         struct device *dev = container_of(kobj, struct device, kobj);
2524         struct it87_data *data = dev_get_drvdata(dev);
2525         int i = index / 5;      /* fan index */
2526         int a = index % 5;      /* attribute index */
2527
2528         if (index >= 15) {      /* fan 4..6 don't have divisor attributes */
2529                 i = (index - 15) / 4 + 3;
2530                 a = (index - 15) % 4;
2531         }
2532
2533         if (!(data->has_fan & BIT(i)))
2534                 return 0;
2535
2536         if (a == 3) {                           /* beep */
2537                 if (!data->has_beep)
2538                         return 0;
2539                 /* first fan beep attribute is writable */
2540                 if (i == __ffs(data->has_fan))
2541                         return attr->mode | S_IWUSR;
2542         }
2543
2544         if (a == 4 && has_16bit_fans(data))     /* divisor */
2545                 return 0;
2546
2547         return attr->mode;
2548 }
2549
2550 static struct attribute *it87_attributes_fan[] = {
2551         &sensor_dev_attr_fan1_input.dev_attr.attr,
2552         &sensor_dev_attr_fan1_min.dev_attr.attr,
2553         &sensor_dev_attr_fan1_alarm.dev_attr.attr,
2554         &sensor_dev_attr_fan1_beep.dev_attr.attr,       /* 3 */
2555         &sensor_dev_attr_fan1_div.dev_attr.attr,        /* 4 */
2556
2557         &sensor_dev_attr_fan2_input.dev_attr.attr,
2558         &sensor_dev_attr_fan2_min.dev_attr.attr,
2559         &sensor_dev_attr_fan2_alarm.dev_attr.attr,
2560         &sensor_dev_attr_fan2_beep.dev_attr.attr,
2561         &sensor_dev_attr_fan2_div.dev_attr.attr,        /* 9 */
2562
2563         &sensor_dev_attr_fan3_input.dev_attr.attr,
2564         &sensor_dev_attr_fan3_min.dev_attr.attr,
2565         &sensor_dev_attr_fan3_alarm.dev_attr.attr,
2566         &sensor_dev_attr_fan3_beep.dev_attr.attr,
2567         &sensor_dev_attr_fan3_div.dev_attr.attr,        /* 14 */
2568
2569         &sensor_dev_attr_fan4_input.dev_attr.attr,      /* 15 */
2570         &sensor_dev_attr_fan4_min.dev_attr.attr,
2571         &sensor_dev_attr_fan4_alarm.dev_attr.attr,
2572         &sensor_dev_attr_fan4_beep.dev_attr.attr,
2573
2574         &sensor_dev_attr_fan5_input.dev_attr.attr,      /* 19 */
2575         &sensor_dev_attr_fan5_min.dev_attr.attr,
2576         &sensor_dev_attr_fan5_alarm.dev_attr.attr,
2577         &sensor_dev_attr_fan5_beep.dev_attr.attr,
2578
2579         &sensor_dev_attr_fan6_input.dev_attr.attr,      /* 23 */
2580         &sensor_dev_attr_fan6_min.dev_attr.attr,
2581         &sensor_dev_attr_fan6_alarm.dev_attr.attr,
2582         &sensor_dev_attr_fan6_beep.dev_attr.attr,
2583         NULL
2584 };
2585
2586 static const struct attribute_group it87_group_fan = {
2587         .attrs = it87_attributes_fan,
2588         .is_visible = it87_fan_is_visible,
2589 };
2590
2591 static umode_t it87_pwm_is_visible(struct kobject *kobj,
2592                                    struct attribute *attr, int index)
2593 {
2594         struct device *dev = container_of(kobj, struct device, kobj);
2595         struct it87_data *data = dev_get_drvdata(dev);
2596         int i = index / 4;      /* pwm index */
2597         int a = index % 4;      /* attribute index */
2598
2599         if (!(data->has_pwm & BIT(i)))
2600                 return 0;
2601
2602         /* pwmX_auto_channels_temp is only writable if auto pwm is supported */
2603         if (a == 3 && (has_old_autopwm(data) || has_newer_autopwm(data)))
2604                 return attr->mode | S_IWUSR;
2605
2606         /* pwm2_freq is writable if there are two pwm frequency selects */
2607         if (has_pwm_freq2(data) && i == 1 && a == 2)
2608                 return attr->mode | S_IWUSR;
2609
2610         return attr->mode;
2611 }
2612
2613 static struct attribute *it87_attributes_pwm[] = {
2614         &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2615         &sensor_dev_attr_pwm1.dev_attr.attr,
2616         &sensor_dev_attr_pwm1_freq.dev_attr.attr,
2617         &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
2618
2619         &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2620         &sensor_dev_attr_pwm2.dev_attr.attr,
2621         &sensor_dev_attr_pwm2_freq.dev_attr.attr,
2622         &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
2623
2624         &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2625         &sensor_dev_attr_pwm3.dev_attr.attr,
2626         &sensor_dev_attr_pwm3_freq.dev_attr.attr,
2627         &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
2628
2629         &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2630         &sensor_dev_attr_pwm4.dev_attr.attr,
2631         &sensor_dev_attr_pwm4_freq.dev_attr.attr,
2632         &sensor_dev_attr_pwm4_auto_channels_temp.dev_attr.attr,
2633
2634         &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2635         &sensor_dev_attr_pwm5.dev_attr.attr,
2636         &sensor_dev_attr_pwm5_freq.dev_attr.attr,
2637         &sensor_dev_attr_pwm5_auto_channels_temp.dev_attr.attr,
2638
2639         &sensor_dev_attr_pwm6_enable.dev_attr.attr,
2640         &sensor_dev_attr_pwm6.dev_attr.attr,
2641         &sensor_dev_attr_pwm6_freq.dev_attr.attr,
2642         &sensor_dev_attr_pwm6_auto_channels_temp.dev_attr.attr,
2643
2644         NULL
2645 };
2646
2647 static const struct attribute_group it87_group_pwm = {
2648         .attrs = it87_attributes_pwm,
2649         .is_visible = it87_pwm_is_visible,
2650 };
2651
2652 static umode_t it87_auto_pwm_is_visible(struct kobject *kobj,
2653                                         struct attribute *attr, int index)
2654 {
2655         struct device *dev = container_of(kobj, struct device, kobj);
2656         struct it87_data *data = dev_get_drvdata(dev);
2657         int i = index / 11;     /* pwm index */
2658         int a = index % 11;     /* attribute index */
2659
2660         if (index >= 33) {      /* pwm 4..6 */
2661                 i = (index - 33) / 6 + 3;
2662                 a = (index - 33) % 6 + 4;
2663         }
2664
2665         if (!(data->has_pwm & BIT(i)))
2666                 return 0;
2667
2668         if (has_newer_autopwm(data)) {
2669                 if (a < 4)      /* no auto point pwm */
2670                         return 0;
2671                 if (a == 8)     /* no auto_point4 */
2672                         return 0;
2673         }
2674         if (has_old_autopwm(data)) {
2675                 if (a >= 9)     /* no pwm_auto_start, pwm_auto_slope */
2676                         return 0;
2677         }
2678
2679         return attr->mode;
2680 }
2681
2682 static struct attribute *it87_attributes_auto_pwm[] = {
2683         &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
2684         &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
2685         &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
2686         &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
2687         &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
2688         &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
2689         &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
2690         &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
2691         &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
2692         &sensor_dev_attr_pwm1_auto_start.dev_attr.attr,
2693         &sensor_dev_attr_pwm1_auto_slope.dev_attr.attr,
2694
2695         &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,    /* 11 */
2696         &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
2697         &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
2698         &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
2699         &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
2700         &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
2701         &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
2702         &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
2703         &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
2704         &sensor_dev_attr_pwm2_auto_start.dev_attr.attr,
2705         &sensor_dev_attr_pwm2_auto_slope.dev_attr.attr,
2706
2707         &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,    /* 22 */
2708         &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
2709         &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
2710         &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
2711         &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
2712         &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
2713         &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
2714         &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
2715         &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
2716         &sensor_dev_attr_pwm3_auto_start.dev_attr.attr,
2717         &sensor_dev_attr_pwm3_auto_slope.dev_attr.attr,
2718
2719         &sensor_dev_attr_pwm4_auto_point1_temp.dev_attr.attr,   /* 33 */
2720         &sensor_dev_attr_pwm4_auto_point1_temp_hyst.dev_attr.attr,
2721         &sensor_dev_attr_pwm4_auto_point2_temp.dev_attr.attr,
2722         &sensor_dev_attr_pwm4_auto_point3_temp.dev_attr.attr,
2723         &sensor_dev_attr_pwm4_auto_start.dev_attr.attr,
2724         &sensor_dev_attr_pwm4_auto_slope.dev_attr.attr,
2725
2726         &sensor_dev_attr_pwm5_auto_point1_temp.dev_attr.attr,
2727         &sensor_dev_attr_pwm5_auto_point1_temp_hyst.dev_attr.attr,
2728         &sensor_dev_attr_pwm5_auto_point2_temp.dev_attr.attr,
2729         &sensor_dev_attr_pwm5_auto_point3_temp.dev_attr.attr,
2730         &sensor_dev_attr_pwm5_auto_start.dev_attr.attr,
2731         &sensor_dev_attr_pwm5_auto_slope.dev_attr.attr,
2732
2733         &sensor_dev_attr_pwm6_auto_point1_temp.dev_attr.attr,
2734         &sensor_dev_attr_pwm6_auto_point1_temp_hyst.dev_attr.attr,
2735         &sensor_dev_attr_pwm6_auto_point2_temp.dev_attr.attr,
2736         &sensor_dev_attr_pwm6_auto_point3_temp.dev_attr.attr,
2737         &sensor_dev_attr_pwm6_auto_start.dev_attr.attr,
2738         &sensor_dev_attr_pwm6_auto_slope.dev_attr.attr,
2739
2740         NULL,
2741 };
2742
2743 static const struct attribute_group it87_group_auto_pwm = {
2744         .attrs = it87_attributes_auto_pwm,
2745         .is_visible = it87_auto_pwm_is_visible,
2746 };
2747
2748 /* SuperIO detection - will change isa_address if a chip is found */
2749 static int __init it87_find(int sioaddr, unsigned short *address,
2750                             struct it87_sio_data *sio_data)
2751 {
2752         int err;
2753         u16 chip_type;
2754         const struct it87_devices *config;
2755
2756         err = superio_enter(sioaddr);
2757         if (err)
2758                 return err;
2759
2760         err = -ENODEV;
2761         chip_type = superio_inw(sioaddr, DEVID);
2762         if (chip_type == 0xffff)
2763                 goto exit;
2764
2765         if (force_id)
2766                 chip_type = force_id;
2767
2768         switch (chip_type) {
2769         case IT8705F_DEVID:
2770                 sio_data->type = it87;
2771                 break;
2772         case IT8712F_DEVID:
2773                 sio_data->type = it8712;
2774                 break;
2775         case IT8716F_DEVID:
2776         case IT8726F_DEVID:
2777                 sio_data->type = it8716;
2778                 break;
2779         case IT8718F_DEVID:
2780                 sio_data->type = it8718;
2781                 break;
2782         case IT8720F_DEVID:
2783                 sio_data->type = it8720;
2784                 break;
2785         case IT8721F_DEVID:
2786                 sio_data->type = it8721;
2787                 break;
2788         case IT8728F_DEVID:
2789                 sio_data->type = it8728;
2790                 break;
2791         case IT8732F_DEVID:
2792                 sio_data->type = it8732;
2793                 break;
2794         case IT8792E_DEVID:
2795                 sio_data->type = it8792;
2796                 break;
2797         case IT8771E_DEVID:
2798                 sio_data->type = it8771;
2799                 break;
2800         case IT8772E_DEVID:
2801                 sio_data->type = it8772;
2802                 break;
2803         case IT8781F_DEVID:
2804                 sio_data->type = it8781;
2805                 break;
2806         case IT8782F_DEVID:
2807                 sio_data->type = it8782;
2808                 break;
2809         case IT8783E_DEVID:
2810                 sio_data->type = it8783;
2811                 break;
2812         case IT8786E_DEVID:
2813                 sio_data->type = it8786;
2814                 break;
2815         case IT8790E_DEVID:
2816                 sio_data->type = it8790;
2817                 break;
2818         case IT8603E_DEVID:
2819         case IT8623E_DEVID:
2820                 sio_data->type = it8603;
2821                 break;
2822         case IT8607E_DEVID:
2823                 sio_data->type = it8607;
2824                 break;
2825         case IT8613E_DEVID:
2826                 sio_data->type = it8613;
2827                 break;
2828         case IT8620E_DEVID:
2829                 sio_data->type = it8620;
2830                 break;
2831         case IT8622E_DEVID:
2832                 sio_data->type = it8622;
2833                 break;
2834         case IT8628E_DEVID:
2835                 sio_data->type = it8628;
2836                 break;
2837         case IT8655E_DEVID:
2838                 sio_data->type = it8655;
2839                 break;
2840         case IT8665E_DEVID:
2841                 sio_data->type = it8665;
2842                 break;
2843         case IT8686E_DEVID:
2844                 sio_data->type = it8686;
2845                 break;
2846         case 0xffff:    /* No device at all */
2847                 goto exit;
2848         default:
2849                 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
2850                 goto exit;
2851         }
2852
2853         superio_select(sioaddr, PME);
2854         if (!(superio_inb(sioaddr, IT87_ACT_REG) & 0x01)) {
2855                 pr_info("Device not activated, skipping\n");
2856                 goto exit;
2857         }
2858
2859         *address = superio_inw(sioaddr, IT87_BASE_REG) & ~(IT87_EXTENT - 1);
2860         if (*address == 0) {
2861                 pr_info("Base address not set, skipping\n");
2862                 goto exit;
2863         }
2864
2865         err = 0;
2866         sio_data->revision = superio_inb(sioaddr, DEVREV) & 0x0f;
2867         pr_info("Found IT%04x%s chip at 0x%x, revision %d\n", chip_type,
2868                 it87_devices[sio_data->type].suffix,
2869                 *address, sio_data->revision);
2870
2871         config = &it87_devices[sio_data->type];
2872
2873         /* in7 (VSB or VCCH5V) is always internal on some chips */
2874         if (has_in7_internal(config))
2875                 sio_data->internal |= BIT(1);
2876
2877         /* in8 (Vbat) is always internal */
2878         sio_data->internal |= BIT(2);
2879
2880         /* in9 (AVCC3), always internal if supported */
2881         if (has_avcc3(config))
2882                 sio_data->internal |= BIT(3); /* in9 is AVCC */
2883         else
2884                 sio_data->skip_in |= BIT(9);
2885
2886         if (!has_four_pwm(config))
2887                 sio_data->skip_pwm |= BIT(3) | BIT(4) | BIT(5);
2888         else if (!has_five_pwm(config))
2889                 sio_data->skip_pwm |= BIT(4) | BIT(5);
2890         else if (!has_six_pwm(config))
2891                 sio_data->skip_pwm |= BIT(5);
2892
2893         if (!has_vid(config))
2894                 sio_data->skip_vid = 1;
2895
2896         /* Read GPIO config and VID value from LDN 7 (GPIO) */
2897         if (sio_data->type == it87) {
2898                 /* The IT8705F has a different LD number for GPIO */
2899                 superio_select(sioaddr, 5);
2900                 sio_data->beep_pin = superio_inb(sioaddr,
2901                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2902         } else if (sio_data->type == it8783) {
2903                 int reg25, reg27, reg2a, reg2c, regef;
2904
2905                 superio_select(sioaddr, GPIO);
2906
2907                 reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2908                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2909                 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
2910                 reg2c = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2911                 regef = superio_inb(sioaddr, IT87_SIO_SPI_REG);
2912
2913                 /* Check if fan3 is there or not */
2914                 if ((reg27 & BIT(0)) || !(reg2c & BIT(2)))
2915                         sio_data->skip_fan |= BIT(2);
2916                 if ((reg25 & BIT(4)) ||
2917                     (!(reg2a & BIT(1)) && (regef & BIT(0))))
2918                         sio_data->skip_pwm |= BIT(2);
2919
2920                 /* Check if fan2 is there or not */
2921                 if (reg27 & BIT(7))
2922                         sio_data->skip_fan |= BIT(1);
2923                 if (reg27 & BIT(3))
2924                         sio_data->skip_pwm |= BIT(1);
2925
2926                 /* VIN5 */
2927                 if ((reg27 & BIT(0)) || (reg2c & BIT(2)))
2928                         sio_data->skip_in |= BIT(5); /* No VIN5 */
2929
2930                 /* VIN6 */
2931                 if (reg27 & BIT(1))
2932                         sio_data->skip_in |= BIT(6); /* No VIN6 */
2933
2934                 /*
2935                  * VIN7
2936                  * Does not depend on bit 2 of Reg2C, contrary to datasheet.
2937                  */
2938                 if (reg27 & BIT(2)) {
2939                         /*
2940                          * The data sheet is a bit unclear regarding the
2941                          * internal voltage divider for VCCH5V. It says
2942                          * "This bit enables and switches VIN7 (pin 91) to the
2943                          * internal voltage divider for VCCH5V".
2944                          * This is different to other chips, where the internal
2945                          * voltage divider would connect VIN7 to an internal
2946                          * voltage source. Maybe that is the case here as well.
2947                          *
2948                          * Since we don't know for sure, re-route it if that is
2949                          * not the case, and ask the user to report if the
2950                          * resulting voltage is sane.
2951                          */
2952                         if (!(reg2c & BIT(1))) {
2953                                 reg2c |= BIT(1);
2954                                 superio_outb(sioaddr, IT87_SIO_PINX2_REG,
2955                                              reg2c);
2956                                 pr_notice("Routing internal VCCH5V to in7.\n");
2957                         }
2958                         pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
2959                         pr_notice("Please report if it displays a reasonable voltage.\n");
2960                 }
2961
2962                 if (reg2c & BIT(0))
2963                         sio_data->internal |= BIT(0);
2964                 if (reg2c & BIT(1))
2965                         sio_data->internal |= BIT(1);
2966
2967                 sio_data->beep_pin = superio_inb(sioaddr,
2968                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2969         } else if (sio_data->type == it8603 || sio_data->type == it8607) {
2970                 int reg27, reg29;
2971
2972                 superio_select(sioaddr, GPIO);
2973
2974                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2975
2976                 /* Check if fan3 is there or not */
2977                 if (reg27 & BIT(6))
2978                         sio_data->skip_pwm |= BIT(2);
2979                 if (reg27 & BIT(7))
2980                         sio_data->skip_fan |= BIT(2);
2981
2982                 /* Check if fan2 is there or not */
2983                 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2984                 if (reg29 & BIT(1))
2985                         sio_data->skip_pwm |= BIT(1);
2986                 if (reg29 & BIT(2))
2987                         sio_data->skip_fan |= BIT(1);
2988
2989                 if (sio_data->type == it8603) {
2990                         sio_data->skip_in |= BIT(5); /* No VIN5 */
2991                         sio_data->skip_in |= BIT(6); /* No VIN6 */
2992                 }
2993
2994                 sio_data->beep_pin = superio_inb(sioaddr,
2995                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2996         } else if (sio_data->type == it8613) {
2997                 int reg27, reg29, reg2a;
2998
2999                 superio_select(sioaddr, GPIO);
3000
3001                 /* Check for pwm3, fan3, pwm5, fan5 */
3002                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3003                 if (reg27 & BIT(1))
3004                         sio_data->skip_fan |= BIT(4);
3005                 if (reg27 & BIT(3))
3006                         sio_data->skip_pwm |= BIT(4);
3007                 if (reg27 & BIT(6))
3008                         sio_data->skip_pwm |= BIT(2);
3009                 if (reg27 & BIT(7))
3010                         sio_data->skip_fan |= BIT(2);
3011
3012                 /* Check for pwm2, fan2 */
3013                 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3014                 if (reg29 & BIT(1))
3015                         sio_data->skip_pwm |= BIT(1);
3016                 if (reg29 & BIT(2))
3017                         sio_data->skip_fan |= BIT(1);
3018
3019                 /* Check for pwm4, fan4 */
3020                 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
3021                 if (!(reg2a & BIT(0)) || (reg29 & BIT(7))) {
3022                         sio_data->skip_fan |= BIT(3);
3023                         sio_data->skip_pwm |= BIT(3);
3024                 }
3025
3026                 sio_data->skip_pwm |= BIT(0); /* No pwm1 */
3027                 sio_data->skip_fan |= BIT(0); /* No fan1 */
3028                 sio_data->skip_in |= BIT(3);  /* No VIN3 */
3029                 sio_data->skip_in |= BIT(6);  /* No VIN6 */
3030
3031                 sio_data->beep_pin = superio_inb(sioaddr,
3032                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3033         } else if (sio_data->type == it8620 || sio_data->type == it8628 ||
3034                    sio_data->type == it8686) {
3035                 int reg;
3036
3037                 superio_select(sioaddr, GPIO);
3038
3039                 /* Check for pwm5 */
3040                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
3041                 if (reg & BIT(6))
3042                         sio_data->skip_pwm |= BIT(4);
3043
3044                 /* Check for fan4, fan5 */
3045                 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
3046                 if (!(reg & BIT(5)))
3047                         sio_data->skip_fan |= BIT(3);
3048                 if (!(reg & BIT(4)))
3049                         sio_data->skip_fan |= BIT(4);
3050
3051                 /* Check for pwm3, fan3 */
3052                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3053                 if (reg & BIT(6))
3054                         sio_data->skip_pwm |= BIT(2);
3055                 if (reg & BIT(7))
3056                         sio_data->skip_fan |= BIT(2);
3057
3058                 /* Check for pwm4 */
3059                 reg = superio_inb(sioaddr, IT87_SIO_GPIO4_REG);
3060                 if (reg & BIT(2))
3061                         sio_data->skip_pwm |= BIT(3);
3062
3063                 /* Check for pwm2, fan2 */
3064                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3065                 if (reg & BIT(1))
3066                         sio_data->skip_pwm |= BIT(1);
3067                 if (reg & BIT(2))
3068                         sio_data->skip_fan |= BIT(1);
3069                 /* Check for pwm6, fan6 */
3070                 if (!(reg & BIT(7))) {
3071                         sio_data->skip_pwm |= BIT(5);
3072                         sio_data->skip_fan |= BIT(5);
3073                 }
3074
3075                 /* Check if AVCC is on VIN3 */
3076                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3077                 if (reg & BIT(0)) {
3078                         /* For it8686, the bit just enables AVCC3 */
3079                         if (sio_data->type != it8686)
3080                                 sio_data->internal |= BIT(0);
3081                 } else {
3082                         sio_data->internal &= ~BIT(3);
3083                         sio_data->skip_in |= BIT(9);
3084                 }
3085
3086                 sio_data->beep_pin = superio_inb(sioaddr,
3087                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3088         } else if (sio_data->type == it8622) {
3089                 int reg;
3090
3091                 superio_select(sioaddr, GPIO);
3092
3093                 /* Check for pwm4, fan4 */
3094                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
3095                 if (reg & BIT(6))
3096                         sio_data->skip_fan |= BIT(3);
3097                 if (reg & BIT(5))
3098                         sio_data->skip_pwm |= BIT(3);
3099
3100                 /* Check for pwm3, fan3, pwm5, fan5 */
3101                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3102                 if (reg & BIT(6))
3103                         sio_data->skip_pwm |= BIT(2);
3104                 if (reg & BIT(7))
3105                         sio_data->skip_fan |= BIT(2);
3106                 if (reg & BIT(3))
3107                         sio_data->skip_pwm |= BIT(4);
3108                 if (reg & BIT(1))
3109                         sio_data->skip_fan |= BIT(4);
3110
3111                 /* Check for pwm2, fan2 */
3112                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3113                 if (reg & BIT(1))
3114                         sio_data->skip_pwm |= BIT(1);
3115                 if (reg & BIT(2))
3116                         sio_data->skip_fan |= BIT(1);
3117
3118                 /* Check for AVCC */
3119                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3120                 if (!(reg & BIT(0)))
3121                         sio_data->skip_in |= BIT(9);
3122
3123                 sio_data->beep_pin = superio_inb(sioaddr,
3124                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3125         } else if (sio_data->type == it8732) {
3126                 int reg;
3127
3128                 superio_select(sioaddr, GPIO);
3129
3130                 /* Check for pwm2, fan2 */
3131                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3132                 if (reg & BIT(1))
3133                         sio_data->skip_pwm |= BIT(1);
3134                 if (reg & BIT(2))
3135                         sio_data->skip_fan |= BIT(1);
3136
3137                 /* Check for pwm3, fan3, fan4 */
3138                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3139                 if (reg & BIT(6))
3140                         sio_data->skip_pwm |= BIT(2);
3141                 if (reg & BIT(7))
3142                         sio_data->skip_fan |= BIT(2);
3143                 if (reg & BIT(5))
3144                         sio_data->skip_fan |= BIT(3);
3145
3146                 /* Check if AVCC is on VIN3 */
3147                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3148                 if (reg & BIT(0))
3149                         sio_data->internal |= BIT(0);
3150
3151                 sio_data->beep_pin = superio_inb(sioaddr,
3152                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3153         } else if (sio_data->type == it8655) {
3154                 int reg;
3155
3156                 superio_select(sioaddr, GPIO);
3157
3158                 /* Check for pwm2 */
3159                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3160                 if (reg & BIT(1))
3161                         sio_data->skip_pwm |= BIT(1);
3162
3163                 /* Check for fan2 */
3164                 reg = superio_inb(sioaddr, IT87_SIO_PINX4_REG);
3165                 if (reg & BIT(4))
3166                         sio_data->skip_fan |= BIT(1);
3167
3168                 /* Check for pwm3, fan3 */
3169                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3170                 if (reg & BIT(6))
3171                         sio_data->skip_pwm |= BIT(2);
3172                 if (reg & BIT(7))
3173                         sio_data->skip_fan |= BIT(2);
3174
3175                 sio_data->beep_pin = superio_inb(sioaddr,
3176                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3177         } else if (sio_data->type == it8665) {
3178                 int reg;
3179
3180                 superio_select(sioaddr, GPIO);
3181
3182                 /* Check for pwm2 */
3183                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3184                 if (reg & BIT(1))
3185                         sio_data->skip_pwm |= BIT(1);
3186
3187                 /* Check for fan2 */
3188                 reg = superio_inb(sioaddr, IT87_SIO_PINX4_REG);
3189                 if (reg & BIT(4))
3190                         sio_data->skip_fan |= BIT(1);
3191
3192                 /* Check for pwm3, fan3 */
3193                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3194                 if (reg & BIT(6))
3195                         sio_data->skip_pwm |= BIT(2);
3196                 if (reg & BIT(7))
3197                         sio_data->skip_fan |= BIT(2);
3198
3199                 /* Check for pwm5, fan5 */
3200                 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
3201                 if (reg & BIT(5))
3202                         sio_data->skip_pwm |= BIT(4);
3203                 if (!(reg & BIT(4)))
3204                         sio_data->skip_fan |= BIT(4);
3205
3206                 /* Check for pwm4, fan4, pwm6, fan6 */
3207                 reg = superio_inb(sioaddr, IT87_SIO_GPIO9_REG);
3208                 if (reg & BIT(2))
3209                         sio_data->skip_pwm |= BIT(3);
3210                 if (reg & BIT(3))
3211                         sio_data->skip_fan |= BIT(3);
3212                 if (reg & BIT(0))
3213                         sio_data->skip_pwm |= BIT(5);
3214                 if (reg & BIT(1))
3215                         sio_data->skip_fan |= BIT(5);
3216
3217                 sio_data->beep_pin = superio_inb(sioaddr,
3218                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3219         } else {
3220                 int reg;
3221                 bool uart6;
3222
3223                 superio_select(sioaddr, GPIO);
3224
3225                 /* Check for fan4, fan5 */
3226                 if (has_five_fans(config)) {
3227                         reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
3228                         switch (sio_data->type) {
3229                         case it8718:
3230                                 if (reg & BIT(5))
3231                                         sio_data->skip_fan |= BIT(3);
3232                                 if (reg & BIT(4))
3233                                         sio_data->skip_fan |= BIT(4);
3234                                 break;
3235                         case it8720:
3236                         case it8721:
3237                         case it8728:
3238                                 if (!(reg & BIT(5)))
3239                                         sio_data->skip_fan |= BIT(3);
3240                                 if (!(reg & BIT(4)))
3241                                         sio_data->skip_fan |= BIT(4);
3242                                 break;
3243                         default:
3244                                 break;
3245                         }
3246                 }
3247
3248                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3249                 if (!sio_data->skip_vid) {
3250                         /* We need at least 4 VID pins */
3251                         if (reg & 0x0f) {
3252                                 pr_info("VID is disabled (pins used for GPIO)\n");
3253                                 sio_data->skip_vid = 1;
3254                         }
3255                 }
3256
3257                 /* Check if fan3 is there or not */
3258                 if (reg & BIT(6))
3259                         sio_data->skip_pwm |= BIT(2);
3260                 if (reg & BIT(7))
3261                         sio_data->skip_fan |= BIT(2);
3262
3263                 /* Check if fan2 is there or not */
3264                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3265                 if (reg & BIT(1))
3266                         sio_data->skip_pwm |= BIT(1);
3267                 if (reg & BIT(2))
3268                         sio_data->skip_fan |= BIT(1);
3269
3270                 if ((sio_data->type == it8718 || sio_data->type == it8720) &&
3271                     !(sio_data->skip_vid))
3272                         sio_data->vid_value = superio_inb(sioaddr,
3273                                                           IT87_SIO_VID_REG);
3274
3275                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3276
3277                 uart6 = sio_data->type == it8782 && (reg & BIT(2));
3278
3279                 /*
3280                  * The IT8720F has no VIN7 pin, so VCCH should always be
3281                  * routed internally to VIN7 with an internal divider.
3282                  * Curiously, there still is a configuration bit to control
3283                  * this, which means it can be set incorrectly. And even
3284                  * more curiously, many boards out there are improperly
3285                  * configured, even though the IT8720F datasheet claims
3286                  * that the internal routing of VCCH to VIN7 is the default
3287                  * setting. So we force the internal routing in this case.
3288                  *
3289                  * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
3290                  * If UART6 is enabled, re-route VIN7 to the internal divider
3291                  * if that is not already the case.
3292                  */
3293                 if ((sio_data->type == it8720 || uart6) && !(reg & BIT(1))) {
3294                         reg |= BIT(1);
3295                         superio_outb(sioaddr, IT87_SIO_PINX2_REG, reg);
3296                         pr_notice("Routing internal VCCH to in7\n");
3297                 }
3298                 if (reg & BIT(0))
3299                         sio_data->internal |= BIT(0);
3300                 if (reg & BIT(1))
3301                         sio_data->internal |= BIT(1);
3302
3303                 /*
3304                  * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
3305                  * While VIN7 can be routed to the internal voltage divider,
3306                  * VIN5 and VIN6 are not available if UART6 is enabled.
3307                  *
3308                  * Also, temp3 is not available if UART6 is enabled and TEMPIN3
3309                  * is the temperature source. Since we can not read the
3310                  * temperature source here, skip_temp is preliminary.
3311                  */
3312                 if (uart6) {
3313                         sio_data->skip_in |= BIT(5) | BIT(6);
3314                         sio_data->skip_temp |= BIT(2);
3315                 }
3316
3317                 sio_data->beep_pin = superio_inb(sioaddr,
3318                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3319         }
3320         if (sio_data->beep_pin)
3321                 pr_info("Beeping is supported\n");
3322
3323 exit:
3324         superio_exit(sioaddr);
3325         return err;
3326 }
3327
3328 /* Called when we have found a new IT87. */
3329 static void it87_init_device(struct platform_device *pdev)
3330 {
3331         struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
3332         struct it87_data *data = platform_get_drvdata(pdev);
3333         int tmp, i;
3334         u8 mask;
3335
3336         /* Initialize chip specific register pointers */
3337         switch (data->type) {
3338         case it8686:
3339                 data->REG_FAN = IT87_REG_FAN;
3340                 data->REG_FANX = IT87_REG_FANX;
3341                 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3342                 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3343                 data->REG_PWM = IT87_REG_PWM;
3344                 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET_8686;
3345                 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW_8686;
3346                 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH_8686;
3347                 break;
3348         case it8655:
3349         case it8665:
3350                 data->REG_FAN = IT87_REG_FAN_8665;
3351                 data->REG_FANX = IT87_REG_FANX_8665;
3352                 data->REG_FAN_MIN = IT87_REG_FAN_MIN_8665;
3353                 data->REG_FANX_MIN = IT87_REG_FANX_MIN_8665;
3354                 data->REG_PWM = IT87_REG_PWM_8665;
3355                 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
3356                 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
3357                 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
3358                 break;
3359         case it8622:
3360                 data->REG_FAN = IT87_REG_FAN;
3361                 data->REG_FANX = IT87_REG_FANX;
3362                 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3363                 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3364                 data->REG_PWM = IT87_REG_PWM_8665;
3365                 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
3366                 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
3367                 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
3368                 break;
3369         case it8613:
3370                 data->REG_FAN = IT87_REG_FAN;
3371                 data->REG_FANX = IT87_REG_FANX;
3372                 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3373                 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3374                 data->REG_PWM = IT87_REG_PWM_8665;
3375                 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
3376                 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
3377                 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
3378                 break;
3379         default:
3380                 data->REG_FAN = IT87_REG_FAN;
3381                 data->REG_FANX = IT87_REG_FANX;
3382                 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3383                 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3384                 data->REG_PWM = IT87_REG_PWM;
3385                 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
3386                 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
3387                 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
3388                 break;
3389         }
3390
3391         /*
3392          * For each PWM channel:
3393          * - If it is in automatic mode, setting to manual mode should set
3394          *   the fan to full speed by default.
3395          * - If it is in manual mode, we need a mapping to temperature
3396          *   channels to use when later setting to automatic mode later.
3397          *   Use a 1:1 mapping by default (we are clueless.)
3398          * In both cases, the value can (and should) be changed by the user
3399          * prior to switching to a different mode.
3400          * Note that this is no longer needed for the IT8721F and later, as
3401          * these have separate registers for the temperature mapping and the
3402          * manual duty cycle.
3403          */
3404         for (i = 0; i < NUM_AUTO_PWM; i++) {
3405                 data->pwm_temp_map[i] = i;
3406                 data->pwm_duty[i] = 0x7f;       /* Full speed */
3407                 data->auto_pwm[i][3] = 0x7f;    /* Full speed, hard-coded */
3408         }
3409
3410         /*
3411          * Some chips seem to have default value 0xff for all limit
3412          * registers. For low voltage limits it makes no sense and triggers
3413          * alarms, so change to 0 instead. For high temperature limits, it
3414          * means -1 degree C, which surprisingly doesn't trigger an alarm,
3415          * but is still confusing, so change to 127 degrees C.
3416          */
3417         for (i = 0; i < NUM_VIN_LIMIT; i++) {
3418                 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
3419                 if (tmp == 0xff)
3420                         it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
3421         }
3422         for (i = 0; i < data->num_temp_limit; i++) {
3423                 tmp = it87_read_value(data, data->REG_TEMP_HIGH[i]);
3424                 if (tmp == 0xff)
3425                         it87_write_value(data, data->REG_TEMP_HIGH[i], 127);
3426         }
3427
3428         /*
3429          * Temperature channels are not forcibly enabled, as they can be
3430          * set to two different sensor types and we can't guess which one
3431          * is correct for a given system. These channels can be enabled at
3432          * run-time through the temp{1-3}_type sysfs accessors if needed.
3433          */
3434
3435         /* Check if voltage monitors are reset manually or by some reason */
3436         tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
3437         if ((tmp & 0xff) == 0) {
3438                 /* Enable all voltage monitors */
3439                 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
3440         }
3441
3442         /* Check if tachometers are reset manually or by some reason */
3443         mask = 0x70 & ~(sio_data->skip_fan << 4);
3444         data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
3445         if ((data->fan_main_ctrl & mask) == 0) {
3446                 /* Enable all fan tachometers */
3447                 data->fan_main_ctrl |= mask;
3448                 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
3449                                  data->fan_main_ctrl);
3450         }
3451         data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
3452
3453         tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
3454
3455         /* Set tachometers to 16-bit mode if needed */
3456         if (has_fan16_config(data)) {
3457                 if (~tmp & 0x07 & data->has_fan) {
3458                         dev_dbg(&pdev->dev,
3459                                 "Setting fan1-3 to 16-bit mode\n");
3460                         it87_write_value(data, IT87_REG_FAN_16BIT,
3461                                          tmp | 0x07);
3462                 }
3463         }
3464
3465         /* Check for additional fans */
3466         if (has_four_fans(data) && (tmp & BIT(4)))
3467                 data->has_fan |= BIT(3); /* fan4 enabled */
3468         if (has_five_fans(data) && (tmp & BIT(5)))
3469                 data->has_fan |= BIT(4); /* fan5 enabled */
3470         if (has_six_fans(data)) {
3471                 switch (data->type) {
3472                 case it8620:
3473                 case it8628:
3474                 case it8686:
3475                         if (tmp & BIT(2))
3476                                 data->has_fan |= BIT(5); /* fan6 enabled */
3477                         break;
3478                 case it8665:
3479                         tmp = it87_read_value(data, IT87_REG_FAN_DIV);
3480                         if (tmp & BIT(3))
3481                                 data->has_fan |= BIT(5); /* fan6 enabled */
3482                         break;
3483                 default:
3484                         break;
3485                 }
3486         }
3487
3488         /* Fan input pins may be used for alternative functions */
3489         data->has_fan &= ~sio_data->skip_fan;
3490
3491         /* Check if pwm6 is enabled */
3492         if (has_six_pwm(data)) {
3493                 switch (data->type) {
3494                 case it8620:
3495                 case it8686:
3496                         tmp = it87_read_value(data, IT87_REG_FAN_DIV);
3497                         if (!(tmp & BIT(3)))
3498                                 sio_data->skip_pwm |= BIT(5);
3499                         break;
3500                 default:
3501                         break;
3502                 }
3503         }
3504
3505         /* Start monitoring */
3506         it87_write_value(data, IT87_REG_CONFIG,
3507                          (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
3508                          | (update_vbat ? 0x41 : 0x01));
3509 }
3510
3511 /* Return 1 if and only if the PWM interface is safe to use */
3512 static int it87_check_pwm(struct device *dev)
3513 {
3514         struct it87_data *data = dev_get_drvdata(dev);
3515         /*
3516          * Some BIOSes fail to correctly configure the IT87 fans. All fans off
3517          * and polarity set to active low is sign that this is the case so we
3518          * disable pwm control to protect the user.
3519          */
3520         int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
3521
3522         if ((tmp & 0x87) == 0) {
3523                 if (fix_pwm_polarity) {
3524                         /*
3525                          * The user asks us to attempt a chip reconfiguration.
3526                          * This means switching to active high polarity and
3527                          * inverting all fan speed values.
3528                          */
3529                         int i;
3530                         u8 pwm[3];
3531
3532                         for (i = 0; i < ARRAY_SIZE(pwm); i++)
3533                                 pwm[i] = it87_read_value(data,
3534                                                          data->REG_PWM[i]);
3535
3536                         /*
3537                          * If any fan is in automatic pwm mode, the polarity
3538                          * might be correct, as suspicious as it seems, so we
3539                          * better don't change anything (but still disable the
3540                          * PWM interface).
3541                          */
3542                         if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
3543                                 dev_info(dev,
3544                                          "Reconfiguring PWM to active high polarity\n");
3545                                 it87_write_value(data, IT87_REG_FAN_CTL,
3546                                                  tmp | 0x87);
3547                                 for (i = 0; i < 3; i++)
3548                                         it87_write_value(data,
3549                                                          data->REG_PWM[i],
3550                                                          0x7f & ~pwm[i]);
3551                                 return 1;
3552                         }
3553
3554                         dev_info(dev,
3555                                  "PWM configuration is too broken to be fixed\n");
3556                 }
3557
3558                 dev_info(dev,
3559                          "Detected broken BIOS defaults, disabling PWM interface\n");
3560                 return 0;
3561         } else if (fix_pwm_polarity) {
3562                 dev_info(dev,
3563                          "PWM configuration looks sane, won't touch\n");
3564         }
3565
3566         return 1;
3567 }
3568
3569 static int it87_probe(struct platform_device *pdev)
3570 {
3571         struct it87_data *data;
3572         struct resource *res;
3573         struct device *dev = &pdev->dev;
3574         struct it87_sio_data *sio_data = dev_get_platdata(dev);
3575         int enable_pwm_interface;
3576         struct device *hwmon_dev;
3577
3578         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3579         if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
3580                                  DRVNAME)) {
3581                 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
3582                         (unsigned long)res->start,
3583                         (unsigned long)(res->start + IT87_EC_EXTENT - 1));
3584                 return -EBUSY;
3585         }
3586
3587         data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
3588         if (!data)
3589                 return -ENOMEM;
3590
3591         data->addr = res->start;
3592         data->type = sio_data->type;
3593         data->features = it87_devices[sio_data->type].features;
3594         data->num_temp_limit = it87_devices[sio_data->type].num_temp_limit;
3595         data->peci_mask = it87_devices[sio_data->type].peci_mask;
3596         data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
3597         data->bank = 0xff;
3598
3599         /*
3600          * IT8705F Datasheet 0.4.1, 3h == Version G.
3601          * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
3602          * These are the first revisions with 16-bit tachometer support.
3603          */
3604         switch (data->type) {
3605         case it87:
3606                 if (sio_data->revision >= 0x03) {
3607                         data->features &= ~FEAT_OLD_AUTOPWM;
3608                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS;
3609                 }
3610                 break;
3611         case it8712:
3612                 if (sio_data->revision >= 0x08) {
3613                         data->features &= ~FEAT_OLD_AUTOPWM;
3614                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS |
3615                                           FEAT_FIVE_FANS;
3616                 }
3617                 break;
3618         default:
3619                 break;
3620         }
3621
3622         /* Now, we do the remaining detection. */
3623         if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80) ||
3624             it87_read_value(data, IT87_REG_CHIPID) != 0x90)
3625                 return -ENODEV;
3626
3627         platform_set_drvdata(pdev, data);
3628
3629         mutex_init(&data->update_lock);
3630
3631         /* Check PWM configuration */
3632         enable_pwm_interface = it87_check_pwm(dev);
3633
3634         /* Starting with IT8721F, we handle scaling of internal voltages */
3635         if (has_scaling(data)) {
3636                 if (sio_data->internal & BIT(0))
3637                         data->in_scaled |= BIT(3);      /* in3 is AVCC */
3638                 if (sio_data->internal & BIT(1))
3639                         data->in_scaled |= BIT(7);      /* in7 is VSB */
3640                 if (sio_data->internal & BIT(2))
3641                         data->in_scaled |= BIT(8);      /* in8 is Vbat */
3642                 if (sio_data->internal & BIT(3))
3643                         data->in_scaled |= BIT(9);      /* in9 is AVCC */
3644         } else if (sio_data->type == it8781 || sio_data->type == it8782 ||
3645                    sio_data->type == it8783) {
3646                 if (sio_data->internal & BIT(0))
3647                         data->in_scaled |= BIT(3);      /* in3 is VCC5V */
3648                 if (sio_data->internal & BIT(1))
3649                         data->in_scaled |= BIT(7);      /* in7 is VCCH5V */
3650         }
3651
3652         data->has_temp = 0x07;
3653         if (sio_data->skip_temp & BIT(2)) {
3654                 if (sio_data->type == it8782 &&
3655                     !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
3656                         data->has_temp &= ~BIT(2);
3657         }
3658
3659         data->in_internal = sio_data->internal;
3660         data->has_in = 0x3ff & ~sio_data->skip_in;
3661
3662         if (has_six_temp(data)) {
3663                 u8 reg = it87_read_value(data, IT87_REG_TEMP456_ENABLE);
3664
3665                 /* Check for additional temperature sensors */
3666                 if ((reg & 0x03) >= 0x02)
3667                         data->has_temp |= BIT(3);
3668                 if (((reg >> 2) & 0x03) >= 0x02)
3669                         data->has_temp |= BIT(4);
3670                 if (((reg >> 4) & 0x03) >= 0x02)
3671                         data->has_temp |= BIT(5);
3672
3673                 /* Check for additional voltage sensors */
3674                 if ((reg & 0x03) == 0x01)
3675                         data->has_in |= BIT(10);
3676                 if (((reg >> 2) & 0x03) == 0x01)
3677                         data->has_in |= BIT(11);
3678                 if (((reg >> 4) & 0x03) == 0x01)
3679                         data->has_in |= BIT(12);
3680         }
3681
3682         data->has_beep = !!sio_data->beep_pin;
3683
3684         /* Initialize the IT87 chip */
3685         it87_init_device(pdev);
3686
3687         if (!sio_data->skip_vid) {
3688                 data->has_vid = true;
3689                 data->vrm = vid_which_vrm();
3690                 /* VID reading from Super-I/O config space if available */
3691                 data->vid = sio_data->vid_value;
3692         }
3693
3694         /* Prepare for sysfs hooks */
3695         data->groups[0] = &it87_group;
3696         data->groups[1] = &it87_group_in;
3697         data->groups[2] = &it87_group_temp;
3698         data->groups[3] = &it87_group_fan;
3699
3700         if (enable_pwm_interface) {
3701                 data->has_pwm = BIT(ARRAY_SIZE(IT87_REG_PWM)) - 1;
3702                 data->has_pwm &= ~sio_data->skip_pwm;
3703
3704                 data->groups[4] = &it87_group_pwm;
3705                 if (has_old_autopwm(data) || has_newer_autopwm(data))
3706                         data->groups[5] = &it87_group_auto_pwm;
3707         }
3708
3709         hwmon_dev = devm_hwmon_device_register_with_groups(dev,
3710                                         it87_devices[sio_data->type].name,
3711                                         data, data->groups);
3712         return PTR_ERR_OR_ZERO(hwmon_dev);
3713 }
3714
3715 static struct platform_driver it87_driver = {
3716         .driver = {
3717                 .name   = DRVNAME,
3718         },
3719         .probe  = it87_probe,
3720 };
3721
3722 static int __init it87_device_add(int index, unsigned short address,
3723                                   const struct it87_sio_data *sio_data)
3724 {
3725         struct platform_device *pdev;
3726         struct resource res = {
3727                 .start  = address + IT87_EC_OFFSET,
3728                 .end    = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
3729                 .name   = DRVNAME,
3730                 .flags  = IORESOURCE_IO,
3731         };
3732         int err;
3733
3734         err = acpi_check_resource_conflict(&res);
3735         if (err)
3736                 return err;
3737
3738         pdev = platform_device_alloc(DRVNAME, address);
3739         if (!pdev)
3740                 return -ENOMEM;
3741
3742         err = platform_device_add_resources(pdev, &res, 1);
3743         if (err) {
3744                 pr_err("Device resource addition failed (%d)\n", err);
3745                 goto exit_device_put;
3746         }
3747
3748         err = platform_device_add_data(pdev, sio_data,
3749                                        sizeof(struct it87_sio_data));
3750         if (err) {
3751                 pr_err("Platform data allocation failed\n");
3752                 goto exit_device_put;
3753         }
3754
3755         err = platform_device_add(pdev);
3756         if (err) {
3757                 pr_err("Device addition failed (%d)\n", err);
3758                 goto exit_device_put;
3759         }
3760
3761         it87_pdev[index] = pdev;
3762         return 0;
3763
3764 exit_device_put:
3765         platform_device_put(pdev);
3766         return err;
3767 }
3768
3769 struct it87_dmi_data {
3770         bool sio4e_broken;      /* SIO accesses @ 0x4e are broken       */
3771         char *sio_mutex;        /* SIO ACPI mutex                       */
3772         u8 skip_pwm;            /* pwm channels to skip for this board  */
3773 };
3774
3775 /*
3776  * On Gigabyte AB350 and AX370 boards, accesses to the Super-IO chip
3777  * at address 0x4e/0x4f can result in a system hang.
3778  * Accesses to address 0x2e/0x2f need to be mutex protected.
3779  */
3780 static struct it87_dmi_data gigabyte_ab350_gaming = {
3781         .sio4e_broken = true,
3782         .sio_mutex = "\\_SB.PCI0.SBRG.SIO1.MUT0",
3783 };
3784
3785 /*
3786  * On the Shuttle SN68PT, FAN_CTL2 is apparently not
3787  * connected to a fan, but to something else. One user
3788  * has reported instant system power-off when changing
3789  * the PWM2 duty cycle, so we disable it.
3790  * I use the board name string as the trigger in case
3791  * the same board is ever used in other systems.
3792  */
3793 static struct it87_dmi_data nvidia_fn68pt = {
3794         .skip_pwm = BIT(1),
3795 };
3796
3797 static const struct dmi_system_id it87_dmi_table[] __initconst = {
3798         {
3799                 .matches = {
3800                         DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."),
3801                         DMI_MATCH(DMI_BOARD_NAME, "AB350-Gaming-CF"),
3802                 },
3803                 .driver_data = &gigabyte_ab350_gaming,
3804         },
3805         {
3806                 .matches = {
3807                         DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."),
3808                         DMI_MATCH(DMI_BOARD_NAME, "AB350-Gaming 3-CF"),
3809                 },
3810                 .driver_data = &gigabyte_ab350_gaming,
3811         },
3812         {
3813                 .matches = {
3814                         DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."),
3815                         DMI_MATCH(DMI_BOARD_NAME, "AX370-Gaming K7"),
3816                 },
3817                 .driver_data = &gigabyte_ab350_gaming,
3818         },
3819         {
3820                 .matches = {
3821                         DMI_MATCH(DMI_BOARD_VENDOR, "nVIDIA"),
3822                         DMI_MATCH(DMI_BOARD_NAME, "FN68PT"),
3823                 },
3824                 .driver_data = &nvidia_fn68pt,
3825         },
3826         { }
3827 };
3828
3829 static int __init sm_it87_init(void)
3830 {
3831         const struct dmi_system_id *dmi = dmi_first_match(it87_dmi_table);
3832         struct it87_dmi_data *dmi_data = NULL;
3833         int sioaddr[2] = { REG_2E, REG_4E };
3834         struct it87_sio_data sio_data;
3835         unsigned short isa_address;
3836         bool found = false;
3837         int i, err;
3838
3839         if (dmi)
3840                 dmi_data = dmi->driver_data;
3841
3842         if (dmi_data) {
3843                 it87_sio4e_broken = dmi_data->sio4e_broken;
3844 #ifdef __IT87_USE_ACPI_MUTEX
3845                 if (dmi_data->sio_mutex) {
3846                         static acpi_status status;
3847
3848                         status = acpi_get_handle(NULL, dmi_data->sio_mutex,
3849                                                  &it87_acpi_sio_handle);
3850                         if (ACPI_SUCCESS(status)) {
3851                                 it87_acpi_sio_mutex = dmi_data->sio_mutex;
3852                                 pr_debug("Found ACPI SIO mutex %s\n",
3853                                          dmi_data->sio_mutex);
3854                         } else {
3855                                 pr_warn("ACPI SIO mutex %s not found\n",
3856                                         dmi_data->sio_mutex);
3857                         }
3858                 }
3859 #endif /* __IT87_USE_ACPI_MUTEX */
3860         }
3861
3862         err = platform_driver_register(&it87_driver);
3863         if (err)
3864                 return err;
3865
3866         for (i = 0; i < ARRAY_SIZE(sioaddr); i++) {
3867                 /*
3868                  * Accessing the second Super-IO chi can result in board
3869                  * hangs. Disable until we figure out what is going on.
3870                  */
3871                 if (it87_sio4e_broken && sioaddr[i] == 0x4e)
3872                         continue;
3873                 memset(&sio_data, 0, sizeof(struct it87_sio_data));
3874                 isa_address = 0;
3875                 err = it87_find(sioaddr[i], &isa_address, &sio_data);
3876                 if (err || isa_address == 0)
3877                         continue;
3878
3879                 if (dmi_data)
3880                         sio_data.skip_pwm |= dmi_data->skip_pwm;
3881                 err = it87_device_add(i, isa_address, &sio_data);
3882                 if (err)
3883                         goto exit_dev_unregister;
3884                 found = true;
3885         }
3886
3887         if (!found) {
3888                 err = -ENODEV;
3889                 goto exit_unregister;
3890         }
3891         return 0;
3892
3893 exit_dev_unregister:
3894         /* NULL check handled by platform_device_unregister */
3895         platform_device_unregister(it87_pdev[0]);
3896 exit_unregister:
3897         platform_driver_unregister(&it87_driver);
3898         return err;
3899 }
3900
3901 static void __exit sm_it87_exit(void)
3902 {
3903         /* NULL check handled by platform_device_unregister */
3904         platform_device_unregister(it87_pdev[1]);
3905         platform_device_unregister(it87_pdev[0]);
3906         platform_driver_unregister(&it87_driver);
3907 }
3908
3909 MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>");
3910 MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
3911 module_param(update_vbat, bool, 0);
3912 MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
3913 module_param(fix_pwm_polarity, bool, 0);
3914 MODULE_PARM_DESC(fix_pwm_polarity,
3915                  "Force PWM polarity to active high (DANGEROUS)");
3916 MODULE_LICENSE("GPL");
3917
3918 module_init(sm_it87_init);
3919 module_exit(sm_it87_exit);