git.sur5r.net Git - groeck-it87/blob - it87.c

   1 /*
   2  *  it87.c - Part of lm_sensors, Linux kernel modules for hardware
   3  *           monitoring.
   4  *
   5  *  The IT8705F is an LPC-based Super I/O part that contains UARTs, a
   6  *  parallel port, an IR port, a MIDI port, a floppy controller, etc., in
   7  *  addition to an Environment Controller (Enhanced Hardware Monitor and
   8  *  Fan Controller)
   9  *
  10  *  This driver supports only the Environment Controller in the IT8705F and
  11  *  similar parts.  The other devices are supported by different drivers.
  12  *
  13  *  Supports: IT8603E  Super I/O chip w/LPC interface
  14  *            IT8606E  Super I/O chip w/LPC interface
  15  *            IT8607E  Super I/O chip w/LPC interface
  16  *            IT8613E  Super I/O chip w/LPC interface
  17  *            IT8620E  Super I/O chip w/LPC interface
  18  *            IT8622E  Super I/O chip w/LPC interface
  19  *            IT8623E  Super I/O chip w/LPC interface
  20  *            IT8625E  Super I/O chip w/LPC interface
  21  *            IT8628E  Super I/O chip w/LPC interface
  22  *            IT8655E  Super I/O chip w/LPC interface
  23  *            IT8665E  Super I/O chip w/LPC interface
  24  *            IT8686E  Super I/O chip w/LPC interface
  25  *            IT8705F  Super I/O chip w/LPC interface
  26  *            IT8712F  Super I/O chip w/LPC interface
  27  *            IT8716F  Super I/O chip w/LPC interface
  28  *            IT8718F  Super I/O chip w/LPC interface
  29  *            IT8720F  Super I/O chip w/LPC interface
  30  *            IT8721F  Super I/O chip w/LPC interface
  31  *            IT8726F  Super I/O chip w/LPC interface
  32  *            IT8728F  Super I/O chip w/LPC interface
  33  *            IT8732F  Super I/O chip w/LPC interface
  34  *            IT8758E  Super I/O chip w/LPC interface
  35  *            IT8771E  Super I/O chip w/LPC interface
  36  *            IT8772E  Super I/O chip w/LPC interface
  37  *            IT8781F  Super I/O chip w/LPC interface
  38  *            IT8782F  Super I/O chip w/LPC interface
  39  *            IT8783E/F Super I/O chip w/LPC interface
  40  *            IT8786E  Super I/O chip w/LPC interface
  41  *            IT8790E  Super I/O chip w/LPC interface
  42  *            IT8792E  Super I/O chip w/LPC interface
  43  *            Sis950   A clone of the IT8705F
  44  *
  45  *  Copyright (C) 2001 Chris Gauthron
  46  *  Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de>
  47  *
  48  *  This program is free software; you can redistribute it and/or modify
  49  *  it under the terms of the GNU General Public License as published by
  50  *  the Free Software Foundation; either version 2 of the License, or
  51  *  (at your option) any later version.
  52  *
  53  *  This program is distributed in the hope that it will be useful,
  54  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  55  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  56  *  GNU General Public License for more details.
  57  */
  58
  59 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  60
  61 #include <linux/bitops.h>
  62 #include <linux/module.h>
  63 #include <linux/init.h>
  64 #include <linux/slab.h>
  65 #include <linux/jiffies.h>
  66 #include <linux/platform_device.h>
  67 #include <linux/hwmon.h>
  68 #include <linux/hwmon-sysfs.h>
  69 #include <linux/hwmon-vid.h>
  70 #include <linux/err.h>
  71 #include <linux/mutex.h>
  72 #include <linux/sysfs.h>
  73 #include <linux/string.h>
  74 #include <linux/dmi.h>
  75 #include <linux/acpi.h>
  76 #include <linux/io.h>
  77 #include "compat.h"
  78
  79 #ifndef IT87_DRIVER_VERSION
  80 #define IT87_DRIVER_VERSION     "<not provided>"
  81 #endif
  82
  83 #define DRVNAME "it87"
  84
  85 enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732,
  86              it8771, it8772, it8781, it8782, it8783, it8786, it8790,
  87              it8792, it8603, it8606, it8607, it8613, it8620, it8622, it8625,
  88              it8628, it8655, it8665, it8686 };
  89
  90 static unsigned short force_id;
  91 module_param(force_id, ushort, 0000);
  92 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  93
  94 static bool ignore_resource_conflict;
  95 module_param(ignore_resource_conflict, bool, 0000);
  96 MODULE_PARM_DESC(ignore_resource_conflict, "Ignore ACPI resource conflict");
  97
  98 static bool mmio;
  99 module_param(mmio, bool, 0000);
 100 MODULE_PARM_DESC(mmio, "Use MMIO if available");
 101
 102 static struct platform_device *it87_pdev[2];
 103
 104 #define REG_2E  0x2e    /* The register to read/write */
 105 #define REG_4E  0x4e    /* Secondary register to read/write */
 106
 107 #define DEV     0x07    /* Register: Logical device select */
 108 #define PME     0x04    /* The device with the fan registers in it */
 109
 110 /* The device with the IT8718F/IT8720F VID value in it */
 111 #define GPIO    0x07
 112
 113 #define DEVID   0x20    /* Register: Device ID */
 114 #define DEVREV  0x22    /* Register: Device Revision */
 115
 116 static inline void __superio_enter(int ioreg)
 117 {
 118         outb(0x87, ioreg);
 119         outb(0x01, ioreg);
 120         outb(0x55, ioreg);
 121         outb(ioreg == REG_4E ? 0xaa : 0x55, ioreg);
 122 }
 123
 124 static inline int superio_inb(int ioreg, int reg)
 125 {
 126         int val;
 127
 128         outb(reg, ioreg);
 129         val = inb(ioreg + 1);
 130
 131         return val;
 132 }
 133
 134 static inline void superio_outb(int ioreg, int reg, int val)
 135 {
 136         outb(reg, ioreg);
 137         outb(val, ioreg + 1);
 138 }
 139
 140 static int superio_inw(int ioreg, int reg)
 141 {
 142         return (superio_inb(ioreg, reg) << 8) | superio_inb(ioreg, reg + 1);
 143 }
 144
 145 static inline void superio_select(int ioreg, int ldn)
 146 {
 147         outb(DEV, ioreg);
 148         outb(ldn, ioreg + 1);
 149 }
 150
 151 static inline int superio_enter(int ioreg)
 152 {
 153         /*
 154          * Try to reserve ioreg and ioreg + 1 for exclusive access.
 155          */
 156         if (!request_muxed_region(ioreg, 2, DRVNAME))
 157                 return -EBUSY;
 158
 159         __superio_enter(ioreg);
 160         return 0;
 161 }
 162
 163 static inline void superio_exit(int ioreg, bool doexit)
 164 {
 165         if (doexit) {
 166                 outb(0x02, ioreg);
 167                 outb(0x02, ioreg + 1);
 168         }
 169         release_region(ioreg, 2);
 170 }
 171
 172 /* Logical device 4 registers */
 173 #define IT8712F_DEVID 0x8712
 174 #define IT8705F_DEVID 0x8705
 175 #define IT8716F_DEVID 0x8716
 176 #define IT8718F_DEVID 0x8718
 177 #define IT8720F_DEVID 0x8720
 178 #define IT8721F_DEVID 0x8721
 179 #define IT8726F_DEVID 0x8726
 180 #define IT8728F_DEVID 0x8728
 181 #define IT8732F_DEVID 0x8732
 182 #define IT8792E_DEVID 0x8733
 183 #define IT8771E_DEVID 0x8771
 184 #define IT8772E_DEVID 0x8772
 185 #define IT8781F_DEVID 0x8781
 186 #define IT8782F_DEVID 0x8782
 187 #define IT8783E_DEVID 0x8783
 188 #define IT8786E_DEVID 0x8786
 189 #define IT8790E_DEVID 0x8790
 190 #define IT8603E_DEVID 0x8603
 191 #define IT8606E_DEVID 0x8606
 192 #define IT8607E_DEVID 0x8607
 193 #define IT8613E_DEVID 0x8613
 194 #define IT8620E_DEVID 0x8620
 195 #define IT8622E_DEVID 0x8622
 196 #define IT8623E_DEVID 0x8623
 197 #define IT8625E_DEVID 0x8625
 198 #define IT8628E_DEVID 0x8628
 199 #define IT8655E_DEVID 0x8655
 200 #define IT8665E_DEVID 0x8665
 201 #define IT8686E_DEVID 0x8686
 202
 203 /* Logical device 4 (Environmental Monitor) registers */
 204 #define IT87_ACT_REG            0x30
 205 #define IT87_BASE_REG           0x60
 206 #define IT87_SPECIAL_CFG_REG    0xf3    /* special configuration register */
 207
 208 /* Global configuration registers (IT8712F and later) */
 209 #define IT87_EC_HWM_MIO_REG     0x24    /* MMIO configuration register */
 210 #define IT87_SIO_GPIO1_REG      0x25
 211 #define IT87_SIO_GPIO2_REG      0x26
 212 #define IT87_SIO_GPIO3_REG      0x27
 213 #define IT87_SIO_GPIO4_REG      0x28
 214 #define IT87_SIO_GPIO5_REG      0x29
 215 #define IT87_SIO_GPIO9_REG      0xd3
 216 #define IT87_SIO_PINX1_REG      0x2a    /* Pin selection */
 217 #define IT87_SIO_PINX2_REG      0x2c    /* Pin selection */
 218 #define IT87_SIO_PINX4_REG      0x2d    /* Pin selection */
 219
 220 /* Logical device 7 (GPIO) registers (IT8712F and later) */
 221 #define IT87_SIO_SPI_REG        0xef    /* SPI function pin select */
 222 #define IT87_SIO_VID_REG        0xfc    /* VID value */
 223 #define IT87_SIO_BEEP_PIN_REG   0xf6    /* Beep pin mapping */
 224
 225 /* Update battery voltage after every reading if true */
 226 static bool update_vbat;
 227
 228 /* Not all BIOSes properly configure the PWM registers */
 229 static bool fix_pwm_polarity;
 230
 231 /* Many IT87 constants specified below */
 232
 233 /* Length of ISA address segment */
 234 #define IT87_EXTENT 8
 235
 236 /* Length of ISA address segment for Environmental Controller */
 237 #define IT87_EC_EXTENT 2
 238
 239 /* Offset of EC registers from ISA base address */
 240 #define IT87_EC_OFFSET 5
 241
 242 /* Where are the ISA address/data registers relative to the EC base address */
 243 #define IT87_ADDR_REG_OFFSET 0
 244 #define IT87_DATA_REG_OFFSET 1
 245
 246 /*----- The IT87 registers -----*/
 247
 248 #define IT87_REG_CONFIG        0x00
 249
 250 #define IT87_REG_ALARM1        0x01
 251 #define IT87_REG_ALARM2        0x02
 252 #define IT87_REG_ALARM3        0x03
 253
 254 #define IT87_REG_BANK           0x06
 255
 256 /*
 257  * The IT8718F and IT8720F have the VID value in a different register, in
 258  * Super-I/O configuration space.
 259  */
 260 #define IT87_REG_VID           0x0a
 261
 262 /* Interface Selection register on other chips */
 263 #define IT87_REG_IFSEL         0x0a
 264
 265 /*
 266  * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
 267  * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
 268  * mode.
 269  */
 270 #define IT87_REG_FAN_DIV       0x0b
 271 #define IT87_REG_FAN_16BIT     0x0c
 272
 273 /*
 274  * Monitors:
 275  * - up to 13 voltage (0 to 7, battery, avcc, 10 to 12)
 276  * - up to 6 temp (1 to 6)
 277  * - up to 6 fan (1 to 6)
 278  */
 279
 280 static const u8 IT87_REG_FAN[] =        { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c };
 281 static const u8 IT87_REG_FAN_MIN[] =    { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e };
 282 static const u8 IT87_REG_FANX[] =       { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d };
 283 static const u8 IT87_REG_FANX_MIN[] =   { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f };
 284
 285 static const u8 IT87_REG_FAN_8665[] =   { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x93 };
 286 static const u8 IT87_REG_FAN_MIN_8665[] = {
 287                                         0x10, 0x11, 0x12, 0x84, 0x86, 0xb2 };
 288 static const u8 IT87_REG_FANX_8665[] =  { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x94 };
 289 static const u8 IT87_REG_FANX_MIN_8665[] = {
 290                                         0x1b, 0x1c, 0x1d, 0x85, 0x87, 0xb3 };
 291
 292 static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59, 0x5a, 0x90, 0x91 };
 293
 294 static const u8 IT87_REG_TEMP_OFFSET_8686[] = {
 295                                         0x56, 0x57, 0x59, 0x90, 0x91, 0x92 };
 296
 297 #define IT87_REG_FAN_MAIN_CTRL 0x13
 298 #define IT87_REG_FAN_CTL       0x14
 299
 300 static const u8 IT87_REG_PWM[] =        { 0x15, 0x16, 0x17, 0x7f, 0xa7, 0xaf };
 301 static const u8 IT87_REG_PWM_8665[] =   { 0x15, 0x16, 0x17, 0x1e, 0x1f, 0x92 };
 302
 303 static const u8 IT87_REG_PWM_DUTY[] =   { 0x63, 0x6b, 0x73, 0x7b, 0xa3, 0xab };
 304
 305 static const u8 IT87_REG_VIN[]  = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26,
 306                                     0x27, 0x28, 0x2f, 0x2c, 0x2d, 0x2e };
 307
 308 #define IT87_REG_TEMP(nr)      (0x29 + (nr))
 309
 310 #define IT87_REG_VIN_MAX(nr)   (0x30 + (nr) * 2)
 311 #define IT87_REG_VIN_MIN(nr)   (0x31 + (nr) * 2)
 312
 313 static const u8 IT87_REG_TEMP_HIGH[] =  { 0x40, 0x42, 0x44, 0x46, 0xb4, 0xb6 };
 314 static const u8 IT87_REG_TEMP_LOW[] =   { 0x41, 0x43, 0x45, 0x47, 0xb5, 0xb7 };
 315
 316 static const u8 IT87_REG_TEMP_HIGH_8686[] = {
 317                                         0x40, 0x42, 0x44, 0xb4, 0xb6, 0xb8 };
 318 static const u8 IT87_REG_TEMP_LOW_8686[] = {
 319                                         0x41, 0x43, 0x45, 0xb5, 0xb7, 0xb9 };
 320
 321 #define IT87_REG_VIN_ENABLE    0x50
 322 #define IT87_REG_TEMP_ENABLE   0x51
 323 #define IT87_REG_TEMP_EXTRA    0x55
 324 #define IT87_REG_BEEP_ENABLE   0x5c
 325
 326 #define IT87_REG_CHIPID        0x58
 327
 328 static const u8 IT87_REG_AUTO_BASE[] = { 0x60, 0x68, 0x70, 0x78, 0xa0, 0xa8 };
 329
 330 #define IT87_REG_AUTO_TEMP(nr, i) (IT87_REG_AUTO_BASE[nr] + (i))
 331 #define IT87_REG_AUTO_PWM(nr, i)  (IT87_REG_AUTO_BASE[nr] + 5 + (i))
 332
 333 #define IT87_REG_TEMP456_ENABLE 0x77
 334
 335 static const u16 IT87_REG_TEMP_SRC1[] = { 0x21d, 0x21e, 0x21f };
 336 #define IT87_REG_TEMP_SRC2      0x23d
 337
 338 #define NUM_VIN                 ARRAY_SIZE(IT87_REG_VIN)
 339 #define NUM_VIN_LIMIT           8
 340 #define NUM_TEMP                6
 341 #define NUM_FAN                 ARRAY_SIZE(IT87_REG_FAN)
 342 #define NUM_FAN_DIV             3
 343 #define NUM_PWM                 ARRAY_SIZE(IT87_REG_PWM)
 344 #define NUM_AUTO_PWM            ARRAY_SIZE(IT87_REG_PWM)
 345
 346 struct it87_devices {
 347         const char *name;
 348         const char * const model;
 349         u32 features;
 350         u8 num_temp_limit;
 351         u8 num_temp_offset;
 352         u8 num_temp_map;        /* Number of temperature sources for pwm */
 353         u8 peci_mask;
 354         u8 old_peci_mask;
 355         u8 smbus_bitmap;        /* SMBus enable bits in extra config register */
 356         u8 ec_special_config;
 357 };
 358
 359 #define FEAT_12MV_ADC           BIT(0)
 360 #define FEAT_NEWER_AUTOPWM      BIT(1)
 361 #define FEAT_OLD_AUTOPWM        BIT(2)
 362 #define FEAT_16BIT_FANS         BIT(3)
 363 #define FEAT_TEMP_PECI          BIT(5)
 364 #define FEAT_TEMP_OLD_PECI      BIT(6)
 365 #define FEAT_FAN16_CONFIG       BIT(7)  /* Need to enable 16-bit fans */
 366 #define FEAT_FIVE_FANS          BIT(8)  /* Supports five fans */
 367 #define FEAT_VID                BIT(9)  /* Set if chip supports VID */
 368 #define FEAT_IN7_INTERNAL       BIT(10) /* Set if in7 is internal */
 369 #define FEAT_SIX_FANS           BIT(11) /* Supports six fans */
 370 #define FEAT_10_9MV_ADC         BIT(12)
 371 #define FEAT_AVCC3              BIT(13) /* Chip supports in9/AVCC3 */
 372 #define FEAT_FIVE_PWM           BIT(14) /* Chip supports 5 pwm chn */
 373 #define FEAT_SIX_PWM            BIT(15) /* Chip supports 6 pwm chn */
 374 #define FEAT_PWM_FREQ2          BIT(16) /* Separate pwm freq 2 */
 375 #define FEAT_SIX_TEMP           BIT(17) /* Up to 6 temp sensors */
 376 #define FEAT_VIN3_5V            BIT(18) /* VIN3 connected to +5V */
 377 #define FEAT_FOUR_FANS          BIT(19) /* Supports four fans */
 378 #define FEAT_FOUR_PWM           BIT(20) /* Supports four fan controls */
 379 #define FEAT_BANK_SEL           BIT(21) /* Chip has multi-bank support */
 380 #define FEAT_SCALING            BIT(22) /* Internal voltage scaling */
 381 #define FEAT_FANCTL_ONOFF       BIT(23) /* chip has FAN_CTL ON/OFF */
 382 #define FEAT_11MV_ADC           BIT(24)
 383 #define FEAT_NEW_TEMPMAP        BIT(25) /* new temp input selection */
 384 #define FEAT_MMIO               BIT(26) /* Chip supports MMIO */
 385 #define FEAT_FOUR_TEMP          BIT(27)
 386
 387 static const struct it87_devices it87_devices[] = {
 388         [it87] = {
 389                 .name = "it87",
 390                 .model = "IT87F",
 391                 .features = FEAT_OLD_AUTOPWM | FEAT_FANCTL_ONOFF,
 392                                                 /* may need to overwrite */
 393                 .num_temp_limit = 3,
 394                 .num_temp_offset = 0,
 395                 .num_temp_map = 3,
 396         },
 397         [it8712] = {
 398                 .name = "it8712",
 399                 .model = "IT8712F",
 400                 .features = FEAT_OLD_AUTOPWM | FEAT_VID | FEAT_FANCTL_ONOFF,
 401                                                 /* may need to overwrite */
 402                 .num_temp_limit = 3,
 403                 .num_temp_offset = 0,
 404                 .num_temp_map = 3,
 405         },
 406         [it8716] = {
 407                 .name = "it8716",
 408                 .model = "IT8716F",
 409                 .features = FEAT_16BIT_FANS | FEAT_VID
 410                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2
 411                   | FEAT_FANCTL_ONOFF,
 412                 .num_temp_limit = 3,
 413                 .num_temp_offset = 3,
 414                 .num_temp_map = 3,
 415         },
 416         [it8718] = {
 417                 .name = "it8718",
 418                 .model = "IT8718F",
 419                 .features = FEAT_16BIT_FANS | FEAT_VID
 420                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 421                   | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 422                 .num_temp_limit = 3,
 423                 .num_temp_offset = 3,
 424                 .num_temp_map = 3,
 425                 .old_peci_mask = 0x4,
 426         },
 427         [it8720] = {
 428                 .name = "it8720",
 429                 .model = "IT8720F",
 430                 .features = FEAT_16BIT_FANS | FEAT_VID
 431                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 432                   | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 433                 .num_temp_limit = 3,
 434                 .num_temp_offset = 3,
 435                 .num_temp_map = 3,
 436                 .old_peci_mask = 0x4,
 437         },
 438         [it8721] = {
 439                 .name = "it8721",
 440                 .model = "IT8721F",
 441                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 442                   | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 443                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL
 444                   | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF,
 445                 .num_temp_limit = 3,
 446                 .num_temp_offset = 3,
 447                 .num_temp_map = 3,
 448                 .peci_mask = 0x05,
 449                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 450         },
 451         [it8728] = {
 452                 .name = "it8728",
 453                 .model = "IT8728F",
 454                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 455                   | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 456                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_SCALING
 457                   | FEAT_FANCTL_ONOFF,
 458                 .num_temp_limit = 6,
 459                 .num_temp_offset = 3,
 460                 .num_temp_map = 3,
 461                 .peci_mask = 0x07,
 462         },
 463         [it8732] = {
 464                 .name = "it8732",
 465                 .model = "IT8732F",
 466                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 467                   | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 468                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_FOUR_FANS
 469                   | FEAT_FOUR_PWM | FEAT_FANCTL_ONOFF,
 470                 .num_temp_limit = 3,
 471                 .num_temp_offset = 3,
 472                 .num_temp_map = 3,
 473                 .peci_mask = 0x07,
 474                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 475         },
 476         [it8771] = {
 477                 .name = "it8771",
 478                 .model = "IT8771E",
 479                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 480                   | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 481                   | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF,
 482                                 /* PECI: guesswork */
 483                                 /* 12mV ADC (OHM) */
 484                                 /* 16 bit fans (OHM) */
 485                                 /* three fans, always 16 bit (guesswork) */
 486                 .num_temp_limit = 3,
 487                 .num_temp_offset = 3,
 488                 .num_temp_map = 3,
 489                 .peci_mask = 0x07,
 490         },
 491         [it8772] = {
 492                 .name = "it8772",
 493                 .model = "IT8772E",
 494                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 495                   | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 496                   | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF,
 497                                 /* PECI (coreboot) */
 498                                 /* 12mV ADC (HWSensors4, OHM) */
 499                                 /* 16 bit fans (HWSensors4, OHM) */
 500                                 /* three fans, always 16 bit (datasheet) */
 501                 .num_temp_limit = 3,
 502                 .num_temp_offset = 3,
 503                 .num_temp_map = 3,
 504                 .peci_mask = 0x07,
 505         },
 506         [it8781] = {
 507                 .name = "it8781",
 508                 .model = "IT8781F",
 509                 .features = FEAT_16BIT_FANS
 510                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
 511                   | FEAT_FANCTL_ONOFF,
 512                 .num_temp_limit = 3,
 513                 .num_temp_offset = 3,
 514                 .num_temp_map = 3,
 515                 .old_peci_mask = 0x4,
 516         },
 517         [it8782] = {
 518                 .name = "it8782",
 519                 .model = "IT8782F",
 520                 .features = FEAT_16BIT_FANS
 521                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
 522                   | FEAT_FANCTL_ONOFF,
 523                 .num_temp_limit = 3,
 524                 .num_temp_offset = 3,
 525                 .num_temp_map = 3,
 526                 .old_peci_mask = 0x4,
 527         },
 528         [it8783] = {
 529                 .name = "it8783",
 530                 .model = "IT8783E/F",
 531                 .features = FEAT_16BIT_FANS
 532                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
 533                   | FEAT_FANCTL_ONOFF,
 534                 .num_temp_limit = 3,
 535                 .num_temp_offset = 3,
 536                 .num_temp_map = 3,
 537                 .old_peci_mask = 0x4,
 538         },
 539         [it8786] = {
 540                 .name = "it8786",
 541                 .model = "IT8786E",
 542                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 543                   | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 544                   | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 545                 .num_temp_limit = 3,
 546                 .num_temp_offset = 3,
 547                 .num_temp_map = 3,
 548                 .peci_mask = 0x07,
 549         },
 550         [it8790] = {
 551                 .name = "it8790",
 552                 .model = "IT8790E",
 553                 .features = FEAT_NEWER_AUTOPWM | FEAT_10_9MV_ADC | FEAT_SCALING
 554                   | FEAT_16BIT_FANS | FEAT_TEMP_PECI
 555                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 556                 .num_temp_limit = 3,
 557                 .num_temp_offset = 3,
 558                 .num_temp_map = 3,
 559                 .peci_mask = 0x07,
 560         },
 561         [it8792] = {
 562                 .name = "it8792",
 563                 .model = "IT8792E/IT8795E",
 564                 .features = FEAT_NEWER_AUTOPWM | FEAT_10_9MV_ADC | FEAT_SCALING
 565                   | FEAT_16BIT_FANS | FEAT_TEMP_PECI
 566                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 567                 .num_temp_limit = 3,
 568                 .num_temp_offset = 3,
 569                 .num_temp_map = 3,
 570                 .peci_mask = 0x07,
 571         },
 572         [it8603] = {
 573                 .name = "it8603",
 574                 .model = "IT8603E",
 575                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 576                   | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 577                   | FEAT_AVCC3 | FEAT_PWM_FREQ2 | FEAT_SCALING,
 578                 .num_temp_limit = 3,
 579                 .num_temp_offset = 3,
 580                 .num_temp_map = 4,
 581                 .peci_mask = 0x07,
 582         },
 583         [it8606] = {
 584                 .name = "it8606",
 585                 .model = "IT8606E",
 586                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 587                   | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 588                   | FEAT_AVCC3 | FEAT_PWM_FREQ2 | FEAT_SCALING,
 589                 .num_temp_limit = 3,
 590                 .num_temp_offset = 3,
 591                 .num_temp_map = 3,
 592                 .peci_mask = 0x07,
 593         },
 594         [it8607] = {
 595                 .name = "it8607",
 596                 .model = "IT8607E",
 597                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 598                   | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL | FEAT_NEW_TEMPMAP
 599                   | FEAT_AVCC3 | FEAT_PWM_FREQ2 | FEAT_SCALING
 600                   | FEAT_FANCTL_ONOFF,
 601                 .num_temp_limit = 3,
 602                 .num_temp_offset = 3,
 603                 .num_temp_map = 6,
 604                 .peci_mask = 0x07,
 605         },
 606         [it8613] = {
 607                 .name = "it8613",
 608                 .model = "IT8613E",
 609                 .features = FEAT_NEWER_AUTOPWM | FEAT_11MV_ADC | FEAT_16BIT_FANS
 610                   | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 611                   | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
 612                   | FEAT_AVCC3 | FEAT_SCALING | FEAT_NEW_TEMPMAP,
 613                 .num_temp_limit = 6,
 614                 .num_temp_offset = 6,
 615                 .num_temp_map = 6,
 616                 .peci_mask = 0x07,
 617         },
 618         [it8620] = {
 619                 .name = "it8620",
 620                 .model = "IT8620E",
 621                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 622                   | FEAT_TEMP_PECI | FEAT_SIX_FANS
 623                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 624                   | FEAT_SIX_TEMP | FEAT_VIN3_5V | FEAT_SCALING
 625                   | FEAT_FANCTL_ONOFF,
 626                 .num_temp_limit = 3,
 627                 .num_temp_offset = 3,
 628                 .num_temp_map = 3,
 629                 .peci_mask = 0x07,
 630         },
 631         [it8622] = {
 632                 .name = "it8622",
 633                 .model = "IT8622E",
 634                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 635                   | FEAT_TEMP_PECI | FEAT_FIVE_FANS | FEAT_FOUR_TEMP
 636                   | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
 637                   | FEAT_AVCC3 | FEAT_VIN3_5V | FEAT_SCALING,
 638                 .num_temp_limit = 3,
 639                 .num_temp_offset = 3,
 640                 .num_temp_map = 4,
 641                 .peci_mask = 0x0f,
 642                 .smbus_bitmap = BIT(1) | BIT(2),
 643         },
 644         [it8625] = {
 645                 .name = "it8625",
 646                 .model = "IT8625E",
 647                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 648                   | FEAT_AVCC3 | FEAT_NEW_TEMPMAP
 649                   | FEAT_11MV_ADC | FEAT_IN7_INTERNAL | FEAT_SIX_FANS
 650                   | FEAT_SIX_PWM | FEAT_BANK_SEL | FEAT_SCALING,
 651                 .num_temp_limit = 6,
 652                 .num_temp_offset = 6,
 653                 .num_temp_map = 6,
 654                 .smbus_bitmap = BIT(1) | BIT(2),
 655         },
 656         [it8628] = {
 657                 .name = "it8628",
 658                 .model = "IT8628E",
 659                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 660                   | FEAT_TEMP_PECI | FEAT_SIX_FANS
 661                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 662                   | FEAT_SIX_TEMP | FEAT_SCALING | FEAT_AVCC3
 663                   | FEAT_FANCTL_ONOFF,
 664                 .num_temp_limit = 6,
 665                 .num_temp_offset = 3,
 666                 .num_temp_map = 3,
 667                 .peci_mask = 0x07,
 668         },
 669         [it8655] = {
 670                 .name = "it8655",
 671                 .model = "IT8655E",
 672                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 673                   | FEAT_AVCC3 | FEAT_NEW_TEMPMAP | FEAT_SCALING
 674                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_BANK_SEL
 675                   | FEAT_MMIO,
 676                 .num_temp_limit = 6,
 677                 .num_temp_offset = 6,
 678                 .num_temp_map = 6,
 679                 .smbus_bitmap = BIT(2),
 680         },
 681         [it8665] = {
 682                 .name = "it8665",
 683                 .model = "IT8665E",
 684                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 685                   | FEAT_AVCC3 | FEAT_NEW_TEMPMAP | FEAT_SCALING
 686                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_SIX_FANS
 687                   | FEAT_SIX_PWM | FEAT_BANK_SEL | FEAT_MMIO,
 688                 .num_temp_limit = 6,
 689                 .num_temp_offset = 6,
 690                 .num_temp_map = 6,
 691                 .smbus_bitmap = BIT(2),
 692         },
 693         [it8686] = {
 694                 .name = "it8686",
 695                 .model = "IT8686E",
 696                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 697                   | FEAT_SIX_FANS | FEAT_NEW_TEMPMAP
 698                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 699                   | FEAT_SIX_TEMP | FEAT_BANK_SEL | FEAT_SCALING | FEAT_AVCC3,
 700                 .num_temp_limit = 6,
 701                 .num_temp_offset = 6,
 702                 .num_temp_map = 7,
 703                 .smbus_bitmap = BIT(1) | BIT(2),
 704         },
 705 };
 706
 707 #define has_16bit_fans(data)    ((data)->features & FEAT_16BIT_FANS)
 708 #define has_12mv_adc(data)      ((data)->features & FEAT_12MV_ADC)
 709 #define has_10_9mv_adc(data)    ((data)->features & FEAT_10_9MV_ADC)
 710 #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
 711 #define has_old_autopwm(data)   ((data)->features & FEAT_OLD_AUTOPWM)
 712 #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \
 713                                  ((data)->peci_mask & BIT(nr)))
 714 #define has_temp_old_peci(data, nr) \
 715                                 (((data)->features & FEAT_TEMP_OLD_PECI) && \
 716                                  ((data)->old_peci_mask & BIT(nr)))
 717 #define has_fan16_config(data)  ((data)->features & FEAT_FAN16_CONFIG)
 718 #define has_five_fans(data)     ((data)->features & (FEAT_FIVE_FANS | \
 719                                                      FEAT_SIX_FANS))
 720 #define has_vid(data)           ((data)->features & FEAT_VID)
 721 #define has_in7_internal(data)  ((data)->features & FEAT_IN7_INTERNAL)
 722 #define has_six_fans(data)      ((data)->features & FEAT_SIX_FANS)
 723 #define has_avcc3(data)         ((data)->features & FEAT_AVCC3)
 724 #define has_five_pwm(data)      ((data)->features & (FEAT_FIVE_PWM \
 725                                                      | FEAT_SIX_PWM))
 726 #define has_six_pwm(data)       ((data)->features & FEAT_SIX_PWM)
 727 #define has_pwm_freq2(data)     ((data)->features & FEAT_PWM_FREQ2)
 728 #define has_six_temp(data)      ((data)->features & FEAT_SIX_TEMP)
 729 #define has_vin3_5v(data)       ((data)->features & FEAT_VIN3_5V)
 730 #define has_four_fans(data)     ((data)->features & (FEAT_FOUR_FANS | \
 731                                                      FEAT_FIVE_FANS | \
 732                                                      FEAT_SIX_FANS))
 733 #define has_four_pwm(data)      ((data)->features & (FEAT_FOUR_PWM | \
 734                                                      FEAT_FIVE_PWM \
 735                                                      | FEAT_SIX_PWM))
 736 #define has_bank_sel(data)      ((data)->features & FEAT_BANK_SEL)
 737 #define has_scaling(data)       ((data)->features & FEAT_SCALING)
 738 #define has_fanctl_onoff(data)  ((data)->features & FEAT_FANCTL_ONOFF)
 739 #define has_11mv_adc(data)      ((data)->features & FEAT_11MV_ADC)
 740 #define has_new_tempmap(data)   ((data)->features & FEAT_NEW_TEMPMAP)
 741 #define has_mmio(data)          ((data)->features & FEAT_MMIO)
 742 #define has_four_temp(data)     ((data)->features & FEAT_FOUR_TEMP)
 743
 744 struct it87_sio_data {
 745         enum chips type;
 746         u8 sioaddr;
 747         u8 doexit;
 748         /* Values read from Super-I/O config space */
 749         u8 revision;
 750         u8 vid_value;
 751         u8 beep_pin;
 752         u8 internal;    /* Internal sensors can be labeled */
 753         /* Features skipped based on config or DMI */
 754         u16 skip_in;
 755         u8 skip_vid;
 756         u8 skip_fan;
 757         u8 skip_pwm;
 758         u8 skip_temp;
 759         u8 smbus_bitmap;
 760         u8 ec_special_config;
 761 };
 762
 763 /*
 764  * For each registered chip, we need to keep some data in memory.
 765  * The structure is dynamically allocated.
 766  */
 767 struct it87_data {
 768         const struct attribute_group *groups[7];
 769         enum chips type;
 770         u32 features;
 771         u8 peci_mask;
 772         u8 old_peci_mask;
 773
 774         u8 smbus_bitmap;        /* !=0 if SMBus needs to be disabled */
 775         u8 saved_bank;          /* saved bank register value */
 776         u8 ec_special_config;   /* EC special config register restore value */
 777         u8 sioaddr;             /* SIO port address */
 778         bool doexit;            /* true if exit from sio config is ok */
 779
 780         void __iomem *mmio;     /* Remapped MMIO address if available */
 781         int (*read)(struct it87_data *, u16);
 782         void (*write)(struct it87_data *, u16, u8);
 783
 784         const u8 *REG_FAN;
 785         const u8 *REG_FANX;
 786         const u8 *REG_FAN_MIN;
 787         const u8 *REG_FANX_MIN;
 788
 789         const u8 *REG_PWM;
 790
 791         const u8 *REG_TEMP_OFFSET;
 792         const u8 *REG_TEMP_LOW;
 793         const u8 *REG_TEMP_HIGH;
 794
 795         unsigned short addr;
 796         struct mutex update_lock;
 797         char valid;             /* !=0 if following fields are valid */
 798         unsigned long last_updated;     /* In jiffies */
 799
 800         u16 in_scaled;          /* Internal voltage sensors are scaled */
 801         u16 in_internal;        /* Bitfield, internal sensors (for labels) */
 802         u16 has_in;             /* Bitfield, voltage sensors enabled */
 803         u8 in[NUM_VIN][3];              /* [nr][0]=in, [1]=min, [2]=max */
 804         u8 has_fan;             /* Bitfield, fans enabled */
 805         u16 fan[NUM_FAN][2];    /* Register values, [nr][0]=fan, [1]=min */
 806         u8 has_temp;            /* Bitfield, temp sensors enabled */
 807         s8 temp[NUM_TEMP][4];   /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
 808         u8 num_temp_limit;      /* Number of temperature limit registers */
 809         u8 num_temp_offset;     /* Number of temperature offset registers */
 810         u8 temp_src[4];         /* Up to 4 temperature source registers */
 811         u8 sensor;              /* Register value (IT87_REG_TEMP_ENABLE) */
 812         u8 extra;               /* Register value (IT87_REG_TEMP_EXTRA) */
 813         u8 fan_div[NUM_FAN_DIV];/* Register encoding, shifted right */
 814         bool has_vid;           /* True if VID supported */
 815         u8 vid;                 /* Register encoding, combined */
 816         u8 vrm;
 817         u32 alarms;             /* Register encoding, combined */
 818         bool has_beep;          /* true if beep supported */
 819         u8 beeps;               /* Register encoding */
 820         u8 fan_main_ctrl;       /* Register value */
 821         u8 fan_ctl;             /* Register value */
 822
 823         /*
 824          * The following 3 arrays correspond to the same registers up to
 825          * the IT8720F. The meaning of bits 6-0 depends on the value of bit
 826          * 7, and we want to preserve settings on mode changes, so we have
 827          * to track all values separately.
 828          * Starting with the IT8721F, the manual PWM duty cycles are stored
 829          * in separate registers (8-bit values), so the separate tracking
 830          * is no longer needed, but it is still done to keep the driver
 831          * simple.
 832          */
 833         u8 has_pwm;             /* Bitfield, pwm control enabled */
 834         u8 pwm_ctrl[NUM_PWM];   /* Register value */
 835         u8 pwm_duty[NUM_PWM];   /* Manual PWM value set by user */
 836         u8 pwm_temp_map[NUM_PWM];/* PWM to temp. chan. mapping (bits 1-0) */
 837         u8 pwm_temp_map_mask;   /* 0x03 for old, 0x07 for new temp map */
 838         u8 pwm_temp_map_shift;  /* 0 for old, 3 for new temp map */
 839         u8 pwm_num_temp_map;    /* from config data, 3..7 depending on chip */
 840
 841         /* Automatic fan speed control registers */
 842         u8 auto_pwm[NUM_AUTO_PWM][4];   /* [nr][3] is hard-coded */
 843         s8 auto_temp[NUM_AUTO_PWM][5];  /* [nr][0] is point1_temp_hyst */
 844 };
 845
 846 static int adc_lsb(const struct it87_data *data, int nr)
 847 {
 848         int lsb;
 849
 850         if (has_12mv_adc(data))
 851                 lsb = 120;
 852         else if (has_10_9mv_adc(data))
 853                 lsb = 109;
 854         else if (has_11mv_adc(data))
 855                 lsb = 110;
 856         else
 857                 lsb = 160;
 858         if (data->in_scaled & BIT(nr))
 859                 lsb <<= 1;
 860         return lsb;
 861 }
 862
 863 static u8 in_to_reg(const struct it87_data *data, int nr, long val)
 864 {
 865         val = DIV_ROUND_CLOSEST(val * 10, adc_lsb(data, nr));
 866         return clamp_val(val, 0, 255);
 867 }
 868
 869 static int in_from_reg(const struct it87_data *data, int nr, int val)
 870 {
 871         return DIV_ROUND_CLOSEST(val * adc_lsb(data, nr), 10);
 872 }
 873
 874 static inline u8 FAN_TO_REG(long rpm, int div)
 875 {
 876         if (rpm == 0)
 877                 return 255;
 878         rpm = clamp_val(rpm, 1, 1000000);
 879         return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
 880 }
 881
 882 static inline u16 FAN16_TO_REG(long rpm)
 883 {
 884         if (rpm == 0)
 885                 return 0xffff;
 886         return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
 887 }
 888
 889 #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
 890                                 1350000 / ((val) * (div)))
 891 /* The divider is fixed to 2 in 16-bit mode */
 892 #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
 893                              1350000 / ((val) * 2))
 894
 895 #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \
 896                                     ((val) + 500) / 1000), -128, 127))
 897 #define TEMP_FROM_REG(val) ((val) * 1000)
 898
 899 static u8 pwm_to_reg(const struct it87_data *data, long val)
 900 {
 901         if (has_newer_autopwm(data))
 902                 return val;
 903         else
 904                 return val >> 1;
 905 }
 906
 907 static int pwm_from_reg(const struct it87_data *data, u8 reg)
 908 {
 909         if (has_newer_autopwm(data))
 910                 return reg;
 911         else
 912                 return (reg & 0x7f) << 1;
 913 }
 914
 915 static int DIV_TO_REG(int val)
 916 {
 917         int answer = 0;
 918
 919         while (answer < 7 && (val >>= 1))
 920                 answer++;
 921         return answer;
 922 }
 923
 924 #define DIV_FROM_REG(val) BIT(val)
 925
 926 static u8 temp_map_from_reg(const struct it87_data *data, u8 reg)
 927 {
 928         u8 map;
 929
 930         map  = (reg >> data->pwm_temp_map_shift) & data->pwm_temp_map_mask;
 931         if (map >= data->pwm_num_temp_map)      /* map is 0-based */
 932                 map = 0;
 933
 934         return map;
 935 }
 936
 937 static u8 temp_map_to_reg(const struct it87_data *data, int nr, u8 map)
 938 {
 939         u8 ctrl = data->pwm_ctrl[nr];
 940
 941         return (ctrl & ~(data->pwm_temp_map_mask << data->pwm_temp_map_shift)) |
 942                (map << data->pwm_temp_map_shift);
 943 }
 944
 945 /*
 946  * PWM base frequencies. The frequency has to be divided by either 128 or 256,
 947  * depending on the chip type, to calculate the actual PWM frequency.
 948  *
 949  * Some of the chip datasheets suggest a base frequency of 51 kHz instead
 950  * of 750 kHz for the slowest base frequency, resulting in a PWM frequency
 951  * of 200 Hz. Sometimes both PWM frequency select registers are affected,
 952  * sometimes just one. It is unknown if this is a datasheet error or real,
 953  * so this is ignored for now.
 954  */
 955 static const unsigned int pwm_freq[8] = {
 956         48000000,
 957         24000000,
 958         12000000,
 959         8000000,
 960         6000000,
 961         3000000,
 962         1500000,
 963         750000,
 964 };
 965
 966 static int _it87_io_read(struct it87_data *data, u16 reg)
 967 {
 968         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 969         return inb_p(data->addr + IT87_DATA_REG_OFFSET);
 970 }
 971
 972 static void _it87_io_write(struct it87_data *data, u16 reg, u8 value)
 973 {
 974         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 975         outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
 976 }
 977
 978 static int smbus_disable(struct it87_data *data)
 979 {
 980         int err;
 981
 982         if (data->smbus_bitmap) {
 983                 err = superio_enter(data->sioaddr);
 984                 if (err)
 985                         return err;
 986                 superio_select(data->sioaddr, PME);
 987                 superio_outb(data->sioaddr, IT87_SPECIAL_CFG_REG,
 988                              data->ec_special_config & ~data->smbus_bitmap);
 989                 superio_exit(data->sioaddr, data->doexit);
 990                 if (has_bank_sel(data) && !data->mmio)
 991                         data->saved_bank = _it87_io_read(data, IT87_REG_BANK);
 992         }
 993         return 0;
 994 }
 995
 996 static int smbus_enable(struct it87_data *data)
 997 {
 998         int err;
 999
1000         if (data->smbus_bitmap) {
1001                 if (has_bank_sel(data) && !data->mmio)
1002                         _it87_io_write(data, IT87_REG_BANK, data->saved_bank);
1003                 err = superio_enter(data->sioaddr);
1004                 if (err)
1005                         return err;
1006
1007                 superio_select(data->sioaddr, PME);
1008                 superio_outb(data->sioaddr, IT87_SPECIAL_CFG_REG,
1009                              data->ec_special_config);
1010                 superio_exit(data->sioaddr, data->doexit);
1011         }
1012         return 0;
1013 }
1014
1015 static u8 it87_io_set_bank(struct it87_data *data, u8 bank)
1016 {
1017         u8 _bank = bank;
1018
1019         if (has_bank_sel(data)) {
1020                 u8 breg = _it87_io_read(data, IT87_REG_BANK);
1021
1022                 _bank = breg >> 5;
1023                 if (bank != _bank) {
1024                         breg &= 0x1f;
1025                         breg |= (bank << 5);
1026                         _it87_io_write(data, IT87_REG_BANK, breg);
1027                 }
1028         }
1029         return _bank;
1030 }
1031
1032 /*
1033  * Must be called with data->update_lock held, except during initialization.
1034  * Must be called with SMBus accesses disabled.
1035  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
1036  * would slow down the IT87 access and should not be necessary.
1037  */
1038 static int it87_io_read(struct it87_data *data, u16 reg)
1039 {
1040         u8 bank;
1041         int val;
1042
1043         bank = it87_io_set_bank(data, reg >> 8);
1044         val = _it87_io_read(data, reg & 0xff);
1045         it87_io_set_bank(data, bank);
1046
1047         return val;
1048 }
1049
1050 /*
1051  * Must be called with data->update_lock held, except during initialization.
1052  * Must be called with SMBus accesses disabled
1053  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
1054  * would slow down the IT87 access and should not be necessary.
1055  */
1056 static void it87_io_write(struct it87_data *data, u16 reg, u8 value)
1057 {
1058         u8 bank;
1059
1060         bank = it87_io_set_bank(data, reg >> 8);
1061         _it87_io_write(data, reg & 0xff, value);
1062         it87_io_set_bank(data, bank);
1063 }
1064
1065 static int it87_mmio_read(struct it87_data *data, u16 reg)
1066 {
1067         return readb(data->mmio + reg);
1068 }
1069
1070 static void it87_mmio_write(struct it87_data *data, u16 reg, u8 value)
1071 {
1072         writeb(value, data->mmio + reg);
1073 }
1074
1075 static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
1076 {
1077         u8 ctrl;
1078
1079         ctrl = data->read(data, data->REG_PWM[nr]);
1080         data->pwm_ctrl[nr] = ctrl;
1081         if (has_newer_autopwm(data)) {
1082                 data->pwm_temp_map[nr] = temp_map_from_reg(data, ctrl);
1083                 data->pwm_duty[nr] = data->read(data, IT87_REG_PWM_DUTY[nr]);
1084         } else {
1085                 if (ctrl & 0x80)        /* Automatic mode */
1086                         data->pwm_temp_map[nr] = temp_map_from_reg(data, ctrl);
1087                 else                            /* Manual mode */
1088                         data->pwm_duty[nr] = ctrl & 0x7f;
1089         }
1090
1091         if (has_old_autopwm(data)) {
1092                 int i;
1093
1094                 for (i = 0; i < 5 ; i++)
1095                         data->auto_temp[nr][i] = data->read(data,
1096                                                 IT87_REG_AUTO_TEMP(nr, i));
1097                 for (i = 0; i < 3 ; i++)
1098                         data->auto_pwm[nr][i] = data->read(data,
1099                                                 IT87_REG_AUTO_PWM(nr, i));
1100         } else if (has_newer_autopwm(data)) {
1101                 int i;
1102
1103                 /*
1104                  * 0: temperature hysteresis (base + 5)
1105                  * 1: fan off temperature (base + 0)
1106                  * 2: fan start temperature (base + 1)
1107                  * 3: fan max temperature (base + 2)
1108                  */
1109                 data->auto_temp[nr][0] =
1110                         data->read(data, IT87_REG_AUTO_TEMP(nr, 5));
1111
1112                 for (i = 0; i < 3 ; i++)
1113                         data->auto_temp[nr][i + 1] =
1114                                 data->read(data, IT87_REG_AUTO_TEMP(nr, i));
1115                 /*
1116                  * 0: start pwm value (base + 3)
1117                  * 1: pwm slope (base + 4, 1/8th pwm)
1118                  */
1119                 data->auto_pwm[nr][0] =
1120                         data->read(data, IT87_REG_AUTO_TEMP(nr, 3));
1121                 data->auto_pwm[nr][1] =
1122                         data->read(data, IT87_REG_AUTO_TEMP(nr, 4));
1123         }
1124 }
1125
1126 static int it87_lock(struct it87_data *data)
1127 {
1128         int err;
1129
1130         mutex_lock(&data->update_lock);
1131         err = smbus_disable(data);
1132         if (err)
1133                 mutex_unlock(&data->update_lock);
1134         return err;
1135 }
1136
1137 static void it87_unlock(struct it87_data *data)
1138 {
1139         smbus_enable(data);
1140         mutex_unlock(&data->update_lock);
1141 }
1142
1143 static struct it87_data *it87_update_device(struct device *dev)
1144 {
1145         struct it87_data *data = dev_get_drvdata(dev);
1146         struct it87_data *ret = data;
1147         int err;
1148         int i;
1149
1150         mutex_lock(&data->update_lock);
1151
1152         if (time_after(jiffies, data->last_updated + HZ + HZ / 2) ||
1153             !data->valid) {
1154                 err = smbus_disable(data);
1155                 if (err) {
1156                         ret = ERR_PTR(err);
1157                         goto unlock;
1158                 }
1159                 if (update_vbat) {
1160                         /*
1161                          * Cleared after each update, so reenable.  Value
1162                          * returned by this read will be previous value
1163                          */
1164                         data->write(data, IT87_REG_CONFIG,
1165                                     data->read(data, IT87_REG_CONFIG) | 0x40);
1166                 }
1167                 for (i = 0; i < NUM_VIN; i++) {
1168                         if (!(data->has_in & BIT(i)))
1169                                 continue;
1170
1171                         data->in[i][0] = data->read(data, IT87_REG_VIN[i]);
1172
1173                         /* VBAT and AVCC don't have limit registers */
1174                         if (i >= NUM_VIN_LIMIT)
1175                                 continue;
1176
1177                         data->in[i][1] = data->read(data, IT87_REG_VIN_MIN(i));
1178                         data->in[i][2] = data->read(data, IT87_REG_VIN_MAX(i));
1179                 }
1180
1181                 for (i = 0; i < NUM_FAN; i++) {
1182                         /* Skip disabled fans */
1183                         if (!(data->has_fan & BIT(i)))
1184                                 continue;
1185
1186                         data->fan[i][1] = data->read(data,
1187                                                      data->REG_FAN_MIN[i]);
1188                         data->fan[i][0] = data->read(data, data->REG_FAN[i]);
1189                         /* Add high byte if in 16-bit mode */
1190                         if (has_16bit_fans(data)) {
1191                                 data->fan[i][0] |= data->read(data,
1192                                                 data->REG_FANX[i]) << 8;
1193                                 data->fan[i][1] |= data->read(data,
1194                                                 data->REG_FANX_MIN[i]) << 8;
1195                         }
1196                 }
1197                 for (i = 0; i < NUM_TEMP; i++) {
1198                         if (!(data->has_temp & BIT(i)))
1199                                 continue;
1200                         data->temp[i][0] =
1201                                 data->read(data, IT87_REG_TEMP(i));
1202
1203                         if (i >= data->num_temp_limit)
1204                                 continue;
1205
1206                         if (i < data->num_temp_offset)
1207                                 data->temp[i][3] =
1208                                   data->read(data, data->REG_TEMP_OFFSET[i]);
1209
1210                         data->temp[i][1] =
1211                                 data->read(data, data->REG_TEMP_LOW[i]);
1212                         data->temp[i][2] =
1213                                 data->read(data, data->REG_TEMP_HIGH[i]);
1214                 }
1215
1216                 /* Newer chips don't have clock dividers */
1217                 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
1218                         i = data->read(data, IT87_REG_FAN_DIV);
1219                         data->fan_div[0] = i & 0x07;
1220                         data->fan_div[1] = (i >> 3) & 0x07;
1221                         data->fan_div[2] = (i & 0x40) ? 3 : 1;
1222                 }
1223
1224                 data->alarms =
1225                         data->read(data, IT87_REG_ALARM1) |
1226                         (data->read(data, IT87_REG_ALARM2) << 8) |
1227                         (data->read(data, IT87_REG_ALARM3) << 16);
1228                 data->beeps = data->read(data, IT87_REG_BEEP_ENABLE);
1229
1230                 data->fan_main_ctrl = data->read(data, IT87_REG_FAN_MAIN_CTRL);
1231                 data->fan_ctl = data->read(data, IT87_REG_FAN_CTL);
1232                 for (i = 0; i < NUM_PWM; i++) {
1233                         if (!(data->has_pwm & BIT(i)))
1234                                 continue;
1235                         it87_update_pwm_ctrl(data, i);
1236                 }
1237
1238                 data->sensor = data->read(data, IT87_REG_TEMP_ENABLE);
1239                 data->extra = data->read(data, IT87_REG_TEMP_EXTRA);
1240                 /*
1241                  * The IT8705F does not have VID capability.
1242                  * The IT8718F and later don't use IT87_REG_VID for the
1243                  * same purpose.
1244                  */
1245                 if (data->type == it8712 || data->type == it8716) {
1246                         data->vid = data->read(data, IT87_REG_VID);
1247                         /*
1248                          * The older IT8712F revisions had only 5 VID pins,
1249                          * but we assume it is always safe to read 6 bits.
1250                          */
1251                         data->vid &= 0x3f;
1252                 }
1253                 data->last_updated = jiffies;
1254                 data->valid = 1;
1255                 smbus_enable(data);
1256         }
1257 unlock:
1258         mutex_unlock(&data->update_lock);
1259         return ret;
1260 }
1261
1262 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
1263                        char *buf)
1264 {
1265         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1266         struct it87_data *data = it87_update_device(dev);
1267         int index = sattr->index;
1268         int nr = sattr->nr;
1269
1270         if (IS_ERR(data))
1271                 return PTR_ERR(data);
1272
1273         return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
1274 }
1275
1276 static ssize_t set_in(struct device *dev, struct device_attribute *attr,
1277                       const char *buf, size_t count)
1278 {
1279         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1280         struct it87_data *data = dev_get_drvdata(dev);
1281         int index = sattr->index;
1282         int nr = sattr->nr;
1283         unsigned long val;
1284         int err;
1285
1286         if (kstrtoul(buf, 10, &val) < 0)
1287                 return -EINVAL;
1288
1289         err = it87_lock(data);
1290         if (err)
1291                 return err;
1292
1293         data->in[nr][index] = in_to_reg(data, nr, val);
1294         data->write(data, index == 1 ? IT87_REG_VIN_MIN(nr)
1295                                      : IT87_REG_VIN_MAX(nr),
1296                     data->in[nr][index]);
1297         it87_unlock(data);
1298         return count;
1299 }
1300
1301 static SENSOR_DEVICE_ATTR_2(in0_input, 0444, show_in, NULL, 0, 0);
1302 static SENSOR_DEVICE_ATTR_2(in0_min, 0644, show_in, set_in, 0, 1);
1303 static SENSOR_DEVICE_ATTR_2(in0_max, 0644, show_in, set_in, 0, 2);
1304
1305 static SENSOR_DEVICE_ATTR_2(in1_input, 0444, show_in, NULL, 1, 0);
1306 static SENSOR_DEVICE_ATTR_2(in1_min, 0644, show_in, set_in, 1, 1);
1307 static SENSOR_DEVICE_ATTR_2(in1_max, 0644, show_in, set_in, 1, 2);
1308
1309 static SENSOR_DEVICE_ATTR_2(in2_input, 0444, show_in, NULL, 2, 0);
1310 static SENSOR_DEVICE_ATTR_2(in2_min, 0644, show_in, set_in, 2, 1);
1311 static SENSOR_DEVICE_ATTR_2(in2_max, 0644, show_in, set_in, 2, 2);
1312
1313 static SENSOR_DEVICE_ATTR_2(in3_input, 0444, show_in, NULL, 3, 0);
1314 static SENSOR_DEVICE_ATTR_2(in3_min, 0644, show_in, set_in, 3, 1);
1315 static SENSOR_DEVICE_ATTR_2(in3_max, 0644, show_in, set_in, 3, 2);
1316
1317 static SENSOR_DEVICE_ATTR_2(in4_input, 0444, show_in, NULL, 4, 0);
1318 static SENSOR_DEVICE_ATTR_2(in4_min, 0644, show_in, set_in, 4, 1);
1319 static SENSOR_DEVICE_ATTR_2(in4_max, 0644, show_in, set_in, 4, 2);
1320
1321 static SENSOR_DEVICE_ATTR_2(in5_input, 0444, show_in, NULL, 5, 0);
1322 static SENSOR_DEVICE_ATTR_2(in5_min, 0644, show_in, set_in, 5, 1);
1323 static SENSOR_DEVICE_ATTR_2(in5_max, 0644, show_in, set_in, 5, 2);
1324
1325 static SENSOR_DEVICE_ATTR_2(in6_input, 0444, show_in, NULL, 6, 0);
1326 static SENSOR_DEVICE_ATTR_2(in6_min, 0644, show_in, set_in, 6, 1);
1327 static SENSOR_DEVICE_ATTR_2(in6_max, 0644, show_in, set_in, 6, 2);
1328
1329 static SENSOR_DEVICE_ATTR_2(in7_input, 0444, show_in, NULL, 7, 0);
1330 static SENSOR_DEVICE_ATTR_2(in7_min, 0644, show_in, set_in, 7, 1);
1331 static SENSOR_DEVICE_ATTR_2(in7_max, 0644, show_in, set_in, 7, 2);
1332
1333 static SENSOR_DEVICE_ATTR_2(in8_input, 0444, show_in, NULL, 8, 0);
1334 static SENSOR_DEVICE_ATTR_2(in9_input, 0444, show_in, NULL, 9, 0);
1335 static SENSOR_DEVICE_ATTR_2(in10_input, 0444, show_in, NULL, 10, 0);
1336 static SENSOR_DEVICE_ATTR_2(in11_input, 0444, show_in, NULL, 11, 0);
1337 static SENSOR_DEVICE_ATTR_2(in12_input, 0444, show_in, NULL, 12, 0);
1338
1339 /* Up to 6 temperatures */
1340 static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
1341                          char *buf)
1342 {
1343         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1344         int nr = sattr->nr;
1345         int index = sattr->index;
1346         struct it87_data *data = it87_update_device(dev);
1347
1348         if (IS_ERR(data))
1349                 return PTR_ERR(data);
1350
1351         return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
1352 }
1353
1354 static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
1355                         const char *buf, size_t count)
1356 {
1357         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1358         int nr = sattr->nr;
1359         int index = sattr->index;
1360         struct it87_data *data = dev_get_drvdata(dev);
1361         long val;
1362         u8 reg, regval;
1363         int err;
1364
1365         if (kstrtol(buf, 10, &val) < 0)
1366                 return -EINVAL;
1367
1368         err = it87_lock(data);
1369         if (err)
1370                 return err;
1371
1372         switch (index) {
1373         default:
1374         case 1:
1375                 reg = data->REG_TEMP_LOW[nr];
1376                 break;
1377         case 2:
1378                 reg = data->REG_TEMP_HIGH[nr];
1379                 break;
1380         case 3:
1381                 regval = data->read(data, IT87_REG_BEEP_ENABLE);
1382                 if (!(regval & 0x80)) {
1383                         regval |= 0x80;
1384                         data->write(data, IT87_REG_BEEP_ENABLE, regval);
1385                 }
1386                 data->valid = 0;
1387                 reg = data->REG_TEMP_OFFSET[nr];
1388                 break;
1389         }
1390
1391         data->temp[nr][index] = TEMP_TO_REG(val);
1392         data->write(data, reg, data->temp[nr][index]);
1393         it87_unlock(data);
1394         return count;
1395 }
1396
1397 static SENSOR_DEVICE_ATTR_2(temp1_input, 0444, show_temp, NULL, 0, 0);
1398 static SENSOR_DEVICE_ATTR_2(temp1_min, 0644, show_temp, set_temp, 0, 1);
1399 static SENSOR_DEVICE_ATTR_2(temp1_max, 0644, show_temp, set_temp, 0, 2);
1400 static SENSOR_DEVICE_ATTR_2(temp1_offset, 0644, show_temp, set_temp, 0, 3);
1401 static SENSOR_DEVICE_ATTR_2(temp2_input, 0444, show_temp, NULL, 1, 0);
1402 static SENSOR_DEVICE_ATTR_2(temp2_min, 0644, show_temp, set_temp, 1, 1);
1403 static SENSOR_DEVICE_ATTR_2(temp2_max, 0644, show_temp, set_temp, 1, 2);
1404 static SENSOR_DEVICE_ATTR_2(temp2_offset, 0644, show_temp, set_temp, 1, 3);
1405 static SENSOR_DEVICE_ATTR_2(temp3_input, 0444, show_temp, NULL, 2, 0);
1406 static SENSOR_DEVICE_ATTR_2(temp3_min, 0644, show_temp, set_temp, 2, 1);
1407 static SENSOR_DEVICE_ATTR_2(temp3_max, 0644, show_temp, set_temp, 2, 2);
1408 static SENSOR_DEVICE_ATTR_2(temp3_offset, 0644, show_temp, set_temp, 2, 3);
1409 static SENSOR_DEVICE_ATTR_2(temp4_input, 0444, show_temp, NULL, 3, 0);
1410 static SENSOR_DEVICE_ATTR_2(temp4_min, 0644, show_temp, set_temp, 3, 1);
1411 static SENSOR_DEVICE_ATTR_2(temp4_max, 0644, show_temp, set_temp, 3, 2);
1412 static SENSOR_DEVICE_ATTR_2(temp4_offset, 0644, show_temp, set_temp, 3, 3);
1413 static SENSOR_DEVICE_ATTR_2(temp5_input, 0444, show_temp, NULL, 4, 0);
1414 static SENSOR_DEVICE_ATTR_2(temp5_min, 0644, show_temp, set_temp, 4, 1);
1415 static SENSOR_DEVICE_ATTR_2(temp5_max, 0644, show_temp, set_temp, 4, 2);
1416 static SENSOR_DEVICE_ATTR_2(temp5_offset, 0644, show_temp, set_temp, 4, 3);
1417 static SENSOR_DEVICE_ATTR_2(temp6_input, 0444, show_temp, NULL, 5, 0);
1418 static SENSOR_DEVICE_ATTR_2(temp6_min, 0644, show_temp, set_temp, 5, 1);
1419 static SENSOR_DEVICE_ATTR_2(temp6_max, 0644, show_temp, set_temp, 5, 2);
1420 static SENSOR_DEVICE_ATTR_2(temp6_offset, 0644, show_temp, set_temp, 5, 3);
1421
1422 static const u8 temp_types_8686[NUM_TEMP][9] = {
1423         { 0, 8, 8, 8, 8, 8, 8, 8, 7 },
1424         { 0, 6, 8, 8, 6, 0, 0, 0, 7 },
1425         { 0, 6, 5, 8, 6, 0, 0, 0, 7 },
1426         { 4, 8, 8, 8, 8, 8, 8, 8, 7 },
1427         { 4, 6, 8, 8, 6, 0, 0, 0, 7 },
1428         { 4, 6, 5, 8, 6, 0, 0, 0, 7 },
1429 };
1430
1431 static int get_temp_type(struct it87_data *data, int index)
1432 {
1433         u8 reg, extra;
1434         int ttype, type = 0;
1435
1436         if (has_bank_sel(data)) {
1437                 u8 src1, src2;
1438
1439                 src1 = (data->temp_src[index / 2] >> ((index % 2) * 4)) & 0x0f;
1440
1441                 switch (data->type) {
1442                 case it8686:
1443                         if (src1 < 9)
1444                                 type = temp_types_8686[index][src1];
1445                         break;
1446                 case it8625:
1447                         if (index < 3)
1448                                 break;
1449                 case it8655:
1450                 case it8665:
1451                         if (src1 < 3) {
1452                                 index = src1;
1453                                 break;
1454                         }
1455                         src2 = data->temp_src[3];
1456                         switch (src1) {
1457                         case 3:
1458                                 type = (src2 & BIT(index)) ? 6 : 5;
1459                                 break;
1460                         case 4 ... 8:
1461                                 type = (src2 & BIT(index)) ? 4 : 6;
1462                                 break;
1463                         case 9:
1464                                 type = (src2 & BIT(index)) ? 5 : 0;
1465                                 break;
1466                         default:
1467                                 break;
1468                         }
1469                         return type;
1470                 default:
1471                         return 0;
1472                 }
1473         }
1474         if (type)
1475                 return type;
1476
1477         /* Dectect PECI vs. AMDTSI */
1478         ttype = 6;
1479         if ((has_temp_peci(data, index)) || data->type == it8721 ||
1480             data->type == it8720) {
1481                 extra = data->read(data, IT87_REG_IFSEL);
1482                 if ((extra & 0x70) == 0x40)
1483                         ttype = 5;
1484         }
1485
1486         reg = data->read(data, IT87_REG_TEMP_ENABLE);
1487
1488         /* Per chip special detection */
1489         switch (data->type) {
1490         case it8622:
1491                 if (!(reg & 0xc0) && index == 3)
1492                         type = ttype;
1493                 break;
1494         default:
1495                 break;
1496         }
1497
1498         if (type || index >= 3)
1499                 return type;
1500
1501         extra = data->read(data, IT87_REG_TEMP_EXTRA);
1502
1503         if ((has_temp_peci(data, index) && (reg >> 6 == index + 1)) ||
1504             (has_temp_old_peci(data, index) && (extra & 0x80)))
1505                 type = ttype;           /* Intel PECI or AMDTSI */
1506         if (reg & BIT(index))
1507                 type = 3;               /* thermal diode */
1508         else if (reg & BIT(index + 3))
1509                 type = 4;               /* thermistor */
1510
1511         return type;
1512 }
1513
1514 static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
1515                               char *buf)
1516 {
1517         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1518         struct it87_data *data = it87_update_device(dev);
1519         int type;
1520
1521         if (IS_ERR(data))
1522                 return PTR_ERR(data);
1523
1524         type = get_temp_type(data, sensor_attr->index);
1525         return sprintf(buf, "%d\n", type);
1526 }
1527
1528 static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
1529                              const char *buf, size_t count)
1530 {
1531         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1532         int nr = sensor_attr->index;
1533
1534         struct it87_data *data = dev_get_drvdata(dev);
1535         long val;
1536         u8 reg, extra;
1537         int err;
1538
1539         if (kstrtol(buf, 10, &val) < 0)
1540                 return -EINVAL;
1541
1542         err = it87_lock(data);
1543         if (err)
1544                 return err;
1545
1546         reg = data->read(data, IT87_REG_TEMP_ENABLE);
1547         reg &= ~(1 << nr);
1548         reg &= ~(8 << nr);
1549         if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6))
1550                 reg &= 0x3f;
1551         extra = data->read(data, IT87_REG_TEMP_EXTRA);
1552         if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6))
1553                 extra &= 0x7f;
1554         if (val == 2) { /* backwards compatibility */
1555                 dev_warn(dev,
1556                          "Sensor type 2 is deprecated, please use 4 instead\n");
1557                 val = 4;
1558         }
1559         /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */
1560         if (val == 3)
1561                 reg |= 1 << nr;
1562         else if (val == 4)
1563                 reg |= 8 << nr;
1564         else if (has_temp_peci(data, nr) && val == 6)
1565                 reg |= (nr + 1) << 6;
1566         else if (has_temp_old_peci(data, nr) && val == 6)
1567                 extra |= 0x80;
1568         else if (val != 0) {
1569                 count = -EINVAL;
1570                 goto unlock;
1571         }
1572
1573         data->sensor = reg;
1574         data->extra = extra;
1575         data->write(data, IT87_REG_TEMP_ENABLE, data->sensor);
1576         if (has_temp_old_peci(data, nr))
1577                 data->write(data, IT87_REG_TEMP_EXTRA, data->extra);
1578         data->valid = 0;        /* Force cache refresh */
1579 unlock:
1580         it87_unlock(data);
1581         return count;
1582 }
1583
1584 static SENSOR_DEVICE_ATTR(temp1_type, 0644, show_temp_type, set_temp_type, 0);
1585 static SENSOR_DEVICE_ATTR(temp2_type, 0644, show_temp_type, set_temp_type, 1);
1586 static SENSOR_DEVICE_ATTR(temp3_type, 0644, show_temp_type, set_temp_type, 2);
1587 static SENSOR_DEVICE_ATTR(temp4_type, 0644, show_temp_type, set_temp_type, 3);
1588 static SENSOR_DEVICE_ATTR(temp5_type, 0644, show_temp_type, set_temp_type, 4);
1589 static SENSOR_DEVICE_ATTR(temp6_type, 0644, show_temp_type, set_temp_type, 5);
1590
1591 /* 6 Fans */
1592
1593 static int pwm_mode(const struct it87_data *data, int nr)
1594 {
1595         if (has_fanctl_onoff(data) && nr < 3 &&
1596             !(data->fan_main_ctrl & BIT(nr)))
1597                 return 0;                               /* Full speed */
1598         if (data->pwm_ctrl[nr] & 0x80)
1599                 return 2;                               /* Automatic mode */
1600         if ((!has_fanctl_onoff(data) || nr >= 3) &&
1601             data->pwm_duty[nr] == pwm_to_reg(data, 0xff))
1602                 return 0;                       /* Full speed */
1603
1604         return 1;                               /* Manual mode */
1605 }
1606
1607 static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
1608                         char *buf)
1609 {
1610         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1611         int nr = sattr->nr;
1612         int index = sattr->index;
1613         int speed;
1614         struct it87_data *data = it87_update_device(dev);
1615
1616         if (IS_ERR(data))
1617                 return PTR_ERR(data);
1618
1619         speed = has_16bit_fans(data) ?
1620                 FAN16_FROM_REG(data->fan[nr][index]) :
1621                 FAN_FROM_REG(data->fan[nr][index],
1622                              DIV_FROM_REG(data->fan_div[nr]));
1623         return sprintf(buf, "%d\n", speed);
1624 }
1625
1626 static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
1627                             char *buf)
1628 {
1629         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1630         struct it87_data *data = it87_update_device(dev);
1631         int nr = sensor_attr->index;
1632
1633         if (IS_ERR(data))
1634                 return PTR_ERR(data);
1635
1636         return sprintf(buf, "%lu\n", DIV_FROM_REG(data->fan_div[nr]));
1637 }
1638
1639 static ssize_t show_pwm_enable(struct device *dev,
1640                                struct device_attribute *attr, char *buf)
1641 {
1642         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1643         struct it87_data *data = it87_update_device(dev);
1644         int nr = sensor_attr->index;
1645
1646         if (IS_ERR(data))
1647                 return PTR_ERR(data);
1648
1649         return sprintf(buf, "%d\n", pwm_mode(data, nr));
1650 }
1651
1652 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
1653                         char *buf)
1654 {
1655         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1656         struct it87_data *data = it87_update_device(dev);
1657         int nr = sensor_attr->index;
1658
1659         if (IS_ERR(data))
1660                 return PTR_ERR(data);
1661
1662         return sprintf(buf, "%d\n",
1663                        pwm_from_reg(data, data->pwm_duty[nr]));
1664 }
1665
1666 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
1667                              char *buf)
1668 {
1669         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1670         struct it87_data *data = it87_update_device(dev);
1671         int nr = sensor_attr->index;
1672         unsigned int freq;
1673         int index;
1674
1675         if (IS_ERR(data))
1676                 return PTR_ERR(data);
1677
1678         if (has_pwm_freq2(data) && nr == 1)
1679                 index = (data->extra >> 4) & 0x07;
1680         else
1681                 index = (data->fan_ctl >> 4) & 0x07;
1682
1683         freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128);
1684
1685         return sprintf(buf, "%u\n", freq);
1686 }
1687
1688 static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
1689                        const char *buf, size_t count)
1690 {
1691         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1692         int nr = sattr->nr;
1693         int index = sattr->index;
1694
1695         struct it87_data *data = dev_get_drvdata(dev);
1696         long val;
1697         int err;
1698         u8 reg;
1699
1700         if (kstrtol(buf, 10, &val) < 0)
1701                 return -EINVAL;
1702
1703         err = it87_lock(data);
1704         if (err)
1705                 return err;
1706
1707         if (has_16bit_fans(data)) {
1708                 data->fan[nr][index] = FAN16_TO_REG(val);
1709                 data->write(data, data->REG_FAN_MIN[nr],
1710                             data->fan[nr][index] & 0xff);
1711                 data->write(data, data->REG_FANX_MIN[nr],
1712                             data->fan[nr][index] >> 8);
1713         } else {
1714                 reg = data->read(data, IT87_REG_FAN_DIV);
1715                 switch (nr) {
1716                 case 0:
1717                         data->fan_div[nr] = reg & 0x07;
1718                         break;
1719                 case 1:
1720                         data->fan_div[nr] = (reg >> 3) & 0x07;
1721                         break;
1722                 case 2:
1723                         data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
1724                         break;
1725                 }
1726                 data->fan[nr][index] =
1727                   FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
1728                 data->write(data, data->REG_FAN_MIN[nr], data->fan[nr][index]);
1729         }
1730         it87_unlock(data);
1731         return count;
1732 }
1733
1734 static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
1735                            const char *buf, size_t count)
1736 {
1737         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1738         struct it87_data *data = dev_get_drvdata(dev);
1739         int nr = sensor_attr->index;
1740         unsigned long val;
1741         int min, err;
1742         u8 old;
1743
1744         if (kstrtoul(buf, 10, &val) < 0)
1745                 return -EINVAL;
1746
1747         err = it87_lock(data);
1748         if (err)
1749                 return err;
1750
1751         old = data->read(data, IT87_REG_FAN_DIV);
1752
1753         /* Save fan min limit */
1754         min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
1755
1756         switch (nr) {
1757         case 0:
1758         case 1:
1759                 data->fan_div[nr] = DIV_TO_REG(val);
1760                 break;
1761         case 2:
1762                 if (val < 8)
1763                         data->fan_div[nr] = 1;
1764                 else
1765                         data->fan_div[nr] = 3;
1766         }
1767         val = old & 0x80;
1768         val |= (data->fan_div[0] & 0x07);
1769         val |= (data->fan_div[1] & 0x07) << 3;
1770         if (data->fan_div[2] == 3)
1771                 val |= 0x1 << 6;
1772         data->write(data, IT87_REG_FAN_DIV, val);
1773
1774         /* Restore fan min limit */
1775         data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
1776         data->write(data, data->REG_FAN_MIN[nr], data->fan[nr][1]);
1777         it87_unlock(data);
1778         return count;
1779 }
1780
1781 /* Returns 0 if OK, -EINVAL otherwise */
1782 static int check_trip_points(struct device *dev, int nr)
1783 {
1784         const struct it87_data *data = dev_get_drvdata(dev);
1785         int i, err = 0;
1786
1787         if (has_old_autopwm(data)) {
1788                 for (i = 0; i < 3; i++) {
1789                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1790                                 err = -EINVAL;
1791                 }
1792                 for (i = 0; i < 2; i++) {
1793                         if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1794                                 err = -EINVAL;
1795                 }
1796         } else if (has_newer_autopwm(data)) {
1797                 for (i = 1; i < 3; i++) {
1798                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1799                                 err = -EINVAL;
1800                 }
1801         }
1802
1803         if (err) {
1804                 dev_err(dev,
1805                         "Inconsistent trip points, not switching to automatic mode\n");
1806                 dev_err(dev, "Adjust the trip points and try again\n");
1807         }
1808         return err;
1809 }
1810
1811 static ssize_t set_pwm_enable(struct device *dev, struct device_attribute *attr,
1812                               const char *buf, size_t count)
1813 {
1814         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1815         struct it87_data *data = dev_get_drvdata(dev);
1816         int nr = sensor_attr->index;
1817         long val;
1818         int err;
1819
1820         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
1821                 return -EINVAL;
1822
1823         /* Check trip points before switching to automatic mode */
1824         if (val == 2) {
1825                 if (check_trip_points(dev, nr) < 0)
1826                         return -EINVAL;
1827         }
1828
1829         err = it87_lock(data);
1830         if (err)
1831                 return err;
1832
1833         it87_update_pwm_ctrl(data, nr);
1834
1835         if (val == 0) {
1836                 if (nr < 3 && has_fanctl_onoff(data)) {
1837                         int tmp;
1838                         /* make sure the fan is on when in on/off mode */
1839                         tmp = data->read(data, IT87_REG_FAN_CTL);
1840                         data->write(data, IT87_REG_FAN_CTL, tmp | BIT(nr));
1841                         /* set on/off mode */
1842                         data->fan_main_ctrl &= ~BIT(nr);
1843                         data->write(data, IT87_REG_FAN_MAIN_CTRL,
1844                                     data->fan_main_ctrl);
1845                 } else {
1846                         u8 ctrl;
1847
1848                         /* No on/off mode, set maximum pwm value */
1849                         data->pwm_duty[nr] = pwm_to_reg(data, 0xff);
1850                         data->write(data, IT87_REG_PWM_DUTY[nr],
1851                                     data->pwm_duty[nr]);
1852                         /* and set manual mode */
1853                         if (has_newer_autopwm(data)) {
1854                                 ctrl = temp_map_to_reg(data, nr,
1855                                                        data->pwm_temp_map[nr]);
1856                                 ctrl &= 0x7f;
1857                         } else {
1858                                 ctrl = data->pwm_duty[nr];
1859                         }
1860                         data->pwm_ctrl[nr] = ctrl;
1861                         data->write(data, data->REG_PWM[nr], ctrl);
1862                 }
1863         } else {
1864                 u8 ctrl;
1865
1866                 if (has_newer_autopwm(data)) {
1867                         ctrl = temp_map_to_reg(data, nr,
1868                                                data->pwm_temp_map[nr]);
1869                         if (val == 1)
1870                                 ctrl &= 0x7f;
1871                         else
1872                                 ctrl |= 0x80;
1873                 } else {
1874                         ctrl = (val == 1 ? data->pwm_duty[nr] : 0x80);
1875                 }
1876                 data->pwm_ctrl[nr] = ctrl;
1877                 data->write(data, data->REG_PWM[nr], ctrl);
1878
1879                 if (has_fanctl_onoff(data) && nr < 3) {
1880                         /* set SmartGuardian mode */
1881                         data->fan_main_ctrl |= BIT(nr);
1882                         data->write(data, IT87_REG_FAN_MAIN_CTRL,
1883                                     data->fan_main_ctrl);
1884                 }
1885         }
1886         it87_unlock(data);
1887         return count;
1888 }
1889
1890 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1891                        const char *buf, size_t count)
1892 {
1893         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1894         struct it87_data *data = dev_get_drvdata(dev);
1895         int nr = sensor_attr->index;
1896         long val;
1897         int err;
1898
1899         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1900                 return -EINVAL;
1901
1902         err = it87_lock(data);
1903         if (err)
1904                 return err;
1905
1906         it87_update_pwm_ctrl(data, nr);
1907         if (has_newer_autopwm(data)) {
1908                 /*
1909                  * If we are in automatic mode, the PWM duty cycle register
1910                  * is read-only so we can't write the value.
1911                  */
1912                 if (data->pwm_ctrl[nr] & 0x80) {
1913                         count = -EBUSY;
1914                         goto unlock;
1915                 }
1916                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1917                 data->write(data, IT87_REG_PWM_DUTY[nr],
1918                             data->pwm_duty[nr]);
1919         } else {
1920                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1921                 /*
1922                  * If we are in manual mode, write the duty cycle immediately;
1923                  * otherwise, just store it for later use.
1924                  */
1925                 if (!(data->pwm_ctrl[nr] & 0x80)) {
1926                         data->pwm_ctrl[nr] = data->pwm_duty[nr];
1927                         data->write(data, data->REG_PWM[nr],
1928                                     data->pwm_ctrl[nr]);
1929                 }
1930         }
1931 unlock:
1932         it87_unlock(data);
1933         return count;
1934 }
1935
1936 static ssize_t set_pwm_freq(struct device *dev, struct device_attribute *attr,
1937                             const char *buf, size_t count)
1938 {
1939         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1940         struct it87_data *data = dev_get_drvdata(dev);
1941         int nr = sensor_attr->index;
1942         unsigned long val;
1943         int err;
1944         int i;
1945
1946         if (kstrtoul(buf, 10, &val) < 0)
1947                 return -EINVAL;
1948
1949         val = clamp_val(val, 0, 1000000);
1950         val *= has_newer_autopwm(data) ? 256 : 128;
1951
1952         /* Search for the nearest available frequency */
1953         for (i = 0; i < 7; i++) {
1954                 if (val > (pwm_freq[i] + pwm_freq[i + 1]) / 2)
1955                         break;
1956         }
1957
1958         err = it87_lock(data);
1959         if (err)
1960                 return err;
1961
1962         if (nr == 0) {
1963                 data->fan_ctl = data->read(data, IT87_REG_FAN_CTL) & 0x8f;
1964                 data->fan_ctl |= i << 4;
1965                 data->write(data, IT87_REG_FAN_CTL, data->fan_ctl);
1966         } else {
1967                 data->extra = data->read(data, IT87_REG_TEMP_EXTRA) & 0x8f;
1968                 data->extra |= i << 4;
1969                 data->write(data, IT87_REG_TEMP_EXTRA, data->extra);
1970         }
1971         it87_unlock(data);
1972         return count;
1973 }
1974
1975 static ssize_t show_pwm_temp_map(struct device *dev,
1976                                  struct device_attribute *attr, char *buf)
1977 {
1978         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1979         struct it87_data *data = it87_update_device(dev);
1980         int nr = sensor_attr->index;
1981
1982         if (IS_ERR(data))
1983                 return PTR_ERR(data);
1984
1985         return sprintf(buf, "%d\n", data->pwm_temp_map[nr] + 1);
1986 }
1987
1988 static ssize_t set_pwm_temp_map(struct device *dev,
1989                                 struct device_attribute *attr, const char *buf,
1990                                 size_t count)
1991 {
1992         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1993         struct it87_data *data = dev_get_drvdata(dev);
1994         int nr = sensor_attr->index;
1995         unsigned long val;
1996         int err;
1997         u8 map;
1998
1999         if (kstrtoul(buf, 10, &val) < 0)
2000                 return -EINVAL;
2001
2002         if (!val || val > data->pwm_num_temp_map)
2003                 return -EINVAL;
2004
2005         map = val - 1;
2006
2007         err = it87_lock(data);
2008         if (err)
2009                 return err;
2010
2011         it87_update_pwm_ctrl(data, nr);
2012         data->pwm_temp_map[nr] = map;
2013         /*
2014          * If we are in automatic mode, write the temp mapping immediately;
2015          * otherwise, just store it for later use.
2016          */
2017         if (data->pwm_ctrl[nr] & 0x80) {
2018                 data->pwm_ctrl[nr] = temp_map_to_reg(data, nr, map);
2019                 data->write(data, data->REG_PWM[nr], data->pwm_ctrl[nr]);
2020         }
2021         it87_unlock(data);
2022         return count;
2023 }
2024
2025 static ssize_t show_auto_pwm(struct device *dev, struct device_attribute *attr,
2026                              char *buf)
2027 {
2028         struct it87_data *data = it87_update_device(dev);
2029         struct sensor_device_attribute_2 *sensor_attr =
2030                         to_sensor_dev_attr_2(attr);
2031         int nr = sensor_attr->nr;
2032         int point = sensor_attr->index;
2033
2034         if (IS_ERR(data))
2035                 return PTR_ERR(data);
2036
2037         return sprintf(buf, "%d\n",
2038                        pwm_from_reg(data, data->auto_pwm[nr][point]));
2039 }
2040
2041 static ssize_t set_auto_pwm(struct device *dev, struct device_attribute *attr,
2042                             const char *buf, size_t count)
2043 {
2044         struct it87_data *data = dev_get_drvdata(dev);
2045         struct sensor_device_attribute_2 *sensor_attr =
2046                         to_sensor_dev_attr_2(attr);
2047         int nr = sensor_attr->nr;
2048         int point = sensor_attr->index;
2049         int regaddr;
2050         long val;
2051         int err;
2052
2053         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
2054                 return -EINVAL;
2055
2056         err = it87_lock(data);
2057         if (err)
2058                 return err;
2059
2060         data->auto_pwm[nr][point] = pwm_to_reg(data, val);
2061         if (has_newer_autopwm(data))
2062                 regaddr = IT87_REG_AUTO_TEMP(nr, 3);
2063         else
2064                 regaddr = IT87_REG_AUTO_PWM(nr, point);
2065         data->write(data, regaddr, data->auto_pwm[nr][point]);
2066         it87_unlock(data);
2067         return count;
2068 }
2069
2070 static ssize_t show_auto_pwm_slope(struct device *dev,
2071                                    struct device_attribute *attr, char *buf)
2072 {
2073         struct it87_data *data = it87_update_device(dev);
2074         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
2075         int nr = sensor_attr->index;
2076
2077         if (IS_ERR(data))
2078                 return PTR_ERR(data);
2079
2080         return sprintf(buf, "%d\n", data->auto_pwm[nr][1] & 0x7f);
2081 }
2082
2083 static ssize_t set_auto_pwm_slope(struct device *dev,
2084                                   struct device_attribute *attr,
2085                                   const char *buf, size_t count)
2086 {
2087         struct it87_data *data = dev_get_drvdata(dev);
2088         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
2089         int nr = sensor_attr->index;
2090         unsigned long val;
2091         int err;
2092
2093         if (kstrtoul(buf, 10, &val) < 0 || val > 127)
2094                 return -EINVAL;
2095
2096         err = it87_lock(data);
2097         if (err)
2098                 return err;
2099
2100         data->auto_pwm[nr][1] = (data->auto_pwm[nr][1] & 0x80) | val;
2101         data->write(data, IT87_REG_AUTO_TEMP(nr, 4), data->auto_pwm[nr][1]);
2102         it87_unlock(data);
2103         return count;
2104 }
2105
2106 static ssize_t show_auto_temp(struct device *dev, struct device_attribute *attr,
2107                               char *buf)
2108 {
2109         struct it87_data *data = it87_update_device(dev);
2110         struct sensor_device_attribute_2 *sensor_attr =
2111                         to_sensor_dev_attr_2(attr);
2112         int nr = sensor_attr->nr;
2113         int point = sensor_attr->index;
2114         int reg;
2115
2116         if (IS_ERR(data))
2117                 return PTR_ERR(data);
2118
2119         if (has_old_autopwm(data) || point)
2120                 reg = data->auto_temp[nr][point];
2121         else
2122                 reg = data->auto_temp[nr][1] - (data->auto_temp[nr][0] & 0x1f);
2123
2124         return sprintf(buf, "%d\n", TEMP_FROM_REG(reg));
2125 }
2126
2127 static ssize_t set_auto_temp(struct device *dev, struct device_attribute *attr,
2128                              const char *buf, size_t count)
2129 {
2130         struct it87_data *data = dev_get_drvdata(dev);
2131         struct sensor_device_attribute_2 *sensor_attr =
2132                         to_sensor_dev_attr_2(attr);
2133         int nr = sensor_attr->nr;
2134         int point = sensor_attr->index;
2135         long val;
2136         int reg;
2137         int err;
2138
2139         if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
2140                 return -EINVAL;
2141
2142         err = it87_lock(data);
2143         if (err)
2144                 return err;
2145
2146         if (has_newer_autopwm(data) && !point) {
2147                 reg = data->auto_temp[nr][1] - TEMP_TO_REG(val);
2148                 reg = clamp_val(reg, 0, 0x1f) | (data->auto_temp[nr][0] & 0xe0);
2149                 data->auto_temp[nr][0] = reg;
2150                 data->write(data, IT87_REG_AUTO_TEMP(nr, 5), reg);
2151         } else {
2152                 reg = TEMP_TO_REG(val);
2153                 data->auto_temp[nr][point] = reg;
2154                 if (has_newer_autopwm(data))
2155                         point--;
2156                 data->write(data, IT87_REG_AUTO_TEMP(nr, point), reg);
2157         }
2158         it87_unlock(data);
2159         return count;
2160 }
2161
2162 static SENSOR_DEVICE_ATTR_2(fan1_input, 0444, show_fan, NULL, 0, 0);
2163 static SENSOR_DEVICE_ATTR_2(fan1_min, 0644, show_fan, set_fan, 0, 1);
2164 static SENSOR_DEVICE_ATTR(fan1_div, 0644, show_fan_div, set_fan_div, 0);
2165
2166 static SENSOR_DEVICE_ATTR_2(fan2_input, 0444, show_fan, NULL, 1, 0);
2167 static SENSOR_DEVICE_ATTR_2(fan2_min, 0644, show_fan, set_fan, 1, 1);
2168 static SENSOR_DEVICE_ATTR(fan2_div, 0644, show_fan_div, set_fan_div, 1);
2169
2170 static SENSOR_DEVICE_ATTR_2(fan3_input, 0444, show_fan, NULL, 2, 0);
2171 static SENSOR_DEVICE_ATTR_2(fan3_min, 0644, show_fan, set_fan, 2, 1);
2172 static SENSOR_DEVICE_ATTR(fan3_div, 0644, show_fan_div, set_fan_div, 2);
2173
2174 static SENSOR_DEVICE_ATTR_2(fan4_input, 0444, show_fan, NULL, 3, 0);
2175 static SENSOR_DEVICE_ATTR_2(fan4_min, 0644, show_fan, set_fan, 3, 1);
2176
2177 static SENSOR_DEVICE_ATTR_2(fan5_input, 0444, show_fan, NULL, 4, 0);
2178 static SENSOR_DEVICE_ATTR_2(fan5_min, 0644, show_fan, set_fan, 4, 1);
2179
2180 static SENSOR_DEVICE_ATTR_2(fan6_input, 0444, show_fan, NULL, 5, 0);
2181 static SENSOR_DEVICE_ATTR_2(fan6_min, 0644, show_fan, set_fan, 5, 1);
2182
2183 static SENSOR_DEVICE_ATTR(pwm1_enable, 0644,
2184                           show_pwm_enable, set_pwm_enable, 0);
2185 static SENSOR_DEVICE_ATTR(pwm1, 0644, show_pwm, set_pwm, 0);
2186 static SENSOR_DEVICE_ATTR(pwm1_freq, 0644, show_pwm_freq, set_pwm_freq, 0);
2187 static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, 0444,
2188                           show_pwm_temp_map, set_pwm_temp_map, 0);
2189 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, 0644,
2190                             show_auto_pwm, set_auto_pwm, 0, 0);
2191 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, 0644,
2192                             show_auto_pwm, set_auto_pwm, 0, 1);
2193 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, 0644,
2194                             show_auto_pwm, set_auto_pwm, 0, 2);
2195 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, 0444,
2196                             show_auto_pwm, NULL, 0, 3);
2197 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, 0644,
2198                             show_auto_temp, set_auto_temp, 0, 1);
2199 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, 0644,
2200                             show_auto_temp, set_auto_temp, 0, 0);
2201 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, 0644,
2202                             show_auto_temp, set_auto_temp, 0, 2);
2203 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, 0644,
2204                             show_auto_temp, set_auto_temp, 0, 3);
2205 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, 0644,
2206                             show_auto_temp, set_auto_temp, 0, 4);
2207 static SENSOR_DEVICE_ATTR_2(pwm1_auto_start, 0644,
2208                             show_auto_pwm, set_auto_pwm, 0, 0);
2209 static SENSOR_DEVICE_ATTR(pwm1_auto_slope, 0644,
2210                           show_auto_pwm_slope, set_auto_pwm_slope, 0);
2211
2212 static SENSOR_DEVICE_ATTR(pwm2_enable, 0644,
2213                           show_pwm_enable, set_pwm_enable, 1);
2214 static SENSOR_DEVICE_ATTR(pwm2, 0644, show_pwm, set_pwm, 1);
2215 static SENSOR_DEVICE_ATTR(pwm2_freq, 0444, show_pwm_freq, set_pwm_freq, 1);
2216 static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, 0444,
2217                           show_pwm_temp_map, set_pwm_temp_map, 1);
2218 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, 0644,
2219                             show_auto_pwm, set_auto_pwm, 1, 0);
2220 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, 0644,
2221                             show_auto_pwm, set_auto_pwm, 1, 1);
2222 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, 0644,
2223                             show_auto_pwm, set_auto_pwm, 1, 2);
2224 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, 0444,
2225                             show_auto_pwm, NULL, 1, 3);
2226 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, 0644,
2227                             show_auto_temp, set_auto_temp, 1, 1);
2228 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, 0644,
2229                             show_auto_temp, set_auto_temp, 1, 0);
2230 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, 0644,
2231                             show_auto_temp, set_auto_temp, 1, 2);
2232 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, 0644,
2233                             show_auto_temp, set_auto_temp, 1, 3);
2234 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, 0644,
2235                             show_auto_temp, set_auto_temp, 1, 4);
2236 static SENSOR_DEVICE_ATTR_2(pwm2_auto_start, 0644,
2237                             show_auto_pwm, set_auto_pwm, 1, 0);
2238 static SENSOR_DEVICE_ATTR(pwm2_auto_slope, 0644,
2239                           show_auto_pwm_slope, set_auto_pwm_slope, 1);
2240
2241 static SENSOR_DEVICE_ATTR(pwm3_enable, 0644,
2242                           show_pwm_enable, set_pwm_enable, 2);
2243 static SENSOR_DEVICE_ATTR(pwm3, 0644, show_pwm, set_pwm, 2);
2244 static SENSOR_DEVICE_ATTR(pwm3_freq, 0444, show_pwm_freq, NULL, 2);
2245 static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, 0444,
2246                           show_pwm_temp_map, set_pwm_temp_map, 2);
2247 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, 0644,
2248                             show_auto_pwm, set_auto_pwm, 2, 0);
2249 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, 0644,
2250                             show_auto_pwm, set_auto_pwm, 2, 1);
2251 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, 0644,
2252                             show_auto_pwm, set_auto_pwm, 2, 2);
2253 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, 0444,
2254                             show_auto_pwm, NULL, 2, 3);
2255 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, 0644,
2256                             show_auto_temp, set_auto_temp, 2, 1);
2257 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, 0644,
2258                             show_auto_temp, set_auto_temp, 2, 0);
2259 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, 0644,
2260                             show_auto_temp, set_auto_temp, 2, 2);
2261 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, 0644,
2262                             show_auto_temp, set_auto_temp, 2, 3);
2263 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, 0644,
2264                             show_auto_temp, set_auto_temp, 2, 4);
2265 static SENSOR_DEVICE_ATTR_2(pwm3_auto_start, 0644,
2266                             show_auto_pwm, set_auto_pwm, 2, 0);
2267 static SENSOR_DEVICE_ATTR(pwm3_auto_slope, 0644,
2268                           show_auto_pwm_slope, set_auto_pwm_slope, 2);
2269
2270 static SENSOR_DEVICE_ATTR(pwm4_enable, 0644,
2271                           show_pwm_enable, set_pwm_enable, 3);
2272 static SENSOR_DEVICE_ATTR(pwm4, 0644, show_pwm, set_pwm, 3);
2273 static SENSOR_DEVICE_ATTR(pwm4_freq, 0444, show_pwm_freq, NULL, 3);
2274 static SENSOR_DEVICE_ATTR(pwm4_auto_channels_temp, 0444,
2275                           show_pwm_temp_map, set_pwm_temp_map, 3);
2276 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp, 0644,
2277                             show_auto_temp, set_auto_temp, 2, 1);
2278 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp_hyst, 0644,
2279                             show_auto_temp, set_auto_temp, 2, 0);
2280 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point2_temp, 0644,
2281                             show_auto_temp, set_auto_temp, 2, 2);
2282 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point3_temp, 0644,
2283                             show_auto_temp, set_auto_temp, 2, 3);
2284 static SENSOR_DEVICE_ATTR_2(pwm4_auto_start, 0644,
2285                             show_auto_pwm, set_auto_pwm, 3, 0);
2286 static SENSOR_DEVICE_ATTR(pwm4_auto_slope, 0644,
2287                           show_auto_pwm_slope, set_auto_pwm_slope, 3);
2288
2289 static SENSOR_DEVICE_ATTR(pwm5_enable, 0644,
2290                           show_pwm_enable, set_pwm_enable, 4);
2291 static SENSOR_DEVICE_ATTR(pwm5, 0644, show_pwm, set_pwm, 4);
2292 static SENSOR_DEVICE_ATTR(pwm5_freq, 0444, show_pwm_freq, NULL, 4);
2293 static SENSOR_DEVICE_ATTR(pwm5_auto_channels_temp, 0444,
2294                           show_pwm_temp_map, set_pwm_temp_map, 4);
2295 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp, 0644,
2296                             show_auto_temp, set_auto_temp, 2, 1);
2297 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp_hyst, 0644,
2298                             show_auto_temp, set_auto_temp, 2, 0);
2299 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point2_temp, 0644,
2300                             show_auto_temp, set_auto_temp, 2, 2);
2301 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point3_temp, 0644,
2302                             show_auto_temp, set_auto_temp, 2, 3);
2303 static SENSOR_DEVICE_ATTR_2(pwm5_auto_start, 0644,
2304                             show_auto_pwm, set_auto_pwm, 4, 0);
2305 static SENSOR_DEVICE_ATTR(pwm5_auto_slope, 0644,
2306                           show_auto_pwm_slope, set_auto_pwm_slope, 4);
2307
2308 static SENSOR_DEVICE_ATTR(pwm6_enable, 0644,
2309                           show_pwm_enable, set_pwm_enable, 5);
2310 static SENSOR_DEVICE_ATTR(pwm6, 0644, show_pwm, set_pwm, 5);
2311 static SENSOR_DEVICE_ATTR(pwm6_freq, 0444, show_pwm_freq, NULL, 5);
2312 static SENSOR_DEVICE_ATTR(pwm6_auto_channels_temp, 0444,
2313                           show_pwm_temp_map, set_pwm_temp_map, 5);
2314 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp, 0644,
2315                             show_auto_temp, set_auto_temp, 2, 1);
2316 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp_hyst, 0644,
2317                             show_auto_temp, set_auto_temp, 2, 0);
2318 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point2_temp, 0644,
2319                             show_auto_temp, set_auto_temp, 2, 2);
2320 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point3_temp, 0644,
2321                             show_auto_temp, set_auto_temp, 2, 3);
2322 static SENSOR_DEVICE_ATTR_2(pwm6_auto_start, 0644,
2323                             show_auto_pwm, set_auto_pwm, 5, 0);
2324 static SENSOR_DEVICE_ATTR(pwm6_auto_slope, 0644,
2325                           show_auto_pwm_slope, set_auto_pwm_slope, 5);
2326
2327 /* Alarms */
2328 static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
2329                            char *buf)
2330 {
2331         struct it87_data *data = it87_update_device(dev);
2332
2333         if (IS_ERR(data))
2334                 return PTR_ERR(data);
2335
2336         return sprintf(buf, "%u\n", data->alarms);
2337 }
2338 static DEVICE_ATTR(alarms, 0444, show_alarms, NULL);
2339
2340 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
2341                           char *buf)
2342 {
2343         struct it87_data *data = it87_update_device(dev);
2344         int bitnr = to_sensor_dev_attr(attr)->index;
2345
2346         if (IS_ERR(data))
2347                 return PTR_ERR(data);
2348
2349         return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
2350 }
2351
2352 static ssize_t clear_intrusion(struct device *dev,
2353                                struct device_attribute *attr, const char *buf,
2354                                size_t count)
2355 {
2356         struct it87_data *data = dev_get_drvdata(dev);
2357         int err, config;
2358         long val;
2359
2360         if (kstrtol(buf, 10, &val) < 0 || val != 0)
2361                 return -EINVAL;
2362
2363         err = it87_lock(data);
2364         if (err)
2365                 return err;
2366
2367         config = data->read(data, IT87_REG_CONFIG);
2368         config |= BIT(5);
2369         data->write(data, IT87_REG_CONFIG, config);
2370         /* Invalidate cache to force re-read */
2371         data->valid = 0;
2372         it87_unlock(data);
2373         return count;
2374 }
2375
2376 static SENSOR_DEVICE_ATTR(in0_alarm, 0444, show_alarm, NULL, 8);
2377 static SENSOR_DEVICE_ATTR(in1_alarm, 0444, show_alarm, NULL, 9);
2378 static SENSOR_DEVICE_ATTR(in2_alarm, 0444, show_alarm, NULL, 10);
2379 static SENSOR_DEVICE_ATTR(in3_alarm, 0444, show_alarm, NULL, 11);
2380 static SENSOR_DEVICE_ATTR(in4_alarm, 0444, show_alarm, NULL, 12);
2381 static SENSOR_DEVICE_ATTR(in5_alarm, 0444, show_alarm, NULL, 13);
2382 static SENSOR_DEVICE_ATTR(in6_alarm, 0444, show_alarm, NULL, 14);
2383 static SENSOR_DEVICE_ATTR(in7_alarm, 0444, show_alarm, NULL, 15);
2384 static SENSOR_DEVICE_ATTR(fan1_alarm, 0444, show_alarm, NULL, 0);
2385 static SENSOR_DEVICE_ATTR(fan2_alarm, 0444, show_alarm, NULL, 1);
2386 static SENSOR_DEVICE_ATTR(fan3_alarm, 0444, show_alarm, NULL, 2);
2387 static SENSOR_DEVICE_ATTR(fan4_alarm, 0444, show_alarm, NULL, 3);
2388 static SENSOR_DEVICE_ATTR(fan5_alarm, 0444, show_alarm, NULL, 6);
2389 static SENSOR_DEVICE_ATTR(fan6_alarm, 0444, show_alarm, NULL, 7);
2390 static SENSOR_DEVICE_ATTR(temp1_alarm, 0444, show_alarm, NULL, 16);
2391 static SENSOR_DEVICE_ATTR(temp2_alarm, 0444, show_alarm, NULL, 17);
2392 static SENSOR_DEVICE_ATTR(temp3_alarm, 0444, show_alarm, NULL, 18);
2393 static SENSOR_DEVICE_ATTR(temp4_alarm, 0444, show_alarm, NULL, 19);
2394 static SENSOR_DEVICE_ATTR(temp5_alarm, 0444, show_alarm, NULL, 20);
2395 static SENSOR_DEVICE_ATTR(temp6_alarm, 0444, show_alarm, NULL, 21);
2396 static SENSOR_DEVICE_ATTR(intrusion0_alarm, 0644,
2397                           show_alarm, clear_intrusion, 4);
2398
2399 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
2400                          char *buf)
2401 {
2402         struct it87_data *data = it87_update_device(dev);
2403         int bitnr = to_sensor_dev_attr(attr)->index;
2404
2405         if (IS_ERR(data))
2406                 return PTR_ERR(data);
2407
2408         return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
2409 }
2410
2411 static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
2412                         const char *buf, size_t count)
2413 {
2414         int bitnr = to_sensor_dev_attr(attr)->index;
2415         struct it87_data *data = dev_get_drvdata(dev);
2416         long val;
2417         int err;
2418
2419         if (kstrtol(buf, 10, &val) < 0 || (val != 0 && val != 1))
2420                 return -EINVAL;
2421
2422         err = it87_lock(data);
2423         if (err)
2424                 return err;
2425
2426         data->beeps = data->read(data, IT87_REG_BEEP_ENABLE);
2427         if (val)
2428                 data->beeps |= BIT(bitnr);
2429         else
2430                 data->beeps &= ~BIT(bitnr);
2431         data->write(data, IT87_REG_BEEP_ENABLE, data->beeps);
2432         it87_unlock(data);
2433         return count;
2434 }
2435
2436 static SENSOR_DEVICE_ATTR(in0_beep, 0644,
2437                           show_beep, set_beep, 1);
2438 static SENSOR_DEVICE_ATTR(in1_beep, 0444, show_beep, NULL, 1);
2439 static SENSOR_DEVICE_ATTR(in2_beep, 0444, show_beep, NULL, 1);
2440 static SENSOR_DEVICE_ATTR(in3_beep, 0444, show_beep, NULL, 1);
2441 static SENSOR_DEVICE_ATTR(in4_beep, 0444, show_beep, NULL, 1);
2442 static SENSOR_DEVICE_ATTR(in5_beep, 0444, show_beep, NULL, 1);
2443 static SENSOR_DEVICE_ATTR(in6_beep, 0444, show_beep, NULL, 1);
2444 static SENSOR_DEVICE_ATTR(in7_beep, 0444, show_beep, NULL, 1);
2445 /* fanX_beep writability is set later */
2446 static SENSOR_DEVICE_ATTR(fan1_beep, 0444, show_beep, set_beep, 0);
2447 static SENSOR_DEVICE_ATTR(fan2_beep, 0444, show_beep, set_beep, 0);
2448 static SENSOR_DEVICE_ATTR(fan3_beep, 0444, show_beep, set_beep, 0);
2449 static SENSOR_DEVICE_ATTR(fan4_beep, 0444, show_beep, set_beep, 0);
2450 static SENSOR_DEVICE_ATTR(fan5_beep, 0444, show_beep, set_beep, 0);
2451 static SENSOR_DEVICE_ATTR(fan6_beep, 0444, show_beep, set_beep, 0);
2452 static SENSOR_DEVICE_ATTR(temp1_beep, 0644,
2453                           show_beep, set_beep, 2);
2454 static SENSOR_DEVICE_ATTR(temp2_beep, 0444, show_beep, NULL, 2);
2455 static SENSOR_DEVICE_ATTR(temp3_beep, 0444, show_beep, NULL, 2);
2456 static SENSOR_DEVICE_ATTR(temp4_beep, 0444, show_beep, NULL, 2);
2457 static SENSOR_DEVICE_ATTR(temp5_beep, 0444, show_beep, NULL, 2);
2458 static SENSOR_DEVICE_ATTR(temp6_beep, 0444, show_beep, NULL, 2);
2459
2460 static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
2461                             char *buf)
2462 {
2463         struct it87_data *data = dev_get_drvdata(dev);
2464
2465         return sprintf(buf, "%u\n", data->vrm);
2466 }
2467
2468 static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
2469                              const char *buf, size_t count)
2470 {
2471         struct it87_data *data = dev_get_drvdata(dev);
2472         unsigned long val;
2473
2474         if (kstrtoul(buf, 10, &val) < 0)
2475                 return -EINVAL;
2476
2477         data->vrm = val;
2478
2479         return count;
2480 }
2481 static DEVICE_ATTR(vrm, 0644, show_vrm_reg, store_vrm_reg);
2482
2483 static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
2484                             char *buf)
2485 {
2486         struct it87_data *data = it87_update_device(dev);
2487
2488         if (IS_ERR(data))
2489                 return PTR_ERR(data);
2490
2491         return sprintf(buf, "%ld\n", (long)vid_from_reg(data->vid, data->vrm));
2492 }
2493 static DEVICE_ATTR(cpu0_vid, 0444, show_vid_reg, NULL);
2494
2495 static ssize_t show_label(struct device *dev, struct device_attribute *attr,
2496                           char *buf)
2497 {
2498         static const char * const labels[] = {
2499                 "+5V",
2500                 "5VSB",
2501                 "Vbat",
2502                 "AVCC",
2503         };
2504         static const char * const labels_it8721[] = {
2505                 "+3.3V",
2506                 "3VSB",
2507                 "Vbat",
2508                 "+3.3V",
2509         };
2510         struct it87_data *data = dev_get_drvdata(dev);
2511         int nr = to_sensor_dev_attr(attr)->index;
2512         const char *label;
2513
2514         if (has_vin3_5v(data) && nr == 0)
2515                 label = labels[0];
2516         else if (has_12mv_adc(data) || has_10_9mv_adc(data) ||
2517                  has_11mv_adc(data))
2518                 label = labels_it8721[nr];
2519         else
2520                 label = labels[nr];
2521
2522         return sprintf(buf, "%s\n", label);
2523 }
2524 static SENSOR_DEVICE_ATTR(in3_label, 0444, show_label, NULL, 0);
2525 static SENSOR_DEVICE_ATTR(in7_label, 0444, show_label, NULL, 1);
2526 static SENSOR_DEVICE_ATTR(in8_label, 0444, show_label, NULL, 2);
2527 /* AVCC3 */
2528 static SENSOR_DEVICE_ATTR(in9_label, 0444, show_label, NULL, 3);
2529
2530 static umode_t it87_in_is_visible(struct kobject *kobj,
2531                                   struct attribute *attr, int index)
2532 {
2533         struct device *dev = container_of(kobj, struct device, kobj);
2534         struct it87_data *data = dev_get_drvdata(dev);
2535         int i = index / 5;      /* voltage index */
2536         int a = index % 5;      /* attribute index */
2537
2538         if (index >= 40) {      /* in8 and higher only have input attributes */
2539                 i = index - 40 + 8;
2540                 a = 0;
2541         }
2542
2543         if (!(data->has_in & BIT(i)))
2544                 return 0;
2545
2546         if (a == 4 && !data->has_beep)
2547                 return 0;
2548
2549         return attr->mode;
2550 }
2551
2552 static struct attribute *it87_attributes_in[] = {
2553         &sensor_dev_attr_in0_input.dev_attr.attr,
2554         &sensor_dev_attr_in0_min.dev_attr.attr,
2555         &sensor_dev_attr_in0_max.dev_attr.attr,
2556         &sensor_dev_attr_in0_alarm.dev_attr.attr,
2557         &sensor_dev_attr_in0_beep.dev_attr.attr,        /* 4 */
2558
2559         &sensor_dev_attr_in1_input.dev_attr.attr,
2560         &sensor_dev_attr_in1_min.dev_attr.attr,
2561         &sensor_dev_attr_in1_max.dev_attr.attr,
2562         &sensor_dev_attr_in1_alarm.dev_attr.attr,
2563         &sensor_dev_attr_in1_beep.dev_attr.attr,        /* 9 */
2564
2565         &sensor_dev_attr_in2_input.dev_attr.attr,
2566         &sensor_dev_attr_in2_min.dev_attr.attr,
2567         &sensor_dev_attr_in2_max.dev_attr.attr,
2568         &sensor_dev_attr_in2_alarm.dev_attr.attr,
2569         &sensor_dev_attr_in2_beep.dev_attr.attr,        /* 14 */
2570
2571         &sensor_dev_attr_in3_input.dev_attr.attr,
2572         &sensor_dev_attr_in3_min.dev_attr.attr,
2573         &sensor_dev_attr_in3_max.dev_attr.attr,
2574         &sensor_dev_attr_in3_alarm.dev_attr.attr,
2575         &sensor_dev_attr_in3_beep.dev_attr.attr,        /* 19 */
2576
2577         &sensor_dev_attr_in4_input.dev_attr.attr,
2578         &sensor_dev_attr_in4_min.dev_attr.attr,
2579         &sensor_dev_attr_in4_max.dev_attr.attr,
2580         &sensor_dev_attr_in4_alarm.dev_attr.attr,
2581         &sensor_dev_attr_in4_beep.dev_attr.attr,        /* 24 */
2582
2583         &sensor_dev_attr_in5_input.dev_attr.attr,
2584         &sensor_dev_attr_in5_min.dev_attr.attr,
2585         &sensor_dev_attr_in5_max.dev_attr.attr,
2586         &sensor_dev_attr_in5_alarm.dev_attr.attr,
2587         &sensor_dev_attr_in5_beep.dev_attr.attr,        /* 29 */
2588
2589         &sensor_dev_attr_in6_input.dev_attr.attr,
2590         &sensor_dev_attr_in6_min.dev_attr.attr,
2591         &sensor_dev_attr_in6_max.dev_attr.attr,
2592         &sensor_dev_attr_in6_alarm.dev_attr.attr,
2593         &sensor_dev_attr_in6_beep.dev_attr.attr,        /* 34 */
2594
2595         &sensor_dev_attr_in7_input.dev_attr.attr,
2596         &sensor_dev_attr_in7_min.dev_attr.attr,
2597         &sensor_dev_attr_in7_max.dev_attr.attr,
2598         &sensor_dev_attr_in7_alarm.dev_attr.attr,
2599         &sensor_dev_attr_in7_beep.dev_attr.attr,        /* 39 */
2600
2601         &sensor_dev_attr_in8_input.dev_attr.attr,       /* 40 */
2602         &sensor_dev_attr_in9_input.dev_attr.attr,       /* 41 */
2603         &sensor_dev_attr_in10_input.dev_attr.attr,      /* 42 */
2604         &sensor_dev_attr_in11_input.dev_attr.attr,      /* 43 */
2605         &sensor_dev_attr_in12_input.dev_attr.attr,      /* 44 */
2606         NULL
2607 };
2608
2609 static const struct attribute_group it87_group_in = {
2610         .attrs = it87_attributes_in,
2611         .is_visible = it87_in_is_visible,
2612 };
2613
2614 static umode_t it87_temp_is_visible(struct kobject *kobj,
2615                                     struct attribute *attr, int index)
2616 {
2617         struct device *dev = container_of(kobj, struct device, kobj);
2618         struct it87_data *data = dev_get_drvdata(dev);
2619         int i = index / 7;      /* temperature index */
2620         int a = index % 7;      /* attribute index */
2621
2622         if (!(data->has_temp & BIT(i)))
2623                 return 0;
2624
2625         if (a && i >= data->num_temp_limit)
2626                 return 0;
2627
2628         if (a == 3) {
2629                 int type = get_temp_type(data, i);
2630
2631                 if (type == 0)
2632                         return 0;
2633                 if (has_bank_sel(data))
2634                         return 0444;
2635                 return attr->mode;
2636         }
2637
2638         if (a == 5 && i >= data->num_temp_offset)
2639                 return 0;
2640
2641         if (a == 6 && !data->has_beep)
2642                 return 0;
2643
2644         return attr->mode;
2645 }
2646
2647 static struct attribute *it87_attributes_temp[] = {
2648         &sensor_dev_attr_temp1_input.dev_attr.attr,
2649         &sensor_dev_attr_temp1_max.dev_attr.attr,
2650         &sensor_dev_attr_temp1_min.dev_attr.attr,
2651         &sensor_dev_attr_temp1_type.dev_attr.attr,      /* 3 */
2652         &sensor_dev_attr_temp1_alarm.dev_attr.attr,
2653         &sensor_dev_attr_temp1_offset.dev_attr.attr,    /* 5 */
2654         &sensor_dev_attr_temp1_beep.dev_attr.attr,      /* 6 */
2655
2656         &sensor_dev_attr_temp2_input.dev_attr.attr,     /* 7 */
2657         &sensor_dev_attr_temp2_max.dev_attr.attr,
2658         &sensor_dev_attr_temp2_min.dev_attr.attr,
2659         &sensor_dev_attr_temp2_type.dev_attr.attr,
2660         &sensor_dev_attr_temp2_alarm.dev_attr.attr,
2661         &sensor_dev_attr_temp2_offset.dev_attr.attr,
2662         &sensor_dev_attr_temp2_beep.dev_attr.attr,
2663
2664         &sensor_dev_attr_temp3_input.dev_attr.attr,     /* 14 */
2665         &sensor_dev_attr_temp3_max.dev_attr.attr,
2666         &sensor_dev_attr_temp3_min.dev_attr.attr,
2667         &sensor_dev_attr_temp3_type.dev_attr.attr,
2668         &sensor_dev_attr_temp3_alarm.dev_attr.attr,
2669         &sensor_dev_attr_temp3_offset.dev_attr.attr,
2670         &sensor_dev_attr_temp3_beep.dev_attr.attr,
2671
2672         &sensor_dev_attr_temp4_input.dev_attr.attr,     /* 21 */
2673         &sensor_dev_attr_temp4_max.dev_attr.attr,
2674         &sensor_dev_attr_temp4_min.dev_attr.attr,
2675         &sensor_dev_attr_temp4_type.dev_attr.attr,
2676         &sensor_dev_attr_temp4_alarm.dev_attr.attr,
2677         &sensor_dev_attr_temp4_offset.dev_attr.attr,
2678         &sensor_dev_attr_temp4_beep.dev_attr.attr,
2679
2680         &sensor_dev_attr_temp5_input.dev_attr.attr,
2681         &sensor_dev_attr_temp5_max.dev_attr.attr,
2682         &sensor_dev_attr_temp5_min.dev_attr.attr,
2683         &sensor_dev_attr_temp5_type.dev_attr.attr,
2684         &sensor_dev_attr_temp5_alarm.dev_attr.attr,
2685         &sensor_dev_attr_temp5_offset.dev_attr.attr,
2686         &sensor_dev_attr_temp5_beep.dev_attr.attr,
2687
2688         &sensor_dev_attr_temp6_input.dev_attr.attr,
2689         &sensor_dev_attr_temp6_max.dev_attr.attr,
2690         &sensor_dev_attr_temp6_min.dev_attr.attr,
2691         &sensor_dev_attr_temp6_type.dev_attr.attr,
2692         &sensor_dev_attr_temp6_alarm.dev_attr.attr,
2693         &sensor_dev_attr_temp6_offset.dev_attr.attr,
2694         &sensor_dev_attr_temp6_beep.dev_attr.attr,
2695         NULL
2696 };
2697
2698 static const struct attribute_group it87_group_temp = {
2699         .attrs = it87_attributes_temp,
2700         .is_visible = it87_temp_is_visible,
2701 };
2702
2703 static umode_t it87_is_visible(struct kobject *kobj,
2704                                struct attribute *attr, int index)
2705 {
2706         struct device *dev = container_of(kobj, struct device, kobj);
2707         struct it87_data *data = dev_get_drvdata(dev);
2708
2709         if ((index == 2 || index == 3) && !data->has_vid)
2710                 return 0;
2711
2712         if (index > 3 && !(data->in_internal & BIT(index - 4)))
2713                 return 0;
2714
2715         return attr->mode;
2716 }
2717
2718 static struct attribute *it87_attributes[] = {
2719         &dev_attr_alarms.attr,
2720         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
2721         &dev_attr_vrm.attr,                             /* 2 */
2722         &dev_attr_cpu0_vid.attr,                        /* 3 */
2723         &sensor_dev_attr_in3_label.dev_attr.attr,       /* 4 .. 7 */
2724         &sensor_dev_attr_in7_label.dev_attr.attr,
2725         &sensor_dev_attr_in8_label.dev_attr.attr,
2726         &sensor_dev_attr_in9_label.dev_attr.attr,
2727         NULL
2728 };
2729
2730 static const struct attribute_group it87_group = {
2731         .attrs = it87_attributes,
2732         .is_visible = it87_is_visible,
2733 };
2734
2735 static umode_t it87_fan_is_visible(struct kobject *kobj,
2736                                    struct attribute *attr, int index)
2737 {
2738         struct device *dev = container_of(kobj, struct device, kobj);
2739         struct it87_data *data = dev_get_drvdata(dev);
2740         int i = index / 5;      /* fan index */
2741         int a = index % 5;      /* attribute index */
2742
2743         if (index >= 15) {      /* fan 4..6 don't have divisor attributes */
2744                 i = (index - 15) / 4 + 3;
2745                 a = (index - 15) % 4;
2746         }
2747
2748         if (!(data->has_fan & BIT(i)))
2749                 return 0;
2750
2751         if (a == 3) {                           /* beep */
2752                 if (!data->has_beep)
2753                         return 0;
2754                 /* first fan beep attribute is writable */
2755                 if (i == __ffs(data->has_fan))
2756                         return attr->mode | 0200;
2757         }
2758
2759         if (a == 4 && has_16bit_fans(data))     /* divisor */
2760                 return 0;
2761
2762         return attr->mode;
2763 }
2764
2765 static struct attribute *it87_attributes_fan[] = {
2766         &sensor_dev_attr_fan1_input.dev_attr.attr,
2767         &sensor_dev_attr_fan1_min.dev_attr.attr,
2768         &sensor_dev_attr_fan1_alarm.dev_attr.attr,
2769         &sensor_dev_attr_fan1_beep.dev_attr.attr,       /* 3 */
2770         &sensor_dev_attr_fan1_div.dev_attr.attr,        /* 4 */
2771
2772         &sensor_dev_attr_fan2_input.dev_attr.attr,
2773         &sensor_dev_attr_fan2_min.dev_attr.attr,
2774         &sensor_dev_attr_fan2_alarm.dev_attr.attr,
2775         &sensor_dev_attr_fan2_beep.dev_attr.attr,
2776         &sensor_dev_attr_fan2_div.dev_attr.attr,        /* 9 */
2777
2778         &sensor_dev_attr_fan3_input.dev_attr.attr,
2779         &sensor_dev_attr_fan3_min.dev_attr.attr,
2780         &sensor_dev_attr_fan3_alarm.dev_attr.attr,
2781         &sensor_dev_attr_fan3_beep.dev_attr.attr,
2782         &sensor_dev_attr_fan3_div.dev_attr.attr,        /* 14 */
2783
2784         &sensor_dev_attr_fan4_input.dev_attr.attr,      /* 15 */
2785         &sensor_dev_attr_fan4_min.dev_attr.attr,
2786         &sensor_dev_attr_fan4_alarm.dev_attr.attr,
2787         &sensor_dev_attr_fan4_beep.dev_attr.attr,
2788
2789         &sensor_dev_attr_fan5_input.dev_attr.attr,      /* 19 */
2790         &sensor_dev_attr_fan5_min.dev_attr.attr,
2791         &sensor_dev_attr_fan5_alarm.dev_attr.attr,
2792         &sensor_dev_attr_fan5_beep.dev_attr.attr,
2793
2794         &sensor_dev_attr_fan6_input.dev_attr.attr,      /* 23 */
2795         &sensor_dev_attr_fan6_min.dev_attr.attr,
2796         &sensor_dev_attr_fan6_alarm.dev_attr.attr,
2797         &sensor_dev_attr_fan6_beep.dev_attr.attr,
2798         NULL
2799 };
2800
2801 static const struct attribute_group it87_group_fan = {
2802         .attrs = it87_attributes_fan,
2803         .is_visible = it87_fan_is_visible,
2804 };
2805
2806 static umode_t it87_pwm_is_visible(struct kobject *kobj,
2807                                    struct attribute *attr, int index)
2808 {
2809         struct device *dev = container_of(kobj, struct device, kobj);
2810         struct it87_data *data = dev_get_drvdata(dev);
2811         int i = index / 4;      /* pwm index */
2812         int a = index % 4;      /* attribute index */
2813
2814         if (!(data->has_pwm & BIT(i)))
2815                 return 0;
2816
2817         /* pwmX_auto_channels_temp is only writable if auto pwm is supported */
2818         if (a == 3 && (has_old_autopwm(data) || has_newer_autopwm(data)))
2819                 return attr->mode | 0200;
2820
2821         /* pwm2_freq is writable if there are two pwm frequency selects */
2822         if (has_pwm_freq2(data) && i == 1 && a == 2)
2823                 return attr->mode | 0200;
2824
2825         return attr->mode;
2826 }
2827
2828 static struct attribute *it87_attributes_pwm[] = {
2829         &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2830         &sensor_dev_attr_pwm1.dev_attr.attr,
2831         &sensor_dev_attr_pwm1_freq.dev_attr.attr,
2832         &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
2833
2834         &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2835         &sensor_dev_attr_pwm2.dev_attr.attr,
2836         &sensor_dev_attr_pwm2_freq.dev_attr.attr,
2837         &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
2838
2839         &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2840         &sensor_dev_attr_pwm3.dev_attr.attr,
2841         &sensor_dev_attr_pwm3_freq.dev_attr.attr,
2842         &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
2843
2844         &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2845         &sensor_dev_attr_pwm4.dev_attr.attr,
2846         &sensor_dev_attr_pwm4_freq.dev_attr.attr,
2847         &sensor_dev_attr_pwm4_auto_channels_temp.dev_attr.attr,
2848
2849         &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2850         &sensor_dev_attr_pwm5.dev_attr.attr,
2851         &sensor_dev_attr_pwm5_freq.dev_attr.attr,
2852         &sensor_dev_attr_pwm5_auto_channels_temp.dev_attr.attr,
2853
2854         &sensor_dev_attr_pwm6_enable.dev_attr.attr,
2855         &sensor_dev_attr_pwm6.dev_attr.attr,
2856         &sensor_dev_attr_pwm6_freq.dev_attr.attr,
2857         &sensor_dev_attr_pwm6_auto_channels_temp.dev_attr.attr,
2858
2859         NULL
2860 };
2861
2862 static const struct attribute_group it87_group_pwm = {
2863         .attrs = it87_attributes_pwm,
2864         .is_visible = it87_pwm_is_visible,
2865 };
2866
2867 static umode_t it87_auto_pwm_is_visible(struct kobject *kobj,
2868                                         struct attribute *attr, int index)
2869 {
2870         struct device *dev = container_of(kobj, struct device, kobj);
2871         struct it87_data *data = dev_get_drvdata(dev);
2872         int i = index / 11;     /* pwm index */
2873         int a = index % 11;     /* attribute index */
2874
2875         if (index >= 33) {      /* pwm 4..6 */
2876                 i = (index - 33) / 6 + 3;
2877                 a = (index - 33) % 6 + 4;
2878         }
2879
2880         if (!(data->has_pwm & BIT(i)))
2881                 return 0;
2882
2883         if (has_newer_autopwm(data)) {
2884                 if (a < 4)      /* no auto point pwm */
2885                         return 0;
2886                 if (a == 8)     /* no auto_point4 */
2887                         return 0;
2888         }
2889         if (has_old_autopwm(data)) {
2890                 if (a >= 9)     /* no pwm_auto_start, pwm_auto_slope */
2891                         return 0;
2892         }
2893
2894         return attr->mode;
2895 }
2896
2897 static struct attribute *it87_attributes_auto_pwm[] = {
2898         &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
2899         &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
2900         &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
2901         &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
2902         &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
2903         &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
2904         &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
2905         &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
2906         &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
2907         &sensor_dev_attr_pwm1_auto_start.dev_attr.attr,
2908         &sensor_dev_attr_pwm1_auto_slope.dev_attr.attr,
2909
2910         &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,    /* 11 */
2911         &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
2912         &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
2913         &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
2914         &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
2915         &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
2916         &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
2917         &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
2918         &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
2919         &sensor_dev_attr_pwm2_auto_start.dev_attr.attr,
2920         &sensor_dev_attr_pwm2_auto_slope.dev_attr.attr,
2921
2922         &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,    /* 22 */
2923         &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
2924         &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
2925         &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
2926         &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
2927         &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
2928         &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
2929         &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
2930         &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
2931         &sensor_dev_attr_pwm3_auto_start.dev_attr.attr,
2932         &sensor_dev_attr_pwm3_auto_slope.dev_attr.attr,
2933
2934         &sensor_dev_attr_pwm4_auto_point1_temp.dev_attr.attr,   /* 33 */
2935         &sensor_dev_attr_pwm4_auto_point1_temp_hyst.dev_attr.attr,
2936         &sensor_dev_attr_pwm4_auto_point2_temp.dev_attr.attr,
2937         &sensor_dev_attr_pwm4_auto_point3_temp.dev_attr.attr,
2938         &sensor_dev_attr_pwm4_auto_start.dev_attr.attr,
2939         &sensor_dev_attr_pwm4_auto_slope.dev_attr.attr,
2940
2941         &sensor_dev_attr_pwm5_auto_point1_temp.dev_attr.attr,
2942         &sensor_dev_attr_pwm5_auto_point1_temp_hyst.dev_attr.attr,
2943         &sensor_dev_attr_pwm5_auto_point2_temp.dev_attr.attr,
2944         &sensor_dev_attr_pwm5_auto_point3_temp.dev_attr.attr,
2945         &sensor_dev_attr_pwm5_auto_start.dev_attr.attr,
2946         &sensor_dev_attr_pwm5_auto_slope.dev_attr.attr,
2947
2948         &sensor_dev_attr_pwm6_auto_point1_temp.dev_attr.attr,
2949         &sensor_dev_attr_pwm6_auto_point1_temp_hyst.dev_attr.attr,
2950         &sensor_dev_attr_pwm6_auto_point2_temp.dev_attr.attr,
2951         &sensor_dev_attr_pwm6_auto_point3_temp.dev_attr.attr,
2952         &sensor_dev_attr_pwm6_auto_start.dev_attr.attr,
2953         &sensor_dev_attr_pwm6_auto_slope.dev_attr.attr,
2954
2955         NULL,
2956 };
2957
2958 static const struct attribute_group it87_group_auto_pwm = {
2959         .attrs = it87_attributes_auto_pwm,
2960         .is_visible = it87_auto_pwm_is_visible,
2961 };
2962
2963 /* SuperIO detection - will change isa_address if a chip is found */
2964 static int __init it87_find(int sioaddr, unsigned short *address,
2965                             phys_addr_t *mmio_address,
2966                             struct it87_sio_data *sio_data)
2967 {
2968         const struct it87_devices *config;
2969         phys_addr_t base = 0;
2970         bool doexit = true;
2971         char mmio_str[32];
2972         u16 chip_type;
2973         int err;
2974
2975         err = superio_enter(sioaddr);
2976         if (err)
2977                 return err;
2978
2979         sio_data->sioaddr = sioaddr;
2980
2981         err = -ENODEV;
2982         chip_type = superio_inw(sioaddr, DEVID);
2983         if (chip_type == 0xffff)
2984                 goto exit;
2985
2986         if (force_id)
2987                 chip_type = force_id;
2988
2989         switch (chip_type) {
2990         case IT8705F_DEVID:
2991                 sio_data->type = it87;
2992                 break;
2993         case IT8712F_DEVID:
2994                 sio_data->type = it8712;
2995                 break;
2996         case IT8716F_DEVID:
2997         case IT8726F_DEVID:
2998                 sio_data->type = it8716;
2999                 break;
3000         case IT8718F_DEVID:
3001                 sio_data->type = it8718;
3002                 break;
3003         case IT8720F_DEVID:
3004                 sio_data->type = it8720;
3005                 break;
3006         case IT8721F_DEVID:
3007                 sio_data->type = it8721;
3008                 break;
3009         case IT8728F_DEVID:
3010                 sio_data->type = it8728;
3011                 break;
3012         case IT8732F_DEVID:
3013                 sio_data->type = it8732;
3014                 break;
3015         case IT8792E_DEVID:
3016                 sio_data->type = it8792;
3017                 /*
3018                  * Disabling configuration mode on IT8792E can result in system
3019                  * hang-ups and access failures to the Super-IO chip at the
3020                  * second SIO address. Never exit configuration mode on this
3021                  * chip to avoid the problem.
3022                  */
3023                 doexit = false;
3024                 break;
3025         case IT8771E_DEVID:
3026                 sio_data->type = it8771;
3027                 break;
3028         case IT8772E_DEVID:
3029                 sio_data->type = it8772;
3030                 break;
3031         case IT8781F_DEVID:
3032                 sio_data->type = it8781;
3033                 break;
3034         case IT8782F_DEVID:
3035                 sio_data->type = it8782;
3036                 break;
3037         case IT8783E_DEVID:
3038                 sio_data->type = it8783;
3039                 break;
3040         case IT8786E_DEVID:
3041                 sio_data->type = it8786;
3042                 break;
3043         case IT8790E_DEVID:
3044                 sio_data->type = it8790;
3045                 doexit = false;         /* See IT8792E comment above */
3046                 break;
3047         case IT8603E_DEVID:
3048         case IT8623E_DEVID:
3049                 sio_data->type = it8603;
3050                 break;
3051         case IT8606E_DEVID:
3052                 sio_data->type = it8606;
3053                 break;
3054         case IT8607E_DEVID:
3055                 sio_data->type = it8607;
3056                 break;
3057         case IT8613E_DEVID:
3058                 sio_data->type = it8613;
3059                 break;
3060         case IT8620E_DEVID:
3061                 sio_data->type = it8620;
3062                 break;
3063         case IT8622E_DEVID:
3064                 sio_data->type = it8622;
3065                 break;
3066         case IT8625E_DEVID:
3067                 sio_data->type = it8625;
3068                 break;
3069         case IT8628E_DEVID:
3070                 sio_data->type = it8628;
3071                 break;
3072         case IT8655E_DEVID:
3073                 sio_data->type = it8655;
3074                 break;
3075         case IT8665E_DEVID:
3076                 sio_data->type = it8665;
3077                 break;
3078         case IT8686E_DEVID:
3079                 sio_data->type = it8686;
3080                 break;
3081         case 0xffff:    /* No device at all */
3082                 goto exit;
3083         default:
3084                 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
3085                 goto exit;
3086         }
3087
3088         superio_select(sioaddr, PME);
3089         if (!(superio_inb(sioaddr, IT87_ACT_REG) & 0x01)) {
3090                 pr_info("Device not activated, skipping\n");
3091                 goto exit;
3092         }
3093
3094         *address = superio_inw(sioaddr, IT87_BASE_REG) & ~(IT87_EXTENT - 1);
3095         if (*address == 0) {
3096                 pr_info("Base address not set, skipping\n");
3097                 goto exit;
3098         }
3099
3100         sio_data->doexit = doexit;
3101
3102         err = 0;
3103         sio_data->revision = superio_inb(sioaddr, DEVREV) & 0x0f;
3104
3105         config = &it87_devices[sio_data->type];
3106
3107         if (has_mmio(config) && mmio) {
3108                 u8 reg;
3109
3110                 reg = superio_inb(sioaddr, IT87_EC_HWM_MIO_REG);
3111                 if (reg & BIT(5)) {
3112                         base = 0xf0000000 + ((reg & 0x0f) << 24);
3113                         base += (reg & 0xc0) << 14;
3114                 }
3115         }
3116         *mmio_address = base;
3117
3118         mmio_str[0] = '\0';
3119         if (base)
3120                 snprintf(mmio_str, sizeof(mmio_str), " [MMIO at %pa]", &base);
3121
3122         pr_info("Found %s chip at 0x%x%s, revision %d\n",
3123                 it87_devices[sio_data->type].model,
3124                 *address, mmio_str, sio_data->revision);
3125
3126         /* in7 (VSB or VCCH5V) is always internal on some chips */
3127         if (has_in7_internal(config))
3128                 sio_data->internal |= BIT(1);
3129
3130         /* in8 (Vbat) is always internal */
3131         sio_data->internal |= BIT(2);
3132
3133         /* in9 (AVCC3), always internal if supported */
3134         if (has_avcc3(config))
3135                 sio_data->internal |= BIT(3); /* in9 is AVCC */
3136         else
3137                 sio_data->skip_in |= BIT(9);
3138
3139         if (!has_four_pwm(config))
3140                 sio_data->skip_pwm |= BIT(3) | BIT(4) | BIT(5);
3141         else if (!has_five_pwm(config))
3142                 sio_data->skip_pwm |= BIT(4) | BIT(5);
3143         else if (!has_six_pwm(config))
3144                 sio_data->skip_pwm |= BIT(5);
3145
3146         if (!has_vid(config))
3147                 sio_data->skip_vid = 1;
3148
3149         /* Read GPIO config and VID value from LDN 7 (GPIO) */
3150         if (sio_data->type == it87) {
3151                 /* The IT8705F has a different LD number for GPIO */
3152                 superio_select(sioaddr, 5);
3153                 sio_data->beep_pin = superio_inb(sioaddr,
3154                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3155         } else if (sio_data->type == it8783) {
3156                 int reg25, reg27, reg2a, reg2c, regef;
3157
3158                 superio_select(sioaddr, GPIO);
3159
3160                 reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
3161                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3162                 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
3163                 reg2c = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3164                 regef = superio_inb(sioaddr, IT87_SIO_SPI_REG);
3165
3166                 /* Check if fan3 is there or not */
3167                 if ((reg27 & BIT(0)) || !(reg2c & BIT(2)))
3168                         sio_data->skip_fan |= BIT(2);
3169                 if ((reg25 & BIT(4)) ||
3170                     (!(reg2a & BIT(1)) && (regef & BIT(0))))
3171                         sio_data->skip_pwm |= BIT(2);
3172
3173                 /* Check if fan2 is there or not */
3174                 if (reg27 & BIT(7))
3175                         sio_data->skip_fan |= BIT(1);
3176                 if (reg27 & BIT(3))
3177                         sio_data->skip_pwm |= BIT(1);
3178
3179                 /* VIN5 */
3180                 if ((reg27 & BIT(0)) || (reg2c & BIT(2)))
3181                         sio_data->skip_in |= BIT(5); /* No VIN5 */
3182
3183                 /* VIN6 */
3184                 if (reg27 & BIT(1))
3185                         sio_data->skip_in |= BIT(6); /* No VIN6 */
3186
3187                 /*
3188                  * VIN7
3189                  * Does not depend on bit 2 of Reg2C, contrary to datasheet.
3190                  */
3191                 if (reg27 & BIT(2)) {
3192                         /*
3193                          * The data sheet is a bit unclear regarding the
3194                          * internal voltage divider for VCCH5V. It says
3195                          * "This bit enables and switches VIN7 (pin 91) to the
3196                          * internal voltage divider for VCCH5V".
3197                          * This is different to other chips, where the internal
3198                          * voltage divider would connect VIN7 to an internal
3199                          * voltage source. Maybe that is the case here as well.
3200                          *
3201                          * Since we don't know for sure, re-route it if that is
3202                          * not the case, and ask the user to report if the
3203                          * resulting voltage is sane.
3204                          */
3205                         if (!(reg2c & BIT(1))) {
3206                                 reg2c |= BIT(1);
3207                                 superio_outb(sioaddr, IT87_SIO_PINX2_REG,
3208                                              reg2c);
3209                                 pr_notice("Routing internal VCCH5V to in7.\n");
3210                         }
3211                         pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
3212                         pr_notice("Please report if it displays a reasonable voltage.\n");
3213                 }
3214
3215                 if (reg2c & BIT(0))
3216                         sio_data->internal |= BIT(0);
3217                 if (reg2c & BIT(1))
3218                         sio_data->internal |= BIT(1);
3219
3220                 sio_data->beep_pin = superio_inb(sioaddr,
3221                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3222         } else if (sio_data->type == it8603 || sio_data->type == it8606 ||
3223                    sio_data->type == it8607) {
3224                 int reg27, reg29;
3225
3226                 superio_select(sioaddr, GPIO);
3227
3228                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3229
3230                 /* Check if fan3 is there or not */
3231                 if (reg27 & BIT(6))
3232                         sio_data->skip_pwm |= BIT(2);
3233                 if (reg27 & BIT(7))
3234                         sio_data->skip_fan |= BIT(2);
3235
3236                 /* Check if fan2 is there or not */
3237                 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3238                 if (reg29 & BIT(1))
3239                         sio_data->skip_pwm |= BIT(1);
3240                 if (reg29 & BIT(2))
3241                         sio_data->skip_fan |= BIT(1);
3242
3243                 switch (sio_data->type) {
3244                 case it8603:
3245                         sio_data->skip_in |= BIT(5); /* No VIN5 */
3246                         sio_data->skip_in |= BIT(6); /* No VIN6 */
3247                         break;
3248                 case it8607:
3249                         sio_data->skip_pwm |= BIT(0);/* No fan1 */
3250                         sio_data->skip_fan |= BIT(0);
3251                 default:
3252                         break;
3253                 }
3254
3255                 sio_data->beep_pin = superio_inb(sioaddr,
3256                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3257         } else if (sio_data->type == it8613) {
3258                 int reg27, reg29, reg2a;
3259
3260                 superio_select(sioaddr, GPIO);
3261
3262                 /* Check for pwm3, fan3, pwm5, fan5 */
3263                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3264                 if (reg27 & BIT(1))
3265                         sio_data->skip_fan |= BIT(4);
3266                 if (reg27 & BIT(3))
3267                         sio_data->skip_pwm |= BIT(4);
3268                 if (reg27 & BIT(6))
3269                         sio_data->skip_pwm |= BIT(2);
3270                 if (reg27 & BIT(7))
3271                         sio_data->skip_fan |= BIT(2);
3272
3273                 /* Check for pwm2, fan2 */
3274                 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3275                 if (reg29 & BIT(1))
3276                         sio_data->skip_pwm |= BIT(1);
3277                 if (reg29 & BIT(2))
3278                         sio_data->skip_fan |= BIT(1);
3279
3280                 /* Check for pwm4, fan4 */
3281                 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
3282                 if (!(reg2a & BIT(0)) || (reg29 & BIT(7))) {
3283                         sio_data->skip_fan |= BIT(3);
3284                         sio_data->skip_pwm |= BIT(3);
3285                 }
3286
3287                 sio_data->skip_pwm |= BIT(0); /* No pwm1 */
3288                 sio_data->skip_fan |= BIT(0); /* No fan1 */
3289                 sio_data->skip_in |= BIT(3);  /* No VIN3 */
3290                 sio_data->skip_in |= BIT(6);  /* No VIN6 */
3291
3292                 sio_data->beep_pin = superio_inb(sioaddr,
3293                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3294         } else if (sio_data->type == it8620 || sio_data->type == it8628 ||
3295                    sio_data->type == it8686) {
3296                 int reg;
3297
3298                 superio_select(sioaddr, GPIO);
3299
3300                 /* Check for pwm5 */
3301                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
3302                 if (reg & BIT(6))
3303                         sio_data->skip_pwm |= BIT(4);
3304
3305                 /* Check for fan4, fan5 */
3306                 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
3307                 if (!(reg & BIT(5)))
3308                         sio_data->skip_fan |= BIT(3);
3309                 if (!(reg & BIT(4)))
3310                         sio_data->skip_fan |= BIT(4);
3311
3312                 /* Check for pwm3, fan3 */
3313                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3314                 if (reg & BIT(6))
3315                         sio_data->skip_pwm |= BIT(2);
3316                 if (reg & BIT(7))
3317                         sio_data->skip_fan |= BIT(2);
3318
3319                 /* Check for pwm4 */
3320                 reg = superio_inb(sioaddr, IT87_SIO_GPIO4_REG);
3321                 if (reg & BIT(2))
3322                         sio_data->skip_pwm |= BIT(3);
3323
3324                 /* Check for pwm2, fan2 */
3325                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3326                 if (reg & BIT(1))
3327                         sio_data->skip_pwm |= BIT(1);
3328                 if (reg & BIT(2))
3329                         sio_data->skip_fan |= BIT(1);
3330                 /* Check for pwm6, fan6 */
3331                 if (!(reg & BIT(7))) {
3332                         sio_data->skip_pwm |= BIT(5);
3333                         sio_data->skip_fan |= BIT(5);
3334                 }
3335
3336                 /* Check if AVCC is on VIN3 */
3337                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3338                 if (reg & BIT(0)) {
3339                         /* For it8686, the bit just enables AVCC3 */
3340                         if (sio_data->type != it8686)
3341                                 sio_data->internal |= BIT(0);
3342                 } else {
3343                         sio_data->internal &= ~BIT(3);
3344                         sio_data->skip_in |= BIT(9);
3345                 }
3346
3347                 sio_data->beep_pin = superio_inb(sioaddr,
3348                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3349         } else if (sio_data->type == it8622) {
3350                 int reg;
3351
3352                 superio_select(sioaddr, GPIO);
3353
3354                 /* Check for pwm4, fan4 */
3355                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
3356                 if (reg & BIT(6))
3357                         sio_data->skip_fan |= BIT(3);
3358                 if (reg & BIT(5))
3359                         sio_data->skip_pwm |= BIT(3);
3360
3361                 /* Check for pwm3, fan3, pwm5, fan5 */
3362                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3363                 if (reg & BIT(6))
3364                         sio_data->skip_pwm |= BIT(2);
3365                 if (reg & BIT(7))
3366                         sio_data->skip_fan |= BIT(2);
3367                 if (reg & BIT(3))
3368                         sio_data->skip_pwm |= BIT(4);
3369                 if (reg & BIT(1))
3370                         sio_data->skip_fan |= BIT(4);
3371
3372                 /* Check for pwm2, fan2 */
3373                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3374                 if (reg & BIT(1))
3375                         sio_data->skip_pwm |= BIT(1);
3376                 if (reg & BIT(2))
3377                         sio_data->skip_fan |= BIT(1);
3378
3379                 /* Check for AVCC */
3380                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3381                 if (!(reg & BIT(0)))
3382                         sio_data->skip_in |= BIT(9);
3383
3384                 sio_data->beep_pin = superio_inb(sioaddr,
3385                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3386         } else if (sio_data->type == it8732) {
3387                 int reg;
3388
3389                 superio_select(sioaddr, GPIO);
3390
3391                 /* Check for pwm2, fan2 */
3392                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3393                 if (reg & BIT(1))
3394                         sio_data->skip_pwm |= BIT(1);
3395                 if (reg & BIT(2))
3396                         sio_data->skip_fan |= BIT(1);
3397
3398                 /* Check for pwm3, fan3, fan4 */
3399                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3400                 if (reg & BIT(6))
3401                         sio_data->skip_pwm |= BIT(2);
3402                 if (reg & BIT(7))
3403                         sio_data->skip_fan |= BIT(2);
3404                 if (reg & BIT(5))
3405                         sio_data->skip_fan |= BIT(3);
3406
3407                 /* Check if AVCC is on VIN3 */
3408                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3409                 if (reg & BIT(0))
3410                         sio_data->internal |= BIT(0);
3411
3412                 sio_data->beep_pin = superio_inb(sioaddr,
3413                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3414         } else if (sio_data->type == it8655) {
3415                 int reg;
3416
3417                 superio_select(sioaddr, GPIO);
3418
3419                 /* Check for pwm2 */
3420                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3421                 if (reg & BIT(1))
3422                         sio_data->skip_pwm |= BIT(1);
3423
3424                 /* Check for fan2 */
3425                 reg = superio_inb(sioaddr, IT87_SIO_PINX4_REG);
3426                 if (reg & BIT(4))
3427                         sio_data->skip_fan |= BIT(1);
3428
3429                 /* Check for pwm3, fan3 */
3430                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3431                 if (reg & BIT(6))
3432                         sio_data->skip_pwm |= BIT(2);
3433                 if (reg & BIT(7))
3434                         sio_data->skip_fan |= BIT(2);
3435
3436                 sio_data->beep_pin = superio_inb(sioaddr,
3437                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3438         } else if (sio_data->type == it8665 || sio_data->type == it8625) {
3439                 int reg27, reg29, reg2d, regd3;
3440
3441                 superio_select(sioaddr, GPIO);
3442
3443                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3444                 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3445                 reg2d = superio_inb(sioaddr, IT87_SIO_PINX4_REG);
3446                 regd3 = superio_inb(sioaddr, IT87_SIO_GPIO9_REG);
3447
3448                 /* Check for pwm2 */
3449                 if (reg29 & BIT(1))
3450                         sio_data->skip_pwm |= BIT(1);
3451
3452                 /* Check for pwm3, fan3 */
3453                 if (reg27 & BIT(6))
3454                         sio_data->skip_pwm |= BIT(2);
3455                 if (reg27 & BIT(7))
3456                         sio_data->skip_fan |= BIT(2);
3457
3458                 /* Check for fan2, pwm4, fan4, pwm5, fan5 */
3459                 if (sio_data->type == it8625) {
3460                         int reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
3461
3462                         if (reg29 & BIT(2))
3463                                 sio_data->skip_fan |= BIT(1);
3464                         if (reg25 & BIT(6))
3465                                 sio_data->skip_fan |= BIT(3);
3466                         if (reg25 & BIT(5))
3467                                 sio_data->skip_pwm |= BIT(3);
3468                         if (reg27 & BIT(3))
3469                                 sio_data->skip_pwm |= BIT(4);
3470                         if (!(reg27 & BIT(1)))
3471                                 sio_data->skip_fan |= BIT(4);
3472                 } else {
3473                         int reg26 = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
3474
3475                         if (reg2d & BIT(4))
3476                                 sio_data->skip_fan |= BIT(1);
3477                         if (regd3 & BIT(2))
3478                                 sio_data->skip_pwm |= BIT(3);
3479                         if (regd3 & BIT(3))
3480                                 sio_data->skip_fan |= BIT(3);
3481                         if (reg26 & BIT(5))
3482                                 sio_data->skip_pwm |= BIT(4);
3483                         /*
3484                          * Table 6-1 in datasheet claims that FAN_TAC5 would
3485                          * be enabled with 26h[4]=0. This contradicts with the
3486                          * information in section 8.3.9 and with feedback from
3487                          * users.
3488                          */
3489                         if (!(reg26 & BIT(4)))
3490                                 sio_data->skip_fan |= BIT(4);
3491                 }
3492
3493                 /* Check for pwm6, fan6 */
3494                 if (regd3 & BIT(0))
3495                         sio_data->skip_pwm |= BIT(5);
3496                 if (regd3 & BIT(1))
3497                         sio_data->skip_fan |= BIT(5);
3498
3499                 sio_data->beep_pin = superio_inb(sioaddr,
3500                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3501         } else {
3502                 int reg;
3503                 bool uart6;
3504
3505                 superio_select(sioaddr, GPIO);
3506
3507                 /* Check for fan4, fan5 */
3508                 if (has_five_fans(config)) {
3509                         reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
3510                         switch (sio_data->type) {
3511                         case it8718:
3512                                 if (reg & BIT(5))
3513                                         sio_data->skip_fan |= BIT(3);
3514                                 if (reg & BIT(4))
3515                                         sio_data->skip_fan |= BIT(4);
3516                                 break;
3517                         case it8720:
3518                         case it8721:
3519                         case it8728:
3520                                 if (!(reg & BIT(5)))
3521                                         sio_data->skip_fan |= BIT(3);
3522                                 if (!(reg & BIT(4)))
3523                                         sio_data->skip_fan |= BIT(4);
3524                                 break;
3525                         default:
3526                                 break;
3527                         }
3528                 }
3529
3530                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3531                 if (!sio_data->skip_vid) {
3532                         /* We need at least 4 VID pins */
3533                         if (reg & 0x0f) {
3534                                 pr_info("VID is disabled (pins used for GPIO)\n");
3535                                 sio_data->skip_vid = 1;
3536                         }
3537                 }
3538
3539                 /* Check if fan3 is there or not */
3540                 if (reg & BIT(6))
3541                         sio_data->skip_pwm |= BIT(2);
3542                 if (reg & BIT(7))
3543                         sio_data->skip_fan |= BIT(2);
3544
3545                 /* Check if fan2 is there or not */
3546                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3547                 if (reg & BIT(1))
3548                         sio_data->skip_pwm |= BIT(1);
3549                 if (reg & BIT(2))
3550                         sio_data->skip_fan |= BIT(1);
3551
3552                 if ((sio_data->type == it8718 || sio_data->type == it8720) &&
3553                     !(sio_data->skip_vid))
3554                         sio_data->vid_value = superio_inb(sioaddr,
3555                                                           IT87_SIO_VID_REG);
3556
3557                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3558
3559                 uart6 = sio_data->type == it8782 && (reg & BIT(2));
3560
3561                 /*
3562                  * The IT8720F has no VIN7 pin, so VCCH should always be
3563                  * routed internally to VIN7 with an internal divider.
3564                  * Curiously, there still is a configuration bit to control
3565                  * this, which means it can be set incorrectly. And even
3566                  * more curiously, many boards out there are improperly
3567                  * configured, even though the IT8720F datasheet claims
3568                  * that the internal routing of VCCH to VIN7 is the default
3569                  * setting. So we force the internal routing in this case.
3570                  *
3571                  * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
3572                  * If UART6 is enabled, re-route VIN7 to the internal divider
3573                  * if that is not already the case.
3574                  */
3575                 if ((sio_data->type == it8720 || uart6) && !(reg & BIT(1))) {
3576                         reg |= BIT(1);
3577                         superio_outb(sioaddr, IT87_SIO_PINX2_REG, reg);
3578                         pr_notice("Routing internal VCCH to in7\n");
3579                 }
3580                 if (reg & BIT(0))
3581                         sio_data->internal |= BIT(0);
3582                 if (reg & BIT(1))
3583                         sio_data->internal |= BIT(1);
3584
3585                 /*
3586                  * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
3587                  * While VIN7 can be routed to the internal voltage divider,
3588                  * VIN5 and VIN6 are not available if UART6 is enabled.
3589                  *
3590                  * Also, temp3 is not available if UART6 is enabled and TEMPIN3
3591                  * is the temperature source. Since we can not read the
3592                  * temperature source here, skip_temp is preliminary.
3593                  */
3594                 if (uart6) {
3595                         sio_data->skip_in |= BIT(5) | BIT(6);
3596                         sio_data->skip_temp |= BIT(2);
3597                 }
3598
3599                 sio_data->beep_pin = superio_inb(sioaddr,
3600                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3601         }
3602         if (sio_data->beep_pin)
3603                 pr_info("Beeping is supported\n");
3604
3605         if (config->smbus_bitmap && !base) {
3606                 u8 reg;
3607
3608                 superio_select(sioaddr, PME);
3609                 reg = superio_inb(sioaddr, IT87_SPECIAL_CFG_REG);
3610                 sio_data->ec_special_config = reg;
3611                 sio_data->smbus_bitmap = reg & config->smbus_bitmap;
3612         }
3613
3614 exit:
3615         superio_exit(sioaddr, doexit);
3616         return err;
3617 }
3618
3619 static void it87_init_regs(struct platform_device *pdev)
3620 {
3621         struct it87_data *data = platform_get_drvdata(pdev);
3622
3623         /* Initialize chip specific register pointers */
3624         switch (data->type) {
3625         case it8628:
3626         case it8686:
3627                 data->REG_FAN = IT87_REG_FAN;
3628                 data->REG_FANX = IT87_REG_FANX;
3629                 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3630                 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3631                 data->REG_PWM = IT87_REG_PWM;
3632                 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET_8686;
3633                 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW_8686;
3634                 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH_8686;
3635                 break;
3636         case it8625:
3637         case it8655:
3638         case it8665:
3639                 data->REG_FAN = IT87_REG_FAN_8665;
3640                 data->REG_FANX = IT87_REG_FANX_8665;
3641                 data->REG_FAN_MIN = IT87_REG_FAN_MIN_8665;
3642                 data->REG_FANX_MIN = IT87_REG_FANX_MIN_8665;
3643                 data->REG_PWM = IT87_REG_PWM_8665;
3644                 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
3645                 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
3646                 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
3647                 break;
3648         case it8622:
3649                 data->REG_FAN = IT87_REG_FAN;
3650                 data->REG_FANX = IT87_REG_FANX;
3651                 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3652                 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3653                 data->REG_PWM = IT87_REG_PWM_8665;
3654                 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
3655                 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
3656                 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
3657                 break;
3658         case it8613:
3659                 data->REG_FAN = IT87_REG_FAN;
3660                 data->REG_FANX = IT87_REG_FANX;
3661                 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3662                 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3663                 data->REG_PWM = IT87_REG_PWM_8665;
3664                 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
3665                 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
3666                 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
3667                 break;
3668         default:
3669                 data->REG_FAN = IT87_REG_FAN;
3670                 data->REG_FANX = IT87_REG_FANX;
3671                 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3672                 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3673                 data->REG_PWM = IT87_REG_PWM;
3674                 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
3675                 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
3676                 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
3677                 break;
3678         }
3679
3680         if (data->mmio) {
3681                 data->read = it87_mmio_read;
3682                 data->write = it87_mmio_write;
3683         } else if (has_bank_sel(data)) {
3684                 data->read = it87_io_read;
3685                 data->write = it87_io_write;
3686         } else {
3687                 data->read = _it87_io_read;
3688                 data->write = _it87_io_write;
3689         }
3690 }
3691
3692 /* Called when we have found a new IT87. */
3693 static void it87_init_device(struct platform_device *pdev)
3694 {
3695         struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
3696         struct it87_data *data = platform_get_drvdata(pdev);
3697         int tmp, i;
3698         u8 mask;
3699
3700         if (has_new_tempmap(data)) {
3701                 data->pwm_temp_map_shift = 3;
3702                 data->pwm_temp_map_mask = 0x07;
3703         } else {
3704                 data->pwm_temp_map_shift = 0;
3705                 data->pwm_temp_map_mask = 0x03;
3706         }
3707
3708         /*
3709          * For each PWM channel:
3710          * - If it is in automatic mode, setting to manual mode should set
3711          *   the fan to full speed by default.
3712          * - If it is in manual mode, we need a mapping to temperature
3713          *   channels to use when later setting to automatic mode later.
3714          *   Map to the first sensor by default (we are clueless.)
3715          * In both cases, the value can (and should) be changed by the user
3716          * prior to switching to a different mode.
3717          * Note that this is no longer needed for the IT8721F and later, as
3718          * these have separate registers for the temperature mapping and the
3719          * manual duty cycle.
3720          */
3721         for (i = 0; i < NUM_AUTO_PWM; i++) {
3722                 data->pwm_temp_map[i] = 0;
3723                 data->pwm_duty[i] = 0x7f;       /* Full speed */
3724                 data->auto_pwm[i][3] = 0x7f;    /* Full speed, hard-coded */
3725         }
3726
3727         /*
3728          * Some chips seem to have default value 0xff for all limit
3729          * registers. For low voltage limits it makes no sense and triggers
3730          * alarms, so change to 0 instead. For high temperature limits, it
3731          * means -1 degree C, which surprisingly doesn't trigger an alarm,
3732          * but is still confusing, so change to 127 degrees C.
3733          */
3734         for (i = 0; i < NUM_VIN_LIMIT; i++) {
3735                 tmp = data->read(data, IT87_REG_VIN_MIN(i));
3736                 if (tmp == 0xff)
3737                         data->write(data, IT87_REG_VIN_MIN(i), 0);
3738         }
3739         for (i = 0; i < data->num_temp_limit; i++) {
3740                 tmp = data->read(data, data->REG_TEMP_HIGH[i]);
3741                 if (tmp == 0xff)
3742                         data->write(data, data->REG_TEMP_HIGH[i], 127);
3743         }
3744
3745         /*
3746          * Temperature channels are not forcibly enabled, as they can be
3747          * set to two different sensor types and we can't guess which one
3748          * is correct for a given system. These channels can be enabled at
3749          * run-time through the temp{1-3}_type sysfs accessors if needed.
3750          */
3751
3752         /* Check if voltage monitors are reset manually or by some reason */
3753         tmp = data->read(data, IT87_REG_VIN_ENABLE);
3754         if ((tmp & 0xff) == 0) {
3755                 /* Enable all voltage monitors */
3756                 data->write(data, IT87_REG_VIN_ENABLE, 0xff);
3757         }
3758
3759         /* Check if tachometers are reset manually or by some reason */
3760         mask = 0x70 & ~(sio_data->skip_fan << 4);
3761         data->fan_main_ctrl = data->read(data, IT87_REG_FAN_MAIN_CTRL);
3762         if ((data->fan_main_ctrl & mask) == 0) {
3763                 /* Enable all fan tachometers */
3764                 data->fan_main_ctrl |= mask;
3765                 data->write(data, IT87_REG_FAN_MAIN_CTRL, data->fan_main_ctrl);
3766         }
3767         data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
3768
3769         tmp = data->read(data, IT87_REG_FAN_16BIT);
3770
3771         /* Set tachometers to 16-bit mode if needed */
3772         if (has_fan16_config(data)) {
3773                 if (~tmp & 0x07 & data->has_fan) {
3774                         dev_dbg(&pdev->dev,
3775                                 "Setting fan1-3 to 16-bit mode\n");
3776                         data->write(data, IT87_REG_FAN_16BIT, tmp | 0x07);
3777                 }
3778         }
3779
3780         /* Check for additional fans */
3781         if (has_four_fans(data) && (tmp & BIT(4)))
3782                 data->has_fan |= BIT(3); /* fan4 enabled */
3783         if (has_five_fans(data) && (tmp & BIT(5)))
3784                 data->has_fan |= BIT(4); /* fan5 enabled */
3785         if (has_six_fans(data)) {
3786                 switch (data->type) {
3787                 case it8620:
3788                 case it8628:
3789                 case it8686:
3790                         if (tmp & BIT(2))
3791                                 data->has_fan |= BIT(5); /* fan6 enabled */
3792                         break;
3793                 case it8625:
3794                 case it8665:
3795                         tmp = data->read(data, IT87_REG_FAN_DIV);
3796                         if (tmp & BIT(3))
3797                                 data->has_fan |= BIT(5); /* fan6 enabled */
3798                         break;
3799                 default:
3800                         break;
3801                 }
3802         }
3803
3804         /* Fan input pins may be used for alternative functions */
3805         data->has_fan &= ~sio_data->skip_fan;
3806
3807         /* Check if pwm6 is enabled */
3808         if (has_six_pwm(data)) {
3809                 switch (data->type) {
3810                 case it8620:
3811                 case it8686:
3812                         tmp = data->read(data, IT87_REG_FAN_DIV);
3813                         if (!(tmp & BIT(3)))
3814                                 sio_data->skip_pwm |= BIT(5);
3815                         break;
3816                 default:
3817                         break;
3818                 }
3819         }
3820
3821         if (has_bank_sel(data)) {
3822                 for (i = 0; i < 3; i++)
3823                         data->temp_src[i] =
3824                                 data->read(data, IT87_REG_TEMP_SRC1[i]);
3825                 data->temp_src[3] = data->read(data, IT87_REG_TEMP_SRC2);
3826         }
3827
3828         /* Start monitoring */
3829         data->write(data, IT87_REG_CONFIG,
3830                     (data->read(data, IT87_REG_CONFIG) & 0x3e) |
3831                                         (update_vbat ? 0x41 : 0x01));
3832 }
3833
3834 /* Return 1 if and only if the PWM interface is safe to use */
3835 static int it87_check_pwm(struct device *dev)
3836 {
3837         struct it87_data *data = dev_get_drvdata(dev);
3838         /*
3839          * Some BIOSes fail to correctly configure the IT87 fans. All fans off
3840          * and polarity set to active low is sign that this is the case so we
3841          * disable pwm control to protect the user.
3842          */
3843         int tmp = data->read(data, IT87_REG_FAN_CTL);
3844
3845         if ((tmp & 0x87) == 0) {
3846                 if (fix_pwm_polarity) {
3847                         /*
3848                          * The user asks us to attempt a chip reconfiguration.
3849                          * This means switching to active high polarity and
3850                          * inverting all fan speed values.
3851                          */
3852                         int i;
3853                         u8 pwm[3];
3854
3855                         for (i = 0; i < ARRAY_SIZE(pwm); i++)
3856                                 pwm[i] = data->read(data,
3857                                                          data->REG_PWM[i]);
3858
3859                         /*
3860                          * If any fan is in automatic pwm mode, the polarity
3861                          * might be correct, as suspicious as it seems, so we
3862                          * better don't change anything (but still disable the
3863                          * PWM interface).
3864                          */
3865                         if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
3866                                 dev_info(dev,
3867                                          "Reconfiguring PWM to active high polarity\n");
3868                                 data->write(data, IT87_REG_FAN_CTL, tmp | 0x87);
3869                                 for (i = 0; i < 3; i++)
3870                                         data->write(data, data->REG_PWM[i],
3871                                                     0x7f & ~pwm[i]);
3872                                 return 1;
3873                         }
3874
3875                         dev_info(dev,
3876                                  "PWM configuration is too broken to be fixed\n");
3877                 }
3878
3879                 dev_info(dev,
3880                          "Detected broken BIOS defaults, disabling PWM interface\n");
3881                 return 0;
3882         } else if (fix_pwm_polarity) {
3883                 dev_info(dev,
3884                          "PWM configuration looks sane, won't touch\n");
3885         }
3886
3887         return 1;
3888 }
3889
3890 static int it87_probe(struct platform_device *pdev)
3891 {
3892         struct it87_data *data;
3893         struct resource *res;
3894         struct device *dev = &pdev->dev;
3895         struct it87_sio_data *sio_data = dev_get_platdata(dev);
3896         int enable_pwm_interface;
3897         struct device *hwmon_dev;
3898         int err;
3899
3900         data = devm_kzalloc(dev, sizeof(struct it87_data), GFP_KERNEL);
3901         if (!data)
3902                 return -ENOMEM;
3903
3904         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3905         if (res) {
3906                 if (!devm_request_region(dev, res->start, IT87_EC_EXTENT,
3907                                          DRVNAME)) {
3908                         dev_err(dev, "Failed to request region %pR\n", res);
3909                         return -EBUSY;
3910                 }
3911         } else {
3912                 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
3913                 data->mmio = devm_ioremap_resource(dev, res);
3914                 if (IS_ERR(data->mmio))
3915                         return PTR_ERR(data->mmio);
3916         }
3917
3918         data->addr = res->start;
3919         data->type = sio_data->type;
3920         data->sioaddr = sio_data->sioaddr;
3921         data->smbus_bitmap = sio_data->smbus_bitmap;
3922         data->ec_special_config = sio_data->ec_special_config;
3923         data->doexit = sio_data->doexit;
3924         data->features = it87_devices[sio_data->type].features;
3925         data->num_temp_limit = it87_devices[sio_data->type].num_temp_limit;
3926         data->num_temp_offset = it87_devices[sio_data->type].num_temp_offset;
3927         data->pwm_num_temp_map = it87_devices[sio_data->type].num_temp_map;
3928         data->peci_mask = it87_devices[sio_data->type].peci_mask;
3929         data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
3930
3931         /*
3932          * IT8705F Datasheet 0.4.1, 3h == Version G.
3933          * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
3934          * These are the first revisions with 16-bit tachometer support.
3935          */
3936         switch (data->type) {
3937         case it87:
3938                 if (sio_data->revision >= 0x03) {
3939                         data->features &= ~FEAT_OLD_AUTOPWM;
3940                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS;
3941                 }
3942                 break;
3943         case it8712:
3944                 if (sio_data->revision >= 0x08) {
3945                         data->features &= ~FEAT_OLD_AUTOPWM;
3946                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS |
3947                                           FEAT_FIVE_FANS;
3948                 }
3949                 break;
3950         default:
3951                 break;
3952         }
3953
3954         platform_set_drvdata(pdev, data);
3955
3956         mutex_init(&data->update_lock);
3957
3958         /* Initialize register pointers */
3959         it87_init_regs(pdev);
3960
3961         /*
3962          * We need to disable SMBus before we can read any registers in
3963          * the envmon address space, even if it is for chip identification
3964          * purposes. If the chip has SMBus client support, it likely also has
3965          * multi-page envmon registers, so we have to set the page anyway
3966          * before accessing those registers. Kind of a chicken-and-egg
3967          * problem.
3968          * Fortunately, the chip was already identified through the SIO
3969          * address space, only recent chips are affected, and this is just
3970          * an additional safeguard.
3971          */
3972         err = smbus_disable(data);
3973         if (err)
3974                 return err;
3975
3976         /* Now, we do the remaining detection. */
3977         if ((data->read(data, IT87_REG_CONFIG) & 0x80) ||
3978             data->read(data, IT87_REG_CHIPID) != 0x90) {
3979                 smbus_enable(data);
3980                 return -ENODEV;
3981         }
3982
3983         /* Check PWM configuration */
3984         enable_pwm_interface = it87_check_pwm(dev);
3985
3986         /* Starting with IT8721F, we handle scaling of internal voltages */
3987         if (has_scaling(data)) {
3988                 if (sio_data->internal & BIT(0))
3989                         data->in_scaled |= BIT(3);      /* in3 is AVCC */
3990                 if (sio_data->internal & BIT(1))
3991                         data->in_scaled |= BIT(7);      /* in7 is VSB */
3992                 if (sio_data->internal & BIT(2))
3993                         data->in_scaled |= BIT(8);      /* in8 is Vbat */
3994                 if (sio_data->internal & BIT(3))
3995                         data->in_scaled |= BIT(9);      /* in9 is AVCC */
3996         } else if (sio_data->type == it8781 || sio_data->type == it8782 ||
3997                    sio_data->type == it8783) {
3998                 if (sio_data->internal & BIT(0))
3999                         data->in_scaled |= BIT(3);      /* in3 is VCC5V */
4000                 if (sio_data->internal & BIT(1))
4001                         data->in_scaled |= BIT(7);      /* in7 is VCCH5V */
4002         }
4003
4004         data->has_temp = 0x07;
4005         if (sio_data->skip_temp & BIT(2)) {
4006                 if (sio_data->type == it8782 &&
4007                     !(data->read(data, IT87_REG_TEMP_EXTRA) & 0x80))
4008                         data->has_temp &= ~BIT(2);
4009         }
4010
4011         data->in_internal = sio_data->internal;
4012         data->has_in = 0x3ff & ~sio_data->skip_in;
4013
4014         if (has_four_temp(data)) {
4015                 data->has_temp |= BIT(3);
4016         } else if (has_six_temp(data)) {
4017                 u8 reg = data->read(data, IT87_REG_TEMP456_ENABLE);
4018
4019                 /* Check for additional temperature sensors */
4020                 if ((reg & 0x03) >= 0x02)
4021                         data->has_temp |= BIT(3);
4022                 if (((reg >> 2) & 0x03) >= 0x02)
4023                         data->has_temp |= BIT(4);
4024                 if (((reg >> 4) & 0x03) >= 0x02)
4025                         data->has_temp |= BIT(5);
4026
4027                 /* Check for additional voltage sensors */
4028                 if ((reg & 0x03) == 0x01)
4029                         data->has_in |= BIT(10);
4030                 if (((reg >> 2) & 0x03) == 0x01)
4031                         data->has_in |= BIT(11);
4032                 if (((reg >> 4) & 0x03) == 0x01)
4033                         data->has_in |= BIT(12);
4034         }
4035
4036         data->has_beep = !!sio_data->beep_pin;
4037
4038         /* Initialize the IT87 chip */
4039         it87_init_device(pdev);
4040
4041         smbus_enable(data);
4042
4043         if (!sio_data->skip_vid) {
4044                 data->has_vid = true;
4045                 data->vrm = vid_which_vrm();
4046                 /* VID reading from Super-I/O config space if available */
4047                 data->vid = sio_data->vid_value;
4048         }
4049
4050         /* Prepare for sysfs hooks */
4051         data->groups[0] = &it87_group;
4052         data->groups[1] = &it87_group_in;
4053         data->groups[2] = &it87_group_temp;
4054         data->groups[3] = &it87_group_fan;
4055
4056         if (enable_pwm_interface) {
4057                 data->has_pwm = BIT(ARRAY_SIZE(IT87_REG_PWM)) - 1;
4058                 data->has_pwm &= ~sio_data->skip_pwm;
4059
4060                 data->groups[4] = &it87_group_pwm;
4061                 if (has_old_autopwm(data) || has_newer_autopwm(data))
4062                         data->groups[5] = &it87_group_auto_pwm;
4063         }
4064
4065         hwmon_dev = devm_hwmon_device_register_with_groups(dev,
4066                                         it87_devices[sio_data->type].name,
4067                                         data, data->groups);
4068         return PTR_ERR_OR_ZERO(hwmon_dev);
4069 }
4070
4071 static struct platform_driver it87_driver = {
4072         .driver = {
4073                 .name   = DRVNAME,
4074         },
4075         .probe  = it87_probe,
4076 };
4077
4078 static int __init it87_device_add(int index, unsigned short sio_address,
4079                                   phys_addr_t mmio_address,
4080                                   const struct it87_sio_data *sio_data)
4081 {
4082         struct platform_device *pdev;
4083         struct resource res = {
4084                 .name   = DRVNAME,
4085         };
4086         int err;
4087
4088         if (mmio_address) {
4089                 res.start = mmio_address;
4090                 res.end = mmio_address + 0x400 - 1;
4091                 res.flags = IORESOURCE_MEM;
4092         } else {
4093                 res.start = sio_address + IT87_EC_OFFSET;
4094                 res.end = sio_address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1;
4095                 res.flags = IORESOURCE_IO;
4096         }
4097
4098         err = acpi_check_resource_conflict(&res);
4099         if (err) {
4100                 if (!ignore_resource_conflict)
4101                         return err;
4102         }
4103
4104         pdev = platform_device_alloc(DRVNAME, sio_address);
4105         if (!pdev)
4106                 return -ENOMEM;
4107
4108         err = platform_device_add_resources(pdev, &res, 1);
4109         if (err) {
4110                 pr_err("Device resource addition failed (%d)\n", err);
4111                 goto exit_device_put;
4112         }
4113
4114         err = platform_device_add_data(pdev, sio_data,
4115                                        sizeof(struct it87_sio_data));
4116         if (err) {
4117                 pr_err("Platform data allocation failed\n");
4118                 goto exit_device_put;
4119         }
4120
4121         err = platform_device_add(pdev);
4122         if (err) {
4123                 pr_err("Device addition failed (%d)\n", err);
4124                 goto exit_device_put;
4125         }
4126
4127         it87_pdev[index] = pdev;
4128         return 0;
4129
4130 exit_device_put:
4131         platform_device_put(pdev);
4132         return err;
4133 }
4134
4135 struct it87_dmi_data {
4136         bool sio2_force_config; /* force sio2 into configuration mode   */
4137         u8 skip_pwm;            /* pwm channels to skip for this board  */
4138 };
4139
4140 /*
4141  * On various Gigabyte AM4 boards (AB350, AX370), the second Super-IO chip
4142  * (IT8792E) needs to be in configuration mode before accessing the first
4143  * due to a bug in IT8792E which otherwise results in LPC bus access errors.
4144  * This needs to be done before accessing the first Super-IO chip since
4145  * the second chip may have been accessed prior to loading this driver.
4146  *
4147  * The problem is also reported to affect IT8795E, which is used on X299 boards
4148  * and has the same chip ID as IT8792E (0x8733). It also appears to affect
4149  * systems with IT8790E, which is used on some Z97X-Gaming boards as well as
4150  * Z87X-OC.
4151  * DMI entries for those systems will be added as they become available and
4152  * as the problem is confirmed to affect those boards.
4153  */
4154 static struct it87_dmi_data gigabyte_sio2_force = {
4155         .sio2_force_config = true,
4156 };
4157
4158 /*
4159  * On the Shuttle SN68PT, FAN_CTL2 is apparently not
4160  * connected to a fan, but to something else. One user
4161  * has reported instant system power-off when changing
4162  * the PWM2 duty cycle, so we disable it.
4163  * I use the board name string as the trigger in case
4164  * the same board is ever used in other systems.
4165  */
4166 static struct it87_dmi_data nvidia_fn68pt = {
4167         .skip_pwm = BIT(1),
4168 };
4169
4170 static const struct dmi_system_id it87_dmi_table[] __initconst = {
4171         {
4172                 .matches = {
4173                         DMI_MATCH(DMI_SYS_VENDOR,
4174                                   "Gigabyte Technology Co., Ltd."),
4175                         DMI_MATCH(DMI_BOARD_NAME, "AB350"),
4176                 },
4177                 .driver_data = &gigabyte_sio2_force,
4178         },
4179         {
4180                 .matches = {
4181                         DMI_MATCH(DMI_SYS_VENDOR,
4182                                   "Gigabyte Technology Co., Ltd."),
4183                         DMI_MATCH(DMI_BOARD_NAME, "AX370"),
4184                 },
4185                 .driver_data = &gigabyte_sio2_force,
4186         },
4187         {
4188                 .matches = {
4189                         DMI_MATCH(DMI_SYS_VENDOR,
4190                                   "Gigabyte Technology Co., Ltd."),
4191                         DMI_MATCH(DMI_BOARD_NAME, "Z97X-Gaming G1"),
4192                 },
4193                 .driver_data = &gigabyte_sio2_force,
4194         },
4195         {
4196                 .matches = {
4197                         DMI_MATCH(DMI_BOARD_VENDOR, "nVIDIA"),
4198                         DMI_MATCH(DMI_BOARD_NAME, "FN68PT"),
4199                 },
4200                 .driver_data = &nvidia_fn68pt,
4201         },
4202         { }
4203 };
4204
4205 static int __init sm_it87_init(void)
4206 {
4207         const struct dmi_system_id *dmi = dmi_first_match(it87_dmi_table);
4208         struct it87_dmi_data *dmi_data = NULL;
4209         int sioaddr[2] = { REG_2E, REG_4E };
4210         struct it87_sio_data sio_data;
4211         unsigned short isa_address;
4212         phys_addr_t mmio_address;
4213         bool found = false;
4214         int i, err;
4215
4216         pr_info("it87 driver version %s\n", IT87_DRIVER_VERSION);
4217
4218         if (dmi)
4219                 dmi_data = dmi->driver_data;
4220
4221         err = platform_driver_register(&it87_driver);
4222         if (err)
4223                 return err;
4224
4225         if (dmi_data && dmi_data->sio2_force_config)
4226                 __superio_enter(REG_4E);
4227
4228         for (i = 0; i < ARRAY_SIZE(sioaddr); i++) {
4229                 memset(&sio_data, 0, sizeof(struct it87_sio_data));
4230                 isa_address = 0;
4231                 mmio_address = 0;
4232                 err = it87_find(sioaddr[i], &isa_address, &mmio_address,
4233                                 &sio_data);
4234                 if (err || isa_address == 0)
4235                         continue;
4236
4237                 if (dmi_data)
4238                         sio_data.skip_pwm |= dmi_data->skip_pwm;
4239                 err = it87_device_add(i, isa_address, mmio_address, &sio_data);
4240                 if (err)
4241                         goto exit_dev_unregister;
4242                 found = true;
4243         }
4244
4245         if (!found) {
4246                 err = -ENODEV;
4247                 goto exit_unregister;
4248         }
4249         return 0;
4250
4251 exit_dev_unregister:
4252         /* NULL check handled by platform_device_unregister */
4253         platform_device_unregister(it87_pdev[0]);
4254 exit_unregister:
4255         platform_driver_unregister(&it87_driver);
4256         return err;
4257 }
4258
4259 static void __exit sm_it87_exit(void)
4260 {
4261         /* NULL check handled by platform_device_unregister */
4262         platform_device_unregister(it87_pdev[1]);
4263         platform_device_unregister(it87_pdev[0]);
4264         platform_driver_unregister(&it87_driver);
4265 }
4266
4267 MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>");
4268 MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
4269 module_param(update_vbat, bool, 0000);
4270 MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
4271 module_param(fix_pwm_polarity, bool, 0000);
4272 MODULE_PARM_DESC(fix_pwm_polarity,
4273                  "Force PWM polarity to active high (DANGEROUS)");
4274 MODULE_LICENSE("GPL");
4275 MODULE_VERSION(IT87_DRIVER_VERSION);
4276
4277 module_init(sm_it87_init);
4278 module_exit(sm_it87_exit);