2 * it87.c - Part of lm_sensors, Linux kernel modules for hardware
5 * The IT8705F is an LPC-based Super I/O part that contains UARTs, a
6 * parallel port, an IR port, a MIDI port, a floppy controller, etc., in
7 * addition to an Environment Controller (Enhanced Hardware Monitor and
10 * This driver supports only the Environment Controller in the IT8705F and
11 * similar parts. The other devices are supported by different drivers.
13 * Supports: IT8603E Super I/O chip w/LPC interface
14 * IT8620E Super I/O chip w/LPC interface
15 * IT8622E Super I/O chip w/LPC interface
16 * IT8623E Super I/O chip w/LPC interface
17 * IT8628E Super I/O chip w/LPC interface
18 * IT8705F Super I/O chip w/LPC interface
19 * IT8712F Super I/O chip w/LPC interface
20 * IT8716F Super I/O chip w/LPC interface
21 * IT8718F Super I/O chip w/LPC interface
22 * IT8720F Super I/O chip w/LPC interface
23 * IT8721F Super I/O chip w/LPC interface
24 * IT8726F Super I/O chip w/LPC interface
25 * IT8728F Super I/O chip w/LPC interface
26 * IT8732F Super I/O chip w/LPC interface
27 * IT8758E Super I/O chip w/LPC interface
28 * IT8771E Super I/O chip w/LPC interface
29 * IT8772E Super I/O chip w/LPC interface
30 * IT8781F Super I/O chip w/LPC interface
31 * IT8782F Super I/O chip w/LPC interface
32 * IT8783E/F Super I/O chip w/LPC interface
33 * IT8786E Super I/O chip w/LPC interface
34 * IT8790E Super I/O chip w/LPC interface
35 * IT8792E Super I/O chip w/LPC interface
36 * Sis950 A clone of the IT8705F
38 * Copyright (C) 2001 Chris Gauthron
39 * Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de>
41 * This program is free software; you can redistribute it and/or modify
42 * it under the terms of the GNU General Public License as published by
43 * the Free Software Foundation; either version 2 of the License, or
44 * (at your option) any later version.
46 * This program is distributed in the hope that it will be useful,
47 * but WITHOUT ANY WARRANTY; without even the implied warranty of
48 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
49 * GNU General Public License for more details.
52 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
54 #include <linux/bitops.h>
55 #include <linux/module.h>
56 #include <linux/init.h>
57 #include <linux/slab.h>
58 #include <linux/jiffies.h>
59 #include <linux/platform_device.h>
60 #include <linux/hwmon.h>
61 #include <linux/hwmon-sysfs.h>
62 #include <linux/hwmon-vid.h>
63 #include <linux/err.h>
64 #include <linux/mutex.h>
65 #include <linux/sysfs.h>
66 #include <linux/string.h>
67 #include <linux/dmi.h>
68 #include <linux/acpi.h>
72 #define DRVNAME "it87"
74 enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732,
75 it8771, it8772, it8781, it8782, it8783, it8786, it8790,
76 it8792, it8603, it8620, it8622, it8628 };
78 static unsigned short force_id;
79 module_param(force_id, ushort, 0);
80 MODULE_PARM_DESC(force_id, "Override the detected device ID");
82 static struct platform_device *it87_pdev[2];
84 #define REG_2E 0x2e /* The register to read/write */
85 #define REG_4E 0x4e /* Secondary register to read/write */
87 #define DEV 0x07 /* Register: Logical device select */
88 #define PME 0x04 /* The device with the fan registers in it */
90 /* The device with the IT8718F/IT8720F VID value in it */
93 #define DEVID 0x20 /* Register: Device ID */
94 #define DEVREV 0x22 /* Register: Device Revision */
96 static inline int superio_inb(int ioreg, int reg)
99 return inb(ioreg + 1);
102 static inline void superio_outb(int ioreg, int reg, int val)
105 outb(val, ioreg + 1);
108 static int superio_inw(int ioreg, int reg)
113 val = inb(ioreg + 1) << 8;
115 val |= inb(ioreg + 1);
119 static inline void superio_select(int ioreg, int ldn)
122 outb(ldn, ioreg + 1);
125 static inline int superio_enter(int ioreg)
128 * Try to reserve ioreg and ioreg + 1 for exclusive access.
130 if (!request_muxed_region(ioreg, 2, DRVNAME))
136 outb(ioreg == REG_4E ? 0xaa : 0x55, ioreg);
140 static inline void superio_exit(int ioreg)
143 outb(0x02, ioreg + 1);
144 release_region(ioreg, 2);
147 /* Logical device 4 registers */
148 #define IT8712F_DEVID 0x8712
149 #define IT8705F_DEVID 0x8705
150 #define IT8716F_DEVID 0x8716
151 #define IT8718F_DEVID 0x8718
152 #define IT8720F_DEVID 0x8720
153 #define IT8721F_DEVID 0x8721
154 #define IT8726F_DEVID 0x8726
155 #define IT8728F_DEVID 0x8728
156 #define IT8732F_DEVID 0x8732
157 #define IT8792E_DEVID 0x8733
158 #define IT8771E_DEVID 0x8771
159 #define IT8772E_DEVID 0x8772
160 #define IT8781F_DEVID 0x8781
161 #define IT8782F_DEVID 0x8782
162 #define IT8783E_DEVID 0x8783
163 #define IT8786E_DEVID 0x8786
164 #define IT8790E_DEVID 0x8790
165 #define IT8603E_DEVID 0x8603
166 #define IT8620E_DEVID 0x8620
167 #define IT8622E_DEVID 0x8622
168 #define IT8623E_DEVID 0x8623
169 #define IT8628E_DEVID 0x8628
170 #define IT87_ACT_REG 0x30
171 #define IT87_BASE_REG 0x60
173 /* Logical device 7 registers (IT8712F and later) */
174 #define IT87_SIO_GPIO1_REG 0x25
175 #define IT87_SIO_GPIO2_REG 0x26
176 #define IT87_SIO_GPIO3_REG 0x27
177 #define IT87_SIO_GPIO4_REG 0x28
178 #define IT87_SIO_GPIO5_REG 0x29
179 #define IT87_SIO_PINX1_REG 0x2a /* Pin selection */
180 #define IT87_SIO_PINX2_REG 0x2c /* Pin selection */
181 #define IT87_SIO_SPI_REG 0xef /* SPI function pin select */
182 #define IT87_SIO_VID_REG 0xfc /* VID value */
183 #define IT87_SIO_BEEP_PIN_REG 0xf6 /* Beep pin mapping */
185 /* Update battery voltage after every reading if true */
186 static bool update_vbat;
188 /* Not all BIOSes properly configure the PWM registers */
189 static bool fix_pwm_polarity;
191 /* Many IT87 constants specified below */
193 /* Length of ISA address segment */
194 #define IT87_EXTENT 8
196 /* Length of ISA address segment for Environmental Controller */
197 #define IT87_EC_EXTENT 2
199 /* Offset of EC registers from ISA base address */
200 #define IT87_EC_OFFSET 5
202 /* Where are the ISA address/data registers relative to the EC base address */
203 #define IT87_ADDR_REG_OFFSET 0
204 #define IT87_DATA_REG_OFFSET 1
206 /*----- The IT87 registers -----*/
208 #define IT87_REG_CONFIG 0x00
210 #define IT87_REG_ALARM1 0x01
211 #define IT87_REG_ALARM2 0x02
212 #define IT87_REG_ALARM3 0x03
215 * The IT8718F and IT8720F have the VID value in a different register, in
216 * Super-I/O configuration space.
218 #define IT87_REG_VID 0x0a
220 * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
221 * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
224 #define IT87_REG_FAN_DIV 0x0b
225 #define IT87_REG_FAN_16BIT 0x0c
229 * - up to 13 voltage (0 to 7, battery, avcc, 10 to 12)
230 * - up to 6 temp (1 to 6)
231 * - up to 6 fan (1 to 6)
234 static const u8 IT87_REG_FAN[] = { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c };
235 static const u8 IT87_REG_FAN_MIN[] = { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e };
236 static const u8 IT87_REG_FANX[] = { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d };
237 static const u8 IT87_REG_FANX_MIN[] = { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f };
238 static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59 };
240 #define IT87_REG_FAN_MAIN_CTRL 0x13
241 #define IT87_REG_FAN_CTL 0x14
242 static const u8 IT87_REG_PWM[] = { 0x15, 0x16, 0x17, 0x7f, 0xa7, 0xaf };
243 static const u8 IT87_REG_PWM_DUTY[] = { 0x63, 0x6b, 0x73, 0x7b, 0xa3, 0xab };
245 static const u8 IT87_REG_VIN[] = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26,
246 0x27, 0x28, 0x2f, 0x2c, 0x2d, 0x2e };
248 #define IT87_REG_TEMP(nr) (0x29 + (nr))
250 #define IT87_REG_VIN_MAX(nr) (0x30 + (nr) * 2)
251 #define IT87_REG_VIN_MIN(nr) (0x31 + (nr) * 2)
252 #define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
253 #define IT87_REG_TEMP_LOW(nr) (0x41 + (nr) * 2)
255 #define IT87_REG_VIN_ENABLE 0x50
256 #define IT87_REG_TEMP_ENABLE 0x51
257 #define IT87_REG_TEMP_EXTRA 0x55
258 #define IT87_REG_BEEP_ENABLE 0x5c
260 #define IT87_REG_CHIPID 0x58
262 static const u8 IT87_REG_AUTO_BASE[] = { 0x60, 0x68, 0x70, 0x78, 0xa0, 0xa8 };
264 #define IT87_REG_AUTO_TEMP(nr, i) (IT87_REG_AUTO_BASE[nr] + (i))
265 #define IT87_REG_AUTO_PWM(nr, i) (IT87_REG_AUTO_BASE[nr] + 5 + (i))
267 #define IT87_REG_TEMP456_ENABLE 0x77
269 #define NUM_VIN ARRAY_SIZE(IT87_REG_VIN)
270 #define NUM_VIN_LIMIT 8
272 #define NUM_TEMP_OFFSET ARRAY_SIZE(IT87_REG_TEMP_OFFSET)
273 #define NUM_TEMP_LIMIT 3
274 #define NUM_FAN ARRAY_SIZE(IT87_REG_FAN)
275 #define NUM_FAN_DIV 3
276 #define NUM_PWM ARRAY_SIZE(IT87_REG_PWM)
277 #define NUM_AUTO_PWM ARRAY_SIZE(IT87_REG_PWM)
279 struct it87_devices {
281 const char * const suffix;
287 #define FEAT_12MV_ADC BIT(0)
288 #define FEAT_NEWER_AUTOPWM BIT(1)
289 #define FEAT_OLD_AUTOPWM BIT(2)
290 #define FEAT_16BIT_FANS BIT(3)
291 #define FEAT_TEMP_OFFSET BIT(4)
292 #define FEAT_TEMP_PECI BIT(5)
293 #define FEAT_TEMP_OLD_PECI BIT(6)
294 #define FEAT_FAN16_CONFIG BIT(7) /* Need to enable 16-bit fans */
295 #define FEAT_FIVE_FANS BIT(8) /* Supports five fans */
296 #define FEAT_VID BIT(9) /* Set if chip supports VID */
297 #define FEAT_IN7_INTERNAL BIT(10) /* Set if in7 is internal */
298 #define FEAT_SIX_FANS BIT(11) /* Supports six fans */
299 #define FEAT_10_9MV_ADC BIT(12)
300 #define FEAT_AVCC3 BIT(13) /* Chip supports in9/AVCC3 */
301 #define FEAT_FIVE_PWM BIT(14) /* Chip supports 5 pwm chn */
302 #define FEAT_SIX_PWM BIT(15) /* Chip supports 6 pwm chn */
303 #define FEAT_PWM_FREQ2 BIT(16) /* Separate pwm freq 2 */
304 #define FEAT_SIX_TEMP BIT(17) /* Up to 6 temp sensors */
305 #define FEAT_VIN3_5V BIT(18) /* VIN3 connected to +5V */
307 static const struct it87_devices it87_devices[] = {
311 .features = FEAT_OLD_AUTOPWM, /* may need to overwrite */
316 .features = FEAT_OLD_AUTOPWM | FEAT_VID,
317 /* may need to overwrite */
322 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
323 | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2,
328 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
329 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
331 .old_peci_mask = 0x4,
336 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
337 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
339 .old_peci_mask = 0x4,
344 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
345 | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
346 | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL
349 .old_peci_mask = 0x02, /* Actually reports PCH */
354 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
355 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
356 | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2,
362 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
363 | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
364 | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL,
366 .old_peci_mask = 0x02, /* Actually reports PCH */
371 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
372 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
374 /* PECI: guesswork */
376 /* 16 bit fans (OHM) */
377 /* three fans, always 16 bit (guesswork) */
383 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
384 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
386 /* PECI (coreboot) */
387 /* 12mV ADC (HWSensors4, OHM) */
388 /* 16 bit fans (HWSensors4, OHM) */
389 /* three fans, always 16 bit (datasheet) */
395 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
396 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
397 .old_peci_mask = 0x4,
402 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
403 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
404 .old_peci_mask = 0x4,
409 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
410 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
411 .old_peci_mask = 0x4,
416 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
417 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
424 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
425 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
432 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
433 | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
434 | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL,
436 .old_peci_mask = 0x02, /* Actually reports PCH */
441 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
442 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
443 | FEAT_AVCC3 | FEAT_PWM_FREQ2,
449 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
450 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
451 | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
452 | FEAT_SIX_TEMP | FEAT_VIN3_5V,
458 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
459 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
460 | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
461 | FEAT_AVCC3 | FEAT_VIN3_5V,
467 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
468 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
469 | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
470 | FEAT_SIX_TEMP | FEAT_VIN3_5V,
475 #define has_16bit_fans(data) ((data)->features & FEAT_16BIT_FANS)
476 #define has_12mv_adc(data) ((data)->features & FEAT_12MV_ADC)
477 #define has_10_9mv_adc(data) ((data)->features & FEAT_10_9MV_ADC)
478 #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
479 #define has_old_autopwm(data) ((data)->features & FEAT_OLD_AUTOPWM)
480 #define has_temp_offset(data) ((data)->features & FEAT_TEMP_OFFSET)
481 #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \
482 ((data)->peci_mask & BIT(nr)))
483 #define has_temp_old_peci(data, nr) \
484 (((data)->features & FEAT_TEMP_OLD_PECI) && \
485 ((data)->old_peci_mask & BIT(nr)))
486 #define has_fan16_config(data) ((data)->features & FEAT_FAN16_CONFIG)
487 #define has_five_fans(data) ((data)->features & (FEAT_FIVE_FANS | \
489 #define has_vid(data) ((data)->features & FEAT_VID)
490 #define has_in7_internal(data) ((data)->features & FEAT_IN7_INTERNAL)
491 #define has_six_fans(data) ((data)->features & FEAT_SIX_FANS)
492 #define has_avcc3(data) ((data)->features & FEAT_AVCC3)
493 #define has_five_pwm(data) ((data)->features & (FEAT_FIVE_PWM \
495 #define has_six_pwm(data) ((data)->features & FEAT_SIX_PWM)
496 #define has_pwm_freq2(data) ((data)->features & FEAT_PWM_FREQ2)
497 #define has_six_temp(data) ((data)->features & FEAT_SIX_TEMP)
498 #define has_vin3_5v(data) ((data)->features & FEAT_VIN3_5V)
500 struct it87_sio_data {
502 /* Values read from Super-I/O config space */
506 u8 internal; /* Internal sensors can be labeled */
507 /* Features skipped based on config or DMI */
516 * For each registered chip, we need to keep some data in memory.
517 * The structure is dynamically allocated.
520 const struct attribute_group *groups[7];
528 struct mutex update_lock;
529 char valid; /* !=0 if following fields are valid */
530 unsigned long last_updated; /* In jiffies */
532 u16 in_scaled; /* Internal voltage sensors are scaled */
533 u16 in_internal; /* Bitfield, internal sensors (for labels) */
534 u16 has_in; /* Bitfield, voltage sensors enabled */
535 u8 in[NUM_VIN][3]; /* [nr][0]=in, [1]=min, [2]=max */
536 u8 has_fan; /* Bitfield, fans enabled */
537 u16 fan[NUM_FAN][2]; /* Register values, [nr][0]=fan, [1]=min */
538 u8 has_temp; /* Bitfield, temp sensors enabled */
539 s8 temp[NUM_TEMP][4]; /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
540 u8 sensor; /* Register value (IT87_REG_TEMP_ENABLE) */
541 u8 extra; /* Register value (IT87_REG_TEMP_EXTRA) */
542 u8 fan_div[NUM_FAN_DIV];/* Register encoding, shifted right */
543 bool has_vid; /* True if VID supported */
544 u8 vid; /* Register encoding, combined */
546 u32 alarms; /* Register encoding, combined */
547 bool has_beep; /* true if beep supported */
548 u8 beeps; /* Register encoding */
549 u8 fan_main_ctrl; /* Register value */
550 u8 fan_ctl; /* Register value */
553 * The following 3 arrays correspond to the same registers up to
554 * the IT8720F. The meaning of bits 6-0 depends on the value of bit
555 * 7, and we want to preserve settings on mode changes, so we have
556 * to track all values separately.
557 * Starting with the IT8721F, the manual PWM duty cycles are stored
558 * in separate registers (8-bit values), so the separate tracking
559 * is no longer needed, but it is still done to keep the driver
562 u8 has_pwm; /* Bitfield, pwm control enabled */
563 u8 pwm_ctrl[NUM_PWM]; /* Register value */
564 u8 pwm_duty[NUM_PWM]; /* Manual PWM value set by user */
565 u8 pwm_temp_map[NUM_PWM];/* PWM to temp. chan. mapping (bits 1-0) */
567 /* Automatic fan speed control registers */
568 u8 auto_pwm[NUM_AUTO_PWM][4]; /* [nr][3] is hard-coded */
569 s8 auto_temp[NUM_AUTO_PWM][5]; /* [nr][0] is point1_temp_hyst */
572 static int adc_lsb(const struct it87_data *data, int nr)
576 if (has_12mv_adc(data))
578 else if (has_10_9mv_adc(data))
582 if (data->in_scaled & BIT(nr))
587 static u8 in_to_reg(const struct it87_data *data, int nr, long val)
589 val = DIV_ROUND_CLOSEST(val * 10, adc_lsb(data, nr));
590 return clamp_val(val, 0, 255);
593 static int in_from_reg(const struct it87_data *data, int nr, int val)
595 return DIV_ROUND_CLOSEST(val * adc_lsb(data, nr), 10);
598 static inline u8 FAN_TO_REG(long rpm, int div)
602 rpm = clamp_val(rpm, 1, 1000000);
603 return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
606 static inline u16 FAN16_TO_REG(long rpm)
610 return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
613 #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
614 1350000 / ((val) * (div)))
615 /* The divider is fixed to 2 in 16-bit mode */
616 #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
617 1350000 / ((val) * 2))
619 #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \
620 ((val) + 500) / 1000), -128, 127))
621 #define TEMP_FROM_REG(val) ((val) * 1000)
623 static u8 pwm_to_reg(const struct it87_data *data, long val)
625 if (has_newer_autopwm(data))
631 static int pwm_from_reg(const struct it87_data *data, u8 reg)
633 if (has_newer_autopwm(data))
636 return (reg & 0x7f) << 1;
639 static int DIV_TO_REG(int val)
643 while (answer < 7 && (val >>= 1))
648 #define DIV_FROM_REG(val) BIT(val)
651 * PWM base frequencies. The frequency has to be divided by either 128 or 256,
652 * depending on the chip type, to calculate the actual PWM frequency.
654 * Some of the chip datasheets suggest a base frequency of 51 kHz instead
655 * of 750 kHz for the slowest base frequency, resulting in a PWM frequency
656 * of 200 Hz. Sometimes both PWM frequency select registers are affected,
657 * sometimes just one. It is unknown if this is a datasheet error or real,
658 * so this is ignored for now.
660 static const unsigned int pwm_freq[8] = {
672 * Must be called with data->update_lock held, except during initialization.
673 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
674 * would slow down the IT87 access and should not be necessary.
676 static int it87_read_value(struct it87_data *data, u8 reg)
678 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
679 return inb_p(data->addr + IT87_DATA_REG_OFFSET);
683 * Must be called with data->update_lock held, except during initialization.
684 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
685 * would slow down the IT87 access and should not be necessary.
687 static void it87_write_value(struct it87_data *data, u8 reg, u8 value)
689 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
690 outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
693 static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
695 data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM[nr]);
696 if (has_newer_autopwm(data)) {
697 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
698 data->pwm_duty[nr] = it87_read_value(data,
699 IT87_REG_PWM_DUTY[nr]);
701 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
702 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
703 else /* Manual mode */
704 data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
707 if (has_old_autopwm(data)) {
710 for (i = 0; i < 5 ; i++)
711 data->auto_temp[nr][i] = it87_read_value(data,
712 IT87_REG_AUTO_TEMP(nr, i));
713 for (i = 0; i < 3 ; i++)
714 data->auto_pwm[nr][i] = it87_read_value(data,
715 IT87_REG_AUTO_PWM(nr, i));
716 } else if (has_newer_autopwm(data)) {
720 * 0: temperature hysteresis (base + 5)
721 * 1: fan off temperature (base + 0)
722 * 2: fan start temperature (base + 1)
723 * 3: fan max temperature (base + 2)
725 data->auto_temp[nr][0] =
726 it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 5));
728 for (i = 0; i < 3 ; i++)
729 data->auto_temp[nr][i + 1] =
730 it87_read_value(data,
731 IT87_REG_AUTO_TEMP(nr, i));
733 * 0: start pwm value (base + 3)
734 * 1: pwm slope (base + 4, 1/8th pwm)
736 data->auto_pwm[nr][0] =
737 it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 3));
738 data->auto_pwm[nr][1] =
739 it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 4));
743 static struct it87_data *it87_update_device(struct device *dev)
745 struct it87_data *data = dev_get_drvdata(dev);
748 mutex_lock(&data->update_lock);
750 if (time_after(jiffies, data->last_updated + HZ + HZ / 2) ||
754 * Cleared after each update, so reenable. Value
755 * returned by this read will be previous value
757 it87_write_value(data, IT87_REG_CONFIG,
758 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
760 for (i = 0; i < NUM_VIN; i++) {
761 if (!(data->has_in & BIT(i)))
765 it87_read_value(data, IT87_REG_VIN[i]);
767 /* VBAT and AVCC don't have limit registers */
768 if (i >= NUM_VIN_LIMIT)
772 it87_read_value(data, IT87_REG_VIN_MIN(i));
774 it87_read_value(data, IT87_REG_VIN_MAX(i));
777 for (i = 0; i < NUM_FAN; i++) {
778 /* Skip disabled fans */
779 if (!(data->has_fan & BIT(i)))
783 it87_read_value(data, IT87_REG_FAN_MIN[i]);
784 data->fan[i][0] = it87_read_value(data,
786 /* Add high byte if in 16-bit mode */
787 if (has_16bit_fans(data)) {
788 data->fan[i][0] |= it87_read_value(data,
789 IT87_REG_FANX[i]) << 8;
790 data->fan[i][1] |= it87_read_value(data,
791 IT87_REG_FANX_MIN[i]) << 8;
794 for (i = 0; i < NUM_TEMP; i++) {
795 if (!(data->has_temp & BIT(i)))
798 it87_read_value(data, IT87_REG_TEMP(i));
800 if (has_temp_offset(data) && i < NUM_TEMP_OFFSET)
802 it87_read_value(data,
803 IT87_REG_TEMP_OFFSET[i]);
805 if (i >= NUM_TEMP_LIMIT)
809 it87_read_value(data, IT87_REG_TEMP_LOW(i));
811 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
814 /* Newer chips don't have clock dividers */
815 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
816 i = it87_read_value(data, IT87_REG_FAN_DIV);
817 data->fan_div[0] = i & 0x07;
818 data->fan_div[1] = (i >> 3) & 0x07;
819 data->fan_div[2] = (i & 0x40) ? 3 : 1;
823 it87_read_value(data, IT87_REG_ALARM1) |
824 (it87_read_value(data, IT87_REG_ALARM2) << 8) |
825 (it87_read_value(data, IT87_REG_ALARM3) << 16);
826 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
828 data->fan_main_ctrl = it87_read_value(data,
829 IT87_REG_FAN_MAIN_CTRL);
830 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
831 for (i = 0; i < NUM_PWM; i++) {
832 if (!(data->has_pwm & BIT(i)))
834 it87_update_pwm_ctrl(data, i);
837 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
838 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
840 * The IT8705F does not have VID capability.
841 * The IT8718F and later don't use IT87_REG_VID for the
844 if (data->type == it8712 || data->type == it8716) {
845 data->vid = it87_read_value(data, IT87_REG_VID);
847 * The older IT8712F revisions had only 5 VID pins,
848 * but we assume it is always safe to read 6 bits.
852 data->last_updated = jiffies;
856 mutex_unlock(&data->update_lock);
861 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
864 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
865 struct it87_data *data = it87_update_device(dev);
866 int index = sattr->index;
869 return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
872 static ssize_t set_in(struct device *dev, struct device_attribute *attr,
873 const char *buf, size_t count)
875 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
876 struct it87_data *data = dev_get_drvdata(dev);
877 int index = sattr->index;
881 if (kstrtoul(buf, 10, &val) < 0)
884 mutex_lock(&data->update_lock);
885 data->in[nr][index] = in_to_reg(data, nr, val);
886 it87_write_value(data,
887 index == 1 ? IT87_REG_VIN_MIN(nr)
888 : IT87_REG_VIN_MAX(nr),
889 data->in[nr][index]);
890 mutex_unlock(&data->update_lock);
894 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
895 static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
897 static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
900 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
901 static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
903 static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
906 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
907 static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
909 static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
912 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
913 static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
915 static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
918 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
919 static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
921 static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
924 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
925 static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
927 static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
930 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
931 static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
933 static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
936 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
937 static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
939 static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
942 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
943 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0);
944 static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in, NULL, 10, 0);
945 static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in, NULL, 11, 0);
946 static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in, NULL, 12, 0);
948 /* Up to 6 temperatures */
949 static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
952 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
954 int index = sattr->index;
955 struct it87_data *data = it87_update_device(dev);
957 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
960 static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
961 const char *buf, size_t count)
963 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
965 int index = sattr->index;
966 struct it87_data *data = dev_get_drvdata(dev);
970 if (kstrtol(buf, 10, &val) < 0)
973 mutex_lock(&data->update_lock);
978 reg = IT87_REG_TEMP_LOW(nr);
981 reg = IT87_REG_TEMP_HIGH(nr);
984 regval = it87_read_value(data, IT87_REG_BEEP_ENABLE);
985 if (!(regval & 0x80)) {
987 it87_write_value(data, IT87_REG_BEEP_ENABLE, regval);
990 reg = IT87_REG_TEMP_OFFSET[nr];
994 data->temp[nr][index] = TEMP_TO_REG(val);
995 it87_write_value(data, reg, data->temp[nr][index]);
996 mutex_unlock(&data->update_lock);
1000 static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
1001 static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1003 static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1005 static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
1007 static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
1008 static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1010 static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1012 static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
1014 static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
1015 static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1017 static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1019 static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
1021 static SENSOR_DEVICE_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0);
1022 static SENSOR_DEVICE_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0);
1023 static SENSOR_DEVICE_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0);
1025 static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
1028 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1029 int nr = sensor_attr->index;
1030 struct it87_data *data = it87_update_device(dev);
1031 u8 reg = data->sensor; /* In case value is updated while used */
1032 u8 extra = data->extra;
1034 if ((has_temp_peci(data, nr) && (reg >> 6 == nr + 1)) ||
1035 (has_temp_old_peci(data, nr) && (extra & 0x80)))
1036 return sprintf(buf, "6\n"); /* Intel PECI */
1037 if (reg & (1 << nr))
1038 return sprintf(buf, "3\n"); /* thermal diode */
1039 if (reg & (8 << nr))
1040 return sprintf(buf, "4\n"); /* thermistor */
1041 return sprintf(buf, "0\n"); /* disabled */
1044 static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
1045 const char *buf, size_t count)
1047 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1048 int nr = sensor_attr->index;
1050 struct it87_data *data = dev_get_drvdata(dev);
1054 if (kstrtol(buf, 10, &val) < 0)
1057 reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1060 if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6))
1062 extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1063 if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6))
1065 if (val == 2) { /* backwards compatibility */
1067 "Sensor type 2 is deprecated, please use 4 instead\n");
1070 /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */
1075 else if (has_temp_peci(data, nr) && val == 6)
1076 reg |= (nr + 1) << 6;
1077 else if (has_temp_old_peci(data, nr) && val == 6)
1082 mutex_lock(&data->update_lock);
1084 data->extra = extra;
1085 it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
1086 if (has_temp_old_peci(data, nr))
1087 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1088 data->valid = 0; /* Force cache refresh */
1089 mutex_unlock(&data->update_lock);
1093 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1095 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1097 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1102 static int pwm_mode(const struct it87_data *data, int nr)
1104 if (data->type != it8603 && nr < 3 && !(data->fan_main_ctrl & BIT(nr)))
1105 return 0; /* Full speed */
1106 if (data->pwm_ctrl[nr] & 0x80)
1107 return 2; /* Automatic mode */
1108 if ((data->type == it8603 || nr >= 3) &&
1109 data->pwm_duty[nr] == pwm_to_reg(data, 0xff))
1110 return 0; /* Full speed */
1112 return 1; /* Manual mode */
1115 static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
1118 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1120 int index = sattr->index;
1122 struct it87_data *data = it87_update_device(dev);
1124 speed = has_16bit_fans(data) ?
1125 FAN16_FROM_REG(data->fan[nr][index]) :
1126 FAN_FROM_REG(data->fan[nr][index],
1127 DIV_FROM_REG(data->fan_div[nr]));
1128 return sprintf(buf, "%d\n", speed);
1131 static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
1134 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1135 struct it87_data *data = it87_update_device(dev);
1136 int nr = sensor_attr->index;
1138 return sprintf(buf, "%lu\n", DIV_FROM_REG(data->fan_div[nr]));
1141 static ssize_t show_pwm_enable(struct device *dev,
1142 struct device_attribute *attr, char *buf)
1144 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1145 struct it87_data *data = it87_update_device(dev);
1146 int nr = sensor_attr->index;
1148 return sprintf(buf, "%d\n", pwm_mode(data, nr));
1151 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
1154 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1155 struct it87_data *data = it87_update_device(dev);
1156 int nr = sensor_attr->index;
1158 return sprintf(buf, "%d\n",
1159 pwm_from_reg(data, data->pwm_duty[nr]));
1162 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
1165 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1166 struct it87_data *data = it87_update_device(dev);
1167 int nr = sensor_attr->index;
1171 if (has_pwm_freq2(data) && nr == 1)
1172 index = (data->extra >> 4) & 0x07;
1174 index = (data->fan_ctl >> 4) & 0x07;
1176 freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128);
1178 return sprintf(buf, "%u\n", freq);
1181 static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
1182 const char *buf, size_t count)
1184 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1186 int index = sattr->index;
1188 struct it87_data *data = dev_get_drvdata(dev);
1192 if (kstrtol(buf, 10, &val) < 0)
1195 mutex_lock(&data->update_lock);
1197 if (has_16bit_fans(data)) {
1198 data->fan[nr][index] = FAN16_TO_REG(val);
1199 it87_write_value(data, IT87_REG_FAN_MIN[nr],
1200 data->fan[nr][index] & 0xff);
1201 it87_write_value(data, IT87_REG_FANX_MIN[nr],
1202 data->fan[nr][index] >> 8);
1204 reg = it87_read_value(data, IT87_REG_FAN_DIV);
1207 data->fan_div[nr] = reg & 0x07;
1210 data->fan_div[nr] = (reg >> 3) & 0x07;
1213 data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
1216 data->fan[nr][index] =
1217 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
1218 it87_write_value(data, IT87_REG_FAN_MIN[nr],
1219 data->fan[nr][index]);
1222 mutex_unlock(&data->update_lock);
1226 static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
1227 const char *buf, size_t count)
1229 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1230 struct it87_data *data = dev_get_drvdata(dev);
1231 int nr = sensor_attr->index;
1236 if (kstrtoul(buf, 10, &val) < 0)
1239 mutex_lock(&data->update_lock);
1240 old = it87_read_value(data, IT87_REG_FAN_DIV);
1242 /* Save fan min limit */
1243 min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
1248 data->fan_div[nr] = DIV_TO_REG(val);
1252 data->fan_div[nr] = 1;
1254 data->fan_div[nr] = 3;
1257 val |= (data->fan_div[0] & 0x07);
1258 val |= (data->fan_div[1] & 0x07) << 3;
1259 if (data->fan_div[2] == 3)
1261 it87_write_value(data, IT87_REG_FAN_DIV, val);
1263 /* Restore fan min limit */
1264 data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
1265 it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan[nr][1]);
1267 mutex_unlock(&data->update_lock);
1271 /* Returns 0 if OK, -EINVAL otherwise */
1272 static int check_trip_points(struct device *dev, int nr)
1274 const struct it87_data *data = dev_get_drvdata(dev);
1277 if (has_old_autopwm(data)) {
1278 for (i = 0; i < 3; i++) {
1279 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1282 for (i = 0; i < 2; i++) {
1283 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1286 } else if (has_newer_autopwm(data)) {
1287 for (i = 1; i < 3; i++) {
1288 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1295 "Inconsistent trip points, not switching to automatic mode\n");
1296 dev_err(dev, "Adjust the trip points and try again\n");
1301 static ssize_t set_pwm_enable(struct device *dev, struct device_attribute *attr,
1302 const char *buf, size_t count)
1304 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1305 struct it87_data *data = dev_get_drvdata(dev);
1306 int nr = sensor_attr->index;
1309 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
1312 /* Check trip points before switching to automatic mode */
1314 if (check_trip_points(dev, nr) < 0)
1318 mutex_lock(&data->update_lock);
1321 if (nr < 3 && data->type != it8603) {
1323 /* make sure the fan is on when in on/off mode */
1324 tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1325 it87_write_value(data, IT87_REG_FAN_CTL, tmp | BIT(nr));
1326 /* set on/off mode */
1327 data->fan_main_ctrl &= ~BIT(nr);
1328 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1329 data->fan_main_ctrl);
1331 /* No on/off mode, set maximum pwm value */
1332 data->pwm_duty[nr] = pwm_to_reg(data, 0xff);
1333 it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1334 data->pwm_duty[nr]);
1335 /* and set manual mode */
1336 data->pwm_ctrl[nr] = has_newer_autopwm(data) ?
1337 data->pwm_temp_map[nr] :
1339 it87_write_value(data, IT87_REG_PWM[nr],
1340 data->pwm_ctrl[nr]);
1343 if (val == 1) /* Manual mode */
1344 data->pwm_ctrl[nr] = has_newer_autopwm(data) ?
1345 data->pwm_temp_map[nr] :
1347 else /* Automatic mode */
1348 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
1349 it87_write_value(data, IT87_REG_PWM[nr], data->pwm_ctrl[nr]);
1351 if (data->type != it8603 && nr < 3) {
1352 /* set SmartGuardian mode */
1353 data->fan_main_ctrl |= BIT(nr);
1354 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1355 data->fan_main_ctrl);
1359 mutex_unlock(&data->update_lock);
1363 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1364 const char *buf, size_t count)
1366 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1367 struct it87_data *data = dev_get_drvdata(dev);
1368 int nr = sensor_attr->index;
1371 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1374 mutex_lock(&data->update_lock);
1375 it87_update_pwm_ctrl(data, nr);
1376 if (has_newer_autopwm(data)) {
1378 * If we are in automatic mode, the PWM duty cycle register
1379 * is read-only so we can't write the value.
1381 if (data->pwm_ctrl[nr] & 0x80) {
1382 mutex_unlock(&data->update_lock);
1385 data->pwm_duty[nr] = pwm_to_reg(data, val);
1386 it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1387 data->pwm_duty[nr]);
1389 data->pwm_duty[nr] = pwm_to_reg(data, val);
1391 * If we are in manual mode, write the duty cycle immediately;
1392 * otherwise, just store it for later use.
1394 if (!(data->pwm_ctrl[nr] & 0x80)) {
1395 data->pwm_ctrl[nr] = data->pwm_duty[nr];
1396 it87_write_value(data, IT87_REG_PWM[nr],
1397 data->pwm_ctrl[nr]);
1400 mutex_unlock(&data->update_lock);
1404 static ssize_t set_pwm_freq(struct device *dev, struct device_attribute *attr,
1405 const char *buf, size_t count)
1407 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1408 struct it87_data *data = dev_get_drvdata(dev);
1409 int nr = sensor_attr->index;
1413 if (kstrtoul(buf, 10, &val) < 0)
1416 val = clamp_val(val, 0, 1000000);
1417 val *= has_newer_autopwm(data) ? 256 : 128;
1419 /* Search for the nearest available frequency */
1420 for (i = 0; i < 7; i++) {
1421 if (val > (pwm_freq[i] + pwm_freq[i + 1]) / 2)
1425 mutex_lock(&data->update_lock);
1427 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
1428 data->fan_ctl |= i << 4;
1429 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
1431 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x8f;
1432 data->extra |= i << 4;
1433 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1435 mutex_unlock(&data->update_lock);
1440 static ssize_t show_pwm_temp_map(struct device *dev,
1441 struct device_attribute *attr, char *buf)
1443 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1444 struct it87_data *data = it87_update_device(dev);
1445 int nr = sensor_attr->index;
1448 map = data->pwm_temp_map[nr];
1450 map = 0; /* Should never happen */
1451 if (nr >= 3) /* pwm channels 3..6 map to temp4..6 */
1454 return sprintf(buf, "%d\n", (int)BIT(map));
1457 static ssize_t set_pwm_temp_map(struct device *dev,
1458 struct device_attribute *attr, const char *buf,
1461 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1462 struct it87_data *data = dev_get_drvdata(dev);
1463 int nr = sensor_attr->index;
1467 if (kstrtol(buf, 10, &val) < 0)
1487 mutex_lock(&data->update_lock);
1488 it87_update_pwm_ctrl(data, nr);
1489 data->pwm_temp_map[nr] = reg;
1491 * If we are in automatic mode, write the temp mapping immediately;
1492 * otherwise, just store it for later use.
1494 if (data->pwm_ctrl[nr] & 0x80) {
1495 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
1496 it87_write_value(data, IT87_REG_PWM[nr], data->pwm_ctrl[nr]);
1498 mutex_unlock(&data->update_lock);
1502 static ssize_t show_auto_pwm(struct device *dev, struct device_attribute *attr,
1505 struct it87_data *data = it87_update_device(dev);
1506 struct sensor_device_attribute_2 *sensor_attr =
1507 to_sensor_dev_attr_2(attr);
1508 int nr = sensor_attr->nr;
1509 int point = sensor_attr->index;
1511 return sprintf(buf, "%d\n",
1512 pwm_from_reg(data, data->auto_pwm[nr][point]));
1515 static ssize_t set_auto_pwm(struct device *dev, struct device_attribute *attr,
1516 const char *buf, size_t count)
1518 struct it87_data *data = dev_get_drvdata(dev);
1519 struct sensor_device_attribute_2 *sensor_attr =
1520 to_sensor_dev_attr_2(attr);
1521 int nr = sensor_attr->nr;
1522 int point = sensor_attr->index;
1526 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1529 mutex_lock(&data->update_lock);
1530 data->auto_pwm[nr][point] = pwm_to_reg(data, val);
1531 if (has_newer_autopwm(data))
1532 regaddr = IT87_REG_AUTO_TEMP(nr, 3);
1534 regaddr = IT87_REG_AUTO_PWM(nr, point);
1535 it87_write_value(data, regaddr, data->auto_pwm[nr][point]);
1536 mutex_unlock(&data->update_lock);
1540 static ssize_t show_auto_pwm_slope(struct device *dev,
1541 struct device_attribute *attr, char *buf)
1543 struct it87_data *data = it87_update_device(dev);
1544 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1545 int nr = sensor_attr->index;
1547 return sprintf(buf, "%d\n", data->auto_pwm[nr][1] & 0x7f);
1550 static ssize_t set_auto_pwm_slope(struct device *dev,
1551 struct device_attribute *attr,
1552 const char *buf, size_t count)
1554 struct it87_data *data = dev_get_drvdata(dev);
1555 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1556 int nr = sensor_attr->index;
1559 if (kstrtoul(buf, 10, &val) < 0 || val > 127)
1562 mutex_lock(&data->update_lock);
1563 data->auto_pwm[nr][1] = (data->auto_pwm[nr][1] & 0x80) | val;
1564 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 4),
1565 data->auto_pwm[nr][1]);
1566 mutex_unlock(&data->update_lock);
1570 static ssize_t show_auto_temp(struct device *dev, struct device_attribute *attr,
1573 struct it87_data *data = it87_update_device(dev);
1574 struct sensor_device_attribute_2 *sensor_attr =
1575 to_sensor_dev_attr_2(attr);
1576 int nr = sensor_attr->nr;
1577 int point = sensor_attr->index;
1580 if (has_old_autopwm(data) || point)
1581 reg = data->auto_temp[nr][point];
1583 reg = data->auto_temp[nr][1] - (data->auto_temp[nr][0] & 0x1f);
1585 return sprintf(buf, "%d\n", TEMP_FROM_REG(reg));
1588 static ssize_t set_auto_temp(struct device *dev, struct device_attribute *attr,
1589 const char *buf, size_t count)
1591 struct it87_data *data = dev_get_drvdata(dev);
1592 struct sensor_device_attribute_2 *sensor_attr =
1593 to_sensor_dev_attr_2(attr);
1594 int nr = sensor_attr->nr;
1595 int point = sensor_attr->index;
1599 if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
1602 mutex_lock(&data->update_lock);
1603 if (has_newer_autopwm(data) && !point) {
1604 reg = data->auto_temp[nr][1] - TEMP_TO_REG(val);
1605 reg = clamp_val(reg, 0, 0x1f) | (data->auto_temp[nr][0] & 0xe0);
1606 data->auto_temp[nr][0] = reg;
1607 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 5), reg);
1609 reg = TEMP_TO_REG(val);
1610 data->auto_temp[nr][point] = reg;
1611 if (has_newer_autopwm(data))
1613 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point), reg);
1615 mutex_unlock(&data->update_lock);
1619 static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
1620 static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1622 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
1625 static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
1626 static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1628 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
1631 static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
1632 static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1634 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
1637 static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
1638 static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1641 static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
1642 static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1645 static SENSOR_DEVICE_ATTR_2(fan6_input, S_IRUGO, show_fan, NULL, 5, 0);
1646 static SENSOR_DEVICE_ATTR_2(fan6_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1649 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
1650 show_pwm_enable, set_pwm_enable, 0);
1651 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0);
1652 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq,
1654 static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO,
1655 show_pwm_temp_map, set_pwm_temp_map, 0);
1656 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR,
1657 show_auto_pwm, set_auto_pwm, 0, 0);
1658 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR,
1659 show_auto_pwm, set_auto_pwm, 0, 1);
1660 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR,
1661 show_auto_pwm, set_auto_pwm, 0, 2);
1662 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO,
1663 show_auto_pwm, NULL, 0, 3);
1664 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
1665 show_auto_temp, set_auto_temp, 0, 1);
1666 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1667 show_auto_temp, set_auto_temp, 0, 0);
1668 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
1669 show_auto_temp, set_auto_temp, 0, 2);
1670 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
1671 show_auto_temp, set_auto_temp, 0, 3);
1672 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR,
1673 show_auto_temp, set_auto_temp, 0, 4);
1674 static SENSOR_DEVICE_ATTR_2(pwm1_auto_start, S_IRUGO | S_IWUSR,
1675 show_auto_pwm, set_auto_pwm, 0, 0);
1676 static SENSOR_DEVICE_ATTR(pwm1_auto_slope, S_IRUGO | S_IWUSR,
1677 show_auto_pwm_slope, set_auto_pwm_slope, 0);
1679 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
1680 show_pwm_enable, set_pwm_enable, 1);
1681 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1);
1682 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, set_pwm_freq, 1);
1683 static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO,
1684 show_pwm_temp_map, set_pwm_temp_map, 1);
1685 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR,
1686 show_auto_pwm, set_auto_pwm, 1, 0);
1687 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR,
1688 show_auto_pwm, set_auto_pwm, 1, 1);
1689 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR,
1690 show_auto_pwm, set_auto_pwm, 1, 2);
1691 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO,
1692 show_auto_pwm, NULL, 1, 3);
1693 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
1694 show_auto_temp, set_auto_temp, 1, 1);
1695 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1696 show_auto_temp, set_auto_temp, 1, 0);
1697 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
1698 show_auto_temp, set_auto_temp, 1, 2);
1699 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
1700 show_auto_temp, set_auto_temp, 1, 3);
1701 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR,
1702 show_auto_temp, set_auto_temp, 1, 4);
1703 static SENSOR_DEVICE_ATTR_2(pwm2_auto_start, S_IRUGO | S_IWUSR,
1704 show_auto_pwm, set_auto_pwm, 1, 0);
1705 static SENSOR_DEVICE_ATTR(pwm2_auto_slope, S_IRUGO | S_IWUSR,
1706 show_auto_pwm_slope, set_auto_pwm_slope, 1);
1708 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
1709 show_pwm_enable, set_pwm_enable, 2);
1710 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2);
1711 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL, 2);
1712 static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO,
1713 show_pwm_temp_map, set_pwm_temp_map, 2);
1714 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR,
1715 show_auto_pwm, set_auto_pwm, 2, 0);
1716 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR,
1717 show_auto_pwm, set_auto_pwm, 2, 1);
1718 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR,
1719 show_auto_pwm, set_auto_pwm, 2, 2);
1720 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO,
1721 show_auto_pwm, NULL, 2, 3);
1722 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
1723 show_auto_temp, set_auto_temp, 2, 1);
1724 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1725 show_auto_temp, set_auto_temp, 2, 0);
1726 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
1727 show_auto_temp, set_auto_temp, 2, 2);
1728 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
1729 show_auto_temp, set_auto_temp, 2, 3);
1730 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR,
1731 show_auto_temp, set_auto_temp, 2, 4);
1732 static SENSOR_DEVICE_ATTR_2(pwm3_auto_start, S_IRUGO | S_IWUSR,
1733 show_auto_pwm, set_auto_pwm, 2, 0);
1734 static SENSOR_DEVICE_ATTR(pwm3_auto_slope, S_IRUGO | S_IWUSR,
1735 show_auto_pwm_slope, set_auto_pwm_slope, 2);
1737 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IRUGO | S_IWUSR,
1738 show_pwm_enable, set_pwm_enable, 3);
1739 static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 3);
1740 static SENSOR_DEVICE_ATTR(pwm4_freq, S_IRUGO, show_pwm_freq, NULL, 3);
1741 static SENSOR_DEVICE_ATTR(pwm4_auto_channels_temp, S_IRUGO,
1742 show_pwm_temp_map, set_pwm_temp_map, 3);
1743 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp, S_IRUGO | S_IWUSR,
1744 show_auto_temp, set_auto_temp, 2, 1);
1745 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1746 show_auto_temp, set_auto_temp, 2, 0);
1747 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point2_temp, S_IRUGO | S_IWUSR,
1748 show_auto_temp, set_auto_temp, 2, 2);
1749 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point3_temp, S_IRUGO | S_IWUSR,
1750 show_auto_temp, set_auto_temp, 2, 3);
1751 static SENSOR_DEVICE_ATTR_2(pwm4_auto_start, S_IRUGO | S_IWUSR,
1752 show_auto_pwm, set_auto_pwm, 3, 0);
1753 static SENSOR_DEVICE_ATTR(pwm4_auto_slope, S_IRUGO | S_IWUSR,
1754 show_auto_pwm_slope, set_auto_pwm_slope, 3);
1756 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IRUGO | S_IWUSR,
1757 show_pwm_enable, set_pwm_enable, 4);
1758 static SENSOR_DEVICE_ATTR(pwm5, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 4);
1759 static SENSOR_DEVICE_ATTR(pwm5_freq, S_IRUGO, show_pwm_freq, NULL, 4);
1760 static SENSOR_DEVICE_ATTR(pwm5_auto_channels_temp, S_IRUGO,
1761 show_pwm_temp_map, set_pwm_temp_map, 4);
1762 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp, S_IRUGO | S_IWUSR,
1763 show_auto_temp, set_auto_temp, 2, 1);
1764 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1765 show_auto_temp, set_auto_temp, 2, 0);
1766 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point2_temp, S_IRUGO | S_IWUSR,
1767 show_auto_temp, set_auto_temp, 2, 2);
1768 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point3_temp, S_IRUGO | S_IWUSR,
1769 show_auto_temp, set_auto_temp, 2, 3);
1770 static SENSOR_DEVICE_ATTR_2(pwm5_auto_start, S_IRUGO | S_IWUSR,
1771 show_auto_pwm, set_auto_pwm, 4, 0);
1772 static SENSOR_DEVICE_ATTR(pwm5_auto_slope, S_IRUGO | S_IWUSR,
1773 show_auto_pwm_slope, set_auto_pwm_slope, 4);
1775 static SENSOR_DEVICE_ATTR(pwm6_enable, S_IRUGO | S_IWUSR,
1776 show_pwm_enable, set_pwm_enable, 5);
1777 static SENSOR_DEVICE_ATTR(pwm6, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 5);
1778 static SENSOR_DEVICE_ATTR(pwm6_freq, S_IRUGO, show_pwm_freq, NULL, 5);
1779 static SENSOR_DEVICE_ATTR(pwm6_auto_channels_temp, S_IRUGO,
1780 show_pwm_temp_map, set_pwm_temp_map, 5);
1781 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp, S_IRUGO | S_IWUSR,
1782 show_auto_temp, set_auto_temp, 2, 1);
1783 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1784 show_auto_temp, set_auto_temp, 2, 0);
1785 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point2_temp, S_IRUGO | S_IWUSR,
1786 show_auto_temp, set_auto_temp, 2, 2);
1787 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point3_temp, S_IRUGO | S_IWUSR,
1788 show_auto_temp, set_auto_temp, 2, 3);
1789 static SENSOR_DEVICE_ATTR_2(pwm6_auto_start, S_IRUGO | S_IWUSR,
1790 show_auto_pwm, set_auto_pwm, 5, 0);
1791 static SENSOR_DEVICE_ATTR(pwm6_auto_slope, S_IRUGO | S_IWUSR,
1792 show_auto_pwm_slope, set_auto_pwm_slope, 5);
1795 static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
1798 struct it87_data *data = it87_update_device(dev);
1800 return sprintf(buf, "%u\n", data->alarms);
1802 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
1804 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
1807 struct it87_data *data = it87_update_device(dev);
1808 int bitnr = to_sensor_dev_attr(attr)->index;
1810 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
1813 static ssize_t clear_intrusion(struct device *dev,
1814 struct device_attribute *attr, const char *buf,
1817 struct it87_data *data = dev_get_drvdata(dev);
1821 if (kstrtol(buf, 10, &val) < 0 || val != 0)
1824 mutex_lock(&data->update_lock);
1825 config = it87_read_value(data, IT87_REG_CONFIG);
1830 it87_write_value(data, IT87_REG_CONFIG, config);
1831 /* Invalidate cache to force re-read */
1834 mutex_unlock(&data->update_lock);
1839 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
1840 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
1841 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
1842 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
1843 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
1844 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
1845 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
1846 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
1847 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
1848 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
1849 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
1850 static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
1851 static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
1852 static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 7);
1853 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
1854 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
1855 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
1856 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
1857 show_alarm, clear_intrusion, 4);
1859 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
1862 struct it87_data *data = it87_update_device(dev);
1863 int bitnr = to_sensor_dev_attr(attr)->index;
1865 return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
1868 static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
1869 const char *buf, size_t count)
1871 int bitnr = to_sensor_dev_attr(attr)->index;
1872 struct it87_data *data = dev_get_drvdata(dev);
1875 if (kstrtol(buf, 10, &val) < 0 || (val != 0 && val != 1))
1878 mutex_lock(&data->update_lock);
1879 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1881 data->beeps |= BIT(bitnr);
1883 data->beeps &= ~BIT(bitnr);
1884 it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
1885 mutex_unlock(&data->update_lock);
1889 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
1890 show_beep, set_beep, 1);
1891 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
1892 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
1893 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
1894 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
1895 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
1896 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
1897 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
1898 /* fanX_beep writability is set later */
1899 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
1900 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
1901 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
1902 static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
1903 static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
1904 static SENSOR_DEVICE_ATTR(fan6_beep, S_IRUGO, show_beep, set_beep, 0);
1905 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
1906 show_beep, set_beep, 2);
1907 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
1908 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
1910 static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
1913 struct it87_data *data = dev_get_drvdata(dev);
1915 return sprintf(buf, "%u\n", data->vrm);
1918 static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
1919 const char *buf, size_t count)
1921 struct it87_data *data = dev_get_drvdata(dev);
1924 if (kstrtoul(buf, 10, &val) < 0)
1931 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
1933 static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
1936 struct it87_data *data = it87_update_device(dev);
1938 return sprintf(buf, "%ld\n", (long)vid_from_reg(data->vid, data->vrm));
1940 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
1942 static ssize_t show_label(struct device *dev, struct device_attribute *attr,
1945 static const char * const labels[] = {
1951 static const char * const labels_it8721[] = {
1957 struct it87_data *data = dev_get_drvdata(dev);
1958 int nr = to_sensor_dev_attr(attr)->index;
1961 if (has_vin3_5v(data) && nr == 0)
1963 else if (has_12mv_adc(data) || has_10_9mv_adc(data))
1964 label = labels_it8721[nr];
1968 return sprintf(buf, "%s\n", label);
1970 static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
1971 static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
1972 static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
1974 static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 3);
1976 static umode_t it87_in_is_visible(struct kobject *kobj,
1977 struct attribute *attr, int index)
1979 struct device *dev = container_of(kobj, struct device, kobj);
1980 struct it87_data *data = dev_get_drvdata(dev);
1981 int i = index / 5; /* voltage index */
1982 int a = index % 5; /* attribute index */
1984 if (index >= 40) { /* in8 and higher only have input attributes */
1989 if (!(data->has_in & BIT(i)))
1992 if (a == 4 && !data->has_beep)
1998 static struct attribute *it87_attributes_in[] = {
1999 &sensor_dev_attr_in0_input.dev_attr.attr,
2000 &sensor_dev_attr_in0_min.dev_attr.attr,
2001 &sensor_dev_attr_in0_max.dev_attr.attr,
2002 &sensor_dev_attr_in0_alarm.dev_attr.attr,
2003 &sensor_dev_attr_in0_beep.dev_attr.attr, /* 4 */
2005 &sensor_dev_attr_in1_input.dev_attr.attr,
2006 &sensor_dev_attr_in1_min.dev_attr.attr,
2007 &sensor_dev_attr_in1_max.dev_attr.attr,
2008 &sensor_dev_attr_in1_alarm.dev_attr.attr,
2009 &sensor_dev_attr_in1_beep.dev_attr.attr, /* 9 */
2011 &sensor_dev_attr_in2_input.dev_attr.attr,
2012 &sensor_dev_attr_in2_min.dev_attr.attr,
2013 &sensor_dev_attr_in2_max.dev_attr.attr,
2014 &sensor_dev_attr_in2_alarm.dev_attr.attr,
2015 &sensor_dev_attr_in2_beep.dev_attr.attr, /* 14 */
2017 &sensor_dev_attr_in3_input.dev_attr.attr,
2018 &sensor_dev_attr_in3_min.dev_attr.attr,
2019 &sensor_dev_attr_in3_max.dev_attr.attr,
2020 &sensor_dev_attr_in3_alarm.dev_attr.attr,
2021 &sensor_dev_attr_in3_beep.dev_attr.attr, /* 19 */
2023 &sensor_dev_attr_in4_input.dev_attr.attr,
2024 &sensor_dev_attr_in4_min.dev_attr.attr,
2025 &sensor_dev_attr_in4_max.dev_attr.attr,
2026 &sensor_dev_attr_in4_alarm.dev_attr.attr,
2027 &sensor_dev_attr_in4_beep.dev_attr.attr, /* 24 */
2029 &sensor_dev_attr_in5_input.dev_attr.attr,
2030 &sensor_dev_attr_in5_min.dev_attr.attr,
2031 &sensor_dev_attr_in5_max.dev_attr.attr,
2032 &sensor_dev_attr_in5_alarm.dev_attr.attr,
2033 &sensor_dev_attr_in5_beep.dev_attr.attr, /* 29 */
2035 &sensor_dev_attr_in6_input.dev_attr.attr,
2036 &sensor_dev_attr_in6_min.dev_attr.attr,
2037 &sensor_dev_attr_in6_max.dev_attr.attr,
2038 &sensor_dev_attr_in6_alarm.dev_attr.attr,
2039 &sensor_dev_attr_in6_beep.dev_attr.attr, /* 34 */
2041 &sensor_dev_attr_in7_input.dev_attr.attr,
2042 &sensor_dev_attr_in7_min.dev_attr.attr,
2043 &sensor_dev_attr_in7_max.dev_attr.attr,
2044 &sensor_dev_attr_in7_alarm.dev_attr.attr,
2045 &sensor_dev_attr_in7_beep.dev_attr.attr, /* 39 */
2047 &sensor_dev_attr_in8_input.dev_attr.attr, /* 40 */
2048 &sensor_dev_attr_in9_input.dev_attr.attr, /* 41 */
2049 &sensor_dev_attr_in10_input.dev_attr.attr, /* 41 */
2050 &sensor_dev_attr_in11_input.dev_attr.attr, /* 41 */
2051 &sensor_dev_attr_in12_input.dev_attr.attr, /* 41 */
2055 static const struct attribute_group it87_group_in = {
2056 .attrs = it87_attributes_in,
2057 .is_visible = it87_in_is_visible,
2060 static umode_t it87_temp_is_visible(struct kobject *kobj,
2061 struct attribute *attr, int index)
2063 struct device *dev = container_of(kobj, struct device, kobj);
2064 struct it87_data *data = dev_get_drvdata(dev);
2065 int i = index / 7; /* temperature index */
2066 int a = index % 7; /* attribute index */
2073 if (!(data->has_temp & BIT(i)))
2076 if (a == 5 && !has_temp_offset(data))
2079 if (a == 6 && !data->has_beep)
2085 static struct attribute *it87_attributes_temp[] = {
2086 &sensor_dev_attr_temp1_input.dev_attr.attr,
2087 &sensor_dev_attr_temp1_max.dev_attr.attr,
2088 &sensor_dev_attr_temp1_min.dev_attr.attr,
2089 &sensor_dev_attr_temp1_type.dev_attr.attr,
2090 &sensor_dev_attr_temp1_alarm.dev_attr.attr,
2091 &sensor_dev_attr_temp1_offset.dev_attr.attr, /* 5 */
2092 &sensor_dev_attr_temp1_beep.dev_attr.attr, /* 6 */
2094 &sensor_dev_attr_temp2_input.dev_attr.attr, /* 7 */
2095 &sensor_dev_attr_temp2_max.dev_attr.attr,
2096 &sensor_dev_attr_temp2_min.dev_attr.attr,
2097 &sensor_dev_attr_temp2_type.dev_attr.attr,
2098 &sensor_dev_attr_temp2_alarm.dev_attr.attr,
2099 &sensor_dev_attr_temp2_offset.dev_attr.attr,
2100 &sensor_dev_attr_temp2_beep.dev_attr.attr,
2102 &sensor_dev_attr_temp3_input.dev_attr.attr, /* 14 */
2103 &sensor_dev_attr_temp3_max.dev_attr.attr,
2104 &sensor_dev_attr_temp3_min.dev_attr.attr,
2105 &sensor_dev_attr_temp3_type.dev_attr.attr,
2106 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
2107 &sensor_dev_attr_temp3_offset.dev_attr.attr,
2108 &sensor_dev_attr_temp3_beep.dev_attr.attr,
2110 &sensor_dev_attr_temp4_input.dev_attr.attr, /* 21 */
2111 &sensor_dev_attr_temp5_input.dev_attr.attr,
2112 &sensor_dev_attr_temp6_input.dev_attr.attr,
2116 static const struct attribute_group it87_group_temp = {
2117 .attrs = it87_attributes_temp,
2118 .is_visible = it87_temp_is_visible,
2121 static umode_t it87_is_visible(struct kobject *kobj,
2122 struct attribute *attr, int index)
2124 struct device *dev = container_of(kobj, struct device, kobj);
2125 struct it87_data *data = dev_get_drvdata(dev);
2127 if ((index == 2 || index == 3) && !data->has_vid)
2130 if (index > 3 && !(data->in_internal & BIT(index - 4)))
2136 static struct attribute *it87_attributes[] = {
2137 &dev_attr_alarms.attr,
2138 &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
2139 &dev_attr_vrm.attr, /* 2 */
2140 &dev_attr_cpu0_vid.attr, /* 3 */
2141 &sensor_dev_attr_in3_label.dev_attr.attr, /* 4 .. 7 */
2142 &sensor_dev_attr_in7_label.dev_attr.attr,
2143 &sensor_dev_attr_in8_label.dev_attr.attr,
2144 &sensor_dev_attr_in9_label.dev_attr.attr,
2148 static const struct attribute_group it87_group = {
2149 .attrs = it87_attributes,
2150 .is_visible = it87_is_visible,
2153 static umode_t it87_fan_is_visible(struct kobject *kobj,
2154 struct attribute *attr, int index)
2156 struct device *dev = container_of(kobj, struct device, kobj);
2157 struct it87_data *data = dev_get_drvdata(dev);
2158 int i = index / 5; /* fan index */
2159 int a = index % 5; /* attribute index */
2161 if (index >= 15) { /* fan 4..6 don't have divisor attributes */
2162 i = (index - 15) / 4 + 3;
2163 a = (index - 15) % 4;
2166 if (!(data->has_fan & BIT(i)))
2169 if (a == 3) { /* beep */
2170 if (!data->has_beep)
2172 /* first fan beep attribute is writable */
2173 if (i == __ffs(data->has_fan))
2174 return attr->mode | S_IWUSR;
2177 if (a == 4 && has_16bit_fans(data)) /* divisor */
2183 static struct attribute *it87_attributes_fan[] = {
2184 &sensor_dev_attr_fan1_input.dev_attr.attr,
2185 &sensor_dev_attr_fan1_min.dev_attr.attr,
2186 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
2187 &sensor_dev_attr_fan1_beep.dev_attr.attr, /* 3 */
2188 &sensor_dev_attr_fan1_div.dev_attr.attr, /* 4 */
2190 &sensor_dev_attr_fan2_input.dev_attr.attr,
2191 &sensor_dev_attr_fan2_min.dev_attr.attr,
2192 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
2193 &sensor_dev_attr_fan2_beep.dev_attr.attr,
2194 &sensor_dev_attr_fan2_div.dev_attr.attr, /* 9 */
2196 &sensor_dev_attr_fan3_input.dev_attr.attr,
2197 &sensor_dev_attr_fan3_min.dev_attr.attr,
2198 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
2199 &sensor_dev_attr_fan3_beep.dev_attr.attr,
2200 &sensor_dev_attr_fan3_div.dev_attr.attr, /* 14 */
2202 &sensor_dev_attr_fan4_input.dev_attr.attr, /* 15 */
2203 &sensor_dev_attr_fan4_min.dev_attr.attr,
2204 &sensor_dev_attr_fan4_alarm.dev_attr.attr,
2205 &sensor_dev_attr_fan4_beep.dev_attr.attr,
2207 &sensor_dev_attr_fan5_input.dev_attr.attr, /* 19 */
2208 &sensor_dev_attr_fan5_min.dev_attr.attr,
2209 &sensor_dev_attr_fan5_alarm.dev_attr.attr,
2210 &sensor_dev_attr_fan5_beep.dev_attr.attr,
2212 &sensor_dev_attr_fan6_input.dev_attr.attr, /* 23 */
2213 &sensor_dev_attr_fan6_min.dev_attr.attr,
2214 &sensor_dev_attr_fan6_alarm.dev_attr.attr,
2215 &sensor_dev_attr_fan6_beep.dev_attr.attr,
2219 static const struct attribute_group it87_group_fan = {
2220 .attrs = it87_attributes_fan,
2221 .is_visible = it87_fan_is_visible,
2224 static umode_t it87_pwm_is_visible(struct kobject *kobj,
2225 struct attribute *attr, int index)
2227 struct device *dev = container_of(kobj, struct device, kobj);
2228 struct it87_data *data = dev_get_drvdata(dev);
2229 int i = index / 4; /* pwm index */
2230 int a = index % 4; /* attribute index */
2232 if (!(data->has_pwm & BIT(i)))
2235 /* pwmX_auto_channels_temp is only writable if auto pwm is supported */
2236 if (a == 3 && (has_old_autopwm(data) || has_newer_autopwm(data)))
2237 return attr->mode | S_IWUSR;
2239 /* pwm2_freq is writable if there are two pwm frequency selects */
2240 if (has_pwm_freq2(data) && i == 1 && a == 2)
2241 return attr->mode | S_IWUSR;
2246 static struct attribute *it87_attributes_pwm[] = {
2247 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2248 &sensor_dev_attr_pwm1.dev_attr.attr,
2249 &sensor_dev_attr_pwm1_freq.dev_attr.attr,
2250 &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
2252 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2253 &sensor_dev_attr_pwm2.dev_attr.attr,
2254 &sensor_dev_attr_pwm2_freq.dev_attr.attr,
2255 &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
2257 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2258 &sensor_dev_attr_pwm3.dev_attr.attr,
2259 &sensor_dev_attr_pwm3_freq.dev_attr.attr,
2260 &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
2262 &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2263 &sensor_dev_attr_pwm4.dev_attr.attr,
2264 &sensor_dev_attr_pwm4_freq.dev_attr.attr,
2265 &sensor_dev_attr_pwm4_auto_channels_temp.dev_attr.attr,
2267 &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2268 &sensor_dev_attr_pwm5.dev_attr.attr,
2269 &sensor_dev_attr_pwm5_freq.dev_attr.attr,
2270 &sensor_dev_attr_pwm5_auto_channels_temp.dev_attr.attr,
2272 &sensor_dev_attr_pwm6_enable.dev_attr.attr,
2273 &sensor_dev_attr_pwm6.dev_attr.attr,
2274 &sensor_dev_attr_pwm6_freq.dev_attr.attr,
2275 &sensor_dev_attr_pwm6_auto_channels_temp.dev_attr.attr,
2280 static const struct attribute_group it87_group_pwm = {
2281 .attrs = it87_attributes_pwm,
2282 .is_visible = it87_pwm_is_visible,
2285 static umode_t it87_auto_pwm_is_visible(struct kobject *kobj,
2286 struct attribute *attr, int index)
2288 struct device *dev = container_of(kobj, struct device, kobj);
2289 struct it87_data *data = dev_get_drvdata(dev);
2290 int i = index / 11; /* pwm index */
2291 int a = index % 11; /* attribute index */
2293 if (index >= 33) { /* pwm 4..6 */
2294 i = (index - 33) / 6 + 3;
2295 a = (index - 33) % 6 + 4;
2298 if (!(data->has_pwm & BIT(i)))
2301 if (has_newer_autopwm(data)) {
2302 if (a < 4) /* no auto point pwm */
2304 if (a == 8) /* no auto_point4 */
2307 if (has_old_autopwm(data)) {
2308 if (a >= 9) /* no pwm_auto_start, pwm_auto_slope */
2315 static struct attribute *it87_attributes_auto_pwm[] = {
2316 &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
2317 &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
2318 &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
2319 &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
2320 &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
2321 &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
2322 &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
2323 &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
2324 &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
2325 &sensor_dev_attr_pwm1_auto_start.dev_attr.attr,
2326 &sensor_dev_attr_pwm1_auto_slope.dev_attr.attr,
2328 &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr, /* 11 */
2329 &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
2330 &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
2331 &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
2332 &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
2333 &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
2334 &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
2335 &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
2336 &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
2337 &sensor_dev_attr_pwm2_auto_start.dev_attr.attr,
2338 &sensor_dev_attr_pwm2_auto_slope.dev_attr.attr,
2340 &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr, /* 22 */
2341 &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
2342 &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
2343 &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
2344 &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
2345 &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
2346 &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
2347 &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
2348 &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
2349 &sensor_dev_attr_pwm3_auto_start.dev_attr.attr,
2350 &sensor_dev_attr_pwm3_auto_slope.dev_attr.attr,
2352 &sensor_dev_attr_pwm4_auto_point1_temp.dev_attr.attr, /* 33 */
2353 &sensor_dev_attr_pwm4_auto_point1_temp_hyst.dev_attr.attr,
2354 &sensor_dev_attr_pwm4_auto_point2_temp.dev_attr.attr,
2355 &sensor_dev_attr_pwm4_auto_point3_temp.dev_attr.attr,
2356 &sensor_dev_attr_pwm4_auto_start.dev_attr.attr,
2357 &sensor_dev_attr_pwm4_auto_slope.dev_attr.attr,
2359 &sensor_dev_attr_pwm5_auto_point1_temp.dev_attr.attr,
2360 &sensor_dev_attr_pwm5_auto_point1_temp_hyst.dev_attr.attr,
2361 &sensor_dev_attr_pwm5_auto_point2_temp.dev_attr.attr,
2362 &sensor_dev_attr_pwm5_auto_point3_temp.dev_attr.attr,
2363 &sensor_dev_attr_pwm5_auto_start.dev_attr.attr,
2364 &sensor_dev_attr_pwm5_auto_slope.dev_attr.attr,
2366 &sensor_dev_attr_pwm6_auto_point1_temp.dev_attr.attr,
2367 &sensor_dev_attr_pwm6_auto_point1_temp_hyst.dev_attr.attr,
2368 &sensor_dev_attr_pwm6_auto_point2_temp.dev_attr.attr,
2369 &sensor_dev_attr_pwm6_auto_point3_temp.dev_attr.attr,
2370 &sensor_dev_attr_pwm6_auto_start.dev_attr.attr,
2371 &sensor_dev_attr_pwm6_auto_slope.dev_attr.attr,
2376 static const struct attribute_group it87_group_auto_pwm = {
2377 .attrs = it87_attributes_auto_pwm,
2378 .is_visible = it87_auto_pwm_is_visible,
2381 /* SuperIO detection - will change isa_address if a chip is found */
2382 static int __init it87_find(int sioaddr, unsigned short *address,
2383 struct it87_sio_data *sio_data)
2387 const char *board_vendor, *board_name;
2388 const struct it87_devices *config;
2390 err = superio_enter(sioaddr);
2395 chip_type = force_id ? force_id : superio_inw(sioaddr, DEVID);
2397 switch (chip_type) {
2399 sio_data->type = it87;
2402 sio_data->type = it8712;
2406 sio_data->type = it8716;
2409 sio_data->type = it8718;
2412 sio_data->type = it8720;
2415 sio_data->type = it8721;
2418 sio_data->type = it8728;
2421 sio_data->type = it8732;
2424 sio_data->type = it8792;
2427 sio_data->type = it8771;
2430 sio_data->type = it8772;
2433 sio_data->type = it8781;
2436 sio_data->type = it8782;
2439 sio_data->type = it8783;
2442 sio_data->type = it8786;
2445 sio_data->type = it8790;
2449 sio_data->type = it8603;
2452 sio_data->type = it8620;
2455 sio_data->type = it8622;
2458 sio_data->type = it8628;
2460 case 0xffff: /* No device at all */
2463 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
2467 superio_select(sioaddr, PME);
2468 if (!(superio_inb(sioaddr, IT87_ACT_REG) & 0x01)) {
2469 pr_info("Device not activated, skipping\n");
2473 *address = superio_inw(sioaddr, IT87_BASE_REG) & ~(IT87_EXTENT - 1);
2474 if (*address == 0) {
2475 pr_info("Base address not set, skipping\n");
2480 sio_data->revision = superio_inb(sioaddr, DEVREV) & 0x0f;
2481 pr_info("Found IT%04x%s chip at 0x%x, revision %d\n", chip_type,
2482 it87_devices[sio_data->type].suffix,
2483 *address, sio_data->revision);
2485 config = &it87_devices[sio_data->type];
2487 /* in7 (VSB or VCCH5V) is always internal on some chips */
2488 if (has_in7_internal(config))
2489 sio_data->internal |= BIT(1);
2491 /* in8 (Vbat) is always internal */
2492 sio_data->internal |= BIT(2);
2494 /* in9 (AVCC3), always internal if supported */
2495 if (has_avcc3(config))
2496 sio_data->internal |= BIT(3); /* in9 is AVCC */
2498 sio_data->skip_in |= BIT(9);
2500 if (!has_five_pwm(config))
2501 sio_data->skip_pwm |= BIT(3) | BIT(4) | BIT(5);
2502 else if (!has_six_pwm(config))
2503 sio_data->skip_pwm |= BIT(5);
2505 if (!has_vid(config))
2506 sio_data->skip_vid = 1;
2508 /* Read GPIO config and VID value from LDN 7 (GPIO) */
2509 if (sio_data->type == it87) {
2510 /* The IT8705F has a different LD number for GPIO */
2511 superio_select(sioaddr, 5);
2512 sio_data->beep_pin = superio_inb(sioaddr,
2513 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2514 } else if (sio_data->type == it8783) {
2515 int reg25, reg27, reg2a, reg2c, regef;
2517 superio_select(sioaddr, GPIO);
2519 reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2520 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2521 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
2522 reg2c = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2523 regef = superio_inb(sioaddr, IT87_SIO_SPI_REG);
2525 /* Check if fan3 is there or not */
2526 if ((reg27 & BIT(0)) || !(reg2c & BIT(2)))
2527 sio_data->skip_fan |= BIT(2);
2528 if ((reg25 & BIT(4)) ||
2529 (!(reg2a & BIT(1)) && (regef & BIT(0))))
2530 sio_data->skip_pwm |= BIT(2);
2532 /* Check if fan2 is there or not */
2534 sio_data->skip_fan |= BIT(1);
2536 sio_data->skip_pwm |= BIT(1);
2539 if ((reg27 & BIT(0)) || (reg2c & BIT(2)))
2540 sio_data->skip_in |= BIT(5); /* No VIN5 */
2544 sio_data->skip_in |= BIT(6); /* No VIN6 */
2548 * Does not depend on bit 2 of Reg2C, contrary to datasheet.
2550 if (reg27 & BIT(2)) {
2552 * The data sheet is a bit unclear regarding the
2553 * internal voltage divider for VCCH5V. It says
2554 * "This bit enables and switches VIN7 (pin 91) to the
2555 * internal voltage divider for VCCH5V".
2556 * This is different to other chips, where the internal
2557 * voltage divider would connect VIN7 to an internal
2558 * voltage source. Maybe that is the case here as well.
2560 * Since we don't know for sure, re-route it if that is
2561 * not the case, and ask the user to report if the
2562 * resulting voltage is sane.
2564 if (!(reg2c & BIT(1))) {
2566 superio_outb(sioaddr, IT87_SIO_PINX2_REG,
2568 pr_notice("Routing internal VCCH5V to in7.\n");
2570 pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
2571 pr_notice("Please report if it displays a reasonable voltage.\n");
2575 sio_data->internal |= BIT(0);
2577 sio_data->internal |= BIT(1);
2579 sio_data->beep_pin = superio_inb(sioaddr,
2580 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2581 } else if (sio_data->type == it8603) {
2584 superio_select(sioaddr, GPIO);
2586 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2588 /* Check if fan3 is there or not */
2590 sio_data->skip_pwm |= BIT(2);
2592 sio_data->skip_fan |= BIT(2);
2594 /* Check if fan2 is there or not */
2595 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2597 sio_data->skip_pwm |= BIT(1);
2599 sio_data->skip_fan |= BIT(1);
2601 sio_data->skip_in |= BIT(5); /* No VIN5 */
2602 sio_data->skip_in |= BIT(6); /* No VIN6 */
2604 sio_data->beep_pin = superio_inb(sioaddr,
2605 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2606 } else if (sio_data->type == it8620 || sio_data->type == it8628) {
2609 superio_select(sioaddr, GPIO);
2611 /* Check for pwm5 */
2612 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2614 sio_data->skip_pwm |= BIT(4);
2616 /* Check for fan4, fan5 */
2617 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2618 if (!(reg & BIT(5)))
2619 sio_data->skip_fan |= BIT(3);
2620 if (!(reg & BIT(4)))
2621 sio_data->skip_fan |= BIT(4);
2623 /* Check for pwm3, fan3 */
2624 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2626 sio_data->skip_pwm |= BIT(2);
2628 sio_data->skip_fan |= BIT(2);
2630 /* Check for pwm4 */
2631 reg = superio_inb(sioaddr, IT87_SIO_GPIO4_REG);
2632 if (!(reg & BIT(2)))
2633 sio_data->skip_pwm |= BIT(3);
2635 /* Check for pwm2, fan2 */
2636 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2638 sio_data->skip_pwm |= BIT(1);
2640 sio_data->skip_fan |= BIT(1);
2641 /* Check for pwm6, fan6 */
2642 if (!(reg & BIT(7))) {
2643 sio_data->skip_pwm |= BIT(5);
2644 sio_data->skip_fan |= BIT(5);
2647 /* Check if AVCC is on VIN3 */
2648 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2650 sio_data->internal |= BIT(0);
2652 sio_data->skip_in |= BIT(9);
2654 sio_data->beep_pin = superio_inb(sioaddr,
2655 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2656 } else if (sio_data->type == it8622) {
2659 superio_select(sioaddr, GPIO);
2661 /* Check for pwm4, fan4 */
2662 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2664 sio_data->skip_fan |= BIT(3);
2666 sio_data->skip_pwm |= BIT(3);
2668 /* Check for pwm3, fan3, pwm5, fan5 */
2669 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2671 sio_data->skip_pwm |= BIT(2);
2673 sio_data->skip_fan |= BIT(2);
2675 sio_data->skip_pwm |= BIT(4);
2677 sio_data->skip_fan |= BIT(4);
2679 /* Check for pwm2, fan2 */
2680 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2682 sio_data->skip_pwm |= BIT(1);
2684 sio_data->skip_fan |= BIT(1);
2686 /* Check for AVCC */
2687 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2688 if (!(reg & BIT(0)))
2689 sio_data->skip_in |= BIT(9);
2691 sio_data->beep_pin = superio_inb(sioaddr,
2692 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2697 superio_select(sioaddr, GPIO);
2699 /* Check for fan4, fan5 */
2700 if (has_five_fans(config)) {
2701 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2702 switch (sio_data->type) {
2705 sio_data->skip_fan |= BIT(3);
2707 sio_data->skip_fan |= BIT(4);
2712 if (!(reg & BIT(5)))
2713 sio_data->skip_fan |= BIT(3);
2714 if (!(reg & BIT(4)))
2715 sio_data->skip_fan |= BIT(4);
2722 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2723 if (!sio_data->skip_vid) {
2724 /* We need at least 4 VID pins */
2726 pr_info("VID is disabled (pins used for GPIO)\n");
2727 sio_data->skip_vid = 1;
2731 /* Check if fan3 is there or not */
2733 sio_data->skip_pwm |= BIT(2);
2735 sio_data->skip_fan |= BIT(2);
2737 /* Check if fan2 is there or not */
2738 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2740 sio_data->skip_pwm |= BIT(1);
2742 sio_data->skip_fan |= BIT(1);
2744 if ((sio_data->type == it8718 || sio_data->type == it8720) &&
2745 !(sio_data->skip_vid))
2746 sio_data->vid_value = superio_inb(sioaddr,
2749 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2751 uart6 = sio_data->type == it8782 && (reg & BIT(2));
2754 * The IT8720F has no VIN7 pin, so VCCH should always be
2755 * routed internally to VIN7 with an internal divider.
2756 * Curiously, there still is a configuration bit to control
2757 * this, which means it can be set incorrectly. And even
2758 * more curiously, many boards out there are improperly
2759 * configured, even though the IT8720F datasheet claims
2760 * that the internal routing of VCCH to VIN7 is the default
2761 * setting. So we force the internal routing in this case.
2763 * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
2764 * If UART6 is enabled, re-route VIN7 to the internal divider
2765 * if that is not already the case.
2767 if ((sio_data->type == it8720 || uart6) && !(reg & BIT(1))) {
2769 superio_outb(sioaddr, IT87_SIO_PINX2_REG, reg);
2770 pr_notice("Routing internal VCCH to in7\n");
2773 sio_data->internal |= BIT(0);
2775 sio_data->internal |= BIT(1);
2778 * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
2779 * While VIN7 can be routed to the internal voltage divider,
2780 * VIN5 and VIN6 are not available if UART6 is enabled.
2782 * Also, temp3 is not available if UART6 is enabled and TEMPIN3
2783 * is the temperature source. Since we can not read the
2784 * temperature source here, skip_temp is preliminary.
2787 sio_data->skip_in |= BIT(5) | BIT(6);
2788 sio_data->skip_temp |= BIT(2);
2791 sio_data->beep_pin = superio_inb(sioaddr,
2792 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2794 if (sio_data->beep_pin)
2795 pr_info("Beeping is supported\n");
2797 /* Disable specific features based on DMI strings */
2798 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
2799 board_name = dmi_get_system_info(DMI_BOARD_NAME);
2800 if (board_vendor && board_name) {
2801 if (strcmp(board_vendor, "nVIDIA") == 0 &&
2802 strcmp(board_name, "FN68PT") == 0) {
2804 * On the Shuttle SN68PT, FAN_CTL2 is apparently not
2805 * connected to a fan, but to something else. One user
2806 * has reported instant system power-off when changing
2807 * the PWM2 duty cycle, so we disable it.
2808 * I use the board name string as the trigger in case
2809 * the same board is ever used in other systems.
2811 pr_info("Disabling pwm2 due to hardware constraints\n");
2812 sio_data->skip_pwm = BIT(1);
2817 superio_exit(sioaddr);
2821 /* Called when we have found a new IT87. */
2822 static void it87_init_device(struct platform_device *pdev)
2824 struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
2825 struct it87_data *data = platform_get_drvdata(pdev);
2830 * For each PWM channel:
2831 * - If it is in automatic mode, setting to manual mode should set
2832 * the fan to full speed by default.
2833 * - If it is in manual mode, we need a mapping to temperature
2834 * channels to use when later setting to automatic mode later.
2835 * Use a 1:1 mapping by default (we are clueless.)
2836 * In both cases, the value can (and should) be changed by the user
2837 * prior to switching to a different mode.
2838 * Note that this is no longer needed for the IT8721F and later, as
2839 * these have separate registers for the temperature mapping and the
2840 * manual duty cycle.
2842 for (i = 0; i < NUM_AUTO_PWM; i++) {
2843 data->pwm_temp_map[i] = i;
2844 data->pwm_duty[i] = 0x7f; /* Full speed */
2845 data->auto_pwm[i][3] = 0x7f; /* Full speed, hard-coded */
2849 * Some chips seem to have default value 0xff for all limit
2850 * registers. For low voltage limits it makes no sense and triggers
2851 * alarms, so change to 0 instead. For high temperature limits, it
2852 * means -1 degree C, which surprisingly doesn't trigger an alarm,
2853 * but is still confusing, so change to 127 degrees C.
2855 for (i = 0; i < NUM_VIN_LIMIT; i++) {
2856 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
2858 it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
2860 for (i = 0; i < NUM_TEMP_LIMIT; i++) {
2861 tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
2863 it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
2867 * Temperature channels are not forcibly enabled, as they can be
2868 * set to two different sensor types and we can't guess which one
2869 * is correct for a given system. These channels can be enabled at
2870 * run-time through the temp{1-3}_type sysfs accessors if needed.
2873 /* Check if voltage monitors are reset manually or by some reason */
2874 tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
2875 if ((tmp & 0xff) == 0) {
2876 /* Enable all voltage monitors */
2877 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
2880 /* Check if tachometers are reset manually or by some reason */
2881 mask = 0x70 & ~(sio_data->skip_fan << 4);
2882 data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
2883 if ((data->fan_main_ctrl & mask) == 0) {
2884 /* Enable all fan tachometers */
2885 data->fan_main_ctrl |= mask;
2886 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
2887 data->fan_main_ctrl);
2889 data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
2891 tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
2893 /* Set tachometers to 16-bit mode if needed */
2894 if (has_fan16_config(data)) {
2895 if (~tmp & 0x07 & data->has_fan) {
2897 "Setting fan1-3 to 16-bit mode\n");
2898 it87_write_value(data, IT87_REG_FAN_16BIT,
2903 /* Check for additional fans */
2904 if (has_five_fans(data)) {
2906 data->has_fan |= BIT(3); /* fan4 enabled */
2908 data->has_fan |= BIT(4); /* fan5 enabled */
2909 if (has_six_fans(data) && (tmp & BIT(2)))
2910 data->has_fan |= BIT(5); /* fan6 enabled */
2913 /* Fan input pins may be used for alternative functions */
2914 data->has_fan &= ~sio_data->skip_fan;
2916 /* Check if pwm5, pwm6 are enabled */
2917 if (has_six_pwm(data)) {
2918 /* The following code may be IT8620E specific */
2919 tmp = it87_read_value(data, IT87_REG_FAN_DIV);
2920 if ((tmp & 0xc0) == 0xc0)
2921 sio_data->skip_pwm |= BIT(4);
2922 if (!(tmp & BIT(3)))
2923 sio_data->skip_pwm |= BIT(5);
2926 /* Start monitoring */
2927 it87_write_value(data, IT87_REG_CONFIG,
2928 (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
2929 | (update_vbat ? 0x41 : 0x01));
2932 /* Return 1 if and only if the PWM interface is safe to use */
2933 static int it87_check_pwm(struct device *dev)
2935 struct it87_data *data = dev_get_drvdata(dev);
2937 * Some BIOSes fail to correctly configure the IT87 fans. All fans off
2938 * and polarity set to active low is sign that this is the case so we
2939 * disable pwm control to protect the user.
2941 int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
2943 if ((tmp & 0x87) == 0) {
2944 if (fix_pwm_polarity) {
2946 * The user asks us to attempt a chip reconfiguration.
2947 * This means switching to active high polarity and
2948 * inverting all fan speed values.
2953 for (i = 0; i < ARRAY_SIZE(pwm); i++)
2954 pwm[i] = it87_read_value(data,
2958 * If any fan is in automatic pwm mode, the polarity
2959 * might be correct, as suspicious as it seems, so we
2960 * better don't change anything (but still disable the
2963 if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
2965 "Reconfiguring PWM to active high polarity\n");
2966 it87_write_value(data, IT87_REG_FAN_CTL,
2968 for (i = 0; i < 3; i++)
2969 it87_write_value(data,
2976 "PWM configuration is too broken to be fixed\n");
2980 "Detected broken BIOS defaults, disabling PWM interface\n");
2982 } else if (fix_pwm_polarity) {
2984 "PWM configuration looks sane, won't touch\n");
2990 static int it87_probe(struct platform_device *pdev)
2992 struct it87_data *data;
2993 struct resource *res;
2994 struct device *dev = &pdev->dev;
2995 struct it87_sio_data *sio_data = dev_get_platdata(dev);
2996 int enable_pwm_interface;
2997 struct device *hwmon_dev;
2999 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3000 if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
3002 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
3003 (unsigned long)res->start,
3004 (unsigned long)(res->start + IT87_EC_EXTENT - 1));
3008 data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
3012 data->addr = res->start;
3013 data->type = sio_data->type;
3014 data->features = it87_devices[sio_data->type].features;
3015 data->peci_mask = it87_devices[sio_data->type].peci_mask;
3016 data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
3018 * IT8705F Datasheet 0.4.1, 3h == Version G.
3019 * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
3020 * These are the first revisions with 16-bit tachometer support.
3022 switch (data->type) {
3024 if (sio_data->revision >= 0x03) {
3025 data->features &= ~FEAT_OLD_AUTOPWM;
3026 data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS;
3030 if (sio_data->revision >= 0x08) {
3031 data->features &= ~FEAT_OLD_AUTOPWM;
3032 data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS |
3040 /* Now, we do the remaining detection. */
3041 if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80) ||
3042 it87_read_value(data, IT87_REG_CHIPID) != 0x90)
3045 platform_set_drvdata(pdev, data);
3047 mutex_init(&data->update_lock);
3049 /* Check PWM configuration */
3050 enable_pwm_interface = it87_check_pwm(dev);
3052 /* Starting with IT8721F, we handle scaling of internal voltages */
3053 if (has_12mv_adc(data)) {
3054 if (sio_data->internal & BIT(0))
3055 data->in_scaled |= BIT(3); /* in3 is AVCC */
3056 if (sio_data->internal & BIT(1))
3057 data->in_scaled |= BIT(7); /* in7 is VSB */
3058 if (sio_data->internal & BIT(2))
3059 data->in_scaled |= BIT(8); /* in8 is Vbat */
3060 if (sio_data->internal & BIT(3))
3061 data->in_scaled |= BIT(9); /* in9 is AVCC */
3062 } else if (sio_data->type == it8781 || sio_data->type == it8782 ||
3063 sio_data->type == it8783) {
3064 if (sio_data->internal & BIT(0))
3065 data->in_scaled |= BIT(3); /* in3 is VCC5V */
3066 if (sio_data->internal & BIT(1))
3067 data->in_scaled |= BIT(7); /* in7 is VCCH5V */
3070 data->has_temp = 0x07;
3071 if (sio_data->skip_temp & BIT(2)) {
3072 if (sio_data->type == it8782 &&
3073 !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
3074 data->has_temp &= ~BIT(2);
3077 data->in_internal = sio_data->internal;
3078 data->has_in = 0x3ff & ~sio_data->skip_in;
3080 if (has_six_temp(data)) {
3081 u8 reg = it87_read_value(data, IT87_REG_TEMP456_ENABLE);
3083 /* Check for additional temperature sensors */
3084 if ((reg & 0x03) >= 0x02)
3085 data->has_temp |= BIT(3);
3086 if (((reg >> 2) & 0x03) >= 0x02)
3087 data->has_temp |= BIT(4);
3088 if (((reg >> 4) & 0x03) >= 0x02)
3089 data->has_temp |= BIT(5);
3091 /* Check for additional voltage sensors */
3092 if ((reg & 0x03) == 0x01)
3093 data->has_in |= BIT(10);
3094 if (((reg >> 2) & 0x03) == 0x01)
3095 data->has_in |= BIT(11);
3096 if (((reg >> 4) & 0x03) == 0x01)
3097 data->has_in |= BIT(12);
3100 data->has_beep = !!sio_data->beep_pin;
3102 /* Initialize the IT87 chip */
3103 it87_init_device(pdev);
3105 if (!sio_data->skip_vid) {
3106 data->has_vid = true;
3107 data->vrm = vid_which_vrm();
3108 /* VID reading from Super-I/O config space if available */
3109 data->vid = sio_data->vid_value;
3112 /* Prepare for sysfs hooks */
3113 data->groups[0] = &it87_group;
3114 data->groups[1] = &it87_group_in;
3115 data->groups[2] = &it87_group_temp;
3116 data->groups[3] = &it87_group_fan;
3118 if (enable_pwm_interface) {
3119 data->has_pwm = BIT(ARRAY_SIZE(IT87_REG_PWM)) - 1;
3120 data->has_pwm &= ~sio_data->skip_pwm;
3122 data->groups[4] = &it87_group_pwm;
3123 if (has_old_autopwm(data) || has_newer_autopwm(data))
3124 data->groups[5] = &it87_group_auto_pwm;
3127 hwmon_dev = devm_hwmon_device_register_with_groups(dev,
3128 it87_devices[sio_data->type].name,
3129 data, data->groups);
3130 return PTR_ERR_OR_ZERO(hwmon_dev);
3133 static struct platform_driver it87_driver = {
3137 .probe = it87_probe,
3140 static int __init it87_device_add(int index, unsigned short address,
3141 const struct it87_sio_data *sio_data)
3143 struct platform_device *pdev;
3144 struct resource res = {
3145 .start = address + IT87_EC_OFFSET,
3146 .end = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
3148 .flags = IORESOURCE_IO,
3152 err = acpi_check_resource_conflict(&res);
3156 pdev = platform_device_alloc(DRVNAME, address);
3160 err = platform_device_add_resources(pdev, &res, 1);
3162 pr_err("Device resource addition failed (%d)\n", err);
3163 goto exit_device_put;
3166 err = platform_device_add_data(pdev, sio_data,
3167 sizeof(struct it87_sio_data));
3169 pr_err("Platform data allocation failed\n");
3170 goto exit_device_put;
3173 err = platform_device_add(pdev);
3175 pr_err("Device addition failed (%d)\n", err);
3176 goto exit_device_put;
3179 it87_pdev[index] = pdev;
3183 platform_device_put(pdev);
3187 static int __init sm_it87_init(void)
3189 int sioaddr[2] = { REG_2E, REG_4E };
3190 struct it87_sio_data sio_data;
3191 unsigned short isa_address;
3195 err = platform_driver_register(&it87_driver);
3199 for (i = 0; i < ARRAY_SIZE(sioaddr); i++) {
3200 memset(&sio_data, 0, sizeof(struct it87_sio_data));
3202 err = it87_find(sioaddr[i], &isa_address, &sio_data);
3203 if (err || isa_address == 0)
3206 err = it87_device_add(i, isa_address, &sio_data);
3208 goto exit_dev_unregister;
3214 goto exit_unregister;
3218 exit_dev_unregister:
3219 /* NULL check handled by platform_device_unregister */
3220 platform_device_unregister(it87_pdev[0]);
3222 platform_driver_unregister(&it87_driver);
3226 static void __exit sm_it87_exit(void)
3228 /* NULL check handled by platform_device_unregister */
3229 platform_device_unregister(it87_pdev[1]);
3230 platform_device_unregister(it87_pdev[0]);
3231 platform_driver_unregister(&it87_driver);
3234 MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>");
3235 MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
3236 module_param(update_vbat, bool, 0);
3237 MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
3238 module_param(fix_pwm_polarity, bool, 0);
3239 MODULE_PARM_DESC(fix_pwm_polarity,
3240 "Force PWM polarity to active high (DANGEROUS)");
3241 MODULE_LICENSE("GPL");
3243 module_init(sm_it87_init);
3244 module_exit(sm_it87_exit);