git.sur5r.net Git - groeck-it87/blob - it87.c

   1 /*
   2  *  it87.c - Part of lm_sensors, Linux kernel modules for hardware
   3  *           monitoring.
   4  *
   5  *  The IT8705F is an LPC-based Super I/O part that contains UARTs, a
   6  *  parallel port, an IR port, a MIDI port, a floppy controller, etc., in
   7  *  addition to an Environment Controller (Enhanced Hardware Monitor and
   8  *  Fan Controller)
   9  *
  10  *  This driver supports only the Environment Controller in the IT8705F and
  11  *  similar parts.  The other devices are supported by different drivers.
  12  *
  13  *  Supports: IT8603E  Super I/O chip w/LPC interface
  14  *            IT8607E  Super I/O chip w/LPC interface
  15  *            IT8620E  Super I/O chip w/LPC interface
  16  *            IT8622E  Super I/O chip w/LPC interface
  17  *            IT8623E  Super I/O chip w/LPC interface
  18  *            IT8628E  Super I/O chip w/LPC interface
  19  *            IT8655E  Super I/O chip w/LPC interface
  20  *            IT8665E  Super I/O chip w/LPC interface
  21  *            IT8686E  Super I/O chip w/LPC interface
  22  *            IT8705F  Super I/O chip w/LPC interface
  23  *            IT8712F  Super I/O chip w/LPC interface
  24  *            IT8716F  Super I/O chip w/LPC interface
  25  *            IT8718F  Super I/O chip w/LPC interface
  26  *            IT8720F  Super I/O chip w/LPC interface
  27  *            IT8721F  Super I/O chip w/LPC interface
  28  *            IT8726F  Super I/O chip w/LPC interface
  29  *            IT8728F  Super I/O chip w/LPC interface
  30  *            IT8732F  Super I/O chip w/LPC interface
  31  *            IT8758E  Super I/O chip w/LPC interface
  32  *            IT8771E  Super I/O chip w/LPC interface
  33  *            IT8772E  Super I/O chip w/LPC interface
  34  *            IT8781F  Super I/O chip w/LPC interface
  35  *            IT8782F  Super I/O chip w/LPC interface
  36  *            IT8783E/F Super I/O chip w/LPC interface
  37  *            IT8786E  Super I/O chip w/LPC interface
  38  *            IT8790E  Super I/O chip w/LPC interface
  39  *            IT8792E  Super I/O chip w/LPC interface
  40  *            Sis950   A clone of the IT8705F
  41  *
  42  *  Copyright (C) 2001 Chris Gauthron
  43  *  Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de>
  44  *
  45  *  This program is free software; you can redistribute it and/or modify
  46  *  it under the terms of the GNU General Public License as published by
  47  *  the Free Software Foundation; either version 2 of the License, or
  48  *  (at your option) any later version.
  49  *
  50  *  This program is distributed in the hope that it will be useful,
  51  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  52  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  53  *  GNU General Public License for more details.
  54  */
  55
  56 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  57
  58 #include <linux/bitops.h>
  59 #include <linux/module.h>
  60 #include <linux/init.h>
  61 #include <linux/slab.h>
  62 #include <linux/jiffies.h>
  63 #include <linux/platform_device.h>
  64 #include <linux/hwmon.h>
  65 #include <linux/hwmon-sysfs.h>
  66 #include <linux/hwmon-vid.h>
  67 #include <linux/err.h>
  68 #include <linux/mutex.h>
  69 #include <linux/sysfs.h>
  70 #include <linux/string.h>
  71 #include <linux/dmi.h>
  72 #include <linux/acpi.h>
  73 #include <linux/io.h>
  74 #include "compat.h"
  75
  76 #define DRVNAME "it87"
  77
  78 enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732,
  79              it8771, it8772, it8781, it8782, it8783, it8786, it8790,
  80              it8792, it8603, it8607, it8620, it8622, it8628, it8655, it8665,
  81              it8686 };
  82
  83 static unsigned short force_id;
  84 module_param(force_id, ushort, 0);
  85 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  86
  87 static struct platform_device *it87_pdev[2];
  88
  89 #define REG_2E  0x2e    /* The register to read/write */
  90 #define REG_4E  0x4e    /* Secondary register to read/write */
  91
  92 #define DEV     0x07    /* Register: Logical device select */
  93 #define PME     0x04    /* The device with the fan registers in it */
  94
  95 /* The device with the IT8718F/IT8720F VID value in it */
  96 #define GPIO    0x07
  97
  98 #define DEVID   0x20    /* Register: Device ID */
  99 #define DEVREV  0x22    /* Register: Device Revision */
 100
 101 static inline int superio_inb(int ioreg, int reg)
 102 {
 103         outb(reg, ioreg);
 104         return inb(ioreg + 1);
 105 }
 106
 107 static inline void superio_outb(int ioreg, int reg, int val)
 108 {
 109         outb(reg, ioreg);
 110         outb(val, ioreg + 1);
 111 }
 112
 113 static int superio_inw(int ioreg, int reg)
 114 {
 115         int val;
 116
 117         outb(reg++, ioreg);
 118         val = inb(ioreg + 1) << 8;
 119         outb(reg, ioreg);
 120         val |= inb(ioreg + 1);
 121         return val;
 122 }
 123
 124 static inline void superio_select(int ioreg, int ldn)
 125 {
 126         outb(DEV, ioreg);
 127         outb(ldn, ioreg + 1);
 128 }
 129
 130 static inline int superio_enter(int ioreg)
 131 {
 132         /*
 133          * Try to reserve ioreg and ioreg + 1 for exclusive access.
 134          */
 135         if (!request_muxed_region(ioreg, 2, DRVNAME))
 136                 return -EBUSY;
 137
 138         outb(0x87, ioreg);
 139         outb(0x01, ioreg);
 140         outb(0x55, ioreg);
 141         outb(ioreg == REG_4E ? 0xaa : 0x55, ioreg);
 142         return 0;
 143 }
 144
 145 static inline void superio_exit(int ioreg)
 146 {
 147         outb(0x02, ioreg);
 148         outb(0x02, ioreg + 1);
 149         release_region(ioreg, 2);
 150 }
 151
 152 /* Logical device 4 registers */
 153 #define IT8712F_DEVID 0x8712
 154 #define IT8705F_DEVID 0x8705
 155 #define IT8716F_DEVID 0x8716
 156 #define IT8718F_DEVID 0x8718
 157 #define IT8720F_DEVID 0x8720
 158 #define IT8721F_DEVID 0x8721
 159 #define IT8726F_DEVID 0x8726
 160 #define IT8728F_DEVID 0x8728
 161 #define IT8732F_DEVID 0x8732
 162 #define IT8792E_DEVID 0x8733
 163 #define IT8771E_DEVID 0x8771
 164 #define IT8772E_DEVID 0x8772
 165 #define IT8781F_DEVID 0x8781
 166 #define IT8782F_DEVID 0x8782
 167 #define IT8783E_DEVID 0x8783
 168 #define IT8786E_DEVID 0x8786
 169 #define IT8790E_DEVID 0x8790
 170 #define IT8603E_DEVID 0x8603
 171 #define IT8607E_DEVID 0x8607
 172 #define IT8620E_DEVID 0x8620
 173 #define IT8622E_DEVID 0x8622
 174 #define IT8623E_DEVID 0x8623
 175 #define IT8628E_DEVID 0x8628
 176 #define IT8655E_DEVID 0x8655
 177 #define IT8665E_DEVID 0x8665
 178 #define IT8686E_DEVID 0x8686
 179 #define IT87_ACT_REG  0x30
 180 #define IT87_BASE_REG 0x60
 181
 182 /* Logical device 7 registers (IT8712F and later) */
 183 #define IT87_SIO_GPIO1_REG      0x25
 184 #define IT87_SIO_GPIO2_REG      0x26
 185 #define IT87_SIO_GPIO3_REG      0x27
 186 #define IT87_SIO_GPIO4_REG      0x28
 187 #define IT87_SIO_GPIO5_REG      0x29
 188 #define IT87_SIO_GPIO9_REG      0xd3
 189 #define IT87_SIO_PINX1_REG      0x2a    /* Pin selection */
 190 #define IT87_SIO_PINX2_REG      0x2c    /* Pin selection */
 191 #define IT87_SIO_PINX4_REG      0x2d    /* Pin selection */
 192 #define IT87_SIO_SPI_REG        0xef    /* SPI function pin select */
 193 #define IT87_SIO_VID_REG        0xfc    /* VID value */
 194 #define IT87_SIO_BEEP_PIN_REG   0xf6    /* Beep pin mapping */
 195
 196 /* Update battery voltage after every reading if true */
 197 static bool update_vbat;
 198
 199 /* Not all BIOSes properly configure the PWM registers */
 200 static bool fix_pwm_polarity;
 201
 202 /* Many IT87 constants specified below */
 203
 204 /* Length of ISA address segment */
 205 #define IT87_EXTENT 8
 206
 207 /* Length of ISA address segment for Environmental Controller */
 208 #define IT87_EC_EXTENT 2
 209
 210 /* Offset of EC registers from ISA base address */
 211 #define IT87_EC_OFFSET 5
 212
 213 /* Where are the ISA address/data registers relative to the EC base address */
 214 #define IT87_ADDR_REG_OFFSET 0
 215 #define IT87_DATA_REG_OFFSET 1
 216
 217 /*----- The IT87 registers -----*/
 218
 219 #define IT87_REG_CONFIG        0x00
 220
 221 #define IT87_REG_ALARM1        0x01
 222 #define IT87_REG_ALARM2        0x02
 223 #define IT87_REG_ALARM3        0x03
 224
 225 #define IT87_REG_BANK           0x06
 226
 227 /*
 228  * The IT8718F and IT8720F have the VID value in a different register, in
 229  * Super-I/O configuration space.
 230  */
 231 #define IT87_REG_VID           0x0a
 232 /*
 233  * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
 234  * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
 235  * mode.
 236  */
 237 #define IT87_REG_FAN_DIV       0x0b
 238 #define IT87_REG_FAN_16BIT     0x0c
 239
 240 /*
 241  * Monitors:
 242  * - up to 13 voltage (0 to 7, battery, avcc, 10 to 12)
 243  * - up to 6 temp (1 to 6)
 244  * - up to 6 fan (1 to 6)
 245  */
 246
 247 static const u8 IT87_REG_FAN[] =        { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c };
 248 static const u8 IT87_REG_FAN_MIN[] =    { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e };
 249 static const u8 IT87_REG_FANX[] =       { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d };
 250 static const u8 IT87_REG_FANX_MIN[] =   { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f };
 251
 252 static const u8 IT87_REG_FAN_8665[] =   { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x93 };
 253 static const u8 IT87_REG_FAN_MIN_8665[] =
 254                                         { 0x10, 0x11, 0x12, 0x84, 0x86, 0xb2 };
 255 static const u8 IT87_REG_FANX_8665[] =  { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x94 };
 256 static const u8 IT87_REG_FANX_MIN_8665[] =
 257                                         { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0xb3 };
 258
 259 static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59 };
 260
 261 #define IT87_REG_FAN_MAIN_CTRL 0x13
 262 #define IT87_REG_FAN_CTL       0x14
 263
 264 static const u8 IT87_REG_PWM[] =        { 0x15, 0x16, 0x17, 0x7f, 0xa7, 0xaf };
 265 static const u8 IT87_REG_PWM_8665[] =   { 0x15, 0x16, 0x17, 0x1e, 0x1f, 0x92 };
 266
 267 static const u8 IT87_REG_PWM_DUTY[] =   { 0x63, 0x6b, 0x73, 0x7b, 0xa3, 0xab };
 268
 269 static const u8 IT87_REG_VIN[]  = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26,
 270                                     0x27, 0x28, 0x2f, 0x2c, 0x2d, 0x2e };
 271
 272 #define IT87_REG_TEMP(nr)      (0x29 + (nr))
 273
 274 #define IT87_REG_VIN_MAX(nr)   (0x30 + (nr) * 2)
 275 #define IT87_REG_VIN_MIN(nr)   (0x31 + (nr) * 2)
 276 #define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
 277 #define IT87_REG_TEMP_LOW(nr)  (0x41 + (nr) * 2)
 278
 279 #define IT87_REG_VIN_ENABLE    0x50
 280 #define IT87_REG_TEMP_ENABLE   0x51
 281 #define IT87_REG_TEMP_EXTRA    0x55
 282 #define IT87_REG_BEEP_ENABLE   0x5c
 283
 284 #define IT87_REG_CHIPID        0x58
 285
 286 static const u8 IT87_REG_AUTO_BASE[] = { 0x60, 0x68, 0x70, 0x78, 0xa0, 0xa8 };
 287
 288 #define IT87_REG_AUTO_TEMP(nr, i) (IT87_REG_AUTO_BASE[nr] + (i))
 289 #define IT87_REG_AUTO_PWM(nr, i)  (IT87_REG_AUTO_BASE[nr] + 5 + (i))
 290
 291 #define IT87_REG_TEMP456_ENABLE 0x77
 292
 293 #define NUM_VIN                 ARRAY_SIZE(IT87_REG_VIN)
 294 #define NUM_VIN_LIMIT           8
 295 #define NUM_TEMP                6
 296 #define NUM_TEMP_OFFSET         ARRAY_SIZE(IT87_REG_TEMP_OFFSET)
 297 #define NUM_TEMP_LIMIT          3
 298 #define NUM_FAN                 ARRAY_SIZE(IT87_REG_FAN)
 299 #define NUM_FAN_DIV             3
 300 #define NUM_PWM                 ARRAY_SIZE(IT87_REG_PWM)
 301 #define NUM_AUTO_PWM            ARRAY_SIZE(IT87_REG_PWM)
 302
 303 struct it87_devices {
 304         const char *name;
 305         const char * const suffix;
 306         u32 features;
 307         u8 peci_mask;
 308         u8 old_peci_mask;
 309 };
 310
 311 #define FEAT_12MV_ADC           BIT(0)
 312 #define FEAT_NEWER_AUTOPWM      BIT(1)
 313 #define FEAT_OLD_AUTOPWM        BIT(2)
 314 #define FEAT_16BIT_FANS         BIT(3)
 315 #define FEAT_TEMP_OFFSET        BIT(4)
 316 #define FEAT_TEMP_PECI          BIT(5)
 317 #define FEAT_TEMP_OLD_PECI      BIT(6)
 318 #define FEAT_FAN16_CONFIG       BIT(7)  /* Need to enable 16-bit fans */
 319 #define FEAT_FIVE_FANS          BIT(8)  /* Supports five fans */
 320 #define FEAT_VID                BIT(9)  /* Set if chip supports VID */
 321 #define FEAT_IN7_INTERNAL       BIT(10) /* Set if in7 is internal */
 322 #define FEAT_SIX_FANS           BIT(11) /* Supports six fans */
 323 #define FEAT_10_9MV_ADC         BIT(12)
 324 #define FEAT_AVCC3              BIT(13) /* Chip supports in9/AVCC3 */
 325 #define FEAT_FIVE_PWM           BIT(14) /* Chip supports 5 pwm chn */
 326 #define FEAT_SIX_PWM            BIT(15) /* Chip supports 6 pwm chn */
 327 #define FEAT_PWM_FREQ2          BIT(16) /* Separate pwm freq 2 */
 328 #define FEAT_SIX_TEMP           BIT(17) /* Up to 6 temp sensors */
 329 #define FEAT_VIN3_5V            BIT(18) /* VIN3 connected to +5V */
 330 #define FEAT_FOUR_FANS          BIT(19) /* Supports four fans */
 331 #define FEAT_FOUR_PWM           BIT(20) /* Supports four fan controls */
 332 #define FEAT_BANK_SEL           BIT(21) /* Chip has multi-bank support */
 333 #define FEAT_SCALING            BIT(22) /* Internal voltage scaling */
 334
 335 static const struct it87_devices it87_devices[] = {
 336         [it87] = {
 337                 .name = "it87",
 338                 .suffix = "F",
 339                 .features = FEAT_OLD_AUTOPWM,   /* may need to overwrite */
 340         },
 341         [it8712] = {
 342                 .name = "it8712",
 343                 .suffix = "F",
 344                 .features = FEAT_OLD_AUTOPWM | FEAT_VID,
 345                                                 /* may need to overwrite */
 346         },
 347         [it8716] = {
 348                 .name = "it8716",
 349                 .suffix = "F",
 350                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 351                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2,
 352         },
 353         [it8718] = {
 354                 .name = "it8718",
 355                 .suffix = "F",
 356                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 357                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 358                   | FEAT_PWM_FREQ2,
 359                 .old_peci_mask = 0x4,
 360         },
 361         [it8720] = {
 362                 .name = "it8720",
 363                 .suffix = "F",
 364                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 365                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 366                   | FEAT_PWM_FREQ2,
 367                 .old_peci_mask = 0x4,
 368         },
 369         [it8721] = {
 370                 .name = "it8721",
 371                 .suffix = "F",
 372                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 373                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 374                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL
 375                   | FEAT_PWM_FREQ2 | FEAT_SCALING,
 376                 .peci_mask = 0x05,
 377                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 378         },
 379         [it8728] = {
 380                 .name = "it8728",
 381                 .suffix = "F",
 382                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 383                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 384                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_SCALING,
 385                 .peci_mask = 0x07,
 386         },
 387         [it8732] = {
 388                 .name = "it8732",
 389                 .suffix = "F",
 390                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 391                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 392                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_FOUR_FANS
 393                   | FEAT_FOUR_PWM,
 394                 .peci_mask = 0x07,
 395                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 396         },
 397         [it8771] = {
 398                 .name = "it8771",
 399                 .suffix = "E",
 400                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 401                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 402                   | FEAT_PWM_FREQ2 | FEAT_SCALING,
 403                                 /* PECI: guesswork */
 404                                 /* 12mV ADC (OHM) */
 405                                 /* 16 bit fans (OHM) */
 406                                 /* three fans, always 16 bit (guesswork) */
 407                 .peci_mask = 0x07,
 408         },
 409         [it8772] = {
 410                 .name = "it8772",
 411                 .suffix = "E",
 412                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 413                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 414                   | FEAT_PWM_FREQ2 | FEAT_SCALING,
 415                                 /* PECI (coreboot) */
 416                                 /* 12mV ADC (HWSensors4, OHM) */
 417                                 /* 16 bit fans (HWSensors4, OHM) */
 418                                 /* three fans, always 16 bit (datasheet) */
 419                 .peci_mask = 0x07,
 420         },
 421         [it8781] = {
 422                 .name = "it8781",
 423                 .suffix = "F",
 424                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 425                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
 426                 .old_peci_mask = 0x4,
 427         },
 428         [it8782] = {
 429                 .name = "it8782",
 430                 .suffix = "F",
 431                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 432                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
 433                 .old_peci_mask = 0x4,
 434         },
 435         [it8783] = {
 436                 .name = "it8783",
 437                 .suffix = "E/F",
 438                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 439                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
 440                 .old_peci_mask = 0x4,
 441         },
 442         [it8786] = {
 443                 .name = "it8786",
 444                 .suffix = "E",
 445                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 446                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 447                   | FEAT_PWM_FREQ2,
 448                 .peci_mask = 0x07,
 449         },
 450         [it8790] = {
 451                 .name = "it8790",
 452                 .suffix = "E",
 453                 .features = FEAT_NEWER_AUTOPWM | FEAT_10_9MV_ADC | FEAT_SCALING
 454                   | FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI
 455                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2,
 456                 .peci_mask = 0x07,
 457         },
 458         [it8792] = {
 459                 .name = "it8792",
 460                 .suffix = "E",
 461                 .features = FEAT_NEWER_AUTOPWM | FEAT_10_9MV_ADC | FEAT_SCALING
 462                   | FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI
 463                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2,
 464                 .peci_mask = 0x07,
 465         },
 466         [it8603] = {
 467                 .name = "it8603",
 468                 .suffix = "E",
 469                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 470                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 471                   | FEAT_AVCC3 | FEAT_PWM_FREQ2 | FEAT_SCALING,
 472                 .peci_mask = 0x07,
 473         },
 474         [it8607] = {
 475                 .name = "it8607",
 476                 .suffix = "E",
 477                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 478                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 479                   | FEAT_AVCC3 | FEAT_PWM_FREQ2 | FEAT_SCALING,
 480                 .peci_mask = 0x07,
 481         },
 482         [it8620] = {
 483                 .name = "it8620",
 484                 .suffix = "E",
 485                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 486                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 487                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 488                   | FEAT_SIX_TEMP | FEAT_VIN3_5V | FEAT_SCALING,
 489                 .peci_mask = 0x07,
 490         },
 491         [it8622] = {
 492                 .name = "it8622",
 493                 .suffix = "E",
 494                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 495                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 496                   | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
 497                   | FEAT_AVCC3 | FEAT_VIN3_5V | FEAT_SCALING,
 498                 .peci_mask = 0x07,
 499         },
 500         [it8628] = {
 501                 .name = "it8628",
 502                 .suffix = "E",
 503                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 504                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 505                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 506                   | FEAT_SIX_TEMP | FEAT_SCALING,
 507                 .peci_mask = 0x07,
 508         },
 509         [it8655] = {
 510                 .name = "it8655",
 511                 .suffix = "E",
 512                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 513                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI
 514                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_BANK_SEL,
 515                 .peci_mask = 0x07,
 516         },
 517         [it8665] = {
 518                 .name = "it8665",
 519                 .suffix = "E",
 520                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 521                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI
 522                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_SIX_FANS
 523                   | FEAT_SIX_PWM | FEAT_BANK_SEL,
 524                 .peci_mask = 0x07,
 525         },
 526         [it8686] = {
 527                 .name = "it8686",
 528                 .suffix = "E",
 529                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 530                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 531                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 532                   | FEAT_SIX_TEMP | FEAT_BANK_SEL | FEAT_SCALING,
 533                 .peci_mask = 0x07,
 534         },
 535 };
 536
 537 #define has_16bit_fans(data)    ((data)->features & FEAT_16BIT_FANS)
 538 #define has_12mv_adc(data)      ((data)->features & FEAT_12MV_ADC)
 539 #define has_10_9mv_adc(data)    ((data)->features & FEAT_10_9MV_ADC)
 540 #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
 541 #define has_old_autopwm(data)   ((data)->features & FEAT_OLD_AUTOPWM)
 542 #define has_temp_offset(data)   ((data)->features & FEAT_TEMP_OFFSET)
 543 #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \
 544                                  ((data)->peci_mask & BIT(nr)))
 545 #define has_temp_old_peci(data, nr) \
 546                                 (((data)->features & FEAT_TEMP_OLD_PECI) && \
 547                                  ((data)->old_peci_mask & BIT(nr)))
 548 #define has_fan16_config(data)  ((data)->features & FEAT_FAN16_CONFIG)
 549 #define has_five_fans(data)     ((data)->features & (FEAT_FIVE_FANS | \
 550                                                      FEAT_SIX_FANS))
 551 #define has_vid(data)           ((data)->features & FEAT_VID)
 552 #define has_in7_internal(data)  ((data)->features & FEAT_IN7_INTERNAL)
 553 #define has_six_fans(data)      ((data)->features & FEAT_SIX_FANS)
 554 #define has_avcc3(data)         ((data)->features & FEAT_AVCC3)
 555 #define has_five_pwm(data)      ((data)->features & (FEAT_FIVE_PWM \
 556                                                      | FEAT_SIX_PWM))
 557 #define has_six_pwm(data)       ((data)->features & FEAT_SIX_PWM)
 558 #define has_pwm_freq2(data)     ((data)->features & FEAT_PWM_FREQ2)
 559 #define has_six_temp(data)      ((data)->features & FEAT_SIX_TEMP)
 560 #define has_vin3_5v(data)       ((data)->features & FEAT_VIN3_5V)
 561 #define has_four_fans(data)     ((data)->features & (FEAT_FOUR_FANS | \
 562                                                      FEAT_FIVE_FANS | \
 563                                                      FEAT_SIX_FANS))
 564 #define has_four_pwm(data)      ((data)->features & (FEAT_FOUR_PWM | \
 565                                                      FEAT_FIVE_PWM \
 566                                                      | FEAT_SIX_PWM))
 567 #define has_bank_sel(data)      ((data)->features & FEAT_BANK_SEL)
 568 #define has_scaling(data)       ((data)->features & FEAT_SCALING)
 569
 570 struct it87_sio_data {
 571         enum chips type;
 572         /* Values read from Super-I/O config space */
 573         u8 revision;
 574         u8 vid_value;
 575         u8 beep_pin;
 576         u8 internal;    /* Internal sensors can be labeled */
 577         /* Features skipped based on config or DMI */
 578         u16 skip_in;
 579         u8 skip_vid;
 580         u8 skip_fan;
 581         u8 skip_pwm;
 582         u8 skip_temp;
 583 };
 584
 585 /*
 586  * For each registered chip, we need to keep some data in memory.
 587  * The structure is dynamically allocated.
 588  */
 589 struct it87_data {
 590         const struct attribute_group *groups[7];
 591         enum chips type;
 592         u32 features;
 593         u8 bank;
 594         u8 peci_mask;
 595         u8 old_peci_mask;
 596
 597         const u8 *REG_FAN;
 598         const u8 *REG_FANX;
 599         const u8 *REG_FAN_MIN;
 600         const u8 *REG_FANX_MIN;
 601
 602         const u8 *REG_PWM;
 603
 604         unsigned short addr;
 605         const char *name;
 606         struct mutex update_lock;
 607         char valid;             /* !=0 if following fields are valid */
 608         unsigned long last_updated;     /* In jiffies */
 609
 610         u16 in_scaled;          /* Internal voltage sensors are scaled */
 611         u16 in_internal;        /* Bitfield, internal sensors (for labels) */
 612         u16 has_in;             /* Bitfield, voltage sensors enabled */
 613         u8 in[NUM_VIN][3];              /* [nr][0]=in, [1]=min, [2]=max */
 614         u8 has_fan;             /* Bitfield, fans enabled */
 615         u16 fan[NUM_FAN][2];    /* Register values, [nr][0]=fan, [1]=min */
 616         u8 has_temp;            /* Bitfield, temp sensors enabled */
 617         s8 temp[NUM_TEMP][4];   /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
 618         u8 sensor;              /* Register value (IT87_REG_TEMP_ENABLE) */
 619         u8 extra;               /* Register value (IT87_REG_TEMP_EXTRA) */
 620         u8 fan_div[NUM_FAN_DIV];/* Register encoding, shifted right */
 621         bool has_vid;           /* True if VID supported */
 622         u8 vid;                 /* Register encoding, combined */
 623         u8 vrm;
 624         u32 alarms;             /* Register encoding, combined */
 625         bool has_beep;          /* true if beep supported */
 626         u8 beeps;               /* Register encoding */
 627         u8 fan_main_ctrl;       /* Register value */
 628         u8 fan_ctl;             /* Register value */
 629
 630         /*
 631          * The following 3 arrays correspond to the same registers up to
 632          * the IT8720F. The meaning of bits 6-0 depends on the value of bit
 633          * 7, and we want to preserve settings on mode changes, so we have
 634          * to track all values separately.
 635          * Starting with the IT8721F, the manual PWM duty cycles are stored
 636          * in separate registers (8-bit values), so the separate tracking
 637          * is no longer needed, but it is still done to keep the driver
 638          * simple.
 639          */
 640         u8 has_pwm;             /* Bitfield, pwm control enabled */
 641         u8 pwm_ctrl[NUM_PWM];   /* Register value */
 642         u8 pwm_duty[NUM_PWM];   /* Manual PWM value set by user */
 643         u8 pwm_temp_map[NUM_PWM];/* PWM to temp. chan. mapping (bits 1-0) */
 644
 645         /* Automatic fan speed control registers */
 646         u8 auto_pwm[NUM_AUTO_PWM][4];   /* [nr][3] is hard-coded */
 647         s8 auto_temp[NUM_AUTO_PWM][5];  /* [nr][0] is point1_temp_hyst */
 648 };
 649
 650 static int adc_lsb(const struct it87_data *data, int nr)
 651 {
 652         int lsb;
 653
 654         if (has_12mv_adc(data))
 655                 lsb = 120;
 656         else if (has_10_9mv_adc(data))
 657                 lsb = 109;
 658         else
 659                 lsb = 160;
 660         if (data->in_scaled & BIT(nr))
 661                 lsb <<= 1;
 662         return lsb;
 663 }
 664
 665 static u8 in_to_reg(const struct it87_data *data, int nr, long val)
 666 {
 667         val = DIV_ROUND_CLOSEST(val * 10, adc_lsb(data, nr));
 668         return clamp_val(val, 0, 255);
 669 }
 670
 671 static int in_from_reg(const struct it87_data *data, int nr, int val)
 672 {
 673         return DIV_ROUND_CLOSEST(val * adc_lsb(data, nr), 10);
 674 }
 675
 676 static inline u8 FAN_TO_REG(long rpm, int div)
 677 {
 678         if (rpm == 0)
 679                 return 255;
 680         rpm = clamp_val(rpm, 1, 1000000);
 681         return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
 682 }
 683
 684 static inline u16 FAN16_TO_REG(long rpm)
 685 {
 686         if (rpm == 0)
 687                 return 0xffff;
 688         return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
 689 }
 690
 691 #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
 692                                 1350000 / ((val) * (div)))
 693 /* The divider is fixed to 2 in 16-bit mode */
 694 #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
 695                              1350000 / ((val) * 2))
 696
 697 #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \
 698                                     ((val) + 500) / 1000), -128, 127))
 699 #define TEMP_FROM_REG(val) ((val) * 1000)
 700
 701 static u8 pwm_to_reg(const struct it87_data *data, long val)
 702 {
 703         if (has_newer_autopwm(data))
 704                 return val;
 705         else
 706                 return val >> 1;
 707 }
 708
 709 static int pwm_from_reg(const struct it87_data *data, u8 reg)
 710 {
 711         if (has_newer_autopwm(data))
 712                 return reg;
 713         else
 714                 return (reg & 0x7f) << 1;
 715 }
 716
 717 static int DIV_TO_REG(int val)
 718 {
 719         int answer = 0;
 720
 721         while (answer < 7 && (val >>= 1))
 722                 answer++;
 723         return answer;
 724 }
 725
 726 #define DIV_FROM_REG(val) BIT(val)
 727
 728 /*
 729  * PWM base frequencies. The frequency has to be divided by either 128 or 256,
 730  * depending on the chip type, to calculate the actual PWM frequency.
 731  *
 732  * Some of the chip datasheets suggest a base frequency of 51 kHz instead
 733  * of 750 kHz for the slowest base frequency, resulting in a PWM frequency
 734  * of 200 Hz. Sometimes both PWM frequency select registers are affected,
 735  * sometimes just one. It is unknown if this is a datasheet error or real,
 736  * so this is ignored for now.
 737  */
 738 static const unsigned int pwm_freq[8] = {
 739         48000000,
 740         24000000,
 741         12000000,
 742         8000000,
 743         6000000,
 744         3000000,
 745         1500000,
 746         750000,
 747 };
 748
 749 static int _it87_read_value(struct it87_data *data, u8 reg)
 750 {
 751         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 752         return inb_p(data->addr + IT87_DATA_REG_OFFSET);
 753 }
 754
 755 static void _it87_write_value(struct it87_data *data, u8 reg, u8 value)
 756 {
 757         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 758         outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
 759 }
 760
 761 static void it87_set_bank(struct it87_data *data, u8 bank)
 762 {
 763         if (has_bank_sel(data) && bank != data->bank) {
 764                 u8 breg = _it87_read_value(data, IT87_REG_BANK);
 765
 766                 breg &= 0x1f;
 767                 breg |= (bank << 5);
 768                 data->bank = bank;
 769                 _it87_write_value(data, IT87_REG_BANK, breg);
 770         }
 771 }
 772
 773 /*
 774  * Must be called with data->update_lock held, except during initialization.
 775  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 776  * would slow down the IT87 access and should not be necessary.
 777  */
 778 static int it87_read_value(struct it87_data *data, u16 reg)
 779 {
 780         it87_set_bank(data, reg >> 8);
 781         return _it87_read_value(data, reg & 0xff);
 782 }
 783
 784 /*
 785  * Must be called with data->update_lock held, except during initialization.
 786  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 787  * would slow down the IT87 access and should not be necessary.
 788  */
 789 static void it87_write_value(struct it87_data *data, u16 reg, u8 value)
 790 {
 791         it87_set_bank(data, reg >> 8);
 792         _it87_write_value(data, reg & 0xff, value);
 793 }
 794
 795 static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
 796 {
 797         data->pwm_ctrl[nr] = it87_read_value(data, data->REG_PWM[nr]);
 798         if (has_newer_autopwm(data)) {
 799                 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
 800                 data->pwm_duty[nr] = it87_read_value(data,
 801                                                      IT87_REG_PWM_DUTY[nr]);
 802         } else {
 803                 if (data->pwm_ctrl[nr] & 0x80)  /* Automatic mode */
 804                         data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
 805                 else                            /* Manual mode */
 806                         data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
 807         }
 808
 809         if (has_old_autopwm(data)) {
 810                 int i;
 811
 812                 for (i = 0; i < 5 ; i++)
 813                         data->auto_temp[nr][i] = it87_read_value(data,
 814                                                 IT87_REG_AUTO_TEMP(nr, i));
 815                 for (i = 0; i < 3 ; i++)
 816                         data->auto_pwm[nr][i] = it87_read_value(data,
 817                                                 IT87_REG_AUTO_PWM(nr, i));
 818         } else if (has_newer_autopwm(data)) {
 819                 int i;
 820
 821                 /*
 822                  * 0: temperature hysteresis (base + 5)
 823                  * 1: fan off temperature (base + 0)
 824                  * 2: fan start temperature (base + 1)
 825                  * 3: fan max temperature (base + 2)
 826                  */
 827                 data->auto_temp[nr][0] =
 828                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 5));
 829
 830                 for (i = 0; i < 3 ; i++)
 831                         data->auto_temp[nr][i + 1] =
 832                                 it87_read_value(data,
 833                                                 IT87_REG_AUTO_TEMP(nr, i));
 834                 /*
 835                  * 0: start pwm value (base + 3)
 836                  * 1: pwm slope (base + 4, 1/8th pwm)
 837                  */
 838                 data->auto_pwm[nr][0] =
 839                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 3));
 840                 data->auto_pwm[nr][1] =
 841                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 4));
 842         }
 843 }
 844
 845 static struct it87_data *it87_update_device(struct device *dev)
 846 {
 847         struct it87_data *data = dev_get_drvdata(dev);
 848         int i;
 849
 850         mutex_lock(&data->update_lock);
 851
 852         if (time_after(jiffies, data->last_updated + HZ + HZ / 2) ||
 853             !data->valid) {
 854                 if (update_vbat) {
 855                         /*
 856                          * Cleared after each update, so reenable.  Value
 857                          * returned by this read will be previous value
 858                          */
 859                         it87_write_value(data, IT87_REG_CONFIG,
 860                                 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
 861                 }
 862                 for (i = 0; i < NUM_VIN; i++) {
 863                         if (!(data->has_in & BIT(i)))
 864                                 continue;
 865
 866                         data->in[i][0] =
 867                                 it87_read_value(data, IT87_REG_VIN[i]);
 868
 869                         /* VBAT and AVCC don't have limit registers */
 870                         if (i >= NUM_VIN_LIMIT)
 871                                 continue;
 872
 873                         data->in[i][1] =
 874                                 it87_read_value(data, IT87_REG_VIN_MIN(i));
 875                         data->in[i][2] =
 876                                 it87_read_value(data, IT87_REG_VIN_MAX(i));
 877                 }
 878
 879                 for (i = 0; i < NUM_FAN; i++) {
 880                         /* Skip disabled fans */
 881                         if (!(data->has_fan & BIT(i)))
 882                                 continue;
 883
 884                         data->fan[i][1] =
 885                                 it87_read_value(data, data->REG_FAN_MIN[i]);
 886                         data->fan[i][0] = it87_read_value(data,
 887                                        data->REG_FAN[i]);
 888                         /* Add high byte if in 16-bit mode */
 889                         if (has_16bit_fans(data)) {
 890                                 data->fan[i][0] |= it87_read_value(data,
 891                                                 data->REG_FANX[i]) << 8;
 892                                 data->fan[i][1] |= it87_read_value(data,
 893                                                 data->REG_FANX_MIN[i]) << 8;
 894                         }
 895                 }
 896                 for (i = 0; i < NUM_TEMP; i++) {
 897                         if (!(data->has_temp & BIT(i)))
 898                                 continue;
 899                         data->temp[i][0] =
 900                                 it87_read_value(data, IT87_REG_TEMP(i));
 901
 902                         if (has_temp_offset(data) && i < NUM_TEMP_OFFSET)
 903                                 data->temp[i][3] =
 904                                   it87_read_value(data,
 905                                                   IT87_REG_TEMP_OFFSET[i]);
 906
 907                         if (i >= NUM_TEMP_LIMIT)
 908                                 continue;
 909
 910                         data->temp[i][1] =
 911                                 it87_read_value(data, IT87_REG_TEMP_LOW(i));
 912                         data->temp[i][2] =
 913                                 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
 914                 }
 915
 916                 /* Newer chips don't have clock dividers */
 917                 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
 918                         i = it87_read_value(data, IT87_REG_FAN_DIV);
 919                         data->fan_div[0] = i & 0x07;
 920                         data->fan_div[1] = (i >> 3) & 0x07;
 921                         data->fan_div[2] = (i & 0x40) ? 3 : 1;
 922                 }
 923
 924                 data->alarms =
 925                         it87_read_value(data, IT87_REG_ALARM1) |
 926                         (it87_read_value(data, IT87_REG_ALARM2) << 8) |
 927                         (it87_read_value(data, IT87_REG_ALARM3) << 16);
 928                 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
 929
 930                 data->fan_main_ctrl = it87_read_value(data,
 931                                 IT87_REG_FAN_MAIN_CTRL);
 932                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
 933                 for (i = 0; i < NUM_PWM; i++) {
 934                         if (!(data->has_pwm & BIT(i)))
 935                                 continue;
 936                         it87_update_pwm_ctrl(data, i);
 937                 }
 938
 939                 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
 940                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
 941                 /*
 942                  * The IT8705F does not have VID capability.
 943                  * The IT8718F and later don't use IT87_REG_VID for the
 944                  * same purpose.
 945                  */
 946                 if (data->type == it8712 || data->type == it8716) {
 947                         data->vid = it87_read_value(data, IT87_REG_VID);
 948                         /*
 949                          * The older IT8712F revisions had only 5 VID pins,
 950                          * but we assume it is always safe to read 6 bits.
 951                          */
 952                         data->vid &= 0x3f;
 953                 }
 954                 data->last_updated = jiffies;
 955                 data->valid = 1;
 956         }
 957
 958         mutex_unlock(&data->update_lock);
 959
 960         return data;
 961 }
 962
 963 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
 964                        char *buf)
 965 {
 966         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 967         struct it87_data *data = it87_update_device(dev);
 968         int index = sattr->index;
 969         int nr = sattr->nr;
 970
 971         return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
 972 }
 973
 974 static ssize_t set_in(struct device *dev, struct device_attribute *attr,
 975                       const char *buf, size_t count)
 976 {
 977         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 978         struct it87_data *data = dev_get_drvdata(dev);
 979         int index = sattr->index;
 980         int nr = sattr->nr;
 981         unsigned long val;
 982
 983         if (kstrtoul(buf, 10, &val) < 0)
 984                 return -EINVAL;
 985
 986         mutex_lock(&data->update_lock);
 987         data->in[nr][index] = in_to_reg(data, nr, val);
 988         it87_write_value(data,
 989                          index == 1 ? IT87_REG_VIN_MIN(nr)
 990                                     : IT87_REG_VIN_MAX(nr),
 991                          data->in[nr][index]);
 992         mutex_unlock(&data->update_lock);
 993         return count;
 994 }
 995
 996 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
 997 static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
 998                             0, 1);
 999 static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
1000                             0, 2);
1001
1002 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
1003 static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
1004                             1, 1);
1005 static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
1006                             1, 2);
1007
1008 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
1009 static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
1010                             2, 1);
1011 static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
1012                             2, 2);
1013
1014 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
1015 static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
1016                             3, 1);
1017 static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
1018                             3, 2);
1019
1020 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
1021 static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
1022                             4, 1);
1023 static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
1024                             4, 2);
1025
1026 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
1027 static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
1028                             5, 1);
1029 static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
1030                             5, 2);
1031
1032 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
1033 static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
1034                             6, 1);
1035 static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
1036                             6, 2);
1037
1038 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
1039 static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
1040                             7, 1);
1041 static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
1042                             7, 2);
1043
1044 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
1045 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0);
1046 static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in, NULL, 10, 0);
1047 static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in, NULL, 11, 0);
1048 static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in, NULL, 12, 0);
1049
1050 /* Up to 6 temperatures */
1051 static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
1052                          char *buf)
1053 {
1054         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1055         int nr = sattr->nr;
1056         int index = sattr->index;
1057         struct it87_data *data = it87_update_device(dev);
1058
1059         return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
1060 }
1061
1062 static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
1063                         const char *buf, size_t count)
1064 {
1065         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1066         int nr = sattr->nr;
1067         int index = sattr->index;
1068         struct it87_data *data = dev_get_drvdata(dev);
1069         long val;
1070         u8 reg, regval;
1071
1072         if (kstrtol(buf, 10, &val) < 0)
1073                 return -EINVAL;
1074
1075         mutex_lock(&data->update_lock);
1076
1077         switch (index) {
1078         default:
1079         case 1:
1080                 reg = IT87_REG_TEMP_LOW(nr);
1081                 break;
1082         case 2:
1083                 reg = IT87_REG_TEMP_HIGH(nr);
1084                 break;
1085         case 3:
1086                 regval = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1087                 if (!(regval & 0x80)) {
1088                         regval |= 0x80;
1089                         it87_write_value(data, IT87_REG_BEEP_ENABLE, regval);
1090                 }
1091                 data->valid = 0;
1092                 reg = IT87_REG_TEMP_OFFSET[nr];
1093                 break;
1094         }
1095
1096         data->temp[nr][index] = TEMP_TO_REG(val);
1097         it87_write_value(data, reg, data->temp[nr][index]);
1098         mutex_unlock(&data->update_lock);
1099         return count;
1100 }
1101
1102 static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
1103 static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1104                             0, 1);
1105 static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1106                             0, 2);
1107 static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
1108                             set_temp, 0, 3);
1109 static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
1110 static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1111                             1, 1);
1112 static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1113                             1, 2);
1114 static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
1115                             set_temp, 1, 3);
1116 static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
1117 static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1118                             2, 1);
1119 static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1120                             2, 2);
1121 static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
1122                             set_temp, 2, 3);
1123 static SENSOR_DEVICE_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0);
1124 static SENSOR_DEVICE_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0);
1125 static SENSOR_DEVICE_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0);
1126
1127 static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
1128                               char *buf)
1129 {
1130         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1131         int nr = sensor_attr->index;
1132         struct it87_data *data = it87_update_device(dev);
1133         u8 reg = data->sensor;      /* In case value is updated while used */
1134         u8 extra = data->extra;
1135
1136         if ((has_temp_peci(data, nr) && (reg >> 6 == nr + 1)) ||
1137             (has_temp_old_peci(data, nr) && (extra & 0x80)))
1138                 return sprintf(buf, "6\n");  /* Intel PECI */
1139         if (reg & (1 << nr))
1140                 return sprintf(buf, "3\n");  /* thermal diode */
1141         if (reg & (8 << nr))
1142                 return sprintf(buf, "4\n");  /* thermistor */
1143         return sprintf(buf, "0\n");      /* disabled */
1144 }
1145
1146 static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
1147                              const char *buf, size_t count)
1148 {
1149         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1150         int nr = sensor_attr->index;
1151
1152         struct it87_data *data = dev_get_drvdata(dev);
1153         long val;
1154         u8 reg, extra;
1155
1156         if (kstrtol(buf, 10, &val) < 0)
1157                 return -EINVAL;
1158
1159         reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1160         reg &= ~(1 << nr);
1161         reg &= ~(8 << nr);
1162         if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6))
1163                 reg &= 0x3f;
1164         extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1165         if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6))
1166                 extra &= 0x7f;
1167         if (val == 2) { /* backwards compatibility */
1168                 dev_warn(dev,
1169                          "Sensor type 2 is deprecated, please use 4 instead\n");
1170                 val = 4;
1171         }
1172         /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */
1173         if (val == 3)
1174                 reg |= 1 << nr;
1175         else if (val == 4)
1176                 reg |= 8 << nr;
1177         else if (has_temp_peci(data, nr) && val == 6)
1178                 reg |= (nr + 1) << 6;
1179         else if (has_temp_old_peci(data, nr) && val == 6)
1180                 extra |= 0x80;
1181         else if (val != 0)
1182                 return -EINVAL;
1183
1184         mutex_lock(&data->update_lock);
1185         data->sensor = reg;
1186         data->extra = extra;
1187         it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
1188         if (has_temp_old_peci(data, nr))
1189                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1190         data->valid = 0;        /* Force cache refresh */
1191         mutex_unlock(&data->update_lock);
1192         return count;
1193 }
1194
1195 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1196                           set_temp_type, 0);
1197 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1198                           set_temp_type, 1);
1199 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1200                           set_temp_type, 2);
1201
1202 /* 6 Fans */
1203
1204 static int pwm_mode(const struct it87_data *data, int nr)
1205 {
1206         if (data->type != it8603 && nr < 3 && !(data->fan_main_ctrl & BIT(nr)))
1207                 return 0;                               /* Full speed */
1208         if (data->pwm_ctrl[nr] & 0x80)
1209                 return 2;                               /* Automatic mode */
1210         if ((data->type == it8603 || nr >= 3) &&
1211             data->pwm_duty[nr] == pwm_to_reg(data, 0xff))
1212                 return 0;                       /* Full speed */
1213
1214         return 1;                               /* Manual mode */
1215 }
1216
1217 static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
1218                         char *buf)
1219 {
1220         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1221         int nr = sattr->nr;
1222         int index = sattr->index;
1223         int speed;
1224         struct it87_data *data = it87_update_device(dev);
1225
1226         speed = has_16bit_fans(data) ?
1227                 FAN16_FROM_REG(data->fan[nr][index]) :
1228                 FAN_FROM_REG(data->fan[nr][index],
1229                              DIV_FROM_REG(data->fan_div[nr]));
1230         return sprintf(buf, "%d\n", speed);
1231 }
1232
1233 static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
1234                             char *buf)
1235 {
1236         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1237         struct it87_data *data = it87_update_device(dev);
1238         int nr = sensor_attr->index;
1239
1240         return sprintf(buf, "%lu\n", DIV_FROM_REG(data->fan_div[nr]));
1241 }
1242
1243 static ssize_t show_pwm_enable(struct device *dev,
1244                                struct device_attribute *attr, char *buf)
1245 {
1246         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1247         struct it87_data *data = it87_update_device(dev);
1248         int nr = sensor_attr->index;
1249
1250         return sprintf(buf, "%d\n", pwm_mode(data, nr));
1251 }
1252
1253 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
1254                         char *buf)
1255 {
1256         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1257         struct it87_data *data = it87_update_device(dev);
1258         int nr = sensor_attr->index;
1259
1260         return sprintf(buf, "%d\n",
1261                        pwm_from_reg(data, data->pwm_duty[nr]));
1262 }
1263
1264 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
1265                              char *buf)
1266 {
1267         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1268         struct it87_data *data = it87_update_device(dev);
1269         int nr = sensor_attr->index;
1270         unsigned int freq;
1271         int index;
1272
1273         if (has_pwm_freq2(data) && nr == 1)
1274                 index = (data->extra >> 4) & 0x07;
1275         else
1276                 index = (data->fan_ctl >> 4) & 0x07;
1277
1278         freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128);
1279
1280         return sprintf(buf, "%u\n", freq);
1281 }
1282
1283 static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
1284                        const char *buf, size_t count)
1285 {
1286         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1287         int nr = sattr->nr;
1288         int index = sattr->index;
1289
1290         struct it87_data *data = dev_get_drvdata(dev);
1291         long val;
1292         u8 reg;
1293
1294         if (kstrtol(buf, 10, &val) < 0)
1295                 return -EINVAL;
1296
1297         mutex_lock(&data->update_lock);
1298
1299         if (has_16bit_fans(data)) {
1300                 data->fan[nr][index] = FAN16_TO_REG(val);
1301                 it87_write_value(data, data->REG_FAN_MIN[nr],
1302                                  data->fan[nr][index] & 0xff);
1303                 it87_write_value(data, data->REG_FANX_MIN[nr],
1304                                  data->fan[nr][index] >> 8);
1305         } else {
1306                 reg = it87_read_value(data, IT87_REG_FAN_DIV);
1307                 switch (nr) {
1308                 case 0:
1309                         data->fan_div[nr] = reg & 0x07;
1310                         break;
1311                 case 1:
1312                         data->fan_div[nr] = (reg >> 3) & 0x07;
1313                         break;
1314                 case 2:
1315                         data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
1316                         break;
1317                 }
1318                 data->fan[nr][index] =
1319                   FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
1320                 it87_write_value(data, data->REG_FAN_MIN[nr],
1321                                  data->fan[nr][index]);
1322         }
1323
1324         mutex_unlock(&data->update_lock);
1325         return count;
1326 }
1327
1328 static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
1329                            const char *buf, size_t count)
1330 {
1331         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1332         struct it87_data *data = dev_get_drvdata(dev);
1333         int nr = sensor_attr->index;
1334         unsigned long val;
1335         int min;
1336         u8 old;
1337
1338         if (kstrtoul(buf, 10, &val) < 0)
1339                 return -EINVAL;
1340
1341         mutex_lock(&data->update_lock);
1342         old = it87_read_value(data, IT87_REG_FAN_DIV);
1343
1344         /* Save fan min limit */
1345         min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
1346
1347         switch (nr) {
1348         case 0:
1349         case 1:
1350                 data->fan_div[nr] = DIV_TO_REG(val);
1351                 break;
1352         case 2:
1353                 if (val < 8)
1354                         data->fan_div[nr] = 1;
1355                 else
1356                         data->fan_div[nr] = 3;
1357         }
1358         val = old & 0x80;
1359         val |= (data->fan_div[0] & 0x07);
1360         val |= (data->fan_div[1] & 0x07) << 3;
1361         if (data->fan_div[2] == 3)
1362                 val |= 0x1 << 6;
1363         it87_write_value(data, IT87_REG_FAN_DIV, val);
1364
1365         /* Restore fan min limit */
1366         data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
1367         it87_write_value(data, data->REG_FAN_MIN[nr], data->fan[nr][1]);
1368
1369         mutex_unlock(&data->update_lock);
1370         return count;
1371 }
1372
1373 /* Returns 0 if OK, -EINVAL otherwise */
1374 static int check_trip_points(struct device *dev, int nr)
1375 {
1376         const struct it87_data *data = dev_get_drvdata(dev);
1377         int i, err = 0;
1378
1379         if (has_old_autopwm(data)) {
1380                 for (i = 0; i < 3; i++) {
1381                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1382                                 err = -EINVAL;
1383                 }
1384                 for (i = 0; i < 2; i++) {
1385                         if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1386                                 err = -EINVAL;
1387                 }
1388         } else if (has_newer_autopwm(data)) {
1389                 for (i = 1; i < 3; i++) {
1390                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1391                                 err = -EINVAL;
1392                 }
1393         }
1394
1395         if (err) {
1396                 dev_err(dev,
1397                         "Inconsistent trip points, not switching to automatic mode\n");
1398                 dev_err(dev, "Adjust the trip points and try again\n");
1399         }
1400         return err;
1401 }
1402
1403 static ssize_t set_pwm_enable(struct device *dev, struct device_attribute *attr,
1404                               const char *buf, size_t count)
1405 {
1406         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1407         struct it87_data *data = dev_get_drvdata(dev);
1408         int nr = sensor_attr->index;
1409         long val;
1410
1411         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
1412                 return -EINVAL;
1413
1414         /* Check trip points before switching to automatic mode */
1415         if (val == 2) {
1416                 if (check_trip_points(dev, nr) < 0)
1417                         return -EINVAL;
1418         }
1419
1420         mutex_lock(&data->update_lock);
1421
1422         if (val == 0) {
1423                 if (nr < 3 && data->type != it8603) {
1424                         int tmp;
1425                         /* make sure the fan is on when in on/off mode */
1426                         tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1427                         it87_write_value(data, IT87_REG_FAN_CTL, tmp | BIT(nr));
1428                         /* set on/off mode */
1429                         data->fan_main_ctrl &= ~BIT(nr);
1430                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1431                                          data->fan_main_ctrl);
1432                 } else {
1433                         u8 ctrl;
1434
1435                         /* No on/off mode, set maximum pwm value */
1436                         data->pwm_duty[nr] = pwm_to_reg(data, 0xff);
1437                         it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1438                                          data->pwm_duty[nr]);
1439                         /* and set manual mode */
1440                         if (has_newer_autopwm(data)) {
1441                                 ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1442                                         data->pwm_temp_map[nr];
1443                         } else {
1444                                 ctrl = data->pwm_duty[nr];
1445                         }
1446                         data->pwm_ctrl[nr] = ctrl;
1447                         it87_write_value(data, data->REG_PWM[nr], ctrl);
1448                 }
1449         } else {
1450                 u8 ctrl;
1451
1452                 if (has_newer_autopwm(data)) {
1453                         ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1454                                 data->pwm_temp_map[nr];
1455                         if (val != 1)
1456                                 ctrl |= 0x80;
1457                 } else {
1458                         ctrl = (val == 1 ? data->pwm_duty[nr] : 0x80);
1459                 }
1460                 data->pwm_ctrl[nr] = ctrl;
1461                 it87_write_value(data, data->REG_PWM[nr], ctrl);
1462
1463                 if (data->type != it8603 && nr < 3) {
1464                         /* set SmartGuardian mode */
1465                         data->fan_main_ctrl |= BIT(nr);
1466                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1467                                          data->fan_main_ctrl);
1468                 }
1469         }
1470
1471         mutex_unlock(&data->update_lock);
1472         return count;
1473 }
1474
1475 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1476                        const char *buf, size_t count)
1477 {
1478         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1479         struct it87_data *data = dev_get_drvdata(dev);
1480         int nr = sensor_attr->index;
1481         long val;
1482
1483         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1484                 return -EINVAL;
1485
1486         mutex_lock(&data->update_lock);
1487         it87_update_pwm_ctrl(data, nr);
1488         if (has_newer_autopwm(data)) {
1489                 /*
1490                  * If we are in automatic mode, the PWM duty cycle register
1491                  * is read-only so we can't write the value.
1492                  */
1493                 if (data->pwm_ctrl[nr] & 0x80) {
1494                         mutex_unlock(&data->update_lock);
1495                         return -EBUSY;
1496                 }
1497                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1498                 it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1499                                  data->pwm_duty[nr]);
1500         } else {
1501                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1502                 /*
1503                  * If we are in manual mode, write the duty cycle immediately;
1504                  * otherwise, just store it for later use.
1505                  */
1506                 if (!(data->pwm_ctrl[nr] & 0x80)) {
1507                         data->pwm_ctrl[nr] = data->pwm_duty[nr];
1508                         it87_write_value(data, data->REG_PWM[nr],
1509                                          data->pwm_ctrl[nr]);
1510                 }
1511         }
1512         mutex_unlock(&data->update_lock);
1513         return count;
1514 }
1515
1516 static ssize_t set_pwm_freq(struct device *dev, struct device_attribute *attr,
1517                             const char *buf, size_t count)
1518 {
1519         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1520         struct it87_data *data = dev_get_drvdata(dev);
1521         int nr = sensor_attr->index;
1522         unsigned long val;
1523         int i;
1524
1525         if (kstrtoul(buf, 10, &val) < 0)
1526                 return -EINVAL;
1527
1528         val = clamp_val(val, 0, 1000000);
1529         val *= has_newer_autopwm(data) ? 256 : 128;
1530
1531         /* Search for the nearest available frequency */
1532         for (i = 0; i < 7; i++) {
1533                 if (val > (pwm_freq[i] + pwm_freq[i + 1]) / 2)
1534                         break;
1535         }
1536
1537         mutex_lock(&data->update_lock);
1538         if (nr == 0) {
1539                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
1540                 data->fan_ctl |= i << 4;
1541                 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
1542         } else {
1543                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x8f;
1544                 data->extra |= i << 4;
1545                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1546         }
1547         mutex_unlock(&data->update_lock);
1548
1549         return count;
1550 }
1551
1552 static ssize_t show_pwm_temp_map(struct device *dev,
1553                                  struct device_attribute *attr, char *buf)
1554 {
1555         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1556         struct it87_data *data = it87_update_device(dev);
1557         int nr = sensor_attr->index;
1558         int map;
1559
1560         map = data->pwm_temp_map[nr];
1561         if (map >= 3)
1562                 map = 0;        /* Should never happen */
1563         if (nr >= 3)            /* pwm channels 3..6 map to temp4..6 */
1564                 map += 3;
1565
1566         return sprintf(buf, "%d\n", (int)BIT(map));
1567 }
1568
1569 static ssize_t set_pwm_temp_map(struct device *dev,
1570                                 struct device_attribute *attr, const char *buf,
1571                                 size_t count)
1572 {
1573         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1574         struct it87_data *data = dev_get_drvdata(dev);
1575         int nr = sensor_attr->index;
1576         long val;
1577         u8 reg;
1578
1579         if (kstrtol(buf, 10, &val) < 0)
1580                 return -EINVAL;
1581
1582         if (nr >= 3)
1583                 val -= 3;
1584
1585         switch (val) {
1586         case BIT(0):
1587                 reg = 0x00;
1588                 break;
1589         case BIT(1):
1590                 reg = 0x01;
1591                 break;
1592         case BIT(2):
1593                 reg = 0x02;
1594                 break;
1595         default:
1596                 return -EINVAL;
1597         }
1598
1599         mutex_lock(&data->update_lock);
1600         it87_update_pwm_ctrl(data, nr);
1601         data->pwm_temp_map[nr] = reg;
1602         /*
1603          * If we are in automatic mode, write the temp mapping immediately;
1604          * otherwise, just store it for later use.
1605          */
1606         if (data->pwm_ctrl[nr] & 0x80) {
1607                 data->pwm_ctrl[nr] = (data->pwm_ctrl[nr] & 0xfc) |
1608                                                 data->pwm_temp_map[nr];
1609                 it87_write_value(data, data->REG_PWM[nr], data->pwm_ctrl[nr]);
1610         }
1611         mutex_unlock(&data->update_lock);
1612         return count;
1613 }
1614
1615 static ssize_t show_auto_pwm(struct device *dev, struct device_attribute *attr,
1616                              char *buf)
1617 {
1618         struct it87_data *data = it87_update_device(dev);
1619         struct sensor_device_attribute_2 *sensor_attr =
1620                         to_sensor_dev_attr_2(attr);
1621         int nr = sensor_attr->nr;
1622         int point = sensor_attr->index;
1623
1624         return sprintf(buf, "%d\n",
1625                        pwm_from_reg(data, data->auto_pwm[nr][point]));
1626 }
1627
1628 static ssize_t set_auto_pwm(struct device *dev, struct device_attribute *attr,
1629                             const char *buf, size_t count)
1630 {
1631         struct it87_data *data = dev_get_drvdata(dev);
1632         struct sensor_device_attribute_2 *sensor_attr =
1633                         to_sensor_dev_attr_2(attr);
1634         int nr = sensor_attr->nr;
1635         int point = sensor_attr->index;
1636         int regaddr;
1637         long val;
1638
1639         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1640                 return -EINVAL;
1641
1642         mutex_lock(&data->update_lock);
1643         data->auto_pwm[nr][point] = pwm_to_reg(data, val);
1644         if (has_newer_autopwm(data))
1645                 regaddr = IT87_REG_AUTO_TEMP(nr, 3);
1646         else
1647                 regaddr = IT87_REG_AUTO_PWM(nr, point);
1648         it87_write_value(data, regaddr, data->auto_pwm[nr][point]);
1649         mutex_unlock(&data->update_lock);
1650         return count;
1651 }
1652
1653 static ssize_t show_auto_pwm_slope(struct device *dev,
1654                                    struct device_attribute *attr, char *buf)
1655 {
1656         struct it87_data *data = it87_update_device(dev);
1657         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1658         int nr = sensor_attr->index;
1659
1660         return sprintf(buf, "%d\n", data->auto_pwm[nr][1] & 0x7f);
1661 }
1662
1663 static ssize_t set_auto_pwm_slope(struct device *dev,
1664                                   struct device_attribute *attr,
1665                                   const char *buf, size_t count)
1666 {
1667         struct it87_data *data = dev_get_drvdata(dev);
1668         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1669         int nr = sensor_attr->index;
1670         unsigned long val;
1671
1672         if (kstrtoul(buf, 10, &val) < 0 || val > 127)
1673                 return -EINVAL;
1674
1675         mutex_lock(&data->update_lock);
1676         data->auto_pwm[nr][1] = (data->auto_pwm[nr][1] & 0x80) | val;
1677         it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 4),
1678                          data->auto_pwm[nr][1]);
1679         mutex_unlock(&data->update_lock);
1680         return count;
1681 }
1682
1683 static ssize_t show_auto_temp(struct device *dev, struct device_attribute *attr,
1684                               char *buf)
1685 {
1686         struct it87_data *data = it87_update_device(dev);
1687         struct sensor_device_attribute_2 *sensor_attr =
1688                         to_sensor_dev_attr_2(attr);
1689         int nr = sensor_attr->nr;
1690         int point = sensor_attr->index;
1691         int reg;
1692
1693         if (has_old_autopwm(data) || point)
1694                 reg = data->auto_temp[nr][point];
1695         else
1696                 reg = data->auto_temp[nr][1] - (data->auto_temp[nr][0] & 0x1f);
1697
1698         return sprintf(buf, "%d\n", TEMP_FROM_REG(reg));
1699 }
1700
1701 static ssize_t set_auto_temp(struct device *dev, struct device_attribute *attr,
1702                              const char *buf, size_t count)
1703 {
1704         struct it87_data *data = dev_get_drvdata(dev);
1705         struct sensor_device_attribute_2 *sensor_attr =
1706                         to_sensor_dev_attr_2(attr);
1707         int nr = sensor_attr->nr;
1708         int point = sensor_attr->index;
1709         long val;
1710         int reg;
1711
1712         if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
1713                 return -EINVAL;
1714
1715         mutex_lock(&data->update_lock);
1716         if (has_newer_autopwm(data) && !point) {
1717                 reg = data->auto_temp[nr][1] - TEMP_TO_REG(val);
1718                 reg = clamp_val(reg, 0, 0x1f) | (data->auto_temp[nr][0] & 0xe0);
1719                 data->auto_temp[nr][0] = reg;
1720                 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 5), reg);
1721         } else {
1722                 reg = TEMP_TO_REG(val);
1723                 data->auto_temp[nr][point] = reg;
1724                 if (has_newer_autopwm(data))
1725                         point--;
1726                 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point), reg);
1727         }
1728         mutex_unlock(&data->update_lock);
1729         return count;
1730 }
1731
1732 static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
1733 static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1734                             0, 1);
1735 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
1736                           set_fan_div, 0);
1737
1738 static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
1739 static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1740                             1, 1);
1741 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
1742                           set_fan_div, 1);
1743
1744 static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
1745 static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1746                             2, 1);
1747 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
1748                           set_fan_div, 2);
1749
1750 static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
1751 static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1752                             3, 1);
1753
1754 static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
1755 static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1756                             4, 1);
1757
1758 static SENSOR_DEVICE_ATTR_2(fan6_input, S_IRUGO, show_fan, NULL, 5, 0);
1759 static SENSOR_DEVICE_ATTR_2(fan6_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1760                             5, 1);
1761
1762 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
1763                           show_pwm_enable, set_pwm_enable, 0);
1764 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0);
1765 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq,
1766                           set_pwm_freq, 0);
1767 static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO,
1768                           show_pwm_temp_map, set_pwm_temp_map, 0);
1769 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR,
1770                             show_auto_pwm, set_auto_pwm, 0, 0);
1771 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR,
1772                             show_auto_pwm, set_auto_pwm, 0, 1);
1773 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR,
1774                             show_auto_pwm, set_auto_pwm, 0, 2);
1775 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO,
1776                             show_auto_pwm, NULL, 0, 3);
1777 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
1778                             show_auto_temp, set_auto_temp, 0, 1);
1779 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1780                             show_auto_temp, set_auto_temp, 0, 0);
1781 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
1782                             show_auto_temp, set_auto_temp, 0, 2);
1783 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
1784                             show_auto_temp, set_auto_temp, 0, 3);
1785 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR,
1786                             show_auto_temp, set_auto_temp, 0, 4);
1787 static SENSOR_DEVICE_ATTR_2(pwm1_auto_start, S_IRUGO | S_IWUSR,
1788                             show_auto_pwm, set_auto_pwm, 0, 0);
1789 static SENSOR_DEVICE_ATTR(pwm1_auto_slope, S_IRUGO | S_IWUSR,
1790                           show_auto_pwm_slope, set_auto_pwm_slope, 0);
1791
1792 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
1793                           show_pwm_enable, set_pwm_enable, 1);
1794 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1);
1795 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, set_pwm_freq, 1);
1796 static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO,
1797                           show_pwm_temp_map, set_pwm_temp_map, 1);
1798 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR,
1799                             show_auto_pwm, set_auto_pwm, 1, 0);
1800 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR,
1801                             show_auto_pwm, set_auto_pwm, 1, 1);
1802 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR,
1803                             show_auto_pwm, set_auto_pwm, 1, 2);
1804 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO,
1805                             show_auto_pwm, NULL, 1, 3);
1806 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
1807                             show_auto_temp, set_auto_temp, 1, 1);
1808 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1809                             show_auto_temp, set_auto_temp, 1, 0);
1810 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
1811                             show_auto_temp, set_auto_temp, 1, 2);
1812 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
1813                             show_auto_temp, set_auto_temp, 1, 3);
1814 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR,
1815                             show_auto_temp, set_auto_temp, 1, 4);
1816 static SENSOR_DEVICE_ATTR_2(pwm2_auto_start, S_IRUGO | S_IWUSR,
1817                             show_auto_pwm, set_auto_pwm, 1, 0);
1818 static SENSOR_DEVICE_ATTR(pwm2_auto_slope, S_IRUGO | S_IWUSR,
1819                           show_auto_pwm_slope, set_auto_pwm_slope, 1);
1820
1821 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
1822                           show_pwm_enable, set_pwm_enable, 2);
1823 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2);
1824 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL, 2);
1825 static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO,
1826                           show_pwm_temp_map, set_pwm_temp_map, 2);
1827 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR,
1828                             show_auto_pwm, set_auto_pwm, 2, 0);
1829 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR,
1830                             show_auto_pwm, set_auto_pwm, 2, 1);
1831 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR,
1832                             show_auto_pwm, set_auto_pwm, 2, 2);
1833 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO,
1834                             show_auto_pwm, NULL, 2, 3);
1835 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
1836                             show_auto_temp, set_auto_temp, 2, 1);
1837 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1838                             show_auto_temp, set_auto_temp, 2, 0);
1839 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
1840                             show_auto_temp, set_auto_temp, 2, 2);
1841 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
1842                             show_auto_temp, set_auto_temp, 2, 3);
1843 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR,
1844                             show_auto_temp, set_auto_temp, 2, 4);
1845 static SENSOR_DEVICE_ATTR_2(pwm3_auto_start, S_IRUGO | S_IWUSR,
1846                             show_auto_pwm, set_auto_pwm, 2, 0);
1847 static SENSOR_DEVICE_ATTR(pwm3_auto_slope, S_IRUGO | S_IWUSR,
1848                           show_auto_pwm_slope, set_auto_pwm_slope, 2);
1849
1850 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IRUGO | S_IWUSR,
1851                           show_pwm_enable, set_pwm_enable, 3);
1852 static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 3);
1853 static SENSOR_DEVICE_ATTR(pwm4_freq, S_IRUGO, show_pwm_freq, NULL, 3);
1854 static SENSOR_DEVICE_ATTR(pwm4_auto_channels_temp, S_IRUGO,
1855                           show_pwm_temp_map, set_pwm_temp_map, 3);
1856 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp, S_IRUGO | S_IWUSR,
1857                             show_auto_temp, set_auto_temp, 2, 1);
1858 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1859                             show_auto_temp, set_auto_temp, 2, 0);
1860 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point2_temp, S_IRUGO | S_IWUSR,
1861                             show_auto_temp, set_auto_temp, 2, 2);
1862 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point3_temp, S_IRUGO | S_IWUSR,
1863                             show_auto_temp, set_auto_temp, 2, 3);
1864 static SENSOR_DEVICE_ATTR_2(pwm4_auto_start, S_IRUGO | S_IWUSR,
1865                             show_auto_pwm, set_auto_pwm, 3, 0);
1866 static SENSOR_DEVICE_ATTR(pwm4_auto_slope, S_IRUGO | S_IWUSR,
1867                           show_auto_pwm_slope, set_auto_pwm_slope, 3);
1868
1869 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IRUGO | S_IWUSR,
1870                           show_pwm_enable, set_pwm_enable, 4);
1871 static SENSOR_DEVICE_ATTR(pwm5, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 4);
1872 static SENSOR_DEVICE_ATTR(pwm5_freq, S_IRUGO, show_pwm_freq, NULL, 4);
1873 static SENSOR_DEVICE_ATTR(pwm5_auto_channels_temp, S_IRUGO,
1874                           show_pwm_temp_map, set_pwm_temp_map, 4);
1875 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp, S_IRUGO | S_IWUSR,
1876                             show_auto_temp, set_auto_temp, 2, 1);
1877 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1878                             show_auto_temp, set_auto_temp, 2, 0);
1879 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point2_temp, S_IRUGO | S_IWUSR,
1880                             show_auto_temp, set_auto_temp, 2, 2);
1881 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point3_temp, S_IRUGO | S_IWUSR,
1882                             show_auto_temp, set_auto_temp, 2, 3);
1883 static SENSOR_DEVICE_ATTR_2(pwm5_auto_start, S_IRUGO | S_IWUSR,
1884                             show_auto_pwm, set_auto_pwm, 4, 0);
1885 static SENSOR_DEVICE_ATTR(pwm5_auto_slope, S_IRUGO | S_IWUSR,
1886                           show_auto_pwm_slope, set_auto_pwm_slope, 4);
1887
1888 static SENSOR_DEVICE_ATTR(pwm6_enable, S_IRUGO | S_IWUSR,
1889                           show_pwm_enable, set_pwm_enable, 5);
1890 static SENSOR_DEVICE_ATTR(pwm6, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 5);
1891 static SENSOR_DEVICE_ATTR(pwm6_freq, S_IRUGO, show_pwm_freq, NULL, 5);
1892 static SENSOR_DEVICE_ATTR(pwm6_auto_channels_temp, S_IRUGO,
1893                           show_pwm_temp_map, set_pwm_temp_map, 5);
1894 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp, S_IRUGO | S_IWUSR,
1895                             show_auto_temp, set_auto_temp, 2, 1);
1896 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1897                             show_auto_temp, set_auto_temp, 2, 0);
1898 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point2_temp, S_IRUGO | S_IWUSR,
1899                             show_auto_temp, set_auto_temp, 2, 2);
1900 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point3_temp, S_IRUGO | S_IWUSR,
1901                             show_auto_temp, set_auto_temp, 2, 3);
1902 static SENSOR_DEVICE_ATTR_2(pwm6_auto_start, S_IRUGO | S_IWUSR,
1903                             show_auto_pwm, set_auto_pwm, 5, 0);
1904 static SENSOR_DEVICE_ATTR(pwm6_auto_slope, S_IRUGO | S_IWUSR,
1905                           show_auto_pwm_slope, set_auto_pwm_slope, 5);
1906
1907 /* Alarms */
1908 static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
1909                            char *buf)
1910 {
1911         struct it87_data *data = it87_update_device(dev);
1912
1913         return sprintf(buf, "%u\n", data->alarms);
1914 }
1915 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
1916
1917 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
1918                           char *buf)
1919 {
1920         struct it87_data *data = it87_update_device(dev);
1921         int bitnr = to_sensor_dev_attr(attr)->index;
1922
1923         return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
1924 }
1925
1926 static ssize_t clear_intrusion(struct device *dev,
1927                                struct device_attribute *attr, const char *buf,
1928                                size_t count)
1929 {
1930         struct it87_data *data = dev_get_drvdata(dev);
1931         int config;
1932         long val;
1933
1934         if (kstrtol(buf, 10, &val) < 0 || val != 0)
1935                 return -EINVAL;
1936
1937         mutex_lock(&data->update_lock);
1938         config = it87_read_value(data, IT87_REG_CONFIG);
1939         if (config < 0) {
1940                 count = config;
1941         } else {
1942                 config |= BIT(5);
1943                 it87_write_value(data, IT87_REG_CONFIG, config);
1944                 /* Invalidate cache to force re-read */
1945                 data->valid = 0;
1946         }
1947         mutex_unlock(&data->update_lock);
1948
1949         return count;
1950 }
1951
1952 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
1953 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
1954 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
1955 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
1956 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
1957 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
1958 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
1959 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
1960 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
1961 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
1962 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
1963 static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
1964 static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
1965 static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 7);
1966 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
1967 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
1968 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
1969 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
1970                           show_alarm, clear_intrusion, 4);
1971
1972 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
1973                          char *buf)
1974 {
1975         struct it87_data *data = it87_update_device(dev);
1976         int bitnr = to_sensor_dev_attr(attr)->index;
1977
1978         return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
1979 }
1980
1981 static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
1982                         const char *buf, size_t count)
1983 {
1984         int bitnr = to_sensor_dev_attr(attr)->index;
1985         struct it87_data *data = dev_get_drvdata(dev);
1986         long val;
1987
1988         if (kstrtol(buf, 10, &val) < 0 || (val != 0 && val != 1))
1989                 return -EINVAL;
1990
1991         mutex_lock(&data->update_lock);
1992         data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1993         if (val)
1994                 data->beeps |= BIT(bitnr);
1995         else
1996                 data->beeps &= ~BIT(bitnr);
1997         it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
1998         mutex_unlock(&data->update_lock);
1999         return count;
2000 }
2001
2002 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
2003                           show_beep, set_beep, 1);
2004 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
2005 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
2006 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
2007 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
2008 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
2009 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
2010 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
2011 /* fanX_beep writability is set later */
2012 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
2013 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
2014 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
2015 static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
2016 static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
2017 static SENSOR_DEVICE_ATTR(fan6_beep, S_IRUGO, show_beep, set_beep, 0);
2018 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
2019                           show_beep, set_beep, 2);
2020 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
2021 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
2022
2023 static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
2024                             char *buf)
2025 {
2026         struct it87_data *data = dev_get_drvdata(dev);
2027
2028         return sprintf(buf, "%u\n", data->vrm);
2029 }
2030
2031 static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
2032                              const char *buf, size_t count)
2033 {
2034         struct it87_data *data = dev_get_drvdata(dev);
2035         unsigned long val;
2036
2037         if (kstrtoul(buf, 10, &val) < 0)
2038                 return -EINVAL;
2039
2040         data->vrm = val;
2041
2042         return count;
2043 }
2044 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
2045
2046 static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
2047                             char *buf)
2048 {
2049         struct it87_data *data = it87_update_device(dev);
2050
2051         return sprintf(buf, "%ld\n", (long)vid_from_reg(data->vid, data->vrm));
2052 }
2053 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
2054
2055 static ssize_t show_label(struct device *dev, struct device_attribute *attr,
2056                           char *buf)
2057 {
2058         static const char * const labels[] = {
2059                 "+5V",
2060                 "5VSB",
2061                 "Vbat",
2062                 "AVCC",
2063         };
2064         static const char * const labels_it8721[] = {
2065                 "+3.3V",
2066                 "3VSB",
2067                 "Vbat",
2068                 "+3.3V",
2069         };
2070         struct it87_data *data = dev_get_drvdata(dev);
2071         int nr = to_sensor_dev_attr(attr)->index;
2072         const char *label;
2073
2074         if (has_vin3_5v(data) && nr == 0)
2075                 label = labels[0];
2076         else if (has_12mv_adc(data) || has_10_9mv_adc(data))
2077                 label = labels_it8721[nr];
2078         else
2079                 label = labels[nr];
2080
2081         return sprintf(buf, "%s\n", label);
2082 }
2083 static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
2084 static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
2085 static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
2086 /* AVCC3 */
2087 static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 3);
2088
2089 static umode_t it87_in_is_visible(struct kobject *kobj,
2090                                   struct attribute *attr, int index)
2091 {
2092         struct device *dev = container_of(kobj, struct device, kobj);
2093         struct it87_data *data = dev_get_drvdata(dev);
2094         int i = index / 5;      /* voltage index */
2095         int a = index % 5;      /* attribute index */
2096
2097         if (index >= 40) {      /* in8 and higher only have input attributes */
2098                 i = index - 40 + 8;
2099                 a = 0;
2100         }
2101
2102         if (!(data->has_in & BIT(i)))
2103                 return 0;
2104
2105         if (a == 4 && !data->has_beep)
2106                 return 0;
2107
2108         return attr->mode;
2109 }
2110
2111 static struct attribute *it87_attributes_in[] = {
2112         &sensor_dev_attr_in0_input.dev_attr.attr,
2113         &sensor_dev_attr_in0_min.dev_attr.attr,
2114         &sensor_dev_attr_in0_max.dev_attr.attr,
2115         &sensor_dev_attr_in0_alarm.dev_attr.attr,
2116         &sensor_dev_attr_in0_beep.dev_attr.attr,        /* 4 */
2117
2118         &sensor_dev_attr_in1_input.dev_attr.attr,
2119         &sensor_dev_attr_in1_min.dev_attr.attr,
2120         &sensor_dev_attr_in1_max.dev_attr.attr,
2121         &sensor_dev_attr_in1_alarm.dev_attr.attr,
2122         &sensor_dev_attr_in1_beep.dev_attr.attr,        /* 9 */
2123
2124         &sensor_dev_attr_in2_input.dev_attr.attr,
2125         &sensor_dev_attr_in2_min.dev_attr.attr,
2126         &sensor_dev_attr_in2_max.dev_attr.attr,
2127         &sensor_dev_attr_in2_alarm.dev_attr.attr,
2128         &sensor_dev_attr_in2_beep.dev_attr.attr,        /* 14 */
2129
2130         &sensor_dev_attr_in3_input.dev_attr.attr,
2131         &sensor_dev_attr_in3_min.dev_attr.attr,
2132         &sensor_dev_attr_in3_max.dev_attr.attr,
2133         &sensor_dev_attr_in3_alarm.dev_attr.attr,
2134         &sensor_dev_attr_in3_beep.dev_attr.attr,        /* 19 */
2135
2136         &sensor_dev_attr_in4_input.dev_attr.attr,
2137         &sensor_dev_attr_in4_min.dev_attr.attr,
2138         &sensor_dev_attr_in4_max.dev_attr.attr,
2139         &sensor_dev_attr_in4_alarm.dev_attr.attr,
2140         &sensor_dev_attr_in4_beep.dev_attr.attr,        /* 24 */
2141
2142         &sensor_dev_attr_in5_input.dev_attr.attr,
2143         &sensor_dev_attr_in5_min.dev_attr.attr,
2144         &sensor_dev_attr_in5_max.dev_attr.attr,
2145         &sensor_dev_attr_in5_alarm.dev_attr.attr,
2146         &sensor_dev_attr_in5_beep.dev_attr.attr,        /* 29 */
2147
2148         &sensor_dev_attr_in6_input.dev_attr.attr,
2149         &sensor_dev_attr_in6_min.dev_attr.attr,
2150         &sensor_dev_attr_in6_max.dev_attr.attr,
2151         &sensor_dev_attr_in6_alarm.dev_attr.attr,
2152         &sensor_dev_attr_in6_beep.dev_attr.attr,        /* 34 */
2153
2154         &sensor_dev_attr_in7_input.dev_attr.attr,
2155         &sensor_dev_attr_in7_min.dev_attr.attr,
2156         &sensor_dev_attr_in7_max.dev_attr.attr,
2157         &sensor_dev_attr_in7_alarm.dev_attr.attr,
2158         &sensor_dev_attr_in7_beep.dev_attr.attr,        /* 39 */
2159
2160         &sensor_dev_attr_in8_input.dev_attr.attr,       /* 40 */
2161         &sensor_dev_attr_in9_input.dev_attr.attr,       /* 41 */
2162         &sensor_dev_attr_in10_input.dev_attr.attr,      /* 41 */
2163         &sensor_dev_attr_in11_input.dev_attr.attr,      /* 41 */
2164         &sensor_dev_attr_in12_input.dev_attr.attr,      /* 41 */
2165         NULL
2166 };
2167
2168 static const struct attribute_group it87_group_in = {
2169         .attrs = it87_attributes_in,
2170         .is_visible = it87_in_is_visible,
2171 };
2172
2173 static umode_t it87_temp_is_visible(struct kobject *kobj,
2174                                     struct attribute *attr, int index)
2175 {
2176         struct device *dev = container_of(kobj, struct device, kobj);
2177         struct it87_data *data = dev_get_drvdata(dev);
2178         int i = index / 7;      /* temperature index */
2179         int a = index % 7;      /* attribute index */
2180
2181         if (index >= 21) {
2182                 i = index - 21 + 3;
2183                 a = 0;
2184         }
2185
2186         if (!(data->has_temp & BIT(i)))
2187                 return 0;
2188
2189         if (a == 5 && !has_temp_offset(data))
2190                 return 0;
2191
2192         if (a == 6 && !data->has_beep)
2193                 return 0;
2194
2195         return attr->mode;
2196 }
2197
2198 static struct attribute *it87_attributes_temp[] = {
2199         &sensor_dev_attr_temp1_input.dev_attr.attr,
2200         &sensor_dev_attr_temp1_max.dev_attr.attr,
2201         &sensor_dev_attr_temp1_min.dev_attr.attr,
2202         &sensor_dev_attr_temp1_type.dev_attr.attr,
2203         &sensor_dev_attr_temp1_alarm.dev_attr.attr,
2204         &sensor_dev_attr_temp1_offset.dev_attr.attr,    /* 5 */
2205         &sensor_dev_attr_temp1_beep.dev_attr.attr,      /* 6 */
2206
2207         &sensor_dev_attr_temp2_input.dev_attr.attr,     /* 7 */
2208         &sensor_dev_attr_temp2_max.dev_attr.attr,
2209         &sensor_dev_attr_temp2_min.dev_attr.attr,
2210         &sensor_dev_attr_temp2_type.dev_attr.attr,
2211         &sensor_dev_attr_temp2_alarm.dev_attr.attr,
2212         &sensor_dev_attr_temp2_offset.dev_attr.attr,
2213         &sensor_dev_attr_temp2_beep.dev_attr.attr,
2214
2215         &sensor_dev_attr_temp3_input.dev_attr.attr,     /* 14 */
2216         &sensor_dev_attr_temp3_max.dev_attr.attr,
2217         &sensor_dev_attr_temp3_min.dev_attr.attr,
2218         &sensor_dev_attr_temp3_type.dev_attr.attr,
2219         &sensor_dev_attr_temp3_alarm.dev_attr.attr,
2220         &sensor_dev_attr_temp3_offset.dev_attr.attr,
2221         &sensor_dev_attr_temp3_beep.dev_attr.attr,
2222
2223         &sensor_dev_attr_temp4_input.dev_attr.attr,     /* 21 */
2224         &sensor_dev_attr_temp5_input.dev_attr.attr,
2225         &sensor_dev_attr_temp6_input.dev_attr.attr,
2226         NULL
2227 };
2228
2229 static const struct attribute_group it87_group_temp = {
2230         .attrs = it87_attributes_temp,
2231         .is_visible = it87_temp_is_visible,
2232 };
2233
2234 static umode_t it87_is_visible(struct kobject *kobj,
2235                                struct attribute *attr, int index)
2236 {
2237         struct device *dev = container_of(kobj, struct device, kobj);
2238         struct it87_data *data = dev_get_drvdata(dev);
2239
2240         if ((index == 2 || index == 3) && !data->has_vid)
2241                 return 0;
2242
2243         if (index > 3 && !(data->in_internal & BIT(index - 4)))
2244                 return 0;
2245
2246         return attr->mode;
2247 }
2248
2249 static struct attribute *it87_attributes[] = {
2250         &dev_attr_alarms.attr,
2251         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
2252         &dev_attr_vrm.attr,                             /* 2 */
2253         &dev_attr_cpu0_vid.attr,                        /* 3 */
2254         &sensor_dev_attr_in3_label.dev_attr.attr,       /* 4 .. 7 */
2255         &sensor_dev_attr_in7_label.dev_attr.attr,
2256         &sensor_dev_attr_in8_label.dev_attr.attr,
2257         &sensor_dev_attr_in9_label.dev_attr.attr,
2258         NULL
2259 };
2260
2261 static const struct attribute_group it87_group = {
2262         .attrs = it87_attributes,
2263         .is_visible = it87_is_visible,
2264 };
2265
2266 static umode_t it87_fan_is_visible(struct kobject *kobj,
2267                                    struct attribute *attr, int index)
2268 {
2269         struct device *dev = container_of(kobj, struct device, kobj);
2270         struct it87_data *data = dev_get_drvdata(dev);
2271         int i = index / 5;      /* fan index */
2272         int a = index % 5;      /* attribute index */
2273
2274         if (index >= 15) {      /* fan 4..6 don't have divisor attributes */
2275                 i = (index - 15) / 4 + 3;
2276                 a = (index - 15) % 4;
2277         }
2278
2279         if (!(data->has_fan & BIT(i)))
2280                 return 0;
2281
2282         if (a == 3) {                           /* beep */
2283                 if (!data->has_beep)
2284                         return 0;
2285                 /* first fan beep attribute is writable */
2286                 if (i == __ffs(data->has_fan))
2287                         return attr->mode | S_IWUSR;
2288         }
2289
2290         if (a == 4 && has_16bit_fans(data))     /* divisor */
2291                 return 0;
2292
2293         return attr->mode;
2294 }
2295
2296 static struct attribute *it87_attributes_fan[] = {
2297         &sensor_dev_attr_fan1_input.dev_attr.attr,
2298         &sensor_dev_attr_fan1_min.dev_attr.attr,
2299         &sensor_dev_attr_fan1_alarm.dev_attr.attr,
2300         &sensor_dev_attr_fan1_beep.dev_attr.attr,       /* 3 */
2301         &sensor_dev_attr_fan1_div.dev_attr.attr,        /* 4 */
2302
2303         &sensor_dev_attr_fan2_input.dev_attr.attr,
2304         &sensor_dev_attr_fan2_min.dev_attr.attr,
2305         &sensor_dev_attr_fan2_alarm.dev_attr.attr,
2306         &sensor_dev_attr_fan2_beep.dev_attr.attr,
2307         &sensor_dev_attr_fan2_div.dev_attr.attr,        /* 9 */
2308
2309         &sensor_dev_attr_fan3_input.dev_attr.attr,
2310         &sensor_dev_attr_fan3_min.dev_attr.attr,
2311         &sensor_dev_attr_fan3_alarm.dev_attr.attr,
2312         &sensor_dev_attr_fan3_beep.dev_attr.attr,
2313         &sensor_dev_attr_fan3_div.dev_attr.attr,        /* 14 */
2314
2315         &sensor_dev_attr_fan4_input.dev_attr.attr,      /* 15 */
2316         &sensor_dev_attr_fan4_min.dev_attr.attr,
2317         &sensor_dev_attr_fan4_alarm.dev_attr.attr,
2318         &sensor_dev_attr_fan4_beep.dev_attr.attr,
2319
2320         &sensor_dev_attr_fan5_input.dev_attr.attr,      /* 19 */
2321         &sensor_dev_attr_fan5_min.dev_attr.attr,
2322         &sensor_dev_attr_fan5_alarm.dev_attr.attr,
2323         &sensor_dev_attr_fan5_beep.dev_attr.attr,
2324
2325         &sensor_dev_attr_fan6_input.dev_attr.attr,      /* 23 */
2326         &sensor_dev_attr_fan6_min.dev_attr.attr,
2327         &sensor_dev_attr_fan6_alarm.dev_attr.attr,
2328         &sensor_dev_attr_fan6_beep.dev_attr.attr,
2329         NULL
2330 };
2331
2332 static const struct attribute_group it87_group_fan = {
2333         .attrs = it87_attributes_fan,
2334         .is_visible = it87_fan_is_visible,
2335 };
2336
2337 static umode_t it87_pwm_is_visible(struct kobject *kobj,
2338                                    struct attribute *attr, int index)
2339 {
2340         struct device *dev = container_of(kobj, struct device, kobj);
2341         struct it87_data *data = dev_get_drvdata(dev);
2342         int i = index / 4;      /* pwm index */
2343         int a = index % 4;      /* attribute index */
2344
2345         if (!(data->has_pwm & BIT(i)))
2346                 return 0;
2347
2348         /* pwmX_auto_channels_temp is only writable if auto pwm is supported */
2349         if (a == 3 && (has_old_autopwm(data) || has_newer_autopwm(data)))
2350                 return attr->mode | S_IWUSR;
2351
2352         /* pwm2_freq is writable if there are two pwm frequency selects */
2353         if (has_pwm_freq2(data) && i == 1 && a == 2)
2354                 return attr->mode | S_IWUSR;
2355
2356         return attr->mode;
2357 }
2358
2359 static struct attribute *it87_attributes_pwm[] = {
2360         &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2361         &sensor_dev_attr_pwm1.dev_attr.attr,
2362         &sensor_dev_attr_pwm1_freq.dev_attr.attr,
2363         &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
2364
2365         &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2366         &sensor_dev_attr_pwm2.dev_attr.attr,
2367         &sensor_dev_attr_pwm2_freq.dev_attr.attr,
2368         &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
2369
2370         &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2371         &sensor_dev_attr_pwm3.dev_attr.attr,
2372         &sensor_dev_attr_pwm3_freq.dev_attr.attr,
2373         &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
2374
2375         &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2376         &sensor_dev_attr_pwm4.dev_attr.attr,
2377         &sensor_dev_attr_pwm4_freq.dev_attr.attr,
2378         &sensor_dev_attr_pwm4_auto_channels_temp.dev_attr.attr,
2379
2380         &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2381         &sensor_dev_attr_pwm5.dev_attr.attr,
2382         &sensor_dev_attr_pwm5_freq.dev_attr.attr,
2383         &sensor_dev_attr_pwm5_auto_channels_temp.dev_attr.attr,
2384
2385         &sensor_dev_attr_pwm6_enable.dev_attr.attr,
2386         &sensor_dev_attr_pwm6.dev_attr.attr,
2387         &sensor_dev_attr_pwm6_freq.dev_attr.attr,
2388         &sensor_dev_attr_pwm6_auto_channels_temp.dev_attr.attr,
2389
2390         NULL
2391 };
2392
2393 static const struct attribute_group it87_group_pwm = {
2394         .attrs = it87_attributes_pwm,
2395         .is_visible = it87_pwm_is_visible,
2396 };
2397
2398 static umode_t it87_auto_pwm_is_visible(struct kobject *kobj,
2399                                         struct attribute *attr, int index)
2400 {
2401         struct device *dev = container_of(kobj, struct device, kobj);
2402         struct it87_data *data = dev_get_drvdata(dev);
2403         int i = index / 11;     /* pwm index */
2404         int a = index % 11;     /* attribute index */
2405
2406         if (index >= 33) {      /* pwm 4..6 */
2407                 i = (index - 33) / 6 + 3;
2408                 a = (index - 33) % 6 + 4;
2409         }
2410
2411         if (!(data->has_pwm & BIT(i)))
2412                 return 0;
2413
2414         if (has_newer_autopwm(data)) {
2415                 if (a < 4)      /* no auto point pwm */
2416                         return 0;
2417                 if (a == 8)     /* no auto_point4 */
2418                         return 0;
2419         }
2420         if (has_old_autopwm(data)) {
2421                 if (a >= 9)     /* no pwm_auto_start, pwm_auto_slope */
2422                         return 0;
2423         }
2424
2425         return attr->mode;
2426 }
2427
2428 static struct attribute *it87_attributes_auto_pwm[] = {
2429         &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
2430         &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
2431         &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
2432         &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
2433         &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
2434         &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
2435         &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
2436         &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
2437         &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
2438         &sensor_dev_attr_pwm1_auto_start.dev_attr.attr,
2439         &sensor_dev_attr_pwm1_auto_slope.dev_attr.attr,
2440
2441         &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,    /* 11 */
2442         &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
2443         &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
2444         &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
2445         &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
2446         &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
2447         &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
2448         &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
2449         &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
2450         &sensor_dev_attr_pwm2_auto_start.dev_attr.attr,
2451         &sensor_dev_attr_pwm2_auto_slope.dev_attr.attr,
2452
2453         &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,    /* 22 */
2454         &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
2455         &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
2456         &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
2457         &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
2458         &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
2459         &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
2460         &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
2461         &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
2462         &sensor_dev_attr_pwm3_auto_start.dev_attr.attr,
2463         &sensor_dev_attr_pwm3_auto_slope.dev_attr.attr,
2464
2465         &sensor_dev_attr_pwm4_auto_point1_temp.dev_attr.attr,   /* 33 */
2466         &sensor_dev_attr_pwm4_auto_point1_temp_hyst.dev_attr.attr,
2467         &sensor_dev_attr_pwm4_auto_point2_temp.dev_attr.attr,
2468         &sensor_dev_attr_pwm4_auto_point3_temp.dev_attr.attr,
2469         &sensor_dev_attr_pwm4_auto_start.dev_attr.attr,
2470         &sensor_dev_attr_pwm4_auto_slope.dev_attr.attr,
2471
2472         &sensor_dev_attr_pwm5_auto_point1_temp.dev_attr.attr,
2473         &sensor_dev_attr_pwm5_auto_point1_temp_hyst.dev_attr.attr,
2474         &sensor_dev_attr_pwm5_auto_point2_temp.dev_attr.attr,
2475         &sensor_dev_attr_pwm5_auto_point3_temp.dev_attr.attr,
2476         &sensor_dev_attr_pwm5_auto_start.dev_attr.attr,
2477         &sensor_dev_attr_pwm5_auto_slope.dev_attr.attr,
2478
2479         &sensor_dev_attr_pwm6_auto_point1_temp.dev_attr.attr,
2480         &sensor_dev_attr_pwm6_auto_point1_temp_hyst.dev_attr.attr,
2481         &sensor_dev_attr_pwm6_auto_point2_temp.dev_attr.attr,
2482         &sensor_dev_attr_pwm6_auto_point3_temp.dev_attr.attr,
2483         &sensor_dev_attr_pwm6_auto_start.dev_attr.attr,
2484         &sensor_dev_attr_pwm6_auto_slope.dev_attr.attr,
2485
2486         NULL,
2487 };
2488
2489 static const struct attribute_group it87_group_auto_pwm = {
2490         .attrs = it87_attributes_auto_pwm,
2491         .is_visible = it87_auto_pwm_is_visible,
2492 };
2493
2494 /* SuperIO detection - will change isa_address if a chip is found */
2495 static int __init it87_find(int sioaddr, unsigned short *address,
2496                             struct it87_sio_data *sio_data)
2497 {
2498         int err;
2499         u16 chip_type;
2500         const char *board_vendor, *board_name;
2501         const struct it87_devices *config;
2502
2503         err = superio_enter(sioaddr);
2504         if (err)
2505                 return err;
2506
2507         err = -ENODEV;
2508         chip_type = superio_inw(sioaddr, DEVID);
2509         if (chip_type == 0xffff)
2510                 goto exit;
2511
2512         if (force_id)
2513                 chip_type = force_id;
2514
2515         switch (chip_type) {
2516         case IT8705F_DEVID:
2517                 sio_data->type = it87;
2518                 break;
2519         case IT8712F_DEVID:
2520                 sio_data->type = it8712;
2521                 break;
2522         case IT8716F_DEVID:
2523         case IT8726F_DEVID:
2524                 sio_data->type = it8716;
2525                 break;
2526         case IT8718F_DEVID:
2527                 sio_data->type = it8718;
2528                 break;
2529         case IT8720F_DEVID:
2530                 sio_data->type = it8720;
2531                 break;
2532         case IT8721F_DEVID:
2533                 sio_data->type = it8721;
2534                 break;
2535         case IT8728F_DEVID:
2536                 sio_data->type = it8728;
2537                 break;
2538         case IT8732F_DEVID:
2539                 sio_data->type = it8732;
2540                 break;
2541         case IT8792E_DEVID:
2542                 sio_data->type = it8792;
2543                 break;
2544         case IT8771E_DEVID:
2545                 sio_data->type = it8771;
2546                 break;
2547         case IT8772E_DEVID:
2548                 sio_data->type = it8772;
2549                 break;
2550         case IT8781F_DEVID:
2551                 sio_data->type = it8781;
2552                 break;
2553         case IT8782F_DEVID:
2554                 sio_data->type = it8782;
2555                 break;
2556         case IT8783E_DEVID:
2557                 sio_data->type = it8783;
2558                 break;
2559         case IT8786E_DEVID:
2560                 sio_data->type = it8786;
2561                 break;
2562         case IT8790E_DEVID:
2563                 sio_data->type = it8790;
2564                 break;
2565         case IT8603E_DEVID:
2566         case IT8623E_DEVID:
2567                 sio_data->type = it8603;
2568                 break;
2569         case IT8607E_DEVID:
2570                 sio_data->type = it8607;
2571                 break;
2572         case IT8620E_DEVID:
2573                 sio_data->type = it8620;
2574                 break;
2575         case IT8622E_DEVID:
2576                 sio_data->type = it8622;
2577                 break;
2578         case IT8628E_DEVID:
2579                 sio_data->type = it8628;
2580                 break;
2581         case IT8655E_DEVID:
2582                 sio_data->type = it8655;
2583                 break;
2584         case IT8665E_DEVID:
2585                 sio_data->type = it8665;
2586                 break;
2587         case IT8686E_DEVID:
2588                 sio_data->type = it8686;
2589                 break;
2590         case 0xffff:    /* No device at all */
2591                 goto exit;
2592         default:
2593                 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
2594                 goto exit;
2595         }
2596
2597         superio_select(sioaddr, PME);
2598         if (!(superio_inb(sioaddr, IT87_ACT_REG) & 0x01)) {
2599                 pr_info("Device not activated, skipping\n");
2600                 goto exit;
2601         }
2602
2603         *address = superio_inw(sioaddr, IT87_BASE_REG) & ~(IT87_EXTENT - 1);
2604         if (*address == 0) {
2605                 pr_info("Base address not set, skipping\n");
2606                 goto exit;
2607         }
2608
2609         err = 0;
2610         sio_data->revision = superio_inb(sioaddr, DEVREV) & 0x0f;
2611         pr_info("Found IT%04x%s chip at 0x%x, revision %d\n", chip_type,
2612                 it87_devices[sio_data->type].suffix,
2613                 *address, sio_data->revision);
2614
2615         config = &it87_devices[sio_data->type];
2616
2617         /* in7 (VSB or VCCH5V) is always internal on some chips */
2618         if (has_in7_internal(config))
2619                 sio_data->internal |= BIT(1);
2620
2621         /* in8 (Vbat) is always internal */
2622         sio_data->internal |= BIT(2);
2623
2624         /* in9 (AVCC3), always internal if supported */
2625         if (has_avcc3(config))
2626                 sio_data->internal |= BIT(3); /* in9 is AVCC */
2627         else
2628                 sio_data->skip_in |= BIT(9);
2629
2630         if (!has_four_pwm(config))
2631                 sio_data->skip_pwm |= BIT(3) | BIT(4) | BIT(5);
2632         else if (!has_five_pwm(config))
2633                 sio_data->skip_pwm |= BIT(4) | BIT(5);
2634         else if (!has_six_pwm(config))
2635                 sio_data->skip_pwm |= BIT(5);
2636
2637         if (!has_vid(config))
2638                 sio_data->skip_vid = 1;
2639
2640         /* Read GPIO config and VID value from LDN 7 (GPIO) */
2641         if (sio_data->type == it87) {
2642                 /* The IT8705F has a different LD number for GPIO */
2643                 superio_select(sioaddr, 5);
2644                 sio_data->beep_pin = superio_inb(sioaddr,
2645                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2646         } else if (sio_data->type == it8783) {
2647                 int reg25, reg27, reg2a, reg2c, regef;
2648
2649                 superio_select(sioaddr, GPIO);
2650
2651                 reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2652                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2653                 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
2654                 reg2c = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2655                 regef = superio_inb(sioaddr, IT87_SIO_SPI_REG);
2656
2657                 /* Check if fan3 is there or not */
2658                 if ((reg27 & BIT(0)) || !(reg2c & BIT(2)))
2659                         sio_data->skip_fan |= BIT(2);
2660                 if ((reg25 & BIT(4)) ||
2661                     (!(reg2a & BIT(1)) && (regef & BIT(0))))
2662                         sio_data->skip_pwm |= BIT(2);
2663
2664                 /* Check if fan2 is there or not */
2665                 if (reg27 & BIT(7))
2666                         sio_data->skip_fan |= BIT(1);
2667                 if (reg27 & BIT(3))
2668                         sio_data->skip_pwm |= BIT(1);
2669
2670                 /* VIN5 */
2671                 if ((reg27 & BIT(0)) || (reg2c & BIT(2)))
2672                         sio_data->skip_in |= BIT(5); /* No VIN5 */
2673
2674                 /* VIN6 */
2675                 if (reg27 & BIT(1))
2676                         sio_data->skip_in |= BIT(6); /* No VIN6 */
2677
2678                 /*
2679                  * VIN7
2680                  * Does not depend on bit 2 of Reg2C, contrary to datasheet.
2681                  */
2682                 if (reg27 & BIT(2)) {
2683                         /*
2684                          * The data sheet is a bit unclear regarding the
2685                          * internal voltage divider for VCCH5V. It says
2686                          * "This bit enables and switches VIN7 (pin 91) to the
2687                          * internal voltage divider for VCCH5V".
2688                          * This is different to other chips, where the internal
2689                          * voltage divider would connect VIN7 to an internal
2690                          * voltage source. Maybe that is the case here as well.
2691                          *
2692                          * Since we don't know for sure, re-route it if that is
2693                          * not the case, and ask the user to report if the
2694                          * resulting voltage is sane.
2695                          */
2696                         if (!(reg2c & BIT(1))) {
2697                                 reg2c |= BIT(1);
2698                                 superio_outb(sioaddr, IT87_SIO_PINX2_REG,
2699                                              reg2c);
2700                                 pr_notice("Routing internal VCCH5V to in7.\n");
2701                         }
2702                         pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
2703                         pr_notice("Please report if it displays a reasonable voltage.\n");
2704                 }
2705
2706                 if (reg2c & BIT(0))
2707                         sio_data->internal |= BIT(0);
2708                 if (reg2c & BIT(1))
2709                         sio_data->internal |= BIT(1);
2710
2711                 sio_data->beep_pin = superio_inb(sioaddr,
2712                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2713         } else if (sio_data->type == it8603 || sio_data->type == it8607) {
2714                 int reg27, reg29;
2715
2716                 superio_select(sioaddr, GPIO);
2717
2718                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2719
2720                 /* Check if fan3 is there or not */
2721                 if (reg27 & BIT(6))
2722                         sio_data->skip_pwm |= BIT(2);
2723                 if (reg27 & BIT(7))
2724                         sio_data->skip_fan |= BIT(2);
2725
2726                 /* Check if fan2 is there or not */
2727                 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2728                 if (reg29 & BIT(1))
2729                         sio_data->skip_pwm |= BIT(1);
2730                 if (reg29 & BIT(2))
2731                         sio_data->skip_fan |= BIT(1);
2732
2733                 if (sio_data->type == it8603) {
2734                         sio_data->skip_in |= BIT(5); /* No VIN5 */
2735                         sio_data->skip_in |= BIT(6); /* No VIN6 */
2736                 }
2737
2738                 sio_data->beep_pin = superio_inb(sioaddr,
2739                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2740         } else if (sio_data->type == it8620 || sio_data->type == it8628 ||
2741                    sio_data->type == it8686) {
2742                 int reg;
2743
2744                 superio_select(sioaddr, GPIO);
2745
2746                 /* Check for pwm5 */
2747                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2748                 if (reg & BIT(6))
2749                         sio_data->skip_pwm |= BIT(4);
2750
2751                 /* Check for fan4, fan5 */
2752                 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2753                 if (!(reg & BIT(5)))
2754                         sio_data->skip_fan |= BIT(3);
2755                 if (!(reg & BIT(4)))
2756                         sio_data->skip_fan |= BIT(4);
2757
2758                 /* Check for pwm3, fan3 */
2759                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2760                 if (reg & BIT(6))
2761                         sio_data->skip_pwm |= BIT(2);
2762                 if (reg & BIT(7))
2763                         sio_data->skip_fan |= BIT(2);
2764
2765                 /* Check for pwm4 */
2766                 reg = superio_inb(sioaddr, IT87_SIO_GPIO4_REG);
2767                 if (reg & BIT(2))
2768                         sio_data->skip_pwm |= BIT(3);
2769
2770                 /* Check for pwm2, fan2 */
2771                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2772                 if (reg & BIT(1))
2773                         sio_data->skip_pwm |= BIT(1);
2774                 if (reg & BIT(2))
2775                         sio_data->skip_fan |= BIT(1);
2776                 /* Check for pwm6, fan6 */
2777                 if (!(reg & BIT(7))) {
2778                         sio_data->skip_pwm |= BIT(5);
2779                         sio_data->skip_fan |= BIT(5);
2780                 }
2781
2782                 /* Check if AVCC is on VIN3 */
2783                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2784                 if (reg & BIT(0))
2785                         sio_data->internal |= BIT(0);
2786                 else
2787                         sio_data->skip_in |= BIT(9);
2788
2789                 sio_data->beep_pin = superio_inb(sioaddr,
2790                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2791         } else if (sio_data->type == it8622) {
2792                 int reg;
2793
2794                 superio_select(sioaddr, GPIO);
2795
2796                 /* Check for pwm4, fan4 */
2797                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2798                 if (reg & BIT(6))
2799                         sio_data->skip_fan |= BIT(3);
2800                 if (reg & BIT(5))
2801                         sio_data->skip_pwm |= BIT(3);
2802
2803                 /* Check for pwm3, fan3, pwm5, fan5 */
2804                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2805                 if (reg & BIT(6))
2806                         sio_data->skip_pwm |= BIT(2);
2807                 if (reg & BIT(7))
2808                         sio_data->skip_fan |= BIT(2);
2809                 if (reg & BIT(3))
2810                         sio_data->skip_pwm |= BIT(4);
2811                 if (reg & BIT(1))
2812                         sio_data->skip_fan |= BIT(4);
2813
2814                 /* Check for pwm2, fan2 */
2815                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2816                 if (reg & BIT(1))
2817                         sio_data->skip_pwm |= BIT(1);
2818                 if (reg & BIT(2))
2819                         sio_data->skip_fan |= BIT(1);
2820
2821                 /* Check for AVCC */
2822                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2823                 if (!(reg & BIT(0)))
2824                         sio_data->skip_in |= BIT(9);
2825
2826                 sio_data->beep_pin = superio_inb(sioaddr,
2827                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2828         } else if (sio_data->type == it8732) {
2829                 int reg;
2830
2831                 superio_select(sioaddr, GPIO);
2832
2833                 /* Check for pwm2, fan2 */
2834                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2835                 if (reg & BIT(1))
2836                         sio_data->skip_pwm |= BIT(1);
2837                 if (reg & BIT(2))
2838                         sio_data->skip_fan |= BIT(1);
2839
2840                 /* Check for pwm3, fan3, fan4 */
2841                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2842                 if (reg & BIT(6))
2843                         sio_data->skip_pwm |= BIT(2);
2844                 if (reg & BIT(7))
2845                         sio_data->skip_fan |= BIT(2);
2846                 if (reg & BIT(5))
2847                         sio_data->skip_fan |= BIT(3);
2848
2849                 /* Check if AVCC is on VIN3 */
2850                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2851                 if (reg & BIT(0))
2852                         sio_data->internal |= BIT(0);
2853
2854                 sio_data->beep_pin = superio_inb(sioaddr,
2855                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2856         } else if (sio_data->type == it8655) {
2857                 int reg;
2858
2859                 superio_select(sioaddr, GPIO);
2860
2861                 /* Check for pwm2 */
2862                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2863                 if (reg & BIT(1))
2864                         sio_data->skip_pwm |= BIT(1);
2865
2866                 /* Check for fan2 */
2867                 reg = superio_inb(sioaddr, IT87_SIO_PINX4_REG);
2868                 if (reg & BIT(4))
2869                         sio_data->skip_fan |= BIT(1);
2870
2871                 /* Check for pwm3, fan3 */
2872                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2873                 if (reg & BIT(6))
2874                         sio_data->skip_pwm |= BIT(2);
2875                 if (reg & BIT(7))
2876                         sio_data->skip_fan |= BIT(2);
2877
2878                 sio_data->beep_pin = superio_inb(sioaddr,
2879                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2880         } else if (sio_data->type == it8665) {
2881                 int reg;
2882
2883                 superio_select(sioaddr, GPIO);
2884
2885                 /* Check for pwm2 */
2886                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2887                 if (reg & BIT(1))
2888                         sio_data->skip_pwm |= BIT(1);
2889
2890                 /* Check for fan2 */
2891                 reg = superio_inb(sioaddr, IT87_SIO_PINX4_REG);
2892                 if (reg & BIT(4))
2893                         sio_data->skip_fan |= BIT(1);
2894
2895                 /* Check for pwm3, fan3 */
2896                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2897                 if (reg & BIT(6))
2898                         sio_data->skip_pwm |= BIT(2);
2899                 if (reg & BIT(7))
2900                         sio_data->skip_fan |= BIT(2);
2901
2902                 /* Check for pwm5, fan5 */
2903                 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2904                 if (reg & BIT(5))
2905                         sio_data->skip_pwm |= BIT(4);
2906                 if (!(reg & BIT(4)))
2907                         sio_data->skip_fan |= BIT(4);
2908
2909                 /* Check for pwm4, fan4, pwm6, fan6 */
2910                 reg = superio_inb(sioaddr, IT87_SIO_GPIO9_REG);
2911                 if (reg & BIT(2))
2912                         sio_data->skip_pwm |= BIT(3);
2913                 if (reg & BIT(3))
2914                         sio_data->skip_fan |= BIT(3);
2915                 if (reg & BIT(0))
2916                         sio_data->skip_pwm |= BIT(5);
2917                 if (reg & BIT(1))
2918                         sio_data->skip_fan |= BIT(5);
2919
2920                 sio_data->beep_pin = superio_inb(sioaddr,
2921                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2922         } else {
2923                 int reg;
2924                 bool uart6;
2925
2926                 superio_select(sioaddr, GPIO);
2927
2928                 /* Check for fan4, fan5 */
2929                 if (has_five_fans(config)) {
2930                         reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2931                         switch (sio_data->type) {
2932                         case it8718:
2933                                 if (reg & BIT(5))
2934                                         sio_data->skip_fan |= BIT(3);
2935                                 if (reg & BIT(4))
2936                                         sio_data->skip_fan |= BIT(4);
2937                                 break;
2938                         case it8720:
2939                         case it8721:
2940                         case it8728:
2941                                 if (!(reg & BIT(5)))
2942                                         sio_data->skip_fan |= BIT(3);
2943                                 if (!(reg & BIT(4)))
2944                                         sio_data->skip_fan |= BIT(4);
2945                                 break;
2946                         default:
2947                                 break;
2948                         }
2949                 }
2950
2951                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2952                 if (!sio_data->skip_vid) {
2953                         /* We need at least 4 VID pins */
2954                         if (reg & 0x0f) {
2955                                 pr_info("VID is disabled (pins used for GPIO)\n");
2956                                 sio_data->skip_vid = 1;
2957                         }
2958                 }
2959
2960                 /* Check if fan3 is there or not */
2961                 if (reg & BIT(6))
2962                         sio_data->skip_pwm |= BIT(2);
2963                 if (reg & BIT(7))
2964                         sio_data->skip_fan |= BIT(2);
2965
2966                 /* Check if fan2 is there or not */
2967                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2968                 if (reg & BIT(1))
2969                         sio_data->skip_pwm |= BIT(1);
2970                 if (reg & BIT(2))
2971                         sio_data->skip_fan |= BIT(1);
2972
2973                 if ((sio_data->type == it8718 || sio_data->type == it8720) &&
2974                     !(sio_data->skip_vid))
2975                         sio_data->vid_value = superio_inb(sioaddr,
2976                                                           IT87_SIO_VID_REG);
2977
2978                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2979
2980                 uart6 = sio_data->type == it8782 && (reg & BIT(2));
2981
2982                 /*
2983                  * The IT8720F has no VIN7 pin, so VCCH should always be
2984                  * routed internally to VIN7 with an internal divider.
2985                  * Curiously, there still is a configuration bit to control
2986                  * this, which means it can be set incorrectly. And even
2987                  * more curiously, many boards out there are improperly
2988                  * configured, even though the IT8720F datasheet claims
2989                  * that the internal routing of VCCH to VIN7 is the default
2990                  * setting. So we force the internal routing in this case.
2991                  *
2992                  * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
2993                  * If UART6 is enabled, re-route VIN7 to the internal divider
2994                  * if that is not already the case.
2995                  */
2996                 if ((sio_data->type == it8720 || uart6) && !(reg & BIT(1))) {
2997                         reg |= BIT(1);
2998                         superio_outb(sioaddr, IT87_SIO_PINX2_REG, reg);
2999                         pr_notice("Routing internal VCCH to in7\n");
3000                 }
3001                 if (reg & BIT(0))
3002                         sio_data->internal |= BIT(0);
3003                 if (reg & BIT(1))
3004                         sio_data->internal |= BIT(1);
3005
3006                 /*
3007                  * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
3008                  * While VIN7 can be routed to the internal voltage divider,
3009                  * VIN5 and VIN6 are not available if UART6 is enabled.
3010                  *
3011                  * Also, temp3 is not available if UART6 is enabled and TEMPIN3
3012                  * is the temperature source. Since we can not read the
3013                  * temperature source here, skip_temp is preliminary.
3014                  */
3015                 if (uart6) {
3016                         sio_data->skip_in |= BIT(5) | BIT(6);
3017                         sio_data->skip_temp |= BIT(2);
3018                 }
3019
3020                 sio_data->beep_pin = superio_inb(sioaddr,
3021                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3022         }
3023         if (sio_data->beep_pin)
3024                 pr_info("Beeping is supported\n");
3025
3026         /* Disable specific features based on DMI strings */
3027         board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
3028         board_name = dmi_get_system_info(DMI_BOARD_NAME);
3029         if (board_vendor && board_name) {
3030                 if (strcmp(board_vendor, "nVIDIA") == 0 &&
3031                     strcmp(board_name, "FN68PT") == 0) {
3032                         /*
3033                          * On the Shuttle SN68PT, FAN_CTL2 is apparently not
3034                          * connected to a fan, but to something else. One user
3035                          * has reported instant system power-off when changing
3036                          * the PWM2 duty cycle, so we disable it.
3037                          * I use the board name string as the trigger in case
3038                          * the same board is ever used in other systems.
3039                          */
3040                         pr_info("Disabling pwm2 due to hardware constraints\n");
3041                         sio_data->skip_pwm = BIT(1);
3042                 }
3043         }
3044
3045 exit:
3046         superio_exit(sioaddr);
3047         return err;
3048 }
3049
3050 /* Called when we have found a new IT87. */
3051 static void it87_init_device(struct platform_device *pdev)
3052 {
3053         struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
3054         struct it87_data *data = platform_get_drvdata(pdev);
3055         int tmp, i;
3056         u8 mask;
3057
3058         /* Initialize chip specific register pointers */
3059         switch (data->type) {
3060         case it8655:
3061         case it8665:
3062                 data->REG_FAN = IT87_REG_FAN_8665;
3063                 data->REG_FANX = IT87_REG_FANX_8665;
3064                 data->REG_FAN_MIN = IT87_REG_FAN_MIN_8665;
3065                 data->REG_FANX_MIN = IT87_REG_FANX_MIN_8665;
3066                 data->REG_PWM = IT87_REG_PWM_8665;
3067                 break;
3068         case it8622:
3069                 data->REG_FAN = IT87_REG_FAN;
3070                 data->REG_FANX = IT87_REG_FANX;
3071                 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3072                 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3073                 data->REG_PWM = IT87_REG_PWM_8665;
3074                 break;
3075         default:
3076                 data->REG_FAN = IT87_REG_FAN;
3077                 data->REG_FANX = IT87_REG_FANX;
3078                 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3079                 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3080                 data->REG_PWM = IT87_REG_PWM;
3081                 break;
3082         }
3083
3084         /*
3085          * For each PWM channel:
3086          * - If it is in automatic mode, setting to manual mode should set
3087          *   the fan to full speed by default.
3088          * - If it is in manual mode, we need a mapping to temperature
3089          *   channels to use when later setting to automatic mode later.
3090          *   Use a 1:1 mapping by default (we are clueless.)
3091          * In both cases, the value can (and should) be changed by the user
3092          * prior to switching to a different mode.
3093          * Note that this is no longer needed for the IT8721F and later, as
3094          * these have separate registers for the temperature mapping and the
3095          * manual duty cycle.
3096          */
3097         for (i = 0; i < NUM_AUTO_PWM; i++) {
3098                 data->pwm_temp_map[i] = i;
3099                 data->pwm_duty[i] = 0x7f;       /* Full speed */
3100                 data->auto_pwm[i][3] = 0x7f;    /* Full speed, hard-coded */
3101         }
3102
3103         /*
3104          * Some chips seem to have default value 0xff for all limit
3105          * registers. For low voltage limits it makes no sense and triggers
3106          * alarms, so change to 0 instead. For high temperature limits, it
3107          * means -1 degree C, which surprisingly doesn't trigger an alarm,
3108          * but is still confusing, so change to 127 degrees C.
3109          */
3110         for (i = 0; i < NUM_VIN_LIMIT; i++) {
3111                 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
3112                 if (tmp == 0xff)
3113                         it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
3114         }
3115         for (i = 0; i < NUM_TEMP_LIMIT; i++) {
3116                 tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
3117                 if (tmp == 0xff)
3118                         it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
3119         }
3120
3121         /*
3122          * Temperature channels are not forcibly enabled, as they can be
3123          * set to two different sensor types and we can't guess which one
3124          * is correct for a given system. These channels can be enabled at
3125          * run-time through the temp{1-3}_type sysfs accessors if needed.
3126          */
3127
3128         /* Check if voltage monitors are reset manually or by some reason */
3129         tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
3130         if ((tmp & 0xff) == 0) {
3131                 /* Enable all voltage monitors */
3132                 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
3133         }
3134
3135         /* Check if tachometers are reset manually or by some reason */
3136         mask = 0x70 & ~(sio_data->skip_fan << 4);
3137         data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
3138         if ((data->fan_main_ctrl & mask) == 0) {
3139                 /* Enable all fan tachometers */
3140                 data->fan_main_ctrl |= mask;
3141                 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
3142                                  data->fan_main_ctrl);
3143         }
3144         data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
3145
3146         tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
3147
3148         /* Set tachometers to 16-bit mode if needed */
3149         if (has_fan16_config(data)) {
3150                 if (~tmp & 0x07 & data->has_fan) {
3151                         dev_dbg(&pdev->dev,
3152                                 "Setting fan1-3 to 16-bit mode\n");
3153                         it87_write_value(data, IT87_REG_FAN_16BIT,
3154                                          tmp | 0x07);
3155                 }
3156         }
3157
3158         /* Check for additional fans */
3159         if (has_four_fans(data) && (tmp & BIT(4)))
3160                 data->has_fan |= BIT(3); /* fan4 enabled */
3161         if (has_five_fans(data) && (tmp & BIT(5)))
3162                 data->has_fan |= BIT(4); /* fan5 enabled */
3163         if (has_six_fans(data)) {
3164                 switch (data->type) {
3165                 case it8620:
3166                 case it8628:
3167                 case it8686:
3168                         if (tmp & BIT(2))
3169                                 data->has_fan |= BIT(5); /* fan6 enabled */
3170                         break;
3171                 case it8665:
3172                         tmp = it87_read_value(data, IT87_REG_FAN_DIV);
3173                         if (tmp & BIT(3))
3174                                 data->has_fan |= BIT(5); /* fan6 enabled */
3175                         break;
3176                 default:
3177                         break;
3178                 }
3179         }
3180
3181         /* Fan input pins may be used for alternative functions */
3182         data->has_fan &= ~sio_data->skip_fan;
3183
3184         /* Check if pwm6 is enabled */
3185         if (has_six_pwm(data)) {
3186                 switch (data->type) {
3187                 case it8620:
3188                 case it8686:
3189                         tmp = it87_read_value(data, IT87_REG_FAN_DIV);
3190                         if (!(tmp & BIT(3)))
3191                                 sio_data->skip_pwm |= BIT(5);
3192                         break;
3193                 default:
3194                         break;
3195                 }
3196         }
3197
3198         /* Start monitoring */
3199         it87_write_value(data, IT87_REG_CONFIG,
3200                          (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
3201                          | (update_vbat ? 0x41 : 0x01));
3202 }
3203
3204 /* Return 1 if and only if the PWM interface is safe to use */
3205 static int it87_check_pwm(struct device *dev)
3206 {
3207         struct it87_data *data = dev_get_drvdata(dev);
3208         /*
3209          * Some BIOSes fail to correctly configure the IT87 fans. All fans off
3210          * and polarity set to active low is sign that this is the case so we
3211          * disable pwm control to protect the user.
3212          */
3213         int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
3214
3215         if ((tmp & 0x87) == 0) {
3216                 if (fix_pwm_polarity) {
3217                         /*
3218                          * The user asks us to attempt a chip reconfiguration.
3219                          * This means switching to active high polarity and
3220                          * inverting all fan speed values.
3221                          */
3222                         int i;
3223                         u8 pwm[3];
3224
3225                         for (i = 0; i < ARRAY_SIZE(pwm); i++)
3226                                 pwm[i] = it87_read_value(data,
3227                                                          data->REG_PWM[i]);
3228
3229                         /*
3230                          * If any fan is in automatic pwm mode, the polarity
3231                          * might be correct, as suspicious as it seems, so we
3232                          * better don't change anything (but still disable the
3233                          * PWM interface).
3234                          */
3235                         if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
3236                                 dev_info(dev,
3237                                          "Reconfiguring PWM to active high polarity\n");
3238                                 it87_write_value(data, IT87_REG_FAN_CTL,
3239                                                  tmp | 0x87);
3240                                 for (i = 0; i < 3; i++)
3241                                         it87_write_value(data,
3242                                                          data->REG_PWM[i],
3243                                                          0x7f & ~pwm[i]);
3244                                 return 1;
3245                         }
3246
3247                         dev_info(dev,
3248                                  "PWM configuration is too broken to be fixed\n");
3249                 }
3250
3251                 dev_info(dev,
3252                          "Detected broken BIOS defaults, disabling PWM interface\n");
3253                 return 0;
3254         } else if (fix_pwm_polarity) {
3255                 dev_info(dev,
3256                          "PWM configuration looks sane, won't touch\n");
3257         }
3258
3259         return 1;
3260 }
3261
3262 static int it87_probe(struct platform_device *pdev)
3263 {
3264         struct it87_data *data;
3265         struct resource *res;
3266         struct device *dev = &pdev->dev;
3267         struct it87_sio_data *sio_data = dev_get_platdata(dev);
3268         int enable_pwm_interface;
3269         struct device *hwmon_dev;
3270
3271         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3272         if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
3273                                  DRVNAME)) {
3274                 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
3275                         (unsigned long)res->start,
3276                         (unsigned long)(res->start + IT87_EC_EXTENT - 1));
3277                 return -EBUSY;
3278         }
3279
3280         data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
3281         if (!data)
3282                 return -ENOMEM;
3283
3284         data->addr = res->start;
3285         data->type = sio_data->type;
3286         data->features = it87_devices[sio_data->type].features;
3287         data->peci_mask = it87_devices[sio_data->type].peci_mask;
3288         data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
3289         data->bank = 0xff;
3290
3291         /*
3292          * IT8705F Datasheet 0.4.1, 3h == Version G.
3293          * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
3294          * These are the first revisions with 16-bit tachometer support.
3295          */
3296         switch (data->type) {
3297         case it87:
3298                 if (sio_data->revision >= 0x03) {
3299                         data->features &= ~FEAT_OLD_AUTOPWM;
3300                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS;
3301                 }
3302                 break;
3303         case it8712:
3304                 if (sio_data->revision >= 0x08) {
3305                         data->features &= ~FEAT_OLD_AUTOPWM;
3306                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS |
3307                                           FEAT_FIVE_FANS;
3308                 }
3309                 break;
3310         default:
3311                 break;
3312         }
3313
3314         /* Now, we do the remaining detection. */
3315         if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80) ||
3316             it87_read_value(data, IT87_REG_CHIPID) != 0x90)
3317                 return -ENODEV;
3318
3319         platform_set_drvdata(pdev, data);
3320
3321         mutex_init(&data->update_lock);
3322
3323         /* Check PWM configuration */
3324         enable_pwm_interface = it87_check_pwm(dev);
3325
3326         /* Starting with IT8721F, we handle scaling of internal voltages */
3327         if (has_scaling(data)) {
3328                 if (sio_data->internal & BIT(0))
3329                         data->in_scaled |= BIT(3);      /* in3 is AVCC */
3330                 if (sio_data->internal & BIT(1))
3331                         data->in_scaled |= BIT(7);      /* in7 is VSB */
3332                 if (sio_data->internal & BIT(2))
3333                         data->in_scaled |= BIT(8);      /* in8 is Vbat */
3334                 if (sio_data->internal & BIT(3))
3335                         data->in_scaled |= BIT(9);      /* in9 is AVCC */
3336         } else if (sio_data->type == it8781 || sio_data->type == it8782 ||
3337                    sio_data->type == it8783) {
3338                 if (sio_data->internal & BIT(0))
3339                         data->in_scaled |= BIT(3);      /* in3 is VCC5V */
3340                 if (sio_data->internal & BIT(1))
3341                         data->in_scaled |= BIT(7);      /* in7 is VCCH5V */
3342         }
3343
3344         data->has_temp = 0x07;
3345         if (sio_data->skip_temp & BIT(2)) {
3346                 if (sio_data->type == it8782 &&
3347                     !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
3348                         data->has_temp &= ~BIT(2);
3349         }
3350
3351         data->in_internal = sio_data->internal;
3352         data->has_in = 0x3ff & ~sio_data->skip_in;
3353
3354         if (has_six_temp(data)) {
3355                 u8 reg = it87_read_value(data, IT87_REG_TEMP456_ENABLE);
3356
3357                 /* Check for additional temperature sensors */
3358                 if ((reg & 0x03) >= 0x02)
3359                         data->has_temp |= BIT(3);
3360                 if (((reg >> 2) & 0x03) >= 0x02)
3361                         data->has_temp |= BIT(4);
3362                 if (((reg >> 4) & 0x03) >= 0x02)
3363                         data->has_temp |= BIT(5);
3364
3365                 /* Check for additional voltage sensors */
3366                 if ((reg & 0x03) == 0x01)
3367                         data->has_in |= BIT(10);
3368                 if (((reg >> 2) & 0x03) == 0x01)
3369                         data->has_in |= BIT(11);
3370                 if (((reg >> 4) & 0x03) == 0x01)
3371                         data->has_in |= BIT(12);
3372         }
3373
3374         data->has_beep = !!sio_data->beep_pin;
3375
3376         /* Initialize the IT87 chip */
3377         it87_init_device(pdev);
3378
3379         if (!sio_data->skip_vid) {
3380                 data->has_vid = true;
3381                 data->vrm = vid_which_vrm();
3382                 /* VID reading from Super-I/O config space if available */
3383                 data->vid = sio_data->vid_value;
3384         }
3385
3386         /* Prepare for sysfs hooks */
3387         data->groups[0] = &it87_group;
3388         data->groups[1] = &it87_group_in;
3389         data->groups[2] = &it87_group_temp;
3390         data->groups[3] = &it87_group_fan;
3391
3392         if (enable_pwm_interface) {
3393                 data->has_pwm = BIT(ARRAY_SIZE(IT87_REG_PWM)) - 1;
3394                 data->has_pwm &= ~sio_data->skip_pwm;
3395
3396                 data->groups[4] = &it87_group_pwm;
3397                 if (has_old_autopwm(data) || has_newer_autopwm(data))
3398                         data->groups[5] = &it87_group_auto_pwm;
3399         }
3400
3401         hwmon_dev = devm_hwmon_device_register_with_groups(dev,
3402                                         it87_devices[sio_data->type].name,
3403                                         data, data->groups);
3404         return PTR_ERR_OR_ZERO(hwmon_dev);
3405 }
3406
3407 static struct platform_driver it87_driver = {
3408         .driver = {
3409                 .name   = DRVNAME,
3410         },
3411         .probe  = it87_probe,
3412 };
3413
3414 static int __init it87_device_add(int index, unsigned short address,
3415                                   const struct it87_sio_data *sio_data)
3416 {
3417         struct platform_device *pdev;
3418         struct resource res = {
3419                 .start  = address + IT87_EC_OFFSET,
3420                 .end    = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
3421                 .name   = DRVNAME,
3422                 .flags  = IORESOURCE_IO,
3423         };
3424         int err;
3425
3426         err = acpi_check_resource_conflict(&res);
3427         if (err)
3428                 return err;
3429
3430         pdev = platform_device_alloc(DRVNAME, address);
3431         if (!pdev)
3432                 return -ENOMEM;
3433
3434         err = platform_device_add_resources(pdev, &res, 1);
3435         if (err) {
3436                 pr_err("Device resource addition failed (%d)\n", err);
3437                 goto exit_device_put;
3438         }
3439
3440         err = platform_device_add_data(pdev, sio_data,
3441                                        sizeof(struct it87_sio_data));
3442         if (err) {
3443                 pr_err("Platform data allocation failed\n");
3444                 goto exit_device_put;
3445         }
3446
3447         err = platform_device_add(pdev);
3448         if (err) {
3449                 pr_err("Device addition failed (%d)\n", err);
3450                 goto exit_device_put;
3451         }
3452
3453         it87_pdev[index] = pdev;
3454         return 0;
3455
3456 exit_device_put:
3457         platform_device_put(pdev);
3458         return err;
3459 }
3460
3461 static int __init sm_it87_init(void)
3462 {
3463         int sioaddr[2] = { REG_2E, REG_4E };
3464         struct it87_sio_data sio_data;
3465         unsigned short isa_address;
3466         bool found = false;
3467         int i, err;
3468
3469         err = platform_driver_register(&it87_driver);
3470         if (err)
3471                 return err;
3472
3473         for (i = 0; i < ARRAY_SIZE(sioaddr); i++) {
3474                 memset(&sio_data, 0, sizeof(struct it87_sio_data));
3475                 isa_address = 0;
3476                 err = it87_find(sioaddr[i], &isa_address, &sio_data);
3477                 if (err || isa_address == 0)
3478                         continue;
3479
3480                 err = it87_device_add(i, isa_address, &sio_data);
3481                 if (err)
3482                         goto exit_dev_unregister;
3483                 found = true;
3484         }
3485
3486         if (!found) {
3487                 err = -ENODEV;
3488                 goto exit_unregister;
3489         }
3490         return 0;
3491
3492 exit_dev_unregister:
3493         /* NULL check handled by platform_device_unregister */
3494         platform_device_unregister(it87_pdev[0]);
3495 exit_unregister:
3496         platform_driver_unregister(&it87_driver);
3497         return err;
3498 }
3499
3500 static void __exit sm_it87_exit(void)
3501 {
3502         /* NULL check handled by platform_device_unregister */
3503         platform_device_unregister(it87_pdev[1]);
3504         platform_device_unregister(it87_pdev[0]);
3505         platform_driver_unregister(&it87_driver);
3506 }
3507
3508 MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>");
3509 MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
3510 module_param(update_vbat, bool, 0);
3511 MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
3512 module_param(fix_pwm_polarity, bool, 0);
3513 MODULE_PARM_DESC(fix_pwm_polarity,
3514                  "Force PWM polarity to active high (DANGEROUS)");
3515 MODULE_LICENSE("GPL");
3516
3517 module_init(sm_it87_init);
3518 module_exit(sm_it87_exit);