git.sur5r.net Git - groeck-it87/blob - it87.c

   1 /*
   2  *  it87.c - Part of lm_sensors, Linux kernel modules for hardware
   3  *           monitoring.
   4  *
   5  *  The IT8705F is an LPC-based Super I/O part that contains UARTs, a
   6  *  parallel port, an IR port, a MIDI port, a floppy controller, etc., in
   7  *  addition to an Environment Controller (Enhanced Hardware Monitor and
   8  *  Fan Controller)
   9  *
  10  *  This driver supports only the Environment Controller in the IT8705F and
  11  *  similar parts.  The other devices are supported by different drivers.
  12  *
  13  *  Supports: IT8603E  Super I/O chip w/LPC interface
  14  *            IT8607E  Super I/O chip w/LPC interface
  15  *            IT8613E  Super I/O chip w/LPC interface
  16  *            IT8620E  Super I/O chip w/LPC interface
  17  *            IT8622E  Super I/O chip w/LPC interface
  18  *            IT8623E  Super I/O chip w/LPC interface
  19  *            IT8625E  Super I/O chip w/LPC interface
  20  *            IT8628E  Super I/O chip w/LPC interface
  21  *            IT8655E  Super I/O chip w/LPC interface
  22  *            IT8665E  Super I/O chip w/LPC interface
  23  *            IT8686E  Super I/O chip w/LPC interface
  24  *            IT8705F  Super I/O chip w/LPC interface
  25  *            IT8712F  Super I/O chip w/LPC interface
  26  *            IT8716F  Super I/O chip w/LPC interface
  27  *            IT8718F  Super I/O chip w/LPC interface
  28  *            IT8720F  Super I/O chip w/LPC interface
  29  *            IT8721F  Super I/O chip w/LPC interface
  30  *            IT8726F  Super I/O chip w/LPC interface
  31  *            IT8728F  Super I/O chip w/LPC interface
  32  *            IT8732F  Super I/O chip w/LPC interface
  33  *            IT8758E  Super I/O chip w/LPC interface
  34  *            IT8771E  Super I/O chip w/LPC interface
  35  *            IT8772E  Super I/O chip w/LPC interface
  36  *            IT8781F  Super I/O chip w/LPC interface
  37  *            IT8782F  Super I/O chip w/LPC interface
  38  *            IT8783E/F Super I/O chip w/LPC interface
  39  *            IT8786E  Super I/O chip w/LPC interface
  40  *            IT8790E  Super I/O chip w/LPC interface
  41  *            IT8792E  Super I/O chip w/LPC interface
  42  *            Sis950   A clone of the IT8705F
  43  *
  44  *  Copyright (C) 2001 Chris Gauthron
  45  *  Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de>
  46  *
  47  *  This program is free software; you can redistribute it and/or modify
  48  *  it under the terms of the GNU General Public License as published by
  49  *  the Free Software Foundation; either version 2 of the License, or
  50  *  (at your option) any later version.
  51  *
  52  *  This program is distributed in the hope that it will be useful,
  53  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  54  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  55  *  GNU General Public License for more details.
  56  */
  57
  58 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  59
  60 #include <linux/bitops.h>
  61 #include <linux/module.h>
  62 #include <linux/init.h>
  63 #include <linux/slab.h>
  64 #include <linux/jiffies.h>
  65 #include <linux/platform_device.h>
  66 #include <linux/hwmon.h>
  67 #include <linux/hwmon-sysfs.h>
  68 #include <linux/hwmon-vid.h>
  69 #include <linux/err.h>
  70 #include <linux/mutex.h>
  71 #include <linux/sysfs.h>
  72 #include <linux/string.h>
  73 #include <linux/dmi.h>
  74 #include <linux/acpi.h>
  75 #include <linux/io.h>
  76 #include "compat.h"
  77
  78 #ifndef IT87_DRIVER_VERSION
  79 #define IT87_DRIVER_VERSION     "<not provided>"
  80 #endif
  81
  82 #define DRVNAME "it87"
  83
  84 enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732,
  85              it8771, it8772, it8781, it8782, it8783, it8786, it8790,
  86              it8792, it8603, it8607, it8613, it8620, it8622, it8625, it8628,
  87              it8655, it8665, it8686 };
  88
  89 static unsigned short force_id;
  90 module_param(force_id, ushort, 0000);
  91 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  92
  93 static bool ignore_resource_conflict;
  94 module_param(ignore_resource_conflict, bool, 0000);
  95 MODULE_PARM_DESC(ignore_resource_conflict, "Ignore ACPI resource conflict");
  96
  97 static bool mmio;
  98 module_param(mmio, bool, 0000);
  99 MODULE_PARM_DESC(mmio, "Use MMIO if available");
 100
 101 static struct platform_device *it87_pdev[2];
 102
 103 #define REG_2E  0x2e    /* The register to read/write */
 104 #define REG_4E  0x4e    /* Secondary register to read/write */
 105
 106 #define DEV     0x07    /* Register: Logical device select */
 107 #define PME     0x04    /* The device with the fan registers in it */
 108
 109 /* The device with the IT8718F/IT8720F VID value in it */
 110 #define GPIO    0x07
 111
 112 #define DEVID   0x20    /* Register: Device ID */
 113 #define DEVREV  0x22    /* Register: Device Revision */
 114
 115 static inline void __superio_enter(int ioreg)
 116 {
 117         outb(0x87, ioreg);
 118         outb(0x01, ioreg);
 119         outb(0x55, ioreg);
 120         outb(ioreg == REG_4E ? 0xaa : 0x55, ioreg);
 121 }
 122
 123 static inline int superio_inb(int ioreg, int reg)
 124 {
 125         int val;
 126
 127         outb(reg, ioreg);
 128         val = inb(ioreg + 1);
 129
 130         return val;
 131 }
 132
 133 static inline void superio_outb(int ioreg, int reg, int val)
 134 {
 135         outb(reg, ioreg);
 136         outb(val, ioreg + 1);
 137 }
 138
 139 static int superio_inw(int ioreg, int reg)
 140 {
 141         return (superio_inb(ioreg, reg) << 8) | superio_inb(ioreg, reg + 1);
 142 }
 143
 144 static inline void superio_select(int ioreg, int ldn)
 145 {
 146         outb(DEV, ioreg);
 147         outb(ldn, ioreg + 1);
 148 }
 149
 150 static inline int superio_enter(int ioreg)
 151 {
 152         /*
 153          * Try to reserve ioreg and ioreg + 1 for exclusive access.
 154          */
 155         if (!request_muxed_region(ioreg, 2, DRVNAME))
 156                 return -EBUSY;
 157
 158         __superio_enter(ioreg);
 159         return 0;
 160 }
 161
 162 static inline void superio_exit(int ioreg, bool doexit)
 163 {
 164         if (doexit) {
 165                 outb(0x02, ioreg);
 166                 outb(0x02, ioreg + 1);
 167         }
 168         release_region(ioreg, 2);
 169 }
 170
 171 /* Logical device 4 registers */
 172 #define IT8712F_DEVID 0x8712
 173 #define IT8705F_DEVID 0x8705
 174 #define IT8716F_DEVID 0x8716
 175 #define IT8718F_DEVID 0x8718
 176 #define IT8720F_DEVID 0x8720
 177 #define IT8721F_DEVID 0x8721
 178 #define IT8726F_DEVID 0x8726
 179 #define IT8728F_DEVID 0x8728
 180 #define IT8732F_DEVID 0x8732
 181 #define IT8792E_DEVID 0x8733
 182 #define IT8771E_DEVID 0x8771
 183 #define IT8772E_DEVID 0x8772
 184 #define IT8781F_DEVID 0x8781
 185 #define IT8782F_DEVID 0x8782
 186 #define IT8783E_DEVID 0x8783
 187 #define IT8786E_DEVID 0x8786
 188 #define IT8790E_DEVID 0x8790
 189 #define IT8603E_DEVID 0x8603
 190 #define IT8607E_DEVID 0x8607
 191 #define IT8613E_DEVID 0x8613
 192 #define IT8620E_DEVID 0x8620
 193 #define IT8622E_DEVID 0x8622
 194 #define IT8623E_DEVID 0x8623
 195 #define IT8625E_DEVID 0x8625
 196 #define IT8628E_DEVID 0x8628
 197 #define IT8655E_DEVID 0x8655
 198 #define IT8665E_DEVID 0x8665
 199 #define IT8686E_DEVID 0x8686
 200
 201 /* Logical device 4 (Environmental Monitor) registers */
 202 #define IT87_ACT_REG            0x30
 203 #define IT87_BASE_REG           0x60
 204 #define IT87_SPECIAL_CFG_REG    0xf3    /* special configuration register */
 205
 206 /* Global configuration registers (IT8712F and later) */
 207 #define IT87_EC_HWM_MIO_REG     0x24    /* MMIO configuration register */
 208 #define IT87_SIO_GPIO1_REG      0x25
 209 #define IT87_SIO_GPIO2_REG      0x26
 210 #define IT87_SIO_GPIO3_REG      0x27
 211 #define IT87_SIO_GPIO4_REG      0x28
 212 #define IT87_SIO_GPIO5_REG      0x29
 213 #define IT87_SIO_GPIO9_REG      0xd3
 214 #define IT87_SIO_PINX1_REG      0x2a    /* Pin selection */
 215 #define IT87_SIO_PINX2_REG      0x2c    /* Pin selection */
 216 #define IT87_SIO_PINX4_REG      0x2d    /* Pin selection */
 217
 218 /* Logical device 7 (GPIO) registers (IT8712F and later) */
 219 #define IT87_SIO_SPI_REG        0xef    /* SPI function pin select */
 220 #define IT87_SIO_VID_REG        0xfc    /* VID value */
 221 #define IT87_SIO_BEEP_PIN_REG   0xf6    /* Beep pin mapping */
 222
 223 /* Update battery voltage after every reading if true */
 224 static bool update_vbat;
 225
 226 /* Not all BIOSes properly configure the PWM registers */
 227 static bool fix_pwm_polarity;
 228
 229 /* Many IT87 constants specified below */
 230
 231 /* Length of ISA address segment */
 232 #define IT87_EXTENT 8
 233
 234 /* Length of ISA address segment for Environmental Controller */
 235 #define IT87_EC_EXTENT 2
 236
 237 /* Offset of EC registers from ISA base address */
 238 #define IT87_EC_OFFSET 5
 239
 240 /* Where are the ISA address/data registers relative to the EC base address */
 241 #define IT87_ADDR_REG_OFFSET 0
 242 #define IT87_DATA_REG_OFFSET 1
 243
 244 /*----- The IT87 registers -----*/
 245
 246 #define IT87_REG_CONFIG        0x00
 247
 248 #define IT87_REG_ALARM1        0x01
 249 #define IT87_REG_ALARM2        0x02
 250 #define IT87_REG_ALARM3        0x03
 251
 252 #define IT87_REG_BANK           0x06
 253
 254 /*
 255  * The IT8718F and IT8720F have the VID value in a different register, in
 256  * Super-I/O configuration space.
 257  */
 258 #define IT87_REG_VID           0x0a
 259 /*
 260  * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
 261  * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
 262  * mode.
 263  */
 264 #define IT87_REG_FAN_DIV       0x0b
 265 #define IT87_REG_FAN_16BIT     0x0c
 266
 267 /*
 268  * Monitors:
 269  * - up to 13 voltage (0 to 7, battery, avcc, 10 to 12)
 270  * - up to 6 temp (1 to 6)
 271  * - up to 6 fan (1 to 6)
 272  */
 273
 274 static const u8 IT87_REG_FAN[] =        { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c };
 275 static const u8 IT87_REG_FAN_MIN[] =    { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e };
 276 static const u8 IT87_REG_FANX[] =       { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d };
 277 static const u8 IT87_REG_FANX_MIN[] =   { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f };
 278
 279 static const u8 IT87_REG_FAN_8665[] =   { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x93 };
 280 static const u8 IT87_REG_FAN_MIN_8665[] = {
 281                                         0x10, 0x11, 0x12, 0x84, 0x86, 0xb2 };
 282 static const u8 IT87_REG_FANX_8665[] =  { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x94 };
 283 static const u8 IT87_REG_FANX_MIN_8665[] = {
 284                                         0x1b, 0x1c, 0x1d, 0x85, 0x87, 0xb3 };
 285
 286 static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59, 0x5a, 0x90, 0x91 };
 287
 288 static const u8 IT87_REG_TEMP_OFFSET_8686[] = {
 289                                         0x56, 0x57, 0x59, 0x90, 0x91, 0x92 };
 290
 291 #define IT87_REG_FAN_MAIN_CTRL 0x13
 292 #define IT87_REG_FAN_CTL       0x14
 293
 294 static const u8 IT87_REG_PWM[] =        { 0x15, 0x16, 0x17, 0x7f, 0xa7, 0xaf };
 295 static const u8 IT87_REG_PWM_8665[] =   { 0x15, 0x16, 0x17, 0x1e, 0x1f, 0x92 };
 296
 297 static const u8 IT87_REG_PWM_DUTY[] =   { 0x63, 0x6b, 0x73, 0x7b, 0xa3, 0xab };
 298
 299 static const u8 IT87_REG_VIN[]  = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26,
 300                                     0x27, 0x28, 0x2f, 0x2c, 0x2d, 0x2e };
 301
 302 #define IT87_REG_TEMP(nr)      (0x29 + (nr))
 303
 304 #define IT87_REG_VIN_MAX(nr)   (0x30 + (nr) * 2)
 305 #define IT87_REG_VIN_MIN(nr)   (0x31 + (nr) * 2)
 306
 307 static const u8 IT87_REG_TEMP_HIGH[] =  { 0x40, 0x42, 0x44, 0x46, 0xb4, 0xb6 };
 308 static const u8 IT87_REG_TEMP_LOW[] =   { 0x41, 0x43, 0x45, 0x47, 0xb5, 0xb7 };
 309
 310 static const u8 IT87_REG_TEMP_HIGH_8686[] = {
 311                                         0x40, 0x42, 0x44, 0xb4, 0xb6, 0xb8 };
 312 static const u8 IT87_REG_TEMP_LOW_8686[] = {
 313                                         0x41, 0x43, 0x45, 0xb5, 0xb7, 0xb9 };
 314
 315 #define IT87_REG_VIN_ENABLE    0x50
 316 #define IT87_REG_TEMP_ENABLE   0x51
 317 #define IT87_REG_TEMP_EXTRA    0x55
 318 #define IT87_REG_BEEP_ENABLE   0x5c
 319
 320 #define IT87_REG_CHIPID        0x58
 321
 322 static const u8 IT87_REG_AUTO_BASE[] = { 0x60, 0x68, 0x70, 0x78, 0xa0, 0xa8 };
 323
 324 #define IT87_REG_AUTO_TEMP(nr, i) (IT87_REG_AUTO_BASE[nr] + (i))
 325 #define IT87_REG_AUTO_PWM(nr, i)  (IT87_REG_AUTO_BASE[nr] + 5 + (i))
 326
 327 #define IT87_REG_TEMP456_ENABLE 0x77
 328
 329 static const u16 IT87_REG_TEMP_SRC1[] = { 0x21d, 0x21e, 0x21f };
 330 #define IT87_REG_TEMP_SRC2      0x23d
 331
 332 #define NUM_VIN                 ARRAY_SIZE(IT87_REG_VIN)
 333 #define NUM_VIN_LIMIT           8
 334 #define NUM_TEMP                6
 335 #define NUM_FAN                 ARRAY_SIZE(IT87_REG_FAN)
 336 #define NUM_FAN_DIV             3
 337 #define NUM_PWM                 ARRAY_SIZE(IT87_REG_PWM)
 338 #define NUM_AUTO_PWM            ARRAY_SIZE(IT87_REG_PWM)
 339
 340 struct it87_devices {
 341         const char *name;
 342         const char * const suffix;
 343         u32 features;
 344         u8 num_temp_limit;
 345         u8 num_temp_offset;
 346         u8 num_temp_map;        /* Number of temperature sources for pwm */
 347         u8 peci_mask;
 348         u8 old_peci_mask;
 349         u8 smbus_bitmap;        /* SMBus enable bits in extra config register */
 350         u8 ec_special_config;
 351 };
 352
 353 #define FEAT_12MV_ADC           BIT(0)
 354 #define FEAT_NEWER_AUTOPWM      BIT(1)
 355 #define FEAT_OLD_AUTOPWM        BIT(2)
 356 #define FEAT_16BIT_FANS         BIT(3)
 357 #define FEAT_TEMP_PECI          BIT(5)
 358 #define FEAT_TEMP_OLD_PECI      BIT(6)
 359 #define FEAT_FAN16_CONFIG       BIT(7)  /* Need to enable 16-bit fans */
 360 #define FEAT_FIVE_FANS          BIT(8)  /* Supports five fans */
 361 #define FEAT_VID                BIT(9)  /* Set if chip supports VID */
 362 #define FEAT_IN7_INTERNAL       BIT(10) /* Set if in7 is internal */
 363 #define FEAT_SIX_FANS           BIT(11) /* Supports six fans */
 364 #define FEAT_10_9MV_ADC         BIT(12)
 365 #define FEAT_AVCC3              BIT(13) /* Chip supports in9/AVCC3 */
 366 #define FEAT_FIVE_PWM           BIT(14) /* Chip supports 5 pwm chn */
 367 #define FEAT_SIX_PWM            BIT(15) /* Chip supports 6 pwm chn */
 368 #define FEAT_PWM_FREQ2          BIT(16) /* Separate pwm freq 2 */
 369 #define FEAT_SIX_TEMP           BIT(17) /* Up to 6 temp sensors */
 370 #define FEAT_VIN3_5V            BIT(18) /* VIN3 connected to +5V */
 371 #define FEAT_FOUR_FANS          BIT(19) /* Supports four fans */
 372 #define FEAT_FOUR_PWM           BIT(20) /* Supports four fan controls */
 373 #define FEAT_BANK_SEL           BIT(21) /* Chip has multi-bank support */
 374 #define FEAT_SCALING            BIT(22) /* Internal voltage scaling */
 375 #define FEAT_FANCTL_ONOFF       BIT(23) /* chip has FAN_CTL ON/OFF */
 376 #define FEAT_11MV_ADC           BIT(24)
 377 #define FEAT_NEW_TEMPMAP        BIT(25) /* new temp input selection */
 378 #define FEAT_MMIO               BIT(26) /* Chip supports MMIO */
 379 #define FEAT_FOUR_TEMP          BIT(27)
 380
 381 static const struct it87_devices it87_devices[] = {
 382         [it87] = {
 383                 .name = "it87",
 384                 .suffix = "F",
 385                 .features = FEAT_OLD_AUTOPWM | FEAT_FANCTL_ONOFF,
 386                                                 /* may need to overwrite */
 387                 .num_temp_limit = 3,
 388                 .num_temp_offset = 0,
 389                 .num_temp_map = 3,
 390         },
 391         [it8712] = {
 392                 .name = "it8712",
 393                 .suffix = "F",
 394                 .features = FEAT_OLD_AUTOPWM | FEAT_VID | FEAT_FANCTL_ONOFF,
 395                                                 /* may need to overwrite */
 396                 .num_temp_limit = 3,
 397                 .num_temp_offset = 0,
 398                 .num_temp_map = 3,
 399         },
 400         [it8716] = {
 401                 .name = "it8716",
 402                 .suffix = "F",
 403                 .features = FEAT_16BIT_FANS | FEAT_VID
 404                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2
 405                   | FEAT_FANCTL_ONOFF,
 406                 .num_temp_limit = 3,
 407                 .num_temp_offset = 3,
 408                 .num_temp_map = 3,
 409         },
 410         [it8718] = {
 411                 .name = "it8718",
 412                 .suffix = "F",
 413                 .features = FEAT_16BIT_FANS | FEAT_VID
 414                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 415                   | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 416                 .num_temp_limit = 3,
 417                 .num_temp_offset = 3,
 418                 .num_temp_map = 3,
 419                 .old_peci_mask = 0x4,
 420         },
 421         [it8720] = {
 422                 .name = "it8720",
 423                 .suffix = "F",
 424                 .features = FEAT_16BIT_FANS | FEAT_VID
 425                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 426                   | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 427                 .num_temp_limit = 3,
 428                 .num_temp_offset = 3,
 429                 .num_temp_map = 3,
 430                 .old_peci_mask = 0x4,
 431         },
 432         [it8721] = {
 433                 .name = "it8721",
 434                 .suffix = "F",
 435                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 436                   | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 437                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL
 438                   | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF,
 439                 .num_temp_limit = 3,
 440                 .num_temp_offset = 3,
 441                 .num_temp_map = 3,
 442                 .peci_mask = 0x05,
 443                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 444         },
 445         [it8728] = {
 446                 .name = "it8728",
 447                 .suffix = "F",
 448                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 449                   | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 450                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_SCALING
 451                   | FEAT_FANCTL_ONOFF,
 452                 .num_temp_limit = 6,
 453                 .num_temp_offset = 3,
 454                 .num_temp_map = 3,
 455                 .peci_mask = 0x07,
 456         },
 457         [it8732] = {
 458                 .name = "it8732",
 459                 .suffix = "F",
 460                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 461                   | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 462                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_FOUR_FANS
 463                   | FEAT_FOUR_PWM | FEAT_FANCTL_ONOFF,
 464                 .num_temp_limit = 3,
 465                 .num_temp_offset = 3,
 466                 .num_temp_map = 3,
 467                 .peci_mask = 0x07,
 468                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 469         },
 470         [it8771] = {
 471                 .name = "it8771",
 472                 .suffix = "E",
 473                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 474                   | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 475                   | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF,
 476                                 /* PECI: guesswork */
 477                                 /* 12mV ADC (OHM) */
 478                                 /* 16 bit fans (OHM) */
 479                                 /* three fans, always 16 bit (guesswork) */
 480                 .num_temp_limit = 3,
 481                 .num_temp_offset = 3,
 482                 .num_temp_map = 3,
 483                 .peci_mask = 0x07,
 484         },
 485         [it8772] = {
 486                 .name = "it8772",
 487                 .suffix = "E",
 488                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 489                   | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 490                   | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF,
 491                                 /* PECI (coreboot) */
 492                                 /* 12mV ADC (HWSensors4, OHM) */
 493                                 /* 16 bit fans (HWSensors4, OHM) */
 494                                 /* three fans, always 16 bit (datasheet) */
 495                 .num_temp_limit = 3,
 496                 .num_temp_offset = 3,
 497                 .num_temp_map = 3,
 498                 .peci_mask = 0x07,
 499         },
 500         [it8781] = {
 501                 .name = "it8781",
 502                 .suffix = "F",
 503                 .features = FEAT_16BIT_FANS
 504                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
 505                   | FEAT_FANCTL_ONOFF,
 506                 .num_temp_limit = 3,
 507                 .num_temp_offset = 3,
 508                 .num_temp_map = 3,
 509                 .old_peci_mask = 0x4,
 510         },
 511         [it8782] = {
 512                 .name = "it8782",
 513                 .suffix = "F",
 514                 .features = FEAT_16BIT_FANS
 515                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
 516                   | FEAT_FANCTL_ONOFF,
 517                 .num_temp_limit = 3,
 518                 .num_temp_offset = 3,
 519                 .num_temp_map = 3,
 520                 .old_peci_mask = 0x4,
 521         },
 522         [it8783] = {
 523                 .name = "it8783",
 524                 .suffix = "E/F",
 525                 .features = FEAT_16BIT_FANS
 526                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
 527                   | FEAT_FANCTL_ONOFF,
 528                 .num_temp_limit = 3,
 529                 .num_temp_offset = 3,
 530                 .num_temp_map = 3,
 531                 .old_peci_mask = 0x4,
 532         },
 533         [it8786] = {
 534                 .name = "it8786",
 535                 .suffix = "E",
 536                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 537                   | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 538                   | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 539                 .num_temp_limit = 3,
 540                 .num_temp_offset = 3,
 541                 .num_temp_map = 3,
 542                 .peci_mask = 0x07,
 543         },
 544         [it8790] = {
 545                 .name = "it8790",
 546                 .suffix = "E",
 547                 .features = FEAT_NEWER_AUTOPWM | FEAT_10_9MV_ADC | FEAT_SCALING
 548                   | FEAT_16BIT_FANS | FEAT_TEMP_PECI
 549                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 550                 .num_temp_limit = 3,
 551                 .num_temp_offset = 3,
 552                 .num_temp_map = 3,
 553                 .peci_mask = 0x07,
 554         },
 555         [it8792] = {
 556                 .name = "it8792",
 557                 .suffix = "E",
 558                 .features = FEAT_NEWER_AUTOPWM | FEAT_10_9MV_ADC | FEAT_SCALING
 559                   | FEAT_16BIT_FANS | FEAT_TEMP_PECI
 560                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 561                 .num_temp_limit = 3,
 562                 .num_temp_offset = 3,
 563                 .num_temp_map = 3,
 564                 .peci_mask = 0x07,
 565         },
 566         [it8603] = {
 567                 .name = "it8603",
 568                 .suffix = "E",
 569                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 570                   | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 571                   | FEAT_AVCC3 | FEAT_PWM_FREQ2 | FEAT_SCALING,
 572                 .num_temp_limit = 3,
 573                 .num_temp_offset = 3,
 574                 .num_temp_map = 4,
 575                 .peci_mask = 0x07,
 576         },
 577         [it8607] = {
 578                 .name = "it8607",
 579                 .suffix = "E",
 580                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 581                   | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL | FEAT_NEW_TEMPMAP
 582                   | FEAT_AVCC3 | FEAT_PWM_FREQ2 | FEAT_SCALING
 583                   | FEAT_FANCTL_ONOFF,
 584                 .num_temp_limit = 3,
 585                 .num_temp_offset = 3,
 586                 .num_temp_map = 6,
 587                 .peci_mask = 0x07,
 588         },
 589         [it8613] = {
 590                 .name = "it8613",
 591                 .suffix = "E",
 592                 .features = FEAT_NEWER_AUTOPWM | FEAT_11MV_ADC | FEAT_16BIT_FANS
 593                   | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 594                   | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
 595                   | FEAT_AVCC3 | FEAT_SCALING | FEAT_NEW_TEMPMAP,
 596                 .num_temp_limit = 6,
 597                 .num_temp_offset = 6,
 598                 .num_temp_map = 6,
 599                 .peci_mask = 0x07,
 600         },
 601         [it8620] = {
 602                 .name = "it8620",
 603                 .suffix = "E",
 604                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 605                   | FEAT_TEMP_PECI | FEAT_SIX_FANS
 606                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 607                   | FEAT_SIX_TEMP | FEAT_VIN3_5V | FEAT_SCALING
 608                   | FEAT_FANCTL_ONOFF,
 609                 .num_temp_limit = 3,
 610                 .num_temp_offset = 3,
 611                 .num_temp_map = 3,
 612                 .peci_mask = 0x07,
 613         },
 614         [it8622] = {
 615                 .name = "it8622",
 616                 .suffix = "E",
 617                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 618                   | FEAT_TEMP_PECI | FEAT_FIVE_FANS | FEAT_FOUR_TEMP
 619                   | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
 620                   | FEAT_AVCC3 | FEAT_VIN3_5V | FEAT_SCALING,
 621                 .num_temp_limit = 3,
 622                 .num_temp_offset = 3,
 623                 .num_temp_map = 4,
 624                 .peci_mask = 0x0f,
 625                 .smbus_bitmap = BIT(1) | BIT(2),
 626         },
 627         [it8625] = {
 628                 .name = "it8625",
 629                 .suffix = "E",
 630                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 631                   | FEAT_AVCC3 | FEAT_NEW_TEMPMAP
 632                   | FEAT_11MV_ADC | FEAT_IN7_INTERNAL | FEAT_SIX_FANS
 633                   | FEAT_SIX_PWM | FEAT_BANK_SEL | FEAT_SCALING,
 634                 .num_temp_limit = 6,
 635                 .num_temp_offset = 6,
 636                 .num_temp_map = 6,
 637                 .smbus_bitmap = BIT(1) | BIT(2),
 638         },
 639         [it8628] = {
 640                 .name = "it8628",
 641                 .suffix = "E",
 642                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 643                   | FEAT_TEMP_PECI | FEAT_SIX_FANS
 644                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 645                   | FEAT_SIX_TEMP | FEAT_SCALING | FEAT_AVCC3
 646                   | FEAT_FANCTL_ONOFF,
 647                 .num_temp_limit = 6,
 648                 .num_temp_offset = 3,
 649                 .num_temp_map = 3,
 650                 .peci_mask = 0x07,
 651         },
 652         [it8655] = {
 653                 .name = "it8655",
 654                 .suffix = "E",
 655                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 656                   | FEAT_AVCC3 | FEAT_NEW_TEMPMAP | FEAT_SCALING
 657                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_BANK_SEL
 658                   | FEAT_MMIO,
 659                 .num_temp_limit = 6,
 660                 .num_temp_offset = 6,
 661                 .num_temp_map = 6,
 662                 .smbus_bitmap = BIT(2),
 663         },
 664         [it8665] = {
 665                 .name = "it8665",
 666                 .suffix = "E",
 667                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 668                   | FEAT_AVCC3 | FEAT_NEW_TEMPMAP | FEAT_SCALING
 669                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_SIX_FANS
 670                   | FEAT_SIX_PWM | FEAT_BANK_SEL | FEAT_MMIO,
 671                 .num_temp_limit = 6,
 672                 .num_temp_offset = 6,
 673                 .num_temp_map = 6,
 674                 .smbus_bitmap = BIT(2),
 675         },
 676         [it8686] = {
 677                 .name = "it8686",
 678                 .suffix = "E",
 679                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 680                   | FEAT_SIX_FANS | FEAT_NEW_TEMPMAP
 681                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 682                   | FEAT_SIX_TEMP | FEAT_BANK_SEL | FEAT_SCALING | FEAT_AVCC3,
 683                 .num_temp_limit = 6,
 684                 .num_temp_offset = 6,
 685                 .num_temp_map = 7,
 686                 .smbus_bitmap = BIT(1) | BIT(2),
 687         },
 688 };
 689
 690 #define has_16bit_fans(data)    ((data)->features & FEAT_16BIT_FANS)
 691 #define has_12mv_adc(data)      ((data)->features & FEAT_12MV_ADC)
 692 #define has_10_9mv_adc(data)    ((data)->features & FEAT_10_9MV_ADC)
 693 #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
 694 #define has_old_autopwm(data)   ((data)->features & FEAT_OLD_AUTOPWM)
 695 #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \
 696                                  ((data)->peci_mask & BIT(nr)))
 697 #define has_temp_old_peci(data, nr) \
 698                                 (((data)->features & FEAT_TEMP_OLD_PECI) && \
 699                                  ((data)->old_peci_mask & BIT(nr)))
 700 #define has_fan16_config(data)  ((data)->features & FEAT_FAN16_CONFIG)
 701 #define has_five_fans(data)     ((data)->features & (FEAT_FIVE_FANS | \
 702                                                      FEAT_SIX_FANS))
 703 #define has_vid(data)           ((data)->features & FEAT_VID)
 704 #define has_in7_internal(data)  ((data)->features & FEAT_IN7_INTERNAL)
 705 #define has_six_fans(data)      ((data)->features & FEAT_SIX_FANS)
 706 #define has_avcc3(data)         ((data)->features & FEAT_AVCC3)
 707 #define has_five_pwm(data)      ((data)->features & (FEAT_FIVE_PWM \
 708                                                      | FEAT_SIX_PWM))
 709 #define has_six_pwm(data)       ((data)->features & FEAT_SIX_PWM)
 710 #define has_pwm_freq2(data)     ((data)->features & FEAT_PWM_FREQ2)
 711 #define has_six_temp(data)      ((data)->features & FEAT_SIX_TEMP)
 712 #define has_vin3_5v(data)       ((data)->features & FEAT_VIN3_5V)
 713 #define has_four_fans(data)     ((data)->features & (FEAT_FOUR_FANS | \
 714                                                      FEAT_FIVE_FANS | \
 715                                                      FEAT_SIX_FANS))
 716 #define has_four_pwm(data)      ((data)->features & (FEAT_FOUR_PWM | \
 717                                                      FEAT_FIVE_PWM \
 718                                                      | FEAT_SIX_PWM))
 719 #define has_bank_sel(data)      ((data)->features & FEAT_BANK_SEL)
 720 #define has_scaling(data)       ((data)->features & FEAT_SCALING)
 721 #define has_fanctl_onoff(data)  ((data)->features & FEAT_FANCTL_ONOFF)
 722 #define has_11mv_adc(data)      ((data)->features & FEAT_11MV_ADC)
 723 #define has_new_tempmap(data)   ((data)->features & FEAT_NEW_TEMPMAP)
 724 #define has_mmio(data)          ((data)->features & FEAT_MMIO)
 725 #define has_four_temp(data)     ((data)->features & FEAT_FOUR_TEMP)
 726
 727 struct it87_sio_data {
 728         enum chips type;
 729         u8 sioaddr;
 730         u8 doexit;
 731         /* Values read from Super-I/O config space */
 732         u8 revision;
 733         u8 vid_value;
 734         u8 beep_pin;
 735         u8 internal;    /* Internal sensors can be labeled */
 736         /* Features skipped based on config or DMI */
 737         u16 skip_in;
 738         u8 skip_vid;
 739         u8 skip_fan;
 740         u8 skip_pwm;
 741         u8 skip_temp;
 742         u8 smbus_bitmap;
 743         u8 ec_special_config;
 744 };
 745
 746 /*
 747  * For each registered chip, we need to keep some data in memory.
 748  * The structure is dynamically allocated.
 749  */
 750 struct it87_data {
 751         const struct attribute_group *groups[7];
 752         enum chips type;
 753         u32 features;
 754         u8 peci_mask;
 755         u8 old_peci_mask;
 756
 757         u8 smbus_bitmap;        /* !=0 if SMBus needs to be disabled */
 758         u8 ec_special_config;   /* EC special config register restore value */
 759         u8 sioaddr;             /* SIO port address */
 760         bool doexit;            /* true if exit from sio config is ok */
 761
 762         void __iomem *mmio;     /* Remapped MMIO address if available */
 763         int (*read)(struct it87_data *, u16);
 764         void (*write)(struct it87_data *, u16, u8);
 765
 766         const u8 *REG_FAN;
 767         const u8 *REG_FANX;
 768         const u8 *REG_FAN_MIN;
 769         const u8 *REG_FANX_MIN;
 770
 771         const u8 *REG_PWM;
 772
 773         const u8 *REG_TEMP_OFFSET;
 774         const u8 *REG_TEMP_LOW;
 775         const u8 *REG_TEMP_HIGH;
 776
 777         unsigned short addr;
 778         const char *name;
 779         struct mutex update_lock;
 780         char valid;             /* !=0 if following fields are valid */
 781         unsigned long last_updated;     /* In jiffies */
 782
 783         u16 in_scaled;          /* Internal voltage sensors are scaled */
 784         u16 in_internal;        /* Bitfield, internal sensors (for labels) */
 785         u16 has_in;             /* Bitfield, voltage sensors enabled */
 786         u8 in[NUM_VIN][3];              /* [nr][0]=in, [1]=min, [2]=max */
 787         u8 has_fan;             /* Bitfield, fans enabled */
 788         u16 fan[NUM_FAN][2];    /* Register values, [nr][0]=fan, [1]=min */
 789         u8 has_temp;            /* Bitfield, temp sensors enabled */
 790         s8 temp[NUM_TEMP][4];   /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
 791         u8 num_temp_limit;      /* Number of temperature limit registers */
 792         u8 num_temp_offset;     /* Number of temperature offset registers */
 793         u8 temp_src[4];         /* Up to 4 temperature source registers */
 794         u8 sensor;              /* Register value (IT87_REG_TEMP_ENABLE) */
 795         u8 extra;               /* Register value (IT87_REG_TEMP_EXTRA) */
 796         u8 fan_div[NUM_FAN_DIV];/* Register encoding, shifted right */
 797         bool has_vid;           /* True if VID supported */
 798         u8 vid;                 /* Register encoding, combined */
 799         u8 vrm;
 800         u32 alarms;             /* Register encoding, combined */
 801         bool has_beep;          /* true if beep supported */
 802         u8 beeps;               /* Register encoding */
 803         u8 fan_main_ctrl;       /* Register value */
 804         u8 fan_ctl;             /* Register value */
 805
 806         /*
 807          * The following 3 arrays correspond to the same registers up to
 808          * the IT8720F. The meaning of bits 6-0 depends on the value of bit
 809          * 7, and we want to preserve settings on mode changes, so we have
 810          * to track all values separately.
 811          * Starting with the IT8721F, the manual PWM duty cycles are stored
 812          * in separate registers (8-bit values), so the separate tracking
 813          * is no longer needed, but it is still done to keep the driver
 814          * simple.
 815          */
 816         u8 has_pwm;             /* Bitfield, pwm control enabled */
 817         u8 pwm_ctrl[NUM_PWM];   /* Register value */
 818         u8 pwm_duty[NUM_PWM];   /* Manual PWM value set by user */
 819         u8 pwm_temp_map[NUM_PWM];/* PWM to temp. chan. mapping (bits 1-0) */
 820         u8 pwm_temp_map_mask;   /* 0x03 for old, 0x07 for new temp map */
 821         u8 pwm_temp_map_shift;  /* 0 for old, 3 for new temp map */
 822         u8 pwm_num_temp_map;    /* from config data, 3..7 depending on chip */
 823
 824         /* Automatic fan speed control registers */
 825         u8 auto_pwm[NUM_AUTO_PWM][4];   /* [nr][3] is hard-coded */
 826         s8 auto_temp[NUM_AUTO_PWM][5];  /* [nr][0] is point1_temp_hyst */
 827 };
 828
 829 static int adc_lsb(const struct it87_data *data, int nr)
 830 {
 831         int lsb;
 832
 833         if (has_12mv_adc(data))
 834                 lsb = 120;
 835         else if (has_10_9mv_adc(data))
 836                 lsb = 109;
 837         else if (has_11mv_adc(data))
 838                 lsb = 110;
 839         else
 840                 lsb = 160;
 841         if (data->in_scaled & BIT(nr))
 842                 lsb <<= 1;
 843         return lsb;
 844 }
 845
 846 static u8 in_to_reg(const struct it87_data *data, int nr, long val)
 847 {
 848         val = DIV_ROUND_CLOSEST(val * 10, adc_lsb(data, nr));
 849         return clamp_val(val, 0, 255);
 850 }
 851
 852 static int in_from_reg(const struct it87_data *data, int nr, int val)
 853 {
 854         return DIV_ROUND_CLOSEST(val * adc_lsb(data, nr), 10);
 855 }
 856
 857 static inline u8 FAN_TO_REG(long rpm, int div)
 858 {
 859         if (rpm == 0)
 860                 return 255;
 861         rpm = clamp_val(rpm, 1, 1000000);
 862         return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
 863 }
 864
 865 static inline u16 FAN16_TO_REG(long rpm)
 866 {
 867         if (rpm == 0)
 868                 return 0xffff;
 869         return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
 870 }
 871
 872 #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
 873                                 1350000 / ((val) * (div)))
 874 /* The divider is fixed to 2 in 16-bit mode */
 875 #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
 876                              1350000 / ((val) * 2))
 877
 878 #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \
 879                                     ((val) + 500) / 1000), -128, 127))
 880 #define TEMP_FROM_REG(val) ((val) * 1000)
 881
 882 static u8 pwm_to_reg(const struct it87_data *data, long val)
 883 {
 884         if (has_newer_autopwm(data))
 885                 return val;
 886         else
 887                 return val >> 1;
 888 }
 889
 890 static int pwm_from_reg(const struct it87_data *data, u8 reg)
 891 {
 892         if (has_newer_autopwm(data))
 893                 return reg;
 894         else
 895                 return (reg & 0x7f) << 1;
 896 }
 897
 898 static int DIV_TO_REG(int val)
 899 {
 900         int answer = 0;
 901
 902         while (answer < 7 && (val >>= 1))
 903                 answer++;
 904         return answer;
 905 }
 906
 907 #define DIV_FROM_REG(val) BIT(val)
 908
 909 static u8 temp_map_from_reg(const struct it87_data *data, u8 reg)
 910 {
 911         u8 map;
 912
 913         map  = (reg >> data->pwm_temp_map_shift) & data->pwm_temp_map_mask;
 914         if (map >= data->pwm_num_temp_map)      /* map is 0-based */
 915                 map = 0;
 916
 917         return map;
 918 }
 919
 920 static u8 temp_map_to_reg(const struct it87_data *data, int nr, u8 map)
 921 {
 922         u8 ctrl = data->pwm_ctrl[nr];
 923
 924         return (ctrl & ~(data->pwm_temp_map_mask << data->pwm_temp_map_shift)) |
 925                (map << data->pwm_temp_map_shift);
 926 }
 927
 928 /*
 929  * PWM base frequencies. The frequency has to be divided by either 128 or 256,
 930  * depending on the chip type, to calculate the actual PWM frequency.
 931  *
 932  * Some of the chip datasheets suggest a base frequency of 51 kHz instead
 933  * of 750 kHz for the slowest base frequency, resulting in a PWM frequency
 934  * of 200 Hz. Sometimes both PWM frequency select registers are affected,
 935  * sometimes just one. It is unknown if this is a datasheet error or real,
 936  * so this is ignored for now.
 937  */
 938 static const unsigned int pwm_freq[8] = {
 939         48000000,
 940         24000000,
 941         12000000,
 942         8000000,
 943         6000000,
 944         3000000,
 945         1500000,
 946         750000,
 947 };
 948
 949 static int smbus_disable(struct it87_data *data)
 950 {
 951         int err;
 952
 953         if (data->smbus_bitmap) {
 954                 err = superio_enter(data->sioaddr);
 955                 if (err)
 956                         return err;
 957                 superio_select(data->sioaddr, PME);
 958                 superio_outb(data->sioaddr, IT87_SPECIAL_CFG_REG,
 959                              data->ec_special_config & ~data->smbus_bitmap);
 960                 superio_exit(data->sioaddr, data->doexit);
 961         }
 962         return 0;
 963 }
 964
 965 static int smbus_enable(struct it87_data *data)
 966 {
 967         int err;
 968
 969         if (data->smbus_bitmap) {
 970                 err = superio_enter(data->sioaddr);
 971                 if (err)
 972                         return err;
 973
 974                 superio_select(data->sioaddr, PME);
 975                 superio_outb(data->sioaddr, IT87_SPECIAL_CFG_REG,
 976                              data->ec_special_config);
 977                 superio_exit(data->sioaddr, data->doexit);
 978         }
 979         return 0;
 980 }
 981
 982 static int _it87_io_read(struct it87_data *data, u16 reg)
 983 {
 984         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 985         return inb_p(data->addr + IT87_DATA_REG_OFFSET);
 986 }
 987
 988 static void _it87_io_write(struct it87_data *data, u16 reg, u8 value)
 989 {
 990         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 991         outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
 992 }
 993
 994 static u8 it87_io_set_bank(struct it87_data *data, u8 bank)
 995 {
 996         u8 _bank = bank;
 997
 998         if (has_bank_sel(data)) {
 999                 u8 breg = _it87_io_read(data, IT87_REG_BANK);
1000
1001                 _bank = breg >> 5;
1002                 if (bank != _bank) {
1003                         breg &= 0x1f;
1004                         breg |= (bank << 5);
1005                         _it87_io_write(data, IT87_REG_BANK, breg);
1006                 }
1007         }
1008         return _bank;
1009 }
1010
1011 /*
1012  * Must be called with data->update_lock held, except during initialization.
1013  * Must be called with SMBus accesses disabled.
1014  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
1015  * would slow down the IT87 access and should not be necessary.
1016  */
1017 static int it87_io_read(struct it87_data *data, u16 reg)
1018 {
1019         u8 bank;
1020         int val;
1021
1022         bank = it87_io_set_bank(data, reg >> 8);
1023         val = _it87_io_read(data, reg & 0xff);
1024         it87_io_set_bank(data, bank);
1025
1026         return val;
1027 }
1028
1029 /*
1030  * Must be called with data->update_lock held, except during initialization.
1031  * Must be called with SMBus accesses disabled
1032  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
1033  * would slow down the IT87 access and should not be necessary.
1034  */
1035 static void it87_io_write(struct it87_data *data, u16 reg, u8 value)
1036 {
1037         u8 bank;
1038
1039         bank = it87_io_set_bank(data, reg >> 8);
1040         _it87_io_write(data, reg & 0xff, value);
1041         it87_io_set_bank(data, bank);
1042 }
1043
1044 static int it87_mmio_read(struct it87_data *data, u16 reg)
1045 {
1046         return readb(data->mmio + reg);
1047 }
1048
1049 static void it87_mmio_write(struct it87_data *data, u16 reg, u8 value)
1050 {
1051         writeb(value, data->mmio + reg);
1052 }
1053
1054 static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
1055 {
1056         u8 ctrl;
1057
1058         ctrl = data->read(data, data->REG_PWM[nr]);
1059         data->pwm_ctrl[nr] = ctrl;
1060         if (has_newer_autopwm(data)) {
1061                 data->pwm_temp_map[nr] = temp_map_from_reg(data, ctrl);
1062                 data->pwm_duty[nr] = data->read(data, IT87_REG_PWM_DUTY[nr]);
1063         } else {
1064                 if (ctrl & 0x80)        /* Automatic mode */
1065                         data->pwm_temp_map[nr] = temp_map_from_reg(data, ctrl);
1066                 else                            /* Manual mode */
1067                         data->pwm_duty[nr] = ctrl & 0x7f;
1068         }
1069
1070         if (has_old_autopwm(data)) {
1071                 int i;
1072
1073                 for (i = 0; i < 5 ; i++)
1074                         data->auto_temp[nr][i] = data->read(data,
1075                                                 IT87_REG_AUTO_TEMP(nr, i));
1076                 for (i = 0; i < 3 ; i++)
1077                         data->auto_pwm[nr][i] = data->read(data,
1078                                                 IT87_REG_AUTO_PWM(nr, i));
1079         } else if (has_newer_autopwm(data)) {
1080                 int i;
1081
1082                 /*
1083                  * 0: temperature hysteresis (base + 5)
1084                  * 1: fan off temperature (base + 0)
1085                  * 2: fan start temperature (base + 1)
1086                  * 3: fan max temperature (base + 2)
1087                  */
1088                 data->auto_temp[nr][0] =
1089                         data->read(data, IT87_REG_AUTO_TEMP(nr, 5));
1090
1091                 for (i = 0; i < 3 ; i++)
1092                         data->auto_temp[nr][i + 1] =
1093                                 data->read(data, IT87_REG_AUTO_TEMP(nr, i));
1094                 /*
1095                  * 0: start pwm value (base + 3)
1096                  * 1: pwm slope (base + 4, 1/8th pwm)
1097                  */
1098                 data->auto_pwm[nr][0] =
1099                         data->read(data, IT87_REG_AUTO_TEMP(nr, 3));
1100                 data->auto_pwm[nr][1] =
1101                         data->read(data, IT87_REG_AUTO_TEMP(nr, 4));
1102         }
1103 }
1104
1105 static int it87_lock(struct it87_data *data)
1106 {
1107         int err;
1108
1109         mutex_lock(&data->update_lock);
1110         err = smbus_disable(data);
1111         if (err)
1112                 mutex_unlock(&data->update_lock);
1113         return err;
1114 }
1115
1116 static void it87_unlock(struct it87_data *data)
1117 {
1118         smbus_enable(data);
1119         mutex_unlock(&data->update_lock);
1120 }
1121
1122 static struct it87_data *it87_update_device(struct device *dev)
1123 {
1124         struct it87_data *data = dev_get_drvdata(dev);
1125         int err;
1126         int i;
1127
1128         err = it87_lock(data);
1129         if (err)
1130                 return ERR_PTR(err);
1131
1132         if (time_after(jiffies, data->last_updated + HZ + HZ / 2) ||
1133             !data->valid) {
1134                 if (update_vbat) {
1135                         /*
1136                          * Cleared after each update, so reenable.  Value
1137                          * returned by this read will be previous value
1138                          */
1139                         data->write(data, IT87_REG_CONFIG,
1140                                     data->read(data, IT87_REG_CONFIG) | 0x40);
1141                 }
1142                 for (i = 0; i < NUM_VIN; i++) {
1143                         if (!(data->has_in & BIT(i)))
1144                                 continue;
1145
1146                         data->in[i][0] = data->read(data, IT87_REG_VIN[i]);
1147
1148                         /* VBAT and AVCC don't have limit registers */
1149                         if (i >= NUM_VIN_LIMIT)
1150                                 continue;
1151
1152                         data->in[i][1] = data->read(data, IT87_REG_VIN_MIN(i));
1153                         data->in[i][2] = data->read(data, IT87_REG_VIN_MAX(i));
1154                 }
1155
1156                 for (i = 0; i < NUM_FAN; i++) {
1157                         /* Skip disabled fans */
1158                         if (!(data->has_fan & BIT(i)))
1159                                 continue;
1160
1161                         data->fan[i][1] = data->read(data, data->REG_FAN_MIN[i]);
1162                         data->fan[i][0] = data->read(data, data->REG_FAN[i]);
1163                         /* Add high byte if in 16-bit mode */
1164                         if (has_16bit_fans(data)) {
1165                                 data->fan[i][0] |= data->read(data,
1166                                                 data->REG_FANX[i]) << 8;
1167                                 data->fan[i][1] |= data->read(data,
1168                                                 data->REG_FANX_MIN[i]) << 8;
1169                         }
1170                 }
1171                 for (i = 0; i < NUM_TEMP; i++) {
1172                         if (!(data->has_temp & BIT(i)))
1173                                 continue;
1174                         data->temp[i][0] =
1175                                 data->read(data, IT87_REG_TEMP(i));
1176
1177                         if (i >= data->num_temp_limit)
1178                                 continue;
1179
1180                         if (i < data->num_temp_offset)
1181                                 data->temp[i][3] =
1182                                   data->read(data, data->REG_TEMP_OFFSET[i]);
1183
1184                         data->temp[i][1] =
1185                                 data->read(data, data->REG_TEMP_LOW[i]);
1186                         data->temp[i][2] =
1187                                 data->read(data, data->REG_TEMP_HIGH[i]);
1188                 }
1189
1190                 /* Newer chips don't have clock dividers */
1191                 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
1192                         i = data->read(data, IT87_REG_FAN_DIV);
1193                         data->fan_div[0] = i & 0x07;
1194                         data->fan_div[1] = (i >> 3) & 0x07;
1195                         data->fan_div[2] = (i & 0x40) ? 3 : 1;
1196                 }
1197
1198                 data->alarms =
1199                         data->read(data, IT87_REG_ALARM1) |
1200                         (data->read(data, IT87_REG_ALARM2) << 8) |
1201                         (data->read(data, IT87_REG_ALARM3) << 16);
1202                 data->beeps = data->read(data, IT87_REG_BEEP_ENABLE);
1203
1204                 data->fan_main_ctrl = data->read(data, IT87_REG_FAN_MAIN_CTRL);
1205                 data->fan_ctl = data->read(data, IT87_REG_FAN_CTL);
1206                 for (i = 0; i < NUM_PWM; i++) {
1207                         if (!(data->has_pwm & BIT(i)))
1208                                 continue;
1209                         it87_update_pwm_ctrl(data, i);
1210                 }
1211
1212                 data->sensor = data->read(data, IT87_REG_TEMP_ENABLE);
1213                 data->extra = data->read(data, IT87_REG_TEMP_EXTRA);
1214                 /*
1215                  * The IT8705F does not have VID capability.
1216                  * The IT8718F and later don't use IT87_REG_VID for the
1217                  * same purpose.
1218                  */
1219                 if (data->type == it8712 || data->type == it8716) {
1220                         data->vid = data->read(data, IT87_REG_VID);
1221                         /*
1222                          * The older IT8712F revisions had only 5 VID pins,
1223                          * but we assume it is always safe to read 6 bits.
1224                          */
1225                         data->vid &= 0x3f;
1226                 }
1227                 data->last_updated = jiffies;
1228                 data->valid = 1;
1229         }
1230         it87_unlock(data);
1231         return data;
1232 }
1233
1234 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
1235                        char *buf)
1236 {
1237         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1238         struct it87_data *data = it87_update_device(dev);
1239         int index = sattr->index;
1240         int nr = sattr->nr;
1241
1242         if (IS_ERR(data))
1243                 return PTR_ERR(data);
1244
1245         return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
1246 }
1247
1248 static ssize_t set_in(struct device *dev, struct device_attribute *attr,
1249                       const char *buf, size_t count)
1250 {
1251         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1252         struct it87_data *data = dev_get_drvdata(dev);
1253         int index = sattr->index;
1254         int nr = sattr->nr;
1255         unsigned long val;
1256         int err;
1257
1258         if (kstrtoul(buf, 10, &val) < 0)
1259                 return -EINVAL;
1260
1261         err = it87_lock(data);
1262         if (err)
1263                 return err;
1264
1265         data->in[nr][index] = in_to_reg(data, nr, val);
1266         data->write(data, index == 1 ? IT87_REG_VIN_MIN(nr)
1267                                      : IT87_REG_VIN_MAX(nr),
1268                     data->in[nr][index]);
1269         it87_unlock(data);
1270         return count;
1271 }
1272
1273 static SENSOR_DEVICE_ATTR_2(in0_input, 0444, show_in, NULL, 0, 0);
1274 static SENSOR_DEVICE_ATTR_2(in0_min, 0644, show_in, set_in, 0, 1);
1275 static SENSOR_DEVICE_ATTR_2(in0_max, 0644, show_in, set_in, 0, 2);
1276
1277 static SENSOR_DEVICE_ATTR_2(in1_input, 0444, show_in, NULL, 1, 0);
1278 static SENSOR_DEVICE_ATTR_2(in1_min, 0644, show_in, set_in, 1, 1);
1279 static SENSOR_DEVICE_ATTR_2(in1_max, 0644, show_in, set_in, 1, 2);
1280
1281 static SENSOR_DEVICE_ATTR_2(in2_input, 0444, show_in, NULL, 2, 0);
1282 static SENSOR_DEVICE_ATTR_2(in2_min, 0644, show_in, set_in, 2, 1);
1283 static SENSOR_DEVICE_ATTR_2(in2_max, 0644, show_in, set_in, 2, 2);
1284
1285 static SENSOR_DEVICE_ATTR_2(in3_input, 0444, show_in, NULL, 3, 0);
1286 static SENSOR_DEVICE_ATTR_2(in3_min, 0644, show_in, set_in, 3, 1);
1287 static SENSOR_DEVICE_ATTR_2(in3_max, 0644, show_in, set_in, 3, 2);
1288
1289 static SENSOR_DEVICE_ATTR_2(in4_input, 0444, show_in, NULL, 4, 0);
1290 static SENSOR_DEVICE_ATTR_2(in4_min, 0644, show_in, set_in, 4, 1);
1291 static SENSOR_DEVICE_ATTR_2(in4_max, 0644, show_in, set_in, 4, 2);
1292
1293 static SENSOR_DEVICE_ATTR_2(in5_input, 0444, show_in, NULL, 5, 0);
1294 static SENSOR_DEVICE_ATTR_2(in5_min, 0644, show_in, set_in, 5, 1);
1295 static SENSOR_DEVICE_ATTR_2(in5_max, 0644, show_in, set_in, 5, 2);
1296
1297 static SENSOR_DEVICE_ATTR_2(in6_input, 0444, show_in, NULL, 6, 0);
1298 static SENSOR_DEVICE_ATTR_2(in6_min, 0644, show_in, set_in, 6, 1);
1299 static SENSOR_DEVICE_ATTR_2(in6_max, 0644, show_in, set_in, 6, 2);
1300
1301 static SENSOR_DEVICE_ATTR_2(in7_input, 0444, show_in, NULL, 7, 0);
1302 static SENSOR_DEVICE_ATTR_2(in7_min, 0644, show_in, set_in, 7, 1);
1303 static SENSOR_DEVICE_ATTR_2(in7_max, 0644, show_in, set_in, 7, 2);
1304
1305 static SENSOR_DEVICE_ATTR_2(in8_input, 0444, show_in, NULL, 8, 0);
1306 static SENSOR_DEVICE_ATTR_2(in9_input, 0444, show_in, NULL, 9, 0);
1307 static SENSOR_DEVICE_ATTR_2(in10_input, 0444, show_in, NULL, 10, 0);
1308 static SENSOR_DEVICE_ATTR_2(in11_input, 0444, show_in, NULL, 11, 0);
1309 static SENSOR_DEVICE_ATTR_2(in12_input, 0444, show_in, NULL, 12, 0);
1310
1311 /* Up to 6 temperatures */
1312 static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
1313                          char *buf)
1314 {
1315         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1316         int nr = sattr->nr;
1317         int index = sattr->index;
1318         struct it87_data *data = it87_update_device(dev);
1319
1320         if (IS_ERR(data))
1321                 return PTR_ERR(data);
1322
1323         return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
1324 }
1325
1326 static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
1327                         const char *buf, size_t count)
1328 {
1329         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1330         int nr = sattr->nr;
1331         int index = sattr->index;
1332         struct it87_data *data = dev_get_drvdata(dev);
1333         long val;
1334         u8 reg, regval;
1335         int err;
1336
1337         if (kstrtol(buf, 10, &val) < 0)
1338                 return -EINVAL;
1339
1340         err = it87_lock(data);
1341         if (err)
1342                 return err;
1343
1344         switch (index) {
1345         default:
1346         case 1:
1347                 reg = data->REG_TEMP_LOW[nr];
1348                 break;
1349         case 2:
1350                 reg = data->REG_TEMP_HIGH[nr];
1351                 break;
1352         case 3:
1353                 regval = data->read(data, IT87_REG_BEEP_ENABLE);
1354                 if (!(regval & 0x80)) {
1355                         regval |= 0x80;
1356                         data->write(data, IT87_REG_BEEP_ENABLE, regval);
1357                 }
1358                 data->valid = 0;
1359                 reg = data->REG_TEMP_OFFSET[nr];
1360                 break;
1361         }
1362
1363         data->temp[nr][index] = TEMP_TO_REG(val);
1364         data->write(data, reg, data->temp[nr][index]);
1365         it87_unlock(data);
1366         return count;
1367 }
1368
1369 static SENSOR_DEVICE_ATTR_2(temp1_input, 0444, show_temp, NULL, 0, 0);
1370 static SENSOR_DEVICE_ATTR_2(temp1_min, 0644, show_temp, set_temp, 0, 1);
1371 static SENSOR_DEVICE_ATTR_2(temp1_max, 0644, show_temp, set_temp, 0, 2);
1372 static SENSOR_DEVICE_ATTR_2(temp1_offset, 0644, show_temp, set_temp, 0, 3);
1373 static SENSOR_DEVICE_ATTR_2(temp2_input, 0444, show_temp, NULL, 1, 0);
1374 static SENSOR_DEVICE_ATTR_2(temp2_min, 0644, show_temp, set_temp, 1, 1);
1375 static SENSOR_DEVICE_ATTR_2(temp2_max, 0644, show_temp, set_temp, 1, 2);
1376 static SENSOR_DEVICE_ATTR_2(temp2_offset, 0644, show_temp, set_temp, 1, 3);
1377 static SENSOR_DEVICE_ATTR_2(temp3_input, 0444, show_temp, NULL, 2, 0);
1378 static SENSOR_DEVICE_ATTR_2(temp3_min, 0644, show_temp, set_temp, 2, 1);
1379 static SENSOR_DEVICE_ATTR_2(temp3_max, 0644, show_temp, set_temp, 2, 2);
1380 static SENSOR_DEVICE_ATTR_2(temp3_offset, 0644, show_temp, set_temp, 2, 3);
1381 static SENSOR_DEVICE_ATTR_2(temp4_input, 0444, show_temp, NULL, 3, 0);
1382 static SENSOR_DEVICE_ATTR_2(temp4_min, 0644, show_temp, set_temp, 3, 1);
1383 static SENSOR_DEVICE_ATTR_2(temp4_max, 0644, show_temp, set_temp, 3, 2);
1384 static SENSOR_DEVICE_ATTR_2(temp4_offset, 0644, show_temp, set_temp, 3, 3);
1385 static SENSOR_DEVICE_ATTR_2(temp5_input, 0444, show_temp, NULL, 4, 0);
1386 static SENSOR_DEVICE_ATTR_2(temp5_min, 0644, show_temp, set_temp, 4, 1);
1387 static SENSOR_DEVICE_ATTR_2(temp5_max, 0644, show_temp, set_temp, 4, 2);
1388 static SENSOR_DEVICE_ATTR_2(temp5_offset, 0644, show_temp, set_temp, 4, 3);
1389 static SENSOR_DEVICE_ATTR_2(temp6_input, 0444, show_temp, NULL, 5, 0);
1390 static SENSOR_DEVICE_ATTR_2(temp6_min, 0644, show_temp, set_temp, 5, 1);
1391 static SENSOR_DEVICE_ATTR_2(temp6_max, 0644, show_temp, set_temp, 5, 2);
1392 static SENSOR_DEVICE_ATTR_2(temp6_offset, 0644, show_temp, set_temp, 5, 3);
1393
1394 static const u8 temp_types_8686[NUM_TEMP][9] = {
1395         { 0, 8, 8, 8, 8, 8, 8, 8, 7 },
1396         { 0, 6, 8, 8, 6, 0, 0, 0, 7 },
1397         { 0, 6, 5, 8, 6, 0, 0, 0, 7 },
1398         { 4, 8, 8, 8, 8, 8, 8, 8, 7 },
1399         { 4, 6, 8, 8, 6, 0, 0, 0, 7 },
1400         { 4, 6, 5, 8, 6, 0, 0, 0, 7 },
1401 };
1402
1403 static int get_temp_type(struct it87_data *data, int index)
1404 {
1405         u8 reg, extra;
1406         int ttype, type = 0;
1407
1408         if (has_bank_sel(data)) {
1409                 u8 src1, src2;
1410
1411                 src1 = (data->temp_src[index / 2] >> ((index % 2) * 4)) & 0x0f;
1412
1413                 switch (data->type) {
1414                 case it8686:
1415                         if (src1 < 9)
1416                                 type = temp_types_8686[index][src1];
1417                         break;
1418                 case it8625:
1419                         if (index < 3)
1420                                 break;
1421                 case it8655:
1422                 case it8665:
1423                         if (src1 < 3) {
1424                                 index = src1;
1425                                 break;
1426                         }
1427                         src2 = data->temp_src[3];
1428                         switch (src1) {
1429                         case 3:
1430                                 type = (src2 & BIT(index)) ? 6 : 5;
1431                                 break;
1432                         case 4 ... 8:
1433                                 type = (src2 & BIT(index)) ? 4 : 6;
1434                                 break;
1435                         case 9:
1436                                 type = (src2 & BIT(index)) ? 5 : 0;
1437                                 break;
1438                         default:
1439                                 break;
1440                         }
1441                         return type;
1442                 default:
1443                         return 0;
1444                 }
1445         }
1446         if (type)
1447                 return type;
1448
1449         /* Dectect PECI vs. AMDTSI if possible */
1450         ttype = 6;
1451         if ((has_temp_peci(data, index)) && data->type != it8721) {
1452                 extra = data->read(data, 0x98); /* PCH/AMDTSI host status */
1453                 if (extra & BIT(6))
1454                         ttype = 5;
1455         }
1456
1457         reg = data->read(data, IT87_REG_TEMP_ENABLE);
1458
1459         /* Per chip special detection */
1460         switch (data->type) {
1461         case it8622:
1462                 if (!(reg & 0xc0) && index == 3)
1463                         type = ttype;
1464                 break;
1465         default:
1466                 break;
1467         }
1468
1469         if (type || index >= 3)
1470                 return type;
1471
1472         extra = data->read(data, IT87_REG_TEMP_EXTRA);
1473
1474         if ((has_temp_peci(data, index) && (reg >> 6 == index + 1)) ||
1475             (has_temp_old_peci(data, index) && (extra & 0x80)))
1476                 type = ttype;           /* Intel PECI or AMDTSI */
1477         if (reg & BIT(index))
1478                 type = 3;               /* thermal diode */
1479         else if (reg & BIT(index + 3))
1480                 type = 4;               /* thermistor */
1481
1482         return type;
1483 }
1484
1485 static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
1486                               char *buf)
1487 {
1488         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1489         struct it87_data *data = it87_update_device(dev);
1490         int type;
1491
1492         if (IS_ERR(data))
1493                 return PTR_ERR(data);
1494
1495         type = get_temp_type(data, sensor_attr->index);
1496         return sprintf(buf, "%d\n", type);
1497 }
1498
1499 static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
1500                              const char *buf, size_t count)
1501 {
1502         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1503         int nr = sensor_attr->index;
1504
1505         struct it87_data *data = dev_get_drvdata(dev);
1506         long val;
1507         u8 reg, extra;
1508         int err;
1509
1510         if (kstrtol(buf, 10, &val) < 0)
1511                 return -EINVAL;
1512
1513         err = it87_lock(data);
1514         if (err)
1515                 return err;
1516
1517         reg = data->read(data, IT87_REG_TEMP_ENABLE);
1518         reg &= ~(1 << nr);
1519         reg &= ~(8 << nr);
1520         if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6))
1521                 reg &= 0x3f;
1522         extra = data->read(data, IT87_REG_TEMP_EXTRA);
1523         if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6))
1524                 extra &= 0x7f;
1525         if (val == 2) { /* backwards compatibility */
1526                 dev_warn(dev,
1527                          "Sensor type 2 is deprecated, please use 4 instead\n");
1528                 val = 4;
1529         }
1530         /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */
1531         if (val == 3)
1532                 reg |= 1 << nr;
1533         else if (val == 4)
1534                 reg |= 8 << nr;
1535         else if (has_temp_peci(data, nr) && val == 6)
1536                 reg |= (nr + 1) << 6;
1537         else if (has_temp_old_peci(data, nr) && val == 6)
1538                 extra |= 0x80;
1539         else if (val != 0) {
1540                 count = -EINVAL;
1541                 goto unlock;
1542         }
1543
1544         data->sensor = reg;
1545         data->extra = extra;
1546         data->write(data, IT87_REG_TEMP_ENABLE, data->sensor);
1547         if (has_temp_old_peci(data, nr))
1548                 data->write(data, IT87_REG_TEMP_EXTRA, data->extra);
1549         data->valid = 0;        /* Force cache refresh */
1550 unlock:
1551         it87_unlock(data);
1552         return count;
1553 }
1554
1555 static SENSOR_DEVICE_ATTR(temp1_type, 0644, show_temp_type, set_temp_type, 0);
1556 static SENSOR_DEVICE_ATTR(temp2_type, 0644, show_temp_type, set_temp_type, 1);
1557 static SENSOR_DEVICE_ATTR(temp3_type, 0644, show_temp_type, set_temp_type, 2);
1558 static SENSOR_DEVICE_ATTR(temp4_type, 0644, show_temp_type, set_temp_type, 3);
1559 static SENSOR_DEVICE_ATTR(temp5_type, 0644, show_temp_type, set_temp_type, 4);
1560 static SENSOR_DEVICE_ATTR(temp6_type, 0644, show_temp_type, set_temp_type, 5);
1561
1562 /* 6 Fans */
1563
1564 static int pwm_mode(const struct it87_data *data, int nr)
1565 {
1566         if (has_fanctl_onoff(data) && nr < 3 &&
1567             !(data->fan_main_ctrl & BIT(nr)))
1568                 return 0;                               /* Full speed */
1569         if (data->pwm_ctrl[nr] & 0x80)
1570                 return 2;                               /* Automatic mode */
1571         if ((!has_fanctl_onoff(data) || nr >= 3) &&
1572             data->pwm_duty[nr] == pwm_to_reg(data, 0xff))
1573                 return 0;                       /* Full speed */
1574
1575         return 1;                               /* Manual mode */
1576 }
1577
1578 static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
1579                         char *buf)
1580 {
1581         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1582         int nr = sattr->nr;
1583         int index = sattr->index;
1584         int speed;
1585         struct it87_data *data = it87_update_device(dev);
1586
1587         if (IS_ERR(data))
1588                 return PTR_ERR(data);
1589
1590         speed = has_16bit_fans(data) ?
1591                 FAN16_FROM_REG(data->fan[nr][index]) :
1592                 FAN_FROM_REG(data->fan[nr][index],
1593                              DIV_FROM_REG(data->fan_div[nr]));
1594         return sprintf(buf, "%d\n", speed);
1595 }
1596
1597 static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
1598                             char *buf)
1599 {
1600         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1601         struct it87_data *data = it87_update_device(dev);
1602         int nr = sensor_attr->index;
1603
1604         if (IS_ERR(data))
1605                 return PTR_ERR(data);
1606
1607         return sprintf(buf, "%lu\n", DIV_FROM_REG(data->fan_div[nr]));
1608 }
1609
1610 static ssize_t show_pwm_enable(struct device *dev,
1611                                struct device_attribute *attr, char *buf)
1612 {
1613         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1614         struct it87_data *data = it87_update_device(dev);
1615         int nr = sensor_attr->index;
1616
1617         if (IS_ERR(data))
1618                 return PTR_ERR(data);
1619
1620         return sprintf(buf, "%d\n", pwm_mode(data, nr));
1621 }
1622
1623 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
1624                         char *buf)
1625 {
1626         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1627         struct it87_data *data = it87_update_device(dev);
1628         int nr = sensor_attr->index;
1629
1630         if (IS_ERR(data))
1631                 return PTR_ERR(data);
1632
1633         return sprintf(buf, "%d\n",
1634                        pwm_from_reg(data, data->pwm_duty[nr]));
1635 }
1636
1637 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
1638                              char *buf)
1639 {
1640         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1641         struct it87_data *data = it87_update_device(dev);
1642         int nr = sensor_attr->index;
1643         unsigned int freq;
1644         int index;
1645
1646         if (IS_ERR(data))
1647                 return PTR_ERR(data);
1648
1649         if (has_pwm_freq2(data) && nr == 1)
1650                 index = (data->extra >> 4) & 0x07;
1651         else
1652                 index = (data->fan_ctl >> 4) & 0x07;
1653
1654         freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128);
1655
1656         return sprintf(buf, "%u\n", freq);
1657 }
1658
1659 static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
1660                        const char *buf, size_t count)
1661 {
1662         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1663         int nr = sattr->nr;
1664         int index = sattr->index;
1665
1666         struct it87_data *data = dev_get_drvdata(dev);
1667         long val;
1668         int err;
1669         u8 reg;
1670
1671         if (kstrtol(buf, 10, &val) < 0)
1672                 return -EINVAL;
1673
1674         err = it87_lock(data);
1675         if (err)
1676                 return err;
1677
1678         if (has_16bit_fans(data)) {
1679                 data->fan[nr][index] = FAN16_TO_REG(val);
1680                 data->write(data, data->REG_FAN_MIN[nr],
1681                             data->fan[nr][index] & 0xff);
1682                 data->write(data, data->REG_FANX_MIN[nr],
1683                             data->fan[nr][index] >> 8);
1684         } else {
1685                 reg = data->read(data, IT87_REG_FAN_DIV);
1686                 switch (nr) {
1687                 case 0:
1688                         data->fan_div[nr] = reg & 0x07;
1689                         break;
1690                 case 1:
1691                         data->fan_div[nr] = (reg >> 3) & 0x07;
1692                         break;
1693                 case 2:
1694                         data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
1695                         break;
1696                 }
1697                 data->fan[nr][index] =
1698                   FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
1699                 data->write(data, data->REG_FAN_MIN[nr], data->fan[nr][index]);
1700         }
1701         it87_unlock(data);
1702         return count;
1703 }
1704
1705 static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
1706                            const char *buf, size_t count)
1707 {
1708         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1709         struct it87_data *data = dev_get_drvdata(dev);
1710         int nr = sensor_attr->index;
1711         unsigned long val;
1712         int min, err;
1713         u8 old;
1714
1715         if (kstrtoul(buf, 10, &val) < 0)
1716                 return -EINVAL;
1717
1718         err = it87_lock(data);
1719         if (err)
1720                 return err;
1721
1722         old = data->read(data, IT87_REG_FAN_DIV);
1723
1724         /* Save fan min limit */
1725         min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
1726
1727         switch (nr) {
1728         case 0:
1729         case 1:
1730                 data->fan_div[nr] = DIV_TO_REG(val);
1731                 break;
1732         case 2:
1733                 if (val < 8)
1734                         data->fan_div[nr] = 1;
1735                 else
1736                         data->fan_div[nr] = 3;
1737         }
1738         val = old & 0x80;
1739         val |= (data->fan_div[0] & 0x07);
1740         val |= (data->fan_div[1] & 0x07) << 3;
1741         if (data->fan_div[2] == 3)
1742                 val |= 0x1 << 6;
1743         data->write(data, IT87_REG_FAN_DIV, val);
1744
1745         /* Restore fan min limit */
1746         data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
1747         data->write(data, data->REG_FAN_MIN[nr], data->fan[nr][1]);
1748         it87_unlock(data);
1749         return count;
1750 }
1751
1752 /* Returns 0 if OK, -EINVAL otherwise */
1753 static int check_trip_points(struct device *dev, int nr)
1754 {
1755         const struct it87_data *data = dev_get_drvdata(dev);
1756         int i, err = 0;
1757
1758         if (has_old_autopwm(data)) {
1759                 for (i = 0; i < 3; i++) {
1760                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1761                                 err = -EINVAL;
1762                 }
1763                 for (i = 0; i < 2; i++) {
1764                         if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1765                                 err = -EINVAL;
1766                 }
1767         } else if (has_newer_autopwm(data)) {
1768                 for (i = 1; i < 3; i++) {
1769                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1770                                 err = -EINVAL;
1771                 }
1772         }
1773
1774         if (err) {
1775                 dev_err(dev,
1776                         "Inconsistent trip points, not switching to automatic mode\n");
1777                 dev_err(dev, "Adjust the trip points and try again\n");
1778         }
1779         return err;
1780 }
1781
1782 static ssize_t set_pwm_enable(struct device *dev, struct device_attribute *attr,
1783                               const char *buf, size_t count)
1784 {
1785         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1786         struct it87_data *data = dev_get_drvdata(dev);
1787         int nr = sensor_attr->index;
1788         long val;
1789         int err;
1790
1791         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
1792                 return -EINVAL;
1793
1794         /* Check trip points before switching to automatic mode */
1795         if (val == 2) {
1796                 if (check_trip_points(dev, nr) < 0)
1797                         return -EINVAL;
1798         }
1799
1800         err = it87_lock(data);
1801         if (err)
1802                 return err;
1803
1804         it87_update_pwm_ctrl(data, nr);
1805
1806         if (val == 0) {
1807                 if (nr < 3 && has_fanctl_onoff(data)) {
1808                         int tmp;
1809                         /* make sure the fan is on when in on/off mode */
1810                         tmp = data->read(data, IT87_REG_FAN_CTL);
1811                         data->write(data, IT87_REG_FAN_CTL, tmp | BIT(nr));
1812                         /* set on/off mode */
1813                         data->fan_main_ctrl &= ~BIT(nr);
1814                         data->write(data, IT87_REG_FAN_MAIN_CTRL,
1815                                     data->fan_main_ctrl);
1816                 } else {
1817                         u8 ctrl;
1818
1819                         /* No on/off mode, set maximum pwm value */
1820                         data->pwm_duty[nr] = pwm_to_reg(data, 0xff);
1821                         data->write(data, IT87_REG_PWM_DUTY[nr],
1822                                     data->pwm_duty[nr]);
1823                         /* and set manual mode */
1824                         if (has_newer_autopwm(data)) {
1825                                 ctrl = temp_map_to_reg(data, nr,
1826                                                        data->pwm_temp_map[nr]);
1827                                 ctrl &= 0x7f;
1828                         } else {
1829                                 ctrl = data->pwm_duty[nr];
1830                         }
1831                         data->pwm_ctrl[nr] = ctrl;
1832                         data->write(data, data->REG_PWM[nr], ctrl);
1833                 }
1834         } else {
1835                 u8 ctrl;
1836
1837                 if (has_newer_autopwm(data)) {
1838                         ctrl = temp_map_to_reg(data, nr,
1839                                                data->pwm_temp_map[nr]);
1840                         if (val == 1)
1841                                 ctrl &= 0x7f;
1842                         else
1843                                 ctrl |= 0x80;
1844                 } else {
1845                         ctrl = (val == 1 ? data->pwm_duty[nr] : 0x80);
1846                 }
1847                 data->pwm_ctrl[nr] = ctrl;
1848                 data->write(data, data->REG_PWM[nr], ctrl);
1849
1850                 if (has_fanctl_onoff(data) && nr < 3) {
1851                         /* set SmartGuardian mode */
1852                         data->fan_main_ctrl |= BIT(nr);
1853                         data->write(data, IT87_REG_FAN_MAIN_CTRL,
1854                                     data->fan_main_ctrl);
1855                 }
1856         }
1857         it87_unlock(data);
1858         return count;
1859 }
1860
1861 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1862                        const char *buf, size_t count)
1863 {
1864         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1865         struct it87_data *data = dev_get_drvdata(dev);
1866         int nr = sensor_attr->index;
1867         long val;
1868         int err;
1869
1870         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1871                 return -EINVAL;
1872
1873         err = it87_lock(data);
1874         if (err)
1875                 return err;
1876
1877         it87_update_pwm_ctrl(data, nr);
1878         if (has_newer_autopwm(data)) {
1879                 /*
1880                  * If we are in automatic mode, the PWM duty cycle register
1881                  * is read-only so we can't write the value.
1882                  */
1883                 if (data->pwm_ctrl[nr] & 0x80) {
1884                         count = -EBUSY;
1885                         goto unlock;
1886                 }
1887                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1888                 data->write(data, IT87_REG_PWM_DUTY[nr],
1889                             data->pwm_duty[nr]);
1890         } else {
1891                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1892                 /*
1893                  * If we are in manual mode, write the duty cycle immediately;
1894                  * otherwise, just store it for later use.
1895                  */
1896                 if (!(data->pwm_ctrl[nr] & 0x80)) {
1897                         data->pwm_ctrl[nr] = data->pwm_duty[nr];
1898                         data->write(data, data->REG_PWM[nr],
1899                                     data->pwm_ctrl[nr]);
1900                 }
1901         }
1902 unlock:
1903         it87_unlock(data);
1904         return count;
1905 }
1906
1907 static ssize_t set_pwm_freq(struct device *dev, struct device_attribute *attr,
1908                             const char *buf, size_t count)
1909 {
1910         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1911         struct it87_data *data = dev_get_drvdata(dev);
1912         int nr = sensor_attr->index;
1913         unsigned long val;
1914         int err;
1915         int i;
1916
1917         if (kstrtoul(buf, 10, &val) < 0)
1918                 return -EINVAL;
1919
1920         val = clamp_val(val, 0, 1000000);
1921         val *= has_newer_autopwm(data) ? 256 : 128;
1922
1923         /* Search for the nearest available frequency */
1924         for (i = 0; i < 7; i++) {
1925                 if (val > (pwm_freq[i] + pwm_freq[i + 1]) / 2)
1926                         break;
1927         }
1928
1929         err = it87_lock(data);
1930         if (err)
1931                 return err;
1932
1933         if (nr == 0) {
1934                 data->fan_ctl = data->read(data, IT87_REG_FAN_CTL) & 0x8f;
1935                 data->fan_ctl |= i << 4;
1936                 data->write(data, IT87_REG_FAN_CTL, data->fan_ctl);
1937         } else {
1938                 data->extra = data->read(data, IT87_REG_TEMP_EXTRA) & 0x8f;
1939                 data->extra |= i << 4;
1940                 data->write(data, IT87_REG_TEMP_EXTRA, data->extra);
1941         }
1942         it87_unlock(data);
1943         return count;
1944 }
1945
1946 static ssize_t show_pwm_temp_map(struct device *dev,
1947                                  struct device_attribute *attr, char *buf)
1948 {
1949         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1950         struct it87_data *data = it87_update_device(dev);
1951         int nr = sensor_attr->index;
1952
1953         if (IS_ERR(data))
1954                 return PTR_ERR(data);
1955
1956         return sprintf(buf, "%d\n", data->pwm_temp_map[nr] + 1);
1957 }
1958
1959 static ssize_t set_pwm_temp_map(struct device *dev,
1960                                 struct device_attribute *attr, const char *buf,
1961                                 size_t count)
1962 {
1963         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1964         struct it87_data *data = dev_get_drvdata(dev);
1965         int nr = sensor_attr->index;
1966         unsigned long val;
1967         int err;
1968         u8 map;
1969
1970         if (kstrtoul(buf, 10, &val) < 0)
1971                 return -EINVAL;
1972
1973         if (!val || val > data->pwm_num_temp_map)
1974                 return -EINVAL;
1975
1976         map = val - 1;
1977
1978         err = it87_lock(data);
1979         if (err)
1980                 return err;
1981
1982         it87_update_pwm_ctrl(data, nr);
1983         data->pwm_temp_map[nr] = map;
1984         /*
1985          * If we are in automatic mode, write the temp mapping immediately;
1986          * otherwise, just store it for later use.
1987          */
1988         if (data->pwm_ctrl[nr] & 0x80) {
1989                 data->pwm_ctrl[nr] = temp_map_to_reg(data, nr, map);
1990                 data->write(data, data->REG_PWM[nr], data->pwm_ctrl[nr]);
1991         }
1992         it87_unlock(data);
1993         return count;
1994 }
1995
1996 static ssize_t show_auto_pwm(struct device *dev, struct device_attribute *attr,
1997                              char *buf)
1998 {
1999         struct it87_data *data = it87_update_device(dev);
2000         struct sensor_device_attribute_2 *sensor_attr =
2001                         to_sensor_dev_attr_2(attr);
2002         int nr = sensor_attr->nr;
2003         int point = sensor_attr->index;
2004
2005         if (IS_ERR(data))
2006                 return PTR_ERR(data);
2007
2008         return sprintf(buf, "%d\n",
2009                        pwm_from_reg(data, data->auto_pwm[nr][point]));
2010 }
2011
2012 static ssize_t set_auto_pwm(struct device *dev, struct device_attribute *attr,
2013                             const char *buf, size_t count)
2014 {
2015         struct it87_data *data = dev_get_drvdata(dev);
2016         struct sensor_device_attribute_2 *sensor_attr =
2017                         to_sensor_dev_attr_2(attr);
2018         int nr = sensor_attr->nr;
2019         int point = sensor_attr->index;
2020         int regaddr;
2021         long val;
2022         int err;
2023
2024         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
2025                 return -EINVAL;
2026
2027         err = it87_lock(data);
2028         if (err)
2029                 return err;
2030
2031         data->auto_pwm[nr][point] = pwm_to_reg(data, val);
2032         if (has_newer_autopwm(data))
2033                 regaddr = IT87_REG_AUTO_TEMP(nr, 3);
2034         else
2035                 regaddr = IT87_REG_AUTO_PWM(nr, point);
2036         data->write(data, regaddr, data->auto_pwm[nr][point]);
2037         it87_unlock(data);
2038         return count;
2039 }
2040
2041 static ssize_t show_auto_pwm_slope(struct device *dev,
2042                                    struct device_attribute *attr, char *buf)
2043 {
2044         struct it87_data *data = it87_update_device(dev);
2045         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
2046         int nr = sensor_attr->index;
2047
2048         if (IS_ERR(data))
2049                 return PTR_ERR(data);
2050
2051         return sprintf(buf, "%d\n", data->auto_pwm[nr][1] & 0x7f);
2052 }
2053
2054 static ssize_t set_auto_pwm_slope(struct device *dev,
2055                                   struct device_attribute *attr,
2056                                   const char *buf, size_t count)
2057 {
2058         struct it87_data *data = dev_get_drvdata(dev);
2059         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
2060         int nr = sensor_attr->index;
2061         unsigned long val;
2062         int err;
2063
2064         if (kstrtoul(buf, 10, &val) < 0 || val > 127)
2065                 return -EINVAL;
2066
2067         err = it87_lock(data);
2068         if (err)
2069                 return err;
2070
2071         data->auto_pwm[nr][1] = (data->auto_pwm[nr][1] & 0x80) | val;
2072         data->write(data, IT87_REG_AUTO_TEMP(nr, 4), data->auto_pwm[nr][1]);
2073         it87_unlock(data);
2074         return count;
2075 }
2076
2077 static ssize_t show_auto_temp(struct device *dev, struct device_attribute *attr,
2078                               char *buf)
2079 {
2080         struct it87_data *data = it87_update_device(dev);
2081         struct sensor_device_attribute_2 *sensor_attr =
2082                         to_sensor_dev_attr_2(attr);
2083         int nr = sensor_attr->nr;
2084         int point = sensor_attr->index;
2085         int reg;
2086
2087         if (IS_ERR(data))
2088                 return PTR_ERR(data);
2089
2090         if (has_old_autopwm(data) || point)
2091                 reg = data->auto_temp[nr][point];
2092         else
2093                 reg = data->auto_temp[nr][1] - (data->auto_temp[nr][0] & 0x1f);
2094
2095         return sprintf(buf, "%d\n", TEMP_FROM_REG(reg));
2096 }
2097
2098 static ssize_t set_auto_temp(struct device *dev, struct device_attribute *attr,
2099                              const char *buf, size_t count)
2100 {
2101         struct it87_data *data = dev_get_drvdata(dev);
2102         struct sensor_device_attribute_2 *sensor_attr =
2103                         to_sensor_dev_attr_2(attr);
2104         int nr = sensor_attr->nr;
2105         int point = sensor_attr->index;
2106         long val;
2107         int reg;
2108         int err;
2109
2110         if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
2111                 return -EINVAL;
2112
2113         err = it87_lock(data);
2114         if (err)
2115                 return err;
2116
2117         if (has_newer_autopwm(data) && !point) {
2118                 reg = data->auto_temp[nr][1] - TEMP_TO_REG(val);
2119                 reg = clamp_val(reg, 0, 0x1f) | (data->auto_temp[nr][0] & 0xe0);
2120                 data->auto_temp[nr][0] = reg;
2121                 data->write(data, IT87_REG_AUTO_TEMP(nr, 5), reg);
2122         } else {
2123                 reg = TEMP_TO_REG(val);
2124                 data->auto_temp[nr][point] = reg;
2125                 if (has_newer_autopwm(data))
2126                         point--;
2127                 data->write(data, IT87_REG_AUTO_TEMP(nr, point), reg);
2128         }
2129         it87_unlock(data);
2130         return count;
2131 }
2132
2133 static SENSOR_DEVICE_ATTR_2(fan1_input, 0444, show_fan, NULL, 0, 0);
2134 static SENSOR_DEVICE_ATTR_2(fan1_min, 0644, show_fan, set_fan, 0, 1);
2135 static SENSOR_DEVICE_ATTR(fan1_div, 0644, show_fan_div, set_fan_div, 0);
2136
2137 static SENSOR_DEVICE_ATTR_2(fan2_input, 0444, show_fan, NULL, 1, 0);
2138 static SENSOR_DEVICE_ATTR_2(fan2_min, 0644, show_fan, set_fan, 1, 1);
2139 static SENSOR_DEVICE_ATTR(fan2_div, 0644, show_fan_div, set_fan_div, 1);
2140
2141 static SENSOR_DEVICE_ATTR_2(fan3_input, 0444, show_fan, NULL, 2, 0);
2142 static SENSOR_DEVICE_ATTR_2(fan3_min, 0644, show_fan, set_fan, 2, 1);
2143 static SENSOR_DEVICE_ATTR(fan3_div, 0644, show_fan_div, set_fan_div, 2);
2144
2145 static SENSOR_DEVICE_ATTR_2(fan4_input, 0444, show_fan, NULL, 3, 0);
2146 static SENSOR_DEVICE_ATTR_2(fan4_min, 0644, show_fan, set_fan, 3, 1);
2147
2148 static SENSOR_DEVICE_ATTR_2(fan5_input, 0444, show_fan, NULL, 4, 0);
2149 static SENSOR_DEVICE_ATTR_2(fan5_min, 0644, show_fan, set_fan, 4, 1);
2150
2151 static SENSOR_DEVICE_ATTR_2(fan6_input, 0444, show_fan, NULL, 5, 0);
2152 static SENSOR_DEVICE_ATTR_2(fan6_min, 0644, show_fan, set_fan, 5, 1);
2153
2154 static SENSOR_DEVICE_ATTR(pwm1_enable, 0644,
2155                           show_pwm_enable, set_pwm_enable, 0);
2156 static SENSOR_DEVICE_ATTR(pwm1, 0644, show_pwm, set_pwm, 0);
2157 static SENSOR_DEVICE_ATTR(pwm1_freq, 0644, show_pwm_freq, set_pwm_freq, 0);
2158 static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, 0444,
2159                           show_pwm_temp_map, set_pwm_temp_map, 0);
2160 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, 0644,
2161                             show_auto_pwm, set_auto_pwm, 0, 0);
2162 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, 0644,
2163                             show_auto_pwm, set_auto_pwm, 0, 1);
2164 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, 0644,
2165                             show_auto_pwm, set_auto_pwm, 0, 2);
2166 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, 0444,
2167                             show_auto_pwm, NULL, 0, 3);
2168 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, 0644,
2169                             show_auto_temp, set_auto_temp, 0, 1);
2170 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, 0644,
2171                             show_auto_temp, set_auto_temp, 0, 0);
2172 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, 0644,
2173                             show_auto_temp, set_auto_temp, 0, 2);
2174 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, 0644,
2175                             show_auto_temp, set_auto_temp, 0, 3);
2176 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, 0644,
2177                             show_auto_temp, set_auto_temp, 0, 4);
2178 static SENSOR_DEVICE_ATTR_2(pwm1_auto_start, 0644,
2179                             show_auto_pwm, set_auto_pwm, 0, 0);
2180 static SENSOR_DEVICE_ATTR(pwm1_auto_slope, 0644,
2181                           show_auto_pwm_slope, set_auto_pwm_slope, 0);
2182
2183 static SENSOR_DEVICE_ATTR(pwm2_enable, 0644,
2184                           show_pwm_enable, set_pwm_enable, 1);
2185 static SENSOR_DEVICE_ATTR(pwm2, 0644, show_pwm, set_pwm, 1);
2186 static SENSOR_DEVICE_ATTR(pwm2_freq, 0444, show_pwm_freq, set_pwm_freq, 1);
2187 static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, 0444,
2188                           show_pwm_temp_map, set_pwm_temp_map, 1);
2189 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, 0644,
2190                             show_auto_pwm, set_auto_pwm, 1, 0);
2191 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, 0644,
2192                             show_auto_pwm, set_auto_pwm, 1, 1);
2193 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, 0644,
2194                             show_auto_pwm, set_auto_pwm, 1, 2);
2195 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, 0444,
2196                             show_auto_pwm, NULL, 1, 3);
2197 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, 0644,
2198                             show_auto_temp, set_auto_temp, 1, 1);
2199 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, 0644,
2200                             show_auto_temp, set_auto_temp, 1, 0);
2201 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, 0644,
2202                             show_auto_temp, set_auto_temp, 1, 2);
2203 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, 0644,
2204                             show_auto_temp, set_auto_temp, 1, 3);
2205 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, 0644,
2206                             show_auto_temp, set_auto_temp, 1, 4);
2207 static SENSOR_DEVICE_ATTR_2(pwm2_auto_start, 0644,
2208                             show_auto_pwm, set_auto_pwm, 1, 0);
2209 static SENSOR_DEVICE_ATTR(pwm2_auto_slope, 0644,
2210                           show_auto_pwm_slope, set_auto_pwm_slope, 1);
2211
2212 static SENSOR_DEVICE_ATTR(pwm3_enable, 0644,
2213                           show_pwm_enable, set_pwm_enable, 2);
2214 static SENSOR_DEVICE_ATTR(pwm3, 0644, show_pwm, set_pwm, 2);
2215 static SENSOR_DEVICE_ATTR(pwm3_freq, 0444, show_pwm_freq, NULL, 2);
2216 static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, 0444,
2217                           show_pwm_temp_map, set_pwm_temp_map, 2);
2218 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, 0644,
2219                             show_auto_pwm, set_auto_pwm, 2, 0);
2220 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, 0644,
2221                             show_auto_pwm, set_auto_pwm, 2, 1);
2222 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, 0644,
2223                             show_auto_pwm, set_auto_pwm, 2, 2);
2224 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, 0444,
2225                             show_auto_pwm, NULL, 2, 3);
2226 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, 0644,
2227                             show_auto_temp, set_auto_temp, 2, 1);
2228 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, 0644,
2229                             show_auto_temp, set_auto_temp, 2, 0);
2230 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, 0644,
2231                             show_auto_temp, set_auto_temp, 2, 2);
2232 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, 0644,
2233                             show_auto_temp, set_auto_temp, 2, 3);
2234 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, 0644,
2235                             show_auto_temp, set_auto_temp, 2, 4);
2236 static SENSOR_DEVICE_ATTR_2(pwm3_auto_start, 0644,
2237                             show_auto_pwm, set_auto_pwm, 2, 0);
2238 static SENSOR_DEVICE_ATTR(pwm3_auto_slope, 0644,
2239                           show_auto_pwm_slope, set_auto_pwm_slope, 2);
2240
2241 static SENSOR_DEVICE_ATTR(pwm4_enable, 0644,
2242                           show_pwm_enable, set_pwm_enable, 3);
2243 static SENSOR_DEVICE_ATTR(pwm4, 0644, show_pwm, set_pwm, 3);
2244 static SENSOR_DEVICE_ATTR(pwm4_freq, 0444, show_pwm_freq, NULL, 3);
2245 static SENSOR_DEVICE_ATTR(pwm4_auto_channels_temp, 0444,
2246                           show_pwm_temp_map, set_pwm_temp_map, 3);
2247 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp, 0644,
2248                             show_auto_temp, set_auto_temp, 2, 1);
2249 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp_hyst, 0644,
2250                             show_auto_temp, set_auto_temp, 2, 0);
2251 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point2_temp, 0644,
2252                             show_auto_temp, set_auto_temp, 2, 2);
2253 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point3_temp, 0644,
2254                             show_auto_temp, set_auto_temp, 2, 3);
2255 static SENSOR_DEVICE_ATTR_2(pwm4_auto_start, 0644,
2256                             show_auto_pwm, set_auto_pwm, 3, 0);
2257 static SENSOR_DEVICE_ATTR(pwm4_auto_slope, 0644,
2258                           show_auto_pwm_slope, set_auto_pwm_slope, 3);
2259
2260 static SENSOR_DEVICE_ATTR(pwm5_enable, 0644,
2261                           show_pwm_enable, set_pwm_enable, 4);
2262 static SENSOR_DEVICE_ATTR(pwm5, 0644, show_pwm, set_pwm, 4);
2263 static SENSOR_DEVICE_ATTR(pwm5_freq, 0444, show_pwm_freq, NULL, 4);
2264 static SENSOR_DEVICE_ATTR(pwm5_auto_channels_temp, 0444,
2265                           show_pwm_temp_map, set_pwm_temp_map, 4);
2266 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp, 0644,
2267                             show_auto_temp, set_auto_temp, 2, 1);
2268 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp_hyst, 0644,
2269                             show_auto_temp, set_auto_temp, 2, 0);
2270 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point2_temp, 0644,
2271                             show_auto_temp, set_auto_temp, 2, 2);
2272 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point3_temp, 0644,
2273                             show_auto_temp, set_auto_temp, 2, 3);
2274 static SENSOR_DEVICE_ATTR_2(pwm5_auto_start, 0644,
2275                             show_auto_pwm, set_auto_pwm, 4, 0);
2276 static SENSOR_DEVICE_ATTR(pwm5_auto_slope, 0644,
2277                           show_auto_pwm_slope, set_auto_pwm_slope, 4);
2278
2279 static SENSOR_DEVICE_ATTR(pwm6_enable, 0644,
2280                           show_pwm_enable, set_pwm_enable, 5);
2281 static SENSOR_DEVICE_ATTR(pwm6, 0644, show_pwm, set_pwm, 5);
2282 static SENSOR_DEVICE_ATTR(pwm6_freq, 0444, show_pwm_freq, NULL, 5);
2283 static SENSOR_DEVICE_ATTR(pwm6_auto_channels_temp, 0444,
2284                           show_pwm_temp_map, set_pwm_temp_map, 5);
2285 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp, 0644,
2286                             show_auto_temp, set_auto_temp, 2, 1);
2287 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp_hyst, 0644,
2288                             show_auto_temp, set_auto_temp, 2, 0);
2289 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point2_temp, 0644,
2290                             show_auto_temp, set_auto_temp, 2, 2);
2291 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point3_temp, 0644,
2292                             show_auto_temp, set_auto_temp, 2, 3);
2293 static SENSOR_DEVICE_ATTR_2(pwm6_auto_start, 0644,
2294                             show_auto_pwm, set_auto_pwm, 5, 0);
2295 static SENSOR_DEVICE_ATTR(pwm6_auto_slope, 0644,
2296                           show_auto_pwm_slope, set_auto_pwm_slope, 5);
2297
2298 /* Alarms */
2299 static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
2300                            char *buf)
2301 {
2302         struct it87_data *data = it87_update_device(dev);
2303
2304         if (IS_ERR(data))
2305                 return PTR_ERR(data);
2306
2307         return sprintf(buf, "%u\n", data->alarms);
2308 }
2309 static DEVICE_ATTR(alarms, 0444, show_alarms, NULL);
2310
2311 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
2312                           char *buf)
2313 {
2314         struct it87_data *data = it87_update_device(dev);
2315         int bitnr = to_sensor_dev_attr(attr)->index;
2316
2317         if (IS_ERR(data))
2318                 return PTR_ERR(data);
2319
2320         return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
2321 }
2322
2323 static ssize_t clear_intrusion(struct device *dev,
2324                                struct device_attribute *attr, const char *buf,
2325                                size_t count)
2326 {
2327         struct it87_data *data = dev_get_drvdata(dev);
2328         int err, config;
2329         long val;
2330
2331         if (kstrtol(buf, 10, &val) < 0 || val != 0)
2332                 return -EINVAL;
2333
2334         err = it87_lock(data);
2335         if (err)
2336                 return err;
2337
2338         config = data->read(data, IT87_REG_CONFIG);
2339         config |= BIT(5);
2340         data->write(data, IT87_REG_CONFIG, config);
2341         /* Invalidate cache to force re-read */
2342         data->valid = 0;
2343         it87_unlock(data);
2344         return count;
2345 }
2346
2347 static SENSOR_DEVICE_ATTR(in0_alarm, 0444, show_alarm, NULL, 8);
2348 static SENSOR_DEVICE_ATTR(in1_alarm, 0444, show_alarm, NULL, 9);
2349 static SENSOR_DEVICE_ATTR(in2_alarm, 0444, show_alarm, NULL, 10);
2350 static SENSOR_DEVICE_ATTR(in3_alarm, 0444, show_alarm, NULL, 11);
2351 static SENSOR_DEVICE_ATTR(in4_alarm, 0444, show_alarm, NULL, 12);
2352 static SENSOR_DEVICE_ATTR(in5_alarm, 0444, show_alarm, NULL, 13);
2353 static SENSOR_DEVICE_ATTR(in6_alarm, 0444, show_alarm, NULL, 14);
2354 static SENSOR_DEVICE_ATTR(in7_alarm, 0444, show_alarm, NULL, 15);
2355 static SENSOR_DEVICE_ATTR(fan1_alarm, 0444, show_alarm, NULL, 0);
2356 static SENSOR_DEVICE_ATTR(fan2_alarm, 0444, show_alarm, NULL, 1);
2357 static SENSOR_DEVICE_ATTR(fan3_alarm, 0444, show_alarm, NULL, 2);
2358 static SENSOR_DEVICE_ATTR(fan4_alarm, 0444, show_alarm, NULL, 3);
2359 static SENSOR_DEVICE_ATTR(fan5_alarm, 0444, show_alarm, NULL, 6);
2360 static SENSOR_DEVICE_ATTR(fan6_alarm, 0444, show_alarm, NULL, 7);
2361 static SENSOR_DEVICE_ATTR(temp1_alarm, 0444, show_alarm, NULL, 16);
2362 static SENSOR_DEVICE_ATTR(temp2_alarm, 0444, show_alarm, NULL, 17);
2363 static SENSOR_DEVICE_ATTR(temp3_alarm, 0444, show_alarm, NULL, 18);
2364 static SENSOR_DEVICE_ATTR(temp4_alarm, 0444, show_alarm, NULL, 19);
2365 static SENSOR_DEVICE_ATTR(temp5_alarm, 0444, show_alarm, NULL, 20);
2366 static SENSOR_DEVICE_ATTR(temp6_alarm, 0444, show_alarm, NULL, 21);
2367 static SENSOR_DEVICE_ATTR(intrusion0_alarm, 0644,
2368                           show_alarm, clear_intrusion, 4);
2369
2370 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
2371                          char *buf)
2372 {
2373         struct it87_data *data = it87_update_device(dev);
2374         int bitnr = to_sensor_dev_attr(attr)->index;
2375
2376         if (IS_ERR(data))
2377                 return PTR_ERR(data);
2378
2379         return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
2380 }
2381
2382 static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
2383                         const char *buf, size_t count)
2384 {
2385         int bitnr = to_sensor_dev_attr(attr)->index;
2386         struct it87_data *data = dev_get_drvdata(dev);
2387         long val;
2388         int err;
2389
2390         if (kstrtol(buf, 10, &val) < 0 || (val != 0 && val != 1))
2391                 return -EINVAL;
2392
2393         err = it87_lock(data);
2394         if (err)
2395                 return err;
2396
2397         data->beeps = data->read(data, IT87_REG_BEEP_ENABLE);
2398         if (val)
2399                 data->beeps |= BIT(bitnr);
2400         else
2401                 data->beeps &= ~BIT(bitnr);
2402         data->write(data, IT87_REG_BEEP_ENABLE, data->beeps);
2403         it87_unlock(data);
2404         return count;
2405 }
2406
2407 static SENSOR_DEVICE_ATTR(in0_beep, 0644,
2408                           show_beep, set_beep, 1);
2409 static SENSOR_DEVICE_ATTR(in1_beep, 0444, show_beep, NULL, 1);
2410 static SENSOR_DEVICE_ATTR(in2_beep, 0444, show_beep, NULL, 1);
2411 static SENSOR_DEVICE_ATTR(in3_beep, 0444, show_beep, NULL, 1);
2412 static SENSOR_DEVICE_ATTR(in4_beep, 0444, show_beep, NULL, 1);
2413 static SENSOR_DEVICE_ATTR(in5_beep, 0444, show_beep, NULL, 1);
2414 static SENSOR_DEVICE_ATTR(in6_beep, 0444, show_beep, NULL, 1);
2415 static SENSOR_DEVICE_ATTR(in7_beep, 0444, show_beep, NULL, 1);
2416 /* fanX_beep writability is set later */
2417 static SENSOR_DEVICE_ATTR(fan1_beep, 0444, show_beep, set_beep, 0);
2418 static SENSOR_DEVICE_ATTR(fan2_beep, 0444, show_beep, set_beep, 0);
2419 static SENSOR_DEVICE_ATTR(fan3_beep, 0444, show_beep, set_beep, 0);
2420 static SENSOR_DEVICE_ATTR(fan4_beep, 0444, show_beep, set_beep, 0);
2421 static SENSOR_DEVICE_ATTR(fan5_beep, 0444, show_beep, set_beep, 0);
2422 static SENSOR_DEVICE_ATTR(fan6_beep, 0444, show_beep, set_beep, 0);
2423 static SENSOR_DEVICE_ATTR(temp1_beep, 0644,
2424                           show_beep, set_beep, 2);
2425 static SENSOR_DEVICE_ATTR(temp2_beep, 0444, show_beep, NULL, 2);
2426 static SENSOR_DEVICE_ATTR(temp3_beep, 0444, show_beep, NULL, 2);
2427 static SENSOR_DEVICE_ATTR(temp4_beep, 0444, show_beep, NULL, 2);
2428 static SENSOR_DEVICE_ATTR(temp5_beep, 0444, show_beep, NULL, 2);
2429 static SENSOR_DEVICE_ATTR(temp6_beep, 0444, show_beep, NULL, 2);
2430
2431 static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
2432                             char *buf)
2433 {
2434         struct it87_data *data = dev_get_drvdata(dev);
2435
2436         return sprintf(buf, "%u\n", data->vrm);
2437 }
2438
2439 static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
2440                              const char *buf, size_t count)
2441 {
2442         struct it87_data *data = dev_get_drvdata(dev);
2443         unsigned long val;
2444
2445         if (kstrtoul(buf, 10, &val) < 0)
2446                 return -EINVAL;
2447
2448         data->vrm = val;
2449
2450         return count;
2451 }
2452 static DEVICE_ATTR(vrm, 0644, show_vrm_reg, store_vrm_reg);
2453
2454 static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
2455                             char *buf)
2456 {
2457         struct it87_data *data = it87_update_device(dev);
2458
2459         if (IS_ERR(data))
2460                 return PTR_ERR(data);
2461
2462         return sprintf(buf, "%ld\n", (long)vid_from_reg(data->vid, data->vrm));
2463 }
2464 static DEVICE_ATTR(cpu0_vid, 0444, show_vid_reg, NULL);
2465
2466 static ssize_t show_label(struct device *dev, struct device_attribute *attr,
2467                           char *buf)
2468 {
2469         static const char * const labels[] = {
2470                 "+5V",
2471                 "5VSB",
2472                 "Vbat",
2473                 "AVCC",
2474         };
2475         static const char * const labels_it8721[] = {
2476                 "+3.3V",
2477                 "3VSB",
2478                 "Vbat",
2479                 "+3.3V",
2480         };
2481         struct it87_data *data = dev_get_drvdata(dev);
2482         int nr = to_sensor_dev_attr(attr)->index;
2483         const char *label;
2484
2485         if (has_vin3_5v(data) && nr == 0)
2486                 label = labels[0];
2487         else if (has_12mv_adc(data) || has_10_9mv_adc(data) ||
2488                  has_11mv_adc(data))
2489                 label = labels_it8721[nr];
2490         else
2491                 label = labels[nr];
2492
2493         return sprintf(buf, "%s\n", label);
2494 }
2495 static SENSOR_DEVICE_ATTR(in3_label, 0444, show_label, NULL, 0);
2496 static SENSOR_DEVICE_ATTR(in7_label, 0444, show_label, NULL, 1);
2497 static SENSOR_DEVICE_ATTR(in8_label, 0444, show_label, NULL, 2);
2498 /* AVCC3 */
2499 static SENSOR_DEVICE_ATTR(in9_label, 0444, show_label, NULL, 3);
2500
2501 static umode_t it87_in_is_visible(struct kobject *kobj,
2502                                   struct attribute *attr, int index)
2503 {
2504         struct device *dev = container_of(kobj, struct device, kobj);
2505         struct it87_data *data = dev_get_drvdata(dev);
2506         int i = index / 5;      /* voltage index */
2507         int a = index % 5;      /* attribute index */
2508
2509         if (index >= 40) {      /* in8 and higher only have input attributes */
2510                 i = index - 40 + 8;
2511                 a = 0;
2512         }
2513
2514         if (!(data->has_in & BIT(i)))
2515                 return 0;
2516
2517         if (a == 4 && !data->has_beep)
2518                 return 0;
2519
2520         return attr->mode;
2521 }
2522
2523 static struct attribute *it87_attributes_in[] = {
2524         &sensor_dev_attr_in0_input.dev_attr.attr,
2525         &sensor_dev_attr_in0_min.dev_attr.attr,
2526         &sensor_dev_attr_in0_max.dev_attr.attr,
2527         &sensor_dev_attr_in0_alarm.dev_attr.attr,
2528         &sensor_dev_attr_in0_beep.dev_attr.attr,        /* 4 */
2529
2530         &sensor_dev_attr_in1_input.dev_attr.attr,
2531         &sensor_dev_attr_in1_min.dev_attr.attr,
2532         &sensor_dev_attr_in1_max.dev_attr.attr,
2533         &sensor_dev_attr_in1_alarm.dev_attr.attr,
2534         &sensor_dev_attr_in1_beep.dev_attr.attr,        /* 9 */
2535
2536         &sensor_dev_attr_in2_input.dev_attr.attr,
2537         &sensor_dev_attr_in2_min.dev_attr.attr,
2538         &sensor_dev_attr_in2_max.dev_attr.attr,
2539         &sensor_dev_attr_in2_alarm.dev_attr.attr,
2540         &sensor_dev_attr_in2_beep.dev_attr.attr,        /* 14 */
2541
2542         &sensor_dev_attr_in3_input.dev_attr.attr,
2543         &sensor_dev_attr_in3_min.dev_attr.attr,
2544         &sensor_dev_attr_in3_max.dev_attr.attr,
2545         &sensor_dev_attr_in3_alarm.dev_attr.attr,
2546         &sensor_dev_attr_in3_beep.dev_attr.attr,        /* 19 */
2547
2548         &sensor_dev_attr_in4_input.dev_attr.attr,
2549         &sensor_dev_attr_in4_min.dev_attr.attr,
2550         &sensor_dev_attr_in4_max.dev_attr.attr,
2551         &sensor_dev_attr_in4_alarm.dev_attr.attr,
2552         &sensor_dev_attr_in4_beep.dev_attr.attr,        /* 24 */
2553
2554         &sensor_dev_attr_in5_input.dev_attr.attr,
2555         &sensor_dev_attr_in5_min.dev_attr.attr,
2556         &sensor_dev_attr_in5_max.dev_attr.attr,
2557         &sensor_dev_attr_in5_alarm.dev_attr.attr,
2558         &sensor_dev_attr_in5_beep.dev_attr.attr,        /* 29 */
2559
2560         &sensor_dev_attr_in6_input.dev_attr.attr,
2561         &sensor_dev_attr_in6_min.dev_attr.attr,
2562         &sensor_dev_attr_in6_max.dev_attr.attr,
2563         &sensor_dev_attr_in6_alarm.dev_attr.attr,
2564         &sensor_dev_attr_in6_beep.dev_attr.attr,        /* 34 */
2565
2566         &sensor_dev_attr_in7_input.dev_attr.attr,
2567         &sensor_dev_attr_in7_min.dev_attr.attr,
2568         &sensor_dev_attr_in7_max.dev_attr.attr,
2569         &sensor_dev_attr_in7_alarm.dev_attr.attr,
2570         &sensor_dev_attr_in7_beep.dev_attr.attr,        /* 39 */
2571
2572         &sensor_dev_attr_in8_input.dev_attr.attr,       /* 40 */
2573         &sensor_dev_attr_in9_input.dev_attr.attr,       /* 41 */
2574         &sensor_dev_attr_in10_input.dev_attr.attr,      /* 42 */
2575         &sensor_dev_attr_in11_input.dev_attr.attr,      /* 43 */
2576         &sensor_dev_attr_in12_input.dev_attr.attr,      /* 44 */
2577         NULL
2578 };
2579
2580 static const struct attribute_group it87_group_in = {
2581         .attrs = it87_attributes_in,
2582         .is_visible = it87_in_is_visible,
2583 };
2584
2585 static umode_t it87_temp_is_visible(struct kobject *kobj,
2586                                     struct attribute *attr, int index)
2587 {
2588         struct device *dev = container_of(kobj, struct device, kobj);
2589         struct it87_data *data = dev_get_drvdata(dev);
2590         int i = index / 7;      /* temperature index */
2591         int a = index % 7;      /* attribute index */
2592
2593         if (!(data->has_temp & BIT(i)))
2594                 return 0;
2595
2596         if (a && i >= data->num_temp_limit)
2597                 return 0;
2598
2599         if (a == 3) {
2600                 int type = get_temp_type(data, i);
2601
2602                 if (type == 0)
2603                         return 0;
2604                 if (has_bank_sel(data))
2605                         return 0444;
2606                 return attr->mode;
2607         }
2608
2609         if (a == 5 && i >= data->num_temp_offset)
2610                 return 0;
2611
2612         if (a == 6 && !data->has_beep)
2613                 return 0;
2614
2615         return attr->mode;
2616 }
2617
2618 static struct attribute *it87_attributes_temp[] = {
2619         &sensor_dev_attr_temp1_input.dev_attr.attr,
2620         &sensor_dev_attr_temp1_max.dev_attr.attr,
2621         &sensor_dev_attr_temp1_min.dev_attr.attr,
2622         &sensor_dev_attr_temp1_type.dev_attr.attr,      /* 3 */
2623         &sensor_dev_attr_temp1_alarm.dev_attr.attr,
2624         &sensor_dev_attr_temp1_offset.dev_attr.attr,    /* 5 */
2625         &sensor_dev_attr_temp1_beep.dev_attr.attr,      /* 6 */
2626
2627         &sensor_dev_attr_temp2_input.dev_attr.attr,     /* 7 */
2628         &sensor_dev_attr_temp2_max.dev_attr.attr,
2629         &sensor_dev_attr_temp2_min.dev_attr.attr,
2630         &sensor_dev_attr_temp2_type.dev_attr.attr,
2631         &sensor_dev_attr_temp2_alarm.dev_attr.attr,
2632         &sensor_dev_attr_temp2_offset.dev_attr.attr,
2633         &sensor_dev_attr_temp2_beep.dev_attr.attr,
2634
2635         &sensor_dev_attr_temp3_input.dev_attr.attr,     /* 14 */
2636         &sensor_dev_attr_temp3_max.dev_attr.attr,
2637         &sensor_dev_attr_temp3_min.dev_attr.attr,
2638         &sensor_dev_attr_temp3_type.dev_attr.attr,
2639         &sensor_dev_attr_temp3_alarm.dev_attr.attr,
2640         &sensor_dev_attr_temp3_offset.dev_attr.attr,
2641         &sensor_dev_attr_temp3_beep.dev_attr.attr,
2642
2643         &sensor_dev_attr_temp4_input.dev_attr.attr,     /* 21 */
2644         &sensor_dev_attr_temp4_max.dev_attr.attr,
2645         &sensor_dev_attr_temp4_min.dev_attr.attr,
2646         &sensor_dev_attr_temp4_type.dev_attr.attr,
2647         &sensor_dev_attr_temp4_alarm.dev_attr.attr,
2648         &sensor_dev_attr_temp4_offset.dev_attr.attr,
2649         &sensor_dev_attr_temp4_beep.dev_attr.attr,
2650
2651         &sensor_dev_attr_temp5_input.dev_attr.attr,
2652         &sensor_dev_attr_temp5_max.dev_attr.attr,
2653         &sensor_dev_attr_temp5_min.dev_attr.attr,
2654         &sensor_dev_attr_temp5_type.dev_attr.attr,
2655         &sensor_dev_attr_temp5_alarm.dev_attr.attr,
2656         &sensor_dev_attr_temp5_offset.dev_attr.attr,
2657         &sensor_dev_attr_temp5_beep.dev_attr.attr,
2658
2659         &sensor_dev_attr_temp6_input.dev_attr.attr,
2660         &sensor_dev_attr_temp6_max.dev_attr.attr,
2661         &sensor_dev_attr_temp6_min.dev_attr.attr,
2662         &sensor_dev_attr_temp6_type.dev_attr.attr,
2663         &sensor_dev_attr_temp6_alarm.dev_attr.attr,
2664         &sensor_dev_attr_temp6_offset.dev_attr.attr,
2665         &sensor_dev_attr_temp6_beep.dev_attr.attr,
2666         NULL
2667 };
2668
2669 static const struct attribute_group it87_group_temp = {
2670         .attrs = it87_attributes_temp,
2671         .is_visible = it87_temp_is_visible,
2672 };
2673
2674 static umode_t it87_is_visible(struct kobject *kobj,
2675                                struct attribute *attr, int index)
2676 {
2677         struct device *dev = container_of(kobj, struct device, kobj);
2678         struct it87_data *data = dev_get_drvdata(dev);
2679
2680         if ((index == 2 || index == 3) && !data->has_vid)
2681                 return 0;
2682
2683         if (index > 3 && !(data->in_internal & BIT(index - 4)))
2684                 return 0;
2685
2686         return attr->mode;
2687 }
2688
2689 static struct attribute *it87_attributes[] = {
2690         &dev_attr_alarms.attr,
2691         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
2692         &dev_attr_vrm.attr,                             /* 2 */
2693         &dev_attr_cpu0_vid.attr,                        /* 3 */
2694         &sensor_dev_attr_in3_label.dev_attr.attr,       /* 4 .. 7 */
2695         &sensor_dev_attr_in7_label.dev_attr.attr,
2696         &sensor_dev_attr_in8_label.dev_attr.attr,
2697         &sensor_dev_attr_in9_label.dev_attr.attr,
2698         NULL
2699 };
2700
2701 static const struct attribute_group it87_group = {
2702         .attrs = it87_attributes,
2703         .is_visible = it87_is_visible,
2704 };
2705
2706 static umode_t it87_fan_is_visible(struct kobject *kobj,
2707                                    struct attribute *attr, int index)
2708 {
2709         struct device *dev = container_of(kobj, struct device, kobj);
2710         struct it87_data *data = dev_get_drvdata(dev);
2711         int i = index / 5;      /* fan index */
2712         int a = index % 5;      /* attribute index */
2713
2714         if (index >= 15) {      /* fan 4..6 don't have divisor attributes */
2715                 i = (index - 15) / 4 + 3;
2716                 a = (index - 15) % 4;
2717         }
2718
2719         if (!(data->has_fan & BIT(i)))
2720                 return 0;
2721
2722         if (a == 3) {                           /* beep */
2723                 if (!data->has_beep)
2724                         return 0;
2725                 /* first fan beep attribute is writable */
2726                 if (i == __ffs(data->has_fan))
2727                         return attr->mode | 0200;
2728         }
2729
2730         if (a == 4 && has_16bit_fans(data))     /* divisor */
2731                 return 0;
2732
2733         return attr->mode;
2734 }
2735
2736 static struct attribute *it87_attributes_fan[] = {
2737         &sensor_dev_attr_fan1_input.dev_attr.attr,
2738         &sensor_dev_attr_fan1_min.dev_attr.attr,
2739         &sensor_dev_attr_fan1_alarm.dev_attr.attr,
2740         &sensor_dev_attr_fan1_beep.dev_attr.attr,       /* 3 */
2741         &sensor_dev_attr_fan1_div.dev_attr.attr,        /* 4 */
2742
2743         &sensor_dev_attr_fan2_input.dev_attr.attr,
2744         &sensor_dev_attr_fan2_min.dev_attr.attr,
2745         &sensor_dev_attr_fan2_alarm.dev_attr.attr,
2746         &sensor_dev_attr_fan2_beep.dev_attr.attr,
2747         &sensor_dev_attr_fan2_div.dev_attr.attr,        /* 9 */
2748
2749         &sensor_dev_attr_fan3_input.dev_attr.attr,
2750         &sensor_dev_attr_fan3_min.dev_attr.attr,
2751         &sensor_dev_attr_fan3_alarm.dev_attr.attr,
2752         &sensor_dev_attr_fan3_beep.dev_attr.attr,
2753         &sensor_dev_attr_fan3_div.dev_attr.attr,        /* 14 */
2754
2755         &sensor_dev_attr_fan4_input.dev_attr.attr,      /* 15 */
2756         &sensor_dev_attr_fan4_min.dev_attr.attr,
2757         &sensor_dev_attr_fan4_alarm.dev_attr.attr,
2758         &sensor_dev_attr_fan4_beep.dev_attr.attr,
2759
2760         &sensor_dev_attr_fan5_input.dev_attr.attr,      /* 19 */
2761         &sensor_dev_attr_fan5_min.dev_attr.attr,
2762         &sensor_dev_attr_fan5_alarm.dev_attr.attr,
2763         &sensor_dev_attr_fan5_beep.dev_attr.attr,
2764
2765         &sensor_dev_attr_fan6_input.dev_attr.attr,      /* 23 */
2766         &sensor_dev_attr_fan6_min.dev_attr.attr,
2767         &sensor_dev_attr_fan6_alarm.dev_attr.attr,
2768         &sensor_dev_attr_fan6_beep.dev_attr.attr,
2769         NULL
2770 };
2771
2772 static const struct attribute_group it87_group_fan = {
2773         .attrs = it87_attributes_fan,
2774         .is_visible = it87_fan_is_visible,
2775 };
2776
2777 static umode_t it87_pwm_is_visible(struct kobject *kobj,
2778                                    struct attribute *attr, int index)
2779 {
2780         struct device *dev = container_of(kobj, struct device, kobj);
2781         struct it87_data *data = dev_get_drvdata(dev);
2782         int i = index / 4;      /* pwm index */
2783         int a = index % 4;      /* attribute index */
2784
2785         if (!(data->has_pwm & BIT(i)))
2786                 return 0;
2787
2788         /* pwmX_auto_channels_temp is only writable if auto pwm is supported */
2789         if (a == 3 && (has_old_autopwm(data) || has_newer_autopwm(data)))
2790                 return attr->mode | 0200;
2791
2792         /* pwm2_freq is writable if there are two pwm frequency selects */
2793         if (has_pwm_freq2(data) && i == 1 && a == 2)
2794                 return attr->mode | 0200;
2795
2796         return attr->mode;
2797 }
2798
2799 static struct attribute *it87_attributes_pwm[] = {
2800         &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2801         &sensor_dev_attr_pwm1.dev_attr.attr,
2802         &sensor_dev_attr_pwm1_freq.dev_attr.attr,
2803         &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
2804
2805         &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2806         &sensor_dev_attr_pwm2.dev_attr.attr,
2807         &sensor_dev_attr_pwm2_freq.dev_attr.attr,
2808         &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
2809
2810         &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2811         &sensor_dev_attr_pwm3.dev_attr.attr,
2812         &sensor_dev_attr_pwm3_freq.dev_attr.attr,
2813         &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
2814
2815         &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2816         &sensor_dev_attr_pwm4.dev_attr.attr,
2817         &sensor_dev_attr_pwm4_freq.dev_attr.attr,
2818         &sensor_dev_attr_pwm4_auto_channels_temp.dev_attr.attr,
2819
2820         &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2821         &sensor_dev_attr_pwm5.dev_attr.attr,
2822         &sensor_dev_attr_pwm5_freq.dev_attr.attr,
2823         &sensor_dev_attr_pwm5_auto_channels_temp.dev_attr.attr,
2824
2825         &sensor_dev_attr_pwm6_enable.dev_attr.attr,
2826         &sensor_dev_attr_pwm6.dev_attr.attr,
2827         &sensor_dev_attr_pwm6_freq.dev_attr.attr,
2828         &sensor_dev_attr_pwm6_auto_channels_temp.dev_attr.attr,
2829
2830         NULL
2831 };
2832
2833 static const struct attribute_group it87_group_pwm = {
2834         .attrs = it87_attributes_pwm,
2835         .is_visible = it87_pwm_is_visible,
2836 };
2837
2838 static umode_t it87_auto_pwm_is_visible(struct kobject *kobj,
2839                                         struct attribute *attr, int index)
2840 {
2841         struct device *dev = container_of(kobj, struct device, kobj);
2842         struct it87_data *data = dev_get_drvdata(dev);
2843         int i = index / 11;     /* pwm index */
2844         int a = index % 11;     /* attribute index */
2845
2846         if (index >= 33) {      /* pwm 4..6 */
2847                 i = (index - 33) / 6 + 3;
2848                 a = (index - 33) % 6 + 4;
2849         }
2850
2851         if (!(data->has_pwm & BIT(i)))
2852                 return 0;
2853
2854         if (has_newer_autopwm(data)) {
2855                 if (a < 4)      /* no auto point pwm */
2856                         return 0;
2857                 if (a == 8)     /* no auto_point4 */
2858                         return 0;
2859         }
2860         if (has_old_autopwm(data)) {
2861                 if (a >= 9)     /* no pwm_auto_start, pwm_auto_slope */
2862                         return 0;
2863         }
2864
2865         return attr->mode;
2866 }
2867
2868 static struct attribute *it87_attributes_auto_pwm[] = {
2869         &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
2870         &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
2871         &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
2872         &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
2873         &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
2874         &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
2875         &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
2876         &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
2877         &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
2878         &sensor_dev_attr_pwm1_auto_start.dev_attr.attr,
2879         &sensor_dev_attr_pwm1_auto_slope.dev_attr.attr,
2880
2881         &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,    /* 11 */
2882         &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
2883         &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
2884         &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
2885         &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
2886         &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
2887         &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
2888         &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
2889         &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
2890         &sensor_dev_attr_pwm2_auto_start.dev_attr.attr,
2891         &sensor_dev_attr_pwm2_auto_slope.dev_attr.attr,
2892
2893         &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,    /* 22 */
2894         &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
2895         &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
2896         &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
2897         &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
2898         &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
2899         &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
2900         &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
2901         &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
2902         &sensor_dev_attr_pwm3_auto_start.dev_attr.attr,
2903         &sensor_dev_attr_pwm3_auto_slope.dev_attr.attr,
2904
2905         &sensor_dev_attr_pwm4_auto_point1_temp.dev_attr.attr,   /* 33 */
2906         &sensor_dev_attr_pwm4_auto_point1_temp_hyst.dev_attr.attr,
2907         &sensor_dev_attr_pwm4_auto_point2_temp.dev_attr.attr,
2908         &sensor_dev_attr_pwm4_auto_point3_temp.dev_attr.attr,
2909         &sensor_dev_attr_pwm4_auto_start.dev_attr.attr,
2910         &sensor_dev_attr_pwm4_auto_slope.dev_attr.attr,
2911
2912         &sensor_dev_attr_pwm5_auto_point1_temp.dev_attr.attr,
2913         &sensor_dev_attr_pwm5_auto_point1_temp_hyst.dev_attr.attr,
2914         &sensor_dev_attr_pwm5_auto_point2_temp.dev_attr.attr,
2915         &sensor_dev_attr_pwm5_auto_point3_temp.dev_attr.attr,
2916         &sensor_dev_attr_pwm5_auto_start.dev_attr.attr,
2917         &sensor_dev_attr_pwm5_auto_slope.dev_attr.attr,
2918
2919         &sensor_dev_attr_pwm6_auto_point1_temp.dev_attr.attr,
2920         &sensor_dev_attr_pwm6_auto_point1_temp_hyst.dev_attr.attr,
2921         &sensor_dev_attr_pwm6_auto_point2_temp.dev_attr.attr,
2922         &sensor_dev_attr_pwm6_auto_point3_temp.dev_attr.attr,
2923         &sensor_dev_attr_pwm6_auto_start.dev_attr.attr,
2924         &sensor_dev_attr_pwm6_auto_slope.dev_attr.attr,
2925
2926         NULL,
2927 };
2928
2929 static const struct attribute_group it87_group_auto_pwm = {
2930         .attrs = it87_attributes_auto_pwm,
2931         .is_visible = it87_auto_pwm_is_visible,
2932 };
2933
2934 /* SuperIO detection - will change isa_address if a chip is found */
2935 static int __init it87_find(int sioaddr, unsigned short *address,
2936                             phys_addr_t *mmio_address, struct it87_sio_data *sio_data)
2937 {
2938         const struct it87_devices *config;
2939         phys_addr_t base = 0;
2940         bool doexit = true;
2941         char mmio_str[32];
2942         u16 chip_type;
2943         int err;
2944
2945         err = superio_enter(sioaddr);
2946         if (err)
2947                 return err;
2948
2949         sio_data->sioaddr = sioaddr;
2950
2951         err = -ENODEV;
2952         chip_type = superio_inw(sioaddr, DEVID);
2953         if (chip_type == 0xffff)
2954                 goto exit;
2955
2956         if (force_id)
2957                 chip_type = force_id;
2958
2959         switch (chip_type) {
2960         case IT8705F_DEVID:
2961                 sio_data->type = it87;
2962                 break;
2963         case IT8712F_DEVID:
2964                 sio_data->type = it8712;
2965                 break;
2966         case IT8716F_DEVID:
2967         case IT8726F_DEVID:
2968                 sio_data->type = it8716;
2969                 break;
2970         case IT8718F_DEVID:
2971                 sio_data->type = it8718;
2972                 break;
2973         case IT8720F_DEVID:
2974                 sio_data->type = it8720;
2975                 break;
2976         case IT8721F_DEVID:
2977                 sio_data->type = it8721;
2978                 break;
2979         case IT8728F_DEVID:
2980                 sio_data->type = it8728;
2981                 break;
2982         case IT8732F_DEVID:
2983                 sio_data->type = it8732;
2984                 break;
2985         case IT8792E_DEVID:
2986                 sio_data->type = it8792;
2987                 /*
2988                  * Disabling configuration mode on IT8792E can result in system
2989                  * hang-ups and access failures to the Super-IO chip at the
2990                  * second SIO address. Never exit configuration mode on this
2991                  * chip to avoid the problem.
2992                  */
2993                 doexit = false;
2994                 break;
2995         case IT8771E_DEVID:
2996                 sio_data->type = it8771;
2997                 break;
2998         case IT8772E_DEVID:
2999                 sio_data->type = it8772;
3000                 break;
3001         case IT8781F_DEVID:
3002                 sio_data->type = it8781;
3003                 break;
3004         case IT8782F_DEVID:
3005                 sio_data->type = it8782;
3006                 break;
3007         case IT8783E_DEVID:
3008                 sio_data->type = it8783;
3009                 break;
3010         case IT8786E_DEVID:
3011                 sio_data->type = it8786;
3012                 break;
3013         case IT8790E_DEVID:
3014                 sio_data->type = it8790;
3015                 doexit = false;         /* See IT8792E comment above */
3016                 break;
3017         case IT8603E_DEVID:
3018         case IT8623E_DEVID:
3019                 sio_data->type = it8603;
3020                 break;
3021         case IT8607E_DEVID:
3022                 sio_data->type = it8607;
3023                 break;
3024         case IT8613E_DEVID:
3025                 sio_data->type = it8613;
3026                 break;
3027         case IT8620E_DEVID:
3028                 sio_data->type = it8620;
3029                 break;
3030         case IT8622E_DEVID:
3031                 sio_data->type = it8622;
3032                 break;
3033         case IT8625E_DEVID:
3034                 sio_data->type = it8625;
3035                 break;
3036         case IT8628E_DEVID:
3037                 sio_data->type = it8628;
3038                 break;
3039         case IT8655E_DEVID:
3040                 sio_data->type = it8655;
3041                 break;
3042         case IT8665E_DEVID:
3043                 sio_data->type = it8665;
3044                 break;
3045         case IT8686E_DEVID:
3046                 sio_data->type = it8686;
3047                 break;
3048         case 0xffff:    /* No device at all */
3049                 goto exit;
3050         default:
3051                 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
3052                 goto exit;
3053         }
3054
3055         superio_select(sioaddr, PME);
3056         if (!(superio_inb(sioaddr, IT87_ACT_REG) & 0x01)) {
3057                 pr_info("Device not activated, skipping\n");
3058                 goto exit;
3059         }
3060
3061         *address = superio_inw(sioaddr, IT87_BASE_REG) & ~(IT87_EXTENT - 1);
3062         if (*address == 0) {
3063                 pr_info("Base address not set, skipping\n");
3064                 goto exit;
3065         }
3066
3067         sio_data->doexit = doexit;
3068
3069         err = 0;
3070         sio_data->revision = superio_inb(sioaddr, DEVREV) & 0x0f;
3071
3072         config = &it87_devices[sio_data->type];
3073
3074         if (has_mmio(config) && mmio) {
3075                 u8 reg;
3076
3077                 reg = superio_inb(sioaddr, IT87_EC_HWM_MIO_REG);
3078                 if (reg & BIT(5)) {
3079                         base = 0xf0000000 + ((reg & 0x0f) << 24);
3080                         base += (reg & 0xc0) << 14;
3081                 }
3082         }
3083         *mmio_address = base;
3084
3085         mmio_str[0] = '\0';
3086         if (base)
3087                 snprintf(mmio_str, sizeof(mmio_str), " [MMIO at %pa]", &base);
3088
3089         pr_info("Found IT%04x%s chip at 0x%x%s, revision %d\n", chip_type,
3090                 it87_devices[sio_data->type].suffix,
3091                 *address, mmio_str, sio_data->revision);
3092
3093         /* in7 (VSB or VCCH5V) is always internal on some chips */
3094         if (has_in7_internal(config))
3095                 sio_data->internal |= BIT(1);
3096
3097         /* in8 (Vbat) is always internal */
3098         sio_data->internal |= BIT(2);
3099
3100         /* in9 (AVCC3), always internal if supported */
3101         if (has_avcc3(config))
3102                 sio_data->internal |= BIT(3); /* in9 is AVCC */
3103         else
3104                 sio_data->skip_in |= BIT(9);
3105
3106         if (!has_four_pwm(config))
3107                 sio_data->skip_pwm |= BIT(3) | BIT(4) | BIT(5);
3108         else if (!has_five_pwm(config))
3109                 sio_data->skip_pwm |= BIT(4) | BIT(5);
3110         else if (!has_six_pwm(config))
3111                 sio_data->skip_pwm |= BIT(5);
3112
3113         if (!has_vid(config))
3114                 sio_data->skip_vid = 1;
3115
3116         /* Read GPIO config and VID value from LDN 7 (GPIO) */
3117         if (sio_data->type == it87) {
3118                 /* The IT8705F has a different LD number for GPIO */
3119                 superio_select(sioaddr, 5);
3120                 sio_data->beep_pin = superio_inb(sioaddr,
3121                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3122         } else if (sio_data->type == it8783) {
3123                 int reg25, reg27, reg2a, reg2c, regef;
3124
3125                 superio_select(sioaddr, GPIO);
3126
3127                 reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
3128                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3129                 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
3130                 reg2c = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3131                 regef = superio_inb(sioaddr, IT87_SIO_SPI_REG);
3132
3133                 /* Check if fan3 is there or not */
3134                 if ((reg27 & BIT(0)) || !(reg2c & BIT(2)))
3135                         sio_data->skip_fan |= BIT(2);
3136                 if ((reg25 & BIT(4)) ||
3137                     (!(reg2a & BIT(1)) && (regef & BIT(0))))
3138                         sio_data->skip_pwm |= BIT(2);
3139
3140                 /* Check if fan2 is there or not */
3141                 if (reg27 & BIT(7))
3142                         sio_data->skip_fan |= BIT(1);
3143                 if (reg27 & BIT(3))
3144                         sio_data->skip_pwm |= BIT(1);
3145
3146                 /* VIN5 */
3147                 if ((reg27 & BIT(0)) || (reg2c & BIT(2)))
3148                         sio_data->skip_in |= BIT(5); /* No VIN5 */
3149
3150                 /* VIN6 */
3151                 if (reg27 & BIT(1))
3152                         sio_data->skip_in |= BIT(6); /* No VIN6 */
3153
3154                 /*
3155                  * VIN7
3156                  * Does not depend on bit 2 of Reg2C, contrary to datasheet.
3157                  */
3158                 if (reg27 & BIT(2)) {
3159                         /*
3160                          * The data sheet is a bit unclear regarding the
3161                          * internal voltage divider for VCCH5V. It says
3162                          * "This bit enables and switches VIN7 (pin 91) to the
3163                          * internal voltage divider for VCCH5V".
3164                          * This is different to other chips, where the internal
3165                          * voltage divider would connect VIN7 to an internal
3166                          * voltage source. Maybe that is the case here as well.
3167                          *
3168                          * Since we don't know for sure, re-route it if that is
3169                          * not the case, and ask the user to report if the
3170                          * resulting voltage is sane.
3171                          */
3172                         if (!(reg2c & BIT(1))) {
3173                                 reg2c |= BIT(1);
3174                                 superio_outb(sioaddr, IT87_SIO_PINX2_REG,
3175                                              reg2c);
3176                                 pr_notice("Routing internal VCCH5V to in7.\n");
3177                         }
3178                         pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
3179                         pr_notice("Please report if it displays a reasonable voltage.\n");
3180                 }
3181
3182                 if (reg2c & BIT(0))
3183                         sio_data->internal |= BIT(0);
3184                 if (reg2c & BIT(1))
3185                         sio_data->internal |= BIT(1);
3186
3187                 sio_data->beep_pin = superio_inb(sioaddr,
3188                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3189         } else if (sio_data->type == it8603 || sio_data->type == it8607) {
3190                 int reg27, reg29;
3191
3192                 superio_select(sioaddr, GPIO);
3193
3194                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3195
3196                 /* Check if fan3 is there or not */
3197                 if (reg27 & BIT(6))
3198                         sio_data->skip_pwm |= BIT(2);
3199                 if (reg27 & BIT(7))
3200                         sio_data->skip_fan |= BIT(2);
3201
3202                 /* Check if fan2 is there or not */
3203                 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3204                 if (reg29 & BIT(1))
3205                         sio_data->skip_pwm |= BIT(1);
3206                 if (reg29 & BIT(2))
3207                         sio_data->skip_fan |= BIT(1);
3208
3209                 switch (sio_data->type) {
3210                 case it8603:
3211                         sio_data->skip_in |= BIT(5); /* No VIN5 */
3212                         sio_data->skip_in |= BIT(6); /* No VIN6 */
3213                         break;
3214                 case it8607:
3215                         sio_data->skip_pwm |= BIT(0);/* No fan1 */
3216                         sio_data->skip_fan |= BIT(0);
3217                 default:
3218                         break;
3219                 }
3220
3221                 sio_data->beep_pin = superio_inb(sioaddr,
3222                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3223         } else if (sio_data->type == it8613) {
3224                 int reg27, reg29, reg2a;
3225
3226                 superio_select(sioaddr, GPIO);
3227
3228                 /* Check for pwm3, fan3, pwm5, fan5 */
3229                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3230                 if (reg27 & BIT(1))
3231                         sio_data->skip_fan |= BIT(4);
3232                 if (reg27 & BIT(3))
3233                         sio_data->skip_pwm |= BIT(4);
3234                 if (reg27 & BIT(6))
3235                         sio_data->skip_pwm |= BIT(2);
3236                 if (reg27 & BIT(7))
3237                         sio_data->skip_fan |= BIT(2);
3238
3239                 /* Check for pwm2, fan2 */
3240                 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3241                 if (reg29 & BIT(1))
3242                         sio_data->skip_pwm |= BIT(1);
3243                 if (reg29 & BIT(2))
3244                         sio_data->skip_fan |= BIT(1);
3245
3246                 /* Check for pwm4, fan4 */
3247                 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
3248                 if (!(reg2a & BIT(0)) || (reg29 & BIT(7))) {
3249                         sio_data->skip_fan |= BIT(3);
3250                         sio_data->skip_pwm |= BIT(3);
3251                 }
3252
3253                 sio_data->skip_pwm |= BIT(0); /* No pwm1 */
3254                 sio_data->skip_fan |= BIT(0); /* No fan1 */
3255                 sio_data->skip_in |= BIT(3);  /* No VIN3 */
3256                 sio_data->skip_in |= BIT(6);  /* No VIN6 */
3257
3258                 sio_data->beep_pin = superio_inb(sioaddr,
3259                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3260         } else if (sio_data->type == it8620 || sio_data->type == it8628 ||
3261                    sio_data->type == it8686) {
3262                 int reg;
3263
3264                 superio_select(sioaddr, GPIO);
3265
3266                 /* Check for pwm5 */
3267                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
3268                 if (reg & BIT(6))
3269                         sio_data->skip_pwm |= BIT(4);
3270
3271                 /* Check for fan4, fan5 */
3272                 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
3273                 if (!(reg & BIT(5)))
3274                         sio_data->skip_fan |= BIT(3);
3275                 if (!(reg & BIT(4)))
3276                         sio_data->skip_fan |= BIT(4);
3277
3278                 /* Check for pwm3, fan3 */
3279                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3280                 if (reg & BIT(6))
3281                         sio_data->skip_pwm |= BIT(2);
3282                 if (reg & BIT(7))
3283                         sio_data->skip_fan |= BIT(2);
3284
3285                 /* Check for pwm4 */
3286                 reg = superio_inb(sioaddr, IT87_SIO_GPIO4_REG);
3287                 if (reg & BIT(2))
3288                         sio_data->skip_pwm |= BIT(3);
3289
3290                 /* Check for pwm2, fan2 */
3291                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3292                 if (reg & BIT(1))
3293                         sio_data->skip_pwm |= BIT(1);
3294                 if (reg & BIT(2))
3295                         sio_data->skip_fan |= BIT(1);
3296                 /* Check for pwm6, fan6 */
3297                 if (!(reg & BIT(7))) {
3298                         sio_data->skip_pwm |= BIT(5);
3299                         sio_data->skip_fan |= BIT(5);
3300                 }
3301
3302                 /* Check if AVCC is on VIN3 */
3303                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3304                 if (reg & BIT(0)) {
3305                         /* For it8686, the bit just enables AVCC3 */
3306                         if (sio_data->type != it8686)
3307                                 sio_data->internal |= BIT(0);
3308                 } else {
3309                         sio_data->internal &= ~BIT(3);
3310                         sio_data->skip_in |= BIT(9);
3311                 }
3312
3313                 sio_data->beep_pin = superio_inb(sioaddr,
3314                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3315         } else if (sio_data->type == it8622) {
3316                 int reg;
3317
3318                 superio_select(sioaddr, GPIO);
3319
3320                 /* Check for pwm4, fan4 */
3321                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
3322                 if (reg & BIT(6))
3323                         sio_data->skip_fan |= BIT(3);
3324                 if (reg & BIT(5))
3325                         sio_data->skip_pwm |= BIT(3);
3326
3327                 /* Check for pwm3, fan3, pwm5, fan5 */
3328                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3329                 if (reg & BIT(6))
3330                         sio_data->skip_pwm |= BIT(2);
3331                 if (reg & BIT(7))
3332                         sio_data->skip_fan |= BIT(2);
3333                 if (reg & BIT(3))
3334                         sio_data->skip_pwm |= BIT(4);
3335                 if (reg & BIT(1))
3336                         sio_data->skip_fan |= BIT(4);
3337
3338                 /* Check for pwm2, fan2 */
3339                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3340                 if (reg & BIT(1))
3341                         sio_data->skip_pwm |= BIT(1);
3342                 if (reg & BIT(2))
3343                         sio_data->skip_fan |= BIT(1);
3344
3345                 /* Check for AVCC */
3346                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3347                 if (!(reg & BIT(0)))
3348                         sio_data->skip_in |= BIT(9);
3349
3350                 sio_data->beep_pin = superio_inb(sioaddr,
3351                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3352         } else if (sio_data->type == it8732) {
3353                 int reg;
3354
3355                 superio_select(sioaddr, GPIO);
3356
3357                 /* Check for pwm2, fan2 */
3358                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3359                 if (reg & BIT(1))
3360                         sio_data->skip_pwm |= BIT(1);
3361                 if (reg & BIT(2))
3362                         sio_data->skip_fan |= BIT(1);
3363
3364                 /* Check for pwm3, fan3, fan4 */
3365                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3366                 if (reg & BIT(6))
3367                         sio_data->skip_pwm |= BIT(2);
3368                 if (reg & BIT(7))
3369                         sio_data->skip_fan |= BIT(2);
3370                 if (reg & BIT(5))
3371                         sio_data->skip_fan |= BIT(3);
3372
3373                 /* Check if AVCC is on VIN3 */
3374                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3375                 if (reg & BIT(0))
3376                         sio_data->internal |= BIT(0);
3377
3378                 sio_data->beep_pin = superio_inb(sioaddr,
3379                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3380         } else if (sio_data->type == it8655) {
3381                 int reg;
3382
3383                 superio_select(sioaddr, GPIO);
3384
3385                 /* Check for pwm2 */
3386                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3387                 if (reg & BIT(1))
3388                         sio_data->skip_pwm |= BIT(1);
3389
3390                 /* Check for fan2 */
3391                 reg = superio_inb(sioaddr, IT87_SIO_PINX4_REG);
3392                 if (reg & BIT(4))
3393                         sio_data->skip_fan |= BIT(1);
3394
3395                 /* Check for pwm3, fan3 */
3396                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3397                 if (reg & BIT(6))
3398                         sio_data->skip_pwm |= BIT(2);
3399                 if (reg & BIT(7))
3400                         sio_data->skip_fan |= BIT(2);
3401
3402                 sio_data->beep_pin = superio_inb(sioaddr,
3403                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3404         } else if (sio_data->type == it8665 || sio_data->type == it8625) {
3405                 int reg27, reg29, reg2d, regd3;
3406
3407                 superio_select(sioaddr, GPIO);
3408
3409                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3410                 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3411                 reg2d = superio_inb(sioaddr, IT87_SIO_PINX4_REG);
3412                 regd3 = superio_inb(sioaddr, IT87_SIO_GPIO9_REG);
3413
3414                 /* Check for pwm2, fan2 */
3415                 if (reg29 & BIT(1))
3416                         sio_data->skip_pwm |= BIT(1);
3417                 /*
3418                  * Note: Table 6-1 in datasheet claims that FAN_TAC2
3419                  * would be enabled with 29h[2]=0.
3420                  */
3421                 if (reg2d & BIT(4))
3422                         sio_data->skip_fan |= BIT(1);
3423
3424                 /* Check for pwm3, fan3 */
3425                 if (reg27 & BIT(6))
3426                         sio_data->skip_pwm |= BIT(2);
3427                 if (reg27 & BIT(7))
3428                         sio_data->skip_fan |= BIT(2);
3429
3430                 /* Check for pwm4, fan4, pwm5, fan5 */
3431                 if (sio_data->type == it8625) {
3432                         int reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
3433
3434                         if (reg25 & BIT(6))
3435                                 sio_data->skip_fan |= BIT(3);
3436                         if (reg25 & BIT(5))
3437                                 sio_data->skip_pwm |= BIT(3);
3438                         if (reg27 & BIT(3))
3439                                 sio_data->skip_pwm |= BIT(4);
3440                         if (reg27 & BIT(1))
3441                                 sio_data->skip_fan |= BIT(4);
3442                 } else {
3443                         int reg26 = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
3444
3445                         if (regd3 & BIT(2))
3446                                 sio_data->skip_pwm |= BIT(3);
3447                         if (regd3 & BIT(3))
3448                                 sio_data->skip_fan |= BIT(3);
3449                         if (reg26 & BIT(5))
3450                                 sio_data->skip_pwm |= BIT(4);
3451                         if (reg26 & BIT(4))
3452                                 sio_data->skip_fan |= BIT(4);
3453                 }
3454
3455                 /* Check for pwm6, fan6 */
3456                 if (regd3 & BIT(0))
3457                         sio_data->skip_pwm |= BIT(5);
3458                 if (regd3 & BIT(1))
3459                         sio_data->skip_fan |= BIT(5);
3460
3461                 sio_data->beep_pin = superio_inb(sioaddr,
3462                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3463         } else {
3464                 int reg;
3465                 bool uart6;
3466
3467                 superio_select(sioaddr, GPIO);
3468
3469                 /* Check for fan4, fan5 */
3470                 if (has_five_fans(config)) {
3471                         reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
3472                         switch (sio_data->type) {
3473                         case it8718:
3474                                 if (reg & BIT(5))
3475                                         sio_data->skip_fan |= BIT(3);
3476                                 if (reg & BIT(4))
3477                                         sio_data->skip_fan |= BIT(4);
3478                                 break;
3479                         case it8720:
3480                         case it8721:
3481                         case it8728:
3482                                 if (!(reg & BIT(5)))
3483                                         sio_data->skip_fan |= BIT(3);
3484                                 if (!(reg & BIT(4)))
3485                                         sio_data->skip_fan |= BIT(4);
3486                                 break;
3487                         default:
3488                                 break;
3489                         }
3490                 }
3491
3492                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3493                 if (!sio_data->skip_vid) {
3494                         /* We need at least 4 VID pins */
3495                         if (reg & 0x0f) {
3496                                 pr_info("VID is disabled (pins used for GPIO)\n");
3497                                 sio_data->skip_vid = 1;
3498                         }
3499                 }
3500
3501                 /* Check if fan3 is there or not */
3502                 if (reg & BIT(6))
3503                         sio_data->skip_pwm |= BIT(2);
3504                 if (reg & BIT(7))
3505                         sio_data->skip_fan |= BIT(2);
3506
3507                 /* Check if fan2 is there or not */
3508                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3509                 if (reg & BIT(1))
3510                         sio_data->skip_pwm |= BIT(1);
3511                 if (reg & BIT(2))
3512                         sio_data->skip_fan |= BIT(1);
3513
3514                 if ((sio_data->type == it8718 || sio_data->type == it8720) &&
3515                     !(sio_data->skip_vid))
3516                         sio_data->vid_value = superio_inb(sioaddr,
3517                                                           IT87_SIO_VID_REG);
3518
3519                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3520
3521                 uart6 = sio_data->type == it8782 && (reg & BIT(2));
3522
3523                 /*
3524                  * The IT8720F has no VIN7 pin, so VCCH should always be
3525                  * routed internally to VIN7 with an internal divider.
3526                  * Curiously, there still is a configuration bit to control
3527                  * this, which means it can be set incorrectly. And even
3528                  * more curiously, many boards out there are improperly
3529                  * configured, even though the IT8720F datasheet claims
3530                  * that the internal routing of VCCH to VIN7 is the default
3531                  * setting. So we force the internal routing in this case.
3532                  *
3533                  * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
3534                  * If UART6 is enabled, re-route VIN7 to the internal divider
3535                  * if that is not already the case.
3536                  */
3537                 if ((sio_data->type == it8720 || uart6) && !(reg & BIT(1))) {
3538                         reg |= BIT(1);
3539                         superio_outb(sioaddr, IT87_SIO_PINX2_REG, reg);
3540                         pr_notice("Routing internal VCCH to in7\n");
3541                 }
3542                 if (reg & BIT(0))
3543                         sio_data->internal |= BIT(0);
3544                 if (reg & BIT(1))
3545                         sio_data->internal |= BIT(1);
3546
3547                 /*
3548                  * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
3549                  * While VIN7 can be routed to the internal voltage divider,
3550                  * VIN5 and VIN6 are not available if UART6 is enabled.
3551                  *
3552                  * Also, temp3 is not available if UART6 is enabled and TEMPIN3
3553                  * is the temperature source. Since we can not read the
3554                  * temperature source here, skip_temp is preliminary.
3555                  */
3556                 if (uart6) {
3557                         sio_data->skip_in |= BIT(5) | BIT(6);
3558                         sio_data->skip_temp |= BIT(2);
3559                 }
3560
3561                 sio_data->beep_pin = superio_inb(sioaddr,
3562                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3563         }
3564         if (sio_data->beep_pin)
3565                 pr_info("Beeping is supported\n");
3566
3567         if (config->smbus_bitmap && !base) {
3568                 u8 reg;
3569
3570                 superio_select(sioaddr, PME);
3571                 reg = superio_inb(sioaddr, IT87_SPECIAL_CFG_REG);
3572                 sio_data->ec_special_config = reg;
3573                 sio_data->smbus_bitmap = reg & config->smbus_bitmap;
3574         }
3575
3576 exit:
3577         superio_exit(sioaddr, doexit);
3578         return err;
3579 }
3580
3581 static void it87_init_regs(struct platform_device *pdev)
3582 {
3583         struct it87_data *data = platform_get_drvdata(pdev);
3584
3585         /* Initialize chip specific register pointers */
3586         switch (data->type) {
3587         case it8628:
3588         case it8686:
3589                 data->REG_FAN = IT87_REG_FAN;
3590                 data->REG_FANX = IT87_REG_FANX;
3591                 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3592                 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3593                 data->REG_PWM = IT87_REG_PWM;
3594                 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET_8686;
3595                 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW_8686;
3596                 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH_8686;
3597                 break;
3598         case it8625:
3599         case it8655:
3600         case it8665:
3601                 data->REG_FAN = IT87_REG_FAN_8665;
3602                 data->REG_FANX = IT87_REG_FANX_8665;
3603                 data->REG_FAN_MIN = IT87_REG_FAN_MIN_8665;
3604                 data->REG_FANX_MIN = IT87_REG_FANX_MIN_8665;
3605                 data->REG_PWM = IT87_REG_PWM_8665;
3606                 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
3607                 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
3608                 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
3609                 break;
3610         case it8622:
3611                 data->REG_FAN = IT87_REG_FAN;
3612                 data->REG_FANX = IT87_REG_FANX;
3613                 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3614                 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3615                 data->REG_PWM = IT87_REG_PWM_8665;
3616                 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
3617                 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
3618                 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
3619                 break;
3620         case it8613:
3621                 data->REG_FAN = IT87_REG_FAN;
3622                 data->REG_FANX = IT87_REG_FANX;
3623                 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3624                 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3625                 data->REG_PWM = IT87_REG_PWM_8665;
3626                 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
3627                 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
3628                 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
3629                 break;
3630         default:
3631                 data->REG_FAN = IT87_REG_FAN;
3632                 data->REG_FANX = IT87_REG_FANX;
3633                 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3634                 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3635                 data->REG_PWM = IT87_REG_PWM;
3636                 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
3637                 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
3638                 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
3639                 break;
3640         }
3641
3642         if (data->mmio) {
3643                 data->read = it87_mmio_read;
3644                 data->write = it87_mmio_write;
3645         } else if (has_bank_sel(data)) {
3646                 data->read = it87_io_read;
3647                 data->write = it87_io_write;
3648         } else {
3649                 data->read = _it87_io_read;
3650                 data->write = _it87_io_write;
3651         }
3652 }
3653
3654 /* Called when we have found a new IT87. */
3655 static void it87_init_device(struct platform_device *pdev)
3656 {
3657         struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
3658         struct it87_data *data = platform_get_drvdata(pdev);
3659         int tmp, i;
3660         u8 mask;
3661
3662         if (has_new_tempmap(data)) {
3663                 data->pwm_temp_map_shift = 3;
3664                 data->pwm_temp_map_mask = 0x07;
3665         } else {
3666                 data->pwm_temp_map_shift = 0;
3667                 data->pwm_temp_map_mask = 0x03;
3668         }
3669
3670         /*
3671          * For each PWM channel:
3672          * - If it is in automatic mode, setting to manual mode should set
3673          *   the fan to full speed by default.
3674          * - If it is in manual mode, we need a mapping to temperature
3675          *   channels to use when later setting to automatic mode later.
3676          *   Map to the first sensor by default (we are clueless.)
3677          * In both cases, the value can (and should) be changed by the user
3678          * prior to switching to a different mode.
3679          * Note that this is no longer needed for the IT8721F and later, as
3680          * these have separate registers for the temperature mapping and the
3681          * manual duty cycle.
3682          */
3683         for (i = 0; i < NUM_AUTO_PWM; i++) {
3684                 data->pwm_temp_map[i] = 0;
3685                 data->pwm_duty[i] = 0x7f;       /* Full speed */
3686                 data->auto_pwm[i][3] = 0x7f;    /* Full speed, hard-coded */
3687         }
3688
3689         /*
3690          * Some chips seem to have default value 0xff for all limit
3691          * registers. For low voltage limits it makes no sense and triggers
3692          * alarms, so change to 0 instead. For high temperature limits, it
3693          * means -1 degree C, which surprisingly doesn't trigger an alarm,
3694          * but is still confusing, so change to 127 degrees C.
3695          */
3696         for (i = 0; i < NUM_VIN_LIMIT; i++) {
3697                 tmp = data->read(data, IT87_REG_VIN_MIN(i));
3698                 if (tmp == 0xff)
3699                         data->write(data, IT87_REG_VIN_MIN(i), 0);
3700         }
3701         for (i = 0; i < data->num_temp_limit; i++) {
3702                 tmp = data->read(data, data->REG_TEMP_HIGH[i]);
3703                 if (tmp == 0xff)
3704                         data->write(data, data->REG_TEMP_HIGH[i], 127);
3705         }
3706
3707         /*
3708          * Temperature channels are not forcibly enabled, as they can be
3709          * set to two different sensor types and we can't guess which one
3710          * is correct for a given system. These channels can be enabled at
3711          * run-time through the temp{1-3}_type sysfs accessors if needed.
3712          */
3713
3714         /* Check if voltage monitors are reset manually or by some reason */
3715         tmp = data->read(data, IT87_REG_VIN_ENABLE);
3716         if ((tmp & 0xff) == 0) {
3717                 /* Enable all voltage monitors */
3718                 data->write(data, IT87_REG_VIN_ENABLE, 0xff);
3719         }
3720
3721         /* Check if tachometers are reset manually or by some reason */
3722         mask = 0x70 & ~(sio_data->skip_fan << 4);
3723         data->fan_main_ctrl = data->read(data, IT87_REG_FAN_MAIN_CTRL);
3724         if ((data->fan_main_ctrl & mask) == 0) {
3725                 /* Enable all fan tachometers */
3726                 data->fan_main_ctrl |= mask;
3727                 data->write(data, IT87_REG_FAN_MAIN_CTRL, data->fan_main_ctrl);
3728         }
3729         data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
3730
3731         tmp = data->read(data, IT87_REG_FAN_16BIT);
3732
3733         /* Set tachometers to 16-bit mode if needed */
3734         if (has_fan16_config(data)) {
3735                 if (~tmp & 0x07 & data->has_fan) {
3736                         dev_dbg(&pdev->dev,
3737                                 "Setting fan1-3 to 16-bit mode\n");
3738                         data->write(data, IT87_REG_FAN_16BIT, tmp | 0x07);
3739                 }
3740         }
3741
3742         /* Check for additional fans */
3743         if (has_four_fans(data) && (tmp & BIT(4)))
3744                 data->has_fan |= BIT(3); /* fan4 enabled */
3745         if (has_five_fans(data) && (tmp & BIT(5)))
3746                 data->has_fan |= BIT(4); /* fan5 enabled */
3747         if (has_six_fans(data)) {
3748                 switch (data->type) {
3749                 case it8620:
3750                 case it8628:
3751                 case it8686:
3752                         if (tmp & BIT(2))
3753                                 data->has_fan |= BIT(5); /* fan6 enabled */
3754                         break;
3755                 case it8625:
3756                 case it8665:
3757                         tmp = data->read(data, IT87_REG_FAN_DIV);
3758                         if (tmp & BIT(3))
3759                                 data->has_fan |= BIT(5); /* fan6 enabled */
3760                         break;
3761                 default:
3762                         break;
3763                 }
3764         }
3765
3766         /* Fan input pins may be used for alternative functions */
3767         data->has_fan &= ~sio_data->skip_fan;
3768
3769         /* Check if pwm6 is enabled */
3770         if (has_six_pwm(data)) {
3771                 switch (data->type) {
3772                 case it8620:
3773                 case it8686:
3774                         tmp = data->read(data, IT87_REG_FAN_DIV);
3775                         if (!(tmp & BIT(3)))
3776                                 sio_data->skip_pwm |= BIT(5);
3777                         break;
3778                 default:
3779                         break;
3780                 }
3781         }
3782
3783         if (has_bank_sel(data)) {
3784                 for (i = 0; i < 3; i++)
3785                         data->temp_src[i] =
3786                                 data->read(data, IT87_REG_TEMP_SRC1[i]);
3787                 data->temp_src[3] = data->read(data, IT87_REG_TEMP_SRC2);
3788         }
3789
3790         /* Start monitoring */
3791         data->write(data, IT87_REG_CONFIG,
3792                     (data->read(data, IT87_REG_CONFIG) & 0x3e) |
3793                                         (update_vbat ? 0x41 : 0x01));
3794 }
3795
3796 /* Return 1 if and only if the PWM interface is safe to use */
3797 static int it87_check_pwm(struct device *dev)
3798 {
3799         struct it87_data *data = dev_get_drvdata(dev);
3800         /*
3801          * Some BIOSes fail to correctly configure the IT87 fans. All fans off
3802          * and polarity set to active low is sign that this is the case so we
3803          * disable pwm control to protect the user.
3804          */
3805         int tmp = data->read(data, IT87_REG_FAN_CTL);
3806
3807         if ((tmp & 0x87) == 0) {
3808                 if (fix_pwm_polarity) {
3809                         /*
3810                          * The user asks us to attempt a chip reconfiguration.
3811                          * This means switching to active high polarity and
3812                          * inverting all fan speed values.
3813                          */
3814                         int i;
3815                         u8 pwm[3];
3816
3817                         for (i = 0; i < ARRAY_SIZE(pwm); i++)
3818                                 pwm[i] = data->read(data,
3819                                                          data->REG_PWM[i]);
3820
3821                         /*
3822                          * If any fan is in automatic pwm mode, the polarity
3823                          * might be correct, as suspicious as it seems, so we
3824                          * better don't change anything (but still disable the
3825                          * PWM interface).
3826                          */
3827                         if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
3828                                 dev_info(dev,
3829                                          "Reconfiguring PWM to active high polarity\n");
3830                                 data->write(data, IT87_REG_FAN_CTL, tmp | 0x87);
3831                                 for (i = 0; i < 3; i++)
3832                                         data->write(data, data->REG_PWM[i],
3833                                                     0x7f & ~pwm[i]);
3834                                 return 1;
3835                         }
3836
3837                         dev_info(dev,
3838                                  "PWM configuration is too broken to be fixed\n");
3839                 }
3840
3841                 dev_info(dev,
3842                          "Detected broken BIOS defaults, disabling PWM interface\n");
3843                 return 0;
3844         } else if (fix_pwm_polarity) {
3845                 dev_info(dev,
3846                          "PWM configuration looks sane, won't touch\n");
3847         }
3848
3849         return 1;
3850 }
3851
3852 static int it87_probe(struct platform_device *pdev)
3853 {
3854         struct it87_data *data;
3855         struct resource *res;
3856         struct device *dev = &pdev->dev;
3857         struct it87_sio_data *sio_data = dev_get_platdata(dev);
3858         int enable_pwm_interface;
3859         struct device *hwmon_dev;
3860         int err;
3861
3862         data = devm_kzalloc(dev, sizeof(struct it87_data), GFP_KERNEL);
3863         if (!data)
3864                 return -ENOMEM;
3865
3866         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3867         if (res) {
3868                 if (!devm_request_region(dev, res->start, IT87_EC_EXTENT,
3869                                          DRVNAME)) {
3870                         dev_err(dev, "Failed to request region %pR\n", res);
3871                         return -EBUSY;
3872                 }
3873         } else {
3874                 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
3875                 data->mmio = devm_ioremap_resource(dev, res);
3876                 if (IS_ERR(data->mmio))
3877                         return PTR_ERR(data->mmio);
3878         }
3879
3880         data->addr = res->start;
3881         data->type = sio_data->type;
3882         data->sioaddr = sio_data->sioaddr;
3883         data->smbus_bitmap = sio_data->smbus_bitmap;
3884         data->ec_special_config = sio_data->ec_special_config;
3885         data->doexit = sio_data->doexit;
3886         data->features = it87_devices[sio_data->type].features;
3887         data->num_temp_limit = it87_devices[sio_data->type].num_temp_limit;
3888         data->num_temp_offset = it87_devices[sio_data->type].num_temp_offset;
3889         data->pwm_num_temp_map = it87_devices[sio_data->type].num_temp_map;
3890         data->peci_mask = it87_devices[sio_data->type].peci_mask;
3891         data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
3892
3893         /*
3894          * IT8705F Datasheet 0.4.1, 3h == Version G.
3895          * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
3896          * These are the first revisions with 16-bit tachometer support.
3897          */
3898         switch (data->type) {
3899         case it87:
3900                 if (sio_data->revision >= 0x03) {
3901                         data->features &= ~FEAT_OLD_AUTOPWM;
3902                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS;
3903                 }
3904                 break;
3905         case it8712:
3906                 if (sio_data->revision >= 0x08) {
3907                         data->features &= ~FEAT_OLD_AUTOPWM;
3908                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS |
3909                                           FEAT_FIVE_FANS;
3910                 }
3911                 break;
3912         default:
3913                 break;
3914         }
3915
3916         platform_set_drvdata(pdev, data);
3917
3918         mutex_init(&data->update_lock);
3919
3920         /* Initialize register pointers */
3921         it87_init_regs(pdev);
3922
3923         err = smbus_disable(data);
3924         if (err)
3925                 return err;
3926
3927         /* Now, we do the remaining detection. */
3928         if ((data->read(data, IT87_REG_CONFIG) & 0x80) ||
3929             data->read(data, IT87_REG_CHIPID) != 0x90) {
3930                 smbus_enable(data);
3931                 return -ENODEV;
3932         }
3933
3934         /* Check PWM configuration */
3935         enable_pwm_interface = it87_check_pwm(dev);
3936
3937         /* Starting with IT8721F, we handle scaling of internal voltages */
3938         if (has_scaling(data)) {
3939                 if (sio_data->internal & BIT(0))
3940                         data->in_scaled |= BIT(3);      /* in3 is AVCC */
3941                 if (sio_data->internal & BIT(1))
3942                         data->in_scaled |= BIT(7);      /* in7 is VSB */
3943                 if (sio_data->internal & BIT(2))
3944                         data->in_scaled |= BIT(8);      /* in8 is Vbat */
3945                 if (sio_data->internal & BIT(3))
3946                         data->in_scaled |= BIT(9);      /* in9 is AVCC */
3947         } else if (sio_data->type == it8781 || sio_data->type == it8782 ||
3948                    sio_data->type == it8783) {
3949                 if (sio_data->internal & BIT(0))
3950                         data->in_scaled |= BIT(3);      /* in3 is VCC5V */
3951                 if (sio_data->internal & BIT(1))
3952                         data->in_scaled |= BIT(7);      /* in7 is VCCH5V */
3953         }
3954
3955         data->has_temp = 0x07;
3956         if (sio_data->skip_temp & BIT(2)) {
3957                 if (sio_data->type == it8782 &&
3958                     !(data->read(data, IT87_REG_TEMP_EXTRA) & 0x80))
3959                         data->has_temp &= ~BIT(2);
3960         }
3961
3962         data->in_internal = sio_data->internal;
3963         data->has_in = 0x3ff & ~sio_data->skip_in;
3964
3965         if (has_four_temp(data)) {
3966                 data->has_temp |= BIT(3);
3967         } else if (has_six_temp(data)) {
3968                 u8 reg = data->read(data, IT87_REG_TEMP456_ENABLE);
3969
3970                 /* Check for additional temperature sensors */
3971                 if ((reg & 0x03) >= 0x02)
3972                         data->has_temp |= BIT(3);
3973                 if (((reg >> 2) & 0x03) >= 0x02)
3974                         data->has_temp |= BIT(4);
3975                 if (((reg >> 4) & 0x03) >= 0x02)
3976                         data->has_temp |= BIT(5);
3977
3978                 /* Check for additional voltage sensors */
3979                 if ((reg & 0x03) == 0x01)
3980                         data->has_in |= BIT(10);
3981                 if (((reg >> 2) & 0x03) == 0x01)
3982                         data->has_in |= BIT(11);
3983                 if (((reg >> 4) & 0x03) == 0x01)
3984                         data->has_in |= BIT(12);
3985         }
3986
3987         data->has_beep = !!sio_data->beep_pin;
3988
3989         /* Initialize the IT87 chip */
3990         it87_init_device(pdev);
3991
3992         smbus_enable(data);
3993
3994         if (!sio_data->skip_vid) {
3995                 data->has_vid = true;
3996                 data->vrm = vid_which_vrm();
3997                 /* VID reading from Super-I/O config space if available */
3998                 data->vid = sio_data->vid_value;
3999         }
4000
4001         /* Prepare for sysfs hooks */
4002         data->groups[0] = &it87_group;
4003         data->groups[1] = &it87_group_in;
4004         data->groups[2] = &it87_group_temp;
4005         data->groups[3] = &it87_group_fan;
4006
4007         if (enable_pwm_interface) {
4008                 data->has_pwm = BIT(ARRAY_SIZE(IT87_REG_PWM)) - 1;
4009                 data->has_pwm &= ~sio_data->skip_pwm;
4010
4011                 data->groups[4] = &it87_group_pwm;
4012                 if (has_old_autopwm(data) || has_newer_autopwm(data))
4013                         data->groups[5] = &it87_group_auto_pwm;
4014         }
4015
4016         hwmon_dev = devm_hwmon_device_register_with_groups(dev,
4017                                         it87_devices[sio_data->type].name,
4018                                         data, data->groups);
4019         return PTR_ERR_OR_ZERO(hwmon_dev);
4020 }
4021
4022 static struct platform_driver it87_driver = {
4023         .driver = {
4024                 .name   = DRVNAME,
4025         },
4026         .probe  = it87_probe,
4027 };
4028
4029 static int __init it87_device_add(int index, unsigned short sio_address,
4030                                   phys_addr_t mmio_address,
4031                                   const struct it87_sio_data *sio_data)
4032 {
4033         struct platform_device *pdev;
4034         struct resource res = {
4035                 .name   = DRVNAME,
4036         };
4037         int err;
4038
4039         if (mmio_address) {
4040                 res.start = mmio_address;
4041                 res.end = mmio_address + 0x400 - 1;
4042                 res.flags = IORESOURCE_MEM;
4043         } else {
4044                 res.start = sio_address + IT87_EC_OFFSET;
4045                 res.end = sio_address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1;
4046                 res.flags = IORESOURCE_IO;
4047         }
4048
4049         err = acpi_check_resource_conflict(&res);
4050         if (err) {
4051                 if (!ignore_resource_conflict)
4052                         return err;
4053         }
4054
4055         pdev = platform_device_alloc(DRVNAME, sio_address);
4056         if (!pdev)
4057                 return -ENOMEM;
4058
4059         err = platform_device_add_resources(pdev, &res, 1);
4060         if (err) {
4061                 pr_err("Device resource addition failed (%d)\n", err);
4062                 goto exit_device_put;
4063         }
4064
4065         err = platform_device_add_data(pdev, sio_data,
4066                                        sizeof(struct it87_sio_data));
4067         if (err) {
4068                 pr_err("Platform data allocation failed\n");
4069                 goto exit_device_put;
4070         }
4071
4072         err = platform_device_add(pdev);
4073         if (err) {
4074                 pr_err("Device addition failed (%d)\n", err);
4075                 goto exit_device_put;
4076         }
4077
4078         it87_pdev[index] = pdev;
4079         return 0;
4080
4081 exit_device_put:
4082         platform_device_put(pdev);
4083         return err;
4084 }
4085
4086 struct it87_dmi_data {
4087         bool sio2_force_config; /* force sio2 into configuration mode   */
4088         u8 skip_pwm;            /* pwm channels to skip for this board  */
4089 };
4090
4091 /*
4092  * On various Gigabyte AM4 boards (AB350, AX370), the second Super-IO chip
4093  * (IT8792E) needs to be in configuration mode before accessing the first
4094  * due to a bug in IT8792E which otherwise results in LPC bus access errors.
4095  * This needs to be done before accessing the first Super-IO chip since
4096  * the second chip may have been accessed prior to loading this driver.
4097  *
4098  * The problem is also reported to affect IT8795E, which is used on X299 boards
4099  * and has the same chip ID as IT8792E (0x8733). It also appears to affect
4100  * systems with IT8790E, which is used on some Z97X-Gaming boards as well as
4101  * Z87X-OC.
4102  * DMI entries for those systems will be added as they become available and
4103  * as the problem is confirmed to affect those boards.
4104  */
4105 static struct it87_dmi_data gigabyte_sio2_force = {
4106         .sio2_force_config = true,
4107 };
4108
4109 /*
4110  * On the Shuttle SN68PT, FAN_CTL2 is apparently not
4111  * connected to a fan, but to something else. One user
4112  * has reported instant system power-off when changing
4113  * the PWM2 duty cycle, so we disable it.
4114  * I use the board name string as the trigger in case
4115  * the same board is ever used in other systems.
4116  */
4117 static struct it87_dmi_data nvidia_fn68pt = {
4118         .skip_pwm = BIT(1),
4119 };
4120
4121 static const struct dmi_system_id it87_dmi_table[] __initconst = {
4122         {
4123                 .matches = {
4124                         DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."),
4125                         DMI_MATCH(DMI_BOARD_NAME, "AB350"),
4126                 },
4127                 .driver_data = &gigabyte_sio2_force,
4128         },
4129         {
4130                 .matches = {
4131                         DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."),
4132                         DMI_MATCH(DMI_BOARD_NAME, "AX370"),
4133                 },
4134                 .driver_data = &gigabyte_sio2_force,
4135         },
4136         {
4137                 .matches = {
4138                         DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."),
4139                         DMI_MATCH(DMI_BOARD_NAME, "Z97X-Gaming G1"),
4140                 },
4141                 .driver_data = &gigabyte_sio2_force,
4142         },
4143         {
4144                 .matches = {
4145                         DMI_MATCH(DMI_BOARD_VENDOR, "nVIDIA"),
4146                         DMI_MATCH(DMI_BOARD_NAME, "FN68PT"),
4147                 },
4148                 .driver_data = &nvidia_fn68pt,
4149         },
4150         { }
4151 };
4152
4153 static int __init sm_it87_init(void)
4154 {
4155         const struct dmi_system_id *dmi = dmi_first_match(it87_dmi_table);
4156         struct it87_dmi_data *dmi_data = NULL;
4157         int sioaddr[2] = { REG_2E, REG_4E };
4158         struct it87_sio_data sio_data;
4159         unsigned short isa_address;
4160         phys_addr_t mmio_address;
4161         bool found = false;
4162         int i, err;
4163
4164         pr_info("it87 driver version %s\n", IT87_DRIVER_VERSION);
4165
4166         if (dmi)
4167                 dmi_data = dmi->driver_data;
4168
4169         err = platform_driver_register(&it87_driver);
4170         if (err)
4171                 return err;
4172
4173         if (dmi_data && dmi_data->sio2_force_config)
4174                 __superio_enter(REG_4E);
4175
4176         for (i = 0; i < ARRAY_SIZE(sioaddr); i++) {
4177                 memset(&sio_data, 0, sizeof(struct it87_sio_data));
4178                 isa_address = 0;
4179                 mmio_address = 0;
4180                 err = it87_find(sioaddr[i], &isa_address, &mmio_address,
4181                                 &sio_data);
4182                 if (err || isa_address == 0)
4183                         continue;
4184
4185                 if (dmi_data)
4186                         sio_data.skip_pwm |= dmi_data->skip_pwm;
4187                 err = it87_device_add(i, isa_address, mmio_address, &sio_data);
4188                 if (err)
4189                         goto exit_dev_unregister;
4190                 found = true;
4191         }
4192
4193         if (!found) {
4194                 err = -ENODEV;
4195                 goto exit_unregister;
4196         }
4197         return 0;
4198
4199 exit_dev_unregister:
4200         /* NULL check handled by platform_device_unregister */
4201         platform_device_unregister(it87_pdev[0]);
4202 exit_unregister:
4203         platform_driver_unregister(&it87_driver);
4204         return err;
4205 }
4206
4207 static void __exit sm_it87_exit(void)
4208 {
4209         /* NULL check handled by platform_device_unregister */
4210         platform_device_unregister(it87_pdev[1]);
4211         platform_device_unregister(it87_pdev[0]);
4212         platform_driver_unregister(&it87_driver);
4213 }
4214
4215 MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>");
4216 MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
4217 module_param(update_vbat, bool, 0000);
4218 MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
4219 module_param(fix_pwm_polarity, bool, 0000);
4220 MODULE_PARM_DESC(fix_pwm_polarity,
4221                  "Force PWM polarity to active high (DANGEROUS)");
4222 MODULE_LICENSE("GPL");
4223
4224 module_init(sm_it87_init);
4225 module_exit(sm_it87_exit);