git.sur5r.net Git - groeck-it87/blob - it87.c

   1 /*
   2  *  it87.c - Part of lm_sensors, Linux kernel modules for hardware
   3  *           monitoring.
   4  *
   5  *  The IT8705F is an LPC-based Super I/O part that contains UARTs, a
   6  *  parallel port, an IR port, a MIDI port, a floppy controller, etc., in
   7  *  addition to an Environment Controller (Enhanced Hardware Monitor and
   8  *  Fan Controller)
   9  *
  10  *  This driver supports only the Environment Controller in the IT8705F and
  11  *  similar parts.  The other devices are supported by different drivers.
  12  *
  13  *  Supports: IT8603E  Super I/O chip w/LPC interface
  14  *            IT8607E  Super I/O chip w/LPC interface
  15  *            IT8613E  Super I/O chip w/LPC interface
  16  *            IT8620E  Super I/O chip w/LPC interface
  17  *            IT8622E  Super I/O chip w/LPC interface
  18  *            IT8623E  Super I/O chip w/LPC interface
  19  *            IT8625E  Super I/O chip w/LPC interface
  20  *            IT8628E  Super I/O chip w/LPC interface
  21  *            IT8655E  Super I/O chip w/LPC interface
  22  *            IT8665E  Super I/O chip w/LPC interface
  23  *            IT8686E  Super I/O chip w/LPC interface
  24  *            IT8705F  Super I/O chip w/LPC interface
  25  *            IT8712F  Super I/O chip w/LPC interface
  26  *            IT8716F  Super I/O chip w/LPC interface
  27  *            IT8718F  Super I/O chip w/LPC interface
  28  *            IT8720F  Super I/O chip w/LPC interface
  29  *            IT8721F  Super I/O chip w/LPC interface
  30  *            IT8726F  Super I/O chip w/LPC interface
  31  *            IT8728F  Super I/O chip w/LPC interface
  32  *            IT8732F  Super I/O chip w/LPC interface
  33  *            IT8758E  Super I/O chip w/LPC interface
  34  *            IT8771E  Super I/O chip w/LPC interface
  35  *            IT8772E  Super I/O chip w/LPC interface
  36  *            IT8781F  Super I/O chip w/LPC interface
  37  *            IT8782F  Super I/O chip w/LPC interface
  38  *            IT8783E/F Super I/O chip w/LPC interface
  39  *            IT8786E  Super I/O chip w/LPC interface
  40  *            IT8790E  Super I/O chip w/LPC interface
  41  *            IT8792E  Super I/O chip w/LPC interface
  42  *            Sis950   A clone of the IT8705F
  43  *
  44  *  Copyright (C) 2001 Chris Gauthron
  45  *  Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de>
  46  *
  47  *  This program is free software; you can redistribute it and/or modify
  48  *  it under the terms of the GNU General Public License as published by
  49  *  the Free Software Foundation; either version 2 of the License, or
  50  *  (at your option) any later version.
  51  *
  52  *  This program is distributed in the hope that it will be useful,
  53  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  54  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  55  *  GNU General Public License for more details.
  56  */
  57
  58 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  59
  60 #include <linux/bitops.h>
  61 #include <linux/module.h>
  62 #include <linux/init.h>
  63 #include <linux/slab.h>
  64 #include <linux/jiffies.h>
  65 #include <linux/platform_device.h>
  66 #include <linux/hwmon.h>
  67 #include <linux/hwmon-sysfs.h>
  68 #include <linux/hwmon-vid.h>
  69 #include <linux/err.h>
  70 #include <linux/mutex.h>
  71 #include <linux/sysfs.h>
  72 #include <linux/string.h>
  73 #include <linux/dmi.h>
  74 #include <linux/acpi.h>
  75 #include <linux/io.h>
  76 #include "compat.h"
  77
  78 #define DRVNAME "it87"
  79
  80 enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732,
  81              it8771, it8772, it8781, it8782, it8783, it8786, it8790,
  82              it8792, it8603, it8607, it8613, it8620, it8622, it8625, it8628,
  83              it8655, it8665, it8686 };
  84
  85 static unsigned short force_id;
  86 module_param(force_id, ushort, 0);
  87 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  88
  89 static struct platform_device *it87_pdev[2];
  90
  91 #define REG_2E  0x2e    /* The register to read/write */
  92 #define REG_4E  0x4e    /* Secondary register to read/write */
  93
  94 #define DEV     0x07    /* Register: Logical device select */
  95 #define PME     0x04    /* The device with the fan registers in it */
  96
  97 /* The device with the IT8718F/IT8720F VID value in it */
  98 #define GPIO    0x07
  99
 100 #define DEVID   0x20    /* Register: Device ID */
 101 #define DEVREV  0x22    /* Register: Device Revision */
 102
 103 static inline void __superio_enter(int ioreg)
 104 {
 105         outb(0x87, ioreg);
 106         outb(0x01, ioreg);
 107         outb(0x55, ioreg);
 108         outb(ioreg == REG_4E ? 0xaa : 0x55, ioreg);
 109 }
 110
 111 static inline int superio_inb(int ioreg, int reg)
 112 {
 113         int val;
 114
 115         outb(reg, ioreg);
 116         val = inb(ioreg + 1);
 117
 118         return val;
 119 }
 120
 121 static inline void superio_outb(int ioreg, int reg, int val)
 122 {
 123         outb(reg, ioreg);
 124         outb(val, ioreg + 1);
 125 }
 126
 127 static int superio_inw(int ioreg, int reg)
 128 {
 129         return (superio_inb(ioreg, reg) << 8) | superio_inb(ioreg, reg + 1);
 130 }
 131
 132 static inline void superio_select(int ioreg, int ldn)
 133 {
 134         outb(DEV, ioreg);
 135         outb(ldn, ioreg + 1);
 136 }
 137
 138 static inline int superio_enter(int ioreg)
 139 {
 140         /*
 141          * Try to reserve ioreg and ioreg + 1 for exclusive access.
 142          */
 143         if (!request_muxed_region(ioreg, 2, DRVNAME))
 144                 goto error;
 145
 146         __superio_enter(ioreg);
 147         return 0;
 148
 149 error:
 150         return -EBUSY;
 151 }
 152
 153 static inline void superio_exit(int ioreg, bool doexit)
 154 {
 155         if (doexit) {
 156                 outb(0x02, ioreg);
 157                 outb(0x02, ioreg + 1);
 158         }
 159         release_region(ioreg, 2);
 160 }
 161
 162 /* Logical device 4 registers */
 163 #define IT8712F_DEVID 0x8712
 164 #define IT8705F_DEVID 0x8705
 165 #define IT8716F_DEVID 0x8716
 166 #define IT8718F_DEVID 0x8718
 167 #define IT8720F_DEVID 0x8720
 168 #define IT8721F_DEVID 0x8721
 169 #define IT8726F_DEVID 0x8726
 170 #define IT8728F_DEVID 0x8728
 171 #define IT8732F_DEVID 0x8732
 172 #define IT8792E_DEVID 0x8733
 173 #define IT8771E_DEVID 0x8771
 174 #define IT8772E_DEVID 0x8772
 175 #define IT8781F_DEVID 0x8781
 176 #define IT8782F_DEVID 0x8782
 177 #define IT8783E_DEVID 0x8783
 178 #define IT8786E_DEVID 0x8786
 179 #define IT8790E_DEVID 0x8790
 180 #define IT8603E_DEVID 0x8603
 181 #define IT8607E_DEVID 0x8607
 182 #define IT8613E_DEVID 0x8613
 183 #define IT8620E_DEVID 0x8620
 184 #define IT8622E_DEVID 0x8622
 185 #define IT8623E_DEVID 0x8623
 186 #define IT8625E_DEVID 0x8625
 187 #define IT8628E_DEVID 0x8628
 188 #define IT8655E_DEVID 0x8655
 189 #define IT8665E_DEVID 0x8665
 190 #define IT8686E_DEVID 0x8686
 191 #define IT87_ACT_REG  0x30
 192 #define IT87_BASE_REG 0x60
 193
 194 /* Logical device 7 registers (IT8712F and later) */
 195 #define IT87_SIO_GPIO1_REG      0x25
 196 #define IT87_SIO_GPIO2_REG      0x26
 197 #define IT87_SIO_GPIO3_REG      0x27
 198 #define IT87_SIO_GPIO4_REG      0x28
 199 #define IT87_SIO_GPIO5_REG      0x29
 200 #define IT87_SIO_GPIO9_REG      0xd3
 201 #define IT87_SIO_PINX1_REG      0x2a    /* Pin selection */
 202 #define IT87_SIO_PINX2_REG      0x2c    /* Pin selection */
 203 #define IT87_SIO_PINX4_REG      0x2d    /* Pin selection */
 204 #define IT87_SIO_SPI_REG        0xef    /* SPI function pin select */
 205 #define IT87_SIO_VID_REG        0xfc    /* VID value */
 206 #define IT87_SIO_BEEP_PIN_REG   0xf6    /* Beep pin mapping */
 207
 208 /* Update battery voltage after every reading if true */
 209 static bool update_vbat;
 210
 211 /* Not all BIOSes properly configure the PWM registers */
 212 static bool fix_pwm_polarity;
 213
 214 /* Many IT87 constants specified below */
 215
 216 /* Length of ISA address segment */
 217 #define IT87_EXTENT 8
 218
 219 /* Length of ISA address segment for Environmental Controller */
 220 #define IT87_EC_EXTENT 2
 221
 222 /* Offset of EC registers from ISA base address */
 223 #define IT87_EC_OFFSET 5
 224
 225 /* Where are the ISA address/data registers relative to the EC base address */
 226 #define IT87_ADDR_REG_OFFSET 0
 227 #define IT87_DATA_REG_OFFSET 1
 228
 229 /*----- The IT87 registers -----*/
 230
 231 #define IT87_REG_CONFIG        0x00
 232
 233 #define IT87_REG_ALARM1        0x01
 234 #define IT87_REG_ALARM2        0x02
 235 #define IT87_REG_ALARM3        0x03
 236
 237 #define IT87_REG_BANK           0x06
 238
 239 /*
 240  * The IT8718F and IT8720F have the VID value in a different register, in
 241  * Super-I/O configuration space.
 242  */
 243 #define IT87_REG_VID           0x0a
 244 /*
 245  * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
 246  * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
 247  * mode.
 248  */
 249 #define IT87_REG_FAN_DIV       0x0b
 250 #define IT87_REG_FAN_16BIT     0x0c
 251
 252 /*
 253  * Monitors:
 254  * - up to 13 voltage (0 to 7, battery, avcc, 10 to 12)
 255  * - up to 6 temp (1 to 6)
 256  * - up to 6 fan (1 to 6)
 257  */
 258
 259 static const u8 IT87_REG_FAN[] =        { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c };
 260 static const u8 IT87_REG_FAN_MIN[] =    { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e };
 261 static const u8 IT87_REG_FANX[] =       { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d };
 262 static const u8 IT87_REG_FANX_MIN[] =   { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f };
 263
 264 static const u8 IT87_REG_FAN_8665[] =   { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x93 };
 265 static const u8 IT87_REG_FAN_MIN_8665[] =
 266                                         { 0x10, 0x11, 0x12, 0x84, 0x86, 0xb2 };
 267 static const u8 IT87_REG_FANX_8665[] =  { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x94 };
 268 static const u8 IT87_REG_FANX_MIN_8665[] =
 269                                         { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0xb3 };
 270
 271 static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59, 0x5a, 0x90, 0x91 };
 272
 273 static const u8 IT87_REG_TEMP_OFFSET_8686[] = { 0x56, 0x57, 0x59, 0x90, 0x91, 0x92 };
 274
 275 #define IT87_REG_FAN_MAIN_CTRL 0x13
 276 #define IT87_REG_FAN_CTL       0x14
 277
 278 static const u8 IT87_REG_PWM[] =        { 0x15, 0x16, 0x17, 0x7f, 0xa7, 0xaf };
 279 static const u8 IT87_REG_PWM_8665[] =   { 0x15, 0x16, 0x17, 0x1e, 0x1f, 0x92 };
 280
 281 static const u8 IT87_REG_PWM_DUTY[] =   { 0x63, 0x6b, 0x73, 0x7b, 0xa3, 0xab };
 282
 283 static const u8 IT87_REG_VIN[]  = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26,
 284                                     0x27, 0x28, 0x2f, 0x2c, 0x2d, 0x2e };
 285
 286 #define IT87_REG_TEMP(nr)      (0x29 + (nr))
 287
 288 #define IT87_REG_VIN_MAX(nr)   (0x30 + (nr) * 2)
 289 #define IT87_REG_VIN_MIN(nr)   (0x31 + (nr) * 2)
 290
 291 static const u8 IT87_REG_TEMP_HIGH[] =  { 0x40, 0x42, 0x44, 0x46, 0xb4, 0xb6 };
 292 static const u8 IT87_REG_TEMP_LOW[] =   { 0x41, 0x43, 0x45, 0x47, 0xb5, 0xb7 };
 293
 294 static const u8 IT87_REG_TEMP_HIGH_8686[] =
 295                                         { 0x40, 0x42, 0x44, 0xb4, 0xb6, 0xb8 };
 296 static const u8 IT87_REG_TEMP_LOW_8686[] =
 297                                         { 0x41, 0x43, 0x45, 0xb5, 0xb7, 0xb9 };
 298
 299 #define IT87_REG_VIN_ENABLE    0x50
 300 #define IT87_REG_TEMP_ENABLE   0x51
 301 #define IT87_REG_TEMP_EXTRA    0x55
 302 #define IT87_REG_BEEP_ENABLE   0x5c
 303
 304 #define IT87_REG_CHIPID        0x58
 305
 306 static const u8 IT87_REG_AUTO_BASE[] = { 0x60, 0x68, 0x70, 0x78, 0xa0, 0xa8 };
 307
 308 #define IT87_REG_AUTO_TEMP(nr, i) (IT87_REG_AUTO_BASE[nr] + (i))
 309 #define IT87_REG_AUTO_PWM(nr, i)  (IT87_REG_AUTO_BASE[nr] + 5 + (i))
 310
 311 #define IT87_REG_TEMP456_ENABLE 0x77
 312
 313 static const u16 IT87_REG_TEMP_SRC1[] = { 0x21d, 0x21e, 0x21f };
 314 #define IT87_REG_TEMP_SRC2      0x23d
 315
 316 #define NUM_VIN                 ARRAY_SIZE(IT87_REG_VIN)
 317 #define NUM_VIN_LIMIT           8
 318 #define NUM_TEMP                6
 319 #define NUM_FAN                 ARRAY_SIZE(IT87_REG_FAN)
 320 #define NUM_FAN_DIV             3
 321 #define NUM_PWM                 ARRAY_SIZE(IT87_REG_PWM)
 322 #define NUM_AUTO_PWM            ARRAY_SIZE(IT87_REG_PWM)
 323
 324 struct it87_devices {
 325         const char *name;
 326         const char * const suffix;
 327         u32 features;
 328         u8 num_temp_limit;
 329         u8 num_temp_offset;
 330         u8 num_temp_map;        /* Number of temperature sources for pwm */
 331         u8 peci_mask;
 332         u8 old_peci_mask;
 333 };
 334
 335 #define FEAT_12MV_ADC           BIT(0)
 336 #define FEAT_NEWER_AUTOPWM      BIT(1)
 337 #define FEAT_OLD_AUTOPWM        BIT(2)
 338 #define FEAT_16BIT_FANS         BIT(3)
 339 #define FEAT_TEMP_PECI          BIT(5)
 340 #define FEAT_TEMP_OLD_PECI      BIT(6)
 341 #define FEAT_FAN16_CONFIG       BIT(7)  /* Need to enable 16-bit fans */
 342 #define FEAT_FIVE_FANS          BIT(8)  /* Supports five fans */
 343 #define FEAT_VID                BIT(9)  /* Set if chip supports VID */
 344 #define FEAT_IN7_INTERNAL       BIT(10) /* Set if in7 is internal */
 345 #define FEAT_SIX_FANS           BIT(11) /* Supports six fans */
 346 #define FEAT_10_9MV_ADC         BIT(12)
 347 #define FEAT_AVCC3              BIT(13) /* Chip supports in9/AVCC3 */
 348 #define FEAT_FIVE_PWM           BIT(14) /* Chip supports 5 pwm chn */
 349 #define FEAT_SIX_PWM            BIT(15) /* Chip supports 6 pwm chn */
 350 #define FEAT_PWM_FREQ2          BIT(16) /* Separate pwm freq 2 */
 351 #define FEAT_SIX_TEMP           BIT(17) /* Up to 6 temp sensors */
 352 #define FEAT_VIN3_5V            BIT(18) /* VIN3 connected to +5V */
 353 #define FEAT_FOUR_FANS          BIT(19) /* Supports four fans */
 354 #define FEAT_FOUR_PWM           BIT(20) /* Supports four fan controls */
 355 #define FEAT_BANK_SEL           BIT(21) /* Chip has multi-bank support */
 356 #define FEAT_SCALING            BIT(22) /* Internal voltage scaling */
 357 #define FEAT_FANCTL_ONOFF       BIT(23) /* chip has FAN_CTL ON/OFF */
 358 #define FEAT_11MV_ADC           BIT(24)
 359 #define FEAT_NEW_TEMPMAP        BIT(25) /* new temp input selection */
 360
 361 static const struct it87_devices it87_devices[] = {
 362         [it87] = {
 363                 .name = "it87",
 364                 .suffix = "F",
 365                 .features = FEAT_OLD_AUTOPWM | FEAT_FANCTL_ONOFF,
 366                                                 /* may need to overwrite */
 367                 .num_temp_limit = 3,
 368                 .num_temp_offset = 0,
 369                 .num_temp_map = 3,
 370         },
 371         [it8712] = {
 372                 .name = "it8712",
 373                 .suffix = "F",
 374                 .features = FEAT_OLD_AUTOPWM | FEAT_VID | FEAT_FANCTL_ONOFF,
 375                                                 /* may need to overwrite */
 376                 .num_temp_limit = 3,
 377                 .num_temp_offset = 0,
 378                 .num_temp_map = 3,
 379         },
 380         [it8716] = {
 381                 .name = "it8716",
 382                 .suffix = "F",
 383                 .features = FEAT_16BIT_FANS | FEAT_VID
 384                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2
 385                   | FEAT_FANCTL_ONOFF,
 386                 .num_temp_limit = 3,
 387                 .num_temp_offset = 3,
 388                 .num_temp_map = 3,
 389         },
 390         [it8718] = {
 391                 .name = "it8718",
 392                 .suffix = "F",
 393                 .features = FEAT_16BIT_FANS | FEAT_VID
 394                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 395                   | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 396                 .num_temp_limit = 3,
 397                 .num_temp_offset = 3,
 398                 .num_temp_map = 3,
 399                 .old_peci_mask = 0x4,
 400         },
 401         [it8720] = {
 402                 .name = "it8720",
 403                 .suffix = "F",
 404                 .features = FEAT_16BIT_FANS | FEAT_VID
 405                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 406                   | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 407                 .num_temp_limit = 3,
 408                 .num_temp_offset = 3,
 409                 .num_temp_map = 3,
 410                 .old_peci_mask = 0x4,
 411         },
 412         [it8721] = {
 413                 .name = "it8721",
 414                 .suffix = "F",
 415                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 416                   | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 417                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL
 418                   | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF,
 419                 .num_temp_limit = 3,
 420                 .num_temp_offset = 3,
 421                 .num_temp_map = 3,
 422                 .peci_mask = 0x05,
 423                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 424         },
 425         [it8728] = {
 426                 .name = "it8728",
 427                 .suffix = "F",
 428                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 429                   | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 430                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_SCALING
 431                   | FEAT_FANCTL_ONOFF,
 432                 .num_temp_limit = 6,
 433                 .num_temp_offset = 3,
 434                 .num_temp_map = 3,
 435                 .peci_mask = 0x07,
 436         },
 437         [it8732] = {
 438                 .name = "it8732",
 439                 .suffix = "F",
 440                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 441                   | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 442                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_FOUR_FANS
 443                   | FEAT_FOUR_PWM | FEAT_FANCTL_ONOFF,
 444                 .num_temp_limit = 3,
 445                 .num_temp_offset = 3,
 446                 .num_temp_map = 3,
 447                 .peci_mask = 0x07,
 448                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 449         },
 450         [it8771] = {
 451                 .name = "it8771",
 452                 .suffix = "E",
 453                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 454                   | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 455                   | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF,
 456                                 /* PECI: guesswork */
 457                                 /* 12mV ADC (OHM) */
 458                                 /* 16 bit fans (OHM) */
 459                                 /* three fans, always 16 bit (guesswork) */
 460                 .num_temp_limit = 3,
 461                 .num_temp_offset = 3,
 462                 .num_temp_map = 3,
 463                 .peci_mask = 0x07,
 464         },
 465         [it8772] = {
 466                 .name = "it8772",
 467                 .suffix = "E",
 468                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 469                   | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 470                   | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF,
 471                                 /* PECI (coreboot) */
 472                                 /* 12mV ADC (HWSensors4, OHM) */
 473                                 /* 16 bit fans (HWSensors4, OHM) */
 474                                 /* three fans, always 16 bit (datasheet) */
 475                 .num_temp_limit = 3,
 476                 .num_temp_offset = 3,
 477                 .num_temp_map = 3,
 478                 .peci_mask = 0x07,
 479         },
 480         [it8781] = {
 481                 .name = "it8781",
 482                 .suffix = "F",
 483                 .features = FEAT_16BIT_FANS
 484                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
 485                   | FEAT_FANCTL_ONOFF,
 486                 .num_temp_limit = 3,
 487                 .num_temp_offset = 3,
 488                 .num_temp_map = 3,
 489                 .old_peci_mask = 0x4,
 490         },
 491         [it8782] = {
 492                 .name = "it8782",
 493                 .suffix = "F",
 494                 .features = FEAT_16BIT_FANS
 495                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
 496                   | FEAT_FANCTL_ONOFF,
 497                 .num_temp_limit = 3,
 498                 .num_temp_offset = 3,
 499                 .num_temp_map = 3,
 500                 .old_peci_mask = 0x4,
 501         },
 502         [it8783] = {
 503                 .name = "it8783",
 504                 .suffix = "E/F",
 505                 .features = FEAT_16BIT_FANS
 506                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
 507                   | FEAT_FANCTL_ONOFF,
 508                 .num_temp_limit = 3,
 509                 .num_temp_offset = 3,
 510                 .num_temp_map = 3,
 511                 .old_peci_mask = 0x4,
 512         },
 513         [it8786] = {
 514                 .name = "it8786",
 515                 .suffix = "E",
 516                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 517                   | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 518                   | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 519                 .num_temp_limit = 3,
 520                 .num_temp_offset = 3,
 521                 .num_temp_map = 3,
 522                 .peci_mask = 0x07,
 523         },
 524         [it8790] = {
 525                 .name = "it8790",
 526                 .suffix = "E",
 527                 .features = FEAT_NEWER_AUTOPWM | FEAT_10_9MV_ADC | FEAT_SCALING
 528                   | FEAT_16BIT_FANS | FEAT_TEMP_PECI
 529                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 530                 .num_temp_limit = 3,
 531                 .num_temp_offset = 3,
 532                 .num_temp_map = 3,
 533                 .peci_mask = 0x07,
 534         },
 535         [it8792] = {
 536                 .name = "it8792",
 537                 .suffix = "E",
 538                 .features = FEAT_NEWER_AUTOPWM | FEAT_10_9MV_ADC | FEAT_SCALING
 539                   | FEAT_16BIT_FANS | FEAT_TEMP_PECI
 540                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 541                 .num_temp_limit = 3,
 542                 .num_temp_offset = 3,
 543                 .num_temp_map = 3,
 544                 .peci_mask = 0x07,
 545         },
 546         [it8603] = {
 547                 .name = "it8603",
 548                 .suffix = "E",
 549                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 550                   | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 551                   | FEAT_AVCC3 | FEAT_PWM_FREQ2 | FEAT_SCALING,
 552                 .num_temp_limit = 3,
 553                 .num_temp_offset = 3,
 554                 .num_temp_map = 4,
 555                 .peci_mask = 0x07,
 556         },
 557         [it8607] = {
 558                 .name = "it8607",
 559                 .suffix = "E",
 560                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 561                   | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL | FEAT_NEW_TEMPMAP
 562                   | FEAT_AVCC3 | FEAT_PWM_FREQ2 | FEAT_SCALING
 563                   | FEAT_FANCTL_ONOFF,
 564                 .num_temp_limit = 3,
 565                 .num_temp_offset = 3,
 566                 .num_temp_map = 6,
 567                 .peci_mask = 0x07,
 568         },
 569         [it8613] = {
 570                 .name = "it8613",
 571                 .suffix = "E",
 572                 .features = FEAT_NEWER_AUTOPWM | FEAT_11MV_ADC | FEAT_16BIT_FANS
 573                   | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 574                   | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
 575                   | FEAT_AVCC3 | FEAT_SCALING | FEAT_NEW_TEMPMAP,
 576                 .num_temp_limit = 6,
 577                 .num_temp_offset = 6,
 578                 .num_temp_map = 6,
 579                 .peci_mask = 0x07,
 580         },
 581         [it8620] = {
 582                 .name = "it8620",
 583                 .suffix = "E",
 584                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 585                   | FEAT_TEMP_PECI | FEAT_SIX_FANS
 586                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 587                   | FEAT_SIX_TEMP | FEAT_VIN3_5V | FEAT_SCALING
 588                   | FEAT_FANCTL_ONOFF,
 589                 .num_temp_limit = 3,
 590                 .num_temp_offset = 3,
 591                 .num_temp_map = 3,
 592                 .peci_mask = 0x07,
 593         },
 594         [it8622] = {
 595                 .name = "it8622",
 596                 .suffix = "E",
 597                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 598                   | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 599                   | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
 600                   | FEAT_AVCC3 | FEAT_VIN3_5V | FEAT_SCALING,
 601                 .num_temp_limit = 3,
 602                 .num_temp_offset = 3,
 603                 .num_temp_map = 4,
 604                 .peci_mask = 0x07,
 605         },
 606         [it8625] = {
 607                 .name = "it8625",
 608                 .suffix = "E",
 609                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 610                   | FEAT_AVCC3 | FEAT_NEW_TEMPMAP
 611                   | FEAT_11MV_ADC | FEAT_IN7_INTERNAL | FEAT_SIX_FANS
 612                   | FEAT_SIX_PWM | FEAT_BANK_SEL | FEAT_SCALING,
 613                 .num_temp_limit = 6,
 614                 .num_temp_offset = 6,
 615                 .num_temp_map = 6,
 616         },
 617         [it8628] = {
 618                 .name = "it8628",
 619                 .suffix = "E",
 620                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 621                   | FEAT_TEMP_PECI | FEAT_SIX_FANS
 622                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 623                   | FEAT_SIX_TEMP | FEAT_SCALING | FEAT_AVCC3
 624                   | FEAT_FANCTL_ONOFF,
 625                 .num_temp_limit = 6,
 626                 .num_temp_offset = 3,
 627                 .num_temp_map = 3,
 628                 .peci_mask = 0x07,
 629         },
 630         [it8655] = {
 631                 .name = "it8655",
 632                 .suffix = "E",
 633                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 634                   | FEAT_AVCC3 | FEAT_NEW_TEMPMAP | FEAT_SCALING
 635                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_BANK_SEL,
 636                 .num_temp_limit = 6,
 637                 .num_temp_offset = 6,
 638                 .num_temp_map = 6,
 639         },
 640         [it8665] = {
 641                 .name = "it8665",
 642                 .suffix = "E",
 643                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 644                   | FEAT_AVCC3 | FEAT_NEW_TEMPMAP | FEAT_SCALING
 645                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_SIX_FANS
 646                   | FEAT_SIX_PWM | FEAT_BANK_SEL,
 647                 .num_temp_limit = 6,
 648                 .num_temp_offset = 6,
 649                 .num_temp_map = 6,
 650         },
 651         [it8686] = {
 652                 .name = "it8686",
 653                 .suffix = "E",
 654                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 655                   | FEAT_SIX_FANS | FEAT_NEW_TEMPMAP
 656                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 657                   | FEAT_SIX_TEMP | FEAT_BANK_SEL | FEAT_SCALING | FEAT_AVCC3,
 658                 .num_temp_limit = 6,
 659                 .num_temp_offset = 6,
 660                 .num_temp_map = 7,
 661         },
 662 };
 663
 664 #define has_16bit_fans(data)    ((data)->features & FEAT_16BIT_FANS)
 665 #define has_12mv_adc(data)      ((data)->features & FEAT_12MV_ADC)
 666 #define has_10_9mv_adc(data)    ((data)->features & FEAT_10_9MV_ADC)
 667 #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
 668 #define has_old_autopwm(data)   ((data)->features & FEAT_OLD_AUTOPWM)
 669 #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \
 670                                  ((data)->peci_mask & BIT(nr)))
 671 #define has_temp_old_peci(data, nr) \
 672                                 (((data)->features & FEAT_TEMP_OLD_PECI) && \
 673                                  ((data)->old_peci_mask & BIT(nr)))
 674 #define has_fan16_config(data)  ((data)->features & FEAT_FAN16_CONFIG)
 675 #define has_five_fans(data)     ((data)->features & (FEAT_FIVE_FANS | \
 676                                                      FEAT_SIX_FANS))
 677 #define has_vid(data)           ((data)->features & FEAT_VID)
 678 #define has_in7_internal(data)  ((data)->features & FEAT_IN7_INTERNAL)
 679 #define has_six_fans(data)      ((data)->features & FEAT_SIX_FANS)
 680 #define has_avcc3(data)         ((data)->features & FEAT_AVCC3)
 681 #define has_five_pwm(data)      ((data)->features & (FEAT_FIVE_PWM \
 682                                                      | FEAT_SIX_PWM))
 683 #define has_six_pwm(data)       ((data)->features & FEAT_SIX_PWM)
 684 #define has_pwm_freq2(data)     ((data)->features & FEAT_PWM_FREQ2)
 685 #define has_six_temp(data)      ((data)->features & FEAT_SIX_TEMP)
 686 #define has_vin3_5v(data)       ((data)->features & FEAT_VIN3_5V)
 687 #define has_four_fans(data)     ((data)->features & (FEAT_FOUR_FANS | \
 688                                                      FEAT_FIVE_FANS | \
 689                                                      FEAT_SIX_FANS))
 690 #define has_four_pwm(data)      ((data)->features & (FEAT_FOUR_PWM | \
 691                                                      FEAT_FIVE_PWM \
 692                                                      | FEAT_SIX_PWM))
 693 #define has_bank_sel(data)      ((data)->features & FEAT_BANK_SEL)
 694 #define has_scaling(data)       ((data)->features & FEAT_SCALING)
 695 #define has_fanctl_onoff(data)  ((data)->features & FEAT_FANCTL_ONOFF)
 696 #define has_11mv_adc(data)      ((data)->features & FEAT_11MV_ADC)
 697 #define has_new_tempmap(data)   ((data)->features & FEAT_NEW_TEMPMAP)
 698
 699 struct it87_sio_data {
 700         enum chips type;
 701         /* Values read from Super-I/O config space */
 702         u8 revision;
 703         u8 vid_value;
 704         u8 beep_pin;
 705         u8 internal;    /* Internal sensors can be labeled */
 706         /* Features skipped based on config or DMI */
 707         u16 skip_in;
 708         u8 skip_vid;
 709         u8 skip_fan;
 710         u8 skip_pwm;
 711         u8 skip_temp;
 712 };
 713
 714 /*
 715  * For each registered chip, we need to keep some data in memory.
 716  * The structure is dynamically allocated.
 717  */
 718 struct it87_data {
 719         const struct attribute_group *groups[7];
 720         enum chips type;
 721         u32 features;
 722         u8 bank;
 723         u8 peci_mask;
 724         u8 old_peci_mask;
 725
 726         const u8 *REG_FAN;
 727         const u8 *REG_FANX;
 728         const u8 *REG_FAN_MIN;
 729         const u8 *REG_FANX_MIN;
 730
 731         const u8 *REG_PWM;
 732
 733         const u8 *REG_TEMP_OFFSET;
 734         const u8 *REG_TEMP_LOW;
 735         const u8 *REG_TEMP_HIGH;
 736
 737         unsigned short addr;
 738         const char *name;
 739         struct mutex update_lock;
 740         char valid;             /* !=0 if following fields are valid */
 741         unsigned long last_updated;     /* In jiffies */
 742
 743         u16 in_scaled;          /* Internal voltage sensors are scaled */
 744         u16 in_internal;        /* Bitfield, internal sensors (for labels) */
 745         u16 has_in;             /* Bitfield, voltage sensors enabled */
 746         u8 in[NUM_VIN][3];              /* [nr][0]=in, [1]=min, [2]=max */
 747         u8 has_fan;             /* Bitfield, fans enabled */
 748         u16 fan[NUM_FAN][2];    /* Register values, [nr][0]=fan, [1]=min */
 749         u8 has_temp;            /* Bitfield, temp sensors enabled */
 750         s8 temp[NUM_TEMP][4];   /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
 751         u8 num_temp_limit;      /* Number of temperature limit registers */
 752         u8 num_temp_offset;     /* Number of temperature offset registers */
 753         u8 sensor;              /* Register value (IT87_REG_TEMP_ENABLE) */
 754         u8 extra;               /* Register value (IT87_REG_TEMP_EXTRA) */
 755         u8 fan_div[NUM_FAN_DIV];/* Register encoding, shifted right */
 756         bool has_vid;           /* True if VID supported */
 757         u8 vid;                 /* Register encoding, combined */
 758         u8 vrm;
 759         u32 alarms;             /* Register encoding, combined */
 760         bool has_beep;          /* true if beep supported */
 761         u8 beeps;               /* Register encoding */
 762         u8 fan_main_ctrl;       /* Register value */
 763         u8 fan_ctl;             /* Register value */
 764
 765         /*
 766          * The following 3 arrays correspond to the same registers up to
 767          * the IT8720F. The meaning of bits 6-0 depends on the value of bit
 768          * 7, and we want to preserve settings on mode changes, so we have
 769          * to track all values separately.
 770          * Starting with the IT8721F, the manual PWM duty cycles are stored
 771          * in separate registers (8-bit values), so the separate tracking
 772          * is no longer needed, but it is still done to keep the driver
 773          * simple.
 774          */
 775         u8 has_pwm;             /* Bitfield, pwm control enabled */
 776         u8 pwm_ctrl[NUM_PWM];   /* Register value */
 777         u8 pwm_duty[NUM_PWM];   /* Manual PWM value set by user */
 778         u8 pwm_temp_map[NUM_PWM];/* PWM to temp. chan. mapping (bits 1-0) */
 779         u8 pwm_temp_map_mask;   /* 0x03 for old, 0x07 for new temp map */
 780         u8 pwm_temp_map_shift;  /* 0 for old, 3 for new temp map */
 781         u8 pwm_num_temp_map;    /* from config data, 3..7 depending on chip */
 782
 783         /* Automatic fan speed control registers */
 784         u8 auto_pwm[NUM_AUTO_PWM][4];   /* [nr][3] is hard-coded */
 785         s8 auto_temp[NUM_AUTO_PWM][5];  /* [nr][0] is point1_temp_hyst */
 786 };
 787
 788 static int adc_lsb(const struct it87_data *data, int nr)
 789 {
 790         int lsb;
 791
 792         if (has_12mv_adc(data))
 793                 lsb = 120;
 794         else if (has_10_9mv_adc(data))
 795                 lsb = 109;
 796         else if (has_11mv_adc(data))
 797                 lsb = 110;
 798         else
 799                 lsb = 160;
 800         if (data->in_scaled & BIT(nr))
 801                 lsb <<= 1;
 802         return lsb;
 803 }
 804
 805 static u8 in_to_reg(const struct it87_data *data, int nr, long val)
 806 {
 807         val = DIV_ROUND_CLOSEST(val * 10, adc_lsb(data, nr));
 808         return clamp_val(val, 0, 255);
 809 }
 810
 811 static int in_from_reg(const struct it87_data *data, int nr, int val)
 812 {
 813         return DIV_ROUND_CLOSEST(val * adc_lsb(data, nr), 10);
 814 }
 815
 816 static inline u8 FAN_TO_REG(long rpm, int div)
 817 {
 818         if (rpm == 0)
 819                 return 255;
 820         rpm = clamp_val(rpm, 1, 1000000);
 821         return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
 822 }
 823
 824 static inline u16 FAN16_TO_REG(long rpm)
 825 {
 826         if (rpm == 0)
 827                 return 0xffff;
 828         return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
 829 }
 830
 831 #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
 832                                 1350000 / ((val) * (div)))
 833 /* The divider is fixed to 2 in 16-bit mode */
 834 #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
 835                              1350000 / ((val) * 2))
 836
 837 #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \
 838                                     ((val) + 500) / 1000), -128, 127))
 839 #define TEMP_FROM_REG(val) ((val) * 1000)
 840
 841 static u8 pwm_to_reg(const struct it87_data *data, long val)
 842 {
 843         if (has_newer_autopwm(data))
 844                 return val;
 845         else
 846                 return val >> 1;
 847 }
 848
 849 static int pwm_from_reg(const struct it87_data *data, u8 reg)
 850 {
 851         if (has_newer_autopwm(data))
 852                 return reg;
 853         else
 854                 return (reg & 0x7f) << 1;
 855 }
 856
 857 static int DIV_TO_REG(int val)
 858 {
 859         int answer = 0;
 860
 861         while (answer < 7 && (val >>= 1))
 862                 answer++;
 863         return answer;
 864 }
 865
 866 #define DIV_FROM_REG(val) BIT(val)
 867
 868 static u8 temp_map_from_reg(const struct it87_data *data, u8 reg)
 869 {
 870         u8 map;
 871
 872         map  = (reg >> data->pwm_temp_map_shift) & data->pwm_temp_map_mask;
 873         if (map >= data->pwm_num_temp_map)      /* map is 0-based */
 874                 map = 0;
 875
 876         return map;
 877 }
 878
 879 static u8 temp_map_to_reg(const struct it87_data *data, int nr, u8 map)
 880 {
 881         u8 ctrl = data->pwm_ctrl[nr];
 882
 883         return (ctrl & ~(data->pwm_temp_map_mask << data->pwm_temp_map_shift)) |
 884                (map << data->pwm_temp_map_shift);
 885 }
 886
 887 /*
 888  * PWM base frequencies. The frequency has to be divided by either 128 or 256,
 889  * depending on the chip type, to calculate the actual PWM frequency.
 890  *
 891  * Some of the chip datasheets suggest a base frequency of 51 kHz instead
 892  * of 750 kHz for the slowest base frequency, resulting in a PWM frequency
 893  * of 200 Hz. Sometimes both PWM frequency select registers are affected,
 894  * sometimes just one. It is unknown if this is a datasheet error or real,
 895  * so this is ignored for now.
 896  */
 897 static const unsigned int pwm_freq[8] = {
 898         48000000,
 899         24000000,
 900         12000000,
 901         8000000,
 902         6000000,
 903         3000000,
 904         1500000,
 905         750000,
 906 };
 907
 908 static int _it87_read_value(struct it87_data *data, u8 reg)
 909 {
 910         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 911         return inb_p(data->addr + IT87_DATA_REG_OFFSET);
 912 }
 913
 914 static void _it87_write_value(struct it87_data *data, u8 reg, u8 value)
 915 {
 916         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 917         outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
 918 }
 919
 920 static void it87_set_bank(struct it87_data *data, u8 bank)
 921 {
 922         if (has_bank_sel(data) && bank != data->bank) {
 923                 u8 breg = _it87_read_value(data, IT87_REG_BANK);
 924
 925                 breg &= 0x1f;
 926                 breg |= (bank << 5);
 927                 data->bank = bank;
 928                 _it87_write_value(data, IT87_REG_BANK, breg);
 929         }
 930 }
 931
 932 /*
 933  * Must be called with data->update_lock held, except during initialization.
 934  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 935  * would slow down the IT87 access and should not be necessary.
 936  */
 937 static int it87_read_value(struct it87_data *data, u16 reg)
 938 {
 939         it87_set_bank(data, reg >> 8);
 940         return _it87_read_value(data, reg & 0xff);
 941 }
 942
 943 /*
 944  * Must be called with data->update_lock held, except during initialization.
 945  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 946  * would slow down the IT87 access and should not be necessary.
 947  */
 948 static void it87_write_value(struct it87_data *data, u16 reg, u8 value)
 949 {
 950         it87_set_bank(data, reg >> 8);
 951         _it87_write_value(data, reg & 0xff, value);
 952 }
 953
 954 static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
 955 {
 956         u8 ctrl;
 957
 958         ctrl = it87_read_value(data, data->REG_PWM[nr]);
 959         data->pwm_ctrl[nr] = ctrl;
 960         if (has_newer_autopwm(data)) {
 961                 data->pwm_temp_map[nr] = temp_map_from_reg(data, ctrl);
 962                 data->pwm_duty[nr] = it87_read_value(data,
 963                                                      IT87_REG_PWM_DUTY[nr]);
 964         } else {
 965                 if (ctrl & 0x80)        /* Automatic mode */
 966                         data->pwm_temp_map[nr] = temp_map_from_reg(data, ctrl);
 967                 else                            /* Manual mode */
 968                         data->pwm_duty[nr] = ctrl & 0x7f;
 969         }
 970
 971         if (has_old_autopwm(data)) {
 972                 int i;
 973
 974                 for (i = 0; i < 5 ; i++)
 975                         data->auto_temp[nr][i] = it87_read_value(data,
 976                                                 IT87_REG_AUTO_TEMP(nr, i));
 977                 for (i = 0; i < 3 ; i++)
 978                         data->auto_pwm[nr][i] = it87_read_value(data,
 979                                                 IT87_REG_AUTO_PWM(nr, i));
 980         } else if (has_newer_autopwm(data)) {
 981                 int i;
 982
 983                 /*
 984                  * 0: temperature hysteresis (base + 5)
 985                  * 1: fan off temperature (base + 0)
 986                  * 2: fan start temperature (base + 1)
 987                  * 3: fan max temperature (base + 2)
 988                  */
 989                 data->auto_temp[nr][0] =
 990                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 5));
 991
 992                 for (i = 0; i < 3 ; i++)
 993                         data->auto_temp[nr][i + 1] =
 994                                 it87_read_value(data,
 995                                                 IT87_REG_AUTO_TEMP(nr, i));
 996                 /*
 997                  * 0: start pwm value (base + 3)
 998                  * 1: pwm slope (base + 4, 1/8th pwm)
 999                  */
1000                 data->auto_pwm[nr][0] =
1001                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 3));
1002                 data->auto_pwm[nr][1] =
1003                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 4));
1004         }
1005 }
1006
1007 static struct it87_data *it87_update_device(struct device *dev)
1008 {
1009         struct it87_data *data = dev_get_drvdata(dev);
1010         int i;
1011
1012         mutex_lock(&data->update_lock);
1013
1014         if (time_after(jiffies, data->last_updated + HZ + HZ / 2) ||
1015             !data->valid) {
1016                 if (update_vbat) {
1017                         /*
1018                          * Cleared after each update, so reenable.  Value
1019                          * returned by this read will be previous value
1020                          */
1021                         it87_write_value(data, IT87_REG_CONFIG,
1022                                 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
1023                 }
1024                 for (i = 0; i < NUM_VIN; i++) {
1025                         if (!(data->has_in & BIT(i)))
1026                                 continue;
1027
1028                         data->in[i][0] =
1029                                 it87_read_value(data, IT87_REG_VIN[i]);
1030
1031                         /* VBAT and AVCC don't have limit registers */
1032                         if (i >= NUM_VIN_LIMIT)
1033                                 continue;
1034
1035                         data->in[i][1] =
1036                                 it87_read_value(data, IT87_REG_VIN_MIN(i));
1037                         data->in[i][2] =
1038                                 it87_read_value(data, IT87_REG_VIN_MAX(i));
1039                 }
1040
1041                 for (i = 0; i < NUM_FAN; i++) {
1042                         /* Skip disabled fans */
1043                         if (!(data->has_fan & BIT(i)))
1044                                 continue;
1045
1046                         data->fan[i][1] =
1047                                 it87_read_value(data, data->REG_FAN_MIN[i]);
1048                         data->fan[i][0] = it87_read_value(data,
1049                                        data->REG_FAN[i]);
1050                         /* Add high byte if in 16-bit mode */
1051                         if (has_16bit_fans(data)) {
1052                                 data->fan[i][0] |= it87_read_value(data,
1053                                                 data->REG_FANX[i]) << 8;
1054                                 data->fan[i][1] |= it87_read_value(data,
1055                                                 data->REG_FANX_MIN[i]) << 8;
1056                         }
1057                 }
1058                 for (i = 0; i < NUM_TEMP; i++) {
1059                         if (!(data->has_temp & BIT(i)))
1060                                 continue;
1061                         data->temp[i][0] =
1062                                 it87_read_value(data, IT87_REG_TEMP(i));
1063
1064                         if (i >= data->num_temp_limit)
1065                                 continue;
1066
1067                         if (i < data->num_temp_offset)
1068                                 data->temp[i][3] =
1069                                   it87_read_value(data,
1070                                                   data->REG_TEMP_OFFSET[i]);
1071
1072                         data->temp[i][1] =
1073                                 it87_read_value(data, data->REG_TEMP_LOW[i]);
1074                         data->temp[i][2] =
1075                                 it87_read_value(data, data->REG_TEMP_HIGH[i]);
1076                 }
1077
1078                 /* Newer chips don't have clock dividers */
1079                 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
1080                         i = it87_read_value(data, IT87_REG_FAN_DIV);
1081                         data->fan_div[0] = i & 0x07;
1082                         data->fan_div[1] = (i >> 3) & 0x07;
1083                         data->fan_div[2] = (i & 0x40) ? 3 : 1;
1084                 }
1085
1086                 data->alarms =
1087                         it87_read_value(data, IT87_REG_ALARM1) |
1088                         (it87_read_value(data, IT87_REG_ALARM2) << 8) |
1089                         (it87_read_value(data, IT87_REG_ALARM3) << 16);
1090                 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1091
1092                 data->fan_main_ctrl = it87_read_value(data,
1093                                 IT87_REG_FAN_MAIN_CTRL);
1094                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
1095                 for (i = 0; i < NUM_PWM; i++) {
1096                         if (!(data->has_pwm & BIT(i)))
1097                                 continue;
1098                         it87_update_pwm_ctrl(data, i);
1099                 }
1100
1101                 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1102                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1103                 /*
1104                  * The IT8705F does not have VID capability.
1105                  * The IT8718F and later don't use IT87_REG_VID for the
1106                  * same purpose.
1107                  */
1108                 if (data->type == it8712 || data->type == it8716) {
1109                         data->vid = it87_read_value(data, IT87_REG_VID);
1110                         /*
1111                          * The older IT8712F revisions had only 5 VID pins,
1112                          * but we assume it is always safe to read 6 bits.
1113                          */
1114                         data->vid &= 0x3f;
1115                 }
1116                 data->last_updated = jiffies;
1117                 data->valid = 1;
1118         }
1119
1120         mutex_unlock(&data->update_lock);
1121
1122         return data;
1123 }
1124
1125 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
1126                        char *buf)
1127 {
1128         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1129         struct it87_data *data = it87_update_device(dev);
1130         int index = sattr->index;
1131         int nr = sattr->nr;
1132
1133         return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
1134 }
1135
1136 static ssize_t set_in(struct device *dev, struct device_attribute *attr,
1137                       const char *buf, size_t count)
1138 {
1139         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1140         struct it87_data *data = dev_get_drvdata(dev);
1141         int index = sattr->index;
1142         int nr = sattr->nr;
1143         unsigned long val;
1144
1145         if (kstrtoul(buf, 10, &val) < 0)
1146                 return -EINVAL;
1147
1148         mutex_lock(&data->update_lock);
1149         data->in[nr][index] = in_to_reg(data, nr, val);
1150         it87_write_value(data,
1151                          index == 1 ? IT87_REG_VIN_MIN(nr)
1152                                     : IT87_REG_VIN_MAX(nr),
1153                          data->in[nr][index]);
1154         mutex_unlock(&data->update_lock);
1155         return count;
1156 }
1157
1158 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
1159 static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
1160                             0, 1);
1161 static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
1162                             0, 2);
1163
1164 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
1165 static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
1166                             1, 1);
1167 static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
1168                             1, 2);
1169
1170 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
1171 static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
1172                             2, 1);
1173 static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
1174                             2, 2);
1175
1176 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
1177 static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
1178                             3, 1);
1179 static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
1180                             3, 2);
1181
1182 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
1183 static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
1184                             4, 1);
1185 static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
1186                             4, 2);
1187
1188 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
1189 static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
1190                             5, 1);
1191 static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
1192                             5, 2);
1193
1194 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
1195 static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
1196                             6, 1);
1197 static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
1198                             6, 2);
1199
1200 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
1201 static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
1202                             7, 1);
1203 static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
1204                             7, 2);
1205
1206 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
1207 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0);
1208 static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in, NULL, 10, 0);
1209 static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in, NULL, 11, 0);
1210 static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in, NULL, 12, 0);
1211
1212 /* Up to 6 temperatures */
1213 static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
1214                          char *buf)
1215 {
1216         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1217         int nr = sattr->nr;
1218         int index = sattr->index;
1219         struct it87_data *data = it87_update_device(dev);
1220
1221         return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
1222 }
1223
1224 static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
1225                         const char *buf, size_t count)
1226 {
1227         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1228         int nr = sattr->nr;
1229         int index = sattr->index;
1230         struct it87_data *data = dev_get_drvdata(dev);
1231         long val;
1232         u8 reg, regval;
1233
1234         if (kstrtol(buf, 10, &val) < 0)
1235                 return -EINVAL;
1236
1237         mutex_lock(&data->update_lock);
1238
1239         switch (index) {
1240         default:
1241         case 1:
1242                 reg = data->REG_TEMP_LOW[nr];
1243                 break;
1244         case 2:
1245                 reg = data->REG_TEMP_HIGH[nr];
1246                 break;
1247         case 3:
1248                 regval = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1249                 if (!(regval & 0x80)) {
1250                         regval |= 0x80;
1251                         it87_write_value(data, IT87_REG_BEEP_ENABLE, regval);
1252                 }
1253                 data->valid = 0;
1254                 reg = data->REG_TEMP_OFFSET[nr];
1255                 break;
1256         }
1257
1258         data->temp[nr][index] = TEMP_TO_REG(val);
1259         it87_write_value(data, reg, data->temp[nr][index]);
1260         mutex_unlock(&data->update_lock);
1261         return count;
1262 }
1263
1264 static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
1265 static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1266                             0, 1);
1267 static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1268                             0, 2);
1269 static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
1270                             set_temp, 0, 3);
1271 static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
1272 static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1273                             1, 1);
1274 static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1275                             1, 2);
1276 static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
1277                             set_temp, 1, 3);
1278 static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
1279 static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1280                             2, 1);
1281 static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1282                             2, 2);
1283 static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
1284                             set_temp, 2, 3);
1285 static SENSOR_DEVICE_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0);
1286 static SENSOR_DEVICE_ATTR_2(temp4_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1287                             3, 1);
1288 static SENSOR_DEVICE_ATTR_2(temp4_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1289                             3, 2);
1290 static SENSOR_DEVICE_ATTR_2(temp4_offset, S_IRUGO | S_IWUSR, show_temp,
1291                             set_temp, 3, 3);
1292 static SENSOR_DEVICE_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0);
1293 static SENSOR_DEVICE_ATTR_2(temp5_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1294                             4, 1);
1295 static SENSOR_DEVICE_ATTR_2(temp5_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1296                             4, 2);
1297 static SENSOR_DEVICE_ATTR_2(temp5_offset, S_IRUGO | S_IWUSR, show_temp,
1298                             set_temp, 4, 3);
1299 static SENSOR_DEVICE_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0);
1300 static SENSOR_DEVICE_ATTR_2(temp6_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1301                             5, 1);
1302 static SENSOR_DEVICE_ATTR_2(temp6_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1303                             5, 2);
1304 static SENSOR_DEVICE_ATTR_2(temp6_offset, S_IRUGO | S_IWUSR, show_temp,
1305                             set_temp, 5, 3);
1306
1307 static int get_temp_type(struct it87_data *data, int index)
1308 {
1309         u8 reg, extra;
1310         int type = 0;
1311
1312         if (has_bank_sel(data)) {
1313                 int s1reg = IT87_REG_TEMP_SRC1[index/2] >> ((index % 2) * 4);
1314                 u8 src1, src2;
1315
1316                 src1 = (it87_read_value(data, s1reg) >> ((index % 2) * 4)) & 0x0f;
1317                 src2 = it87_read_value(data, IT87_REG_TEMP_SRC2);
1318
1319                 switch (data->type) {
1320                 case it8686:
1321                         switch (src1) {
1322                         case 0:
1323                                 if (index >= 3)
1324                                         return 4;
1325                                 break;
1326                         case 1:
1327                                 if (index == 1 || index == 2 ||
1328                                           index == 4 || index == 5)
1329                                         return 6;
1330                                 break;
1331                         case 2:
1332                                 if (index == 2 || index == 6)
1333                                         return 5;
1334                                 break;
1335                         default:
1336                                 break;
1337                         }
1338                         break;
1339                 case it8625:
1340                         if (index < 3)
1341                                 break;
1342                 case it8655:
1343                 case it8665:
1344                         if (src1 < 3) {
1345                                 index = src1;
1346                                 break;
1347                         }
1348                         switch(src1) {
1349                         case 3:
1350                                 type = (src2 & BIT(index)) ? 6 : 5;
1351                                 break;
1352                         case 4 ... 8:
1353                                 type = (src2 & BIT(index)) ? 4 : 6;
1354                                 break;
1355                         case 9:
1356                                 type = (src2 & BIT(index)) ? 5 : 0;
1357                                 break;
1358                         default:
1359                                 break;
1360                         }
1361                         return type;
1362                 default:
1363                         return 0;
1364                 }
1365         }
1366         if (index >= 3)
1367                 return 0;
1368
1369         reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1370         extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1371
1372         if ((has_temp_peci(data, index) && (reg >> 6 == index + 1)) ||
1373             (has_temp_old_peci(data, index) && (extra & 0x80)))
1374                 type = 6;               /* Intel PECI */
1375         if (reg & BIT(index))
1376                 type = 3;               /* thermal diode */
1377         else if (reg & BIT(index + 3))
1378                 type = 4;               /* thermistor */
1379
1380         return type;
1381 }
1382
1383 static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
1384                               char *buf)
1385 {
1386         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1387         struct it87_data *data = it87_update_device(dev);
1388         int type = get_temp_type(data, sensor_attr->index);
1389
1390         return sprintf(buf, "%d\n", type);
1391 }
1392
1393 static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
1394                              const char *buf, size_t count)
1395 {
1396         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1397         int nr = sensor_attr->index;
1398
1399         struct it87_data *data = dev_get_drvdata(dev);
1400         long val;
1401         u8 reg, extra;
1402
1403         if (kstrtol(buf, 10, &val) < 0)
1404                 return -EINVAL;
1405
1406         reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1407         reg &= ~(1 << nr);
1408         reg &= ~(8 << nr);
1409         if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6))
1410                 reg &= 0x3f;
1411         extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1412         if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6))
1413                 extra &= 0x7f;
1414         if (val == 2) { /* backwards compatibility */
1415                 dev_warn(dev,
1416                          "Sensor type 2 is deprecated, please use 4 instead\n");
1417                 val = 4;
1418         }
1419         /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */
1420         if (val == 3)
1421                 reg |= 1 << nr;
1422         else if (val == 4)
1423                 reg |= 8 << nr;
1424         else if (has_temp_peci(data, nr) && val == 6)
1425                 reg |= (nr + 1) << 6;
1426         else if (has_temp_old_peci(data, nr) && val == 6)
1427                 extra |= 0x80;
1428         else if (val != 0)
1429                 return -EINVAL;
1430
1431         mutex_lock(&data->update_lock);
1432         data->sensor = reg;
1433         data->extra = extra;
1434         it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
1435         if (has_temp_old_peci(data, nr))
1436                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1437         data->valid = 0;        /* Force cache refresh */
1438         mutex_unlock(&data->update_lock);
1439         return count;
1440 }
1441
1442 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1443                           set_temp_type, 0);
1444 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1445                           set_temp_type, 1);
1446 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1447                           set_temp_type, 2);
1448 static SENSOR_DEVICE_ATTR(temp4_type, S_IRUGO | S_IWUSR, show_temp_type,
1449                           set_temp_type, 3);
1450 static SENSOR_DEVICE_ATTR(temp5_type, S_IRUGO | S_IWUSR, show_temp_type,
1451                           set_temp_type, 4);
1452 static SENSOR_DEVICE_ATTR(temp6_type, S_IRUGO | S_IWUSR, show_temp_type,
1453                           set_temp_type, 5);
1454
1455 /* 6 Fans */
1456
1457 static int pwm_mode(const struct it87_data *data, int nr)
1458 {
1459         if (has_fanctl_onoff(data) && nr < 3 &&
1460             !(data->fan_main_ctrl & BIT(nr)))
1461                 return 0;                               /* Full speed */
1462         if (data->pwm_ctrl[nr] & 0x80)
1463                 return 2;                               /* Automatic mode */
1464         if ((!has_fanctl_onoff(data) || nr >= 3) &&
1465             data->pwm_duty[nr] == pwm_to_reg(data, 0xff))
1466                 return 0;                       /* Full speed */
1467
1468         return 1;                               /* Manual mode */
1469 }
1470
1471 static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
1472                         char *buf)
1473 {
1474         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1475         int nr = sattr->nr;
1476         int index = sattr->index;
1477         int speed;
1478         struct it87_data *data = it87_update_device(dev);
1479
1480         speed = has_16bit_fans(data) ?
1481                 FAN16_FROM_REG(data->fan[nr][index]) :
1482                 FAN_FROM_REG(data->fan[nr][index],
1483                              DIV_FROM_REG(data->fan_div[nr]));
1484         return sprintf(buf, "%d\n", speed);
1485 }
1486
1487 static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
1488                             char *buf)
1489 {
1490         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1491         struct it87_data *data = it87_update_device(dev);
1492         int nr = sensor_attr->index;
1493
1494         return sprintf(buf, "%lu\n", DIV_FROM_REG(data->fan_div[nr]));
1495 }
1496
1497 static ssize_t show_pwm_enable(struct device *dev,
1498                                struct device_attribute *attr, char *buf)
1499 {
1500         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1501         struct it87_data *data = it87_update_device(dev);
1502         int nr = sensor_attr->index;
1503
1504         return sprintf(buf, "%d\n", pwm_mode(data, nr));
1505 }
1506
1507 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
1508                         char *buf)
1509 {
1510         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1511         struct it87_data *data = it87_update_device(dev);
1512         int nr = sensor_attr->index;
1513
1514         return sprintf(buf, "%d\n",
1515                        pwm_from_reg(data, data->pwm_duty[nr]));
1516 }
1517
1518 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
1519                              char *buf)
1520 {
1521         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1522         struct it87_data *data = it87_update_device(dev);
1523         int nr = sensor_attr->index;
1524         unsigned int freq;
1525         int index;
1526
1527         if (has_pwm_freq2(data) && nr == 1)
1528                 index = (data->extra >> 4) & 0x07;
1529         else
1530                 index = (data->fan_ctl >> 4) & 0x07;
1531
1532         freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128);
1533
1534         return sprintf(buf, "%u\n", freq);
1535 }
1536
1537 static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
1538                        const char *buf, size_t count)
1539 {
1540         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1541         int nr = sattr->nr;
1542         int index = sattr->index;
1543
1544         struct it87_data *data = dev_get_drvdata(dev);
1545         long val;
1546         u8 reg;
1547
1548         if (kstrtol(buf, 10, &val) < 0)
1549                 return -EINVAL;
1550
1551         mutex_lock(&data->update_lock);
1552
1553         if (has_16bit_fans(data)) {
1554                 data->fan[nr][index] = FAN16_TO_REG(val);
1555                 it87_write_value(data, data->REG_FAN_MIN[nr],
1556                                  data->fan[nr][index] & 0xff);
1557                 it87_write_value(data, data->REG_FANX_MIN[nr],
1558                                  data->fan[nr][index] >> 8);
1559         } else {
1560                 reg = it87_read_value(data, IT87_REG_FAN_DIV);
1561                 switch (nr) {
1562                 case 0:
1563                         data->fan_div[nr] = reg & 0x07;
1564                         break;
1565                 case 1:
1566                         data->fan_div[nr] = (reg >> 3) & 0x07;
1567                         break;
1568                 case 2:
1569                         data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
1570                         break;
1571                 }
1572                 data->fan[nr][index] =
1573                   FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
1574                 it87_write_value(data, data->REG_FAN_MIN[nr],
1575                                  data->fan[nr][index]);
1576         }
1577
1578         mutex_unlock(&data->update_lock);
1579         return count;
1580 }
1581
1582 static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
1583                            const char *buf, size_t count)
1584 {
1585         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1586         struct it87_data *data = dev_get_drvdata(dev);
1587         int nr = sensor_attr->index;
1588         unsigned long val;
1589         int min;
1590         u8 old;
1591
1592         if (kstrtoul(buf, 10, &val) < 0)
1593                 return -EINVAL;
1594
1595         mutex_lock(&data->update_lock);
1596         old = it87_read_value(data, IT87_REG_FAN_DIV);
1597
1598         /* Save fan min limit */
1599         min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
1600
1601         switch (nr) {
1602         case 0:
1603         case 1:
1604                 data->fan_div[nr] = DIV_TO_REG(val);
1605                 break;
1606         case 2:
1607                 if (val < 8)
1608                         data->fan_div[nr] = 1;
1609                 else
1610                         data->fan_div[nr] = 3;
1611         }
1612         val = old & 0x80;
1613         val |= (data->fan_div[0] & 0x07);
1614         val |= (data->fan_div[1] & 0x07) << 3;
1615         if (data->fan_div[2] == 3)
1616                 val |= 0x1 << 6;
1617         it87_write_value(data, IT87_REG_FAN_DIV, val);
1618
1619         /* Restore fan min limit */
1620         data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
1621         it87_write_value(data, data->REG_FAN_MIN[nr], data->fan[nr][1]);
1622
1623         mutex_unlock(&data->update_lock);
1624         return count;
1625 }
1626
1627 /* Returns 0 if OK, -EINVAL otherwise */
1628 static int check_trip_points(struct device *dev, int nr)
1629 {
1630         const struct it87_data *data = dev_get_drvdata(dev);
1631         int i, err = 0;
1632
1633         if (has_old_autopwm(data)) {
1634                 for (i = 0; i < 3; i++) {
1635                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1636                                 err = -EINVAL;
1637                 }
1638                 for (i = 0; i < 2; i++) {
1639                         if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1640                                 err = -EINVAL;
1641                 }
1642         } else if (has_newer_autopwm(data)) {
1643                 for (i = 1; i < 3; i++) {
1644                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1645                                 err = -EINVAL;
1646                 }
1647         }
1648
1649         if (err) {
1650                 dev_err(dev,
1651                         "Inconsistent trip points, not switching to automatic mode\n");
1652                 dev_err(dev, "Adjust the trip points and try again\n");
1653         }
1654         return err;
1655 }
1656
1657 static ssize_t set_pwm_enable(struct device *dev, struct device_attribute *attr,
1658                               const char *buf, size_t count)
1659 {
1660         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1661         struct it87_data *data = dev_get_drvdata(dev);
1662         int nr = sensor_attr->index;
1663         long val;
1664
1665         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
1666                 return -EINVAL;
1667
1668         /* Check trip points before switching to automatic mode */
1669         if (val == 2) {
1670                 if (check_trip_points(dev, nr) < 0)
1671                         return -EINVAL;
1672         }
1673
1674         mutex_lock(&data->update_lock);
1675         it87_update_pwm_ctrl(data, nr);
1676
1677         if (val == 0) {
1678                 if (nr < 3 && has_fanctl_onoff(data)) {
1679                         int tmp;
1680                         /* make sure the fan is on when in on/off mode */
1681                         tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1682                         it87_write_value(data, IT87_REG_FAN_CTL, tmp | BIT(nr));
1683                         /* set on/off mode */
1684                         data->fan_main_ctrl &= ~BIT(nr);
1685                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1686                                          data->fan_main_ctrl);
1687                 } else {
1688                         u8 ctrl;
1689
1690                         /* No on/off mode, set maximum pwm value */
1691                         data->pwm_duty[nr] = pwm_to_reg(data, 0xff);
1692                         it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1693                                          data->pwm_duty[nr]);
1694                         /* and set manual mode */
1695                         if (has_newer_autopwm(data)) {
1696                                 ctrl = temp_map_to_reg(data, nr,
1697                                                        data->pwm_temp_map[nr]);
1698                         } else {
1699                                 ctrl = data->pwm_duty[nr];
1700                         }
1701                         data->pwm_ctrl[nr] = ctrl;
1702                         it87_write_value(data, data->REG_PWM[nr], ctrl);
1703                 }
1704         } else {
1705                 u8 ctrl;
1706
1707                 if (has_newer_autopwm(data)) {
1708                         ctrl = temp_map_to_reg(data, nr,
1709                                                data->pwm_temp_map[nr]);
1710                         if (val != 1)
1711                                 ctrl |= 0x80;
1712                 } else {
1713                         ctrl = (val == 1 ? data->pwm_duty[nr] : 0x80);
1714                 }
1715                 data->pwm_ctrl[nr] = ctrl;
1716                 it87_write_value(data, data->REG_PWM[nr], ctrl);
1717
1718                 if (has_fanctl_onoff(data) && nr < 3) {
1719                         /* set SmartGuardian mode */
1720                         data->fan_main_ctrl |= BIT(nr);
1721                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1722                                          data->fan_main_ctrl);
1723                 }
1724         }
1725
1726         mutex_unlock(&data->update_lock);
1727         return count;
1728 }
1729
1730 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1731                        const char *buf, size_t count)
1732 {
1733         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1734         struct it87_data *data = dev_get_drvdata(dev);
1735         int nr = sensor_attr->index;
1736         long val;
1737
1738         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1739                 return -EINVAL;
1740
1741         mutex_lock(&data->update_lock);
1742         it87_update_pwm_ctrl(data, nr);
1743         if (has_newer_autopwm(data)) {
1744                 /*
1745                  * If we are in automatic mode, the PWM duty cycle register
1746                  * is read-only so we can't write the value.
1747                  */
1748                 if (data->pwm_ctrl[nr] & 0x80) {
1749                         mutex_unlock(&data->update_lock);
1750                         return -EBUSY;
1751                 }
1752                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1753                 it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1754                                  data->pwm_duty[nr]);
1755         } else {
1756                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1757                 /*
1758                  * If we are in manual mode, write the duty cycle immediately;
1759                  * otherwise, just store it for later use.
1760                  */
1761                 if (!(data->pwm_ctrl[nr] & 0x80)) {
1762                         data->pwm_ctrl[nr] = data->pwm_duty[nr];
1763                         it87_write_value(data, data->REG_PWM[nr],
1764                                          data->pwm_ctrl[nr]);
1765                 }
1766         }
1767         mutex_unlock(&data->update_lock);
1768         return count;
1769 }
1770
1771 static ssize_t set_pwm_freq(struct device *dev, struct device_attribute *attr,
1772                             const char *buf, size_t count)
1773 {
1774         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1775         struct it87_data *data = dev_get_drvdata(dev);
1776         int nr = sensor_attr->index;
1777         unsigned long val;
1778         int i;
1779
1780         if (kstrtoul(buf, 10, &val) < 0)
1781                 return -EINVAL;
1782
1783         val = clamp_val(val, 0, 1000000);
1784         val *= has_newer_autopwm(data) ? 256 : 128;
1785
1786         /* Search for the nearest available frequency */
1787         for (i = 0; i < 7; i++) {
1788                 if (val > (pwm_freq[i] + pwm_freq[i + 1]) / 2)
1789                         break;
1790         }
1791
1792         mutex_lock(&data->update_lock);
1793         if (nr == 0) {
1794                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
1795                 data->fan_ctl |= i << 4;
1796                 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
1797         } else {
1798                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x8f;
1799                 data->extra |= i << 4;
1800                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1801         }
1802         mutex_unlock(&data->update_lock);
1803
1804         return count;
1805 }
1806
1807 static ssize_t show_pwm_temp_map(struct device *dev,
1808                                  struct device_attribute *attr, char *buf)
1809 {
1810         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1811         struct it87_data *data = it87_update_device(dev);
1812         int nr = sensor_attr->index;
1813
1814         return sprintf(buf, "%d\n", data->pwm_temp_map[nr] + 1);
1815 }
1816
1817 static ssize_t set_pwm_temp_map(struct device *dev,
1818                                 struct device_attribute *attr, const char *buf,
1819                                 size_t count)
1820 {
1821         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1822         struct it87_data *data = dev_get_drvdata(dev);
1823         int nr = sensor_attr->index;
1824         unsigned long val;
1825         u8 map;
1826
1827         if (kstrtoul(buf, 10, &val) < 0)
1828                 return -EINVAL;
1829
1830         if (!val || val > data->pwm_num_temp_map)
1831                 return -EINVAL;
1832
1833         map = val - 1;
1834
1835         mutex_lock(&data->update_lock);
1836         it87_update_pwm_ctrl(data, nr);
1837         data->pwm_temp_map[nr] = map;
1838         /*
1839          * If we are in automatic mode, write the temp mapping immediately;
1840          * otherwise, just store it for later use.
1841          */
1842         if (data->pwm_ctrl[nr] & 0x80) {
1843                 data->pwm_ctrl[nr] = temp_map_to_reg(data, nr, map);
1844                 it87_write_value(data, data->REG_PWM[nr], data->pwm_ctrl[nr]);
1845         }
1846         mutex_unlock(&data->update_lock);
1847         return count;
1848 }
1849
1850 static ssize_t show_auto_pwm(struct device *dev, struct device_attribute *attr,
1851                              char *buf)
1852 {
1853         struct it87_data *data = it87_update_device(dev);
1854         struct sensor_device_attribute_2 *sensor_attr =
1855                         to_sensor_dev_attr_2(attr);
1856         int nr = sensor_attr->nr;
1857         int point = sensor_attr->index;
1858
1859         return sprintf(buf, "%d\n",
1860                        pwm_from_reg(data, data->auto_pwm[nr][point]));
1861 }
1862
1863 static ssize_t set_auto_pwm(struct device *dev, struct device_attribute *attr,
1864                             const char *buf, size_t count)
1865 {
1866         struct it87_data *data = dev_get_drvdata(dev);
1867         struct sensor_device_attribute_2 *sensor_attr =
1868                         to_sensor_dev_attr_2(attr);
1869         int nr = sensor_attr->nr;
1870         int point = sensor_attr->index;
1871         int regaddr;
1872         long val;
1873
1874         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1875                 return -EINVAL;
1876
1877         mutex_lock(&data->update_lock);
1878         data->auto_pwm[nr][point] = pwm_to_reg(data, val);
1879         if (has_newer_autopwm(data))
1880                 regaddr = IT87_REG_AUTO_TEMP(nr, 3);
1881         else
1882                 regaddr = IT87_REG_AUTO_PWM(nr, point);
1883         it87_write_value(data, regaddr, data->auto_pwm[nr][point]);
1884         mutex_unlock(&data->update_lock);
1885         return count;
1886 }
1887
1888 static ssize_t show_auto_pwm_slope(struct device *dev,
1889                                    struct device_attribute *attr, char *buf)
1890 {
1891         struct it87_data *data = it87_update_device(dev);
1892         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1893         int nr = sensor_attr->index;
1894
1895         return sprintf(buf, "%d\n", data->auto_pwm[nr][1] & 0x7f);
1896 }
1897
1898 static ssize_t set_auto_pwm_slope(struct device *dev,
1899                                   struct device_attribute *attr,
1900                                   const char *buf, size_t count)
1901 {
1902         struct it87_data *data = dev_get_drvdata(dev);
1903         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1904         int nr = sensor_attr->index;
1905         unsigned long val;
1906
1907         if (kstrtoul(buf, 10, &val) < 0 || val > 127)
1908                 return -EINVAL;
1909
1910         mutex_lock(&data->update_lock);
1911         data->auto_pwm[nr][1] = (data->auto_pwm[nr][1] & 0x80) | val;
1912         it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 4),
1913                          data->auto_pwm[nr][1]);
1914         mutex_unlock(&data->update_lock);
1915         return count;
1916 }
1917
1918 static ssize_t show_auto_temp(struct device *dev, struct device_attribute *attr,
1919                               char *buf)
1920 {
1921         struct it87_data *data = it87_update_device(dev);
1922         struct sensor_device_attribute_2 *sensor_attr =
1923                         to_sensor_dev_attr_2(attr);
1924         int nr = sensor_attr->nr;
1925         int point = sensor_attr->index;
1926         int reg;
1927
1928         if (has_old_autopwm(data) || point)
1929                 reg = data->auto_temp[nr][point];
1930         else
1931                 reg = data->auto_temp[nr][1] - (data->auto_temp[nr][0] & 0x1f);
1932
1933         return sprintf(buf, "%d\n", TEMP_FROM_REG(reg));
1934 }
1935
1936 static ssize_t set_auto_temp(struct device *dev, struct device_attribute *attr,
1937                              const char *buf, size_t count)
1938 {
1939         struct it87_data *data = dev_get_drvdata(dev);
1940         struct sensor_device_attribute_2 *sensor_attr =
1941                         to_sensor_dev_attr_2(attr);
1942         int nr = sensor_attr->nr;
1943         int point = sensor_attr->index;
1944         long val;
1945         int reg;
1946
1947         if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
1948                 return -EINVAL;
1949
1950         mutex_lock(&data->update_lock);
1951         if (has_newer_autopwm(data) && !point) {
1952                 reg = data->auto_temp[nr][1] - TEMP_TO_REG(val);
1953                 reg = clamp_val(reg, 0, 0x1f) | (data->auto_temp[nr][0] & 0xe0);
1954                 data->auto_temp[nr][0] = reg;
1955                 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 5), reg);
1956         } else {
1957                 reg = TEMP_TO_REG(val);
1958                 data->auto_temp[nr][point] = reg;
1959                 if (has_newer_autopwm(data))
1960                         point--;
1961                 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point), reg);
1962         }
1963         mutex_unlock(&data->update_lock);
1964         return count;
1965 }
1966
1967 static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
1968 static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1969                             0, 1);
1970 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
1971                           set_fan_div, 0);
1972
1973 static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
1974 static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1975                             1, 1);
1976 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
1977                           set_fan_div, 1);
1978
1979 static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
1980 static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1981                             2, 1);
1982 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
1983                           set_fan_div, 2);
1984
1985 static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
1986 static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1987                             3, 1);
1988
1989 static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
1990 static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1991                             4, 1);
1992
1993 static SENSOR_DEVICE_ATTR_2(fan6_input, S_IRUGO, show_fan, NULL, 5, 0);
1994 static SENSOR_DEVICE_ATTR_2(fan6_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1995                             5, 1);
1996
1997 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
1998                           show_pwm_enable, set_pwm_enable, 0);
1999 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0);
2000 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq,
2001                           set_pwm_freq, 0);
2002 static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO,
2003                           show_pwm_temp_map, set_pwm_temp_map, 0);
2004 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR,
2005                             show_auto_pwm, set_auto_pwm, 0, 0);
2006 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR,
2007                             show_auto_pwm, set_auto_pwm, 0, 1);
2008 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR,
2009                             show_auto_pwm, set_auto_pwm, 0, 2);
2010 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO,
2011                             show_auto_pwm, NULL, 0, 3);
2012 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
2013                             show_auto_temp, set_auto_temp, 0, 1);
2014 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2015                             show_auto_temp, set_auto_temp, 0, 0);
2016 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
2017                             show_auto_temp, set_auto_temp, 0, 2);
2018 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
2019                             show_auto_temp, set_auto_temp, 0, 3);
2020 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR,
2021                             show_auto_temp, set_auto_temp, 0, 4);
2022 static SENSOR_DEVICE_ATTR_2(pwm1_auto_start, S_IRUGO | S_IWUSR,
2023                             show_auto_pwm, set_auto_pwm, 0, 0);
2024 static SENSOR_DEVICE_ATTR(pwm1_auto_slope, S_IRUGO | S_IWUSR,
2025                           show_auto_pwm_slope, set_auto_pwm_slope, 0);
2026
2027 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
2028                           show_pwm_enable, set_pwm_enable, 1);
2029 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1);
2030 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, set_pwm_freq, 1);
2031 static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO,
2032                           show_pwm_temp_map, set_pwm_temp_map, 1);
2033 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR,
2034                             show_auto_pwm, set_auto_pwm, 1, 0);
2035 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR,
2036                             show_auto_pwm, set_auto_pwm, 1, 1);
2037 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR,
2038                             show_auto_pwm, set_auto_pwm, 1, 2);
2039 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO,
2040                             show_auto_pwm, NULL, 1, 3);
2041 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
2042                             show_auto_temp, set_auto_temp, 1, 1);
2043 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2044                             show_auto_temp, set_auto_temp, 1, 0);
2045 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
2046                             show_auto_temp, set_auto_temp, 1, 2);
2047 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
2048                             show_auto_temp, set_auto_temp, 1, 3);
2049 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR,
2050                             show_auto_temp, set_auto_temp, 1, 4);
2051 static SENSOR_DEVICE_ATTR_2(pwm2_auto_start, S_IRUGO | S_IWUSR,
2052                             show_auto_pwm, set_auto_pwm, 1, 0);
2053 static SENSOR_DEVICE_ATTR(pwm2_auto_slope, S_IRUGO | S_IWUSR,
2054                           show_auto_pwm_slope, set_auto_pwm_slope, 1);
2055
2056 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
2057                           show_pwm_enable, set_pwm_enable, 2);
2058 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2);
2059 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL, 2);
2060 static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO,
2061                           show_pwm_temp_map, set_pwm_temp_map, 2);
2062 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR,
2063                             show_auto_pwm, set_auto_pwm, 2, 0);
2064 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR,
2065                             show_auto_pwm, set_auto_pwm, 2, 1);
2066 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR,
2067                             show_auto_pwm, set_auto_pwm, 2, 2);
2068 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO,
2069                             show_auto_pwm, NULL, 2, 3);
2070 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
2071                             show_auto_temp, set_auto_temp, 2, 1);
2072 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2073                             show_auto_temp, set_auto_temp, 2, 0);
2074 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
2075                             show_auto_temp, set_auto_temp, 2, 2);
2076 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
2077                             show_auto_temp, set_auto_temp, 2, 3);
2078 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR,
2079                             show_auto_temp, set_auto_temp, 2, 4);
2080 static SENSOR_DEVICE_ATTR_2(pwm3_auto_start, S_IRUGO | S_IWUSR,
2081                             show_auto_pwm, set_auto_pwm, 2, 0);
2082 static SENSOR_DEVICE_ATTR(pwm3_auto_slope, S_IRUGO | S_IWUSR,
2083                           show_auto_pwm_slope, set_auto_pwm_slope, 2);
2084
2085 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IRUGO | S_IWUSR,
2086                           show_pwm_enable, set_pwm_enable, 3);
2087 static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 3);
2088 static SENSOR_DEVICE_ATTR(pwm4_freq, S_IRUGO, show_pwm_freq, NULL, 3);
2089 static SENSOR_DEVICE_ATTR(pwm4_auto_channels_temp, S_IRUGO,
2090                           show_pwm_temp_map, set_pwm_temp_map, 3);
2091 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp, S_IRUGO | S_IWUSR,
2092                             show_auto_temp, set_auto_temp, 2, 1);
2093 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2094                             show_auto_temp, set_auto_temp, 2, 0);
2095 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point2_temp, S_IRUGO | S_IWUSR,
2096                             show_auto_temp, set_auto_temp, 2, 2);
2097 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point3_temp, S_IRUGO | S_IWUSR,
2098                             show_auto_temp, set_auto_temp, 2, 3);
2099 static SENSOR_DEVICE_ATTR_2(pwm4_auto_start, S_IRUGO | S_IWUSR,
2100                             show_auto_pwm, set_auto_pwm, 3, 0);
2101 static SENSOR_DEVICE_ATTR(pwm4_auto_slope, S_IRUGO | S_IWUSR,
2102                           show_auto_pwm_slope, set_auto_pwm_slope, 3);
2103
2104 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IRUGO | S_IWUSR,
2105                           show_pwm_enable, set_pwm_enable, 4);
2106 static SENSOR_DEVICE_ATTR(pwm5, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 4);
2107 static SENSOR_DEVICE_ATTR(pwm5_freq, S_IRUGO, show_pwm_freq, NULL, 4);
2108 static SENSOR_DEVICE_ATTR(pwm5_auto_channels_temp, S_IRUGO,
2109                           show_pwm_temp_map, set_pwm_temp_map, 4);
2110 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp, S_IRUGO | S_IWUSR,
2111                             show_auto_temp, set_auto_temp, 2, 1);
2112 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2113                             show_auto_temp, set_auto_temp, 2, 0);
2114 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point2_temp, S_IRUGO | S_IWUSR,
2115                             show_auto_temp, set_auto_temp, 2, 2);
2116 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point3_temp, S_IRUGO | S_IWUSR,
2117                             show_auto_temp, set_auto_temp, 2, 3);
2118 static SENSOR_DEVICE_ATTR_2(pwm5_auto_start, S_IRUGO | S_IWUSR,
2119                             show_auto_pwm, set_auto_pwm, 4, 0);
2120 static SENSOR_DEVICE_ATTR(pwm5_auto_slope, S_IRUGO | S_IWUSR,
2121                           show_auto_pwm_slope, set_auto_pwm_slope, 4);
2122
2123 static SENSOR_DEVICE_ATTR(pwm6_enable, S_IRUGO | S_IWUSR,
2124                           show_pwm_enable, set_pwm_enable, 5);
2125 static SENSOR_DEVICE_ATTR(pwm6, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 5);
2126 static SENSOR_DEVICE_ATTR(pwm6_freq, S_IRUGO, show_pwm_freq, NULL, 5);
2127 static SENSOR_DEVICE_ATTR(pwm6_auto_channels_temp, S_IRUGO,
2128                           show_pwm_temp_map, set_pwm_temp_map, 5);
2129 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp, S_IRUGO | S_IWUSR,
2130                             show_auto_temp, set_auto_temp, 2, 1);
2131 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2132                             show_auto_temp, set_auto_temp, 2, 0);
2133 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point2_temp, S_IRUGO | S_IWUSR,
2134                             show_auto_temp, set_auto_temp, 2, 2);
2135 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point3_temp, S_IRUGO | S_IWUSR,
2136                             show_auto_temp, set_auto_temp, 2, 3);
2137 static SENSOR_DEVICE_ATTR_2(pwm6_auto_start, S_IRUGO | S_IWUSR,
2138                             show_auto_pwm, set_auto_pwm, 5, 0);
2139 static SENSOR_DEVICE_ATTR(pwm6_auto_slope, S_IRUGO | S_IWUSR,
2140                           show_auto_pwm_slope, set_auto_pwm_slope, 5);
2141
2142 /* Alarms */
2143 static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
2144                            char *buf)
2145 {
2146         struct it87_data *data = it87_update_device(dev);
2147
2148         return sprintf(buf, "%u\n", data->alarms);
2149 }
2150 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
2151
2152 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
2153                           char *buf)
2154 {
2155         struct it87_data *data = it87_update_device(dev);
2156         int bitnr = to_sensor_dev_attr(attr)->index;
2157
2158         return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
2159 }
2160
2161 static ssize_t clear_intrusion(struct device *dev,
2162                                struct device_attribute *attr, const char *buf,
2163                                size_t count)
2164 {
2165         struct it87_data *data = dev_get_drvdata(dev);
2166         int config;
2167         long val;
2168
2169         if (kstrtol(buf, 10, &val) < 0 || val != 0)
2170                 return -EINVAL;
2171
2172         mutex_lock(&data->update_lock);
2173         config = it87_read_value(data, IT87_REG_CONFIG);
2174         if (config < 0) {
2175                 count = config;
2176         } else {
2177                 config |= BIT(5);
2178                 it87_write_value(data, IT87_REG_CONFIG, config);
2179                 /* Invalidate cache to force re-read */
2180                 data->valid = 0;
2181         }
2182         mutex_unlock(&data->update_lock);
2183
2184         return count;
2185 }
2186
2187 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
2188 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
2189 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
2190 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
2191 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
2192 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
2193 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
2194 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
2195 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
2196 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
2197 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
2198 static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
2199 static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
2200 static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 7);
2201 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
2202 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
2203 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
2204 static SENSOR_DEVICE_ATTR(temp4_alarm, S_IRUGO, show_alarm, NULL, 19);
2205 static SENSOR_DEVICE_ATTR(temp5_alarm, S_IRUGO, show_alarm, NULL, 20);
2206 static SENSOR_DEVICE_ATTR(temp6_alarm, S_IRUGO, show_alarm, NULL, 21);
2207 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
2208                           show_alarm, clear_intrusion, 4);
2209
2210 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
2211                          char *buf)
2212 {
2213         struct it87_data *data = it87_update_device(dev);
2214         int bitnr = to_sensor_dev_attr(attr)->index;
2215
2216         return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
2217 }
2218
2219 static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
2220                         const char *buf, size_t count)
2221 {
2222         int bitnr = to_sensor_dev_attr(attr)->index;
2223         struct it87_data *data = dev_get_drvdata(dev);
2224         long val;
2225
2226         if (kstrtol(buf, 10, &val) < 0 || (val != 0 && val != 1))
2227                 return -EINVAL;
2228
2229         mutex_lock(&data->update_lock);
2230         data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
2231         if (val)
2232                 data->beeps |= BIT(bitnr);
2233         else
2234                 data->beeps &= ~BIT(bitnr);
2235         it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
2236         mutex_unlock(&data->update_lock);
2237         return count;
2238 }
2239
2240 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
2241                           show_beep, set_beep, 1);
2242 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
2243 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
2244 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
2245 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
2246 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
2247 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
2248 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
2249 /* fanX_beep writability is set later */
2250 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
2251 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
2252 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
2253 static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
2254 static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
2255 static SENSOR_DEVICE_ATTR(fan6_beep, S_IRUGO, show_beep, set_beep, 0);
2256 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
2257                           show_beep, set_beep, 2);
2258 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
2259 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
2260 static SENSOR_DEVICE_ATTR(temp4_beep, S_IRUGO, show_beep, NULL, 2);
2261 static SENSOR_DEVICE_ATTR(temp5_beep, S_IRUGO, show_beep, NULL, 2);
2262 static SENSOR_DEVICE_ATTR(temp6_beep, S_IRUGO, show_beep, NULL, 2);
2263
2264 static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
2265                             char *buf)
2266 {
2267         struct it87_data *data = dev_get_drvdata(dev);
2268
2269         return sprintf(buf, "%u\n", data->vrm);
2270 }
2271
2272 static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
2273                              const char *buf, size_t count)
2274 {
2275         struct it87_data *data = dev_get_drvdata(dev);
2276         unsigned long val;
2277
2278         if (kstrtoul(buf, 10, &val) < 0)
2279                 return -EINVAL;
2280
2281         data->vrm = val;
2282
2283         return count;
2284 }
2285 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
2286
2287 static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
2288                             char *buf)
2289 {
2290         struct it87_data *data = it87_update_device(dev);
2291
2292         return sprintf(buf, "%ld\n", (long)vid_from_reg(data->vid, data->vrm));
2293 }
2294 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
2295
2296 static ssize_t show_label(struct device *dev, struct device_attribute *attr,
2297                           char *buf)
2298 {
2299         static const char * const labels[] = {
2300                 "+5V",
2301                 "5VSB",
2302                 "Vbat",
2303                 "AVCC",
2304         };
2305         static const char * const labels_it8721[] = {
2306                 "+3.3V",
2307                 "3VSB",
2308                 "Vbat",
2309                 "+3.3V",
2310         };
2311         struct it87_data *data = dev_get_drvdata(dev);
2312         int nr = to_sensor_dev_attr(attr)->index;
2313         const char *label;
2314
2315         if (has_vin3_5v(data) && nr == 0)
2316                 label = labels[0];
2317         else if (has_12mv_adc(data) || has_10_9mv_adc(data) ||
2318                  has_11mv_adc(data))
2319                 label = labels_it8721[nr];
2320         else
2321                 label = labels[nr];
2322
2323         return sprintf(buf, "%s\n", label);
2324 }
2325 static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
2326 static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
2327 static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
2328 /* AVCC3 */
2329 static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 3);
2330
2331 static umode_t it87_in_is_visible(struct kobject *kobj,
2332                                   struct attribute *attr, int index)
2333 {
2334         struct device *dev = container_of(kobj, struct device, kobj);
2335         struct it87_data *data = dev_get_drvdata(dev);
2336         int i = index / 5;      /* voltage index */
2337         int a = index % 5;      /* attribute index */
2338
2339         if (index >= 40) {      /* in8 and higher only have input attributes */
2340                 i = index - 40 + 8;
2341                 a = 0;
2342         }
2343
2344         if (!(data->has_in & BIT(i)))
2345                 return 0;
2346
2347         if (a == 4 && !data->has_beep)
2348                 return 0;
2349
2350         return attr->mode;
2351 }
2352
2353 static struct attribute *it87_attributes_in[] = {
2354         &sensor_dev_attr_in0_input.dev_attr.attr,
2355         &sensor_dev_attr_in0_min.dev_attr.attr,
2356         &sensor_dev_attr_in0_max.dev_attr.attr,
2357         &sensor_dev_attr_in0_alarm.dev_attr.attr,
2358         &sensor_dev_attr_in0_beep.dev_attr.attr,        /* 4 */
2359
2360         &sensor_dev_attr_in1_input.dev_attr.attr,
2361         &sensor_dev_attr_in1_min.dev_attr.attr,
2362         &sensor_dev_attr_in1_max.dev_attr.attr,
2363         &sensor_dev_attr_in1_alarm.dev_attr.attr,
2364         &sensor_dev_attr_in1_beep.dev_attr.attr,        /* 9 */
2365
2366         &sensor_dev_attr_in2_input.dev_attr.attr,
2367         &sensor_dev_attr_in2_min.dev_attr.attr,
2368         &sensor_dev_attr_in2_max.dev_attr.attr,
2369         &sensor_dev_attr_in2_alarm.dev_attr.attr,
2370         &sensor_dev_attr_in2_beep.dev_attr.attr,        /* 14 */
2371
2372         &sensor_dev_attr_in3_input.dev_attr.attr,
2373         &sensor_dev_attr_in3_min.dev_attr.attr,
2374         &sensor_dev_attr_in3_max.dev_attr.attr,
2375         &sensor_dev_attr_in3_alarm.dev_attr.attr,
2376         &sensor_dev_attr_in3_beep.dev_attr.attr,        /* 19 */
2377
2378         &sensor_dev_attr_in4_input.dev_attr.attr,
2379         &sensor_dev_attr_in4_min.dev_attr.attr,
2380         &sensor_dev_attr_in4_max.dev_attr.attr,
2381         &sensor_dev_attr_in4_alarm.dev_attr.attr,
2382         &sensor_dev_attr_in4_beep.dev_attr.attr,        /* 24 */
2383
2384         &sensor_dev_attr_in5_input.dev_attr.attr,
2385         &sensor_dev_attr_in5_min.dev_attr.attr,
2386         &sensor_dev_attr_in5_max.dev_attr.attr,
2387         &sensor_dev_attr_in5_alarm.dev_attr.attr,
2388         &sensor_dev_attr_in5_beep.dev_attr.attr,        /* 29 */
2389
2390         &sensor_dev_attr_in6_input.dev_attr.attr,
2391         &sensor_dev_attr_in6_min.dev_attr.attr,
2392         &sensor_dev_attr_in6_max.dev_attr.attr,
2393         &sensor_dev_attr_in6_alarm.dev_attr.attr,
2394         &sensor_dev_attr_in6_beep.dev_attr.attr,        /* 34 */
2395
2396         &sensor_dev_attr_in7_input.dev_attr.attr,
2397         &sensor_dev_attr_in7_min.dev_attr.attr,
2398         &sensor_dev_attr_in7_max.dev_attr.attr,
2399         &sensor_dev_attr_in7_alarm.dev_attr.attr,
2400         &sensor_dev_attr_in7_beep.dev_attr.attr,        /* 39 */
2401
2402         &sensor_dev_attr_in8_input.dev_attr.attr,       /* 40 */
2403         &sensor_dev_attr_in9_input.dev_attr.attr,       /* 41 */
2404         &sensor_dev_attr_in10_input.dev_attr.attr,      /* 42 */
2405         &sensor_dev_attr_in11_input.dev_attr.attr,      /* 43 */
2406         &sensor_dev_attr_in12_input.dev_attr.attr,      /* 44 */
2407         NULL
2408 };
2409
2410 static const struct attribute_group it87_group_in = {
2411         .attrs = it87_attributes_in,
2412         .is_visible = it87_in_is_visible,
2413 };
2414
2415 static umode_t it87_temp_is_visible(struct kobject *kobj,
2416                                     struct attribute *attr, int index)
2417 {
2418         struct device *dev = container_of(kobj, struct device, kobj);
2419         struct it87_data *data = dev_get_drvdata(dev);
2420         int i = index / 7;      /* temperature index */
2421         int a = index % 7;      /* attribute index */
2422
2423         if (!(data->has_temp & BIT(i)))
2424                 return 0;
2425
2426         if (a && i >= data->num_temp_limit)
2427                 return 0;
2428
2429         if (a == 3) {
2430                 int type = get_temp_type(data, i);
2431
2432                 if (type == 0)
2433                         return 0;
2434                 if (has_bank_sel(data))
2435                         return 0444;
2436                 return attr->mode;
2437         }
2438
2439         if (a == 5 && i >= data->num_temp_offset)
2440                 return 0;
2441
2442         if (a == 6 && !data->has_beep)
2443                 return 0;
2444
2445         return attr->mode;
2446 }
2447
2448 static struct attribute *it87_attributes_temp[] = {
2449         &sensor_dev_attr_temp1_input.dev_attr.attr,
2450         &sensor_dev_attr_temp1_max.dev_attr.attr,
2451         &sensor_dev_attr_temp1_min.dev_attr.attr,
2452         &sensor_dev_attr_temp1_type.dev_attr.attr,      /* 3 */
2453         &sensor_dev_attr_temp1_alarm.dev_attr.attr,
2454         &sensor_dev_attr_temp1_offset.dev_attr.attr,    /* 5 */
2455         &sensor_dev_attr_temp1_beep.dev_attr.attr,      /* 6 */
2456
2457         &sensor_dev_attr_temp2_input.dev_attr.attr,     /* 7 */
2458         &sensor_dev_attr_temp2_max.dev_attr.attr,
2459         &sensor_dev_attr_temp2_min.dev_attr.attr,
2460         &sensor_dev_attr_temp2_type.dev_attr.attr,
2461         &sensor_dev_attr_temp2_alarm.dev_attr.attr,
2462         &sensor_dev_attr_temp2_offset.dev_attr.attr,
2463         &sensor_dev_attr_temp2_beep.dev_attr.attr,
2464
2465         &sensor_dev_attr_temp3_input.dev_attr.attr,     /* 14 */
2466         &sensor_dev_attr_temp3_max.dev_attr.attr,
2467         &sensor_dev_attr_temp3_min.dev_attr.attr,
2468         &sensor_dev_attr_temp3_type.dev_attr.attr,
2469         &sensor_dev_attr_temp3_alarm.dev_attr.attr,
2470         &sensor_dev_attr_temp3_offset.dev_attr.attr,
2471         &sensor_dev_attr_temp3_beep.dev_attr.attr,
2472
2473         &sensor_dev_attr_temp4_input.dev_attr.attr,     /* 21 */
2474         &sensor_dev_attr_temp4_max.dev_attr.attr,
2475         &sensor_dev_attr_temp4_min.dev_attr.attr,
2476         &sensor_dev_attr_temp4_type.dev_attr.attr,
2477         &sensor_dev_attr_temp4_alarm.dev_attr.attr,
2478         &sensor_dev_attr_temp4_offset.dev_attr.attr,
2479         &sensor_dev_attr_temp4_beep.dev_attr.attr,
2480
2481         &sensor_dev_attr_temp5_input.dev_attr.attr,
2482         &sensor_dev_attr_temp5_max.dev_attr.attr,
2483         &sensor_dev_attr_temp5_min.dev_attr.attr,
2484         &sensor_dev_attr_temp5_type.dev_attr.attr,
2485         &sensor_dev_attr_temp5_alarm.dev_attr.attr,
2486         &sensor_dev_attr_temp5_offset.dev_attr.attr,
2487         &sensor_dev_attr_temp5_beep.dev_attr.attr,
2488
2489         &sensor_dev_attr_temp6_input.dev_attr.attr,
2490         &sensor_dev_attr_temp6_max.dev_attr.attr,
2491         &sensor_dev_attr_temp6_min.dev_attr.attr,
2492         &sensor_dev_attr_temp6_type.dev_attr.attr,
2493         &sensor_dev_attr_temp6_alarm.dev_attr.attr,
2494         &sensor_dev_attr_temp6_offset.dev_attr.attr,
2495         &sensor_dev_attr_temp6_beep.dev_attr.attr,
2496         NULL
2497 };
2498
2499 static const struct attribute_group it87_group_temp = {
2500         .attrs = it87_attributes_temp,
2501         .is_visible = it87_temp_is_visible,
2502 };
2503
2504 static umode_t it87_is_visible(struct kobject *kobj,
2505                                struct attribute *attr, int index)
2506 {
2507         struct device *dev = container_of(kobj, struct device, kobj);
2508         struct it87_data *data = dev_get_drvdata(dev);
2509
2510         if ((index == 2 || index == 3) && !data->has_vid)
2511                 return 0;
2512
2513         if (index > 3 && !(data->in_internal & BIT(index - 4)))
2514                 return 0;
2515
2516         return attr->mode;
2517 }
2518
2519 static struct attribute *it87_attributes[] = {
2520         &dev_attr_alarms.attr,
2521         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
2522         &dev_attr_vrm.attr,                             /* 2 */
2523         &dev_attr_cpu0_vid.attr,                        /* 3 */
2524         &sensor_dev_attr_in3_label.dev_attr.attr,       /* 4 .. 7 */
2525         &sensor_dev_attr_in7_label.dev_attr.attr,
2526         &sensor_dev_attr_in8_label.dev_attr.attr,
2527         &sensor_dev_attr_in9_label.dev_attr.attr,
2528         NULL
2529 };
2530
2531 static const struct attribute_group it87_group = {
2532         .attrs = it87_attributes,
2533         .is_visible = it87_is_visible,
2534 };
2535
2536 static umode_t it87_fan_is_visible(struct kobject *kobj,
2537                                    struct attribute *attr, int index)
2538 {
2539         struct device *dev = container_of(kobj, struct device, kobj);
2540         struct it87_data *data = dev_get_drvdata(dev);
2541         int i = index / 5;      /* fan index */
2542         int a = index % 5;      /* attribute index */
2543
2544         if (index >= 15) {      /* fan 4..6 don't have divisor attributes */
2545                 i = (index - 15) / 4 + 3;
2546                 a = (index - 15) % 4;
2547         }
2548
2549         if (!(data->has_fan & BIT(i)))
2550                 return 0;
2551
2552         if (a == 3) {                           /* beep */
2553                 if (!data->has_beep)
2554                         return 0;
2555                 /* first fan beep attribute is writable */
2556                 if (i == __ffs(data->has_fan))
2557                         return attr->mode | S_IWUSR;
2558         }
2559
2560         if (a == 4 && has_16bit_fans(data))     /* divisor */
2561                 return 0;
2562
2563         return attr->mode;
2564 }
2565
2566 static struct attribute *it87_attributes_fan[] = {
2567         &sensor_dev_attr_fan1_input.dev_attr.attr,
2568         &sensor_dev_attr_fan1_min.dev_attr.attr,
2569         &sensor_dev_attr_fan1_alarm.dev_attr.attr,
2570         &sensor_dev_attr_fan1_beep.dev_attr.attr,       /* 3 */
2571         &sensor_dev_attr_fan1_div.dev_attr.attr,        /* 4 */
2572
2573         &sensor_dev_attr_fan2_input.dev_attr.attr,
2574         &sensor_dev_attr_fan2_min.dev_attr.attr,
2575         &sensor_dev_attr_fan2_alarm.dev_attr.attr,
2576         &sensor_dev_attr_fan2_beep.dev_attr.attr,
2577         &sensor_dev_attr_fan2_div.dev_attr.attr,        /* 9 */
2578
2579         &sensor_dev_attr_fan3_input.dev_attr.attr,
2580         &sensor_dev_attr_fan3_min.dev_attr.attr,
2581         &sensor_dev_attr_fan3_alarm.dev_attr.attr,
2582         &sensor_dev_attr_fan3_beep.dev_attr.attr,
2583         &sensor_dev_attr_fan3_div.dev_attr.attr,        /* 14 */
2584
2585         &sensor_dev_attr_fan4_input.dev_attr.attr,      /* 15 */
2586         &sensor_dev_attr_fan4_min.dev_attr.attr,
2587         &sensor_dev_attr_fan4_alarm.dev_attr.attr,
2588         &sensor_dev_attr_fan4_beep.dev_attr.attr,
2589
2590         &sensor_dev_attr_fan5_input.dev_attr.attr,      /* 19 */
2591         &sensor_dev_attr_fan5_min.dev_attr.attr,
2592         &sensor_dev_attr_fan5_alarm.dev_attr.attr,
2593         &sensor_dev_attr_fan5_beep.dev_attr.attr,
2594
2595         &sensor_dev_attr_fan6_input.dev_attr.attr,      /* 23 */
2596         &sensor_dev_attr_fan6_min.dev_attr.attr,
2597         &sensor_dev_attr_fan6_alarm.dev_attr.attr,
2598         &sensor_dev_attr_fan6_beep.dev_attr.attr,
2599         NULL
2600 };
2601
2602 static const struct attribute_group it87_group_fan = {
2603         .attrs = it87_attributes_fan,
2604         .is_visible = it87_fan_is_visible,
2605 };
2606
2607 static umode_t it87_pwm_is_visible(struct kobject *kobj,
2608                                    struct attribute *attr, int index)
2609 {
2610         struct device *dev = container_of(kobj, struct device, kobj);
2611         struct it87_data *data = dev_get_drvdata(dev);
2612         int i = index / 4;      /* pwm index */
2613         int a = index % 4;      /* attribute index */
2614
2615         if (!(data->has_pwm & BIT(i)))
2616                 return 0;
2617
2618         /* pwmX_auto_channels_temp is only writable if auto pwm is supported */
2619         if (a == 3 && (has_old_autopwm(data) || has_newer_autopwm(data)))
2620                 return attr->mode | S_IWUSR;
2621
2622         /* pwm2_freq is writable if there are two pwm frequency selects */
2623         if (has_pwm_freq2(data) && i == 1 && a == 2)
2624                 return attr->mode | S_IWUSR;
2625
2626         return attr->mode;
2627 }
2628
2629 static struct attribute *it87_attributes_pwm[] = {
2630         &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2631         &sensor_dev_attr_pwm1.dev_attr.attr,
2632         &sensor_dev_attr_pwm1_freq.dev_attr.attr,
2633         &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
2634
2635         &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2636         &sensor_dev_attr_pwm2.dev_attr.attr,
2637         &sensor_dev_attr_pwm2_freq.dev_attr.attr,
2638         &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
2639
2640         &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2641         &sensor_dev_attr_pwm3.dev_attr.attr,
2642         &sensor_dev_attr_pwm3_freq.dev_attr.attr,
2643         &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
2644
2645         &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2646         &sensor_dev_attr_pwm4.dev_attr.attr,
2647         &sensor_dev_attr_pwm4_freq.dev_attr.attr,
2648         &sensor_dev_attr_pwm4_auto_channels_temp.dev_attr.attr,
2649
2650         &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2651         &sensor_dev_attr_pwm5.dev_attr.attr,
2652         &sensor_dev_attr_pwm5_freq.dev_attr.attr,
2653         &sensor_dev_attr_pwm5_auto_channels_temp.dev_attr.attr,
2654
2655         &sensor_dev_attr_pwm6_enable.dev_attr.attr,
2656         &sensor_dev_attr_pwm6.dev_attr.attr,
2657         &sensor_dev_attr_pwm6_freq.dev_attr.attr,
2658         &sensor_dev_attr_pwm6_auto_channels_temp.dev_attr.attr,
2659
2660         NULL
2661 };
2662
2663 static const struct attribute_group it87_group_pwm = {
2664         .attrs = it87_attributes_pwm,
2665         .is_visible = it87_pwm_is_visible,
2666 };
2667
2668 static umode_t it87_auto_pwm_is_visible(struct kobject *kobj,
2669                                         struct attribute *attr, int index)
2670 {
2671         struct device *dev = container_of(kobj, struct device, kobj);
2672         struct it87_data *data = dev_get_drvdata(dev);
2673         int i = index / 11;     /* pwm index */
2674         int a = index % 11;     /* attribute index */
2675
2676         if (index >= 33) {      /* pwm 4..6 */
2677                 i = (index - 33) / 6 + 3;
2678                 a = (index - 33) % 6 + 4;
2679         }
2680
2681         if (!(data->has_pwm & BIT(i)))
2682                 return 0;
2683
2684         if (has_newer_autopwm(data)) {
2685                 if (a < 4)      /* no auto point pwm */
2686                         return 0;
2687                 if (a == 8)     /* no auto_point4 */
2688                         return 0;
2689         }
2690         if (has_old_autopwm(data)) {
2691                 if (a >= 9)     /* no pwm_auto_start, pwm_auto_slope */
2692                         return 0;
2693         }
2694
2695         return attr->mode;
2696 }
2697
2698 static struct attribute *it87_attributes_auto_pwm[] = {
2699         &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
2700         &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
2701         &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
2702         &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
2703         &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
2704         &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
2705         &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
2706         &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
2707         &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
2708         &sensor_dev_attr_pwm1_auto_start.dev_attr.attr,
2709         &sensor_dev_attr_pwm1_auto_slope.dev_attr.attr,
2710
2711         &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,    /* 11 */
2712         &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
2713         &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
2714         &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
2715         &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
2716         &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
2717         &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
2718         &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
2719         &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
2720         &sensor_dev_attr_pwm2_auto_start.dev_attr.attr,
2721         &sensor_dev_attr_pwm2_auto_slope.dev_attr.attr,
2722
2723         &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,    /* 22 */
2724         &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
2725         &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
2726         &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
2727         &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
2728         &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
2729         &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
2730         &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
2731         &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
2732         &sensor_dev_attr_pwm3_auto_start.dev_attr.attr,
2733         &sensor_dev_attr_pwm3_auto_slope.dev_attr.attr,
2734
2735         &sensor_dev_attr_pwm4_auto_point1_temp.dev_attr.attr,   /* 33 */
2736         &sensor_dev_attr_pwm4_auto_point1_temp_hyst.dev_attr.attr,
2737         &sensor_dev_attr_pwm4_auto_point2_temp.dev_attr.attr,
2738         &sensor_dev_attr_pwm4_auto_point3_temp.dev_attr.attr,
2739         &sensor_dev_attr_pwm4_auto_start.dev_attr.attr,
2740         &sensor_dev_attr_pwm4_auto_slope.dev_attr.attr,
2741
2742         &sensor_dev_attr_pwm5_auto_point1_temp.dev_attr.attr,
2743         &sensor_dev_attr_pwm5_auto_point1_temp_hyst.dev_attr.attr,
2744         &sensor_dev_attr_pwm5_auto_point2_temp.dev_attr.attr,
2745         &sensor_dev_attr_pwm5_auto_point3_temp.dev_attr.attr,
2746         &sensor_dev_attr_pwm5_auto_start.dev_attr.attr,
2747         &sensor_dev_attr_pwm5_auto_slope.dev_attr.attr,
2748
2749         &sensor_dev_attr_pwm6_auto_point1_temp.dev_attr.attr,
2750         &sensor_dev_attr_pwm6_auto_point1_temp_hyst.dev_attr.attr,
2751         &sensor_dev_attr_pwm6_auto_point2_temp.dev_attr.attr,
2752         &sensor_dev_attr_pwm6_auto_point3_temp.dev_attr.attr,
2753         &sensor_dev_attr_pwm6_auto_start.dev_attr.attr,
2754         &sensor_dev_attr_pwm6_auto_slope.dev_attr.attr,
2755
2756         NULL,
2757 };
2758
2759 static const struct attribute_group it87_group_auto_pwm = {
2760         .attrs = it87_attributes_auto_pwm,
2761         .is_visible = it87_auto_pwm_is_visible,
2762 };
2763
2764 /* SuperIO detection - will change isa_address if a chip is found */
2765 static int __init it87_find(int sioaddr, unsigned short *address,
2766                             struct it87_sio_data *sio_data)
2767 {
2768         const struct it87_devices *config;
2769         bool doexit = true;
2770         u16 chip_type;
2771         int err;
2772
2773         err = superio_enter(sioaddr);
2774         if (err)
2775                 return err;
2776
2777         err = -ENODEV;
2778         chip_type = superio_inw(sioaddr, DEVID);
2779         if (chip_type == 0xffff)
2780                 goto exit;
2781
2782         if (force_id)
2783                 chip_type = force_id;
2784
2785         switch (chip_type) {
2786         case IT8705F_DEVID:
2787                 sio_data->type = it87;
2788                 break;
2789         case IT8712F_DEVID:
2790                 sio_data->type = it8712;
2791                 break;
2792         case IT8716F_DEVID:
2793         case IT8726F_DEVID:
2794                 sio_data->type = it8716;
2795                 break;
2796         case IT8718F_DEVID:
2797                 sio_data->type = it8718;
2798                 break;
2799         case IT8720F_DEVID:
2800                 sio_data->type = it8720;
2801                 break;
2802         case IT8721F_DEVID:
2803                 sio_data->type = it8721;
2804                 break;
2805         case IT8728F_DEVID:
2806                 sio_data->type = it8728;
2807                 break;
2808         case IT8732F_DEVID:
2809                 sio_data->type = it8732;
2810                 break;
2811         case IT8792E_DEVID:
2812                 sio_data->type = it8792;
2813                 /*
2814                  * Disabling configuration mode on IT8792E can result in system
2815                  * hang-ups and access failures to the Super-IO chip at the
2816                  * second SIO address. Never exit configuration mode on this
2817                  * chip to avoid the problem.
2818                  */
2819                 doexit = false;
2820                 break;
2821         case IT8771E_DEVID:
2822                 sio_data->type = it8771;
2823                 break;
2824         case IT8772E_DEVID:
2825                 sio_data->type = it8772;
2826                 break;
2827         case IT8781F_DEVID:
2828                 sio_data->type = it8781;
2829                 break;
2830         case IT8782F_DEVID:
2831                 sio_data->type = it8782;
2832                 break;
2833         case IT8783E_DEVID:
2834                 sio_data->type = it8783;
2835                 break;
2836         case IT8786E_DEVID:
2837                 sio_data->type = it8786;
2838                 break;
2839         case IT8790E_DEVID:
2840                 sio_data->type = it8790;
2841                 doexit = false;         /* See IT8792E comment above */
2842                 break;
2843         case IT8603E_DEVID:
2844         case IT8623E_DEVID:
2845                 sio_data->type = it8603;
2846                 break;
2847         case IT8607E_DEVID:
2848                 sio_data->type = it8607;
2849                 break;
2850         case IT8613E_DEVID:
2851                 sio_data->type = it8613;
2852                 break;
2853         case IT8620E_DEVID:
2854                 sio_data->type = it8620;
2855                 break;
2856         case IT8622E_DEVID:
2857                 sio_data->type = it8622;
2858                 break;
2859         case IT8625E_DEVID:
2860                 sio_data->type = it8625;
2861                 break;
2862         case IT8628E_DEVID:
2863                 sio_data->type = it8628;
2864                 break;
2865         case IT8655E_DEVID:
2866                 sio_data->type = it8655;
2867                 break;
2868         case IT8665E_DEVID:
2869                 sio_data->type = it8665;
2870                 break;
2871         case IT8686E_DEVID:
2872                 sio_data->type = it8686;
2873                 break;
2874         case 0xffff:    /* No device at all */
2875                 goto exit;
2876         default:
2877                 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
2878                 goto exit;
2879         }
2880
2881         superio_select(sioaddr, PME);
2882         if (!(superio_inb(sioaddr, IT87_ACT_REG) & 0x01)) {
2883                 pr_info("Device not activated, skipping\n");
2884                 goto exit;
2885         }
2886
2887         *address = superio_inw(sioaddr, IT87_BASE_REG) & ~(IT87_EXTENT - 1);
2888         if (*address == 0) {
2889                 pr_info("Base address not set, skipping\n");
2890                 goto exit;
2891         }
2892
2893         err = 0;
2894         sio_data->revision = superio_inb(sioaddr, DEVREV) & 0x0f;
2895         pr_info("Found IT%04x%s chip at 0x%x, revision %d\n", chip_type,
2896                 it87_devices[sio_data->type].suffix,
2897                 *address, sio_data->revision);
2898
2899         config = &it87_devices[sio_data->type];
2900
2901         /* in7 (VSB or VCCH5V) is always internal on some chips */
2902         if (has_in7_internal(config))
2903                 sio_data->internal |= BIT(1);
2904
2905         /* in8 (Vbat) is always internal */
2906         sio_data->internal |= BIT(2);
2907
2908         /* in9 (AVCC3), always internal if supported */
2909         if (has_avcc3(config))
2910                 sio_data->internal |= BIT(3); /* in9 is AVCC */
2911         else
2912                 sio_data->skip_in |= BIT(9);
2913
2914         if (!has_four_pwm(config))
2915                 sio_data->skip_pwm |= BIT(3) | BIT(4) | BIT(5);
2916         else if (!has_five_pwm(config))
2917                 sio_data->skip_pwm |= BIT(4) | BIT(5);
2918         else if (!has_six_pwm(config))
2919                 sio_data->skip_pwm |= BIT(5);
2920
2921         if (!has_vid(config))
2922                 sio_data->skip_vid = 1;
2923
2924         /* Read GPIO config and VID value from LDN 7 (GPIO) */
2925         if (sio_data->type == it87) {
2926                 /* The IT8705F has a different LD number for GPIO */
2927                 superio_select(sioaddr, 5);
2928                 sio_data->beep_pin = superio_inb(sioaddr,
2929                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2930         } else if (sio_data->type == it8783) {
2931                 int reg25, reg27, reg2a, reg2c, regef;
2932
2933                 superio_select(sioaddr, GPIO);
2934
2935                 reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2936                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2937                 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
2938                 reg2c = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2939                 regef = superio_inb(sioaddr, IT87_SIO_SPI_REG);
2940
2941                 /* Check if fan3 is there or not */
2942                 if ((reg27 & BIT(0)) || !(reg2c & BIT(2)))
2943                         sio_data->skip_fan |= BIT(2);
2944                 if ((reg25 & BIT(4)) ||
2945                     (!(reg2a & BIT(1)) && (regef & BIT(0))))
2946                         sio_data->skip_pwm |= BIT(2);
2947
2948                 /* Check if fan2 is there or not */
2949                 if (reg27 & BIT(7))
2950                         sio_data->skip_fan |= BIT(1);
2951                 if (reg27 & BIT(3))
2952                         sio_data->skip_pwm |= BIT(1);
2953
2954                 /* VIN5 */
2955                 if ((reg27 & BIT(0)) || (reg2c & BIT(2)))
2956                         sio_data->skip_in |= BIT(5); /* No VIN5 */
2957
2958                 /* VIN6 */
2959                 if (reg27 & BIT(1))
2960                         sio_data->skip_in |= BIT(6); /* No VIN6 */
2961
2962                 /*
2963                  * VIN7
2964                  * Does not depend on bit 2 of Reg2C, contrary to datasheet.
2965                  */
2966                 if (reg27 & BIT(2)) {
2967                         /*
2968                          * The data sheet is a bit unclear regarding the
2969                          * internal voltage divider for VCCH5V. It says
2970                          * "This bit enables and switches VIN7 (pin 91) to the
2971                          * internal voltage divider for VCCH5V".
2972                          * This is different to other chips, where the internal
2973                          * voltage divider would connect VIN7 to an internal
2974                          * voltage source. Maybe that is the case here as well.
2975                          *
2976                          * Since we don't know for sure, re-route it if that is
2977                          * not the case, and ask the user to report if the
2978                          * resulting voltage is sane.
2979                          */
2980                         if (!(reg2c & BIT(1))) {
2981                                 reg2c |= BIT(1);
2982                                 superio_outb(sioaddr, IT87_SIO_PINX2_REG,
2983                                              reg2c);
2984                                 pr_notice("Routing internal VCCH5V to in7.\n");
2985                         }
2986                         pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
2987                         pr_notice("Please report if it displays a reasonable voltage.\n");
2988                 }
2989
2990                 if (reg2c & BIT(0))
2991                         sio_data->internal |= BIT(0);
2992                 if (reg2c & BIT(1))
2993                         sio_data->internal |= BIT(1);
2994
2995                 sio_data->beep_pin = superio_inb(sioaddr,
2996                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2997         } else if (sio_data->type == it8603 || sio_data->type == it8607) {
2998                 int reg27, reg29;
2999
3000                 superio_select(sioaddr, GPIO);
3001
3002                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3003
3004                 /* Check if fan3 is there or not */
3005                 if (reg27 & BIT(6))
3006                         sio_data->skip_pwm |= BIT(2);
3007                 if (reg27 & BIT(7))
3008                         sio_data->skip_fan |= BIT(2);
3009
3010                 /* Check if fan2 is there or not */
3011                 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3012                 if (reg29 & BIT(1))
3013                         sio_data->skip_pwm |= BIT(1);
3014                 if (reg29 & BIT(2))
3015                         sio_data->skip_fan |= BIT(1);
3016
3017                 switch (sio_data->type) {
3018                 case it8603:
3019                         sio_data->skip_in |= BIT(5); /* No VIN5 */
3020                         sio_data->skip_in |= BIT(6); /* No VIN6 */
3021                         break;
3022                 case it8607:
3023                         sio_data->skip_pwm |= BIT(0);/* No fan1 */
3024                         sio_data->skip_fan |= BIT(0);
3025                 default:
3026                         break;
3027                 }
3028
3029                 sio_data->beep_pin = superio_inb(sioaddr,
3030                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3031         } else if (sio_data->type == it8613) {
3032                 int reg27, reg29, reg2a;
3033
3034                 superio_select(sioaddr, GPIO);
3035
3036                 /* Check for pwm3, fan3, pwm5, fan5 */
3037                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3038                 if (reg27 & BIT(1))
3039                         sio_data->skip_fan |= BIT(4);
3040                 if (reg27 & BIT(3))
3041                         sio_data->skip_pwm |= BIT(4);
3042                 if (reg27 & BIT(6))
3043                         sio_data->skip_pwm |= BIT(2);
3044                 if (reg27 & BIT(7))
3045                         sio_data->skip_fan |= BIT(2);
3046
3047                 /* Check for pwm2, fan2 */
3048                 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3049                 if (reg29 & BIT(1))
3050                         sio_data->skip_pwm |= BIT(1);
3051                 if (reg29 & BIT(2))
3052                         sio_data->skip_fan |= BIT(1);
3053
3054                 /* Check for pwm4, fan4 */
3055                 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
3056                 if (!(reg2a & BIT(0)) || (reg29 & BIT(7))) {
3057                         sio_data->skip_fan |= BIT(3);
3058                         sio_data->skip_pwm |= BIT(3);
3059                 }
3060
3061                 sio_data->skip_pwm |= BIT(0); /* No pwm1 */
3062                 sio_data->skip_fan |= BIT(0); /* No fan1 */
3063                 sio_data->skip_in |= BIT(3);  /* No VIN3 */
3064                 sio_data->skip_in |= BIT(6);  /* No VIN6 */
3065
3066                 sio_data->beep_pin = superio_inb(sioaddr,
3067                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3068         } else if (sio_data->type == it8620 || sio_data->type == it8628 ||
3069                    sio_data->type == it8686) {
3070                 int reg;
3071
3072                 superio_select(sioaddr, GPIO);
3073
3074                 /* Check for pwm5 */
3075                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
3076                 if (reg & BIT(6))
3077                         sio_data->skip_pwm |= BIT(4);
3078
3079                 /* Check for fan4, fan5 */
3080                 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
3081                 if (!(reg & BIT(5)))
3082                         sio_data->skip_fan |= BIT(3);
3083                 if (!(reg & BIT(4)))
3084                         sio_data->skip_fan |= BIT(4);
3085
3086                 /* Check for pwm3, fan3 */
3087                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3088                 if (reg & BIT(6))
3089                         sio_data->skip_pwm |= BIT(2);
3090                 if (reg & BIT(7))
3091                         sio_data->skip_fan |= BIT(2);
3092
3093                 /* Check for pwm4 */
3094                 reg = superio_inb(sioaddr, IT87_SIO_GPIO4_REG);
3095                 if (reg & BIT(2))
3096                         sio_data->skip_pwm |= BIT(3);
3097
3098                 /* Check for pwm2, fan2 */
3099                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3100                 if (reg & BIT(1))
3101                         sio_data->skip_pwm |= BIT(1);
3102                 if (reg & BIT(2))
3103                         sio_data->skip_fan |= BIT(1);
3104                 /* Check for pwm6, fan6 */
3105                 if (!(reg & BIT(7))) {
3106                         sio_data->skip_pwm |= BIT(5);
3107                         sio_data->skip_fan |= BIT(5);
3108                 }
3109
3110                 /* Check if AVCC is on VIN3 */
3111                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3112                 if (reg & BIT(0)) {
3113                         /* For it8686, the bit just enables AVCC3 */
3114                         if (sio_data->type != it8686)
3115                                 sio_data->internal |= BIT(0);
3116                 } else {
3117                         sio_data->internal &= ~BIT(3);
3118                         sio_data->skip_in |= BIT(9);
3119                 }
3120
3121                 sio_data->beep_pin = superio_inb(sioaddr,
3122                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3123         } else if (sio_data->type == it8622) {
3124                 int reg;
3125
3126                 superio_select(sioaddr, GPIO);
3127
3128                 /* Check for pwm4, fan4 */
3129                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
3130                 if (reg & BIT(6))
3131                         sio_data->skip_fan |= BIT(3);
3132                 if (reg & BIT(5))
3133                         sio_data->skip_pwm |= BIT(3);
3134
3135                 /* Check for pwm3, fan3, pwm5, fan5 */
3136                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3137                 if (reg & BIT(6))
3138                         sio_data->skip_pwm |= BIT(2);
3139                 if (reg & BIT(7))
3140                         sio_data->skip_fan |= BIT(2);
3141                 if (reg & BIT(3))
3142                         sio_data->skip_pwm |= BIT(4);
3143                 if (reg & BIT(1))
3144                         sio_data->skip_fan |= BIT(4);
3145
3146                 /* Check for pwm2, fan2 */
3147                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3148                 if (reg & BIT(1))
3149                         sio_data->skip_pwm |= BIT(1);
3150                 if (reg & BIT(2))
3151                         sio_data->skip_fan |= BIT(1);
3152
3153                 /* Check for AVCC */
3154                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3155                 if (!(reg & BIT(0)))
3156                         sio_data->skip_in |= BIT(9);
3157
3158                 sio_data->beep_pin = superio_inb(sioaddr,
3159                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3160         } else if (sio_data->type == it8732) {
3161                 int reg;
3162
3163                 superio_select(sioaddr, GPIO);
3164
3165                 /* Check for pwm2, fan2 */
3166                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3167                 if (reg & BIT(1))
3168                         sio_data->skip_pwm |= BIT(1);
3169                 if (reg & BIT(2))
3170                         sio_data->skip_fan |= BIT(1);
3171
3172                 /* Check for pwm3, fan3, fan4 */
3173                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3174                 if (reg & BIT(6))
3175                         sio_data->skip_pwm |= BIT(2);
3176                 if (reg & BIT(7))
3177                         sio_data->skip_fan |= BIT(2);
3178                 if (reg & BIT(5))
3179                         sio_data->skip_fan |= BIT(3);
3180
3181                 /* Check if AVCC is on VIN3 */
3182                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3183                 if (reg & BIT(0))
3184                         sio_data->internal |= BIT(0);
3185
3186                 sio_data->beep_pin = superio_inb(sioaddr,
3187                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3188         } else if (sio_data->type == it8655) {
3189                 int reg;
3190
3191                 superio_select(sioaddr, GPIO);
3192
3193                 /* Check for pwm2 */
3194                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3195                 if (reg & BIT(1))
3196                         sio_data->skip_pwm |= BIT(1);
3197
3198                 /* Check for fan2 */
3199                 reg = superio_inb(sioaddr, IT87_SIO_PINX4_REG);
3200                 if (reg & BIT(4))
3201                         sio_data->skip_fan |= BIT(1);
3202
3203                 /* Check for pwm3, fan3 */
3204                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3205                 if (reg & BIT(6))
3206                         sio_data->skip_pwm |= BIT(2);
3207                 if (reg & BIT(7))
3208                         sio_data->skip_fan |= BIT(2);
3209
3210                 sio_data->beep_pin = superio_inb(sioaddr,
3211                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3212         } else if (sio_data->type == it8665 || sio_data->type == it8625) {
3213                 int reg27, reg29, reg2d, regd3;
3214
3215                 superio_select(sioaddr, GPIO);
3216
3217                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3218                 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3219                 reg2d = superio_inb(sioaddr, IT87_SIO_PINX4_REG);
3220                 regd3 = superio_inb(sioaddr, IT87_SIO_GPIO9_REG);
3221
3222                 /* Check for pwm2, fan2 */
3223                 if (reg29 & BIT(1))
3224                         sio_data->skip_pwm |= BIT(1);
3225                 if (reg2d & BIT(4))
3226                         sio_data->skip_fan |= BIT(1);
3227
3228                 /* Check for pwm3, fan3 */
3229                 if (reg27 & BIT(6))
3230                         sio_data->skip_pwm |= BIT(2);
3231                 if (reg27 & BIT(7))
3232                         sio_data->skip_fan |= BIT(2);
3233
3234                 /* Check for pwm4, fan4, pwm5, fan5 */
3235                 if (sio_data->type == it8625) {
3236                         int reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
3237
3238                         if (reg25 & BIT(6))
3239                                 sio_data->skip_fan |= BIT(3);
3240                         if (reg25 & BIT(5))
3241                                 sio_data->skip_pwm |= BIT(3);
3242                         if (reg27 & BIT(3))
3243                                 sio_data->skip_pwm |= BIT(4);
3244                         if (reg27 & BIT(1))
3245                                 sio_data->skip_fan |= BIT(4);
3246                 } else {
3247                         int reg26 = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
3248
3249                         if (regd3 & BIT(2))
3250                                 sio_data->skip_pwm |= BIT(3);
3251                         if (regd3 & BIT(3))
3252                                 sio_data->skip_fan |= BIT(3);
3253                         if (reg26 & BIT(5))
3254                                 sio_data->skip_pwm |= BIT(4);
3255                         if (!(reg26 & BIT(4)))
3256                                 sio_data->skip_fan |= BIT(4);
3257                 }
3258
3259                 /* Check for pwm6, fan6 */
3260                 if (regd3 & BIT(0))
3261                         sio_data->skip_pwm |= BIT(5);
3262                 if (regd3 & BIT(1))
3263                         sio_data->skip_fan |= BIT(5);
3264
3265                 sio_data->beep_pin = superio_inb(sioaddr,
3266                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3267         } else {
3268                 int reg;
3269                 bool uart6;
3270
3271                 superio_select(sioaddr, GPIO);
3272
3273                 /* Check for fan4, fan5 */
3274                 if (has_five_fans(config)) {
3275                         reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
3276                         switch (sio_data->type) {
3277                         case it8718:
3278                                 if (reg & BIT(5))
3279                                         sio_data->skip_fan |= BIT(3);
3280                                 if (reg & BIT(4))
3281                                         sio_data->skip_fan |= BIT(4);
3282                                 break;
3283                         case it8720:
3284                         case it8721:
3285                         case it8728:
3286                                 if (!(reg & BIT(5)))
3287                                         sio_data->skip_fan |= BIT(3);
3288                                 if (!(reg & BIT(4)))
3289                                         sio_data->skip_fan |= BIT(4);
3290                                 break;
3291                         default:
3292                                 break;
3293                         }
3294                 }
3295
3296                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3297                 if (!sio_data->skip_vid) {
3298                         /* We need at least 4 VID pins */
3299                         if (reg & 0x0f) {
3300                                 pr_info("VID is disabled (pins used for GPIO)\n");
3301                                 sio_data->skip_vid = 1;
3302                         }
3303                 }
3304
3305                 /* Check if fan3 is there or not */
3306                 if (reg & BIT(6))
3307                         sio_data->skip_pwm |= BIT(2);
3308                 if (reg & BIT(7))
3309                         sio_data->skip_fan |= BIT(2);
3310
3311                 /* Check if fan2 is there or not */
3312                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3313                 if (reg & BIT(1))
3314                         sio_data->skip_pwm |= BIT(1);
3315                 if (reg & BIT(2))
3316                         sio_data->skip_fan |= BIT(1);
3317
3318                 if ((sio_data->type == it8718 || sio_data->type == it8720) &&
3319                     !(sio_data->skip_vid))
3320                         sio_data->vid_value = superio_inb(sioaddr,
3321                                                           IT87_SIO_VID_REG);
3322
3323                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3324
3325                 uart6 = sio_data->type == it8782 && (reg & BIT(2));
3326
3327                 /*
3328                  * The IT8720F has no VIN7 pin, so VCCH should always be
3329                  * routed internally to VIN7 with an internal divider.
3330                  * Curiously, there still is a configuration bit to control
3331                  * this, which means it can be set incorrectly. And even
3332                  * more curiously, many boards out there are improperly
3333                  * configured, even though the IT8720F datasheet claims
3334                  * that the internal routing of VCCH to VIN7 is the default
3335                  * setting. So we force the internal routing in this case.
3336                  *
3337                  * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
3338                  * If UART6 is enabled, re-route VIN7 to the internal divider
3339                  * if that is not already the case.
3340                  */
3341                 if ((sio_data->type == it8720 || uart6) && !(reg & BIT(1))) {
3342                         reg |= BIT(1);
3343                         superio_outb(sioaddr, IT87_SIO_PINX2_REG, reg);
3344                         pr_notice("Routing internal VCCH to in7\n");
3345                 }
3346                 if (reg & BIT(0))
3347                         sio_data->internal |= BIT(0);
3348                 if (reg & BIT(1))
3349                         sio_data->internal |= BIT(1);
3350
3351                 /*
3352                  * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
3353                  * While VIN7 can be routed to the internal voltage divider,
3354                  * VIN5 and VIN6 are not available if UART6 is enabled.
3355                  *
3356                  * Also, temp3 is not available if UART6 is enabled and TEMPIN3
3357                  * is the temperature source. Since we can not read the
3358                  * temperature source here, skip_temp is preliminary.
3359                  */
3360                 if (uart6) {
3361                         sio_data->skip_in |= BIT(5) | BIT(6);
3362                         sio_data->skip_temp |= BIT(2);
3363                 }
3364
3365                 sio_data->beep_pin = superio_inb(sioaddr,
3366                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3367         }
3368         if (sio_data->beep_pin)
3369                 pr_info("Beeping is supported\n");
3370
3371 exit:
3372         superio_exit(sioaddr, doexit);
3373         return err;
3374 }
3375
3376 static void it87_init_regs(struct platform_device *pdev)
3377 {
3378         struct it87_data *data = platform_get_drvdata(pdev);
3379
3380         /* Initialize chip specific register pointers */
3381         switch (data->type) {
3382         case it8628:
3383         case it8686:
3384                 data->REG_FAN = IT87_REG_FAN;
3385                 data->REG_FANX = IT87_REG_FANX;
3386                 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3387                 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3388                 data->REG_PWM = IT87_REG_PWM;
3389                 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET_8686;
3390                 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW_8686;
3391                 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH_8686;
3392                 break;
3393         case it8625:
3394         case it8655:
3395         case it8665:
3396                 data->REG_FAN = IT87_REG_FAN_8665;
3397                 data->REG_FANX = IT87_REG_FANX_8665;
3398                 data->REG_FAN_MIN = IT87_REG_FAN_MIN_8665;
3399                 data->REG_FANX_MIN = IT87_REG_FANX_MIN_8665;
3400                 data->REG_PWM = IT87_REG_PWM_8665;
3401                 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
3402                 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
3403                 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
3404                 break;
3405         case it8622:
3406                 data->REG_FAN = IT87_REG_FAN;
3407                 data->REG_FANX = IT87_REG_FANX;
3408                 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3409                 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3410                 data->REG_PWM = IT87_REG_PWM_8665;
3411                 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
3412                 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
3413                 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
3414                 break;
3415         case it8613:
3416                 data->REG_FAN = IT87_REG_FAN;
3417                 data->REG_FANX = IT87_REG_FANX;
3418                 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3419                 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3420                 data->REG_PWM = IT87_REG_PWM_8665;
3421                 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
3422                 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
3423                 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
3424                 break;
3425         default:
3426                 data->REG_FAN = IT87_REG_FAN;
3427                 data->REG_FANX = IT87_REG_FANX;
3428                 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3429                 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3430                 data->REG_PWM = IT87_REG_PWM;
3431                 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
3432                 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
3433                 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
3434                 break;
3435         }
3436 }
3437
3438 /* Called when we have found a new IT87. */
3439 static void it87_init_device(struct platform_device *pdev)
3440 {
3441         struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
3442         struct it87_data *data = platform_get_drvdata(pdev);
3443         int tmp, i;
3444         u8 mask;
3445
3446         if (has_new_tempmap(data)) {
3447                 data->pwm_temp_map_shift = 3;
3448                 data->pwm_temp_map_mask = 0x07;
3449         } else {
3450                 data->pwm_temp_map_shift = 0;
3451                 data->pwm_temp_map_mask = 0x03;
3452         }
3453
3454         /*
3455          * For each PWM channel:
3456          * - If it is in automatic mode, setting to manual mode should set
3457          *   the fan to full speed by default.
3458          * - If it is in manual mode, we need a mapping to temperature
3459          *   channels to use when later setting to automatic mode later.
3460          *   Map to the first sensor by default (we are clueless.)
3461          * In both cases, the value can (and should) be changed by the user
3462          * prior to switching to a different mode.
3463          * Note that this is no longer needed for the IT8721F and later, as
3464          * these have separate registers for the temperature mapping and the
3465          * manual duty cycle.
3466          */
3467         for (i = 0; i < NUM_AUTO_PWM; i++) {
3468                 data->pwm_temp_map[i] = 0;
3469                 data->pwm_duty[i] = 0x7f;       /* Full speed */
3470                 data->auto_pwm[i][3] = 0x7f;    /* Full speed, hard-coded */
3471         }
3472
3473         /*
3474          * Some chips seem to have default value 0xff for all limit
3475          * registers. For low voltage limits it makes no sense and triggers
3476          * alarms, so change to 0 instead. For high temperature limits, it
3477          * means -1 degree C, which surprisingly doesn't trigger an alarm,
3478          * but is still confusing, so change to 127 degrees C.
3479          */
3480         for (i = 0; i < NUM_VIN_LIMIT; i++) {
3481                 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
3482                 if (tmp == 0xff)
3483                         it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
3484         }
3485         for (i = 0; i < data->num_temp_limit; i++) {
3486                 tmp = it87_read_value(data, data->REG_TEMP_HIGH[i]);
3487                 if (tmp == 0xff)
3488                         it87_write_value(data, data->REG_TEMP_HIGH[i], 127);
3489         }
3490
3491         /*
3492          * Temperature channels are not forcibly enabled, as they can be
3493          * set to two different sensor types and we can't guess which one
3494          * is correct for a given system. These channels can be enabled at
3495          * run-time through the temp{1-3}_type sysfs accessors if needed.
3496          */
3497
3498         /* Check if voltage monitors are reset manually or by some reason */
3499         tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
3500         if ((tmp & 0xff) == 0) {
3501                 /* Enable all voltage monitors */
3502                 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
3503         }
3504
3505         /* Check if tachometers are reset manually or by some reason */
3506         mask = 0x70 & ~(sio_data->skip_fan << 4);
3507         data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
3508         if ((data->fan_main_ctrl & mask) == 0) {
3509                 /* Enable all fan tachometers */
3510                 data->fan_main_ctrl |= mask;
3511                 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
3512                                  data->fan_main_ctrl);
3513         }
3514         data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
3515
3516         tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
3517
3518         /* Set tachometers to 16-bit mode if needed */
3519         if (has_fan16_config(data)) {
3520                 if (~tmp & 0x07 & data->has_fan) {
3521                         dev_dbg(&pdev->dev,
3522                                 "Setting fan1-3 to 16-bit mode\n");
3523                         it87_write_value(data, IT87_REG_FAN_16BIT,
3524                                          tmp | 0x07);
3525                 }
3526         }
3527
3528         /* Check for additional fans */
3529         if (has_four_fans(data) && (tmp & BIT(4)))
3530                 data->has_fan |= BIT(3); /* fan4 enabled */
3531         if (has_five_fans(data) && (tmp & BIT(5)))
3532                 data->has_fan |= BIT(4); /* fan5 enabled */
3533         if (has_six_fans(data)) {
3534                 switch (data->type) {
3535                 case it8620:
3536                 case it8628:
3537                 case it8686:
3538                         if (tmp & BIT(2))
3539                                 data->has_fan |= BIT(5); /* fan6 enabled */
3540                         break;
3541                 case it8625:
3542                 case it8665:
3543                         tmp = it87_read_value(data, IT87_REG_FAN_DIV);
3544                         if (tmp & BIT(3))
3545                                 data->has_fan |= BIT(5); /* fan6 enabled */
3546                         break;
3547                 default:
3548                         break;
3549                 }
3550         }
3551
3552         /* Fan input pins may be used for alternative functions */
3553         data->has_fan &= ~sio_data->skip_fan;
3554
3555         /* Check if pwm6 is enabled */
3556         if (has_six_pwm(data)) {
3557                 switch (data->type) {
3558                 case it8620:
3559                 case it8686:
3560                         tmp = it87_read_value(data, IT87_REG_FAN_DIV);
3561                         if (!(tmp & BIT(3)))
3562                                 sio_data->skip_pwm |= BIT(5);
3563                         break;
3564                 default:
3565                         break;
3566                 }
3567         }
3568
3569         /* Start monitoring */
3570         it87_write_value(data, IT87_REG_CONFIG,
3571                          (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
3572                          | (update_vbat ? 0x41 : 0x01));
3573 }
3574
3575 /* Return 1 if and only if the PWM interface is safe to use */
3576 static int it87_check_pwm(struct device *dev)
3577 {
3578         struct it87_data *data = dev_get_drvdata(dev);
3579         /*
3580          * Some BIOSes fail to correctly configure the IT87 fans. All fans off
3581          * and polarity set to active low is sign that this is the case so we
3582          * disable pwm control to protect the user.
3583          */
3584         int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
3585
3586         if ((tmp & 0x87) == 0) {
3587                 if (fix_pwm_polarity) {
3588                         /*
3589                          * The user asks us to attempt a chip reconfiguration.
3590                          * This means switching to active high polarity and
3591                          * inverting all fan speed values.
3592                          */
3593                         int i;
3594                         u8 pwm[3];
3595
3596                         for (i = 0; i < ARRAY_SIZE(pwm); i++)
3597                                 pwm[i] = it87_read_value(data,
3598                                                          data->REG_PWM[i]);
3599
3600                         /*
3601                          * If any fan is in automatic pwm mode, the polarity
3602                          * might be correct, as suspicious as it seems, so we
3603                          * better don't change anything (but still disable the
3604                          * PWM interface).
3605                          */
3606                         if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
3607                                 dev_info(dev,
3608                                          "Reconfiguring PWM to active high polarity\n");
3609                                 it87_write_value(data, IT87_REG_FAN_CTL,
3610                                                  tmp | 0x87);
3611                                 for (i = 0; i < 3; i++)
3612                                         it87_write_value(data,
3613                                                          data->REG_PWM[i],
3614                                                          0x7f & ~pwm[i]);
3615                                 return 1;
3616                         }
3617
3618                         dev_info(dev,
3619                                  "PWM configuration is too broken to be fixed\n");
3620                 }
3621
3622                 dev_info(dev,
3623                          "Detected broken BIOS defaults, disabling PWM interface\n");
3624                 return 0;
3625         } else if (fix_pwm_polarity) {
3626                 dev_info(dev,
3627                          "PWM configuration looks sane, won't touch\n");
3628         }
3629
3630         return 1;
3631 }
3632
3633 static int it87_probe(struct platform_device *pdev)
3634 {
3635         struct it87_data *data;
3636         struct resource *res;
3637         struct device *dev = &pdev->dev;
3638         struct it87_sio_data *sio_data = dev_get_platdata(dev);
3639         int enable_pwm_interface;
3640         struct device *hwmon_dev;
3641
3642         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3643         if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
3644                                  DRVNAME)) {
3645                 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
3646                         (unsigned long)res->start,
3647                         (unsigned long)(res->start + IT87_EC_EXTENT - 1));
3648                 return -EBUSY;
3649         }
3650
3651         data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
3652         if (!data)
3653                 return -ENOMEM;
3654
3655         data->addr = res->start;
3656         data->type = sio_data->type;
3657         data->features = it87_devices[sio_data->type].features;
3658         data->num_temp_limit = it87_devices[sio_data->type].num_temp_limit;
3659         data->num_temp_offset = it87_devices[sio_data->type].num_temp_offset;
3660         data->pwm_num_temp_map = it87_devices[sio_data->type].num_temp_map;
3661         data->peci_mask = it87_devices[sio_data->type].peci_mask;
3662         data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
3663         data->bank = 0xff;
3664
3665         /*
3666          * IT8705F Datasheet 0.4.1, 3h == Version G.
3667          * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
3668          * These are the first revisions with 16-bit tachometer support.
3669          */
3670         switch (data->type) {
3671         case it87:
3672                 if (sio_data->revision >= 0x03) {
3673                         data->features &= ~FEAT_OLD_AUTOPWM;
3674                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS;
3675                 }
3676                 break;
3677         case it8712:
3678                 if (sio_data->revision >= 0x08) {
3679                         data->features &= ~FEAT_OLD_AUTOPWM;
3680                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS |
3681                                           FEAT_FIVE_FANS;
3682                 }
3683                 break;
3684         default:
3685                 break;
3686         }
3687
3688         /* Now, we do the remaining detection. */
3689         if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80) ||
3690             it87_read_value(data, IT87_REG_CHIPID) != 0x90)
3691                 return -ENODEV;
3692
3693         platform_set_drvdata(pdev, data);
3694
3695         mutex_init(&data->update_lock);
3696
3697         /* Initialize register pointers */
3698         it87_init_regs(pdev);
3699
3700         /* Check PWM configuration */
3701         enable_pwm_interface = it87_check_pwm(dev);
3702
3703         /* Starting with IT8721F, we handle scaling of internal voltages */
3704         if (has_scaling(data)) {
3705                 if (sio_data->internal & BIT(0))
3706                         data->in_scaled |= BIT(3);      /* in3 is AVCC */
3707                 if (sio_data->internal & BIT(1))
3708                         data->in_scaled |= BIT(7);      /* in7 is VSB */
3709                 if (sio_data->internal & BIT(2))
3710                         data->in_scaled |= BIT(8);      /* in8 is Vbat */
3711                 if (sio_data->internal & BIT(3))
3712                         data->in_scaled |= BIT(9);      /* in9 is AVCC */
3713         } else if (sio_data->type == it8781 || sio_data->type == it8782 ||
3714                    sio_data->type == it8783) {
3715                 if (sio_data->internal & BIT(0))
3716                         data->in_scaled |= BIT(3);      /* in3 is VCC5V */
3717                 if (sio_data->internal & BIT(1))
3718                         data->in_scaled |= BIT(7);      /* in7 is VCCH5V */
3719         }
3720
3721         data->has_temp = 0x07;
3722         if (sio_data->skip_temp & BIT(2)) {
3723                 if (sio_data->type == it8782 &&
3724                     !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
3725                         data->has_temp &= ~BIT(2);
3726         }
3727
3728         data->in_internal = sio_data->internal;
3729         data->has_in = 0x3ff & ~sio_data->skip_in;
3730
3731         if (has_six_temp(data)) {
3732                 u8 reg = it87_read_value(data, IT87_REG_TEMP456_ENABLE);
3733
3734                 /* Check for additional temperature sensors */
3735                 if ((reg & 0x03) >= 0x02)
3736                         data->has_temp |= BIT(3);
3737                 if (((reg >> 2) & 0x03) >= 0x02)
3738                         data->has_temp |= BIT(4);
3739                 if (((reg >> 4) & 0x03) >= 0x02)
3740                         data->has_temp |= BIT(5);
3741
3742                 /* Check for additional voltage sensors */
3743                 if ((reg & 0x03) == 0x01)
3744                         data->has_in |= BIT(10);
3745                 if (((reg >> 2) & 0x03) == 0x01)
3746                         data->has_in |= BIT(11);
3747                 if (((reg >> 4) & 0x03) == 0x01)
3748                         data->has_in |= BIT(12);
3749         }
3750
3751         data->has_beep = !!sio_data->beep_pin;
3752
3753         /* Initialize the IT87 chip */
3754         it87_init_device(pdev);
3755
3756         if (!sio_data->skip_vid) {
3757                 data->has_vid = true;
3758                 data->vrm = vid_which_vrm();
3759                 /* VID reading from Super-I/O config space if available */
3760                 data->vid = sio_data->vid_value;
3761         }
3762
3763         /* Prepare for sysfs hooks */
3764         data->groups[0] = &it87_group;
3765         data->groups[1] = &it87_group_in;
3766         data->groups[2] = &it87_group_temp;
3767         data->groups[3] = &it87_group_fan;
3768
3769         if (enable_pwm_interface) {
3770                 data->has_pwm = BIT(ARRAY_SIZE(IT87_REG_PWM)) - 1;
3771                 data->has_pwm &= ~sio_data->skip_pwm;
3772
3773                 data->groups[4] = &it87_group_pwm;
3774                 if (has_old_autopwm(data) || has_newer_autopwm(data))
3775                         data->groups[5] = &it87_group_auto_pwm;
3776         }
3777
3778         hwmon_dev = devm_hwmon_device_register_with_groups(dev,
3779                                         it87_devices[sio_data->type].name,
3780                                         data, data->groups);
3781         return PTR_ERR_OR_ZERO(hwmon_dev);
3782 }
3783
3784 static struct platform_driver it87_driver = {
3785         .driver = {
3786                 .name   = DRVNAME,
3787         },
3788         .probe  = it87_probe,
3789 };
3790
3791 static int __init it87_device_add(int index, unsigned short address,
3792                                   const struct it87_sio_data *sio_data)
3793 {
3794         struct platform_device *pdev;
3795         struct resource res = {
3796                 .start  = address + IT87_EC_OFFSET,
3797                 .end    = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
3798                 .name   = DRVNAME,
3799                 .flags  = IORESOURCE_IO,
3800         };
3801         int err;
3802
3803         err = acpi_check_resource_conflict(&res);
3804         if (err)
3805                 return err;
3806
3807         pdev = platform_device_alloc(DRVNAME, address);
3808         if (!pdev)
3809                 return -ENOMEM;
3810
3811         err = platform_device_add_resources(pdev, &res, 1);
3812         if (err) {
3813                 pr_err("Device resource addition failed (%d)\n", err);
3814                 goto exit_device_put;
3815         }
3816
3817         err = platform_device_add_data(pdev, sio_data,
3818                                        sizeof(struct it87_sio_data));
3819         if (err) {
3820                 pr_err("Platform data allocation failed\n");
3821                 goto exit_device_put;
3822         }
3823
3824         err = platform_device_add(pdev);
3825         if (err) {
3826                 pr_err("Device addition failed (%d)\n", err);
3827                 goto exit_device_put;
3828         }
3829
3830         it87_pdev[index] = pdev;
3831         return 0;
3832
3833 exit_device_put:
3834         platform_device_put(pdev);
3835         return err;
3836 }
3837
3838 struct it87_dmi_data {
3839         bool sio2_force_config; /* force sio2 into configuration mode   */
3840         u8 skip_pwm;            /* pwm channels to skip for this board  */
3841 };
3842
3843 /*
3844  * On various Gigabyte AM4 boards (AB350, AX370), the second Super-IO chip
3845  * (IT8792E) needs to be in configuration mode before accessing the first
3846  * due to a bug in IT8792E which otherwise results in LPC bus access errors.
3847  * This needs to be done before accessing the first Super-IO chip since
3848  * the second chip may have been accessed prior to loading this driver.
3849  *
3850  * The problem is also reported to affect IT8795E, which is used on X299 boards
3851  * and has the same chip ID as IT9792E (0x8733). It also appears to affect
3852  * systems with IT8790E, which is used on some Z97X-Gaming boards as well as
3853  * Z87X-OC.
3854  * DMI entries for those systems will be added as they become available and
3855  * as the problem is confirmed to affect those boards.
3856  */
3857 static struct it87_dmi_data gigabyte_sio2_force = {
3858         .sio2_force_config = true,
3859 };
3860
3861 /*
3862  * On the Shuttle SN68PT, FAN_CTL2 is apparently not
3863  * connected to a fan, but to something else. One user
3864  * has reported instant system power-off when changing
3865  * the PWM2 duty cycle, so we disable it.
3866  * I use the board name string as the trigger in case
3867  * the same board is ever used in other systems.
3868  */
3869 static struct it87_dmi_data nvidia_fn68pt = {
3870         .skip_pwm = BIT(1),
3871 };
3872
3873 static const struct dmi_system_id it87_dmi_table[] __initconst = {
3874         {
3875                 .matches = {
3876                         DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."),
3877                         DMI_MATCH(DMI_BOARD_NAME, "AB350"),
3878                 },
3879                 .driver_data = &gigabyte_sio2_force,
3880         },
3881         {
3882                 .matches = {
3883                         DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."),
3884                         DMI_MATCH(DMI_BOARD_NAME, "AX370"),
3885                 },
3886                 .driver_data = &gigabyte_sio2_force,
3887         },
3888         {
3889                 .matches = {
3890                         DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."),
3891                         DMI_MATCH(DMI_BOARD_NAME, "Z97X-Gaming G1"),
3892                 },
3893                 .driver_data = &gigabyte_sio2_force,
3894         },
3895         {
3896                 .matches = {
3897                         DMI_MATCH(DMI_BOARD_VENDOR, "nVIDIA"),
3898                         DMI_MATCH(DMI_BOARD_NAME, "FN68PT"),
3899                 },
3900                 .driver_data = &nvidia_fn68pt,
3901         },
3902         { }
3903 };
3904
3905 static int __init sm_it87_init(void)
3906 {
3907         const struct dmi_system_id *dmi = dmi_first_match(it87_dmi_table);
3908         struct it87_dmi_data *dmi_data = NULL;
3909         int sioaddr[2] = { REG_2E, REG_4E };
3910         struct it87_sio_data sio_data;
3911         unsigned short isa_address;
3912         bool found = false;
3913         int i, err;
3914
3915         if (dmi)
3916                 dmi_data = dmi->driver_data;
3917
3918         err = platform_driver_register(&it87_driver);
3919         if (err)
3920                 return err;
3921
3922         if (dmi_data && dmi_data->sio2_force_config)
3923                 __superio_enter(REG_4E);
3924
3925         for (i = 0; i < ARRAY_SIZE(sioaddr); i++) {
3926                 memset(&sio_data, 0, sizeof(struct it87_sio_data));
3927                 isa_address = 0;
3928                 err = it87_find(sioaddr[i], &isa_address, &sio_data);
3929                 if (err || isa_address == 0)
3930                         continue;
3931
3932                 if (dmi_data)
3933                         sio_data.skip_pwm |= dmi_data->skip_pwm;
3934                 err = it87_device_add(i, isa_address, &sio_data);
3935                 if (err)
3936                         goto exit_dev_unregister;
3937                 found = true;
3938         }
3939
3940         if (!found) {
3941                 err = -ENODEV;
3942                 goto exit_unregister;
3943         }
3944         return 0;
3945
3946 exit_dev_unregister:
3947         /* NULL check handled by platform_device_unregister */
3948         platform_device_unregister(it87_pdev[0]);
3949 exit_unregister:
3950         platform_driver_unregister(&it87_driver);
3951         return err;
3952 }
3953
3954 static void __exit sm_it87_exit(void)
3955 {
3956         /* NULL check handled by platform_device_unregister */
3957         platform_device_unregister(it87_pdev[1]);
3958         platform_device_unregister(it87_pdev[0]);
3959         platform_driver_unregister(&it87_driver);
3960 }
3961
3962 MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>");
3963 MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
3964 module_param(update_vbat, bool, 0);
3965 MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
3966 module_param(fix_pwm_polarity, bool, 0);
3967 MODULE_PARM_DESC(fix_pwm_polarity,
3968                  "Force PWM polarity to active high (DANGEROUS)");
3969 MODULE_LICENSE("GPL");
3970
3971 module_init(sm_it87_init);
3972 module_exit(sm_it87_exit);