2 * it87.c - Part of lm_sensors, Linux kernel modules for hardware
5 * The IT8705F is an LPC-based Super I/O part that contains UARTs, a
6 * parallel port, an IR port, a MIDI port, a floppy controller, etc., in
7 * addition to an Environment Controller (Enhanced Hardware Monitor and
10 * This driver supports only the Environment Controller in the IT8705F and
11 * similar parts. The other devices are supported by different drivers.
13 * Supports: IT8603E Super I/O chip w/LPC interface
14 * IT8620E Super I/O chip w/LPC interface
15 * IT8622E Super I/O chip w/LPC interface
16 * IT8623E Super I/O chip w/LPC interface
17 * IT8628E Super I/O chip w/LPC interface
18 * IT8705F Super I/O chip w/LPC interface
19 * IT8712F Super I/O chip w/LPC interface
20 * IT8716F Super I/O chip w/LPC interface
21 * IT8718F Super I/O chip w/LPC interface
22 * IT8720F Super I/O chip w/LPC interface
23 * IT8721F Super I/O chip w/LPC interface
24 * IT8726F Super I/O chip w/LPC interface
25 * IT8728F Super I/O chip w/LPC interface
26 * IT8732F Super I/O chip w/LPC interface
27 * IT8758E Super I/O chip w/LPC interface
28 * IT8771E Super I/O chip w/LPC interface
29 * IT8772E Super I/O chip w/LPC interface
30 * IT8781F Super I/O chip w/LPC interface
31 * IT8782F Super I/O chip w/LPC interface
32 * IT8783E/F Super I/O chip w/LPC interface
33 * IT8786E Super I/O chip w/LPC interface
34 * IT8790E Super I/O chip w/LPC interface
35 * Sis950 A clone of the IT8705F
37 * Copyright (C) 2001 Chris Gauthron
38 * Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de>
40 * This program is free software; you can redistribute it and/or modify
41 * it under the terms of the GNU General Public License as published by
42 * the Free Software Foundation; either version 2 of the License, or
43 * (at your option) any later version.
45 * This program is distributed in the hope that it will be useful,
46 * but WITHOUT ANY WARRANTY; without even the implied warranty of
47 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
48 * GNU General Public License for more details.
51 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
53 #include <linux/bitops.h>
54 #include <linux/module.h>
55 #include <linux/init.h>
56 #include <linux/slab.h>
57 #include <linux/jiffies.h>
58 #include <linux/platform_device.h>
59 #include <linux/hwmon.h>
60 #include <linux/hwmon-sysfs.h>
61 #include <linux/hwmon-vid.h>
62 #include <linux/err.h>
63 #include <linux/mutex.h>
64 #include <linux/sysfs.h>
65 #include <linux/string.h>
66 #include <linux/dmi.h>
67 #include <linux/acpi.h>
71 #define DRVNAME "it87"
73 enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732,
74 it8771, it8772, it8781, it8782, it8783, it8786, it8790, it8603,
75 it8620, it8622, it8628 };
77 static unsigned short force_id;
78 module_param(force_id, ushort, 0);
79 MODULE_PARM_DESC(force_id, "Override the detected device ID");
81 static struct platform_device *it87_pdev[2];
83 #define REG_2E 0x2e /* The register to read/write */
84 #define REG_4E 0x4e /* Secondary register to read/write */
86 #define DEV 0x07 /* Register: Logical device select */
87 #define PME 0x04 /* The device with the fan registers in it */
89 /* The device with the IT8718F/IT8720F VID value in it */
92 #define DEVID 0x20 /* Register: Device ID */
93 #define DEVREV 0x22 /* Register: Device Revision */
95 static inline int superio_inb(int ioreg, int reg)
98 return inb(ioreg + 1);
101 static inline void superio_outb(int ioreg, int reg, int val)
104 outb(val, ioreg + 1);
107 static int superio_inw(int ioreg, int reg)
112 val = inb(ioreg + 1) << 8;
114 val |= inb(ioreg + 1);
118 static inline void superio_select(int ioreg, int ldn)
121 outb(ldn, ioreg + 1);
124 static inline int superio_enter(int ioreg)
127 * Try to reserve ioreg and ioreg + 1 for exclusive access.
129 if (!request_muxed_region(ioreg, 2, DRVNAME))
135 outb(ioreg == REG_4E ? 0xaa : 0x55, ioreg);
139 static inline void superio_exit(int ioreg)
142 outb(0x02, ioreg + 1);
143 release_region(ioreg, 2);
146 /* Logical device 4 registers */
147 #define IT8712F_DEVID 0x8712
148 #define IT8705F_DEVID 0x8705
149 #define IT8716F_DEVID 0x8716
150 #define IT8718F_DEVID 0x8718
151 #define IT8720F_DEVID 0x8720
152 #define IT8721F_DEVID 0x8721
153 #define IT8726F_DEVID 0x8726
154 #define IT8728F_DEVID 0x8728
155 #define IT8732F_DEVID 0x8732
156 #define IT8771E_DEVID 0x8771
157 #define IT8772E_DEVID 0x8772
158 #define IT8781F_DEVID 0x8781
159 #define IT8782F_DEVID 0x8782
160 #define IT8783E_DEVID 0x8783
161 #define IT8786E_DEVID 0x8786
162 #define IT8790E_DEVID 0x8790
163 #define IT8603E_DEVID 0x8603
164 #define IT8620E_DEVID 0x8620
165 #define IT8622E_DEVID 0x8622
166 #define IT8623E_DEVID 0x8623
167 #define IT8628E_DEVID 0x8628
168 #define IT87_ACT_REG 0x30
169 #define IT87_BASE_REG 0x60
171 /* Logical device 7 registers (IT8712F and later) */
172 #define IT87_SIO_GPIO1_REG 0x25
173 #define IT87_SIO_GPIO2_REG 0x26
174 #define IT87_SIO_GPIO3_REG 0x27
175 #define IT87_SIO_GPIO4_REG 0x28
176 #define IT87_SIO_GPIO5_REG 0x29
177 #define IT87_SIO_PINX1_REG 0x2a /* Pin selection */
178 #define IT87_SIO_PINX2_REG 0x2c /* Pin selection */
179 #define IT87_SIO_SPI_REG 0xef /* SPI function pin select */
180 #define IT87_SIO_VID_REG 0xfc /* VID value */
181 #define IT87_SIO_BEEP_PIN_REG 0xf6 /* Beep pin mapping */
183 /* Update battery voltage after every reading if true */
184 static bool update_vbat;
186 /* Not all BIOSes properly configure the PWM registers */
187 static bool fix_pwm_polarity;
189 /* Many IT87 constants specified below */
191 /* Length of ISA address segment */
192 #define IT87_EXTENT 8
194 /* Length of ISA address segment for Environmental Controller */
195 #define IT87_EC_EXTENT 2
197 /* Offset of EC registers from ISA base address */
198 #define IT87_EC_OFFSET 5
200 /* Where are the ISA address/data registers relative to the EC base address */
201 #define IT87_ADDR_REG_OFFSET 0
202 #define IT87_DATA_REG_OFFSET 1
204 /*----- The IT87 registers -----*/
206 #define IT87_REG_CONFIG 0x00
208 #define IT87_REG_ALARM1 0x01
209 #define IT87_REG_ALARM2 0x02
210 #define IT87_REG_ALARM3 0x03
213 * The IT8718F and IT8720F have the VID value in a different register, in
214 * Super-I/O configuration space.
216 #define IT87_REG_VID 0x0a
218 * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
219 * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
222 #define IT87_REG_FAN_DIV 0x0b
223 #define IT87_REG_FAN_16BIT 0x0c
227 * - up to 13 voltage (0 to 7, battery, avcc, 10 to 12)
228 * - up to 6 temp (1 to 6)
229 * - up to 6 fan (1 to 6)
232 static const u8 IT87_REG_FAN[] = { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c };
233 static const u8 IT87_REG_FAN_MIN[] = { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e };
234 static const u8 IT87_REG_FANX[] = { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d };
235 static const u8 IT87_REG_FANX_MIN[] = { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f };
236 static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59 };
238 #define IT87_REG_FAN_MAIN_CTRL 0x13
239 #define IT87_REG_FAN_CTL 0x14
240 static const u8 IT87_REG_PWM[] = { 0x15, 0x16, 0x17, 0x7f, 0xa7, 0xaf };
241 static const u8 IT87_REG_PWM_DUTY[] = { 0x63, 0x6b, 0x73, 0x7b, 0xa3, 0xab };
243 static const u8 IT87_REG_VIN[] = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26,
244 0x27, 0x28, 0x2f, 0x2c, 0x2d, 0x2e };
246 #define IT87_REG_TEMP(nr) (0x29 + (nr))
248 #define IT87_REG_VIN_MAX(nr) (0x30 + (nr) * 2)
249 #define IT87_REG_VIN_MIN(nr) (0x31 + (nr) * 2)
250 #define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
251 #define IT87_REG_TEMP_LOW(nr) (0x41 + (nr) * 2)
253 #define IT87_REG_VIN_ENABLE 0x50
254 #define IT87_REG_TEMP_ENABLE 0x51
255 #define IT87_REG_TEMP_EXTRA 0x55
256 #define IT87_REG_BEEP_ENABLE 0x5c
258 #define IT87_REG_CHIPID 0x58
260 static const u8 IT87_REG_AUTO_BASE[] = { 0x60, 0x68, 0x70, 0x78, 0xa0, 0xa8 };
262 #define IT87_REG_AUTO_TEMP(nr, i) (IT87_REG_AUTO_BASE[nr] + (i))
263 #define IT87_REG_AUTO_PWM(nr, i) (IT87_REG_AUTO_BASE[nr] + 5 + (i))
265 #define IT87_REG_TEMP456_ENABLE 0x77
267 #define NUM_VIN ARRAY_SIZE(IT87_REG_VIN)
268 #define NUM_VIN_LIMIT 8
270 #define NUM_TEMP_OFFSET ARRAY_SIZE(IT87_REG_TEMP_OFFSET)
271 #define NUM_TEMP_LIMIT 3
272 #define NUM_FAN ARRAY_SIZE(IT87_REG_FAN)
273 #define NUM_FAN_DIV 3
274 #define NUM_PWM ARRAY_SIZE(IT87_REG_PWM)
275 #define NUM_AUTO_PWM ARRAY_SIZE(IT87_REG_PWM)
277 struct it87_devices {
279 const char * const suffix;
285 #define FEAT_12MV_ADC BIT(0)
286 #define FEAT_NEWER_AUTOPWM BIT(1)
287 #define FEAT_OLD_AUTOPWM BIT(2)
288 #define FEAT_16BIT_FANS BIT(3)
289 #define FEAT_TEMP_OFFSET BIT(4)
290 #define FEAT_TEMP_PECI BIT(5)
291 #define FEAT_TEMP_OLD_PECI BIT(6)
292 #define FEAT_FAN16_CONFIG BIT(7) /* Need to enable 16-bit fans */
293 #define FEAT_FIVE_FANS BIT(8) /* Supports five fans */
294 #define FEAT_VID BIT(9) /* Set if chip supports VID */
295 #define FEAT_IN7_INTERNAL BIT(10) /* Set if in7 is internal */
296 #define FEAT_SIX_FANS BIT(11) /* Supports six fans */
297 #define FEAT_10_9MV_ADC BIT(12)
298 #define FEAT_AVCC3 BIT(13) /* Chip supports in9/AVCC3 */
299 #define FEAT_FIVE_PWM BIT(14) /* Chip supports 5 pwm chn */
300 #define FEAT_SIX_PWM BIT(15) /* Chip supports 6 pwm chn */
301 #define FEAT_PWM_FREQ2 BIT(16) /* Separate pwm freq 2 */
302 #define FEAT_SIX_TEMP BIT(17) /* Up to 6 temp sensors */
303 #define FEAT_VIN3_5V BIT(18) /* VIN3 connected to +5V */
305 static const struct it87_devices it87_devices[] = {
309 .features = FEAT_OLD_AUTOPWM, /* may need to overwrite */
314 .features = FEAT_OLD_AUTOPWM | FEAT_VID,
315 /* may need to overwrite */
320 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
321 | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2,
326 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
327 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
329 .old_peci_mask = 0x4,
334 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
335 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
337 .old_peci_mask = 0x4,
342 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
343 | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
344 | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL
347 .old_peci_mask = 0x02, /* Actually reports PCH */
352 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
353 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
354 | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2,
360 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
361 | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
362 | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL,
364 .old_peci_mask = 0x02, /* Actually reports PCH */
369 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
370 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
372 /* PECI: guesswork */
374 /* 16 bit fans (OHM) */
375 /* three fans, always 16 bit (guesswork) */
381 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
382 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
384 /* PECI (coreboot) */
385 /* 12mV ADC (HWSensors4, OHM) */
386 /* 16 bit fans (HWSensors4, OHM) */
387 /* three fans, always 16 bit (datasheet) */
393 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
394 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
395 .old_peci_mask = 0x4,
400 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
401 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
402 .old_peci_mask = 0x4,
407 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
408 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
409 .old_peci_mask = 0x4,
414 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
415 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
422 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
423 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
430 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
431 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
432 | FEAT_AVCC3 | FEAT_PWM_FREQ2,
438 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
439 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
440 | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
441 | FEAT_SIX_TEMP | FEAT_VIN3_5V,
447 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
448 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
449 | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
450 | FEAT_AVCC3 | FEAT_VIN3_5V,
456 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
457 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
458 | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
459 | FEAT_SIX_TEMP | FEAT_VIN3_5V,
464 #define has_16bit_fans(data) ((data)->features & FEAT_16BIT_FANS)
465 #define has_12mv_adc(data) ((data)->features & FEAT_12MV_ADC)
466 #define has_10_9mv_adc(data) ((data)->features & FEAT_10_9MV_ADC)
467 #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
468 #define has_old_autopwm(data) ((data)->features & FEAT_OLD_AUTOPWM)
469 #define has_temp_offset(data) ((data)->features & FEAT_TEMP_OFFSET)
470 #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \
471 ((data)->peci_mask & BIT(nr)))
472 #define has_temp_old_peci(data, nr) \
473 (((data)->features & FEAT_TEMP_OLD_PECI) && \
474 ((data)->old_peci_mask & BIT(nr)))
475 #define has_fan16_config(data) ((data)->features & FEAT_FAN16_CONFIG)
476 #define has_five_fans(data) ((data)->features & (FEAT_FIVE_FANS | \
478 #define has_vid(data) ((data)->features & FEAT_VID)
479 #define has_in7_internal(data) ((data)->features & FEAT_IN7_INTERNAL)
480 #define has_six_fans(data) ((data)->features & FEAT_SIX_FANS)
481 #define has_avcc3(data) ((data)->features & FEAT_AVCC3)
482 #define has_five_pwm(data) ((data)->features & (FEAT_FIVE_PWM \
484 #define has_six_pwm(data) ((data)->features & FEAT_SIX_PWM)
485 #define has_pwm_freq2(data) ((data)->features & FEAT_PWM_FREQ2)
486 #define has_six_temp(data) ((data)->features & FEAT_SIX_TEMP)
487 #define has_vin3_5v(data) ((data)->features & FEAT_VIN3_5V)
489 struct it87_sio_data {
491 /* Values read from Super-I/O config space */
495 u8 internal; /* Internal sensors can be labeled */
496 /* Features skipped based on config or DMI */
505 * For each registered chip, we need to keep some data in memory.
506 * The structure is dynamically allocated.
509 const struct attribute_group *groups[7];
517 struct mutex update_lock;
518 char valid; /* !=0 if following fields are valid */
519 unsigned long last_updated; /* In jiffies */
521 u16 in_scaled; /* Internal voltage sensors are scaled */
522 u16 in_internal; /* Bitfield, internal sensors (for labels) */
523 u16 has_in; /* Bitfield, voltage sensors enabled */
524 u8 in[NUM_VIN][3]; /* [nr][0]=in, [1]=min, [2]=max */
525 u8 has_fan; /* Bitfield, fans enabled */
526 u16 fan[NUM_FAN][2]; /* Register values, [nr][0]=fan, [1]=min */
527 u8 has_temp; /* Bitfield, temp sensors enabled */
528 s8 temp[NUM_TEMP][4]; /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
529 u8 sensor; /* Register value (IT87_REG_TEMP_ENABLE) */
530 u8 extra; /* Register value (IT87_REG_TEMP_EXTRA) */
531 u8 fan_div[NUM_FAN_DIV];/* Register encoding, shifted right */
532 bool has_vid; /* True if VID supported */
533 u8 vid; /* Register encoding, combined */
535 u32 alarms; /* Register encoding, combined */
536 bool has_beep; /* true if beep supported */
537 u8 beeps; /* Register encoding */
538 u8 fan_main_ctrl; /* Register value */
539 u8 fan_ctl; /* Register value */
542 * The following 3 arrays correspond to the same registers up to
543 * the IT8720F. The meaning of bits 6-0 depends on the value of bit
544 * 7, and we want to preserve settings on mode changes, so we have
545 * to track all values separately.
546 * Starting with the IT8721F, the manual PWM duty cycles are stored
547 * in separate registers (8-bit values), so the separate tracking
548 * is no longer needed, but it is still done to keep the driver
551 u8 has_pwm; /* Bitfield, pwm control enabled */
552 u8 pwm_ctrl[NUM_PWM]; /* Register value */
553 u8 pwm_duty[NUM_PWM]; /* Manual PWM value set by user */
554 u8 pwm_temp_map[NUM_PWM];/* PWM to temp. chan. mapping (bits 1-0) */
556 /* Automatic fan speed control registers */
557 u8 auto_pwm[NUM_AUTO_PWM][4]; /* [nr][3] is hard-coded */
558 s8 auto_temp[NUM_AUTO_PWM][5]; /* [nr][0] is point1_temp_hyst */
561 static int adc_lsb(const struct it87_data *data, int nr)
565 if (has_12mv_adc(data))
567 else if (has_10_9mv_adc(data))
571 if (data->in_scaled & BIT(nr))
576 static u8 in_to_reg(const struct it87_data *data, int nr, long val)
578 val = DIV_ROUND_CLOSEST(val * 10, adc_lsb(data, nr));
579 return clamp_val(val, 0, 255);
582 static int in_from_reg(const struct it87_data *data, int nr, int val)
584 return DIV_ROUND_CLOSEST(val * adc_lsb(data, nr), 10);
587 static inline u8 FAN_TO_REG(long rpm, int div)
591 rpm = clamp_val(rpm, 1, 1000000);
592 return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
595 static inline u16 FAN16_TO_REG(long rpm)
599 return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
602 #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
603 1350000 / ((val) * (div)))
604 /* The divider is fixed to 2 in 16-bit mode */
605 #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
606 1350000 / ((val) * 2))
608 #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \
609 ((val) + 500) / 1000), -128, 127))
610 #define TEMP_FROM_REG(val) ((val) * 1000)
612 static u8 pwm_to_reg(const struct it87_data *data, long val)
614 if (has_newer_autopwm(data))
620 static int pwm_from_reg(const struct it87_data *data, u8 reg)
622 if (has_newer_autopwm(data))
625 return (reg & 0x7f) << 1;
628 static int DIV_TO_REG(int val)
632 while (answer < 7 && (val >>= 1))
637 #define DIV_FROM_REG(val) BIT(val)
640 * PWM base frequencies. The frequency has to be divided by either 128 or 256,
641 * depending on the chip type, to calculate the actual PWM frequency.
643 * Some of the chip datasheets suggest a base frequency of 51 kHz instead
644 * of 750 kHz for the slowest base frequency, resulting in a PWM frequency
645 * of 200 Hz. Sometimes both PWM frequency select registers are affected,
646 * sometimes just one. It is unknown if this is a datasheet error or real,
647 * so this is ignored for now.
649 static const unsigned int pwm_freq[8] = {
661 * Must be called with data->update_lock held, except during initialization.
662 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
663 * would slow down the IT87 access and should not be necessary.
665 static int it87_read_value(struct it87_data *data, u8 reg)
667 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
668 return inb_p(data->addr + IT87_DATA_REG_OFFSET);
672 * Must be called with data->update_lock held, except during initialization.
673 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
674 * would slow down the IT87 access and should not be necessary.
676 static void it87_write_value(struct it87_data *data, u8 reg, u8 value)
678 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
679 outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
682 static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
684 data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM[nr]);
685 if (has_newer_autopwm(data)) {
686 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
687 data->pwm_duty[nr] = it87_read_value(data,
688 IT87_REG_PWM_DUTY[nr]);
690 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
691 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
692 else /* Manual mode */
693 data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
696 if (has_old_autopwm(data)) {
699 for (i = 0; i < 5 ; i++)
700 data->auto_temp[nr][i] = it87_read_value(data,
701 IT87_REG_AUTO_TEMP(nr, i));
702 for (i = 0; i < 3 ; i++)
703 data->auto_pwm[nr][i] = it87_read_value(data,
704 IT87_REG_AUTO_PWM(nr, i));
705 } else if (has_newer_autopwm(data)) {
709 * 0: temperature hysteresis (base + 5)
710 * 1: fan off temperature (base + 0)
711 * 2: fan start temperature (base + 1)
712 * 3: fan max temperature (base + 2)
714 data->auto_temp[nr][0] =
715 it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 5));
717 for (i = 0; i < 3 ; i++)
718 data->auto_temp[nr][i + 1] =
719 it87_read_value(data,
720 IT87_REG_AUTO_TEMP(nr, i));
722 * 0: start pwm value (base + 3)
723 * 1: pwm slope (base + 4, 1/8th pwm)
725 data->auto_pwm[nr][0] =
726 it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 3));
727 data->auto_pwm[nr][1] =
728 it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 4));
732 static struct it87_data *it87_update_device(struct device *dev)
734 struct it87_data *data = dev_get_drvdata(dev);
737 mutex_lock(&data->update_lock);
739 if (time_after(jiffies, data->last_updated + HZ + HZ / 2) ||
743 * Cleared after each update, so reenable. Value
744 * returned by this read will be previous value
746 it87_write_value(data, IT87_REG_CONFIG,
747 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
749 for (i = 0; i < NUM_VIN; i++) {
750 if (!(data->has_in & BIT(i)))
754 it87_read_value(data, IT87_REG_VIN[i]);
756 /* VBAT and AVCC don't have limit registers */
757 if (i >= NUM_VIN_LIMIT)
761 it87_read_value(data, IT87_REG_VIN_MIN(i));
763 it87_read_value(data, IT87_REG_VIN_MAX(i));
766 for (i = 0; i < NUM_FAN; i++) {
767 /* Skip disabled fans */
768 if (!(data->has_fan & BIT(i)))
772 it87_read_value(data, IT87_REG_FAN_MIN[i]);
773 data->fan[i][0] = it87_read_value(data,
775 /* Add high byte if in 16-bit mode */
776 if (has_16bit_fans(data)) {
777 data->fan[i][0] |= it87_read_value(data,
778 IT87_REG_FANX[i]) << 8;
779 data->fan[i][1] |= it87_read_value(data,
780 IT87_REG_FANX_MIN[i]) << 8;
783 for (i = 0; i < NUM_TEMP; i++) {
784 if (!(data->has_temp & BIT(i)))
787 it87_read_value(data, IT87_REG_TEMP(i));
789 if (has_temp_offset(data) && i < NUM_TEMP_OFFSET)
791 it87_read_value(data,
792 IT87_REG_TEMP_OFFSET[i]);
794 if (i >= NUM_TEMP_LIMIT)
798 it87_read_value(data, IT87_REG_TEMP_LOW(i));
800 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
803 /* Newer chips don't have clock dividers */
804 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
805 i = it87_read_value(data, IT87_REG_FAN_DIV);
806 data->fan_div[0] = i & 0x07;
807 data->fan_div[1] = (i >> 3) & 0x07;
808 data->fan_div[2] = (i & 0x40) ? 3 : 1;
812 it87_read_value(data, IT87_REG_ALARM1) |
813 (it87_read_value(data, IT87_REG_ALARM2) << 8) |
814 (it87_read_value(data, IT87_REG_ALARM3) << 16);
815 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
817 data->fan_main_ctrl = it87_read_value(data,
818 IT87_REG_FAN_MAIN_CTRL);
819 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
820 for (i = 0; i < NUM_PWM; i++) {
821 if (!(data->has_pwm & BIT(i)))
823 it87_update_pwm_ctrl(data, i);
826 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
827 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
829 * The IT8705F does not have VID capability.
830 * The IT8718F and later don't use IT87_REG_VID for the
833 if (data->type == it8712 || data->type == it8716) {
834 data->vid = it87_read_value(data, IT87_REG_VID);
836 * The older IT8712F revisions had only 5 VID pins,
837 * but we assume it is always safe to read 6 bits.
841 data->last_updated = jiffies;
845 mutex_unlock(&data->update_lock);
850 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
853 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
854 struct it87_data *data = it87_update_device(dev);
855 int index = sattr->index;
858 return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
861 static ssize_t set_in(struct device *dev, struct device_attribute *attr,
862 const char *buf, size_t count)
864 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
865 struct it87_data *data = dev_get_drvdata(dev);
866 int index = sattr->index;
870 if (kstrtoul(buf, 10, &val) < 0)
873 mutex_lock(&data->update_lock);
874 data->in[nr][index] = in_to_reg(data, nr, val);
875 it87_write_value(data,
876 index == 1 ? IT87_REG_VIN_MIN(nr)
877 : IT87_REG_VIN_MAX(nr),
878 data->in[nr][index]);
879 mutex_unlock(&data->update_lock);
883 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
884 static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
886 static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
889 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
890 static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
892 static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
895 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
896 static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
898 static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
901 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
902 static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
904 static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
907 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
908 static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
910 static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
913 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
914 static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
916 static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
919 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
920 static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
922 static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
925 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
926 static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
928 static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
931 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
932 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0);
933 static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in, NULL, 10, 0);
934 static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in, NULL, 11, 0);
935 static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in, NULL, 12, 0);
937 /* Up to 6 temperatures */
938 static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
941 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
943 int index = sattr->index;
944 struct it87_data *data = it87_update_device(dev);
946 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
949 static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
950 const char *buf, size_t count)
952 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
954 int index = sattr->index;
955 struct it87_data *data = dev_get_drvdata(dev);
959 if (kstrtol(buf, 10, &val) < 0)
962 mutex_lock(&data->update_lock);
967 reg = IT87_REG_TEMP_LOW(nr);
970 reg = IT87_REG_TEMP_HIGH(nr);
973 regval = it87_read_value(data, IT87_REG_BEEP_ENABLE);
974 if (!(regval & 0x80)) {
976 it87_write_value(data, IT87_REG_BEEP_ENABLE, regval);
979 reg = IT87_REG_TEMP_OFFSET[nr];
983 data->temp[nr][index] = TEMP_TO_REG(val);
984 it87_write_value(data, reg, data->temp[nr][index]);
985 mutex_unlock(&data->update_lock);
989 static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
990 static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
992 static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
994 static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
996 static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
997 static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
999 static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1001 static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
1003 static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
1004 static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1006 static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1008 static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
1010 static SENSOR_DEVICE_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0);
1011 static SENSOR_DEVICE_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0);
1012 static SENSOR_DEVICE_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0);
1014 static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
1017 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1018 int nr = sensor_attr->index;
1019 struct it87_data *data = it87_update_device(dev);
1020 u8 reg = data->sensor; /* In case value is updated while used */
1021 u8 extra = data->extra;
1023 if ((has_temp_peci(data, nr) && (reg >> 6 == nr + 1)) ||
1024 (has_temp_old_peci(data, nr) && (extra & 0x80)))
1025 return sprintf(buf, "6\n"); /* Intel PECI */
1026 if (reg & (1 << nr))
1027 return sprintf(buf, "3\n"); /* thermal diode */
1028 if (reg & (8 << nr))
1029 return sprintf(buf, "4\n"); /* thermistor */
1030 return sprintf(buf, "0\n"); /* disabled */
1033 static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
1034 const char *buf, size_t count)
1036 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1037 int nr = sensor_attr->index;
1039 struct it87_data *data = dev_get_drvdata(dev);
1043 if (kstrtol(buf, 10, &val) < 0)
1046 reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1049 if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6))
1051 extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1052 if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6))
1054 if (val == 2) { /* backwards compatibility */
1056 "Sensor type 2 is deprecated, please use 4 instead\n");
1059 /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */
1064 else if (has_temp_peci(data, nr) && val == 6)
1065 reg |= (nr + 1) << 6;
1066 else if (has_temp_old_peci(data, nr) && val == 6)
1071 mutex_lock(&data->update_lock);
1073 data->extra = extra;
1074 it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
1075 if (has_temp_old_peci(data, nr))
1076 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1077 data->valid = 0; /* Force cache refresh */
1078 mutex_unlock(&data->update_lock);
1082 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1084 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1086 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1091 static int pwm_mode(const struct it87_data *data, int nr)
1093 if (data->type != it8603 && nr < 3 && !(data->fan_main_ctrl & BIT(nr)))
1094 return 0; /* Full speed */
1095 if (data->pwm_ctrl[nr] & 0x80)
1096 return 2; /* Automatic mode */
1097 if ((data->type == it8603 || nr >= 3) &&
1098 data->pwm_duty[nr] == pwm_to_reg(data, 0xff))
1099 return 0; /* Full speed */
1101 return 1; /* Manual mode */
1104 static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
1107 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1109 int index = sattr->index;
1111 struct it87_data *data = it87_update_device(dev);
1113 speed = has_16bit_fans(data) ?
1114 FAN16_FROM_REG(data->fan[nr][index]) :
1115 FAN_FROM_REG(data->fan[nr][index],
1116 DIV_FROM_REG(data->fan_div[nr]));
1117 return sprintf(buf, "%d\n", speed);
1120 static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
1123 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1124 struct it87_data *data = it87_update_device(dev);
1125 int nr = sensor_attr->index;
1127 return sprintf(buf, "%lu\n", DIV_FROM_REG(data->fan_div[nr]));
1130 static ssize_t show_pwm_enable(struct device *dev,
1131 struct device_attribute *attr, char *buf)
1133 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1134 struct it87_data *data = it87_update_device(dev);
1135 int nr = sensor_attr->index;
1137 return sprintf(buf, "%d\n", pwm_mode(data, nr));
1140 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
1143 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1144 struct it87_data *data = it87_update_device(dev);
1145 int nr = sensor_attr->index;
1147 return sprintf(buf, "%d\n",
1148 pwm_from_reg(data, data->pwm_duty[nr]));
1151 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
1154 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1155 struct it87_data *data = it87_update_device(dev);
1156 int nr = sensor_attr->index;
1160 if (has_pwm_freq2(data) && nr == 1)
1161 index = (data->extra >> 4) & 0x07;
1163 index = (data->fan_ctl >> 4) & 0x07;
1165 freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128);
1167 return sprintf(buf, "%u\n", freq);
1170 static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
1171 const char *buf, size_t count)
1173 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1175 int index = sattr->index;
1177 struct it87_data *data = dev_get_drvdata(dev);
1181 if (kstrtol(buf, 10, &val) < 0)
1184 mutex_lock(&data->update_lock);
1186 if (has_16bit_fans(data)) {
1187 data->fan[nr][index] = FAN16_TO_REG(val);
1188 it87_write_value(data, IT87_REG_FAN_MIN[nr],
1189 data->fan[nr][index] & 0xff);
1190 it87_write_value(data, IT87_REG_FANX_MIN[nr],
1191 data->fan[nr][index] >> 8);
1193 reg = it87_read_value(data, IT87_REG_FAN_DIV);
1196 data->fan_div[nr] = reg & 0x07;
1199 data->fan_div[nr] = (reg >> 3) & 0x07;
1202 data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
1205 data->fan[nr][index] =
1206 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
1207 it87_write_value(data, IT87_REG_FAN_MIN[nr],
1208 data->fan[nr][index]);
1211 mutex_unlock(&data->update_lock);
1215 static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
1216 const char *buf, size_t count)
1218 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1219 struct it87_data *data = dev_get_drvdata(dev);
1220 int nr = sensor_attr->index;
1225 if (kstrtoul(buf, 10, &val) < 0)
1228 mutex_lock(&data->update_lock);
1229 old = it87_read_value(data, IT87_REG_FAN_DIV);
1231 /* Save fan min limit */
1232 min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
1237 data->fan_div[nr] = DIV_TO_REG(val);
1241 data->fan_div[nr] = 1;
1243 data->fan_div[nr] = 3;
1246 val |= (data->fan_div[0] & 0x07);
1247 val |= (data->fan_div[1] & 0x07) << 3;
1248 if (data->fan_div[2] == 3)
1250 it87_write_value(data, IT87_REG_FAN_DIV, val);
1252 /* Restore fan min limit */
1253 data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
1254 it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan[nr][1]);
1256 mutex_unlock(&data->update_lock);
1260 /* Returns 0 if OK, -EINVAL otherwise */
1261 static int check_trip_points(struct device *dev, int nr)
1263 const struct it87_data *data = dev_get_drvdata(dev);
1266 if (has_old_autopwm(data)) {
1267 for (i = 0; i < 3; i++) {
1268 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1271 for (i = 0; i < 2; i++) {
1272 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1275 } else if (has_newer_autopwm(data)) {
1276 for (i = 1; i < 3; i++) {
1277 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1284 "Inconsistent trip points, not switching to automatic mode\n");
1285 dev_err(dev, "Adjust the trip points and try again\n");
1290 static ssize_t set_pwm_enable(struct device *dev, struct device_attribute *attr,
1291 const char *buf, size_t count)
1293 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1294 struct it87_data *data = dev_get_drvdata(dev);
1295 int nr = sensor_attr->index;
1298 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
1301 /* Check trip points before switching to automatic mode */
1303 if (check_trip_points(dev, nr) < 0)
1307 mutex_lock(&data->update_lock);
1310 if (nr < 3 && data->type != it8603) {
1312 /* make sure the fan is on when in on/off mode */
1313 tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1314 it87_write_value(data, IT87_REG_FAN_CTL, tmp | BIT(nr));
1315 /* set on/off mode */
1316 data->fan_main_ctrl &= ~BIT(nr);
1317 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1318 data->fan_main_ctrl);
1320 /* No on/off mode, set maximum pwm value */
1321 data->pwm_duty[nr] = pwm_to_reg(data, 0xff);
1322 it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1323 data->pwm_duty[nr]);
1324 /* and set manual mode */
1325 data->pwm_ctrl[nr] = has_newer_autopwm(data) ?
1326 data->pwm_temp_map[nr] :
1328 it87_write_value(data, IT87_REG_PWM[nr],
1329 data->pwm_ctrl[nr]);
1332 if (val == 1) /* Manual mode */
1333 data->pwm_ctrl[nr] = has_newer_autopwm(data) ?
1334 data->pwm_temp_map[nr] :
1336 else /* Automatic mode */
1337 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
1338 it87_write_value(data, IT87_REG_PWM[nr], data->pwm_ctrl[nr]);
1340 if (data->type != it8603 && nr < 3) {
1341 /* set SmartGuardian mode */
1342 data->fan_main_ctrl |= BIT(nr);
1343 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1344 data->fan_main_ctrl);
1348 mutex_unlock(&data->update_lock);
1352 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1353 const char *buf, size_t count)
1355 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1356 struct it87_data *data = dev_get_drvdata(dev);
1357 int nr = sensor_attr->index;
1360 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1363 mutex_lock(&data->update_lock);
1364 it87_update_pwm_ctrl(data, nr);
1365 if (has_newer_autopwm(data)) {
1367 * If we are in automatic mode, the PWM duty cycle register
1368 * is read-only so we can't write the value.
1370 if (data->pwm_ctrl[nr] & 0x80) {
1371 mutex_unlock(&data->update_lock);
1374 data->pwm_duty[nr] = pwm_to_reg(data, val);
1375 it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1376 data->pwm_duty[nr]);
1378 data->pwm_duty[nr] = pwm_to_reg(data, val);
1380 * If we are in manual mode, write the duty cycle immediately;
1381 * otherwise, just store it for later use.
1383 if (!(data->pwm_ctrl[nr] & 0x80)) {
1384 data->pwm_ctrl[nr] = data->pwm_duty[nr];
1385 it87_write_value(data, IT87_REG_PWM[nr],
1386 data->pwm_ctrl[nr]);
1389 mutex_unlock(&data->update_lock);
1393 static ssize_t set_pwm_freq(struct device *dev, struct device_attribute *attr,
1394 const char *buf, size_t count)
1396 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1397 struct it87_data *data = dev_get_drvdata(dev);
1398 int nr = sensor_attr->index;
1402 if (kstrtoul(buf, 10, &val) < 0)
1405 val = clamp_val(val, 0, 1000000);
1406 val *= has_newer_autopwm(data) ? 256 : 128;
1408 /* Search for the nearest available frequency */
1409 for (i = 0; i < 7; i++) {
1410 if (val > (pwm_freq[i] + pwm_freq[i + 1]) / 2)
1414 mutex_lock(&data->update_lock);
1416 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
1417 data->fan_ctl |= i << 4;
1418 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
1420 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x8f;
1421 data->extra |= i << 4;
1422 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1424 mutex_unlock(&data->update_lock);
1429 static ssize_t show_pwm_temp_map(struct device *dev,
1430 struct device_attribute *attr, char *buf)
1432 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1433 struct it87_data *data = it87_update_device(dev);
1434 int nr = sensor_attr->index;
1437 map = data->pwm_temp_map[nr];
1439 map = 0; /* Should never happen */
1440 if (nr >= 3) /* pwm channels 3..6 map to temp4..6 */
1443 return sprintf(buf, "%d\n", (int)BIT(map));
1446 static ssize_t set_pwm_temp_map(struct device *dev,
1447 struct device_attribute *attr, const char *buf,
1450 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1451 struct it87_data *data = dev_get_drvdata(dev);
1452 int nr = sensor_attr->index;
1456 if (kstrtol(buf, 10, &val) < 0)
1476 mutex_lock(&data->update_lock);
1477 it87_update_pwm_ctrl(data, nr);
1478 data->pwm_temp_map[nr] = reg;
1480 * If we are in automatic mode, write the temp mapping immediately;
1481 * otherwise, just store it for later use.
1483 if (data->pwm_ctrl[nr] & 0x80) {
1484 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
1485 it87_write_value(data, IT87_REG_PWM[nr], data->pwm_ctrl[nr]);
1487 mutex_unlock(&data->update_lock);
1491 static ssize_t show_auto_pwm(struct device *dev, struct device_attribute *attr,
1494 struct it87_data *data = it87_update_device(dev);
1495 struct sensor_device_attribute_2 *sensor_attr =
1496 to_sensor_dev_attr_2(attr);
1497 int nr = sensor_attr->nr;
1498 int point = sensor_attr->index;
1500 return sprintf(buf, "%d\n",
1501 pwm_from_reg(data, data->auto_pwm[nr][point]));
1504 static ssize_t set_auto_pwm(struct device *dev, struct device_attribute *attr,
1505 const char *buf, size_t count)
1507 struct it87_data *data = dev_get_drvdata(dev);
1508 struct sensor_device_attribute_2 *sensor_attr =
1509 to_sensor_dev_attr_2(attr);
1510 int nr = sensor_attr->nr;
1511 int point = sensor_attr->index;
1515 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1518 mutex_lock(&data->update_lock);
1519 data->auto_pwm[nr][point] = pwm_to_reg(data, val);
1520 if (has_newer_autopwm(data))
1521 regaddr = IT87_REG_AUTO_TEMP(nr, 3);
1523 regaddr = IT87_REG_AUTO_PWM(nr, point);
1524 it87_write_value(data, regaddr, data->auto_pwm[nr][point]);
1525 mutex_unlock(&data->update_lock);
1529 static ssize_t show_auto_pwm_slope(struct device *dev,
1530 struct device_attribute *attr, char *buf)
1532 struct it87_data *data = it87_update_device(dev);
1533 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1534 int nr = sensor_attr->index;
1536 return sprintf(buf, "%d\n", data->auto_pwm[nr][1] & 0x7f);
1539 static ssize_t set_auto_pwm_slope(struct device *dev,
1540 struct device_attribute *attr,
1541 const char *buf, size_t count)
1543 struct it87_data *data = dev_get_drvdata(dev);
1544 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1545 int nr = sensor_attr->index;
1548 if (kstrtoul(buf, 10, &val) < 0 || val > 127)
1551 mutex_lock(&data->update_lock);
1552 data->auto_pwm[nr][1] = (data->auto_pwm[nr][1] & 0x80) | val;
1553 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 4),
1554 data->auto_pwm[nr][1]);
1555 mutex_unlock(&data->update_lock);
1559 static ssize_t show_auto_temp(struct device *dev, struct device_attribute *attr,
1562 struct it87_data *data = it87_update_device(dev);
1563 struct sensor_device_attribute_2 *sensor_attr =
1564 to_sensor_dev_attr_2(attr);
1565 int nr = sensor_attr->nr;
1566 int point = sensor_attr->index;
1569 if (has_old_autopwm(data) || point)
1570 reg = data->auto_temp[nr][point];
1572 reg = data->auto_temp[nr][1] - (data->auto_temp[nr][0] & 0x1f);
1574 return sprintf(buf, "%d\n", TEMP_FROM_REG(reg));
1577 static ssize_t set_auto_temp(struct device *dev, struct device_attribute *attr,
1578 const char *buf, size_t count)
1580 struct it87_data *data = dev_get_drvdata(dev);
1581 struct sensor_device_attribute_2 *sensor_attr =
1582 to_sensor_dev_attr_2(attr);
1583 int nr = sensor_attr->nr;
1584 int point = sensor_attr->index;
1588 if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
1591 mutex_lock(&data->update_lock);
1592 if (has_newer_autopwm(data) && !point) {
1593 reg = data->auto_temp[nr][1] - TEMP_TO_REG(val);
1594 reg = clamp_val(reg, 0, 0x1f) | (data->auto_temp[nr][0] & 0xe0);
1595 data->auto_temp[nr][0] = reg;
1596 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 5), reg);
1598 reg = TEMP_TO_REG(val);
1599 data->auto_temp[nr][point] = reg;
1600 if (has_newer_autopwm(data))
1602 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point), reg);
1604 mutex_unlock(&data->update_lock);
1608 static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
1609 static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1611 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
1614 static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
1615 static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1617 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
1620 static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
1621 static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1623 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
1626 static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
1627 static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1630 static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
1631 static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1634 static SENSOR_DEVICE_ATTR_2(fan6_input, S_IRUGO, show_fan, NULL, 5, 0);
1635 static SENSOR_DEVICE_ATTR_2(fan6_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1638 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
1639 show_pwm_enable, set_pwm_enable, 0);
1640 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0);
1641 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq,
1643 static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO,
1644 show_pwm_temp_map, set_pwm_temp_map, 0);
1645 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR,
1646 show_auto_pwm, set_auto_pwm, 0, 0);
1647 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR,
1648 show_auto_pwm, set_auto_pwm, 0, 1);
1649 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR,
1650 show_auto_pwm, set_auto_pwm, 0, 2);
1651 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO,
1652 show_auto_pwm, NULL, 0, 3);
1653 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
1654 show_auto_temp, set_auto_temp, 0, 1);
1655 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1656 show_auto_temp, set_auto_temp, 0, 0);
1657 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
1658 show_auto_temp, set_auto_temp, 0, 2);
1659 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
1660 show_auto_temp, set_auto_temp, 0, 3);
1661 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR,
1662 show_auto_temp, set_auto_temp, 0, 4);
1663 static SENSOR_DEVICE_ATTR_2(pwm1_auto_start, S_IRUGO | S_IWUSR,
1664 show_auto_pwm, set_auto_pwm, 0, 0);
1665 static SENSOR_DEVICE_ATTR(pwm1_auto_slope, S_IRUGO | S_IWUSR,
1666 show_auto_pwm_slope, set_auto_pwm_slope, 0);
1668 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
1669 show_pwm_enable, set_pwm_enable, 1);
1670 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1);
1671 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, set_pwm_freq, 1);
1672 static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO,
1673 show_pwm_temp_map, set_pwm_temp_map, 1);
1674 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR,
1675 show_auto_pwm, set_auto_pwm, 1, 0);
1676 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR,
1677 show_auto_pwm, set_auto_pwm, 1, 1);
1678 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR,
1679 show_auto_pwm, set_auto_pwm, 1, 2);
1680 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO,
1681 show_auto_pwm, NULL, 1, 3);
1682 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
1683 show_auto_temp, set_auto_temp, 1, 1);
1684 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1685 show_auto_temp, set_auto_temp, 1, 0);
1686 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
1687 show_auto_temp, set_auto_temp, 1, 2);
1688 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
1689 show_auto_temp, set_auto_temp, 1, 3);
1690 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR,
1691 show_auto_temp, set_auto_temp, 1, 4);
1692 static SENSOR_DEVICE_ATTR_2(pwm2_auto_start, S_IRUGO | S_IWUSR,
1693 show_auto_pwm, set_auto_pwm, 1, 0);
1694 static SENSOR_DEVICE_ATTR(pwm2_auto_slope, S_IRUGO | S_IWUSR,
1695 show_auto_pwm_slope, set_auto_pwm_slope, 1);
1697 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
1698 show_pwm_enable, set_pwm_enable, 2);
1699 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2);
1700 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL, 2);
1701 static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO,
1702 show_pwm_temp_map, set_pwm_temp_map, 2);
1703 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR,
1704 show_auto_pwm, set_auto_pwm, 2, 0);
1705 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR,
1706 show_auto_pwm, set_auto_pwm, 2, 1);
1707 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR,
1708 show_auto_pwm, set_auto_pwm, 2, 2);
1709 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO,
1710 show_auto_pwm, NULL, 2, 3);
1711 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
1712 show_auto_temp, set_auto_temp, 2, 1);
1713 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1714 show_auto_temp, set_auto_temp, 2, 0);
1715 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
1716 show_auto_temp, set_auto_temp, 2, 2);
1717 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
1718 show_auto_temp, set_auto_temp, 2, 3);
1719 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR,
1720 show_auto_temp, set_auto_temp, 2, 4);
1721 static SENSOR_DEVICE_ATTR_2(pwm3_auto_start, S_IRUGO | S_IWUSR,
1722 show_auto_pwm, set_auto_pwm, 2, 0);
1723 static SENSOR_DEVICE_ATTR(pwm3_auto_slope, S_IRUGO | S_IWUSR,
1724 show_auto_pwm_slope, set_auto_pwm_slope, 2);
1726 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IRUGO | S_IWUSR,
1727 show_pwm_enable, set_pwm_enable, 3);
1728 static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 3);
1729 static SENSOR_DEVICE_ATTR(pwm4_freq, S_IRUGO, show_pwm_freq, NULL, 3);
1730 static SENSOR_DEVICE_ATTR(pwm4_auto_channels_temp, S_IRUGO,
1731 show_pwm_temp_map, set_pwm_temp_map, 3);
1732 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp, S_IRUGO | S_IWUSR,
1733 show_auto_temp, set_auto_temp, 2, 1);
1734 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1735 show_auto_temp, set_auto_temp, 2, 0);
1736 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point2_temp, S_IRUGO | S_IWUSR,
1737 show_auto_temp, set_auto_temp, 2, 2);
1738 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point3_temp, S_IRUGO | S_IWUSR,
1739 show_auto_temp, set_auto_temp, 2, 3);
1740 static SENSOR_DEVICE_ATTR_2(pwm4_auto_start, S_IRUGO | S_IWUSR,
1741 show_auto_pwm, set_auto_pwm, 3, 0);
1742 static SENSOR_DEVICE_ATTR(pwm4_auto_slope, S_IRUGO | S_IWUSR,
1743 show_auto_pwm_slope, set_auto_pwm_slope, 3);
1745 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IRUGO | S_IWUSR,
1746 show_pwm_enable, set_pwm_enable, 4);
1747 static SENSOR_DEVICE_ATTR(pwm5, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 4);
1748 static SENSOR_DEVICE_ATTR(pwm5_freq, S_IRUGO, show_pwm_freq, NULL, 4);
1749 static SENSOR_DEVICE_ATTR(pwm5_auto_channels_temp, S_IRUGO,
1750 show_pwm_temp_map, set_pwm_temp_map, 4);
1751 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp, S_IRUGO | S_IWUSR,
1752 show_auto_temp, set_auto_temp, 2, 1);
1753 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1754 show_auto_temp, set_auto_temp, 2, 0);
1755 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point2_temp, S_IRUGO | S_IWUSR,
1756 show_auto_temp, set_auto_temp, 2, 2);
1757 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point3_temp, S_IRUGO | S_IWUSR,
1758 show_auto_temp, set_auto_temp, 2, 3);
1759 static SENSOR_DEVICE_ATTR_2(pwm5_auto_start, S_IRUGO | S_IWUSR,
1760 show_auto_pwm, set_auto_pwm, 4, 0);
1761 static SENSOR_DEVICE_ATTR(pwm5_auto_slope, S_IRUGO | S_IWUSR,
1762 show_auto_pwm_slope, set_auto_pwm_slope, 4);
1764 static SENSOR_DEVICE_ATTR(pwm6_enable, S_IRUGO | S_IWUSR,
1765 show_pwm_enable, set_pwm_enable, 5);
1766 static SENSOR_DEVICE_ATTR(pwm6, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 5);
1767 static SENSOR_DEVICE_ATTR(pwm6_freq, S_IRUGO, show_pwm_freq, NULL, 5);
1768 static SENSOR_DEVICE_ATTR(pwm6_auto_channels_temp, S_IRUGO,
1769 show_pwm_temp_map, set_pwm_temp_map, 5);
1770 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp, S_IRUGO | S_IWUSR,
1771 show_auto_temp, set_auto_temp, 2, 1);
1772 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1773 show_auto_temp, set_auto_temp, 2, 0);
1774 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point2_temp, S_IRUGO | S_IWUSR,
1775 show_auto_temp, set_auto_temp, 2, 2);
1776 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point3_temp, S_IRUGO | S_IWUSR,
1777 show_auto_temp, set_auto_temp, 2, 3);
1778 static SENSOR_DEVICE_ATTR_2(pwm6_auto_start, S_IRUGO | S_IWUSR,
1779 show_auto_pwm, set_auto_pwm, 5, 0);
1780 static SENSOR_DEVICE_ATTR(pwm6_auto_slope, S_IRUGO | S_IWUSR,
1781 show_auto_pwm_slope, set_auto_pwm_slope, 5);
1784 static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
1787 struct it87_data *data = it87_update_device(dev);
1789 return sprintf(buf, "%u\n", data->alarms);
1791 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
1793 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
1796 struct it87_data *data = it87_update_device(dev);
1797 int bitnr = to_sensor_dev_attr(attr)->index;
1799 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
1802 static ssize_t clear_intrusion(struct device *dev,
1803 struct device_attribute *attr, const char *buf,
1806 struct it87_data *data = dev_get_drvdata(dev);
1810 if (kstrtol(buf, 10, &val) < 0 || val != 0)
1813 mutex_lock(&data->update_lock);
1814 config = it87_read_value(data, IT87_REG_CONFIG);
1819 it87_write_value(data, IT87_REG_CONFIG, config);
1820 /* Invalidate cache to force re-read */
1823 mutex_unlock(&data->update_lock);
1828 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
1829 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
1830 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
1831 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
1832 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
1833 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
1834 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
1835 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
1836 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
1837 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
1838 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
1839 static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
1840 static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
1841 static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 7);
1842 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
1843 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
1844 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
1845 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
1846 show_alarm, clear_intrusion, 4);
1848 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
1851 struct it87_data *data = it87_update_device(dev);
1852 int bitnr = to_sensor_dev_attr(attr)->index;
1854 return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
1857 static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
1858 const char *buf, size_t count)
1860 int bitnr = to_sensor_dev_attr(attr)->index;
1861 struct it87_data *data = dev_get_drvdata(dev);
1864 if (kstrtol(buf, 10, &val) < 0 || (val != 0 && val != 1))
1867 mutex_lock(&data->update_lock);
1868 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1870 data->beeps |= BIT(bitnr);
1872 data->beeps &= ~BIT(bitnr);
1873 it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
1874 mutex_unlock(&data->update_lock);
1878 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
1879 show_beep, set_beep, 1);
1880 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
1881 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
1882 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
1883 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
1884 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
1885 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
1886 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
1887 /* fanX_beep writability is set later */
1888 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
1889 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
1890 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
1891 static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
1892 static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
1893 static SENSOR_DEVICE_ATTR(fan6_beep, S_IRUGO, show_beep, set_beep, 0);
1894 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
1895 show_beep, set_beep, 2);
1896 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
1897 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
1899 static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
1902 struct it87_data *data = dev_get_drvdata(dev);
1904 return sprintf(buf, "%u\n", data->vrm);
1907 static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
1908 const char *buf, size_t count)
1910 struct it87_data *data = dev_get_drvdata(dev);
1913 if (kstrtoul(buf, 10, &val) < 0)
1920 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
1922 static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
1925 struct it87_data *data = it87_update_device(dev);
1927 return sprintf(buf, "%ld\n", (long)vid_from_reg(data->vid, data->vrm));
1929 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
1931 static ssize_t show_label(struct device *dev, struct device_attribute *attr,
1934 static const char * const labels[] = {
1940 static const char * const labels_it8721[] = {
1946 struct it87_data *data = dev_get_drvdata(dev);
1947 int nr = to_sensor_dev_attr(attr)->index;
1950 if (has_vin3_5v(data) && nr == 0)
1952 else if (has_12mv_adc(data) || has_10_9mv_adc(data))
1953 label = labels_it8721[nr];
1957 return sprintf(buf, "%s\n", label);
1959 static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
1960 static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
1961 static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
1963 static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 3);
1965 static umode_t it87_in_is_visible(struct kobject *kobj,
1966 struct attribute *attr, int index)
1968 struct device *dev = container_of(kobj, struct device, kobj);
1969 struct it87_data *data = dev_get_drvdata(dev);
1970 int i = index / 5; /* voltage index */
1971 int a = index % 5; /* attribute index */
1973 if (index >= 40) { /* in8 and higher only have input attributes */
1978 if (!(data->has_in & BIT(i)))
1981 if (a == 4 && !data->has_beep)
1987 static struct attribute *it87_attributes_in[] = {
1988 &sensor_dev_attr_in0_input.dev_attr.attr,
1989 &sensor_dev_attr_in0_min.dev_attr.attr,
1990 &sensor_dev_attr_in0_max.dev_attr.attr,
1991 &sensor_dev_attr_in0_alarm.dev_attr.attr,
1992 &sensor_dev_attr_in0_beep.dev_attr.attr, /* 4 */
1994 &sensor_dev_attr_in1_input.dev_attr.attr,
1995 &sensor_dev_attr_in1_min.dev_attr.attr,
1996 &sensor_dev_attr_in1_max.dev_attr.attr,
1997 &sensor_dev_attr_in1_alarm.dev_attr.attr,
1998 &sensor_dev_attr_in1_beep.dev_attr.attr, /* 9 */
2000 &sensor_dev_attr_in2_input.dev_attr.attr,
2001 &sensor_dev_attr_in2_min.dev_attr.attr,
2002 &sensor_dev_attr_in2_max.dev_attr.attr,
2003 &sensor_dev_attr_in2_alarm.dev_attr.attr,
2004 &sensor_dev_attr_in2_beep.dev_attr.attr, /* 14 */
2006 &sensor_dev_attr_in3_input.dev_attr.attr,
2007 &sensor_dev_attr_in3_min.dev_attr.attr,
2008 &sensor_dev_attr_in3_max.dev_attr.attr,
2009 &sensor_dev_attr_in3_alarm.dev_attr.attr,
2010 &sensor_dev_attr_in3_beep.dev_attr.attr, /* 19 */
2012 &sensor_dev_attr_in4_input.dev_attr.attr,
2013 &sensor_dev_attr_in4_min.dev_attr.attr,
2014 &sensor_dev_attr_in4_max.dev_attr.attr,
2015 &sensor_dev_attr_in4_alarm.dev_attr.attr,
2016 &sensor_dev_attr_in4_beep.dev_attr.attr, /* 24 */
2018 &sensor_dev_attr_in5_input.dev_attr.attr,
2019 &sensor_dev_attr_in5_min.dev_attr.attr,
2020 &sensor_dev_attr_in5_max.dev_attr.attr,
2021 &sensor_dev_attr_in5_alarm.dev_attr.attr,
2022 &sensor_dev_attr_in5_beep.dev_attr.attr, /* 29 */
2024 &sensor_dev_attr_in6_input.dev_attr.attr,
2025 &sensor_dev_attr_in6_min.dev_attr.attr,
2026 &sensor_dev_attr_in6_max.dev_attr.attr,
2027 &sensor_dev_attr_in6_alarm.dev_attr.attr,
2028 &sensor_dev_attr_in6_beep.dev_attr.attr, /* 34 */
2030 &sensor_dev_attr_in7_input.dev_attr.attr,
2031 &sensor_dev_attr_in7_min.dev_attr.attr,
2032 &sensor_dev_attr_in7_max.dev_attr.attr,
2033 &sensor_dev_attr_in7_alarm.dev_attr.attr,
2034 &sensor_dev_attr_in7_beep.dev_attr.attr, /* 39 */
2036 &sensor_dev_attr_in8_input.dev_attr.attr, /* 40 */
2037 &sensor_dev_attr_in9_input.dev_attr.attr, /* 41 */
2038 &sensor_dev_attr_in10_input.dev_attr.attr, /* 41 */
2039 &sensor_dev_attr_in11_input.dev_attr.attr, /* 41 */
2040 &sensor_dev_attr_in12_input.dev_attr.attr, /* 41 */
2044 static const struct attribute_group it87_group_in = {
2045 .attrs = it87_attributes_in,
2046 .is_visible = it87_in_is_visible,
2049 static umode_t it87_temp_is_visible(struct kobject *kobj,
2050 struct attribute *attr, int index)
2052 struct device *dev = container_of(kobj, struct device, kobj);
2053 struct it87_data *data = dev_get_drvdata(dev);
2054 int i = index / 7; /* temperature index */
2055 int a = index % 7; /* attribute index */
2062 if (!(data->has_temp & BIT(i)))
2065 if (a == 5 && !has_temp_offset(data))
2068 if (a == 6 && !data->has_beep)
2074 static struct attribute *it87_attributes_temp[] = {
2075 &sensor_dev_attr_temp1_input.dev_attr.attr,
2076 &sensor_dev_attr_temp1_max.dev_attr.attr,
2077 &sensor_dev_attr_temp1_min.dev_attr.attr,
2078 &sensor_dev_attr_temp1_type.dev_attr.attr,
2079 &sensor_dev_attr_temp1_alarm.dev_attr.attr,
2080 &sensor_dev_attr_temp1_offset.dev_attr.attr, /* 5 */
2081 &sensor_dev_attr_temp1_beep.dev_attr.attr, /* 6 */
2083 &sensor_dev_attr_temp2_input.dev_attr.attr, /* 7 */
2084 &sensor_dev_attr_temp2_max.dev_attr.attr,
2085 &sensor_dev_attr_temp2_min.dev_attr.attr,
2086 &sensor_dev_attr_temp2_type.dev_attr.attr,
2087 &sensor_dev_attr_temp2_alarm.dev_attr.attr,
2088 &sensor_dev_attr_temp2_offset.dev_attr.attr,
2089 &sensor_dev_attr_temp2_beep.dev_attr.attr,
2091 &sensor_dev_attr_temp3_input.dev_attr.attr, /* 14 */
2092 &sensor_dev_attr_temp3_max.dev_attr.attr,
2093 &sensor_dev_attr_temp3_min.dev_attr.attr,
2094 &sensor_dev_attr_temp3_type.dev_attr.attr,
2095 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
2096 &sensor_dev_attr_temp3_offset.dev_attr.attr,
2097 &sensor_dev_attr_temp3_beep.dev_attr.attr,
2099 &sensor_dev_attr_temp4_input.dev_attr.attr, /* 21 */
2100 &sensor_dev_attr_temp5_input.dev_attr.attr,
2101 &sensor_dev_attr_temp6_input.dev_attr.attr,
2105 static const struct attribute_group it87_group_temp = {
2106 .attrs = it87_attributes_temp,
2107 .is_visible = it87_temp_is_visible,
2110 static umode_t it87_is_visible(struct kobject *kobj,
2111 struct attribute *attr, int index)
2113 struct device *dev = container_of(kobj, struct device, kobj);
2114 struct it87_data *data = dev_get_drvdata(dev);
2116 if ((index == 2 || index == 3) && !data->has_vid)
2119 if (index > 3 && !(data->in_internal & BIT(index - 4)))
2125 static struct attribute *it87_attributes[] = {
2126 &dev_attr_alarms.attr,
2127 &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
2128 &dev_attr_vrm.attr, /* 2 */
2129 &dev_attr_cpu0_vid.attr, /* 3 */
2130 &sensor_dev_attr_in3_label.dev_attr.attr, /* 4 .. 7 */
2131 &sensor_dev_attr_in7_label.dev_attr.attr,
2132 &sensor_dev_attr_in8_label.dev_attr.attr,
2133 &sensor_dev_attr_in9_label.dev_attr.attr,
2137 static const struct attribute_group it87_group = {
2138 .attrs = it87_attributes,
2139 .is_visible = it87_is_visible,
2142 static umode_t it87_fan_is_visible(struct kobject *kobj,
2143 struct attribute *attr, int index)
2145 struct device *dev = container_of(kobj, struct device, kobj);
2146 struct it87_data *data = dev_get_drvdata(dev);
2147 int i = index / 5; /* fan index */
2148 int a = index % 5; /* attribute index */
2150 if (index >= 15) { /* fan 4..6 don't have divisor attributes */
2151 i = (index - 15) / 4 + 3;
2152 a = (index - 15) % 4;
2155 if (!(data->has_fan & BIT(i)))
2158 if (a == 3) { /* beep */
2159 if (!data->has_beep)
2161 /* first fan beep attribute is writable */
2162 if (i == __ffs(data->has_fan))
2163 return attr->mode | S_IWUSR;
2166 if (a == 4 && has_16bit_fans(data)) /* divisor */
2172 static struct attribute *it87_attributes_fan[] = {
2173 &sensor_dev_attr_fan1_input.dev_attr.attr,
2174 &sensor_dev_attr_fan1_min.dev_attr.attr,
2175 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
2176 &sensor_dev_attr_fan1_beep.dev_attr.attr, /* 3 */
2177 &sensor_dev_attr_fan1_div.dev_attr.attr, /* 4 */
2179 &sensor_dev_attr_fan2_input.dev_attr.attr,
2180 &sensor_dev_attr_fan2_min.dev_attr.attr,
2181 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
2182 &sensor_dev_attr_fan2_beep.dev_attr.attr,
2183 &sensor_dev_attr_fan2_div.dev_attr.attr, /* 9 */
2185 &sensor_dev_attr_fan3_input.dev_attr.attr,
2186 &sensor_dev_attr_fan3_min.dev_attr.attr,
2187 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
2188 &sensor_dev_attr_fan3_beep.dev_attr.attr,
2189 &sensor_dev_attr_fan3_div.dev_attr.attr, /* 14 */
2191 &sensor_dev_attr_fan4_input.dev_attr.attr, /* 15 */
2192 &sensor_dev_attr_fan4_min.dev_attr.attr,
2193 &sensor_dev_attr_fan4_alarm.dev_attr.attr,
2194 &sensor_dev_attr_fan4_beep.dev_attr.attr,
2196 &sensor_dev_attr_fan5_input.dev_attr.attr, /* 19 */
2197 &sensor_dev_attr_fan5_min.dev_attr.attr,
2198 &sensor_dev_attr_fan5_alarm.dev_attr.attr,
2199 &sensor_dev_attr_fan5_beep.dev_attr.attr,
2201 &sensor_dev_attr_fan6_input.dev_attr.attr, /* 23 */
2202 &sensor_dev_attr_fan6_min.dev_attr.attr,
2203 &sensor_dev_attr_fan6_alarm.dev_attr.attr,
2204 &sensor_dev_attr_fan6_beep.dev_attr.attr,
2208 static const struct attribute_group it87_group_fan = {
2209 .attrs = it87_attributes_fan,
2210 .is_visible = it87_fan_is_visible,
2213 static umode_t it87_pwm_is_visible(struct kobject *kobj,
2214 struct attribute *attr, int index)
2216 struct device *dev = container_of(kobj, struct device, kobj);
2217 struct it87_data *data = dev_get_drvdata(dev);
2218 int i = index / 4; /* pwm index */
2219 int a = index % 4; /* attribute index */
2221 if (!(data->has_pwm & BIT(i)))
2224 /* pwmX_auto_channels_temp is only writable if auto pwm is supported */
2225 if (a == 3 && (has_old_autopwm(data) || has_newer_autopwm(data)))
2226 return attr->mode | S_IWUSR;
2228 /* pwm2_freq is writable if there are two pwm frequency selects */
2229 if (has_pwm_freq2(data) && i == 1 && a == 2)
2230 return attr->mode | S_IWUSR;
2235 static struct attribute *it87_attributes_pwm[] = {
2236 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2237 &sensor_dev_attr_pwm1.dev_attr.attr,
2238 &sensor_dev_attr_pwm1_freq.dev_attr.attr,
2239 &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
2241 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2242 &sensor_dev_attr_pwm2.dev_attr.attr,
2243 &sensor_dev_attr_pwm2_freq.dev_attr.attr,
2244 &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
2246 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2247 &sensor_dev_attr_pwm3.dev_attr.attr,
2248 &sensor_dev_attr_pwm3_freq.dev_attr.attr,
2249 &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
2251 &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2252 &sensor_dev_attr_pwm4.dev_attr.attr,
2253 &sensor_dev_attr_pwm4_freq.dev_attr.attr,
2254 &sensor_dev_attr_pwm4_auto_channels_temp.dev_attr.attr,
2256 &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2257 &sensor_dev_attr_pwm5.dev_attr.attr,
2258 &sensor_dev_attr_pwm5_freq.dev_attr.attr,
2259 &sensor_dev_attr_pwm5_auto_channels_temp.dev_attr.attr,
2261 &sensor_dev_attr_pwm6_enable.dev_attr.attr,
2262 &sensor_dev_attr_pwm6.dev_attr.attr,
2263 &sensor_dev_attr_pwm6_freq.dev_attr.attr,
2264 &sensor_dev_attr_pwm6_auto_channels_temp.dev_attr.attr,
2269 static const struct attribute_group it87_group_pwm = {
2270 .attrs = it87_attributes_pwm,
2271 .is_visible = it87_pwm_is_visible,
2274 static umode_t it87_auto_pwm_is_visible(struct kobject *kobj,
2275 struct attribute *attr, int index)
2277 struct device *dev = container_of(kobj, struct device, kobj);
2278 struct it87_data *data = dev_get_drvdata(dev);
2279 int i = index / 11; /* pwm index */
2280 int a = index % 11; /* attribute index */
2282 if (index >= 33) { /* pwm 4..6 */
2283 i = (index - 33) / 6 + 3;
2284 a = (index - 33) % 6 + 4;
2287 if (!(data->has_pwm & BIT(i)))
2290 if (has_newer_autopwm(data)) {
2291 if (a < 4) /* no auto point pwm */
2293 if (a == 8) /* no auto_point4 */
2296 if (has_old_autopwm(data)) {
2297 if (a >= 9) /* no pwm_auto_start, pwm_auto_slope */
2304 static struct attribute *it87_attributes_auto_pwm[] = {
2305 &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
2306 &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
2307 &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
2308 &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
2309 &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
2310 &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
2311 &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
2312 &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
2313 &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
2314 &sensor_dev_attr_pwm1_auto_start.dev_attr.attr,
2315 &sensor_dev_attr_pwm1_auto_slope.dev_attr.attr,
2317 &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr, /* 11 */
2318 &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
2319 &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
2320 &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
2321 &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
2322 &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
2323 &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
2324 &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
2325 &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
2326 &sensor_dev_attr_pwm2_auto_start.dev_attr.attr,
2327 &sensor_dev_attr_pwm2_auto_slope.dev_attr.attr,
2329 &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr, /* 22 */
2330 &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
2331 &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
2332 &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
2333 &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
2334 &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
2335 &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
2336 &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
2337 &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
2338 &sensor_dev_attr_pwm3_auto_start.dev_attr.attr,
2339 &sensor_dev_attr_pwm3_auto_slope.dev_attr.attr,
2341 &sensor_dev_attr_pwm4_auto_point1_temp.dev_attr.attr, /* 33 */
2342 &sensor_dev_attr_pwm4_auto_point1_temp_hyst.dev_attr.attr,
2343 &sensor_dev_attr_pwm4_auto_point2_temp.dev_attr.attr,
2344 &sensor_dev_attr_pwm4_auto_point3_temp.dev_attr.attr,
2345 &sensor_dev_attr_pwm4_auto_start.dev_attr.attr,
2346 &sensor_dev_attr_pwm4_auto_slope.dev_attr.attr,
2348 &sensor_dev_attr_pwm5_auto_point1_temp.dev_attr.attr,
2349 &sensor_dev_attr_pwm5_auto_point1_temp_hyst.dev_attr.attr,
2350 &sensor_dev_attr_pwm5_auto_point2_temp.dev_attr.attr,
2351 &sensor_dev_attr_pwm5_auto_point3_temp.dev_attr.attr,
2352 &sensor_dev_attr_pwm5_auto_start.dev_attr.attr,
2353 &sensor_dev_attr_pwm5_auto_slope.dev_attr.attr,
2355 &sensor_dev_attr_pwm6_auto_point1_temp.dev_attr.attr,
2356 &sensor_dev_attr_pwm6_auto_point1_temp_hyst.dev_attr.attr,
2357 &sensor_dev_attr_pwm6_auto_point2_temp.dev_attr.attr,
2358 &sensor_dev_attr_pwm6_auto_point3_temp.dev_attr.attr,
2359 &sensor_dev_attr_pwm6_auto_start.dev_attr.attr,
2360 &sensor_dev_attr_pwm6_auto_slope.dev_attr.attr,
2365 static const struct attribute_group it87_group_auto_pwm = {
2366 .attrs = it87_attributes_auto_pwm,
2367 .is_visible = it87_auto_pwm_is_visible,
2370 /* SuperIO detection - will change isa_address if a chip is found */
2371 static int __init it87_find(int sioaddr, unsigned short *address,
2372 struct it87_sio_data *sio_data)
2376 const char *board_vendor, *board_name;
2377 const struct it87_devices *config;
2379 err = superio_enter(sioaddr);
2384 chip_type = force_id ? force_id : superio_inw(sioaddr, DEVID);
2386 switch (chip_type) {
2388 sio_data->type = it87;
2391 sio_data->type = it8712;
2395 sio_data->type = it8716;
2398 sio_data->type = it8718;
2401 sio_data->type = it8720;
2404 sio_data->type = it8721;
2407 sio_data->type = it8728;
2410 sio_data->type = it8732;
2413 sio_data->type = it8771;
2416 sio_data->type = it8772;
2419 sio_data->type = it8781;
2422 sio_data->type = it8782;
2425 sio_data->type = it8783;
2428 sio_data->type = it8786;
2431 sio_data->type = it8790;
2435 sio_data->type = it8603;
2438 sio_data->type = it8620;
2441 sio_data->type = it8622;
2444 sio_data->type = it8628;
2446 case 0xffff: /* No device at all */
2449 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
2453 superio_select(sioaddr, PME);
2454 if (!(superio_inb(sioaddr, IT87_ACT_REG) & 0x01)) {
2455 pr_info("Device not activated, skipping\n");
2459 *address = superio_inw(sioaddr, IT87_BASE_REG) & ~(IT87_EXTENT - 1);
2460 if (*address == 0) {
2461 pr_info("Base address not set, skipping\n");
2466 sio_data->revision = superio_inb(sioaddr, DEVREV) & 0x0f;
2467 pr_info("Found IT%04x%s chip at 0x%x, revision %d\n", chip_type,
2468 it87_devices[sio_data->type].suffix,
2469 *address, sio_data->revision);
2471 config = &it87_devices[sio_data->type];
2473 /* in7 (VSB or VCCH5V) is always internal on some chips */
2474 if (has_in7_internal(config))
2475 sio_data->internal |= BIT(1);
2477 /* in8 (Vbat) is always internal */
2478 sio_data->internal |= BIT(2);
2480 /* in9 (AVCC3), always internal if supported */
2481 if (has_avcc3(config))
2482 sio_data->internal |= BIT(3); /* in9 is AVCC */
2484 sio_data->skip_in |= BIT(9);
2486 if (!has_five_pwm(config))
2487 sio_data->skip_pwm |= BIT(3) | BIT(4) | BIT(5);
2488 else if (!has_six_pwm(config))
2489 sio_data->skip_pwm |= BIT(5);
2491 if (!has_vid(config))
2492 sio_data->skip_vid = 1;
2494 /* Read GPIO config and VID value from LDN 7 (GPIO) */
2495 if (sio_data->type == it87) {
2496 /* The IT8705F has a different LD number for GPIO */
2497 superio_select(sioaddr, 5);
2498 sio_data->beep_pin = superio_inb(sioaddr,
2499 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2500 } else if (sio_data->type == it8783) {
2501 int reg25, reg27, reg2a, reg2c, regef;
2503 superio_select(sioaddr, GPIO);
2505 reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2506 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2507 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
2508 reg2c = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2509 regef = superio_inb(sioaddr, IT87_SIO_SPI_REG);
2511 /* Check if fan3 is there or not */
2512 if ((reg27 & BIT(0)) || !(reg2c & BIT(2)))
2513 sio_data->skip_fan |= BIT(2);
2514 if ((reg25 & BIT(4)) ||
2515 (!(reg2a & BIT(1)) && (regef & BIT(0))))
2516 sio_data->skip_pwm |= BIT(2);
2518 /* Check if fan2 is there or not */
2520 sio_data->skip_fan |= BIT(1);
2522 sio_data->skip_pwm |= BIT(1);
2525 if ((reg27 & BIT(0)) || (reg2c & BIT(2)))
2526 sio_data->skip_in |= BIT(5); /* No VIN5 */
2530 sio_data->skip_in |= BIT(6); /* No VIN6 */
2534 * Does not depend on bit 2 of Reg2C, contrary to datasheet.
2536 if (reg27 & BIT(2)) {
2538 * The data sheet is a bit unclear regarding the
2539 * internal voltage divider for VCCH5V. It says
2540 * "This bit enables and switches VIN7 (pin 91) to the
2541 * internal voltage divider for VCCH5V".
2542 * This is different to other chips, where the internal
2543 * voltage divider would connect VIN7 to an internal
2544 * voltage source. Maybe that is the case here as well.
2546 * Since we don't know for sure, re-route it if that is
2547 * not the case, and ask the user to report if the
2548 * resulting voltage is sane.
2550 if (!(reg2c & BIT(1))) {
2552 superio_outb(sioaddr, IT87_SIO_PINX2_REG,
2554 pr_notice("Routing internal VCCH5V to in7.\n");
2556 pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
2557 pr_notice("Please report if it displays a reasonable voltage.\n");
2561 sio_data->internal |= BIT(0);
2563 sio_data->internal |= BIT(1);
2565 sio_data->beep_pin = superio_inb(sioaddr,
2566 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2567 } else if (sio_data->type == it8603) {
2570 superio_select(sioaddr, GPIO);
2572 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2574 /* Check if fan3 is there or not */
2576 sio_data->skip_pwm |= BIT(2);
2578 sio_data->skip_fan |= BIT(2);
2580 /* Check if fan2 is there or not */
2581 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2583 sio_data->skip_pwm |= BIT(1);
2585 sio_data->skip_fan |= BIT(1);
2587 sio_data->skip_in |= BIT(5); /* No VIN5 */
2588 sio_data->skip_in |= BIT(6); /* No VIN6 */
2590 sio_data->beep_pin = superio_inb(sioaddr,
2591 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2592 } else if (sio_data->type == it8620 || sio_data->type == it8628) {
2595 superio_select(sioaddr, GPIO);
2597 /* Check for pwm5 */
2598 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2600 sio_data->skip_pwm |= BIT(4);
2602 /* Check for fan4, fan5 */
2603 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2604 if (!(reg & BIT(5)))
2605 sio_data->skip_fan |= BIT(3);
2606 if (!(reg & BIT(4)))
2607 sio_data->skip_fan |= BIT(4);
2609 /* Check for pwm3, fan3 */
2610 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2612 sio_data->skip_pwm |= BIT(2);
2614 sio_data->skip_fan |= BIT(2);
2616 /* Check for pwm4 */
2617 reg = superio_inb(sioaddr, IT87_SIO_GPIO4_REG);
2618 if (!(reg & BIT(2)))
2619 sio_data->skip_pwm |= BIT(3);
2621 /* Check for pwm2, fan2 */
2622 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2624 sio_data->skip_pwm |= BIT(1);
2626 sio_data->skip_fan |= BIT(1);
2627 /* Check for pwm6, fan6 */
2628 if (!(reg & BIT(7))) {
2629 sio_data->skip_pwm |= BIT(5);
2630 sio_data->skip_fan |= BIT(5);
2633 /* Check if AVCC is on VIN3 */
2634 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2636 sio_data->internal |= BIT(0);
2638 sio_data->skip_in |= BIT(9);
2640 sio_data->beep_pin = superio_inb(sioaddr,
2641 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2642 } else if (sio_data->type == it8622) {
2645 superio_select(sioaddr, GPIO);
2647 /* Check for pwm4, fan4 */
2648 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2650 sio_data->skip_fan |= BIT(3);
2652 sio_data->skip_pwm |= BIT(3);
2654 /* Check for pwm3, fan3, pwm5, fan5 */
2655 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2657 sio_data->skip_pwm |= BIT(2);
2659 sio_data->skip_fan |= BIT(2);
2661 sio_data->skip_pwm |= BIT(4);
2663 sio_data->skip_fan |= BIT(4);
2665 /* Check for pwm2, fan2 */
2666 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2668 sio_data->skip_pwm |= BIT(1);
2670 sio_data->skip_fan |= BIT(1);
2672 /* Check for AVCC */
2673 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2674 if (!(reg & BIT(0)))
2675 sio_data->skip_in |= BIT(9);
2677 sio_data->beep_pin = superio_inb(sioaddr,
2678 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2683 superio_select(sioaddr, GPIO);
2685 /* Check for fan4, fan5 */
2686 if (has_five_fans(config)) {
2687 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2688 switch (sio_data->type) {
2691 sio_data->skip_fan |= BIT(3);
2693 sio_data->skip_fan |= BIT(4);
2698 if (!(reg & BIT(5)))
2699 sio_data->skip_fan |= BIT(3);
2700 if (!(reg & BIT(4)))
2701 sio_data->skip_fan |= BIT(4);
2708 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2709 if (!sio_data->skip_vid) {
2710 /* We need at least 4 VID pins */
2712 pr_info("VID is disabled (pins used for GPIO)\n");
2713 sio_data->skip_vid = 1;
2717 /* Check if fan3 is there or not */
2719 sio_data->skip_pwm |= BIT(2);
2721 sio_data->skip_fan |= BIT(2);
2723 /* Check if fan2 is there or not */
2724 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2726 sio_data->skip_pwm |= BIT(1);
2728 sio_data->skip_fan |= BIT(1);
2730 if ((sio_data->type == it8718 || sio_data->type == it8720) &&
2731 !(sio_data->skip_vid))
2732 sio_data->vid_value = superio_inb(sioaddr,
2735 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2737 uart6 = sio_data->type == it8782 && (reg & BIT(2));
2740 * The IT8720F has no VIN7 pin, so VCCH should always be
2741 * routed internally to VIN7 with an internal divider.
2742 * Curiously, there still is a configuration bit to control
2743 * this, which means it can be set incorrectly. And even
2744 * more curiously, many boards out there are improperly
2745 * configured, even though the IT8720F datasheet claims
2746 * that the internal routing of VCCH to VIN7 is the default
2747 * setting. So we force the internal routing in this case.
2749 * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
2750 * If UART6 is enabled, re-route VIN7 to the internal divider
2751 * if that is not already the case.
2753 if ((sio_data->type == it8720 || uart6) && !(reg & BIT(1))) {
2755 superio_outb(sioaddr, IT87_SIO_PINX2_REG, reg);
2756 pr_notice("Routing internal VCCH to in7\n");
2759 sio_data->internal |= BIT(0);
2761 sio_data->internal |= BIT(1);
2764 * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
2765 * While VIN7 can be routed to the internal voltage divider,
2766 * VIN5 and VIN6 are not available if UART6 is enabled.
2768 * Also, temp3 is not available if UART6 is enabled and TEMPIN3
2769 * is the temperature source. Since we can not read the
2770 * temperature source here, skip_temp is preliminary.
2773 sio_data->skip_in |= BIT(5) | BIT(6);
2774 sio_data->skip_temp |= BIT(2);
2777 sio_data->beep_pin = superio_inb(sioaddr,
2778 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2780 if (sio_data->beep_pin)
2781 pr_info("Beeping is supported\n");
2783 /* Disable specific features based on DMI strings */
2784 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
2785 board_name = dmi_get_system_info(DMI_BOARD_NAME);
2786 if (board_vendor && board_name) {
2787 if (strcmp(board_vendor, "nVIDIA") == 0 &&
2788 strcmp(board_name, "FN68PT") == 0) {
2790 * On the Shuttle SN68PT, FAN_CTL2 is apparently not
2791 * connected to a fan, but to something else. One user
2792 * has reported instant system power-off when changing
2793 * the PWM2 duty cycle, so we disable it.
2794 * I use the board name string as the trigger in case
2795 * the same board is ever used in other systems.
2797 pr_info("Disabling pwm2 due to hardware constraints\n");
2798 sio_data->skip_pwm = BIT(1);
2803 superio_exit(sioaddr);
2807 /* Called when we have found a new IT87. */
2808 static void it87_init_device(struct platform_device *pdev)
2810 struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
2811 struct it87_data *data = platform_get_drvdata(pdev);
2816 * For each PWM channel:
2817 * - If it is in automatic mode, setting to manual mode should set
2818 * the fan to full speed by default.
2819 * - If it is in manual mode, we need a mapping to temperature
2820 * channels to use when later setting to automatic mode later.
2821 * Use a 1:1 mapping by default (we are clueless.)
2822 * In both cases, the value can (and should) be changed by the user
2823 * prior to switching to a different mode.
2824 * Note that this is no longer needed for the IT8721F and later, as
2825 * these have separate registers for the temperature mapping and the
2826 * manual duty cycle.
2828 for (i = 0; i < NUM_AUTO_PWM; i++) {
2829 data->pwm_temp_map[i] = i;
2830 data->pwm_duty[i] = 0x7f; /* Full speed */
2831 data->auto_pwm[i][3] = 0x7f; /* Full speed, hard-coded */
2835 * Some chips seem to have default value 0xff for all limit
2836 * registers. For low voltage limits it makes no sense and triggers
2837 * alarms, so change to 0 instead. For high temperature limits, it
2838 * means -1 degree C, which surprisingly doesn't trigger an alarm,
2839 * but is still confusing, so change to 127 degrees C.
2841 for (i = 0; i < NUM_VIN_LIMIT; i++) {
2842 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
2844 it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
2846 for (i = 0; i < NUM_TEMP_LIMIT; i++) {
2847 tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
2849 it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
2853 * Temperature channels are not forcibly enabled, as they can be
2854 * set to two different sensor types and we can't guess which one
2855 * is correct for a given system. These channels can be enabled at
2856 * run-time through the temp{1-3}_type sysfs accessors if needed.
2859 /* Check if voltage monitors are reset manually or by some reason */
2860 tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
2861 if ((tmp & 0xff) == 0) {
2862 /* Enable all voltage monitors */
2863 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
2866 /* Check if tachometers are reset manually or by some reason */
2867 mask = 0x70 & ~(sio_data->skip_fan << 4);
2868 data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
2869 if ((data->fan_main_ctrl & mask) == 0) {
2870 /* Enable all fan tachometers */
2871 data->fan_main_ctrl |= mask;
2872 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
2873 data->fan_main_ctrl);
2875 data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
2877 tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
2879 /* Set tachometers to 16-bit mode if needed */
2880 if (has_fan16_config(data)) {
2881 if (~tmp & 0x07 & data->has_fan) {
2883 "Setting fan1-3 to 16-bit mode\n");
2884 it87_write_value(data, IT87_REG_FAN_16BIT,
2889 /* Check for additional fans */
2890 if (has_five_fans(data)) {
2892 data->has_fan |= BIT(3); /* fan4 enabled */
2894 data->has_fan |= BIT(4); /* fan5 enabled */
2895 if (has_six_fans(data) && (tmp & BIT(2)))
2896 data->has_fan |= BIT(5); /* fan6 enabled */
2899 /* Fan input pins may be used for alternative functions */
2900 data->has_fan &= ~sio_data->skip_fan;
2902 /* Check if pwm5, pwm6 are enabled */
2903 if (has_six_pwm(data)) {
2904 /* The following code may be IT8620E specific */
2905 tmp = it87_read_value(data, IT87_REG_FAN_DIV);
2906 if ((tmp & 0xc0) == 0xc0)
2907 sio_data->skip_pwm |= BIT(4);
2908 if (!(tmp & BIT(3)))
2909 sio_data->skip_pwm |= BIT(5);
2912 /* Start monitoring */
2913 it87_write_value(data, IT87_REG_CONFIG,
2914 (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
2915 | (update_vbat ? 0x41 : 0x01));
2918 /* Return 1 if and only if the PWM interface is safe to use */
2919 static int it87_check_pwm(struct device *dev)
2921 struct it87_data *data = dev_get_drvdata(dev);
2923 * Some BIOSes fail to correctly configure the IT87 fans. All fans off
2924 * and polarity set to active low is sign that this is the case so we
2925 * disable pwm control to protect the user.
2927 int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
2929 if ((tmp & 0x87) == 0) {
2930 if (fix_pwm_polarity) {
2932 * The user asks us to attempt a chip reconfiguration.
2933 * This means switching to active high polarity and
2934 * inverting all fan speed values.
2939 for (i = 0; i < ARRAY_SIZE(pwm); i++)
2940 pwm[i] = it87_read_value(data,
2944 * If any fan is in automatic pwm mode, the polarity
2945 * might be correct, as suspicious as it seems, so we
2946 * better don't change anything (but still disable the
2949 if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
2951 "Reconfiguring PWM to active high polarity\n");
2952 it87_write_value(data, IT87_REG_FAN_CTL,
2954 for (i = 0; i < 3; i++)
2955 it87_write_value(data,
2962 "PWM configuration is too broken to be fixed\n");
2966 "Detected broken BIOS defaults, disabling PWM interface\n");
2968 } else if (fix_pwm_polarity) {
2970 "PWM configuration looks sane, won't touch\n");
2976 static int it87_probe(struct platform_device *pdev)
2978 struct it87_data *data;
2979 struct resource *res;
2980 struct device *dev = &pdev->dev;
2981 struct it87_sio_data *sio_data = dev_get_platdata(dev);
2982 int enable_pwm_interface;
2983 struct device *hwmon_dev;
2985 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
2986 if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
2988 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
2989 (unsigned long)res->start,
2990 (unsigned long)(res->start + IT87_EC_EXTENT - 1));
2994 data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
2998 data->addr = res->start;
2999 data->type = sio_data->type;
3000 data->features = it87_devices[sio_data->type].features;
3001 data->peci_mask = it87_devices[sio_data->type].peci_mask;
3002 data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
3004 * IT8705F Datasheet 0.4.1, 3h == Version G.
3005 * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
3006 * These are the first revisions with 16-bit tachometer support.
3008 switch (data->type) {
3010 if (sio_data->revision >= 0x03) {
3011 data->features &= ~FEAT_OLD_AUTOPWM;
3012 data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS;
3016 if (sio_data->revision >= 0x08) {
3017 data->features &= ~FEAT_OLD_AUTOPWM;
3018 data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS |
3026 /* Now, we do the remaining detection. */
3027 if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80) ||
3028 it87_read_value(data, IT87_REG_CHIPID) != 0x90)
3031 platform_set_drvdata(pdev, data);
3033 mutex_init(&data->update_lock);
3035 /* Check PWM configuration */
3036 enable_pwm_interface = it87_check_pwm(dev);
3038 /* Starting with IT8721F, we handle scaling of internal voltages */
3039 if (has_12mv_adc(data)) {
3040 if (sio_data->internal & BIT(0))
3041 data->in_scaled |= BIT(3); /* in3 is AVCC */
3042 if (sio_data->internal & BIT(1))
3043 data->in_scaled |= BIT(7); /* in7 is VSB */
3044 if (sio_data->internal & BIT(2))
3045 data->in_scaled |= BIT(8); /* in8 is Vbat */
3046 if (sio_data->internal & BIT(3))
3047 data->in_scaled |= BIT(9); /* in9 is AVCC */
3048 } else if (sio_data->type == it8781 || sio_data->type == it8782 ||
3049 sio_data->type == it8783) {
3050 if (sio_data->internal & BIT(0))
3051 data->in_scaled |= BIT(3); /* in3 is VCC5V */
3052 if (sio_data->internal & BIT(1))
3053 data->in_scaled |= BIT(7); /* in7 is VCCH5V */
3056 data->has_temp = 0x07;
3057 if (sio_data->skip_temp & BIT(2)) {
3058 if (sio_data->type == it8782 &&
3059 !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
3060 data->has_temp &= ~BIT(2);
3063 data->in_internal = sio_data->internal;
3064 data->has_in = 0x3ff & ~sio_data->skip_in;
3066 if (has_six_temp(data)) {
3067 u8 reg = it87_read_value(data, IT87_REG_TEMP456_ENABLE);
3069 /* Check for additional temperature sensors */
3070 if ((reg & 0x03) >= 0x02)
3071 data->has_temp |= BIT(3);
3072 if (((reg >> 2) & 0x03) >= 0x02)
3073 data->has_temp |= BIT(4);
3074 if (((reg >> 4) & 0x03) >= 0x02)
3075 data->has_temp |= BIT(5);
3077 /* Check for additional voltage sensors */
3078 if ((reg & 0x03) == 0x01)
3079 data->has_in |= BIT(10);
3080 if (((reg >> 2) & 0x03) == 0x01)
3081 data->has_in |= BIT(11);
3082 if (((reg >> 4) & 0x03) == 0x01)
3083 data->has_in |= BIT(12);
3086 data->has_beep = !!sio_data->beep_pin;
3088 /* Initialize the IT87 chip */
3089 it87_init_device(pdev);
3091 if (!sio_data->skip_vid) {
3092 data->has_vid = true;
3093 data->vrm = vid_which_vrm();
3094 /* VID reading from Super-I/O config space if available */
3095 data->vid = sio_data->vid_value;
3098 /* Prepare for sysfs hooks */
3099 data->groups[0] = &it87_group;
3100 data->groups[1] = &it87_group_in;
3101 data->groups[2] = &it87_group_temp;
3102 data->groups[3] = &it87_group_fan;
3104 if (enable_pwm_interface) {
3105 data->has_pwm = BIT(ARRAY_SIZE(IT87_REG_PWM)) - 1;
3106 data->has_pwm &= ~sio_data->skip_pwm;
3108 data->groups[4] = &it87_group_pwm;
3109 if (has_old_autopwm(data) || has_newer_autopwm(data))
3110 data->groups[5] = &it87_group_auto_pwm;
3113 hwmon_dev = devm_hwmon_device_register_with_groups(dev,
3114 it87_devices[sio_data->type].name,
3115 data, data->groups);
3116 return PTR_ERR_OR_ZERO(hwmon_dev);
3119 static struct platform_driver it87_driver = {
3123 .probe = it87_probe,
3126 static int __init it87_device_add(int index, unsigned short address,
3127 const struct it87_sio_data *sio_data)
3129 struct platform_device *pdev;
3130 struct resource res = {
3131 .start = address + IT87_EC_OFFSET,
3132 .end = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
3134 .flags = IORESOURCE_IO,
3138 err = acpi_check_resource_conflict(&res);
3142 pdev = platform_device_alloc(DRVNAME, address);
3146 err = platform_device_add_resources(pdev, &res, 1);
3148 pr_err("Device resource addition failed (%d)\n", err);
3149 goto exit_device_put;
3152 err = platform_device_add_data(pdev, sio_data,
3153 sizeof(struct it87_sio_data));
3155 pr_err("Platform data allocation failed\n");
3156 goto exit_device_put;
3159 err = platform_device_add(pdev);
3161 pr_err("Device addition failed (%d)\n", err);
3162 goto exit_device_put;
3165 it87_pdev[index] = pdev;
3169 platform_device_put(pdev);
3173 static int __init sm_it87_init(void)
3175 int sioaddr[2] = { REG_2E, REG_4E };
3176 struct it87_sio_data sio_data;
3177 unsigned short isa_address;
3181 err = platform_driver_register(&it87_driver);
3185 for (i = 0; i < ARRAY_SIZE(sioaddr); i++) {
3186 memset(&sio_data, 0, sizeof(struct it87_sio_data));
3188 err = it87_find(sioaddr[i], &isa_address, &sio_data);
3189 if (err || isa_address == 0)
3192 err = it87_device_add(i, isa_address, &sio_data);
3194 goto exit_dev_unregister;
3200 goto exit_unregister;
3204 exit_dev_unregister:
3205 /* NULL check handled by platform_device_unregister */
3206 platform_device_unregister(it87_pdev[0]);
3208 platform_driver_unregister(&it87_driver);
3212 static void __exit sm_it87_exit(void)
3214 /* NULL check handled by platform_device_unregister */
3215 platform_device_unregister(it87_pdev[1]);
3216 platform_device_unregister(it87_pdev[0]);
3217 platform_driver_unregister(&it87_driver);
3220 MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>");
3221 MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
3222 module_param(update_vbat, bool, 0);
3223 MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
3224 module_param(fix_pwm_polarity, bool, 0);
3225 MODULE_PARM_DESC(fix_pwm_polarity,
3226 "Force PWM polarity to active high (DANGEROUS)");
3227 MODULE_LICENSE("GPL");
3229 module_init(sm_it87_init);
3230 module_exit(sm_it87_exit);