git.sur5r.net Git - groeck-it87/blob - it87.c

   1 /*
   2  *  it87.c - Part of lm_sensors, Linux kernel modules for hardware
   3  *           monitoring.
   4  *
   5  *  The IT8705F is an LPC-based Super I/O part that contains UARTs, a
   6  *  parallel port, an IR port, a MIDI port, a floppy controller, etc., in
   7  *  addition to an Environment Controller (Enhanced Hardware Monitor and
   8  *  Fan Controller)
   9  *
  10  *  This driver supports only the Environment Controller in the IT8705F and
  11  *  similar parts.  The other devices are supported by different drivers.
  12  *
  13  *  Supports: IT8603E  Super I/O chip w/LPC interface
  14  *            IT8607E  Super I/O chip w/LPC interface
  15  *            IT8620E  Super I/O chip w/LPC interface
  16  *            IT8622E  Super I/O chip w/LPC interface
  17  *            IT8623E  Super I/O chip w/LPC interface
  18  *            IT8628E  Super I/O chip w/LPC interface
  19  *            IT8686E  Super I/O chip w/LPC interface
  20  *            IT8705F  Super I/O chip w/LPC interface
  21  *            IT8712F  Super I/O chip w/LPC interface
  22  *            IT8716F  Super I/O chip w/LPC interface
  23  *            IT8718F  Super I/O chip w/LPC interface
  24  *            IT8720F  Super I/O chip w/LPC interface
  25  *            IT8721F  Super I/O chip w/LPC interface
  26  *            IT8726F  Super I/O chip w/LPC interface
  27  *            IT8728F  Super I/O chip w/LPC interface
  28  *            IT8732F  Super I/O chip w/LPC interface
  29  *            IT8758E  Super I/O chip w/LPC interface
  30  *            IT8771E  Super I/O chip w/LPC interface
  31  *            IT8772E  Super I/O chip w/LPC interface
  32  *            IT8781F  Super I/O chip w/LPC interface
  33  *            IT8782F  Super I/O chip w/LPC interface
  34  *            IT8783E/F Super I/O chip w/LPC interface
  35  *            IT8786E  Super I/O chip w/LPC interface
  36  *            IT8790E  Super I/O chip w/LPC interface
  37  *            IT8792E  Super I/O chip w/LPC interface
  38  *            Sis950   A clone of the IT8705F
  39  *
  40  *  Copyright (C) 2001 Chris Gauthron
  41  *  Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de>
  42  *
  43  *  This program is free software; you can redistribute it and/or modify
  44  *  it under the terms of the GNU General Public License as published by
  45  *  the Free Software Foundation; either version 2 of the License, or
  46  *  (at your option) any later version.
  47  *
  48  *  This program is distributed in the hope that it will be useful,
  49  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  50  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  51  *  GNU General Public License for more details.
  52  */
  53
  54 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  55
  56 #include <linux/bitops.h>
  57 #include <linux/module.h>
  58 #include <linux/init.h>
  59 #include <linux/slab.h>
  60 #include <linux/jiffies.h>
  61 #include <linux/platform_device.h>
  62 #include <linux/hwmon.h>
  63 #include <linux/hwmon-sysfs.h>
  64 #include <linux/hwmon-vid.h>
  65 #include <linux/err.h>
  66 #include <linux/mutex.h>
  67 #include <linux/sysfs.h>
  68 #include <linux/string.h>
  69 #include <linux/dmi.h>
  70 #include <linux/acpi.h>
  71 #include <linux/io.h>
  72 #include "compat.h"
  73
  74 #define DRVNAME "it87"
  75
  76 enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732,
  77              it8771, it8772, it8781, it8782, it8783, it8786, it8790,
  78              it8792, it8603, it8607, it8620, it8622, it8628, it8686 };
  79
  80 static unsigned short force_id;
  81 module_param(force_id, ushort, 0);
  82 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  83
  84 static struct platform_device *it87_pdev[2];
  85
  86 #define REG_2E  0x2e    /* The register to read/write */
  87 #define REG_4E  0x4e    /* Secondary register to read/write */
  88
  89 #define DEV     0x07    /* Register: Logical device select */
  90 #define PME     0x04    /* The device with the fan registers in it */
  91
  92 /* The device with the IT8718F/IT8720F VID value in it */
  93 #define GPIO    0x07
  94
  95 #define DEVID   0x20    /* Register: Device ID */
  96 #define DEVREV  0x22    /* Register: Device Revision */
  97
  98 static inline int superio_inb(int ioreg, int reg)
  99 {
 100         outb(reg, ioreg);
 101         return inb(ioreg + 1);
 102 }
 103
 104 static inline void superio_outb(int ioreg, int reg, int val)
 105 {
 106         outb(reg, ioreg);
 107         outb(val, ioreg + 1);
 108 }
 109
 110 static int superio_inw(int ioreg, int reg)
 111 {
 112         int val;
 113
 114         outb(reg++, ioreg);
 115         val = inb(ioreg + 1) << 8;
 116         outb(reg, ioreg);
 117         val |= inb(ioreg + 1);
 118         return val;
 119 }
 120
 121 static inline void superio_select(int ioreg, int ldn)
 122 {
 123         outb(DEV, ioreg);
 124         outb(ldn, ioreg + 1);
 125 }
 126
 127 static inline int superio_enter(int ioreg)
 128 {
 129         /*
 130          * Try to reserve ioreg and ioreg + 1 for exclusive access.
 131          */
 132         if (!request_muxed_region(ioreg, 2, DRVNAME))
 133                 return -EBUSY;
 134
 135         outb(0x87, ioreg);
 136         outb(0x01, ioreg);
 137         outb(0x55, ioreg);
 138         outb(ioreg == REG_4E ? 0xaa : 0x55, ioreg);
 139         return 0;
 140 }
 141
 142 static inline void superio_exit(int ioreg)
 143 {
 144         outb(0x02, ioreg);
 145         outb(0x02, ioreg + 1);
 146         release_region(ioreg, 2);
 147 }
 148
 149 /* Logical device 4 registers */
 150 #define IT8712F_DEVID 0x8712
 151 #define IT8705F_DEVID 0x8705
 152 #define IT8716F_DEVID 0x8716
 153 #define IT8718F_DEVID 0x8718
 154 #define IT8720F_DEVID 0x8720
 155 #define IT8721F_DEVID 0x8721
 156 #define IT8726F_DEVID 0x8726
 157 #define IT8728F_DEVID 0x8728
 158 #define IT8732F_DEVID 0x8732
 159 #define IT8792E_DEVID 0x8733
 160 #define IT8771E_DEVID 0x8771
 161 #define IT8772E_DEVID 0x8772
 162 #define IT8781F_DEVID 0x8781
 163 #define IT8782F_DEVID 0x8782
 164 #define IT8783E_DEVID 0x8783
 165 #define IT8786E_DEVID 0x8786
 166 #define IT8790E_DEVID 0x8790
 167 #define IT8603E_DEVID 0x8603
 168 #define IT8607E_DEVID 0x8607
 169 #define IT8620E_DEVID 0x8620
 170 #define IT8622E_DEVID 0x8622
 171 #define IT8623E_DEVID 0x8623
 172 #define IT8628E_DEVID 0x8628
 173 #define IT8686E_DEVID 0x8686
 174 #define IT87_ACT_REG  0x30
 175 #define IT87_BASE_REG 0x60
 176
 177 /* Logical device 7 registers (IT8712F and later) */
 178 #define IT87_SIO_GPIO1_REG      0x25
 179 #define IT87_SIO_GPIO2_REG      0x26
 180 #define IT87_SIO_GPIO3_REG      0x27
 181 #define IT87_SIO_GPIO4_REG      0x28
 182 #define IT87_SIO_GPIO5_REG      0x29
 183 #define IT87_SIO_PINX1_REG      0x2a    /* Pin selection */
 184 #define IT87_SIO_PINX2_REG      0x2c    /* Pin selection */
 185 #define IT87_SIO_SPI_REG        0xef    /* SPI function pin select */
 186 #define IT87_SIO_VID_REG        0xfc    /* VID value */
 187 #define IT87_SIO_BEEP_PIN_REG   0xf6    /* Beep pin mapping */
 188
 189 /* Update battery voltage after every reading if true */
 190 static bool update_vbat;
 191
 192 /* Not all BIOSes properly configure the PWM registers */
 193 static bool fix_pwm_polarity;
 194
 195 /* Many IT87 constants specified below */
 196
 197 /* Length of ISA address segment */
 198 #define IT87_EXTENT 8
 199
 200 /* Length of ISA address segment for Environmental Controller */
 201 #define IT87_EC_EXTENT 2
 202
 203 /* Offset of EC registers from ISA base address */
 204 #define IT87_EC_OFFSET 5
 205
 206 /* Where are the ISA address/data registers relative to the EC base address */
 207 #define IT87_ADDR_REG_OFFSET 0
 208 #define IT87_DATA_REG_OFFSET 1
 209
 210 /*----- The IT87 registers -----*/
 211
 212 #define IT87_REG_CONFIG        0x00
 213
 214 #define IT87_REG_ALARM1        0x01
 215 #define IT87_REG_ALARM2        0x02
 216 #define IT87_REG_ALARM3        0x03
 217
 218 #define IT87_REG_BANK           0x06
 219
 220 /*
 221  * The IT8718F and IT8720F have the VID value in a different register, in
 222  * Super-I/O configuration space.
 223  */
 224 #define IT87_REG_VID           0x0a
 225 /*
 226  * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
 227  * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
 228  * mode.
 229  */
 230 #define IT87_REG_FAN_DIV       0x0b
 231 #define IT87_REG_FAN_16BIT     0x0c
 232
 233 /*
 234  * Monitors:
 235  * - up to 13 voltage (0 to 7, battery, avcc, 10 to 12)
 236  * - up to 6 temp (1 to 6)
 237  * - up to 6 fan (1 to 6)
 238  */
 239
 240 static const u8 IT87_REG_FAN[]         = { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c };
 241 static const u8 IT87_REG_FAN_MIN[]     = { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e };
 242 static const u8 IT87_REG_FANX[]        = { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d };
 243 static const u8 IT87_REG_FANX_MIN[]    = { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f };
 244 static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59 };
 245
 246 #define IT87_REG_FAN_MAIN_CTRL 0x13
 247 #define IT87_REG_FAN_CTL       0x14
 248 static const u8 IT87_REG_PWM[]         = { 0x15, 0x16, 0x17, 0x7f, 0xa7, 0xaf };
 249 static const u8 IT87_REG_PWM_DUTY[]    = { 0x63, 0x6b, 0x73, 0x7b, 0xa3, 0xab };
 250
 251 static const u8 IT87_REG_VIN[]  = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26,
 252                                     0x27, 0x28, 0x2f, 0x2c, 0x2d, 0x2e };
 253
 254 #define IT87_REG_TEMP(nr)      (0x29 + (nr))
 255
 256 #define IT87_REG_VIN_MAX(nr)   (0x30 + (nr) * 2)
 257 #define IT87_REG_VIN_MIN(nr)   (0x31 + (nr) * 2)
 258 #define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
 259 #define IT87_REG_TEMP_LOW(nr)  (0x41 + (nr) * 2)
 260
 261 #define IT87_REG_VIN_ENABLE    0x50
 262 #define IT87_REG_TEMP_ENABLE   0x51
 263 #define IT87_REG_TEMP_EXTRA    0x55
 264 #define IT87_REG_BEEP_ENABLE   0x5c
 265
 266 #define IT87_REG_CHIPID        0x58
 267
 268 static const u8 IT87_REG_AUTO_BASE[] = { 0x60, 0x68, 0x70, 0x78, 0xa0, 0xa8 };
 269
 270 #define IT87_REG_AUTO_TEMP(nr, i) (IT87_REG_AUTO_BASE[nr] + (i))
 271 #define IT87_REG_AUTO_PWM(nr, i)  (IT87_REG_AUTO_BASE[nr] + 5 + (i))
 272
 273 #define IT87_REG_TEMP456_ENABLE 0x77
 274
 275 #define NUM_VIN                 ARRAY_SIZE(IT87_REG_VIN)
 276 #define NUM_VIN_LIMIT           8
 277 #define NUM_TEMP                6
 278 #define NUM_TEMP_OFFSET         ARRAY_SIZE(IT87_REG_TEMP_OFFSET)
 279 #define NUM_TEMP_LIMIT          3
 280 #define NUM_FAN                 ARRAY_SIZE(IT87_REG_FAN)
 281 #define NUM_FAN_DIV             3
 282 #define NUM_PWM                 ARRAY_SIZE(IT87_REG_PWM)
 283 #define NUM_AUTO_PWM            ARRAY_SIZE(IT87_REG_PWM)
 284
 285 struct it87_devices {
 286         const char *name;
 287         const char * const suffix;
 288         u32 features;
 289         u8 peci_mask;
 290         u8 old_peci_mask;
 291 };
 292
 293 #define FEAT_12MV_ADC           BIT(0)
 294 #define FEAT_NEWER_AUTOPWM      BIT(1)
 295 #define FEAT_OLD_AUTOPWM        BIT(2)
 296 #define FEAT_16BIT_FANS         BIT(3)
 297 #define FEAT_TEMP_OFFSET        BIT(4)
 298 #define FEAT_TEMP_PECI          BIT(5)
 299 #define FEAT_TEMP_OLD_PECI      BIT(6)
 300 #define FEAT_FAN16_CONFIG       BIT(7)  /* Need to enable 16-bit fans */
 301 #define FEAT_FIVE_FANS          BIT(8)  /* Supports five fans */
 302 #define FEAT_VID                BIT(9)  /* Set if chip supports VID */
 303 #define FEAT_IN7_INTERNAL       BIT(10) /* Set if in7 is internal */
 304 #define FEAT_SIX_FANS           BIT(11) /* Supports six fans */
 305 #define FEAT_10_9MV_ADC         BIT(12)
 306 #define FEAT_AVCC3              BIT(13) /* Chip supports in9/AVCC3 */
 307 #define FEAT_FIVE_PWM           BIT(14) /* Chip supports 5 pwm chn */
 308 #define FEAT_SIX_PWM            BIT(15) /* Chip supports 6 pwm chn */
 309 #define FEAT_PWM_FREQ2          BIT(16) /* Separate pwm freq 2 */
 310 #define FEAT_SIX_TEMP           BIT(17) /* Up to 6 temp sensors */
 311 #define FEAT_VIN3_5V            BIT(18) /* VIN3 connected to +5V */
 312 #define FEAT_FOUR_FANS          BIT(19) /* Supports four fans */
 313 #define FEAT_FOUR_PWM           BIT(20) /* Supports four fan controls */
 314 #define FEAT_BANK_SEL           BIT(21) /* Chip has multi-bank support */
 315
 316 static const struct it87_devices it87_devices[] = {
 317         [it87] = {
 318                 .name = "it87",
 319                 .suffix = "F",
 320                 .features = FEAT_OLD_AUTOPWM,   /* may need to overwrite */
 321         },
 322         [it8712] = {
 323                 .name = "it8712",
 324                 .suffix = "F",
 325                 .features = FEAT_OLD_AUTOPWM | FEAT_VID,
 326                                                 /* may need to overwrite */
 327         },
 328         [it8716] = {
 329                 .name = "it8716",
 330                 .suffix = "F",
 331                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 332                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2,
 333         },
 334         [it8718] = {
 335                 .name = "it8718",
 336                 .suffix = "F",
 337                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 338                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 339                   | FEAT_PWM_FREQ2,
 340                 .old_peci_mask = 0x4,
 341         },
 342         [it8720] = {
 343                 .name = "it8720",
 344                 .suffix = "F",
 345                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 346                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 347                   | FEAT_PWM_FREQ2,
 348                 .old_peci_mask = 0x4,
 349         },
 350         [it8721] = {
 351                 .name = "it8721",
 352                 .suffix = "F",
 353                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 354                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 355                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL
 356                   | FEAT_PWM_FREQ2,
 357                 .peci_mask = 0x05,
 358                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 359         },
 360         [it8728] = {
 361                 .name = "it8728",
 362                 .suffix = "F",
 363                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 364                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 365                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2,
 366                 .peci_mask = 0x07,
 367         },
 368         [it8732] = {
 369                 .name = "it8732",
 370                 .suffix = "F",
 371                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 372                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 373                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_FOUR_FANS
 374                   | FEAT_FOUR_PWM,
 375                 .peci_mask = 0x07,
 376                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 377         },
 378         [it8771] = {
 379                 .name = "it8771",
 380                 .suffix = "E",
 381                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 382                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 383                   | FEAT_PWM_FREQ2,
 384                                 /* PECI: guesswork */
 385                                 /* 12mV ADC (OHM) */
 386                                 /* 16 bit fans (OHM) */
 387                                 /* three fans, always 16 bit (guesswork) */
 388                 .peci_mask = 0x07,
 389         },
 390         [it8772] = {
 391                 .name = "it8772",
 392                 .suffix = "E",
 393                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 394                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 395                   | FEAT_PWM_FREQ2,
 396                                 /* PECI (coreboot) */
 397                                 /* 12mV ADC (HWSensors4, OHM) */
 398                                 /* 16 bit fans (HWSensors4, OHM) */
 399                                 /* three fans, always 16 bit (datasheet) */
 400                 .peci_mask = 0x07,
 401         },
 402         [it8781] = {
 403                 .name = "it8781",
 404                 .suffix = "F",
 405                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 406                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
 407                 .old_peci_mask = 0x4,
 408         },
 409         [it8782] = {
 410                 .name = "it8782",
 411                 .suffix = "F",
 412                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 413                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
 414                 .old_peci_mask = 0x4,
 415         },
 416         [it8783] = {
 417                 .name = "it8783",
 418                 .suffix = "E/F",
 419                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 420                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
 421                 .old_peci_mask = 0x4,
 422         },
 423         [it8786] = {
 424                 .name = "it8786",
 425                 .suffix = "E",
 426                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 427                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 428                   | FEAT_PWM_FREQ2,
 429                 .peci_mask = 0x07,
 430         },
 431         [it8790] = {
 432                 .name = "it8790",
 433                 .suffix = "E",
 434                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 435                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 436                   | FEAT_PWM_FREQ2,
 437                 .peci_mask = 0x07,
 438         },
 439         [it8792] = {
 440                 .name = "it8792",
 441                 .suffix = "E",
 442                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 443                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 444                   | FEAT_PWM_FREQ2,
 445                 .peci_mask = 0x07,
 446         },
 447         [it8603] = {
 448                 .name = "it8603",
 449                 .suffix = "E",
 450                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 451                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 452                   | FEAT_AVCC3 | FEAT_PWM_FREQ2,
 453                 .peci_mask = 0x07,
 454         },
 455         [it8607] = {
 456                 .name = "it8607",
 457                 .suffix = "E",
 458                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 459                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 460                   | FEAT_AVCC3 | FEAT_PWM_FREQ2,
 461                 .peci_mask = 0x07,
 462         },
 463         [it8620] = {
 464                 .name = "it8620",
 465                 .suffix = "E",
 466                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 467                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 468                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 469                   | FEAT_SIX_TEMP | FEAT_VIN3_5V,
 470                 .peci_mask = 0x07,
 471         },
 472         [it8622] = {
 473                 .name = "it8622",
 474                 .suffix = "E",
 475                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 476                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 477                   | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
 478                   | FEAT_AVCC3 | FEAT_VIN3_5V,
 479                 .peci_mask = 0x07,
 480         },
 481         [it8628] = {
 482                 .name = "it8628",
 483                 .suffix = "E",
 484                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 485                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 486                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 487                   | FEAT_SIX_TEMP,
 488                 .peci_mask = 0x07,
 489         },
 490         [it8686] = {
 491                 .name = "it8686",
 492                 .suffix = "E",
 493                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 494                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 495                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 496                   | FEAT_SIX_TEMP | FEAT_BANK_SEL,
 497                 .peci_mask = 0x07,
 498         },
 499 };
 500
 501 #define has_16bit_fans(data)    ((data)->features & FEAT_16BIT_FANS)
 502 #define has_12mv_adc(data)      ((data)->features & FEAT_12MV_ADC)
 503 #define has_10_9mv_adc(data)    ((data)->features & FEAT_10_9MV_ADC)
 504 #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
 505 #define has_old_autopwm(data)   ((data)->features & FEAT_OLD_AUTOPWM)
 506 #define has_temp_offset(data)   ((data)->features & FEAT_TEMP_OFFSET)
 507 #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \
 508                                  ((data)->peci_mask & BIT(nr)))
 509 #define has_temp_old_peci(data, nr) \
 510                                 (((data)->features & FEAT_TEMP_OLD_PECI) && \
 511                                  ((data)->old_peci_mask & BIT(nr)))
 512 #define has_fan16_config(data)  ((data)->features & FEAT_FAN16_CONFIG)
 513 #define has_five_fans(data)     ((data)->features & (FEAT_FIVE_FANS | \
 514                                                      FEAT_SIX_FANS))
 515 #define has_vid(data)           ((data)->features & FEAT_VID)
 516 #define has_in7_internal(data)  ((data)->features & FEAT_IN7_INTERNAL)
 517 #define has_six_fans(data)      ((data)->features & FEAT_SIX_FANS)
 518 #define has_avcc3(data)         ((data)->features & FEAT_AVCC3)
 519 #define has_five_pwm(data)      ((data)->features & (FEAT_FIVE_PWM \
 520                                                      | FEAT_SIX_PWM))
 521 #define has_six_pwm(data)       ((data)->features & FEAT_SIX_PWM)
 522 #define has_pwm_freq2(data)     ((data)->features & FEAT_PWM_FREQ2)
 523 #define has_six_temp(data)      ((data)->features & FEAT_SIX_TEMP)
 524 #define has_vin3_5v(data)       ((data)->features & FEAT_VIN3_5V)
 525 #define has_four_fans(data)     ((data)->features & (FEAT_FOUR_FANS | \
 526                                                      FEAT_FIVE_FANS | \
 527                                                      FEAT_SIX_FANS))
 528 #define has_four_pwm(data)      ((data)->features & (FEAT_FOUR_PWM | \
 529                                                      FEAT_FIVE_PWM \
 530                                                      | FEAT_SIX_PWM))
 531 #define has_bank_sel(data)      ((data)->features & FEAT_BANK_SEL)
 532
 533 struct it87_sio_data {
 534         enum chips type;
 535         /* Values read from Super-I/O config space */
 536         u8 revision;
 537         u8 vid_value;
 538         u8 beep_pin;
 539         u8 internal;    /* Internal sensors can be labeled */
 540         /* Features skipped based on config or DMI */
 541         u16 skip_in;
 542         u8 skip_vid;
 543         u8 skip_fan;
 544         u8 skip_pwm;
 545         u8 skip_temp;
 546 };
 547
 548 /*
 549  * For each registered chip, we need to keep some data in memory.
 550  * The structure is dynamically allocated.
 551  */
 552 struct it87_data {
 553         const struct attribute_group *groups[7];
 554         enum chips type;
 555         u32 features;
 556         u8 bank;
 557         u8 peci_mask;
 558         u8 old_peci_mask;
 559
 560         unsigned short addr;
 561         const char *name;
 562         struct mutex update_lock;
 563         char valid;             /* !=0 if following fields are valid */
 564         unsigned long last_updated;     /* In jiffies */
 565
 566         u16 in_scaled;          /* Internal voltage sensors are scaled */
 567         u16 in_internal;        /* Bitfield, internal sensors (for labels) */
 568         u16 has_in;             /* Bitfield, voltage sensors enabled */
 569         u8 in[NUM_VIN][3];              /* [nr][0]=in, [1]=min, [2]=max */
 570         u8 has_fan;             /* Bitfield, fans enabled */
 571         u16 fan[NUM_FAN][2];    /* Register values, [nr][0]=fan, [1]=min */
 572         u8 has_temp;            /* Bitfield, temp sensors enabled */
 573         s8 temp[NUM_TEMP][4];   /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
 574         u8 sensor;              /* Register value (IT87_REG_TEMP_ENABLE) */
 575         u8 extra;               /* Register value (IT87_REG_TEMP_EXTRA) */
 576         u8 fan_div[NUM_FAN_DIV];/* Register encoding, shifted right */
 577         bool has_vid;           /* True if VID supported */
 578         u8 vid;                 /* Register encoding, combined */
 579         u8 vrm;
 580         u32 alarms;             /* Register encoding, combined */
 581         bool has_beep;          /* true if beep supported */
 582         u8 beeps;               /* Register encoding */
 583         u8 fan_main_ctrl;       /* Register value */
 584         u8 fan_ctl;             /* Register value */
 585
 586         /*
 587          * The following 3 arrays correspond to the same registers up to
 588          * the IT8720F. The meaning of bits 6-0 depends on the value of bit
 589          * 7, and we want to preserve settings on mode changes, so we have
 590          * to track all values separately.
 591          * Starting with the IT8721F, the manual PWM duty cycles are stored
 592          * in separate registers (8-bit values), so the separate tracking
 593          * is no longer needed, but it is still done to keep the driver
 594          * simple.
 595          */
 596         u8 has_pwm;             /* Bitfield, pwm control enabled */
 597         u8 pwm_ctrl[NUM_PWM];   /* Register value */
 598         u8 pwm_duty[NUM_PWM];   /* Manual PWM value set by user */
 599         u8 pwm_temp_map[NUM_PWM];/* PWM to temp. chan. mapping (bits 1-0) */
 600
 601         /* Automatic fan speed control registers */
 602         u8 auto_pwm[NUM_AUTO_PWM][4];   /* [nr][3] is hard-coded */
 603         s8 auto_temp[NUM_AUTO_PWM][5];  /* [nr][0] is point1_temp_hyst */
 604 };
 605
 606 static int adc_lsb(const struct it87_data *data, int nr)
 607 {
 608         int lsb;
 609
 610         if (has_12mv_adc(data))
 611                 lsb = 120;
 612         else if (has_10_9mv_adc(data))
 613                 lsb = 109;
 614         else
 615                 lsb = 160;
 616         if (data->in_scaled & BIT(nr))
 617                 lsb <<= 1;
 618         return lsb;
 619 }
 620
 621 static u8 in_to_reg(const struct it87_data *data, int nr, long val)
 622 {
 623         val = DIV_ROUND_CLOSEST(val * 10, adc_lsb(data, nr));
 624         return clamp_val(val, 0, 255);
 625 }
 626
 627 static int in_from_reg(const struct it87_data *data, int nr, int val)
 628 {
 629         return DIV_ROUND_CLOSEST(val * adc_lsb(data, nr), 10);
 630 }
 631
 632 static inline u8 FAN_TO_REG(long rpm, int div)
 633 {
 634         if (rpm == 0)
 635                 return 255;
 636         rpm = clamp_val(rpm, 1, 1000000);
 637         return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
 638 }
 639
 640 static inline u16 FAN16_TO_REG(long rpm)
 641 {
 642         if (rpm == 0)
 643                 return 0xffff;
 644         return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
 645 }
 646
 647 #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
 648                                 1350000 / ((val) * (div)))
 649 /* The divider is fixed to 2 in 16-bit mode */
 650 #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
 651                              1350000 / ((val) * 2))
 652
 653 #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \
 654                                     ((val) + 500) / 1000), -128, 127))
 655 #define TEMP_FROM_REG(val) ((val) * 1000)
 656
 657 static u8 pwm_to_reg(const struct it87_data *data, long val)
 658 {
 659         if (has_newer_autopwm(data))
 660                 return val;
 661         else
 662                 return val >> 1;
 663 }
 664
 665 static int pwm_from_reg(const struct it87_data *data, u8 reg)
 666 {
 667         if (has_newer_autopwm(data))
 668                 return reg;
 669         else
 670                 return (reg & 0x7f) << 1;
 671 }
 672
 673 static int DIV_TO_REG(int val)
 674 {
 675         int answer = 0;
 676
 677         while (answer < 7 && (val >>= 1))
 678                 answer++;
 679         return answer;
 680 }
 681
 682 #define DIV_FROM_REG(val) BIT(val)
 683
 684 /*
 685  * PWM base frequencies. The frequency has to be divided by either 128 or 256,
 686  * depending on the chip type, to calculate the actual PWM frequency.
 687  *
 688  * Some of the chip datasheets suggest a base frequency of 51 kHz instead
 689  * of 750 kHz for the slowest base frequency, resulting in a PWM frequency
 690  * of 200 Hz. Sometimes both PWM frequency select registers are affected,
 691  * sometimes just one. It is unknown if this is a datasheet error or real,
 692  * so this is ignored for now.
 693  */
 694 static const unsigned int pwm_freq[8] = {
 695         48000000,
 696         24000000,
 697         12000000,
 698         8000000,
 699         6000000,
 700         3000000,
 701         1500000,
 702         750000,
 703 };
 704
 705 static int _it87_read_value(struct it87_data *data, u8 reg)
 706 {
 707         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 708         return inb_p(data->addr + IT87_DATA_REG_OFFSET);
 709 }
 710
 711 static void _it87_write_value(struct it87_data *data, u8 reg, u8 value)
 712 {
 713         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 714         outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
 715 }
 716
 717 static void it87_set_bank(struct it87_data *data, u8 bank)
 718 {
 719         if (has_bank_sel(data) && bank != data->bank) {
 720                 u8 breg = _it87_read_value(data, IT87_REG_BANK);
 721
 722                 breg &= 0x1f;
 723                 breg |= (bank << 5);
 724                 data->bank = bank;
 725                 _it87_write_value(data, IT87_REG_BANK, breg);
 726         }
 727 }
 728
 729 /*
 730  * Must be called with data->update_lock held, except during initialization.
 731  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 732  * would slow down the IT87 access and should not be necessary.
 733  */
 734 static int it87_read_value(struct it87_data *data, u16 reg)
 735 {
 736         it87_set_bank(data, reg >> 8);
 737         return _it87_read_value(data, reg & 0xff);
 738 }
 739
 740 /*
 741  * Must be called with data->update_lock held, except during initialization.
 742  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 743  * would slow down the IT87 access and should not be necessary.
 744  */
 745 static void it87_write_value(struct it87_data *data, u16 reg, u8 value)
 746 {
 747         it87_set_bank(data, reg >> 8);
 748         _it87_write_value(data, reg & 0xff, value);
 749 }
 750
 751 static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
 752 {
 753         data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM[nr]);
 754         if (has_newer_autopwm(data)) {
 755                 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
 756                 data->pwm_duty[nr] = it87_read_value(data,
 757                                                      IT87_REG_PWM_DUTY[nr]);
 758         } else {
 759                 if (data->pwm_ctrl[nr] & 0x80)  /* Automatic mode */
 760                         data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
 761                 else                            /* Manual mode */
 762                         data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
 763         }
 764
 765         if (has_old_autopwm(data)) {
 766                 int i;
 767
 768                 for (i = 0; i < 5 ; i++)
 769                         data->auto_temp[nr][i] = it87_read_value(data,
 770                                                 IT87_REG_AUTO_TEMP(nr, i));
 771                 for (i = 0; i < 3 ; i++)
 772                         data->auto_pwm[nr][i] = it87_read_value(data,
 773                                                 IT87_REG_AUTO_PWM(nr, i));
 774         } else if (has_newer_autopwm(data)) {
 775                 int i;
 776
 777                 /*
 778                  * 0: temperature hysteresis (base + 5)
 779                  * 1: fan off temperature (base + 0)
 780                  * 2: fan start temperature (base + 1)
 781                  * 3: fan max temperature (base + 2)
 782                  */
 783                 data->auto_temp[nr][0] =
 784                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 5));
 785
 786                 for (i = 0; i < 3 ; i++)
 787                         data->auto_temp[nr][i + 1] =
 788                                 it87_read_value(data,
 789                                                 IT87_REG_AUTO_TEMP(nr, i));
 790                 /*
 791                  * 0: start pwm value (base + 3)
 792                  * 1: pwm slope (base + 4, 1/8th pwm)
 793                  */
 794                 data->auto_pwm[nr][0] =
 795                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 3));
 796                 data->auto_pwm[nr][1] =
 797                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 4));
 798         }
 799 }
 800
 801 static struct it87_data *it87_update_device(struct device *dev)
 802 {
 803         struct it87_data *data = dev_get_drvdata(dev);
 804         int i;
 805
 806         mutex_lock(&data->update_lock);
 807
 808         if (time_after(jiffies, data->last_updated + HZ + HZ / 2) ||
 809             !data->valid) {
 810                 if (update_vbat) {
 811                         /*
 812                          * Cleared after each update, so reenable.  Value
 813                          * returned by this read will be previous value
 814                          */
 815                         it87_write_value(data, IT87_REG_CONFIG,
 816                                 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
 817                 }
 818                 for (i = 0; i < NUM_VIN; i++) {
 819                         if (!(data->has_in & BIT(i)))
 820                                 continue;
 821
 822                         data->in[i][0] =
 823                                 it87_read_value(data, IT87_REG_VIN[i]);
 824
 825                         /* VBAT and AVCC don't have limit registers */
 826                         if (i >= NUM_VIN_LIMIT)
 827                                 continue;
 828
 829                         data->in[i][1] =
 830                                 it87_read_value(data, IT87_REG_VIN_MIN(i));
 831                         data->in[i][2] =
 832                                 it87_read_value(data, IT87_REG_VIN_MAX(i));
 833                 }
 834
 835                 for (i = 0; i < NUM_FAN; i++) {
 836                         /* Skip disabled fans */
 837                         if (!(data->has_fan & BIT(i)))
 838                                 continue;
 839
 840                         data->fan[i][1] =
 841                                 it87_read_value(data, IT87_REG_FAN_MIN[i]);
 842                         data->fan[i][0] = it87_read_value(data,
 843                                        IT87_REG_FAN[i]);
 844                         /* Add high byte if in 16-bit mode */
 845                         if (has_16bit_fans(data)) {
 846                                 data->fan[i][0] |= it87_read_value(data,
 847                                                 IT87_REG_FANX[i]) << 8;
 848                                 data->fan[i][1] |= it87_read_value(data,
 849                                                 IT87_REG_FANX_MIN[i]) << 8;
 850                         }
 851                 }
 852                 for (i = 0; i < NUM_TEMP; i++) {
 853                         if (!(data->has_temp & BIT(i)))
 854                                 continue;
 855                         data->temp[i][0] =
 856                                 it87_read_value(data, IT87_REG_TEMP(i));
 857
 858                         if (has_temp_offset(data) && i < NUM_TEMP_OFFSET)
 859                                 data->temp[i][3] =
 860                                   it87_read_value(data,
 861                                                   IT87_REG_TEMP_OFFSET[i]);
 862
 863                         if (i >= NUM_TEMP_LIMIT)
 864                                 continue;
 865
 866                         data->temp[i][1] =
 867                                 it87_read_value(data, IT87_REG_TEMP_LOW(i));
 868                         data->temp[i][2] =
 869                                 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
 870                 }
 871
 872                 /* Newer chips don't have clock dividers */
 873                 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
 874                         i = it87_read_value(data, IT87_REG_FAN_DIV);
 875                         data->fan_div[0] = i & 0x07;
 876                         data->fan_div[1] = (i >> 3) & 0x07;
 877                         data->fan_div[2] = (i & 0x40) ? 3 : 1;
 878                 }
 879
 880                 data->alarms =
 881                         it87_read_value(data, IT87_REG_ALARM1) |
 882                         (it87_read_value(data, IT87_REG_ALARM2) << 8) |
 883                         (it87_read_value(data, IT87_REG_ALARM3) << 16);
 884                 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
 885
 886                 data->fan_main_ctrl = it87_read_value(data,
 887                                 IT87_REG_FAN_MAIN_CTRL);
 888                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
 889                 for (i = 0; i < NUM_PWM; i++) {
 890                         if (!(data->has_pwm & BIT(i)))
 891                                 continue;
 892                         it87_update_pwm_ctrl(data, i);
 893                 }
 894
 895                 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
 896                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
 897                 /*
 898                  * The IT8705F does not have VID capability.
 899                  * The IT8718F and later don't use IT87_REG_VID for the
 900                  * same purpose.
 901                  */
 902                 if (data->type == it8712 || data->type == it8716) {
 903                         data->vid = it87_read_value(data, IT87_REG_VID);
 904                         /*
 905                          * The older IT8712F revisions had only 5 VID pins,
 906                          * but we assume it is always safe to read 6 bits.
 907                          */
 908                         data->vid &= 0x3f;
 909                 }
 910                 data->last_updated = jiffies;
 911                 data->valid = 1;
 912         }
 913
 914         mutex_unlock(&data->update_lock);
 915
 916         return data;
 917 }
 918
 919 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
 920                        char *buf)
 921 {
 922         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 923         struct it87_data *data = it87_update_device(dev);
 924         int index = sattr->index;
 925         int nr = sattr->nr;
 926
 927         return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
 928 }
 929
 930 static ssize_t set_in(struct device *dev, struct device_attribute *attr,
 931                       const char *buf, size_t count)
 932 {
 933         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 934         struct it87_data *data = dev_get_drvdata(dev);
 935         int index = sattr->index;
 936         int nr = sattr->nr;
 937         unsigned long val;
 938
 939         if (kstrtoul(buf, 10, &val) < 0)
 940                 return -EINVAL;
 941
 942         mutex_lock(&data->update_lock);
 943         data->in[nr][index] = in_to_reg(data, nr, val);
 944         it87_write_value(data,
 945                          index == 1 ? IT87_REG_VIN_MIN(nr)
 946                                     : IT87_REG_VIN_MAX(nr),
 947                          data->in[nr][index]);
 948         mutex_unlock(&data->update_lock);
 949         return count;
 950 }
 951
 952 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
 953 static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
 954                             0, 1);
 955 static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
 956                             0, 2);
 957
 958 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
 959 static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
 960                             1, 1);
 961 static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
 962                             1, 2);
 963
 964 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
 965 static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
 966                             2, 1);
 967 static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
 968                             2, 2);
 969
 970 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
 971 static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
 972                             3, 1);
 973 static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
 974                             3, 2);
 975
 976 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
 977 static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
 978                             4, 1);
 979 static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
 980                             4, 2);
 981
 982 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
 983 static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
 984                             5, 1);
 985 static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
 986                             5, 2);
 987
 988 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
 989 static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
 990                             6, 1);
 991 static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
 992                             6, 2);
 993
 994 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
 995 static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
 996                             7, 1);
 997 static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
 998                             7, 2);
 999
1000 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
1001 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0);
1002 static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in, NULL, 10, 0);
1003 static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in, NULL, 11, 0);
1004 static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in, NULL, 12, 0);
1005
1006 /* Up to 6 temperatures */
1007 static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
1008                          char *buf)
1009 {
1010         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1011         int nr = sattr->nr;
1012         int index = sattr->index;
1013         struct it87_data *data = it87_update_device(dev);
1014
1015         return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
1016 }
1017
1018 static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
1019                         const char *buf, size_t count)
1020 {
1021         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1022         int nr = sattr->nr;
1023         int index = sattr->index;
1024         struct it87_data *data = dev_get_drvdata(dev);
1025         long val;
1026         u8 reg, regval;
1027
1028         if (kstrtol(buf, 10, &val) < 0)
1029                 return -EINVAL;
1030
1031         mutex_lock(&data->update_lock);
1032
1033         switch (index) {
1034         default:
1035         case 1:
1036                 reg = IT87_REG_TEMP_LOW(nr);
1037                 break;
1038         case 2:
1039                 reg = IT87_REG_TEMP_HIGH(nr);
1040                 break;
1041         case 3:
1042                 regval = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1043                 if (!(regval & 0x80)) {
1044                         regval |= 0x80;
1045                         it87_write_value(data, IT87_REG_BEEP_ENABLE, regval);
1046                 }
1047                 data->valid = 0;
1048                 reg = IT87_REG_TEMP_OFFSET[nr];
1049                 break;
1050         }
1051
1052         data->temp[nr][index] = TEMP_TO_REG(val);
1053         it87_write_value(data, reg, data->temp[nr][index]);
1054         mutex_unlock(&data->update_lock);
1055         return count;
1056 }
1057
1058 static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
1059 static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1060                             0, 1);
1061 static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1062                             0, 2);
1063 static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
1064                             set_temp, 0, 3);
1065 static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
1066 static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1067                             1, 1);
1068 static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1069                             1, 2);
1070 static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
1071                             set_temp, 1, 3);
1072 static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
1073 static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1074                             2, 1);
1075 static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1076                             2, 2);
1077 static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
1078                             set_temp, 2, 3);
1079 static SENSOR_DEVICE_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0);
1080 static SENSOR_DEVICE_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0);
1081 static SENSOR_DEVICE_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0);
1082
1083 static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
1084                               char *buf)
1085 {
1086         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1087         int nr = sensor_attr->index;
1088         struct it87_data *data = it87_update_device(dev);
1089         u8 reg = data->sensor;      /* In case value is updated while used */
1090         u8 extra = data->extra;
1091
1092         if ((has_temp_peci(data, nr) && (reg >> 6 == nr + 1)) ||
1093             (has_temp_old_peci(data, nr) && (extra & 0x80)))
1094                 return sprintf(buf, "6\n");  /* Intel PECI */
1095         if (reg & (1 << nr))
1096                 return sprintf(buf, "3\n");  /* thermal diode */
1097         if (reg & (8 << nr))
1098                 return sprintf(buf, "4\n");  /* thermistor */
1099         return sprintf(buf, "0\n");      /* disabled */
1100 }
1101
1102 static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
1103                              const char *buf, size_t count)
1104 {
1105         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1106         int nr = sensor_attr->index;
1107
1108         struct it87_data *data = dev_get_drvdata(dev);
1109         long val;
1110         u8 reg, extra;
1111
1112         if (kstrtol(buf, 10, &val) < 0)
1113                 return -EINVAL;
1114
1115         reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1116         reg &= ~(1 << nr);
1117         reg &= ~(8 << nr);
1118         if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6))
1119                 reg &= 0x3f;
1120         extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1121         if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6))
1122                 extra &= 0x7f;
1123         if (val == 2) { /* backwards compatibility */
1124                 dev_warn(dev,
1125                          "Sensor type 2 is deprecated, please use 4 instead\n");
1126                 val = 4;
1127         }
1128         /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */
1129         if (val == 3)
1130                 reg |= 1 << nr;
1131         else if (val == 4)
1132                 reg |= 8 << nr;
1133         else if (has_temp_peci(data, nr) && val == 6)
1134                 reg |= (nr + 1) << 6;
1135         else if (has_temp_old_peci(data, nr) && val == 6)
1136                 extra |= 0x80;
1137         else if (val != 0)
1138                 return -EINVAL;
1139
1140         mutex_lock(&data->update_lock);
1141         data->sensor = reg;
1142         data->extra = extra;
1143         it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
1144         if (has_temp_old_peci(data, nr))
1145                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1146         data->valid = 0;        /* Force cache refresh */
1147         mutex_unlock(&data->update_lock);
1148         return count;
1149 }
1150
1151 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1152                           set_temp_type, 0);
1153 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1154                           set_temp_type, 1);
1155 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1156                           set_temp_type, 2);
1157
1158 /* 6 Fans */
1159
1160 static int pwm_mode(const struct it87_data *data, int nr)
1161 {
1162         if (data->type != it8603 && nr < 3 && !(data->fan_main_ctrl & BIT(nr)))
1163                 return 0;                               /* Full speed */
1164         if (data->pwm_ctrl[nr] & 0x80)
1165                 return 2;                               /* Automatic mode */
1166         if ((data->type == it8603 || nr >= 3) &&
1167             data->pwm_duty[nr] == pwm_to_reg(data, 0xff))
1168                 return 0;                       /* Full speed */
1169
1170         return 1;                               /* Manual mode */
1171 }
1172
1173 static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
1174                         char *buf)
1175 {
1176         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1177         int nr = sattr->nr;
1178         int index = sattr->index;
1179         int speed;
1180         struct it87_data *data = it87_update_device(dev);
1181
1182         speed = has_16bit_fans(data) ?
1183                 FAN16_FROM_REG(data->fan[nr][index]) :
1184                 FAN_FROM_REG(data->fan[nr][index],
1185                              DIV_FROM_REG(data->fan_div[nr]));
1186         return sprintf(buf, "%d\n", speed);
1187 }
1188
1189 static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
1190                             char *buf)
1191 {
1192         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1193         struct it87_data *data = it87_update_device(dev);
1194         int nr = sensor_attr->index;
1195
1196         return sprintf(buf, "%lu\n", DIV_FROM_REG(data->fan_div[nr]));
1197 }
1198
1199 static ssize_t show_pwm_enable(struct device *dev,
1200                                struct device_attribute *attr, char *buf)
1201 {
1202         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1203         struct it87_data *data = it87_update_device(dev);
1204         int nr = sensor_attr->index;
1205
1206         return sprintf(buf, "%d\n", pwm_mode(data, nr));
1207 }
1208
1209 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
1210                         char *buf)
1211 {
1212         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1213         struct it87_data *data = it87_update_device(dev);
1214         int nr = sensor_attr->index;
1215
1216         return sprintf(buf, "%d\n",
1217                        pwm_from_reg(data, data->pwm_duty[nr]));
1218 }
1219
1220 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
1221                              char *buf)
1222 {
1223         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1224         struct it87_data *data = it87_update_device(dev);
1225         int nr = sensor_attr->index;
1226         unsigned int freq;
1227         int index;
1228
1229         if (has_pwm_freq2(data) && nr == 1)
1230                 index = (data->extra >> 4) & 0x07;
1231         else
1232                 index = (data->fan_ctl >> 4) & 0x07;
1233
1234         freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128);
1235
1236         return sprintf(buf, "%u\n", freq);
1237 }
1238
1239 static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
1240                        const char *buf, size_t count)
1241 {
1242         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1243         int nr = sattr->nr;
1244         int index = sattr->index;
1245
1246         struct it87_data *data = dev_get_drvdata(dev);
1247         long val;
1248         u8 reg;
1249
1250         if (kstrtol(buf, 10, &val) < 0)
1251                 return -EINVAL;
1252
1253         mutex_lock(&data->update_lock);
1254
1255         if (has_16bit_fans(data)) {
1256                 data->fan[nr][index] = FAN16_TO_REG(val);
1257                 it87_write_value(data, IT87_REG_FAN_MIN[nr],
1258                                  data->fan[nr][index] & 0xff);
1259                 it87_write_value(data, IT87_REG_FANX_MIN[nr],
1260                                  data->fan[nr][index] >> 8);
1261         } else {
1262                 reg = it87_read_value(data, IT87_REG_FAN_DIV);
1263                 switch (nr) {
1264                 case 0:
1265                         data->fan_div[nr] = reg & 0x07;
1266                         break;
1267                 case 1:
1268                         data->fan_div[nr] = (reg >> 3) & 0x07;
1269                         break;
1270                 case 2:
1271                         data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
1272                         break;
1273                 }
1274                 data->fan[nr][index] =
1275                   FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
1276                 it87_write_value(data, IT87_REG_FAN_MIN[nr],
1277                                  data->fan[nr][index]);
1278         }
1279
1280         mutex_unlock(&data->update_lock);
1281         return count;
1282 }
1283
1284 static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
1285                            const char *buf, size_t count)
1286 {
1287         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1288         struct it87_data *data = dev_get_drvdata(dev);
1289         int nr = sensor_attr->index;
1290         unsigned long val;
1291         int min;
1292         u8 old;
1293
1294         if (kstrtoul(buf, 10, &val) < 0)
1295                 return -EINVAL;
1296
1297         mutex_lock(&data->update_lock);
1298         old = it87_read_value(data, IT87_REG_FAN_DIV);
1299
1300         /* Save fan min limit */
1301         min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
1302
1303         switch (nr) {
1304         case 0:
1305         case 1:
1306                 data->fan_div[nr] = DIV_TO_REG(val);
1307                 break;
1308         case 2:
1309                 if (val < 8)
1310                         data->fan_div[nr] = 1;
1311                 else
1312                         data->fan_div[nr] = 3;
1313         }
1314         val = old & 0x80;
1315         val |= (data->fan_div[0] & 0x07);
1316         val |= (data->fan_div[1] & 0x07) << 3;
1317         if (data->fan_div[2] == 3)
1318                 val |= 0x1 << 6;
1319         it87_write_value(data, IT87_REG_FAN_DIV, val);
1320
1321         /* Restore fan min limit */
1322         data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
1323         it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan[nr][1]);
1324
1325         mutex_unlock(&data->update_lock);
1326         return count;
1327 }
1328
1329 /* Returns 0 if OK, -EINVAL otherwise */
1330 static int check_trip_points(struct device *dev, int nr)
1331 {
1332         const struct it87_data *data = dev_get_drvdata(dev);
1333         int i, err = 0;
1334
1335         if (has_old_autopwm(data)) {
1336                 for (i = 0; i < 3; i++) {
1337                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1338                                 err = -EINVAL;
1339                 }
1340                 for (i = 0; i < 2; i++) {
1341                         if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1342                                 err = -EINVAL;
1343                 }
1344         } else if (has_newer_autopwm(data)) {
1345                 for (i = 1; i < 3; i++) {
1346                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1347                                 err = -EINVAL;
1348                 }
1349         }
1350
1351         if (err) {
1352                 dev_err(dev,
1353                         "Inconsistent trip points, not switching to automatic mode\n");
1354                 dev_err(dev, "Adjust the trip points and try again\n");
1355         }
1356         return err;
1357 }
1358
1359 static ssize_t set_pwm_enable(struct device *dev, struct device_attribute *attr,
1360                               const char *buf, size_t count)
1361 {
1362         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1363         struct it87_data *data = dev_get_drvdata(dev);
1364         int nr = sensor_attr->index;
1365         long val;
1366
1367         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
1368                 return -EINVAL;
1369
1370         /* Check trip points before switching to automatic mode */
1371         if (val == 2) {
1372                 if (check_trip_points(dev, nr) < 0)
1373                         return -EINVAL;
1374         }
1375
1376         mutex_lock(&data->update_lock);
1377
1378         if (val == 0) {
1379                 if (nr < 3 && data->type != it8603) {
1380                         int tmp;
1381                         /* make sure the fan is on when in on/off mode */
1382                         tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1383                         it87_write_value(data, IT87_REG_FAN_CTL, tmp | BIT(nr));
1384                         /* set on/off mode */
1385                         data->fan_main_ctrl &= ~BIT(nr);
1386                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1387                                          data->fan_main_ctrl);
1388                 } else {
1389                         u8 ctrl;
1390
1391                         /* No on/off mode, set maximum pwm value */
1392                         data->pwm_duty[nr] = pwm_to_reg(data, 0xff);
1393                         it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1394                                          data->pwm_duty[nr]);
1395                         /* and set manual mode */
1396                         if (has_newer_autopwm(data)) {
1397                                 ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1398                                         data->pwm_temp_map[nr];
1399                         } else {
1400                                 ctrl = data->pwm_duty[nr];
1401                         }
1402                         data->pwm_ctrl[nr] = ctrl;
1403                         it87_write_value(data, IT87_REG_PWM[nr], ctrl);
1404                 }
1405         } else {
1406                 u8 ctrl;
1407
1408                 if (has_newer_autopwm(data)) {
1409                         ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1410                                 data->pwm_temp_map[nr];
1411                         if (val != 1)
1412                                 ctrl |= 0x80;
1413                 } else {
1414                         ctrl = (val == 1 ? data->pwm_duty[nr] : 0x80);
1415                 }
1416                 data->pwm_ctrl[nr] = ctrl;
1417                 it87_write_value(data, IT87_REG_PWM[nr], ctrl);
1418
1419                 if (data->type != it8603 && nr < 3) {
1420                         /* set SmartGuardian mode */
1421                         data->fan_main_ctrl |= BIT(nr);
1422                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1423                                          data->fan_main_ctrl);
1424                 }
1425         }
1426
1427         mutex_unlock(&data->update_lock);
1428         return count;
1429 }
1430
1431 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1432                        const char *buf, size_t count)
1433 {
1434         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1435         struct it87_data *data = dev_get_drvdata(dev);
1436         int nr = sensor_attr->index;
1437         long val;
1438
1439         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1440                 return -EINVAL;
1441
1442         mutex_lock(&data->update_lock);
1443         it87_update_pwm_ctrl(data, nr);
1444         if (has_newer_autopwm(data)) {
1445                 /*
1446                  * If we are in automatic mode, the PWM duty cycle register
1447                  * is read-only so we can't write the value.
1448                  */
1449                 if (data->pwm_ctrl[nr] & 0x80) {
1450                         mutex_unlock(&data->update_lock);
1451                         return -EBUSY;
1452                 }
1453                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1454                 it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1455                                  data->pwm_duty[nr]);
1456         } else {
1457                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1458                 /*
1459                  * If we are in manual mode, write the duty cycle immediately;
1460                  * otherwise, just store it for later use.
1461                  */
1462                 if (!(data->pwm_ctrl[nr] & 0x80)) {
1463                         data->pwm_ctrl[nr] = data->pwm_duty[nr];
1464                         it87_write_value(data, IT87_REG_PWM[nr],
1465                                          data->pwm_ctrl[nr]);
1466                 }
1467         }
1468         mutex_unlock(&data->update_lock);
1469         return count;
1470 }
1471
1472 static ssize_t set_pwm_freq(struct device *dev, struct device_attribute *attr,
1473                             const char *buf, size_t count)
1474 {
1475         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1476         struct it87_data *data = dev_get_drvdata(dev);
1477         int nr = sensor_attr->index;
1478         unsigned long val;
1479         int i;
1480
1481         if (kstrtoul(buf, 10, &val) < 0)
1482                 return -EINVAL;
1483
1484         val = clamp_val(val, 0, 1000000);
1485         val *= has_newer_autopwm(data) ? 256 : 128;
1486
1487         /* Search for the nearest available frequency */
1488         for (i = 0; i < 7; i++) {
1489                 if (val > (pwm_freq[i] + pwm_freq[i + 1]) / 2)
1490                         break;
1491         }
1492
1493         mutex_lock(&data->update_lock);
1494         if (nr == 0) {
1495                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
1496                 data->fan_ctl |= i << 4;
1497                 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
1498         } else {
1499                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x8f;
1500                 data->extra |= i << 4;
1501                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1502         }
1503         mutex_unlock(&data->update_lock);
1504
1505         return count;
1506 }
1507
1508 static ssize_t show_pwm_temp_map(struct device *dev,
1509                                  struct device_attribute *attr, char *buf)
1510 {
1511         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1512         struct it87_data *data = it87_update_device(dev);
1513         int nr = sensor_attr->index;
1514         int map;
1515
1516         map = data->pwm_temp_map[nr];
1517         if (map >= 3)
1518                 map = 0;        /* Should never happen */
1519         if (nr >= 3)            /* pwm channels 3..6 map to temp4..6 */
1520                 map += 3;
1521
1522         return sprintf(buf, "%d\n", (int)BIT(map));
1523 }
1524
1525 static ssize_t set_pwm_temp_map(struct device *dev,
1526                                 struct device_attribute *attr, const char *buf,
1527                                 size_t count)
1528 {
1529         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1530         struct it87_data *data = dev_get_drvdata(dev);
1531         int nr = sensor_attr->index;
1532         long val;
1533         u8 reg;
1534
1535         if (kstrtol(buf, 10, &val) < 0)
1536                 return -EINVAL;
1537
1538         if (nr >= 3)
1539                 val -= 3;
1540
1541         switch (val) {
1542         case BIT(0):
1543                 reg = 0x00;
1544                 break;
1545         case BIT(1):
1546                 reg = 0x01;
1547                 break;
1548         case BIT(2):
1549                 reg = 0x02;
1550                 break;
1551         default:
1552                 return -EINVAL;
1553         }
1554
1555         mutex_lock(&data->update_lock);
1556         it87_update_pwm_ctrl(data, nr);
1557         data->pwm_temp_map[nr] = reg;
1558         /*
1559          * If we are in automatic mode, write the temp mapping immediately;
1560          * otherwise, just store it for later use.
1561          */
1562         if (data->pwm_ctrl[nr] & 0x80) {
1563                 data->pwm_ctrl[nr] = (data->pwm_ctrl[nr] & 0xfc) |
1564                                                 data->pwm_temp_map[nr];
1565                 it87_write_value(data, IT87_REG_PWM[nr], data->pwm_ctrl[nr]);
1566         }
1567         mutex_unlock(&data->update_lock);
1568         return count;
1569 }
1570
1571 static ssize_t show_auto_pwm(struct device *dev, struct device_attribute *attr,
1572                              char *buf)
1573 {
1574         struct it87_data *data = it87_update_device(dev);
1575         struct sensor_device_attribute_2 *sensor_attr =
1576                         to_sensor_dev_attr_2(attr);
1577         int nr = sensor_attr->nr;
1578         int point = sensor_attr->index;
1579
1580         return sprintf(buf, "%d\n",
1581                        pwm_from_reg(data, data->auto_pwm[nr][point]));
1582 }
1583
1584 static ssize_t set_auto_pwm(struct device *dev, struct device_attribute *attr,
1585                             const char *buf, size_t count)
1586 {
1587         struct it87_data *data = dev_get_drvdata(dev);
1588         struct sensor_device_attribute_2 *sensor_attr =
1589                         to_sensor_dev_attr_2(attr);
1590         int nr = sensor_attr->nr;
1591         int point = sensor_attr->index;
1592         int regaddr;
1593         long val;
1594
1595         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1596                 return -EINVAL;
1597
1598         mutex_lock(&data->update_lock);
1599         data->auto_pwm[nr][point] = pwm_to_reg(data, val);
1600         if (has_newer_autopwm(data))
1601                 regaddr = IT87_REG_AUTO_TEMP(nr, 3);
1602         else
1603                 regaddr = IT87_REG_AUTO_PWM(nr, point);
1604         it87_write_value(data, regaddr, data->auto_pwm[nr][point]);
1605         mutex_unlock(&data->update_lock);
1606         return count;
1607 }
1608
1609 static ssize_t show_auto_pwm_slope(struct device *dev,
1610                                    struct device_attribute *attr, char *buf)
1611 {
1612         struct it87_data *data = it87_update_device(dev);
1613         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1614         int nr = sensor_attr->index;
1615
1616         return sprintf(buf, "%d\n", data->auto_pwm[nr][1] & 0x7f);
1617 }
1618
1619 static ssize_t set_auto_pwm_slope(struct device *dev,
1620                                   struct device_attribute *attr,
1621                                   const char *buf, size_t count)
1622 {
1623         struct it87_data *data = dev_get_drvdata(dev);
1624         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1625         int nr = sensor_attr->index;
1626         unsigned long val;
1627
1628         if (kstrtoul(buf, 10, &val) < 0 || val > 127)
1629                 return -EINVAL;
1630
1631         mutex_lock(&data->update_lock);
1632         data->auto_pwm[nr][1] = (data->auto_pwm[nr][1] & 0x80) | val;
1633         it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 4),
1634                          data->auto_pwm[nr][1]);
1635         mutex_unlock(&data->update_lock);
1636         return count;
1637 }
1638
1639 static ssize_t show_auto_temp(struct device *dev, struct device_attribute *attr,
1640                               char *buf)
1641 {
1642         struct it87_data *data = it87_update_device(dev);
1643         struct sensor_device_attribute_2 *sensor_attr =
1644                         to_sensor_dev_attr_2(attr);
1645         int nr = sensor_attr->nr;
1646         int point = sensor_attr->index;
1647         int reg;
1648
1649         if (has_old_autopwm(data) || point)
1650                 reg = data->auto_temp[nr][point];
1651         else
1652                 reg = data->auto_temp[nr][1] - (data->auto_temp[nr][0] & 0x1f);
1653
1654         return sprintf(buf, "%d\n", TEMP_FROM_REG(reg));
1655 }
1656
1657 static ssize_t set_auto_temp(struct device *dev, struct device_attribute *attr,
1658                              const char *buf, size_t count)
1659 {
1660         struct it87_data *data = dev_get_drvdata(dev);
1661         struct sensor_device_attribute_2 *sensor_attr =
1662                         to_sensor_dev_attr_2(attr);
1663         int nr = sensor_attr->nr;
1664         int point = sensor_attr->index;
1665         long val;
1666         int reg;
1667
1668         if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
1669                 return -EINVAL;
1670
1671         mutex_lock(&data->update_lock);
1672         if (has_newer_autopwm(data) && !point) {
1673                 reg = data->auto_temp[nr][1] - TEMP_TO_REG(val);
1674                 reg = clamp_val(reg, 0, 0x1f) | (data->auto_temp[nr][0] & 0xe0);
1675                 data->auto_temp[nr][0] = reg;
1676                 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 5), reg);
1677         } else {
1678                 reg = TEMP_TO_REG(val);
1679                 data->auto_temp[nr][point] = reg;
1680                 if (has_newer_autopwm(data))
1681                         point--;
1682                 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point), reg);
1683         }
1684         mutex_unlock(&data->update_lock);
1685         return count;
1686 }
1687
1688 static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
1689 static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1690                             0, 1);
1691 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
1692                           set_fan_div, 0);
1693
1694 static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
1695 static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1696                             1, 1);
1697 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
1698                           set_fan_div, 1);
1699
1700 static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
1701 static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1702                             2, 1);
1703 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
1704                           set_fan_div, 2);
1705
1706 static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
1707 static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1708                             3, 1);
1709
1710 static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
1711 static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1712                             4, 1);
1713
1714 static SENSOR_DEVICE_ATTR_2(fan6_input, S_IRUGO, show_fan, NULL, 5, 0);
1715 static SENSOR_DEVICE_ATTR_2(fan6_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1716                             5, 1);
1717
1718 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
1719                           show_pwm_enable, set_pwm_enable, 0);
1720 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0);
1721 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq,
1722                           set_pwm_freq, 0);
1723 static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO,
1724                           show_pwm_temp_map, set_pwm_temp_map, 0);
1725 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR,
1726                             show_auto_pwm, set_auto_pwm, 0, 0);
1727 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR,
1728                             show_auto_pwm, set_auto_pwm, 0, 1);
1729 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR,
1730                             show_auto_pwm, set_auto_pwm, 0, 2);
1731 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO,
1732                             show_auto_pwm, NULL, 0, 3);
1733 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
1734                             show_auto_temp, set_auto_temp, 0, 1);
1735 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1736                             show_auto_temp, set_auto_temp, 0, 0);
1737 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
1738                             show_auto_temp, set_auto_temp, 0, 2);
1739 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
1740                             show_auto_temp, set_auto_temp, 0, 3);
1741 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR,
1742                             show_auto_temp, set_auto_temp, 0, 4);
1743 static SENSOR_DEVICE_ATTR_2(pwm1_auto_start, S_IRUGO | S_IWUSR,
1744                             show_auto_pwm, set_auto_pwm, 0, 0);
1745 static SENSOR_DEVICE_ATTR(pwm1_auto_slope, S_IRUGO | S_IWUSR,
1746                           show_auto_pwm_slope, set_auto_pwm_slope, 0);
1747
1748 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
1749                           show_pwm_enable, set_pwm_enable, 1);
1750 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1);
1751 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, set_pwm_freq, 1);
1752 static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO,
1753                           show_pwm_temp_map, set_pwm_temp_map, 1);
1754 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR,
1755                             show_auto_pwm, set_auto_pwm, 1, 0);
1756 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR,
1757                             show_auto_pwm, set_auto_pwm, 1, 1);
1758 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR,
1759                             show_auto_pwm, set_auto_pwm, 1, 2);
1760 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO,
1761                             show_auto_pwm, NULL, 1, 3);
1762 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
1763                             show_auto_temp, set_auto_temp, 1, 1);
1764 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1765                             show_auto_temp, set_auto_temp, 1, 0);
1766 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
1767                             show_auto_temp, set_auto_temp, 1, 2);
1768 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
1769                             show_auto_temp, set_auto_temp, 1, 3);
1770 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR,
1771                             show_auto_temp, set_auto_temp, 1, 4);
1772 static SENSOR_DEVICE_ATTR_2(pwm2_auto_start, S_IRUGO | S_IWUSR,
1773                             show_auto_pwm, set_auto_pwm, 1, 0);
1774 static SENSOR_DEVICE_ATTR(pwm2_auto_slope, S_IRUGO | S_IWUSR,
1775                           show_auto_pwm_slope, set_auto_pwm_slope, 1);
1776
1777 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
1778                           show_pwm_enable, set_pwm_enable, 2);
1779 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2);
1780 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL, 2);
1781 static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO,
1782                           show_pwm_temp_map, set_pwm_temp_map, 2);
1783 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR,
1784                             show_auto_pwm, set_auto_pwm, 2, 0);
1785 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR,
1786                             show_auto_pwm, set_auto_pwm, 2, 1);
1787 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR,
1788                             show_auto_pwm, set_auto_pwm, 2, 2);
1789 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO,
1790                             show_auto_pwm, NULL, 2, 3);
1791 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
1792                             show_auto_temp, set_auto_temp, 2, 1);
1793 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1794                             show_auto_temp, set_auto_temp, 2, 0);
1795 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
1796                             show_auto_temp, set_auto_temp, 2, 2);
1797 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
1798                             show_auto_temp, set_auto_temp, 2, 3);
1799 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR,
1800                             show_auto_temp, set_auto_temp, 2, 4);
1801 static SENSOR_DEVICE_ATTR_2(pwm3_auto_start, S_IRUGO | S_IWUSR,
1802                             show_auto_pwm, set_auto_pwm, 2, 0);
1803 static SENSOR_DEVICE_ATTR(pwm3_auto_slope, S_IRUGO | S_IWUSR,
1804                           show_auto_pwm_slope, set_auto_pwm_slope, 2);
1805
1806 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IRUGO | S_IWUSR,
1807                           show_pwm_enable, set_pwm_enable, 3);
1808 static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 3);
1809 static SENSOR_DEVICE_ATTR(pwm4_freq, S_IRUGO, show_pwm_freq, NULL, 3);
1810 static SENSOR_DEVICE_ATTR(pwm4_auto_channels_temp, S_IRUGO,
1811                           show_pwm_temp_map, set_pwm_temp_map, 3);
1812 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp, S_IRUGO | S_IWUSR,
1813                             show_auto_temp, set_auto_temp, 2, 1);
1814 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1815                             show_auto_temp, set_auto_temp, 2, 0);
1816 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point2_temp, S_IRUGO | S_IWUSR,
1817                             show_auto_temp, set_auto_temp, 2, 2);
1818 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point3_temp, S_IRUGO | S_IWUSR,
1819                             show_auto_temp, set_auto_temp, 2, 3);
1820 static SENSOR_DEVICE_ATTR_2(pwm4_auto_start, S_IRUGO | S_IWUSR,
1821                             show_auto_pwm, set_auto_pwm, 3, 0);
1822 static SENSOR_DEVICE_ATTR(pwm4_auto_slope, S_IRUGO | S_IWUSR,
1823                           show_auto_pwm_slope, set_auto_pwm_slope, 3);
1824
1825 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IRUGO | S_IWUSR,
1826                           show_pwm_enable, set_pwm_enable, 4);
1827 static SENSOR_DEVICE_ATTR(pwm5, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 4);
1828 static SENSOR_DEVICE_ATTR(pwm5_freq, S_IRUGO, show_pwm_freq, NULL, 4);
1829 static SENSOR_DEVICE_ATTR(pwm5_auto_channels_temp, S_IRUGO,
1830                           show_pwm_temp_map, set_pwm_temp_map, 4);
1831 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp, S_IRUGO | S_IWUSR,
1832                             show_auto_temp, set_auto_temp, 2, 1);
1833 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1834                             show_auto_temp, set_auto_temp, 2, 0);
1835 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point2_temp, S_IRUGO | S_IWUSR,
1836                             show_auto_temp, set_auto_temp, 2, 2);
1837 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point3_temp, S_IRUGO | S_IWUSR,
1838                             show_auto_temp, set_auto_temp, 2, 3);
1839 static SENSOR_DEVICE_ATTR_2(pwm5_auto_start, S_IRUGO | S_IWUSR,
1840                             show_auto_pwm, set_auto_pwm, 4, 0);
1841 static SENSOR_DEVICE_ATTR(pwm5_auto_slope, S_IRUGO | S_IWUSR,
1842                           show_auto_pwm_slope, set_auto_pwm_slope, 4);
1843
1844 static SENSOR_DEVICE_ATTR(pwm6_enable, S_IRUGO | S_IWUSR,
1845                           show_pwm_enable, set_pwm_enable, 5);
1846 static SENSOR_DEVICE_ATTR(pwm6, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 5);
1847 static SENSOR_DEVICE_ATTR(pwm6_freq, S_IRUGO, show_pwm_freq, NULL, 5);
1848 static SENSOR_DEVICE_ATTR(pwm6_auto_channels_temp, S_IRUGO,
1849                           show_pwm_temp_map, set_pwm_temp_map, 5);
1850 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp, S_IRUGO | S_IWUSR,
1851                             show_auto_temp, set_auto_temp, 2, 1);
1852 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1853                             show_auto_temp, set_auto_temp, 2, 0);
1854 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point2_temp, S_IRUGO | S_IWUSR,
1855                             show_auto_temp, set_auto_temp, 2, 2);
1856 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point3_temp, S_IRUGO | S_IWUSR,
1857                             show_auto_temp, set_auto_temp, 2, 3);
1858 static SENSOR_DEVICE_ATTR_2(pwm6_auto_start, S_IRUGO | S_IWUSR,
1859                             show_auto_pwm, set_auto_pwm, 5, 0);
1860 static SENSOR_DEVICE_ATTR(pwm6_auto_slope, S_IRUGO | S_IWUSR,
1861                           show_auto_pwm_slope, set_auto_pwm_slope, 5);
1862
1863 /* Alarms */
1864 static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
1865                            char *buf)
1866 {
1867         struct it87_data *data = it87_update_device(dev);
1868
1869         return sprintf(buf, "%u\n", data->alarms);
1870 }
1871 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
1872
1873 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
1874                           char *buf)
1875 {
1876         struct it87_data *data = it87_update_device(dev);
1877         int bitnr = to_sensor_dev_attr(attr)->index;
1878
1879         return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
1880 }
1881
1882 static ssize_t clear_intrusion(struct device *dev,
1883                                struct device_attribute *attr, const char *buf,
1884                                size_t count)
1885 {
1886         struct it87_data *data = dev_get_drvdata(dev);
1887         int config;
1888         long val;
1889
1890         if (kstrtol(buf, 10, &val) < 0 || val != 0)
1891                 return -EINVAL;
1892
1893         mutex_lock(&data->update_lock);
1894         config = it87_read_value(data, IT87_REG_CONFIG);
1895         if (config < 0) {
1896                 count = config;
1897         } else {
1898                 config |= BIT(5);
1899                 it87_write_value(data, IT87_REG_CONFIG, config);
1900                 /* Invalidate cache to force re-read */
1901                 data->valid = 0;
1902         }
1903         mutex_unlock(&data->update_lock);
1904
1905         return count;
1906 }
1907
1908 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
1909 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
1910 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
1911 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
1912 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
1913 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
1914 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
1915 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
1916 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
1917 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
1918 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
1919 static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
1920 static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
1921 static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 7);
1922 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
1923 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
1924 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
1925 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
1926                           show_alarm, clear_intrusion, 4);
1927
1928 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
1929                          char *buf)
1930 {
1931         struct it87_data *data = it87_update_device(dev);
1932         int bitnr = to_sensor_dev_attr(attr)->index;
1933
1934         return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
1935 }
1936
1937 static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
1938                         const char *buf, size_t count)
1939 {
1940         int bitnr = to_sensor_dev_attr(attr)->index;
1941         struct it87_data *data = dev_get_drvdata(dev);
1942         long val;
1943
1944         if (kstrtol(buf, 10, &val) < 0 || (val != 0 && val != 1))
1945                 return -EINVAL;
1946
1947         mutex_lock(&data->update_lock);
1948         data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1949         if (val)
1950                 data->beeps |= BIT(bitnr);
1951         else
1952                 data->beeps &= ~BIT(bitnr);
1953         it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
1954         mutex_unlock(&data->update_lock);
1955         return count;
1956 }
1957
1958 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
1959                           show_beep, set_beep, 1);
1960 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
1961 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
1962 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
1963 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
1964 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
1965 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
1966 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
1967 /* fanX_beep writability is set later */
1968 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
1969 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
1970 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
1971 static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
1972 static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
1973 static SENSOR_DEVICE_ATTR(fan6_beep, S_IRUGO, show_beep, set_beep, 0);
1974 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
1975                           show_beep, set_beep, 2);
1976 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
1977 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
1978
1979 static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
1980                             char *buf)
1981 {
1982         struct it87_data *data = dev_get_drvdata(dev);
1983
1984         return sprintf(buf, "%u\n", data->vrm);
1985 }
1986
1987 static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
1988                              const char *buf, size_t count)
1989 {
1990         struct it87_data *data = dev_get_drvdata(dev);
1991         unsigned long val;
1992
1993         if (kstrtoul(buf, 10, &val) < 0)
1994                 return -EINVAL;
1995
1996         data->vrm = val;
1997
1998         return count;
1999 }
2000 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
2001
2002 static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
2003                             char *buf)
2004 {
2005         struct it87_data *data = it87_update_device(dev);
2006
2007         return sprintf(buf, "%ld\n", (long)vid_from_reg(data->vid, data->vrm));
2008 }
2009 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
2010
2011 static ssize_t show_label(struct device *dev, struct device_attribute *attr,
2012                           char *buf)
2013 {
2014         static const char * const labels[] = {
2015                 "+5V",
2016                 "5VSB",
2017                 "Vbat",
2018                 "AVCC",
2019         };
2020         static const char * const labels_it8721[] = {
2021                 "+3.3V",
2022                 "3VSB",
2023                 "Vbat",
2024                 "+3.3V",
2025         };
2026         struct it87_data *data = dev_get_drvdata(dev);
2027         int nr = to_sensor_dev_attr(attr)->index;
2028         const char *label;
2029
2030         if (has_vin3_5v(data) && nr == 0)
2031                 label = labels[0];
2032         else if (has_12mv_adc(data) || has_10_9mv_adc(data))
2033                 label = labels_it8721[nr];
2034         else
2035                 label = labels[nr];
2036
2037         return sprintf(buf, "%s\n", label);
2038 }
2039 static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
2040 static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
2041 static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
2042 /* AVCC3 */
2043 static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 3);
2044
2045 static umode_t it87_in_is_visible(struct kobject *kobj,
2046                                   struct attribute *attr, int index)
2047 {
2048         struct device *dev = container_of(kobj, struct device, kobj);
2049         struct it87_data *data = dev_get_drvdata(dev);
2050         int i = index / 5;      /* voltage index */
2051         int a = index % 5;      /* attribute index */
2052
2053         if (index >= 40) {      /* in8 and higher only have input attributes */
2054                 i = index - 40 + 8;
2055                 a = 0;
2056         }
2057
2058         if (!(data->has_in & BIT(i)))
2059                 return 0;
2060
2061         if (a == 4 && !data->has_beep)
2062                 return 0;
2063
2064         return attr->mode;
2065 }
2066
2067 static struct attribute *it87_attributes_in[] = {
2068         &sensor_dev_attr_in0_input.dev_attr.attr,
2069         &sensor_dev_attr_in0_min.dev_attr.attr,
2070         &sensor_dev_attr_in0_max.dev_attr.attr,
2071         &sensor_dev_attr_in0_alarm.dev_attr.attr,
2072         &sensor_dev_attr_in0_beep.dev_attr.attr,        /* 4 */
2073
2074         &sensor_dev_attr_in1_input.dev_attr.attr,
2075         &sensor_dev_attr_in1_min.dev_attr.attr,
2076         &sensor_dev_attr_in1_max.dev_attr.attr,
2077         &sensor_dev_attr_in1_alarm.dev_attr.attr,
2078         &sensor_dev_attr_in1_beep.dev_attr.attr,        /* 9 */
2079
2080         &sensor_dev_attr_in2_input.dev_attr.attr,
2081         &sensor_dev_attr_in2_min.dev_attr.attr,
2082         &sensor_dev_attr_in2_max.dev_attr.attr,
2083         &sensor_dev_attr_in2_alarm.dev_attr.attr,
2084         &sensor_dev_attr_in2_beep.dev_attr.attr,        /* 14 */
2085
2086         &sensor_dev_attr_in3_input.dev_attr.attr,
2087         &sensor_dev_attr_in3_min.dev_attr.attr,
2088         &sensor_dev_attr_in3_max.dev_attr.attr,
2089         &sensor_dev_attr_in3_alarm.dev_attr.attr,
2090         &sensor_dev_attr_in3_beep.dev_attr.attr,        /* 19 */
2091
2092         &sensor_dev_attr_in4_input.dev_attr.attr,
2093         &sensor_dev_attr_in4_min.dev_attr.attr,
2094         &sensor_dev_attr_in4_max.dev_attr.attr,
2095         &sensor_dev_attr_in4_alarm.dev_attr.attr,
2096         &sensor_dev_attr_in4_beep.dev_attr.attr,        /* 24 */
2097
2098         &sensor_dev_attr_in5_input.dev_attr.attr,
2099         &sensor_dev_attr_in5_min.dev_attr.attr,
2100         &sensor_dev_attr_in5_max.dev_attr.attr,
2101         &sensor_dev_attr_in5_alarm.dev_attr.attr,
2102         &sensor_dev_attr_in5_beep.dev_attr.attr,        /* 29 */
2103
2104         &sensor_dev_attr_in6_input.dev_attr.attr,
2105         &sensor_dev_attr_in6_min.dev_attr.attr,
2106         &sensor_dev_attr_in6_max.dev_attr.attr,
2107         &sensor_dev_attr_in6_alarm.dev_attr.attr,
2108         &sensor_dev_attr_in6_beep.dev_attr.attr,        /* 34 */
2109
2110         &sensor_dev_attr_in7_input.dev_attr.attr,
2111         &sensor_dev_attr_in7_min.dev_attr.attr,
2112         &sensor_dev_attr_in7_max.dev_attr.attr,
2113         &sensor_dev_attr_in7_alarm.dev_attr.attr,
2114         &sensor_dev_attr_in7_beep.dev_attr.attr,        /* 39 */
2115
2116         &sensor_dev_attr_in8_input.dev_attr.attr,       /* 40 */
2117         &sensor_dev_attr_in9_input.dev_attr.attr,       /* 41 */
2118         &sensor_dev_attr_in10_input.dev_attr.attr,      /* 41 */
2119         &sensor_dev_attr_in11_input.dev_attr.attr,      /* 41 */
2120         &sensor_dev_attr_in12_input.dev_attr.attr,      /* 41 */
2121         NULL
2122 };
2123
2124 static const struct attribute_group it87_group_in = {
2125         .attrs = it87_attributes_in,
2126         .is_visible = it87_in_is_visible,
2127 };
2128
2129 static umode_t it87_temp_is_visible(struct kobject *kobj,
2130                                     struct attribute *attr, int index)
2131 {
2132         struct device *dev = container_of(kobj, struct device, kobj);
2133         struct it87_data *data = dev_get_drvdata(dev);
2134         int i = index / 7;      /* temperature index */
2135         int a = index % 7;      /* attribute index */
2136
2137         if (index >= 21) {
2138                 i = index - 21 + 3;
2139                 a = 0;
2140         }
2141
2142         if (!(data->has_temp & BIT(i)))
2143                 return 0;
2144
2145         if (a == 5 && !has_temp_offset(data))
2146                 return 0;
2147
2148         if (a == 6 && !data->has_beep)
2149                 return 0;
2150
2151         return attr->mode;
2152 }
2153
2154 static struct attribute *it87_attributes_temp[] = {
2155         &sensor_dev_attr_temp1_input.dev_attr.attr,
2156         &sensor_dev_attr_temp1_max.dev_attr.attr,
2157         &sensor_dev_attr_temp1_min.dev_attr.attr,
2158         &sensor_dev_attr_temp1_type.dev_attr.attr,
2159         &sensor_dev_attr_temp1_alarm.dev_attr.attr,
2160         &sensor_dev_attr_temp1_offset.dev_attr.attr,    /* 5 */
2161         &sensor_dev_attr_temp1_beep.dev_attr.attr,      /* 6 */
2162
2163         &sensor_dev_attr_temp2_input.dev_attr.attr,     /* 7 */
2164         &sensor_dev_attr_temp2_max.dev_attr.attr,
2165         &sensor_dev_attr_temp2_min.dev_attr.attr,
2166         &sensor_dev_attr_temp2_type.dev_attr.attr,
2167         &sensor_dev_attr_temp2_alarm.dev_attr.attr,
2168         &sensor_dev_attr_temp2_offset.dev_attr.attr,
2169         &sensor_dev_attr_temp2_beep.dev_attr.attr,
2170
2171         &sensor_dev_attr_temp3_input.dev_attr.attr,     /* 14 */
2172         &sensor_dev_attr_temp3_max.dev_attr.attr,
2173         &sensor_dev_attr_temp3_min.dev_attr.attr,
2174         &sensor_dev_attr_temp3_type.dev_attr.attr,
2175         &sensor_dev_attr_temp3_alarm.dev_attr.attr,
2176         &sensor_dev_attr_temp3_offset.dev_attr.attr,
2177         &sensor_dev_attr_temp3_beep.dev_attr.attr,
2178
2179         &sensor_dev_attr_temp4_input.dev_attr.attr,     /* 21 */
2180         &sensor_dev_attr_temp5_input.dev_attr.attr,
2181         &sensor_dev_attr_temp6_input.dev_attr.attr,
2182         NULL
2183 };
2184
2185 static const struct attribute_group it87_group_temp = {
2186         .attrs = it87_attributes_temp,
2187         .is_visible = it87_temp_is_visible,
2188 };
2189
2190 static umode_t it87_is_visible(struct kobject *kobj,
2191                                struct attribute *attr, int index)
2192 {
2193         struct device *dev = container_of(kobj, struct device, kobj);
2194         struct it87_data *data = dev_get_drvdata(dev);
2195
2196         if ((index == 2 || index == 3) && !data->has_vid)
2197                 return 0;
2198
2199         if (index > 3 && !(data->in_internal & BIT(index - 4)))
2200                 return 0;
2201
2202         return attr->mode;
2203 }
2204
2205 static struct attribute *it87_attributes[] = {
2206         &dev_attr_alarms.attr,
2207         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
2208         &dev_attr_vrm.attr,                             /* 2 */
2209         &dev_attr_cpu0_vid.attr,                        /* 3 */
2210         &sensor_dev_attr_in3_label.dev_attr.attr,       /* 4 .. 7 */
2211         &sensor_dev_attr_in7_label.dev_attr.attr,
2212         &sensor_dev_attr_in8_label.dev_attr.attr,
2213         &sensor_dev_attr_in9_label.dev_attr.attr,
2214         NULL
2215 };
2216
2217 static const struct attribute_group it87_group = {
2218         .attrs = it87_attributes,
2219         .is_visible = it87_is_visible,
2220 };
2221
2222 static umode_t it87_fan_is_visible(struct kobject *kobj,
2223                                    struct attribute *attr, int index)
2224 {
2225         struct device *dev = container_of(kobj, struct device, kobj);
2226         struct it87_data *data = dev_get_drvdata(dev);
2227         int i = index / 5;      /* fan index */
2228         int a = index % 5;      /* attribute index */
2229
2230         if (index >= 15) {      /* fan 4..6 don't have divisor attributes */
2231                 i = (index - 15) / 4 + 3;
2232                 a = (index - 15) % 4;
2233         }
2234
2235         if (!(data->has_fan & BIT(i)))
2236                 return 0;
2237
2238         if (a == 3) {                           /* beep */
2239                 if (!data->has_beep)
2240                         return 0;
2241                 /* first fan beep attribute is writable */
2242                 if (i == __ffs(data->has_fan))
2243                         return attr->mode | S_IWUSR;
2244         }
2245
2246         if (a == 4 && has_16bit_fans(data))     /* divisor */
2247                 return 0;
2248
2249         return attr->mode;
2250 }
2251
2252 static struct attribute *it87_attributes_fan[] = {
2253         &sensor_dev_attr_fan1_input.dev_attr.attr,
2254         &sensor_dev_attr_fan1_min.dev_attr.attr,
2255         &sensor_dev_attr_fan1_alarm.dev_attr.attr,
2256         &sensor_dev_attr_fan1_beep.dev_attr.attr,       /* 3 */
2257         &sensor_dev_attr_fan1_div.dev_attr.attr,        /* 4 */
2258
2259         &sensor_dev_attr_fan2_input.dev_attr.attr,
2260         &sensor_dev_attr_fan2_min.dev_attr.attr,
2261         &sensor_dev_attr_fan2_alarm.dev_attr.attr,
2262         &sensor_dev_attr_fan2_beep.dev_attr.attr,
2263         &sensor_dev_attr_fan2_div.dev_attr.attr,        /* 9 */
2264
2265         &sensor_dev_attr_fan3_input.dev_attr.attr,
2266         &sensor_dev_attr_fan3_min.dev_attr.attr,
2267         &sensor_dev_attr_fan3_alarm.dev_attr.attr,
2268         &sensor_dev_attr_fan3_beep.dev_attr.attr,
2269         &sensor_dev_attr_fan3_div.dev_attr.attr,        /* 14 */
2270
2271         &sensor_dev_attr_fan4_input.dev_attr.attr,      /* 15 */
2272         &sensor_dev_attr_fan4_min.dev_attr.attr,
2273         &sensor_dev_attr_fan4_alarm.dev_attr.attr,
2274         &sensor_dev_attr_fan4_beep.dev_attr.attr,
2275
2276         &sensor_dev_attr_fan5_input.dev_attr.attr,      /* 19 */
2277         &sensor_dev_attr_fan5_min.dev_attr.attr,
2278         &sensor_dev_attr_fan5_alarm.dev_attr.attr,
2279         &sensor_dev_attr_fan5_beep.dev_attr.attr,
2280
2281         &sensor_dev_attr_fan6_input.dev_attr.attr,      /* 23 */
2282         &sensor_dev_attr_fan6_min.dev_attr.attr,
2283         &sensor_dev_attr_fan6_alarm.dev_attr.attr,
2284         &sensor_dev_attr_fan6_beep.dev_attr.attr,
2285         NULL
2286 };
2287
2288 static const struct attribute_group it87_group_fan = {
2289         .attrs = it87_attributes_fan,
2290         .is_visible = it87_fan_is_visible,
2291 };
2292
2293 static umode_t it87_pwm_is_visible(struct kobject *kobj,
2294                                    struct attribute *attr, int index)
2295 {
2296         struct device *dev = container_of(kobj, struct device, kobj);
2297         struct it87_data *data = dev_get_drvdata(dev);
2298         int i = index / 4;      /* pwm index */
2299         int a = index % 4;      /* attribute index */
2300
2301         if (!(data->has_pwm & BIT(i)))
2302                 return 0;
2303
2304         /* pwmX_auto_channels_temp is only writable if auto pwm is supported */
2305         if (a == 3 && (has_old_autopwm(data) || has_newer_autopwm(data)))
2306                 return attr->mode | S_IWUSR;
2307
2308         /* pwm2_freq is writable if there are two pwm frequency selects */
2309         if (has_pwm_freq2(data) && i == 1 && a == 2)
2310                 return attr->mode | S_IWUSR;
2311
2312         return attr->mode;
2313 }
2314
2315 static struct attribute *it87_attributes_pwm[] = {
2316         &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2317         &sensor_dev_attr_pwm1.dev_attr.attr,
2318         &sensor_dev_attr_pwm1_freq.dev_attr.attr,
2319         &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
2320
2321         &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2322         &sensor_dev_attr_pwm2.dev_attr.attr,
2323         &sensor_dev_attr_pwm2_freq.dev_attr.attr,
2324         &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
2325
2326         &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2327         &sensor_dev_attr_pwm3.dev_attr.attr,
2328         &sensor_dev_attr_pwm3_freq.dev_attr.attr,
2329         &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
2330
2331         &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2332         &sensor_dev_attr_pwm4.dev_attr.attr,
2333         &sensor_dev_attr_pwm4_freq.dev_attr.attr,
2334         &sensor_dev_attr_pwm4_auto_channels_temp.dev_attr.attr,
2335
2336         &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2337         &sensor_dev_attr_pwm5.dev_attr.attr,
2338         &sensor_dev_attr_pwm5_freq.dev_attr.attr,
2339         &sensor_dev_attr_pwm5_auto_channels_temp.dev_attr.attr,
2340
2341         &sensor_dev_attr_pwm6_enable.dev_attr.attr,
2342         &sensor_dev_attr_pwm6.dev_attr.attr,
2343         &sensor_dev_attr_pwm6_freq.dev_attr.attr,
2344         &sensor_dev_attr_pwm6_auto_channels_temp.dev_attr.attr,
2345
2346         NULL
2347 };
2348
2349 static const struct attribute_group it87_group_pwm = {
2350         .attrs = it87_attributes_pwm,
2351         .is_visible = it87_pwm_is_visible,
2352 };
2353
2354 static umode_t it87_auto_pwm_is_visible(struct kobject *kobj,
2355                                         struct attribute *attr, int index)
2356 {
2357         struct device *dev = container_of(kobj, struct device, kobj);
2358         struct it87_data *data = dev_get_drvdata(dev);
2359         int i = index / 11;     /* pwm index */
2360         int a = index % 11;     /* attribute index */
2361
2362         if (index >= 33) {      /* pwm 4..6 */
2363                 i = (index - 33) / 6 + 3;
2364                 a = (index - 33) % 6 + 4;
2365         }
2366
2367         if (!(data->has_pwm & BIT(i)))
2368                 return 0;
2369
2370         if (has_newer_autopwm(data)) {
2371                 if (a < 4)      /* no auto point pwm */
2372                         return 0;
2373                 if (a == 8)     /* no auto_point4 */
2374                         return 0;
2375         }
2376         if (has_old_autopwm(data)) {
2377                 if (a >= 9)     /* no pwm_auto_start, pwm_auto_slope */
2378                         return 0;
2379         }
2380
2381         return attr->mode;
2382 }
2383
2384 static struct attribute *it87_attributes_auto_pwm[] = {
2385         &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
2386         &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
2387         &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
2388         &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
2389         &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
2390         &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
2391         &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
2392         &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
2393         &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
2394         &sensor_dev_attr_pwm1_auto_start.dev_attr.attr,
2395         &sensor_dev_attr_pwm1_auto_slope.dev_attr.attr,
2396
2397         &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,    /* 11 */
2398         &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
2399         &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
2400         &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
2401         &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
2402         &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
2403         &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
2404         &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
2405         &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
2406         &sensor_dev_attr_pwm2_auto_start.dev_attr.attr,
2407         &sensor_dev_attr_pwm2_auto_slope.dev_attr.attr,
2408
2409         &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,    /* 22 */
2410         &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
2411         &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
2412         &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
2413         &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
2414         &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
2415         &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
2416         &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
2417         &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
2418         &sensor_dev_attr_pwm3_auto_start.dev_attr.attr,
2419         &sensor_dev_attr_pwm3_auto_slope.dev_attr.attr,
2420
2421         &sensor_dev_attr_pwm4_auto_point1_temp.dev_attr.attr,   /* 33 */
2422         &sensor_dev_attr_pwm4_auto_point1_temp_hyst.dev_attr.attr,
2423         &sensor_dev_attr_pwm4_auto_point2_temp.dev_attr.attr,
2424         &sensor_dev_attr_pwm4_auto_point3_temp.dev_attr.attr,
2425         &sensor_dev_attr_pwm4_auto_start.dev_attr.attr,
2426         &sensor_dev_attr_pwm4_auto_slope.dev_attr.attr,
2427
2428         &sensor_dev_attr_pwm5_auto_point1_temp.dev_attr.attr,
2429         &sensor_dev_attr_pwm5_auto_point1_temp_hyst.dev_attr.attr,
2430         &sensor_dev_attr_pwm5_auto_point2_temp.dev_attr.attr,
2431         &sensor_dev_attr_pwm5_auto_point3_temp.dev_attr.attr,
2432         &sensor_dev_attr_pwm5_auto_start.dev_attr.attr,
2433         &sensor_dev_attr_pwm5_auto_slope.dev_attr.attr,
2434
2435         &sensor_dev_attr_pwm6_auto_point1_temp.dev_attr.attr,
2436         &sensor_dev_attr_pwm6_auto_point1_temp_hyst.dev_attr.attr,
2437         &sensor_dev_attr_pwm6_auto_point2_temp.dev_attr.attr,
2438         &sensor_dev_attr_pwm6_auto_point3_temp.dev_attr.attr,
2439         &sensor_dev_attr_pwm6_auto_start.dev_attr.attr,
2440         &sensor_dev_attr_pwm6_auto_slope.dev_attr.attr,
2441
2442         NULL,
2443 };
2444
2445 static const struct attribute_group it87_group_auto_pwm = {
2446         .attrs = it87_attributes_auto_pwm,
2447         .is_visible = it87_auto_pwm_is_visible,
2448 };
2449
2450 /* SuperIO detection - will change isa_address if a chip is found */
2451 static int __init it87_find(int sioaddr, unsigned short *address,
2452                             struct it87_sio_data *sio_data)
2453 {
2454         int err;
2455         u16 chip_type;
2456         const char *board_vendor, *board_name;
2457         const struct it87_devices *config;
2458
2459         err = superio_enter(sioaddr);
2460         if (err)
2461                 return err;
2462
2463         err = -ENODEV;
2464         chip_type = superio_inw(sioaddr, DEVID);
2465         if (chip_type == 0xffff)
2466                 goto exit;
2467
2468         if (force_id)
2469                 chip_type = force_id;
2470
2471         switch (chip_type) {
2472         case IT8705F_DEVID:
2473                 sio_data->type = it87;
2474                 break;
2475         case IT8712F_DEVID:
2476                 sio_data->type = it8712;
2477                 break;
2478         case IT8716F_DEVID:
2479         case IT8726F_DEVID:
2480                 sio_data->type = it8716;
2481                 break;
2482         case IT8718F_DEVID:
2483                 sio_data->type = it8718;
2484                 break;
2485         case IT8720F_DEVID:
2486                 sio_data->type = it8720;
2487                 break;
2488         case IT8721F_DEVID:
2489                 sio_data->type = it8721;
2490                 break;
2491         case IT8728F_DEVID:
2492                 sio_data->type = it8728;
2493                 break;
2494         case IT8732F_DEVID:
2495                 sio_data->type = it8732;
2496                 break;
2497         case IT8792E_DEVID:
2498                 sio_data->type = it8792;
2499                 break;
2500         case IT8771E_DEVID:
2501                 sio_data->type = it8771;
2502                 break;
2503         case IT8772E_DEVID:
2504                 sio_data->type = it8772;
2505                 break;
2506         case IT8781F_DEVID:
2507                 sio_data->type = it8781;
2508                 break;
2509         case IT8782F_DEVID:
2510                 sio_data->type = it8782;
2511                 break;
2512         case IT8783E_DEVID:
2513                 sio_data->type = it8783;
2514                 break;
2515         case IT8786E_DEVID:
2516                 sio_data->type = it8786;
2517                 break;
2518         case IT8790E_DEVID:
2519                 sio_data->type = it8790;
2520                 break;
2521         case IT8603E_DEVID:
2522         case IT8623E_DEVID:
2523                 sio_data->type = it8603;
2524                 break;
2525         case IT8607E_DEVID:
2526                 sio_data->type = it8607;
2527                 break;
2528         case IT8620E_DEVID:
2529                 sio_data->type = it8620;
2530                 break;
2531         case IT8622E_DEVID:
2532                 sio_data->type = it8622;
2533                 break;
2534         case IT8628E_DEVID:
2535                 sio_data->type = it8628;
2536                 break;
2537         case IT8686E_DEVID:
2538                 sio_data->type = it8686;
2539                 break;
2540         case 0xffff:    /* No device at all */
2541                 goto exit;
2542         default:
2543                 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
2544                 goto exit;
2545         }
2546
2547         superio_select(sioaddr, PME);
2548         if (!(superio_inb(sioaddr, IT87_ACT_REG) & 0x01)) {
2549                 pr_info("Device not activated, skipping\n");
2550                 goto exit;
2551         }
2552
2553         *address = superio_inw(sioaddr, IT87_BASE_REG) & ~(IT87_EXTENT - 1);
2554         if (*address == 0) {
2555                 pr_info("Base address not set, skipping\n");
2556                 goto exit;
2557         }
2558
2559         err = 0;
2560         sio_data->revision = superio_inb(sioaddr, DEVREV) & 0x0f;
2561         pr_info("Found IT%04x%s chip at 0x%x, revision %d\n", chip_type,
2562                 it87_devices[sio_data->type].suffix,
2563                 *address, sio_data->revision);
2564
2565         config = &it87_devices[sio_data->type];
2566
2567         /* in7 (VSB or VCCH5V) is always internal on some chips */
2568         if (has_in7_internal(config))
2569                 sio_data->internal |= BIT(1);
2570
2571         /* in8 (Vbat) is always internal */
2572         sio_data->internal |= BIT(2);
2573
2574         /* in9 (AVCC3), always internal if supported */
2575         if (has_avcc3(config))
2576                 sio_data->internal |= BIT(3); /* in9 is AVCC */
2577         else
2578                 sio_data->skip_in |= BIT(9);
2579
2580         if (!has_four_pwm(config))
2581                 sio_data->skip_pwm |= BIT(3) | BIT(4) | BIT(5);
2582         else if (!has_five_pwm(config))
2583                 sio_data->skip_pwm |= BIT(4) | BIT(5);
2584         else if (!has_six_pwm(config))
2585                 sio_data->skip_pwm |= BIT(5);
2586
2587         if (!has_vid(config))
2588                 sio_data->skip_vid = 1;
2589
2590         /* Read GPIO config and VID value from LDN 7 (GPIO) */
2591         if (sio_data->type == it87) {
2592                 /* The IT8705F has a different LD number for GPIO */
2593                 superio_select(sioaddr, 5);
2594                 sio_data->beep_pin = superio_inb(sioaddr,
2595                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2596         } else if (sio_data->type == it8783) {
2597                 int reg25, reg27, reg2a, reg2c, regef;
2598
2599                 superio_select(sioaddr, GPIO);
2600
2601                 reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2602                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2603                 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
2604                 reg2c = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2605                 regef = superio_inb(sioaddr, IT87_SIO_SPI_REG);
2606
2607                 /* Check if fan3 is there or not */
2608                 if ((reg27 & BIT(0)) || !(reg2c & BIT(2)))
2609                         sio_data->skip_fan |= BIT(2);
2610                 if ((reg25 & BIT(4)) ||
2611                     (!(reg2a & BIT(1)) && (regef & BIT(0))))
2612                         sio_data->skip_pwm |= BIT(2);
2613
2614                 /* Check if fan2 is there or not */
2615                 if (reg27 & BIT(7))
2616                         sio_data->skip_fan |= BIT(1);
2617                 if (reg27 & BIT(3))
2618                         sio_data->skip_pwm |= BIT(1);
2619
2620                 /* VIN5 */
2621                 if ((reg27 & BIT(0)) || (reg2c & BIT(2)))
2622                         sio_data->skip_in |= BIT(5); /* No VIN5 */
2623
2624                 /* VIN6 */
2625                 if (reg27 & BIT(1))
2626                         sio_data->skip_in |= BIT(6); /* No VIN6 */
2627
2628                 /*
2629                  * VIN7
2630                  * Does not depend on bit 2 of Reg2C, contrary to datasheet.
2631                  */
2632                 if (reg27 & BIT(2)) {
2633                         /*
2634                          * The data sheet is a bit unclear regarding the
2635                          * internal voltage divider for VCCH5V. It says
2636                          * "This bit enables and switches VIN7 (pin 91) to the
2637                          * internal voltage divider for VCCH5V".
2638                          * This is different to other chips, where the internal
2639                          * voltage divider would connect VIN7 to an internal
2640                          * voltage source. Maybe that is the case here as well.
2641                          *
2642                          * Since we don't know for sure, re-route it if that is
2643                          * not the case, and ask the user to report if the
2644                          * resulting voltage is sane.
2645                          */
2646                         if (!(reg2c & BIT(1))) {
2647                                 reg2c |= BIT(1);
2648                                 superio_outb(sioaddr, IT87_SIO_PINX2_REG,
2649                                              reg2c);
2650                                 pr_notice("Routing internal VCCH5V to in7.\n");
2651                         }
2652                         pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
2653                         pr_notice("Please report if it displays a reasonable voltage.\n");
2654                 }
2655
2656                 if (reg2c & BIT(0))
2657                         sio_data->internal |= BIT(0);
2658                 if (reg2c & BIT(1))
2659                         sio_data->internal |= BIT(1);
2660
2661                 sio_data->beep_pin = superio_inb(sioaddr,
2662                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2663         } else if (sio_data->type == it8603 || sio_data->type == it8607) {
2664                 int reg27, reg29;
2665
2666                 superio_select(sioaddr, GPIO);
2667
2668                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2669
2670                 /* Check if fan3 is there or not */
2671                 if (reg27 & BIT(6))
2672                         sio_data->skip_pwm |= BIT(2);
2673                 if (reg27 & BIT(7))
2674                         sio_data->skip_fan |= BIT(2);
2675
2676                 /* Check if fan2 is there or not */
2677                 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2678                 if (reg29 & BIT(1))
2679                         sio_data->skip_pwm |= BIT(1);
2680                 if (reg29 & BIT(2))
2681                         sio_data->skip_fan |= BIT(1);
2682
2683                 if (sio_data->type == it8603) {
2684                         sio_data->skip_in |= BIT(5); /* No VIN5 */
2685                         sio_data->skip_in |= BIT(6); /* No VIN6 */
2686                 }
2687
2688                 sio_data->beep_pin = superio_inb(sioaddr,
2689                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2690         } else if (sio_data->type == it8620 || sio_data->type == it8628 ||
2691                    sio_data->type == it8686) {
2692                 int reg;
2693
2694                 superio_select(sioaddr, GPIO);
2695
2696                 /* Check for pwm5 */
2697                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2698                 if (reg & BIT(6))
2699                         sio_data->skip_pwm |= BIT(4);
2700
2701                 /* Check for fan4, fan5 */
2702                 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2703                 if (!(reg & BIT(5)))
2704                         sio_data->skip_fan |= BIT(3);
2705                 if (!(reg & BIT(4)))
2706                         sio_data->skip_fan |= BIT(4);
2707
2708                 /* Check for pwm3, fan3 */
2709                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2710                 if (reg & BIT(6))
2711                         sio_data->skip_pwm |= BIT(2);
2712                 if (reg & BIT(7))
2713                         sio_data->skip_fan |= BIT(2);
2714
2715                 /* Check for pwm4 */
2716                 reg = superio_inb(sioaddr, IT87_SIO_GPIO4_REG);
2717                 if (reg & BIT(2))
2718                         sio_data->skip_pwm |= BIT(3);
2719
2720                 /* Check for pwm2, fan2 */
2721                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2722                 if (reg & BIT(1))
2723                         sio_data->skip_pwm |= BIT(1);
2724                 if (reg & BIT(2))
2725                         sio_data->skip_fan |= BIT(1);
2726                 /* Check for pwm6, fan6 */
2727                 if (!(reg & BIT(7))) {
2728                         sio_data->skip_pwm |= BIT(5);
2729                         sio_data->skip_fan |= BIT(5);
2730                 }
2731
2732                 /* Check if AVCC is on VIN3 */
2733                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2734                 if (reg & BIT(0))
2735                         sio_data->internal |= BIT(0);
2736                 else
2737                         sio_data->skip_in |= BIT(9);
2738
2739                 sio_data->beep_pin = superio_inb(sioaddr,
2740                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2741         } else if (sio_data->type == it8622) {
2742                 int reg;
2743
2744                 superio_select(sioaddr, GPIO);
2745
2746                 /* Check for pwm4, fan4 */
2747                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2748                 if (reg & BIT(6))
2749                         sio_data->skip_fan |= BIT(3);
2750                 if (reg & BIT(5))
2751                         sio_data->skip_pwm |= BIT(3);
2752
2753                 /* Check for pwm3, fan3, pwm5, fan5 */
2754                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2755                 if (reg & BIT(6))
2756                         sio_data->skip_pwm |= BIT(2);
2757                 if (reg & BIT(7))
2758                         sio_data->skip_fan |= BIT(2);
2759                 if (reg & BIT(3))
2760                         sio_data->skip_pwm |= BIT(4);
2761                 if (reg & BIT(1))
2762                         sio_data->skip_fan |= BIT(4);
2763
2764                 /* Check for pwm2, fan2 */
2765                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2766                 if (reg & BIT(1))
2767                         sio_data->skip_pwm |= BIT(1);
2768                 if (reg & BIT(2))
2769                         sio_data->skip_fan |= BIT(1);
2770
2771                 /* Check for AVCC */
2772                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2773                 if (!(reg & BIT(0)))
2774                         sio_data->skip_in |= BIT(9);
2775
2776                 sio_data->beep_pin = superio_inb(sioaddr,
2777                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2778         } else if (sio_data->type == it8732) {
2779                 int reg;
2780
2781                 superio_select(sioaddr, GPIO);
2782
2783                 /* Check for pwm2, fan2 */
2784                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2785                 if (reg & BIT(1))
2786                         sio_data->skip_pwm |= BIT(1);
2787                 if (reg & BIT(2))
2788                         sio_data->skip_fan |= BIT(1);
2789
2790                 /* Check for pwm3, fan3, fan4 */
2791                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2792                 if (reg & BIT(6))
2793                         sio_data->skip_pwm |= BIT(2);
2794                 if (reg & BIT(7))
2795                         sio_data->skip_fan |= BIT(2);
2796                 if (reg & BIT(5))
2797                         sio_data->skip_fan |= BIT(3);
2798
2799                 /* Check if AVCC is on VIN3 */
2800                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2801                 if (reg & BIT(0))
2802                         sio_data->internal |= BIT(0);
2803
2804                 sio_data->beep_pin = superio_inb(sioaddr,
2805                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2806         } else {
2807                 int reg;
2808                 bool uart6;
2809
2810                 superio_select(sioaddr, GPIO);
2811
2812                 /* Check for fan4, fan5 */
2813                 if (has_five_fans(config)) {
2814                         reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2815                         switch (sio_data->type) {
2816                         case it8718:
2817                                 if (reg & BIT(5))
2818                                         sio_data->skip_fan |= BIT(3);
2819                                 if (reg & BIT(4))
2820                                         sio_data->skip_fan |= BIT(4);
2821                                 break;
2822                         case it8720:
2823                         case it8721:
2824                         case it8728:
2825                                 if (!(reg & BIT(5)))
2826                                         sio_data->skip_fan |= BIT(3);
2827                                 if (!(reg & BIT(4)))
2828                                         sio_data->skip_fan |= BIT(4);
2829                                 break;
2830                         default:
2831                                 break;
2832                         }
2833                 }
2834
2835                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2836                 if (!sio_data->skip_vid) {
2837                         /* We need at least 4 VID pins */
2838                         if (reg & 0x0f) {
2839                                 pr_info("VID is disabled (pins used for GPIO)\n");
2840                                 sio_data->skip_vid = 1;
2841                         }
2842                 }
2843
2844                 /* Check if fan3 is there or not */
2845                 if (reg & BIT(6))
2846                         sio_data->skip_pwm |= BIT(2);
2847                 if (reg & BIT(7))
2848                         sio_data->skip_fan |= BIT(2);
2849
2850                 /* Check if fan2 is there or not */
2851                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2852                 if (reg & BIT(1))
2853                         sio_data->skip_pwm |= BIT(1);
2854                 if (reg & BIT(2))
2855                         sio_data->skip_fan |= BIT(1);
2856
2857                 if ((sio_data->type == it8718 || sio_data->type == it8720) &&
2858                     !(sio_data->skip_vid))
2859                         sio_data->vid_value = superio_inb(sioaddr,
2860                                                           IT87_SIO_VID_REG);
2861
2862                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2863
2864                 uart6 = sio_data->type == it8782 && (reg & BIT(2));
2865
2866                 /*
2867                  * The IT8720F has no VIN7 pin, so VCCH should always be
2868                  * routed internally to VIN7 with an internal divider.
2869                  * Curiously, there still is a configuration bit to control
2870                  * this, which means it can be set incorrectly. And even
2871                  * more curiously, many boards out there are improperly
2872                  * configured, even though the IT8720F datasheet claims
2873                  * that the internal routing of VCCH to VIN7 is the default
2874                  * setting. So we force the internal routing in this case.
2875                  *
2876                  * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
2877                  * If UART6 is enabled, re-route VIN7 to the internal divider
2878                  * if that is not already the case.
2879                  */
2880                 if ((sio_data->type == it8720 || uart6) && !(reg & BIT(1))) {
2881                         reg |= BIT(1);
2882                         superio_outb(sioaddr, IT87_SIO_PINX2_REG, reg);
2883                         pr_notice("Routing internal VCCH to in7\n");
2884                 }
2885                 if (reg & BIT(0))
2886                         sio_data->internal |= BIT(0);
2887                 if (reg & BIT(1))
2888                         sio_data->internal |= BIT(1);
2889
2890                 /*
2891                  * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
2892                  * While VIN7 can be routed to the internal voltage divider,
2893                  * VIN5 and VIN6 are not available if UART6 is enabled.
2894                  *
2895                  * Also, temp3 is not available if UART6 is enabled and TEMPIN3
2896                  * is the temperature source. Since we can not read the
2897                  * temperature source here, skip_temp is preliminary.
2898                  */
2899                 if (uart6) {
2900                         sio_data->skip_in |= BIT(5) | BIT(6);
2901                         sio_data->skip_temp |= BIT(2);
2902                 }
2903
2904                 sio_data->beep_pin = superio_inb(sioaddr,
2905                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2906         }
2907         if (sio_data->beep_pin)
2908                 pr_info("Beeping is supported\n");
2909
2910         /* Disable specific features based on DMI strings */
2911         board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
2912         board_name = dmi_get_system_info(DMI_BOARD_NAME);
2913         if (board_vendor && board_name) {
2914                 if (strcmp(board_vendor, "nVIDIA") == 0 &&
2915                     strcmp(board_name, "FN68PT") == 0) {
2916                         /*
2917                          * On the Shuttle SN68PT, FAN_CTL2 is apparently not
2918                          * connected to a fan, but to something else. One user
2919                          * has reported instant system power-off when changing
2920                          * the PWM2 duty cycle, so we disable it.
2921                          * I use the board name string as the trigger in case
2922                          * the same board is ever used in other systems.
2923                          */
2924                         pr_info("Disabling pwm2 due to hardware constraints\n");
2925                         sio_data->skip_pwm = BIT(1);
2926                 }
2927         }
2928
2929 exit:
2930         superio_exit(sioaddr);
2931         return err;
2932 }
2933
2934 /* Called when we have found a new IT87. */
2935 static void it87_init_device(struct platform_device *pdev)
2936 {
2937         struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
2938         struct it87_data *data = platform_get_drvdata(pdev);
2939         int tmp, i;
2940         u8 mask;
2941
2942         /*
2943          * For each PWM channel:
2944          * - If it is in automatic mode, setting to manual mode should set
2945          *   the fan to full speed by default.
2946          * - If it is in manual mode, we need a mapping to temperature
2947          *   channels to use when later setting to automatic mode later.
2948          *   Use a 1:1 mapping by default (we are clueless.)
2949          * In both cases, the value can (and should) be changed by the user
2950          * prior to switching to a different mode.
2951          * Note that this is no longer needed for the IT8721F and later, as
2952          * these have separate registers for the temperature mapping and the
2953          * manual duty cycle.
2954          */
2955         for (i = 0; i < NUM_AUTO_PWM; i++) {
2956                 data->pwm_temp_map[i] = i;
2957                 data->pwm_duty[i] = 0x7f;       /* Full speed */
2958                 data->auto_pwm[i][3] = 0x7f;    /* Full speed, hard-coded */
2959         }
2960
2961         /*
2962          * Some chips seem to have default value 0xff for all limit
2963          * registers. For low voltage limits it makes no sense and triggers
2964          * alarms, so change to 0 instead. For high temperature limits, it
2965          * means -1 degree C, which surprisingly doesn't trigger an alarm,
2966          * but is still confusing, so change to 127 degrees C.
2967          */
2968         for (i = 0; i < NUM_VIN_LIMIT; i++) {
2969                 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
2970                 if (tmp == 0xff)
2971                         it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
2972         }
2973         for (i = 0; i < NUM_TEMP_LIMIT; i++) {
2974                 tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
2975                 if (tmp == 0xff)
2976                         it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
2977         }
2978
2979         /*
2980          * Temperature channels are not forcibly enabled, as they can be
2981          * set to two different sensor types and we can't guess which one
2982          * is correct for a given system. These channels can be enabled at
2983          * run-time through the temp{1-3}_type sysfs accessors if needed.
2984          */
2985
2986         /* Check if voltage monitors are reset manually or by some reason */
2987         tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
2988         if ((tmp & 0xff) == 0) {
2989                 /* Enable all voltage monitors */
2990                 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
2991         }
2992
2993         /* Check if tachometers are reset manually or by some reason */
2994         mask = 0x70 & ~(sio_data->skip_fan << 4);
2995         data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
2996         if ((data->fan_main_ctrl & mask) == 0) {
2997                 /* Enable all fan tachometers */
2998                 data->fan_main_ctrl |= mask;
2999                 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
3000                                  data->fan_main_ctrl);
3001         }
3002         data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
3003
3004         tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
3005
3006         /* Set tachometers to 16-bit mode if needed */
3007         if (has_fan16_config(data)) {
3008                 if (~tmp & 0x07 & data->has_fan) {
3009                         dev_dbg(&pdev->dev,
3010                                 "Setting fan1-3 to 16-bit mode\n");
3011                         it87_write_value(data, IT87_REG_FAN_16BIT,
3012                                          tmp | 0x07);
3013                 }
3014         }
3015
3016         /* Check for additional fans */
3017         if (has_four_fans(data) && (tmp & BIT(4)))
3018                 data->has_fan |= BIT(3); /* fan4 enabled */
3019         if (has_five_fans(data) && (tmp & BIT(5)))
3020                 data->has_fan |= BIT(4); /* fan5 enabled */
3021         if (!has_fan16_config(data) && has_six_fans(data) && (tmp & BIT(2)))
3022                 data->has_fan |= BIT(5); /* fan6 enabled */
3023
3024         /* Fan input pins may be used for alternative functions */
3025         data->has_fan &= ~sio_data->skip_fan;
3026
3027         /* Check if pwm5, pwm6 are enabled */
3028         if (has_six_pwm(data)) {
3029                 /* The following code may be IT8620E specific */
3030                 tmp = it87_read_value(data, IT87_REG_FAN_DIV);
3031                 if ((tmp & 0xc0) == 0xc0)
3032                         sio_data->skip_pwm |= BIT(4);
3033                 if (!(tmp & BIT(3)))
3034                         sio_data->skip_pwm |= BIT(5);
3035         }
3036
3037         /* Start monitoring */
3038         it87_write_value(data, IT87_REG_CONFIG,
3039                          (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
3040                          | (update_vbat ? 0x41 : 0x01));
3041 }
3042
3043 /* Return 1 if and only if the PWM interface is safe to use */
3044 static int it87_check_pwm(struct device *dev)
3045 {
3046         struct it87_data *data = dev_get_drvdata(dev);
3047         /*
3048          * Some BIOSes fail to correctly configure the IT87 fans. All fans off
3049          * and polarity set to active low is sign that this is the case so we
3050          * disable pwm control to protect the user.
3051          */
3052         int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
3053
3054         if ((tmp & 0x87) == 0) {
3055                 if (fix_pwm_polarity) {
3056                         /*
3057                          * The user asks us to attempt a chip reconfiguration.
3058                          * This means switching to active high polarity and
3059                          * inverting all fan speed values.
3060                          */
3061                         int i;
3062                         u8 pwm[3];
3063
3064                         for (i = 0; i < ARRAY_SIZE(pwm); i++)
3065                                 pwm[i] = it87_read_value(data,
3066                                                          IT87_REG_PWM[i]);
3067
3068                         /*
3069                          * If any fan is in automatic pwm mode, the polarity
3070                          * might be correct, as suspicious as it seems, so we
3071                          * better don't change anything (but still disable the
3072                          * PWM interface).
3073                          */
3074                         if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
3075                                 dev_info(dev,
3076                                          "Reconfiguring PWM to active high polarity\n");
3077                                 it87_write_value(data, IT87_REG_FAN_CTL,
3078                                                  tmp | 0x87);
3079                                 for (i = 0; i < 3; i++)
3080                                         it87_write_value(data,
3081                                                          IT87_REG_PWM[i],
3082                                                          0x7f & ~pwm[i]);
3083                                 return 1;
3084                         }
3085
3086                         dev_info(dev,
3087                                  "PWM configuration is too broken to be fixed\n");
3088                 }
3089
3090                 dev_info(dev,
3091                          "Detected broken BIOS defaults, disabling PWM interface\n");
3092                 return 0;
3093         } else if (fix_pwm_polarity) {
3094                 dev_info(dev,
3095                          "PWM configuration looks sane, won't touch\n");
3096         }
3097
3098         return 1;
3099 }
3100
3101 static int it87_probe(struct platform_device *pdev)
3102 {
3103         struct it87_data *data;
3104         struct resource *res;
3105         struct device *dev = &pdev->dev;
3106         struct it87_sio_data *sio_data = dev_get_platdata(dev);
3107         int enable_pwm_interface;
3108         struct device *hwmon_dev;
3109
3110         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3111         if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
3112                                  DRVNAME)) {
3113                 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
3114                         (unsigned long)res->start,
3115                         (unsigned long)(res->start + IT87_EC_EXTENT - 1));
3116                 return -EBUSY;
3117         }
3118
3119         data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
3120         if (!data)
3121                 return -ENOMEM;
3122
3123         data->addr = res->start;
3124         data->type = sio_data->type;
3125         data->features = it87_devices[sio_data->type].features;
3126         data->peci_mask = it87_devices[sio_data->type].peci_mask;
3127         data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
3128         data->bank = 0xff;
3129
3130         /*
3131          * IT8705F Datasheet 0.4.1, 3h == Version G.
3132          * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
3133          * These are the first revisions with 16-bit tachometer support.
3134          */
3135         switch (data->type) {
3136         case it87:
3137                 if (sio_data->revision >= 0x03) {
3138                         data->features &= ~FEAT_OLD_AUTOPWM;
3139                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS;
3140                 }
3141                 break;
3142         case it8712:
3143                 if (sio_data->revision >= 0x08) {
3144                         data->features &= ~FEAT_OLD_AUTOPWM;
3145                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS |
3146                                           FEAT_FIVE_FANS;
3147                 }
3148                 break;
3149         default:
3150                 break;
3151         }
3152
3153         /* Now, we do the remaining detection. */
3154         if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80) ||
3155             it87_read_value(data, IT87_REG_CHIPID) != 0x90)
3156                 return -ENODEV;
3157
3158         platform_set_drvdata(pdev, data);
3159
3160         mutex_init(&data->update_lock);
3161
3162         /* Check PWM configuration */
3163         enable_pwm_interface = it87_check_pwm(dev);
3164
3165         /* Starting with IT8721F, we handle scaling of internal voltages */
3166         if (has_12mv_adc(data)) {
3167                 if (sio_data->internal & BIT(0))
3168                         data->in_scaled |= BIT(3);      /* in3 is AVCC */
3169                 if (sio_data->internal & BIT(1))
3170                         data->in_scaled |= BIT(7);      /* in7 is VSB */
3171                 if (sio_data->internal & BIT(2))
3172                         data->in_scaled |= BIT(8);      /* in8 is Vbat */
3173                 if (sio_data->internal & BIT(3))
3174                         data->in_scaled |= BIT(9);      /* in9 is AVCC */
3175         } else if (sio_data->type == it8781 || sio_data->type == it8782 ||
3176                    sio_data->type == it8783) {
3177                 if (sio_data->internal & BIT(0))
3178                         data->in_scaled |= BIT(3);      /* in3 is VCC5V */
3179                 if (sio_data->internal & BIT(1))
3180                         data->in_scaled |= BIT(7);      /* in7 is VCCH5V */
3181         }
3182
3183         data->has_temp = 0x07;
3184         if (sio_data->skip_temp & BIT(2)) {
3185                 if (sio_data->type == it8782 &&
3186                     !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
3187                         data->has_temp &= ~BIT(2);
3188         }
3189
3190         data->in_internal = sio_data->internal;
3191         data->has_in = 0x3ff & ~sio_data->skip_in;
3192
3193         if (has_six_temp(data)) {
3194                 u8 reg = it87_read_value(data, IT87_REG_TEMP456_ENABLE);
3195
3196                 /* Check for additional temperature sensors */
3197                 if ((reg & 0x03) >= 0x02)
3198                         data->has_temp |= BIT(3);
3199                 if (((reg >> 2) & 0x03) >= 0x02)
3200                         data->has_temp |= BIT(4);
3201                 if (((reg >> 4) & 0x03) >= 0x02)
3202                         data->has_temp |= BIT(5);
3203
3204                 /* Check for additional voltage sensors */
3205                 if ((reg & 0x03) == 0x01)
3206                         data->has_in |= BIT(10);
3207                 if (((reg >> 2) & 0x03) == 0x01)
3208                         data->has_in |= BIT(11);
3209                 if (((reg >> 4) & 0x03) == 0x01)
3210                         data->has_in |= BIT(12);
3211         }
3212
3213         data->has_beep = !!sio_data->beep_pin;
3214
3215         /* Initialize the IT87 chip */
3216         it87_init_device(pdev);
3217
3218         if (!sio_data->skip_vid) {
3219                 data->has_vid = true;
3220                 data->vrm = vid_which_vrm();
3221                 /* VID reading from Super-I/O config space if available */
3222                 data->vid = sio_data->vid_value;
3223         }
3224
3225         /* Prepare for sysfs hooks */
3226         data->groups[0] = &it87_group;
3227         data->groups[1] = &it87_group_in;
3228         data->groups[2] = &it87_group_temp;
3229         data->groups[3] = &it87_group_fan;
3230
3231         if (enable_pwm_interface) {
3232                 data->has_pwm = BIT(ARRAY_SIZE(IT87_REG_PWM)) - 1;
3233                 data->has_pwm &= ~sio_data->skip_pwm;
3234
3235                 data->groups[4] = &it87_group_pwm;
3236                 if (has_old_autopwm(data) || has_newer_autopwm(data))
3237                         data->groups[5] = &it87_group_auto_pwm;
3238         }
3239
3240         hwmon_dev = devm_hwmon_device_register_with_groups(dev,
3241                                         it87_devices[sio_data->type].name,
3242                                         data, data->groups);
3243         return PTR_ERR_OR_ZERO(hwmon_dev);
3244 }
3245
3246 static struct platform_driver it87_driver = {
3247         .driver = {
3248                 .name   = DRVNAME,
3249         },
3250         .probe  = it87_probe,
3251 };
3252
3253 static int __init it87_device_add(int index, unsigned short address,
3254                                   const struct it87_sio_data *sio_data)
3255 {
3256         struct platform_device *pdev;
3257         struct resource res = {
3258                 .start  = address + IT87_EC_OFFSET,
3259                 .end    = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
3260                 .name   = DRVNAME,
3261                 .flags  = IORESOURCE_IO,
3262         };
3263         int err;
3264
3265         err = acpi_check_resource_conflict(&res);
3266         if (err)
3267                 return err;
3268
3269         pdev = platform_device_alloc(DRVNAME, address);
3270         if (!pdev)
3271                 return -ENOMEM;
3272
3273         err = platform_device_add_resources(pdev, &res, 1);
3274         if (err) {
3275                 pr_err("Device resource addition failed (%d)\n", err);
3276                 goto exit_device_put;
3277         }
3278
3279         err = platform_device_add_data(pdev, sio_data,
3280                                        sizeof(struct it87_sio_data));
3281         if (err) {
3282                 pr_err("Platform data allocation failed\n");
3283                 goto exit_device_put;
3284         }
3285
3286         err = platform_device_add(pdev);
3287         if (err) {
3288                 pr_err("Device addition failed (%d)\n", err);
3289                 goto exit_device_put;
3290         }
3291
3292         it87_pdev[index] = pdev;
3293         return 0;
3294
3295 exit_device_put:
3296         platform_device_put(pdev);
3297         return err;
3298 }
3299
3300 static int __init sm_it87_init(void)
3301 {
3302         int sioaddr[2] = { REG_2E, REG_4E };
3303         struct it87_sio_data sio_data;
3304         unsigned short isa_address;
3305         bool found = false;
3306         int i, err;
3307
3308         err = platform_driver_register(&it87_driver);
3309         if (err)
3310                 return err;
3311
3312         for (i = 0; i < ARRAY_SIZE(sioaddr); i++) {
3313                 memset(&sio_data, 0, sizeof(struct it87_sio_data));
3314                 isa_address = 0;
3315                 err = it87_find(sioaddr[i], &isa_address, &sio_data);
3316                 if (err || isa_address == 0)
3317                         continue;
3318
3319                 err = it87_device_add(i, isa_address, &sio_data);
3320                 if (err)
3321                         goto exit_dev_unregister;
3322                 found = true;
3323         }
3324
3325         if (!found) {
3326                 err = -ENODEV;
3327                 goto exit_unregister;
3328         }
3329         return 0;
3330
3331 exit_dev_unregister:
3332         /* NULL check handled by platform_device_unregister */
3333         platform_device_unregister(it87_pdev[0]);
3334 exit_unregister:
3335         platform_driver_unregister(&it87_driver);
3336         return err;
3337 }
3338
3339 static void __exit sm_it87_exit(void)
3340 {
3341         /* NULL check handled by platform_device_unregister */
3342         platform_device_unregister(it87_pdev[1]);
3343         platform_device_unregister(it87_pdev[0]);
3344         platform_driver_unregister(&it87_driver);
3345 }
3346
3347 MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>");
3348 MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
3349 module_param(update_vbat, bool, 0);
3350 MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
3351 module_param(fix_pwm_polarity, bool, 0);
3352 MODULE_PARM_DESC(fix_pwm_polarity,
3353                  "Force PWM polarity to active high (DANGEROUS)");
3354 MODULE_LICENSE("GPL");
3355
3356 module_init(sm_it87_init);
3357 module_exit(sm_it87_exit);