git.sur5r.net Git - groeck-it87/blob - it87.c

   1 /*
   2  *  it87.c - Part of lm_sensors, Linux kernel modules for hardware
   3  *           monitoring.
   4  *
   5  *  The IT8705F is an LPC-based Super I/O part that contains UARTs, a
   6  *  parallel port, an IR port, a MIDI port, a floppy controller, etc., in
   7  *  addition to an Environment Controller (Enhanced Hardware Monitor and
   8  *  Fan Controller)
   9  *
  10  *  This driver supports only the Environment Controller in the IT8705F and
  11  *  similar parts.  The other devices are supported by different drivers.
  12  *
  13  *  Supports: IT8603E  Super I/O chip w/LPC interface
  14  *            IT8607E  Super I/O chip w/LPC interface
  15  *            IT8613E  Super I/O chip w/LPC interface
  16  *            IT8620E  Super I/O chip w/LPC interface
  17  *            IT8622E  Super I/O chip w/LPC interface
  18  *            IT8623E  Super I/O chip w/LPC interface
  19  *            IT8628E  Super I/O chip w/LPC interface
  20  *            IT8655E  Super I/O chip w/LPC interface
  21  *            IT8665E  Super I/O chip w/LPC interface
  22  *            IT8686E  Super I/O chip w/LPC interface
  23  *            IT8705F  Super I/O chip w/LPC interface
  24  *            IT8712F  Super I/O chip w/LPC interface
  25  *            IT8716F  Super I/O chip w/LPC interface
  26  *            IT8718F  Super I/O chip w/LPC interface
  27  *            IT8720F  Super I/O chip w/LPC interface
  28  *            IT8721F  Super I/O chip w/LPC interface
  29  *            IT8726F  Super I/O chip w/LPC interface
  30  *            IT8728F  Super I/O chip w/LPC interface
  31  *            IT8732F  Super I/O chip w/LPC interface
  32  *            IT8758E  Super I/O chip w/LPC interface
  33  *            IT8771E  Super I/O chip w/LPC interface
  34  *            IT8772E  Super I/O chip w/LPC interface
  35  *            IT8781F  Super I/O chip w/LPC interface
  36  *            IT8782F  Super I/O chip w/LPC interface
  37  *            IT8783E/F Super I/O chip w/LPC interface
  38  *            IT8786E  Super I/O chip w/LPC interface
  39  *            IT8790E  Super I/O chip w/LPC interface
  40  *            IT8792E  Super I/O chip w/LPC interface
  41  *            Sis950   A clone of the IT8705F
  42  *
  43  *  Copyright (C) 2001 Chris Gauthron
  44  *  Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de>
  45  *
  46  *  This program is free software; you can redistribute it and/or modify
  47  *  it under the terms of the GNU General Public License as published by
  48  *  the Free Software Foundation; either version 2 of the License, or
  49  *  (at your option) any later version.
  50  *
  51  *  This program is distributed in the hope that it will be useful,
  52  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  53  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  54  *  GNU General Public License for more details.
  55  */
  56
  57 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  58
  59 #include <linux/bitops.h>
  60 #include <linux/module.h>
  61 #include <linux/init.h>
  62 #include <linux/slab.h>
  63 #include <linux/jiffies.h>
  64 #include <linux/platform_device.h>
  65 #include <linux/hwmon.h>
  66 #include <linux/hwmon-sysfs.h>
  67 #include <linux/hwmon-vid.h>
  68 #include <linux/err.h>
  69 #include <linux/mutex.h>
  70 #include <linux/sysfs.h>
  71 #include <linux/string.h>
  72 #include <linux/dmi.h>
  73 #include <linux/acpi.h>
  74 #include <linux/io.h>
  75 #include "compat.h"
  76
  77 #define DRVNAME "it87"
  78
  79 /* Necessary API not (yet) exported in upstream kernel */
  80 /* #define __IT87_USE_ACPI_MUTEX */
  81
  82 enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732,
  83              it8771, it8772, it8781, it8782, it8783, it8786, it8790,
  84              it8792, it8603, it8607, it8613, it8620, it8622, it8628, it8655, it8665,
  85              it8686 };
  86
  87 static unsigned short force_id;
  88 module_param(force_id, ushort, 0);
  89 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  90
  91 static struct platform_device *it87_pdev[2];
  92 static bool it87_sio4e_broken;
  93 #ifdef __IT87_USE_ACPI_MUTEX
  94 static acpi_handle it87_acpi_sio_handle;
  95 static char *it87_acpi_sio_mutex;
  96 #endif
  97
  98 #define REG_2E  0x2e    /* The register to read/write */
  99 #define REG_4E  0x4e    /* Secondary register to read/write */
 100
 101 #define DEV     0x07    /* Register: Logical device select */
 102 #define PME     0x04    /* The device with the fan registers in it */
 103
 104 /* The device with the IT8718F/IT8720F VID value in it */
 105 #define GPIO    0x07
 106
 107 #define DEVID   0x20    /* Register: Device ID */
 108 #define DEVREV  0x22    /* Register: Device Revision */
 109
 110 static inline void __superio_enter(int ioreg)
 111 {
 112         outb(0x87, ioreg);
 113         outb(0x01, ioreg);
 114         outb(0x55, ioreg);
 115         outb(ioreg == REG_4E ? 0xaa : 0x55, ioreg);
 116 }
 117
 118 static inline int superio_inb(int ioreg, int reg)
 119 {
 120         int val;
 121
 122         outb(reg, ioreg);
 123         val = inb(ioreg + 1);
 124         if (it87_sio4e_broken && ioreg == 0x4e && val == 0xff) {
 125                 __superio_enter(ioreg);
 126                 outb(reg, ioreg);
 127                 val = inb(ioreg + 1);
 128                 pr_warn("Retry access 0x4e:0x%x -> 0x%x\n", reg, val);
 129         }
 130
 131         return val;
 132 }
 133
 134 static inline void superio_outb(int ioreg, int reg, int val)
 135 {
 136         outb(reg, ioreg);
 137         outb(val, ioreg + 1);
 138 }
 139
 140 static int superio_inw(int ioreg, int reg)
 141 {
 142         return (superio_inb(ioreg, reg) << 8) | superio_inb(ioreg, reg + 1);
 143 }
 144
 145 static inline void superio_select(int ioreg, int ldn)
 146 {
 147         outb(DEV, ioreg);
 148         outb(ldn, ioreg + 1);
 149 }
 150
 151 static inline int superio_enter(int ioreg)
 152 {
 153 #ifdef __IT87_USE_ACPI_MUTEX
 154         if (it87_acpi_sio_mutex) {
 155                 acpi_status status;
 156
 157                 status = acpi_acquire_mutex(NULL, it87_acpi_sio_mutex, 0x10);
 158                 if (ACPI_FAILURE(status)) {
 159                         pr_err("Failed to acquire ACPI mutex\n");
 160                         return -EBUSY;
 161                 }
 162         }
 163 #endif
 164         /*
 165          * Try to reserve ioreg and ioreg + 1 for exclusive access.
 166          */
 167         if (!request_muxed_region(ioreg, 2, DRVNAME))
 168                 goto error;
 169
 170         __superio_enter(ioreg);
 171         return 0;
 172
 173 error:
 174 #ifdef __IT87_USE_ACPI_MUTEX
 175         if (it87_acpi_sio_mutex)
 176                 acpi_release_mutex(it87_acpi_sio_handle, NULL);
 177 #endif
 178         return -EBUSY;
 179 }
 180
 181 static inline void superio_exit(int ioreg)
 182 {
 183         if (!it87_sio4e_broken || ioreg != 0x4e) {
 184                 outb(0x02, ioreg);
 185                 outb(0x02, ioreg + 1);
 186         }
 187         release_region(ioreg, 2);
 188 #ifdef __IT87_USE_ACPI_MUTEX
 189         if (it87_acpi_sio_mutex)
 190                 acpi_release_mutex(it87_acpi_sio_handle, NULL);
 191 #endif
 192 }
 193
 194 /* Logical device 4 registers */
 195 #define IT8712F_DEVID 0x8712
 196 #define IT8705F_DEVID 0x8705
 197 #define IT8716F_DEVID 0x8716
 198 #define IT8718F_DEVID 0x8718
 199 #define IT8720F_DEVID 0x8720
 200 #define IT8721F_DEVID 0x8721
 201 #define IT8726F_DEVID 0x8726
 202 #define IT8728F_DEVID 0x8728
 203 #define IT8732F_DEVID 0x8732
 204 #define IT8792E_DEVID 0x8733
 205 #define IT8771E_DEVID 0x8771
 206 #define IT8772E_DEVID 0x8772
 207 #define IT8781F_DEVID 0x8781
 208 #define IT8782F_DEVID 0x8782
 209 #define IT8783E_DEVID 0x8783
 210 #define IT8786E_DEVID 0x8786
 211 #define IT8790E_DEVID 0x8790
 212 #define IT8603E_DEVID 0x8603
 213 #define IT8607E_DEVID 0x8607
 214 #define IT8613E_DEVID 0x8613
 215 #define IT8620E_DEVID 0x8620
 216 #define IT8622E_DEVID 0x8622
 217 #define IT8623E_DEVID 0x8623
 218 #define IT8628E_DEVID 0x8628
 219 #define IT8655E_DEVID 0x8655
 220 #define IT8665E_DEVID 0x8665
 221 #define IT8686E_DEVID 0x8686
 222 #define IT87_ACT_REG  0x30
 223 #define IT87_BASE_REG 0x60
 224
 225 /* Logical device 7 registers (IT8712F and later) */
 226 #define IT87_SIO_GPIO1_REG      0x25
 227 #define IT87_SIO_GPIO2_REG      0x26
 228 #define IT87_SIO_GPIO3_REG      0x27
 229 #define IT87_SIO_GPIO4_REG      0x28
 230 #define IT87_SIO_GPIO5_REG      0x29
 231 #define IT87_SIO_GPIO9_REG      0xd3
 232 #define IT87_SIO_PINX1_REG      0x2a    /* Pin selection */
 233 #define IT87_SIO_PINX2_REG      0x2c    /* Pin selection */
 234 #define IT87_SIO_PINX4_REG      0x2d    /* Pin selection */
 235 #define IT87_SIO_SPI_REG        0xef    /* SPI function pin select */
 236 #define IT87_SIO_VID_REG        0xfc    /* VID value */
 237 #define IT87_SIO_BEEP_PIN_REG   0xf6    /* Beep pin mapping */
 238
 239 /* Update battery voltage after every reading if true */
 240 static bool update_vbat;
 241
 242 /* Not all BIOSes properly configure the PWM registers */
 243 static bool fix_pwm_polarity;
 244
 245 /* Many IT87 constants specified below */
 246
 247 /* Length of ISA address segment */
 248 #define IT87_EXTENT 8
 249
 250 /* Length of ISA address segment for Environmental Controller */
 251 #define IT87_EC_EXTENT 2
 252
 253 /* Offset of EC registers from ISA base address */
 254 #define IT87_EC_OFFSET 5
 255
 256 /* Where are the ISA address/data registers relative to the EC base address */
 257 #define IT87_ADDR_REG_OFFSET 0
 258 #define IT87_DATA_REG_OFFSET 1
 259
 260 /*----- The IT87 registers -----*/
 261
 262 #define IT87_REG_CONFIG        0x00
 263
 264 #define IT87_REG_ALARM1        0x01
 265 #define IT87_REG_ALARM2        0x02
 266 #define IT87_REG_ALARM3        0x03
 267
 268 #define IT87_REG_BANK           0x06
 269
 270 /*
 271  * The IT8718F and IT8720F have the VID value in a different register, in
 272  * Super-I/O configuration space.
 273  */
 274 #define IT87_REG_VID           0x0a
 275 /*
 276  * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
 277  * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
 278  * mode.
 279  */
 280 #define IT87_REG_FAN_DIV       0x0b
 281 #define IT87_REG_FAN_16BIT     0x0c
 282
 283 /*
 284  * Monitors:
 285  * - up to 13 voltage (0 to 7, battery, avcc, 10 to 12)
 286  * - up to 6 temp (1 to 6)
 287  * - up to 6 fan (1 to 6)
 288  */
 289
 290 static const u8 IT87_REG_FAN[] =        { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c };
 291 static const u8 IT87_REG_FAN_MIN[] =    { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e };
 292 static const u8 IT87_REG_FANX[] =       { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d };
 293 static const u8 IT87_REG_FANX_MIN[] =   { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f };
 294
 295 static const u8 IT87_REG_FAN_8665[] =   { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x93 };
 296 static const u8 IT87_REG_FAN_MIN_8665[] =
 297                                         { 0x10, 0x11, 0x12, 0x84, 0x86, 0xb2 };
 298 static const u8 IT87_REG_FANX_8665[] =  { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x94 };
 299 static const u8 IT87_REG_FANX_MIN_8665[] =
 300                                         { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0xb3 };
 301
 302 static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59, 0x5a, 0x90, 0x91 };
 303
 304 static const u8 IT87_REG_TEMP_OFFSET_8686[] = { 0x56, 0x57, 0x59, 0x90, 0x91, 0x92 };
 305
 306 #define IT87_REG_FAN_MAIN_CTRL 0x13
 307 #define IT87_REG_FAN_CTL       0x14
 308
 309 static const u8 IT87_REG_PWM[] =        { 0x15, 0x16, 0x17, 0x7f, 0xa7, 0xaf };
 310 static const u8 IT87_REG_PWM_8665[] =   { 0x15, 0x16, 0x17, 0x1e, 0x1f, 0x92 };
 311
 312 static const u8 IT87_REG_PWM_DUTY[] =   { 0x63, 0x6b, 0x73, 0x7b, 0xa3, 0xab };
 313
 314 static const u8 IT87_REG_VIN[]  = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26,
 315                                     0x27, 0x28, 0x2f, 0x2c, 0x2d, 0x2e };
 316
 317 #define IT87_REG_TEMP(nr)      (0x29 + (nr))
 318
 319 #define IT87_REG_VIN_MAX(nr)   (0x30 + (nr) * 2)
 320 #define IT87_REG_VIN_MIN(nr)   (0x31 + (nr) * 2)
 321
 322 static const u8 IT87_REG_TEMP_HIGH[] =  { 0x40, 0x42, 0x44, 0x46, 0xb4, 0xb6 };
 323 static const u8 IT87_REG_TEMP_LOW[] =   { 0x41, 0x43, 0x45, 0x47, 0xb5, 0xb7 };
 324
 325 static const u8 IT87_REG_TEMP_HIGH_8686[] =
 326                                         { 0x40, 0x42, 0x44, 0xb4, 0xb6, 0xb8 };
 327 static const u8 IT87_REG_TEMP_LOW_8686[] =
 328                                         { 0x41, 0x43, 0x45, 0xb5, 0xb7, 0xb9 };
 329
 330 #define IT87_REG_VIN_ENABLE    0x50
 331 #define IT87_REG_TEMP_ENABLE   0x51
 332 #define IT87_REG_TEMP_EXTRA    0x55
 333 #define IT87_REG_BEEP_ENABLE   0x5c
 334
 335 #define IT87_REG_CHIPID        0x58
 336
 337 static const u8 IT87_REG_AUTO_BASE[] = { 0x60, 0x68, 0x70, 0x78, 0xa0, 0xa8 };
 338
 339 #define IT87_REG_AUTO_TEMP(nr, i) (IT87_REG_AUTO_BASE[nr] + (i))
 340 #define IT87_REG_AUTO_PWM(nr, i)  (IT87_REG_AUTO_BASE[nr] + 5 + (i))
 341
 342 #define IT87_REG_TEMP456_ENABLE 0x77
 343
 344 static const u16 IT87_REG_TEMP_SRC1[] = { 0x21d, 0x21e, 0x21f };
 345 #define IT87_REG_TEMP_SRC2      0x23d
 346
 347 #define NUM_VIN                 ARRAY_SIZE(IT87_REG_VIN)
 348 #define NUM_VIN_LIMIT           8
 349 #define NUM_TEMP                6
 350 #define NUM_FAN                 ARRAY_SIZE(IT87_REG_FAN)
 351 #define NUM_FAN_DIV             3
 352 #define NUM_PWM                 ARRAY_SIZE(IT87_REG_PWM)
 353 #define NUM_AUTO_PWM            ARRAY_SIZE(IT87_REG_PWM)
 354
 355 struct it87_devices {
 356         const char *name;
 357         const char * const suffix;
 358         u32 features;
 359         u8 num_temp_limit;
 360         u8 peci_mask;
 361         u8 old_peci_mask;
 362 };
 363
 364 #define FEAT_12MV_ADC           BIT(0)
 365 #define FEAT_NEWER_AUTOPWM      BIT(1)
 366 #define FEAT_OLD_AUTOPWM        BIT(2)
 367 #define FEAT_16BIT_FANS         BIT(3)
 368 #define FEAT_TEMP_OFFSET        BIT(4)
 369 #define FEAT_TEMP_PECI          BIT(5)
 370 #define FEAT_TEMP_OLD_PECI      BIT(6)
 371 #define FEAT_FAN16_CONFIG       BIT(7)  /* Need to enable 16-bit fans */
 372 #define FEAT_FIVE_FANS          BIT(8)  /* Supports five fans */
 373 #define FEAT_VID                BIT(9)  /* Set if chip supports VID */
 374 #define FEAT_IN7_INTERNAL       BIT(10) /* Set if in7 is internal */
 375 #define FEAT_SIX_FANS           BIT(11) /* Supports six fans */
 376 #define FEAT_10_9MV_ADC         BIT(12)
 377 #define FEAT_AVCC3              BIT(13) /* Chip supports in9/AVCC3 */
 378 #define FEAT_FIVE_PWM           BIT(14) /* Chip supports 5 pwm chn */
 379 #define FEAT_SIX_PWM            BIT(15) /* Chip supports 6 pwm chn */
 380 #define FEAT_PWM_FREQ2          BIT(16) /* Separate pwm freq 2 */
 381 #define FEAT_SIX_TEMP           BIT(17) /* Up to 6 temp sensors */
 382 #define FEAT_VIN3_5V            BIT(18) /* VIN3 connected to +5V */
 383 #define FEAT_FOUR_FANS          BIT(19) /* Supports four fans */
 384 #define FEAT_FOUR_PWM           BIT(20) /* Supports four fan controls */
 385 #define FEAT_BANK_SEL           BIT(21) /* Chip has multi-bank support */
 386 #define FEAT_SCALING            BIT(22) /* Internal voltage scaling */
 387 #define FEAT_FANCTL_ONOFF       BIT(23) /* chip has FAN_CTL ON/OFF */
 388 #define FEAT_11MV_ADC           BIT(24)
 389
 390 static const struct it87_devices it87_devices[] = {
 391         [it87] = {
 392                 .name = "it87",
 393                 .suffix = "F",
 394                 .features = FEAT_OLD_AUTOPWM | FEAT_FANCTL_ONOFF,
 395                                                 /* may need to overwrite */
 396                 .num_temp_limit = 3,
 397         },
 398         [it8712] = {
 399                 .name = "it8712",
 400                 .suffix = "F",
 401                 .features = FEAT_OLD_AUTOPWM | FEAT_VID | FEAT_FANCTL_ONOFF,
 402                                                 /* may need to overwrite */
 403                 .num_temp_limit = 3,
 404         },
 405         [it8716] = {
 406                 .name = "it8716",
 407                 .suffix = "F",
 408                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 409                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2
 410                   | FEAT_FANCTL_ONOFF,
 411                 .num_temp_limit = 3,
 412         },
 413         [it8718] = {
 414                 .name = "it8718",
 415                 .suffix = "F",
 416                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 417                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 418                   | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 419                 .num_temp_limit = 3,
 420                 .old_peci_mask = 0x4,
 421         },
 422         [it8720] = {
 423                 .name = "it8720",
 424                 .suffix = "F",
 425                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 426                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 427                   | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 428                 .num_temp_limit = 3,
 429                 .old_peci_mask = 0x4,
 430         },
 431         [it8721] = {
 432                 .name = "it8721",
 433                 .suffix = "F",
 434                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 435                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 436                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL
 437                   | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF,
 438                 .num_temp_limit = 3,
 439                 .peci_mask = 0x05,
 440                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 441         },
 442         [it8728] = {
 443                 .name = "it8728",
 444                 .suffix = "F",
 445                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 446                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 447                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_SCALING
 448                   | FEAT_FANCTL_ONOFF,
 449                 .num_temp_limit = 3,
 450                 .peci_mask = 0x07,
 451         },
 452         [it8732] = {
 453                 .name = "it8732",
 454                 .suffix = "F",
 455                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 456                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 457                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_FOUR_FANS
 458                   | FEAT_FOUR_PWM | FEAT_FANCTL_ONOFF,
 459                 .num_temp_limit = 3,
 460                 .peci_mask = 0x07,
 461                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 462         },
 463         [it8771] = {
 464                 .name = "it8771",
 465                 .suffix = "E",
 466                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 467                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 468                   | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF,
 469                                 /* PECI: guesswork */
 470                                 /* 12mV ADC (OHM) */
 471                                 /* 16 bit fans (OHM) */
 472                                 /* three fans, always 16 bit (guesswork) */
 473                 .num_temp_limit = 3,
 474                 .peci_mask = 0x07,
 475         },
 476         [it8772] = {
 477                 .name = "it8772",
 478                 .suffix = "E",
 479                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 480                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 481                   | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF,
 482                                 /* PECI (coreboot) */
 483                                 /* 12mV ADC (HWSensors4, OHM) */
 484                                 /* 16 bit fans (HWSensors4, OHM) */
 485                                 /* three fans, always 16 bit (datasheet) */
 486                 .num_temp_limit = 3,
 487                 .peci_mask = 0x07,
 488         },
 489         [it8781] = {
 490                 .name = "it8781",
 491                 .suffix = "F",
 492                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 493                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
 494                   | FEAT_FANCTL_ONOFF,
 495                 .num_temp_limit = 3,
 496                 .old_peci_mask = 0x4,
 497         },
 498         [it8782] = {
 499                 .name = "it8782",
 500                 .suffix = "F",
 501                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 502                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
 503                   | FEAT_FANCTL_ONOFF,
 504                 .num_temp_limit = 3,
 505                 .old_peci_mask = 0x4,
 506         },
 507         [it8783] = {
 508                 .name = "it8783",
 509                 .suffix = "E/F",
 510                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 511                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
 512                   | FEAT_FANCTL_ONOFF,
 513                 .num_temp_limit = 3,
 514                 .old_peci_mask = 0x4,
 515         },
 516         [it8786] = {
 517                 .name = "it8786",
 518                 .suffix = "E",
 519                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 520                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 521                   | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 522                 .num_temp_limit = 3,
 523                 .peci_mask = 0x07,
 524         },
 525         [it8790] = {
 526                 .name = "it8790",
 527                 .suffix = "E",
 528                 .features = FEAT_NEWER_AUTOPWM | FEAT_10_9MV_ADC | FEAT_SCALING
 529                   | FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI
 530                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 531                 .num_temp_limit = 3,
 532                 .peci_mask = 0x07,
 533         },
 534         [it8792] = {
 535                 .name = "it8792",
 536                 .suffix = "E",
 537                 .features = FEAT_NEWER_AUTOPWM | FEAT_10_9MV_ADC | FEAT_SCALING
 538                   | FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI
 539                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 540                 .num_temp_limit = 3,
 541                 .peci_mask = 0x07,
 542         },
 543         [it8603] = {
 544                 .name = "it8603",
 545                 .suffix = "E",
 546                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 547                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 548                   | FEAT_AVCC3 | FEAT_PWM_FREQ2 | FEAT_SCALING,
 549                 .num_temp_limit = 3,
 550                 .peci_mask = 0x07,
 551         },
 552         [it8607] = {
 553                 .name = "it8607",
 554                 .suffix = "E",
 555                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 556                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 557                   | FEAT_AVCC3 | FEAT_PWM_FREQ2 | FEAT_SCALING
 558                   | FEAT_FANCTL_ONOFF,
 559                 .num_temp_limit = 3,
 560                 .peci_mask = 0x07,
 561         },
 562         [it8613] = {
 563                 .name = "it8613",
 564                 .suffix = "E",
 565                 .features = FEAT_NEWER_AUTOPWM | FEAT_11MV_ADC | FEAT_16BIT_FANS
 566                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 567                   | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
 568                   | FEAT_AVCC3 | FEAT_VIN3_5V | FEAT_SCALING,
 569                 .num_temp_limit = 3,
 570                 .peci_mask = 0x07,
 571         },
 572         [it8620] = {
 573                 .name = "it8620",
 574                 .suffix = "E",
 575                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 576                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 577                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 578                   | FEAT_SIX_TEMP | FEAT_VIN3_5V | FEAT_SCALING
 579                   | FEAT_FANCTL_ONOFF,
 580                 .num_temp_limit = 3,
 581                 .peci_mask = 0x07,
 582         },
 583         [it8622] = {
 584                 .name = "it8622",
 585                 .suffix = "E",
 586                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 587                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 588                   | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
 589                   | FEAT_AVCC3 | FEAT_VIN3_5V | FEAT_SCALING,
 590                 .num_temp_limit = 3,
 591                 .peci_mask = 0x07,
 592         },
 593         [it8628] = {
 594                 .name = "it8628",
 595                 .suffix = "E",
 596                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 597                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 598                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 599                   | FEAT_SIX_TEMP | FEAT_SCALING | FEAT_AVCC3
 600                   | FEAT_FANCTL_ONOFF,
 601                 .num_temp_limit = 3,
 602                 .peci_mask = 0x07,
 603         },
 604         [it8655] = {
 605                 .name = "it8655",
 606                 .suffix = "E",
 607                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 608                   | FEAT_TEMP_OFFSET | FEAT_AVCC3
 609                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_BANK_SEL,
 610                 .num_temp_limit = 6,
 611         },
 612         [it8665] = {
 613                 .name = "it8665",
 614                 .suffix = "E",
 615                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 616                   | FEAT_TEMP_OFFSET | FEAT_AVCC3
 617                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_SIX_FANS
 618                   | FEAT_SIX_PWM | FEAT_BANK_SEL,
 619                 .num_temp_limit = 6,
 620         },
 621         [it8686] = {
 622                 .name = "it8686",
 623                 .suffix = "E",
 624                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 625                   | FEAT_TEMP_OFFSET | FEAT_SIX_FANS
 626                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 627                   | FEAT_SIX_TEMP | FEAT_BANK_SEL | FEAT_SCALING | FEAT_AVCC3,
 628                 .num_temp_limit = 6,
 629         },
 630 };
 631
 632 #define has_16bit_fans(data)    ((data)->features & FEAT_16BIT_FANS)
 633 #define has_12mv_adc(data)      ((data)->features & FEAT_12MV_ADC)
 634 #define has_10_9mv_adc(data)    ((data)->features & FEAT_10_9MV_ADC)
 635 #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
 636 #define has_old_autopwm(data)   ((data)->features & FEAT_OLD_AUTOPWM)
 637 #define has_temp_offset(data)   ((data)->features & FEAT_TEMP_OFFSET)
 638 #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \
 639                                  ((data)->peci_mask & BIT(nr)))
 640 #define has_temp_old_peci(data, nr) \
 641                                 (((data)->features & FEAT_TEMP_OLD_PECI) && \
 642                                  ((data)->old_peci_mask & BIT(nr)))
 643 #define has_fan16_config(data)  ((data)->features & FEAT_FAN16_CONFIG)
 644 #define has_five_fans(data)     ((data)->features & (FEAT_FIVE_FANS | \
 645                                                      FEAT_SIX_FANS))
 646 #define has_vid(data)           ((data)->features & FEAT_VID)
 647 #define has_in7_internal(data)  ((data)->features & FEAT_IN7_INTERNAL)
 648 #define has_six_fans(data)      ((data)->features & FEAT_SIX_FANS)
 649 #define has_avcc3(data)         ((data)->features & FEAT_AVCC3)
 650 #define has_five_pwm(data)      ((data)->features & (FEAT_FIVE_PWM \
 651                                                      | FEAT_SIX_PWM))
 652 #define has_six_pwm(data)       ((data)->features & FEAT_SIX_PWM)
 653 #define has_pwm_freq2(data)     ((data)->features & FEAT_PWM_FREQ2)
 654 #define has_six_temp(data)      ((data)->features & FEAT_SIX_TEMP)
 655 #define has_vin3_5v(data)       ((data)->features & FEAT_VIN3_5V)
 656 #define has_four_fans(data)     ((data)->features & (FEAT_FOUR_FANS | \
 657                                                      FEAT_FIVE_FANS | \
 658                                                      FEAT_SIX_FANS))
 659 #define has_four_pwm(data)      ((data)->features & (FEAT_FOUR_PWM | \
 660                                                      FEAT_FIVE_PWM \
 661                                                      | FEAT_SIX_PWM))
 662 #define has_bank_sel(data)      ((data)->features & FEAT_BANK_SEL)
 663 #define has_scaling(data)       ((data)->features & FEAT_SCALING)
 664 #define has_fanctl_onoff(data)  ((data)->features & FEAT_FANCTL_ONOFF)
 665 #define has_11mv_adc(data)      ((data)->features & FEAT_11MV_ADC)
 666
 667 struct it87_sio_data {
 668         enum chips type;
 669         /* Values read from Super-I/O config space */
 670         u8 revision;
 671         u8 vid_value;
 672         u8 beep_pin;
 673         u8 internal;    /* Internal sensors can be labeled */
 674         /* Features skipped based on config or DMI */
 675         u16 skip_in;
 676         u8 skip_vid;
 677         u8 skip_fan;
 678         u8 skip_pwm;
 679         u8 skip_temp;
 680 };
 681
 682 /*
 683  * For each registered chip, we need to keep some data in memory.
 684  * The structure is dynamically allocated.
 685  */
 686 struct it87_data {
 687         const struct attribute_group *groups[7];
 688         enum chips type;
 689         u32 features;
 690         u8 bank;
 691         u8 peci_mask;
 692         u8 old_peci_mask;
 693
 694         const u8 *REG_FAN;
 695         const u8 *REG_FANX;
 696         const u8 *REG_FAN_MIN;
 697         const u8 *REG_FANX_MIN;
 698
 699         const u8 *REG_PWM;
 700
 701         const u8 *REG_TEMP_OFFSET;
 702         const u8 *REG_TEMP_LOW;
 703         const u8 *REG_TEMP_HIGH;
 704
 705         unsigned short addr;
 706         const char *name;
 707         struct mutex update_lock;
 708         char valid;             /* !=0 if following fields are valid */
 709         unsigned long last_updated;     /* In jiffies */
 710
 711         u16 in_scaled;          /* Internal voltage sensors are scaled */
 712         u16 in_internal;        /* Bitfield, internal sensors (for labels) */
 713         u16 has_in;             /* Bitfield, voltage sensors enabled */
 714         u8 in[NUM_VIN][3];              /* [nr][0]=in, [1]=min, [2]=max */
 715         u8 has_fan;             /* Bitfield, fans enabled */
 716         u16 fan[NUM_FAN][2];    /* Register values, [nr][0]=fan, [1]=min */
 717         u8 has_temp;            /* Bitfield, temp sensors enabled */
 718         s8 temp[NUM_TEMP][4];   /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
 719         u8 num_temp_limit;      /* Number of temp limit/offset registers */
 720         u8 sensor;              /* Register value (IT87_REG_TEMP_ENABLE) */
 721         u8 extra;               /* Register value (IT87_REG_TEMP_EXTRA) */
 722         u8 fan_div[NUM_FAN_DIV];/* Register encoding, shifted right */
 723         bool has_vid;           /* True if VID supported */
 724         u8 vid;                 /* Register encoding, combined */
 725         u8 vrm;
 726         u32 alarms;             /* Register encoding, combined */
 727         bool has_beep;          /* true if beep supported */
 728         u8 beeps;               /* Register encoding */
 729         u8 fan_main_ctrl;       /* Register value */
 730         u8 fan_ctl;             /* Register value */
 731
 732         /*
 733          * The following 3 arrays correspond to the same registers up to
 734          * the IT8720F. The meaning of bits 6-0 depends on the value of bit
 735          * 7, and we want to preserve settings on mode changes, so we have
 736          * to track all values separately.
 737          * Starting with the IT8721F, the manual PWM duty cycles are stored
 738          * in separate registers (8-bit values), so the separate tracking
 739          * is no longer needed, but it is still done to keep the driver
 740          * simple.
 741          */
 742         u8 has_pwm;             /* Bitfield, pwm control enabled */
 743         u8 pwm_ctrl[NUM_PWM];   /* Register value */
 744         u8 pwm_duty[NUM_PWM];   /* Manual PWM value set by user */
 745         u8 pwm_temp_map[NUM_PWM];/* PWM to temp. chan. mapping (bits 1-0) */
 746
 747         /* Automatic fan speed control registers */
 748         u8 auto_pwm[NUM_AUTO_PWM][4];   /* [nr][3] is hard-coded */
 749         s8 auto_temp[NUM_AUTO_PWM][5];  /* [nr][0] is point1_temp_hyst */
 750 };
 751
 752 static int adc_lsb(const struct it87_data *data, int nr)
 753 {
 754         int lsb;
 755
 756         if (has_12mv_adc(data))
 757                 lsb = 120;
 758         else if (has_10_9mv_adc(data))
 759                 lsb = 109;
 760         else if (has_11mv_adc(data))
 761                 lsb = 110;
 762         else
 763                 lsb = 160;
 764         if (data->in_scaled & BIT(nr))
 765                 lsb <<= 1;
 766         return lsb;
 767 }
 768
 769 static u8 in_to_reg(const struct it87_data *data, int nr, long val)
 770 {
 771         val = DIV_ROUND_CLOSEST(val * 10, adc_lsb(data, nr));
 772         return clamp_val(val, 0, 255);
 773 }
 774
 775 static int in_from_reg(const struct it87_data *data, int nr, int val)
 776 {
 777         return DIV_ROUND_CLOSEST(val * adc_lsb(data, nr), 10);
 778 }
 779
 780 static inline u8 FAN_TO_REG(long rpm, int div)
 781 {
 782         if (rpm == 0)
 783                 return 255;
 784         rpm = clamp_val(rpm, 1, 1000000);
 785         return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
 786 }
 787
 788 static inline u16 FAN16_TO_REG(long rpm)
 789 {
 790         if (rpm == 0)
 791                 return 0xffff;
 792         return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
 793 }
 794
 795 #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
 796                                 1350000 / ((val) * (div)))
 797 /* The divider is fixed to 2 in 16-bit mode */
 798 #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
 799                              1350000 / ((val) * 2))
 800
 801 #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \
 802                                     ((val) + 500) / 1000), -128, 127))
 803 #define TEMP_FROM_REG(val) ((val) * 1000)
 804
 805 static u8 pwm_to_reg(const struct it87_data *data, long val)
 806 {
 807         if (has_newer_autopwm(data))
 808                 return val;
 809         else
 810                 return val >> 1;
 811 }
 812
 813 static int pwm_from_reg(const struct it87_data *data, u8 reg)
 814 {
 815         if (has_newer_autopwm(data))
 816                 return reg;
 817         else
 818                 return (reg & 0x7f) << 1;
 819 }
 820
 821 static int DIV_TO_REG(int val)
 822 {
 823         int answer = 0;
 824
 825         while (answer < 7 && (val >>= 1))
 826                 answer++;
 827         return answer;
 828 }
 829
 830 #define DIV_FROM_REG(val) BIT(val)
 831
 832 /*
 833  * PWM base frequencies. The frequency has to be divided by either 128 or 256,
 834  * depending on the chip type, to calculate the actual PWM frequency.
 835  *
 836  * Some of the chip datasheets suggest a base frequency of 51 kHz instead
 837  * of 750 kHz for the slowest base frequency, resulting in a PWM frequency
 838  * of 200 Hz. Sometimes both PWM frequency select registers are affected,
 839  * sometimes just one. It is unknown if this is a datasheet error or real,
 840  * so this is ignored for now.
 841  */
 842 static const unsigned int pwm_freq[8] = {
 843         48000000,
 844         24000000,
 845         12000000,
 846         8000000,
 847         6000000,
 848         3000000,
 849         1500000,
 850         750000,
 851 };
 852
 853 static int _it87_read_value(struct it87_data *data, u8 reg)
 854 {
 855         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 856         return inb_p(data->addr + IT87_DATA_REG_OFFSET);
 857 }
 858
 859 static void _it87_write_value(struct it87_data *data, u8 reg, u8 value)
 860 {
 861         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 862         outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
 863 }
 864
 865 static void it87_set_bank(struct it87_data *data, u8 bank)
 866 {
 867         if (has_bank_sel(data) && bank != data->bank) {
 868                 u8 breg = _it87_read_value(data, IT87_REG_BANK);
 869
 870                 breg &= 0x1f;
 871                 breg |= (bank << 5);
 872                 data->bank = bank;
 873                 _it87_write_value(data, IT87_REG_BANK, breg);
 874         }
 875 }
 876
 877 /*
 878  * Must be called with data->update_lock held, except during initialization.
 879  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 880  * would slow down the IT87 access and should not be necessary.
 881  */
 882 static int it87_read_value(struct it87_data *data, u16 reg)
 883 {
 884         it87_set_bank(data, reg >> 8);
 885         return _it87_read_value(data, reg & 0xff);
 886 }
 887
 888 /*
 889  * Must be called with data->update_lock held, except during initialization.
 890  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 891  * would slow down the IT87 access and should not be necessary.
 892  */
 893 static void it87_write_value(struct it87_data *data, u16 reg, u8 value)
 894 {
 895         it87_set_bank(data, reg >> 8);
 896         _it87_write_value(data, reg & 0xff, value);
 897 }
 898
 899 static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
 900 {
 901         data->pwm_ctrl[nr] = it87_read_value(data, data->REG_PWM[nr]);
 902         if (has_newer_autopwm(data)) {
 903                 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
 904                 data->pwm_duty[nr] = it87_read_value(data,
 905                                                      IT87_REG_PWM_DUTY[nr]);
 906         } else {
 907                 if (data->pwm_ctrl[nr] & 0x80)  /* Automatic mode */
 908                         data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
 909                 else                            /* Manual mode */
 910                         data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
 911         }
 912
 913         if (has_old_autopwm(data)) {
 914                 int i;
 915
 916                 for (i = 0; i < 5 ; i++)
 917                         data->auto_temp[nr][i] = it87_read_value(data,
 918                                                 IT87_REG_AUTO_TEMP(nr, i));
 919                 for (i = 0; i < 3 ; i++)
 920                         data->auto_pwm[nr][i] = it87_read_value(data,
 921                                                 IT87_REG_AUTO_PWM(nr, i));
 922         } else if (has_newer_autopwm(data)) {
 923                 int i;
 924
 925                 /*
 926                  * 0: temperature hysteresis (base + 5)
 927                  * 1: fan off temperature (base + 0)
 928                  * 2: fan start temperature (base + 1)
 929                  * 3: fan max temperature (base + 2)
 930                  */
 931                 data->auto_temp[nr][0] =
 932                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 5));
 933
 934                 for (i = 0; i < 3 ; i++)
 935                         data->auto_temp[nr][i + 1] =
 936                                 it87_read_value(data,
 937                                                 IT87_REG_AUTO_TEMP(nr, i));
 938                 /*
 939                  * 0: start pwm value (base + 3)
 940                  * 1: pwm slope (base + 4, 1/8th pwm)
 941                  */
 942                 data->auto_pwm[nr][0] =
 943                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 3));
 944                 data->auto_pwm[nr][1] =
 945                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 4));
 946         }
 947 }
 948
 949 static struct it87_data *it87_update_device(struct device *dev)
 950 {
 951         struct it87_data *data = dev_get_drvdata(dev);
 952         int i;
 953
 954         mutex_lock(&data->update_lock);
 955
 956         if (time_after(jiffies, data->last_updated + HZ + HZ / 2) ||
 957             !data->valid) {
 958                 if (update_vbat) {
 959                         /*
 960                          * Cleared after each update, so reenable.  Value
 961                          * returned by this read will be previous value
 962                          */
 963                         it87_write_value(data, IT87_REG_CONFIG,
 964                                 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
 965                 }
 966                 for (i = 0; i < NUM_VIN; i++) {
 967                         if (!(data->has_in & BIT(i)))
 968                                 continue;
 969
 970                         data->in[i][0] =
 971                                 it87_read_value(data, IT87_REG_VIN[i]);
 972
 973                         /* VBAT and AVCC don't have limit registers */
 974                         if (i >= NUM_VIN_LIMIT)
 975                                 continue;
 976
 977                         data->in[i][1] =
 978                                 it87_read_value(data, IT87_REG_VIN_MIN(i));
 979                         data->in[i][2] =
 980                                 it87_read_value(data, IT87_REG_VIN_MAX(i));
 981                 }
 982
 983                 for (i = 0; i < NUM_FAN; i++) {
 984                         /* Skip disabled fans */
 985                         if (!(data->has_fan & BIT(i)))
 986                                 continue;
 987
 988                         data->fan[i][1] =
 989                                 it87_read_value(data, data->REG_FAN_MIN[i]);
 990                         data->fan[i][0] = it87_read_value(data,
 991                                        data->REG_FAN[i]);
 992                         /* Add high byte if in 16-bit mode */
 993                         if (has_16bit_fans(data)) {
 994                                 data->fan[i][0] |= it87_read_value(data,
 995                                                 data->REG_FANX[i]) << 8;
 996                                 data->fan[i][1] |= it87_read_value(data,
 997                                                 data->REG_FANX_MIN[i]) << 8;
 998                         }
 999                 }
1000                 for (i = 0; i < NUM_TEMP; i++) {
1001                         if (!(data->has_temp & BIT(i)))
1002                                 continue;
1003                         data->temp[i][0] =
1004                                 it87_read_value(data, IT87_REG_TEMP(i));
1005
1006                         if (i >= data->num_temp_limit)
1007                                 continue;
1008
1009                         if (has_temp_offset(data))
1010                                 data->temp[i][3] =
1011                                   it87_read_value(data,
1012                                                   data->REG_TEMP_OFFSET[i]);
1013
1014                         data->temp[i][1] =
1015                                 it87_read_value(data, data->REG_TEMP_LOW[i]);
1016                         data->temp[i][2] =
1017                                 it87_read_value(data, data->REG_TEMP_HIGH[i]);
1018                 }
1019
1020                 /* Newer chips don't have clock dividers */
1021                 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
1022                         i = it87_read_value(data, IT87_REG_FAN_DIV);
1023                         data->fan_div[0] = i & 0x07;
1024                         data->fan_div[1] = (i >> 3) & 0x07;
1025                         data->fan_div[2] = (i & 0x40) ? 3 : 1;
1026                 }
1027
1028                 data->alarms =
1029                         it87_read_value(data, IT87_REG_ALARM1) |
1030                         (it87_read_value(data, IT87_REG_ALARM2) << 8) |
1031                         (it87_read_value(data, IT87_REG_ALARM3) << 16);
1032                 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1033
1034                 data->fan_main_ctrl = it87_read_value(data,
1035                                 IT87_REG_FAN_MAIN_CTRL);
1036                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
1037                 for (i = 0; i < NUM_PWM; i++) {
1038                         if (!(data->has_pwm & BIT(i)))
1039                                 continue;
1040                         it87_update_pwm_ctrl(data, i);
1041                 }
1042
1043                 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1044                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1045                 /*
1046                  * The IT8705F does not have VID capability.
1047                  * The IT8718F and later don't use IT87_REG_VID for the
1048                  * same purpose.
1049                  */
1050                 if (data->type == it8712 || data->type == it8716) {
1051                         data->vid = it87_read_value(data, IT87_REG_VID);
1052                         /*
1053                          * The older IT8712F revisions had only 5 VID pins,
1054                          * but we assume it is always safe to read 6 bits.
1055                          */
1056                         data->vid &= 0x3f;
1057                 }
1058                 data->last_updated = jiffies;
1059                 data->valid = 1;
1060         }
1061
1062         mutex_unlock(&data->update_lock);
1063
1064         return data;
1065 }
1066
1067 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
1068                        char *buf)
1069 {
1070         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1071         struct it87_data *data = it87_update_device(dev);
1072         int index = sattr->index;
1073         int nr = sattr->nr;
1074
1075         return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
1076 }
1077
1078 static ssize_t set_in(struct device *dev, struct device_attribute *attr,
1079                       const char *buf, size_t count)
1080 {
1081         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1082         struct it87_data *data = dev_get_drvdata(dev);
1083         int index = sattr->index;
1084         int nr = sattr->nr;
1085         unsigned long val;
1086
1087         if (kstrtoul(buf, 10, &val) < 0)
1088                 return -EINVAL;
1089
1090         mutex_lock(&data->update_lock);
1091         data->in[nr][index] = in_to_reg(data, nr, val);
1092         it87_write_value(data,
1093                          index == 1 ? IT87_REG_VIN_MIN(nr)
1094                                     : IT87_REG_VIN_MAX(nr),
1095                          data->in[nr][index]);
1096         mutex_unlock(&data->update_lock);
1097         return count;
1098 }
1099
1100 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
1101 static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
1102                             0, 1);
1103 static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
1104                             0, 2);
1105
1106 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
1107 static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
1108                             1, 1);
1109 static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
1110                             1, 2);
1111
1112 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
1113 static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
1114                             2, 1);
1115 static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
1116                             2, 2);
1117
1118 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
1119 static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
1120                             3, 1);
1121 static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
1122                             3, 2);
1123
1124 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
1125 static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
1126                             4, 1);
1127 static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
1128                             4, 2);
1129
1130 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
1131 static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
1132                             5, 1);
1133 static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
1134                             5, 2);
1135
1136 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
1137 static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
1138                             6, 1);
1139 static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
1140                             6, 2);
1141
1142 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
1143 static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
1144                             7, 1);
1145 static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
1146                             7, 2);
1147
1148 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
1149 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0);
1150 static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in, NULL, 10, 0);
1151 static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in, NULL, 11, 0);
1152 static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in, NULL, 12, 0);
1153
1154 /* Up to 6 temperatures */
1155 static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
1156                          char *buf)
1157 {
1158         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1159         int nr = sattr->nr;
1160         int index = sattr->index;
1161         struct it87_data *data = it87_update_device(dev);
1162
1163         return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
1164 }
1165
1166 static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
1167                         const char *buf, size_t count)
1168 {
1169         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1170         int nr = sattr->nr;
1171         int index = sattr->index;
1172         struct it87_data *data = dev_get_drvdata(dev);
1173         long val;
1174         u8 reg, regval;
1175
1176         if (kstrtol(buf, 10, &val) < 0)
1177                 return -EINVAL;
1178
1179         mutex_lock(&data->update_lock);
1180
1181         switch (index) {
1182         default:
1183         case 1:
1184                 reg = data->REG_TEMP_LOW[nr];
1185                 break;
1186         case 2:
1187                 reg = data->REG_TEMP_HIGH[nr];
1188                 break;
1189         case 3:
1190                 regval = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1191                 if (!(regval & 0x80)) {
1192                         regval |= 0x80;
1193                         it87_write_value(data, IT87_REG_BEEP_ENABLE, regval);
1194                 }
1195                 data->valid = 0;
1196                 reg = data->REG_TEMP_OFFSET[nr];
1197                 break;
1198         }
1199
1200         data->temp[nr][index] = TEMP_TO_REG(val);
1201         it87_write_value(data, reg, data->temp[nr][index]);
1202         mutex_unlock(&data->update_lock);
1203         return count;
1204 }
1205
1206 static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
1207 static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1208                             0, 1);
1209 static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1210                             0, 2);
1211 static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
1212                             set_temp, 0, 3);
1213 static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
1214 static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1215                             1, 1);
1216 static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1217                             1, 2);
1218 static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
1219                             set_temp, 1, 3);
1220 static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
1221 static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1222                             2, 1);
1223 static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1224                             2, 2);
1225 static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
1226                             set_temp, 2, 3);
1227 static SENSOR_DEVICE_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0);
1228 static SENSOR_DEVICE_ATTR_2(temp4_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1229                             3, 1);
1230 static SENSOR_DEVICE_ATTR_2(temp4_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1231                             3, 2);
1232 static SENSOR_DEVICE_ATTR_2(temp4_offset, S_IRUGO | S_IWUSR, show_temp,
1233                             set_temp, 3, 3);
1234 static SENSOR_DEVICE_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0);
1235 static SENSOR_DEVICE_ATTR_2(temp5_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1236                             4, 1);
1237 static SENSOR_DEVICE_ATTR_2(temp5_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1238                             4, 2);
1239 static SENSOR_DEVICE_ATTR_2(temp5_offset, S_IRUGO | S_IWUSR, show_temp,
1240                             set_temp, 4, 3);
1241 static SENSOR_DEVICE_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0);
1242 static SENSOR_DEVICE_ATTR_2(temp6_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1243                             5, 1);
1244 static SENSOR_DEVICE_ATTR_2(temp6_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1245                             5, 2);
1246 static SENSOR_DEVICE_ATTR_2(temp6_offset, S_IRUGO | S_IWUSR, show_temp,
1247                             set_temp, 5, 3);
1248
1249 static int get_temp_type(struct it87_data *data, int index)
1250 {
1251         u8 reg, extra;
1252         int type = 0;
1253
1254         if (has_bank_sel(data)) {
1255                 int s1reg = IT87_REG_TEMP_SRC1[index/2] >> ((index % 2) * 4);
1256                 u8 src1, src2;
1257
1258                 src1 = (it87_read_value(data, s1reg) >> ((index % 2) * 4)) & 0x0f;
1259                 src2 = it87_read_value(data, IT87_REG_TEMP_SRC2);
1260
1261                 switch (data->type) {
1262                 case it8686:
1263                         switch (src1) {
1264                         case 0:
1265                                 if (index >= 3)
1266                                         return 4;
1267                                 break;
1268                         case 1:
1269                                 if (index == 1 || index == 2 ||
1270                                           index == 4 || index == 5)
1271                                         return 6;
1272                                 break;
1273                         case 2:
1274                                 if (index == 2 || index == 6)
1275                                         return 5;
1276                                 break;
1277                         default:
1278                                 break;
1279                         }
1280                         break;
1281                 case it8655:
1282                 case it8665:
1283                         if (src1 < 3) {
1284                                 index = src1;
1285                                 break;
1286                         }
1287                         switch(src1) {
1288                         case 3:
1289                                 type = (src2 & BIT(index)) ? 6 : 5;
1290                                 break;
1291                         case 4 ... 8:
1292                                 type = (src2 & BIT(index)) ? 4 : 6;
1293                                 break;
1294                         case 9:
1295                                 type = (src2 & BIT(index)) ? 5 : 0;
1296                                 break;
1297                         default:
1298                                 break;
1299                         }
1300                         return type;
1301                 default:
1302                         return 0;
1303                 }
1304         }
1305         if (index >= 3)
1306                 return 0;
1307
1308         reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1309         extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1310
1311         if ((has_temp_peci(data, index) && (reg >> 6 == index + 1)) ||
1312             (has_temp_old_peci(data, index) && (extra & 0x80)))
1313                 type = 6;               /* Intel PECI */
1314         if (reg & BIT(index))
1315                 type = 3;               /* thermal diode */
1316         else if (reg & BIT(index + 3))
1317                 type = 4;               /* thermistor */
1318
1319         return type;
1320 }
1321
1322 static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
1323                               char *buf)
1324 {
1325         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1326         struct it87_data *data = it87_update_device(dev);
1327         int type = get_temp_type(data, sensor_attr->index);
1328
1329         return sprintf(buf, "%d\n", type);
1330 }
1331
1332 static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
1333                              const char *buf, size_t count)
1334 {
1335         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1336         int nr = sensor_attr->index;
1337
1338         struct it87_data *data = dev_get_drvdata(dev);
1339         long val;
1340         u8 reg, extra;
1341
1342         if (kstrtol(buf, 10, &val) < 0)
1343                 return -EINVAL;
1344
1345         reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1346         reg &= ~(1 << nr);
1347         reg &= ~(8 << nr);
1348         if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6))
1349                 reg &= 0x3f;
1350         extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1351         if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6))
1352                 extra &= 0x7f;
1353         if (val == 2) { /* backwards compatibility */
1354                 dev_warn(dev,
1355                          "Sensor type 2 is deprecated, please use 4 instead\n");
1356                 val = 4;
1357         }
1358         /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */
1359         if (val == 3)
1360                 reg |= 1 << nr;
1361         else if (val == 4)
1362                 reg |= 8 << nr;
1363         else if (has_temp_peci(data, nr) && val == 6)
1364                 reg |= (nr + 1) << 6;
1365         else if (has_temp_old_peci(data, nr) && val == 6)
1366                 extra |= 0x80;
1367         else if (val != 0)
1368                 return -EINVAL;
1369
1370         mutex_lock(&data->update_lock);
1371         data->sensor = reg;
1372         data->extra = extra;
1373         it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
1374         if (has_temp_old_peci(data, nr))
1375                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1376         data->valid = 0;        /* Force cache refresh */
1377         mutex_unlock(&data->update_lock);
1378         return count;
1379 }
1380
1381 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1382                           set_temp_type, 0);
1383 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1384                           set_temp_type, 1);
1385 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1386                           set_temp_type, 2);
1387 static SENSOR_DEVICE_ATTR(temp4_type, S_IRUGO | S_IWUSR, show_temp_type,
1388                           set_temp_type, 3);
1389 static SENSOR_DEVICE_ATTR(temp5_type, S_IRUGO | S_IWUSR, show_temp_type,
1390                           set_temp_type, 4);
1391 static SENSOR_DEVICE_ATTR(temp6_type, S_IRUGO | S_IWUSR, show_temp_type,
1392                           set_temp_type, 5);
1393
1394 /* 6 Fans */
1395
1396 static int pwm_mode(const struct it87_data *data, int nr)
1397 {
1398         if (has_fanctl_onoff(data) && nr < 3 &&
1399             !(data->fan_main_ctrl & BIT(nr)))
1400                 return 0;                               /* Full speed */
1401         if (data->pwm_ctrl[nr] & 0x80)
1402                 return 2;                               /* Automatic mode */
1403         if ((!has_fanctl_onoff(data) || nr >= 3) &&
1404             data->pwm_duty[nr] == pwm_to_reg(data, 0xff))
1405                 return 0;                       /* Full speed */
1406
1407         return 1;                               /* Manual mode */
1408 }
1409
1410 static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
1411                         char *buf)
1412 {
1413         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1414         int nr = sattr->nr;
1415         int index = sattr->index;
1416         int speed;
1417         struct it87_data *data = it87_update_device(dev);
1418
1419         speed = has_16bit_fans(data) ?
1420                 FAN16_FROM_REG(data->fan[nr][index]) :
1421                 FAN_FROM_REG(data->fan[nr][index],
1422                              DIV_FROM_REG(data->fan_div[nr]));
1423         return sprintf(buf, "%d\n", speed);
1424 }
1425
1426 static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
1427                             char *buf)
1428 {
1429         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1430         struct it87_data *data = it87_update_device(dev);
1431         int nr = sensor_attr->index;
1432
1433         return sprintf(buf, "%lu\n", DIV_FROM_REG(data->fan_div[nr]));
1434 }
1435
1436 static ssize_t show_pwm_enable(struct device *dev,
1437                                struct device_attribute *attr, char *buf)
1438 {
1439         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1440         struct it87_data *data = it87_update_device(dev);
1441         int nr = sensor_attr->index;
1442
1443         return sprintf(buf, "%d\n", pwm_mode(data, nr));
1444 }
1445
1446 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
1447                         char *buf)
1448 {
1449         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1450         struct it87_data *data = it87_update_device(dev);
1451         int nr = sensor_attr->index;
1452
1453         return sprintf(buf, "%d\n",
1454                        pwm_from_reg(data, data->pwm_duty[nr]));
1455 }
1456
1457 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
1458                              char *buf)
1459 {
1460         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1461         struct it87_data *data = it87_update_device(dev);
1462         int nr = sensor_attr->index;
1463         unsigned int freq;
1464         int index;
1465
1466         if (has_pwm_freq2(data) && nr == 1)
1467                 index = (data->extra >> 4) & 0x07;
1468         else
1469                 index = (data->fan_ctl >> 4) & 0x07;
1470
1471         freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128);
1472
1473         return sprintf(buf, "%u\n", freq);
1474 }
1475
1476 static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
1477                        const char *buf, size_t count)
1478 {
1479         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1480         int nr = sattr->nr;
1481         int index = sattr->index;
1482
1483         struct it87_data *data = dev_get_drvdata(dev);
1484         long val;
1485         u8 reg;
1486
1487         if (kstrtol(buf, 10, &val) < 0)
1488                 return -EINVAL;
1489
1490         mutex_lock(&data->update_lock);
1491
1492         if (has_16bit_fans(data)) {
1493                 data->fan[nr][index] = FAN16_TO_REG(val);
1494                 it87_write_value(data, data->REG_FAN_MIN[nr],
1495                                  data->fan[nr][index] & 0xff);
1496                 it87_write_value(data, data->REG_FANX_MIN[nr],
1497                                  data->fan[nr][index] >> 8);
1498         } else {
1499                 reg = it87_read_value(data, IT87_REG_FAN_DIV);
1500                 switch (nr) {
1501                 case 0:
1502                         data->fan_div[nr] = reg & 0x07;
1503                         break;
1504                 case 1:
1505                         data->fan_div[nr] = (reg >> 3) & 0x07;
1506                         break;
1507                 case 2:
1508                         data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
1509                         break;
1510                 }
1511                 data->fan[nr][index] =
1512                   FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
1513                 it87_write_value(data, data->REG_FAN_MIN[nr],
1514                                  data->fan[nr][index]);
1515         }
1516
1517         mutex_unlock(&data->update_lock);
1518         return count;
1519 }
1520
1521 static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
1522                            const char *buf, size_t count)
1523 {
1524         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1525         struct it87_data *data = dev_get_drvdata(dev);
1526         int nr = sensor_attr->index;
1527         unsigned long val;
1528         int min;
1529         u8 old;
1530
1531         if (kstrtoul(buf, 10, &val) < 0)
1532                 return -EINVAL;
1533
1534         mutex_lock(&data->update_lock);
1535         old = it87_read_value(data, IT87_REG_FAN_DIV);
1536
1537         /* Save fan min limit */
1538         min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
1539
1540         switch (nr) {
1541         case 0:
1542         case 1:
1543                 data->fan_div[nr] = DIV_TO_REG(val);
1544                 break;
1545         case 2:
1546                 if (val < 8)
1547                         data->fan_div[nr] = 1;
1548                 else
1549                         data->fan_div[nr] = 3;
1550         }
1551         val = old & 0x80;
1552         val |= (data->fan_div[0] & 0x07);
1553         val |= (data->fan_div[1] & 0x07) << 3;
1554         if (data->fan_div[2] == 3)
1555                 val |= 0x1 << 6;
1556         it87_write_value(data, IT87_REG_FAN_DIV, val);
1557
1558         /* Restore fan min limit */
1559         data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
1560         it87_write_value(data, data->REG_FAN_MIN[nr], data->fan[nr][1]);
1561
1562         mutex_unlock(&data->update_lock);
1563         return count;
1564 }
1565
1566 /* Returns 0 if OK, -EINVAL otherwise */
1567 static int check_trip_points(struct device *dev, int nr)
1568 {
1569         const struct it87_data *data = dev_get_drvdata(dev);
1570         int i, err = 0;
1571
1572         if (has_old_autopwm(data)) {
1573                 for (i = 0; i < 3; i++) {
1574                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1575                                 err = -EINVAL;
1576                 }
1577                 for (i = 0; i < 2; i++) {
1578                         if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1579                                 err = -EINVAL;
1580                 }
1581         } else if (has_newer_autopwm(data)) {
1582                 for (i = 1; i < 3; i++) {
1583                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1584                                 err = -EINVAL;
1585                 }
1586         }
1587
1588         if (err) {
1589                 dev_err(dev,
1590                         "Inconsistent trip points, not switching to automatic mode\n");
1591                 dev_err(dev, "Adjust the trip points and try again\n");
1592         }
1593         return err;
1594 }
1595
1596 static ssize_t set_pwm_enable(struct device *dev, struct device_attribute *attr,
1597                               const char *buf, size_t count)
1598 {
1599         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1600         struct it87_data *data = dev_get_drvdata(dev);
1601         int nr = sensor_attr->index;
1602         long val;
1603
1604         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
1605                 return -EINVAL;
1606
1607         /* Check trip points before switching to automatic mode */
1608         if (val == 2) {
1609                 if (check_trip_points(dev, nr) < 0)
1610                         return -EINVAL;
1611         }
1612
1613         mutex_lock(&data->update_lock);
1614
1615         if (val == 0) {
1616                 if (nr < 3 && has_fanctl_onoff(data)) {
1617                         int tmp;
1618                         /* make sure the fan is on when in on/off mode */
1619                         tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1620                         it87_write_value(data, IT87_REG_FAN_CTL, tmp | BIT(nr));
1621                         /* set on/off mode */
1622                         data->fan_main_ctrl &= ~BIT(nr);
1623                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1624                                          data->fan_main_ctrl);
1625                 } else {
1626                         u8 ctrl;
1627
1628                         /* No on/off mode, set maximum pwm value */
1629                         data->pwm_duty[nr] = pwm_to_reg(data, 0xff);
1630                         it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1631                                          data->pwm_duty[nr]);
1632                         /* and set manual mode */
1633                         if (has_newer_autopwm(data)) {
1634                                 ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1635                                         data->pwm_temp_map[nr];
1636                         } else {
1637                                 ctrl = data->pwm_duty[nr];
1638                         }
1639                         data->pwm_ctrl[nr] = ctrl;
1640                         it87_write_value(data, data->REG_PWM[nr], ctrl);
1641                 }
1642         } else {
1643                 u8 ctrl;
1644
1645                 if (has_newer_autopwm(data)) {
1646                         ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1647                                 data->pwm_temp_map[nr];
1648                         if (val != 1)
1649                                 ctrl |= 0x80;
1650                 } else {
1651                         ctrl = (val == 1 ? data->pwm_duty[nr] : 0x80);
1652                 }
1653                 data->pwm_ctrl[nr] = ctrl;
1654                 it87_write_value(data, data->REG_PWM[nr], ctrl);
1655
1656                 if (has_fanctl_onoff(data) && nr < 3) {
1657                         /* set SmartGuardian mode */
1658                         data->fan_main_ctrl |= BIT(nr);
1659                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1660                                          data->fan_main_ctrl);
1661                 }
1662         }
1663
1664         mutex_unlock(&data->update_lock);
1665         return count;
1666 }
1667
1668 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1669                        const char *buf, size_t count)
1670 {
1671         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1672         struct it87_data *data = dev_get_drvdata(dev);
1673         int nr = sensor_attr->index;
1674         long val;
1675
1676         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1677                 return -EINVAL;
1678
1679         mutex_lock(&data->update_lock);
1680         it87_update_pwm_ctrl(data, nr);
1681         if (has_newer_autopwm(data)) {
1682                 /*
1683                  * If we are in automatic mode, the PWM duty cycle register
1684                  * is read-only so we can't write the value.
1685                  */
1686                 if (data->pwm_ctrl[nr] & 0x80) {
1687                         mutex_unlock(&data->update_lock);
1688                         return -EBUSY;
1689                 }
1690                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1691                 it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1692                                  data->pwm_duty[nr]);
1693         } else {
1694                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1695                 /*
1696                  * If we are in manual mode, write the duty cycle immediately;
1697                  * otherwise, just store it for later use.
1698                  */
1699                 if (!(data->pwm_ctrl[nr] & 0x80)) {
1700                         data->pwm_ctrl[nr] = data->pwm_duty[nr];
1701                         it87_write_value(data, data->REG_PWM[nr],
1702                                          data->pwm_ctrl[nr]);
1703                 }
1704         }
1705         mutex_unlock(&data->update_lock);
1706         return count;
1707 }
1708
1709 static ssize_t set_pwm_freq(struct device *dev, struct device_attribute *attr,
1710                             const char *buf, size_t count)
1711 {
1712         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1713         struct it87_data *data = dev_get_drvdata(dev);
1714         int nr = sensor_attr->index;
1715         unsigned long val;
1716         int i;
1717
1718         if (kstrtoul(buf, 10, &val) < 0)
1719                 return -EINVAL;
1720
1721         val = clamp_val(val, 0, 1000000);
1722         val *= has_newer_autopwm(data) ? 256 : 128;
1723
1724         /* Search for the nearest available frequency */
1725         for (i = 0; i < 7; i++) {
1726                 if (val > (pwm_freq[i] + pwm_freq[i + 1]) / 2)
1727                         break;
1728         }
1729
1730         mutex_lock(&data->update_lock);
1731         if (nr == 0) {
1732                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
1733                 data->fan_ctl |= i << 4;
1734                 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
1735         } else {
1736                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x8f;
1737                 data->extra |= i << 4;
1738                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1739         }
1740         mutex_unlock(&data->update_lock);
1741
1742         return count;
1743 }
1744
1745 static ssize_t show_pwm_temp_map(struct device *dev,
1746                                  struct device_attribute *attr, char *buf)
1747 {
1748         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1749         struct it87_data *data = it87_update_device(dev);
1750         int nr = sensor_attr->index;
1751         int map;
1752
1753         map = data->pwm_temp_map[nr];
1754         if (map >= 3)
1755                 map = 0;        /* Should never happen */
1756         if (nr >= 3)            /* pwm channels 3..6 map to temp4..6 */
1757                 map += 3;
1758
1759         return sprintf(buf, "%d\n", (int)BIT(map));
1760 }
1761
1762 static ssize_t set_pwm_temp_map(struct device *dev,
1763                                 struct device_attribute *attr, const char *buf,
1764                                 size_t count)
1765 {
1766         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1767         struct it87_data *data = dev_get_drvdata(dev);
1768         int nr = sensor_attr->index;
1769         long val;
1770         u8 reg;
1771
1772         if (kstrtol(buf, 10, &val) < 0)
1773                 return -EINVAL;
1774
1775         if (nr >= 3)
1776                 val -= 3;
1777
1778         switch (val) {
1779         case BIT(0):
1780                 reg = 0x00;
1781                 break;
1782         case BIT(1):
1783                 reg = 0x01;
1784                 break;
1785         case BIT(2):
1786                 reg = 0x02;
1787                 break;
1788         default:
1789                 return -EINVAL;
1790         }
1791
1792         mutex_lock(&data->update_lock);
1793         it87_update_pwm_ctrl(data, nr);
1794         data->pwm_temp_map[nr] = reg;
1795         /*
1796          * If we are in automatic mode, write the temp mapping immediately;
1797          * otherwise, just store it for later use.
1798          */
1799         if (data->pwm_ctrl[nr] & 0x80) {
1800                 data->pwm_ctrl[nr] = (data->pwm_ctrl[nr] & 0xfc) |
1801                                                 data->pwm_temp_map[nr];
1802                 it87_write_value(data, data->REG_PWM[nr], data->pwm_ctrl[nr]);
1803         }
1804         mutex_unlock(&data->update_lock);
1805         return count;
1806 }
1807
1808 static ssize_t show_auto_pwm(struct device *dev, struct device_attribute *attr,
1809                              char *buf)
1810 {
1811         struct it87_data *data = it87_update_device(dev);
1812         struct sensor_device_attribute_2 *sensor_attr =
1813                         to_sensor_dev_attr_2(attr);
1814         int nr = sensor_attr->nr;
1815         int point = sensor_attr->index;
1816
1817         return sprintf(buf, "%d\n",
1818                        pwm_from_reg(data, data->auto_pwm[nr][point]));
1819 }
1820
1821 static ssize_t set_auto_pwm(struct device *dev, struct device_attribute *attr,
1822                             const char *buf, size_t count)
1823 {
1824         struct it87_data *data = dev_get_drvdata(dev);
1825         struct sensor_device_attribute_2 *sensor_attr =
1826                         to_sensor_dev_attr_2(attr);
1827         int nr = sensor_attr->nr;
1828         int point = sensor_attr->index;
1829         int regaddr;
1830         long val;
1831
1832         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1833                 return -EINVAL;
1834
1835         mutex_lock(&data->update_lock);
1836         data->auto_pwm[nr][point] = pwm_to_reg(data, val);
1837         if (has_newer_autopwm(data))
1838                 regaddr = IT87_REG_AUTO_TEMP(nr, 3);
1839         else
1840                 regaddr = IT87_REG_AUTO_PWM(nr, point);
1841         it87_write_value(data, regaddr, data->auto_pwm[nr][point]);
1842         mutex_unlock(&data->update_lock);
1843         return count;
1844 }
1845
1846 static ssize_t show_auto_pwm_slope(struct device *dev,
1847                                    struct device_attribute *attr, char *buf)
1848 {
1849         struct it87_data *data = it87_update_device(dev);
1850         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1851         int nr = sensor_attr->index;
1852
1853         return sprintf(buf, "%d\n", data->auto_pwm[nr][1] & 0x7f);
1854 }
1855
1856 static ssize_t set_auto_pwm_slope(struct device *dev,
1857                                   struct device_attribute *attr,
1858                                   const char *buf, size_t count)
1859 {
1860         struct it87_data *data = dev_get_drvdata(dev);
1861         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1862         int nr = sensor_attr->index;
1863         unsigned long val;
1864
1865         if (kstrtoul(buf, 10, &val) < 0 || val > 127)
1866                 return -EINVAL;
1867
1868         mutex_lock(&data->update_lock);
1869         data->auto_pwm[nr][1] = (data->auto_pwm[nr][1] & 0x80) | val;
1870         it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 4),
1871                          data->auto_pwm[nr][1]);
1872         mutex_unlock(&data->update_lock);
1873         return count;
1874 }
1875
1876 static ssize_t show_auto_temp(struct device *dev, struct device_attribute *attr,
1877                               char *buf)
1878 {
1879         struct it87_data *data = it87_update_device(dev);
1880         struct sensor_device_attribute_2 *sensor_attr =
1881                         to_sensor_dev_attr_2(attr);
1882         int nr = sensor_attr->nr;
1883         int point = sensor_attr->index;
1884         int reg;
1885
1886         if (has_old_autopwm(data) || point)
1887                 reg = data->auto_temp[nr][point];
1888         else
1889                 reg = data->auto_temp[nr][1] - (data->auto_temp[nr][0] & 0x1f);
1890
1891         return sprintf(buf, "%d\n", TEMP_FROM_REG(reg));
1892 }
1893
1894 static ssize_t set_auto_temp(struct device *dev, struct device_attribute *attr,
1895                              const char *buf, size_t count)
1896 {
1897         struct it87_data *data = dev_get_drvdata(dev);
1898         struct sensor_device_attribute_2 *sensor_attr =
1899                         to_sensor_dev_attr_2(attr);
1900         int nr = sensor_attr->nr;
1901         int point = sensor_attr->index;
1902         long val;
1903         int reg;
1904
1905         if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
1906                 return -EINVAL;
1907
1908         mutex_lock(&data->update_lock);
1909         if (has_newer_autopwm(data) && !point) {
1910                 reg = data->auto_temp[nr][1] - TEMP_TO_REG(val);
1911                 reg = clamp_val(reg, 0, 0x1f) | (data->auto_temp[nr][0] & 0xe0);
1912                 data->auto_temp[nr][0] = reg;
1913                 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 5), reg);
1914         } else {
1915                 reg = TEMP_TO_REG(val);
1916                 data->auto_temp[nr][point] = reg;
1917                 if (has_newer_autopwm(data))
1918                         point--;
1919                 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point), reg);
1920         }
1921         mutex_unlock(&data->update_lock);
1922         return count;
1923 }
1924
1925 static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
1926 static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1927                             0, 1);
1928 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
1929                           set_fan_div, 0);
1930
1931 static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
1932 static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1933                             1, 1);
1934 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
1935                           set_fan_div, 1);
1936
1937 static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
1938 static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1939                             2, 1);
1940 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
1941                           set_fan_div, 2);
1942
1943 static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
1944 static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1945                             3, 1);
1946
1947 static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
1948 static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1949                             4, 1);
1950
1951 static SENSOR_DEVICE_ATTR_2(fan6_input, S_IRUGO, show_fan, NULL, 5, 0);
1952 static SENSOR_DEVICE_ATTR_2(fan6_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1953                             5, 1);
1954
1955 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
1956                           show_pwm_enable, set_pwm_enable, 0);
1957 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0);
1958 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq,
1959                           set_pwm_freq, 0);
1960 static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO,
1961                           show_pwm_temp_map, set_pwm_temp_map, 0);
1962 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR,
1963                             show_auto_pwm, set_auto_pwm, 0, 0);
1964 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR,
1965                             show_auto_pwm, set_auto_pwm, 0, 1);
1966 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR,
1967                             show_auto_pwm, set_auto_pwm, 0, 2);
1968 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO,
1969                             show_auto_pwm, NULL, 0, 3);
1970 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
1971                             show_auto_temp, set_auto_temp, 0, 1);
1972 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1973                             show_auto_temp, set_auto_temp, 0, 0);
1974 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
1975                             show_auto_temp, set_auto_temp, 0, 2);
1976 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
1977                             show_auto_temp, set_auto_temp, 0, 3);
1978 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR,
1979                             show_auto_temp, set_auto_temp, 0, 4);
1980 static SENSOR_DEVICE_ATTR_2(pwm1_auto_start, S_IRUGO | S_IWUSR,
1981                             show_auto_pwm, set_auto_pwm, 0, 0);
1982 static SENSOR_DEVICE_ATTR(pwm1_auto_slope, S_IRUGO | S_IWUSR,
1983                           show_auto_pwm_slope, set_auto_pwm_slope, 0);
1984
1985 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
1986                           show_pwm_enable, set_pwm_enable, 1);
1987 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1);
1988 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, set_pwm_freq, 1);
1989 static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO,
1990                           show_pwm_temp_map, set_pwm_temp_map, 1);
1991 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR,
1992                             show_auto_pwm, set_auto_pwm, 1, 0);
1993 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR,
1994                             show_auto_pwm, set_auto_pwm, 1, 1);
1995 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR,
1996                             show_auto_pwm, set_auto_pwm, 1, 2);
1997 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO,
1998                             show_auto_pwm, NULL, 1, 3);
1999 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
2000                             show_auto_temp, set_auto_temp, 1, 1);
2001 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2002                             show_auto_temp, set_auto_temp, 1, 0);
2003 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
2004                             show_auto_temp, set_auto_temp, 1, 2);
2005 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
2006                             show_auto_temp, set_auto_temp, 1, 3);
2007 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR,
2008                             show_auto_temp, set_auto_temp, 1, 4);
2009 static SENSOR_DEVICE_ATTR_2(pwm2_auto_start, S_IRUGO | S_IWUSR,
2010                             show_auto_pwm, set_auto_pwm, 1, 0);
2011 static SENSOR_DEVICE_ATTR(pwm2_auto_slope, S_IRUGO | S_IWUSR,
2012                           show_auto_pwm_slope, set_auto_pwm_slope, 1);
2013
2014 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
2015                           show_pwm_enable, set_pwm_enable, 2);
2016 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2);
2017 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL, 2);
2018 static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO,
2019                           show_pwm_temp_map, set_pwm_temp_map, 2);
2020 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR,
2021                             show_auto_pwm, set_auto_pwm, 2, 0);
2022 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR,
2023                             show_auto_pwm, set_auto_pwm, 2, 1);
2024 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR,
2025                             show_auto_pwm, set_auto_pwm, 2, 2);
2026 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO,
2027                             show_auto_pwm, NULL, 2, 3);
2028 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
2029                             show_auto_temp, set_auto_temp, 2, 1);
2030 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2031                             show_auto_temp, set_auto_temp, 2, 0);
2032 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
2033                             show_auto_temp, set_auto_temp, 2, 2);
2034 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
2035                             show_auto_temp, set_auto_temp, 2, 3);
2036 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR,
2037                             show_auto_temp, set_auto_temp, 2, 4);
2038 static SENSOR_DEVICE_ATTR_2(pwm3_auto_start, S_IRUGO | S_IWUSR,
2039                             show_auto_pwm, set_auto_pwm, 2, 0);
2040 static SENSOR_DEVICE_ATTR(pwm3_auto_slope, S_IRUGO | S_IWUSR,
2041                           show_auto_pwm_slope, set_auto_pwm_slope, 2);
2042
2043 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IRUGO | S_IWUSR,
2044                           show_pwm_enable, set_pwm_enable, 3);
2045 static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 3);
2046 static SENSOR_DEVICE_ATTR(pwm4_freq, S_IRUGO, show_pwm_freq, NULL, 3);
2047 static SENSOR_DEVICE_ATTR(pwm4_auto_channels_temp, S_IRUGO,
2048                           show_pwm_temp_map, set_pwm_temp_map, 3);
2049 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp, S_IRUGO | S_IWUSR,
2050                             show_auto_temp, set_auto_temp, 2, 1);
2051 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2052                             show_auto_temp, set_auto_temp, 2, 0);
2053 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point2_temp, S_IRUGO | S_IWUSR,
2054                             show_auto_temp, set_auto_temp, 2, 2);
2055 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point3_temp, S_IRUGO | S_IWUSR,
2056                             show_auto_temp, set_auto_temp, 2, 3);
2057 static SENSOR_DEVICE_ATTR_2(pwm4_auto_start, S_IRUGO | S_IWUSR,
2058                             show_auto_pwm, set_auto_pwm, 3, 0);
2059 static SENSOR_DEVICE_ATTR(pwm4_auto_slope, S_IRUGO | S_IWUSR,
2060                           show_auto_pwm_slope, set_auto_pwm_slope, 3);
2061
2062 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IRUGO | S_IWUSR,
2063                           show_pwm_enable, set_pwm_enable, 4);
2064 static SENSOR_DEVICE_ATTR(pwm5, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 4);
2065 static SENSOR_DEVICE_ATTR(pwm5_freq, S_IRUGO, show_pwm_freq, NULL, 4);
2066 static SENSOR_DEVICE_ATTR(pwm5_auto_channels_temp, S_IRUGO,
2067                           show_pwm_temp_map, set_pwm_temp_map, 4);
2068 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp, S_IRUGO | S_IWUSR,
2069                             show_auto_temp, set_auto_temp, 2, 1);
2070 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2071                             show_auto_temp, set_auto_temp, 2, 0);
2072 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point2_temp, S_IRUGO | S_IWUSR,
2073                             show_auto_temp, set_auto_temp, 2, 2);
2074 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point3_temp, S_IRUGO | S_IWUSR,
2075                             show_auto_temp, set_auto_temp, 2, 3);
2076 static SENSOR_DEVICE_ATTR_2(pwm5_auto_start, S_IRUGO | S_IWUSR,
2077                             show_auto_pwm, set_auto_pwm, 4, 0);
2078 static SENSOR_DEVICE_ATTR(pwm5_auto_slope, S_IRUGO | S_IWUSR,
2079                           show_auto_pwm_slope, set_auto_pwm_slope, 4);
2080
2081 static SENSOR_DEVICE_ATTR(pwm6_enable, S_IRUGO | S_IWUSR,
2082                           show_pwm_enable, set_pwm_enable, 5);
2083 static SENSOR_DEVICE_ATTR(pwm6, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 5);
2084 static SENSOR_DEVICE_ATTR(pwm6_freq, S_IRUGO, show_pwm_freq, NULL, 5);
2085 static SENSOR_DEVICE_ATTR(pwm6_auto_channels_temp, S_IRUGO,
2086                           show_pwm_temp_map, set_pwm_temp_map, 5);
2087 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp, S_IRUGO | S_IWUSR,
2088                             show_auto_temp, set_auto_temp, 2, 1);
2089 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2090                             show_auto_temp, set_auto_temp, 2, 0);
2091 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point2_temp, S_IRUGO | S_IWUSR,
2092                             show_auto_temp, set_auto_temp, 2, 2);
2093 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point3_temp, S_IRUGO | S_IWUSR,
2094                             show_auto_temp, set_auto_temp, 2, 3);
2095 static SENSOR_DEVICE_ATTR_2(pwm6_auto_start, S_IRUGO | S_IWUSR,
2096                             show_auto_pwm, set_auto_pwm, 5, 0);
2097 static SENSOR_DEVICE_ATTR(pwm6_auto_slope, S_IRUGO | S_IWUSR,
2098                           show_auto_pwm_slope, set_auto_pwm_slope, 5);
2099
2100 /* Alarms */
2101 static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
2102                            char *buf)
2103 {
2104         struct it87_data *data = it87_update_device(dev);
2105
2106         return sprintf(buf, "%u\n", data->alarms);
2107 }
2108 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
2109
2110 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
2111                           char *buf)
2112 {
2113         struct it87_data *data = it87_update_device(dev);
2114         int bitnr = to_sensor_dev_attr(attr)->index;
2115
2116         return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
2117 }
2118
2119 static ssize_t clear_intrusion(struct device *dev,
2120                                struct device_attribute *attr, const char *buf,
2121                                size_t count)
2122 {
2123         struct it87_data *data = dev_get_drvdata(dev);
2124         int config;
2125         long val;
2126
2127         if (kstrtol(buf, 10, &val) < 0 || val != 0)
2128                 return -EINVAL;
2129
2130         mutex_lock(&data->update_lock);
2131         config = it87_read_value(data, IT87_REG_CONFIG);
2132         if (config < 0) {
2133                 count = config;
2134         } else {
2135                 config |= BIT(5);
2136                 it87_write_value(data, IT87_REG_CONFIG, config);
2137                 /* Invalidate cache to force re-read */
2138                 data->valid = 0;
2139         }
2140         mutex_unlock(&data->update_lock);
2141
2142         return count;
2143 }
2144
2145 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
2146 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
2147 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
2148 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
2149 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
2150 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
2151 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
2152 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
2153 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
2154 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
2155 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
2156 static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
2157 static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
2158 static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 7);
2159 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
2160 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
2161 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
2162 static SENSOR_DEVICE_ATTR(temp4_alarm, S_IRUGO, show_alarm, NULL, 19);
2163 static SENSOR_DEVICE_ATTR(temp5_alarm, S_IRUGO, show_alarm, NULL, 20);
2164 static SENSOR_DEVICE_ATTR(temp6_alarm, S_IRUGO, show_alarm, NULL, 21);
2165 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
2166                           show_alarm, clear_intrusion, 4);
2167
2168 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
2169                          char *buf)
2170 {
2171         struct it87_data *data = it87_update_device(dev);
2172         int bitnr = to_sensor_dev_attr(attr)->index;
2173
2174         return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
2175 }
2176
2177 static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
2178                         const char *buf, size_t count)
2179 {
2180         int bitnr = to_sensor_dev_attr(attr)->index;
2181         struct it87_data *data = dev_get_drvdata(dev);
2182         long val;
2183
2184         if (kstrtol(buf, 10, &val) < 0 || (val != 0 && val != 1))
2185                 return -EINVAL;
2186
2187         mutex_lock(&data->update_lock);
2188         data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
2189         if (val)
2190                 data->beeps |= BIT(bitnr);
2191         else
2192                 data->beeps &= ~BIT(bitnr);
2193         it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
2194         mutex_unlock(&data->update_lock);
2195         return count;
2196 }
2197
2198 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
2199                           show_beep, set_beep, 1);
2200 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
2201 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
2202 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
2203 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
2204 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
2205 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
2206 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
2207 /* fanX_beep writability is set later */
2208 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
2209 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
2210 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
2211 static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
2212 static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
2213 static SENSOR_DEVICE_ATTR(fan6_beep, S_IRUGO, show_beep, set_beep, 0);
2214 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
2215                           show_beep, set_beep, 2);
2216 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
2217 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
2218 static SENSOR_DEVICE_ATTR(temp4_beep, S_IRUGO, show_beep, NULL, 2);
2219 static SENSOR_DEVICE_ATTR(temp5_beep, S_IRUGO, show_beep, NULL, 2);
2220 static SENSOR_DEVICE_ATTR(temp6_beep, S_IRUGO, show_beep, NULL, 2);
2221
2222 static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
2223                             char *buf)
2224 {
2225         struct it87_data *data = dev_get_drvdata(dev);
2226
2227         return sprintf(buf, "%u\n", data->vrm);
2228 }
2229
2230 static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
2231                              const char *buf, size_t count)
2232 {
2233         struct it87_data *data = dev_get_drvdata(dev);
2234         unsigned long val;
2235
2236         if (kstrtoul(buf, 10, &val) < 0)
2237                 return -EINVAL;
2238
2239         data->vrm = val;
2240
2241         return count;
2242 }
2243 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
2244
2245 static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
2246                             char *buf)
2247 {
2248         struct it87_data *data = it87_update_device(dev);
2249
2250         return sprintf(buf, "%ld\n", (long)vid_from_reg(data->vid, data->vrm));
2251 }
2252 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
2253
2254 static ssize_t show_label(struct device *dev, struct device_attribute *attr,
2255                           char *buf)
2256 {
2257         static const char * const labels[] = {
2258                 "+5V",
2259                 "5VSB",
2260                 "Vbat",
2261                 "AVCC",
2262         };
2263         static const char * const labels_it8721[] = {
2264                 "+3.3V",
2265                 "3VSB",
2266                 "Vbat",
2267                 "+3.3V",
2268         };
2269         struct it87_data *data = dev_get_drvdata(dev);
2270         int nr = to_sensor_dev_attr(attr)->index;
2271         const char *label;
2272
2273         if (has_vin3_5v(data) && nr == 0)
2274                 label = labels[0];
2275         else if (has_12mv_adc(data) || has_10_9mv_adc(data) ||
2276                  has_11mv_adc(data))
2277                 label = labels_it8721[nr];
2278         else
2279                 label = labels[nr];
2280
2281         return sprintf(buf, "%s\n", label);
2282 }
2283 static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
2284 static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
2285 static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
2286 /* AVCC3 */
2287 static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 3);
2288
2289 static umode_t it87_in_is_visible(struct kobject *kobj,
2290                                   struct attribute *attr, int index)
2291 {
2292         struct device *dev = container_of(kobj, struct device, kobj);
2293         struct it87_data *data = dev_get_drvdata(dev);
2294         int i = index / 5;      /* voltage index */
2295         int a = index % 5;      /* attribute index */
2296
2297         if (index >= 40) {      /* in8 and higher only have input attributes */
2298                 i = index - 40 + 8;
2299                 a = 0;
2300         }
2301
2302         if (!(data->has_in & BIT(i)))
2303                 return 0;
2304
2305         if (a == 4 && !data->has_beep)
2306                 return 0;
2307
2308         return attr->mode;
2309 }
2310
2311 static struct attribute *it87_attributes_in[] = {
2312         &sensor_dev_attr_in0_input.dev_attr.attr,
2313         &sensor_dev_attr_in0_min.dev_attr.attr,
2314         &sensor_dev_attr_in0_max.dev_attr.attr,
2315         &sensor_dev_attr_in0_alarm.dev_attr.attr,
2316         &sensor_dev_attr_in0_beep.dev_attr.attr,        /* 4 */
2317
2318         &sensor_dev_attr_in1_input.dev_attr.attr,
2319         &sensor_dev_attr_in1_min.dev_attr.attr,
2320         &sensor_dev_attr_in1_max.dev_attr.attr,
2321         &sensor_dev_attr_in1_alarm.dev_attr.attr,
2322         &sensor_dev_attr_in1_beep.dev_attr.attr,        /* 9 */
2323
2324         &sensor_dev_attr_in2_input.dev_attr.attr,
2325         &sensor_dev_attr_in2_min.dev_attr.attr,
2326         &sensor_dev_attr_in2_max.dev_attr.attr,
2327         &sensor_dev_attr_in2_alarm.dev_attr.attr,
2328         &sensor_dev_attr_in2_beep.dev_attr.attr,        /* 14 */
2329
2330         &sensor_dev_attr_in3_input.dev_attr.attr,
2331         &sensor_dev_attr_in3_min.dev_attr.attr,
2332         &sensor_dev_attr_in3_max.dev_attr.attr,
2333         &sensor_dev_attr_in3_alarm.dev_attr.attr,
2334         &sensor_dev_attr_in3_beep.dev_attr.attr,        /* 19 */
2335
2336         &sensor_dev_attr_in4_input.dev_attr.attr,
2337         &sensor_dev_attr_in4_min.dev_attr.attr,
2338         &sensor_dev_attr_in4_max.dev_attr.attr,
2339         &sensor_dev_attr_in4_alarm.dev_attr.attr,
2340         &sensor_dev_attr_in4_beep.dev_attr.attr,        /* 24 */
2341
2342         &sensor_dev_attr_in5_input.dev_attr.attr,
2343         &sensor_dev_attr_in5_min.dev_attr.attr,
2344         &sensor_dev_attr_in5_max.dev_attr.attr,
2345         &sensor_dev_attr_in5_alarm.dev_attr.attr,
2346         &sensor_dev_attr_in5_beep.dev_attr.attr,        /* 29 */
2347
2348         &sensor_dev_attr_in6_input.dev_attr.attr,
2349         &sensor_dev_attr_in6_min.dev_attr.attr,
2350         &sensor_dev_attr_in6_max.dev_attr.attr,
2351         &sensor_dev_attr_in6_alarm.dev_attr.attr,
2352         &sensor_dev_attr_in6_beep.dev_attr.attr,        /* 34 */
2353
2354         &sensor_dev_attr_in7_input.dev_attr.attr,
2355         &sensor_dev_attr_in7_min.dev_attr.attr,
2356         &sensor_dev_attr_in7_max.dev_attr.attr,
2357         &sensor_dev_attr_in7_alarm.dev_attr.attr,
2358         &sensor_dev_attr_in7_beep.dev_attr.attr,        /* 39 */
2359
2360         &sensor_dev_attr_in8_input.dev_attr.attr,       /* 40 */
2361         &sensor_dev_attr_in9_input.dev_attr.attr,       /* 41 */
2362         &sensor_dev_attr_in10_input.dev_attr.attr,      /* 42 */
2363         &sensor_dev_attr_in11_input.dev_attr.attr,      /* 43 */
2364         &sensor_dev_attr_in12_input.dev_attr.attr,      /* 44 */
2365         NULL
2366 };
2367
2368 static const struct attribute_group it87_group_in = {
2369         .attrs = it87_attributes_in,
2370         .is_visible = it87_in_is_visible,
2371 };
2372
2373 static umode_t it87_temp_is_visible(struct kobject *kobj,
2374                                     struct attribute *attr, int index)
2375 {
2376         struct device *dev = container_of(kobj, struct device, kobj);
2377         struct it87_data *data = dev_get_drvdata(dev);
2378         int i = index / 7;      /* temperature index */
2379         int a = index % 7;      /* attribute index */
2380
2381         if (!(data->has_temp & BIT(i)))
2382                 return 0;
2383
2384         if (a && i >= data->num_temp_limit)
2385                 return 0;
2386
2387         if (a == 3) {
2388                 int type = get_temp_type(data, i);
2389
2390                 if (type == 0)
2391                         return 0;
2392                 if (has_bank_sel(data))
2393                         return 0444;
2394                 return attr->mode;
2395         }
2396
2397         if (a == 5 && !has_temp_offset(data))
2398                 return 0;
2399
2400         if (a == 6 && !data->has_beep)
2401                 return 0;
2402
2403         return attr->mode;
2404 }
2405
2406 static struct attribute *it87_attributes_temp[] = {
2407         &sensor_dev_attr_temp1_input.dev_attr.attr,
2408         &sensor_dev_attr_temp1_max.dev_attr.attr,
2409         &sensor_dev_attr_temp1_min.dev_attr.attr,
2410         &sensor_dev_attr_temp1_type.dev_attr.attr,      /* 3 */
2411         &sensor_dev_attr_temp1_alarm.dev_attr.attr,
2412         &sensor_dev_attr_temp1_offset.dev_attr.attr,    /* 5 */
2413         &sensor_dev_attr_temp1_beep.dev_attr.attr,      /* 6 */
2414
2415         &sensor_dev_attr_temp2_input.dev_attr.attr,     /* 7 */
2416         &sensor_dev_attr_temp2_max.dev_attr.attr,
2417         &sensor_dev_attr_temp2_min.dev_attr.attr,
2418         &sensor_dev_attr_temp2_type.dev_attr.attr,
2419         &sensor_dev_attr_temp2_alarm.dev_attr.attr,
2420         &sensor_dev_attr_temp2_offset.dev_attr.attr,
2421         &sensor_dev_attr_temp2_beep.dev_attr.attr,
2422
2423         &sensor_dev_attr_temp3_input.dev_attr.attr,     /* 14 */
2424         &sensor_dev_attr_temp3_max.dev_attr.attr,
2425         &sensor_dev_attr_temp3_min.dev_attr.attr,
2426         &sensor_dev_attr_temp3_type.dev_attr.attr,
2427         &sensor_dev_attr_temp3_alarm.dev_attr.attr,
2428         &sensor_dev_attr_temp3_offset.dev_attr.attr,
2429         &sensor_dev_attr_temp3_beep.dev_attr.attr,
2430
2431         &sensor_dev_attr_temp4_input.dev_attr.attr,     /* 21 */
2432         &sensor_dev_attr_temp4_max.dev_attr.attr,
2433         &sensor_dev_attr_temp4_min.dev_attr.attr,
2434         &sensor_dev_attr_temp4_type.dev_attr.attr,
2435         &sensor_dev_attr_temp4_alarm.dev_attr.attr,
2436         &sensor_dev_attr_temp4_offset.dev_attr.attr,
2437         &sensor_dev_attr_temp4_beep.dev_attr.attr,
2438
2439         &sensor_dev_attr_temp5_input.dev_attr.attr,
2440         &sensor_dev_attr_temp5_max.dev_attr.attr,
2441         &sensor_dev_attr_temp5_min.dev_attr.attr,
2442         &sensor_dev_attr_temp5_type.dev_attr.attr,
2443         &sensor_dev_attr_temp5_alarm.dev_attr.attr,
2444         &sensor_dev_attr_temp5_offset.dev_attr.attr,
2445         &sensor_dev_attr_temp5_beep.dev_attr.attr,
2446
2447         &sensor_dev_attr_temp6_input.dev_attr.attr,
2448         &sensor_dev_attr_temp6_max.dev_attr.attr,
2449         &sensor_dev_attr_temp6_min.dev_attr.attr,
2450         &sensor_dev_attr_temp6_type.dev_attr.attr,
2451         &sensor_dev_attr_temp6_alarm.dev_attr.attr,
2452         &sensor_dev_attr_temp6_offset.dev_attr.attr,
2453         &sensor_dev_attr_temp6_beep.dev_attr.attr,
2454         NULL
2455 };
2456
2457 static const struct attribute_group it87_group_temp = {
2458         .attrs = it87_attributes_temp,
2459         .is_visible = it87_temp_is_visible,
2460 };
2461
2462 static umode_t it87_is_visible(struct kobject *kobj,
2463                                struct attribute *attr, int index)
2464 {
2465         struct device *dev = container_of(kobj, struct device, kobj);
2466         struct it87_data *data = dev_get_drvdata(dev);
2467
2468         if ((index == 2 || index == 3) && !data->has_vid)
2469                 return 0;
2470
2471         if (index > 3 && !(data->in_internal & BIT(index - 4)))
2472                 return 0;
2473
2474         return attr->mode;
2475 }
2476
2477 static struct attribute *it87_attributes[] = {
2478         &dev_attr_alarms.attr,
2479         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
2480         &dev_attr_vrm.attr,                             /* 2 */
2481         &dev_attr_cpu0_vid.attr,                        /* 3 */
2482         &sensor_dev_attr_in3_label.dev_attr.attr,       /* 4 .. 7 */
2483         &sensor_dev_attr_in7_label.dev_attr.attr,
2484         &sensor_dev_attr_in8_label.dev_attr.attr,
2485         &sensor_dev_attr_in9_label.dev_attr.attr,
2486         NULL
2487 };
2488
2489 static const struct attribute_group it87_group = {
2490         .attrs = it87_attributes,
2491         .is_visible = it87_is_visible,
2492 };
2493
2494 static umode_t it87_fan_is_visible(struct kobject *kobj,
2495                                    struct attribute *attr, int index)
2496 {
2497         struct device *dev = container_of(kobj, struct device, kobj);
2498         struct it87_data *data = dev_get_drvdata(dev);
2499         int i = index / 5;      /* fan index */
2500         int a = index % 5;      /* attribute index */
2501
2502         if (index >= 15) {      /* fan 4..6 don't have divisor attributes */
2503                 i = (index - 15) / 4 + 3;
2504                 a = (index - 15) % 4;
2505         }
2506
2507         if (!(data->has_fan & BIT(i)))
2508                 return 0;
2509
2510         if (a == 3) {                           /* beep */
2511                 if (!data->has_beep)
2512                         return 0;
2513                 /* first fan beep attribute is writable */
2514                 if (i == __ffs(data->has_fan))
2515                         return attr->mode | S_IWUSR;
2516         }
2517
2518         if (a == 4 && has_16bit_fans(data))     /* divisor */
2519                 return 0;
2520
2521         return attr->mode;
2522 }
2523
2524 static struct attribute *it87_attributes_fan[] = {
2525         &sensor_dev_attr_fan1_input.dev_attr.attr,
2526         &sensor_dev_attr_fan1_min.dev_attr.attr,
2527         &sensor_dev_attr_fan1_alarm.dev_attr.attr,
2528         &sensor_dev_attr_fan1_beep.dev_attr.attr,       /* 3 */
2529         &sensor_dev_attr_fan1_div.dev_attr.attr,        /* 4 */
2530
2531         &sensor_dev_attr_fan2_input.dev_attr.attr,
2532         &sensor_dev_attr_fan2_min.dev_attr.attr,
2533         &sensor_dev_attr_fan2_alarm.dev_attr.attr,
2534         &sensor_dev_attr_fan2_beep.dev_attr.attr,
2535         &sensor_dev_attr_fan2_div.dev_attr.attr,        /* 9 */
2536
2537         &sensor_dev_attr_fan3_input.dev_attr.attr,
2538         &sensor_dev_attr_fan3_min.dev_attr.attr,
2539         &sensor_dev_attr_fan3_alarm.dev_attr.attr,
2540         &sensor_dev_attr_fan3_beep.dev_attr.attr,
2541         &sensor_dev_attr_fan3_div.dev_attr.attr,        /* 14 */
2542
2543         &sensor_dev_attr_fan4_input.dev_attr.attr,      /* 15 */
2544         &sensor_dev_attr_fan4_min.dev_attr.attr,
2545         &sensor_dev_attr_fan4_alarm.dev_attr.attr,
2546         &sensor_dev_attr_fan4_beep.dev_attr.attr,
2547
2548         &sensor_dev_attr_fan5_input.dev_attr.attr,      /* 19 */
2549         &sensor_dev_attr_fan5_min.dev_attr.attr,
2550         &sensor_dev_attr_fan5_alarm.dev_attr.attr,
2551         &sensor_dev_attr_fan5_beep.dev_attr.attr,
2552
2553         &sensor_dev_attr_fan6_input.dev_attr.attr,      /* 23 */
2554         &sensor_dev_attr_fan6_min.dev_attr.attr,
2555         &sensor_dev_attr_fan6_alarm.dev_attr.attr,
2556         &sensor_dev_attr_fan6_beep.dev_attr.attr,
2557         NULL
2558 };
2559
2560 static const struct attribute_group it87_group_fan = {
2561         .attrs = it87_attributes_fan,
2562         .is_visible = it87_fan_is_visible,
2563 };
2564
2565 static umode_t it87_pwm_is_visible(struct kobject *kobj,
2566                                    struct attribute *attr, int index)
2567 {
2568         struct device *dev = container_of(kobj, struct device, kobj);
2569         struct it87_data *data = dev_get_drvdata(dev);
2570         int i = index / 4;      /* pwm index */
2571         int a = index % 4;      /* attribute index */
2572
2573         if (!(data->has_pwm & BIT(i)))
2574                 return 0;
2575
2576         /* pwmX_auto_channels_temp is only writable if auto pwm is supported */
2577         if (a == 3 && (has_old_autopwm(data) || has_newer_autopwm(data)))
2578                 return attr->mode | S_IWUSR;
2579
2580         /* pwm2_freq is writable if there are two pwm frequency selects */
2581         if (has_pwm_freq2(data) && i == 1 && a == 2)
2582                 return attr->mode | S_IWUSR;
2583
2584         return attr->mode;
2585 }
2586
2587 static struct attribute *it87_attributes_pwm[] = {
2588         &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2589         &sensor_dev_attr_pwm1.dev_attr.attr,
2590         &sensor_dev_attr_pwm1_freq.dev_attr.attr,
2591         &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
2592
2593         &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2594         &sensor_dev_attr_pwm2.dev_attr.attr,
2595         &sensor_dev_attr_pwm2_freq.dev_attr.attr,
2596         &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
2597
2598         &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2599         &sensor_dev_attr_pwm3.dev_attr.attr,
2600         &sensor_dev_attr_pwm3_freq.dev_attr.attr,
2601         &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
2602
2603         &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2604         &sensor_dev_attr_pwm4.dev_attr.attr,
2605         &sensor_dev_attr_pwm4_freq.dev_attr.attr,
2606         &sensor_dev_attr_pwm4_auto_channels_temp.dev_attr.attr,
2607
2608         &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2609         &sensor_dev_attr_pwm5.dev_attr.attr,
2610         &sensor_dev_attr_pwm5_freq.dev_attr.attr,
2611         &sensor_dev_attr_pwm5_auto_channels_temp.dev_attr.attr,
2612
2613         &sensor_dev_attr_pwm6_enable.dev_attr.attr,
2614         &sensor_dev_attr_pwm6.dev_attr.attr,
2615         &sensor_dev_attr_pwm6_freq.dev_attr.attr,
2616         &sensor_dev_attr_pwm6_auto_channels_temp.dev_attr.attr,
2617
2618         NULL
2619 };
2620
2621 static const struct attribute_group it87_group_pwm = {
2622         .attrs = it87_attributes_pwm,
2623         .is_visible = it87_pwm_is_visible,
2624 };
2625
2626 static umode_t it87_auto_pwm_is_visible(struct kobject *kobj,
2627                                         struct attribute *attr, int index)
2628 {
2629         struct device *dev = container_of(kobj, struct device, kobj);
2630         struct it87_data *data = dev_get_drvdata(dev);
2631         int i = index / 11;     /* pwm index */
2632         int a = index % 11;     /* attribute index */
2633
2634         if (index >= 33) {      /* pwm 4..6 */
2635                 i = (index - 33) / 6 + 3;
2636                 a = (index - 33) % 6 + 4;
2637         }
2638
2639         if (!(data->has_pwm & BIT(i)))
2640                 return 0;
2641
2642         if (has_newer_autopwm(data)) {
2643                 if (a < 4)      /* no auto point pwm */
2644                         return 0;
2645                 if (a == 8)     /* no auto_point4 */
2646                         return 0;
2647         }
2648         if (has_old_autopwm(data)) {
2649                 if (a >= 9)     /* no pwm_auto_start, pwm_auto_slope */
2650                         return 0;
2651         }
2652
2653         return attr->mode;
2654 }
2655
2656 static struct attribute *it87_attributes_auto_pwm[] = {
2657         &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
2658         &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
2659         &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
2660         &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
2661         &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
2662         &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
2663         &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
2664         &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
2665         &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
2666         &sensor_dev_attr_pwm1_auto_start.dev_attr.attr,
2667         &sensor_dev_attr_pwm1_auto_slope.dev_attr.attr,
2668
2669         &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,    /* 11 */
2670         &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
2671         &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
2672         &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
2673         &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
2674         &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
2675         &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
2676         &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
2677         &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
2678         &sensor_dev_attr_pwm2_auto_start.dev_attr.attr,
2679         &sensor_dev_attr_pwm2_auto_slope.dev_attr.attr,
2680
2681         &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,    /* 22 */
2682         &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
2683         &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
2684         &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
2685         &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
2686         &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
2687         &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
2688         &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
2689         &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
2690         &sensor_dev_attr_pwm3_auto_start.dev_attr.attr,
2691         &sensor_dev_attr_pwm3_auto_slope.dev_attr.attr,
2692
2693         &sensor_dev_attr_pwm4_auto_point1_temp.dev_attr.attr,   /* 33 */
2694         &sensor_dev_attr_pwm4_auto_point1_temp_hyst.dev_attr.attr,
2695         &sensor_dev_attr_pwm4_auto_point2_temp.dev_attr.attr,
2696         &sensor_dev_attr_pwm4_auto_point3_temp.dev_attr.attr,
2697         &sensor_dev_attr_pwm4_auto_start.dev_attr.attr,
2698         &sensor_dev_attr_pwm4_auto_slope.dev_attr.attr,
2699
2700         &sensor_dev_attr_pwm5_auto_point1_temp.dev_attr.attr,
2701         &sensor_dev_attr_pwm5_auto_point1_temp_hyst.dev_attr.attr,
2702         &sensor_dev_attr_pwm5_auto_point2_temp.dev_attr.attr,
2703         &sensor_dev_attr_pwm5_auto_point3_temp.dev_attr.attr,
2704         &sensor_dev_attr_pwm5_auto_start.dev_attr.attr,
2705         &sensor_dev_attr_pwm5_auto_slope.dev_attr.attr,
2706
2707         &sensor_dev_attr_pwm6_auto_point1_temp.dev_attr.attr,
2708         &sensor_dev_attr_pwm6_auto_point1_temp_hyst.dev_attr.attr,
2709         &sensor_dev_attr_pwm6_auto_point2_temp.dev_attr.attr,
2710         &sensor_dev_attr_pwm6_auto_point3_temp.dev_attr.attr,
2711         &sensor_dev_attr_pwm6_auto_start.dev_attr.attr,
2712         &sensor_dev_attr_pwm6_auto_slope.dev_attr.attr,
2713
2714         NULL,
2715 };
2716
2717 static const struct attribute_group it87_group_auto_pwm = {
2718         .attrs = it87_attributes_auto_pwm,
2719         .is_visible = it87_auto_pwm_is_visible,
2720 };
2721
2722 /* SuperIO detection - will change isa_address if a chip is found */
2723 static int __init it87_find(int sioaddr, unsigned short *address,
2724                             struct it87_sio_data *sio_data)
2725 {
2726         int err;
2727         u16 chip_type;
2728         const struct it87_devices *config;
2729
2730         err = superio_enter(sioaddr);
2731         if (err)
2732                 return err;
2733
2734         err = -ENODEV;
2735         chip_type = superio_inw(sioaddr, DEVID);
2736         if (chip_type == 0xffff)
2737                 goto exit;
2738
2739         if (force_id)
2740                 chip_type = force_id;
2741
2742         switch (chip_type) {
2743         case IT8705F_DEVID:
2744                 sio_data->type = it87;
2745                 break;
2746         case IT8712F_DEVID:
2747                 sio_data->type = it8712;
2748                 break;
2749         case IT8716F_DEVID:
2750         case IT8726F_DEVID:
2751                 sio_data->type = it8716;
2752                 break;
2753         case IT8718F_DEVID:
2754                 sio_data->type = it8718;
2755                 break;
2756         case IT8720F_DEVID:
2757                 sio_data->type = it8720;
2758                 break;
2759         case IT8721F_DEVID:
2760                 sio_data->type = it8721;
2761                 break;
2762         case IT8728F_DEVID:
2763                 sio_data->type = it8728;
2764                 break;
2765         case IT8732F_DEVID:
2766                 sio_data->type = it8732;
2767                 break;
2768         case IT8792E_DEVID:
2769                 sio_data->type = it8792;
2770                 break;
2771         case IT8771E_DEVID:
2772                 sio_data->type = it8771;
2773                 break;
2774         case IT8772E_DEVID:
2775                 sio_data->type = it8772;
2776                 break;
2777         case IT8781F_DEVID:
2778                 sio_data->type = it8781;
2779                 break;
2780         case IT8782F_DEVID:
2781                 sio_data->type = it8782;
2782                 break;
2783         case IT8783E_DEVID:
2784                 sio_data->type = it8783;
2785                 break;
2786         case IT8786E_DEVID:
2787                 sio_data->type = it8786;
2788                 break;
2789         case IT8790E_DEVID:
2790                 sio_data->type = it8790;
2791                 break;
2792         case IT8603E_DEVID:
2793         case IT8623E_DEVID:
2794                 sio_data->type = it8603;
2795                 break;
2796         case IT8607E_DEVID:
2797                 sio_data->type = it8607;
2798                 break;
2799         case IT8613E_DEVID:
2800                 sio_data->type = it8613;
2801                 break;
2802         case IT8620E_DEVID:
2803                 sio_data->type = it8620;
2804                 break;
2805         case IT8622E_DEVID:
2806                 sio_data->type = it8622;
2807                 break;
2808         case IT8628E_DEVID:
2809                 sio_data->type = it8628;
2810                 break;
2811         case IT8655E_DEVID:
2812                 sio_data->type = it8655;
2813                 break;
2814         case IT8665E_DEVID:
2815                 sio_data->type = it8665;
2816                 break;
2817         case IT8686E_DEVID:
2818                 sio_data->type = it8686;
2819                 break;
2820         case 0xffff:    /* No device at all */
2821                 goto exit;
2822         default:
2823                 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
2824                 goto exit;
2825         }
2826
2827         superio_select(sioaddr, PME);
2828         if (!(superio_inb(sioaddr, IT87_ACT_REG) & 0x01)) {
2829                 pr_info("Device not activated, skipping\n");
2830                 goto exit;
2831         }
2832
2833         *address = superio_inw(sioaddr, IT87_BASE_REG) & ~(IT87_EXTENT - 1);
2834         if (*address == 0) {
2835                 pr_info("Base address not set, skipping\n");
2836                 goto exit;
2837         }
2838
2839         err = 0;
2840         sio_data->revision = superio_inb(sioaddr, DEVREV) & 0x0f;
2841         pr_info("Found IT%04x%s chip at 0x%x, revision %d\n", chip_type,
2842                 it87_devices[sio_data->type].suffix,
2843                 *address, sio_data->revision);
2844
2845         config = &it87_devices[sio_data->type];
2846
2847         /* in7 (VSB or VCCH5V) is always internal on some chips */
2848         if (has_in7_internal(config))
2849                 sio_data->internal |= BIT(1);
2850
2851         /* in8 (Vbat) is always internal */
2852         sio_data->internal |= BIT(2);
2853
2854         /* in9 (AVCC3), always internal if supported */
2855         if (has_avcc3(config))
2856                 sio_data->internal |= BIT(3); /* in9 is AVCC */
2857         else
2858                 sio_data->skip_in |= BIT(9);
2859
2860         if (!has_four_pwm(config))
2861                 sio_data->skip_pwm |= BIT(3) | BIT(4) | BIT(5);
2862         else if (!has_five_pwm(config))
2863                 sio_data->skip_pwm |= BIT(4) | BIT(5);
2864         else if (!has_six_pwm(config))
2865                 sio_data->skip_pwm |= BIT(5);
2866
2867         if (!has_vid(config))
2868                 sio_data->skip_vid = 1;
2869
2870         /* Read GPIO config and VID value from LDN 7 (GPIO) */
2871         if (sio_data->type == it87) {
2872                 /* The IT8705F has a different LD number for GPIO */
2873                 superio_select(sioaddr, 5);
2874                 sio_data->beep_pin = superio_inb(sioaddr,
2875                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2876         } else if (sio_data->type == it8783) {
2877                 int reg25, reg27, reg2a, reg2c, regef;
2878
2879                 superio_select(sioaddr, GPIO);
2880
2881                 reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2882                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2883                 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
2884                 reg2c = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2885                 regef = superio_inb(sioaddr, IT87_SIO_SPI_REG);
2886
2887                 /* Check if fan3 is there or not */
2888                 if ((reg27 & BIT(0)) || !(reg2c & BIT(2)))
2889                         sio_data->skip_fan |= BIT(2);
2890                 if ((reg25 & BIT(4)) ||
2891                     (!(reg2a & BIT(1)) && (regef & BIT(0))))
2892                         sio_data->skip_pwm |= BIT(2);
2893
2894                 /* Check if fan2 is there or not */
2895                 if (reg27 & BIT(7))
2896                         sio_data->skip_fan |= BIT(1);
2897                 if (reg27 & BIT(3))
2898                         sio_data->skip_pwm |= BIT(1);
2899
2900                 /* VIN5 */
2901                 if ((reg27 & BIT(0)) || (reg2c & BIT(2)))
2902                         sio_data->skip_in |= BIT(5); /* No VIN5 */
2903
2904                 /* VIN6 */
2905                 if (reg27 & BIT(1))
2906                         sio_data->skip_in |= BIT(6); /* No VIN6 */
2907
2908                 /*
2909                  * VIN7
2910                  * Does not depend on bit 2 of Reg2C, contrary to datasheet.
2911                  */
2912                 if (reg27 & BIT(2)) {
2913                         /*
2914                          * The data sheet is a bit unclear regarding the
2915                          * internal voltage divider for VCCH5V. It says
2916                          * "This bit enables and switches VIN7 (pin 91) to the
2917                          * internal voltage divider for VCCH5V".
2918                          * This is different to other chips, where the internal
2919                          * voltage divider would connect VIN7 to an internal
2920                          * voltage source. Maybe that is the case here as well.
2921                          *
2922                          * Since we don't know for sure, re-route it if that is
2923                          * not the case, and ask the user to report if the
2924                          * resulting voltage is sane.
2925                          */
2926                         if (!(reg2c & BIT(1))) {
2927                                 reg2c |= BIT(1);
2928                                 superio_outb(sioaddr, IT87_SIO_PINX2_REG,
2929                                              reg2c);
2930                                 pr_notice("Routing internal VCCH5V to in7.\n");
2931                         }
2932                         pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
2933                         pr_notice("Please report if it displays a reasonable voltage.\n");
2934                 }
2935
2936                 if (reg2c & BIT(0))
2937                         sio_data->internal |= BIT(0);
2938                 if (reg2c & BIT(1))
2939                         sio_data->internal |= BIT(1);
2940
2941                 sio_data->beep_pin = superio_inb(sioaddr,
2942                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2943         } else if (sio_data->type == it8603 || sio_data->type == it8607) {
2944                 int reg27, reg29;
2945
2946                 superio_select(sioaddr, GPIO);
2947
2948                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2949
2950                 /* Check if fan3 is there or not */
2951                 if (reg27 & BIT(6))
2952                         sio_data->skip_pwm |= BIT(2);
2953                 if (reg27 & BIT(7))
2954                         sio_data->skip_fan |= BIT(2);
2955
2956                 /* Check if fan2 is there or not */
2957                 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2958                 if (reg29 & BIT(1))
2959                         sio_data->skip_pwm |= BIT(1);
2960                 if (reg29 & BIT(2))
2961                         sio_data->skip_fan |= BIT(1);
2962
2963                 if (sio_data->type == it8603) {
2964                         sio_data->skip_in |= BIT(5); /* No VIN5 */
2965                         sio_data->skip_in |= BIT(6); /* No VIN6 */
2966                 }
2967
2968                 sio_data->beep_pin = superio_inb(sioaddr,
2969                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2970         } else if (sio_data->type == it8620 || sio_data->type == it8628 ||
2971                    sio_data->type == it8686) {
2972                 int reg;
2973
2974                 superio_select(sioaddr, GPIO);
2975
2976                 /* Check for pwm5 */
2977                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2978                 if (reg & BIT(6))
2979                         sio_data->skip_pwm |= BIT(4);
2980
2981                 /* Check for fan4, fan5 */
2982                 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2983                 if (!(reg & BIT(5)))
2984                         sio_data->skip_fan |= BIT(3);
2985                 if (!(reg & BIT(4)))
2986                         sio_data->skip_fan |= BIT(4);
2987
2988                 /* Check for pwm3, fan3 */
2989                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2990                 if (reg & BIT(6))
2991                         sio_data->skip_pwm |= BIT(2);
2992                 if (reg & BIT(7))
2993                         sio_data->skip_fan |= BIT(2);
2994
2995                 /* Check for pwm4 */
2996                 reg = superio_inb(sioaddr, IT87_SIO_GPIO4_REG);
2997                 if (reg & BIT(2))
2998                         sio_data->skip_pwm |= BIT(3);
2999
3000                 /* Check for pwm2, fan2 */
3001                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3002                 if (reg & BIT(1))
3003                         sio_data->skip_pwm |= BIT(1);
3004                 if (reg & BIT(2))
3005                         sio_data->skip_fan |= BIT(1);
3006                 /* Check for pwm6, fan6 */
3007                 if (!(reg & BIT(7))) {
3008                         sio_data->skip_pwm |= BIT(5);
3009                         sio_data->skip_fan |= BIT(5);
3010                 }
3011
3012                 /* Check if AVCC is on VIN3 */
3013                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3014                 if (reg & BIT(0)) {
3015                         /* For it8686, the bit just enables AVCC3 */
3016                         if (sio_data->type != it8686)
3017                                 sio_data->internal |= BIT(0);
3018                 } else {
3019                         sio_data->internal &= ~BIT(3);
3020                         sio_data->skip_in |= BIT(9);
3021                 }
3022
3023                 sio_data->beep_pin = superio_inb(sioaddr,
3024                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3025         } else if (sio_data->type == it8613 || sio_data->type == it8622) {
3026                 int reg;
3027
3028                 superio_select(sioaddr, GPIO);
3029
3030                 /* Check for pwm4, fan4 */
3031                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
3032                 if (reg & BIT(6))
3033                         sio_data->skip_fan |= BIT(3);
3034                 if (reg & BIT(5))
3035                         sio_data->skip_pwm |= BIT(3);
3036
3037                 /* Check for pwm3, fan3, pwm5, fan5 */
3038                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3039                 if (reg & BIT(6))
3040                         sio_data->skip_pwm |= BIT(2);
3041                 if (reg & BIT(7))
3042                         sio_data->skip_fan |= BIT(2);
3043                 if (reg & BIT(3))
3044                         sio_data->skip_pwm |= BIT(4);
3045                 if (reg & BIT(1))
3046                         sio_data->skip_fan |= BIT(4);
3047
3048                 /* Check for pwm2, fan2 */
3049                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3050                 if (reg & BIT(1))
3051                         sio_data->skip_pwm |= BIT(1);
3052                 if (reg & BIT(2))
3053                         sio_data->skip_fan |= BIT(1);
3054
3055                 /* Check for AVCC */
3056                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3057                 if (!(reg & BIT(0)))
3058                         sio_data->skip_in |= BIT(9);
3059
3060                 sio_data->beep_pin = superio_inb(sioaddr,
3061                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3062         } else if (sio_data->type == it8732) {
3063                 int reg;
3064
3065                 superio_select(sioaddr, GPIO);
3066
3067                 /* Check for pwm2, fan2 */
3068                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3069                 if (reg & BIT(1))
3070                         sio_data->skip_pwm |= BIT(1);
3071                 if (reg & BIT(2))
3072                         sio_data->skip_fan |= BIT(1);
3073
3074                 /* Check for pwm3, fan3, fan4 */
3075                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3076                 if (reg & BIT(6))
3077                         sio_data->skip_pwm |= BIT(2);
3078                 if (reg & BIT(7))
3079                         sio_data->skip_fan |= BIT(2);
3080                 if (reg & BIT(5))
3081                         sio_data->skip_fan |= BIT(3);
3082
3083                 /* Check if AVCC is on VIN3 */
3084                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3085                 if (reg & BIT(0))
3086                         sio_data->internal |= BIT(0);
3087
3088                 sio_data->beep_pin = superio_inb(sioaddr,
3089                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3090         } else if (sio_data->type == it8655) {
3091                 int reg;
3092
3093                 superio_select(sioaddr, GPIO);
3094
3095                 /* Check for pwm2 */
3096                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3097                 if (reg & BIT(1))
3098                         sio_data->skip_pwm |= BIT(1);
3099
3100                 /* Check for fan2 */
3101                 reg = superio_inb(sioaddr, IT87_SIO_PINX4_REG);
3102                 if (reg & BIT(4))
3103                         sio_data->skip_fan |= BIT(1);
3104
3105                 /* Check for pwm3, fan3 */
3106                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3107                 if (reg & BIT(6))
3108                         sio_data->skip_pwm |= BIT(2);
3109                 if (reg & BIT(7))
3110                         sio_data->skip_fan |= BIT(2);
3111
3112                 sio_data->beep_pin = superio_inb(sioaddr,
3113                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3114         } else if (sio_data->type == it8665) {
3115                 int reg;
3116
3117                 superio_select(sioaddr, GPIO);
3118
3119                 /* Check for pwm2 */
3120                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3121                 if (reg & BIT(1))
3122                         sio_data->skip_pwm |= BIT(1);
3123
3124                 /* Check for fan2 */
3125                 reg = superio_inb(sioaddr, IT87_SIO_PINX4_REG);
3126                 if (reg & BIT(4))
3127                         sio_data->skip_fan |= BIT(1);
3128
3129                 /* Check for pwm3, fan3 */
3130                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3131                 if (reg & BIT(6))
3132                         sio_data->skip_pwm |= BIT(2);
3133                 if (reg & BIT(7))
3134                         sio_data->skip_fan |= BIT(2);
3135
3136                 /* Check for pwm5, fan5 */
3137                 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
3138                 if (reg & BIT(5))
3139                         sio_data->skip_pwm |= BIT(4);
3140                 if (!(reg & BIT(4)))
3141                         sio_data->skip_fan |= BIT(4);
3142
3143                 /* Check for pwm4, fan4, pwm6, fan6 */
3144                 reg = superio_inb(sioaddr, IT87_SIO_GPIO9_REG);
3145                 if (reg & BIT(2))
3146                         sio_data->skip_pwm |= BIT(3);
3147                 if (reg & BIT(3))
3148                         sio_data->skip_fan |= BIT(3);
3149                 if (reg & BIT(0))
3150                         sio_data->skip_pwm |= BIT(5);
3151                 if (reg & BIT(1))
3152                         sio_data->skip_fan |= BIT(5);
3153
3154                 sio_data->beep_pin = superio_inb(sioaddr,
3155                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3156         } else {
3157                 int reg;
3158                 bool uart6;
3159
3160                 superio_select(sioaddr, GPIO);
3161
3162                 /* Check for fan4, fan5 */
3163                 if (has_five_fans(config)) {
3164                         reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
3165                         switch (sio_data->type) {
3166                         case it8718:
3167                                 if (reg & BIT(5))
3168                                         sio_data->skip_fan |= BIT(3);
3169                                 if (reg & BIT(4))
3170                                         sio_data->skip_fan |= BIT(4);
3171                                 break;
3172                         case it8720:
3173                         case it8721:
3174                         case it8728:
3175                                 if (!(reg & BIT(5)))
3176                                         sio_data->skip_fan |= BIT(3);
3177                                 if (!(reg & BIT(4)))
3178                                         sio_data->skip_fan |= BIT(4);
3179                                 break;
3180                         default:
3181                                 break;
3182                         }
3183                 }
3184
3185                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3186                 if (!sio_data->skip_vid) {
3187                         /* We need at least 4 VID pins */
3188                         if (reg & 0x0f) {
3189                                 pr_info("VID is disabled (pins used for GPIO)\n");
3190                                 sio_data->skip_vid = 1;
3191                         }
3192                 }
3193
3194                 /* Check if fan3 is there or not */
3195                 if (reg & BIT(6))
3196                         sio_data->skip_pwm |= BIT(2);
3197                 if (reg & BIT(7))
3198                         sio_data->skip_fan |= BIT(2);
3199
3200                 /* Check if fan2 is there or not */
3201                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3202                 if (reg & BIT(1))
3203                         sio_data->skip_pwm |= BIT(1);
3204                 if (reg & BIT(2))
3205                         sio_data->skip_fan |= BIT(1);
3206
3207                 if ((sio_data->type == it8718 || sio_data->type == it8720) &&
3208                     !(sio_data->skip_vid))
3209                         sio_data->vid_value = superio_inb(sioaddr,
3210                                                           IT87_SIO_VID_REG);
3211
3212                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3213
3214                 uart6 = sio_data->type == it8782 && (reg & BIT(2));
3215
3216                 /*
3217                  * The IT8720F has no VIN7 pin, so VCCH should always be
3218                  * routed internally to VIN7 with an internal divider.
3219                  * Curiously, there still is a configuration bit to control
3220                  * this, which means it can be set incorrectly. And even
3221                  * more curiously, many boards out there are improperly
3222                  * configured, even though the IT8720F datasheet claims
3223                  * that the internal routing of VCCH to VIN7 is the default
3224                  * setting. So we force the internal routing in this case.
3225                  *
3226                  * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
3227                  * If UART6 is enabled, re-route VIN7 to the internal divider
3228                  * if that is not already the case.
3229                  */
3230                 if ((sio_data->type == it8720 || uart6) && !(reg & BIT(1))) {
3231                         reg |= BIT(1);
3232                         superio_outb(sioaddr, IT87_SIO_PINX2_REG, reg);
3233                         pr_notice("Routing internal VCCH to in7\n");
3234                 }
3235                 if (reg & BIT(0))
3236                         sio_data->internal |= BIT(0);
3237                 if (reg & BIT(1))
3238                         sio_data->internal |= BIT(1);
3239
3240                 /*
3241                  * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
3242                  * While VIN7 can be routed to the internal voltage divider,
3243                  * VIN5 and VIN6 are not available if UART6 is enabled.
3244                  *
3245                  * Also, temp3 is not available if UART6 is enabled and TEMPIN3
3246                  * is the temperature source. Since we can not read the
3247                  * temperature source here, skip_temp is preliminary.
3248                  */
3249                 if (uart6) {
3250                         sio_data->skip_in |= BIT(5) | BIT(6);
3251                         sio_data->skip_temp |= BIT(2);
3252                 }
3253
3254                 sio_data->beep_pin = superio_inb(sioaddr,
3255                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3256         }
3257         if (sio_data->beep_pin)
3258                 pr_info("Beeping is supported\n");
3259
3260 exit:
3261         superio_exit(sioaddr);
3262         return err;
3263 }
3264
3265 /* Called when we have found a new IT87. */
3266 static void it87_init_device(struct platform_device *pdev)
3267 {
3268         struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
3269         struct it87_data *data = platform_get_drvdata(pdev);
3270         int tmp, i;
3271         u8 mask;
3272
3273         /* Initialize chip specific register pointers */
3274         switch (data->type) {
3275         case it8686:
3276                 data->REG_FAN = IT87_REG_FAN;
3277                 data->REG_FANX = IT87_REG_FANX;
3278                 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3279                 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3280                 data->REG_PWM = IT87_REG_PWM;
3281                 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET_8686;
3282                 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW_8686;
3283                 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH_8686;
3284                 break;
3285         case it8655:
3286         case it8665:
3287                 data->REG_FAN = IT87_REG_FAN_8665;
3288                 data->REG_FANX = IT87_REG_FANX_8665;
3289                 data->REG_FAN_MIN = IT87_REG_FAN_MIN_8665;
3290                 data->REG_FANX_MIN = IT87_REG_FANX_MIN_8665;
3291                 data->REG_PWM = IT87_REG_PWM_8665;
3292                 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
3293                 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
3294                 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
3295                 break;
3296         case it8622:
3297                 data->REG_FAN = IT87_REG_FAN;
3298                 data->REG_FANX = IT87_REG_FANX;
3299                 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3300                 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3301                 data->REG_PWM = IT87_REG_PWM_8665;
3302                 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
3303                 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
3304                 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
3305                 break;
3306         case it8613:
3307                 data->REG_FAN = IT87_REG_FAN;
3308                 data->REG_FANX = IT87_REG_FANX;
3309                 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3310                 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3311                 data->REG_PWM = IT87_REG_PWM_8665;
3312                 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
3313                 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
3314                 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
3315                 break;
3316         default:
3317                 data->REG_FAN = IT87_REG_FAN;
3318                 data->REG_FANX = IT87_REG_FANX;
3319                 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3320                 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3321                 data->REG_PWM = IT87_REG_PWM;
3322                 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
3323                 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
3324                 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
3325                 break;
3326         }
3327
3328         /*
3329          * For each PWM channel:
3330          * - If it is in automatic mode, setting to manual mode should set
3331          *   the fan to full speed by default.
3332          * - If it is in manual mode, we need a mapping to temperature
3333          *   channels to use when later setting to automatic mode later.
3334          *   Use a 1:1 mapping by default (we are clueless.)
3335          * In both cases, the value can (and should) be changed by the user
3336          * prior to switching to a different mode.
3337          * Note that this is no longer needed for the IT8721F and later, as
3338          * these have separate registers for the temperature mapping and the
3339          * manual duty cycle.
3340          */
3341         for (i = 0; i < NUM_AUTO_PWM; i++) {
3342                 data->pwm_temp_map[i] = i;
3343                 data->pwm_duty[i] = 0x7f;       /* Full speed */
3344                 data->auto_pwm[i][3] = 0x7f;    /* Full speed, hard-coded */
3345         }
3346
3347         /*
3348          * Some chips seem to have default value 0xff for all limit
3349          * registers. For low voltage limits it makes no sense and triggers
3350          * alarms, so change to 0 instead. For high temperature limits, it
3351          * means -1 degree C, which surprisingly doesn't trigger an alarm,
3352          * but is still confusing, so change to 127 degrees C.
3353          */
3354         for (i = 0; i < NUM_VIN_LIMIT; i++) {
3355                 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
3356                 if (tmp == 0xff)
3357                         it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
3358         }
3359         for (i = 0; i < data->num_temp_limit; i++) {
3360                 tmp = it87_read_value(data, data->REG_TEMP_HIGH[i]);
3361                 if (tmp == 0xff)
3362                         it87_write_value(data, data->REG_TEMP_HIGH[i], 127);
3363         }
3364
3365         /*
3366          * Temperature channels are not forcibly enabled, as they can be
3367          * set to two different sensor types and we can't guess which one
3368          * is correct for a given system. These channels can be enabled at
3369          * run-time through the temp{1-3}_type sysfs accessors if needed.
3370          */
3371
3372         /* Check if voltage monitors are reset manually or by some reason */
3373         tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
3374         if ((tmp & 0xff) == 0) {
3375                 /* Enable all voltage monitors */
3376                 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
3377         }
3378
3379         /* Check if tachometers are reset manually or by some reason */
3380         mask = 0x70 & ~(sio_data->skip_fan << 4);
3381         data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
3382         if ((data->fan_main_ctrl & mask) == 0) {
3383                 /* Enable all fan tachometers */
3384                 data->fan_main_ctrl |= mask;
3385                 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
3386                                  data->fan_main_ctrl);
3387         }
3388         data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
3389
3390         tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
3391
3392         /* Set tachometers to 16-bit mode if needed */
3393         if (has_fan16_config(data)) {
3394                 if (~tmp & 0x07 & data->has_fan) {
3395                         dev_dbg(&pdev->dev,
3396                                 "Setting fan1-3 to 16-bit mode\n");
3397                         it87_write_value(data, IT87_REG_FAN_16BIT,
3398                                          tmp | 0x07);
3399                 }
3400         }
3401
3402         /* Check for additional fans */
3403         if (has_four_fans(data) && (tmp & BIT(4)))
3404                 data->has_fan |= BIT(3); /* fan4 enabled */
3405         if (has_five_fans(data) && (tmp & BIT(5)))
3406                 data->has_fan |= BIT(4); /* fan5 enabled */
3407         if (has_six_fans(data)) {
3408                 switch (data->type) {
3409                 case it8620:
3410                 case it8628:
3411                 case it8686:
3412                         if (tmp & BIT(2))
3413                                 data->has_fan |= BIT(5); /* fan6 enabled */
3414                         break;
3415                 case it8665:
3416                         tmp = it87_read_value(data, IT87_REG_FAN_DIV);
3417                         if (tmp & BIT(3))
3418                                 data->has_fan |= BIT(5); /* fan6 enabled */
3419                         break;
3420                 default:
3421                         break;
3422                 }
3423         }
3424
3425         /* Fan input pins may be used for alternative functions */
3426         data->has_fan &= ~sio_data->skip_fan;
3427
3428         /* Check if pwm6 is enabled */
3429         if (has_six_pwm(data)) {
3430                 switch (data->type) {
3431                 case it8620:
3432                 case it8686:
3433                         tmp = it87_read_value(data, IT87_REG_FAN_DIV);
3434                         if (!(tmp & BIT(3)))
3435                                 sio_data->skip_pwm |= BIT(5);
3436                         break;
3437                 default:
3438                         break;
3439                 }
3440         }
3441
3442         /* Start monitoring */
3443         it87_write_value(data, IT87_REG_CONFIG,
3444                          (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
3445                          | (update_vbat ? 0x41 : 0x01));
3446 }
3447
3448 /* Return 1 if and only if the PWM interface is safe to use */
3449 static int it87_check_pwm(struct device *dev)
3450 {
3451         struct it87_data *data = dev_get_drvdata(dev);
3452         /*
3453          * Some BIOSes fail to correctly configure the IT87 fans. All fans off
3454          * and polarity set to active low is sign that this is the case so we
3455          * disable pwm control to protect the user.
3456          */
3457         int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
3458
3459         if ((tmp & 0x87) == 0) {
3460                 if (fix_pwm_polarity) {
3461                         /*
3462                          * The user asks us to attempt a chip reconfiguration.
3463                          * This means switching to active high polarity and
3464                          * inverting all fan speed values.
3465                          */
3466                         int i;
3467                         u8 pwm[3];
3468
3469                         for (i = 0; i < ARRAY_SIZE(pwm); i++)
3470                                 pwm[i] = it87_read_value(data,
3471                                                          data->REG_PWM[i]);
3472
3473                         /*
3474                          * If any fan is in automatic pwm mode, the polarity
3475                          * might be correct, as suspicious as it seems, so we
3476                          * better don't change anything (but still disable the
3477                          * PWM interface).
3478                          */
3479                         if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
3480                                 dev_info(dev,
3481                                          "Reconfiguring PWM to active high polarity\n");
3482                                 it87_write_value(data, IT87_REG_FAN_CTL,
3483                                                  tmp | 0x87);
3484                                 for (i = 0; i < 3; i++)
3485                                         it87_write_value(data,
3486                                                          data->REG_PWM[i],
3487                                                          0x7f & ~pwm[i]);
3488                                 return 1;
3489                         }
3490
3491                         dev_info(dev,
3492                                  "PWM configuration is too broken to be fixed\n");
3493                 }
3494
3495                 dev_info(dev,
3496                          "Detected broken BIOS defaults, disabling PWM interface\n");
3497                 return 0;
3498         } else if (fix_pwm_polarity) {
3499                 dev_info(dev,
3500                          "PWM configuration looks sane, won't touch\n");
3501         }
3502
3503         return 1;
3504 }
3505
3506 static int it87_probe(struct platform_device *pdev)
3507 {
3508         struct it87_data *data;
3509         struct resource *res;
3510         struct device *dev = &pdev->dev;
3511         struct it87_sio_data *sio_data = dev_get_platdata(dev);
3512         int enable_pwm_interface;
3513         struct device *hwmon_dev;
3514
3515         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3516         if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
3517                                  DRVNAME)) {
3518                 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
3519                         (unsigned long)res->start,
3520                         (unsigned long)(res->start + IT87_EC_EXTENT - 1));
3521                 return -EBUSY;
3522         }
3523
3524         data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
3525         if (!data)
3526                 return -ENOMEM;
3527
3528         data->addr = res->start;
3529         data->type = sio_data->type;
3530         data->features = it87_devices[sio_data->type].features;
3531         data->num_temp_limit = it87_devices[sio_data->type].num_temp_limit;
3532         data->peci_mask = it87_devices[sio_data->type].peci_mask;
3533         data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
3534         data->bank = 0xff;
3535
3536         /*
3537          * IT8705F Datasheet 0.4.1, 3h == Version G.
3538          * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
3539          * These are the first revisions with 16-bit tachometer support.
3540          */
3541         switch (data->type) {
3542         case it87:
3543                 if (sio_data->revision >= 0x03) {
3544                         data->features &= ~FEAT_OLD_AUTOPWM;
3545                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS;
3546                 }
3547                 break;
3548         case it8712:
3549                 if (sio_data->revision >= 0x08) {
3550                         data->features &= ~FEAT_OLD_AUTOPWM;
3551                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS |
3552                                           FEAT_FIVE_FANS;
3553                 }
3554                 break;
3555         default:
3556                 break;
3557         }
3558
3559         /* Now, we do the remaining detection. */
3560         if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80) ||
3561             it87_read_value(data, IT87_REG_CHIPID) != 0x90)
3562                 return -ENODEV;
3563
3564         platform_set_drvdata(pdev, data);
3565
3566         mutex_init(&data->update_lock);
3567
3568         /* Check PWM configuration */
3569         enable_pwm_interface = it87_check_pwm(dev);
3570
3571         /* Starting with IT8721F, we handle scaling of internal voltages */
3572         if (has_scaling(data)) {
3573                 if (sio_data->internal & BIT(0))
3574                         data->in_scaled |= BIT(3);      /* in3 is AVCC */
3575                 if (sio_data->internal & BIT(1))
3576                         data->in_scaled |= BIT(7);      /* in7 is VSB */
3577                 if (sio_data->internal & BIT(2))
3578                         data->in_scaled |= BIT(8);      /* in8 is Vbat */
3579                 if (sio_data->internal & BIT(3))
3580                         data->in_scaled |= BIT(9);      /* in9 is AVCC */
3581         } else if (sio_data->type == it8781 || sio_data->type == it8782 ||
3582                    sio_data->type == it8783) {
3583                 if (sio_data->internal & BIT(0))
3584                         data->in_scaled |= BIT(3);      /* in3 is VCC5V */
3585                 if (sio_data->internal & BIT(1))
3586                         data->in_scaled |= BIT(7);      /* in7 is VCCH5V */
3587         }
3588
3589         data->has_temp = 0x07;
3590         if (sio_data->skip_temp & BIT(2)) {
3591                 if (sio_data->type == it8782 &&
3592                     !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
3593                         data->has_temp &= ~BIT(2);
3594         }
3595
3596         data->in_internal = sio_data->internal;
3597         data->has_in = 0x3ff & ~sio_data->skip_in;
3598
3599         if (has_six_temp(data)) {
3600                 u8 reg = it87_read_value(data, IT87_REG_TEMP456_ENABLE);
3601
3602                 /* Check for additional temperature sensors */
3603                 if ((reg & 0x03) >= 0x02)
3604                         data->has_temp |= BIT(3);
3605                 if (((reg >> 2) & 0x03) >= 0x02)
3606                         data->has_temp |= BIT(4);
3607                 if (((reg >> 4) & 0x03) >= 0x02)
3608                         data->has_temp |= BIT(5);
3609
3610                 /* Check for additional voltage sensors */
3611                 if ((reg & 0x03) == 0x01)
3612                         data->has_in |= BIT(10);
3613                 if (((reg >> 2) & 0x03) == 0x01)
3614                         data->has_in |= BIT(11);
3615                 if (((reg >> 4) & 0x03) == 0x01)
3616                         data->has_in |= BIT(12);
3617         }
3618
3619         data->has_beep = !!sio_data->beep_pin;
3620
3621         /* Initialize the IT87 chip */
3622         it87_init_device(pdev);
3623
3624         if (!sio_data->skip_vid) {
3625                 data->has_vid = true;
3626                 data->vrm = vid_which_vrm();
3627                 /* VID reading from Super-I/O config space if available */
3628                 data->vid = sio_data->vid_value;
3629         }
3630
3631         /* Prepare for sysfs hooks */
3632         data->groups[0] = &it87_group;
3633         data->groups[1] = &it87_group_in;
3634         data->groups[2] = &it87_group_temp;
3635         data->groups[3] = &it87_group_fan;
3636
3637         if (enable_pwm_interface) {
3638                 data->has_pwm = BIT(ARRAY_SIZE(IT87_REG_PWM)) - 1;
3639                 data->has_pwm &= ~sio_data->skip_pwm;
3640
3641                 data->groups[4] = &it87_group_pwm;
3642                 if (has_old_autopwm(data) || has_newer_autopwm(data))
3643                         data->groups[5] = &it87_group_auto_pwm;
3644         }
3645
3646         hwmon_dev = devm_hwmon_device_register_with_groups(dev,
3647                                         it87_devices[sio_data->type].name,
3648                                         data, data->groups);
3649         return PTR_ERR_OR_ZERO(hwmon_dev);
3650 }
3651
3652 static struct platform_driver it87_driver = {
3653         .driver = {
3654                 .name   = DRVNAME,
3655         },
3656         .probe  = it87_probe,
3657 };
3658
3659 static int __init it87_device_add(int index, unsigned short address,
3660                                   const struct it87_sio_data *sio_data)
3661 {
3662         struct platform_device *pdev;
3663         struct resource res = {
3664                 .start  = address + IT87_EC_OFFSET,
3665                 .end    = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
3666                 .name   = DRVNAME,
3667                 .flags  = IORESOURCE_IO,
3668         };
3669         int err;
3670
3671         err = acpi_check_resource_conflict(&res);
3672         if (err)
3673                 return err;
3674
3675         pdev = platform_device_alloc(DRVNAME, address);
3676         if (!pdev)
3677                 return -ENOMEM;
3678
3679         err = platform_device_add_resources(pdev, &res, 1);
3680         if (err) {
3681                 pr_err("Device resource addition failed (%d)\n", err);
3682                 goto exit_device_put;
3683         }
3684
3685         err = platform_device_add_data(pdev, sio_data,
3686                                        sizeof(struct it87_sio_data));
3687         if (err) {
3688                 pr_err("Platform data allocation failed\n");
3689                 goto exit_device_put;
3690         }
3691
3692         err = platform_device_add(pdev);
3693         if (err) {
3694                 pr_err("Device addition failed (%d)\n", err);
3695                 goto exit_device_put;
3696         }
3697
3698         it87_pdev[index] = pdev;
3699         return 0;
3700
3701 exit_device_put:
3702         platform_device_put(pdev);
3703         return err;
3704 }
3705
3706 struct it87_dmi_data {
3707         bool sio4e_broken;      /* SIO accesses @ 0x4e are broken       */
3708         char *sio_mutex;        /* SIO ACPI mutex                       */
3709         u8 skip_pwm;            /* pwm channels to skip for this board  */
3710 };
3711
3712 /*
3713  * On Gigabyte AB350 and AX370 boards, accesses to the Super-IO chip
3714  * at address 0x4e/0x4f can result in a system hang.
3715  * Accesses to address 0x2e/0x2f need to be mutex protected.
3716  */
3717 static struct it87_dmi_data gigabyte_ab350_gaming = {
3718         .sio4e_broken = true,
3719         .sio_mutex = "\\_SB.PCI0.SBRG.SIO1.MUT0",
3720 };
3721
3722 /*
3723  * On the Shuttle SN68PT, FAN_CTL2 is apparently not
3724  * connected to a fan, but to something else. One user
3725  * has reported instant system power-off when changing
3726  * the PWM2 duty cycle, so we disable it.
3727  * I use the board name string as the trigger in case
3728  * the same board is ever used in other systems.
3729  */
3730 static struct it87_dmi_data nvidia_fn68pt = {
3731         .skip_pwm = BIT(1),
3732 };
3733
3734 static const struct dmi_system_id it87_dmi_table[] __initconst = {
3735         {
3736                 .matches = {
3737                         DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."),
3738                         DMI_MATCH(DMI_BOARD_NAME, "AB350-Gaming-CF"),
3739                 },
3740                 .driver_data = &gigabyte_ab350_gaming,
3741         },
3742         {
3743                 .matches = {
3744                         DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."),
3745                         DMI_MATCH(DMI_BOARD_NAME, "AB350-Gaming 3-CF"),
3746                 },
3747                 .driver_data = &gigabyte_ab350_gaming,
3748         },
3749         {
3750                 .matches = {
3751                         DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."),
3752                         DMI_MATCH(DMI_BOARD_NAME, "AX370-Gaming K7"),
3753                 },
3754                 .driver_data = &gigabyte_ab350_gaming,
3755         },
3756         {
3757                 .matches = {
3758                         DMI_MATCH(DMI_BOARD_VENDOR, "nVIDIA"),
3759                         DMI_MATCH(DMI_BOARD_NAME, "FN68PT"),
3760                 },
3761                 .driver_data = &nvidia_fn68pt,
3762         },
3763         { }
3764 };
3765
3766 static int __init sm_it87_init(void)
3767 {
3768         const struct dmi_system_id *dmi = dmi_first_match(it87_dmi_table);
3769         struct it87_dmi_data *dmi_data = NULL;
3770         int sioaddr[2] = { REG_2E, REG_4E };
3771         struct it87_sio_data sio_data;
3772         unsigned short isa_address;
3773         bool found = false;
3774         int i, err;
3775
3776         if (dmi)
3777                 dmi_data = dmi->driver_data;
3778
3779         if (dmi_data) {
3780                 it87_sio4e_broken = dmi_data->sio4e_broken;
3781 #ifdef __IT87_USE_ACPI_MUTEX
3782                 if (dmi_data->sio_mutex) {
3783                         static acpi_status status;
3784
3785                         status = acpi_get_handle(NULL, dmi_data->sio_mutex,
3786                                                  &it87_acpi_sio_handle);
3787                         if (ACPI_SUCCESS(status)) {
3788                                 it87_acpi_sio_mutex = dmi_data->sio_mutex;
3789                                 pr_debug("Found ACPI SIO mutex %s\n",
3790                                          dmi_data->sio_mutex);
3791                         } else {
3792                                 pr_warn("ACPI SIO mutex %s not found\n",
3793                                         dmi_data->sio_mutex);
3794                         }
3795                 }
3796 #endif /* __IT87_USE_ACPI_MUTEX */
3797         }
3798
3799         err = platform_driver_register(&it87_driver);
3800         if (err)
3801                 return err;
3802
3803         for (i = 0; i < ARRAY_SIZE(sioaddr); i++) {
3804                 /*
3805                  * Accessing the second Super-IO chi can result in board
3806                  * hangs. Disable until we figure out what is going on.
3807                  */
3808                 if (it87_sio4e_broken && sioaddr[i] == 0x4e)
3809                         continue;
3810                 memset(&sio_data, 0, sizeof(struct it87_sio_data));
3811                 isa_address = 0;
3812                 err = it87_find(sioaddr[i], &isa_address, &sio_data);
3813                 if (err || isa_address == 0)
3814                         continue;
3815
3816                 if (dmi_data)
3817                         sio_data.skip_pwm |= dmi_data->skip_pwm;
3818                 err = it87_device_add(i, isa_address, &sio_data);
3819                 if (err)
3820                         goto exit_dev_unregister;
3821                 found = true;
3822         }
3823
3824         if (!found) {
3825                 err = -ENODEV;
3826                 goto exit_unregister;
3827         }
3828         return 0;
3829
3830 exit_dev_unregister:
3831         /* NULL check handled by platform_device_unregister */
3832         platform_device_unregister(it87_pdev[0]);
3833 exit_unregister:
3834         platform_driver_unregister(&it87_driver);
3835         return err;
3836 }
3837
3838 static void __exit sm_it87_exit(void)
3839 {
3840         /* NULL check handled by platform_device_unregister */
3841         platform_device_unregister(it87_pdev[1]);
3842         platform_device_unregister(it87_pdev[0]);
3843         platform_driver_unregister(&it87_driver);
3844 }
3845
3846 MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>");
3847 MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
3848 module_param(update_vbat, bool, 0);
3849 MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
3850 module_param(fix_pwm_polarity, bool, 0);
3851 MODULE_PARM_DESC(fix_pwm_polarity,
3852                  "Force PWM polarity to active high (DANGEROUS)");
3853 MODULE_LICENSE("GPL");
3854
3855 module_init(sm_it87_init);
3856 module_exit(sm_it87_exit);