2 * it87.c - Part of lm_sensors, Linux kernel modules for hardware
5 * The IT8705F is an LPC-based Super I/O part that contains UARTs, a
6 * parallel port, an IR port, a MIDI port, a floppy controller, etc., in
7 * addition to an Environment Controller (Enhanced Hardware Monitor and
10 * This driver supports only the Environment Controller in the IT8705F and
11 * similar parts. The other devices are supported by different drivers.
13 * Supports: IT8603E Super I/O chip w/LPC interface
14 * IT8620E Super I/O chip w/LPC interface
15 * IT8623E Super I/O chip w/LPC interface
16 * IT8705F Super I/O chip w/LPC interface
17 * IT8712F Super I/O chip w/LPC interface
18 * IT8716F Super I/O chip w/LPC interface
19 * IT8718F Super I/O chip w/LPC interface
20 * IT8720F Super I/O chip w/LPC interface
21 * IT8721F Super I/O chip w/LPC interface
22 * IT8726F Super I/O chip w/LPC interface
23 * IT8728F Super I/O chip w/LPC interface
24 * IT8758E Super I/O chip w/LPC interface
25 * IT8771E Super I/O chip w/LPC interface
26 * IT8772E Super I/O chip w/LPC interface
27 * IT8781F Super I/O chip w/LPC interface
28 * IT8782F Super I/O chip w/LPC interface
29 * IT8783E/F Super I/O chip w/LPC interface
30 * IT8786E Super I/O chip w/LPC interface
31 * IT8790E Super I/O chip w/LPC interface
32 * Sis950 A clone of the IT8705F
34 * Copyright (C) 2001 Chris Gauthron
35 * Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de>
37 * This program is free software; you can redistribute it and/or modify
38 * it under the terms of the GNU General Public License as published by
39 * the Free Software Foundation; either version 2 of the License, or
40 * (at your option) any later version.
42 * This program is distributed in the hope that it will be useful,
43 * but WITHOUT ANY WARRANTY; without even the implied warranty of
44 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
45 * GNU General Public License for more details.
48 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
50 #include <linux/bitops.h>
51 #include <linux/module.h>
52 #include <linux/init.h>
53 #include <linux/slab.h>
54 #include <linux/jiffies.h>
55 #include <linux/platform_device.h>
56 #include <linux/hwmon.h>
57 #include <linux/hwmon-sysfs.h>
58 #include <linux/hwmon-vid.h>
59 #include <linux/err.h>
60 #include <linux/mutex.h>
61 #include <linux/sysfs.h>
62 #include <linux/string.h>
63 #include <linux/dmi.h>
64 #include <linux/acpi.h>
68 #define DRVNAME "it87"
70 enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8771,
71 it8772, it8781, it8782, it8783, it8786, it8790, it8603, it8620 };
73 static unsigned short force_id;
74 module_param(force_id, ushort, 0);
75 MODULE_PARM_DESC(force_id, "Override the detected device ID");
77 static struct platform_device *it87_pdev[2];
79 #define REG_2E 0x2e /* The register to read/write */
80 #define REG_4E 0x4e /* Secondary register to read/write */
82 #define DEV 0x07 /* Register: Logical device select */
83 #define PME 0x04 /* The device with the fan registers in it */
85 /* The device with the IT8718F/IT8720F VID value in it */
88 #define DEVID 0x20 /* Register: Device ID */
89 #define DEVREV 0x22 /* Register: Device Revision */
91 static inline int superio_inb(int ioreg, int reg)
94 return inb(ioreg + 1);
97 static inline void superio_outb(int ioreg, int reg, int val)
100 outb(val, ioreg + 1);
103 static int superio_inw(int ioreg, int reg)
108 val = inb(ioreg + 1) << 8;
110 val |= inb(ioreg + 1);
114 static inline void superio_select(int ioreg, int ldn)
117 outb(ldn, ioreg + 1);
120 static inline int superio_enter(int ioreg)
123 * Try to reserve ioreg and ioreg + 1 for exclusive access.
125 if (!request_muxed_region(ioreg, 2, DRVNAME))
131 outb(ioreg == REG_4E ? 0xaa : 0x55, ioreg);
135 static inline void superio_exit(int ioreg)
138 outb(0x02, ioreg + 1);
139 release_region(ioreg, 2);
142 /* Logical device 4 registers */
143 #define IT8712F_DEVID 0x8712
144 #define IT8705F_DEVID 0x8705
145 #define IT8716F_DEVID 0x8716
146 #define IT8718F_DEVID 0x8718
147 #define IT8720F_DEVID 0x8720
148 #define IT8721F_DEVID 0x8721
149 #define IT8726F_DEVID 0x8726
150 #define IT8728F_DEVID 0x8728
151 #define IT8771E_DEVID 0x8771
152 #define IT8772E_DEVID 0x8772
153 #define IT8781F_DEVID 0x8781
154 #define IT8782F_DEVID 0x8782
155 #define IT8783E_DEVID 0x8783
156 #define IT8786E_DEVID 0x8786
157 #define IT8790E_DEVID 0x8790
158 #define IT8603E_DEVID 0x8603
159 #define IT8620E_DEVID 0x8620
160 #define IT8623E_DEVID 0x8623
161 #define IT87_ACT_REG 0x30
162 #define IT87_BASE_REG 0x60
164 /* Logical device 7 registers (IT8712F and later) */
165 #define IT87_SIO_GPIO1_REG 0x25
166 #define IT87_SIO_GPIO2_REG 0x26
167 #define IT87_SIO_GPIO3_REG 0x27
168 #define IT87_SIO_GPIO4_REG 0x28
169 #define IT87_SIO_GPIO5_REG 0x29
170 #define IT87_SIO_PINX1_REG 0x2a /* Pin selection */
171 #define IT87_SIO_PINX2_REG 0x2c /* Pin selection */
172 #define IT87_SIO_SPI_REG 0xef /* SPI function pin select */
173 #define IT87_SIO_VID_REG 0xfc /* VID value */
174 #define IT87_SIO_BEEP_PIN_REG 0xf6 /* Beep pin mapping */
176 /* Update battery voltage after every reading if true */
177 static bool update_vbat;
179 /* Not all BIOSes properly configure the PWM registers */
180 static bool fix_pwm_polarity;
182 /* Many IT87 constants specified below */
184 /* Length of ISA address segment */
185 #define IT87_EXTENT 8
187 /* Length of ISA address segment for Environmental Controller */
188 #define IT87_EC_EXTENT 2
190 /* Offset of EC registers from ISA base address */
191 #define IT87_EC_OFFSET 5
193 /* Where are the ISA address/data registers relative to the EC base address */
194 #define IT87_ADDR_REG_OFFSET 0
195 #define IT87_DATA_REG_OFFSET 1
197 /*----- The IT87 registers -----*/
199 #define IT87_REG_CONFIG 0x00
201 #define IT87_REG_ALARM1 0x01
202 #define IT87_REG_ALARM2 0x02
203 #define IT87_REG_ALARM3 0x03
206 * The IT8718F and IT8720F have the VID value in a different register, in
207 * Super-I/O configuration space.
209 #define IT87_REG_VID 0x0a
211 * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
212 * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
215 #define IT87_REG_FAN_DIV 0x0b
216 #define IT87_REG_FAN_16BIT 0x0c
220 * - up to 13 voltage (0 to 7, battery, avcc, 10 to 12)
221 * - up to 6 temp (1 to 6)
222 * - up to 6 fan (1 to 6)
225 static const u8 IT87_REG_FAN[] = { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c };
226 static const u8 IT87_REG_FAN_MIN[] = { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e };
227 static const u8 IT87_REG_FANX[] = { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d };
228 static const u8 IT87_REG_FANX_MIN[] = { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f };
229 static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59 };
231 #define IT87_REG_FAN_MAIN_CTRL 0x13
232 #define IT87_REG_FAN_CTL 0x14
233 static const u8 IT87_REG_PWM[] = { 0x15, 0x16, 0x17, 0x7f, 0xa7, 0xaf };
234 static const u8 IT87_REG_PWM_DUTY[] = { 0x63, 0x6b, 0x73, 0x7b, 0xa3, 0xab };
236 static const u8 IT87_REG_VIN[] = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26,
237 0x27, 0x28, 0x2f, 0x2c, 0x2d, 0x2e };
239 #define IT87_REG_TEMP(nr) (0x29 + (nr))
241 #define IT87_REG_VIN_MAX(nr) (0x30 + (nr) * 2)
242 #define IT87_REG_VIN_MIN(nr) (0x31 + (nr) * 2)
243 #define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
244 #define IT87_REG_TEMP_LOW(nr) (0x41 + (nr) * 2)
246 #define IT87_REG_VIN_ENABLE 0x50
247 #define IT87_REG_TEMP_ENABLE 0x51
248 #define IT87_REG_TEMP_EXTRA 0x55
249 #define IT87_REG_BEEP_ENABLE 0x5c
251 #define IT87_REG_CHIPID 0x58
253 #define IT87_REG_AUTO_TEMP(nr, i) (0x60 + (nr) * 8 + (i))
254 #define IT87_REG_AUTO_PWM(nr, i) (0x65 + (nr) * 8 + (i))
256 #define IT87_REG_TEMP456_ENABLE 0x77
258 #define NUM_VIN ARRAY_SIZE(IT87_REG_VIN)
259 #define NUM_VIN_LIMIT 8
261 #define NUM_TEMP_OFFSET ARRAY_SIZE(IT87_REG_TEMP_OFFSET)
262 #define NUM_TEMP_LIMIT 3
263 #define NUM_FAN ARRAY_SIZE(IT87_REG_FAN)
264 #define NUM_FAN_DIV 3
265 #define NUM_PWM ARRAY_SIZE(IT87_REG_PWM)
266 #define NUM_AUTO_PWM ARRAY_SIZE(IT87_REG_PWM)
268 struct it87_devices {
270 const char * const suffix;
276 #define FEAT_12MV_ADC BIT(0)
277 #define FEAT_NEWER_AUTOPWM BIT(1)
278 #define FEAT_OLD_AUTOPWM BIT(2)
279 #define FEAT_16BIT_FANS BIT(3)
280 #define FEAT_TEMP_OFFSET BIT(4)
281 #define FEAT_TEMP_PECI BIT(5)
282 #define FEAT_TEMP_OLD_PECI BIT(6)
283 #define FEAT_FAN16_CONFIG BIT(7) /* Need to enable 16-bit fans */
284 #define FEAT_FIVE_FANS BIT(8) /* Supports five fans */
285 #define FEAT_VID BIT(9) /* Set if chip supports VID */
286 #define FEAT_IN7_INTERNAL BIT(10) /* Set if in7 is internal */
287 #define FEAT_SIX_FANS BIT(11) /* Supports six fans */
288 #define FEAT_AVCC3 BIT(12) /* Chip supports in9/AVCC3 */
289 #define FEAT_SIX_PWM BIT(13) /* Chip supports 6 pwm chn */
290 #define FEAT_PWM_FREQ2 BIT(14) /* Separate pwm freq 2 */
291 #define FEAT_SIX_TEMP BIT(15) /* Up to 6 temp sensors */
293 static const struct it87_devices it87_devices[] = {
297 .features = FEAT_OLD_AUTOPWM, /* may need to overwrite */
302 .features = FEAT_OLD_AUTOPWM | FEAT_VID,
303 /* may need to overwrite */
308 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
309 | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2,
314 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
315 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
317 .old_peci_mask = 0x4,
322 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
323 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
325 .old_peci_mask = 0x4,
330 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
331 | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
332 | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL
335 .old_peci_mask = 0x02, /* Actually reports PCH */
340 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
341 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
342 | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2,
348 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
349 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
351 /* PECI: guesswork */
353 /* 16 bit fans (OHM) */
354 /* three fans, always 16 bit (guesswork) */
360 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
361 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
363 /* PECI (coreboot) */
364 /* 12mV ADC (HWSensors4, OHM) */
365 /* 16 bit fans (HWSensors4, OHM) */
366 /* three fans, always 16 bit (datasheet) */
372 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
373 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
374 .old_peci_mask = 0x4,
379 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
380 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
381 .old_peci_mask = 0x4,
386 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
387 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
388 .old_peci_mask = 0x4,
393 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
394 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
401 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
402 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
409 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
410 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
411 | FEAT_AVCC3 | FEAT_PWM_FREQ2,
417 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
418 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
419 | FEAT_IN7_INTERNAL | FEAT_AVCC3 | FEAT_SIX_PWM
420 | FEAT_PWM_FREQ2 | FEAT_SIX_TEMP,
425 #define has_16bit_fans(data) ((data)->features & FEAT_16BIT_FANS)
426 #define has_12mv_adc(data) ((data)->features & FEAT_12MV_ADC)
427 #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
428 #define has_old_autopwm(data) ((data)->features & FEAT_OLD_AUTOPWM)
429 #define has_temp_offset(data) ((data)->features & FEAT_TEMP_OFFSET)
430 #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \
431 ((data)->peci_mask & BIT(nr)))
432 #define has_temp_old_peci(data, nr) \
433 (((data)->features & FEAT_TEMP_OLD_PECI) && \
434 ((data)->old_peci_mask & BIT(nr)))
435 #define has_fan16_config(data) ((data)->features & FEAT_FAN16_CONFIG)
436 #define has_five_fans(data) ((data)->features & (FEAT_FIVE_FANS | \
438 #define has_vid(data) ((data)->features & FEAT_VID)
439 #define has_in7_internal(data) ((data)->features & FEAT_IN7_INTERNAL)
440 #define has_six_fans(data) ((data)->features & FEAT_SIX_FANS)
441 #define has_avcc3(data) ((data)->features & FEAT_AVCC3)
442 #define has_six_pwm(data) ((data)->features & FEAT_SIX_PWM)
443 #define has_pwm_freq2(data) ((data)->features & FEAT_PWM_FREQ2)
444 #define has_six_temp(data) ((data)->features & FEAT_SIX_TEMP)
446 struct it87_sio_data {
448 /* Values read from Super-I/O config space */
452 u8 internal; /* Internal sensors can be labeled */
453 /* Features skipped based on config or DMI */
462 * For each registered chip, we need to keep some data in memory.
463 * The structure is dynamically allocated.
466 const struct attribute_group *groups[7];
474 struct mutex update_lock;
475 char valid; /* !=0 if following fields are valid */
476 unsigned long last_updated; /* In jiffies */
478 u16 in_scaled; /* Internal voltage sensors are scaled */
479 u16 in_internal; /* Bitfield, internal sensors (for labels) */
480 u16 has_in; /* Bitfield, voltage sensors enabled */
481 u8 in[NUM_VIN][3]; /* [nr][0]=in, [1]=min, [2]=max */
482 u8 has_fan; /* Bitfield, fans enabled */
483 u16 fan[NUM_FAN][2]; /* Register values, [nr][0]=fan, [1]=min */
484 u8 has_temp; /* Bitfield, temp sensors enabled */
485 s8 temp[NUM_TEMP][4]; /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
486 u8 sensor; /* Register value (IT87_REG_TEMP_ENABLE) */
487 u8 extra; /* Register value (IT87_REG_TEMP_EXTRA) */
488 u8 fan_div[NUM_FAN_DIV];/* Register encoding, shifted right */
489 bool has_vid; /* True if VID supported */
490 u8 vid; /* Register encoding, combined */
492 u32 alarms; /* Register encoding, combined */
493 bool has_beep; /* true if beep supported */
494 u8 beeps; /* Register encoding */
495 u8 fan_main_ctrl; /* Register value */
496 u8 fan_ctl; /* Register value */
499 * The following 3 arrays correspond to the same registers up to
500 * the IT8720F. The meaning of bits 6-0 depends on the value of bit
501 * 7, and we want to preserve settings on mode changes, so we have
502 * to track all values separately.
503 * Starting with the IT8721F, the manual PWM duty cycles are stored
504 * in separate registers (8-bit values), so the separate tracking
505 * is no longer needed, but it is still done to keep the driver
508 u8 has_pwm; /* Bitfield, pwm control enabled */
509 u8 pwm_ctrl[NUM_PWM]; /* Register value */
510 u8 pwm_duty[NUM_PWM]; /* Manual PWM value set by user */
511 u8 pwm_temp_map[NUM_PWM];/* PWM to temp. chan. mapping (bits 1-0) */
513 /* Automatic fan speed control registers */
514 u8 auto_pwm[NUM_AUTO_PWM][4]; /* [nr][3] is hard-coded */
515 s8 auto_temp[NUM_AUTO_PWM][5]; /* [nr][0] is point1_temp_hyst */
518 static int adc_lsb(const struct it87_data *data, int nr)
520 int lsb = has_12mv_adc(data) ? 12 : 16;
522 if (data->in_scaled & BIT(nr))
527 static u8 in_to_reg(const struct it87_data *data, int nr, long val)
529 val = DIV_ROUND_CLOSEST(val, adc_lsb(data, nr));
530 return clamp_val(val, 0, 255);
533 static int in_from_reg(const struct it87_data *data, int nr, int val)
535 return val * adc_lsb(data, nr);
538 static inline u8 FAN_TO_REG(long rpm, int div)
542 rpm = clamp_val(rpm, 1, 1000000);
543 return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
546 static inline u16 FAN16_TO_REG(long rpm)
550 return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
553 #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
554 1350000 / ((val) * (div)))
555 /* The divider is fixed to 2 in 16-bit mode */
556 #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
557 1350000 / ((val) * 2))
559 #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \
560 ((val) + 500) / 1000), -128, 127))
561 #define TEMP_FROM_REG(val) ((val) * 1000)
563 static u8 pwm_to_reg(const struct it87_data *data, long val)
565 if (has_newer_autopwm(data))
571 static int pwm_from_reg(const struct it87_data *data, u8 reg)
573 if (has_newer_autopwm(data))
576 return (reg & 0x7f) << 1;
579 static int DIV_TO_REG(int val)
583 while (answer < 7 && (val >>= 1))
588 #define DIV_FROM_REG(val) BIT(val)
591 * PWM base frequencies. The frequency has to be divided by either 128 or 256,
592 * depending on the chip type, to calculate the actual PWM frequency.
594 * Some of the chip datasheets suggest a base frequency of 51 kHz instead
595 * of 750 kHz for the slowest base frequency, resulting in a PWM frequency
596 * of 200 Hz. Sometimes both PWM frequency select registers are affected,
597 * sometimes just one. It is unknown if this is a datasheet error or real,
598 * so this is ignored for now.
600 static const unsigned int pwm_freq[8] = {
612 * Must be called with data->update_lock held, except during initialization.
613 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
614 * would slow down the IT87 access and should not be necessary.
616 static int it87_read_value(struct it87_data *data, u8 reg)
618 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
619 return inb_p(data->addr + IT87_DATA_REG_OFFSET);
623 * Must be called with data->update_lock held, except during initialization.
624 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
625 * would slow down the IT87 access and should not be necessary.
627 static void it87_write_value(struct it87_data *data, u8 reg, u8 value)
629 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
630 outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
633 static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
635 data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM[nr]);
636 if (has_newer_autopwm(data)) {
637 data->pwm_temp_map[nr] = (data->pwm_ctrl[nr] & 0x03) +
639 data->pwm_duty[nr] = it87_read_value(data,
640 IT87_REG_PWM_DUTY[nr]);
642 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
643 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
644 else /* Manual mode */
645 data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
648 if (has_old_autopwm(data)) {
651 for (i = 0; i < 5 ; i++)
652 data->auto_temp[nr][i] = it87_read_value(data,
653 IT87_REG_AUTO_TEMP(nr, i));
654 for (i = 0; i < 3 ; i++)
655 data->auto_pwm[nr][i] = it87_read_value(data,
656 IT87_REG_AUTO_PWM(nr, i));
660 static struct it87_data *it87_update_device(struct device *dev)
662 struct it87_data *data = dev_get_drvdata(dev);
665 mutex_lock(&data->update_lock);
667 if (time_after(jiffies, data->last_updated + HZ + HZ / 2) ||
671 * Cleared after each update, so reenable. Value
672 * returned by this read will be previous value
674 it87_write_value(data, IT87_REG_CONFIG,
675 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
677 for (i = 0; i < NUM_VIN; i++) {
678 if (!(data->has_in & BIT(i)))
682 it87_read_value(data, IT87_REG_VIN[i]);
684 /* VBAT and AVCC don't have limit registers */
689 it87_read_value(data, IT87_REG_VIN_MIN(i));
691 it87_read_value(data, IT87_REG_VIN_MAX(i));
694 for (i = 0; i < NUM_FAN; i++) {
695 /* Skip disabled fans */
696 if (!(data->has_fan & BIT(i)))
700 it87_read_value(data, IT87_REG_FAN_MIN[i]);
701 data->fan[i][0] = it87_read_value(data,
703 /* Add high byte if in 16-bit mode */
704 if (has_16bit_fans(data)) {
705 data->fan[i][0] |= it87_read_value(data,
706 IT87_REG_FANX[i]) << 8;
707 data->fan[i][1] |= it87_read_value(data,
708 IT87_REG_FANX_MIN[i]) << 8;
711 for (i = 0; i < NUM_TEMP; i++) {
712 if (!(data->has_temp & BIT(i)))
715 it87_read_value(data, IT87_REG_TEMP(i));
717 if (has_temp_offset(data) && i < NUM_TEMP_OFFSET)
719 it87_read_value(data,
720 IT87_REG_TEMP_OFFSET[i]);
722 if (i >= NUM_TEMP_LIMIT)
726 it87_read_value(data, IT87_REG_TEMP_LOW(i));
728 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
731 /* Newer chips don't have clock dividers */
732 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
733 i = it87_read_value(data, IT87_REG_FAN_DIV);
734 data->fan_div[0] = i & 0x07;
735 data->fan_div[1] = (i >> 3) & 0x07;
736 data->fan_div[2] = (i & 0x40) ? 3 : 1;
740 it87_read_value(data, IT87_REG_ALARM1) |
741 (it87_read_value(data, IT87_REG_ALARM2) << 8) |
742 (it87_read_value(data, IT87_REG_ALARM3) << 16);
743 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
745 data->fan_main_ctrl = it87_read_value(data,
746 IT87_REG_FAN_MAIN_CTRL);
747 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
748 for (i = 0; i < NUM_PWM; i++)
749 it87_update_pwm_ctrl(data, i);
751 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
752 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
754 * The IT8705F does not have VID capability.
755 * The IT8718F and later don't use IT87_REG_VID for the
758 if (data->type == it8712 || data->type == it8716) {
759 data->vid = it87_read_value(data, IT87_REG_VID);
761 * The older IT8712F revisions had only 5 VID pins,
762 * but we assume it is always safe to read 6 bits.
766 data->last_updated = jiffies;
770 mutex_unlock(&data->update_lock);
775 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
778 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
779 struct it87_data *data = it87_update_device(dev);
780 int index = sattr->index;
783 return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
786 static ssize_t set_in(struct device *dev, struct device_attribute *attr,
787 const char *buf, size_t count)
789 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
790 struct it87_data *data = dev_get_drvdata(dev);
791 int index = sattr->index;
795 if (kstrtoul(buf, 10, &val) < 0)
798 mutex_lock(&data->update_lock);
799 data->in[nr][index] = in_to_reg(data, nr, val);
800 it87_write_value(data,
801 index == 1 ? IT87_REG_VIN_MIN(nr)
802 : IT87_REG_VIN_MAX(nr),
803 data->in[nr][index]);
804 mutex_unlock(&data->update_lock);
808 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
809 static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
811 static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
814 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
815 static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
817 static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
820 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
821 static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
823 static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
826 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
827 static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
829 static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
832 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
833 static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
835 static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
838 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
839 static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
841 static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
844 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
845 static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
847 static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
850 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
851 static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
853 static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
856 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
857 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0);
858 static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in, NULL, 10, 0);
859 static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in, NULL, 11, 0);
860 static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in, NULL, 12, 0);
862 /* Up to 6 temperatures */
863 static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
866 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
868 int index = sattr->index;
869 struct it87_data *data = it87_update_device(dev);
871 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
874 static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
875 const char *buf, size_t count)
877 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
879 int index = sattr->index;
880 struct it87_data *data = dev_get_drvdata(dev);
884 if (kstrtol(buf, 10, &val) < 0)
887 mutex_lock(&data->update_lock);
892 reg = IT87_REG_TEMP_LOW(nr);
895 reg = IT87_REG_TEMP_HIGH(nr);
898 regval = it87_read_value(data, IT87_REG_BEEP_ENABLE);
899 if (!(regval & 0x80)) {
901 it87_write_value(data, IT87_REG_BEEP_ENABLE, regval);
904 reg = IT87_REG_TEMP_OFFSET[nr];
908 data->temp[nr][index] = TEMP_TO_REG(val);
909 it87_write_value(data, reg, data->temp[nr][index]);
910 mutex_unlock(&data->update_lock);
914 static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
915 static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
917 static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
919 static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
921 static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
922 static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
924 static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
926 static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
928 static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
929 static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
931 static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
933 static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
935 static SENSOR_DEVICE_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0);
936 static SENSOR_DEVICE_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0);
937 static SENSOR_DEVICE_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0);
939 static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
942 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
943 int nr = sensor_attr->index;
944 struct it87_data *data = it87_update_device(dev);
945 u8 reg = data->sensor; /* In case value is updated while used */
946 u8 extra = data->extra;
948 if ((has_temp_peci(data, nr) && (reg >> 6 == nr + 1)) ||
949 (has_temp_old_peci(data, nr) && (extra & 0x80)))
950 return sprintf(buf, "6\n"); /* Intel PECI */
952 return sprintf(buf, "3\n"); /* thermal diode */
954 return sprintf(buf, "4\n"); /* thermistor */
955 return sprintf(buf, "0\n"); /* disabled */
958 static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
959 const char *buf, size_t count)
961 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
962 int nr = sensor_attr->index;
964 struct it87_data *data = dev_get_drvdata(dev);
968 if (kstrtol(buf, 10, &val) < 0)
971 reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
974 if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6))
976 extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
977 if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6))
979 if (val == 2) { /* backwards compatibility */
981 "Sensor type 2 is deprecated, please use 4 instead\n");
984 /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */
989 else if (has_temp_peci(data, nr) && val == 6)
990 reg |= (nr + 1) << 6;
991 else if (has_temp_old_peci(data, nr) && val == 6)
996 mutex_lock(&data->update_lock);
999 it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
1000 if (has_temp_old_peci(data, nr))
1001 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1002 data->valid = 0; /* Force cache refresh */
1003 mutex_unlock(&data->update_lock);
1007 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1009 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1011 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1016 static int pwm_mode(const struct it87_data *data, int nr)
1018 int ctrl = data->fan_main_ctrl & BIT(nr);
1020 if (ctrl == 0 && data->type != it8603) /* Full speed */
1022 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
1024 else /* Manual mode */
1028 static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
1031 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1033 int index = sattr->index;
1035 struct it87_data *data = it87_update_device(dev);
1037 speed = has_16bit_fans(data) ?
1038 FAN16_FROM_REG(data->fan[nr][index]) :
1039 FAN_FROM_REG(data->fan[nr][index],
1040 DIV_FROM_REG(data->fan_div[nr]));
1041 return sprintf(buf, "%d\n", speed);
1044 static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
1047 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1048 struct it87_data *data = it87_update_device(dev);
1049 int nr = sensor_attr->index;
1051 return sprintf(buf, "%lu\n", DIV_FROM_REG(data->fan_div[nr]));
1054 static ssize_t show_pwm_enable(struct device *dev,
1055 struct device_attribute *attr, char *buf)
1057 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1058 struct it87_data *data = it87_update_device(dev);
1059 int nr = sensor_attr->index;
1061 return sprintf(buf, "%d\n", pwm_mode(data, nr));
1064 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
1067 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1068 struct it87_data *data = it87_update_device(dev);
1069 int nr = sensor_attr->index;
1071 return sprintf(buf, "%d\n",
1072 pwm_from_reg(data, data->pwm_duty[nr]));
1075 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
1078 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1079 struct it87_data *data = it87_update_device(dev);
1080 int nr = sensor_attr->index;
1084 if (has_pwm_freq2(data) && nr == 1)
1085 index = (data->extra >> 4) & 0x07;
1087 index = (data->fan_ctl >> 4) & 0x07;
1089 freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128);
1091 return sprintf(buf, "%u\n", freq);
1094 static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
1095 const char *buf, size_t count)
1097 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1099 int index = sattr->index;
1101 struct it87_data *data = dev_get_drvdata(dev);
1105 if (kstrtol(buf, 10, &val) < 0)
1108 mutex_lock(&data->update_lock);
1110 if (has_16bit_fans(data)) {
1111 data->fan[nr][index] = FAN16_TO_REG(val);
1112 it87_write_value(data, IT87_REG_FAN_MIN[nr],
1113 data->fan[nr][index] & 0xff);
1114 it87_write_value(data, IT87_REG_FANX_MIN[nr],
1115 data->fan[nr][index] >> 8);
1117 reg = it87_read_value(data, IT87_REG_FAN_DIV);
1120 data->fan_div[nr] = reg & 0x07;
1123 data->fan_div[nr] = (reg >> 3) & 0x07;
1126 data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
1129 data->fan[nr][index] =
1130 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
1131 it87_write_value(data, IT87_REG_FAN_MIN[nr],
1132 data->fan[nr][index]);
1135 mutex_unlock(&data->update_lock);
1139 static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
1140 const char *buf, size_t count)
1142 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1143 struct it87_data *data = dev_get_drvdata(dev);
1144 int nr = sensor_attr->index;
1149 if (kstrtoul(buf, 10, &val) < 0)
1152 mutex_lock(&data->update_lock);
1153 old = it87_read_value(data, IT87_REG_FAN_DIV);
1155 /* Save fan min limit */
1156 min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
1161 data->fan_div[nr] = DIV_TO_REG(val);
1165 data->fan_div[nr] = 1;
1167 data->fan_div[nr] = 3;
1170 val |= (data->fan_div[0] & 0x07);
1171 val |= (data->fan_div[1] & 0x07) << 3;
1172 if (data->fan_div[2] == 3)
1174 it87_write_value(data, IT87_REG_FAN_DIV, val);
1176 /* Restore fan min limit */
1177 data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
1178 it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan[nr][1]);
1180 mutex_unlock(&data->update_lock);
1184 /* Returns 0 if OK, -EINVAL otherwise */
1185 static int check_trip_points(struct device *dev, int nr)
1187 const struct it87_data *data = dev_get_drvdata(dev);
1190 if (has_old_autopwm(data)) {
1191 for (i = 0; i < 3; i++) {
1192 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1195 for (i = 0; i < 2; i++) {
1196 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1203 "Inconsistent trip points, not switching to automatic mode\n");
1204 dev_err(dev, "Adjust the trip points and try again\n");
1209 static ssize_t set_pwm_enable(struct device *dev, struct device_attribute *attr,
1210 const char *buf, size_t count)
1212 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1213 struct it87_data *data = dev_get_drvdata(dev);
1214 int nr = sensor_attr->index;
1217 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
1220 /* Check trip points before switching to automatic mode */
1222 if (check_trip_points(dev, nr) < 0)
1226 /* IT8603E does not have on/off mode */
1227 if (val == 0 && data->type == it8603)
1230 mutex_lock(&data->update_lock);
1234 /* make sure the fan is on when in on/off mode */
1235 tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1236 it87_write_value(data, IT87_REG_FAN_CTL, tmp | BIT(nr));
1237 /* set on/off mode */
1238 data->fan_main_ctrl &= ~BIT(nr);
1239 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1240 data->fan_main_ctrl);
1242 if (val == 1) /* Manual mode */
1243 data->pwm_ctrl[nr] = has_newer_autopwm(data) ?
1244 data->pwm_temp_map[nr] :
1246 else /* Automatic mode */
1247 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
1248 it87_write_value(data, IT87_REG_PWM[nr], data->pwm_ctrl[nr]);
1250 if (data->type != it8603) {
1251 /* set SmartGuardian mode */
1252 data->fan_main_ctrl |= BIT(nr);
1253 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1254 data->fan_main_ctrl);
1258 mutex_unlock(&data->update_lock);
1262 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1263 const char *buf, size_t count)
1265 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1266 struct it87_data *data = dev_get_drvdata(dev);
1267 int nr = sensor_attr->index;
1270 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1273 mutex_lock(&data->update_lock);
1274 if (has_newer_autopwm(data)) {
1276 * If we are in automatic mode, the PWM duty cycle register
1277 * is read-only so we can't write the value.
1279 if (data->pwm_ctrl[nr] & 0x80) {
1280 mutex_unlock(&data->update_lock);
1283 data->pwm_duty[nr] = pwm_to_reg(data, val);
1284 it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1285 data->pwm_duty[nr]);
1287 data->pwm_duty[nr] = pwm_to_reg(data, val);
1289 * If we are in manual mode, write the duty cycle immediately;
1290 * otherwise, just store it for later use.
1292 if (!(data->pwm_ctrl[nr] & 0x80)) {
1293 data->pwm_ctrl[nr] = data->pwm_duty[nr];
1294 it87_write_value(data, IT87_REG_PWM[nr],
1295 data->pwm_ctrl[nr]);
1298 mutex_unlock(&data->update_lock);
1302 static ssize_t set_pwm_freq(struct device *dev, struct device_attribute *attr,
1303 const char *buf, size_t count)
1305 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1306 struct it87_data *data = dev_get_drvdata(dev);
1307 int nr = sensor_attr->index;
1311 if (kstrtoul(buf, 10, &val) < 0)
1314 val = clamp_val(val, 0, 1000000);
1315 val *= has_newer_autopwm(data) ? 256 : 128;
1317 /* Search for the nearest available frequency */
1318 for (i = 0; i < 7; i++) {
1319 if (val > (pwm_freq[i] + pwm_freq[i + 1]) / 2)
1323 mutex_lock(&data->update_lock);
1325 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
1326 data->fan_ctl |= i << 4;
1327 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
1329 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x8f;
1330 data->extra |= i << 4;
1331 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1333 mutex_unlock(&data->update_lock);
1338 static ssize_t show_pwm_temp_map(struct device *dev,
1339 struct device_attribute *attr, char *buf)
1341 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1342 struct it87_data *data = it87_update_device(dev);
1343 int nr = sensor_attr->index;
1346 if (data->pwm_temp_map[nr] < 3)
1347 map = BIT(data->pwm_temp_map[nr]);
1349 map = 0; /* Should never happen */
1350 return sprintf(buf, "%d\n", map);
1353 static ssize_t set_pwm_temp_map(struct device *dev,
1354 struct device_attribute *attr, const char *buf,
1357 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1358 struct it87_data *data = dev_get_drvdata(dev);
1359 int nr = sensor_attr->index;
1363 if (kstrtol(buf, 10, &val) < 0)
1380 mutex_lock(&data->update_lock);
1381 data->pwm_temp_map[nr] = reg;
1383 * If we are in automatic mode, write the temp mapping immediately;
1384 * otherwise, just store it for later use.
1386 if (data->pwm_ctrl[nr] & 0x80) {
1387 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
1388 it87_write_value(data, IT87_REG_PWM[nr], data->pwm_ctrl[nr]);
1390 mutex_unlock(&data->update_lock);
1394 static ssize_t show_auto_pwm(struct device *dev, struct device_attribute *attr,
1397 struct it87_data *data = it87_update_device(dev);
1398 struct sensor_device_attribute_2 *sensor_attr =
1399 to_sensor_dev_attr_2(attr);
1400 int nr = sensor_attr->nr;
1401 int point = sensor_attr->index;
1403 return sprintf(buf, "%d\n",
1404 pwm_from_reg(data, data->auto_pwm[nr][point]));
1407 static ssize_t set_auto_pwm(struct device *dev, struct device_attribute *attr,
1408 const char *buf, size_t count)
1410 struct it87_data *data = dev_get_drvdata(dev);
1411 struct sensor_device_attribute_2 *sensor_attr =
1412 to_sensor_dev_attr_2(attr);
1413 int nr = sensor_attr->nr;
1414 int point = sensor_attr->index;
1417 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1420 mutex_lock(&data->update_lock);
1421 data->auto_pwm[nr][point] = pwm_to_reg(data, val);
1422 it87_write_value(data, IT87_REG_AUTO_PWM(nr, point),
1423 data->auto_pwm[nr][point]);
1424 mutex_unlock(&data->update_lock);
1428 static ssize_t show_auto_temp(struct device *dev, struct device_attribute *attr,
1431 struct it87_data *data = it87_update_device(dev);
1432 struct sensor_device_attribute_2 *sensor_attr =
1433 to_sensor_dev_attr_2(attr);
1434 int nr = sensor_attr->nr;
1435 int point = sensor_attr->index;
1437 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->auto_temp[nr][point]));
1440 static ssize_t set_auto_temp(struct device *dev, struct device_attribute *attr,
1441 const char *buf, size_t count)
1443 struct it87_data *data = dev_get_drvdata(dev);
1444 struct sensor_device_attribute_2 *sensor_attr =
1445 to_sensor_dev_attr_2(attr);
1446 int nr = sensor_attr->nr;
1447 int point = sensor_attr->index;
1450 if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
1453 mutex_lock(&data->update_lock);
1454 data->auto_temp[nr][point] = TEMP_TO_REG(val);
1455 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point),
1456 data->auto_temp[nr][point]);
1457 mutex_unlock(&data->update_lock);
1461 static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
1462 static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1464 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
1467 static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
1468 static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1470 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
1473 static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
1474 static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1476 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
1479 static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
1480 static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1483 static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
1484 static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1487 static SENSOR_DEVICE_ATTR_2(fan6_input, S_IRUGO, show_fan, NULL, 5, 0);
1488 static SENSOR_DEVICE_ATTR_2(fan6_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1491 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
1492 show_pwm_enable, set_pwm_enable, 0);
1493 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0);
1494 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq,
1496 static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO,
1497 show_pwm_temp_map, set_pwm_temp_map, 0);
1498 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR,
1499 show_auto_pwm, set_auto_pwm, 0, 0);
1500 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR,
1501 show_auto_pwm, set_auto_pwm, 0, 1);
1502 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR,
1503 show_auto_pwm, set_auto_pwm, 0, 2);
1504 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO,
1505 show_auto_pwm, NULL, 0, 3);
1506 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
1507 show_auto_temp, set_auto_temp, 0, 1);
1508 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1509 show_auto_temp, set_auto_temp, 0, 0);
1510 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
1511 show_auto_temp, set_auto_temp, 0, 2);
1512 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
1513 show_auto_temp, set_auto_temp, 0, 3);
1514 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR,
1515 show_auto_temp, set_auto_temp, 0, 4);
1517 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
1518 show_pwm_enable, set_pwm_enable, 1);
1519 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1);
1520 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, set_pwm_freq, 1);
1521 static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO,
1522 show_pwm_temp_map, set_pwm_temp_map, 1);
1523 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR,
1524 show_auto_pwm, set_auto_pwm, 1, 0);
1525 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR,
1526 show_auto_pwm, set_auto_pwm, 1, 1);
1527 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR,
1528 show_auto_pwm, set_auto_pwm, 1, 2);
1529 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO,
1530 show_auto_pwm, NULL, 1, 3);
1531 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
1532 show_auto_temp, set_auto_temp, 1, 1);
1533 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1534 show_auto_temp, set_auto_temp, 1, 0);
1535 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
1536 show_auto_temp, set_auto_temp, 1, 2);
1537 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
1538 show_auto_temp, set_auto_temp, 1, 3);
1539 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR,
1540 show_auto_temp, set_auto_temp, 1, 4);
1542 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
1543 show_pwm_enable, set_pwm_enable, 2);
1544 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2);
1545 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL, 2);
1546 static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO,
1547 show_pwm_temp_map, set_pwm_temp_map, 2);
1548 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR,
1549 show_auto_pwm, set_auto_pwm, 2, 0);
1550 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR,
1551 show_auto_pwm, set_auto_pwm, 2, 1);
1552 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR,
1553 show_auto_pwm, set_auto_pwm, 2, 2);
1554 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO,
1555 show_auto_pwm, NULL, 2, 3);
1556 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
1557 show_auto_temp, set_auto_temp, 2, 1);
1558 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1559 show_auto_temp, set_auto_temp, 2, 0);
1560 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
1561 show_auto_temp, set_auto_temp, 2, 2);
1562 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
1563 show_auto_temp, set_auto_temp, 2, 3);
1564 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR,
1565 show_auto_temp, set_auto_temp, 2, 4);
1567 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IRUGO | S_IWUSR,
1568 show_pwm_enable, set_pwm_enable, 3);
1569 static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 3);
1570 static SENSOR_DEVICE_ATTR(pwm4_freq, S_IRUGO, show_pwm_freq, NULL, 3);
1571 static SENSOR_DEVICE_ATTR(pwm4_auto_channels_temp, S_IRUGO,
1572 show_pwm_temp_map, set_pwm_temp_map, 3);
1574 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IRUGO | S_IWUSR,
1575 show_pwm_enable, set_pwm_enable, 4);
1576 static SENSOR_DEVICE_ATTR(pwm5, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 4);
1577 static SENSOR_DEVICE_ATTR(pwm5_freq, S_IRUGO, show_pwm_freq, NULL, 4);
1578 static SENSOR_DEVICE_ATTR(pwm5_auto_channels_temp, S_IRUGO,
1579 show_pwm_temp_map, set_pwm_temp_map, 4);
1581 static SENSOR_DEVICE_ATTR(pwm6_enable, S_IRUGO | S_IWUSR,
1582 show_pwm_enable, set_pwm_enable, 5);
1583 static SENSOR_DEVICE_ATTR(pwm6, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 5);
1584 static SENSOR_DEVICE_ATTR(pwm6_freq, S_IRUGO, show_pwm_freq, NULL, 5);
1585 static SENSOR_DEVICE_ATTR(pwm6_auto_channels_temp, S_IRUGO,
1586 show_pwm_temp_map, set_pwm_temp_map, 5);
1589 static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
1592 struct it87_data *data = it87_update_device(dev);
1594 return sprintf(buf, "%u\n", data->alarms);
1596 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
1598 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
1601 struct it87_data *data = it87_update_device(dev);
1602 int bitnr = to_sensor_dev_attr(attr)->index;
1604 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
1607 static ssize_t clear_intrusion(struct device *dev,
1608 struct device_attribute *attr, const char *buf,
1611 struct it87_data *data = dev_get_drvdata(dev);
1615 if (kstrtol(buf, 10, &val) < 0 || val != 0)
1618 mutex_lock(&data->update_lock);
1619 config = it87_read_value(data, IT87_REG_CONFIG);
1624 it87_write_value(data, IT87_REG_CONFIG, config);
1625 /* Invalidate cache to force re-read */
1628 mutex_unlock(&data->update_lock);
1633 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
1634 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
1635 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
1636 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
1637 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
1638 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
1639 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
1640 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
1641 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
1642 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
1643 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
1644 static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
1645 static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
1646 static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 7);
1647 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
1648 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
1649 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
1650 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
1651 show_alarm, clear_intrusion, 4);
1653 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
1656 struct it87_data *data = it87_update_device(dev);
1657 int bitnr = to_sensor_dev_attr(attr)->index;
1659 return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
1662 static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
1663 const char *buf, size_t count)
1665 int bitnr = to_sensor_dev_attr(attr)->index;
1666 struct it87_data *data = dev_get_drvdata(dev);
1669 if (kstrtol(buf, 10, &val) < 0 || (val != 0 && val != 1))
1672 mutex_lock(&data->update_lock);
1673 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1675 data->beeps |= BIT(bitnr);
1677 data->beeps &= ~BIT(bitnr);
1678 it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
1679 mutex_unlock(&data->update_lock);
1683 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
1684 show_beep, set_beep, 1);
1685 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
1686 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
1687 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
1688 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
1689 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
1690 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
1691 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
1692 /* fanX_beep writability is set later */
1693 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
1694 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
1695 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
1696 static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
1697 static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
1698 static SENSOR_DEVICE_ATTR(fan6_beep, S_IRUGO, show_beep, set_beep, 0);
1699 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
1700 show_beep, set_beep, 2);
1701 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
1702 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
1704 static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
1707 struct it87_data *data = dev_get_drvdata(dev);
1709 return sprintf(buf, "%u\n", data->vrm);
1712 static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
1713 const char *buf, size_t count)
1715 struct it87_data *data = dev_get_drvdata(dev);
1718 if (kstrtoul(buf, 10, &val) < 0)
1725 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
1727 static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
1730 struct it87_data *data = it87_update_device(dev);
1732 return sprintf(buf, "%ld\n", (long)vid_from_reg(data->vid, data->vrm));
1734 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
1736 static ssize_t show_label(struct device *dev, struct device_attribute *attr,
1739 static const char * const labels[] = {
1744 static const char * const labels_it8721[] = {
1749 struct it87_data *data = dev_get_drvdata(dev);
1750 int nr = to_sensor_dev_attr(attr)->index;
1752 return sprintf(buf, "%s\n", has_12mv_adc(data) ? labels_it8721[nr]
1755 static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
1756 static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
1757 static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
1759 static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 0);
1761 static umode_t it87_in_is_visible(struct kobject *kobj,
1762 struct attribute *attr, int index)
1764 struct device *dev = container_of(kobj, struct device, kobj);
1765 struct it87_data *data = dev_get_drvdata(dev);
1766 int i = index / 5; /* voltage index */
1767 int a = index % 5; /* attribute index */
1769 if (index >= 40) { /* in8 and higher only have input attributes */
1774 if (!(data->has_in & BIT(i)))
1777 if (a == 4 && !data->has_beep)
1783 static struct attribute *it87_attributes_in[] = {
1784 &sensor_dev_attr_in0_input.dev_attr.attr,
1785 &sensor_dev_attr_in0_min.dev_attr.attr,
1786 &sensor_dev_attr_in0_max.dev_attr.attr,
1787 &sensor_dev_attr_in0_alarm.dev_attr.attr,
1788 &sensor_dev_attr_in0_beep.dev_attr.attr, /* 4 */
1790 &sensor_dev_attr_in1_input.dev_attr.attr,
1791 &sensor_dev_attr_in1_min.dev_attr.attr,
1792 &sensor_dev_attr_in1_max.dev_attr.attr,
1793 &sensor_dev_attr_in1_alarm.dev_attr.attr,
1794 &sensor_dev_attr_in1_beep.dev_attr.attr, /* 9 */
1796 &sensor_dev_attr_in2_input.dev_attr.attr,
1797 &sensor_dev_attr_in2_min.dev_attr.attr,
1798 &sensor_dev_attr_in2_max.dev_attr.attr,
1799 &sensor_dev_attr_in2_alarm.dev_attr.attr,
1800 &sensor_dev_attr_in2_beep.dev_attr.attr, /* 14 */
1802 &sensor_dev_attr_in3_input.dev_attr.attr,
1803 &sensor_dev_attr_in3_min.dev_attr.attr,
1804 &sensor_dev_attr_in3_max.dev_attr.attr,
1805 &sensor_dev_attr_in3_alarm.dev_attr.attr,
1806 &sensor_dev_attr_in3_beep.dev_attr.attr, /* 19 */
1808 &sensor_dev_attr_in4_input.dev_attr.attr,
1809 &sensor_dev_attr_in4_min.dev_attr.attr,
1810 &sensor_dev_attr_in4_max.dev_attr.attr,
1811 &sensor_dev_attr_in4_alarm.dev_attr.attr,
1812 &sensor_dev_attr_in4_beep.dev_attr.attr, /* 24 */
1814 &sensor_dev_attr_in5_input.dev_attr.attr,
1815 &sensor_dev_attr_in5_min.dev_attr.attr,
1816 &sensor_dev_attr_in5_max.dev_attr.attr,
1817 &sensor_dev_attr_in5_alarm.dev_attr.attr,
1818 &sensor_dev_attr_in5_beep.dev_attr.attr, /* 29 */
1820 &sensor_dev_attr_in6_input.dev_attr.attr,
1821 &sensor_dev_attr_in6_min.dev_attr.attr,
1822 &sensor_dev_attr_in6_max.dev_attr.attr,
1823 &sensor_dev_attr_in6_alarm.dev_attr.attr,
1824 &sensor_dev_attr_in6_beep.dev_attr.attr, /* 34 */
1826 &sensor_dev_attr_in7_input.dev_attr.attr,
1827 &sensor_dev_attr_in7_min.dev_attr.attr,
1828 &sensor_dev_attr_in7_max.dev_attr.attr,
1829 &sensor_dev_attr_in7_alarm.dev_attr.attr,
1830 &sensor_dev_attr_in7_beep.dev_attr.attr, /* 39 */
1832 &sensor_dev_attr_in8_input.dev_attr.attr, /* 40 */
1833 &sensor_dev_attr_in9_input.dev_attr.attr, /* 41 */
1834 &sensor_dev_attr_in10_input.dev_attr.attr, /* 41 */
1835 &sensor_dev_attr_in11_input.dev_attr.attr, /* 41 */
1836 &sensor_dev_attr_in12_input.dev_attr.attr, /* 41 */
1839 static const struct attribute_group it87_group_in = {
1840 .attrs = it87_attributes_in,
1841 .is_visible = it87_in_is_visible,
1844 static umode_t it87_temp_is_visible(struct kobject *kobj,
1845 struct attribute *attr, int index)
1847 struct device *dev = container_of(kobj, struct device, kobj);
1848 struct it87_data *data = dev_get_drvdata(dev);
1849 int i = index / 7; /* temperature index */
1850 int a = index % 7; /* attribute index */
1857 if (!(data->has_temp & BIT(i)))
1860 if (a == 5 && !has_temp_offset(data))
1863 if (a == 6 && !data->has_beep)
1869 static struct attribute *it87_attributes_temp[] = {
1870 &sensor_dev_attr_temp1_input.dev_attr.attr,
1871 &sensor_dev_attr_temp1_max.dev_attr.attr,
1872 &sensor_dev_attr_temp1_min.dev_attr.attr,
1873 &sensor_dev_attr_temp1_type.dev_attr.attr,
1874 &sensor_dev_attr_temp1_alarm.dev_attr.attr,
1875 &sensor_dev_attr_temp1_offset.dev_attr.attr, /* 5 */
1876 &sensor_dev_attr_temp1_beep.dev_attr.attr, /* 6 */
1878 &sensor_dev_attr_temp2_input.dev_attr.attr, /* 7 */
1879 &sensor_dev_attr_temp2_max.dev_attr.attr,
1880 &sensor_dev_attr_temp2_min.dev_attr.attr,
1881 &sensor_dev_attr_temp2_type.dev_attr.attr,
1882 &sensor_dev_attr_temp2_alarm.dev_attr.attr,
1883 &sensor_dev_attr_temp2_offset.dev_attr.attr,
1884 &sensor_dev_attr_temp2_beep.dev_attr.attr,
1886 &sensor_dev_attr_temp3_input.dev_attr.attr, /* 14 */
1887 &sensor_dev_attr_temp3_max.dev_attr.attr,
1888 &sensor_dev_attr_temp3_min.dev_attr.attr,
1889 &sensor_dev_attr_temp3_type.dev_attr.attr,
1890 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
1891 &sensor_dev_attr_temp3_offset.dev_attr.attr,
1892 &sensor_dev_attr_temp3_beep.dev_attr.attr,
1894 &sensor_dev_attr_temp4_input.dev_attr.attr, /* 21 */
1895 &sensor_dev_attr_temp5_input.dev_attr.attr,
1896 &sensor_dev_attr_temp6_input.dev_attr.attr,
1900 static const struct attribute_group it87_group_temp = {
1901 .attrs = it87_attributes_temp,
1902 .is_visible = it87_temp_is_visible,
1905 static umode_t it87_is_visible(struct kobject *kobj,
1906 struct attribute *attr, int index)
1908 struct device *dev = container_of(kobj, struct device, kobj);
1909 struct it87_data *data = dev_get_drvdata(dev);
1911 if ((index == 2 || index == 3) && !data->has_vid)
1914 if (index > 3 && !(data->in_internal & BIT(index - 4)))
1920 static struct attribute *it87_attributes[] = {
1921 &dev_attr_alarms.attr,
1922 &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
1923 &dev_attr_vrm.attr, /* 2 */
1924 &dev_attr_cpu0_vid.attr, /* 3 */
1925 &sensor_dev_attr_in3_label.dev_attr.attr, /* 4 .. 7 */
1926 &sensor_dev_attr_in7_label.dev_attr.attr,
1927 &sensor_dev_attr_in8_label.dev_attr.attr,
1928 &sensor_dev_attr_in9_label.dev_attr.attr,
1932 static const struct attribute_group it87_group = {
1933 .attrs = it87_attributes,
1934 .is_visible = it87_is_visible,
1937 static umode_t it87_fan_is_visible(struct kobject *kobj,
1938 struct attribute *attr, int index)
1940 struct device *dev = container_of(kobj, struct device, kobj);
1941 struct it87_data *data = dev_get_drvdata(dev);
1942 int i = index / 5; /* fan index */
1943 int a = index % 5; /* attribute index */
1945 if (index >= 15) { /* fan 4..6 don't have divisor attributes */
1946 i = (index - 15) / 4 + 3;
1947 a = (index - 15) % 4;
1950 if (!(data->has_fan & BIT(i)))
1953 if (a == 3) { /* beep */
1954 if (!data->has_beep)
1956 /* first fan beep attribute is writable */
1957 if (i == __ffs(data->has_fan))
1958 return attr->mode | S_IWUSR;
1961 if (a == 4 && has_16bit_fans(data)) /* divisor */
1967 static struct attribute *it87_attributes_fan[] = {
1968 &sensor_dev_attr_fan1_input.dev_attr.attr,
1969 &sensor_dev_attr_fan1_min.dev_attr.attr,
1970 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
1971 &sensor_dev_attr_fan1_beep.dev_attr.attr, /* 3 */
1972 &sensor_dev_attr_fan1_div.dev_attr.attr, /* 4 */
1974 &sensor_dev_attr_fan2_input.dev_attr.attr,
1975 &sensor_dev_attr_fan2_min.dev_attr.attr,
1976 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
1977 &sensor_dev_attr_fan2_beep.dev_attr.attr,
1978 &sensor_dev_attr_fan2_div.dev_attr.attr, /* 9 */
1980 &sensor_dev_attr_fan3_input.dev_attr.attr,
1981 &sensor_dev_attr_fan3_min.dev_attr.attr,
1982 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
1983 &sensor_dev_attr_fan3_beep.dev_attr.attr,
1984 &sensor_dev_attr_fan3_div.dev_attr.attr, /* 14 */
1986 &sensor_dev_attr_fan4_input.dev_attr.attr, /* 15 */
1987 &sensor_dev_attr_fan4_min.dev_attr.attr,
1988 &sensor_dev_attr_fan4_alarm.dev_attr.attr,
1989 &sensor_dev_attr_fan4_beep.dev_attr.attr,
1991 &sensor_dev_attr_fan5_input.dev_attr.attr, /* 19 */
1992 &sensor_dev_attr_fan5_min.dev_attr.attr,
1993 &sensor_dev_attr_fan5_alarm.dev_attr.attr,
1994 &sensor_dev_attr_fan5_beep.dev_attr.attr,
1996 &sensor_dev_attr_fan6_input.dev_attr.attr, /* 23 */
1997 &sensor_dev_attr_fan6_min.dev_attr.attr,
1998 &sensor_dev_attr_fan6_alarm.dev_attr.attr,
1999 &sensor_dev_attr_fan6_beep.dev_attr.attr,
2003 static const struct attribute_group it87_group_fan = {
2004 .attrs = it87_attributes_fan,
2005 .is_visible = it87_fan_is_visible,
2008 static umode_t it87_pwm_is_visible(struct kobject *kobj,
2009 struct attribute *attr, int index)
2011 struct device *dev = container_of(kobj, struct device, kobj);
2012 struct it87_data *data = dev_get_drvdata(dev);
2013 int i = index / 4; /* pwm index */
2014 int a = index % 4; /* attribute index */
2016 if (!(data->has_pwm & BIT(i)))
2019 /* pwmX_auto_channels_temp is only writable for old auto pwm */
2020 if (a == 3 && has_old_autopwm(data))
2021 return attr->mode | S_IWUSR;
2023 /* pwm2_freq is writable if there are two pwm frequency selects */
2024 if (has_pwm_freq2(data) && i == 1 && a == 2)
2025 return attr->mode | S_IWUSR;
2030 static struct attribute *it87_attributes_pwm[] = {
2031 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2032 &sensor_dev_attr_pwm1.dev_attr.attr,
2033 &sensor_dev_attr_pwm1_freq.dev_attr.attr,
2034 &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
2036 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2037 &sensor_dev_attr_pwm2.dev_attr.attr,
2038 &sensor_dev_attr_pwm2_freq.dev_attr.attr,
2039 &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
2041 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2042 &sensor_dev_attr_pwm3.dev_attr.attr,
2043 &sensor_dev_attr_pwm3_freq.dev_attr.attr,
2044 &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
2046 &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2047 &sensor_dev_attr_pwm4.dev_attr.attr,
2048 &sensor_dev_attr_pwm4_freq.dev_attr.attr,
2049 &sensor_dev_attr_pwm4_auto_channels_temp.dev_attr.attr,
2051 &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2052 &sensor_dev_attr_pwm5.dev_attr.attr,
2053 &sensor_dev_attr_pwm5_freq.dev_attr.attr,
2054 &sensor_dev_attr_pwm5_auto_channels_temp.dev_attr.attr,
2056 &sensor_dev_attr_pwm6_enable.dev_attr.attr,
2057 &sensor_dev_attr_pwm6.dev_attr.attr,
2058 &sensor_dev_attr_pwm6_freq.dev_attr.attr,
2059 &sensor_dev_attr_pwm6_auto_channels_temp.dev_attr.attr,
2064 static const struct attribute_group it87_group_pwm = {
2065 .attrs = it87_attributes_pwm,
2066 .is_visible = it87_pwm_is_visible,
2069 static umode_t it87_auto_pwm_is_visible(struct kobject *kobj,
2070 struct attribute *attr, int index)
2072 struct device *dev = container_of(kobj, struct device, kobj);
2073 struct it87_data *data = dev_get_drvdata(dev);
2074 int i = index / 9; /* pwm index */
2076 if (!(data->has_pwm & BIT(i)))
2082 static struct attribute *it87_attributes_auto_pwm[] = {
2083 &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
2084 &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
2085 &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
2086 &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
2087 &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
2088 &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
2089 &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
2090 &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
2091 &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
2093 &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,
2094 &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
2095 &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
2096 &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
2097 &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
2098 &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
2099 &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
2100 &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
2101 &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
2103 &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,
2104 &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
2105 &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
2106 &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
2107 &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
2108 &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
2109 &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
2110 &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
2111 &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
2116 static const struct attribute_group it87_group_auto_pwm = {
2117 .attrs = it87_attributes_auto_pwm,
2118 .is_visible = it87_auto_pwm_is_visible,
2121 /* SuperIO detection - will change isa_address if a chip is found */
2122 static int __init it87_find(int sioaddr, unsigned short *address,
2123 struct it87_sio_data *sio_data)
2127 const char *board_vendor, *board_name;
2128 const struct it87_devices *config;
2130 err = superio_enter(sioaddr);
2135 chip_type = force_id ? force_id : superio_inw(sioaddr, DEVID);
2137 switch (chip_type) {
2139 sio_data->type = it87;
2142 sio_data->type = it8712;
2146 sio_data->type = it8716;
2149 sio_data->type = it8718;
2152 sio_data->type = it8720;
2155 sio_data->type = it8721;
2158 sio_data->type = it8728;
2161 sio_data->type = it8771;
2164 sio_data->type = it8772;
2167 sio_data->type = it8781;
2170 sio_data->type = it8782;
2173 sio_data->type = it8783;
2176 sio_data->type = it8786;
2179 sio_data->type = it8790;
2183 sio_data->type = it8603;
2186 sio_data->type = it8620;
2188 case 0xffff: /* No device at all */
2191 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
2195 superio_select(sioaddr, PME);
2196 if (!(superio_inb(sioaddr, IT87_ACT_REG) & 0x01)) {
2197 pr_info("Device not activated, skipping\n");
2201 *address = superio_inw(sioaddr, IT87_BASE_REG) & ~(IT87_EXTENT - 1);
2202 if (*address == 0) {
2203 pr_info("Base address not set, skipping\n");
2208 sio_data->revision = superio_inb(sioaddr, DEVREV) & 0x0f;
2209 pr_info("Found IT%04x%s chip at 0x%x, revision %d\n", chip_type,
2210 it87_devices[sio_data->type].suffix,
2211 *address, sio_data->revision);
2213 config = &it87_devices[sio_data->type];
2215 /* in7 (VSB or VCCH5V) is always internal on some chips */
2216 if (has_in7_internal(config))
2217 sio_data->internal |= BIT(1);
2219 /* in8 (Vbat) is always internal */
2220 sio_data->internal |= BIT(2);
2222 /* in9 (AVCC3), always internal if supported */
2223 if (has_avcc3(config))
2224 sio_data->internal |= BIT(3); /* in9 is AVCC */
2226 sio_data->skip_in |= BIT(9);
2228 if (!has_six_pwm(config))
2229 sio_data->skip_pwm |= BIT(3) | BIT(4) | BIT(5);
2231 if (!has_vid(config))
2232 sio_data->skip_vid = 1;
2234 /* Read GPIO config and VID value from LDN 7 (GPIO) */
2235 if (sio_data->type == it87) {
2236 /* The IT8705F has a different LD number for GPIO */
2237 superio_select(sioaddr, 5);
2238 sio_data->beep_pin = superio_inb(sioaddr,
2239 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2240 } else if (sio_data->type == it8783) {
2241 int reg25, reg27, reg2a, reg2c, regef;
2243 superio_select(sioaddr, GPIO);
2245 reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2246 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2247 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
2248 reg2c = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2249 regef = superio_inb(sioaddr, IT87_SIO_SPI_REG);
2251 /* Check if fan3 is there or not */
2252 if ((reg27 & BIT(0)) || !(reg2c & BIT(2)))
2253 sio_data->skip_fan |= BIT(2);
2254 if ((reg25 & BIT(4)) ||
2255 (!(reg2a & BIT(1)) && (regef & BIT(0))))
2256 sio_data->skip_pwm |= BIT(2);
2258 /* Check if fan2 is there or not */
2260 sio_data->skip_fan |= BIT(1);
2262 sio_data->skip_pwm |= BIT(1);
2265 if ((reg27 & BIT(0)) || (reg2c & BIT(2)))
2266 sio_data->skip_in |= BIT(5); /* No VIN5 */
2270 sio_data->skip_in |= BIT(6); /* No VIN6 */
2274 * Does not depend on bit 2 of Reg2C, contrary to datasheet.
2276 if (reg27 & BIT(2)) {
2278 * The data sheet is a bit unclear regarding the
2279 * internal voltage divider for VCCH5V. It says
2280 * "This bit enables and switches VIN7 (pin 91) to the
2281 * internal voltage divider for VCCH5V".
2282 * This is different to other chips, where the internal
2283 * voltage divider would connect VIN7 to an internal
2284 * voltage source. Maybe that is the case here as well.
2286 * Since we don't know for sure, re-route it if that is
2287 * not the case, and ask the user to report if the
2288 * resulting voltage is sane.
2290 if (!(reg2c & BIT(1))) {
2292 superio_outb(sioaddr, IT87_SIO_PINX2_REG,
2294 pr_notice("Routing internal VCCH5V to in7.\n");
2296 pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
2297 pr_notice("Please report if it displays a reasonable voltage.\n");
2301 sio_data->internal |= BIT(0);
2303 sio_data->internal |= BIT(1);
2305 sio_data->beep_pin = superio_inb(sioaddr,
2306 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2307 } else if (sio_data->type == it8603) {
2310 superio_select(sioaddr, GPIO);
2312 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2314 /* Check if fan3 is there or not */
2316 sio_data->skip_pwm |= BIT(2);
2318 sio_data->skip_fan |= BIT(2);
2320 /* Check if fan2 is there or not */
2321 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2323 sio_data->skip_pwm |= BIT(1);
2325 sio_data->skip_fan |= BIT(1);
2327 sio_data->skip_in |= BIT(5); /* No VIN5 */
2328 sio_data->skip_in |= BIT(6); /* No VIN6 */
2330 sio_data->beep_pin = superio_inb(sioaddr,
2331 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2332 } else if (sio_data->type == it8620) {
2335 superio_select(sioaddr, GPIO);
2337 /* Check for pwm5 */
2338 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2340 sio_data->skip_pwm |= BIT(4);
2342 /* Check for fan4, fan5 */
2343 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2344 if (!(reg & BIT(5)))
2345 sio_data->skip_fan |= BIT(3);
2346 if (!(reg & BIT(4)))
2347 sio_data->skip_fan |= BIT(4);
2349 /* Check for pwm3, fan3 */
2350 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2352 sio_data->skip_pwm |= BIT(2);
2354 sio_data->skip_fan |= BIT(2);
2356 /* Check for pwm4 */
2357 reg = superio_inb(sioaddr, IT87_SIO_GPIO4_REG);
2358 if (!(reg & BIT(4)))
2359 sio_data->skip_pwm |= BIT(3);
2361 /* Check for pwm2, fan2 */
2362 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2364 sio_data->skip_pwm |= BIT(1);
2366 sio_data->skip_fan |= BIT(1);
2367 /* Check for pwm6, fan6 */
2368 if (!(reg & BIT(7))) {
2369 sio_data->skip_pwm |= BIT(5);
2370 sio_data->skip_fan |= BIT(5);
2373 sio_data->beep_pin = superio_inb(sioaddr,
2374 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2379 superio_select(sioaddr, GPIO);
2381 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2382 if (!sio_data->skip_vid) {
2383 /* We need at least 4 VID pins */
2385 pr_info("VID is disabled (pins used for GPIO)\n");
2386 sio_data->skip_vid = 1;
2390 /* Check if fan3 is there or not */
2392 sio_data->skip_pwm |= BIT(2);
2394 sio_data->skip_fan |= BIT(2);
2396 /* Check if fan2 is there or not */
2397 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2399 sio_data->skip_pwm |= BIT(1);
2401 sio_data->skip_fan |= BIT(1);
2403 if ((sio_data->type == it8718 || sio_data->type == it8720) &&
2404 !(sio_data->skip_vid))
2405 sio_data->vid_value = superio_inb(sioaddr,
2408 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2410 uart6 = sio_data->type == it8782 && (reg & BIT(2));
2413 * The IT8720F has no VIN7 pin, so VCCH should always be
2414 * routed internally to VIN7 with an internal divider.
2415 * Curiously, there still is a configuration bit to control
2416 * this, which means it can be set incorrectly. And even
2417 * more curiously, many boards out there are improperly
2418 * configured, even though the IT8720F datasheet claims
2419 * that the internal routing of VCCH to VIN7 is the default
2420 * setting. So we force the internal routing in this case.
2422 * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
2423 * If UART6 is enabled, re-route VIN7 to the internal divider
2424 * if that is not already the case.
2426 if ((sio_data->type == it8720 || uart6) && !(reg & BIT(1))) {
2428 superio_outb(sioaddr, IT87_SIO_PINX2_REG, reg);
2429 pr_notice("Routing internal VCCH to in7\n");
2432 sio_data->internal |= BIT(0);
2434 sio_data->internal |= BIT(1);
2437 * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
2438 * While VIN7 can be routed to the internal voltage divider,
2439 * VIN5 and VIN6 are not available if UART6 is enabled.
2441 * Also, temp3 is not available if UART6 is enabled and TEMPIN3
2442 * is the temperature source. Since we can not read the
2443 * temperature source here, skip_temp is preliminary.
2446 sio_data->skip_in |= BIT(5) | BIT(6);
2447 sio_data->skip_temp |= BIT(2);
2450 sio_data->beep_pin = superio_inb(sioaddr,
2451 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2453 if (sio_data->beep_pin)
2454 pr_info("Beeping is supported\n");
2456 /* Disable specific features based on DMI strings */
2457 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
2458 board_name = dmi_get_system_info(DMI_BOARD_NAME);
2459 if (board_vendor && board_name) {
2460 if (strcmp(board_vendor, "nVIDIA") == 0 &&
2461 strcmp(board_name, "FN68PT") == 0) {
2463 * On the Shuttle SN68PT, FAN_CTL2 is apparently not
2464 * connected to a fan, but to something else. One user
2465 * has reported instant system power-off when changing
2466 * the PWM2 duty cycle, so we disable it.
2467 * I use the board name string as the trigger in case
2468 * the same board is ever used in other systems.
2470 pr_info("Disabling pwm2 due to hardware constraints\n");
2471 sio_data->skip_pwm = BIT(1);
2476 superio_exit(sioaddr);
2480 /* Called when we have found a new IT87. */
2481 static void it87_init_device(struct platform_device *pdev)
2483 struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
2484 struct it87_data *data = platform_get_drvdata(pdev);
2489 * For each PWM channel:
2490 * - If it is in automatic mode, setting to manual mode should set
2491 * the fan to full speed by default.
2492 * - If it is in manual mode, we need a mapping to temperature
2493 * channels to use when later setting to automatic mode later.
2494 * Use a 1:1 mapping by default (we are clueless.)
2495 * In both cases, the value can (and should) be changed by the user
2496 * prior to switching to a different mode.
2497 * Note that this is no longer needed for the IT8721F and later, as
2498 * these have separate registers for the temperature mapping and the
2499 * manual duty cycle.
2501 for (i = 0; i < NUM_AUTO_PWM; i++) {
2502 data->pwm_temp_map[i] = i;
2503 data->pwm_duty[i] = 0x7f; /* Full speed */
2504 data->auto_pwm[i][3] = 0x7f; /* Full speed, hard-coded */
2508 * Some chips seem to have default value 0xff for all limit
2509 * registers. For low voltage limits it makes no sense and triggers
2510 * alarms, so change to 0 instead. For high temperature limits, it
2511 * means -1 degree C, which surprisingly doesn't trigger an alarm,
2512 * but is still confusing, so change to 127 degrees C.
2514 for (i = 0; i < NUM_VIN_LIMIT; i++) {
2515 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
2517 it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
2519 for (i = 0; i < NUM_TEMP_LIMIT; i++) {
2520 tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
2522 it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
2526 * Temperature channels are not forcibly enabled, as they can be
2527 * set to two different sensor types and we can't guess which one
2528 * is correct for a given system. These channels can be enabled at
2529 * run-time through the temp{1-3}_type sysfs accessors if needed.
2532 /* Check if voltage monitors are reset manually or by some reason */
2533 tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
2534 if ((tmp & 0xff) == 0) {
2535 /* Enable all voltage monitors */
2536 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
2539 /* Check if tachometers are reset manually or by some reason */
2540 mask = 0x70 & ~(sio_data->skip_fan << 4);
2541 data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
2542 if ((data->fan_main_ctrl & mask) == 0) {
2543 /* Enable all fan tachometers */
2544 data->fan_main_ctrl |= mask;
2545 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
2546 data->fan_main_ctrl);
2548 data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
2550 tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
2552 /* Set tachometers to 16-bit mode if needed */
2553 if (has_fan16_config(data)) {
2554 if (~tmp & 0x07 & data->has_fan) {
2556 "Setting fan1-3 to 16-bit mode\n");
2557 it87_write_value(data, IT87_REG_FAN_16BIT,
2562 /* Check for additional fans */
2563 if (has_five_fans(data)) {
2565 data->has_fan |= BIT(3); /* fan4 enabled */
2567 data->has_fan |= BIT(4); /* fan5 enabled */
2568 if (has_six_fans(data) && (tmp & BIT(2)))
2569 data->has_fan |= BIT(5); /* fan6 enabled */
2572 /* Fan input pins may be used for alternative functions */
2573 data->has_fan &= ~sio_data->skip_fan;
2575 /* Check if pwm5, pwm6 are enabled */
2576 if (has_six_pwm(data)) {
2577 /* The following code may be IT8620E specific */
2578 tmp = it87_read_value(data, IT87_REG_FAN_DIV);
2579 if ((tmp & 0xc0) == 0xc0)
2580 sio_data->skip_pwm |= BIT(4);
2581 if (!(tmp & BIT(3)))
2582 sio_data->skip_pwm |= BIT(5);
2585 /* Start monitoring */
2586 it87_write_value(data, IT87_REG_CONFIG,
2587 (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
2588 | (update_vbat ? 0x41 : 0x01));
2591 /* Return 1 if and only if the PWM interface is safe to use */
2592 static int it87_check_pwm(struct device *dev)
2594 struct it87_data *data = dev_get_drvdata(dev);
2596 * Some BIOSes fail to correctly configure the IT87 fans. All fans off
2597 * and polarity set to active low is sign that this is the case so we
2598 * disable pwm control to protect the user.
2600 int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
2602 if ((tmp & 0x87) == 0) {
2603 if (fix_pwm_polarity) {
2605 * The user asks us to attempt a chip reconfiguration.
2606 * This means switching to active high polarity and
2607 * inverting all fan speed values.
2612 for (i = 0; i < ARRAY_SIZE(pwm); i++)
2613 pwm[i] = it87_read_value(data,
2617 * If any fan is in automatic pwm mode, the polarity
2618 * might be correct, as suspicious as it seems, so we
2619 * better don't change anything (but still disable the
2622 if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
2624 "Reconfiguring PWM to active high polarity\n");
2625 it87_write_value(data, IT87_REG_FAN_CTL,
2627 for (i = 0; i < 3; i++)
2628 it87_write_value(data,
2635 "PWM configuration is too broken to be fixed\n");
2639 "Detected broken BIOS defaults, disabling PWM interface\n");
2641 } else if (fix_pwm_polarity) {
2643 "PWM configuration looks sane, won't touch\n");
2649 static int it87_probe(struct platform_device *pdev)
2651 struct it87_data *data;
2652 struct resource *res;
2653 struct device *dev = &pdev->dev;
2654 struct it87_sio_data *sio_data = dev_get_platdata(dev);
2655 int enable_pwm_interface;
2656 struct device *hwmon_dev;
2658 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
2659 if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
2661 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
2662 (unsigned long)res->start,
2663 (unsigned long)(res->start + IT87_EC_EXTENT - 1));
2667 data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
2671 data->addr = res->start;
2672 data->type = sio_data->type;
2673 data->features = it87_devices[sio_data->type].features;
2674 data->peci_mask = it87_devices[sio_data->type].peci_mask;
2675 data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
2677 * IT8705F Datasheet 0.4.1, 3h == Version G.
2678 * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
2679 * These are the first revisions with 16-bit tachometer support.
2681 switch (data->type) {
2683 if (sio_data->revision >= 0x03) {
2684 data->features &= ~FEAT_OLD_AUTOPWM;
2685 data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS;
2689 if (sio_data->revision >= 0x08) {
2690 data->features &= ~FEAT_OLD_AUTOPWM;
2691 data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS |
2699 /* Now, we do the remaining detection. */
2700 if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80) ||
2701 it87_read_value(data, IT87_REG_CHIPID) != 0x90)
2704 platform_set_drvdata(pdev, data);
2706 mutex_init(&data->update_lock);
2708 /* Check PWM configuration */
2709 enable_pwm_interface = it87_check_pwm(dev);
2711 /* Starting with IT8721F, we handle scaling of internal voltages */
2712 if (has_12mv_adc(data)) {
2713 if (sio_data->internal & BIT(0))
2714 data->in_scaled |= BIT(3); /* in3 is AVCC */
2715 if (sio_data->internal & BIT(1))
2716 data->in_scaled |= BIT(7); /* in7 is VSB */
2717 if (sio_data->internal & BIT(2))
2718 data->in_scaled |= BIT(8); /* in8 is Vbat */
2719 if (sio_data->internal & BIT(3))
2720 data->in_scaled |= BIT(9); /* in9 is AVCC */
2721 } else if (sio_data->type == it8781 || sio_data->type == it8782 ||
2722 sio_data->type == it8783) {
2723 if (sio_data->internal & BIT(0))
2724 data->in_scaled |= BIT(3); /* in3 is VCC5V */
2725 if (sio_data->internal & BIT(1))
2726 data->in_scaled |= BIT(7); /* in7 is VCCH5V */
2729 data->has_temp = 0x07;
2730 if (sio_data->skip_temp & BIT(2)) {
2731 if (sio_data->type == it8782 &&
2732 !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
2733 data->has_temp &= ~BIT(2);
2736 data->in_internal = sio_data->internal;
2737 data->has_in = 0x3ff & ~sio_data->skip_in;
2739 if (has_six_temp(data)) {
2740 u8 reg = it87_read_value(data, IT87_REG_TEMP456_ENABLE);
2742 /* Check for additional temperature sensors */
2743 if ((reg & 0x03) >= 0x02)
2744 data->has_temp |= BIT(3);
2745 if (((reg >> 2) & 0x03) >= 0x02)
2746 data->has_temp |= BIT(4);
2747 if (((reg >> 4) & 0x03) >= 0x02)
2748 data->has_temp |= BIT(5);
2750 /* Check for additional voltage sensors */
2751 if ((reg & 0x03) == 0x01)
2752 data->has_in |= BIT(10);
2753 if (((reg >> 2) & 0x03) == 0x01)
2754 data->has_in |= BIT(11);
2755 if (((reg >> 4) & 0x03) == 0x01)
2756 data->has_in |= BIT(12);
2759 data->has_beep = !!sio_data->beep_pin;
2761 /* Initialize the IT87 chip */
2762 it87_init_device(pdev);
2764 if (!sio_data->skip_vid) {
2765 data->has_vid = true;
2766 data->vrm = vid_which_vrm();
2767 /* VID reading from Super-I/O config space if available */
2768 data->vid = sio_data->vid_value;
2771 /* Prepare for sysfs hooks */
2772 data->groups[0] = &it87_group;
2773 data->groups[1] = &it87_group_in;
2774 data->groups[2] = &it87_group_temp;
2775 data->groups[3] = &it87_group_fan;
2777 if (enable_pwm_interface) {
2778 data->has_pwm = BIT(ARRAY_SIZE(IT87_REG_PWM)) - 1;
2779 data->has_pwm &= ~sio_data->skip_pwm;
2781 data->groups[4] = &it87_group_pwm;
2782 if (has_old_autopwm(data))
2783 data->groups[5] = &it87_group_auto_pwm;
2786 hwmon_dev = devm_hwmon_device_register_with_groups(dev,
2787 it87_devices[sio_data->type].name,
2788 data, data->groups);
2789 return PTR_ERR_OR_ZERO(hwmon_dev);
2792 static struct platform_driver it87_driver = {
2796 .probe = it87_probe,
2799 static int __init it87_device_add(int index, unsigned short address,
2800 const struct it87_sio_data *sio_data)
2802 struct platform_device *pdev;
2803 struct resource res = {
2804 .start = address + IT87_EC_OFFSET,
2805 .end = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
2807 .flags = IORESOURCE_IO,
2811 err = acpi_check_resource_conflict(&res);
2815 pdev = platform_device_alloc(DRVNAME, address);
2819 err = platform_device_add_resources(pdev, &res, 1);
2821 pr_err("Device resource addition failed (%d)\n", err);
2822 goto exit_device_put;
2825 err = platform_device_add_data(pdev, sio_data,
2826 sizeof(struct it87_sio_data));
2828 pr_err("Platform data allocation failed\n");
2829 goto exit_device_put;
2832 err = platform_device_add(pdev);
2834 pr_err("Device addition failed (%d)\n", err);
2835 goto exit_device_put;
2838 it87_pdev[index] = pdev;
2842 platform_device_put(pdev);
2846 static int __init sm_it87_init(void)
2848 int sioaddr[2] = { REG_2E, REG_4E };
2849 struct it87_sio_data sio_data;
2850 unsigned short isa_address;
2854 err = platform_driver_register(&it87_driver);
2858 for (i = 0; i < ARRAY_SIZE(sioaddr); i++) {
2859 memset(&sio_data, 0, sizeof(struct it87_sio_data));
2861 err = it87_find(sioaddr[i], &isa_address, &sio_data);
2862 if (err || isa_address == 0)
2865 err = it87_device_add(i, isa_address, &sio_data);
2867 goto exit_dev_unregister;
2873 goto exit_unregister;
2877 exit_dev_unregister:
2878 /* NULL check handled by platform_device_unregister */
2879 platform_device_unregister(it87_pdev[0]);
2881 platform_driver_unregister(&it87_driver);
2885 static void __exit sm_it87_exit(void)
2887 /* NULL check handled by platform_device_unregister */
2888 platform_device_unregister(it87_pdev[1]);
2889 platform_device_unregister(it87_pdev[0]);
2890 platform_driver_unregister(&it87_driver);
2893 MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>");
2894 MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
2895 module_param(update_vbat, bool, 0);
2896 MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
2897 module_param(fix_pwm_polarity, bool, 0);
2898 MODULE_PARM_DESC(fix_pwm_polarity,
2899 "Force PWM polarity to active high (DANGEROUS)");
2900 MODULE_LICENSE("GPL");
2902 module_init(sm_it87_init);
2903 module_exit(sm_it87_exit);