git.sur5r.net Git - groeck-it87/blob - it87.c

   1 /*
   2  *  it87.c - Part of lm_sensors, Linux kernel modules for hardware
   3  *           monitoring.
   4  *
   5  *  The IT8705F is an LPC-based Super I/O part that contains UARTs, a
   6  *  parallel port, an IR port, a MIDI port, a floppy controller, etc., in
   7  *  addition to an Environment Controller (Enhanced Hardware Monitor and
   8  *  Fan Controller)
   9  *
  10  *  This driver supports only the Environment Controller in the IT8705F and
  11  *  similar parts.  The other devices are supported by different drivers.
  12  *
  13  *  Supports: IT8603E  Super I/O chip w/LPC interface
  14  *            IT8607E  Super I/O chip w/LPC interface
  15  *            IT8620E  Super I/O chip w/LPC interface
  16  *            IT8622E  Super I/O chip w/LPC interface
  17  *            IT8623E  Super I/O chip w/LPC interface
  18  *            IT8628E  Super I/O chip w/LPC interface
  19  *            IT8665E  Super I/O chip w/LPC interface
  20  *            IT8686E  Super I/O chip w/LPC interface
  21  *            IT8705F  Super I/O chip w/LPC interface
  22  *            IT8712F  Super I/O chip w/LPC interface
  23  *            IT8716F  Super I/O chip w/LPC interface
  24  *            IT8718F  Super I/O chip w/LPC interface
  25  *            IT8720F  Super I/O chip w/LPC interface
  26  *            IT8721F  Super I/O chip w/LPC interface
  27  *            IT8726F  Super I/O chip w/LPC interface
  28  *            IT8728F  Super I/O chip w/LPC interface
  29  *            IT8732F  Super I/O chip w/LPC interface
  30  *            IT8758E  Super I/O chip w/LPC interface
  31  *            IT8771E  Super I/O chip w/LPC interface
  32  *            IT8772E  Super I/O chip w/LPC interface
  33  *            IT8781F  Super I/O chip w/LPC interface
  34  *            IT8782F  Super I/O chip w/LPC interface
  35  *            IT8783E/F Super I/O chip w/LPC interface
  36  *            IT8786E  Super I/O chip w/LPC interface
  37  *            IT8790E  Super I/O chip w/LPC interface
  38  *            IT8792E  Super I/O chip w/LPC interface
  39  *            Sis950   A clone of the IT8705F
  40  *
  41  *  Copyright (C) 2001 Chris Gauthron
  42  *  Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de>
  43  *
  44  *  This program is free software; you can redistribute it and/or modify
  45  *  it under the terms of the GNU General Public License as published by
  46  *  the Free Software Foundation; either version 2 of the License, or
  47  *  (at your option) any later version.
  48  *
  49  *  This program is distributed in the hope that it will be useful,
  50  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  51  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  52  *  GNU General Public License for more details.
  53  */
  54
  55 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  56
  57 #include <linux/bitops.h>
  58 #include <linux/module.h>
  59 #include <linux/init.h>
  60 #include <linux/slab.h>
  61 #include <linux/jiffies.h>
  62 #include <linux/platform_device.h>
  63 #include <linux/hwmon.h>
  64 #include <linux/hwmon-sysfs.h>
  65 #include <linux/hwmon-vid.h>
  66 #include <linux/err.h>
  67 #include <linux/mutex.h>
  68 #include <linux/sysfs.h>
  69 #include <linux/string.h>
  70 #include <linux/dmi.h>
  71 #include <linux/acpi.h>
  72 #include <linux/io.h>
  73 #include "compat.h"
  74
  75 #define DRVNAME "it87"
  76
  77 enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732,
  78              it8771, it8772, it8781, it8782, it8783, it8786, it8790,
  79              it8792, it8603, it8607, it8620, it8622, it8628, it8665,
  80              it8686 };
  81
  82 static unsigned short force_id;
  83 module_param(force_id, ushort, 0);
  84 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  85
  86 static struct platform_device *it87_pdev[2];
  87
  88 #define REG_2E  0x2e    /* The register to read/write */
  89 #define REG_4E  0x4e    /* Secondary register to read/write */
  90
  91 #define DEV     0x07    /* Register: Logical device select */
  92 #define PME     0x04    /* The device with the fan registers in it */
  93
  94 /* The device with the IT8718F/IT8720F VID value in it */
  95 #define GPIO    0x07
  96
  97 #define DEVID   0x20    /* Register: Device ID */
  98 #define DEVREV  0x22    /* Register: Device Revision */
  99
 100 static inline int superio_inb(int ioreg, int reg)
 101 {
 102         outb(reg, ioreg);
 103         return inb(ioreg + 1);
 104 }
 105
 106 static inline void superio_outb(int ioreg, int reg, int val)
 107 {
 108         outb(reg, ioreg);
 109         outb(val, ioreg + 1);
 110 }
 111
 112 static int superio_inw(int ioreg, int reg)
 113 {
 114         int val;
 115
 116         outb(reg++, ioreg);
 117         val = inb(ioreg + 1) << 8;
 118         outb(reg, ioreg);
 119         val |= inb(ioreg + 1);
 120         return val;
 121 }
 122
 123 static inline void superio_select(int ioreg, int ldn)
 124 {
 125         outb(DEV, ioreg);
 126         outb(ldn, ioreg + 1);
 127 }
 128
 129 static inline int superio_enter(int ioreg)
 130 {
 131         /*
 132          * Try to reserve ioreg and ioreg + 1 for exclusive access.
 133          */
 134         if (!request_muxed_region(ioreg, 2, DRVNAME))
 135                 return -EBUSY;
 136
 137         outb(0x87, ioreg);
 138         outb(0x01, ioreg);
 139         outb(0x55, ioreg);
 140         outb(ioreg == REG_4E ? 0xaa : 0x55, ioreg);
 141         return 0;
 142 }
 143
 144 static inline void superio_exit(int ioreg)
 145 {
 146         outb(0x02, ioreg);
 147         outb(0x02, ioreg + 1);
 148         release_region(ioreg, 2);
 149 }
 150
 151 /* Logical device 4 registers */
 152 #define IT8712F_DEVID 0x8712
 153 #define IT8705F_DEVID 0x8705
 154 #define IT8716F_DEVID 0x8716
 155 #define IT8718F_DEVID 0x8718
 156 #define IT8720F_DEVID 0x8720
 157 #define IT8721F_DEVID 0x8721
 158 #define IT8726F_DEVID 0x8726
 159 #define IT8728F_DEVID 0x8728
 160 #define IT8732F_DEVID 0x8732
 161 #define IT8792E_DEVID 0x8733
 162 #define IT8771E_DEVID 0x8771
 163 #define IT8772E_DEVID 0x8772
 164 #define IT8781F_DEVID 0x8781
 165 #define IT8782F_DEVID 0x8782
 166 #define IT8783E_DEVID 0x8783
 167 #define IT8786E_DEVID 0x8786
 168 #define IT8790E_DEVID 0x8790
 169 #define IT8603E_DEVID 0x8603
 170 #define IT8607E_DEVID 0x8607
 171 #define IT8620E_DEVID 0x8620
 172 #define IT8622E_DEVID 0x8622
 173 #define IT8623E_DEVID 0x8623
 174 #define IT8628E_DEVID 0x8628
 175 #define IT8665E_DEVID 0x8665
 176 #define IT8686E_DEVID 0x8686
 177 #define IT87_ACT_REG  0x30
 178 #define IT87_BASE_REG 0x60
 179
 180 /* Logical device 7 registers (IT8712F and later) */
 181 #define IT87_SIO_GPIO1_REG      0x25
 182 #define IT87_SIO_GPIO2_REG      0x26
 183 #define IT87_SIO_GPIO3_REG      0x27
 184 #define IT87_SIO_GPIO4_REG      0x28
 185 #define IT87_SIO_GPIO5_REG      0x29
 186 #define IT87_SIO_GPIO9_REG      0xd3
 187 #define IT87_SIO_PINX1_REG      0x2a    /* Pin selection */
 188 #define IT87_SIO_PINX2_REG      0x2c    /* Pin selection */
 189 #define IT87_SIO_PINX4_REG      0x2d    /* Pin selection */
 190 #define IT87_SIO_SPI_REG        0xef    /* SPI function pin select */
 191 #define IT87_SIO_VID_REG        0xfc    /* VID value */
 192 #define IT87_SIO_BEEP_PIN_REG   0xf6    /* Beep pin mapping */
 193
 194 /* Update battery voltage after every reading if true */
 195 static bool update_vbat;
 196
 197 /* Not all BIOSes properly configure the PWM registers */
 198 static bool fix_pwm_polarity;
 199
 200 /* Many IT87 constants specified below */
 201
 202 /* Length of ISA address segment */
 203 #define IT87_EXTENT 8
 204
 205 /* Length of ISA address segment for Environmental Controller */
 206 #define IT87_EC_EXTENT 2
 207
 208 /* Offset of EC registers from ISA base address */
 209 #define IT87_EC_OFFSET 5
 210
 211 /* Where are the ISA address/data registers relative to the EC base address */
 212 #define IT87_ADDR_REG_OFFSET 0
 213 #define IT87_DATA_REG_OFFSET 1
 214
 215 /*----- The IT87 registers -----*/
 216
 217 #define IT87_REG_CONFIG        0x00
 218
 219 #define IT87_REG_ALARM1        0x01
 220 #define IT87_REG_ALARM2        0x02
 221 #define IT87_REG_ALARM3        0x03
 222
 223 #define IT87_REG_BANK           0x06
 224
 225 /*
 226  * The IT8718F and IT8720F have the VID value in a different register, in
 227  * Super-I/O configuration space.
 228  */
 229 #define IT87_REG_VID           0x0a
 230 /*
 231  * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
 232  * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
 233  * mode.
 234  */
 235 #define IT87_REG_FAN_DIV       0x0b
 236 #define IT87_REG_FAN_16BIT     0x0c
 237
 238 /*
 239  * Monitors:
 240  * - up to 13 voltage (0 to 7, battery, avcc, 10 to 12)
 241  * - up to 6 temp (1 to 6)
 242  * - up to 6 fan (1 to 6)
 243  */
 244
 245 static const u8 IT87_REG_FAN[] =        { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c };
 246 static const u8 IT87_REG_FAN_MIN[] =    { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e };
 247 static const u8 IT87_REG_FANX[] =       { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d };
 248 static const u8 IT87_REG_FANX_MIN[] =   { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f };
 249
 250 static const u8 IT87_REG_FAN_8665[] =   { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x93 };
 251 static const u8 IT87_REG_FAN_MIN_8665[] =
 252                                         { 0x10, 0x11, 0x12, 0x84, 0x86, 0xb2 };
 253 static const u8 IT87_REG_FANX_8665[] =  { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x94 };
 254 static const u8 IT87_REG_FANX_MIN_8665[] =
 255                                         { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0xb3 };
 256
 257 static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59 };
 258
 259 #define IT87_REG_FAN_MAIN_CTRL 0x13
 260 #define IT87_REG_FAN_CTL       0x14
 261
 262 static const u8 IT87_REG_PWM[] =        { 0x15, 0x16, 0x17, 0x7f, 0xa7, 0xaf };
 263 static const u8 IT87_REG_PWM_8665[] =   { 0x15, 0x16, 0x17, 0x1e, 0x1f, 0x92 };
 264
 265 static const u8 IT87_REG_PWM_DUTY[] =   { 0x63, 0x6b, 0x73, 0x7b, 0xa3, 0xab };
 266
 267 static const u8 IT87_REG_VIN[]  = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26,
 268                                     0x27, 0x28, 0x2f, 0x2c, 0x2d, 0x2e };
 269
 270 #define IT87_REG_TEMP(nr)      (0x29 + (nr))
 271
 272 #define IT87_REG_VIN_MAX(nr)   (0x30 + (nr) * 2)
 273 #define IT87_REG_VIN_MIN(nr)   (0x31 + (nr) * 2)
 274 #define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
 275 #define IT87_REG_TEMP_LOW(nr)  (0x41 + (nr) * 2)
 276
 277 #define IT87_REG_VIN_ENABLE    0x50
 278 #define IT87_REG_TEMP_ENABLE   0x51
 279 #define IT87_REG_TEMP_EXTRA    0x55
 280 #define IT87_REG_BEEP_ENABLE   0x5c
 281
 282 #define IT87_REG_CHIPID        0x58
 283
 284 static const u8 IT87_REG_AUTO_BASE[] = { 0x60, 0x68, 0x70, 0x78, 0xa0, 0xa8 };
 285
 286 #define IT87_REG_AUTO_TEMP(nr, i) (IT87_REG_AUTO_BASE[nr] + (i))
 287 #define IT87_REG_AUTO_PWM(nr, i)  (IT87_REG_AUTO_BASE[nr] + 5 + (i))
 288
 289 #define IT87_REG_TEMP456_ENABLE 0x77
 290
 291 #define NUM_VIN                 ARRAY_SIZE(IT87_REG_VIN)
 292 #define NUM_VIN_LIMIT           8
 293 #define NUM_TEMP                6
 294 #define NUM_TEMP_OFFSET         ARRAY_SIZE(IT87_REG_TEMP_OFFSET)
 295 #define NUM_TEMP_LIMIT          3
 296 #define NUM_FAN                 ARRAY_SIZE(IT87_REG_FAN)
 297 #define NUM_FAN_DIV             3
 298 #define NUM_PWM                 ARRAY_SIZE(IT87_REG_PWM)
 299 #define NUM_AUTO_PWM            ARRAY_SIZE(IT87_REG_PWM)
 300
 301 struct it87_devices {
 302         const char *name;
 303         const char * const suffix;
 304         u32 features;
 305         u8 peci_mask;
 306         u8 old_peci_mask;
 307 };
 308
 309 #define FEAT_12MV_ADC           BIT(0)
 310 #define FEAT_NEWER_AUTOPWM      BIT(1)
 311 #define FEAT_OLD_AUTOPWM        BIT(2)
 312 #define FEAT_16BIT_FANS         BIT(3)
 313 #define FEAT_TEMP_OFFSET        BIT(4)
 314 #define FEAT_TEMP_PECI          BIT(5)
 315 #define FEAT_TEMP_OLD_PECI      BIT(6)
 316 #define FEAT_FAN16_CONFIG       BIT(7)  /* Need to enable 16-bit fans */
 317 #define FEAT_FIVE_FANS          BIT(8)  /* Supports five fans */
 318 #define FEAT_VID                BIT(9)  /* Set if chip supports VID */
 319 #define FEAT_IN7_INTERNAL       BIT(10) /* Set if in7 is internal */
 320 #define FEAT_SIX_FANS           BIT(11) /* Supports six fans */
 321 #define FEAT_10_9MV_ADC         BIT(12)
 322 #define FEAT_AVCC3              BIT(13) /* Chip supports in9/AVCC3 */
 323 #define FEAT_FIVE_PWM           BIT(14) /* Chip supports 5 pwm chn */
 324 #define FEAT_SIX_PWM            BIT(15) /* Chip supports 6 pwm chn */
 325 #define FEAT_PWM_FREQ2          BIT(16) /* Separate pwm freq 2 */
 326 #define FEAT_SIX_TEMP           BIT(17) /* Up to 6 temp sensors */
 327 #define FEAT_VIN3_5V            BIT(18) /* VIN3 connected to +5V */
 328 #define FEAT_FOUR_FANS          BIT(19) /* Supports four fans */
 329 #define FEAT_FOUR_PWM           BIT(20) /* Supports four fan controls */
 330 #define FEAT_BANK_SEL           BIT(21) /* Chip has multi-bank support */
 331 #define FEAT_SCALING            BIT(22) /* Internal voltage scaling */
 332
 333 static const struct it87_devices it87_devices[] = {
 334         [it87] = {
 335                 .name = "it87",
 336                 .suffix = "F",
 337                 .features = FEAT_OLD_AUTOPWM,   /* may need to overwrite */
 338         },
 339         [it8712] = {
 340                 .name = "it8712",
 341                 .suffix = "F",
 342                 .features = FEAT_OLD_AUTOPWM | FEAT_VID,
 343                                                 /* may need to overwrite */
 344         },
 345         [it8716] = {
 346                 .name = "it8716",
 347                 .suffix = "F",
 348                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 349                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2,
 350         },
 351         [it8718] = {
 352                 .name = "it8718",
 353                 .suffix = "F",
 354                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 355                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 356                   | FEAT_PWM_FREQ2,
 357                 .old_peci_mask = 0x4,
 358         },
 359         [it8720] = {
 360                 .name = "it8720",
 361                 .suffix = "F",
 362                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 363                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 364                   | FEAT_PWM_FREQ2,
 365                 .old_peci_mask = 0x4,
 366         },
 367         [it8721] = {
 368                 .name = "it8721",
 369                 .suffix = "F",
 370                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 371                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 372                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL
 373                   | FEAT_PWM_FREQ2 | FEAT_SCALING,
 374                 .peci_mask = 0x05,
 375                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 376         },
 377         [it8728] = {
 378                 .name = "it8728",
 379                 .suffix = "F",
 380                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 381                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 382                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_SCALING,
 383                 .peci_mask = 0x07,
 384         },
 385         [it8732] = {
 386                 .name = "it8732",
 387                 .suffix = "F",
 388                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 389                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 390                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_FOUR_FANS
 391                   | FEAT_FOUR_PWM,
 392                 .peci_mask = 0x07,
 393                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 394         },
 395         [it8771] = {
 396                 .name = "it8771",
 397                 .suffix = "E",
 398                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 399                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 400                   | FEAT_PWM_FREQ2 | FEAT_SCALING,
 401                                 /* PECI: guesswork */
 402                                 /* 12mV ADC (OHM) */
 403                                 /* 16 bit fans (OHM) */
 404                                 /* three fans, always 16 bit (guesswork) */
 405                 .peci_mask = 0x07,
 406         },
 407         [it8772] = {
 408                 .name = "it8772",
 409                 .suffix = "E",
 410                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 411                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 412                   | FEAT_PWM_FREQ2 | FEAT_SCALING,
 413                                 /* PECI (coreboot) */
 414                                 /* 12mV ADC (HWSensors4, OHM) */
 415                                 /* 16 bit fans (HWSensors4, OHM) */
 416                                 /* three fans, always 16 bit (datasheet) */
 417                 .peci_mask = 0x07,
 418         },
 419         [it8781] = {
 420                 .name = "it8781",
 421                 .suffix = "F",
 422                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 423                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
 424                 .old_peci_mask = 0x4,
 425         },
 426         [it8782] = {
 427                 .name = "it8782",
 428                 .suffix = "F",
 429                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 430                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
 431                 .old_peci_mask = 0x4,
 432         },
 433         [it8783] = {
 434                 .name = "it8783",
 435                 .suffix = "E/F",
 436                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 437                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
 438                 .old_peci_mask = 0x4,
 439         },
 440         [it8786] = {
 441                 .name = "it8786",
 442                 .suffix = "E",
 443                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 444                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 445                   | FEAT_PWM_FREQ2,
 446                 .peci_mask = 0x07,
 447         },
 448         [it8790] = {
 449                 .name = "it8790",
 450                 .suffix = "E",
 451                 .features = FEAT_NEWER_AUTOPWM | FEAT_10_9MV_ADC | FEAT_SCALING
 452                   | FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI
 453                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2,
 454                 .peci_mask = 0x07,
 455         },
 456         [it8792] = {
 457                 .name = "it8792",
 458                 .suffix = "E",
 459                 .features = FEAT_NEWER_AUTOPWM | FEAT_10_9MV_ADC | FEAT_SCALING
 460                   | FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI
 461                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2,
 462                 .peci_mask = 0x07,
 463         },
 464         [it8603] = {
 465                 .name = "it8603",
 466                 .suffix = "E",
 467                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 468                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 469                   | FEAT_AVCC3 | FEAT_PWM_FREQ2 | FEAT_SCALING,
 470                 .peci_mask = 0x07,
 471         },
 472         [it8607] = {
 473                 .name = "it8607",
 474                 .suffix = "E",
 475                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 476                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 477                   | FEAT_AVCC3 | FEAT_PWM_FREQ2 | FEAT_SCALING,
 478                 .peci_mask = 0x07,
 479         },
 480         [it8620] = {
 481                 .name = "it8620",
 482                 .suffix = "E",
 483                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 484                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 485                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 486                   | FEAT_SIX_TEMP | FEAT_VIN3_5V | FEAT_SCALING,
 487                 .peci_mask = 0x07,
 488         },
 489         [it8622] = {
 490                 .name = "it8622",
 491                 .suffix = "E",
 492                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 493                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 494                   | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
 495                   | FEAT_AVCC3 | FEAT_VIN3_5V | FEAT_SCALING,
 496                 .peci_mask = 0x07,
 497         },
 498         [it8628] = {
 499                 .name = "it8628",
 500                 .suffix = "E",
 501                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 502                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 503                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 504                   | FEAT_SIX_TEMP | FEAT_SCALING,
 505                 .peci_mask = 0x07,
 506         },
 507         [it8665] = {
 508                 .name = "it8665",
 509                 .suffix = "E",
 510                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 511                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 512                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_SIX_FANS
 513                   | FEAT_SIX_PWM | FEAT_BANK_SEL,
 514                 .peci_mask = 0x07,
 515         },
 516         [it8686] = {
 517                 .name = "it8686",
 518                 .suffix = "E",
 519                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 520                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 521                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 522                   | FEAT_SIX_TEMP | FEAT_BANK_SEL | FEAT_SCALING,
 523                 .peci_mask = 0x07,
 524         },
 525 };
 526
 527 #define has_16bit_fans(data)    ((data)->features & FEAT_16BIT_FANS)
 528 #define has_12mv_adc(data)      ((data)->features & FEAT_12MV_ADC)
 529 #define has_10_9mv_adc(data)    ((data)->features & FEAT_10_9MV_ADC)
 530 #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
 531 #define has_old_autopwm(data)   ((data)->features & FEAT_OLD_AUTOPWM)
 532 #define has_temp_offset(data)   ((data)->features & FEAT_TEMP_OFFSET)
 533 #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \
 534                                  ((data)->peci_mask & BIT(nr)))
 535 #define has_temp_old_peci(data, nr) \
 536                                 (((data)->features & FEAT_TEMP_OLD_PECI) && \
 537                                  ((data)->old_peci_mask & BIT(nr)))
 538 #define has_fan16_config(data)  ((data)->features & FEAT_FAN16_CONFIG)
 539 #define has_five_fans(data)     ((data)->features & (FEAT_FIVE_FANS | \
 540                                                      FEAT_SIX_FANS))
 541 #define has_vid(data)           ((data)->features & FEAT_VID)
 542 #define has_in7_internal(data)  ((data)->features & FEAT_IN7_INTERNAL)
 543 #define has_six_fans(data)      ((data)->features & FEAT_SIX_FANS)
 544 #define has_avcc3(data)         ((data)->features & FEAT_AVCC3)
 545 #define has_five_pwm(data)      ((data)->features & (FEAT_FIVE_PWM \
 546                                                      | FEAT_SIX_PWM))
 547 #define has_six_pwm(data)       ((data)->features & FEAT_SIX_PWM)
 548 #define has_pwm_freq2(data)     ((data)->features & FEAT_PWM_FREQ2)
 549 #define has_six_temp(data)      ((data)->features & FEAT_SIX_TEMP)
 550 #define has_vin3_5v(data)       ((data)->features & FEAT_VIN3_5V)
 551 #define has_four_fans(data)     ((data)->features & (FEAT_FOUR_FANS | \
 552                                                      FEAT_FIVE_FANS | \
 553                                                      FEAT_SIX_FANS))
 554 #define has_four_pwm(data)      ((data)->features & (FEAT_FOUR_PWM | \
 555                                                      FEAT_FIVE_PWM \
 556                                                      | FEAT_SIX_PWM))
 557 #define has_bank_sel(data)      ((data)->features & FEAT_BANK_SEL)
 558 #define has_scaling(data)       ((data)->features & FEAT_SCALING)
 559
 560 struct it87_sio_data {
 561         enum chips type;
 562         /* Values read from Super-I/O config space */
 563         u8 revision;
 564         u8 vid_value;
 565         u8 beep_pin;
 566         u8 internal;    /* Internal sensors can be labeled */
 567         /* Features skipped based on config or DMI */
 568         u16 skip_in;
 569         u8 skip_vid;
 570         u8 skip_fan;
 571         u8 skip_pwm;
 572         u8 skip_temp;
 573 };
 574
 575 /*
 576  * For each registered chip, we need to keep some data in memory.
 577  * The structure is dynamically allocated.
 578  */
 579 struct it87_data {
 580         const struct attribute_group *groups[7];
 581         enum chips type;
 582         u32 features;
 583         u8 bank;
 584         u8 peci_mask;
 585         u8 old_peci_mask;
 586
 587         const u8 *REG_FAN;
 588         const u8 *REG_FANX;
 589         const u8 *REG_FAN_MIN;
 590         const u8 *REG_FANX_MIN;
 591
 592         const u8 *REG_PWM;
 593
 594         unsigned short addr;
 595         const char *name;
 596         struct mutex update_lock;
 597         char valid;             /* !=0 if following fields are valid */
 598         unsigned long last_updated;     /* In jiffies */
 599
 600         u16 in_scaled;          /* Internal voltage sensors are scaled */
 601         u16 in_internal;        /* Bitfield, internal sensors (for labels) */
 602         u16 has_in;             /* Bitfield, voltage sensors enabled */
 603         u8 in[NUM_VIN][3];              /* [nr][0]=in, [1]=min, [2]=max */
 604         u8 has_fan;             /* Bitfield, fans enabled */
 605         u16 fan[NUM_FAN][2];    /* Register values, [nr][0]=fan, [1]=min */
 606         u8 has_temp;            /* Bitfield, temp sensors enabled */
 607         s8 temp[NUM_TEMP][4];   /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
 608         u8 sensor;              /* Register value (IT87_REG_TEMP_ENABLE) */
 609         u8 extra;               /* Register value (IT87_REG_TEMP_EXTRA) */
 610         u8 fan_div[NUM_FAN_DIV];/* Register encoding, shifted right */
 611         bool has_vid;           /* True if VID supported */
 612         u8 vid;                 /* Register encoding, combined */
 613         u8 vrm;
 614         u32 alarms;             /* Register encoding, combined */
 615         bool has_beep;          /* true if beep supported */
 616         u8 beeps;               /* Register encoding */
 617         u8 fan_main_ctrl;       /* Register value */
 618         u8 fan_ctl;             /* Register value */
 619
 620         /*
 621          * The following 3 arrays correspond to the same registers up to
 622          * the IT8720F. The meaning of bits 6-0 depends on the value of bit
 623          * 7, and we want to preserve settings on mode changes, so we have
 624          * to track all values separately.
 625          * Starting with the IT8721F, the manual PWM duty cycles are stored
 626          * in separate registers (8-bit values), so the separate tracking
 627          * is no longer needed, but it is still done to keep the driver
 628          * simple.
 629          */
 630         u8 has_pwm;             /* Bitfield, pwm control enabled */
 631         u8 pwm_ctrl[NUM_PWM];   /* Register value */
 632         u8 pwm_duty[NUM_PWM];   /* Manual PWM value set by user */
 633         u8 pwm_temp_map[NUM_PWM];/* PWM to temp. chan. mapping (bits 1-0) */
 634
 635         /* Automatic fan speed control registers */
 636         u8 auto_pwm[NUM_AUTO_PWM][4];   /* [nr][3] is hard-coded */
 637         s8 auto_temp[NUM_AUTO_PWM][5];  /* [nr][0] is point1_temp_hyst */
 638 };
 639
 640 static int adc_lsb(const struct it87_data *data, int nr)
 641 {
 642         int lsb;
 643
 644         if (has_12mv_adc(data))
 645                 lsb = 120;
 646         else if (has_10_9mv_adc(data))
 647                 lsb = 109;
 648         else
 649                 lsb = 160;
 650         if (data->in_scaled & BIT(nr))
 651                 lsb <<= 1;
 652         return lsb;
 653 }
 654
 655 static u8 in_to_reg(const struct it87_data *data, int nr, long val)
 656 {
 657         val = DIV_ROUND_CLOSEST(val * 10, adc_lsb(data, nr));
 658         return clamp_val(val, 0, 255);
 659 }
 660
 661 static int in_from_reg(const struct it87_data *data, int nr, int val)
 662 {
 663         return DIV_ROUND_CLOSEST(val * adc_lsb(data, nr), 10);
 664 }
 665
 666 static inline u8 FAN_TO_REG(long rpm, int div)
 667 {
 668         if (rpm == 0)
 669                 return 255;
 670         rpm = clamp_val(rpm, 1, 1000000);
 671         return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
 672 }
 673
 674 static inline u16 FAN16_TO_REG(long rpm)
 675 {
 676         if (rpm == 0)
 677                 return 0xffff;
 678         return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
 679 }
 680
 681 #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
 682                                 1350000 / ((val) * (div)))
 683 /* The divider is fixed to 2 in 16-bit mode */
 684 #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
 685                              1350000 / ((val) * 2))
 686
 687 #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \
 688                                     ((val) + 500) / 1000), -128, 127))
 689 #define TEMP_FROM_REG(val) ((val) * 1000)
 690
 691 static u8 pwm_to_reg(const struct it87_data *data, long val)
 692 {
 693         if (has_newer_autopwm(data))
 694                 return val;
 695         else
 696                 return val >> 1;
 697 }
 698
 699 static int pwm_from_reg(const struct it87_data *data, u8 reg)
 700 {
 701         if (has_newer_autopwm(data))
 702                 return reg;
 703         else
 704                 return (reg & 0x7f) << 1;
 705 }
 706
 707 static int DIV_TO_REG(int val)
 708 {
 709         int answer = 0;
 710
 711         while (answer < 7 && (val >>= 1))
 712                 answer++;
 713         return answer;
 714 }
 715
 716 #define DIV_FROM_REG(val) BIT(val)
 717
 718 /*
 719  * PWM base frequencies. The frequency has to be divided by either 128 or 256,
 720  * depending on the chip type, to calculate the actual PWM frequency.
 721  *
 722  * Some of the chip datasheets suggest a base frequency of 51 kHz instead
 723  * of 750 kHz for the slowest base frequency, resulting in a PWM frequency
 724  * of 200 Hz. Sometimes both PWM frequency select registers are affected,
 725  * sometimes just one. It is unknown if this is a datasheet error or real,
 726  * so this is ignored for now.
 727  */
 728 static const unsigned int pwm_freq[8] = {
 729         48000000,
 730         24000000,
 731         12000000,
 732         8000000,
 733         6000000,
 734         3000000,
 735         1500000,
 736         750000,
 737 };
 738
 739 static int _it87_read_value(struct it87_data *data, u8 reg)
 740 {
 741         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 742         return inb_p(data->addr + IT87_DATA_REG_OFFSET);
 743 }
 744
 745 static void _it87_write_value(struct it87_data *data, u8 reg, u8 value)
 746 {
 747         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 748         outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
 749 }
 750
 751 static void it87_set_bank(struct it87_data *data, u8 bank)
 752 {
 753         if (has_bank_sel(data) && bank != data->bank) {
 754                 u8 breg = _it87_read_value(data, IT87_REG_BANK);
 755
 756                 breg &= 0x1f;
 757                 breg |= (bank << 5);
 758                 data->bank = bank;
 759                 _it87_write_value(data, IT87_REG_BANK, breg);
 760         }
 761 }
 762
 763 /*
 764  * Must be called with data->update_lock held, except during initialization.
 765  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 766  * would slow down the IT87 access and should not be necessary.
 767  */
 768 static int it87_read_value(struct it87_data *data, u16 reg)
 769 {
 770         it87_set_bank(data, reg >> 8);
 771         return _it87_read_value(data, reg & 0xff);
 772 }
 773
 774 /*
 775  * Must be called with data->update_lock held, except during initialization.
 776  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 777  * would slow down the IT87 access and should not be necessary.
 778  */
 779 static void it87_write_value(struct it87_data *data, u16 reg, u8 value)
 780 {
 781         it87_set_bank(data, reg >> 8);
 782         _it87_write_value(data, reg & 0xff, value);
 783 }
 784
 785 static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
 786 {
 787         data->pwm_ctrl[nr] = it87_read_value(data, data->REG_PWM[nr]);
 788         if (has_newer_autopwm(data)) {
 789                 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
 790                 data->pwm_duty[nr] = it87_read_value(data,
 791                                                      IT87_REG_PWM_DUTY[nr]);
 792         } else {
 793                 if (data->pwm_ctrl[nr] & 0x80)  /* Automatic mode */
 794                         data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
 795                 else                            /* Manual mode */
 796                         data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
 797         }
 798
 799         if (has_old_autopwm(data)) {
 800                 int i;
 801
 802                 for (i = 0; i < 5 ; i++)
 803                         data->auto_temp[nr][i] = it87_read_value(data,
 804                                                 IT87_REG_AUTO_TEMP(nr, i));
 805                 for (i = 0; i < 3 ; i++)
 806                         data->auto_pwm[nr][i] = it87_read_value(data,
 807                                                 IT87_REG_AUTO_PWM(nr, i));
 808         } else if (has_newer_autopwm(data)) {
 809                 int i;
 810
 811                 /*
 812                  * 0: temperature hysteresis (base + 5)
 813                  * 1: fan off temperature (base + 0)
 814                  * 2: fan start temperature (base + 1)
 815                  * 3: fan max temperature (base + 2)
 816                  */
 817                 data->auto_temp[nr][0] =
 818                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 5));
 819
 820                 for (i = 0; i < 3 ; i++)
 821                         data->auto_temp[nr][i + 1] =
 822                                 it87_read_value(data,
 823                                                 IT87_REG_AUTO_TEMP(nr, i));
 824                 /*
 825                  * 0: start pwm value (base + 3)
 826                  * 1: pwm slope (base + 4, 1/8th pwm)
 827                  */
 828                 data->auto_pwm[nr][0] =
 829                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 3));
 830                 data->auto_pwm[nr][1] =
 831                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 4));
 832         }
 833 }
 834
 835 static struct it87_data *it87_update_device(struct device *dev)
 836 {
 837         struct it87_data *data = dev_get_drvdata(dev);
 838         int i;
 839
 840         mutex_lock(&data->update_lock);
 841
 842         if (time_after(jiffies, data->last_updated + HZ + HZ / 2) ||
 843             !data->valid) {
 844                 if (update_vbat) {
 845                         /*
 846                          * Cleared after each update, so reenable.  Value
 847                          * returned by this read will be previous value
 848                          */
 849                         it87_write_value(data, IT87_REG_CONFIG,
 850                                 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
 851                 }
 852                 for (i = 0; i < NUM_VIN; i++) {
 853                         if (!(data->has_in & BIT(i)))
 854                                 continue;
 855
 856                         data->in[i][0] =
 857                                 it87_read_value(data, IT87_REG_VIN[i]);
 858
 859                         /* VBAT and AVCC don't have limit registers */
 860                         if (i >= NUM_VIN_LIMIT)
 861                                 continue;
 862
 863                         data->in[i][1] =
 864                                 it87_read_value(data, IT87_REG_VIN_MIN(i));
 865                         data->in[i][2] =
 866                                 it87_read_value(data, IT87_REG_VIN_MAX(i));
 867                 }
 868
 869                 for (i = 0; i < NUM_FAN; i++) {
 870                         /* Skip disabled fans */
 871                         if (!(data->has_fan & BIT(i)))
 872                                 continue;
 873
 874                         data->fan[i][1] =
 875                                 it87_read_value(data, data->REG_FAN_MIN[i]);
 876                         data->fan[i][0] = it87_read_value(data,
 877                                        data->REG_FAN[i]);
 878                         /* Add high byte if in 16-bit mode */
 879                         if (has_16bit_fans(data)) {
 880                                 data->fan[i][0] |= it87_read_value(data,
 881                                                 data->REG_FANX[i]) << 8;
 882                                 data->fan[i][1] |= it87_read_value(data,
 883                                                 data->REG_FANX_MIN[i]) << 8;
 884                         }
 885                 }
 886                 for (i = 0; i < NUM_TEMP; i++) {
 887                         if (!(data->has_temp & BIT(i)))
 888                                 continue;
 889                         data->temp[i][0] =
 890                                 it87_read_value(data, IT87_REG_TEMP(i));
 891
 892                         if (has_temp_offset(data) && i < NUM_TEMP_OFFSET)
 893                                 data->temp[i][3] =
 894                                   it87_read_value(data,
 895                                                   IT87_REG_TEMP_OFFSET[i]);
 896
 897                         if (i >= NUM_TEMP_LIMIT)
 898                                 continue;
 899
 900                         data->temp[i][1] =
 901                                 it87_read_value(data, IT87_REG_TEMP_LOW(i));
 902                         data->temp[i][2] =
 903                                 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
 904                 }
 905
 906                 /* Newer chips don't have clock dividers */
 907                 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
 908                         i = it87_read_value(data, IT87_REG_FAN_DIV);
 909                         data->fan_div[0] = i & 0x07;
 910                         data->fan_div[1] = (i >> 3) & 0x07;
 911                         data->fan_div[2] = (i & 0x40) ? 3 : 1;
 912                 }
 913
 914                 data->alarms =
 915                         it87_read_value(data, IT87_REG_ALARM1) |
 916                         (it87_read_value(data, IT87_REG_ALARM2) << 8) |
 917                         (it87_read_value(data, IT87_REG_ALARM3) << 16);
 918                 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
 919
 920                 data->fan_main_ctrl = it87_read_value(data,
 921                                 IT87_REG_FAN_MAIN_CTRL);
 922                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
 923                 for (i = 0; i < NUM_PWM; i++) {
 924                         if (!(data->has_pwm & BIT(i)))
 925                                 continue;
 926                         it87_update_pwm_ctrl(data, i);
 927                 }
 928
 929                 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
 930                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
 931                 /*
 932                  * The IT8705F does not have VID capability.
 933                  * The IT8718F and later don't use IT87_REG_VID for the
 934                  * same purpose.
 935                  */
 936                 if (data->type == it8712 || data->type == it8716) {
 937                         data->vid = it87_read_value(data, IT87_REG_VID);
 938                         /*
 939                          * The older IT8712F revisions had only 5 VID pins,
 940                          * but we assume it is always safe to read 6 bits.
 941                          */
 942                         data->vid &= 0x3f;
 943                 }
 944                 data->last_updated = jiffies;
 945                 data->valid = 1;
 946         }
 947
 948         mutex_unlock(&data->update_lock);
 949
 950         return data;
 951 }
 952
 953 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
 954                        char *buf)
 955 {
 956         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 957         struct it87_data *data = it87_update_device(dev);
 958         int index = sattr->index;
 959         int nr = sattr->nr;
 960
 961         return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
 962 }
 963
 964 static ssize_t set_in(struct device *dev, struct device_attribute *attr,
 965                       const char *buf, size_t count)
 966 {
 967         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 968         struct it87_data *data = dev_get_drvdata(dev);
 969         int index = sattr->index;
 970         int nr = sattr->nr;
 971         unsigned long val;
 972
 973         if (kstrtoul(buf, 10, &val) < 0)
 974                 return -EINVAL;
 975
 976         mutex_lock(&data->update_lock);
 977         data->in[nr][index] = in_to_reg(data, nr, val);
 978         it87_write_value(data,
 979                          index == 1 ? IT87_REG_VIN_MIN(nr)
 980                                     : IT87_REG_VIN_MAX(nr),
 981                          data->in[nr][index]);
 982         mutex_unlock(&data->update_lock);
 983         return count;
 984 }
 985
 986 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
 987 static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
 988                             0, 1);
 989 static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
 990                             0, 2);
 991
 992 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
 993 static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
 994                             1, 1);
 995 static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
 996                             1, 2);
 997
 998 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
 999 static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
1000                             2, 1);
1001 static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
1002                             2, 2);
1003
1004 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
1005 static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
1006                             3, 1);
1007 static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
1008                             3, 2);
1009
1010 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
1011 static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
1012                             4, 1);
1013 static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
1014                             4, 2);
1015
1016 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
1017 static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
1018                             5, 1);
1019 static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
1020                             5, 2);
1021
1022 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
1023 static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
1024                             6, 1);
1025 static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
1026                             6, 2);
1027
1028 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
1029 static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
1030                             7, 1);
1031 static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
1032                             7, 2);
1033
1034 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
1035 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0);
1036 static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in, NULL, 10, 0);
1037 static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in, NULL, 11, 0);
1038 static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in, NULL, 12, 0);
1039
1040 /* Up to 6 temperatures */
1041 static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
1042                          char *buf)
1043 {
1044         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1045         int nr = sattr->nr;
1046         int index = sattr->index;
1047         struct it87_data *data = it87_update_device(dev);
1048
1049         return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
1050 }
1051
1052 static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
1053                         const char *buf, size_t count)
1054 {
1055         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1056         int nr = sattr->nr;
1057         int index = sattr->index;
1058         struct it87_data *data = dev_get_drvdata(dev);
1059         long val;
1060         u8 reg, regval;
1061
1062         if (kstrtol(buf, 10, &val) < 0)
1063                 return -EINVAL;
1064
1065         mutex_lock(&data->update_lock);
1066
1067         switch (index) {
1068         default:
1069         case 1:
1070                 reg = IT87_REG_TEMP_LOW(nr);
1071                 break;
1072         case 2:
1073                 reg = IT87_REG_TEMP_HIGH(nr);
1074                 break;
1075         case 3:
1076                 regval = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1077                 if (!(regval & 0x80)) {
1078                         regval |= 0x80;
1079                         it87_write_value(data, IT87_REG_BEEP_ENABLE, regval);
1080                 }
1081                 data->valid = 0;
1082                 reg = IT87_REG_TEMP_OFFSET[nr];
1083                 break;
1084         }
1085
1086         data->temp[nr][index] = TEMP_TO_REG(val);
1087         it87_write_value(data, reg, data->temp[nr][index]);
1088         mutex_unlock(&data->update_lock);
1089         return count;
1090 }
1091
1092 static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
1093 static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1094                             0, 1);
1095 static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1096                             0, 2);
1097 static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
1098                             set_temp, 0, 3);
1099 static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
1100 static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1101                             1, 1);
1102 static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1103                             1, 2);
1104 static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
1105                             set_temp, 1, 3);
1106 static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
1107 static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1108                             2, 1);
1109 static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1110                             2, 2);
1111 static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
1112                             set_temp, 2, 3);
1113 static SENSOR_DEVICE_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0);
1114 static SENSOR_DEVICE_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0);
1115 static SENSOR_DEVICE_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0);
1116
1117 static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
1118                               char *buf)
1119 {
1120         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1121         int nr = sensor_attr->index;
1122         struct it87_data *data = it87_update_device(dev);
1123         u8 reg = data->sensor;      /* In case value is updated while used */
1124         u8 extra = data->extra;
1125
1126         if ((has_temp_peci(data, nr) && (reg >> 6 == nr + 1)) ||
1127             (has_temp_old_peci(data, nr) && (extra & 0x80)))
1128                 return sprintf(buf, "6\n");  /* Intel PECI */
1129         if (reg & (1 << nr))
1130                 return sprintf(buf, "3\n");  /* thermal diode */
1131         if (reg & (8 << nr))
1132                 return sprintf(buf, "4\n");  /* thermistor */
1133         return sprintf(buf, "0\n");      /* disabled */
1134 }
1135
1136 static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
1137                              const char *buf, size_t count)
1138 {
1139         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1140         int nr = sensor_attr->index;
1141
1142         struct it87_data *data = dev_get_drvdata(dev);
1143         long val;
1144         u8 reg, extra;
1145
1146         if (kstrtol(buf, 10, &val) < 0)
1147                 return -EINVAL;
1148
1149         reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1150         reg &= ~(1 << nr);
1151         reg &= ~(8 << nr);
1152         if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6))
1153                 reg &= 0x3f;
1154         extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1155         if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6))
1156                 extra &= 0x7f;
1157         if (val == 2) { /* backwards compatibility */
1158                 dev_warn(dev,
1159                          "Sensor type 2 is deprecated, please use 4 instead\n");
1160                 val = 4;
1161         }
1162         /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */
1163         if (val == 3)
1164                 reg |= 1 << nr;
1165         else if (val == 4)
1166                 reg |= 8 << nr;
1167         else if (has_temp_peci(data, nr) && val == 6)
1168                 reg |= (nr + 1) << 6;
1169         else if (has_temp_old_peci(data, nr) && val == 6)
1170                 extra |= 0x80;
1171         else if (val != 0)
1172                 return -EINVAL;
1173
1174         mutex_lock(&data->update_lock);
1175         data->sensor = reg;
1176         data->extra = extra;
1177         it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
1178         if (has_temp_old_peci(data, nr))
1179                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1180         data->valid = 0;        /* Force cache refresh */
1181         mutex_unlock(&data->update_lock);
1182         return count;
1183 }
1184
1185 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1186                           set_temp_type, 0);
1187 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1188                           set_temp_type, 1);
1189 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1190                           set_temp_type, 2);
1191
1192 /* 6 Fans */
1193
1194 static int pwm_mode(const struct it87_data *data, int nr)
1195 {
1196         if (data->type != it8603 && nr < 3 && !(data->fan_main_ctrl & BIT(nr)))
1197                 return 0;                               /* Full speed */
1198         if (data->pwm_ctrl[nr] & 0x80)
1199                 return 2;                               /* Automatic mode */
1200         if ((data->type == it8603 || nr >= 3) &&
1201             data->pwm_duty[nr] == pwm_to_reg(data, 0xff))
1202                 return 0;                       /* Full speed */
1203
1204         return 1;                               /* Manual mode */
1205 }
1206
1207 static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
1208                         char *buf)
1209 {
1210         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1211         int nr = sattr->nr;
1212         int index = sattr->index;
1213         int speed;
1214         struct it87_data *data = it87_update_device(dev);
1215
1216         speed = has_16bit_fans(data) ?
1217                 FAN16_FROM_REG(data->fan[nr][index]) :
1218                 FAN_FROM_REG(data->fan[nr][index],
1219                              DIV_FROM_REG(data->fan_div[nr]));
1220         return sprintf(buf, "%d\n", speed);
1221 }
1222
1223 static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
1224                             char *buf)
1225 {
1226         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1227         struct it87_data *data = it87_update_device(dev);
1228         int nr = sensor_attr->index;
1229
1230         return sprintf(buf, "%lu\n", DIV_FROM_REG(data->fan_div[nr]));
1231 }
1232
1233 static ssize_t show_pwm_enable(struct device *dev,
1234                                struct device_attribute *attr, char *buf)
1235 {
1236         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1237         struct it87_data *data = it87_update_device(dev);
1238         int nr = sensor_attr->index;
1239
1240         return sprintf(buf, "%d\n", pwm_mode(data, nr));
1241 }
1242
1243 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
1244                         char *buf)
1245 {
1246         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1247         struct it87_data *data = it87_update_device(dev);
1248         int nr = sensor_attr->index;
1249
1250         return sprintf(buf, "%d\n",
1251                        pwm_from_reg(data, data->pwm_duty[nr]));
1252 }
1253
1254 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
1255                              char *buf)
1256 {
1257         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1258         struct it87_data *data = it87_update_device(dev);
1259         int nr = sensor_attr->index;
1260         unsigned int freq;
1261         int index;
1262
1263         if (has_pwm_freq2(data) && nr == 1)
1264                 index = (data->extra >> 4) & 0x07;
1265         else
1266                 index = (data->fan_ctl >> 4) & 0x07;
1267
1268         freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128);
1269
1270         return sprintf(buf, "%u\n", freq);
1271 }
1272
1273 static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
1274                        const char *buf, size_t count)
1275 {
1276         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1277         int nr = sattr->nr;
1278         int index = sattr->index;
1279
1280         struct it87_data *data = dev_get_drvdata(dev);
1281         long val;
1282         u8 reg;
1283
1284         if (kstrtol(buf, 10, &val) < 0)
1285                 return -EINVAL;
1286
1287         mutex_lock(&data->update_lock);
1288
1289         if (has_16bit_fans(data)) {
1290                 data->fan[nr][index] = FAN16_TO_REG(val);
1291                 it87_write_value(data, data->REG_FAN_MIN[nr],
1292                                  data->fan[nr][index] & 0xff);
1293                 it87_write_value(data, data->REG_FANX_MIN[nr],
1294                                  data->fan[nr][index] >> 8);
1295         } else {
1296                 reg = it87_read_value(data, IT87_REG_FAN_DIV);
1297                 switch (nr) {
1298                 case 0:
1299                         data->fan_div[nr] = reg & 0x07;
1300                         break;
1301                 case 1:
1302                         data->fan_div[nr] = (reg >> 3) & 0x07;
1303                         break;
1304                 case 2:
1305                         data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
1306                         break;
1307                 }
1308                 data->fan[nr][index] =
1309                   FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
1310                 it87_write_value(data, data->REG_FAN_MIN[nr],
1311                                  data->fan[nr][index]);
1312         }
1313
1314         mutex_unlock(&data->update_lock);
1315         return count;
1316 }
1317
1318 static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
1319                            const char *buf, size_t count)
1320 {
1321         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1322         struct it87_data *data = dev_get_drvdata(dev);
1323         int nr = sensor_attr->index;
1324         unsigned long val;
1325         int min;
1326         u8 old;
1327
1328         if (kstrtoul(buf, 10, &val) < 0)
1329                 return -EINVAL;
1330
1331         mutex_lock(&data->update_lock);
1332         old = it87_read_value(data, IT87_REG_FAN_DIV);
1333
1334         /* Save fan min limit */
1335         min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
1336
1337         switch (nr) {
1338         case 0:
1339         case 1:
1340                 data->fan_div[nr] = DIV_TO_REG(val);
1341                 break;
1342         case 2:
1343                 if (val < 8)
1344                         data->fan_div[nr] = 1;
1345                 else
1346                         data->fan_div[nr] = 3;
1347         }
1348         val = old & 0x80;
1349         val |= (data->fan_div[0] & 0x07);
1350         val |= (data->fan_div[1] & 0x07) << 3;
1351         if (data->fan_div[2] == 3)
1352                 val |= 0x1 << 6;
1353         it87_write_value(data, IT87_REG_FAN_DIV, val);
1354
1355         /* Restore fan min limit */
1356         data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
1357         it87_write_value(data, data->REG_FAN_MIN[nr], data->fan[nr][1]);
1358
1359         mutex_unlock(&data->update_lock);
1360         return count;
1361 }
1362
1363 /* Returns 0 if OK, -EINVAL otherwise */
1364 static int check_trip_points(struct device *dev, int nr)
1365 {
1366         const struct it87_data *data = dev_get_drvdata(dev);
1367         int i, err = 0;
1368
1369         if (has_old_autopwm(data)) {
1370                 for (i = 0; i < 3; i++) {
1371                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1372                                 err = -EINVAL;
1373                 }
1374                 for (i = 0; i < 2; i++) {
1375                         if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1376                                 err = -EINVAL;
1377                 }
1378         } else if (has_newer_autopwm(data)) {
1379                 for (i = 1; i < 3; i++) {
1380                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1381                                 err = -EINVAL;
1382                 }
1383         }
1384
1385         if (err) {
1386                 dev_err(dev,
1387                         "Inconsistent trip points, not switching to automatic mode\n");
1388                 dev_err(dev, "Adjust the trip points and try again\n");
1389         }
1390         return err;
1391 }
1392
1393 static ssize_t set_pwm_enable(struct device *dev, struct device_attribute *attr,
1394                               const char *buf, size_t count)
1395 {
1396         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1397         struct it87_data *data = dev_get_drvdata(dev);
1398         int nr = sensor_attr->index;
1399         long val;
1400
1401         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
1402                 return -EINVAL;
1403
1404         /* Check trip points before switching to automatic mode */
1405         if (val == 2) {
1406                 if (check_trip_points(dev, nr) < 0)
1407                         return -EINVAL;
1408         }
1409
1410         mutex_lock(&data->update_lock);
1411
1412         if (val == 0) {
1413                 if (nr < 3 && data->type != it8603) {
1414                         int tmp;
1415                         /* make sure the fan is on when in on/off mode */
1416                         tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1417                         it87_write_value(data, IT87_REG_FAN_CTL, tmp | BIT(nr));
1418                         /* set on/off mode */
1419                         data->fan_main_ctrl &= ~BIT(nr);
1420                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1421                                          data->fan_main_ctrl);
1422                 } else {
1423                         u8 ctrl;
1424
1425                         /* No on/off mode, set maximum pwm value */
1426                         data->pwm_duty[nr] = pwm_to_reg(data, 0xff);
1427                         it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1428                                          data->pwm_duty[nr]);
1429                         /* and set manual mode */
1430                         if (has_newer_autopwm(data)) {
1431                                 ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1432                                         data->pwm_temp_map[nr];
1433                         } else {
1434                                 ctrl = data->pwm_duty[nr];
1435                         }
1436                         data->pwm_ctrl[nr] = ctrl;
1437                         it87_write_value(data, data->REG_PWM[nr], ctrl);
1438                 }
1439         } else {
1440                 u8 ctrl;
1441
1442                 if (has_newer_autopwm(data)) {
1443                         ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1444                                 data->pwm_temp_map[nr];
1445                         if (val != 1)
1446                                 ctrl |= 0x80;
1447                 } else {
1448                         ctrl = (val == 1 ? data->pwm_duty[nr] : 0x80);
1449                 }
1450                 data->pwm_ctrl[nr] = ctrl;
1451                 it87_write_value(data, data->REG_PWM[nr], ctrl);
1452
1453                 if (data->type != it8603 && nr < 3) {
1454                         /* set SmartGuardian mode */
1455                         data->fan_main_ctrl |= BIT(nr);
1456                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1457                                          data->fan_main_ctrl);
1458                 }
1459         }
1460
1461         mutex_unlock(&data->update_lock);
1462         return count;
1463 }
1464
1465 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1466                        const char *buf, size_t count)
1467 {
1468         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1469         struct it87_data *data = dev_get_drvdata(dev);
1470         int nr = sensor_attr->index;
1471         long val;
1472
1473         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1474                 return -EINVAL;
1475
1476         mutex_lock(&data->update_lock);
1477         it87_update_pwm_ctrl(data, nr);
1478         if (has_newer_autopwm(data)) {
1479                 /*
1480                  * If we are in automatic mode, the PWM duty cycle register
1481                  * is read-only so we can't write the value.
1482                  */
1483                 if (data->pwm_ctrl[nr] & 0x80) {
1484                         mutex_unlock(&data->update_lock);
1485                         return -EBUSY;
1486                 }
1487                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1488                 it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1489                                  data->pwm_duty[nr]);
1490         } else {
1491                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1492                 /*
1493                  * If we are in manual mode, write the duty cycle immediately;
1494                  * otherwise, just store it for later use.
1495                  */
1496                 if (!(data->pwm_ctrl[nr] & 0x80)) {
1497                         data->pwm_ctrl[nr] = data->pwm_duty[nr];
1498                         it87_write_value(data, data->REG_PWM[nr],
1499                                          data->pwm_ctrl[nr]);
1500                 }
1501         }
1502         mutex_unlock(&data->update_lock);
1503         return count;
1504 }
1505
1506 static ssize_t set_pwm_freq(struct device *dev, struct device_attribute *attr,
1507                             const char *buf, size_t count)
1508 {
1509         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1510         struct it87_data *data = dev_get_drvdata(dev);
1511         int nr = sensor_attr->index;
1512         unsigned long val;
1513         int i;
1514
1515         if (kstrtoul(buf, 10, &val) < 0)
1516                 return -EINVAL;
1517
1518         val = clamp_val(val, 0, 1000000);
1519         val *= has_newer_autopwm(data) ? 256 : 128;
1520
1521         /* Search for the nearest available frequency */
1522         for (i = 0; i < 7; i++) {
1523                 if (val > (pwm_freq[i] + pwm_freq[i + 1]) / 2)
1524                         break;
1525         }
1526
1527         mutex_lock(&data->update_lock);
1528         if (nr == 0) {
1529                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
1530                 data->fan_ctl |= i << 4;
1531                 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
1532         } else {
1533                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x8f;
1534                 data->extra |= i << 4;
1535                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1536         }
1537         mutex_unlock(&data->update_lock);
1538
1539         return count;
1540 }
1541
1542 static ssize_t show_pwm_temp_map(struct device *dev,
1543                                  struct device_attribute *attr, char *buf)
1544 {
1545         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1546         struct it87_data *data = it87_update_device(dev);
1547         int nr = sensor_attr->index;
1548         int map;
1549
1550         map = data->pwm_temp_map[nr];
1551         if (map >= 3)
1552                 map = 0;        /* Should never happen */
1553         if (nr >= 3)            /* pwm channels 3..6 map to temp4..6 */
1554                 map += 3;
1555
1556         return sprintf(buf, "%d\n", (int)BIT(map));
1557 }
1558
1559 static ssize_t set_pwm_temp_map(struct device *dev,
1560                                 struct device_attribute *attr, const char *buf,
1561                                 size_t count)
1562 {
1563         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1564         struct it87_data *data = dev_get_drvdata(dev);
1565         int nr = sensor_attr->index;
1566         long val;
1567         u8 reg;
1568
1569         if (kstrtol(buf, 10, &val) < 0)
1570                 return -EINVAL;
1571
1572         if (nr >= 3)
1573                 val -= 3;
1574
1575         switch (val) {
1576         case BIT(0):
1577                 reg = 0x00;
1578                 break;
1579         case BIT(1):
1580                 reg = 0x01;
1581                 break;
1582         case BIT(2):
1583                 reg = 0x02;
1584                 break;
1585         default:
1586                 return -EINVAL;
1587         }
1588
1589         mutex_lock(&data->update_lock);
1590         it87_update_pwm_ctrl(data, nr);
1591         data->pwm_temp_map[nr] = reg;
1592         /*
1593          * If we are in automatic mode, write the temp mapping immediately;
1594          * otherwise, just store it for later use.
1595          */
1596         if (data->pwm_ctrl[nr] & 0x80) {
1597                 data->pwm_ctrl[nr] = (data->pwm_ctrl[nr] & 0xfc) |
1598                                                 data->pwm_temp_map[nr];
1599                 it87_write_value(data, data->REG_PWM[nr], data->pwm_ctrl[nr]);
1600         }
1601         mutex_unlock(&data->update_lock);
1602         return count;
1603 }
1604
1605 static ssize_t show_auto_pwm(struct device *dev, struct device_attribute *attr,
1606                              char *buf)
1607 {
1608         struct it87_data *data = it87_update_device(dev);
1609         struct sensor_device_attribute_2 *sensor_attr =
1610                         to_sensor_dev_attr_2(attr);
1611         int nr = sensor_attr->nr;
1612         int point = sensor_attr->index;
1613
1614         return sprintf(buf, "%d\n",
1615                        pwm_from_reg(data, data->auto_pwm[nr][point]));
1616 }
1617
1618 static ssize_t set_auto_pwm(struct device *dev, struct device_attribute *attr,
1619                             const char *buf, size_t count)
1620 {
1621         struct it87_data *data = dev_get_drvdata(dev);
1622         struct sensor_device_attribute_2 *sensor_attr =
1623                         to_sensor_dev_attr_2(attr);
1624         int nr = sensor_attr->nr;
1625         int point = sensor_attr->index;
1626         int regaddr;
1627         long val;
1628
1629         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1630                 return -EINVAL;
1631
1632         mutex_lock(&data->update_lock);
1633         data->auto_pwm[nr][point] = pwm_to_reg(data, val);
1634         if (has_newer_autopwm(data))
1635                 regaddr = IT87_REG_AUTO_TEMP(nr, 3);
1636         else
1637                 regaddr = IT87_REG_AUTO_PWM(nr, point);
1638         it87_write_value(data, regaddr, data->auto_pwm[nr][point]);
1639         mutex_unlock(&data->update_lock);
1640         return count;
1641 }
1642
1643 static ssize_t show_auto_pwm_slope(struct device *dev,
1644                                    struct device_attribute *attr, char *buf)
1645 {
1646         struct it87_data *data = it87_update_device(dev);
1647         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1648         int nr = sensor_attr->index;
1649
1650         return sprintf(buf, "%d\n", data->auto_pwm[nr][1] & 0x7f);
1651 }
1652
1653 static ssize_t set_auto_pwm_slope(struct device *dev,
1654                                   struct device_attribute *attr,
1655                                   const char *buf, size_t count)
1656 {
1657         struct it87_data *data = dev_get_drvdata(dev);
1658         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1659         int nr = sensor_attr->index;
1660         unsigned long val;
1661
1662         if (kstrtoul(buf, 10, &val) < 0 || val > 127)
1663                 return -EINVAL;
1664
1665         mutex_lock(&data->update_lock);
1666         data->auto_pwm[nr][1] = (data->auto_pwm[nr][1] & 0x80) | val;
1667         it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 4),
1668                          data->auto_pwm[nr][1]);
1669         mutex_unlock(&data->update_lock);
1670         return count;
1671 }
1672
1673 static ssize_t show_auto_temp(struct device *dev, struct device_attribute *attr,
1674                               char *buf)
1675 {
1676         struct it87_data *data = it87_update_device(dev);
1677         struct sensor_device_attribute_2 *sensor_attr =
1678                         to_sensor_dev_attr_2(attr);
1679         int nr = sensor_attr->nr;
1680         int point = sensor_attr->index;
1681         int reg;
1682
1683         if (has_old_autopwm(data) || point)
1684                 reg = data->auto_temp[nr][point];
1685         else
1686                 reg = data->auto_temp[nr][1] - (data->auto_temp[nr][0] & 0x1f);
1687
1688         return sprintf(buf, "%d\n", TEMP_FROM_REG(reg));
1689 }
1690
1691 static ssize_t set_auto_temp(struct device *dev, struct device_attribute *attr,
1692                              const char *buf, size_t count)
1693 {
1694         struct it87_data *data = dev_get_drvdata(dev);
1695         struct sensor_device_attribute_2 *sensor_attr =
1696                         to_sensor_dev_attr_2(attr);
1697         int nr = sensor_attr->nr;
1698         int point = sensor_attr->index;
1699         long val;
1700         int reg;
1701
1702         if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
1703                 return -EINVAL;
1704
1705         mutex_lock(&data->update_lock);
1706         if (has_newer_autopwm(data) && !point) {
1707                 reg = data->auto_temp[nr][1] - TEMP_TO_REG(val);
1708                 reg = clamp_val(reg, 0, 0x1f) | (data->auto_temp[nr][0] & 0xe0);
1709                 data->auto_temp[nr][0] = reg;
1710                 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 5), reg);
1711         } else {
1712                 reg = TEMP_TO_REG(val);
1713                 data->auto_temp[nr][point] = reg;
1714                 if (has_newer_autopwm(data))
1715                         point--;
1716                 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point), reg);
1717         }
1718         mutex_unlock(&data->update_lock);
1719         return count;
1720 }
1721
1722 static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
1723 static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1724                             0, 1);
1725 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
1726                           set_fan_div, 0);
1727
1728 static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
1729 static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1730                             1, 1);
1731 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
1732                           set_fan_div, 1);
1733
1734 static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
1735 static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1736                             2, 1);
1737 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
1738                           set_fan_div, 2);
1739
1740 static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
1741 static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1742                             3, 1);
1743
1744 static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
1745 static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1746                             4, 1);
1747
1748 static SENSOR_DEVICE_ATTR_2(fan6_input, S_IRUGO, show_fan, NULL, 5, 0);
1749 static SENSOR_DEVICE_ATTR_2(fan6_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1750                             5, 1);
1751
1752 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
1753                           show_pwm_enable, set_pwm_enable, 0);
1754 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0);
1755 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq,
1756                           set_pwm_freq, 0);
1757 static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO,
1758                           show_pwm_temp_map, set_pwm_temp_map, 0);
1759 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR,
1760                             show_auto_pwm, set_auto_pwm, 0, 0);
1761 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR,
1762                             show_auto_pwm, set_auto_pwm, 0, 1);
1763 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR,
1764                             show_auto_pwm, set_auto_pwm, 0, 2);
1765 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO,
1766                             show_auto_pwm, NULL, 0, 3);
1767 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
1768                             show_auto_temp, set_auto_temp, 0, 1);
1769 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1770                             show_auto_temp, set_auto_temp, 0, 0);
1771 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
1772                             show_auto_temp, set_auto_temp, 0, 2);
1773 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
1774                             show_auto_temp, set_auto_temp, 0, 3);
1775 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR,
1776                             show_auto_temp, set_auto_temp, 0, 4);
1777 static SENSOR_DEVICE_ATTR_2(pwm1_auto_start, S_IRUGO | S_IWUSR,
1778                             show_auto_pwm, set_auto_pwm, 0, 0);
1779 static SENSOR_DEVICE_ATTR(pwm1_auto_slope, S_IRUGO | S_IWUSR,
1780                           show_auto_pwm_slope, set_auto_pwm_slope, 0);
1781
1782 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
1783                           show_pwm_enable, set_pwm_enable, 1);
1784 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1);
1785 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, set_pwm_freq, 1);
1786 static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO,
1787                           show_pwm_temp_map, set_pwm_temp_map, 1);
1788 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR,
1789                             show_auto_pwm, set_auto_pwm, 1, 0);
1790 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR,
1791                             show_auto_pwm, set_auto_pwm, 1, 1);
1792 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR,
1793                             show_auto_pwm, set_auto_pwm, 1, 2);
1794 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO,
1795                             show_auto_pwm, NULL, 1, 3);
1796 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
1797                             show_auto_temp, set_auto_temp, 1, 1);
1798 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1799                             show_auto_temp, set_auto_temp, 1, 0);
1800 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
1801                             show_auto_temp, set_auto_temp, 1, 2);
1802 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
1803                             show_auto_temp, set_auto_temp, 1, 3);
1804 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR,
1805                             show_auto_temp, set_auto_temp, 1, 4);
1806 static SENSOR_DEVICE_ATTR_2(pwm2_auto_start, S_IRUGO | S_IWUSR,
1807                             show_auto_pwm, set_auto_pwm, 1, 0);
1808 static SENSOR_DEVICE_ATTR(pwm2_auto_slope, S_IRUGO | S_IWUSR,
1809                           show_auto_pwm_slope, set_auto_pwm_slope, 1);
1810
1811 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
1812                           show_pwm_enable, set_pwm_enable, 2);
1813 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2);
1814 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL, 2);
1815 static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO,
1816                           show_pwm_temp_map, set_pwm_temp_map, 2);
1817 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR,
1818                             show_auto_pwm, set_auto_pwm, 2, 0);
1819 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR,
1820                             show_auto_pwm, set_auto_pwm, 2, 1);
1821 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR,
1822                             show_auto_pwm, set_auto_pwm, 2, 2);
1823 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO,
1824                             show_auto_pwm, NULL, 2, 3);
1825 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
1826                             show_auto_temp, set_auto_temp, 2, 1);
1827 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1828                             show_auto_temp, set_auto_temp, 2, 0);
1829 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
1830                             show_auto_temp, set_auto_temp, 2, 2);
1831 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
1832                             show_auto_temp, set_auto_temp, 2, 3);
1833 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR,
1834                             show_auto_temp, set_auto_temp, 2, 4);
1835 static SENSOR_DEVICE_ATTR_2(pwm3_auto_start, S_IRUGO | S_IWUSR,
1836                             show_auto_pwm, set_auto_pwm, 2, 0);
1837 static SENSOR_DEVICE_ATTR(pwm3_auto_slope, S_IRUGO | S_IWUSR,
1838                           show_auto_pwm_slope, set_auto_pwm_slope, 2);
1839
1840 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IRUGO | S_IWUSR,
1841                           show_pwm_enable, set_pwm_enable, 3);
1842 static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 3);
1843 static SENSOR_DEVICE_ATTR(pwm4_freq, S_IRUGO, show_pwm_freq, NULL, 3);
1844 static SENSOR_DEVICE_ATTR(pwm4_auto_channels_temp, S_IRUGO,
1845                           show_pwm_temp_map, set_pwm_temp_map, 3);
1846 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp, S_IRUGO | S_IWUSR,
1847                             show_auto_temp, set_auto_temp, 2, 1);
1848 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1849                             show_auto_temp, set_auto_temp, 2, 0);
1850 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point2_temp, S_IRUGO | S_IWUSR,
1851                             show_auto_temp, set_auto_temp, 2, 2);
1852 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point3_temp, S_IRUGO | S_IWUSR,
1853                             show_auto_temp, set_auto_temp, 2, 3);
1854 static SENSOR_DEVICE_ATTR_2(pwm4_auto_start, S_IRUGO | S_IWUSR,
1855                             show_auto_pwm, set_auto_pwm, 3, 0);
1856 static SENSOR_DEVICE_ATTR(pwm4_auto_slope, S_IRUGO | S_IWUSR,
1857                           show_auto_pwm_slope, set_auto_pwm_slope, 3);
1858
1859 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IRUGO | S_IWUSR,
1860                           show_pwm_enable, set_pwm_enable, 4);
1861 static SENSOR_DEVICE_ATTR(pwm5, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 4);
1862 static SENSOR_DEVICE_ATTR(pwm5_freq, S_IRUGO, show_pwm_freq, NULL, 4);
1863 static SENSOR_DEVICE_ATTR(pwm5_auto_channels_temp, S_IRUGO,
1864                           show_pwm_temp_map, set_pwm_temp_map, 4);
1865 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp, S_IRUGO | S_IWUSR,
1866                             show_auto_temp, set_auto_temp, 2, 1);
1867 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1868                             show_auto_temp, set_auto_temp, 2, 0);
1869 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point2_temp, S_IRUGO | S_IWUSR,
1870                             show_auto_temp, set_auto_temp, 2, 2);
1871 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point3_temp, S_IRUGO | S_IWUSR,
1872                             show_auto_temp, set_auto_temp, 2, 3);
1873 static SENSOR_DEVICE_ATTR_2(pwm5_auto_start, S_IRUGO | S_IWUSR,
1874                             show_auto_pwm, set_auto_pwm, 4, 0);
1875 static SENSOR_DEVICE_ATTR(pwm5_auto_slope, S_IRUGO | S_IWUSR,
1876                           show_auto_pwm_slope, set_auto_pwm_slope, 4);
1877
1878 static SENSOR_DEVICE_ATTR(pwm6_enable, S_IRUGO | S_IWUSR,
1879                           show_pwm_enable, set_pwm_enable, 5);
1880 static SENSOR_DEVICE_ATTR(pwm6, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 5);
1881 static SENSOR_DEVICE_ATTR(pwm6_freq, S_IRUGO, show_pwm_freq, NULL, 5);
1882 static SENSOR_DEVICE_ATTR(pwm6_auto_channels_temp, S_IRUGO,
1883                           show_pwm_temp_map, set_pwm_temp_map, 5);
1884 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp, S_IRUGO | S_IWUSR,
1885                             show_auto_temp, set_auto_temp, 2, 1);
1886 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1887                             show_auto_temp, set_auto_temp, 2, 0);
1888 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point2_temp, S_IRUGO | S_IWUSR,
1889                             show_auto_temp, set_auto_temp, 2, 2);
1890 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point3_temp, S_IRUGO | S_IWUSR,
1891                             show_auto_temp, set_auto_temp, 2, 3);
1892 static SENSOR_DEVICE_ATTR_2(pwm6_auto_start, S_IRUGO | S_IWUSR,
1893                             show_auto_pwm, set_auto_pwm, 5, 0);
1894 static SENSOR_DEVICE_ATTR(pwm6_auto_slope, S_IRUGO | S_IWUSR,
1895                           show_auto_pwm_slope, set_auto_pwm_slope, 5);
1896
1897 /* Alarms */
1898 static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
1899                            char *buf)
1900 {
1901         struct it87_data *data = it87_update_device(dev);
1902
1903         return sprintf(buf, "%u\n", data->alarms);
1904 }
1905 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
1906
1907 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
1908                           char *buf)
1909 {
1910         struct it87_data *data = it87_update_device(dev);
1911         int bitnr = to_sensor_dev_attr(attr)->index;
1912
1913         return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
1914 }
1915
1916 static ssize_t clear_intrusion(struct device *dev,
1917                                struct device_attribute *attr, const char *buf,
1918                                size_t count)
1919 {
1920         struct it87_data *data = dev_get_drvdata(dev);
1921         int config;
1922         long val;
1923
1924         if (kstrtol(buf, 10, &val) < 0 || val != 0)
1925                 return -EINVAL;
1926
1927         mutex_lock(&data->update_lock);
1928         config = it87_read_value(data, IT87_REG_CONFIG);
1929         if (config < 0) {
1930                 count = config;
1931         } else {
1932                 config |= BIT(5);
1933                 it87_write_value(data, IT87_REG_CONFIG, config);
1934                 /* Invalidate cache to force re-read */
1935                 data->valid = 0;
1936         }
1937         mutex_unlock(&data->update_lock);
1938
1939         return count;
1940 }
1941
1942 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
1943 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
1944 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
1945 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
1946 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
1947 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
1948 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
1949 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
1950 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
1951 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
1952 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
1953 static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
1954 static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
1955 static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 7);
1956 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
1957 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
1958 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
1959 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
1960                           show_alarm, clear_intrusion, 4);
1961
1962 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
1963                          char *buf)
1964 {
1965         struct it87_data *data = it87_update_device(dev);
1966         int bitnr = to_sensor_dev_attr(attr)->index;
1967
1968         return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
1969 }
1970
1971 static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
1972                         const char *buf, size_t count)
1973 {
1974         int bitnr = to_sensor_dev_attr(attr)->index;
1975         struct it87_data *data = dev_get_drvdata(dev);
1976         long val;
1977
1978         if (kstrtol(buf, 10, &val) < 0 || (val != 0 && val != 1))
1979                 return -EINVAL;
1980
1981         mutex_lock(&data->update_lock);
1982         data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1983         if (val)
1984                 data->beeps |= BIT(bitnr);
1985         else
1986                 data->beeps &= ~BIT(bitnr);
1987         it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
1988         mutex_unlock(&data->update_lock);
1989         return count;
1990 }
1991
1992 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
1993                           show_beep, set_beep, 1);
1994 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
1995 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
1996 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
1997 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
1998 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
1999 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
2000 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
2001 /* fanX_beep writability is set later */
2002 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
2003 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
2004 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
2005 static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
2006 static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
2007 static SENSOR_DEVICE_ATTR(fan6_beep, S_IRUGO, show_beep, set_beep, 0);
2008 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
2009                           show_beep, set_beep, 2);
2010 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
2011 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
2012
2013 static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
2014                             char *buf)
2015 {
2016         struct it87_data *data = dev_get_drvdata(dev);
2017
2018         return sprintf(buf, "%u\n", data->vrm);
2019 }
2020
2021 static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
2022                              const char *buf, size_t count)
2023 {
2024         struct it87_data *data = dev_get_drvdata(dev);
2025         unsigned long val;
2026
2027         if (kstrtoul(buf, 10, &val) < 0)
2028                 return -EINVAL;
2029
2030         data->vrm = val;
2031
2032         return count;
2033 }
2034 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
2035
2036 static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
2037                             char *buf)
2038 {
2039         struct it87_data *data = it87_update_device(dev);
2040
2041         return sprintf(buf, "%ld\n", (long)vid_from_reg(data->vid, data->vrm));
2042 }
2043 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
2044
2045 static ssize_t show_label(struct device *dev, struct device_attribute *attr,
2046                           char *buf)
2047 {
2048         static const char * const labels[] = {
2049                 "+5V",
2050                 "5VSB",
2051                 "Vbat",
2052                 "AVCC",
2053         };
2054         static const char * const labels_it8721[] = {
2055                 "+3.3V",
2056                 "3VSB",
2057                 "Vbat",
2058                 "+3.3V",
2059         };
2060         struct it87_data *data = dev_get_drvdata(dev);
2061         int nr = to_sensor_dev_attr(attr)->index;
2062         const char *label;
2063
2064         if (has_vin3_5v(data) && nr == 0)
2065                 label = labels[0];
2066         else if (has_12mv_adc(data) || has_10_9mv_adc(data))
2067                 label = labels_it8721[nr];
2068         else
2069                 label = labels[nr];
2070
2071         return sprintf(buf, "%s\n", label);
2072 }
2073 static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
2074 static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
2075 static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
2076 /* AVCC3 */
2077 static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 3);
2078
2079 static umode_t it87_in_is_visible(struct kobject *kobj,
2080                                   struct attribute *attr, int index)
2081 {
2082         struct device *dev = container_of(kobj, struct device, kobj);
2083         struct it87_data *data = dev_get_drvdata(dev);
2084         int i = index / 5;      /* voltage index */
2085         int a = index % 5;      /* attribute index */
2086
2087         if (index >= 40) {      /* in8 and higher only have input attributes */
2088                 i = index - 40 + 8;
2089                 a = 0;
2090         }
2091
2092         if (!(data->has_in & BIT(i)))
2093                 return 0;
2094
2095         if (a == 4 && !data->has_beep)
2096                 return 0;
2097
2098         return attr->mode;
2099 }
2100
2101 static struct attribute *it87_attributes_in[] = {
2102         &sensor_dev_attr_in0_input.dev_attr.attr,
2103         &sensor_dev_attr_in0_min.dev_attr.attr,
2104         &sensor_dev_attr_in0_max.dev_attr.attr,
2105         &sensor_dev_attr_in0_alarm.dev_attr.attr,
2106         &sensor_dev_attr_in0_beep.dev_attr.attr,        /* 4 */
2107
2108         &sensor_dev_attr_in1_input.dev_attr.attr,
2109         &sensor_dev_attr_in1_min.dev_attr.attr,
2110         &sensor_dev_attr_in1_max.dev_attr.attr,
2111         &sensor_dev_attr_in1_alarm.dev_attr.attr,
2112         &sensor_dev_attr_in1_beep.dev_attr.attr,        /* 9 */
2113
2114         &sensor_dev_attr_in2_input.dev_attr.attr,
2115         &sensor_dev_attr_in2_min.dev_attr.attr,
2116         &sensor_dev_attr_in2_max.dev_attr.attr,
2117         &sensor_dev_attr_in2_alarm.dev_attr.attr,
2118         &sensor_dev_attr_in2_beep.dev_attr.attr,        /* 14 */
2119
2120         &sensor_dev_attr_in3_input.dev_attr.attr,
2121         &sensor_dev_attr_in3_min.dev_attr.attr,
2122         &sensor_dev_attr_in3_max.dev_attr.attr,
2123         &sensor_dev_attr_in3_alarm.dev_attr.attr,
2124         &sensor_dev_attr_in3_beep.dev_attr.attr,        /* 19 */
2125
2126         &sensor_dev_attr_in4_input.dev_attr.attr,
2127         &sensor_dev_attr_in4_min.dev_attr.attr,
2128         &sensor_dev_attr_in4_max.dev_attr.attr,
2129         &sensor_dev_attr_in4_alarm.dev_attr.attr,
2130         &sensor_dev_attr_in4_beep.dev_attr.attr,        /* 24 */
2131
2132         &sensor_dev_attr_in5_input.dev_attr.attr,
2133         &sensor_dev_attr_in5_min.dev_attr.attr,
2134         &sensor_dev_attr_in5_max.dev_attr.attr,
2135         &sensor_dev_attr_in5_alarm.dev_attr.attr,
2136         &sensor_dev_attr_in5_beep.dev_attr.attr,        /* 29 */
2137
2138         &sensor_dev_attr_in6_input.dev_attr.attr,
2139         &sensor_dev_attr_in6_min.dev_attr.attr,
2140         &sensor_dev_attr_in6_max.dev_attr.attr,
2141         &sensor_dev_attr_in6_alarm.dev_attr.attr,
2142         &sensor_dev_attr_in6_beep.dev_attr.attr,        /* 34 */
2143
2144         &sensor_dev_attr_in7_input.dev_attr.attr,
2145         &sensor_dev_attr_in7_min.dev_attr.attr,
2146         &sensor_dev_attr_in7_max.dev_attr.attr,
2147         &sensor_dev_attr_in7_alarm.dev_attr.attr,
2148         &sensor_dev_attr_in7_beep.dev_attr.attr,        /* 39 */
2149
2150         &sensor_dev_attr_in8_input.dev_attr.attr,       /* 40 */
2151         &sensor_dev_attr_in9_input.dev_attr.attr,       /* 41 */
2152         &sensor_dev_attr_in10_input.dev_attr.attr,      /* 41 */
2153         &sensor_dev_attr_in11_input.dev_attr.attr,      /* 41 */
2154         &sensor_dev_attr_in12_input.dev_attr.attr,      /* 41 */
2155         NULL
2156 };
2157
2158 static const struct attribute_group it87_group_in = {
2159         .attrs = it87_attributes_in,
2160         .is_visible = it87_in_is_visible,
2161 };
2162
2163 static umode_t it87_temp_is_visible(struct kobject *kobj,
2164                                     struct attribute *attr, int index)
2165 {
2166         struct device *dev = container_of(kobj, struct device, kobj);
2167         struct it87_data *data = dev_get_drvdata(dev);
2168         int i = index / 7;      /* temperature index */
2169         int a = index % 7;      /* attribute index */
2170
2171         if (index >= 21) {
2172                 i = index - 21 + 3;
2173                 a = 0;
2174         }
2175
2176         if (!(data->has_temp & BIT(i)))
2177                 return 0;
2178
2179         if (a == 5 && !has_temp_offset(data))
2180                 return 0;
2181
2182         if (a == 6 && !data->has_beep)
2183                 return 0;
2184
2185         return attr->mode;
2186 }
2187
2188 static struct attribute *it87_attributes_temp[] = {
2189         &sensor_dev_attr_temp1_input.dev_attr.attr,
2190         &sensor_dev_attr_temp1_max.dev_attr.attr,
2191         &sensor_dev_attr_temp1_min.dev_attr.attr,
2192         &sensor_dev_attr_temp1_type.dev_attr.attr,
2193         &sensor_dev_attr_temp1_alarm.dev_attr.attr,
2194         &sensor_dev_attr_temp1_offset.dev_attr.attr,    /* 5 */
2195         &sensor_dev_attr_temp1_beep.dev_attr.attr,      /* 6 */
2196
2197         &sensor_dev_attr_temp2_input.dev_attr.attr,     /* 7 */
2198         &sensor_dev_attr_temp2_max.dev_attr.attr,
2199         &sensor_dev_attr_temp2_min.dev_attr.attr,
2200         &sensor_dev_attr_temp2_type.dev_attr.attr,
2201         &sensor_dev_attr_temp2_alarm.dev_attr.attr,
2202         &sensor_dev_attr_temp2_offset.dev_attr.attr,
2203         &sensor_dev_attr_temp2_beep.dev_attr.attr,
2204
2205         &sensor_dev_attr_temp3_input.dev_attr.attr,     /* 14 */
2206         &sensor_dev_attr_temp3_max.dev_attr.attr,
2207         &sensor_dev_attr_temp3_min.dev_attr.attr,
2208         &sensor_dev_attr_temp3_type.dev_attr.attr,
2209         &sensor_dev_attr_temp3_alarm.dev_attr.attr,
2210         &sensor_dev_attr_temp3_offset.dev_attr.attr,
2211         &sensor_dev_attr_temp3_beep.dev_attr.attr,
2212
2213         &sensor_dev_attr_temp4_input.dev_attr.attr,     /* 21 */
2214         &sensor_dev_attr_temp5_input.dev_attr.attr,
2215         &sensor_dev_attr_temp6_input.dev_attr.attr,
2216         NULL
2217 };
2218
2219 static const struct attribute_group it87_group_temp = {
2220         .attrs = it87_attributes_temp,
2221         .is_visible = it87_temp_is_visible,
2222 };
2223
2224 static umode_t it87_is_visible(struct kobject *kobj,
2225                                struct attribute *attr, int index)
2226 {
2227         struct device *dev = container_of(kobj, struct device, kobj);
2228         struct it87_data *data = dev_get_drvdata(dev);
2229
2230         if ((index == 2 || index == 3) && !data->has_vid)
2231                 return 0;
2232
2233         if (index > 3 && !(data->in_internal & BIT(index - 4)))
2234                 return 0;
2235
2236         return attr->mode;
2237 }
2238
2239 static struct attribute *it87_attributes[] = {
2240         &dev_attr_alarms.attr,
2241         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
2242         &dev_attr_vrm.attr,                             /* 2 */
2243         &dev_attr_cpu0_vid.attr,                        /* 3 */
2244         &sensor_dev_attr_in3_label.dev_attr.attr,       /* 4 .. 7 */
2245         &sensor_dev_attr_in7_label.dev_attr.attr,
2246         &sensor_dev_attr_in8_label.dev_attr.attr,
2247         &sensor_dev_attr_in9_label.dev_attr.attr,
2248         NULL
2249 };
2250
2251 static const struct attribute_group it87_group = {
2252         .attrs = it87_attributes,
2253         .is_visible = it87_is_visible,
2254 };
2255
2256 static umode_t it87_fan_is_visible(struct kobject *kobj,
2257                                    struct attribute *attr, int index)
2258 {
2259         struct device *dev = container_of(kobj, struct device, kobj);
2260         struct it87_data *data = dev_get_drvdata(dev);
2261         int i = index / 5;      /* fan index */
2262         int a = index % 5;      /* attribute index */
2263
2264         if (index >= 15) {      /* fan 4..6 don't have divisor attributes */
2265                 i = (index - 15) / 4 + 3;
2266                 a = (index - 15) % 4;
2267         }
2268
2269         if (!(data->has_fan & BIT(i)))
2270                 return 0;
2271
2272         if (a == 3) {                           /* beep */
2273                 if (!data->has_beep)
2274                         return 0;
2275                 /* first fan beep attribute is writable */
2276                 if (i == __ffs(data->has_fan))
2277                         return attr->mode | S_IWUSR;
2278         }
2279
2280         if (a == 4 && has_16bit_fans(data))     /* divisor */
2281                 return 0;
2282
2283         return attr->mode;
2284 }
2285
2286 static struct attribute *it87_attributes_fan[] = {
2287         &sensor_dev_attr_fan1_input.dev_attr.attr,
2288         &sensor_dev_attr_fan1_min.dev_attr.attr,
2289         &sensor_dev_attr_fan1_alarm.dev_attr.attr,
2290         &sensor_dev_attr_fan1_beep.dev_attr.attr,       /* 3 */
2291         &sensor_dev_attr_fan1_div.dev_attr.attr,        /* 4 */
2292
2293         &sensor_dev_attr_fan2_input.dev_attr.attr,
2294         &sensor_dev_attr_fan2_min.dev_attr.attr,
2295         &sensor_dev_attr_fan2_alarm.dev_attr.attr,
2296         &sensor_dev_attr_fan2_beep.dev_attr.attr,
2297         &sensor_dev_attr_fan2_div.dev_attr.attr,        /* 9 */
2298
2299         &sensor_dev_attr_fan3_input.dev_attr.attr,
2300         &sensor_dev_attr_fan3_min.dev_attr.attr,
2301         &sensor_dev_attr_fan3_alarm.dev_attr.attr,
2302         &sensor_dev_attr_fan3_beep.dev_attr.attr,
2303         &sensor_dev_attr_fan3_div.dev_attr.attr,        /* 14 */
2304
2305         &sensor_dev_attr_fan4_input.dev_attr.attr,      /* 15 */
2306         &sensor_dev_attr_fan4_min.dev_attr.attr,
2307         &sensor_dev_attr_fan4_alarm.dev_attr.attr,
2308         &sensor_dev_attr_fan4_beep.dev_attr.attr,
2309
2310         &sensor_dev_attr_fan5_input.dev_attr.attr,      /* 19 */
2311         &sensor_dev_attr_fan5_min.dev_attr.attr,
2312         &sensor_dev_attr_fan5_alarm.dev_attr.attr,
2313         &sensor_dev_attr_fan5_beep.dev_attr.attr,
2314
2315         &sensor_dev_attr_fan6_input.dev_attr.attr,      /* 23 */
2316         &sensor_dev_attr_fan6_min.dev_attr.attr,
2317         &sensor_dev_attr_fan6_alarm.dev_attr.attr,
2318         &sensor_dev_attr_fan6_beep.dev_attr.attr,
2319         NULL
2320 };
2321
2322 static const struct attribute_group it87_group_fan = {
2323         .attrs = it87_attributes_fan,
2324         .is_visible = it87_fan_is_visible,
2325 };
2326
2327 static umode_t it87_pwm_is_visible(struct kobject *kobj,
2328                                    struct attribute *attr, int index)
2329 {
2330         struct device *dev = container_of(kobj, struct device, kobj);
2331         struct it87_data *data = dev_get_drvdata(dev);
2332         int i = index / 4;      /* pwm index */
2333         int a = index % 4;      /* attribute index */
2334
2335         if (!(data->has_pwm & BIT(i)))
2336                 return 0;
2337
2338         /* pwmX_auto_channels_temp is only writable if auto pwm is supported */
2339         if (a == 3 && (has_old_autopwm(data) || has_newer_autopwm(data)))
2340                 return attr->mode | S_IWUSR;
2341
2342         /* pwm2_freq is writable if there are two pwm frequency selects */
2343         if (has_pwm_freq2(data) && i == 1 && a == 2)
2344                 return attr->mode | S_IWUSR;
2345
2346         return attr->mode;
2347 }
2348
2349 static struct attribute *it87_attributes_pwm[] = {
2350         &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2351         &sensor_dev_attr_pwm1.dev_attr.attr,
2352         &sensor_dev_attr_pwm1_freq.dev_attr.attr,
2353         &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
2354
2355         &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2356         &sensor_dev_attr_pwm2.dev_attr.attr,
2357         &sensor_dev_attr_pwm2_freq.dev_attr.attr,
2358         &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
2359
2360         &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2361         &sensor_dev_attr_pwm3.dev_attr.attr,
2362         &sensor_dev_attr_pwm3_freq.dev_attr.attr,
2363         &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
2364
2365         &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2366         &sensor_dev_attr_pwm4.dev_attr.attr,
2367         &sensor_dev_attr_pwm4_freq.dev_attr.attr,
2368         &sensor_dev_attr_pwm4_auto_channels_temp.dev_attr.attr,
2369
2370         &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2371         &sensor_dev_attr_pwm5.dev_attr.attr,
2372         &sensor_dev_attr_pwm5_freq.dev_attr.attr,
2373         &sensor_dev_attr_pwm5_auto_channels_temp.dev_attr.attr,
2374
2375         &sensor_dev_attr_pwm6_enable.dev_attr.attr,
2376         &sensor_dev_attr_pwm6.dev_attr.attr,
2377         &sensor_dev_attr_pwm6_freq.dev_attr.attr,
2378         &sensor_dev_attr_pwm6_auto_channels_temp.dev_attr.attr,
2379
2380         NULL
2381 };
2382
2383 static const struct attribute_group it87_group_pwm = {
2384         .attrs = it87_attributes_pwm,
2385         .is_visible = it87_pwm_is_visible,
2386 };
2387
2388 static umode_t it87_auto_pwm_is_visible(struct kobject *kobj,
2389                                         struct attribute *attr, int index)
2390 {
2391         struct device *dev = container_of(kobj, struct device, kobj);
2392         struct it87_data *data = dev_get_drvdata(dev);
2393         int i = index / 11;     /* pwm index */
2394         int a = index % 11;     /* attribute index */
2395
2396         if (index >= 33) {      /* pwm 4..6 */
2397                 i = (index - 33) / 6 + 3;
2398                 a = (index - 33) % 6 + 4;
2399         }
2400
2401         if (!(data->has_pwm & BIT(i)))
2402                 return 0;
2403
2404         if (has_newer_autopwm(data)) {
2405                 if (a < 4)      /* no auto point pwm */
2406                         return 0;
2407                 if (a == 8)     /* no auto_point4 */
2408                         return 0;
2409         }
2410         if (has_old_autopwm(data)) {
2411                 if (a >= 9)     /* no pwm_auto_start, pwm_auto_slope */
2412                         return 0;
2413         }
2414
2415         return attr->mode;
2416 }
2417
2418 static struct attribute *it87_attributes_auto_pwm[] = {
2419         &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
2420         &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
2421         &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
2422         &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
2423         &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
2424         &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
2425         &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
2426         &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
2427         &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
2428         &sensor_dev_attr_pwm1_auto_start.dev_attr.attr,
2429         &sensor_dev_attr_pwm1_auto_slope.dev_attr.attr,
2430
2431         &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,    /* 11 */
2432         &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
2433         &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
2434         &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
2435         &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
2436         &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
2437         &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
2438         &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
2439         &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
2440         &sensor_dev_attr_pwm2_auto_start.dev_attr.attr,
2441         &sensor_dev_attr_pwm2_auto_slope.dev_attr.attr,
2442
2443         &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,    /* 22 */
2444         &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
2445         &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
2446         &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
2447         &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
2448         &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
2449         &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
2450         &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
2451         &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
2452         &sensor_dev_attr_pwm3_auto_start.dev_attr.attr,
2453         &sensor_dev_attr_pwm3_auto_slope.dev_attr.attr,
2454
2455         &sensor_dev_attr_pwm4_auto_point1_temp.dev_attr.attr,   /* 33 */
2456         &sensor_dev_attr_pwm4_auto_point1_temp_hyst.dev_attr.attr,
2457         &sensor_dev_attr_pwm4_auto_point2_temp.dev_attr.attr,
2458         &sensor_dev_attr_pwm4_auto_point3_temp.dev_attr.attr,
2459         &sensor_dev_attr_pwm4_auto_start.dev_attr.attr,
2460         &sensor_dev_attr_pwm4_auto_slope.dev_attr.attr,
2461
2462         &sensor_dev_attr_pwm5_auto_point1_temp.dev_attr.attr,
2463         &sensor_dev_attr_pwm5_auto_point1_temp_hyst.dev_attr.attr,
2464         &sensor_dev_attr_pwm5_auto_point2_temp.dev_attr.attr,
2465         &sensor_dev_attr_pwm5_auto_point3_temp.dev_attr.attr,
2466         &sensor_dev_attr_pwm5_auto_start.dev_attr.attr,
2467         &sensor_dev_attr_pwm5_auto_slope.dev_attr.attr,
2468
2469         &sensor_dev_attr_pwm6_auto_point1_temp.dev_attr.attr,
2470         &sensor_dev_attr_pwm6_auto_point1_temp_hyst.dev_attr.attr,
2471         &sensor_dev_attr_pwm6_auto_point2_temp.dev_attr.attr,
2472         &sensor_dev_attr_pwm6_auto_point3_temp.dev_attr.attr,
2473         &sensor_dev_attr_pwm6_auto_start.dev_attr.attr,
2474         &sensor_dev_attr_pwm6_auto_slope.dev_attr.attr,
2475
2476         NULL,
2477 };
2478
2479 static const struct attribute_group it87_group_auto_pwm = {
2480         .attrs = it87_attributes_auto_pwm,
2481         .is_visible = it87_auto_pwm_is_visible,
2482 };
2483
2484 /* SuperIO detection - will change isa_address if a chip is found */
2485 static int __init it87_find(int sioaddr, unsigned short *address,
2486                             struct it87_sio_data *sio_data)
2487 {
2488         int err;
2489         u16 chip_type;
2490         const char *board_vendor, *board_name;
2491         const struct it87_devices *config;
2492
2493         err = superio_enter(sioaddr);
2494         if (err)
2495                 return err;
2496
2497         err = -ENODEV;
2498         chip_type = superio_inw(sioaddr, DEVID);
2499         if (chip_type == 0xffff)
2500                 goto exit;
2501
2502         if (force_id)
2503                 chip_type = force_id;
2504
2505         switch (chip_type) {
2506         case IT8705F_DEVID:
2507                 sio_data->type = it87;
2508                 break;
2509         case IT8712F_DEVID:
2510                 sio_data->type = it8712;
2511                 break;
2512         case IT8716F_DEVID:
2513         case IT8726F_DEVID:
2514                 sio_data->type = it8716;
2515                 break;
2516         case IT8718F_DEVID:
2517                 sio_data->type = it8718;
2518                 break;
2519         case IT8720F_DEVID:
2520                 sio_data->type = it8720;
2521                 break;
2522         case IT8721F_DEVID:
2523                 sio_data->type = it8721;
2524                 break;
2525         case IT8728F_DEVID:
2526                 sio_data->type = it8728;
2527                 break;
2528         case IT8732F_DEVID:
2529                 sio_data->type = it8732;
2530                 break;
2531         case IT8792E_DEVID:
2532                 sio_data->type = it8792;
2533                 break;
2534         case IT8771E_DEVID:
2535                 sio_data->type = it8771;
2536                 break;
2537         case IT8772E_DEVID:
2538                 sio_data->type = it8772;
2539                 break;
2540         case IT8781F_DEVID:
2541                 sio_data->type = it8781;
2542                 break;
2543         case IT8782F_DEVID:
2544                 sio_data->type = it8782;
2545                 break;
2546         case IT8783E_DEVID:
2547                 sio_data->type = it8783;
2548                 break;
2549         case IT8786E_DEVID:
2550                 sio_data->type = it8786;
2551                 break;
2552         case IT8790E_DEVID:
2553                 sio_data->type = it8790;
2554                 break;
2555         case IT8603E_DEVID:
2556         case IT8623E_DEVID:
2557                 sio_data->type = it8603;
2558                 break;
2559         case IT8607E_DEVID:
2560                 sio_data->type = it8607;
2561                 break;
2562         case IT8620E_DEVID:
2563                 sio_data->type = it8620;
2564                 break;
2565         case IT8622E_DEVID:
2566                 sio_data->type = it8622;
2567                 break;
2568         case IT8628E_DEVID:
2569                 sio_data->type = it8628;
2570                 break;
2571         case IT8665E_DEVID:
2572                 sio_data->type = it8665;
2573                 break;
2574         case IT8686E_DEVID:
2575                 sio_data->type = it8686;
2576                 break;
2577         case 0xffff:    /* No device at all */
2578                 goto exit;
2579         default:
2580                 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
2581                 goto exit;
2582         }
2583
2584         superio_select(sioaddr, PME);
2585         if (!(superio_inb(sioaddr, IT87_ACT_REG) & 0x01)) {
2586                 pr_info("Device not activated, skipping\n");
2587                 goto exit;
2588         }
2589
2590         *address = superio_inw(sioaddr, IT87_BASE_REG) & ~(IT87_EXTENT - 1);
2591         if (*address == 0) {
2592                 pr_info("Base address not set, skipping\n");
2593                 goto exit;
2594         }
2595
2596         err = 0;
2597         sio_data->revision = superio_inb(sioaddr, DEVREV) & 0x0f;
2598         pr_info("Found IT%04x%s chip at 0x%x, revision %d\n", chip_type,
2599                 it87_devices[sio_data->type].suffix,
2600                 *address, sio_data->revision);
2601
2602         config = &it87_devices[sio_data->type];
2603
2604         /* in7 (VSB or VCCH5V) is always internal on some chips */
2605         if (has_in7_internal(config))
2606                 sio_data->internal |= BIT(1);
2607
2608         /* in8 (Vbat) is always internal */
2609         sio_data->internal |= BIT(2);
2610
2611         /* in9 (AVCC3), always internal if supported */
2612         if (has_avcc3(config))
2613                 sio_data->internal |= BIT(3); /* in9 is AVCC */
2614         else
2615                 sio_data->skip_in |= BIT(9);
2616
2617         if (!has_four_pwm(config))
2618                 sio_data->skip_pwm |= BIT(3) | BIT(4) | BIT(5);
2619         else if (!has_five_pwm(config))
2620                 sio_data->skip_pwm |= BIT(4) | BIT(5);
2621         else if (!has_six_pwm(config))
2622                 sio_data->skip_pwm |= BIT(5);
2623
2624         if (!has_vid(config))
2625                 sio_data->skip_vid = 1;
2626
2627         /* Read GPIO config and VID value from LDN 7 (GPIO) */
2628         if (sio_data->type == it87) {
2629                 /* The IT8705F has a different LD number for GPIO */
2630                 superio_select(sioaddr, 5);
2631                 sio_data->beep_pin = superio_inb(sioaddr,
2632                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2633         } else if (sio_data->type == it8783) {
2634                 int reg25, reg27, reg2a, reg2c, regef;
2635
2636                 superio_select(sioaddr, GPIO);
2637
2638                 reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2639                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2640                 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
2641                 reg2c = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2642                 regef = superio_inb(sioaddr, IT87_SIO_SPI_REG);
2643
2644                 /* Check if fan3 is there or not */
2645                 if ((reg27 & BIT(0)) || !(reg2c & BIT(2)))
2646                         sio_data->skip_fan |= BIT(2);
2647                 if ((reg25 & BIT(4)) ||
2648                     (!(reg2a & BIT(1)) && (regef & BIT(0))))
2649                         sio_data->skip_pwm |= BIT(2);
2650
2651                 /* Check if fan2 is there or not */
2652                 if (reg27 & BIT(7))
2653                         sio_data->skip_fan |= BIT(1);
2654                 if (reg27 & BIT(3))
2655                         sio_data->skip_pwm |= BIT(1);
2656
2657                 /* VIN5 */
2658                 if ((reg27 & BIT(0)) || (reg2c & BIT(2)))
2659                         sio_data->skip_in |= BIT(5); /* No VIN5 */
2660
2661                 /* VIN6 */
2662                 if (reg27 & BIT(1))
2663                         sio_data->skip_in |= BIT(6); /* No VIN6 */
2664
2665                 /*
2666                  * VIN7
2667                  * Does not depend on bit 2 of Reg2C, contrary to datasheet.
2668                  */
2669                 if (reg27 & BIT(2)) {
2670                         /*
2671                          * The data sheet is a bit unclear regarding the
2672                          * internal voltage divider for VCCH5V. It says
2673                          * "This bit enables and switches VIN7 (pin 91) to the
2674                          * internal voltage divider for VCCH5V".
2675                          * This is different to other chips, where the internal
2676                          * voltage divider would connect VIN7 to an internal
2677                          * voltage source. Maybe that is the case here as well.
2678                          *
2679                          * Since we don't know for sure, re-route it if that is
2680                          * not the case, and ask the user to report if the
2681                          * resulting voltage is sane.
2682                          */
2683                         if (!(reg2c & BIT(1))) {
2684                                 reg2c |= BIT(1);
2685                                 superio_outb(sioaddr, IT87_SIO_PINX2_REG,
2686                                              reg2c);
2687                                 pr_notice("Routing internal VCCH5V to in7.\n");
2688                         }
2689                         pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
2690                         pr_notice("Please report if it displays a reasonable voltage.\n");
2691                 }
2692
2693                 if (reg2c & BIT(0))
2694                         sio_data->internal |= BIT(0);
2695                 if (reg2c & BIT(1))
2696                         sio_data->internal |= BIT(1);
2697
2698                 sio_data->beep_pin = superio_inb(sioaddr,
2699                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2700         } else if (sio_data->type == it8603 || sio_data->type == it8607) {
2701                 int reg27, reg29;
2702
2703                 superio_select(sioaddr, GPIO);
2704
2705                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2706
2707                 /* Check if fan3 is there or not */
2708                 if (reg27 & BIT(6))
2709                         sio_data->skip_pwm |= BIT(2);
2710                 if (reg27 & BIT(7))
2711                         sio_data->skip_fan |= BIT(2);
2712
2713                 /* Check if fan2 is there or not */
2714                 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2715                 if (reg29 & BIT(1))
2716                         sio_data->skip_pwm |= BIT(1);
2717                 if (reg29 & BIT(2))
2718                         sio_data->skip_fan |= BIT(1);
2719
2720                 if (sio_data->type == it8603) {
2721                         sio_data->skip_in |= BIT(5); /* No VIN5 */
2722                         sio_data->skip_in |= BIT(6); /* No VIN6 */
2723                 }
2724
2725                 sio_data->beep_pin = superio_inb(sioaddr,
2726                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2727         } else if (sio_data->type == it8620 || sio_data->type == it8628 ||
2728                    sio_data->type == it8686) {
2729                 int reg;
2730
2731                 superio_select(sioaddr, GPIO);
2732
2733                 /* Check for pwm5 */
2734                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2735                 if (reg & BIT(6))
2736                         sio_data->skip_pwm |= BIT(4);
2737
2738                 /* Check for fan4, fan5 */
2739                 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2740                 if (!(reg & BIT(5)))
2741                         sio_data->skip_fan |= BIT(3);
2742                 if (!(reg & BIT(4)))
2743                         sio_data->skip_fan |= BIT(4);
2744
2745                 /* Check for pwm3, fan3 */
2746                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2747                 if (reg & BIT(6))
2748                         sio_data->skip_pwm |= BIT(2);
2749                 if (reg & BIT(7))
2750                         sio_data->skip_fan |= BIT(2);
2751
2752                 /* Check for pwm4 */
2753                 reg = superio_inb(sioaddr, IT87_SIO_GPIO4_REG);
2754                 if (reg & BIT(2))
2755                         sio_data->skip_pwm |= BIT(3);
2756
2757                 /* Check for pwm2, fan2 */
2758                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2759                 if (reg & BIT(1))
2760                         sio_data->skip_pwm |= BIT(1);
2761                 if (reg & BIT(2))
2762                         sio_data->skip_fan |= BIT(1);
2763                 /* Check for pwm6, fan6 */
2764                 if (!(reg & BIT(7))) {
2765                         sio_data->skip_pwm |= BIT(5);
2766                         sio_data->skip_fan |= BIT(5);
2767                 }
2768
2769                 /* Check if AVCC is on VIN3 */
2770                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2771                 if (reg & BIT(0))
2772                         sio_data->internal |= BIT(0);
2773                 else
2774                         sio_data->skip_in |= BIT(9);
2775
2776                 sio_data->beep_pin = superio_inb(sioaddr,
2777                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2778         } else if (sio_data->type == it8622) {
2779                 int reg;
2780
2781                 superio_select(sioaddr, GPIO);
2782
2783                 /* Check for pwm4, fan4 */
2784                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2785                 if (reg & BIT(6))
2786                         sio_data->skip_fan |= BIT(3);
2787                 if (reg & BIT(5))
2788                         sio_data->skip_pwm |= BIT(3);
2789
2790                 /* Check for pwm3, fan3, pwm5, fan5 */
2791                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2792                 if (reg & BIT(6))
2793                         sio_data->skip_pwm |= BIT(2);
2794                 if (reg & BIT(7))
2795                         sio_data->skip_fan |= BIT(2);
2796                 if (reg & BIT(3))
2797                         sio_data->skip_pwm |= BIT(4);
2798                 if (reg & BIT(1))
2799                         sio_data->skip_fan |= BIT(4);
2800
2801                 /* Check for pwm2, fan2 */
2802                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2803                 if (reg & BIT(1))
2804                         sio_data->skip_pwm |= BIT(1);
2805                 if (reg & BIT(2))
2806                         sio_data->skip_fan |= BIT(1);
2807
2808                 /* Check for AVCC */
2809                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2810                 if (!(reg & BIT(0)))
2811                         sio_data->skip_in |= BIT(9);
2812
2813                 sio_data->beep_pin = superio_inb(sioaddr,
2814                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2815         } else if (sio_data->type == it8732) {
2816                 int reg;
2817
2818                 superio_select(sioaddr, GPIO);
2819
2820                 /* Check for pwm2, fan2 */
2821                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2822                 if (reg & BIT(1))
2823                         sio_data->skip_pwm |= BIT(1);
2824                 if (reg & BIT(2))
2825                         sio_data->skip_fan |= BIT(1);
2826
2827                 /* Check for pwm3, fan3, fan4 */
2828                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2829                 if (reg & BIT(6))
2830                         sio_data->skip_pwm |= BIT(2);
2831                 if (reg & BIT(7))
2832                         sio_data->skip_fan |= BIT(2);
2833                 if (reg & BIT(5))
2834                         sio_data->skip_fan |= BIT(3);
2835
2836                 /* Check if AVCC is on VIN3 */
2837                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2838                 if (reg & BIT(0))
2839                         sio_data->internal |= BIT(0);
2840
2841                 sio_data->beep_pin = superio_inb(sioaddr,
2842                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2843         } else if (sio_data->type == it8665) {
2844                 int reg;
2845
2846                 superio_select(sioaddr, GPIO);
2847
2848                 /* Check for pwm2 */
2849                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2850                 if (reg & BIT(1))
2851                         sio_data->skip_pwm |= BIT(1);
2852
2853                 /* Check for fan2 */
2854                 reg = superio_inb(sioaddr, IT87_SIO_PINX4_REG);
2855                 if (reg & BIT(4))
2856                         sio_data->skip_fan |= BIT(1);
2857
2858                 /* Check for pwm3, fan3 */
2859                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2860                 if (reg & BIT(6))
2861                         sio_data->skip_pwm |= BIT(2);
2862                 if (reg & BIT(7))
2863                         sio_data->skip_fan |= BIT(2);
2864
2865                 /* Check for pwm5, fan5 */
2866                 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2867                 if (reg & BIT(5))
2868                         sio_data->skip_pwm |= BIT(4);
2869                 if (!(reg & BIT(4)))
2870                         sio_data->skip_fan |= BIT(4);
2871
2872                 /* Check for pwm4, fan4, pwm6, fan6 */
2873                 reg = superio_inb(sioaddr, IT87_SIO_GPIO9_REG);
2874                 if (reg & BIT(2))
2875                         sio_data->skip_pwm |= BIT(3);
2876                 if (reg & BIT(3))
2877                         sio_data->skip_fan |= BIT(3);
2878                 if (reg & BIT(0))
2879                         sio_data->skip_pwm |= BIT(5);
2880                 if (reg & BIT(1))
2881                         sio_data->skip_fan |= BIT(5);
2882
2883                 sio_data->beep_pin = superio_inb(sioaddr,
2884                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2885         } else {
2886                 int reg;
2887                 bool uart6;
2888
2889                 superio_select(sioaddr, GPIO);
2890
2891                 /* Check for fan4, fan5 */
2892                 if (has_five_fans(config)) {
2893                         reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2894                         switch (sio_data->type) {
2895                         case it8718:
2896                                 if (reg & BIT(5))
2897                                         sio_data->skip_fan |= BIT(3);
2898                                 if (reg & BIT(4))
2899                                         sio_data->skip_fan |= BIT(4);
2900                                 break;
2901                         case it8720:
2902                         case it8721:
2903                         case it8728:
2904                                 if (!(reg & BIT(5)))
2905                                         sio_data->skip_fan |= BIT(3);
2906                                 if (!(reg & BIT(4)))
2907                                         sio_data->skip_fan |= BIT(4);
2908                                 break;
2909                         default:
2910                                 break;
2911                         }
2912                 }
2913
2914                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2915                 if (!sio_data->skip_vid) {
2916                         /* We need at least 4 VID pins */
2917                         if (reg & 0x0f) {
2918                                 pr_info("VID is disabled (pins used for GPIO)\n");
2919                                 sio_data->skip_vid = 1;
2920                         }
2921                 }
2922
2923                 /* Check if fan3 is there or not */
2924                 if (reg & BIT(6))
2925                         sio_data->skip_pwm |= BIT(2);
2926                 if (reg & BIT(7))
2927                         sio_data->skip_fan |= BIT(2);
2928
2929                 /* Check if fan2 is there or not */
2930                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2931                 if (reg & BIT(1))
2932                         sio_data->skip_pwm |= BIT(1);
2933                 if (reg & BIT(2))
2934                         sio_data->skip_fan |= BIT(1);
2935
2936                 if ((sio_data->type == it8718 || sio_data->type == it8720) &&
2937                     !(sio_data->skip_vid))
2938                         sio_data->vid_value = superio_inb(sioaddr,
2939                                                           IT87_SIO_VID_REG);
2940
2941                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2942
2943                 uart6 = sio_data->type == it8782 && (reg & BIT(2));
2944
2945                 /*
2946                  * The IT8720F has no VIN7 pin, so VCCH should always be
2947                  * routed internally to VIN7 with an internal divider.
2948                  * Curiously, there still is a configuration bit to control
2949                  * this, which means it can be set incorrectly. And even
2950                  * more curiously, many boards out there are improperly
2951                  * configured, even though the IT8720F datasheet claims
2952                  * that the internal routing of VCCH to VIN7 is the default
2953                  * setting. So we force the internal routing in this case.
2954                  *
2955                  * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
2956                  * If UART6 is enabled, re-route VIN7 to the internal divider
2957                  * if that is not already the case.
2958                  */
2959                 if ((sio_data->type == it8720 || uart6) && !(reg & BIT(1))) {
2960                         reg |= BIT(1);
2961                         superio_outb(sioaddr, IT87_SIO_PINX2_REG, reg);
2962                         pr_notice("Routing internal VCCH to in7\n");
2963                 }
2964                 if (reg & BIT(0))
2965                         sio_data->internal |= BIT(0);
2966                 if (reg & BIT(1))
2967                         sio_data->internal |= BIT(1);
2968
2969                 /*
2970                  * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
2971                  * While VIN7 can be routed to the internal voltage divider,
2972                  * VIN5 and VIN6 are not available if UART6 is enabled.
2973                  *
2974                  * Also, temp3 is not available if UART6 is enabled and TEMPIN3
2975                  * is the temperature source. Since we can not read the
2976                  * temperature source here, skip_temp is preliminary.
2977                  */
2978                 if (uart6) {
2979                         sio_data->skip_in |= BIT(5) | BIT(6);
2980                         sio_data->skip_temp |= BIT(2);
2981                 }
2982
2983                 sio_data->beep_pin = superio_inb(sioaddr,
2984                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2985         }
2986         if (sio_data->beep_pin)
2987                 pr_info("Beeping is supported\n");
2988
2989         /* Disable specific features based on DMI strings */
2990         board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
2991         board_name = dmi_get_system_info(DMI_BOARD_NAME);
2992         if (board_vendor && board_name) {
2993                 if (strcmp(board_vendor, "nVIDIA") == 0 &&
2994                     strcmp(board_name, "FN68PT") == 0) {
2995                         /*
2996                          * On the Shuttle SN68PT, FAN_CTL2 is apparently not
2997                          * connected to a fan, but to something else. One user
2998                          * has reported instant system power-off when changing
2999                          * the PWM2 duty cycle, so we disable it.
3000                          * I use the board name string as the trigger in case
3001                          * the same board is ever used in other systems.
3002                          */
3003                         pr_info("Disabling pwm2 due to hardware constraints\n");
3004                         sio_data->skip_pwm = BIT(1);
3005                 }
3006         }
3007
3008 exit:
3009         superio_exit(sioaddr);
3010         return err;
3011 }
3012
3013 /* Called when we have found a new IT87. */
3014 static void it87_init_device(struct platform_device *pdev)
3015 {
3016         struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
3017         struct it87_data *data = platform_get_drvdata(pdev);
3018         int tmp, i;
3019         u8 mask;
3020
3021         /* Initialize chip specific register pointers */
3022         switch (data->type) {
3023         case it8665:
3024                 data->REG_FAN = IT87_REG_FAN_8665;
3025                 data->REG_FANX = IT87_REG_FANX_8665;
3026                 data->REG_FAN_MIN = IT87_REG_FAN_MIN_8665;
3027                 data->REG_FANX_MIN = IT87_REG_FANX_MIN_8665;
3028                 data->REG_PWM = IT87_REG_PWM_8665;
3029                 break;
3030         case it8622:
3031                 data->REG_FAN = IT87_REG_FAN;
3032                 data->REG_FANX = IT87_REG_FANX;
3033                 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3034                 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3035                 data->REG_PWM = IT87_REG_PWM_8665;
3036                 break;
3037         default:
3038                 data->REG_FAN = IT87_REG_FAN;
3039                 data->REG_FANX = IT87_REG_FANX;
3040                 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3041                 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3042                 data->REG_PWM = IT87_REG_PWM;
3043                 break;
3044         }
3045
3046         /*
3047          * For each PWM channel:
3048          * - If it is in automatic mode, setting to manual mode should set
3049          *   the fan to full speed by default.
3050          * - If it is in manual mode, we need a mapping to temperature
3051          *   channels to use when later setting to automatic mode later.
3052          *   Use a 1:1 mapping by default (we are clueless.)
3053          * In both cases, the value can (and should) be changed by the user
3054          * prior to switching to a different mode.
3055          * Note that this is no longer needed for the IT8721F and later, as
3056          * these have separate registers for the temperature mapping and the
3057          * manual duty cycle.
3058          */
3059         for (i = 0; i < NUM_AUTO_PWM; i++) {
3060                 data->pwm_temp_map[i] = i;
3061                 data->pwm_duty[i] = 0x7f;       /* Full speed */
3062                 data->auto_pwm[i][3] = 0x7f;    /* Full speed, hard-coded */
3063         }
3064
3065         /*
3066          * Some chips seem to have default value 0xff for all limit
3067          * registers. For low voltage limits it makes no sense and triggers
3068          * alarms, so change to 0 instead. For high temperature limits, it
3069          * means -1 degree C, which surprisingly doesn't trigger an alarm,
3070          * but is still confusing, so change to 127 degrees C.
3071          */
3072         for (i = 0; i < NUM_VIN_LIMIT; i++) {
3073                 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
3074                 if (tmp == 0xff)
3075                         it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
3076         }
3077         for (i = 0; i < NUM_TEMP_LIMIT; i++) {
3078                 tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
3079                 if (tmp == 0xff)
3080                         it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
3081         }
3082
3083         /*
3084          * Temperature channels are not forcibly enabled, as they can be
3085          * set to two different sensor types and we can't guess which one
3086          * is correct for a given system. These channels can be enabled at
3087          * run-time through the temp{1-3}_type sysfs accessors if needed.
3088          */
3089
3090         /* Check if voltage monitors are reset manually or by some reason */
3091         tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
3092         if ((tmp & 0xff) == 0) {
3093                 /* Enable all voltage monitors */
3094                 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
3095         }
3096
3097         /* Check if tachometers are reset manually or by some reason */
3098         mask = 0x70 & ~(sio_data->skip_fan << 4);
3099         data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
3100         if ((data->fan_main_ctrl & mask) == 0) {
3101                 /* Enable all fan tachometers */
3102                 data->fan_main_ctrl |= mask;
3103                 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
3104                                  data->fan_main_ctrl);
3105         }
3106         data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
3107
3108         tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
3109
3110         /* Set tachometers to 16-bit mode if needed */
3111         if (has_fan16_config(data)) {
3112                 if (~tmp & 0x07 & data->has_fan) {
3113                         dev_dbg(&pdev->dev,
3114                                 "Setting fan1-3 to 16-bit mode\n");
3115                         it87_write_value(data, IT87_REG_FAN_16BIT,
3116                                          tmp | 0x07);
3117                 }
3118         }
3119
3120         /* Check for additional fans */
3121         if (has_four_fans(data) && (tmp & BIT(4)))
3122                 data->has_fan |= BIT(3); /* fan4 enabled */
3123         if (has_five_fans(data) && (tmp & BIT(5)))
3124                 data->has_fan |= BIT(4); /* fan5 enabled */
3125         if (has_six_fans(data)) {
3126                 switch (data->type) {
3127                 case it8620:
3128                 case it8628:
3129                 case it8686:
3130                         if (tmp & BIT(2))
3131                                 data->has_fan |= BIT(5); /* fan6 enabled */
3132                         break;
3133                 case it8665:
3134                         tmp = it87_read_value(data, IT87_REG_FAN_DIV);
3135                         if (tmp & BIT(3))
3136                                 data->has_fan |= BIT(5); /* fan6 enabled */
3137                         break;
3138                 default:
3139                         break;
3140                 }
3141         }
3142
3143         /* Fan input pins may be used for alternative functions */
3144         data->has_fan &= ~sio_data->skip_fan;
3145
3146         /* Check if pwm6 is enabled */
3147         if (has_six_pwm(data)) {
3148                 switch (data->type) {
3149                 case it8620:
3150                 case it8686:
3151                         tmp = it87_read_value(data, IT87_REG_FAN_DIV);
3152                         if (!(tmp & BIT(3)))
3153                                 sio_data->skip_pwm |= BIT(5);
3154                         break;
3155                 default:
3156                         break;
3157                 }
3158         }
3159
3160         /* Start monitoring */
3161         it87_write_value(data, IT87_REG_CONFIG,
3162                          (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
3163                          | (update_vbat ? 0x41 : 0x01));
3164 }
3165
3166 /* Return 1 if and only if the PWM interface is safe to use */
3167 static int it87_check_pwm(struct device *dev)
3168 {
3169         struct it87_data *data = dev_get_drvdata(dev);
3170         /*
3171          * Some BIOSes fail to correctly configure the IT87 fans. All fans off
3172          * and polarity set to active low is sign that this is the case so we
3173          * disable pwm control to protect the user.
3174          */
3175         int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
3176
3177         if ((tmp & 0x87) == 0) {
3178                 if (fix_pwm_polarity) {
3179                         /*
3180                          * The user asks us to attempt a chip reconfiguration.
3181                          * This means switching to active high polarity and
3182                          * inverting all fan speed values.
3183                          */
3184                         int i;
3185                         u8 pwm[3];
3186
3187                         for (i = 0; i < ARRAY_SIZE(pwm); i++)
3188                                 pwm[i] = it87_read_value(data,
3189                                                          data->REG_PWM[i]);
3190
3191                         /*
3192                          * If any fan is in automatic pwm mode, the polarity
3193                          * might be correct, as suspicious as it seems, so we
3194                          * better don't change anything (but still disable the
3195                          * PWM interface).
3196                          */
3197                         if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
3198                                 dev_info(dev,
3199                                          "Reconfiguring PWM to active high polarity\n");
3200                                 it87_write_value(data, IT87_REG_FAN_CTL,
3201                                                  tmp | 0x87);
3202                                 for (i = 0; i < 3; i++)
3203                                         it87_write_value(data,
3204                                                          data->REG_PWM[i],
3205                                                          0x7f & ~pwm[i]);
3206                                 return 1;
3207                         }
3208
3209                         dev_info(dev,
3210                                  "PWM configuration is too broken to be fixed\n");
3211                 }
3212
3213                 dev_info(dev,
3214                          "Detected broken BIOS defaults, disabling PWM interface\n");
3215                 return 0;
3216         } else if (fix_pwm_polarity) {
3217                 dev_info(dev,
3218                          "PWM configuration looks sane, won't touch\n");
3219         }
3220
3221         return 1;
3222 }
3223
3224 static int it87_probe(struct platform_device *pdev)
3225 {
3226         struct it87_data *data;
3227         struct resource *res;
3228         struct device *dev = &pdev->dev;
3229         struct it87_sio_data *sio_data = dev_get_platdata(dev);
3230         int enable_pwm_interface;
3231         struct device *hwmon_dev;
3232
3233         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3234         if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
3235                                  DRVNAME)) {
3236                 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
3237                         (unsigned long)res->start,
3238                         (unsigned long)(res->start + IT87_EC_EXTENT - 1));
3239                 return -EBUSY;
3240         }
3241
3242         data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
3243         if (!data)
3244                 return -ENOMEM;
3245
3246         data->addr = res->start;
3247         data->type = sio_data->type;
3248         data->features = it87_devices[sio_data->type].features;
3249         data->peci_mask = it87_devices[sio_data->type].peci_mask;
3250         data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
3251         data->bank = 0xff;
3252
3253         /*
3254          * IT8705F Datasheet 0.4.1, 3h == Version G.
3255          * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
3256          * These are the first revisions with 16-bit tachometer support.
3257          */
3258         switch (data->type) {
3259         case it87:
3260                 if (sio_data->revision >= 0x03) {
3261                         data->features &= ~FEAT_OLD_AUTOPWM;
3262                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS;
3263                 }
3264                 break;
3265         case it8712:
3266                 if (sio_data->revision >= 0x08) {
3267                         data->features &= ~FEAT_OLD_AUTOPWM;
3268                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS |
3269                                           FEAT_FIVE_FANS;
3270                 }
3271                 break;
3272         default:
3273                 break;
3274         }
3275
3276         /* Now, we do the remaining detection. */
3277         if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80) ||
3278             it87_read_value(data, IT87_REG_CHIPID) != 0x90)
3279                 return -ENODEV;
3280
3281         platform_set_drvdata(pdev, data);
3282
3283         mutex_init(&data->update_lock);
3284
3285         /* Check PWM configuration */
3286         enable_pwm_interface = it87_check_pwm(dev);
3287
3288         /* Starting with IT8721F, we handle scaling of internal voltages */
3289         if (has_scaling(data)) {
3290                 if (sio_data->internal & BIT(0))
3291                         data->in_scaled |= BIT(3);      /* in3 is AVCC */
3292                 if (sio_data->internal & BIT(1))
3293                         data->in_scaled |= BIT(7);      /* in7 is VSB */
3294                 if (sio_data->internal & BIT(2))
3295                         data->in_scaled |= BIT(8);      /* in8 is Vbat */
3296                 if (sio_data->internal & BIT(3))
3297                         data->in_scaled |= BIT(9);      /* in9 is AVCC */
3298         } else if (sio_data->type == it8781 || sio_data->type == it8782 ||
3299                    sio_data->type == it8783) {
3300                 if (sio_data->internal & BIT(0))
3301                         data->in_scaled |= BIT(3);      /* in3 is VCC5V */
3302                 if (sio_data->internal & BIT(1))
3303                         data->in_scaled |= BIT(7);      /* in7 is VCCH5V */
3304         }
3305
3306         data->has_temp = 0x07;
3307         if (sio_data->skip_temp & BIT(2)) {
3308                 if (sio_data->type == it8782 &&
3309                     !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
3310                         data->has_temp &= ~BIT(2);
3311         }
3312
3313         data->in_internal = sio_data->internal;
3314         data->has_in = 0x3ff & ~sio_data->skip_in;
3315
3316         if (has_six_temp(data)) {
3317                 u8 reg = it87_read_value(data, IT87_REG_TEMP456_ENABLE);
3318
3319                 /* Check for additional temperature sensors */
3320                 if ((reg & 0x03) >= 0x02)
3321                         data->has_temp |= BIT(3);
3322                 if (((reg >> 2) & 0x03) >= 0x02)
3323                         data->has_temp |= BIT(4);
3324                 if (((reg >> 4) & 0x03) >= 0x02)
3325                         data->has_temp |= BIT(5);
3326
3327                 /* Check for additional voltage sensors */
3328                 if ((reg & 0x03) == 0x01)
3329                         data->has_in |= BIT(10);
3330                 if (((reg >> 2) & 0x03) == 0x01)
3331                         data->has_in |= BIT(11);
3332                 if (((reg >> 4) & 0x03) == 0x01)
3333                         data->has_in |= BIT(12);
3334         }
3335
3336         data->has_beep = !!sio_data->beep_pin;
3337
3338         /* Initialize the IT87 chip */
3339         it87_init_device(pdev);
3340
3341         if (!sio_data->skip_vid) {
3342                 data->has_vid = true;
3343                 data->vrm = vid_which_vrm();
3344                 /* VID reading from Super-I/O config space if available */
3345                 data->vid = sio_data->vid_value;
3346         }
3347
3348         /* Prepare for sysfs hooks */
3349         data->groups[0] = &it87_group;
3350         data->groups[1] = &it87_group_in;
3351         data->groups[2] = &it87_group_temp;
3352         data->groups[3] = &it87_group_fan;
3353
3354         if (enable_pwm_interface) {
3355                 data->has_pwm = BIT(ARRAY_SIZE(IT87_REG_PWM)) - 1;
3356                 data->has_pwm &= ~sio_data->skip_pwm;
3357
3358                 data->groups[4] = &it87_group_pwm;
3359                 if (has_old_autopwm(data) || has_newer_autopwm(data))
3360                         data->groups[5] = &it87_group_auto_pwm;
3361         }
3362
3363         hwmon_dev = devm_hwmon_device_register_with_groups(dev,
3364                                         it87_devices[sio_data->type].name,
3365                                         data, data->groups);
3366         return PTR_ERR_OR_ZERO(hwmon_dev);
3367 }
3368
3369 static struct platform_driver it87_driver = {
3370         .driver = {
3371                 .name   = DRVNAME,
3372         },
3373         .probe  = it87_probe,
3374 };
3375
3376 static int __init it87_device_add(int index, unsigned short address,
3377                                   const struct it87_sio_data *sio_data)
3378 {
3379         struct platform_device *pdev;
3380         struct resource res = {
3381                 .start  = address + IT87_EC_OFFSET,
3382                 .end    = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
3383                 .name   = DRVNAME,
3384                 .flags  = IORESOURCE_IO,
3385         };
3386         int err;
3387
3388         err = acpi_check_resource_conflict(&res);
3389         if (err)
3390                 return err;
3391
3392         pdev = platform_device_alloc(DRVNAME, address);
3393         if (!pdev)
3394                 return -ENOMEM;
3395
3396         err = platform_device_add_resources(pdev, &res, 1);
3397         if (err) {
3398                 pr_err("Device resource addition failed (%d)\n", err);
3399                 goto exit_device_put;
3400         }
3401
3402         err = platform_device_add_data(pdev, sio_data,
3403                                        sizeof(struct it87_sio_data));
3404         if (err) {
3405                 pr_err("Platform data allocation failed\n");
3406                 goto exit_device_put;
3407         }
3408
3409         err = platform_device_add(pdev);
3410         if (err) {
3411                 pr_err("Device addition failed (%d)\n", err);
3412                 goto exit_device_put;
3413         }
3414
3415         it87_pdev[index] = pdev;
3416         return 0;
3417
3418 exit_device_put:
3419         platform_device_put(pdev);
3420         return err;
3421 }
3422
3423 static int __init sm_it87_init(void)
3424 {
3425         int sioaddr[2] = { REG_2E, REG_4E };
3426         struct it87_sio_data sio_data;
3427         unsigned short isa_address;
3428         bool found = false;
3429         int i, err;
3430
3431         err = platform_driver_register(&it87_driver);
3432         if (err)
3433                 return err;
3434
3435         for (i = 0; i < ARRAY_SIZE(sioaddr); i++) {
3436                 memset(&sio_data, 0, sizeof(struct it87_sio_data));
3437                 isa_address = 0;
3438                 err = it87_find(sioaddr[i], &isa_address, &sio_data);
3439                 if (err || isa_address == 0)
3440                         continue;
3441
3442                 err = it87_device_add(i, isa_address, &sio_data);
3443                 if (err)
3444                         goto exit_dev_unregister;
3445                 found = true;
3446         }
3447
3448         if (!found) {
3449                 err = -ENODEV;
3450                 goto exit_unregister;
3451         }
3452         return 0;
3453
3454 exit_dev_unregister:
3455         /* NULL check handled by platform_device_unregister */
3456         platform_device_unregister(it87_pdev[0]);
3457 exit_unregister:
3458         platform_driver_unregister(&it87_driver);
3459         return err;
3460 }
3461
3462 static void __exit sm_it87_exit(void)
3463 {
3464         /* NULL check handled by platform_device_unregister */
3465         platform_device_unregister(it87_pdev[1]);
3466         platform_device_unregister(it87_pdev[0]);
3467         platform_driver_unregister(&it87_driver);
3468 }
3469
3470 MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>");
3471 MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
3472 module_param(update_vbat, bool, 0);
3473 MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
3474 module_param(fix_pwm_polarity, bool, 0);
3475 MODULE_PARM_DESC(fix_pwm_polarity,
3476                  "Force PWM polarity to active high (DANGEROUS)");
3477 MODULE_LICENSE("GPL");
3478
3479 module_init(sm_it87_init);
3480 module_exit(sm_it87_exit);