git.sur5r.net Git - groeck-it87/blob - it87.c

   1 /*
   2  *  it87.c - Part of lm_sensors, Linux kernel modules for hardware
   3  *           monitoring.
   4  *
   5  *  The IT8705F is an LPC-based Super I/O part that contains UARTs, a
   6  *  parallel port, an IR port, a MIDI port, a floppy controller, etc., in
   7  *  addition to an Environment Controller (Enhanced Hardware Monitor and
   8  *  Fan Controller)
   9  *
  10  *  This driver supports only the Environment Controller in the IT8705F and
  11  *  similar parts.  The other devices are supported by different drivers.
  12  *
  13  *  Supports: IT8603E  Super I/O chip w/LPC interface
  14  *            IT8607E  Super I/O chip w/LPC interface
  15  *            IT8613E  Super I/O chip w/LPC interface
  16  *            IT8620E  Super I/O chip w/LPC interface
  17  *            IT8622E  Super I/O chip w/LPC interface
  18  *            IT8623E  Super I/O chip w/LPC interface
  19  *            IT8625E  Super I/O chip w/LPC interface
  20  *            IT8628E  Super I/O chip w/LPC interface
  21  *            IT8655E  Super I/O chip w/LPC interface
  22  *            IT8665E  Super I/O chip w/LPC interface
  23  *            IT8686E  Super I/O chip w/LPC interface
  24  *            IT8705F  Super I/O chip w/LPC interface
  25  *            IT8712F  Super I/O chip w/LPC interface
  26  *            IT8716F  Super I/O chip w/LPC interface
  27  *            IT8718F  Super I/O chip w/LPC interface
  28  *            IT8720F  Super I/O chip w/LPC interface
  29  *            IT8721F  Super I/O chip w/LPC interface
  30  *            IT8726F  Super I/O chip w/LPC interface
  31  *            IT8728F  Super I/O chip w/LPC interface
  32  *            IT8732F  Super I/O chip w/LPC interface
  33  *            IT8758E  Super I/O chip w/LPC interface
  34  *            IT8771E  Super I/O chip w/LPC interface
  35  *            IT8772E  Super I/O chip w/LPC interface
  36  *            IT8781F  Super I/O chip w/LPC interface
  37  *            IT8782F  Super I/O chip w/LPC interface
  38  *            IT8783E/F Super I/O chip w/LPC interface
  39  *            IT8786E  Super I/O chip w/LPC interface
  40  *            IT8790E  Super I/O chip w/LPC interface
  41  *            IT8792E  Super I/O chip w/LPC interface
  42  *            Sis950   A clone of the IT8705F
  43  *
  44  *  Copyright (C) 2001 Chris Gauthron
  45  *  Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de>
  46  *
  47  *  This program is free software; you can redistribute it and/or modify
  48  *  it under the terms of the GNU General Public License as published by
  49  *  the Free Software Foundation; either version 2 of the License, or
  50  *  (at your option) any later version.
  51  *
  52  *  This program is distributed in the hope that it will be useful,
  53  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  54  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  55  *  GNU General Public License for more details.
  56  */
  57
  58 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  59
  60 #include <linux/bitops.h>
  61 #include <linux/module.h>
  62 #include <linux/init.h>
  63 #include <linux/slab.h>
  64 #include <linux/jiffies.h>
  65 #include <linux/platform_device.h>
  66 #include <linux/hwmon.h>
  67 #include <linux/hwmon-sysfs.h>
  68 #include <linux/hwmon-vid.h>
  69 #include <linux/err.h>
  70 #include <linux/mutex.h>
  71 #include <linux/sysfs.h>
  72 #include <linux/string.h>
  73 #include <linux/dmi.h>
  74 #include <linux/acpi.h>
  75 #include <linux/io.h>
  76 #include "compat.h"
  77 #include "version.h"
  78
  79 #define DRVNAME "it87"
  80
  81 enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732,
  82              it8771, it8772, it8781, it8782, it8783, it8786, it8790,
  83              it8792, it8603, it8607, it8613, it8620, it8622, it8625, it8628,
  84              it8655, it8665, it8686 };
  85
  86 static unsigned short force_id;
  87 module_param(force_id, ushort, 0);
  88 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  89
  90 static bool ignore_resource_conflict;
  91 module_param(ignore_resource_conflict, bool, 0);
  92 MODULE_PARM_DESC(ignore_resource_conflict, "Ignore ACPI resource conflict");
  93
  94 static bool mmio;
  95 module_param(mmio, bool, 0);
  96 MODULE_PARM_DESC(mmio, "Use MMIO if available");
  97
  98 static struct platform_device *it87_pdev[2];
  99
 100 #define REG_2E  0x2e    /* The register to read/write */
 101 #define REG_4E  0x4e    /* Secondary register to read/write */
 102
 103 #define DEV     0x07    /* Register: Logical device select */
 104 #define PME     0x04    /* The device with the fan registers in it */
 105
 106 /* The device with the IT8718F/IT8720F VID value in it */
 107 #define GPIO    0x07
 108
 109 #define DEVID   0x20    /* Register: Device ID */
 110 #define DEVREV  0x22    /* Register: Device Revision */
 111
 112 static inline void __superio_enter(int ioreg)
 113 {
 114         outb(0x87, ioreg);
 115         outb(0x01, ioreg);
 116         outb(0x55, ioreg);
 117         outb(ioreg == REG_4E ? 0xaa : 0x55, ioreg);
 118 }
 119
 120 static inline int superio_inb(int ioreg, int reg)
 121 {
 122         int val;
 123
 124         outb(reg, ioreg);
 125         val = inb(ioreg + 1);
 126
 127         return val;
 128 }
 129
 130 static inline void superio_outb(int ioreg, int reg, int val)
 131 {
 132         outb(reg, ioreg);
 133         outb(val, ioreg + 1);
 134 }
 135
 136 static int superio_inw(int ioreg, int reg)
 137 {
 138         return (superio_inb(ioreg, reg) << 8) | superio_inb(ioreg, reg + 1);
 139 }
 140
 141 static inline void superio_select(int ioreg, int ldn)
 142 {
 143         outb(DEV, ioreg);
 144         outb(ldn, ioreg + 1);
 145 }
 146
 147 static inline int superio_enter(int ioreg)
 148 {
 149         /*
 150          * Try to reserve ioreg and ioreg + 1 for exclusive access.
 151          */
 152         if (!request_muxed_region(ioreg, 2, DRVNAME))
 153                 return -EBUSY;
 154
 155         __superio_enter(ioreg);
 156         return 0;
 157 }
 158
 159 static inline void superio_exit(int ioreg, bool doexit)
 160 {
 161         if (doexit) {
 162                 outb(0x02, ioreg);
 163                 outb(0x02, ioreg + 1);
 164         }
 165         release_region(ioreg, 2);
 166 }
 167
 168 /* Logical device 4 registers */
 169 #define IT8712F_DEVID 0x8712
 170 #define IT8705F_DEVID 0x8705
 171 #define IT8716F_DEVID 0x8716
 172 #define IT8718F_DEVID 0x8718
 173 #define IT8720F_DEVID 0x8720
 174 #define IT8721F_DEVID 0x8721
 175 #define IT8726F_DEVID 0x8726
 176 #define IT8728F_DEVID 0x8728
 177 #define IT8732F_DEVID 0x8732
 178 #define IT8792E_DEVID 0x8733
 179 #define IT8771E_DEVID 0x8771
 180 #define IT8772E_DEVID 0x8772
 181 #define IT8781F_DEVID 0x8781
 182 #define IT8782F_DEVID 0x8782
 183 #define IT8783E_DEVID 0x8783
 184 #define IT8786E_DEVID 0x8786
 185 #define IT8790E_DEVID 0x8790
 186 #define IT8603E_DEVID 0x8603
 187 #define IT8607E_DEVID 0x8607
 188 #define IT8613E_DEVID 0x8613
 189 #define IT8620E_DEVID 0x8620
 190 #define IT8622E_DEVID 0x8622
 191 #define IT8623E_DEVID 0x8623
 192 #define IT8625E_DEVID 0x8625
 193 #define IT8628E_DEVID 0x8628
 194 #define IT8655E_DEVID 0x8655
 195 #define IT8665E_DEVID 0x8665
 196 #define IT8686E_DEVID 0x8686
 197
 198 /* Logical device 4 (Environmental Monitor) registers */
 199 #define IT87_ACT_REG            0x30
 200 #define IT87_BASE_REG           0x60
 201 #define IT87_SPECIAL_CFG_REG    0xf3    /* special configuration register */
 202
 203 /* Global configuration registers (IT8712F and later) */
 204 #define IT87_EC_HWM_MIO_REG     0x24    /* MMIO configuration register */
 205 #define IT87_SIO_GPIO1_REG      0x25
 206 #define IT87_SIO_GPIO2_REG      0x26
 207 #define IT87_SIO_GPIO3_REG      0x27
 208 #define IT87_SIO_GPIO4_REG      0x28
 209 #define IT87_SIO_GPIO5_REG      0x29
 210 #define IT87_SIO_GPIO9_REG      0xd3
 211 #define IT87_SIO_PINX1_REG      0x2a    /* Pin selection */
 212 #define IT87_SIO_PINX2_REG      0x2c    /* Pin selection */
 213 #define IT87_SIO_PINX4_REG      0x2d    /* Pin selection */
 214
 215 /* Logical device 7 (GPIO) registers (IT8712F and later) */
 216 #define IT87_SIO_SPI_REG        0xef    /* SPI function pin select */
 217 #define IT87_SIO_VID_REG        0xfc    /* VID value */
 218 #define IT87_SIO_BEEP_PIN_REG   0xf6    /* Beep pin mapping */
 219
 220 /* Update battery voltage after every reading if true */
 221 static bool update_vbat;
 222
 223 /* Not all BIOSes properly configure the PWM registers */
 224 static bool fix_pwm_polarity;
 225
 226 /* Many IT87 constants specified below */
 227
 228 /* Length of ISA address segment */
 229 #define IT87_EXTENT 8
 230
 231 /* Length of ISA address segment for Environmental Controller */
 232 #define IT87_EC_EXTENT 2
 233
 234 /* Offset of EC registers from ISA base address */
 235 #define IT87_EC_OFFSET 5
 236
 237 /* Where are the ISA address/data registers relative to the EC base address */
 238 #define IT87_ADDR_REG_OFFSET 0
 239 #define IT87_DATA_REG_OFFSET 1
 240
 241 /*----- The IT87 registers -----*/
 242
 243 #define IT87_REG_CONFIG        0x00
 244
 245 #define IT87_REG_ALARM1        0x01
 246 #define IT87_REG_ALARM2        0x02
 247 #define IT87_REG_ALARM3        0x03
 248
 249 #define IT87_REG_BANK           0x06
 250
 251 /*
 252  * The IT8718F and IT8720F have the VID value in a different register, in
 253  * Super-I/O configuration space.
 254  */
 255 #define IT87_REG_VID           0x0a
 256 /*
 257  * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
 258  * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
 259  * mode.
 260  */
 261 #define IT87_REG_FAN_DIV       0x0b
 262 #define IT87_REG_FAN_16BIT     0x0c
 263
 264 /*
 265  * Monitors:
 266  * - up to 13 voltage (0 to 7, battery, avcc, 10 to 12)
 267  * - up to 6 temp (1 to 6)
 268  * - up to 6 fan (1 to 6)
 269  */
 270
 271 static const u8 IT87_REG_FAN[] =        { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c };
 272 static const u8 IT87_REG_FAN_MIN[] =    { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e };
 273 static const u8 IT87_REG_FANX[] =       { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d };
 274 static const u8 IT87_REG_FANX_MIN[] =   { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f };
 275
 276 static const u8 IT87_REG_FAN_8665[] =   { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x93 };
 277 static const u8 IT87_REG_FAN_MIN_8665[] =
 278                                         { 0x10, 0x11, 0x12, 0x84, 0x86, 0xb2 };
 279 static const u8 IT87_REG_FANX_8665[] =  { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x94 };
 280 static const u8 IT87_REG_FANX_MIN_8665[] =
 281                                         { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0xb3 };
 282
 283 static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59, 0x5a, 0x90, 0x91 };
 284
 285 static const u8 IT87_REG_TEMP_OFFSET_8686[] = { 0x56, 0x57, 0x59, 0x90, 0x91, 0x92 };
 286
 287 #define IT87_REG_FAN_MAIN_CTRL 0x13
 288 #define IT87_REG_FAN_CTL       0x14
 289
 290 static const u8 IT87_REG_PWM[] =        { 0x15, 0x16, 0x17, 0x7f, 0xa7, 0xaf };
 291 static const u8 IT87_REG_PWM_8665[] =   { 0x15, 0x16, 0x17, 0x1e, 0x1f, 0x92 };
 292
 293 static const u8 IT87_REG_PWM_DUTY[] =   { 0x63, 0x6b, 0x73, 0x7b, 0xa3, 0xab };
 294
 295 static const u8 IT87_REG_VIN[]  = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26,
 296                                     0x27, 0x28, 0x2f, 0x2c, 0x2d, 0x2e };
 297
 298 #define IT87_REG_TEMP(nr)      (0x29 + (nr))
 299
 300 #define IT87_REG_VIN_MAX(nr)   (0x30 + (nr) * 2)
 301 #define IT87_REG_VIN_MIN(nr)   (0x31 + (nr) * 2)
 302
 303 static const u8 IT87_REG_TEMP_HIGH[] =  { 0x40, 0x42, 0x44, 0x46, 0xb4, 0xb6 };
 304 static const u8 IT87_REG_TEMP_LOW[] =   { 0x41, 0x43, 0x45, 0x47, 0xb5, 0xb7 };
 305
 306 static const u8 IT87_REG_TEMP_HIGH_8686[] =
 307                                         { 0x40, 0x42, 0x44, 0xb4, 0xb6, 0xb8 };
 308 static const u8 IT87_REG_TEMP_LOW_8686[] =
 309                                         { 0x41, 0x43, 0x45, 0xb5, 0xb7, 0xb9 };
 310
 311 #define IT87_REG_VIN_ENABLE    0x50
 312 #define IT87_REG_TEMP_ENABLE   0x51
 313 #define IT87_REG_TEMP_EXTRA    0x55
 314 #define IT87_REG_BEEP_ENABLE   0x5c
 315
 316 #define IT87_REG_CHIPID        0x58
 317
 318 static const u8 IT87_REG_AUTO_BASE[] = { 0x60, 0x68, 0x70, 0x78, 0xa0, 0xa8 };
 319
 320 #define IT87_REG_AUTO_TEMP(nr, i) (IT87_REG_AUTO_BASE[nr] + (i))
 321 #define IT87_REG_AUTO_PWM(nr, i)  (IT87_REG_AUTO_BASE[nr] + 5 + (i))
 322
 323 #define IT87_REG_TEMP456_ENABLE 0x77
 324
 325 static const u16 IT87_REG_TEMP_SRC1[] = { 0x21d, 0x21e, 0x21f };
 326 #define IT87_REG_TEMP_SRC2      0x23d
 327
 328 #define NUM_VIN                 ARRAY_SIZE(IT87_REG_VIN)
 329 #define NUM_VIN_LIMIT           8
 330 #define NUM_TEMP                6
 331 #define NUM_FAN                 ARRAY_SIZE(IT87_REG_FAN)
 332 #define NUM_FAN_DIV             3
 333 #define NUM_PWM                 ARRAY_SIZE(IT87_REG_PWM)
 334 #define NUM_AUTO_PWM            ARRAY_SIZE(IT87_REG_PWM)
 335
 336 struct it87_devices {
 337         const char *name;
 338         const char * const suffix;
 339         u32 features;
 340         u8 num_temp_limit;
 341         u8 num_temp_offset;
 342         u8 num_temp_map;        /* Number of temperature sources for pwm */
 343         u8 peci_mask;
 344         u8 old_peci_mask;
 345         u8 smbus_bitmap;        /* SMBus enable bits in extra config register */
 346         u8 ec_special_config;
 347 };
 348
 349 #define FEAT_12MV_ADC           BIT(0)
 350 #define FEAT_NEWER_AUTOPWM      BIT(1)
 351 #define FEAT_OLD_AUTOPWM        BIT(2)
 352 #define FEAT_16BIT_FANS         BIT(3)
 353 #define FEAT_TEMP_PECI          BIT(5)
 354 #define FEAT_TEMP_OLD_PECI      BIT(6)
 355 #define FEAT_FAN16_CONFIG       BIT(7)  /* Need to enable 16-bit fans */
 356 #define FEAT_FIVE_FANS          BIT(8)  /* Supports five fans */
 357 #define FEAT_VID                BIT(9)  /* Set if chip supports VID */
 358 #define FEAT_IN7_INTERNAL       BIT(10) /* Set if in7 is internal */
 359 #define FEAT_SIX_FANS           BIT(11) /* Supports six fans */
 360 #define FEAT_10_9MV_ADC         BIT(12)
 361 #define FEAT_AVCC3              BIT(13) /* Chip supports in9/AVCC3 */
 362 #define FEAT_FIVE_PWM           BIT(14) /* Chip supports 5 pwm chn */
 363 #define FEAT_SIX_PWM            BIT(15) /* Chip supports 6 pwm chn */
 364 #define FEAT_PWM_FREQ2          BIT(16) /* Separate pwm freq 2 */
 365 #define FEAT_SIX_TEMP           BIT(17) /* Up to 6 temp sensors */
 366 #define FEAT_VIN3_5V            BIT(18) /* VIN3 connected to +5V */
 367 #define FEAT_FOUR_FANS          BIT(19) /* Supports four fans */
 368 #define FEAT_FOUR_PWM           BIT(20) /* Supports four fan controls */
 369 #define FEAT_BANK_SEL           BIT(21) /* Chip has multi-bank support */
 370 #define FEAT_SCALING            BIT(22) /* Internal voltage scaling */
 371 #define FEAT_FANCTL_ONOFF       BIT(23) /* chip has FAN_CTL ON/OFF */
 372 #define FEAT_11MV_ADC           BIT(24)
 373 #define FEAT_NEW_TEMPMAP        BIT(25) /* new temp input selection */
 374 #define FEAT_MMIO               BIT(26) /* Chip supports MMIO */
 375
 376 static const struct it87_devices it87_devices[] = {
 377         [it87] = {
 378                 .name = "it87",
 379                 .suffix = "F",
 380                 .features = FEAT_OLD_AUTOPWM | FEAT_FANCTL_ONOFF,
 381                                                 /* may need to overwrite */
 382                 .num_temp_limit = 3,
 383                 .num_temp_offset = 0,
 384                 .num_temp_map = 3,
 385         },
 386         [it8712] = {
 387                 .name = "it8712",
 388                 .suffix = "F",
 389                 .features = FEAT_OLD_AUTOPWM | FEAT_VID | FEAT_FANCTL_ONOFF,
 390                                                 /* may need to overwrite */
 391                 .num_temp_limit = 3,
 392                 .num_temp_offset = 0,
 393                 .num_temp_map = 3,
 394         },
 395         [it8716] = {
 396                 .name = "it8716",
 397                 .suffix = "F",
 398                 .features = FEAT_16BIT_FANS | FEAT_VID
 399                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2
 400                   | FEAT_FANCTL_ONOFF,
 401                 .num_temp_limit = 3,
 402                 .num_temp_offset = 3,
 403                 .num_temp_map = 3,
 404         },
 405         [it8718] = {
 406                 .name = "it8718",
 407                 .suffix = "F",
 408                 .features = FEAT_16BIT_FANS | FEAT_VID
 409                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 410                   | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 411                 .num_temp_limit = 3,
 412                 .num_temp_offset = 3,
 413                 .num_temp_map = 3,
 414                 .old_peci_mask = 0x4,
 415         },
 416         [it8720] = {
 417                 .name = "it8720",
 418                 .suffix = "F",
 419                 .features = FEAT_16BIT_FANS | FEAT_VID
 420                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 421                   | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 422                 .num_temp_limit = 3,
 423                 .num_temp_offset = 3,
 424                 .num_temp_map = 3,
 425                 .old_peci_mask = 0x4,
 426         },
 427         [it8721] = {
 428                 .name = "it8721",
 429                 .suffix = "F",
 430                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 431                   | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 432                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL
 433                   | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF,
 434                 .num_temp_limit = 3,
 435                 .num_temp_offset = 3,
 436                 .num_temp_map = 3,
 437                 .peci_mask = 0x05,
 438                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 439         },
 440         [it8728] = {
 441                 .name = "it8728",
 442                 .suffix = "F",
 443                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 444                   | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 445                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_SCALING
 446                   | FEAT_FANCTL_ONOFF,
 447                 .num_temp_limit = 6,
 448                 .num_temp_offset = 3,
 449                 .num_temp_map = 3,
 450                 .peci_mask = 0x07,
 451         },
 452         [it8732] = {
 453                 .name = "it8732",
 454                 .suffix = "F",
 455                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 456                   | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 457                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_FOUR_FANS
 458                   | FEAT_FOUR_PWM | FEAT_FANCTL_ONOFF,
 459                 .num_temp_limit = 3,
 460                 .num_temp_offset = 3,
 461                 .num_temp_map = 3,
 462                 .peci_mask = 0x07,
 463                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 464         },
 465         [it8771] = {
 466                 .name = "it8771",
 467                 .suffix = "E",
 468                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 469                   | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 470                   | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF,
 471                                 /* PECI: guesswork */
 472                                 /* 12mV ADC (OHM) */
 473                                 /* 16 bit fans (OHM) */
 474                                 /* three fans, always 16 bit (guesswork) */
 475                 .num_temp_limit = 3,
 476                 .num_temp_offset = 3,
 477                 .num_temp_map = 3,
 478                 .peci_mask = 0x07,
 479         },
 480         [it8772] = {
 481                 .name = "it8772",
 482                 .suffix = "E",
 483                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 484                   | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 485                   | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF,
 486                                 /* PECI (coreboot) */
 487                                 /* 12mV ADC (HWSensors4, OHM) */
 488                                 /* 16 bit fans (HWSensors4, OHM) */
 489                                 /* three fans, always 16 bit (datasheet) */
 490                 .num_temp_limit = 3,
 491                 .num_temp_offset = 3,
 492                 .num_temp_map = 3,
 493                 .peci_mask = 0x07,
 494         },
 495         [it8781] = {
 496                 .name = "it8781",
 497                 .suffix = "F",
 498                 .features = FEAT_16BIT_FANS
 499                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
 500                   | FEAT_FANCTL_ONOFF,
 501                 .num_temp_limit = 3,
 502                 .num_temp_offset = 3,
 503                 .num_temp_map = 3,
 504                 .old_peci_mask = 0x4,
 505         },
 506         [it8782] = {
 507                 .name = "it8782",
 508                 .suffix = "F",
 509                 .features = FEAT_16BIT_FANS
 510                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
 511                   | FEAT_FANCTL_ONOFF,
 512                 .num_temp_limit = 3,
 513                 .num_temp_offset = 3,
 514                 .num_temp_map = 3,
 515                 .old_peci_mask = 0x4,
 516         },
 517         [it8783] = {
 518                 .name = "it8783",
 519                 .suffix = "E/F",
 520                 .features = FEAT_16BIT_FANS
 521                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
 522                   | FEAT_FANCTL_ONOFF,
 523                 .num_temp_limit = 3,
 524                 .num_temp_offset = 3,
 525                 .num_temp_map = 3,
 526                 .old_peci_mask = 0x4,
 527         },
 528         [it8786] = {
 529                 .name = "it8786",
 530                 .suffix = "E",
 531                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 532                   | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 533                   | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 534                 .num_temp_limit = 3,
 535                 .num_temp_offset = 3,
 536                 .num_temp_map = 3,
 537                 .peci_mask = 0x07,
 538         },
 539         [it8790] = {
 540                 .name = "it8790",
 541                 .suffix = "E",
 542                 .features = FEAT_NEWER_AUTOPWM | FEAT_10_9MV_ADC | FEAT_SCALING
 543                   | FEAT_16BIT_FANS | FEAT_TEMP_PECI
 544                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 545                 .num_temp_limit = 3,
 546                 .num_temp_offset = 3,
 547                 .num_temp_map = 3,
 548                 .peci_mask = 0x07,
 549         },
 550         [it8792] = {
 551                 .name = "it8792",
 552                 .suffix = "E",
 553                 .features = FEAT_NEWER_AUTOPWM | FEAT_10_9MV_ADC | FEAT_SCALING
 554                   | FEAT_16BIT_FANS | FEAT_TEMP_PECI
 555                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 556                 .num_temp_limit = 3,
 557                 .num_temp_offset = 3,
 558                 .num_temp_map = 3,
 559                 .peci_mask = 0x07,
 560         },
 561         [it8603] = {
 562                 .name = "it8603",
 563                 .suffix = "E",
 564                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 565                   | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 566                   | FEAT_AVCC3 | FEAT_PWM_FREQ2 | FEAT_SCALING,
 567                 .num_temp_limit = 3,
 568                 .num_temp_offset = 3,
 569                 .num_temp_map = 4,
 570                 .peci_mask = 0x07,
 571         },
 572         [it8607] = {
 573                 .name = "it8607",
 574                 .suffix = "E",
 575                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 576                   | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL | FEAT_NEW_TEMPMAP
 577                   | FEAT_AVCC3 | FEAT_PWM_FREQ2 | FEAT_SCALING
 578                   | FEAT_FANCTL_ONOFF,
 579                 .num_temp_limit = 3,
 580                 .num_temp_offset = 3,
 581                 .num_temp_map = 6,
 582                 .peci_mask = 0x07,
 583         },
 584         [it8613] = {
 585                 .name = "it8613",
 586                 .suffix = "E",
 587                 .features = FEAT_NEWER_AUTOPWM | FEAT_11MV_ADC | FEAT_16BIT_FANS
 588                   | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 589                   | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
 590                   | FEAT_AVCC3 | FEAT_SCALING | FEAT_NEW_TEMPMAP,
 591                 .num_temp_limit = 6,
 592                 .num_temp_offset = 6,
 593                 .num_temp_map = 6,
 594                 .peci_mask = 0x07,
 595         },
 596         [it8620] = {
 597                 .name = "it8620",
 598                 .suffix = "E",
 599                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 600                   | FEAT_TEMP_PECI | FEAT_SIX_FANS
 601                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 602                   | FEAT_SIX_TEMP | FEAT_VIN3_5V | FEAT_SCALING
 603                   | FEAT_FANCTL_ONOFF,
 604                 .num_temp_limit = 3,
 605                 .num_temp_offset = 3,
 606                 .num_temp_map = 3,
 607                 .peci_mask = 0x07,
 608         },
 609         [it8622] = {
 610                 .name = "it8622",
 611                 .suffix = "E",
 612                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 613                   | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 614                   | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
 615                   | FEAT_AVCC3 | FEAT_VIN3_5V | FEAT_SCALING,
 616                 .num_temp_limit = 3,
 617                 .num_temp_offset = 3,
 618                 .num_temp_map = 4,
 619                 .peci_mask = 0x07,
 620                 .smbus_bitmap = BIT(1) | BIT(2),
 621         },
 622         [it8625] = {
 623                 .name = "it8625",
 624                 .suffix = "E",
 625                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 626                   | FEAT_AVCC3 | FEAT_NEW_TEMPMAP
 627                   | FEAT_11MV_ADC | FEAT_IN7_INTERNAL | FEAT_SIX_FANS
 628                   | FEAT_SIX_PWM | FEAT_BANK_SEL | FEAT_SCALING,
 629                 .num_temp_limit = 6,
 630                 .num_temp_offset = 6,
 631                 .num_temp_map = 6,
 632                 .smbus_bitmap = BIT(1) | BIT(2),
 633         },
 634         [it8628] = {
 635                 .name = "it8628",
 636                 .suffix = "E",
 637                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 638                   | FEAT_TEMP_PECI | FEAT_SIX_FANS
 639                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 640                   | FEAT_SIX_TEMP | FEAT_SCALING | FEAT_AVCC3
 641                   | FEAT_FANCTL_ONOFF,
 642                 .num_temp_limit = 6,
 643                 .num_temp_offset = 3,
 644                 .num_temp_map = 3,
 645                 .peci_mask = 0x07,
 646         },
 647         [it8655] = {
 648                 .name = "it8655",
 649                 .suffix = "E",
 650                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 651                   | FEAT_AVCC3 | FEAT_NEW_TEMPMAP | FEAT_SCALING
 652                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_BANK_SEL
 653                   | FEAT_MMIO,
 654                 .num_temp_limit = 6,
 655                 .num_temp_offset = 6,
 656                 .num_temp_map = 6,
 657                 .smbus_bitmap = BIT(2),
 658         },
 659         [it8665] = {
 660                 .name = "it8665",
 661                 .suffix = "E",
 662                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 663                   | FEAT_AVCC3 | FEAT_NEW_TEMPMAP | FEAT_SCALING
 664                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_SIX_FANS
 665                   | FEAT_SIX_PWM | FEAT_BANK_SEL | FEAT_MMIO,
 666                 .num_temp_limit = 6,
 667                 .num_temp_offset = 6,
 668                 .num_temp_map = 6,
 669                 .smbus_bitmap = BIT(2),
 670         },
 671         [it8686] = {
 672                 .name = "it8686",
 673                 .suffix = "E",
 674                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 675                   | FEAT_SIX_FANS | FEAT_NEW_TEMPMAP
 676                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 677                   | FEAT_SIX_TEMP | FEAT_BANK_SEL | FEAT_SCALING | FEAT_AVCC3,
 678                 .num_temp_limit = 6,
 679                 .num_temp_offset = 6,
 680                 .num_temp_map = 7,
 681                 .smbus_bitmap = BIT(1) | BIT(2),
 682         },
 683 };
 684
 685 #define has_16bit_fans(data)    ((data)->features & FEAT_16BIT_FANS)
 686 #define has_12mv_adc(data)      ((data)->features & FEAT_12MV_ADC)
 687 #define has_10_9mv_adc(data)    ((data)->features & FEAT_10_9MV_ADC)
 688 #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
 689 #define has_old_autopwm(data)   ((data)->features & FEAT_OLD_AUTOPWM)
 690 #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \
 691                                  ((data)->peci_mask & BIT(nr)))
 692 #define has_temp_old_peci(data, nr) \
 693                                 (((data)->features & FEAT_TEMP_OLD_PECI) && \
 694                                  ((data)->old_peci_mask & BIT(nr)))
 695 #define has_fan16_config(data)  ((data)->features & FEAT_FAN16_CONFIG)
 696 #define has_five_fans(data)     ((data)->features & (FEAT_FIVE_FANS | \
 697                                                      FEAT_SIX_FANS))
 698 #define has_vid(data)           ((data)->features & FEAT_VID)
 699 #define has_in7_internal(data)  ((data)->features & FEAT_IN7_INTERNAL)
 700 #define has_six_fans(data)      ((data)->features & FEAT_SIX_FANS)
 701 #define has_avcc3(data)         ((data)->features & FEAT_AVCC3)
 702 #define has_five_pwm(data)      ((data)->features & (FEAT_FIVE_PWM \
 703                                                      | FEAT_SIX_PWM))
 704 #define has_six_pwm(data)       ((data)->features & FEAT_SIX_PWM)
 705 #define has_pwm_freq2(data)     ((data)->features & FEAT_PWM_FREQ2)
 706 #define has_six_temp(data)      ((data)->features & FEAT_SIX_TEMP)
 707 #define has_vin3_5v(data)       ((data)->features & FEAT_VIN3_5V)
 708 #define has_four_fans(data)     ((data)->features & (FEAT_FOUR_FANS | \
 709                                                      FEAT_FIVE_FANS | \
 710                                                      FEAT_SIX_FANS))
 711 #define has_four_pwm(data)      ((data)->features & (FEAT_FOUR_PWM | \
 712                                                      FEAT_FIVE_PWM \
 713                                                      | FEAT_SIX_PWM))
 714 #define has_bank_sel(data)      ((data)->features & FEAT_BANK_SEL)
 715 #define has_scaling(data)       ((data)->features & FEAT_SCALING)
 716 #define has_fanctl_onoff(data)  ((data)->features & FEAT_FANCTL_ONOFF)
 717 #define has_11mv_adc(data)      ((data)->features & FEAT_11MV_ADC)
 718 #define has_new_tempmap(data)   ((data)->features & FEAT_NEW_TEMPMAP)
 719 #define has_mmio(data)          ((data)->features & FEAT_MMIO)
 720
 721 struct it87_sio_data {
 722         enum chips type;
 723         u8 sioaddr;
 724         u8 doexit;
 725         /* Values read from Super-I/O config space */
 726         u8 revision;
 727         u8 vid_value;
 728         u8 beep_pin;
 729         u8 internal;    /* Internal sensors can be labeled */
 730         /* Features skipped based on config or DMI */
 731         u16 skip_in;
 732         u8 skip_vid;
 733         u8 skip_fan;
 734         u8 skip_pwm;
 735         u8 skip_temp;
 736         u8 smbus_bitmap;
 737         u8 ec_special_config;
 738 };
 739
 740 /*
 741  * For each registered chip, we need to keep some data in memory.
 742  * The structure is dynamically allocated.
 743  */
 744 struct it87_data {
 745         const struct attribute_group *groups[7];
 746         enum chips type;
 747         u32 features;
 748         u8 peci_mask;
 749         u8 old_peci_mask;
 750
 751         u8 smbus_bitmap;        /* !=0 if SMBus needs to be disabled */
 752         u8 ec_special_config;   /* EC special config register restore value */
 753         u8 sioaddr;             /* SIO port address */
 754         bool doexit;            /* true if exit from sio config is ok */
 755
 756         void __iomem *mmio;     /* Remapped MMIO address if available */
 757         int (*read)(struct it87_data *, u16);
 758         void (*write)(struct it87_data *, u16, u8);
 759
 760         const u8 *REG_FAN;
 761         const u8 *REG_FANX;
 762         const u8 *REG_FAN_MIN;
 763         const u8 *REG_FANX_MIN;
 764
 765         const u8 *REG_PWM;
 766
 767         const u8 *REG_TEMP_OFFSET;
 768         const u8 *REG_TEMP_LOW;
 769         const u8 *REG_TEMP_HIGH;
 770
 771         unsigned short addr;
 772         const char *name;
 773         struct mutex update_lock;
 774         char valid;             /* !=0 if following fields are valid */
 775         unsigned long last_updated;     /* In jiffies */
 776
 777         u16 in_scaled;          /* Internal voltage sensors are scaled */
 778         u16 in_internal;        /* Bitfield, internal sensors (for labels) */
 779         u16 has_in;             /* Bitfield, voltage sensors enabled */
 780         u8 in[NUM_VIN][3];              /* [nr][0]=in, [1]=min, [2]=max */
 781         u8 has_fan;             /* Bitfield, fans enabled */
 782         u16 fan[NUM_FAN][2];    /* Register values, [nr][0]=fan, [1]=min */
 783         u8 has_temp;            /* Bitfield, temp sensors enabled */
 784         s8 temp[NUM_TEMP][4];   /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
 785         u8 num_temp_limit;      /* Number of temperature limit registers */
 786         u8 num_temp_offset;     /* Number of temperature offset registers */
 787         u8 temp_src[4];         /* Up to 4 temperature source registers */
 788         u8 sensor;              /* Register value (IT87_REG_TEMP_ENABLE) */
 789         u8 extra;               /* Register value (IT87_REG_TEMP_EXTRA) */
 790         u8 fan_div[NUM_FAN_DIV];/* Register encoding, shifted right */
 791         bool has_vid;           /* True if VID supported */
 792         u8 vid;                 /* Register encoding, combined */
 793         u8 vrm;
 794         u32 alarms;             /* Register encoding, combined */
 795         bool has_beep;          /* true if beep supported */
 796         u8 beeps;               /* Register encoding */
 797         u8 fan_main_ctrl;       /* Register value */
 798         u8 fan_ctl;             /* Register value */
 799
 800         /*
 801          * The following 3 arrays correspond to the same registers up to
 802          * the IT8720F. The meaning of bits 6-0 depends on the value of bit
 803          * 7, and we want to preserve settings on mode changes, so we have
 804          * to track all values separately.
 805          * Starting with the IT8721F, the manual PWM duty cycles are stored
 806          * in separate registers (8-bit values), so the separate tracking
 807          * is no longer needed, but it is still done to keep the driver
 808          * simple.
 809          */
 810         u8 has_pwm;             /* Bitfield, pwm control enabled */
 811         u8 pwm_ctrl[NUM_PWM];   /* Register value */
 812         u8 pwm_duty[NUM_PWM];   /* Manual PWM value set by user */
 813         u8 pwm_temp_map[NUM_PWM];/* PWM to temp. chan. mapping (bits 1-0) */
 814         u8 pwm_temp_map_mask;   /* 0x03 for old, 0x07 for new temp map */
 815         u8 pwm_temp_map_shift;  /* 0 for old, 3 for new temp map */
 816         u8 pwm_num_temp_map;    /* from config data, 3..7 depending on chip */
 817
 818         /* Automatic fan speed control registers */
 819         u8 auto_pwm[NUM_AUTO_PWM][4];   /* [nr][3] is hard-coded */
 820         s8 auto_temp[NUM_AUTO_PWM][5];  /* [nr][0] is point1_temp_hyst */
 821 };
 822
 823 static int adc_lsb(const struct it87_data *data, int nr)
 824 {
 825         int lsb;
 826
 827         if (has_12mv_adc(data))
 828                 lsb = 120;
 829         else if (has_10_9mv_adc(data))
 830                 lsb = 109;
 831         else if (has_11mv_adc(data))
 832                 lsb = 110;
 833         else
 834                 lsb = 160;
 835         if (data->in_scaled & BIT(nr))
 836                 lsb <<= 1;
 837         return lsb;
 838 }
 839
 840 static u8 in_to_reg(const struct it87_data *data, int nr, long val)
 841 {
 842         val = DIV_ROUND_CLOSEST(val * 10, adc_lsb(data, nr));
 843         return clamp_val(val, 0, 255);
 844 }
 845
 846 static int in_from_reg(const struct it87_data *data, int nr, int val)
 847 {
 848         return DIV_ROUND_CLOSEST(val * adc_lsb(data, nr), 10);
 849 }
 850
 851 static inline u8 FAN_TO_REG(long rpm, int div)
 852 {
 853         if (rpm == 0)
 854                 return 255;
 855         rpm = clamp_val(rpm, 1, 1000000);
 856         return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
 857 }
 858
 859 static inline u16 FAN16_TO_REG(long rpm)
 860 {
 861         if (rpm == 0)
 862                 return 0xffff;
 863         return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
 864 }
 865
 866 #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
 867                                 1350000 / ((val) * (div)))
 868 /* The divider is fixed to 2 in 16-bit mode */
 869 #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
 870                              1350000 / ((val) * 2))
 871
 872 #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \
 873                                     ((val) + 500) / 1000), -128, 127))
 874 #define TEMP_FROM_REG(val) ((val) * 1000)
 875
 876 static u8 pwm_to_reg(const struct it87_data *data, long val)
 877 {
 878         if (has_newer_autopwm(data))
 879                 return val;
 880         else
 881                 return val >> 1;
 882 }
 883
 884 static int pwm_from_reg(const struct it87_data *data, u8 reg)
 885 {
 886         if (has_newer_autopwm(data))
 887                 return reg;
 888         else
 889                 return (reg & 0x7f) << 1;
 890 }
 891
 892 static int DIV_TO_REG(int val)
 893 {
 894         int answer = 0;
 895
 896         while (answer < 7 && (val >>= 1))
 897                 answer++;
 898         return answer;
 899 }
 900
 901 #define DIV_FROM_REG(val) BIT(val)
 902
 903 static u8 temp_map_from_reg(const struct it87_data *data, u8 reg)
 904 {
 905         u8 map;
 906
 907         map  = (reg >> data->pwm_temp_map_shift) & data->pwm_temp_map_mask;
 908         if (map >= data->pwm_num_temp_map)      /* map is 0-based */
 909                 map = 0;
 910
 911         return map;
 912 }
 913
 914 static u8 temp_map_to_reg(const struct it87_data *data, int nr, u8 map)
 915 {
 916         u8 ctrl = data->pwm_ctrl[nr];
 917
 918         return (ctrl & ~(data->pwm_temp_map_mask << data->pwm_temp_map_shift)) |
 919                (map << data->pwm_temp_map_shift);
 920 }
 921
 922 /*
 923  * PWM base frequencies. The frequency has to be divided by either 128 or 256,
 924  * depending on the chip type, to calculate the actual PWM frequency.
 925  *
 926  * Some of the chip datasheets suggest a base frequency of 51 kHz instead
 927  * of 750 kHz for the slowest base frequency, resulting in a PWM frequency
 928  * of 200 Hz. Sometimes both PWM frequency select registers are affected,
 929  * sometimes just one. It is unknown if this is a datasheet error or real,
 930  * so this is ignored for now.
 931  */
 932 static const unsigned int pwm_freq[8] = {
 933         48000000,
 934         24000000,
 935         12000000,
 936         8000000,
 937         6000000,
 938         3000000,
 939         1500000,
 940         750000,
 941 };
 942
 943 static int smbus_disable(struct it87_data *data)
 944 {
 945         int err;
 946
 947         if (data->smbus_bitmap) {
 948                 err = superio_enter(data->sioaddr);
 949                 if (err)
 950                         return err;
 951                 superio_select(data->sioaddr, PME);
 952                 superio_outb(data->sioaddr, IT87_SPECIAL_CFG_REG,
 953                              data->ec_special_config & ~data->smbus_bitmap);
 954                 superio_exit(data->sioaddr, data->doexit);
 955         }
 956         return 0;
 957 }
 958
 959 static int smbus_enable(struct it87_data *data)
 960 {
 961         int err;
 962
 963         if (data->smbus_bitmap) {
 964                 err = superio_enter(data->sioaddr);
 965                 if (err)
 966                         return err;
 967
 968                 superio_select(data->sioaddr, PME);
 969                 superio_outb(data->sioaddr, IT87_SPECIAL_CFG_REG,
 970                              data->ec_special_config);
 971                 superio_exit(data->sioaddr, data->doexit);
 972         }
 973         return 0;
 974 }
 975
 976 static int _it87_io_read(struct it87_data *data, u16 reg)
 977 {
 978         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 979         return inb_p(data->addr + IT87_DATA_REG_OFFSET);
 980 }
 981
 982 static void _it87_io_write(struct it87_data *data, u16 reg, u8 value)
 983 {
 984         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 985         outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
 986 }
 987
 988 static u8 it87_io_set_bank(struct it87_data *data, u8 bank)
 989 {
 990         u8 _bank = bank;
 991
 992         if (has_bank_sel(data)) {
 993                 u8 breg = _it87_io_read(data, IT87_REG_BANK);
 994
 995                 _bank = breg >> 5;
 996                 if (bank != _bank) {
 997                         breg &= 0x1f;
 998                         breg |= (bank << 5);
 999                         _it87_io_write(data, IT87_REG_BANK, breg);
1000                 }
1001         }
1002         return _bank;
1003 }
1004
1005 /*
1006  * Must be called with data->update_lock held, except during initialization.
1007  * Must be called with SMBus accesses disabled.
1008  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
1009  * would slow down the IT87 access and should not be necessary.
1010  */
1011 static int it87_io_read(struct it87_data *data, u16 reg)
1012 {
1013         u8 bank;
1014         int val;
1015
1016         bank = it87_io_set_bank(data, reg >> 8);
1017         val = _it87_io_read(data, reg & 0xff);
1018         it87_io_set_bank(data, bank);
1019
1020         return val;
1021 }
1022
1023 /*
1024  * Must be called with data->update_lock held, except during initialization.
1025  * Must be called with SMBus accesses disabled
1026  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
1027  * would slow down the IT87 access and should not be necessary.
1028  */
1029 static void it87_io_write(struct it87_data *data, u16 reg, u8 value)
1030 {
1031         u8 bank;
1032
1033         bank = it87_io_set_bank(data, reg >> 8);
1034         _it87_io_write(data, reg & 0xff, value);
1035         it87_io_set_bank(data, bank);
1036 }
1037
1038 static int it87_mmio_read(struct it87_data *data, u16 reg)
1039 {
1040         return readb(data->mmio + reg);
1041 }
1042
1043 static void it87_mmio_write(struct it87_data *data, u16 reg, u8 value)
1044 {
1045         writeb(value, data->mmio + reg);
1046 }
1047
1048 static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
1049 {
1050         u8 ctrl;
1051
1052         ctrl = data->read(data, data->REG_PWM[nr]);
1053         data->pwm_ctrl[nr] = ctrl;
1054         if (has_newer_autopwm(data)) {
1055                 data->pwm_temp_map[nr] = temp_map_from_reg(data, ctrl);
1056                 data->pwm_duty[nr] = data->read(data, IT87_REG_PWM_DUTY[nr]);
1057         } else {
1058                 if (ctrl & 0x80)        /* Automatic mode */
1059                         data->pwm_temp_map[nr] = temp_map_from_reg(data, ctrl);
1060                 else                            /* Manual mode */
1061                         data->pwm_duty[nr] = ctrl & 0x7f;
1062         }
1063
1064         if (has_old_autopwm(data)) {
1065                 int i;
1066
1067                 for (i = 0; i < 5 ; i++)
1068                         data->auto_temp[nr][i] = data->read(data,
1069                                                 IT87_REG_AUTO_TEMP(nr, i));
1070                 for (i = 0; i < 3 ; i++)
1071                         data->auto_pwm[nr][i] = data->read(data,
1072                                                 IT87_REG_AUTO_PWM(nr, i));
1073         } else if (has_newer_autopwm(data)) {
1074                 int i;
1075
1076                 /*
1077                  * 0: temperature hysteresis (base + 5)
1078                  * 1: fan off temperature (base + 0)
1079                  * 2: fan start temperature (base + 1)
1080                  * 3: fan max temperature (base + 2)
1081                  */
1082                 data->auto_temp[nr][0] =
1083                         data->read(data, IT87_REG_AUTO_TEMP(nr, 5));
1084
1085                 for (i = 0; i < 3 ; i++)
1086                         data->auto_temp[nr][i + 1] =
1087                                 data->read(data, IT87_REG_AUTO_TEMP(nr, i));
1088                 /*
1089                  * 0: start pwm value (base + 3)
1090                  * 1: pwm slope (base + 4, 1/8th pwm)
1091                  */
1092                 data->auto_pwm[nr][0] =
1093                         data->read(data, IT87_REG_AUTO_TEMP(nr, 3));
1094                 data->auto_pwm[nr][1] =
1095                         data->read(data, IT87_REG_AUTO_TEMP(nr, 4));
1096         }
1097 }
1098
1099 static int it87_lock(struct it87_data *data)
1100 {
1101         int err;
1102
1103         mutex_lock(&data->update_lock);
1104         err = smbus_disable(data);
1105         if (err)
1106                 mutex_unlock(&data->update_lock);
1107         return err;
1108 }
1109
1110 static void it87_unlock(struct it87_data *data)
1111 {
1112         smbus_enable(data);
1113         mutex_unlock(&data->update_lock);
1114 }
1115
1116 static struct it87_data *it87_update_device(struct device *dev)
1117 {
1118         struct it87_data *data = dev_get_drvdata(dev);
1119         int err;
1120         int i;
1121
1122         err = it87_lock(data);
1123         if (err)
1124                 return ERR_PTR(err);
1125
1126         if (time_after(jiffies, data->last_updated + HZ + HZ / 2) ||
1127             !data->valid) {
1128                 if (update_vbat) {
1129                         /*
1130                          * Cleared after each update, so reenable.  Value
1131                          * returned by this read will be previous value
1132                          */
1133                         data->write(data, IT87_REG_CONFIG,
1134                                     data->read(data, IT87_REG_CONFIG) | 0x40);
1135                 }
1136                 for (i = 0; i < NUM_VIN; i++) {
1137                         if (!(data->has_in & BIT(i)))
1138                                 continue;
1139
1140                         data->in[i][0] = data->read(data, IT87_REG_VIN[i]);
1141
1142                         /* VBAT and AVCC don't have limit registers */
1143                         if (i >= NUM_VIN_LIMIT)
1144                                 continue;
1145
1146                         data->in[i][1] = data->read(data, IT87_REG_VIN_MIN(i));
1147                         data->in[i][2] = data->read(data, IT87_REG_VIN_MAX(i));
1148                 }
1149
1150                 for (i = 0; i < NUM_FAN; i++) {
1151                         /* Skip disabled fans */
1152                         if (!(data->has_fan & BIT(i)))
1153                                 continue;
1154
1155                         data->fan[i][1] = data->read(data, data->REG_FAN_MIN[i]);
1156                         data->fan[i][0] = data->read(data, data->REG_FAN[i]);
1157                         /* Add high byte if in 16-bit mode */
1158                         if (has_16bit_fans(data)) {
1159                                 data->fan[i][0] |= data->read(data,
1160                                                 data->REG_FANX[i]) << 8;
1161                                 data->fan[i][1] |= data->read(data,
1162                                                 data->REG_FANX_MIN[i]) << 8;
1163                         }
1164                 }
1165                 for (i = 0; i < NUM_TEMP; i++) {
1166                         if (!(data->has_temp & BIT(i)))
1167                                 continue;
1168                         data->temp[i][0] =
1169                                 data->read(data, IT87_REG_TEMP(i));
1170
1171                         if (i >= data->num_temp_limit)
1172                                 continue;
1173
1174                         if (i < data->num_temp_offset)
1175                                 data->temp[i][3] =
1176                                   data->read(data, data->REG_TEMP_OFFSET[i]);
1177
1178                         data->temp[i][1] =
1179                                 data->read(data, data->REG_TEMP_LOW[i]);
1180                         data->temp[i][2] =
1181                                 data->read(data, data->REG_TEMP_HIGH[i]);
1182                 }
1183
1184                 /* Newer chips don't have clock dividers */
1185                 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
1186                         i = data->read(data, IT87_REG_FAN_DIV);
1187                         data->fan_div[0] = i & 0x07;
1188                         data->fan_div[1] = (i >> 3) & 0x07;
1189                         data->fan_div[2] = (i & 0x40) ? 3 : 1;
1190                 }
1191
1192                 data->alarms =
1193                         data->read(data, IT87_REG_ALARM1) |
1194                         (data->read(data, IT87_REG_ALARM2) << 8) |
1195                         (data->read(data, IT87_REG_ALARM3) << 16);
1196                 data->beeps = data->read(data, IT87_REG_BEEP_ENABLE);
1197
1198                 data->fan_main_ctrl = data->read(data, IT87_REG_FAN_MAIN_CTRL);
1199                 data->fan_ctl = data->read(data, IT87_REG_FAN_CTL);
1200                 for (i = 0; i < NUM_PWM; i++) {
1201                         if (!(data->has_pwm & BIT(i)))
1202                                 continue;
1203                         it87_update_pwm_ctrl(data, i);
1204                 }
1205
1206                 data->sensor = data->read(data, IT87_REG_TEMP_ENABLE);
1207                 data->extra = data->read(data, IT87_REG_TEMP_EXTRA);
1208                 /*
1209                  * The IT8705F does not have VID capability.
1210                  * The IT8718F and later don't use IT87_REG_VID for the
1211                  * same purpose.
1212                  */
1213                 if (data->type == it8712 || data->type == it8716) {
1214                         data->vid = data->read(data, IT87_REG_VID);
1215                         /*
1216                          * The older IT8712F revisions had only 5 VID pins,
1217                          * but we assume it is always safe to read 6 bits.
1218                          */
1219                         data->vid &= 0x3f;
1220                 }
1221                 data->last_updated = jiffies;
1222                 data->valid = 1;
1223         }
1224         it87_unlock(data);
1225         return data;
1226 }
1227
1228 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
1229                        char *buf)
1230 {
1231         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1232         struct it87_data *data = it87_update_device(dev);
1233         int index = sattr->index;
1234         int nr = sattr->nr;
1235
1236         if (IS_ERR(data))
1237                 return PTR_ERR(data);
1238
1239         return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
1240 }
1241
1242 static ssize_t set_in(struct device *dev, struct device_attribute *attr,
1243                       const char *buf, size_t count)
1244 {
1245         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1246         struct it87_data *data = dev_get_drvdata(dev);
1247         int index = sattr->index;
1248         int nr = sattr->nr;
1249         unsigned long val;
1250         int err;
1251
1252         if (kstrtoul(buf, 10, &val) < 0)
1253                 return -EINVAL;
1254
1255         err = it87_lock(data);
1256         if (err)
1257                 return err;
1258
1259         data->in[nr][index] = in_to_reg(data, nr, val);
1260         data->write(data, index == 1 ? IT87_REG_VIN_MIN(nr)
1261                                      : IT87_REG_VIN_MAX(nr),
1262                     data->in[nr][index]);
1263         it87_unlock(data);
1264         return count;
1265 }
1266
1267 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
1268 static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
1269                             0, 1);
1270 static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
1271                             0, 2);
1272
1273 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
1274 static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
1275                             1, 1);
1276 static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
1277                             1, 2);
1278
1279 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
1280 static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
1281                             2, 1);
1282 static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
1283                             2, 2);
1284
1285 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
1286 static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
1287                             3, 1);
1288 static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
1289                             3, 2);
1290
1291 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
1292 static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
1293                             4, 1);
1294 static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
1295                             4, 2);
1296
1297 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
1298 static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
1299                             5, 1);
1300 static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
1301                             5, 2);
1302
1303 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
1304 static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
1305                             6, 1);
1306 static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
1307                             6, 2);
1308
1309 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
1310 static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
1311                             7, 1);
1312 static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
1313                             7, 2);
1314
1315 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
1316 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0);
1317 static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in, NULL, 10, 0);
1318 static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in, NULL, 11, 0);
1319 static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in, NULL, 12, 0);
1320
1321 /* Up to 6 temperatures */
1322 static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
1323                          char *buf)
1324 {
1325         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1326         int nr = sattr->nr;
1327         int index = sattr->index;
1328         struct it87_data *data = it87_update_device(dev);
1329
1330         if (IS_ERR(data))
1331                 return PTR_ERR(data);
1332
1333         return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
1334 }
1335
1336 static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
1337                         const char *buf, size_t count)
1338 {
1339         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1340         int nr = sattr->nr;
1341         int index = sattr->index;
1342         struct it87_data *data = dev_get_drvdata(dev);
1343         long val;
1344         u8 reg, regval;
1345         int err;
1346
1347         if (kstrtol(buf, 10, &val) < 0)
1348                 return -EINVAL;
1349
1350         err = it87_lock(data);
1351         if (err)
1352                 return err;
1353
1354         switch (index) {
1355         default:
1356         case 1:
1357                 reg = data->REG_TEMP_LOW[nr];
1358                 break;
1359         case 2:
1360                 reg = data->REG_TEMP_HIGH[nr];
1361                 break;
1362         case 3:
1363                 regval = data->read(data, IT87_REG_BEEP_ENABLE);
1364                 if (!(regval & 0x80)) {
1365                         regval |= 0x80;
1366                         data->write(data, IT87_REG_BEEP_ENABLE, regval);
1367                 }
1368                 data->valid = 0;
1369                 reg = data->REG_TEMP_OFFSET[nr];
1370                 break;
1371         }
1372
1373         data->temp[nr][index] = TEMP_TO_REG(val);
1374         data->write(data, reg, data->temp[nr][index]);
1375         it87_unlock(data);
1376         return count;
1377 }
1378
1379 static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
1380 static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1381                             0, 1);
1382 static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1383                             0, 2);
1384 static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
1385                             set_temp, 0, 3);
1386 static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
1387 static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1388                             1, 1);
1389 static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1390                             1, 2);
1391 static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
1392                             set_temp, 1, 3);
1393 static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
1394 static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1395                             2, 1);
1396 static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1397                             2, 2);
1398 static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
1399                             set_temp, 2, 3);
1400 static SENSOR_DEVICE_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0);
1401 static SENSOR_DEVICE_ATTR_2(temp4_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1402                             3, 1);
1403 static SENSOR_DEVICE_ATTR_2(temp4_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1404                             3, 2);
1405 static SENSOR_DEVICE_ATTR_2(temp4_offset, S_IRUGO | S_IWUSR, show_temp,
1406                             set_temp, 3, 3);
1407 static SENSOR_DEVICE_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0);
1408 static SENSOR_DEVICE_ATTR_2(temp5_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1409                             4, 1);
1410 static SENSOR_DEVICE_ATTR_2(temp5_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1411                             4, 2);
1412 static SENSOR_DEVICE_ATTR_2(temp5_offset, S_IRUGO | S_IWUSR, show_temp,
1413                             set_temp, 4, 3);
1414 static SENSOR_DEVICE_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0);
1415 static SENSOR_DEVICE_ATTR_2(temp6_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1416                             5, 1);
1417 static SENSOR_DEVICE_ATTR_2(temp6_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1418                             5, 2);
1419 static SENSOR_DEVICE_ATTR_2(temp6_offset, S_IRUGO | S_IWUSR, show_temp,
1420                             set_temp, 5, 3);
1421
1422 static const u8 temp_types_8686[NUM_TEMP][9] = {
1423         { 0, 8, 8, 8, 8, 8, 8, 8, 7 },
1424         { 0, 6, 8, 8, 6, 0, 0, 0, 7 },
1425         { 0, 6, 5, 8, 6, 0, 0, 0, 7 },
1426         { 4, 8, 8, 8, 8, 8, 8, 8, 7 },
1427         { 4, 6, 8, 8, 6, 0, 0, 0, 7 },
1428         { 4, 6, 5, 8, 6, 0, 0, 0, 7 },
1429 };
1430
1431 static int get_temp_type(struct it87_data *data, int index)
1432 {
1433         u8 reg, extra;
1434         int type = 0;
1435
1436         if (has_bank_sel(data)) {
1437                 u8 src1, src2;
1438
1439                 src1 = (data->temp_src[index / 2] >> ((index % 2) * 4)) & 0x0f;
1440
1441                 switch (data->type) {
1442                 case it8686:
1443                         if (src1 < 9)
1444                                 type = temp_types_8686[index][src1];
1445                         break;
1446                 case it8625:
1447                         if (index < 3)
1448                                 break;
1449                 case it8655:
1450                 case it8665:
1451                         if (src1 < 3) {
1452                                 index = src1;
1453                                 break;
1454                         }
1455                         src2 = data->temp_src[3];
1456                         switch(src1) {
1457                         case 3:
1458                                 type = (src2 & BIT(index)) ? 6 : 5;
1459                                 break;
1460                         case 4 ... 8:
1461                                 type = (src2 & BIT(index)) ? 4 : 6;
1462                                 break;
1463                         case 9:
1464                                 type = (src2 & BIT(index)) ? 5 : 0;
1465                                 break;
1466                         default:
1467                                 break;
1468                         }
1469                         return type;
1470                 default:
1471                         return 0;
1472                 }
1473         }
1474         if (type || index >= 3)
1475                 return type;
1476
1477         reg = data->read(data, IT87_REG_TEMP_ENABLE);
1478         extra = data->read(data, IT87_REG_TEMP_EXTRA);
1479
1480         if ((has_temp_peci(data, index) && (reg >> 6 == index + 1)) ||
1481             (has_temp_old_peci(data, index) && (extra & 0x80)))
1482                 type = 6;               /* Intel PECI */
1483         if (reg & BIT(index))
1484                 type = 3;               /* thermal diode */
1485         else if (reg & BIT(index + 3))
1486                 type = 4;               /* thermistor */
1487
1488         return type;
1489 }
1490
1491 static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
1492                               char *buf)
1493 {
1494         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1495         struct it87_data *data = it87_update_device(dev);
1496         int type;
1497
1498         if (IS_ERR(data))
1499                 return PTR_ERR(data);
1500
1501         type = get_temp_type(data, sensor_attr->index);
1502         return sprintf(buf, "%d\n", type);
1503 }
1504
1505 static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
1506                              const char *buf, size_t count)
1507 {
1508         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1509         int nr = sensor_attr->index;
1510
1511         struct it87_data *data = dev_get_drvdata(dev);
1512         long val;
1513         u8 reg, extra;
1514         int err;
1515
1516         if (kstrtol(buf, 10, &val) < 0)
1517                 return -EINVAL;
1518
1519         err = it87_lock(data);
1520         if (err)
1521                 return err;
1522
1523         reg = data->read(data, IT87_REG_TEMP_ENABLE);
1524         reg &= ~(1 << nr);
1525         reg &= ~(8 << nr);
1526         if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6))
1527                 reg &= 0x3f;
1528         extra = data->read(data, IT87_REG_TEMP_EXTRA);
1529         if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6))
1530                 extra &= 0x7f;
1531         if (val == 2) { /* backwards compatibility */
1532                 dev_warn(dev,
1533                          "Sensor type 2 is deprecated, please use 4 instead\n");
1534                 val = 4;
1535         }
1536         /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */
1537         if (val == 3)
1538                 reg |= 1 << nr;
1539         else if (val == 4)
1540                 reg |= 8 << nr;
1541         else if (has_temp_peci(data, nr) && val == 6)
1542                 reg |= (nr + 1) << 6;
1543         else if (has_temp_old_peci(data, nr) && val == 6)
1544                 extra |= 0x80;
1545         else if (val != 0) {
1546                 count = -EINVAL;
1547                 goto unlock;
1548         }
1549
1550         data->sensor = reg;
1551         data->extra = extra;
1552         data->write(data, IT87_REG_TEMP_ENABLE, data->sensor);
1553         if (has_temp_old_peci(data, nr))
1554                 data->write(data, IT87_REG_TEMP_EXTRA, data->extra);
1555         data->valid = 0;        /* Force cache refresh */
1556 unlock:
1557         it87_unlock(data);
1558         return count;
1559 }
1560
1561 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1562                           set_temp_type, 0);
1563 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1564                           set_temp_type, 1);
1565 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1566                           set_temp_type, 2);
1567 static SENSOR_DEVICE_ATTR(temp4_type, S_IRUGO | S_IWUSR, show_temp_type,
1568                           set_temp_type, 3);
1569 static SENSOR_DEVICE_ATTR(temp5_type, S_IRUGO | S_IWUSR, show_temp_type,
1570                           set_temp_type, 4);
1571 static SENSOR_DEVICE_ATTR(temp6_type, S_IRUGO | S_IWUSR, show_temp_type,
1572                           set_temp_type, 5);
1573
1574 /* 6 Fans */
1575
1576 static int pwm_mode(const struct it87_data *data, int nr)
1577 {
1578         if (has_fanctl_onoff(data) && nr < 3 &&
1579             !(data->fan_main_ctrl & BIT(nr)))
1580                 return 0;                               /* Full speed */
1581         if (data->pwm_ctrl[nr] & 0x80)
1582                 return 2;                               /* Automatic mode */
1583         if ((!has_fanctl_onoff(data) || nr >= 3) &&
1584             data->pwm_duty[nr] == pwm_to_reg(data, 0xff))
1585                 return 0;                       /* Full speed */
1586
1587         return 1;                               /* Manual mode */
1588 }
1589
1590 static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
1591                         char *buf)
1592 {
1593         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1594         int nr = sattr->nr;
1595         int index = sattr->index;
1596         int speed;
1597         struct it87_data *data = it87_update_device(dev);
1598
1599         if (IS_ERR(data))
1600                 return PTR_ERR(data);
1601
1602         speed = has_16bit_fans(data) ?
1603                 FAN16_FROM_REG(data->fan[nr][index]) :
1604                 FAN_FROM_REG(data->fan[nr][index],
1605                              DIV_FROM_REG(data->fan_div[nr]));
1606         return sprintf(buf, "%d\n", speed);
1607 }
1608
1609 static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
1610                             char *buf)
1611 {
1612         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1613         struct it87_data *data = it87_update_device(dev);
1614         int nr = sensor_attr->index;
1615
1616         if (IS_ERR(data))
1617                 return PTR_ERR(data);
1618
1619         return sprintf(buf, "%lu\n", DIV_FROM_REG(data->fan_div[nr]));
1620 }
1621
1622 static ssize_t show_pwm_enable(struct device *dev,
1623                                struct device_attribute *attr, char *buf)
1624 {
1625         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1626         struct it87_data *data = it87_update_device(dev);
1627         int nr = sensor_attr->index;
1628
1629         if (IS_ERR(data))
1630                 return PTR_ERR(data);
1631
1632         return sprintf(buf, "%d\n", pwm_mode(data, nr));
1633 }
1634
1635 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
1636                         char *buf)
1637 {
1638         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1639         struct it87_data *data = it87_update_device(dev);
1640         int nr = sensor_attr->index;
1641
1642         if (IS_ERR(data))
1643                 return PTR_ERR(data);
1644
1645         return sprintf(buf, "%d\n",
1646                        pwm_from_reg(data, data->pwm_duty[nr]));
1647 }
1648
1649 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
1650                              char *buf)
1651 {
1652         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1653         struct it87_data *data = it87_update_device(dev);
1654         int nr = sensor_attr->index;
1655         unsigned int freq;
1656         int index;
1657
1658         if (IS_ERR(data))
1659                 return PTR_ERR(data);
1660
1661         if (has_pwm_freq2(data) && nr == 1)
1662                 index = (data->extra >> 4) & 0x07;
1663         else
1664                 index = (data->fan_ctl >> 4) & 0x07;
1665
1666         freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128);
1667
1668         return sprintf(buf, "%u\n", freq);
1669 }
1670
1671 static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
1672                        const char *buf, size_t count)
1673 {
1674         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1675         int nr = sattr->nr;
1676         int index = sattr->index;
1677
1678         struct it87_data *data = dev_get_drvdata(dev);
1679         long val;
1680         int err;
1681         u8 reg;
1682
1683         if (kstrtol(buf, 10, &val) < 0)
1684                 return -EINVAL;
1685
1686         err = it87_lock(data);
1687         if (err)
1688                 return err;
1689
1690         if (has_16bit_fans(data)) {
1691                 data->fan[nr][index] = FAN16_TO_REG(val);
1692                 data->write(data, data->REG_FAN_MIN[nr],
1693                             data->fan[nr][index] & 0xff);
1694                 data->write(data, data->REG_FANX_MIN[nr],
1695                             data->fan[nr][index] >> 8);
1696         } else {
1697                 reg = data->read(data, IT87_REG_FAN_DIV);
1698                 switch (nr) {
1699                 case 0:
1700                         data->fan_div[nr] = reg & 0x07;
1701                         break;
1702                 case 1:
1703                         data->fan_div[nr] = (reg >> 3) & 0x07;
1704                         break;
1705                 case 2:
1706                         data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
1707                         break;
1708                 }
1709                 data->fan[nr][index] =
1710                   FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
1711                 data->write(data, data->REG_FAN_MIN[nr], data->fan[nr][index]);
1712         }
1713         it87_unlock(data);
1714         return count;
1715 }
1716
1717 static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
1718                            const char *buf, size_t count)
1719 {
1720         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1721         struct it87_data *data = dev_get_drvdata(dev);
1722         int nr = sensor_attr->index;
1723         unsigned long val;
1724         int min, err;
1725         u8 old;
1726
1727         if (kstrtoul(buf, 10, &val) < 0)
1728                 return -EINVAL;
1729
1730         err = it87_lock(data);
1731         if (err)
1732                 return err;
1733
1734         old = data->read(data, IT87_REG_FAN_DIV);
1735
1736         /* Save fan min limit */
1737         min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
1738
1739         switch (nr) {
1740         case 0:
1741         case 1:
1742                 data->fan_div[nr] = DIV_TO_REG(val);
1743                 break;
1744         case 2:
1745                 if (val < 8)
1746                         data->fan_div[nr] = 1;
1747                 else
1748                         data->fan_div[nr] = 3;
1749         }
1750         val = old & 0x80;
1751         val |= (data->fan_div[0] & 0x07);
1752         val |= (data->fan_div[1] & 0x07) << 3;
1753         if (data->fan_div[2] == 3)
1754                 val |= 0x1 << 6;
1755         data->write(data, IT87_REG_FAN_DIV, val);
1756
1757         /* Restore fan min limit */
1758         data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
1759         data->write(data, data->REG_FAN_MIN[nr], data->fan[nr][1]);
1760         it87_unlock(data);
1761         return count;
1762 }
1763
1764 /* Returns 0 if OK, -EINVAL otherwise */
1765 static int check_trip_points(struct device *dev, int nr)
1766 {
1767         const struct it87_data *data = dev_get_drvdata(dev);
1768         int i, err = 0;
1769
1770         if (has_old_autopwm(data)) {
1771                 for (i = 0; i < 3; i++) {
1772                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1773                                 err = -EINVAL;
1774                 }
1775                 for (i = 0; i < 2; i++) {
1776                         if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1777                                 err = -EINVAL;
1778                 }
1779         } else if (has_newer_autopwm(data)) {
1780                 for (i = 1; i < 3; i++) {
1781                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1782                                 err = -EINVAL;
1783                 }
1784         }
1785
1786         if (err) {
1787                 dev_err(dev,
1788                         "Inconsistent trip points, not switching to automatic mode\n");
1789                 dev_err(dev, "Adjust the trip points and try again\n");
1790         }
1791         return err;
1792 }
1793
1794 static ssize_t set_pwm_enable(struct device *dev, struct device_attribute *attr,
1795                               const char *buf, size_t count)
1796 {
1797         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1798         struct it87_data *data = dev_get_drvdata(dev);
1799         int nr = sensor_attr->index;
1800         long val;
1801         int err;
1802
1803         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
1804                 return -EINVAL;
1805
1806         /* Check trip points before switching to automatic mode */
1807         if (val == 2) {
1808                 if (check_trip_points(dev, nr) < 0)
1809                         return -EINVAL;
1810         }
1811
1812         err = it87_lock(data);
1813         if (err)
1814                 return err;;
1815
1816         it87_update_pwm_ctrl(data, nr);
1817
1818         if (val == 0) {
1819                 if (nr < 3 && has_fanctl_onoff(data)) {
1820                         int tmp;
1821                         /* make sure the fan is on when in on/off mode */
1822                         tmp = data->read(data, IT87_REG_FAN_CTL);
1823                         data->write(data, IT87_REG_FAN_CTL, tmp | BIT(nr));
1824                         /* set on/off mode */
1825                         data->fan_main_ctrl &= ~BIT(nr);
1826                         data->write(data, IT87_REG_FAN_MAIN_CTRL,
1827                                     data->fan_main_ctrl);
1828                 } else {
1829                         u8 ctrl;
1830
1831                         /* No on/off mode, set maximum pwm value */
1832                         data->pwm_duty[nr] = pwm_to_reg(data, 0xff);
1833                         data->write(data, IT87_REG_PWM_DUTY[nr],
1834                                     data->pwm_duty[nr]);
1835                         /* and set manual mode */
1836                         if (has_newer_autopwm(data)) {
1837                                 ctrl = temp_map_to_reg(data, nr,
1838                                                        data->pwm_temp_map[nr]);
1839                                 ctrl &= 0x7f;
1840                         } else {
1841                                 ctrl = data->pwm_duty[nr];
1842                         }
1843                         data->pwm_ctrl[nr] = ctrl;
1844                         data->write(data, data->REG_PWM[nr], ctrl);
1845                 }
1846         } else {
1847                 u8 ctrl;
1848
1849                 if (has_newer_autopwm(data)) {
1850                         ctrl = temp_map_to_reg(data, nr,
1851                                                data->pwm_temp_map[nr]);
1852                         if (val == 1)
1853                                 ctrl &= 0x7f;
1854                         else
1855                                 ctrl |= 0x80;
1856                 } else {
1857                         ctrl = (val == 1 ? data->pwm_duty[nr] : 0x80);
1858                 }
1859                 data->pwm_ctrl[nr] = ctrl;
1860                 data->write(data, data->REG_PWM[nr], ctrl);
1861
1862                 if (has_fanctl_onoff(data) && nr < 3) {
1863                         /* set SmartGuardian mode */
1864                         data->fan_main_ctrl |= BIT(nr);
1865                         data->write(data, IT87_REG_FAN_MAIN_CTRL,
1866                                     data->fan_main_ctrl);
1867                 }
1868         }
1869         it87_unlock(data);
1870         return count;
1871 }
1872
1873 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1874                        const char *buf, size_t count)
1875 {
1876         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1877         struct it87_data *data = dev_get_drvdata(dev);
1878         int nr = sensor_attr->index;
1879         long val;
1880         int err;
1881
1882         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1883                 return -EINVAL;
1884
1885         err = it87_lock(data);
1886         if (err)
1887                 return err;
1888
1889         it87_update_pwm_ctrl(data, nr);
1890         if (has_newer_autopwm(data)) {
1891                 /*
1892                  * If we are in automatic mode, the PWM duty cycle register
1893                  * is read-only so we can't write the value.
1894                  */
1895                 if (data->pwm_ctrl[nr] & 0x80) {
1896                         count = -EBUSY;
1897                         goto unlock;
1898                 }
1899                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1900                 data->write(data, IT87_REG_PWM_DUTY[nr],
1901                             data->pwm_duty[nr]);
1902         } else {
1903                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1904                 /*
1905                  * If we are in manual mode, write the duty cycle immediately;
1906                  * otherwise, just store it for later use.
1907                  */
1908                 if (!(data->pwm_ctrl[nr] & 0x80)) {
1909                         data->pwm_ctrl[nr] = data->pwm_duty[nr];
1910                         data->write(data, data->REG_PWM[nr],
1911                                     data->pwm_ctrl[nr]);
1912                 }
1913         }
1914 unlock:
1915         it87_unlock(data);
1916         return count;
1917 }
1918
1919 static ssize_t set_pwm_freq(struct device *dev, struct device_attribute *attr,
1920                             const char *buf, size_t count)
1921 {
1922         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1923         struct it87_data *data = dev_get_drvdata(dev);
1924         int nr = sensor_attr->index;
1925         unsigned long val;
1926         int err;
1927         int i;
1928
1929         if (kstrtoul(buf, 10, &val) < 0)
1930                 return -EINVAL;
1931
1932         val = clamp_val(val, 0, 1000000);
1933         val *= has_newer_autopwm(data) ? 256 : 128;
1934
1935         /* Search for the nearest available frequency */
1936         for (i = 0; i < 7; i++) {
1937                 if (val > (pwm_freq[i] + pwm_freq[i + 1]) / 2)
1938                         break;
1939         }
1940
1941         err = it87_lock(data);
1942         if (err)
1943                 return err;
1944
1945         if (nr == 0) {
1946                 data->fan_ctl = data->read(data, IT87_REG_FAN_CTL) & 0x8f;
1947                 data->fan_ctl |= i << 4;
1948                 data->write(data, IT87_REG_FAN_CTL, data->fan_ctl);
1949         } else {
1950                 data->extra = data->read(data, IT87_REG_TEMP_EXTRA) & 0x8f;
1951                 data->extra |= i << 4;
1952                 data->write(data, IT87_REG_TEMP_EXTRA, data->extra);
1953         }
1954         it87_unlock(data);
1955         return count;
1956 }
1957
1958 static ssize_t show_pwm_temp_map(struct device *dev,
1959                                  struct device_attribute *attr, char *buf)
1960 {
1961         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1962         struct it87_data *data = it87_update_device(dev);
1963         int nr = sensor_attr->index;
1964
1965         if (IS_ERR(data))
1966                 return PTR_ERR(data);
1967
1968         return sprintf(buf, "%d\n", data->pwm_temp_map[nr] + 1);
1969 }
1970
1971 static ssize_t set_pwm_temp_map(struct device *dev,
1972                                 struct device_attribute *attr, const char *buf,
1973                                 size_t count)
1974 {
1975         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1976         struct it87_data *data = dev_get_drvdata(dev);
1977         int nr = sensor_attr->index;
1978         unsigned long val;
1979         int err;
1980         u8 map;
1981
1982         if (kstrtoul(buf, 10, &val) < 0)
1983                 return -EINVAL;
1984
1985         if (!val || val > data->pwm_num_temp_map)
1986                 return -EINVAL;
1987
1988         map = val - 1;
1989
1990         err = it87_lock(data);
1991         if (err)
1992                 return err;
1993
1994         it87_update_pwm_ctrl(data, nr);
1995         data->pwm_temp_map[nr] = map;
1996         /*
1997          * If we are in automatic mode, write the temp mapping immediately;
1998          * otherwise, just store it for later use.
1999          */
2000         if (data->pwm_ctrl[nr] & 0x80) {
2001                 data->pwm_ctrl[nr] = temp_map_to_reg(data, nr, map);
2002                 data->write(data, data->REG_PWM[nr], data->pwm_ctrl[nr]);
2003         }
2004         it87_unlock(data);
2005         return count;
2006 }
2007
2008 static ssize_t show_auto_pwm(struct device *dev, struct device_attribute *attr,
2009                              char *buf)
2010 {
2011         struct it87_data *data = it87_update_device(dev);
2012         struct sensor_device_attribute_2 *sensor_attr =
2013                         to_sensor_dev_attr_2(attr);
2014         int nr = sensor_attr->nr;
2015         int point = sensor_attr->index;
2016
2017         if (IS_ERR(data))
2018                 return PTR_ERR(data);
2019
2020         return sprintf(buf, "%d\n",
2021                        pwm_from_reg(data, data->auto_pwm[nr][point]));
2022 }
2023
2024 static ssize_t set_auto_pwm(struct device *dev, struct device_attribute *attr,
2025                             const char *buf, size_t count)
2026 {
2027         struct it87_data *data = dev_get_drvdata(dev);
2028         struct sensor_device_attribute_2 *sensor_attr =
2029                         to_sensor_dev_attr_2(attr);
2030         int nr = sensor_attr->nr;
2031         int point = sensor_attr->index;
2032         int regaddr;
2033         long val;
2034         int err;
2035
2036         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
2037                 return -EINVAL;
2038
2039         err = it87_lock(data);
2040         if (err)
2041                 return err;
2042
2043         data->auto_pwm[nr][point] = pwm_to_reg(data, val);
2044         if (has_newer_autopwm(data))
2045                 regaddr = IT87_REG_AUTO_TEMP(nr, 3);
2046         else
2047                 regaddr = IT87_REG_AUTO_PWM(nr, point);
2048         data->write(data, regaddr, data->auto_pwm[nr][point]);
2049         it87_unlock(data);
2050         return count;
2051 }
2052
2053 static ssize_t show_auto_pwm_slope(struct device *dev,
2054                                    struct device_attribute *attr, char *buf)
2055 {
2056         struct it87_data *data = it87_update_device(dev);
2057         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
2058         int nr = sensor_attr->index;
2059
2060         if (IS_ERR(data))
2061                 return PTR_ERR(data);
2062
2063         return sprintf(buf, "%d\n", data->auto_pwm[nr][1] & 0x7f);
2064 }
2065
2066 static ssize_t set_auto_pwm_slope(struct device *dev,
2067                                   struct device_attribute *attr,
2068                                   const char *buf, size_t count)
2069 {
2070         struct it87_data *data = dev_get_drvdata(dev);
2071         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
2072         int nr = sensor_attr->index;
2073         unsigned long val;
2074         int err;
2075
2076         if (kstrtoul(buf, 10, &val) < 0 || val > 127)
2077                 return -EINVAL;
2078
2079         err = it87_lock(data);
2080         if (err)
2081                 return err;
2082
2083         data->auto_pwm[nr][1] = (data->auto_pwm[nr][1] & 0x80) | val;
2084         data->write(data, IT87_REG_AUTO_TEMP(nr, 4), data->auto_pwm[nr][1]);
2085         it87_unlock(data);
2086         return count;
2087 }
2088
2089 static ssize_t show_auto_temp(struct device *dev, struct device_attribute *attr,
2090                               char *buf)
2091 {
2092         struct it87_data *data = it87_update_device(dev);
2093         struct sensor_device_attribute_2 *sensor_attr =
2094                         to_sensor_dev_attr_2(attr);
2095         int nr = sensor_attr->nr;
2096         int point = sensor_attr->index;
2097         int reg;
2098
2099         if (IS_ERR(data))
2100                 return PTR_ERR(data);
2101
2102         if (has_old_autopwm(data) || point)
2103                 reg = data->auto_temp[nr][point];
2104         else
2105                 reg = data->auto_temp[nr][1] - (data->auto_temp[nr][0] & 0x1f);
2106
2107         return sprintf(buf, "%d\n", TEMP_FROM_REG(reg));
2108 }
2109
2110 static ssize_t set_auto_temp(struct device *dev, struct device_attribute *attr,
2111                              const char *buf, size_t count)
2112 {
2113         struct it87_data *data = dev_get_drvdata(dev);
2114         struct sensor_device_attribute_2 *sensor_attr =
2115                         to_sensor_dev_attr_2(attr);
2116         int nr = sensor_attr->nr;
2117         int point = sensor_attr->index;
2118         long val;
2119         int reg;
2120         int err;
2121
2122         if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
2123                 return -EINVAL;
2124
2125         err = it87_lock(data);
2126         if (err)
2127                 return err;
2128
2129         if (has_newer_autopwm(data) && !point) {
2130                 reg = data->auto_temp[nr][1] - TEMP_TO_REG(val);
2131                 reg = clamp_val(reg, 0, 0x1f) | (data->auto_temp[nr][0] & 0xe0);
2132                 data->auto_temp[nr][0] = reg;
2133                 data->write(data, IT87_REG_AUTO_TEMP(nr, 5), reg);
2134         } else {
2135                 reg = TEMP_TO_REG(val);
2136                 data->auto_temp[nr][point] = reg;
2137                 if (has_newer_autopwm(data))
2138                         point--;
2139                 data->write(data, IT87_REG_AUTO_TEMP(nr, point), reg);
2140         }
2141         it87_unlock(data);
2142         return count;
2143 }
2144
2145 static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
2146 static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
2147                             0, 1);
2148 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
2149                           set_fan_div, 0);
2150
2151 static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
2152 static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
2153                             1, 1);
2154 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
2155                           set_fan_div, 1);
2156
2157 static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
2158 static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
2159                             2, 1);
2160 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
2161                           set_fan_div, 2);
2162
2163 static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
2164 static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
2165                             3, 1);
2166
2167 static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
2168 static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
2169                             4, 1);
2170
2171 static SENSOR_DEVICE_ATTR_2(fan6_input, S_IRUGO, show_fan, NULL, 5, 0);
2172 static SENSOR_DEVICE_ATTR_2(fan6_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
2173                             5, 1);
2174
2175 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
2176                           show_pwm_enable, set_pwm_enable, 0);
2177 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0);
2178 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq,
2179                           set_pwm_freq, 0);
2180 static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO,
2181                           show_pwm_temp_map, set_pwm_temp_map, 0);
2182 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR,
2183                             show_auto_pwm, set_auto_pwm, 0, 0);
2184 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR,
2185                             show_auto_pwm, set_auto_pwm, 0, 1);
2186 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR,
2187                             show_auto_pwm, set_auto_pwm, 0, 2);
2188 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO,
2189                             show_auto_pwm, NULL, 0, 3);
2190 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
2191                             show_auto_temp, set_auto_temp, 0, 1);
2192 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2193                             show_auto_temp, set_auto_temp, 0, 0);
2194 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
2195                             show_auto_temp, set_auto_temp, 0, 2);
2196 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
2197                             show_auto_temp, set_auto_temp, 0, 3);
2198 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR,
2199                             show_auto_temp, set_auto_temp, 0, 4);
2200 static SENSOR_DEVICE_ATTR_2(pwm1_auto_start, S_IRUGO | S_IWUSR,
2201                             show_auto_pwm, set_auto_pwm, 0, 0);
2202 static SENSOR_DEVICE_ATTR(pwm1_auto_slope, S_IRUGO | S_IWUSR,
2203                           show_auto_pwm_slope, set_auto_pwm_slope, 0);
2204
2205 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
2206                           show_pwm_enable, set_pwm_enable, 1);
2207 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1);
2208 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, set_pwm_freq, 1);
2209 static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO,
2210                           show_pwm_temp_map, set_pwm_temp_map, 1);
2211 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR,
2212                             show_auto_pwm, set_auto_pwm, 1, 0);
2213 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR,
2214                             show_auto_pwm, set_auto_pwm, 1, 1);
2215 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR,
2216                             show_auto_pwm, set_auto_pwm, 1, 2);
2217 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO,
2218                             show_auto_pwm, NULL, 1, 3);
2219 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
2220                             show_auto_temp, set_auto_temp, 1, 1);
2221 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2222                             show_auto_temp, set_auto_temp, 1, 0);
2223 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
2224                             show_auto_temp, set_auto_temp, 1, 2);
2225 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
2226                             show_auto_temp, set_auto_temp, 1, 3);
2227 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR,
2228                             show_auto_temp, set_auto_temp, 1, 4);
2229 static SENSOR_DEVICE_ATTR_2(pwm2_auto_start, S_IRUGO | S_IWUSR,
2230                             show_auto_pwm, set_auto_pwm, 1, 0);
2231 static SENSOR_DEVICE_ATTR(pwm2_auto_slope, S_IRUGO | S_IWUSR,
2232                           show_auto_pwm_slope, set_auto_pwm_slope, 1);
2233
2234 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
2235                           show_pwm_enable, set_pwm_enable, 2);
2236 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2);
2237 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL, 2);
2238 static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO,
2239                           show_pwm_temp_map, set_pwm_temp_map, 2);
2240 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR,
2241                             show_auto_pwm, set_auto_pwm, 2, 0);
2242 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR,
2243                             show_auto_pwm, set_auto_pwm, 2, 1);
2244 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR,
2245                             show_auto_pwm, set_auto_pwm, 2, 2);
2246 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO,
2247                             show_auto_pwm, NULL, 2, 3);
2248 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
2249                             show_auto_temp, set_auto_temp, 2, 1);
2250 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2251                             show_auto_temp, set_auto_temp, 2, 0);
2252 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
2253                             show_auto_temp, set_auto_temp, 2, 2);
2254 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
2255                             show_auto_temp, set_auto_temp, 2, 3);
2256 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR,
2257                             show_auto_temp, set_auto_temp, 2, 4);
2258 static SENSOR_DEVICE_ATTR_2(pwm3_auto_start, S_IRUGO | S_IWUSR,
2259                             show_auto_pwm, set_auto_pwm, 2, 0);
2260 static SENSOR_DEVICE_ATTR(pwm3_auto_slope, S_IRUGO | S_IWUSR,
2261                           show_auto_pwm_slope, set_auto_pwm_slope, 2);
2262
2263 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IRUGO | S_IWUSR,
2264                           show_pwm_enable, set_pwm_enable, 3);
2265 static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 3);
2266 static SENSOR_DEVICE_ATTR(pwm4_freq, S_IRUGO, show_pwm_freq, NULL, 3);
2267 static SENSOR_DEVICE_ATTR(pwm4_auto_channels_temp, S_IRUGO,
2268                           show_pwm_temp_map, set_pwm_temp_map, 3);
2269 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp, S_IRUGO | S_IWUSR,
2270                             show_auto_temp, set_auto_temp, 2, 1);
2271 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2272                             show_auto_temp, set_auto_temp, 2, 0);
2273 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point2_temp, S_IRUGO | S_IWUSR,
2274                             show_auto_temp, set_auto_temp, 2, 2);
2275 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point3_temp, S_IRUGO | S_IWUSR,
2276                             show_auto_temp, set_auto_temp, 2, 3);
2277 static SENSOR_DEVICE_ATTR_2(pwm4_auto_start, S_IRUGO | S_IWUSR,
2278                             show_auto_pwm, set_auto_pwm, 3, 0);
2279 static SENSOR_DEVICE_ATTR(pwm4_auto_slope, S_IRUGO | S_IWUSR,
2280                           show_auto_pwm_slope, set_auto_pwm_slope, 3);
2281
2282 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IRUGO | S_IWUSR,
2283                           show_pwm_enable, set_pwm_enable, 4);
2284 static SENSOR_DEVICE_ATTR(pwm5, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 4);
2285 static SENSOR_DEVICE_ATTR(pwm5_freq, S_IRUGO, show_pwm_freq, NULL, 4);
2286 static SENSOR_DEVICE_ATTR(pwm5_auto_channels_temp, S_IRUGO,
2287                           show_pwm_temp_map, set_pwm_temp_map, 4);
2288 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp, S_IRUGO | S_IWUSR,
2289                             show_auto_temp, set_auto_temp, 2, 1);
2290 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2291                             show_auto_temp, set_auto_temp, 2, 0);
2292 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point2_temp, S_IRUGO | S_IWUSR,
2293                             show_auto_temp, set_auto_temp, 2, 2);
2294 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point3_temp, S_IRUGO | S_IWUSR,
2295                             show_auto_temp, set_auto_temp, 2, 3);
2296 static SENSOR_DEVICE_ATTR_2(pwm5_auto_start, S_IRUGO | S_IWUSR,
2297                             show_auto_pwm, set_auto_pwm, 4, 0);
2298 static SENSOR_DEVICE_ATTR(pwm5_auto_slope, S_IRUGO | S_IWUSR,
2299                           show_auto_pwm_slope, set_auto_pwm_slope, 4);
2300
2301 static SENSOR_DEVICE_ATTR(pwm6_enable, S_IRUGO | S_IWUSR,
2302                           show_pwm_enable, set_pwm_enable, 5);
2303 static SENSOR_DEVICE_ATTR(pwm6, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 5);
2304 static SENSOR_DEVICE_ATTR(pwm6_freq, S_IRUGO, show_pwm_freq, NULL, 5);
2305 static SENSOR_DEVICE_ATTR(pwm6_auto_channels_temp, S_IRUGO,
2306                           show_pwm_temp_map, set_pwm_temp_map, 5);
2307 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp, S_IRUGO | S_IWUSR,
2308                             show_auto_temp, set_auto_temp, 2, 1);
2309 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2310                             show_auto_temp, set_auto_temp, 2, 0);
2311 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point2_temp, S_IRUGO | S_IWUSR,
2312                             show_auto_temp, set_auto_temp, 2, 2);
2313 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point3_temp, S_IRUGO | S_IWUSR,
2314                             show_auto_temp, set_auto_temp, 2, 3);
2315 static SENSOR_DEVICE_ATTR_2(pwm6_auto_start, S_IRUGO | S_IWUSR,
2316                             show_auto_pwm, set_auto_pwm, 5, 0);
2317 static SENSOR_DEVICE_ATTR(pwm6_auto_slope, S_IRUGO | S_IWUSR,
2318                           show_auto_pwm_slope, set_auto_pwm_slope, 5);
2319
2320 /* Alarms */
2321 static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
2322                            char *buf)
2323 {
2324         struct it87_data *data = it87_update_device(dev);
2325
2326         if (IS_ERR(data))
2327                 return PTR_ERR(data);
2328
2329         return sprintf(buf, "%u\n", data->alarms);
2330 }
2331 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
2332
2333 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
2334                           char *buf)
2335 {
2336         struct it87_data *data = it87_update_device(dev);
2337         int bitnr = to_sensor_dev_attr(attr)->index;
2338
2339         if (IS_ERR(data))
2340                 return PTR_ERR(data);
2341
2342         return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
2343 }
2344
2345 static ssize_t clear_intrusion(struct device *dev,
2346                                struct device_attribute *attr, const char *buf,
2347                                size_t count)
2348 {
2349         struct it87_data *data = dev_get_drvdata(dev);
2350         int err, config;
2351         long val;
2352
2353         if (kstrtol(buf, 10, &val) < 0 || val != 0)
2354                 return -EINVAL;
2355
2356         err = it87_lock(data);
2357         if (err)
2358                 return err;
2359
2360         config = data->read(data, IT87_REG_CONFIG);
2361         config |= BIT(5);
2362         data->write(data, IT87_REG_CONFIG, config);
2363         /* Invalidate cache to force re-read */
2364         data->valid = 0;
2365         it87_unlock(data);
2366         return count;
2367 }
2368
2369 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
2370 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
2371 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
2372 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
2373 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
2374 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
2375 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
2376 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
2377 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
2378 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
2379 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
2380 static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
2381 static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
2382 static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 7);
2383 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
2384 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
2385 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
2386 static SENSOR_DEVICE_ATTR(temp4_alarm, S_IRUGO, show_alarm, NULL, 19);
2387 static SENSOR_DEVICE_ATTR(temp5_alarm, S_IRUGO, show_alarm, NULL, 20);
2388 static SENSOR_DEVICE_ATTR(temp6_alarm, S_IRUGO, show_alarm, NULL, 21);
2389 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
2390                           show_alarm, clear_intrusion, 4);
2391
2392 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
2393                          char *buf)
2394 {
2395         struct it87_data *data = it87_update_device(dev);
2396         int bitnr = to_sensor_dev_attr(attr)->index;
2397
2398         if (IS_ERR(data))
2399                 return PTR_ERR(data);
2400
2401         return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
2402 }
2403
2404 static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
2405                         const char *buf, size_t count)
2406 {
2407         int bitnr = to_sensor_dev_attr(attr)->index;
2408         struct it87_data *data = dev_get_drvdata(dev);
2409         long val;
2410         int err;
2411
2412         if (kstrtol(buf, 10, &val) < 0 || (val != 0 && val != 1))
2413                 return -EINVAL;
2414
2415         err = it87_lock(data);
2416         if (err)
2417                 return err;
2418
2419         data->beeps = data->read(data, IT87_REG_BEEP_ENABLE);
2420         if (val)
2421                 data->beeps |= BIT(bitnr);
2422         else
2423                 data->beeps &= ~BIT(bitnr);
2424         data->write(data, IT87_REG_BEEP_ENABLE, data->beeps);
2425         it87_unlock(data);
2426         return count;
2427 }
2428
2429 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
2430                           show_beep, set_beep, 1);
2431 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
2432 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
2433 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
2434 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
2435 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
2436 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
2437 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
2438 /* fanX_beep writability is set later */
2439 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
2440 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
2441 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
2442 static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
2443 static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
2444 static SENSOR_DEVICE_ATTR(fan6_beep, S_IRUGO, show_beep, set_beep, 0);
2445 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
2446                           show_beep, set_beep, 2);
2447 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
2448 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
2449 static SENSOR_DEVICE_ATTR(temp4_beep, S_IRUGO, show_beep, NULL, 2);
2450 static SENSOR_DEVICE_ATTR(temp5_beep, S_IRUGO, show_beep, NULL, 2);
2451 static SENSOR_DEVICE_ATTR(temp6_beep, S_IRUGO, show_beep, NULL, 2);
2452
2453 static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
2454                             char *buf)
2455 {
2456         struct it87_data *data = dev_get_drvdata(dev);
2457
2458         return sprintf(buf, "%u\n", data->vrm);
2459 }
2460
2461 static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
2462                              const char *buf, size_t count)
2463 {
2464         struct it87_data *data = dev_get_drvdata(dev);
2465         unsigned long val;
2466
2467         if (kstrtoul(buf, 10, &val) < 0)
2468                 return -EINVAL;
2469
2470         data->vrm = val;
2471
2472         return count;
2473 }
2474 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
2475
2476 static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
2477                             char *buf)
2478 {
2479         struct it87_data *data = it87_update_device(dev);
2480
2481         if (IS_ERR(data))
2482                 return PTR_ERR(data);
2483
2484         return sprintf(buf, "%ld\n", (long)vid_from_reg(data->vid, data->vrm));
2485 }
2486 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
2487
2488 static ssize_t show_label(struct device *dev, struct device_attribute *attr,
2489                           char *buf)
2490 {
2491         static const char * const labels[] = {
2492                 "+5V",
2493                 "5VSB",
2494                 "Vbat",
2495                 "AVCC",
2496         };
2497         static const char * const labels_it8721[] = {
2498                 "+3.3V",
2499                 "3VSB",
2500                 "Vbat",
2501                 "+3.3V",
2502         };
2503         struct it87_data *data = dev_get_drvdata(dev);
2504         int nr = to_sensor_dev_attr(attr)->index;
2505         const char *label;
2506
2507         if (has_vin3_5v(data) && nr == 0)
2508                 label = labels[0];
2509         else if (has_12mv_adc(data) || has_10_9mv_adc(data) ||
2510                  has_11mv_adc(data))
2511                 label = labels_it8721[nr];
2512         else
2513                 label = labels[nr];
2514
2515         return sprintf(buf, "%s\n", label);
2516 }
2517 static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
2518 static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
2519 static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
2520 /* AVCC3 */
2521 static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 3);
2522
2523 static umode_t it87_in_is_visible(struct kobject *kobj,
2524                                   struct attribute *attr, int index)
2525 {
2526         struct device *dev = container_of(kobj, struct device, kobj);
2527         struct it87_data *data = dev_get_drvdata(dev);
2528         int i = index / 5;      /* voltage index */
2529         int a = index % 5;      /* attribute index */
2530
2531         if (index >= 40) {      /* in8 and higher only have input attributes */
2532                 i = index - 40 + 8;
2533                 a = 0;
2534         }
2535
2536         if (!(data->has_in & BIT(i)))
2537                 return 0;
2538
2539         if (a == 4 && !data->has_beep)
2540                 return 0;
2541
2542         return attr->mode;
2543 }
2544
2545 static struct attribute *it87_attributes_in[] = {
2546         &sensor_dev_attr_in0_input.dev_attr.attr,
2547         &sensor_dev_attr_in0_min.dev_attr.attr,
2548         &sensor_dev_attr_in0_max.dev_attr.attr,
2549         &sensor_dev_attr_in0_alarm.dev_attr.attr,
2550         &sensor_dev_attr_in0_beep.dev_attr.attr,        /* 4 */
2551
2552         &sensor_dev_attr_in1_input.dev_attr.attr,
2553         &sensor_dev_attr_in1_min.dev_attr.attr,
2554         &sensor_dev_attr_in1_max.dev_attr.attr,
2555         &sensor_dev_attr_in1_alarm.dev_attr.attr,
2556         &sensor_dev_attr_in1_beep.dev_attr.attr,        /* 9 */
2557
2558         &sensor_dev_attr_in2_input.dev_attr.attr,
2559         &sensor_dev_attr_in2_min.dev_attr.attr,
2560         &sensor_dev_attr_in2_max.dev_attr.attr,
2561         &sensor_dev_attr_in2_alarm.dev_attr.attr,
2562         &sensor_dev_attr_in2_beep.dev_attr.attr,        /* 14 */
2563
2564         &sensor_dev_attr_in3_input.dev_attr.attr,
2565         &sensor_dev_attr_in3_min.dev_attr.attr,
2566         &sensor_dev_attr_in3_max.dev_attr.attr,
2567         &sensor_dev_attr_in3_alarm.dev_attr.attr,
2568         &sensor_dev_attr_in3_beep.dev_attr.attr,        /* 19 */
2569
2570         &sensor_dev_attr_in4_input.dev_attr.attr,
2571         &sensor_dev_attr_in4_min.dev_attr.attr,
2572         &sensor_dev_attr_in4_max.dev_attr.attr,
2573         &sensor_dev_attr_in4_alarm.dev_attr.attr,
2574         &sensor_dev_attr_in4_beep.dev_attr.attr,        /* 24 */
2575
2576         &sensor_dev_attr_in5_input.dev_attr.attr,
2577         &sensor_dev_attr_in5_min.dev_attr.attr,
2578         &sensor_dev_attr_in5_max.dev_attr.attr,
2579         &sensor_dev_attr_in5_alarm.dev_attr.attr,
2580         &sensor_dev_attr_in5_beep.dev_attr.attr,        /* 29 */
2581
2582         &sensor_dev_attr_in6_input.dev_attr.attr,
2583         &sensor_dev_attr_in6_min.dev_attr.attr,
2584         &sensor_dev_attr_in6_max.dev_attr.attr,
2585         &sensor_dev_attr_in6_alarm.dev_attr.attr,
2586         &sensor_dev_attr_in6_beep.dev_attr.attr,        /* 34 */
2587
2588         &sensor_dev_attr_in7_input.dev_attr.attr,
2589         &sensor_dev_attr_in7_min.dev_attr.attr,
2590         &sensor_dev_attr_in7_max.dev_attr.attr,
2591         &sensor_dev_attr_in7_alarm.dev_attr.attr,
2592         &sensor_dev_attr_in7_beep.dev_attr.attr,        /* 39 */
2593
2594         &sensor_dev_attr_in8_input.dev_attr.attr,       /* 40 */
2595         &sensor_dev_attr_in9_input.dev_attr.attr,       /* 41 */
2596         &sensor_dev_attr_in10_input.dev_attr.attr,      /* 42 */
2597         &sensor_dev_attr_in11_input.dev_attr.attr,      /* 43 */
2598         &sensor_dev_attr_in12_input.dev_attr.attr,      /* 44 */
2599         NULL
2600 };
2601
2602 static const struct attribute_group it87_group_in = {
2603         .attrs = it87_attributes_in,
2604         .is_visible = it87_in_is_visible,
2605 };
2606
2607 static umode_t it87_temp_is_visible(struct kobject *kobj,
2608                                     struct attribute *attr, int index)
2609 {
2610         struct device *dev = container_of(kobj, struct device, kobj);
2611         struct it87_data *data = dev_get_drvdata(dev);
2612         int i = index / 7;      /* temperature index */
2613         int a = index % 7;      /* attribute index */
2614
2615         if (!(data->has_temp & BIT(i)))
2616                 return 0;
2617
2618         if (a && i >= data->num_temp_limit)
2619                 return 0;
2620
2621         if (a == 3) {
2622                 int type = get_temp_type(data, i);
2623
2624                 if (type == 0)
2625                         return 0;
2626                 if (has_bank_sel(data))
2627                         return 0444;
2628                 return attr->mode;
2629         }
2630
2631         if (a == 5 && i >= data->num_temp_offset)
2632                 return 0;
2633
2634         if (a == 6 && !data->has_beep)
2635                 return 0;
2636
2637         return attr->mode;
2638 }
2639
2640 static struct attribute *it87_attributes_temp[] = {
2641         &sensor_dev_attr_temp1_input.dev_attr.attr,
2642         &sensor_dev_attr_temp1_max.dev_attr.attr,
2643         &sensor_dev_attr_temp1_min.dev_attr.attr,
2644         &sensor_dev_attr_temp1_type.dev_attr.attr,      /* 3 */
2645         &sensor_dev_attr_temp1_alarm.dev_attr.attr,
2646         &sensor_dev_attr_temp1_offset.dev_attr.attr,    /* 5 */
2647         &sensor_dev_attr_temp1_beep.dev_attr.attr,      /* 6 */
2648
2649         &sensor_dev_attr_temp2_input.dev_attr.attr,     /* 7 */
2650         &sensor_dev_attr_temp2_max.dev_attr.attr,
2651         &sensor_dev_attr_temp2_min.dev_attr.attr,
2652         &sensor_dev_attr_temp2_type.dev_attr.attr,
2653         &sensor_dev_attr_temp2_alarm.dev_attr.attr,
2654         &sensor_dev_attr_temp2_offset.dev_attr.attr,
2655         &sensor_dev_attr_temp2_beep.dev_attr.attr,
2656
2657         &sensor_dev_attr_temp3_input.dev_attr.attr,     /* 14 */
2658         &sensor_dev_attr_temp3_max.dev_attr.attr,
2659         &sensor_dev_attr_temp3_min.dev_attr.attr,
2660         &sensor_dev_attr_temp3_type.dev_attr.attr,
2661         &sensor_dev_attr_temp3_alarm.dev_attr.attr,
2662         &sensor_dev_attr_temp3_offset.dev_attr.attr,
2663         &sensor_dev_attr_temp3_beep.dev_attr.attr,
2664
2665         &sensor_dev_attr_temp4_input.dev_attr.attr,     /* 21 */
2666         &sensor_dev_attr_temp4_max.dev_attr.attr,
2667         &sensor_dev_attr_temp4_min.dev_attr.attr,
2668         &sensor_dev_attr_temp4_type.dev_attr.attr,
2669         &sensor_dev_attr_temp4_alarm.dev_attr.attr,
2670         &sensor_dev_attr_temp4_offset.dev_attr.attr,
2671         &sensor_dev_attr_temp4_beep.dev_attr.attr,
2672
2673         &sensor_dev_attr_temp5_input.dev_attr.attr,
2674         &sensor_dev_attr_temp5_max.dev_attr.attr,
2675         &sensor_dev_attr_temp5_min.dev_attr.attr,
2676         &sensor_dev_attr_temp5_type.dev_attr.attr,
2677         &sensor_dev_attr_temp5_alarm.dev_attr.attr,
2678         &sensor_dev_attr_temp5_offset.dev_attr.attr,
2679         &sensor_dev_attr_temp5_beep.dev_attr.attr,
2680
2681         &sensor_dev_attr_temp6_input.dev_attr.attr,
2682         &sensor_dev_attr_temp6_max.dev_attr.attr,
2683         &sensor_dev_attr_temp6_min.dev_attr.attr,
2684         &sensor_dev_attr_temp6_type.dev_attr.attr,
2685         &sensor_dev_attr_temp6_alarm.dev_attr.attr,
2686         &sensor_dev_attr_temp6_offset.dev_attr.attr,
2687         &sensor_dev_attr_temp6_beep.dev_attr.attr,
2688         NULL
2689 };
2690
2691 static const struct attribute_group it87_group_temp = {
2692         .attrs = it87_attributes_temp,
2693         .is_visible = it87_temp_is_visible,
2694 };
2695
2696 static umode_t it87_is_visible(struct kobject *kobj,
2697                                struct attribute *attr, int index)
2698 {
2699         struct device *dev = container_of(kobj, struct device, kobj);
2700         struct it87_data *data = dev_get_drvdata(dev);
2701
2702         if ((index == 2 || index == 3) && !data->has_vid)
2703                 return 0;
2704
2705         if (index > 3 && !(data->in_internal & BIT(index - 4)))
2706                 return 0;
2707
2708         return attr->mode;
2709 }
2710
2711 static struct attribute *it87_attributes[] = {
2712         &dev_attr_alarms.attr,
2713         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
2714         &dev_attr_vrm.attr,                             /* 2 */
2715         &dev_attr_cpu0_vid.attr,                        /* 3 */
2716         &sensor_dev_attr_in3_label.dev_attr.attr,       /* 4 .. 7 */
2717         &sensor_dev_attr_in7_label.dev_attr.attr,
2718         &sensor_dev_attr_in8_label.dev_attr.attr,
2719         &sensor_dev_attr_in9_label.dev_attr.attr,
2720         NULL
2721 };
2722
2723 static const struct attribute_group it87_group = {
2724         .attrs = it87_attributes,
2725         .is_visible = it87_is_visible,
2726 };
2727
2728 static umode_t it87_fan_is_visible(struct kobject *kobj,
2729                                    struct attribute *attr, int index)
2730 {
2731         struct device *dev = container_of(kobj, struct device, kobj);
2732         struct it87_data *data = dev_get_drvdata(dev);
2733         int i = index / 5;      /* fan index */
2734         int a = index % 5;      /* attribute index */
2735
2736         if (index >= 15) {      /* fan 4..6 don't have divisor attributes */
2737                 i = (index - 15) / 4 + 3;
2738                 a = (index - 15) % 4;
2739         }
2740
2741         if (!(data->has_fan & BIT(i)))
2742                 return 0;
2743
2744         if (a == 3) {                           /* beep */
2745                 if (!data->has_beep)
2746                         return 0;
2747                 /* first fan beep attribute is writable */
2748                 if (i == __ffs(data->has_fan))
2749                         return attr->mode | S_IWUSR;
2750         }
2751
2752         if (a == 4 && has_16bit_fans(data))     /* divisor */
2753                 return 0;
2754
2755         return attr->mode;
2756 }
2757
2758 static struct attribute *it87_attributes_fan[] = {
2759         &sensor_dev_attr_fan1_input.dev_attr.attr,
2760         &sensor_dev_attr_fan1_min.dev_attr.attr,
2761         &sensor_dev_attr_fan1_alarm.dev_attr.attr,
2762         &sensor_dev_attr_fan1_beep.dev_attr.attr,       /* 3 */
2763         &sensor_dev_attr_fan1_div.dev_attr.attr,        /* 4 */
2764
2765         &sensor_dev_attr_fan2_input.dev_attr.attr,
2766         &sensor_dev_attr_fan2_min.dev_attr.attr,
2767         &sensor_dev_attr_fan2_alarm.dev_attr.attr,
2768         &sensor_dev_attr_fan2_beep.dev_attr.attr,
2769         &sensor_dev_attr_fan2_div.dev_attr.attr,        /* 9 */
2770
2771         &sensor_dev_attr_fan3_input.dev_attr.attr,
2772         &sensor_dev_attr_fan3_min.dev_attr.attr,
2773         &sensor_dev_attr_fan3_alarm.dev_attr.attr,
2774         &sensor_dev_attr_fan3_beep.dev_attr.attr,
2775         &sensor_dev_attr_fan3_div.dev_attr.attr,        /* 14 */
2776
2777         &sensor_dev_attr_fan4_input.dev_attr.attr,      /* 15 */
2778         &sensor_dev_attr_fan4_min.dev_attr.attr,
2779         &sensor_dev_attr_fan4_alarm.dev_attr.attr,
2780         &sensor_dev_attr_fan4_beep.dev_attr.attr,
2781
2782         &sensor_dev_attr_fan5_input.dev_attr.attr,      /* 19 */
2783         &sensor_dev_attr_fan5_min.dev_attr.attr,
2784         &sensor_dev_attr_fan5_alarm.dev_attr.attr,
2785         &sensor_dev_attr_fan5_beep.dev_attr.attr,
2786
2787         &sensor_dev_attr_fan6_input.dev_attr.attr,      /* 23 */
2788         &sensor_dev_attr_fan6_min.dev_attr.attr,
2789         &sensor_dev_attr_fan6_alarm.dev_attr.attr,
2790         &sensor_dev_attr_fan6_beep.dev_attr.attr,
2791         NULL
2792 };
2793
2794 static const struct attribute_group it87_group_fan = {
2795         .attrs = it87_attributes_fan,
2796         .is_visible = it87_fan_is_visible,
2797 };
2798
2799 static umode_t it87_pwm_is_visible(struct kobject *kobj,
2800                                    struct attribute *attr, int index)
2801 {
2802         struct device *dev = container_of(kobj, struct device, kobj);
2803         struct it87_data *data = dev_get_drvdata(dev);
2804         int i = index / 4;      /* pwm index */
2805         int a = index % 4;      /* attribute index */
2806
2807         if (!(data->has_pwm & BIT(i)))
2808                 return 0;
2809
2810         /* pwmX_auto_channels_temp is only writable if auto pwm is supported */
2811         if (a == 3 && (has_old_autopwm(data) || has_newer_autopwm(data)))
2812                 return attr->mode | S_IWUSR;
2813
2814         /* pwm2_freq is writable if there are two pwm frequency selects */
2815         if (has_pwm_freq2(data) && i == 1 && a == 2)
2816                 return attr->mode | S_IWUSR;
2817
2818         return attr->mode;
2819 }
2820
2821 static struct attribute *it87_attributes_pwm[] = {
2822         &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2823         &sensor_dev_attr_pwm1.dev_attr.attr,
2824         &sensor_dev_attr_pwm1_freq.dev_attr.attr,
2825         &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
2826
2827         &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2828         &sensor_dev_attr_pwm2.dev_attr.attr,
2829         &sensor_dev_attr_pwm2_freq.dev_attr.attr,
2830         &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
2831
2832         &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2833         &sensor_dev_attr_pwm3.dev_attr.attr,
2834         &sensor_dev_attr_pwm3_freq.dev_attr.attr,
2835         &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
2836
2837         &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2838         &sensor_dev_attr_pwm4.dev_attr.attr,
2839         &sensor_dev_attr_pwm4_freq.dev_attr.attr,
2840         &sensor_dev_attr_pwm4_auto_channels_temp.dev_attr.attr,
2841
2842         &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2843         &sensor_dev_attr_pwm5.dev_attr.attr,
2844         &sensor_dev_attr_pwm5_freq.dev_attr.attr,
2845         &sensor_dev_attr_pwm5_auto_channels_temp.dev_attr.attr,
2846
2847         &sensor_dev_attr_pwm6_enable.dev_attr.attr,
2848         &sensor_dev_attr_pwm6.dev_attr.attr,
2849         &sensor_dev_attr_pwm6_freq.dev_attr.attr,
2850         &sensor_dev_attr_pwm6_auto_channels_temp.dev_attr.attr,
2851
2852         NULL
2853 };
2854
2855 static const struct attribute_group it87_group_pwm = {
2856         .attrs = it87_attributes_pwm,
2857         .is_visible = it87_pwm_is_visible,
2858 };
2859
2860 static umode_t it87_auto_pwm_is_visible(struct kobject *kobj,
2861                                         struct attribute *attr, int index)
2862 {
2863         struct device *dev = container_of(kobj, struct device, kobj);
2864         struct it87_data *data = dev_get_drvdata(dev);
2865         int i = index / 11;     /* pwm index */
2866         int a = index % 11;     /* attribute index */
2867
2868         if (index >= 33) {      /* pwm 4..6 */
2869                 i = (index - 33) / 6 + 3;
2870                 a = (index - 33) % 6 + 4;
2871         }
2872
2873         if (!(data->has_pwm & BIT(i)))
2874                 return 0;
2875
2876         if (has_newer_autopwm(data)) {
2877                 if (a < 4)      /* no auto point pwm */
2878                         return 0;
2879                 if (a == 8)     /* no auto_point4 */
2880                         return 0;
2881         }
2882         if (has_old_autopwm(data)) {
2883                 if (a >= 9)     /* no pwm_auto_start, pwm_auto_slope */
2884                         return 0;
2885         }
2886
2887         return attr->mode;
2888 }
2889
2890 static struct attribute *it87_attributes_auto_pwm[] = {
2891         &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
2892         &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
2893         &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
2894         &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
2895         &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
2896         &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
2897         &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
2898         &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
2899         &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
2900         &sensor_dev_attr_pwm1_auto_start.dev_attr.attr,
2901         &sensor_dev_attr_pwm1_auto_slope.dev_attr.attr,
2902
2903         &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,    /* 11 */
2904         &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
2905         &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
2906         &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
2907         &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
2908         &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
2909         &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
2910         &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
2911         &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
2912         &sensor_dev_attr_pwm2_auto_start.dev_attr.attr,
2913         &sensor_dev_attr_pwm2_auto_slope.dev_attr.attr,
2914
2915         &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,    /* 22 */
2916         &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
2917         &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
2918         &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
2919         &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
2920         &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
2921         &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
2922         &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
2923         &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
2924         &sensor_dev_attr_pwm3_auto_start.dev_attr.attr,
2925         &sensor_dev_attr_pwm3_auto_slope.dev_attr.attr,
2926
2927         &sensor_dev_attr_pwm4_auto_point1_temp.dev_attr.attr,   /* 33 */
2928         &sensor_dev_attr_pwm4_auto_point1_temp_hyst.dev_attr.attr,
2929         &sensor_dev_attr_pwm4_auto_point2_temp.dev_attr.attr,
2930         &sensor_dev_attr_pwm4_auto_point3_temp.dev_attr.attr,
2931         &sensor_dev_attr_pwm4_auto_start.dev_attr.attr,
2932         &sensor_dev_attr_pwm4_auto_slope.dev_attr.attr,
2933
2934         &sensor_dev_attr_pwm5_auto_point1_temp.dev_attr.attr,
2935         &sensor_dev_attr_pwm5_auto_point1_temp_hyst.dev_attr.attr,
2936         &sensor_dev_attr_pwm5_auto_point2_temp.dev_attr.attr,
2937         &sensor_dev_attr_pwm5_auto_point3_temp.dev_attr.attr,
2938         &sensor_dev_attr_pwm5_auto_start.dev_attr.attr,
2939         &sensor_dev_attr_pwm5_auto_slope.dev_attr.attr,
2940
2941         &sensor_dev_attr_pwm6_auto_point1_temp.dev_attr.attr,
2942         &sensor_dev_attr_pwm6_auto_point1_temp_hyst.dev_attr.attr,
2943         &sensor_dev_attr_pwm6_auto_point2_temp.dev_attr.attr,
2944         &sensor_dev_attr_pwm6_auto_point3_temp.dev_attr.attr,
2945         &sensor_dev_attr_pwm6_auto_start.dev_attr.attr,
2946         &sensor_dev_attr_pwm6_auto_slope.dev_attr.attr,
2947
2948         NULL,
2949 };
2950
2951 static const struct attribute_group it87_group_auto_pwm = {
2952         .attrs = it87_attributes_auto_pwm,
2953         .is_visible = it87_auto_pwm_is_visible,
2954 };
2955
2956 /* SuperIO detection - will change isa_address if a chip is found */
2957 static int __init it87_find(int sioaddr, unsigned short *address,
2958                             phys_addr_t *mmio_address, struct it87_sio_data *sio_data)
2959 {
2960         const struct it87_devices *config;
2961         phys_addr_t base = 0;
2962         bool doexit = true;
2963         char mmio_str[32];
2964         u16 chip_type;
2965         int err;
2966
2967         err = superio_enter(sioaddr);
2968         if (err)
2969                 return err;
2970
2971         sio_data->sioaddr = sioaddr;
2972
2973         err = -ENODEV;
2974         chip_type = superio_inw(sioaddr, DEVID);
2975         if (chip_type == 0xffff)
2976                 goto exit;
2977
2978         if (force_id)
2979                 chip_type = force_id;
2980
2981         switch (chip_type) {
2982         case IT8705F_DEVID:
2983                 sio_data->type = it87;
2984                 break;
2985         case IT8712F_DEVID:
2986                 sio_data->type = it8712;
2987                 break;
2988         case IT8716F_DEVID:
2989         case IT8726F_DEVID:
2990                 sio_data->type = it8716;
2991                 break;
2992         case IT8718F_DEVID:
2993                 sio_data->type = it8718;
2994                 break;
2995         case IT8720F_DEVID:
2996                 sio_data->type = it8720;
2997                 break;
2998         case IT8721F_DEVID:
2999                 sio_data->type = it8721;
3000                 break;
3001         case IT8728F_DEVID:
3002                 sio_data->type = it8728;
3003                 break;
3004         case IT8732F_DEVID:
3005                 sio_data->type = it8732;
3006                 break;
3007         case IT8792E_DEVID:
3008                 sio_data->type = it8792;
3009                 /*
3010                  * Disabling configuration mode on IT8792E can result in system
3011                  * hang-ups and access failures to the Super-IO chip at the
3012                  * second SIO address. Never exit configuration mode on this
3013                  * chip to avoid the problem.
3014                  */
3015                 doexit = false;
3016                 break;
3017         case IT8771E_DEVID:
3018                 sio_data->type = it8771;
3019                 break;
3020         case IT8772E_DEVID:
3021                 sio_data->type = it8772;
3022                 break;
3023         case IT8781F_DEVID:
3024                 sio_data->type = it8781;
3025                 break;
3026         case IT8782F_DEVID:
3027                 sio_data->type = it8782;
3028                 break;
3029         case IT8783E_DEVID:
3030                 sio_data->type = it8783;
3031                 break;
3032         case IT8786E_DEVID:
3033                 sio_data->type = it8786;
3034                 break;
3035         case IT8790E_DEVID:
3036                 sio_data->type = it8790;
3037                 doexit = false;         /* See IT8792E comment above */
3038                 break;
3039         case IT8603E_DEVID:
3040         case IT8623E_DEVID:
3041                 sio_data->type = it8603;
3042                 break;
3043         case IT8607E_DEVID:
3044                 sio_data->type = it8607;
3045                 break;
3046         case IT8613E_DEVID:
3047                 sio_data->type = it8613;
3048                 break;
3049         case IT8620E_DEVID:
3050                 sio_data->type = it8620;
3051                 break;
3052         case IT8622E_DEVID:
3053                 sio_data->type = it8622;
3054                 break;
3055         case IT8625E_DEVID:
3056                 sio_data->type = it8625;
3057                 break;
3058         case IT8628E_DEVID:
3059                 sio_data->type = it8628;
3060                 break;
3061         case IT8655E_DEVID:
3062                 sio_data->type = it8655;
3063                 break;
3064         case IT8665E_DEVID:
3065                 sio_data->type = it8665;
3066                 break;
3067         case IT8686E_DEVID:
3068                 sio_data->type = it8686;
3069                 break;
3070         case 0xffff:    /* No device at all */
3071                 goto exit;
3072         default:
3073                 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
3074                 goto exit;
3075         }
3076
3077         superio_select(sioaddr, PME);
3078         if (!(superio_inb(sioaddr, IT87_ACT_REG) & 0x01)) {
3079                 pr_info("Device not activated, skipping\n");
3080                 goto exit;
3081         }
3082
3083         *address = superio_inw(sioaddr, IT87_BASE_REG) & ~(IT87_EXTENT - 1);
3084         if (*address == 0) {
3085                 pr_info("Base address not set, skipping\n");
3086                 goto exit;
3087         }
3088
3089         sio_data->doexit = doexit;
3090
3091         err = 0;
3092         sio_data->revision = superio_inb(sioaddr, DEVREV) & 0x0f;
3093
3094         config = &it87_devices[sio_data->type];
3095
3096         if (has_mmio(config) && mmio) {
3097                 u8 reg;
3098
3099                 reg = superio_inb(sioaddr, IT87_EC_HWM_MIO_REG);
3100                 if (reg & BIT(5)) {
3101                         base = 0xf0000000 + ((reg & 0x0f) << 24);
3102                         base += (reg & 0xc0) << 14;
3103                 }
3104         }
3105         *mmio_address = base;
3106
3107         mmio_str[0] = '\0';
3108         if (base)
3109                 snprintf(mmio_str, sizeof(mmio_str), " [MMIO at %pa]", &base);
3110
3111         pr_info("Found IT%04x%s chip at 0x%x%s, revision %d\n", chip_type,
3112                 it87_devices[sio_data->type].suffix,
3113                 *address, mmio_str, sio_data->revision);
3114
3115         /* in7 (VSB or VCCH5V) is always internal on some chips */
3116         if (has_in7_internal(config))
3117                 sio_data->internal |= BIT(1);
3118
3119         /* in8 (Vbat) is always internal */
3120         sio_data->internal |= BIT(2);
3121
3122         /* in9 (AVCC3), always internal if supported */
3123         if (has_avcc3(config))
3124                 sio_data->internal |= BIT(3); /* in9 is AVCC */
3125         else
3126                 sio_data->skip_in |= BIT(9);
3127
3128         if (!has_four_pwm(config))
3129                 sio_data->skip_pwm |= BIT(3) | BIT(4) | BIT(5);
3130         else if (!has_five_pwm(config))
3131                 sio_data->skip_pwm |= BIT(4) | BIT(5);
3132         else if (!has_six_pwm(config))
3133                 sio_data->skip_pwm |= BIT(5);
3134
3135         if (!has_vid(config))
3136                 sio_data->skip_vid = 1;
3137
3138         /* Read GPIO config and VID value from LDN 7 (GPIO) */
3139         if (sio_data->type == it87) {
3140                 /* The IT8705F has a different LD number for GPIO */
3141                 superio_select(sioaddr, 5);
3142                 sio_data->beep_pin = superio_inb(sioaddr,
3143                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3144         } else if (sio_data->type == it8783) {
3145                 int reg25, reg27, reg2a, reg2c, regef;
3146
3147                 superio_select(sioaddr, GPIO);
3148
3149                 reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
3150                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3151                 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
3152                 reg2c = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3153                 regef = superio_inb(sioaddr, IT87_SIO_SPI_REG);
3154
3155                 /* Check if fan3 is there or not */
3156                 if ((reg27 & BIT(0)) || !(reg2c & BIT(2)))
3157                         sio_data->skip_fan |= BIT(2);
3158                 if ((reg25 & BIT(4)) ||
3159                     (!(reg2a & BIT(1)) && (regef & BIT(0))))
3160                         sio_data->skip_pwm |= BIT(2);
3161
3162                 /* Check if fan2 is there or not */
3163                 if (reg27 & BIT(7))
3164                         sio_data->skip_fan |= BIT(1);
3165                 if (reg27 & BIT(3))
3166                         sio_data->skip_pwm |= BIT(1);
3167
3168                 /* VIN5 */
3169                 if ((reg27 & BIT(0)) || (reg2c & BIT(2)))
3170                         sio_data->skip_in |= BIT(5); /* No VIN5 */
3171
3172                 /* VIN6 */
3173                 if (reg27 & BIT(1))
3174                         sio_data->skip_in |= BIT(6); /* No VIN6 */
3175
3176                 /*
3177                  * VIN7
3178                  * Does not depend on bit 2 of Reg2C, contrary to datasheet.
3179                  */
3180                 if (reg27 & BIT(2)) {
3181                         /*
3182                          * The data sheet is a bit unclear regarding the
3183                          * internal voltage divider for VCCH5V. It says
3184                          * "This bit enables and switches VIN7 (pin 91) to the
3185                          * internal voltage divider for VCCH5V".
3186                          * This is different to other chips, where the internal
3187                          * voltage divider would connect VIN7 to an internal
3188                          * voltage source. Maybe that is the case here as well.
3189                          *
3190                          * Since we don't know for sure, re-route it if that is
3191                          * not the case, and ask the user to report if the
3192                          * resulting voltage is sane.
3193                          */
3194                         if (!(reg2c & BIT(1))) {
3195                                 reg2c |= BIT(1);
3196                                 superio_outb(sioaddr, IT87_SIO_PINX2_REG,
3197                                              reg2c);
3198                                 pr_notice("Routing internal VCCH5V to in7.\n");
3199                         }
3200                         pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
3201                         pr_notice("Please report if it displays a reasonable voltage.\n");
3202                 }
3203
3204                 if (reg2c & BIT(0))
3205                         sio_data->internal |= BIT(0);
3206                 if (reg2c & BIT(1))
3207                         sio_data->internal |= BIT(1);
3208
3209                 sio_data->beep_pin = superio_inb(sioaddr,
3210                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3211         } else if (sio_data->type == it8603 || sio_data->type == it8607) {
3212                 int reg27, reg29;
3213
3214                 superio_select(sioaddr, GPIO);
3215
3216                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3217
3218                 /* Check if fan3 is there or not */
3219                 if (reg27 & BIT(6))
3220                         sio_data->skip_pwm |= BIT(2);
3221                 if (reg27 & BIT(7))
3222                         sio_data->skip_fan |= BIT(2);
3223
3224                 /* Check if fan2 is there or not */
3225                 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3226                 if (reg29 & BIT(1))
3227                         sio_data->skip_pwm |= BIT(1);
3228                 if (reg29 & BIT(2))
3229                         sio_data->skip_fan |= BIT(1);
3230
3231                 switch (sio_data->type) {
3232                 case it8603:
3233                         sio_data->skip_in |= BIT(5); /* No VIN5 */
3234                         sio_data->skip_in |= BIT(6); /* No VIN6 */
3235                         break;
3236                 case it8607:
3237                         sio_data->skip_pwm |= BIT(0);/* No fan1 */
3238                         sio_data->skip_fan |= BIT(0);
3239                 default:
3240                         break;
3241                 }
3242
3243                 sio_data->beep_pin = superio_inb(sioaddr,
3244                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3245         } else if (sio_data->type == it8613) {
3246                 int reg27, reg29, reg2a;
3247
3248                 superio_select(sioaddr, GPIO);
3249
3250                 /* Check for pwm3, fan3, pwm5, fan5 */
3251                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3252                 if (reg27 & BIT(1))
3253                         sio_data->skip_fan |= BIT(4);
3254                 if (reg27 & BIT(3))
3255                         sio_data->skip_pwm |= BIT(4);
3256                 if (reg27 & BIT(6))
3257                         sio_data->skip_pwm |= BIT(2);
3258                 if (reg27 & BIT(7))
3259                         sio_data->skip_fan |= BIT(2);
3260
3261                 /* Check for pwm2, fan2 */
3262                 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3263                 if (reg29 & BIT(1))
3264                         sio_data->skip_pwm |= BIT(1);
3265                 if (reg29 & BIT(2))
3266                         sio_data->skip_fan |= BIT(1);
3267
3268                 /* Check for pwm4, fan4 */
3269                 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
3270                 if (!(reg2a & BIT(0)) || (reg29 & BIT(7))) {
3271                         sio_data->skip_fan |= BIT(3);
3272                         sio_data->skip_pwm |= BIT(3);
3273                 }
3274
3275                 sio_data->skip_pwm |= BIT(0); /* No pwm1 */
3276                 sio_data->skip_fan |= BIT(0); /* No fan1 */
3277                 sio_data->skip_in |= BIT(3);  /* No VIN3 */
3278                 sio_data->skip_in |= BIT(6);  /* No VIN6 */
3279
3280                 sio_data->beep_pin = superio_inb(sioaddr,
3281                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3282         } else if (sio_data->type == it8620 || sio_data->type == it8628 ||
3283                    sio_data->type == it8686) {
3284                 int reg;
3285
3286                 superio_select(sioaddr, GPIO);
3287
3288                 /* Check for pwm5 */
3289                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
3290                 if (reg & BIT(6))
3291                         sio_data->skip_pwm |= BIT(4);
3292
3293                 /* Check for fan4, fan5 */
3294                 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
3295                 if (!(reg & BIT(5)))
3296                         sio_data->skip_fan |= BIT(3);
3297                 if (!(reg & BIT(4)))
3298                         sio_data->skip_fan |= BIT(4);
3299
3300                 /* Check for pwm3, fan3 */
3301                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3302                 if (reg & BIT(6))
3303                         sio_data->skip_pwm |= BIT(2);
3304                 if (reg & BIT(7))
3305                         sio_data->skip_fan |= BIT(2);
3306
3307                 /* Check for pwm4 */
3308                 reg = superio_inb(sioaddr, IT87_SIO_GPIO4_REG);
3309                 if (reg & BIT(2))
3310                         sio_data->skip_pwm |= BIT(3);
3311
3312                 /* Check for pwm2, fan2 */
3313                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3314                 if (reg & BIT(1))
3315                         sio_data->skip_pwm |= BIT(1);
3316                 if (reg & BIT(2))
3317                         sio_data->skip_fan |= BIT(1);
3318                 /* Check for pwm6, fan6 */
3319                 if (!(reg & BIT(7))) {
3320                         sio_data->skip_pwm |= BIT(5);
3321                         sio_data->skip_fan |= BIT(5);
3322                 }
3323
3324                 /* Check if AVCC is on VIN3 */
3325                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3326                 if (reg & BIT(0)) {
3327                         /* For it8686, the bit just enables AVCC3 */
3328                         if (sio_data->type != it8686)
3329                                 sio_data->internal |= BIT(0);
3330                 } else {
3331                         sio_data->internal &= ~BIT(3);
3332                         sio_data->skip_in |= BIT(9);
3333                 }
3334
3335                 sio_data->beep_pin = superio_inb(sioaddr,
3336                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3337         } else if (sio_data->type == it8622) {
3338                 int reg;
3339
3340                 superio_select(sioaddr, GPIO);
3341
3342                 /* Check for pwm4, fan4 */
3343                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
3344                 if (reg & BIT(6))
3345                         sio_data->skip_fan |= BIT(3);
3346                 if (reg & BIT(5))
3347                         sio_data->skip_pwm |= BIT(3);
3348
3349                 /* Check for pwm3, fan3, pwm5, fan5 */
3350                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3351                 if (reg & BIT(6))
3352                         sio_data->skip_pwm |= BIT(2);
3353                 if (reg & BIT(7))
3354                         sio_data->skip_fan |= BIT(2);
3355                 if (reg & BIT(3))
3356                         sio_data->skip_pwm |= BIT(4);
3357                 if (reg & BIT(1))
3358                         sio_data->skip_fan |= BIT(4);
3359
3360                 /* Check for pwm2, fan2 */
3361                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3362                 if (reg & BIT(1))
3363                         sio_data->skip_pwm |= BIT(1);
3364                 if (reg & BIT(2))
3365                         sio_data->skip_fan |= BIT(1);
3366
3367                 /* Check for AVCC */
3368                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3369                 if (!(reg & BIT(0)))
3370                         sio_data->skip_in |= BIT(9);
3371
3372                 sio_data->beep_pin = superio_inb(sioaddr,
3373                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3374         } else if (sio_data->type == it8732) {
3375                 int reg;
3376
3377                 superio_select(sioaddr, GPIO);
3378
3379                 /* Check for pwm2, fan2 */
3380                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3381                 if (reg & BIT(1))
3382                         sio_data->skip_pwm |= BIT(1);
3383                 if (reg & BIT(2))
3384                         sio_data->skip_fan |= BIT(1);
3385
3386                 /* Check for pwm3, fan3, fan4 */
3387                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3388                 if (reg & BIT(6))
3389                         sio_data->skip_pwm |= BIT(2);
3390                 if (reg & BIT(7))
3391                         sio_data->skip_fan |= BIT(2);
3392                 if (reg & BIT(5))
3393                         sio_data->skip_fan |= BIT(3);
3394
3395                 /* Check if AVCC is on VIN3 */
3396                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3397                 if (reg & BIT(0))
3398                         sio_data->internal |= BIT(0);
3399
3400                 sio_data->beep_pin = superio_inb(sioaddr,
3401                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3402         } else if (sio_data->type == it8655) {
3403                 int reg;
3404
3405                 superio_select(sioaddr, GPIO);
3406
3407                 /* Check for pwm2 */
3408                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3409                 if (reg & BIT(1))
3410                         sio_data->skip_pwm |= BIT(1);
3411
3412                 /* Check for fan2 */
3413                 reg = superio_inb(sioaddr, IT87_SIO_PINX4_REG);
3414                 if (reg & BIT(4))
3415                         sio_data->skip_fan |= BIT(1);
3416
3417                 /* Check for pwm3, fan3 */
3418                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3419                 if (reg & BIT(6))
3420                         sio_data->skip_pwm |= BIT(2);
3421                 if (reg & BIT(7))
3422                         sio_data->skip_fan |= BIT(2);
3423
3424                 sio_data->beep_pin = superio_inb(sioaddr,
3425                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3426         } else if (sio_data->type == it8665 || sio_data->type == it8625) {
3427                 int reg27, reg29, reg2d, regd3;
3428
3429                 superio_select(sioaddr, GPIO);
3430
3431                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3432                 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3433                 reg2d = superio_inb(sioaddr, IT87_SIO_PINX4_REG);
3434                 regd3 = superio_inb(sioaddr, IT87_SIO_GPIO9_REG);
3435
3436                 /* Check for pwm2, fan2 */
3437                 if (reg29 & BIT(1))
3438                         sio_data->skip_pwm |= BIT(1);
3439                 /*
3440                  * Note: Table 6-1 in datasheet claims that FAN_TAC2
3441                  * would be enabled with 29h[2]=0.
3442                  */
3443                 if (reg2d & BIT(4))
3444                         sio_data->skip_fan |= BIT(1);
3445
3446                 /* Check for pwm3, fan3 */
3447                 if (reg27 & BIT(6))
3448                         sio_data->skip_pwm |= BIT(2);
3449                 if (reg27 & BIT(7))
3450                         sio_data->skip_fan |= BIT(2);
3451
3452                 /* Check for pwm4, fan4, pwm5, fan5 */
3453                 if (sio_data->type == it8625) {
3454                         int reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
3455
3456                         if (reg25 & BIT(6))
3457                                 sio_data->skip_fan |= BIT(3);
3458                         if (reg25 & BIT(5))
3459                                 sio_data->skip_pwm |= BIT(3);
3460                         if (reg27 & BIT(3))
3461                                 sio_data->skip_pwm |= BIT(4);
3462                         if (reg27 & BIT(1))
3463                                 sio_data->skip_fan |= BIT(4);
3464                 } else {
3465                         int reg26 = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
3466
3467                         if (regd3 & BIT(2))
3468                                 sio_data->skip_pwm |= BIT(3);
3469                         if (regd3 & BIT(3))
3470                                 sio_data->skip_fan |= BIT(3);
3471                         if (reg26 & BIT(5))
3472                                 sio_data->skip_pwm |= BIT(4);
3473                         if (reg26 & BIT(4))
3474                                 sio_data->skip_fan |= BIT(4);
3475                 }
3476
3477                 /* Check for pwm6, fan6 */
3478                 if (regd3 & BIT(0))
3479                         sio_data->skip_pwm |= BIT(5);
3480                 if (regd3 & BIT(1))
3481                         sio_data->skip_fan |= BIT(5);
3482
3483                 sio_data->beep_pin = superio_inb(sioaddr,
3484                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3485         } else {
3486                 int reg;
3487                 bool uart6;
3488
3489                 superio_select(sioaddr, GPIO);
3490
3491                 /* Check for fan4, fan5 */
3492                 if (has_five_fans(config)) {
3493                         reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
3494                         switch (sio_data->type) {
3495                         case it8718:
3496                                 if (reg & BIT(5))
3497                                         sio_data->skip_fan |= BIT(3);
3498                                 if (reg & BIT(4))
3499                                         sio_data->skip_fan |= BIT(4);
3500                                 break;
3501                         case it8720:
3502                         case it8721:
3503                         case it8728:
3504                                 if (!(reg & BIT(5)))
3505                                         sio_data->skip_fan |= BIT(3);
3506                                 if (!(reg & BIT(4)))
3507                                         sio_data->skip_fan |= BIT(4);
3508                                 break;
3509                         default:
3510                                 break;
3511                         }
3512                 }
3513
3514                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3515                 if (!sio_data->skip_vid) {
3516                         /* We need at least 4 VID pins */
3517                         if (reg & 0x0f) {
3518                                 pr_info("VID is disabled (pins used for GPIO)\n");
3519                                 sio_data->skip_vid = 1;
3520                         }
3521                 }
3522
3523                 /* Check if fan3 is there or not */
3524                 if (reg & BIT(6))
3525                         sio_data->skip_pwm |= BIT(2);
3526                 if (reg & BIT(7))
3527                         sio_data->skip_fan |= BIT(2);
3528
3529                 /* Check if fan2 is there or not */
3530                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3531                 if (reg & BIT(1))
3532                         sio_data->skip_pwm |= BIT(1);
3533                 if (reg & BIT(2))
3534                         sio_data->skip_fan |= BIT(1);
3535
3536                 if ((sio_data->type == it8718 || sio_data->type == it8720) &&
3537                     !(sio_data->skip_vid))
3538                         sio_data->vid_value = superio_inb(sioaddr,
3539                                                           IT87_SIO_VID_REG);
3540
3541                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3542
3543                 uart6 = sio_data->type == it8782 && (reg & BIT(2));
3544
3545                 /*
3546                  * The IT8720F has no VIN7 pin, so VCCH should always be
3547                  * routed internally to VIN7 with an internal divider.
3548                  * Curiously, there still is a configuration bit to control
3549                  * this, which means it can be set incorrectly. And even
3550                  * more curiously, many boards out there are improperly
3551                  * configured, even though the IT8720F datasheet claims
3552                  * that the internal routing of VCCH to VIN7 is the default
3553                  * setting. So we force the internal routing in this case.
3554                  *
3555                  * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
3556                  * If UART6 is enabled, re-route VIN7 to the internal divider
3557                  * if that is not already the case.
3558                  */
3559                 if ((sio_data->type == it8720 || uart6) && !(reg & BIT(1))) {
3560                         reg |= BIT(1);
3561                         superio_outb(sioaddr, IT87_SIO_PINX2_REG, reg);
3562                         pr_notice("Routing internal VCCH to in7\n");
3563                 }
3564                 if (reg & BIT(0))
3565                         sio_data->internal |= BIT(0);
3566                 if (reg & BIT(1))
3567                         sio_data->internal |= BIT(1);
3568
3569                 /*
3570                  * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
3571                  * While VIN7 can be routed to the internal voltage divider,
3572                  * VIN5 and VIN6 are not available if UART6 is enabled.
3573                  *
3574                  * Also, temp3 is not available if UART6 is enabled and TEMPIN3
3575                  * is the temperature source. Since we can not read the
3576                  * temperature source here, skip_temp is preliminary.
3577                  */
3578                 if (uart6) {
3579                         sio_data->skip_in |= BIT(5) | BIT(6);
3580                         sio_data->skip_temp |= BIT(2);
3581                 }
3582
3583                 sio_data->beep_pin = superio_inb(sioaddr,
3584                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3585         }
3586         if (sio_data->beep_pin)
3587                 pr_info("Beeping is supported\n");
3588
3589         if (config->smbus_bitmap && !base) {
3590                 u8 reg;
3591
3592                 superio_select(sioaddr, PME);
3593                 reg = superio_inb(sioaddr, IT87_SPECIAL_CFG_REG);
3594                 sio_data->ec_special_config = reg;
3595                 sio_data->smbus_bitmap = reg & config->smbus_bitmap;
3596         }
3597
3598 exit:
3599         superio_exit(sioaddr, doexit);
3600         return err;
3601 }
3602
3603 static void it87_init_regs(struct platform_device *pdev)
3604 {
3605         struct it87_data *data = platform_get_drvdata(pdev);
3606
3607         /* Initialize chip specific register pointers */
3608         switch (data->type) {
3609         case it8628:
3610         case it8686:
3611                 data->REG_FAN = IT87_REG_FAN;
3612                 data->REG_FANX = IT87_REG_FANX;
3613                 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3614                 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3615                 data->REG_PWM = IT87_REG_PWM;
3616                 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET_8686;
3617                 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW_8686;
3618                 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH_8686;
3619                 break;
3620         case it8625:
3621         case it8655:
3622         case it8665:
3623                 data->REG_FAN = IT87_REG_FAN_8665;
3624                 data->REG_FANX = IT87_REG_FANX_8665;
3625                 data->REG_FAN_MIN = IT87_REG_FAN_MIN_8665;
3626                 data->REG_FANX_MIN = IT87_REG_FANX_MIN_8665;
3627                 data->REG_PWM = IT87_REG_PWM_8665;
3628                 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
3629                 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
3630                 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
3631                 break;
3632         case it8622:
3633                 data->REG_FAN = IT87_REG_FAN;
3634                 data->REG_FANX = IT87_REG_FANX;
3635                 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3636                 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3637                 data->REG_PWM = IT87_REG_PWM_8665;
3638                 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
3639                 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
3640                 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
3641                 break;
3642         case it8613:
3643                 data->REG_FAN = IT87_REG_FAN;
3644                 data->REG_FANX = IT87_REG_FANX;
3645                 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3646                 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3647                 data->REG_PWM = IT87_REG_PWM_8665;
3648                 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
3649                 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
3650                 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
3651                 break;
3652         default:
3653                 data->REG_FAN = IT87_REG_FAN;
3654                 data->REG_FANX = IT87_REG_FANX;
3655                 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3656                 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3657                 data->REG_PWM = IT87_REG_PWM;
3658                 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
3659                 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
3660                 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
3661                 break;
3662         }
3663
3664         if (data->mmio) {
3665                 data->read = it87_mmio_read;
3666                 data->write = it87_mmio_write;
3667         } else if (has_bank_sel(data)) {
3668                 data->read = it87_io_read;
3669                 data->write = it87_io_write;
3670         } else {
3671                 data->read = _it87_io_read;
3672                 data->write = _it87_io_write;
3673         }
3674 }
3675
3676 /* Called when we have found a new IT87. */
3677 static void it87_init_device(struct platform_device *pdev)
3678 {
3679         struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
3680         struct it87_data *data = platform_get_drvdata(pdev);
3681         int tmp, i;
3682         u8 mask;
3683
3684         if (has_new_tempmap(data)) {
3685                 data->pwm_temp_map_shift = 3;
3686                 data->pwm_temp_map_mask = 0x07;
3687         } else {
3688                 data->pwm_temp_map_shift = 0;
3689                 data->pwm_temp_map_mask = 0x03;
3690         }
3691
3692         /*
3693          * For each PWM channel:
3694          * - If it is in automatic mode, setting to manual mode should set
3695          *   the fan to full speed by default.
3696          * - If it is in manual mode, we need a mapping to temperature
3697          *   channels to use when later setting to automatic mode later.
3698          *   Map to the first sensor by default (we are clueless.)
3699          * In both cases, the value can (and should) be changed by the user
3700          * prior to switching to a different mode.
3701          * Note that this is no longer needed for the IT8721F and later, as
3702          * these have separate registers for the temperature mapping and the
3703          * manual duty cycle.
3704          */
3705         for (i = 0; i < NUM_AUTO_PWM; i++) {
3706                 data->pwm_temp_map[i] = 0;
3707                 data->pwm_duty[i] = 0x7f;       /* Full speed */
3708                 data->auto_pwm[i][3] = 0x7f;    /* Full speed, hard-coded */
3709         }
3710
3711         /*
3712          * Some chips seem to have default value 0xff for all limit
3713          * registers. For low voltage limits it makes no sense and triggers
3714          * alarms, so change to 0 instead. For high temperature limits, it
3715          * means -1 degree C, which surprisingly doesn't trigger an alarm,
3716          * but is still confusing, so change to 127 degrees C.
3717          */
3718         for (i = 0; i < NUM_VIN_LIMIT; i++) {
3719                 tmp = data->read(data, IT87_REG_VIN_MIN(i));
3720                 if (tmp == 0xff)
3721                         data->write(data, IT87_REG_VIN_MIN(i), 0);
3722         }
3723         for (i = 0; i < data->num_temp_limit; i++) {
3724                 tmp = data->read(data, data->REG_TEMP_HIGH[i]);
3725                 if (tmp == 0xff)
3726                         data->write(data, data->REG_TEMP_HIGH[i], 127);
3727         }
3728
3729         /*
3730          * Temperature channels are not forcibly enabled, as they can be
3731          * set to two different sensor types and we can't guess which one
3732          * is correct for a given system. These channels can be enabled at
3733          * run-time through the temp{1-3}_type sysfs accessors if needed.
3734          */
3735
3736         /* Check if voltage monitors are reset manually or by some reason */
3737         tmp = data->read(data, IT87_REG_VIN_ENABLE);
3738         if ((tmp & 0xff) == 0) {
3739                 /* Enable all voltage monitors */
3740                 data->write(data, IT87_REG_VIN_ENABLE, 0xff);
3741         }
3742
3743         /* Check if tachometers are reset manually or by some reason */
3744         mask = 0x70 & ~(sio_data->skip_fan << 4);
3745         data->fan_main_ctrl = data->read(data, IT87_REG_FAN_MAIN_CTRL);
3746         if ((data->fan_main_ctrl & mask) == 0) {
3747                 /* Enable all fan tachometers */
3748                 data->fan_main_ctrl |= mask;
3749                 data->write(data, IT87_REG_FAN_MAIN_CTRL, data->fan_main_ctrl);
3750         }
3751         data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
3752
3753         tmp = data->read(data, IT87_REG_FAN_16BIT);
3754
3755         /* Set tachometers to 16-bit mode if needed */
3756         if (has_fan16_config(data)) {
3757                 if (~tmp & 0x07 & data->has_fan) {
3758                         dev_dbg(&pdev->dev,
3759                                 "Setting fan1-3 to 16-bit mode\n");
3760                         data->write(data, IT87_REG_FAN_16BIT, tmp | 0x07);
3761                 }
3762         }
3763
3764         /* Check for additional fans */
3765         if (has_four_fans(data) && (tmp & BIT(4)))
3766                 data->has_fan |= BIT(3); /* fan4 enabled */
3767         if (has_five_fans(data) && (tmp & BIT(5)))
3768                 data->has_fan |= BIT(4); /* fan5 enabled */
3769         if (has_six_fans(data)) {
3770                 switch (data->type) {
3771                 case it8620:
3772                 case it8628:
3773                 case it8686:
3774                         if (tmp & BIT(2))
3775                                 data->has_fan |= BIT(5); /* fan6 enabled */
3776                         break;
3777                 case it8625:
3778                 case it8665:
3779                         tmp = data->read(data, IT87_REG_FAN_DIV);
3780                         if (tmp & BIT(3))
3781                                 data->has_fan |= BIT(5); /* fan6 enabled */
3782                         break;
3783                 default:
3784                         break;
3785                 }
3786         }
3787
3788         /* Fan input pins may be used for alternative functions */
3789         data->has_fan &= ~sio_data->skip_fan;
3790
3791         /* Check if pwm6 is enabled */
3792         if (has_six_pwm(data)) {
3793                 switch (data->type) {
3794                 case it8620:
3795                 case it8686:
3796                         tmp = data->read(data, IT87_REG_FAN_DIV);
3797                         if (!(tmp & BIT(3)))
3798                                 sio_data->skip_pwm |= BIT(5);
3799                         break;
3800                 default:
3801                         break;
3802                 }
3803         }
3804
3805         if (has_bank_sel(data)) {
3806                 for (i = 0; i < 3; i++)
3807                         data->temp_src[i] =
3808                                 data->read(data, IT87_REG_TEMP_SRC1[i]);
3809                 data->temp_src[3] = data->read(data, IT87_REG_TEMP_SRC2);
3810         }
3811
3812         /* Start monitoring */
3813         data->write(data, IT87_REG_CONFIG,
3814                     (data->read(data, IT87_REG_CONFIG) & 0x3e) |
3815                                         (update_vbat ? 0x41 : 0x01));
3816 }
3817
3818 /* Return 1 if and only if the PWM interface is safe to use */
3819 static int it87_check_pwm(struct device *dev)
3820 {
3821         struct it87_data *data = dev_get_drvdata(dev);
3822         /*
3823          * Some BIOSes fail to correctly configure the IT87 fans. All fans off
3824          * and polarity set to active low is sign that this is the case so we
3825          * disable pwm control to protect the user.
3826          */
3827         int tmp = data->read(data, IT87_REG_FAN_CTL);
3828
3829         if ((tmp & 0x87) == 0) {
3830                 if (fix_pwm_polarity) {
3831                         /*
3832                          * The user asks us to attempt a chip reconfiguration.
3833                          * This means switching to active high polarity and
3834                          * inverting all fan speed values.
3835                          */
3836                         int i;
3837                         u8 pwm[3];
3838
3839                         for (i = 0; i < ARRAY_SIZE(pwm); i++)
3840                                 pwm[i] = data->read(data,
3841                                                          data->REG_PWM[i]);
3842
3843                         /*
3844                          * If any fan is in automatic pwm mode, the polarity
3845                          * might be correct, as suspicious as it seems, so we
3846                          * better don't change anything (but still disable the
3847                          * PWM interface).
3848                          */
3849                         if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
3850                                 dev_info(dev,
3851                                          "Reconfiguring PWM to active high polarity\n");
3852                                 data->write(data, IT87_REG_FAN_CTL, tmp | 0x87);
3853                                 for (i = 0; i < 3; i++)
3854                                         data->write(data, data->REG_PWM[i],
3855                                                     0x7f & ~pwm[i]);
3856                                 return 1;
3857                         }
3858
3859                         dev_info(dev,
3860                                  "PWM configuration is too broken to be fixed\n");
3861                 }
3862
3863                 dev_info(dev,
3864                          "Detected broken BIOS defaults, disabling PWM interface\n");
3865                 return 0;
3866         } else if (fix_pwm_polarity) {
3867                 dev_info(dev,
3868                          "PWM configuration looks sane, won't touch\n");
3869         }
3870
3871         return 1;
3872 }
3873
3874 static int it87_probe(struct platform_device *pdev)
3875 {
3876         struct it87_data *data;
3877         struct resource *res;
3878         struct device *dev = &pdev->dev;
3879         struct it87_sio_data *sio_data = dev_get_platdata(dev);
3880         int enable_pwm_interface;
3881         struct device *hwmon_dev;
3882         int err;
3883
3884         data = devm_kzalloc(dev, sizeof(struct it87_data), GFP_KERNEL);
3885         if (!data)
3886                 return -ENOMEM;
3887
3888         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3889         if (res) {
3890                 if (!devm_request_region(dev, res->start, IT87_EC_EXTENT,
3891                                          DRVNAME)) {
3892                         dev_err(dev, "Failed to request region %pR\n", res);
3893                         return -EBUSY;
3894                 }
3895         } else {
3896                 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
3897                 data->mmio = devm_ioremap_resource(dev, res);
3898                 if (IS_ERR(data->mmio))
3899                         return PTR_ERR(data->mmio);
3900         }
3901
3902         data->addr = res->start;
3903         data->type = sio_data->type;
3904         data->sioaddr = sio_data->sioaddr;
3905         data->smbus_bitmap = sio_data->smbus_bitmap;
3906         data->ec_special_config = sio_data->ec_special_config;
3907         data->doexit = sio_data->doexit;
3908         data->features = it87_devices[sio_data->type].features;
3909         data->num_temp_limit = it87_devices[sio_data->type].num_temp_limit;
3910         data->num_temp_offset = it87_devices[sio_data->type].num_temp_offset;
3911         data->pwm_num_temp_map = it87_devices[sio_data->type].num_temp_map;
3912         data->peci_mask = it87_devices[sio_data->type].peci_mask;
3913         data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
3914
3915         /*
3916          * IT8705F Datasheet 0.4.1, 3h == Version G.
3917          * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
3918          * These are the first revisions with 16-bit tachometer support.
3919          */
3920         switch (data->type) {
3921         case it87:
3922                 if (sio_data->revision >= 0x03) {
3923                         data->features &= ~FEAT_OLD_AUTOPWM;
3924                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS;
3925                 }
3926                 break;
3927         case it8712:
3928                 if (sio_data->revision >= 0x08) {
3929                         data->features &= ~FEAT_OLD_AUTOPWM;
3930                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS |
3931                                           FEAT_FIVE_FANS;
3932                 }
3933                 break;
3934         default:
3935                 break;
3936         }
3937
3938         platform_set_drvdata(pdev, data);
3939
3940         mutex_init(&data->update_lock);
3941
3942         /* Initialize register pointers */
3943         it87_init_regs(pdev);
3944
3945         err = smbus_disable(data);
3946         if (err)
3947                 return err;
3948
3949         /* Now, we do the remaining detection. */
3950         if ((data->read(data, IT87_REG_CONFIG) & 0x80) ||
3951             data->read(data, IT87_REG_CHIPID) != 0x90) {
3952                 smbus_enable(data);
3953                 return -ENODEV;
3954         }
3955
3956         /* Check PWM configuration */
3957         enable_pwm_interface = it87_check_pwm(dev);
3958
3959         /* Starting with IT8721F, we handle scaling of internal voltages */
3960         if (has_scaling(data)) {
3961                 if (sio_data->internal & BIT(0))
3962                         data->in_scaled |= BIT(3);      /* in3 is AVCC */
3963                 if (sio_data->internal & BIT(1))
3964                         data->in_scaled |= BIT(7);      /* in7 is VSB */
3965                 if (sio_data->internal & BIT(2))
3966                         data->in_scaled |= BIT(8);      /* in8 is Vbat */
3967                 if (sio_data->internal & BIT(3))
3968                         data->in_scaled |= BIT(9);      /* in9 is AVCC */
3969         } else if (sio_data->type == it8781 || sio_data->type == it8782 ||
3970                    sio_data->type == it8783) {
3971                 if (sio_data->internal & BIT(0))
3972                         data->in_scaled |= BIT(3);      /* in3 is VCC5V */
3973                 if (sio_data->internal & BIT(1))
3974                         data->in_scaled |= BIT(7);      /* in7 is VCCH5V */
3975         }
3976
3977         data->has_temp = 0x07;
3978         if (sio_data->skip_temp & BIT(2)) {
3979                 if (sio_data->type == it8782 &&
3980                     !(data->read(data, IT87_REG_TEMP_EXTRA) & 0x80))
3981                         data->has_temp &= ~BIT(2);
3982         }
3983
3984         data->in_internal = sio_data->internal;
3985         data->has_in = 0x3ff & ~sio_data->skip_in;
3986
3987         if (has_six_temp(data)) {
3988                 u8 reg = data->read(data, IT87_REG_TEMP456_ENABLE);
3989
3990                 /* Check for additional temperature sensors */
3991                 if ((reg & 0x03) >= 0x02)
3992                         data->has_temp |= BIT(3);
3993                 if (((reg >> 2) & 0x03) >= 0x02)
3994                         data->has_temp |= BIT(4);
3995                 if (((reg >> 4) & 0x03) >= 0x02)
3996                         data->has_temp |= BIT(5);
3997
3998                 /* Check for additional voltage sensors */
3999                 if ((reg & 0x03) == 0x01)
4000                         data->has_in |= BIT(10);
4001                 if (((reg >> 2) & 0x03) == 0x01)
4002                         data->has_in |= BIT(11);
4003                 if (((reg >> 4) & 0x03) == 0x01)
4004                         data->has_in |= BIT(12);
4005         }
4006
4007         data->has_beep = !!sio_data->beep_pin;
4008
4009         /* Initialize the IT87 chip */
4010         it87_init_device(pdev);
4011
4012         smbus_enable(data);
4013
4014         if (!sio_data->skip_vid) {
4015                 data->has_vid = true;
4016                 data->vrm = vid_which_vrm();
4017                 /* VID reading from Super-I/O config space if available */
4018                 data->vid = sio_data->vid_value;
4019         }
4020
4021         /* Prepare for sysfs hooks */
4022         data->groups[0] = &it87_group;
4023         data->groups[1] = &it87_group_in;
4024         data->groups[2] = &it87_group_temp;
4025         data->groups[3] = &it87_group_fan;
4026
4027         if (enable_pwm_interface) {
4028                 data->has_pwm = BIT(ARRAY_SIZE(IT87_REG_PWM)) - 1;
4029                 data->has_pwm &= ~sio_data->skip_pwm;
4030
4031                 data->groups[4] = &it87_group_pwm;
4032                 if (has_old_autopwm(data) || has_newer_autopwm(data))
4033                         data->groups[5] = &it87_group_auto_pwm;
4034         }
4035
4036         hwmon_dev = devm_hwmon_device_register_with_groups(dev,
4037                                         it87_devices[sio_data->type].name,
4038                                         data, data->groups);
4039         return PTR_ERR_OR_ZERO(hwmon_dev);
4040 }
4041
4042 static struct platform_driver it87_driver = {
4043         .driver = {
4044                 .name   = DRVNAME,
4045         },
4046         .probe  = it87_probe,
4047 };
4048
4049 static int __init it87_device_add(int index, unsigned short sio_address,
4050                                   phys_addr_t mmio_address,
4051                                   const struct it87_sio_data *sio_data)
4052 {
4053         struct platform_device *pdev;
4054         struct resource res = {
4055                 .name   = DRVNAME,
4056         };
4057         int err;
4058
4059         if (mmio_address) {
4060                 res.start = mmio_address;
4061                 res.end = mmio_address + 0x400 - 1;
4062                 res.flags = IORESOURCE_MEM;
4063         } else {
4064                 res.start = sio_address + IT87_EC_OFFSET;
4065                 res.end = sio_address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1;
4066                 res.flags = IORESOURCE_IO;
4067         }
4068
4069         err = acpi_check_resource_conflict(&res);
4070         if (err) {
4071                 if (!ignore_resource_conflict)
4072                         return err;
4073         }
4074
4075         pdev = platform_device_alloc(DRVNAME, sio_address);
4076         if (!pdev)
4077                 return -ENOMEM;
4078
4079         err = platform_device_add_resources(pdev, &res, 1);
4080         if (err) {
4081                 pr_err("Device resource addition failed (%d)\n", err);
4082                 goto exit_device_put;
4083         }
4084
4085         err = platform_device_add_data(pdev, sio_data,
4086                                        sizeof(struct it87_sio_data));
4087         if (err) {
4088                 pr_err("Platform data allocation failed\n");
4089                 goto exit_device_put;
4090         }
4091
4092         err = platform_device_add(pdev);
4093         if (err) {
4094                 pr_err("Device addition failed (%d)\n", err);
4095                 goto exit_device_put;
4096         }
4097
4098         it87_pdev[index] = pdev;
4099         return 0;
4100
4101 exit_device_put:
4102         platform_device_put(pdev);
4103         return err;
4104 }
4105
4106 struct it87_dmi_data {
4107         bool sio2_force_config; /* force sio2 into configuration mode   */
4108         u8 skip_pwm;            /* pwm channels to skip for this board  */
4109 };
4110
4111 /*
4112  * On various Gigabyte AM4 boards (AB350, AX370), the second Super-IO chip
4113  * (IT8792E) needs to be in configuration mode before accessing the first
4114  * due to a bug in IT8792E which otherwise results in LPC bus access errors.
4115  * This needs to be done before accessing the first Super-IO chip since
4116  * the second chip may have been accessed prior to loading this driver.
4117  *
4118  * The problem is also reported to affect IT8795E, which is used on X299 boards
4119  * and has the same chip ID as IT8792E (0x8733). It also appears to affect
4120  * systems with IT8790E, which is used on some Z97X-Gaming boards as well as
4121  * Z87X-OC.
4122  * DMI entries for those systems will be added as they become available and
4123  * as the problem is confirmed to affect those boards.
4124  */
4125 static struct it87_dmi_data gigabyte_sio2_force = {
4126         .sio2_force_config = true,
4127 };
4128
4129 /*
4130  * On the Shuttle SN68PT, FAN_CTL2 is apparently not
4131  * connected to a fan, but to something else. One user
4132  * has reported instant system power-off when changing
4133  * the PWM2 duty cycle, so we disable it.
4134  * I use the board name string as the trigger in case
4135  * the same board is ever used in other systems.
4136  */
4137 static struct it87_dmi_data nvidia_fn68pt = {
4138         .skip_pwm = BIT(1),
4139 };
4140
4141 static const struct dmi_system_id it87_dmi_table[] __initconst = {
4142         {
4143                 .matches = {
4144                         DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."),
4145                         DMI_MATCH(DMI_BOARD_NAME, "AB350"),
4146                 },
4147                 .driver_data = &gigabyte_sio2_force,
4148         },
4149         {
4150                 .matches = {
4151                         DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."),
4152                         DMI_MATCH(DMI_BOARD_NAME, "AX370"),
4153                 },
4154                 .driver_data = &gigabyte_sio2_force,
4155         },
4156         {
4157                 .matches = {
4158                         DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."),
4159                         DMI_MATCH(DMI_BOARD_NAME, "Z97X-Gaming G1"),
4160                 },
4161                 .driver_data = &gigabyte_sio2_force,
4162         },
4163         {
4164                 .matches = {
4165                         DMI_MATCH(DMI_BOARD_VENDOR, "nVIDIA"),
4166                         DMI_MATCH(DMI_BOARD_NAME, "FN68PT"),
4167                 },
4168                 .driver_data = &nvidia_fn68pt,
4169         },
4170         { }
4171 };
4172
4173 static int __init sm_it87_init(void)
4174 {
4175         const struct dmi_system_id *dmi = dmi_first_match(it87_dmi_table);
4176         struct it87_dmi_data *dmi_data = NULL;
4177         int sioaddr[2] = { REG_2E, REG_4E };
4178         struct it87_sio_data sio_data;
4179         unsigned short isa_address;
4180         phys_addr_t mmio_address;
4181         bool found = false;
4182         int i, err;
4183
4184         pr_info("it87 driver version %s\n", IT87_DRIVER_VERSION);
4185
4186         if (dmi)
4187                 dmi_data = dmi->driver_data;
4188
4189         err = platform_driver_register(&it87_driver);
4190         if (err)
4191                 return err;
4192
4193         if (dmi_data && dmi_data->sio2_force_config)
4194                 __superio_enter(REG_4E);
4195
4196         for (i = 0; i < ARRAY_SIZE(sioaddr); i++) {
4197                 memset(&sio_data, 0, sizeof(struct it87_sio_data));
4198                 isa_address = 0;
4199                 mmio_address = 0;
4200                 err = it87_find(sioaddr[i], &isa_address, &mmio_address,
4201                                 &sio_data);
4202                 if (err || isa_address == 0)
4203                         continue;
4204
4205                 if (dmi_data)
4206                         sio_data.skip_pwm |= dmi_data->skip_pwm;
4207                 err = it87_device_add(i, isa_address, mmio_address, &sio_data);
4208                 if (err)
4209                         goto exit_dev_unregister;
4210                 found = true;
4211         }
4212
4213         if (!found) {
4214                 err = -ENODEV;
4215                 goto exit_unregister;
4216         }
4217         return 0;
4218
4219 exit_dev_unregister:
4220         /* NULL check handled by platform_device_unregister */
4221         platform_device_unregister(it87_pdev[0]);
4222 exit_unregister:
4223         platform_driver_unregister(&it87_driver);
4224         return err;
4225 }
4226
4227 static void __exit sm_it87_exit(void)
4228 {
4229         /* NULL check handled by platform_device_unregister */
4230         platform_device_unregister(it87_pdev[1]);
4231         platform_device_unregister(it87_pdev[0]);
4232         platform_driver_unregister(&it87_driver);
4233 }
4234
4235 MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>");
4236 MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
4237 module_param(update_vbat, bool, 0);
4238 MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
4239 module_param(fix_pwm_polarity, bool, 0);
4240 MODULE_PARM_DESC(fix_pwm_polarity,
4241                  "Force PWM polarity to active high (DANGEROUS)");
4242 MODULE_LICENSE("GPL");
4243
4244 module_init(sm_it87_init);
4245 module_exit(sm_it87_exit);