git.sur5r.net Git - groeck-nct6775/blob - nct6775.c

   1 /*
   2  * nct6775 - Driver for the hardware monitoring functionality of
   3  *             Nuvoton NCT677x Super-I/O chips
   4  *
   5  * Copyright (C) 2012  Guenter Roeck <linux@roeck-us.net>
   6  *
   7  * Derived from w83627ehf driver
   8  * Copyright (C) 2005-2012  Jean Delvare <khali@linux-fr.org>
   9  * Copyright (C) 2006  Yuan Mu (Winbond),
  10  *                     Rudolf Marek <r.marek@assembler.cz>
  11  *                     David Hubbard <david.c.hubbard@gmail.com>
  12  *                     Daniel J Blueman <daniel.blueman@gmail.com>
  13  * Copyright (C) 2010  Sheng-Yuan Huang (Nuvoton) (PS00)
  14  *
  15  * Shamelessly ripped from the w83627hf driver
  16  * Copyright (C) 2003  Mark Studebaker
  17  *
  18  * This program is free software; you can redistribute it and/or modify
  19  * it under the terms of the GNU General Public License as published by
  20  * the Free Software Foundation; either version 2 of the License, or
  21  * (at your option) any later version.
  22  *
  23  * This program is distributed in the hope that it will be useful,
  24  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26  * GNU General Public License for more details.
  27  *
  28  * You should have received a copy of the GNU General Public License
  29  * along with this program; if not, write to the Free Software
  30  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  31  *
  32  *
  33  * Supports the following chips:
  34  *
  35  * Chip        #vin    #fan    #pwm    #temp  chip IDs       man ID
  36  * nct6106d     9      3       3       6+3    0xc450 0xc1    0x5ca3
  37  * nct6775f     9      4       3       6+3    0xb470 0xc1    0x5ca3
  38  * nct6776f     9      5       3       6+3    0xc330 0xc1    0x5ca3
  39  * nct6779d    15      5       5       2+6    0xc560 0xc1    0x5ca3
  40  * nct6791d    15      6       6       2+6    0xc800 0xc1    0x5ca3
  41  *
  42  * #temp lists the number of monitored temperature sources (first value) plus
  43  * the number of directly connectable temperature sensors (second value).
  44  */
  45
  46 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  47
  48 #include <linux/module.h>
  49 #include <linux/init.h>
  50 #include <linux/slab.h>
  51 #include <linux/jiffies.h>
  52 #include <linux/platform_device.h>
  53 #include <linux/hwmon.h>
  54 #include <linux/hwmon-sysfs.h>
  55 #include <linux/hwmon-vid.h>
  56 #include <linux/err.h>
  57 #include <linux/mutex.h>
  58 #include <linux/acpi.h>
  59 #include <linux/io.h>
  60 #include "lm75.h"
  61 #include "compat.h"
  62
  63 #define USE_ALTERNATE
  64
  65 enum kinds { nct6106, nct6775, nct6776, nct6779, nct6791 };
  66
  67 /* used to set data->name = nct6775_device_names[data->sio_kind] */
  68 static const char * const nct6775_device_names[] = {
  69         "nct6106",
  70         "nct6775",
  71         "nct6776",
  72         "nct6779",
  73         "nct6791",
  74 };
  75
  76 static unsigned short force_id;
  77 module_param(force_id, ushort, 0);
  78 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  79
  80 static unsigned short fan_debounce;
  81 module_param(fan_debounce, ushort, 0);
  82 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
  83
  84 #define DRVNAME "nct6775"
  85
  86 /*
  87  * Super-I/O constants and functions
  88  */
  89
  90 #define NCT6775_LD_ACPI         0x0a
  91 #define NCT6775_LD_HWM          0x0b
  92 #define NCT6775_LD_VID          0x0d
  93
  94 #define SIO_REG_LDSEL           0x07    /* Logical device select */
  95 #define SIO_REG_DEVID           0x20    /* Device ID (2 bytes) */
  96 #define SIO_REG_ENABLE          0x30    /* Logical device enable */
  97 #define SIO_REG_ADDR            0x60    /* Logical device address (2 bytes) */
  98
  99 #define SIO_NCT6106_ID          0xc450
 100 #define SIO_NCT6775_ID          0xb470
 101 #define SIO_NCT6776_ID          0xc330
 102 #define SIO_NCT6779_ID          0xc560
 103 #define SIO_NCT6791_ID          0xc800
 104 #define SIO_ID_MASK             0xFFF0
 105
 106 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
 107
 108 static inline void
 109 superio_outb(int ioreg, int reg, int val)
 110 {
 111         outb(reg, ioreg);
 112         outb(val, ioreg + 1);
 113 }
 114
 115 static inline int
 116 superio_inb(int ioreg, int reg)
 117 {
 118         outb(reg, ioreg);
 119         return inb(ioreg + 1);
 120 }
 121
 122 static inline void
 123 superio_select(int ioreg, int ld)
 124 {
 125         outb(SIO_REG_LDSEL, ioreg);
 126         outb(ld, ioreg + 1);
 127 }
 128
 129 static inline int
 130 superio_enter(int ioreg)
 131 {
 132         /*
 133          * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
 134          */
 135         if (!request_muxed_region(ioreg, 2, DRVNAME))
 136                 return -EBUSY;
 137
 138         outb(0x87, ioreg);
 139         outb(0x87, ioreg);
 140
 141         return 0;
 142 }
 143
 144 static inline void
 145 superio_exit(int ioreg)
 146 {
 147         outb(0xaa, ioreg);
 148         outb(0x02, ioreg);
 149         outb(0x02, ioreg + 1);
 150         release_region(ioreg, 2);
 151 }
 152
 153 /*
 154  * ISA constants
 155  */
 156
 157 #define IOREGION_ALIGNMENT      (~7)
 158 #define IOREGION_OFFSET         5
 159 #define IOREGION_LENGTH         2
 160 #define ADDR_REG_OFFSET         0
 161 #define DATA_REG_OFFSET         1
 162
 163 #define NCT6775_REG_BANK        0x4E
 164 #define NCT6775_REG_CONFIG      0x40
 165
 166 /*
 167  * Not currently used:
 168  * REG_MAN_ID has the value 0x5ca3 for all supported chips.
 169  * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
 170  * REG_MAN_ID is at port 0x4f
 171  * REG_CHIP_ID is at port 0x58
 172  */
 173
 174 #define NUM_TEMP        10      /* Max number of temp attribute sets w/ limits*/
 175 #define NUM_TEMP_FIXED  6       /* Max number of fixed temp attribute sets */
 176
 177 #define NUM_REG_ALARM   7       /* Max number of alarm registers */
 178 #define NUM_REG_BEEP    5       /* Max number of beep registers */
 179
 180 #define NUM_FAN         6
 181
 182 /* Common and NCT6775 specific data */
 183
 184 /* Voltage min/max registers for nr=7..14 are in bank 5 */
 185
 186 static const u16 NCT6775_REG_IN_MAX[] = {
 187         0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
 188         0x55c, 0x55e, 0x560, 0x562 };
 189 static const u16 NCT6775_REG_IN_MIN[] = {
 190         0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
 191         0x55d, 0x55f, 0x561, 0x563 };
 192 static const u16 NCT6775_REG_IN[] = {
 193         0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
 194 };
 195
 196 #define NCT6775_REG_VBAT                0x5D
 197 #define NCT6775_REG_DIODE               0x5E
 198 #define NCT6775_DIODE_MASK              0x02
 199
 200 #define NCT6775_REG_FANDIV1             0x506
 201 #define NCT6775_REG_FANDIV2             0x507
 202
 203 #define NCT6775_REG_CR_FAN_DEBOUNCE     0xf0
 204
 205 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
 206
 207 /* 0..15 voltages, 16..23 fans, 24..29 temperatures, 30..31 intrusion */
 208
 209 static const s8 NCT6775_ALARM_BITS[] = {
 210         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 211         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 212         -1,                             /* unused */
 213         6, 7, 11, -1, -1,               /* fan1..fan5 */
 214         -1, -1, -1,                     /* unused */
 215         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 216         12, -1 };                       /* intrusion0, intrusion1 */
 217
 218 #define FAN_ALARM_BASE          16
 219 #define TEMP_ALARM_BASE         24
 220 #define INTRUSION_ALARM_BASE    30
 221
 222 static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e };
 223
 224 /*
 225  * 0..14 voltages, 15 global beep enable, 16..23 fans, 24..29 temperatures,
 226  * 30..31 intrusion
 227  */
 228 static const s8 NCT6775_BEEP_BITS[] = {
 229         0, 1, 2, 3, 8, 9, 10, 16,       /* in0.. in7 */
 230         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 231         21,                             /* global beep enable */
 232         6, 7, 11, 28, -1,               /* fan1..fan5 */
 233         -1, -1, -1,                     /* unused */
 234         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 235         12, -1 };                       /* intrusion0, intrusion1 */
 236
 237 #define BEEP_ENABLE_BASE                15
 238
 239 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
 240 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
 241
 242 /* DC or PWM output fan configuration */
 243 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
 244 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
 245
 246 /* Advanced Fan control, some values are common for all fans */
 247
 248 static const u16 NCT6775_REG_TARGET[] = {
 249         0x101, 0x201, 0x301, 0x801, 0x901, 0xa01 };
 250 static const u16 NCT6775_REG_FAN_MODE[] = {
 251         0x102, 0x202, 0x302, 0x802, 0x902, 0xa02 };
 252 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
 253         0x103, 0x203, 0x303, 0x803, 0x903, 0xa03 };
 254 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
 255         0x104, 0x204, 0x304, 0x804, 0x904, 0xa04 };
 256 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
 257         0x105, 0x205, 0x305, 0x805, 0x905, 0xa05 };
 258 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = {
 259         0x106, 0x206, 0x306, 0x806, 0x906, 0xa06 };
 260 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
 261 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
 262
 263 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
 264         0x107, 0x207, 0x307, 0x807, 0x907, 0xa07 };
 265 static const u16 NCT6775_REG_PWM[] = {
 266         0x109, 0x209, 0x309, 0x809, 0x909, 0xa09 };
 267 static const u16 NCT6775_REG_PWM_READ[] = {
 268         0x01, 0x03, 0x11, 0x13, 0x15, 0xa09 };
 269
 270 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
 271 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
 272 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
 273 static const u16 NCT6775_FAN_PULSE_SHIFT[] = { 0, 0, 0, 0, 0, 0 };
 274
 275 static const u16 NCT6775_REG_TEMP[] = {
 276         0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
 277
 278 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 279         0, 0x152, 0x252, 0x628, 0x629, 0x62A };
 280 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 281         0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
 282 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 283         0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
 284
 285 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 286         0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
 287
 288 static const u16 NCT6775_REG_TEMP_SEL[] = {
 289         0x100, 0x200, 0x300, 0x800, 0x900, 0xa00 };
 290
 291 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
 292         0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 };
 293 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
 294         0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a };
 295 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
 296         0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b };
 297 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
 298         0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c };
 299 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
 300         0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d };
 301
 302 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
 303
 304 static const u16 NCT6775_REG_AUTO_TEMP[] = {
 305         0x121, 0x221, 0x321, 0x821, 0x921, 0xa21 };
 306 static const u16 NCT6775_REG_AUTO_PWM[] = {
 307         0x127, 0x227, 0x327, 0x827, 0x927, 0xa27 };
 308
 309 #define NCT6775_AUTO_TEMP(data, nr, p)  ((data)->REG_AUTO_TEMP[nr] + (p))
 310 #define NCT6775_AUTO_PWM(data, nr, p)   ((data)->REG_AUTO_PWM[nr] + (p))
 311
 312 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
 313
 314 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
 315         0x135, 0x235, 0x335, 0x835, 0x935, 0xa35 };
 316 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
 317         0x138, 0x238, 0x338, 0x838, 0x938, 0xa38 };
 318
 319 static const char *const nct6775_temp_label[] = {
 320         "",
 321         "SYSTIN",
 322         "CPUTIN",
 323         "AUXTIN",
 324         "AMD SB-TSI",
 325         "PECI Agent 0",
 326         "PECI Agent 1",
 327         "PECI Agent 2",
 328         "PECI Agent 3",
 329         "PECI Agent 4",
 330         "PECI Agent 5",
 331         "PECI Agent 6",
 332         "PECI Agent 7",
 333         "PCH_CHIP_CPU_MAX_TEMP",
 334         "PCH_CHIP_TEMP",
 335         "PCH_CPU_TEMP",
 336         "PCH_MCH_TEMP",
 337         "PCH_DIM0_TEMP",
 338         "PCH_DIM1_TEMP",
 339         "PCH_DIM2_TEMP",
 340         "PCH_DIM3_TEMP"
 341 };
 342
 343 static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
 344         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
 345
 346 static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
 347         = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
 348             0xa07 };
 349
 350 /* NCT6776 specific data */
 351
 352 static const s8 NCT6776_ALARM_BITS[] = {
 353         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 354         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 355         -1,                             /* unused */
 356         6, 7, 11, 10, 23,               /* fan1..fan5 */
 357         -1, -1, -1,                     /* unused */
 358         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 359         12, 9 };                        /* intrusion0, intrusion1 */
 360
 361 static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5 };
 362
 363 static const s8 NCT6776_BEEP_BITS[] = {
 364         0, 1, 2, 3, 4, 5, 6, 7,         /* in0.. in7 */
 365         8, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 366         24,                             /* global beep enable */
 367         25, 26, 27, 28, 29,             /* fan1..fan5 */
 368         -1, -1, -1,                     /* unused */
 369         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 370         30, 31 };                       /* intrusion0, intrusion1 */
 371
 372 static const u16 NCT6776_REG_TOLERANCE_H[] = {
 373         0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c };
 374
 375 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0 };
 376 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0 };
 377
 378 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
 379 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
 380
 381 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
 382         0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e };
 383
 384 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 385         0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
 386
 387 static const char *const nct6776_temp_label[] = {
 388         "",
 389         "SYSTIN",
 390         "CPUTIN",
 391         "AUXTIN",
 392         "SMBUSMASTER 0",
 393         "SMBUSMASTER 1",
 394         "SMBUSMASTER 2",
 395         "SMBUSMASTER 3",
 396         "SMBUSMASTER 4",
 397         "SMBUSMASTER 5",
 398         "SMBUSMASTER 6",
 399         "SMBUSMASTER 7",
 400         "PECI Agent 0",
 401         "PECI Agent 1",
 402         "PCH_CHIP_CPU_MAX_TEMP",
 403         "PCH_CHIP_TEMP",
 404         "PCH_CPU_TEMP",
 405         "PCH_MCH_TEMP",
 406         "PCH_DIM0_TEMP",
 407         "PCH_DIM1_TEMP",
 408         "PCH_DIM2_TEMP",
 409         "PCH_DIM3_TEMP",
 410         "BYTE_TEMP"
 411 };
 412
 413 static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
 414         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
 415
 416 static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
 417         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
 418
 419 /* NCT6779 specific data */
 420
 421 static const u16 NCT6779_REG_IN[] = {
 422         0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
 423         0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
 424
 425 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
 426         0x459, 0x45A, 0x45B, 0x568 };
 427
 428 static const s8 NCT6779_ALARM_BITS[] = {
 429         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 430         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 431         -1,                             /* unused */
 432         6, 7, 11, 10, 23,               /* fan1..fan5 */
 433         -1, -1, -1,                     /* unused */
 434         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 435         12, 9 };                        /* intrusion0, intrusion1 */
 436
 437 static const s8 NCT6779_BEEP_BITS[] = {
 438         0, 1, 2, 3, 4, 5, 6, 7,         /* in0.. in7 */
 439         8, 9, 10, 11, 12, 13, 14,       /* in8..in14 */
 440         24,                             /* global beep enable */
 441         25, 26, 27, 28, 29,             /* fan1..fan5 */
 442         -1, -1, -1,                     /* unused */
 443         16, 17, -1, -1, -1, -1,         /* temp1..temp6 */
 444         30, 31 };                       /* intrusion0, intrusion1 */
 445
 446 static const u16 NCT6779_REG_FAN[] = {
 447         0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8, 0x4ba };
 448 static const u16 NCT6779_REG_FAN_PULSES[] = {
 449         0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
 450
 451 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
 452         0x136, 0x236, 0x336, 0x836, 0x936, 0xa36 };
 453 #define NCT6779_CRITICAL_PWM_ENABLE_MASK        0x01
 454 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
 455         0x137, 0x237, 0x337, 0x837, 0x937, 0xa37 };
 456
 457 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
 458 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 459         0x18, 0x152 };
 460 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 461         0x3a, 0x153 };
 462 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 463         0x39, 0x155 };
 464
 465 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
 466         0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
 467
 468 static const char *const nct6779_temp_label[] = {
 469         "",
 470         "SYSTIN",
 471         "CPUTIN",
 472         "AUXTIN0",
 473         "AUXTIN1",
 474         "AUXTIN2",
 475         "AUXTIN3",
 476         "",
 477         "SMBUSMASTER 0",
 478         "SMBUSMASTER 1",
 479         "SMBUSMASTER 2",
 480         "SMBUSMASTER 3",
 481         "SMBUSMASTER 4",
 482         "SMBUSMASTER 5",
 483         "SMBUSMASTER 6",
 484         "SMBUSMASTER 7",
 485         "PECI Agent 0",
 486         "PECI Agent 1",
 487         "PCH_CHIP_CPU_MAX_TEMP",
 488         "PCH_CHIP_TEMP",
 489         "PCH_CPU_TEMP",
 490         "PCH_MCH_TEMP",
 491         "PCH_DIM0_TEMP",
 492         "PCH_DIM1_TEMP",
 493         "PCH_DIM2_TEMP",
 494         "PCH_DIM3_TEMP",
 495         "BYTE_TEMP"
 496 };
 497
 498 static const u16 NCT6779_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6779_temp_label) - 1]
 499         = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
 500             0, 0, 0, 0, 0, 0, 0, 0,
 501             0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
 502             0x408, 0 };
 503
 504 static const u16 NCT6779_REG_TEMP_CRIT[ARRAY_SIZE(nct6779_temp_label) - 1]
 505         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
 506
 507 /* NCT6791 specific data */
 508
 509 #define NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE     0x28
 510
 511 static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = {
 512         0x459, 0x45A, 0x45B, 0x568, 0x45D };
 513
 514 static const s8 NCT6791_ALARM_BITS[] = {
 515         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 516         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 517         -1,                             /* unused */
 518         6, 7, 11, 10, 23, 33,           /* fan1..fan6 */
 519         -1, -1,                         /* unused */
 520         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 521         12, 9 };                        /* intrusion0, intrusion1 */
 522
 523
 524 /* NCT6102D/NCT6106D specific data */
 525
 526 #define NCT6106_REG_VBAT        0x318
 527 #define NCT6106_REG_DIODE       0x319
 528 #define NCT6106_DIODE_MASK      0x01
 529
 530 static const u16 NCT6106_REG_IN_MAX[] = {
 531         0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
 532 static const u16 NCT6106_REG_IN_MIN[] = {
 533         0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
 534 static const u16 NCT6106_REG_IN[] = {
 535         0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
 536
 537 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
 538 static const u16 NCT6106_REG_TEMP_HYST[] = {
 539         0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
 540 static const u16 NCT6106_REG_TEMP_OVER[] = {
 541         0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
 542 static const u16 NCT6106_REG_TEMP_CRIT_L[] = {
 543         0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
 544 static const u16 NCT6106_REG_TEMP_CRIT_H[] = {
 545         0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
 546 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
 547 static const u16 NCT6106_REG_TEMP_CONFIG[] = {
 548         0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
 549
 550 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
 551 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
 552 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0, 0 };
 553 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4, 0, 0 };
 554
 555 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
 556 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
 557 static const u16 NCT6106_REG_PWM[] = { 0x119, 0x129, 0x139 };
 558 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c };
 559 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
 560 static const u16 NCT6106_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130 };
 561 static const u16 NCT6106_REG_TEMP_SOURCE[] = {
 562         0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
 563
 564 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
 565 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = {
 566         0x11b, 0x12b, 0x13b };
 567
 568 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
 569 #define NCT6106_CRITICAL_PWM_ENABLE_MASK        0x10
 570 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
 571
 572 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
 573 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
 574 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
 575 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
 576 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
 577 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
 578
 579 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
 580
 581 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
 582 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
 583 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
 584 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x17c };
 585 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
 586 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
 587
 588 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
 589 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
 590
 591 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = {
 592         0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
 593
 594 static const s8 NCT6106_ALARM_BITS[] = {
 595         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 596         9, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 597         -1,                             /* unused */
 598         32, 33, 34, -1, -1,             /* fan1..fan5 */
 599         -1, -1, -1,                     /* unused */
 600         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 601         48, -1                          /* intrusion0, intrusion1 */
 602 };
 603
 604 static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = {
 605         0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 };
 606
 607 static const s8 NCT6106_BEEP_BITS[] = {
 608         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 609         9, 10, 11, 12, -1, -1, -1,      /* in8..in14 */
 610         32,                             /* global beep enable */
 611         24, 25, 26, 27, 28,             /* fan1..fan5 */
 612         -1, -1, -1,                     /* unused */
 613         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 614         34, -1                          /* intrusion0, intrusion1 */
 615 };
 616
 617 static const u16 NCT6106_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
 618         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x51, 0x52, 0x54 };
 619
 620 static const u16 NCT6106_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
 621         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x204, 0x205 };
 622
 623 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
 624 {
 625         if (mode == 0 && pwm == 255)
 626                 return off;
 627         return mode + 1;
 628 }
 629
 630 static int pwm_enable_to_reg(enum pwm_enable mode)
 631 {
 632         if (mode == off)
 633                 return 0;
 634         return mode - 1;
 635 }
 636
 637 /*
 638  * Conversions
 639  */
 640
 641 /* 1 is DC mode, output in ms */
 642 static unsigned int step_time_from_reg(u8 reg, u8 mode)
 643 {
 644         return mode ? 400 * reg : 100 * reg;
 645 }
 646
 647 static u8 step_time_to_reg(unsigned int msec, u8 mode)
 648 {
 649         return clamp_val((mode ? (msec + 200) / 400 :
 650                                         (msec + 50) / 100), 1, 255);
 651 }
 652
 653 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
 654 {
 655         if (reg == 0 || reg == 255)
 656                 return 0;
 657         return 1350000U / (reg << divreg);
 658 }
 659
 660 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
 661 {
 662         if ((reg & 0xff1f) == 0xff1f)
 663                 return 0;
 664
 665         reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
 666
 667         if (reg == 0)
 668                 return 0;
 669
 670         return 1350000U / reg;
 671 }
 672
 673 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
 674 {
 675         if (reg == 0 || reg == 0xffff)
 676                 return 0;
 677
 678         /*
 679          * Even though the registers are 16 bit wide, the fan divisor
 680          * still applies.
 681          */
 682         return 1350000U / (reg << divreg);
 683 }
 684
 685 static u16 fan_to_reg(u32 fan, unsigned int divreg)
 686 {
 687         if (!fan)
 688                 return 0;
 689
 690         return (1350000U / fan) >> divreg;
 691 }
 692
 693 static inline unsigned int
 694 div_from_reg(u8 reg)
 695 {
 696         return 1 << reg;
 697 }
 698
 699 /*
 700  * Some of the voltage inputs have internal scaling, the tables below
 701  * contain 8 (the ADC LSB in mV) * scaling factor * 100
 702  */
 703 static const u16 scale_in[15] = {
 704         800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
 705         800, 800
 706 };
 707
 708 static inline long in_from_reg(u8 reg, u8 nr)
 709 {
 710         return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
 711 }
 712
 713 static inline u8 in_to_reg(u32 val, u8 nr)
 714 {
 715         return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
 716 }
 717
 718 /*
 719  * Data structures and manipulation thereof
 720  */
 721
 722 struct nct6775_data {
 723         int addr;       /* IO base of hw monitor block */
 724         int sioreg;     /* SIO register address */
 725         enum kinds kind;
 726         const char *name;
 727
 728         struct device *hwmon_dev;
 729         struct attribute_group *group_in;
 730         struct attribute_group *group_fan;
 731         struct attribute_group *group_temp;
 732         struct attribute_group *group_pwm;
 733
 734         u16 reg_temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 735                                     * 3=temp_crit, 4=temp_lcrit
 736                                     */
 737         u8 temp_src[NUM_TEMP];
 738         u16 reg_temp_config[NUM_TEMP];
 739         const char * const *temp_label;
 740         int temp_label_num;
 741
 742         u16 REG_CONFIG;
 743         u16 REG_VBAT;
 744         u16 REG_DIODE;
 745         u8 DIODE_MASK;
 746
 747         const s8 *ALARM_BITS;
 748         const s8 *BEEP_BITS;
 749
 750         const u16 *REG_VIN;
 751         const u16 *REG_IN_MINMAX[2];
 752
 753         const u16 *REG_TARGET;
 754         const u16 *REG_FAN;
 755         const u16 *REG_FAN_MODE;
 756         const u16 *REG_FAN_MIN;
 757         const u16 *REG_FAN_PULSES;
 758         const u16 *FAN_PULSE_SHIFT;
 759         const u16 *REG_FAN_TIME[3];
 760
 761         const u16 *REG_TOLERANCE_H;
 762
 763         const u8 *REG_PWM_MODE;
 764         const u8 *PWM_MODE_MASK;
 765
 766         const u16 *REG_PWM[7];  /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 767                                  * [3]=pwm_max, [4]=pwm_step,
 768                                  * [5]=weight_duty_step, [6]=weight_duty_base
 769                                  */
 770         const u16 *REG_PWM_READ;
 771
 772         const u16 *REG_CRITICAL_PWM_ENABLE;
 773         u8 CRITICAL_PWM_ENABLE_MASK;
 774         const u16 *REG_CRITICAL_PWM;
 775
 776         const u16 *REG_AUTO_TEMP;
 777         const u16 *REG_AUTO_PWM;
 778
 779         const u16 *REG_CRITICAL_TEMP;
 780         const u16 *REG_CRITICAL_TEMP_TOLERANCE;
 781
 782         const u16 *REG_TEMP_SOURCE;     /* temp register sources */
 783         const u16 *REG_TEMP_SEL;
 784         const u16 *REG_WEIGHT_TEMP_SEL;
 785         const u16 *REG_WEIGHT_TEMP[3];  /* 0=base, 1=tolerance, 2=step */
 786
 787         const u16 *REG_TEMP_OFFSET;
 788
 789         const u16 *REG_ALARM;
 790         const u16 *REG_BEEP;
 791
 792         unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
 793         unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
 794
 795         struct mutex update_lock;
 796         bool valid;             /* true if following fields are valid */
 797         unsigned long last_updated;     /* In jiffies */
 798
 799         /* Register values */
 800         u8 bank;                /* current register bank */
 801         u8 in_num;              /* number of in inputs we have */
 802         u8 in[15][3];           /* [0]=in, [1]=in_max, [2]=in_min */
 803         unsigned int rpm[NUM_FAN];
 804         u16 fan_min[NUM_FAN];
 805         u8 fan_pulses[NUM_FAN];
 806         u8 fan_div[NUM_FAN];
 807         u8 has_pwm;
 808         u8 has_fan;             /* some fan inputs can be disabled */
 809         u8 has_fan_min;         /* some fans don't have min register */
 810         bool has_fan_div;
 811
 812         u8 num_temp_alarms;     /* 2, 3, or 6 */
 813         u8 num_temp_beeps;      /* 2, 3, or 6 */
 814         u8 temp_fixed_num;      /* 3 or 6 */
 815         u8 temp_type[NUM_TEMP_FIXED];
 816         s8 temp_offset[NUM_TEMP_FIXED];
 817         s16 temp[4][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 818                                 * 3=temp_crit */
 819         u64 alarms;
 820         u64 beeps;
 821
 822         u8 pwm_num;     /* number of pwm */
 823         u8 pwm_mode[NUM_FAN];   /* 1->DC variable voltage,
 824                                  * 0->PWM variable duty cycle
 825                                  */
 826         enum pwm_enable pwm_enable[NUM_FAN];
 827                         /* 0->off
 828                          * 1->manual
 829                          * 2->thermal cruise mode (also called SmartFan I)
 830                          * 3->fan speed cruise mode
 831                          * 4->SmartFan III
 832                          * 5->enhanced variable thermal cruise (SmartFan IV)
 833                          */
 834         u8 pwm[7][NUM_FAN];     /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 835                                  * [3]=pwm_max, [4]=pwm_step,
 836                                  * [5]=weight_duty_step, [6]=weight_duty_base
 837                                  */
 838
 839         u8 target_temp[NUM_FAN];
 840         u8 target_temp_mask;
 841         u32 target_speed[NUM_FAN];
 842         u32 target_speed_tolerance[NUM_FAN];
 843         u8 speed_tolerance_limit;
 844
 845         u8 temp_tolerance[2][NUM_FAN];
 846         u8 tolerance_mask;
 847
 848         u8 fan_time[3][NUM_FAN]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
 849
 850         /* Automatic fan speed control registers */
 851         int auto_pwm_num;
 852         u8 auto_pwm[NUM_FAN][7];
 853         u8 auto_temp[NUM_FAN][7];
 854         u8 pwm_temp_sel[NUM_FAN];
 855         u8 pwm_weight_temp_sel[NUM_FAN];
 856         u8 weight_temp[3][NUM_FAN];     /* 0->temp_step, 1->temp_step_tol,
 857                                          * 2->temp_base
 858                                          */
 859
 860         u8 vid;
 861         u8 vrm;
 862
 863         bool have_vid;
 864
 865         u16 have_temp;
 866         u16 have_temp_fixed;
 867         u16 have_in;
 868 #ifdef CONFIG_PM
 869         /* Remember extra register values over suspend/resume */
 870         u8 vbat;
 871         u8 fandiv1;
 872         u8 fandiv2;
 873 #endif
 874 };
 875
 876 struct nct6775_sio_data {
 877         int sioreg;
 878         enum kinds kind;
 879 };
 880
 881 struct sensor_device_template {
 882         struct device_attribute dev_attr;
 883         union {
 884                 struct {
 885                         u8 nr;
 886                         u8 index;
 887                 } s;
 888                 int index;
 889         } u;
 890         bool s2;        /* true if both index and nr are used */
 891 };
 892
 893 struct sensor_device_attr_u {
 894         union {
 895                 struct sensor_device_attribute a1;
 896                 struct sensor_device_attribute_2 a2;
 897         } u;
 898         char name[32];
 899 };
 900
 901 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) {      \
 902         .attr = {.name = _template, .mode = _mode },            \
 903         .show   = _show,                                        \
 904         .store  = _store,                                       \
 905 }
 906
 907 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \
 908         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
 909           .u.index = _index,                                            \
 910           .s2 = false }
 911
 912 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,       \
 913                                  _nr, _index)                           \
 914         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
 915           .u.s.index = _index,                                          \
 916           .u.s.nr = _nr,                                                \
 917           .s2 = true }
 918
 919 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
 920 static struct sensor_device_template sensor_dev_template_##_name        \
 921         = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store,       \
 922                                  _index)
 923
 924 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store,       \
 925                           _nr, _index)                                  \
 926 static struct sensor_device_template sensor_dev_template_##_name        \
 927         = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,     \
 928                                  _nr, _index)
 929
 930 struct sensor_template_group {
 931         struct sensor_device_template **templates;
 932         umode_t (*is_visible)(struct kobject *, struct attribute *, int);
 933         int base;
 934 };
 935
 936 static struct attribute_group *
 937 nct6775_create_attr_group(struct device *dev, struct sensor_template_group *tg,
 938                           int repeat)
 939 {
 940         struct attribute_group *group;
 941         struct sensor_device_attr_u *su;
 942         struct sensor_device_attribute *a;
 943         struct sensor_device_attribute_2 *a2;
 944         struct attribute **attrs;
 945         struct sensor_device_template **t;
 946         int err, i, j, count;
 947
 948         if (repeat <= 0)
 949                 return ERR_PTR(-EINVAL);
 950
 951         t = tg->templates;
 952         for (count = 0; *t; t++, count++)
 953                 ;
 954
 955         if (count == 0)
 956                 return ERR_PTR(-EINVAL);
 957
 958         group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
 959         if (group == NULL)
 960                 return ERR_PTR(-ENOMEM);
 961
 962         attrs = devm_kzalloc(dev, sizeof(*attrs) * (repeat * count + 1),
 963                              GFP_KERNEL);
 964         if (attrs == NULL)
 965                 return ERR_PTR(-ENOMEM);
 966
 967         su = devm_kzalloc(dev, sizeof(*su) * repeat * count,
 968                                GFP_KERNEL);
 969         if (su == NULL)
 970                 return ERR_PTR(-ENOMEM);
 971
 972         group->attrs = attrs;
 973         group->is_visible = tg->is_visible;
 974
 975         for (i = 0; i < repeat; i++) {
 976                 t = tg->templates;
 977                 for (j = 0; *t != NULL; j++) {
 978                         snprintf(su->name, sizeof(su->name),
 979                                  (*t)->dev_attr.attr.name, tg->base + i);
 980                         if ((*t)->s2) {
 981                                 a2 = &su->u.a2;
 982                                 a2->dev_attr.attr.name = su->name;
 983                                 a2->nr = (*t)->u.s.nr + i;
 984                                 a2->index = (*t)->u.s.index;
 985                                 a2->dev_attr.attr.mode =
 986                                   (*t)->dev_attr.attr.mode;
 987                                 a2->dev_attr.show = (*t)->dev_attr.show;
 988                                 a2->dev_attr.store = (*t)->dev_attr.store;
 989                                 *attrs = &a2->dev_attr.attr;
 990                         } else {
 991                                 a = &su->u.a1;
 992                                 a->dev_attr.attr.name = su->name;
 993                                 a->index = (*t)->u.index + i;
 994                                 a->dev_attr.attr.mode =
 995                                   (*t)->dev_attr.attr.mode;
 996                                 a->dev_attr.show = (*t)->dev_attr.show;
 997                                 a->dev_attr.store = (*t)->dev_attr.store;
 998                                 *attrs = &a->dev_attr.attr;
 999                         }
1000                         attrs++;
1001                         su++;
1002                         t++;
1003                 }
1004         }
1005
1006         err = sysfs_create_group(&dev->kobj, group);
1007         if (err)
1008                 return ERR_PTR(-ENOMEM);
1009
1010         return group;
1011 }
1012
1013 static bool is_word_sized(struct nct6775_data *data, u16 reg)
1014 {
1015         switch (data->kind) {
1016         case nct6106:
1017                 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1018                   reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
1019                   reg == 0x111 || reg == 0x121 || reg == 0x131;
1020         case nct6775:
1021                 return (((reg & 0xff00) == 0x100 ||
1022                     (reg & 0xff00) == 0x200) &&
1023                    ((reg & 0x00ff) == 0x50 ||
1024                     (reg & 0x00ff) == 0x53 ||
1025                     (reg & 0x00ff) == 0x55)) ||
1026                   (reg & 0xfff0) == 0x630 ||
1027                   reg == 0x640 || reg == 0x642 ||
1028                   reg == 0x662 ||
1029                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1030                   reg == 0x73 || reg == 0x75 || reg == 0x77;
1031         case nct6776:
1032                 return (((reg & 0xff00) == 0x100 ||
1033                     (reg & 0xff00) == 0x200) &&
1034                    ((reg & 0x00ff) == 0x50 ||
1035                     (reg & 0x00ff) == 0x53 ||
1036                     (reg & 0x00ff) == 0x55)) ||
1037                   (reg & 0xfff0) == 0x630 ||
1038                   reg == 0x402 ||
1039                   reg == 0x640 || reg == 0x642 ||
1040                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1041                   reg == 0x73 || reg == 0x75 || reg == 0x77;
1042         case nct6779:
1043         case nct6791:
1044                 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
1045                   ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x0b) ||
1046                   reg == 0x402 ||
1047                   reg == 0x63a || reg == 0x63c || reg == 0x63e ||
1048                   reg == 0x640 || reg == 0x642 ||
1049                   reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
1050                   reg == 0x7b;
1051         }
1052         return false;
1053 }
1054
1055 /*
1056  * On older chips, only registers 0x50-0x5f are banked.
1057  * On more recent chips, all registers are banked.
1058  * Assume that is the case and set the bank number for each access.
1059  * Cache the bank number so it only needs to be set if it changes.
1060  */
1061 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
1062 {
1063         u8 bank = reg >> 8;
1064         if (data->bank != bank) {
1065                 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
1066                 outb_p(bank, data->addr + DATA_REG_OFFSET);
1067                 data->bank = bank;
1068         }
1069 }
1070
1071 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
1072 {
1073         int res, word_sized = is_word_sized(data, reg);
1074
1075         nct6775_set_bank(data, reg);
1076         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1077         res = inb_p(data->addr + DATA_REG_OFFSET);
1078         if (word_sized) {
1079                 outb_p((reg & 0xff) + 1,
1080                        data->addr + ADDR_REG_OFFSET);
1081                 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
1082         }
1083         return res;
1084 }
1085
1086 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
1087 {
1088         int word_sized = is_word_sized(data, reg);
1089
1090         nct6775_set_bank(data, reg);
1091         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1092         if (word_sized) {
1093                 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
1094                 outb_p((reg & 0xff) + 1,
1095                        data->addr + ADDR_REG_OFFSET);
1096         }
1097         outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
1098         return 0;
1099 }
1100
1101 /* We left-align 8-bit temperature values to make the code simpler */
1102 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
1103 {
1104         u16 res;
1105
1106         res = nct6775_read_value(data, reg);
1107         if (!is_word_sized(data, reg))
1108                 res <<= 8;
1109
1110         return res;
1111 }
1112
1113 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
1114 {
1115         if (!is_word_sized(data, reg))
1116                 value >>= 8;
1117         return nct6775_write_value(data, reg, value);
1118 }
1119
1120 /* This function assumes that the caller holds data->update_lock */
1121 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
1122 {
1123         u8 reg;
1124
1125         switch (nr) {
1126         case 0:
1127                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
1128                     | (data->fan_div[0] & 0x7);
1129                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1130                 break;
1131         case 1:
1132                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
1133                     | ((data->fan_div[1] << 4) & 0x70);
1134                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1135                 break;
1136         case 2:
1137                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
1138                     | (data->fan_div[2] & 0x7);
1139                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1140                 break;
1141         case 3:
1142                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
1143                     | ((data->fan_div[3] << 4) & 0x70);
1144                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1145                 break;
1146         }
1147 }
1148
1149 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
1150 {
1151         if (data->kind == nct6775)
1152                 nct6775_write_fan_div(data, nr);
1153 }
1154
1155 static void nct6775_update_fan_div(struct nct6775_data *data)
1156 {
1157         u8 i;
1158
1159         i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
1160         data->fan_div[0] = i & 0x7;
1161         data->fan_div[1] = (i & 0x70) >> 4;
1162         i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
1163         data->fan_div[2] = i & 0x7;
1164         if (data->has_fan & (1 << 3))
1165                 data->fan_div[3] = (i & 0x70) >> 4;
1166 }
1167
1168 static void nct6775_update_fan_div_common(struct nct6775_data *data)
1169 {
1170         if (data->kind == nct6775)
1171                 nct6775_update_fan_div(data);
1172 }
1173
1174 static void nct6775_init_fan_div(struct nct6775_data *data)
1175 {
1176         int i;
1177
1178         nct6775_update_fan_div_common(data);
1179         /*
1180          * For all fans, start with highest divider value if the divider
1181          * register is not initialized. This ensures that we get a
1182          * reading from the fan count register, even if it is not optimal.
1183          * We'll compute a better divider later on.
1184          */
1185         for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
1186                 if (!(data->has_fan & (1 << i)))
1187                         continue;
1188                 if (data->fan_div[i] == 0) {
1189                         data->fan_div[i] = 7;
1190                         nct6775_write_fan_div_common(data, i);
1191                 }
1192         }
1193 }
1194
1195 static void nct6775_init_fan_common(struct device *dev,
1196                                     struct nct6775_data *data)
1197 {
1198         int i;
1199         u8 reg;
1200
1201         if (data->has_fan_div)
1202                 nct6775_init_fan_div(data);
1203
1204         /*
1205          * If fan_min is not set (0), set it to 0xff to disable it. This
1206          * prevents the unnecessary warning when fanX_min is reported as 0.
1207          */
1208         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1209                 if (data->has_fan_min & (1 << i)) {
1210                         reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
1211                         if (!reg)
1212                                 nct6775_write_value(data, data->REG_FAN_MIN[i],
1213                                                     data->has_fan_div ? 0xff
1214                                                                       : 0xff1f);
1215                 }
1216         }
1217 }
1218
1219 static void nct6775_select_fan_div(struct device *dev,
1220                                    struct nct6775_data *data, int nr, u16 reg)
1221 {
1222         u8 fan_div = data->fan_div[nr];
1223         u16 fan_min;
1224
1225         if (!data->has_fan_div)
1226                 return;
1227
1228         /*
1229          * If we failed to measure the fan speed, or the reported value is not
1230          * in the optimal range, and the clock divider can be modified,
1231          * let's try that for next time.
1232          */
1233         if (reg == 0x00 && fan_div < 0x07)
1234                 fan_div++;
1235         else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1236                 fan_div--;
1237
1238         if (fan_div != data->fan_div[nr]) {
1239                 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1240                         nr + 1, div_from_reg(data->fan_div[nr]),
1241                         div_from_reg(fan_div));
1242
1243                 /* Preserve min limit if possible */
1244                 if (data->has_fan_min & (1 << nr)) {
1245                         fan_min = data->fan_min[nr];
1246                         if (fan_div > data->fan_div[nr]) {
1247                                 if (fan_min != 255 && fan_min > 1)
1248                                         fan_min >>= 1;
1249                         } else {
1250                                 if (fan_min != 255) {
1251                                         fan_min <<= 1;
1252                                         if (fan_min > 254)
1253                                                 fan_min = 254;
1254                                 }
1255                         }
1256                         if (fan_min != data->fan_min[nr]) {
1257                                 data->fan_min[nr] = fan_min;
1258                                 nct6775_write_value(data, data->REG_FAN_MIN[nr],
1259                                                     fan_min);
1260                         }
1261                 }
1262                 data->fan_div[nr] = fan_div;
1263                 nct6775_write_fan_div_common(data, nr);
1264         }
1265 }
1266
1267 static void nct6775_update_pwm(struct device *dev)
1268 {
1269         struct nct6775_data *data = dev_get_drvdata(dev);
1270         int i, j;
1271         int fanmodecfg, reg;
1272         bool duty_is_dc;
1273
1274         for (i = 0; i < data->pwm_num; i++) {
1275                 if (!(data->has_pwm & (1 << i)))
1276                         continue;
1277
1278                 duty_is_dc = data->REG_PWM_MODE[i] &&
1279                   (nct6775_read_value(data, data->REG_PWM_MODE[i])
1280                    & data->PWM_MODE_MASK[i]);
1281                 data->pwm_mode[i] = duty_is_dc;
1282
1283                 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
1284                 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1285                         if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1286                                 data->pwm[j][i]
1287                                   = nct6775_read_value(data,
1288                                                        data->REG_PWM[j][i]);
1289                         }
1290                 }
1291
1292                 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1293                                                         (fanmodecfg >> 4) & 7);
1294
1295                 if (!data->temp_tolerance[0][i] ||
1296                     data->pwm_enable[i] != speed_cruise)
1297                         data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1298                 if (!data->target_speed_tolerance[i] ||
1299                     data->pwm_enable[i] == speed_cruise) {
1300                         u8 t = fanmodecfg & 0x0f;
1301                         if (data->REG_TOLERANCE_H) {
1302                                 t |= (nct6775_read_value(data,
1303                                       data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
1304                         }
1305                         data->target_speed_tolerance[i] = t;
1306                 }
1307
1308                 data->temp_tolerance[1][i] =
1309                         nct6775_read_value(data,
1310                                         data->REG_CRITICAL_TEMP_TOLERANCE[i]);
1311
1312                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
1313                 data->pwm_temp_sel[i] = reg & 0x1f;
1314                 /* If fan can stop, report floor as 0 */
1315                 if (reg & 0x80)
1316                         data->pwm[2][i] = 0;
1317
1318                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
1319                 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1320                 /* If weight is disabled, report weight source as 0 */
1321                 if (j == 1 && !(reg & 0x80))
1322                         data->pwm_weight_temp_sel[i] = 0;
1323
1324                 /* Weight temp data */
1325                 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
1326                         data->weight_temp[j][i]
1327                           = nct6775_read_value(data,
1328                                                data->REG_WEIGHT_TEMP[j][i]);
1329                 }
1330         }
1331 }
1332
1333 static void nct6775_update_pwm_limits(struct device *dev)
1334 {
1335         struct nct6775_data *data = dev_get_drvdata(dev);
1336         int i, j;
1337         u8 reg;
1338         u16 reg_t;
1339
1340         for (i = 0; i < data->pwm_num; i++) {
1341                 if (!(data->has_pwm & (1 << i)))
1342                         continue;
1343
1344                 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1345                         data->fan_time[j][i] =
1346                           nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1347                 }
1348
1349                 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1350                 /* Update only in matching mode or if never updated */
1351                 if (!data->target_temp[i] ||
1352                     data->pwm_enable[i] == thermal_cruise)
1353                         data->target_temp[i] = reg_t & data->target_temp_mask;
1354                 if (!data->target_speed[i] ||
1355                     data->pwm_enable[i] == speed_cruise) {
1356                         if (data->REG_TOLERANCE_H) {
1357                                 reg_t |= (nct6775_read_value(data,
1358                                         data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1359                         }
1360                         data->target_speed[i] = reg_t;
1361                 }
1362
1363                 for (j = 0; j < data->auto_pwm_num; j++) {
1364                         data->auto_pwm[i][j] =
1365                           nct6775_read_value(data,
1366                                              NCT6775_AUTO_PWM(data, i, j));
1367                         data->auto_temp[i][j] =
1368                           nct6775_read_value(data,
1369                                              NCT6775_AUTO_TEMP(data, i, j));
1370                 }
1371
1372                 /* critical auto_pwm temperature data */
1373                 data->auto_temp[i][data->auto_pwm_num] =
1374                         nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1375
1376                 switch (data->kind) {
1377                 case nct6775:
1378                         reg = nct6775_read_value(data,
1379                                                  NCT6775_REG_CRITICAL_ENAB[i]);
1380                         data->auto_pwm[i][data->auto_pwm_num] =
1381                                                 (reg & 0x02) ? 0xff : 0x00;
1382                         break;
1383                 case nct6776:
1384                         data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1385                         break;
1386                 case nct6106:
1387                 case nct6779:
1388                 case nct6791:
1389                         reg = nct6775_read_value(data,
1390                                         data->REG_CRITICAL_PWM_ENABLE[i]);
1391                         if (reg & data->CRITICAL_PWM_ENABLE_MASK)
1392                                 reg = nct6775_read_value(data,
1393                                         data->REG_CRITICAL_PWM[i]);
1394                         else
1395                                 reg = 0xff;
1396                         data->auto_pwm[i][data->auto_pwm_num] = reg;
1397                         break;
1398                 }
1399         }
1400 }
1401
1402 static struct nct6775_data *nct6775_update_device(struct device *dev)
1403 {
1404         struct nct6775_data *data = dev_get_drvdata(dev);
1405         int i, j;
1406
1407         mutex_lock(&data->update_lock);
1408
1409         if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1410             || !data->valid) {
1411                 /* Fan clock dividers */
1412                 nct6775_update_fan_div_common(data);
1413
1414                 /* Measured voltages and limits */
1415                 for (i = 0; i < data->in_num; i++) {
1416                         if (!(data->have_in & (1 << i)))
1417                                 continue;
1418
1419                         data->in[i][0] = nct6775_read_value(data,
1420                                                             data->REG_VIN[i]);
1421                         data->in[i][1] = nct6775_read_value(data,
1422                                           data->REG_IN_MINMAX[0][i]);
1423                         data->in[i][2] = nct6775_read_value(data,
1424                                           data->REG_IN_MINMAX[1][i]);
1425                 }
1426
1427                 /* Measured fan speeds and limits */
1428                 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
1429                         u16 reg;
1430
1431                         if (!(data->has_fan & (1 << i)))
1432                                 continue;
1433
1434                         reg = nct6775_read_value(data, data->REG_FAN[i]);
1435                         data->rpm[i] = data->fan_from_reg(reg,
1436                                                           data->fan_div[i]);
1437
1438                         if (data->has_fan_min & (1 << i))
1439                                 data->fan_min[i] = nct6775_read_value(data,
1440                                            data->REG_FAN_MIN[i]);
1441                         data->fan_pulses[i] =
1442                           (nct6775_read_value(data, data->REG_FAN_PULSES[i])
1443                                 >> data->FAN_PULSE_SHIFT[i]) & 0x03;
1444
1445                         nct6775_select_fan_div(dev, data, i, reg);
1446                 }
1447
1448                 nct6775_update_pwm(dev);
1449                 nct6775_update_pwm_limits(dev);
1450
1451                 /* Measured temperatures and limits */
1452                 for (i = 0; i < NUM_TEMP; i++) {
1453                         if (!(data->have_temp & (1 << i)))
1454                                 continue;
1455                         for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1456                                 if (data->reg_temp[j][i])
1457                                         data->temp[j][i]
1458                                           = nct6775_read_temp(data,
1459                                                 data->reg_temp[j][i]);
1460                         }
1461                         if (!(data->have_temp_fixed & (1 << i)))
1462                                 continue;
1463                         data->temp_offset[i]
1464                           = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1465                 }
1466
1467                 data->alarms = 0;
1468                 for (i = 0; i < NUM_REG_ALARM; i++) {
1469                         u8 alarm;
1470                         if (!data->REG_ALARM[i])
1471                                 continue;
1472                         alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1473                         data->alarms |= ((u64)alarm) << (i << 3);
1474                 }
1475
1476                 data->beeps = 0;
1477                 for (i = 0; i < NUM_REG_BEEP; i++) {
1478                         u8 beep;
1479                         if (!data->REG_BEEP[i])
1480                                 continue;
1481                         beep = nct6775_read_value(data, data->REG_BEEP[i]);
1482                         data->beeps |= ((u64)beep) << (i << 3);
1483                 }
1484
1485                 data->last_updated = jiffies;
1486                 data->valid = true;
1487         }
1488
1489         mutex_unlock(&data->update_lock);
1490         return data;
1491 }
1492
1493 /*
1494  * Sysfs callback functions
1495  */
1496 static ssize_t
1497 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1498 {
1499         struct nct6775_data *data = nct6775_update_device(dev);
1500         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1501         int nr = sattr->nr;
1502         int index = sattr->index;
1503         return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1504 }
1505
1506 static ssize_t
1507 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1508              size_t count)
1509 {
1510         struct nct6775_data *data = dev_get_drvdata(dev);
1511         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1512         int nr = sattr->nr;
1513         int index = sattr->index;
1514         unsigned long val;
1515         int err = kstrtoul(buf, 10, &val);
1516         if (err < 0)
1517                 return err;
1518         mutex_lock(&data->update_lock);
1519         data->in[nr][index] = in_to_reg(val, nr);
1520         nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr],
1521                             data->in[nr][index]);
1522         mutex_unlock(&data->update_lock);
1523         return count;
1524 }
1525
1526 static ssize_t
1527 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1528 {
1529         struct nct6775_data *data = nct6775_update_device(dev);
1530         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1531         int nr = data->ALARM_BITS[sattr->index];
1532         return sprintf(buf, "%u\n",
1533                        (unsigned int)((data->alarms >> nr) & 0x01));
1534 }
1535
1536 static int find_temp_source(struct nct6775_data *data, int index, int count)
1537 {
1538         int source = data->temp_src[index];
1539         int nr;
1540
1541         for (nr = 0; nr < count; nr++) {
1542                 int src;
1543
1544                 src = nct6775_read_value(data,
1545                                          data->REG_TEMP_SOURCE[nr]) & 0x1f;
1546                 if (src == source)
1547                         return nr;
1548         }
1549         return -1;
1550 }
1551
1552 static ssize_t
1553 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1554 {
1555         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1556         struct nct6775_data *data = nct6775_update_device(dev);
1557         unsigned int alarm = 0;
1558         int nr;
1559
1560         /*
1561          * For temperatures, there is no fixed mapping from registers to alarm
1562          * bits. Alarm bits are determined by the temperature source mapping.
1563          */
1564         nr = find_temp_source(data, sattr->index, data->num_temp_alarms);
1565         if (nr >= 0) {
1566                 int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE];
1567                 alarm = (data->alarms >> bit) & 0x01;
1568         }
1569         return sprintf(buf, "%u\n", alarm);
1570 }
1571
1572 static ssize_t
1573 show_beep(struct device *dev, struct device_attribute *attr, char *buf)
1574 {
1575         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1576         struct nct6775_data *data = nct6775_update_device(dev);
1577         int nr = data->BEEP_BITS[sattr->index];
1578
1579         return sprintf(buf, "%u\n",
1580                        (unsigned int)((data->beeps >> nr) & 0x01));
1581 }
1582
1583 static ssize_t
1584 store_beep(struct device *dev, struct device_attribute *attr, const char *buf,
1585            size_t count)
1586 {
1587         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1588         struct nct6775_data *data = dev_get_drvdata(dev);
1589         int nr = data->BEEP_BITS[sattr->index];
1590         int regindex = nr >> 3;
1591         unsigned long val;
1592
1593         int err = kstrtoul(buf, 10, &val);
1594         if (err < 0)
1595                 return err;
1596         if (val > 1)
1597                 return -EINVAL;
1598
1599         mutex_lock(&data->update_lock);
1600         if (val)
1601                 data->beeps |= (1ULL << nr);
1602         else
1603                 data->beeps &= ~(1ULL << nr);
1604         nct6775_write_value(data, data->REG_BEEP[regindex],
1605                             (data->beeps >> (regindex << 3)) & 0xff);
1606         mutex_unlock(&data->update_lock);
1607         return count;
1608 }
1609
1610 static ssize_t
1611 show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf)
1612 {
1613         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1614         struct nct6775_data *data = nct6775_update_device(dev);
1615         unsigned int beep = 0;
1616         int nr;
1617
1618         /*
1619          * For temperatures, there is no fixed mapping from registers to beep
1620          * enable bits. Beep enable bits are determined by the temperature
1621          * source mapping.
1622          */
1623         nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1624         if (nr >= 0) {
1625                 int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1626                 beep = (data->beeps >> bit) & 0x01;
1627         }
1628         return sprintf(buf, "%u\n", beep);
1629 }
1630
1631 static ssize_t
1632 store_temp_beep(struct device *dev, struct device_attribute *attr,
1633                 const char *buf, size_t count)
1634 {
1635         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1636         struct nct6775_data *data = dev_get_drvdata(dev);
1637         int nr, bit, regindex;
1638         unsigned long val;
1639
1640         int err = kstrtoul(buf, 10, &val);
1641         if (err < 0)
1642                 return err;
1643         if (val > 1)
1644                 return -EINVAL;
1645
1646         nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1647         if (nr < 0)
1648                 return -ENODEV;
1649
1650         bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1651         regindex = bit >> 3;
1652
1653         mutex_lock(&data->update_lock);
1654         if (val)
1655                 data->beeps |= (1ULL << bit);
1656         else
1657                 data->beeps &= ~(1ULL << bit);
1658         nct6775_write_value(data, data->REG_BEEP[regindex],
1659                             (data->beeps >> (regindex << 3)) & 0xff);
1660         mutex_unlock(&data->update_lock);
1661
1662         return count;
1663 }
1664
1665 static umode_t nct6775_in_is_visible(struct kobject *kobj,
1666                                      struct attribute *attr, int index)
1667 {
1668         struct device *dev = container_of(kobj, struct device, kobj);
1669         struct nct6775_data *data = dev_get_drvdata(dev);
1670         int in = index / 5;     /* voltage index */
1671
1672         if (!(data->have_in & (1 << in)))
1673                 return 0;
1674
1675         return attr->mode;
1676 }
1677
1678 SENSOR_TEMPLATE_2(in_input, "in%d_input", S_IRUGO, show_in_reg, NULL, 0, 0);
1679 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", S_IRUGO, show_alarm, NULL, 0);
1680 SENSOR_TEMPLATE(in_beep, "in%d_beep", S_IWUSR | S_IRUGO, show_beep, store_beep,
1681                 0);
1682 SENSOR_TEMPLATE_2(in_min, "in%d_min", S_IWUSR | S_IRUGO, show_in_reg,
1683                   store_in_reg, 0, 1);
1684 SENSOR_TEMPLATE_2(in_max, "in%d_max", S_IWUSR | S_IRUGO, show_in_reg,
1685                   store_in_reg, 0, 2);
1686
1687 /*
1688  * nct6775_in_is_visible uses the index into the following array
1689  * to determine if attributes should be created or not.
1690  * Any change in order or content must be matched.
1691  */
1692 static struct sensor_device_template *nct6775_attributes_in_template[] = {
1693         &sensor_dev_template_in_input,
1694         &sensor_dev_template_in_alarm,
1695         &sensor_dev_template_in_beep,
1696         &sensor_dev_template_in_min,
1697         &sensor_dev_template_in_max,
1698         NULL
1699 };
1700
1701 static struct sensor_template_group nct6775_in_template_group = {
1702         .templates = nct6775_attributes_in_template,
1703         .is_visible = nct6775_in_is_visible,
1704 };
1705
1706 static ssize_t
1707 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1708 {
1709         struct nct6775_data *data = nct6775_update_device(dev);
1710         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1711         int nr = sattr->index;
1712         return sprintf(buf, "%d\n", data->rpm[nr]);
1713 }
1714
1715 static ssize_t
1716 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1717 {
1718         struct nct6775_data *data = nct6775_update_device(dev);
1719         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1720         int nr = sattr->index;
1721         return sprintf(buf, "%d\n",
1722                        data->fan_from_reg_min(data->fan_min[nr],
1723                                               data->fan_div[nr]));
1724 }
1725
1726 static ssize_t
1727 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1728 {
1729         struct nct6775_data *data = nct6775_update_device(dev);
1730         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1731         int nr = sattr->index;
1732         return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1733 }
1734
1735 static ssize_t
1736 store_fan_min(struct device *dev, struct device_attribute *attr,
1737               const char *buf, size_t count)
1738 {
1739         struct nct6775_data *data = dev_get_drvdata(dev);
1740         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1741         int nr = sattr->index;
1742         unsigned long val;
1743         int err;
1744         unsigned int reg;
1745         u8 new_div;
1746
1747         err = kstrtoul(buf, 10, &val);
1748         if (err < 0)
1749                 return err;
1750
1751         mutex_lock(&data->update_lock);
1752         if (!data->has_fan_div) {
1753                 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1754                 if (!val) {
1755                         val = 0xff1f;
1756                 } else {
1757                         if (val > 1350000U)
1758                                 val = 135000U;
1759                         val = 1350000U / val;
1760                         val = (val & 0x1f) | ((val << 3) & 0xff00);
1761                 }
1762                 data->fan_min[nr] = val;
1763                 goto write_min; /* Leave fan divider alone */
1764         }
1765         if (!val) {
1766                 /* No min limit, alarm disabled */
1767                 data->fan_min[nr] = 255;
1768                 new_div = data->fan_div[nr]; /* No change */
1769                 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1770                 goto write_div;
1771         }
1772         reg = 1350000U / val;
1773         if (reg >= 128 * 255) {
1774                 /*
1775                  * Speed below this value cannot possibly be represented,
1776                  * even with the highest divider (128)
1777                  */
1778                 data->fan_min[nr] = 254;
1779                 new_div = 7; /* 128 == (1 << 7) */
1780                 dev_warn(dev,
1781                          "fan%u low limit %lu below minimum %u, set to minimum\n",
1782                          nr + 1, val, data->fan_from_reg_min(254, 7));
1783         } else if (!reg) {
1784                 /*
1785                  * Speed above this value cannot possibly be represented,
1786                  * even with the lowest divider (1)
1787                  */
1788                 data->fan_min[nr] = 1;
1789                 new_div = 0; /* 1 == (1 << 0) */
1790                 dev_warn(dev,
1791                          "fan%u low limit %lu above maximum %u, set to maximum\n",
1792                          nr + 1, val, data->fan_from_reg_min(1, 0));
1793         } else {
1794                 /*
1795                  * Automatically pick the best divider, i.e. the one such
1796                  * that the min limit will correspond to a register value
1797                  * in the 96..192 range
1798                  */
1799                 new_div = 0;
1800                 while (reg > 192 && new_div < 7) {
1801                         reg >>= 1;
1802                         new_div++;
1803                 }
1804                 data->fan_min[nr] = reg;
1805         }
1806
1807 write_div:
1808         /*
1809          * Write both the fan clock divider (if it changed) and the new
1810          * fan min (unconditionally)
1811          */
1812         if (new_div != data->fan_div[nr]) {
1813                 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1814                         nr + 1, div_from_reg(data->fan_div[nr]),
1815                         div_from_reg(new_div));
1816                 data->fan_div[nr] = new_div;
1817                 nct6775_write_fan_div_common(data, nr);
1818                 /* Give the chip time to sample a new speed value */
1819                 data->last_updated = jiffies;
1820         }
1821
1822 write_min:
1823         nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1824         mutex_unlock(&data->update_lock);
1825
1826         return count;
1827 }
1828
1829 static ssize_t
1830 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
1831 {
1832         struct nct6775_data *data = nct6775_update_device(dev);
1833         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1834         int p = data->fan_pulses[sattr->index];
1835
1836         return sprintf(buf, "%d\n", p ? : 4);
1837 }
1838
1839 static ssize_t
1840 store_fan_pulses(struct device *dev, struct device_attribute *attr,
1841                  const char *buf, size_t count)
1842 {
1843         struct nct6775_data *data = dev_get_drvdata(dev);
1844         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1845         int nr = sattr->index;
1846         unsigned long val;
1847         int err;
1848         u8 reg;
1849
1850         err = kstrtoul(buf, 10, &val);
1851         if (err < 0)
1852                 return err;
1853
1854         if (val > 4)
1855                 return -EINVAL;
1856
1857         mutex_lock(&data->update_lock);
1858         data->fan_pulses[nr] = val & 3;
1859         reg = nct6775_read_value(data, data->REG_FAN_PULSES[nr]);
1860         reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
1861         reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
1862         nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
1863         mutex_unlock(&data->update_lock);
1864
1865         return count;
1866 }
1867
1868 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
1869                                       struct attribute *attr, int index)
1870 {
1871         struct device *dev = container_of(kobj, struct device, kobj);
1872         struct nct6775_data *data = dev_get_drvdata(dev);
1873         int fan = index / 6;    /* fan index */
1874         int nr = index % 6;     /* attribute index */
1875
1876         if (!(data->has_fan & (1 << fan)))
1877                 return 0;
1878
1879         if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1)
1880                 return 0;
1881         if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1)
1882                 return 0;
1883         if (nr == 4 && !(data->has_fan_min & (1 << fan)))
1884                 return 0;
1885         if (nr == 5 && data->kind != nct6775)
1886                 return 0;
1887
1888         return attr->mode;
1889 }
1890
1891 SENSOR_TEMPLATE(fan_input, "fan%d_input", S_IRUGO, show_fan, NULL, 0);
1892 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", S_IRUGO, show_alarm, NULL,
1893                 FAN_ALARM_BASE);
1894 SENSOR_TEMPLATE(fan_beep, "fan%d_beep", S_IWUSR | S_IRUGO, show_beep,
1895                 store_beep, FAN_ALARM_BASE);
1896 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", S_IWUSR | S_IRUGO, show_fan_pulses,
1897                 store_fan_pulses, 0);
1898 SENSOR_TEMPLATE(fan_min, "fan%d_min", S_IWUSR | S_IRUGO, show_fan_min,
1899                 store_fan_min, 0);
1900 SENSOR_TEMPLATE(fan_div, "fan%d_div", S_IRUGO, show_fan_div, NULL, 0);
1901
1902 /*
1903  * nct6775_fan_is_visible uses the index into the following array
1904  * to determine if attributes should be created or not.
1905  * Any change in order or content must be matched.
1906  */
1907 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
1908         &sensor_dev_template_fan_input,
1909         &sensor_dev_template_fan_alarm, /* 1 */
1910         &sensor_dev_template_fan_beep,  /* 2 */
1911         &sensor_dev_template_fan_pulses,
1912         &sensor_dev_template_fan_min,   /* 4 */
1913         &sensor_dev_template_fan_div,   /* 5 */
1914         NULL
1915 };
1916
1917 static struct sensor_template_group nct6775_fan_template_group = {
1918         .templates = nct6775_attributes_fan_template,
1919         .is_visible = nct6775_fan_is_visible,
1920         .base = 1,
1921 };
1922
1923 static ssize_t
1924 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1925 {
1926         struct nct6775_data *data = nct6775_update_device(dev);
1927         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1928         int nr = sattr->index;
1929         return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1930 }
1931
1932 static ssize_t
1933 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1934 {
1935         struct nct6775_data *data = nct6775_update_device(dev);
1936         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1937         int nr = sattr->nr;
1938         int index = sattr->index;
1939
1940         return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
1941 }
1942
1943 static ssize_t
1944 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
1945            size_t count)
1946 {
1947         struct nct6775_data *data = dev_get_drvdata(dev);
1948         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1949         int nr = sattr->nr;
1950         int index = sattr->index;
1951         int err;
1952         long val;
1953
1954         err = kstrtol(buf, 10, &val);
1955         if (err < 0)
1956                 return err;
1957
1958         mutex_lock(&data->update_lock);
1959         data->temp[index][nr] = LM75_TEMP_TO_REG(val);
1960         nct6775_write_temp(data, data->reg_temp[index][nr],
1961                            data->temp[index][nr]);
1962         mutex_unlock(&data->update_lock);
1963         return count;
1964 }
1965
1966 static ssize_t
1967 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
1968 {
1969         struct nct6775_data *data = nct6775_update_device(dev);
1970         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1971
1972         return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
1973 }
1974
1975 static ssize_t
1976 store_temp_offset(struct device *dev, struct device_attribute *attr,
1977                   const char *buf, size_t count)
1978 {
1979         struct nct6775_data *data = dev_get_drvdata(dev);
1980         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1981         int nr = sattr->index;
1982         long val;
1983         int err;
1984
1985         err = kstrtol(buf, 10, &val);
1986         if (err < 0)
1987                 return err;
1988
1989         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
1990
1991         mutex_lock(&data->update_lock);
1992         data->temp_offset[nr] = val;
1993         nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
1994         mutex_unlock(&data->update_lock);
1995
1996         return count;
1997 }
1998
1999 static ssize_t
2000 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
2001 {
2002         struct nct6775_data *data = nct6775_update_device(dev);
2003         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2004         int nr = sattr->index;
2005         return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
2006 }
2007
2008 static ssize_t
2009 store_temp_type(struct device *dev, struct device_attribute *attr,
2010                 const char *buf, size_t count)
2011 {
2012         struct nct6775_data *data = nct6775_update_device(dev);
2013         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2014         int nr = sattr->index;
2015         unsigned long val;
2016         int err;
2017         u8 vbat, diode, vbit, dbit;
2018
2019         err = kstrtoul(buf, 10, &val);
2020         if (err < 0)
2021                 return err;
2022
2023         if (val != 1 && val != 3 && val != 4)
2024                 return -EINVAL;
2025
2026         mutex_lock(&data->update_lock);
2027
2028         data->temp_type[nr] = val;
2029         vbit = 0x02 << nr;
2030         dbit = data->DIODE_MASK << nr;
2031         vbat = nct6775_read_value(data, data->REG_VBAT) & ~vbit;
2032         diode = nct6775_read_value(data, data->REG_DIODE) & ~dbit;
2033         switch (val) {
2034         case 1: /* CPU diode (diode, current mode) */
2035                 vbat |= vbit;
2036                 diode |= dbit;
2037                 break;
2038         case 3: /* diode, voltage mode */
2039                 vbat |= dbit;
2040                 break;
2041         case 4: /* thermistor */
2042                 break;
2043         }
2044         nct6775_write_value(data, data->REG_VBAT, vbat);
2045         nct6775_write_value(data, data->REG_DIODE, diode);
2046
2047         mutex_unlock(&data->update_lock);
2048         return count;
2049 }
2050
2051 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
2052                                        struct attribute *attr, int index)
2053 {
2054         struct device *dev = container_of(kobj, struct device, kobj);
2055         struct nct6775_data *data = dev_get_drvdata(dev);
2056         int temp = index / 10;  /* temp index */
2057         int nr = index % 10;    /* attribute index */
2058
2059         if (!(data->have_temp & (1 << temp)))
2060                 return 0;
2061
2062         if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0)
2063                 return 0;                               /* alarm */
2064
2065         if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0)
2066                 return 0;                               /* beep */
2067
2068         if (nr == 4 && !data->reg_temp[1][temp])        /* max */
2069                 return 0;
2070
2071         if (nr == 5 && !data->reg_temp[2][temp])        /* max_hyst */
2072                 return 0;
2073
2074         if (nr == 6 && !data->reg_temp[3][temp])        /* crit */
2075                 return 0;
2076
2077         if (nr == 7 && !data->reg_temp[4][temp])        /* lcrit */
2078                 return 0;
2079
2080         /* offset and type only apply to fixed sensors */
2081         if (nr > 7 && !(data->have_temp_fixed & (1 << temp)))
2082                 return 0;
2083
2084         return attr->mode;
2085 }
2086
2087 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", S_IRUGO, show_temp, NULL, 0, 0);
2088 SENSOR_TEMPLATE(temp_label, "temp%d_label", S_IRUGO, show_temp_label, NULL, 0);
2089 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", S_IRUGO | S_IWUSR, show_temp,
2090                   store_temp, 0, 1);
2091 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", S_IRUGO | S_IWUSR,
2092                   show_temp, store_temp, 0, 2);
2093 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", S_IRUGO | S_IWUSR, show_temp,
2094                   store_temp, 0, 3);
2095 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", S_IRUGO | S_IWUSR, show_temp,
2096                   store_temp, 0, 4);
2097 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", S_IRUGO | S_IWUSR,
2098                 show_temp_offset, store_temp_offset, 0);
2099 SENSOR_TEMPLATE(temp_type, "temp%d_type", S_IRUGO | S_IWUSR, show_temp_type,
2100                 store_temp_type, 0);
2101 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", S_IRUGO, show_temp_alarm, NULL, 0);
2102 SENSOR_TEMPLATE(temp_beep, "temp%d_beep", S_IRUGO | S_IWUSR, show_temp_beep,
2103                 store_temp_beep, 0);
2104
2105 /*
2106  * nct6775_temp_is_visible uses the index into the following array
2107  * to determine if attributes should be created or not.
2108  * Any change in order or content must be matched.
2109  */
2110 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
2111         &sensor_dev_template_temp_input,
2112         &sensor_dev_template_temp_label,
2113         &sensor_dev_template_temp_alarm,        /* 2 */
2114         &sensor_dev_template_temp_beep,         /* 3 */
2115         &sensor_dev_template_temp_max,          /* 4 */
2116         &sensor_dev_template_temp_max_hyst,     /* 5 */
2117         &sensor_dev_template_temp_crit,         /* 6 */
2118         &sensor_dev_template_temp_lcrit,        /* 7 */
2119         &sensor_dev_template_temp_offset,       /* 8 */
2120         &sensor_dev_template_temp_type,         /* 9 */
2121         NULL
2122 };
2123
2124 static struct sensor_template_group nct6775_temp_template_group = {
2125         .templates = nct6775_attributes_temp_template,
2126         .is_visible = nct6775_temp_is_visible,
2127         .base = 1,
2128 };
2129
2130 static ssize_t
2131 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
2132 {
2133         struct nct6775_data *data = nct6775_update_device(dev);
2134         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2135
2136         return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
2137 }
2138
2139 static ssize_t
2140 store_pwm_mode(struct device *dev, struct device_attribute *attr,
2141                const char *buf, size_t count)
2142 {
2143         struct nct6775_data *data = dev_get_drvdata(dev);
2144         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2145         int nr = sattr->index;
2146         unsigned long val;
2147         int err;
2148         u8 reg;
2149
2150         err = kstrtoul(buf, 10, &val);
2151         if (err < 0)
2152                 return err;
2153
2154         if (val > 1)
2155                 return -EINVAL;
2156
2157         /* Setting DC mode is not supported for all chips/channels */
2158         if (data->REG_PWM_MODE[nr] == 0) {
2159                 if (val)
2160                         return -EINVAL;
2161                 return count;
2162         }
2163
2164         mutex_lock(&data->update_lock);
2165         data->pwm_mode[nr] = val;
2166         reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
2167         reg &= ~data->PWM_MODE_MASK[nr];
2168         if (val)
2169                 reg |= data->PWM_MODE_MASK[nr];
2170         nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
2171         mutex_unlock(&data->update_lock);
2172         return count;
2173 }
2174
2175 static ssize_t
2176 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2177 {
2178         struct nct6775_data *data = nct6775_update_device(dev);
2179         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2180         int nr = sattr->nr;
2181         int index = sattr->index;
2182         int pwm;
2183
2184         /*
2185          * For automatic fan control modes, show current pwm readings.
2186          * Otherwise, show the configured value.
2187          */
2188         if (index == 0 && data->pwm_enable[nr] > manual)
2189                 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
2190         else
2191                 pwm = data->pwm[index][nr];
2192
2193         return sprintf(buf, "%d\n", pwm);
2194 }
2195
2196 static ssize_t
2197 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
2198           size_t count)
2199 {
2200         struct nct6775_data *data = dev_get_drvdata(dev);
2201         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2202         int nr = sattr->nr;
2203         int index = sattr->index;
2204         unsigned long val;
2205         int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
2206         int maxval[7]
2207           = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
2208         int err;
2209         u8 reg;
2210
2211         err = kstrtoul(buf, 10, &val);
2212         if (err < 0)
2213                 return err;
2214         val = clamp_val(val, minval[index], maxval[index]);
2215
2216         mutex_lock(&data->update_lock);
2217         data->pwm[index][nr] = val;
2218         nct6775_write_value(data, data->REG_PWM[index][nr], val);
2219         if (index == 2) { /* floor: disable if val == 0 */
2220                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2221                 reg &= 0x7f;
2222                 if (val)
2223                         reg |= 0x80;
2224                 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2225         }
2226         mutex_unlock(&data->update_lock);
2227         return count;
2228 }
2229
2230 /* Returns 0 if OK, -EINVAL otherwise */
2231 static int check_trip_points(struct nct6775_data *data, int nr)
2232 {
2233         int i;
2234
2235         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2236                 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
2237                         return -EINVAL;
2238         }
2239         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2240                 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
2241                         return -EINVAL;
2242         }
2243         /* validate critical temperature and pwm if enabled (pwm > 0) */
2244         if (data->auto_pwm[nr][data->auto_pwm_num]) {
2245                 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2246                                 data->auto_temp[nr][data->auto_pwm_num] ||
2247                     data->auto_pwm[nr][data->auto_pwm_num - 1] >
2248                                 data->auto_pwm[nr][data->auto_pwm_num])
2249                         return -EINVAL;
2250         }
2251         return 0;
2252 }
2253
2254 static void pwm_update_registers(struct nct6775_data *data, int nr)
2255 {
2256         u8 reg;
2257
2258         switch (data->pwm_enable[nr]) {
2259         case off:
2260         case manual:
2261                 break;
2262         case speed_cruise:
2263                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2264                 reg = (reg & ~data->tolerance_mask) |
2265                   (data->target_speed_tolerance[nr] & data->tolerance_mask);
2266                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2267                 nct6775_write_value(data, data->REG_TARGET[nr],
2268                                     data->target_speed[nr] & 0xff);
2269                 if (data->REG_TOLERANCE_H) {
2270                         reg = (data->target_speed[nr] >> 8) & 0x0f;
2271                         reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2272                         nct6775_write_value(data,
2273                                             data->REG_TOLERANCE_H[nr],
2274                                             reg);
2275                 }
2276                 break;
2277         case thermal_cruise:
2278                 nct6775_write_value(data, data->REG_TARGET[nr],
2279                                     data->target_temp[nr]);
2280                 /* intentional */
2281         default:
2282                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2283                 reg = (reg & ~data->tolerance_mask) |
2284                   data->temp_tolerance[0][nr];
2285                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2286                 break;
2287         }
2288 }
2289
2290 static ssize_t
2291 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2292 {
2293         struct nct6775_data *data = nct6775_update_device(dev);
2294         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2295
2296         return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2297 }
2298
2299 static ssize_t
2300 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2301                  const char *buf, size_t count)
2302 {
2303         struct nct6775_data *data = dev_get_drvdata(dev);
2304         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2305         int nr = sattr->index;
2306         unsigned long val;
2307         int err;
2308         u16 reg;
2309
2310         err = kstrtoul(buf, 10, &val);
2311         if (err < 0)
2312                 return err;
2313
2314         if (val > sf4)
2315                 return -EINVAL;
2316
2317         if (val == sf3 && data->kind != nct6775)
2318                 return -EINVAL;
2319
2320         if (val == sf4 && check_trip_points(data, nr)) {
2321                 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2322                 dev_err(dev, "Adjust trip points and try again\n");
2323                 return -EINVAL;
2324         }
2325
2326         mutex_lock(&data->update_lock);
2327         data->pwm_enable[nr] = val;
2328         if (val == off) {
2329                 /*
2330                  * turn off pwm control: select manual mode, set pwm to maximum
2331                  */
2332                 data->pwm[0][nr] = 255;
2333                 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2334         }
2335         pwm_update_registers(data, nr);
2336         reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2337         reg &= 0x0f;
2338         reg |= pwm_enable_to_reg(val) << 4;
2339         nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2340         mutex_unlock(&data->update_lock);
2341         return count;
2342 }
2343
2344 static ssize_t
2345 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2346 {
2347         int i, sel = 0;
2348
2349         for (i = 0; i < NUM_TEMP; i++) {
2350                 if (!(data->have_temp & (1 << i)))
2351                         continue;
2352                 if (src == data->temp_src[i]) {
2353                         sel = i + 1;
2354                         break;
2355                 }
2356         }
2357
2358         return sprintf(buf, "%d\n", sel);
2359 }
2360
2361 static ssize_t
2362 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2363 {
2364         struct nct6775_data *data = nct6775_update_device(dev);
2365         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2366         int index = sattr->index;
2367
2368         return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2369 }
2370
2371 static ssize_t
2372 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2373                    const char *buf, size_t count)
2374 {
2375         struct nct6775_data *data = nct6775_update_device(dev);
2376         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2377         int nr = sattr->index;
2378         unsigned long val;
2379         int err, reg, src;
2380
2381         err = kstrtoul(buf, 10, &val);
2382         if (err < 0)
2383                 return err;
2384         if (val == 0 || val > NUM_TEMP)
2385                 return -EINVAL;
2386         if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
2387                 return -EINVAL;
2388
2389         mutex_lock(&data->update_lock);
2390         src = data->temp_src[val - 1];
2391         data->pwm_temp_sel[nr] = src;
2392         reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2393         reg &= 0xe0;
2394         reg |= src;
2395         nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2396         mutex_unlock(&data->update_lock);
2397
2398         return count;
2399 }
2400
2401 static ssize_t
2402 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2403                          char *buf)
2404 {
2405         struct nct6775_data *data = nct6775_update_device(dev);
2406         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2407         int index = sattr->index;
2408
2409         return show_pwm_temp_sel_common(data, buf,
2410                                         data->pwm_weight_temp_sel[index]);
2411 }
2412
2413 static ssize_t
2414 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2415                           const char *buf, size_t count)
2416 {
2417         struct nct6775_data *data = nct6775_update_device(dev);
2418         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2419         int nr = sattr->index;
2420         unsigned long val;
2421         int err, reg, src;
2422
2423         err = kstrtoul(buf, 10, &val);
2424         if (err < 0)
2425                 return err;
2426         if (val > NUM_TEMP)
2427                 return -EINVAL;
2428         if (val && (!(data->have_temp & (1 << (val - 1))) ||
2429                     !data->temp_src[val - 1]))
2430                 return -EINVAL;
2431
2432         mutex_lock(&data->update_lock);
2433         if (val) {
2434                 src = data->temp_src[val - 1];
2435                 data->pwm_weight_temp_sel[nr] = src;
2436                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2437                 reg &= 0xe0;
2438                 reg |= (src | 0x80);
2439                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2440         } else {
2441                 data->pwm_weight_temp_sel[nr] = 0;
2442                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2443                 reg &= 0x7f;
2444                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2445         }
2446         mutex_unlock(&data->update_lock);
2447
2448         return count;
2449 }
2450
2451 static ssize_t
2452 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2453 {
2454         struct nct6775_data *data = nct6775_update_device(dev);
2455         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2456
2457         return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2458 }
2459
2460 static ssize_t
2461 store_target_temp(struct device *dev, struct device_attribute *attr,
2462                   const char *buf, size_t count)
2463 {
2464         struct nct6775_data *data = dev_get_drvdata(dev);
2465         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2466         int nr = sattr->index;
2467         unsigned long val;
2468         int err;
2469
2470         err = kstrtoul(buf, 10, &val);
2471         if (err < 0)
2472                 return err;
2473
2474         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2475                         data->target_temp_mask);
2476
2477         mutex_lock(&data->update_lock);
2478         data->target_temp[nr] = val;
2479         pwm_update_registers(data, nr);
2480         mutex_unlock(&data->update_lock);
2481         return count;
2482 }
2483
2484 static ssize_t
2485 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2486 {
2487         struct nct6775_data *data = nct6775_update_device(dev);
2488         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2489         int nr = sattr->index;
2490
2491         return sprintf(buf, "%d\n",
2492                        fan_from_reg16(data->target_speed[nr],
2493                                       data->fan_div[nr]));
2494 }
2495
2496 static ssize_t
2497 store_target_speed(struct device *dev, struct device_attribute *attr,
2498                    const char *buf, size_t count)
2499 {
2500         struct nct6775_data *data = dev_get_drvdata(dev);
2501         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2502         int nr = sattr->index;
2503         unsigned long val;
2504         int err;
2505         u16 speed;
2506
2507         err = kstrtoul(buf, 10, &val);
2508         if (err < 0)
2509                 return err;
2510
2511         val = clamp_val(val, 0, 1350000U);
2512         speed = fan_to_reg(val, data->fan_div[nr]);
2513
2514         mutex_lock(&data->update_lock);
2515         data->target_speed[nr] = speed;
2516         pwm_update_registers(data, nr);
2517         mutex_unlock(&data->update_lock);
2518         return count;
2519 }
2520
2521 static ssize_t
2522 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2523                     char *buf)
2524 {
2525         struct nct6775_data *data = nct6775_update_device(dev);
2526         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2527         int nr = sattr->nr;
2528         int index = sattr->index;
2529
2530         return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2531 }
2532
2533 static ssize_t
2534 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2535                      const char *buf, size_t count)
2536 {
2537         struct nct6775_data *data = dev_get_drvdata(dev);
2538         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2539         int nr = sattr->nr;
2540         int index = sattr->index;
2541         unsigned long val;
2542         int err;
2543
2544         err = kstrtoul(buf, 10, &val);
2545         if (err < 0)
2546                 return err;
2547
2548         /* Limit tolerance as needed */
2549         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2550
2551         mutex_lock(&data->update_lock);
2552         data->temp_tolerance[index][nr] = val;
2553         if (index)
2554                 pwm_update_registers(data, nr);
2555         else
2556                 nct6775_write_value(data,
2557                                     data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2558                                     val);
2559         mutex_unlock(&data->update_lock);
2560         return count;
2561 }
2562
2563 /*
2564  * Fan speed tolerance is a tricky beast, since the associated register is
2565  * a tick counter, but the value is reported and configured as rpm.
2566  * Compute resulting low and high rpm values and report the difference.
2567  */
2568 static ssize_t
2569 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2570                      char *buf)
2571 {
2572         struct nct6775_data *data = nct6775_update_device(dev);
2573         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2574         int nr = sattr->index;
2575         int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2576         int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2577         int tolerance;
2578
2579         if (low <= 0)
2580                 low = 1;
2581         if (high > 0xffff)
2582                 high = 0xffff;
2583         if (high < low)
2584                 high = low;
2585
2586         tolerance = (fan_from_reg16(low, data->fan_div[nr])
2587                      - fan_from_reg16(high, data->fan_div[nr])) / 2;
2588
2589         return sprintf(buf, "%d\n", tolerance);
2590 }
2591
2592 static ssize_t
2593 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2594                       const char *buf, size_t count)
2595 {
2596         struct nct6775_data *data = dev_get_drvdata(dev);
2597         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2598         int nr = sattr->index;
2599         unsigned long val;
2600         int err;
2601         int low, high;
2602
2603         err = kstrtoul(buf, 10, &val);
2604         if (err < 0)
2605                 return err;
2606
2607         high = fan_from_reg16(data->target_speed[nr],
2608                               data->fan_div[nr]) + val;
2609         low = fan_from_reg16(data->target_speed[nr],
2610                              data->fan_div[nr]) - val;
2611         if (low <= 0)
2612                 low = 1;
2613         if (high < low)
2614                 high = low;
2615
2616         val = (fan_to_reg(low, data->fan_div[nr]) -
2617                fan_to_reg(high, data->fan_div[nr])) / 2;
2618
2619         /* Limit tolerance as needed */
2620         val = clamp_val(val, 0, data->speed_tolerance_limit);
2621
2622         mutex_lock(&data->update_lock);
2623         data->target_speed_tolerance[nr] = val;
2624         pwm_update_registers(data, nr);
2625         mutex_unlock(&data->update_lock);
2626         return count;
2627 }
2628
2629 SENSOR_TEMPLATE_2(pwm, "pwm%d", S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2630 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", S_IWUSR | S_IRUGO, show_pwm_mode,
2631                 store_pwm_mode, 0);
2632 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", S_IWUSR | S_IRUGO, show_pwm_enable,
2633                 store_pwm_enable, 0);
2634 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", S_IWUSR | S_IRUGO,
2635                 show_pwm_temp_sel, store_pwm_temp_sel, 0);
2636 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", S_IWUSR | S_IRUGO,
2637                 show_target_temp, store_target_temp, 0);
2638 SENSOR_TEMPLATE(fan_target, "fan%d_target", S_IWUSR | S_IRUGO,
2639                 show_target_speed, store_target_speed, 0);
2640 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", S_IWUSR | S_IRUGO,
2641                 show_speed_tolerance, store_speed_tolerance, 0);
2642
2643 /* Smart Fan registers */
2644
2645 static ssize_t
2646 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2647 {
2648         struct nct6775_data *data = nct6775_update_device(dev);
2649         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2650         int nr = sattr->nr;
2651         int index = sattr->index;
2652
2653         return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2654 }
2655
2656 static ssize_t
2657 store_weight_temp(struct device *dev, struct device_attribute *attr,
2658                   const char *buf, size_t count)
2659 {
2660         struct nct6775_data *data = dev_get_drvdata(dev);
2661         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2662         int nr = sattr->nr;
2663         int index = sattr->index;
2664         unsigned long val;
2665         int err;
2666
2667         err = kstrtoul(buf, 10, &val);
2668         if (err < 0)
2669                 return err;
2670
2671         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2672
2673         mutex_lock(&data->update_lock);
2674         data->weight_temp[index][nr] = val;
2675         nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2676         mutex_unlock(&data->update_lock);
2677         return count;
2678 }
2679
2680 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", S_IWUSR | S_IRUGO,
2681                   show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
2682 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step",
2683                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 0);
2684 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol",
2685                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 1);
2686 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base",
2687                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 2);
2688 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step",
2689                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 5);
2690 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base",
2691                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 6);
2692
2693 static ssize_t
2694 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2695 {
2696         struct nct6775_data *data = nct6775_update_device(dev);
2697         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2698         int nr = sattr->nr;
2699         int index = sattr->index;
2700
2701         return sprintf(buf, "%d\n",
2702                        step_time_from_reg(data->fan_time[index][nr],
2703                                           data->pwm_mode[nr]));
2704 }
2705
2706 static ssize_t
2707 store_fan_time(struct device *dev, struct device_attribute *attr,
2708                const char *buf, size_t count)
2709 {
2710         struct nct6775_data *data = dev_get_drvdata(dev);
2711         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2712         int nr = sattr->nr;
2713         int index = sattr->index;
2714         unsigned long val;
2715         int err;
2716
2717         err = kstrtoul(buf, 10, &val);
2718         if (err < 0)
2719                 return err;
2720
2721         val = step_time_to_reg(val, data->pwm_mode[nr]);
2722         mutex_lock(&data->update_lock);
2723         data->fan_time[index][nr] = val;
2724         nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2725         mutex_unlock(&data->update_lock);
2726         return count;
2727 }
2728
2729 static ssize_t
2730 show_name(struct device *dev, struct device_attribute *attr, char *buf)
2731 {
2732         struct nct6775_data *data = dev_get_drvdata(dev);
2733
2734         return sprintf(buf, "%s\n", data->name);
2735 }
2736
2737 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
2738
2739 static ssize_t
2740 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2741 {
2742         struct nct6775_data *data = nct6775_update_device(dev);
2743         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2744
2745         return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2746 }
2747
2748 static ssize_t
2749 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2750                const char *buf, size_t count)
2751 {
2752         struct nct6775_data *data = dev_get_drvdata(dev);
2753         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2754         int nr = sattr->nr;
2755         int point = sattr->index;
2756         unsigned long val;
2757         int err;
2758         u8 reg;
2759
2760         err = kstrtoul(buf, 10, &val);
2761         if (err < 0)
2762                 return err;
2763         if (val > 255)
2764                 return -EINVAL;
2765
2766         if (point == data->auto_pwm_num) {
2767                 if (data->kind != nct6775 && !val)
2768                         return -EINVAL;
2769                 if (data->kind != nct6779 && val)
2770                         val = 0xff;
2771         }
2772
2773         mutex_lock(&data->update_lock);
2774         data->auto_pwm[nr][point] = val;
2775         if (point < data->auto_pwm_num) {
2776                 nct6775_write_value(data,
2777                                     NCT6775_AUTO_PWM(data, nr, point),
2778                                     data->auto_pwm[nr][point]);
2779         } else {
2780                 switch (data->kind) {
2781                 case nct6775:
2782                         /* disable if needed (pwm == 0) */
2783                         reg = nct6775_read_value(data,
2784                                                  NCT6775_REG_CRITICAL_ENAB[nr]);
2785                         if (val)
2786                                 reg |= 0x02;
2787                         else
2788                                 reg &= ~0x02;
2789                         nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
2790                                             reg);
2791                         break;
2792                 case nct6776:
2793                         break; /* always enabled, nothing to do */
2794                 case nct6106:
2795                 case nct6779:
2796                 case nct6791:
2797                         nct6775_write_value(data, data->REG_CRITICAL_PWM[nr],
2798                                             val);
2799                         reg = nct6775_read_value(data,
2800                                         data->REG_CRITICAL_PWM_ENABLE[nr]);
2801                         if (val == 255)
2802                                 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
2803                         else
2804                                 reg |= data->CRITICAL_PWM_ENABLE_MASK;
2805                         nct6775_write_value(data,
2806                                             data->REG_CRITICAL_PWM_ENABLE[nr],
2807                                             reg);
2808                         break;
2809                 }
2810         }
2811         mutex_unlock(&data->update_lock);
2812         return count;
2813 }
2814
2815 static ssize_t
2816 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
2817 {
2818         struct nct6775_data *data = nct6775_update_device(dev);
2819         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2820         int nr = sattr->nr;
2821         int point = sattr->index;
2822
2823         /*
2824          * We don't know for sure if the temperature is signed or unsigned.
2825          * Assume it is unsigned.
2826          */
2827         return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
2828 }
2829
2830 static ssize_t
2831 store_auto_temp(struct device *dev, struct device_attribute *attr,
2832                 const char *buf, size_t count)
2833 {
2834         struct nct6775_data *data = dev_get_drvdata(dev);
2835         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2836         int nr = sattr->nr;
2837         int point = sattr->index;
2838         unsigned long val;
2839         int err;
2840
2841         err = kstrtoul(buf, 10, &val);
2842         if (err)
2843                 return err;
2844         if (val > 255000)
2845                 return -EINVAL;
2846
2847         mutex_lock(&data->update_lock);
2848         data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
2849         if (point < data->auto_pwm_num) {
2850                 nct6775_write_value(data,
2851                                     NCT6775_AUTO_TEMP(data, nr, point),
2852                                     data->auto_temp[nr][point]);
2853         } else {
2854                 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
2855                                     data->auto_temp[nr][point]);
2856         }
2857         mutex_unlock(&data->update_lock);
2858         return count;
2859 }
2860
2861 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
2862                                       struct attribute *attr, int index)
2863 {
2864         struct device *dev = container_of(kobj, struct device, kobj);
2865         struct nct6775_data *data = dev_get_drvdata(dev);
2866         int pwm = index / 36;   /* pwm index */
2867         int nr = index % 36;    /* attribute index */
2868
2869         if (!(data->has_pwm & (1 << pwm)))
2870                 return 0;
2871
2872         if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
2873                 return 0;
2874         if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
2875                 return 0;
2876         if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
2877                 return 0;
2878
2879         if (nr >= 22 && nr <= 35) {             /* auto point */
2880                 int api = (nr - 22) / 2;        /* auto point index */
2881
2882                 if (api > data->auto_pwm_num)
2883                         return 0;
2884         }
2885         return attr->mode;
2886 }
2887
2888 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", S_IWUSR | S_IRUGO,
2889                   show_fan_time, store_fan_time, 0, 0);
2890 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", S_IWUSR | S_IRUGO,
2891                   show_fan_time, store_fan_time, 0, 1);
2892 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", S_IWUSR | S_IRUGO,
2893                   show_fan_time, store_fan_time, 0, 2);
2894 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", S_IWUSR | S_IRUGO, show_pwm,
2895                   store_pwm, 0, 1);
2896 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", S_IWUSR | S_IRUGO, show_pwm,
2897                   store_pwm, 0, 2);
2898 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", S_IWUSR | S_IRUGO,
2899                   show_temp_tolerance, store_temp_tolerance, 0, 0);
2900 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance",
2901                   S_IWUSR | S_IRUGO, show_temp_tolerance, store_temp_tolerance,
2902                   0, 1);
2903
2904 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2905                   0, 3);
2906
2907 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", S_IWUSR | S_IRUGO, show_pwm,
2908                   store_pwm, 0, 4);
2909
2910 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm",
2911                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 0);
2912 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp",
2913                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 0);
2914
2915 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm",
2916                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 1);
2917 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp",
2918                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 1);
2919
2920 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm",
2921                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 2);
2922 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp",
2923                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 2);
2924
2925 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm",
2926                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 3);
2927 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp",
2928                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 3);
2929
2930 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm",
2931                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 4);
2932 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp",
2933                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 4);
2934
2935 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm",
2936                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 5);
2937 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp",
2938                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 5);
2939
2940 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm",
2941                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 6);
2942 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp",
2943                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 6);
2944
2945 /*
2946  * nct6775_pwm_is_visible uses the index into the following array
2947  * to determine if attributes should be created or not.
2948  * Any change in order or content must be matched.
2949  */
2950 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
2951         &sensor_dev_template_pwm,
2952         &sensor_dev_template_pwm_mode,
2953         &sensor_dev_template_pwm_enable,
2954         &sensor_dev_template_pwm_temp_sel,
2955         &sensor_dev_template_pwm_temp_tolerance,
2956         &sensor_dev_template_pwm_crit_temp_tolerance,
2957         &sensor_dev_template_pwm_target_temp,
2958         &sensor_dev_template_fan_target,
2959         &sensor_dev_template_fan_tolerance,
2960         &sensor_dev_template_pwm_stop_time,
2961         &sensor_dev_template_pwm_step_up_time,
2962         &sensor_dev_template_pwm_step_down_time,
2963         &sensor_dev_template_pwm_start,
2964         &sensor_dev_template_pwm_floor,
2965         &sensor_dev_template_pwm_weight_temp_sel,
2966         &sensor_dev_template_pwm_weight_temp_step,
2967         &sensor_dev_template_pwm_weight_temp_step_tol,
2968         &sensor_dev_template_pwm_weight_temp_step_base,
2969         &sensor_dev_template_pwm_weight_duty_step,
2970         &sensor_dev_template_pwm_max,                   /* 19 */
2971         &sensor_dev_template_pwm_step,                  /* 20 */
2972         &sensor_dev_template_pwm_weight_duty_base,      /* 21 */
2973         &sensor_dev_template_pwm_auto_point1_pwm,       /* 22 */
2974         &sensor_dev_template_pwm_auto_point1_temp,
2975         &sensor_dev_template_pwm_auto_point2_pwm,
2976         &sensor_dev_template_pwm_auto_point2_temp,
2977         &sensor_dev_template_pwm_auto_point3_pwm,
2978         &sensor_dev_template_pwm_auto_point3_temp,
2979         &sensor_dev_template_pwm_auto_point4_pwm,
2980         &sensor_dev_template_pwm_auto_point4_temp,
2981         &sensor_dev_template_pwm_auto_point5_pwm,
2982         &sensor_dev_template_pwm_auto_point5_temp,
2983         &sensor_dev_template_pwm_auto_point6_pwm,
2984         &sensor_dev_template_pwm_auto_point6_temp,
2985         &sensor_dev_template_pwm_auto_point7_pwm,
2986         &sensor_dev_template_pwm_auto_point7_temp,      /* 35 */
2987
2988         NULL
2989 };
2990
2991 static struct sensor_template_group nct6775_pwm_template_group = {
2992         .templates = nct6775_attributes_pwm_template,
2993         .is_visible = nct6775_pwm_is_visible,
2994         .base = 1,
2995 };
2996
2997 static ssize_t
2998 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
2999 {
3000         struct nct6775_data *data = dev_get_drvdata(dev);
3001         return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
3002 }
3003
3004 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
3005
3006 /* Case open detection */
3007
3008 static ssize_t
3009 clear_caseopen(struct device *dev, struct device_attribute *attr,
3010                const char *buf, size_t count)
3011 {
3012         struct nct6775_data *data = dev_get_drvdata(dev);
3013         int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
3014         unsigned long val;
3015         u8 reg;
3016         int ret;
3017
3018         if (kstrtoul(buf, 10, &val) || val != 0)
3019                 return -EINVAL;
3020
3021         mutex_lock(&data->update_lock);
3022
3023         /*
3024          * Use CR registers to clear caseopen status.
3025          * The CR registers are the same for all chips, and not all chips
3026          * support clearing the caseopen status through "regular" registers.
3027          */
3028         ret = superio_enter(data->sioreg);
3029         if (ret) {
3030                 count = ret;
3031                 goto error;
3032         }
3033
3034         superio_select(data->sioreg, NCT6775_LD_ACPI);
3035         reg = superio_inb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
3036         reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3037         superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3038         reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3039         superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3040         superio_exit(data->sioreg);
3041
3042         data->valid = false;    /* Force cache refresh */
3043 error:
3044         mutex_unlock(&data->update_lock);
3045         return count;
3046 }
3047
3048 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
3049                           clear_caseopen, INTRUSION_ALARM_BASE);
3050 static SENSOR_DEVICE_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
3051                           clear_caseopen, INTRUSION_ALARM_BASE + 1);
3052 static SENSOR_DEVICE_ATTR(intrusion0_beep, S_IWUSR | S_IRUGO, show_beep,
3053                           store_beep, INTRUSION_ALARM_BASE);
3054 static SENSOR_DEVICE_ATTR(intrusion1_beep, S_IWUSR | S_IRUGO, show_beep,
3055                           store_beep, INTRUSION_ALARM_BASE + 1);
3056 static SENSOR_DEVICE_ATTR(beep_enable, S_IWUSR | S_IRUGO, show_beep,
3057                           store_beep, BEEP_ENABLE_BASE);
3058
3059 static umode_t nct6775_other_is_visible(struct kobject *kobj,
3060                                         struct attribute *attr, int index)
3061 {
3062         struct device *dev = container_of(kobj, struct device, kobj);
3063         struct nct6775_data *data = dev_get_drvdata(dev);
3064
3065         if (index == 1 && !data->have_vid)
3066                 return 0;
3067
3068         if (index == 2 || index == 3) {
3069                 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + index - 2] < 0)
3070                         return 0;
3071         }
3072
3073         if (index == 4 || index == 5) {
3074                 if (data->BEEP_BITS[INTRUSION_ALARM_BASE + index - 4] < 0)
3075                         return 0;
3076         }
3077
3078         return attr->mode;
3079 }
3080
3081 /*
3082  * nct6775_other_is_visible uses the index into the following array
3083  * to determine if attributes should be created or not.
3084  * Any change in order or content must be matched.
3085  */
3086 static struct attribute *nct6775_attributes_other[] = {
3087         &dev_attr_name.attr,
3088         &dev_attr_cpu0_vid.attr,                                /* 1 */
3089         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,        /* 2 */
3090         &sensor_dev_attr_intrusion1_alarm.dev_attr.attr,        /* 3 */
3091         &sensor_dev_attr_intrusion0_beep.dev_attr.attr,         /* 4 */
3092         &sensor_dev_attr_intrusion1_beep.dev_attr.attr,         /* 5 */
3093         &sensor_dev_attr_beep_enable.dev_attr.attr,             /* 6 */
3094
3095         NULL
3096 };
3097
3098 static const struct attribute_group nct6775_group_other = {
3099         .attrs = nct6775_attributes_other,
3100         .is_visible = nct6775_other_is_visible,
3101 };
3102
3103 /*
3104  * Driver and device management
3105  */
3106
3107 static void nct6775_device_remove_files(struct device *dev)
3108 {
3109         struct nct6775_data *data = dev_get_drvdata(dev);
3110
3111         if (data->group_pwm)
3112                 sysfs_remove_group(&dev->kobj, data->group_pwm);
3113         if (data->group_in)
3114                 sysfs_remove_group(&dev->kobj, data->group_in);
3115         if (data->group_fan)
3116                 sysfs_remove_group(&dev->kobj, data->group_fan);
3117         if (data->group_temp)
3118                 sysfs_remove_group(&dev->kobj, data->group_temp);
3119
3120         sysfs_remove_group(&dev->kobj, &nct6775_group_other);
3121 }
3122
3123 /* Get the monitoring functions started */
3124 static inline void nct6775_init_device(struct nct6775_data *data)
3125 {
3126         int i;
3127         u8 tmp, diode;
3128
3129         /* Start monitoring if needed */
3130         if (data->REG_CONFIG) {
3131                 tmp = nct6775_read_value(data, data->REG_CONFIG);
3132                 if (!(tmp & 0x01))
3133                         nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
3134         }
3135
3136         /* Enable temperature sensors if needed */
3137         for (i = 0; i < NUM_TEMP; i++) {
3138                 if (!(data->have_temp & (1 << i)))
3139                         continue;
3140                 if (!data->reg_temp_config[i])
3141                         continue;
3142                 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
3143                 if (tmp & 0x01)
3144                         nct6775_write_value(data, data->reg_temp_config[i],
3145                                             tmp & 0xfe);
3146         }
3147
3148         /* Enable VBAT monitoring if needed */
3149         tmp = nct6775_read_value(data, data->REG_VBAT);
3150         if (!(tmp & 0x01))
3151                 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
3152
3153         diode = nct6775_read_value(data, data->REG_DIODE);
3154
3155         for (i = 0; i < data->temp_fixed_num; i++) {
3156                 if (!(data->have_temp_fixed & (1 << i)))
3157                         continue;
3158                 if ((tmp & (data->DIODE_MASK << i)))    /* diode */
3159                         data->temp_type[i]
3160                           = 3 - ((diode >> i) & data->DIODE_MASK);
3161                 else                            /* thermistor */
3162                         data->temp_type[i] = 4;
3163         }
3164 }
3165
3166 static void
3167 nct6775_check_fan_inputs(struct nct6775_data *data)
3168 {
3169         bool fan3pin, fan4pin, fan4min, fan5pin, fan6pin;
3170         bool pwm3pin, pwm4pin, pwm5pin, pwm6pin;
3171         int sioreg = data->sioreg;
3172         int regval;
3173
3174         /* fan4 and fan5 share some pins with the GPIO and serial flash */
3175         if (data->kind == nct6775) {
3176                 regval = superio_inb(sioreg, 0x2c);
3177
3178                 fan3pin = regval & (1 << 6);
3179                 pwm3pin = regval & (1 << 7);
3180
3181                 /* On NCT6775, fan4 shares pins with the fdc interface */
3182                 fan4pin = !(superio_inb(sioreg, 0x2A) & 0x80);
3183                 fan4min = false;
3184                 fan5pin = false;
3185                 fan6pin = false;
3186                 pwm4pin = false;
3187                 pwm5pin = false;
3188                 pwm6pin = false;
3189         } else if (data->kind == nct6776) {
3190                 bool gpok = superio_inb(sioreg, 0x27) & 0x80;
3191
3192                 superio_select(sioreg, NCT6775_LD_HWM);
3193                 regval = superio_inb(sioreg, SIO_REG_ENABLE);
3194
3195                 if (regval & 0x80)
3196                         fan3pin = gpok;
3197                 else
3198                         fan3pin = !(superio_inb(sioreg, 0x24) & 0x40);
3199
3200                 if (regval & 0x40)
3201                         fan4pin = gpok;
3202                 else
3203                         fan4pin = superio_inb(sioreg, 0x1C) & 0x01;
3204
3205                 if (regval & 0x20)
3206                         fan5pin = gpok;
3207                 else
3208                         fan5pin = superio_inb(sioreg, 0x1C) & 0x02;
3209
3210                 fan4min = fan4pin;
3211                 fan6pin = false;
3212                 pwm3pin = fan3pin;
3213                 pwm4pin = false;
3214                 pwm5pin = false;
3215                 pwm6pin = false;
3216         } else if (data->kind == nct6106) {
3217                 regval = superio_inb(sioreg, 0x24);
3218                 fan3pin = !(regval & 0x80);
3219                 pwm3pin = regval & 0x08;
3220
3221                 fan4pin = false;
3222                 fan4min = false;
3223                 fan5pin = false;
3224                 fan6pin = false;
3225                 pwm4pin = false;
3226                 pwm5pin = false;
3227                 pwm6pin = false;
3228         } else {        /* NCT6779D or NCT6791D */
3229                 regval = superio_inb(sioreg, 0x1c);
3230
3231                 fan3pin = !(regval & (1 << 5));
3232                 fan4pin = !(regval & (1 << 6));
3233                 fan5pin = !(regval & (1 << 7));
3234
3235                 pwm3pin = !(regval & (1 << 0));
3236                 pwm4pin = !(regval & (1 << 1));
3237                 pwm5pin = !(regval & (1 << 2));
3238
3239                 fan4min = fan4pin;
3240
3241                 if (data->kind == nct6791) {
3242                         regval = superio_inb(sioreg, 0x2d);
3243                         fan6pin = (regval & (1 << 1));
3244                         pwm6pin = (regval & (1 << 0));
3245                 } else {        /* NCT6779D */
3246                         fan6pin = false;
3247                         pwm6pin = false;
3248                 }
3249         }
3250
3251         /* fan 1 and 2 (0x03) are always present */
3252         data->has_fan = 0x03 | (fan3pin << 2) | (fan4pin << 3) |
3253                 (fan5pin << 4) | (fan6pin << 5);
3254         data->has_fan_min = 0x03 | (fan3pin << 2) | (fan4min << 3) |
3255                 (fan5pin << 4);
3256         data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) |
3257                 (pwm5pin << 4) | (pwm6pin << 5);
3258 }
3259
3260 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
3261                              int *available, int *mask)
3262 {
3263         int i;
3264         u8 src;
3265
3266         for (i = 0; i < data->pwm_num && *available; i++) {
3267                 int index;
3268
3269                 if (!regp[i])
3270                         continue;
3271                 src = nct6775_read_value(data, regp[i]);
3272                 src &= 0x1f;
3273                 if (!src || (*mask & (1 << src)))
3274                         continue;
3275                 if (src >= data->temp_label_num ||
3276                     !strlen(data->temp_label[src]))
3277                         continue;
3278
3279                 index = __ffs(*available);
3280                 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3281                 *available &= ~(1 << index);
3282                 *mask |= 1 << src;
3283         }
3284 }
3285
3286 static int nct6775_probe(struct platform_device *pdev)
3287 {
3288         struct device *dev = &pdev->dev;
3289         struct nct6775_sio_data *sio_data = dev->platform_data;
3290         struct nct6775_data *data;
3291         struct resource *res;
3292         int i, s, err = 0;
3293         int src, mask, available;
3294         const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3295         const u16 *reg_temp_alternate, *reg_temp_crit;
3296         const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL;
3297         int num_reg_temp;
3298         u8 cr2a;
3299         struct attribute_group *group;
3300
3301         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3302         if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3303                                  DRVNAME))
3304                 return -EBUSY;
3305
3306         data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3307                             GFP_KERNEL);
3308         if (!data)
3309                 return -ENOMEM;
3310
3311         data->kind = sio_data->kind;
3312         data->sioreg = sio_data->sioreg;
3313         data->addr = res->start;
3314         mutex_init(&data->update_lock);
3315         data->name = nct6775_device_names[data->kind];
3316         data->bank = 0xff;              /* Force initial bank selection */
3317         platform_set_drvdata(pdev, data);
3318
3319         switch (data->kind) {
3320         case nct6106:
3321                 data->in_num = 9;
3322                 data->pwm_num = 3;
3323                 data->auto_pwm_num = 4;
3324                 data->temp_fixed_num = 3;
3325                 data->num_temp_alarms = 6;
3326                 data->num_temp_beeps = 6;
3327
3328                 data->fan_from_reg = fan_from_reg13;
3329                 data->fan_from_reg_min = fan_from_reg13;
3330
3331                 data->temp_label = nct6776_temp_label;
3332                 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3333
3334                 data->REG_VBAT = NCT6106_REG_VBAT;
3335                 data->REG_DIODE = NCT6106_REG_DIODE;
3336                 data->DIODE_MASK = NCT6106_DIODE_MASK;
3337                 data->REG_VIN = NCT6106_REG_IN;
3338                 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3339                 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3340                 data->REG_TARGET = NCT6106_REG_TARGET;
3341                 data->REG_FAN = NCT6106_REG_FAN;
3342                 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
3343                 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
3344                 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
3345                 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
3346                 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
3347                 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
3348                 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
3349                 data->REG_PWM[0] = NCT6106_REG_PWM;
3350                 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
3351                 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
3352                 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3353                 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3354                 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3355                 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3356                 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3357                 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
3358                 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
3359                 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
3360                 data->REG_CRITICAL_TEMP_TOLERANCE
3361                   = NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
3362                 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
3363                 data->CRITICAL_PWM_ENABLE_MASK
3364                   = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3365                 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
3366                 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3367                 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3368                 data->REG_TEMP_SEL = NCT6106_REG_TEMP_SEL;
3369                 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3370                 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3371                 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3372                 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3373                 data->REG_ALARM = NCT6106_REG_ALARM;
3374                 data->ALARM_BITS = NCT6106_ALARM_BITS;
3375                 data->REG_BEEP = NCT6106_REG_BEEP;
3376                 data->BEEP_BITS = NCT6106_BEEP_BITS;
3377
3378                 reg_temp = NCT6106_REG_TEMP;
3379                 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3380                 reg_temp_over = NCT6106_REG_TEMP_OVER;
3381                 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3382                 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3383                 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3384                 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3385                 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3386                 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3387
3388                 break;
3389         case nct6775:
3390                 data->in_num = 9;
3391                 data->pwm_num = 3;
3392                 data->auto_pwm_num = 6;
3393                 data->has_fan_div = true;
3394                 data->temp_fixed_num = 3;
3395                 data->num_temp_alarms = 3;
3396                 data->num_temp_beeps = 3;
3397
3398                 data->ALARM_BITS = NCT6775_ALARM_BITS;
3399                 data->BEEP_BITS = NCT6775_BEEP_BITS;
3400
3401                 data->fan_from_reg = fan_from_reg16;
3402                 data->fan_from_reg_min = fan_from_reg8;
3403                 data->target_temp_mask = 0x7f;
3404                 data->tolerance_mask = 0x0f;
3405                 data->speed_tolerance_limit = 15;
3406
3407                 data->temp_label = nct6775_temp_label;
3408                 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
3409
3410                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3411                 data->REG_VBAT = NCT6775_REG_VBAT;
3412                 data->REG_DIODE = NCT6775_REG_DIODE;
3413                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3414                 data->REG_VIN = NCT6775_REG_IN;
3415                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3416                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3417                 data->REG_TARGET = NCT6775_REG_TARGET;
3418                 data->REG_FAN = NCT6775_REG_FAN;
3419                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3420                 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3421                 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3422                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3423                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3424                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3425                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3426                 data->REG_PWM[0] = NCT6775_REG_PWM;
3427                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3428                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3429                 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3430                 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3431                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3432                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3433                 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3434                 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3435                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3436                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3437                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3438                 data->REG_CRITICAL_TEMP_TOLERANCE
3439                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3440                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3441                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3442                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3443                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3444                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3445                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3446                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3447                 data->REG_ALARM = NCT6775_REG_ALARM;
3448                 data->REG_BEEP = NCT6775_REG_BEEP;
3449
3450                 reg_temp = NCT6775_REG_TEMP;
3451                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3452                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3453                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3454                 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3455                 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3456                 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3457
3458                 break;
3459         case nct6776:
3460                 data->in_num = 9;
3461                 data->pwm_num = 3;
3462                 data->auto_pwm_num = 4;
3463                 data->has_fan_div = false;
3464                 data->temp_fixed_num = 3;
3465                 data->num_temp_alarms = 3;
3466                 data->num_temp_beeps = 6;
3467
3468                 data->ALARM_BITS = NCT6776_ALARM_BITS;
3469                 data->BEEP_BITS = NCT6776_BEEP_BITS;
3470
3471                 data->fan_from_reg = fan_from_reg13;
3472                 data->fan_from_reg_min = fan_from_reg13;
3473                 data->target_temp_mask = 0xff;
3474                 data->tolerance_mask = 0x07;
3475                 data->speed_tolerance_limit = 63;
3476
3477                 data->temp_label = nct6776_temp_label;
3478                 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3479
3480                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3481                 data->REG_VBAT = NCT6775_REG_VBAT;
3482                 data->REG_DIODE = NCT6775_REG_DIODE;
3483                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3484                 data->REG_VIN = NCT6775_REG_IN;
3485                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3486                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3487                 data->REG_TARGET = NCT6775_REG_TARGET;
3488                 data->REG_FAN = NCT6775_REG_FAN;
3489                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3490                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3491                 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3492                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3493                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3494                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3495                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3496                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3497                 data->REG_PWM[0] = NCT6775_REG_PWM;
3498                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3499                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3500                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3501                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3502                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3503                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3504                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3505                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3506                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3507                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3508                 data->REG_CRITICAL_TEMP_TOLERANCE
3509                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3510                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3511                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3512                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3513                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3514                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3515                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3516                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3517                 data->REG_ALARM = NCT6775_REG_ALARM;
3518                 data->REG_BEEP = NCT6776_REG_BEEP;
3519
3520                 reg_temp = NCT6775_REG_TEMP;
3521                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3522                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3523                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3524                 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3525                 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3526                 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3527
3528                 break;
3529         case nct6779:
3530                 data->in_num = 15;
3531                 data->pwm_num = 5;
3532                 data->auto_pwm_num = 4;
3533                 data->has_fan_div = false;
3534                 data->temp_fixed_num = 6;
3535                 data->num_temp_alarms = 2;
3536                 data->num_temp_beeps = 2;
3537
3538                 data->ALARM_BITS = NCT6779_ALARM_BITS;
3539                 data->BEEP_BITS = NCT6779_BEEP_BITS;
3540
3541                 data->fan_from_reg = fan_from_reg13;
3542                 data->fan_from_reg_min = fan_from_reg13;
3543                 data->target_temp_mask = 0xff;
3544                 data->tolerance_mask = 0x07;
3545                 data->speed_tolerance_limit = 63;
3546
3547                 data->temp_label = nct6779_temp_label;
3548                 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3549
3550                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3551                 data->REG_VBAT = NCT6775_REG_VBAT;
3552                 data->REG_DIODE = NCT6775_REG_DIODE;
3553                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3554                 data->REG_VIN = NCT6779_REG_IN;
3555                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3556                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3557                 data->REG_TARGET = NCT6775_REG_TARGET;
3558                 data->REG_FAN = NCT6779_REG_FAN;
3559                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3560                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3561                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3562                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3563                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3564                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3565                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3566                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3567                 data->REG_PWM[0] = NCT6775_REG_PWM;
3568                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3569                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3570                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3571                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3572                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3573                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3574                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3575                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3576                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3577                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3578                 data->REG_CRITICAL_TEMP_TOLERANCE
3579                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3580                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3581                 data->CRITICAL_PWM_ENABLE_MASK
3582                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3583                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3584                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3585                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3586                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3587                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3588                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3589                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3590                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3591                 data->REG_ALARM = NCT6779_REG_ALARM;
3592                 data->REG_BEEP = NCT6776_REG_BEEP;
3593
3594                 reg_temp = NCT6779_REG_TEMP;
3595                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3596                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3597                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3598                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3599                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3600                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3601
3602                 break;
3603         case nct6791:
3604                 data->in_num = 15;
3605                 data->pwm_num = 6;
3606                 data->auto_pwm_num = 4;
3607                 data->has_fan_div = false;
3608                 data->temp_fixed_num = 6;
3609                 data->num_temp_alarms = 2;
3610                 data->num_temp_beeps = 2;
3611
3612                 data->ALARM_BITS = NCT6791_ALARM_BITS;
3613                 data->BEEP_BITS = NCT6779_BEEP_BITS;
3614
3615                 data->fan_from_reg = fan_from_reg13;
3616                 data->fan_from_reg_min = fan_from_reg13;
3617                 data->target_temp_mask = 0xff;
3618                 data->tolerance_mask = 0x07;
3619                 data->speed_tolerance_limit = 63;
3620
3621                 data->temp_label = nct6779_temp_label;
3622                 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3623
3624                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3625                 data->REG_VBAT = NCT6775_REG_VBAT;
3626                 data->REG_DIODE = NCT6775_REG_DIODE;
3627                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3628                 data->REG_VIN = NCT6779_REG_IN;
3629                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3630                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3631                 data->REG_TARGET = NCT6775_REG_TARGET;
3632                 data->REG_FAN = NCT6779_REG_FAN;
3633                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3634                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3635                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3636                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3637                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3638                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3639                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3640                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3641                 data->REG_PWM[0] = NCT6775_REG_PWM;
3642                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3643                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3644                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3645                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3646                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3647                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3648                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3649                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3650                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3651                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3652                 data->REG_CRITICAL_TEMP_TOLERANCE
3653                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3654                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3655                 data->CRITICAL_PWM_ENABLE_MASK
3656                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3657                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3658                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3659                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3660                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3661                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3662                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3663                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3664                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3665                 data->REG_ALARM = NCT6791_REG_ALARM;
3666                 data->REG_BEEP = NCT6776_REG_BEEP;
3667
3668                 reg_temp = NCT6779_REG_TEMP;
3669                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3670                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3671                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3672                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3673                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3674                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3675
3676                 break;
3677         default:
3678                 return -ENODEV;
3679         }
3680         data->have_in = (1 << data->in_num) - 1;
3681         data->have_temp = 0;
3682
3683         /*
3684          * On some boards, not all available temperature sources are monitored,
3685          * even though some of the monitoring registers are unused.
3686          * Get list of unused monitoring registers, then detect if any fan
3687          * controls are configured to use unmonitored temperature sources.
3688          * If so, assign the unmonitored temperature sources to available
3689          * monitoring registers.
3690          */
3691         mask = 0;
3692         available = 0;
3693         for (i = 0; i < num_reg_temp; i++) {
3694                 if (reg_temp[i] == 0)
3695                         continue;
3696
3697                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3698                 if (!src || (mask & (1 << src)))
3699                         available |= 1 << i;
3700
3701                 mask |= 1 << src;
3702         }
3703
3704         /*
3705          * Now find unmonitored temperature registers and enable monitoring
3706          * if additional monitoring registers are available.
3707          */
3708         add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
3709         add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
3710
3711         mask = 0;
3712         s = NUM_TEMP_FIXED;     /* First dynamic temperature attribute */
3713         for (i = 0; i < num_reg_temp; i++) {
3714                 if (reg_temp[i] == 0)
3715                         continue;
3716
3717                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3718                 if (!src || (mask & (1 << src)))
3719                         continue;
3720
3721                 if (src >= data->temp_label_num ||
3722                     !strlen(data->temp_label[src])) {
3723                         dev_info(dev,
3724                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3725                                  src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
3726                         continue;
3727                 }
3728
3729                 mask |= 1 << src;
3730
3731                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3732                 if (src <= data->temp_fixed_num) {
3733                         data->have_temp |= 1 << (src - 1);
3734                         data->have_temp_fixed |= 1 << (src - 1);
3735                         data->reg_temp[0][src - 1] = reg_temp[i];
3736                         data->reg_temp[1][src - 1] = reg_temp_over[i];
3737                         data->reg_temp[2][src - 1] = reg_temp_hyst[i];
3738                         if (reg_temp_crit_h && reg_temp_crit_h[i])
3739                                 data->reg_temp[3][src - 1] = reg_temp_crit_h[i];
3740                         else if (reg_temp_crit[src - 1])
3741                                 data->reg_temp[3][src - 1]
3742                                   = reg_temp_crit[src - 1];
3743                         if (reg_temp_crit_l && reg_temp_crit_l[i])
3744                                 data->reg_temp[4][src - 1] = reg_temp_crit_l[i];
3745                         data->reg_temp_config[src - 1] = reg_temp_config[i];
3746                         data->temp_src[src - 1] = src;
3747                         continue;
3748                 }
3749
3750                 if (s >= NUM_TEMP)
3751                         continue;
3752
3753                 /* Use dynamic index for other sources */
3754                 data->have_temp |= 1 << s;
3755                 data->reg_temp[0][s] = reg_temp[i];
3756                 data->reg_temp[1][s] = reg_temp_over[i];
3757                 data->reg_temp[2][s] = reg_temp_hyst[i];
3758                 data->reg_temp_config[s] = reg_temp_config[i];
3759                 if (reg_temp_crit_h && reg_temp_crit_h[i])
3760                         data->reg_temp[3][s] = reg_temp_crit_h[i];
3761                 else if (reg_temp_crit[src - 1])
3762                         data->reg_temp[3][s] = reg_temp_crit[src - 1];
3763                 if (reg_temp_crit_l && reg_temp_crit_l[i])
3764                         data->reg_temp[4][s] = reg_temp_crit_l[i];
3765
3766                 data->temp_src[s] = src;
3767                 s++;
3768         }
3769
3770 #ifdef USE_ALTERNATE
3771         /*
3772          * Go through the list of alternate temp registers and enable
3773          * if possible.
3774          * The temperature is already monitored if the respective bit in <mask>
3775          * is set.
3776          */
3777         for (i = 0; i < data->temp_label_num - 1; i++) {
3778                 if (!reg_temp_alternate[i])
3779                         continue;
3780                 if (mask & (1 << (i + 1)))
3781                         continue;
3782                 if (i < data->temp_fixed_num) {
3783                         if (data->have_temp & (1 << i))
3784                                 continue;
3785                         data->have_temp |= 1 << i;
3786                         data->have_temp_fixed |= 1 << i;
3787                         data->reg_temp[0][i] = reg_temp_alternate[i];
3788                         if (i < num_reg_temp) {
3789                                 data->reg_temp[1][i] = reg_temp_over[i];
3790                                 data->reg_temp[2][i] = reg_temp_hyst[i];
3791                         }
3792                         data->temp_src[i] = i + 1;
3793                         continue;
3794                 }
3795
3796                 if (s >= NUM_TEMP)      /* Abort if no more space */
3797                         break;
3798
3799                 data->have_temp |= 1 << s;
3800                 data->reg_temp[0][s] = reg_temp_alternate[i];
3801                 data->temp_src[s] = i + 1;
3802                 s++;
3803         }
3804 #endif /* USE_ALTERNATE */
3805
3806         /* Initialize the chip */
3807         nct6775_init_device(data);
3808
3809         err = superio_enter(sio_data->sioreg);
3810         if (err)
3811                 return err;
3812
3813         cr2a = superio_inb(sio_data->sioreg, 0x2a);
3814         switch (data->kind) {
3815         case nct6775:
3816                 data->have_vid = (cr2a & 0x40);
3817                 break;
3818         case nct6776:
3819                 data->have_vid = (cr2a & 0x60) == 0x40;
3820                 break;
3821         case nct6106:
3822         case nct6779:
3823         case nct6791:
3824                 break;
3825         }
3826
3827         /*
3828          * Read VID value
3829          * We can get the VID input values directly at logical device D 0xe3.
3830          */
3831         if (data->have_vid) {
3832                 superio_select(sio_data->sioreg, NCT6775_LD_VID);
3833                 data->vid = superio_inb(sio_data->sioreg, 0xe3);
3834                 data->vrm = vid_which_vrm();
3835         }
3836
3837         if (fan_debounce) {
3838                 u8 tmp;
3839
3840                 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3841                 tmp = superio_inb(sio_data->sioreg,
3842                                   NCT6775_REG_CR_FAN_DEBOUNCE);
3843                 switch (data->kind) {
3844                 case nct6106:
3845                         tmp |= 0xe0;
3846                         break;
3847                 case nct6775:
3848                         tmp |= 0x1e;
3849                         break;
3850                 case nct6776:
3851                 case nct6779:
3852                         tmp |= 0x3e;
3853                         break;
3854                 case nct6791:
3855                         tmp |= 0x7e;
3856                         break;
3857                 }
3858                 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
3859                              tmp);
3860                 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
3861                          data->name);
3862         }
3863
3864         nct6775_check_fan_inputs(data);
3865
3866         superio_exit(sio_data->sioreg);
3867
3868         /* Read fan clock dividers immediately */
3869         nct6775_init_fan_common(dev, data);
3870
3871         /* Register sysfs hooks */
3872         group = nct6775_create_attr_group(dev, &nct6775_pwm_template_group,
3873                                           data->pwm_num);
3874         if (IS_ERR(group)) {
3875                 err = PTR_ERR(group);
3876                 goto exit_remove;
3877         }
3878         data->group_pwm = group;
3879
3880         group = nct6775_create_attr_group(dev, &nct6775_in_template_group,
3881                                           fls(data->have_in));
3882         if (IS_ERR(group)) {
3883                 err = PTR_ERR(group);
3884                 goto exit_remove;
3885         }
3886         data->group_in = group;
3887
3888         group = nct6775_create_attr_group(dev, &nct6775_fan_template_group,
3889                                           fls(data->has_fan));
3890         if (IS_ERR(group)) {
3891                 err = PTR_ERR(group);
3892                 goto exit_remove;
3893         }
3894         data->group_fan = group;
3895
3896         group = nct6775_create_attr_group(dev, &nct6775_temp_template_group,
3897                                           fls(data->have_temp));
3898         if (IS_ERR(group)) {
3899                 err = PTR_ERR(group);
3900                 goto exit_remove;
3901         }
3902         data->group_temp = group;
3903
3904         err = sysfs_create_group(&dev->kobj, &nct6775_group_other);
3905         if (err)
3906                 goto exit_remove;
3907
3908         data->hwmon_dev = hwmon_device_register(dev);
3909         if (IS_ERR(data->hwmon_dev)) {
3910                 err = PTR_ERR(data->hwmon_dev);
3911                 goto exit_remove;
3912         }
3913
3914         return 0;
3915
3916 exit_remove:
3917         nct6775_device_remove_files(dev);
3918         return err;
3919 }
3920
3921 static int nct6775_remove(struct platform_device *pdev)
3922 {
3923         struct nct6775_data *data = platform_get_drvdata(pdev);
3924
3925         hwmon_device_unregister(data->hwmon_dev);
3926         nct6775_device_remove_files(&pdev->dev);
3927
3928         return 0;
3929 }
3930
3931 #ifdef CONFIG_PM
3932 static int nct6775_suspend(struct device *dev)
3933 {
3934         struct nct6775_data *data = nct6775_update_device(dev);
3935
3936         mutex_lock(&data->update_lock);
3937         data->vbat = nct6775_read_value(data, data->REG_VBAT);
3938         if (data->kind == nct6775) {
3939                 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
3940                 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
3941         }
3942         mutex_unlock(&data->update_lock);
3943
3944         return 0;
3945 }
3946
3947 static int nct6775_resume(struct device *dev)
3948 {
3949         struct nct6775_data *data = dev_get_drvdata(dev);
3950         int i, j;
3951
3952         mutex_lock(&data->update_lock);
3953         data->bank = 0xff;              /* Force initial bank selection */
3954
3955         /* Restore limits */
3956         for (i = 0; i < data->in_num; i++) {
3957                 if (!(data->have_in & (1 << i)))
3958                         continue;
3959
3960                 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
3961                                     data->in[i][1]);
3962                 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
3963                                     data->in[i][2]);
3964         }
3965
3966         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
3967                 if (!(data->has_fan_min & (1 << i)))
3968                         continue;
3969
3970                 nct6775_write_value(data, data->REG_FAN_MIN[i],
3971                                     data->fan_min[i]);
3972         }
3973
3974         for (i = 0; i < NUM_TEMP; i++) {
3975                 if (!(data->have_temp & (1 << i)))
3976                         continue;
3977
3978                 for (j = 1; j < ARRAY_SIZE(data->reg_temp); j++)
3979                         if (data->reg_temp[j][i])
3980                                 nct6775_write_temp(data, data->reg_temp[j][i],
3981                                                    data->temp[j][i]);
3982         }
3983
3984         /* Restore other settings */
3985         nct6775_write_value(data, data->REG_VBAT, data->vbat);
3986         if (data->kind == nct6775) {
3987                 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
3988                 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
3989         }
3990
3991         /* Force re-reading all values */
3992         data->valid = false;
3993         mutex_unlock(&data->update_lock);
3994
3995         return 0;
3996 }
3997
3998 static const struct dev_pm_ops nct6775_dev_pm_ops = {
3999         .suspend = nct6775_suspend,
4000         .resume = nct6775_resume,
4001 };
4002
4003 #define NCT6775_DEV_PM_OPS      (&nct6775_dev_pm_ops)
4004 #else
4005 #define NCT6775_DEV_PM_OPS      NULL
4006 #endif /* CONFIG_PM */
4007
4008 static struct platform_driver nct6775_driver = {
4009         .driver = {
4010                 .owner  = THIS_MODULE,
4011                 .name   = DRVNAME,
4012                 .pm     = NCT6775_DEV_PM_OPS,
4013         },
4014         .probe          = nct6775_probe,
4015         .remove         = nct6775_remove,
4016 };
4017
4018 static const char * const nct6775_sio_names[] __initconst = {
4019         "NCT6106D",
4020         "NCT6775F",
4021         "NCT6776D/F",
4022         "NCT6779D",
4023         "NCT6791D",
4024 };
4025
4026 /* nct6775_find() looks for a '627 in the Super-I/O config space */
4027 static int __init nct6775_find(int sioaddr, struct nct6775_sio_data *sio_data)
4028 {
4029         u16 val;
4030         int err;
4031         int addr;
4032
4033         err = superio_enter(sioaddr);
4034         if (err)
4035                 return err;
4036
4037         if (force_id)
4038                 val = force_id;
4039         else
4040                 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
4041                     | superio_inb(sioaddr, SIO_REG_DEVID + 1);
4042         switch (val & SIO_ID_MASK) {
4043         case SIO_NCT6106_ID:
4044                 sio_data->kind = nct6106;
4045                 break;
4046         case SIO_NCT6775_ID:
4047                 sio_data->kind = nct6775;
4048                 break;
4049         case SIO_NCT6776_ID:
4050                 sio_data->kind = nct6776;
4051                 break;
4052         case SIO_NCT6779_ID:
4053                 sio_data->kind = nct6779;
4054                 break;
4055         case SIO_NCT6791_ID:
4056                 sio_data->kind = nct6791;
4057                 break;
4058         default:
4059                 if (val != 0xffff)
4060                         pr_debug("unsupported chip ID: 0x%04x\n", val);
4061                 superio_exit(sioaddr);
4062                 return -ENODEV;
4063         }
4064
4065         /* We have a known chip, find the HWM I/O address */
4066         superio_select(sioaddr, NCT6775_LD_HWM);
4067         val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
4068             | superio_inb(sioaddr, SIO_REG_ADDR + 1);
4069         addr = val & IOREGION_ALIGNMENT;
4070         if (addr == 0) {
4071                 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
4072                 superio_exit(sioaddr);
4073                 return -ENODEV;
4074         }
4075
4076         /* Activate logical device if needed */
4077         val = superio_inb(sioaddr, SIO_REG_ENABLE);
4078         if (!(val & 0x01)) {
4079                 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
4080                 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
4081         }
4082         if (sio_data->kind == nct6791) {
4083                 val = superio_inb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE);
4084                 if (val & 0x10) {
4085                         pr_info("Enabling hardware monitor logical device mappings.\n");
4086                         superio_outb(sioaddr,
4087                                      NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE,
4088                                      val & ~0x10);
4089                 }
4090         }
4091
4092         superio_exit(sioaddr);
4093         pr_info("Found %s or compatible chip at %#x:%#x\n",
4094                 nct6775_sio_names[sio_data->kind], sioaddr, addr);
4095         sio_data->sioreg = sioaddr;
4096
4097         return addr;
4098 }
4099
4100 /*
4101  * when Super-I/O functions move to a separate file, the Super-I/O
4102  * bus will manage the lifetime of the device and this module will only keep
4103  * track of the nct6775 driver. But since we platform_device_alloc(), we
4104  * must keep track of the device
4105  */
4106 static struct platform_device *pdev[2];
4107
4108 static int __init sensors_nct6775_init(void)
4109 {
4110         int i, err;
4111         bool found = false;
4112         int address;
4113         struct resource res;
4114         struct nct6775_sio_data sio_data;
4115         int sioaddr[2] = { 0x2e, 0x4e };
4116
4117         err = platform_driver_register(&nct6775_driver);
4118         if (err)
4119                 return err;
4120
4121         /*
4122          * initialize sio_data->kind and sio_data->sioreg.
4123          *
4124          * when Super-I/O functions move to a separate file, the Super-I/O
4125          * driver will probe 0x2e and 0x4e and auto-detect the presence of a
4126          * nct6775 hardware monitor, and call probe()
4127          */
4128         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4129                 address = nct6775_find(sioaddr[i], &sio_data);
4130                 if (address <= 0)
4131                         continue;
4132
4133                 found = true;
4134
4135                 pdev[i] = platform_device_alloc(DRVNAME, address);
4136                 if (!pdev[i]) {
4137                         err = -ENOMEM;
4138                         goto exit_device_put;
4139                 }
4140
4141                 err = platform_device_add_data(pdev[i], &sio_data,
4142                                                sizeof(struct nct6775_sio_data));
4143                 if (err)
4144                         goto exit_device_put;
4145
4146                 memset(&res, 0, sizeof(res));
4147                 res.name = DRVNAME;
4148                 res.start = address + IOREGION_OFFSET;
4149                 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
4150                 res.flags = IORESOURCE_IO;
4151
4152                 err = acpi_check_resource_conflict(&res);
4153                 if (err) {
4154                         platform_device_put(pdev[i]);
4155                         pdev[i] = NULL;
4156                         continue;
4157                 }
4158
4159                 err = platform_device_add_resources(pdev[i], &res, 1);
4160                 if (err)
4161                         goto exit_device_put;
4162
4163                 /* platform_device_add calls probe() */
4164                 err = platform_device_add(pdev[i]);
4165                 if (err)
4166                         goto exit_device_put;
4167         }
4168         if (!found) {
4169                 err = -ENODEV;
4170                 goto exit_unregister;
4171         }
4172
4173         return 0;
4174
4175 exit_device_put:
4176         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4177                 if (pdev[i])
4178                         platform_device_put(pdev[i]);
4179         }
4180 exit_unregister:
4181         platform_driver_unregister(&nct6775_driver);
4182         return err;
4183 }
4184
4185 static void __exit sensors_nct6775_exit(void)
4186 {
4187         int i;
4188
4189         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4190                 if (pdev[i])
4191                         platform_device_unregister(pdev[i]);
4192         }
4193         platform_driver_unregister(&nct6775_driver);
4194 }
4195
4196 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4197 MODULE_DESCRIPTION("NCT6775F/NCT6776F/NCT6779D driver");
4198 MODULE_LICENSE("GPL");
4199
4200 module_init(sensors_nct6775_init);
4201 module_exit(sensors_nct6775_exit);