git.sur5r.net Git - groeck-nct6775/blob - nct6775.c

   1 /*
   2  * nct6775 - Driver for the hardware monitoring functionality of
   3  *             Nuvoton NCT677x Super-I/O chips
   4  *
   5  * Copyright (C) 2012  Guenter Roeck <linux@roeck-us.net>
   6  *
   7  * Derived from w83627ehf driver
   8  * Copyright (C) 2005-2012  Jean Delvare <khali@linux-fr.org>
   9  * Copyright (C) 2006  Yuan Mu (Winbond),
  10  *                     Rudolf Marek <r.marek@assembler.cz>
  11  *                     David Hubbard <david.c.hubbard@gmail.com>
  12  *                     Daniel J Blueman <daniel.blueman@gmail.com>
  13  * Copyright (C) 2010  Sheng-Yuan Huang (Nuvoton) (PS00)
  14  *
  15  * Shamelessly ripped from the w83627hf driver
  16  * Copyright (C) 2003  Mark Studebaker
  17  *
  18  * This program is free software; you can redistribute it and/or modify
  19  * it under the terms of the GNU General Public License as published by
  20  * the Free Software Foundation; either version 2 of the License, or
  21  * (at your option) any later version.
  22  *
  23  * This program is distributed in the hope that it will be useful,
  24  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26  * GNU General Public License for more details.
  27  *
  28  * You should have received a copy of the GNU General Public License
  29  * along with this program; if not, write to the Free Software
  30  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  31  *
  32  *
  33  * Supports the following chips:
  34  *
  35  * Chip        #vin    #fan    #pwm    #temp  chip IDs       man ID
  36  * nct6106d     9      3       3       6+3    0xc450 0xc1    0x5ca3
  37  * nct6775f     9      4       3       6+3    0xb470 0xc1    0x5ca3
  38  * nct6776f     9      5       3       6+3    0xc330 0xc1    0x5ca3
  39  * nct6779d    15      5       5       2+6    0xc560 0xc1    0x5ca3
  40  * nct6791d    15      6       6       2+6    0xc800 0xc1    0x5ca3
  41  * nct6792d    15      6       6       2+6    0xc911 0xc1    0x5ca3
  42  *
  43  * #temp lists the number of monitored temperature sources (first value) plus
  44  * the number of directly connectable temperature sensors (second value).
  45  */
  46
  47 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  48
  49 #include <linux/module.h>
  50 #include <linux/init.h>
  51 #include <linux/slab.h>
  52 #include <linux/jiffies.h>
  53 #include <linux/platform_device.h>
  54 #include <linux/hwmon.h>
  55 #include <linux/hwmon-sysfs.h>
  56 #include <linux/hwmon-vid.h>
  57 #include <linux/err.h>
  58 #include <linux/mutex.h>
  59 #include <linux/acpi.h>
  60 #include <linux/io.h>
  61 #include "lm75.h"
  62 #include "compat.h"
  63
  64 #define USE_ALTERNATE
  65
  66 enum kinds { nct6106, nct6775, nct6776, nct6779, nct6791, nct6792 };
  67
  68 /* used to set data->name = nct6775_device_names[data->sio_kind] */
  69 static const char * const nct6775_device_names[] = {
  70         "nct6106",
  71         "nct6775",
  72         "nct6776",
  73         "nct6779",
  74         "nct6791",
  75         "nct6792",
  76 };
  77
  78 static unsigned short force_id;
  79 module_param(force_id, ushort, 0);
  80 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  81
  82 static unsigned short fan_debounce;
  83 module_param(fan_debounce, ushort, 0);
  84 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
  85
  86 #define DRVNAME "nct6775"
  87
  88 /*
  89  * Super-I/O constants and functions
  90  */
  91
  92 #define NCT6775_LD_ACPI         0x0a
  93 #define NCT6775_LD_HWM          0x0b
  94 #define NCT6775_LD_VID          0x0d
  95
  96 #define SIO_REG_LDSEL           0x07    /* Logical device select */
  97 #define SIO_REG_DEVID           0x20    /* Device ID (2 bytes) */
  98 #define SIO_REG_ENABLE          0x30    /* Logical device enable */
  99 #define SIO_REG_ADDR            0x60    /* Logical device address (2 bytes) */
 100
 101 #define SIO_NCT6106_ID          0xc450
 102 #define SIO_NCT6775_ID          0xb470
 103 #define SIO_NCT6776_ID          0xc330
 104 #define SIO_NCT6779_ID          0xc560
 105 #define SIO_NCT6791_ID          0xc800
 106 #define SIO_NCT6792_ID          0xc910
 107 #define SIO_ID_MASK             0xFFF0
 108
 109 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
 110
 111 static inline void
 112 superio_outb(int ioreg, int reg, int val)
 113 {
 114         outb(reg, ioreg);
 115         outb(val, ioreg + 1);
 116 }
 117
 118 static inline int
 119 superio_inb(int ioreg, int reg)
 120 {
 121         outb(reg, ioreg);
 122         return inb(ioreg + 1);
 123 }
 124
 125 static inline void
 126 superio_select(int ioreg, int ld)
 127 {
 128         outb(SIO_REG_LDSEL, ioreg);
 129         outb(ld, ioreg + 1);
 130 }
 131
 132 static inline int
 133 superio_enter(int ioreg)
 134 {
 135         /*
 136          * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
 137          */
 138         if (!request_muxed_region(ioreg, 2, DRVNAME))
 139                 return -EBUSY;
 140
 141         outb(0x87, ioreg);
 142         outb(0x87, ioreg);
 143
 144         return 0;
 145 }
 146
 147 static inline void
 148 superio_exit(int ioreg)
 149 {
 150         outb(0xaa, ioreg);
 151         outb(0x02, ioreg);
 152         outb(0x02, ioreg + 1);
 153         release_region(ioreg, 2);
 154 }
 155
 156 /*
 157  * ISA constants
 158  */
 159
 160 #define IOREGION_ALIGNMENT      (~7)
 161 #define IOREGION_OFFSET         5
 162 #define IOREGION_LENGTH         2
 163 #define ADDR_REG_OFFSET         0
 164 #define DATA_REG_OFFSET         1
 165
 166 #define NCT6775_REG_BANK        0x4E
 167 #define NCT6775_REG_CONFIG      0x40
 168
 169 /*
 170  * Not currently used:
 171  * REG_MAN_ID has the value 0x5ca3 for all supported chips.
 172  * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
 173  * REG_MAN_ID is at port 0x4f
 174  * REG_CHIP_ID is at port 0x58
 175  */
 176
 177 #define NUM_TEMP        10      /* Max number of temp attribute sets w/ limits*/
 178 #define NUM_TEMP_FIXED  6       /* Max number of fixed temp attribute sets */
 179
 180 #define NUM_REG_ALARM   7       /* Max number of alarm registers */
 181 #define NUM_REG_BEEP    5       /* Max number of beep registers */
 182
 183 #define NUM_FAN         6
 184
 185 /* Common and NCT6775 specific data */
 186
 187 /* Voltage min/max registers for nr=7..14 are in bank 5 */
 188
 189 static const u16 NCT6775_REG_IN_MAX[] = {
 190         0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
 191         0x55c, 0x55e, 0x560, 0x562 };
 192 static const u16 NCT6775_REG_IN_MIN[] = {
 193         0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
 194         0x55d, 0x55f, 0x561, 0x563 };
 195 static const u16 NCT6775_REG_IN[] = {
 196         0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
 197 };
 198
 199 #define NCT6775_REG_VBAT                0x5D
 200 #define NCT6775_REG_DIODE               0x5E
 201 #define NCT6775_DIODE_MASK              0x02
 202
 203 #define NCT6775_REG_FANDIV1             0x506
 204 #define NCT6775_REG_FANDIV2             0x507
 205
 206 #define NCT6775_REG_CR_FAN_DEBOUNCE     0xf0
 207
 208 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
 209
 210 /* 0..15 voltages, 16..23 fans, 24..29 temperatures, 30..31 intrusion */
 211
 212 static const s8 NCT6775_ALARM_BITS[] = {
 213         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 214         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 215         -1,                             /* unused */
 216         6, 7, 11, -1, -1,               /* fan1..fan5 */
 217         -1, -1, -1,                     /* unused */
 218         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 219         12, -1 };                       /* intrusion0, intrusion1 */
 220
 221 #define FAN_ALARM_BASE          16
 222 #define TEMP_ALARM_BASE         24
 223 #define INTRUSION_ALARM_BASE    30
 224
 225 static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e };
 226
 227 /*
 228  * 0..14 voltages, 15 global beep enable, 16..23 fans, 24..29 temperatures,
 229  * 30..31 intrusion
 230  */
 231 static const s8 NCT6775_BEEP_BITS[] = {
 232         0, 1, 2, 3, 8, 9, 10, 16,       /* in0.. in7 */
 233         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 234         21,                             /* global beep enable */
 235         6, 7, 11, 28, -1,               /* fan1..fan5 */
 236         -1, -1, -1,                     /* unused */
 237         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 238         12, -1 };                       /* intrusion0, intrusion1 */
 239
 240 #define BEEP_ENABLE_BASE                15
 241
 242 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
 243 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
 244
 245 /* DC or PWM output fan configuration */
 246 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
 247 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
 248
 249 /* Advanced Fan control, some values are common for all fans */
 250
 251 static const u16 NCT6775_REG_TARGET[] = {
 252         0x101, 0x201, 0x301, 0x801, 0x901, 0xa01 };
 253 static const u16 NCT6775_REG_FAN_MODE[] = {
 254         0x102, 0x202, 0x302, 0x802, 0x902, 0xa02 };
 255 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
 256         0x103, 0x203, 0x303, 0x803, 0x903, 0xa03 };
 257 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
 258         0x104, 0x204, 0x304, 0x804, 0x904, 0xa04 };
 259 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
 260         0x105, 0x205, 0x305, 0x805, 0x905, 0xa05 };
 261 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = {
 262         0x106, 0x206, 0x306, 0x806, 0x906, 0xa06 };
 263 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
 264 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
 265
 266 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
 267         0x107, 0x207, 0x307, 0x807, 0x907, 0xa07 };
 268 static const u16 NCT6775_REG_PWM[] = {
 269         0x109, 0x209, 0x309, 0x809, 0x909, 0xa09 };
 270 static const u16 NCT6775_REG_PWM_READ[] = {
 271         0x01, 0x03, 0x11, 0x13, 0x15, 0xa09 };
 272
 273 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
 274 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
 275 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
 276 static const u16 NCT6775_FAN_PULSE_SHIFT[] = { 0, 0, 0, 0, 0, 0 };
 277
 278 static const u16 NCT6775_REG_TEMP[] = {
 279         0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
 280
 281 static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77 };
 282
 283 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 284         0, 0x152, 0x252, 0x628, 0x629, 0x62A };
 285 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 286         0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
 287 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 288         0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
 289
 290 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 291         0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
 292
 293 static const u16 NCT6775_REG_TEMP_SEL[] = {
 294         0x100, 0x200, 0x300, 0x800, 0x900, 0xa00 };
 295
 296 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
 297         0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 };
 298 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
 299         0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a };
 300 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
 301         0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b };
 302 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
 303         0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c };
 304 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
 305         0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d };
 306
 307 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
 308
 309 static const u16 NCT6775_REG_AUTO_TEMP[] = {
 310         0x121, 0x221, 0x321, 0x821, 0x921, 0xa21 };
 311 static const u16 NCT6775_REG_AUTO_PWM[] = {
 312         0x127, 0x227, 0x327, 0x827, 0x927, 0xa27 };
 313
 314 #define NCT6775_AUTO_TEMP(data, nr, p)  ((data)->REG_AUTO_TEMP[nr] + (p))
 315 #define NCT6775_AUTO_PWM(data, nr, p)   ((data)->REG_AUTO_PWM[nr] + (p))
 316
 317 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
 318
 319 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
 320         0x135, 0x235, 0x335, 0x835, 0x935, 0xa35 };
 321 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
 322         0x138, 0x238, 0x338, 0x838, 0x938, 0xa38 };
 323
 324 static const char *const nct6775_temp_label[] = {
 325         "",
 326         "SYSTIN",
 327         "CPUTIN",
 328         "AUXTIN",
 329         "AMD SB-TSI",
 330         "PECI Agent 0",
 331         "PECI Agent 1",
 332         "PECI Agent 2",
 333         "PECI Agent 3",
 334         "PECI Agent 4",
 335         "PECI Agent 5",
 336         "PECI Agent 6",
 337         "PECI Agent 7",
 338         "PCH_CHIP_CPU_MAX_TEMP",
 339         "PCH_CHIP_TEMP",
 340         "PCH_CPU_TEMP",
 341         "PCH_MCH_TEMP",
 342         "PCH_DIM0_TEMP",
 343         "PCH_DIM1_TEMP",
 344         "PCH_DIM2_TEMP",
 345         "PCH_DIM3_TEMP"
 346 };
 347
 348 static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
 349         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
 350
 351 static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
 352         = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
 353             0xa07 };
 354
 355 /* NCT6776 specific data */
 356
 357 static const s8 NCT6776_ALARM_BITS[] = {
 358         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 359         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 360         -1,                             /* unused */
 361         6, 7, 11, 10, 23,               /* fan1..fan5 */
 362         -1, -1, -1,                     /* unused */
 363         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 364         12, 9 };                        /* intrusion0, intrusion1 */
 365
 366 static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5 };
 367
 368 static const s8 NCT6776_BEEP_BITS[] = {
 369         0, 1, 2, 3, 4, 5, 6, 7,         /* in0.. in7 */
 370         8, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 371         24,                             /* global beep enable */
 372         25, 26, 27, 28, 29,             /* fan1..fan5 */
 373         -1, -1, -1,                     /* unused */
 374         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 375         30, 31 };                       /* intrusion0, intrusion1 */
 376
 377 static const u16 NCT6776_REG_TOLERANCE_H[] = {
 378         0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c };
 379
 380 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0 };
 381 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0 };
 382
 383 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
 384 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
 385
 386 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
 387         0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e };
 388
 389 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 390         0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
 391
 392 static const char *const nct6776_temp_label[] = {
 393         "",
 394         "SYSTIN",
 395         "CPUTIN",
 396         "AUXTIN",
 397         "SMBUSMASTER 0",
 398         "SMBUSMASTER 1",
 399         "SMBUSMASTER 2",
 400         "SMBUSMASTER 3",
 401         "SMBUSMASTER 4",
 402         "SMBUSMASTER 5",
 403         "SMBUSMASTER 6",
 404         "SMBUSMASTER 7",
 405         "PECI Agent 0",
 406         "PECI Agent 1",
 407         "PCH_CHIP_CPU_MAX_TEMP",
 408         "PCH_CHIP_TEMP",
 409         "PCH_CPU_TEMP",
 410         "PCH_MCH_TEMP",
 411         "PCH_DIM0_TEMP",
 412         "PCH_DIM1_TEMP",
 413         "PCH_DIM2_TEMP",
 414         "PCH_DIM3_TEMP",
 415         "BYTE_TEMP"
 416 };
 417
 418 static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
 419         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
 420
 421 static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
 422         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
 423
 424 /* NCT6779 specific data */
 425
 426 static const u16 NCT6779_REG_IN[] = {
 427         0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
 428         0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
 429
 430 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
 431         0x459, 0x45A, 0x45B, 0x568 };
 432
 433 static const s8 NCT6779_ALARM_BITS[] = {
 434         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 435         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 436         -1,                             /* unused */
 437         6, 7, 11, 10, 23,               /* fan1..fan5 */
 438         -1, -1, -1,                     /* unused */
 439         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 440         12, 9 };                        /* intrusion0, intrusion1 */
 441
 442 static const s8 NCT6779_BEEP_BITS[] = {
 443         0, 1, 2, 3, 4, 5, 6, 7,         /* in0.. in7 */
 444         8, 9, 10, 11, 12, 13, 14,       /* in8..in14 */
 445         24,                             /* global beep enable */
 446         25, 26, 27, 28, 29,             /* fan1..fan5 */
 447         -1, -1, -1,                     /* unused */
 448         16, 17, -1, -1, -1, -1,         /* temp1..temp6 */
 449         30, 31 };                       /* intrusion0, intrusion1 */
 450
 451 static const u16 NCT6779_REG_FAN[] = {
 452         0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8, 0x4ba };
 453 static const u16 NCT6779_REG_FAN_PULSES[] = {
 454         0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
 455
 456 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
 457         0x136, 0x236, 0x336, 0x836, 0x936, 0xa36 };
 458 #define NCT6779_CRITICAL_PWM_ENABLE_MASK        0x01
 459 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
 460         0x137, 0x237, 0x337, 0x837, 0x937, 0xa37 };
 461
 462 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
 463 static const u16 NCT6779_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b };
 464 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 465         0x18, 0x152 };
 466 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 467         0x3a, 0x153 };
 468 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 469         0x39, 0x155 };
 470
 471 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
 472         0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
 473
 474 static const char *const nct6779_temp_label[] = {
 475         "",
 476         "SYSTIN",
 477         "CPUTIN",
 478         "AUXTIN0",
 479         "AUXTIN1",
 480         "AUXTIN2",
 481         "AUXTIN3",
 482         "",
 483         "SMBUSMASTER 0",
 484         "SMBUSMASTER 1",
 485         "SMBUSMASTER 2",
 486         "SMBUSMASTER 3",
 487         "SMBUSMASTER 4",
 488         "SMBUSMASTER 5",
 489         "SMBUSMASTER 6",
 490         "SMBUSMASTER 7",
 491         "PECI Agent 0",
 492         "PECI Agent 1",
 493         "PCH_CHIP_CPU_MAX_TEMP",
 494         "PCH_CHIP_TEMP",
 495         "PCH_CPU_TEMP",
 496         "PCH_MCH_TEMP",
 497         "PCH_DIM0_TEMP",
 498         "PCH_DIM1_TEMP",
 499         "PCH_DIM2_TEMP",
 500         "PCH_DIM3_TEMP",
 501         "BYTE_TEMP"
 502 };
 503
 504 static const u16 NCT6779_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6779_temp_label) - 1]
 505         = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
 506             0, 0, 0, 0, 0, 0, 0, 0,
 507             0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
 508             0x408, 0 };
 509
 510 static const u16 NCT6779_REG_TEMP_CRIT[ARRAY_SIZE(nct6779_temp_label) - 1]
 511         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
 512
 513 /* NCT6791 specific data */
 514
 515 #define NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE     0x28
 516
 517 static const u16 NCT6791_REG_WEIGHT_TEMP_SEL[6] = { 0, 0x239 };
 518 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP[6] = { 0, 0x23a };
 519 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP_TOL[6] = { 0, 0x23b };
 520 static const u16 NCT6791_REG_WEIGHT_DUTY_STEP[6] = { 0, 0x23c };
 521 static const u16 NCT6791_REG_WEIGHT_TEMP_BASE[6] = { 0, 0x23d };
 522 static const u16 NCT6791_REG_WEIGHT_DUTY_BASE[6] = { 0, 0x23e };
 523
 524 static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = {
 525         0x459, 0x45A, 0x45B, 0x568, 0x45D };
 526
 527 static const s8 NCT6791_ALARM_BITS[] = {
 528         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 529         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 530         -1,                             /* unused */
 531         6, 7, 11, 10, 23, 33,           /* fan1..fan6 */
 532         -1, -1,                         /* unused */
 533         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 534         12, 9 };                        /* intrusion0, intrusion1 */
 535
 536 /* NCT6792 specific data */
 537
 538 static const u16 NCT6792_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d };
 539 static const u16 NCT6792_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5, 0xbf };
 540
 541 /* NCT6102D/NCT6106D specific data */
 542
 543 #define NCT6106_REG_VBAT        0x318
 544 #define NCT6106_REG_DIODE       0x319
 545 #define NCT6106_DIODE_MASK      0x01
 546
 547 static const u16 NCT6106_REG_IN_MAX[] = {
 548         0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
 549 static const u16 NCT6106_REG_IN_MIN[] = {
 550         0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
 551 static const u16 NCT6106_REG_IN[] = {
 552         0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
 553
 554 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
 555 static const u16 NCT6106_REG_TEMP_MON[] = { 0x18, 0x19, 0x1a };
 556 static const u16 NCT6106_REG_TEMP_HYST[] = {
 557         0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
 558 static const u16 NCT6106_REG_TEMP_OVER[] = {
 559         0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
 560 static const u16 NCT6106_REG_TEMP_CRIT_L[] = {
 561         0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
 562 static const u16 NCT6106_REG_TEMP_CRIT_H[] = {
 563         0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
 564 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
 565 static const u16 NCT6106_REG_TEMP_CONFIG[] = {
 566         0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
 567
 568 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
 569 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
 570 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0, 0 };
 571 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4, 0, 0 };
 572
 573 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
 574 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
 575 static const u16 NCT6106_REG_PWM[] = { 0x119, 0x129, 0x139 };
 576 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c };
 577 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
 578 static const u16 NCT6106_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130 };
 579 static const u16 NCT6106_REG_TEMP_SOURCE[] = {
 580         0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
 581
 582 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
 583 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = {
 584         0x11b, 0x12b, 0x13b };
 585
 586 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
 587 #define NCT6106_CRITICAL_PWM_ENABLE_MASK        0x10
 588 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
 589
 590 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
 591 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
 592 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
 593 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
 594 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
 595 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
 596
 597 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
 598
 599 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
 600 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
 601 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
 602 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x17c };
 603 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
 604 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
 605
 606 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
 607 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
 608
 609 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = {
 610         0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
 611
 612 static const s8 NCT6106_ALARM_BITS[] = {
 613         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 614         9, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 615         -1,                             /* unused */
 616         32, 33, 34, -1, -1,             /* fan1..fan5 */
 617         -1, -1, -1,                     /* unused */
 618         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 619         48, -1                          /* intrusion0, intrusion1 */
 620 };
 621
 622 static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = {
 623         0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 };
 624
 625 static const s8 NCT6106_BEEP_BITS[] = {
 626         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 627         9, 10, 11, 12, -1, -1, -1,      /* in8..in14 */
 628         32,                             /* global beep enable */
 629         24, 25, 26, 27, 28,             /* fan1..fan5 */
 630         -1, -1, -1,                     /* unused */
 631         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 632         34, -1                          /* intrusion0, intrusion1 */
 633 };
 634
 635 static const u16 NCT6106_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
 636         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x51, 0x52, 0x54 };
 637
 638 static const u16 NCT6106_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
 639         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x204, 0x205 };
 640
 641 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
 642 {
 643         if (mode == 0 && pwm == 255)
 644                 return off;
 645         return mode + 1;
 646 }
 647
 648 static int pwm_enable_to_reg(enum pwm_enable mode)
 649 {
 650         if (mode == off)
 651                 return 0;
 652         return mode - 1;
 653 }
 654
 655 /*
 656  * Conversions
 657  */
 658
 659 /* 1 is DC mode, output in ms */
 660 static unsigned int step_time_from_reg(u8 reg, u8 mode)
 661 {
 662         return mode ? 400 * reg : 100 * reg;
 663 }
 664
 665 static u8 step_time_to_reg(unsigned int msec, u8 mode)
 666 {
 667         return clamp_val((mode ? (msec + 200) / 400 :
 668                                         (msec + 50) / 100), 1, 255);
 669 }
 670
 671 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
 672 {
 673         if (reg == 0 || reg == 255)
 674                 return 0;
 675         return 1350000U / (reg << divreg);
 676 }
 677
 678 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
 679 {
 680         if ((reg & 0xff1f) == 0xff1f)
 681                 return 0;
 682
 683         reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
 684
 685         if (reg == 0)
 686                 return 0;
 687
 688         return 1350000U / reg;
 689 }
 690
 691 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
 692 {
 693         if (reg == 0 || reg == 0xffff)
 694                 return 0;
 695
 696         /*
 697          * Even though the registers are 16 bit wide, the fan divisor
 698          * still applies.
 699          */
 700         return 1350000U / (reg << divreg);
 701 }
 702
 703 static u16 fan_to_reg(u32 fan, unsigned int divreg)
 704 {
 705         if (!fan)
 706                 return 0;
 707
 708         return (1350000U / fan) >> divreg;
 709 }
 710
 711 static inline unsigned int
 712 div_from_reg(u8 reg)
 713 {
 714         return 1 << reg;
 715 }
 716
 717 /*
 718  * Some of the voltage inputs have internal scaling, the tables below
 719  * contain 8 (the ADC LSB in mV) * scaling factor * 100
 720  */
 721 static const u16 scale_in[15] = {
 722         800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
 723         800, 800
 724 };
 725
 726 static inline long in_from_reg(u8 reg, u8 nr)
 727 {
 728         return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
 729 }
 730
 731 static inline u8 in_to_reg(u32 val, u8 nr)
 732 {
 733         return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
 734 }
 735
 736 /*
 737  * Data structures and manipulation thereof
 738  */
 739
 740 struct nct6775_data {
 741         int addr;       /* IO base of hw monitor block */
 742         int sioreg;     /* SIO register address */
 743         enum kinds kind;
 744         const char *name;
 745
 746 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
 747         struct device *hwmon_dev;
 748 #endif
 749
 750         int num_attr_groups;
 751         const struct attribute_group *groups[6];
 752
 753         u16 reg_temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 754                                     * 3=temp_crit, 4=temp_lcrit
 755                                     */
 756         u8 temp_src[NUM_TEMP];
 757         u16 reg_temp_config[NUM_TEMP];
 758         const char * const *temp_label;
 759         int temp_label_num;
 760
 761         u16 REG_CONFIG;
 762         u16 REG_VBAT;
 763         u16 REG_DIODE;
 764         u8 DIODE_MASK;
 765
 766         const s8 *ALARM_BITS;
 767         const s8 *BEEP_BITS;
 768
 769         const u16 *REG_VIN;
 770         const u16 *REG_IN_MINMAX[2];
 771
 772         const u16 *REG_TARGET;
 773         const u16 *REG_FAN;
 774         const u16 *REG_FAN_MODE;
 775         const u16 *REG_FAN_MIN;
 776         const u16 *REG_FAN_PULSES;
 777         const u16 *FAN_PULSE_SHIFT;
 778         const u16 *REG_FAN_TIME[3];
 779
 780         const u16 *REG_TOLERANCE_H;
 781
 782         const u8 *REG_PWM_MODE;
 783         const u8 *PWM_MODE_MASK;
 784
 785         const u16 *REG_PWM[7];  /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 786                                  * [3]=pwm_max, [4]=pwm_step,
 787                                  * [5]=weight_duty_step, [6]=weight_duty_base
 788                                  */
 789         const u16 *REG_PWM_READ;
 790
 791         const u16 *REG_CRITICAL_PWM_ENABLE;
 792         u8 CRITICAL_PWM_ENABLE_MASK;
 793         const u16 *REG_CRITICAL_PWM;
 794
 795         const u16 *REG_AUTO_TEMP;
 796         const u16 *REG_AUTO_PWM;
 797
 798         const u16 *REG_CRITICAL_TEMP;
 799         const u16 *REG_CRITICAL_TEMP_TOLERANCE;
 800
 801         const u16 *REG_TEMP_SOURCE;     /* temp register sources */
 802         const u16 *REG_TEMP_SEL;
 803         const u16 *REG_WEIGHT_TEMP_SEL;
 804         const u16 *REG_WEIGHT_TEMP[3];  /* 0=base, 1=tolerance, 2=step */
 805
 806         const u16 *REG_TEMP_OFFSET;
 807
 808         const u16 *REG_ALARM;
 809         const u16 *REG_BEEP;
 810
 811         unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
 812         unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
 813
 814         struct mutex update_lock;
 815         bool valid;             /* true if following fields are valid */
 816         unsigned long last_updated;     /* In jiffies */
 817
 818         /* Register values */
 819         u8 bank;                /* current register bank */
 820         u8 in_num;              /* number of in inputs we have */
 821         u8 in[15][3];           /* [0]=in, [1]=in_max, [2]=in_min */
 822         unsigned int rpm[NUM_FAN];
 823         u16 fan_min[NUM_FAN];
 824         u8 fan_pulses[NUM_FAN];
 825         u8 fan_div[NUM_FAN];
 826         u8 has_pwm;
 827         u8 has_fan;             /* some fan inputs can be disabled */
 828         u8 has_fan_min;         /* some fans don't have min register */
 829         bool has_fan_div;
 830
 831         u8 num_temp_alarms;     /* 2, 3, or 6 */
 832         u8 num_temp_beeps;      /* 2, 3, or 6 */
 833         u8 temp_fixed_num;      /* 3 or 6 */
 834         u8 temp_type[NUM_TEMP_FIXED];
 835         s8 temp_offset[NUM_TEMP_FIXED];
 836         s16 temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 837                                 * 3=temp_crit, 4=temp_lcrit */
 838         u64 alarms;
 839         u64 beeps;
 840
 841         u8 pwm_num;     /* number of pwm */
 842         u8 pwm_mode[NUM_FAN];   /* 1->DC variable voltage,
 843                                  * 0->PWM variable duty cycle
 844                                  */
 845         enum pwm_enable pwm_enable[NUM_FAN];
 846                         /* 0->off
 847                          * 1->manual
 848                          * 2->thermal cruise mode (also called SmartFan I)
 849                          * 3->fan speed cruise mode
 850                          * 4->SmartFan III
 851                          * 5->enhanced variable thermal cruise (SmartFan IV)
 852                          */
 853         u8 pwm[7][NUM_FAN];     /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 854                                  * [3]=pwm_max, [4]=pwm_step,
 855                                  * [5]=weight_duty_step, [6]=weight_duty_base
 856                                  */
 857
 858         u8 target_temp[NUM_FAN];
 859         u8 target_temp_mask;
 860         u32 target_speed[NUM_FAN];
 861         u32 target_speed_tolerance[NUM_FAN];
 862         u8 speed_tolerance_limit;
 863
 864         u8 temp_tolerance[2][NUM_FAN];
 865         u8 tolerance_mask;
 866
 867         u8 fan_time[3][NUM_FAN]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
 868
 869         /* Automatic fan speed control registers */
 870         int auto_pwm_num;
 871         u8 auto_pwm[NUM_FAN][7];
 872         u8 auto_temp[NUM_FAN][7];
 873         u8 pwm_temp_sel[NUM_FAN];
 874         u8 pwm_weight_temp_sel[NUM_FAN];
 875         u8 weight_temp[3][NUM_FAN];     /* 0->temp_step, 1->temp_step_tol,
 876                                          * 2->temp_base
 877                                          */
 878
 879         u8 vid;
 880         u8 vrm;
 881
 882         bool have_vid;
 883
 884         u16 have_temp;
 885         u16 have_temp_fixed;
 886         u16 have_in;
 887 #ifdef CONFIG_PM
 888         /* Remember extra register values over suspend/resume */
 889         u8 vbat;
 890         u8 fandiv1;
 891         u8 fandiv2;
 892 #endif
 893 };
 894
 895 struct nct6775_sio_data {
 896         int sioreg;
 897         enum kinds kind;
 898 };
 899
 900 struct sensor_device_template {
 901         struct device_attribute dev_attr;
 902         union {
 903                 struct {
 904                         u8 nr;
 905                         u8 index;
 906                 } s;
 907                 int index;
 908         } u;
 909         bool s2;        /* true if both index and nr are used */
 910 };
 911
 912 struct sensor_device_attr_u {
 913         union {
 914                 struct sensor_device_attribute a1;
 915                 struct sensor_device_attribute_2 a2;
 916         } u;
 917         char name[32];
 918 };
 919
 920 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) {      \
 921         .attr = {.name = _template, .mode = _mode },            \
 922         .show   = _show,                                        \
 923         .store  = _store,                                       \
 924 }
 925
 926 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \
 927         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
 928           .u.index = _index,                                            \
 929           .s2 = false }
 930
 931 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,       \
 932                                  _nr, _index)                           \
 933         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
 934           .u.s.index = _index,                                          \
 935           .u.s.nr = _nr,                                                \
 936           .s2 = true }
 937
 938 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
 939 static struct sensor_device_template sensor_dev_template_##_name        \
 940         = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store,       \
 941                                  _index)
 942
 943 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store,       \
 944                           _nr, _index)                                  \
 945 static struct sensor_device_template sensor_dev_template_##_name        \
 946         = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,     \
 947                                  _nr, _index)
 948
 949 struct sensor_template_group {
 950         struct sensor_device_template **templates;
 951         umode_t (*is_visible)(struct kobject *, struct attribute *, int);
 952         int base;
 953 };
 954
 955 static struct attribute_group *
 956 nct6775_create_attr_group(struct device *dev, struct sensor_template_group *tg,
 957                           int repeat)
 958 {
 959         struct attribute_group *group;
 960         struct sensor_device_attr_u *su;
 961         struct sensor_device_attribute *a;
 962         struct sensor_device_attribute_2 *a2;
 963         struct attribute **attrs;
 964         struct sensor_device_template **t;
 965         int i, count;
 966
 967         if (repeat <= 0)
 968                 return ERR_PTR(-EINVAL);
 969
 970         t = tg->templates;
 971         for (count = 0; *t; t++, count++)
 972                 ;
 973
 974         if (count == 0)
 975                 return ERR_PTR(-EINVAL);
 976
 977         group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
 978         if (group == NULL)
 979                 return ERR_PTR(-ENOMEM);
 980
 981         attrs = devm_kzalloc(dev, sizeof(*attrs) * (repeat * count + 1),
 982                              GFP_KERNEL);
 983         if (attrs == NULL)
 984                 return ERR_PTR(-ENOMEM);
 985
 986         su = devm_kzalloc(dev, sizeof(*su) * repeat * count,
 987                                GFP_KERNEL);
 988         if (su == NULL)
 989                 return ERR_PTR(-ENOMEM);
 990
 991         group->attrs = attrs;
 992         group->is_visible = tg->is_visible;
 993
 994         for (i = 0; i < repeat; i++) {
 995                 t = tg->templates;
 996                 while (*t != NULL) {
 997                         snprintf(su->name, sizeof(su->name),
 998                                  (*t)->dev_attr.attr.name, tg->base + i);
 999                         if ((*t)->s2) {
1000                                 a2 = &su->u.a2;
1001                                 a2->dev_attr.attr.name = su->name;
1002                                 a2->nr = (*t)->u.s.nr + i;
1003                                 a2->index = (*t)->u.s.index;
1004                                 a2->dev_attr.attr.mode =
1005                                   (*t)->dev_attr.attr.mode;
1006                                 a2->dev_attr.show = (*t)->dev_attr.show;
1007                                 a2->dev_attr.store = (*t)->dev_attr.store;
1008                                 *attrs = &a2->dev_attr.attr;
1009                         } else {
1010                                 a = &su->u.a1;
1011                                 a->dev_attr.attr.name = su->name;
1012                                 a->index = (*t)->u.index + i;
1013                                 a->dev_attr.attr.mode =
1014                                   (*t)->dev_attr.attr.mode;
1015                                 a->dev_attr.show = (*t)->dev_attr.show;
1016                                 a->dev_attr.store = (*t)->dev_attr.store;
1017                                 *attrs = &a->dev_attr.attr;
1018                         }
1019                         attrs++;
1020                         su++;
1021                         t++;
1022                 }
1023         }
1024
1025         return group;
1026 }
1027
1028 static bool is_word_sized(struct nct6775_data *data, u16 reg)
1029 {
1030         switch (data->kind) {
1031         case nct6106:
1032                 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1033                   reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
1034                   reg == 0x111 || reg == 0x121 || reg == 0x131;
1035         case nct6775:
1036                 return (((reg & 0xff00) == 0x100 ||
1037                     (reg & 0xff00) == 0x200) &&
1038                    ((reg & 0x00ff) == 0x50 ||
1039                     (reg & 0x00ff) == 0x53 ||
1040                     (reg & 0x00ff) == 0x55)) ||
1041                   (reg & 0xfff0) == 0x630 ||
1042                   reg == 0x640 || reg == 0x642 ||
1043                   reg == 0x662 ||
1044                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1045                   reg == 0x73 || reg == 0x75 || reg == 0x77;
1046         case nct6776:
1047                 return (((reg & 0xff00) == 0x100 ||
1048                     (reg & 0xff00) == 0x200) &&
1049                    ((reg & 0x00ff) == 0x50 ||
1050                     (reg & 0x00ff) == 0x53 ||
1051                     (reg & 0x00ff) == 0x55)) ||
1052                   (reg & 0xfff0) == 0x630 ||
1053                   reg == 0x402 ||
1054                   reg == 0x640 || reg == 0x642 ||
1055                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1056                   reg == 0x73 || reg == 0x75 || reg == 0x77;
1057         case nct6779:
1058         case nct6791:
1059         case nct6792:
1060                 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
1061                   ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x0b) ||
1062                   reg == 0x402 ||
1063                   reg == 0x63a || reg == 0x63c || reg == 0x63e ||
1064                   reg == 0x640 || reg == 0x642 ||
1065                   reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
1066                   reg == 0x7b || reg == 0x7d;
1067         }
1068         return false;
1069 }
1070
1071 /*
1072  * On older chips, only registers 0x50-0x5f are banked.
1073  * On more recent chips, all registers are banked.
1074  * Assume that is the case and set the bank number for each access.
1075  * Cache the bank number so it only needs to be set if it changes.
1076  */
1077 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
1078 {
1079         u8 bank = reg >> 8;
1080         if (data->bank != bank) {
1081                 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
1082                 outb_p(bank, data->addr + DATA_REG_OFFSET);
1083                 data->bank = bank;
1084         }
1085 }
1086
1087 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
1088 {
1089         int res, word_sized = is_word_sized(data, reg);
1090
1091         nct6775_set_bank(data, reg);
1092         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1093         res = inb_p(data->addr + DATA_REG_OFFSET);
1094         if (word_sized) {
1095                 outb_p((reg & 0xff) + 1,
1096                        data->addr + ADDR_REG_OFFSET);
1097                 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
1098         }
1099         return res;
1100 }
1101
1102 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
1103 {
1104         int word_sized = is_word_sized(data, reg);
1105
1106         nct6775_set_bank(data, reg);
1107         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1108         if (word_sized) {
1109                 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
1110                 outb_p((reg & 0xff) + 1,
1111                        data->addr + ADDR_REG_OFFSET);
1112         }
1113         outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
1114         return 0;
1115 }
1116
1117 /* We left-align 8-bit temperature values to make the code simpler */
1118 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
1119 {
1120         u16 res;
1121
1122         res = nct6775_read_value(data, reg);
1123         if (!is_word_sized(data, reg))
1124                 res <<= 8;
1125
1126         return res;
1127 }
1128
1129 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
1130 {
1131         if (!is_word_sized(data, reg))
1132                 value >>= 8;
1133         return nct6775_write_value(data, reg, value);
1134 }
1135
1136 /* This function assumes that the caller holds data->update_lock */
1137 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
1138 {
1139         u8 reg;
1140
1141         switch (nr) {
1142         case 0:
1143                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
1144                     | (data->fan_div[0] & 0x7);
1145                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1146                 break;
1147         case 1:
1148                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
1149                     | ((data->fan_div[1] << 4) & 0x70);
1150                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1151                 break;
1152         case 2:
1153                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
1154                     | (data->fan_div[2] & 0x7);
1155                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1156                 break;
1157         case 3:
1158                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
1159                     | ((data->fan_div[3] << 4) & 0x70);
1160                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1161                 break;
1162         }
1163 }
1164
1165 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
1166 {
1167         if (data->kind == nct6775)
1168                 nct6775_write_fan_div(data, nr);
1169 }
1170
1171 static void nct6775_update_fan_div(struct nct6775_data *data)
1172 {
1173         u8 i;
1174
1175         i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
1176         data->fan_div[0] = i & 0x7;
1177         data->fan_div[1] = (i & 0x70) >> 4;
1178         i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
1179         data->fan_div[2] = i & 0x7;
1180         if (data->has_fan & (1 << 3))
1181                 data->fan_div[3] = (i & 0x70) >> 4;
1182 }
1183
1184 static void nct6775_update_fan_div_common(struct nct6775_data *data)
1185 {
1186         if (data->kind == nct6775)
1187                 nct6775_update_fan_div(data);
1188 }
1189
1190 static void nct6775_init_fan_div(struct nct6775_data *data)
1191 {
1192         int i;
1193
1194         nct6775_update_fan_div_common(data);
1195         /*
1196          * For all fans, start with highest divider value if the divider
1197          * register is not initialized. This ensures that we get a
1198          * reading from the fan count register, even if it is not optimal.
1199          * We'll compute a better divider later on.
1200          */
1201         for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
1202                 if (!(data->has_fan & (1 << i)))
1203                         continue;
1204                 if (data->fan_div[i] == 0) {
1205                         data->fan_div[i] = 7;
1206                         nct6775_write_fan_div_common(data, i);
1207                 }
1208         }
1209 }
1210
1211 static void nct6775_init_fan_common(struct device *dev,
1212                                     struct nct6775_data *data)
1213 {
1214         int i;
1215         u8 reg;
1216
1217         if (data->has_fan_div)
1218                 nct6775_init_fan_div(data);
1219
1220         /*
1221          * If fan_min is not set (0), set it to 0xff to disable it. This
1222          * prevents the unnecessary warning when fanX_min is reported as 0.
1223          */
1224         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1225                 if (data->has_fan_min & (1 << i)) {
1226                         reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
1227                         if (!reg)
1228                                 nct6775_write_value(data, data->REG_FAN_MIN[i],
1229                                                     data->has_fan_div ? 0xff
1230                                                                       : 0xff1f);
1231                 }
1232         }
1233 }
1234
1235 static void nct6775_select_fan_div(struct device *dev,
1236                                    struct nct6775_data *data, int nr, u16 reg)
1237 {
1238         u8 fan_div = data->fan_div[nr];
1239         u16 fan_min;
1240
1241         if (!data->has_fan_div)
1242                 return;
1243
1244         /*
1245          * If we failed to measure the fan speed, or the reported value is not
1246          * in the optimal range, and the clock divider can be modified,
1247          * let's try that for next time.
1248          */
1249         if (reg == 0x00 && fan_div < 0x07)
1250                 fan_div++;
1251         else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1252                 fan_div--;
1253
1254         if (fan_div != data->fan_div[nr]) {
1255                 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1256                         nr + 1, div_from_reg(data->fan_div[nr]),
1257                         div_from_reg(fan_div));
1258
1259                 /* Preserve min limit if possible */
1260                 if (data->has_fan_min & (1 << nr)) {
1261                         fan_min = data->fan_min[nr];
1262                         if (fan_div > data->fan_div[nr]) {
1263                                 if (fan_min != 255 && fan_min > 1)
1264                                         fan_min >>= 1;
1265                         } else {
1266                                 if (fan_min != 255) {
1267                                         fan_min <<= 1;
1268                                         if (fan_min > 254)
1269                                                 fan_min = 254;
1270                                 }
1271                         }
1272                         if (fan_min != data->fan_min[nr]) {
1273                                 data->fan_min[nr] = fan_min;
1274                                 nct6775_write_value(data, data->REG_FAN_MIN[nr],
1275                                                     fan_min);
1276                         }
1277                 }
1278                 data->fan_div[nr] = fan_div;
1279                 nct6775_write_fan_div_common(data, nr);
1280         }
1281 }
1282
1283 static void nct6775_update_pwm(struct device *dev)
1284 {
1285         struct nct6775_data *data = dev_get_drvdata(dev);
1286         int i, j;
1287         int fanmodecfg, reg;
1288         bool duty_is_dc;
1289
1290         for (i = 0; i < data->pwm_num; i++) {
1291                 if (!(data->has_pwm & (1 << i)))
1292                         continue;
1293
1294                 duty_is_dc = data->REG_PWM_MODE[i] &&
1295                   (nct6775_read_value(data, data->REG_PWM_MODE[i])
1296                    & data->PWM_MODE_MASK[i]);
1297                 data->pwm_mode[i] = duty_is_dc;
1298
1299                 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
1300                 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1301                         if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1302                                 data->pwm[j][i]
1303                                   = nct6775_read_value(data,
1304                                                        data->REG_PWM[j][i]);
1305                         }
1306                 }
1307
1308                 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1309                                                         (fanmodecfg >> 4) & 7);
1310
1311                 if (!data->temp_tolerance[0][i] ||
1312                     data->pwm_enable[i] != speed_cruise)
1313                         data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1314                 if (!data->target_speed_tolerance[i] ||
1315                     data->pwm_enable[i] == speed_cruise) {
1316                         u8 t = fanmodecfg & 0x0f;
1317                         if (data->REG_TOLERANCE_H) {
1318                                 t |= (nct6775_read_value(data,
1319                                       data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
1320                         }
1321                         data->target_speed_tolerance[i] = t;
1322                 }
1323
1324                 data->temp_tolerance[1][i] =
1325                         nct6775_read_value(data,
1326                                         data->REG_CRITICAL_TEMP_TOLERANCE[i]);
1327
1328                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
1329                 data->pwm_temp_sel[i] = reg & 0x1f;
1330                 /* If fan can stop, report floor as 0 */
1331                 if (reg & 0x80)
1332                         data->pwm[2][i] = 0;
1333
1334                 if (!data->REG_WEIGHT_TEMP_SEL[i])
1335                         continue;
1336
1337                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
1338                 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1339                 /* If weight is disabled, report weight source as 0 */
1340                 if (j == 1 && !(reg & 0x80))
1341                         data->pwm_weight_temp_sel[i] = 0;
1342
1343                 /* Weight temp data */
1344                 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
1345                         data->weight_temp[j][i]
1346                           = nct6775_read_value(data,
1347                                                data->REG_WEIGHT_TEMP[j][i]);
1348                 }
1349         }
1350 }
1351
1352 static void nct6775_update_pwm_limits(struct device *dev)
1353 {
1354         struct nct6775_data *data = dev_get_drvdata(dev);
1355         int i, j;
1356         u8 reg;
1357         u16 reg_t;
1358
1359         for (i = 0; i < data->pwm_num; i++) {
1360                 if (!(data->has_pwm & (1 << i)))
1361                         continue;
1362
1363                 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1364                         data->fan_time[j][i] =
1365                           nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1366                 }
1367
1368                 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1369                 /* Update only in matching mode or if never updated */
1370                 if (!data->target_temp[i] ||
1371                     data->pwm_enable[i] == thermal_cruise)
1372                         data->target_temp[i] = reg_t & data->target_temp_mask;
1373                 if (!data->target_speed[i] ||
1374                     data->pwm_enable[i] == speed_cruise) {
1375                         if (data->REG_TOLERANCE_H) {
1376                                 reg_t |= (nct6775_read_value(data,
1377                                         data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1378                         }
1379                         data->target_speed[i] = reg_t;
1380                 }
1381
1382                 for (j = 0; j < data->auto_pwm_num; j++) {
1383                         data->auto_pwm[i][j] =
1384                           nct6775_read_value(data,
1385                                              NCT6775_AUTO_PWM(data, i, j));
1386                         data->auto_temp[i][j] =
1387                           nct6775_read_value(data,
1388                                              NCT6775_AUTO_TEMP(data, i, j));
1389                 }
1390
1391                 /* critical auto_pwm temperature data */
1392                 data->auto_temp[i][data->auto_pwm_num] =
1393                         nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1394
1395                 switch (data->kind) {
1396                 case nct6775:
1397                         reg = nct6775_read_value(data,
1398                                                  NCT6775_REG_CRITICAL_ENAB[i]);
1399                         data->auto_pwm[i][data->auto_pwm_num] =
1400                                                 (reg & 0x02) ? 0xff : 0x00;
1401                         break;
1402                 case nct6776:
1403                         data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1404                         break;
1405                 case nct6106:
1406                 case nct6779:
1407                 case nct6791:
1408                 case nct6792:
1409                         reg = nct6775_read_value(data,
1410                                         data->REG_CRITICAL_PWM_ENABLE[i]);
1411                         if (reg & data->CRITICAL_PWM_ENABLE_MASK)
1412                                 reg = nct6775_read_value(data,
1413                                         data->REG_CRITICAL_PWM[i]);
1414                         else
1415                                 reg = 0xff;
1416                         data->auto_pwm[i][data->auto_pwm_num] = reg;
1417                         break;
1418                 }
1419         }
1420 }
1421
1422 static struct nct6775_data *nct6775_update_device(struct device *dev)
1423 {
1424         struct nct6775_data *data = dev_get_drvdata(dev);
1425         int i, j;
1426
1427         mutex_lock(&data->update_lock);
1428
1429         if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1430             || !data->valid) {
1431                 /* Fan clock dividers */
1432                 nct6775_update_fan_div_common(data);
1433
1434                 /* Measured voltages and limits */
1435                 for (i = 0; i < data->in_num; i++) {
1436                         if (!(data->have_in & (1 << i)))
1437                                 continue;
1438
1439                         data->in[i][0] = nct6775_read_value(data,
1440                                                             data->REG_VIN[i]);
1441                         data->in[i][1] = nct6775_read_value(data,
1442                                           data->REG_IN_MINMAX[0][i]);
1443                         data->in[i][2] = nct6775_read_value(data,
1444                                           data->REG_IN_MINMAX[1][i]);
1445                 }
1446
1447                 /* Measured fan speeds and limits */
1448                 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
1449                         u16 reg;
1450
1451                         if (!(data->has_fan & (1 << i)))
1452                                 continue;
1453
1454                         reg = nct6775_read_value(data, data->REG_FAN[i]);
1455                         data->rpm[i] = data->fan_from_reg(reg,
1456                                                           data->fan_div[i]);
1457
1458                         if (data->has_fan_min & (1 << i))
1459                                 data->fan_min[i] = nct6775_read_value(data,
1460                                            data->REG_FAN_MIN[i]);
1461                         data->fan_pulses[i] =
1462                           (nct6775_read_value(data, data->REG_FAN_PULSES[i])
1463                                 >> data->FAN_PULSE_SHIFT[i]) & 0x03;
1464
1465                         nct6775_select_fan_div(dev, data, i, reg);
1466                 }
1467
1468                 nct6775_update_pwm(dev);
1469                 nct6775_update_pwm_limits(dev);
1470
1471                 /* Measured temperatures and limits */
1472                 for (i = 0; i < NUM_TEMP; i++) {
1473                         if (!(data->have_temp & (1 << i)))
1474                                 continue;
1475                         for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1476                                 if (data->reg_temp[j][i])
1477                                         data->temp[j][i]
1478                                           = nct6775_read_temp(data,
1479                                                 data->reg_temp[j][i]);
1480                         }
1481                         if (i >= NUM_TEMP_FIXED ||
1482                             !(data->have_temp_fixed & (1 << i)))
1483                                 continue;
1484                         data->temp_offset[i]
1485                           = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1486                 }
1487
1488                 data->alarms = 0;
1489                 for (i = 0; i < NUM_REG_ALARM; i++) {
1490                         u8 alarm;
1491                         if (!data->REG_ALARM[i])
1492                                 continue;
1493                         alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1494                         data->alarms |= ((u64)alarm) << (i << 3);
1495                 }
1496
1497                 data->beeps = 0;
1498                 for (i = 0; i < NUM_REG_BEEP; i++) {
1499                         u8 beep;
1500                         if (!data->REG_BEEP[i])
1501                                 continue;
1502                         beep = nct6775_read_value(data, data->REG_BEEP[i]);
1503                         data->beeps |= ((u64)beep) << (i << 3);
1504                 }
1505
1506                 data->last_updated = jiffies;
1507                 data->valid = true;
1508         }
1509
1510         mutex_unlock(&data->update_lock);
1511         return data;
1512 }
1513
1514 /*
1515  * Sysfs callback functions
1516  */
1517 static ssize_t
1518 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1519 {
1520         struct nct6775_data *data = nct6775_update_device(dev);
1521         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1522         int nr = sattr->nr;
1523         int index = sattr->index;
1524         return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1525 }
1526
1527 static ssize_t
1528 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1529              size_t count)
1530 {
1531         struct nct6775_data *data = dev_get_drvdata(dev);
1532         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1533         int nr = sattr->nr;
1534         int index = sattr->index;
1535         unsigned long val;
1536         int err = kstrtoul(buf, 10, &val);
1537         if (err < 0)
1538                 return err;
1539         mutex_lock(&data->update_lock);
1540         data->in[nr][index] = in_to_reg(val, nr);
1541         nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr],
1542                             data->in[nr][index]);
1543         mutex_unlock(&data->update_lock);
1544         return count;
1545 }
1546
1547 static ssize_t
1548 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1549 {
1550         struct nct6775_data *data = nct6775_update_device(dev);
1551         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1552         int nr = data->ALARM_BITS[sattr->index];
1553         return sprintf(buf, "%u\n",
1554                        (unsigned int)((data->alarms >> nr) & 0x01));
1555 }
1556
1557 static int find_temp_source(struct nct6775_data *data, int index, int count)
1558 {
1559         int source = data->temp_src[index];
1560         int nr;
1561
1562         for (nr = 0; nr < count; nr++) {
1563                 int src;
1564
1565                 src = nct6775_read_value(data,
1566                                          data->REG_TEMP_SOURCE[nr]) & 0x1f;
1567                 if (src == source)
1568                         return nr;
1569         }
1570         return -ENODEV;
1571 }
1572
1573 static ssize_t
1574 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1575 {
1576         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1577         struct nct6775_data *data = nct6775_update_device(dev);
1578         unsigned int alarm = 0;
1579         int nr;
1580
1581         /*
1582          * For temperatures, there is no fixed mapping from registers to alarm
1583          * bits. Alarm bits are determined by the temperature source mapping.
1584          */
1585         nr = find_temp_source(data, sattr->index, data->num_temp_alarms);
1586         if (nr >= 0) {
1587                 int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE];
1588                 alarm = (data->alarms >> bit) & 0x01;
1589         }
1590         return sprintf(buf, "%u\n", alarm);
1591 }
1592
1593 static ssize_t
1594 show_beep(struct device *dev, struct device_attribute *attr, char *buf)
1595 {
1596         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1597         struct nct6775_data *data = nct6775_update_device(dev);
1598         int nr = data->BEEP_BITS[sattr->index];
1599
1600         return sprintf(buf, "%u\n",
1601                        (unsigned int)((data->beeps >> nr) & 0x01));
1602 }
1603
1604 static ssize_t
1605 store_beep(struct device *dev, struct device_attribute *attr, const char *buf,
1606            size_t count)
1607 {
1608         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1609         struct nct6775_data *data = dev_get_drvdata(dev);
1610         int nr = data->BEEP_BITS[sattr->index];
1611         int regindex = nr >> 3;
1612         unsigned long val;
1613
1614         int err = kstrtoul(buf, 10, &val);
1615         if (err < 0)
1616                 return err;
1617         if (val > 1)
1618                 return -EINVAL;
1619
1620         mutex_lock(&data->update_lock);
1621         if (val)
1622                 data->beeps |= (1ULL << nr);
1623         else
1624                 data->beeps &= ~(1ULL << nr);
1625         nct6775_write_value(data, data->REG_BEEP[regindex],
1626                             (data->beeps >> (regindex << 3)) & 0xff);
1627         mutex_unlock(&data->update_lock);
1628         return count;
1629 }
1630
1631 static ssize_t
1632 show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf)
1633 {
1634         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1635         struct nct6775_data *data = nct6775_update_device(dev);
1636         unsigned int beep = 0;
1637         int nr;
1638
1639         /*
1640          * For temperatures, there is no fixed mapping from registers to beep
1641          * enable bits. Beep enable bits are determined by the temperature
1642          * source mapping.
1643          */
1644         nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1645         if (nr >= 0) {
1646                 int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1647                 beep = (data->beeps >> bit) & 0x01;
1648         }
1649         return sprintf(buf, "%u\n", beep);
1650 }
1651
1652 static ssize_t
1653 store_temp_beep(struct device *dev, struct device_attribute *attr,
1654                 const char *buf, size_t count)
1655 {
1656         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1657         struct nct6775_data *data = dev_get_drvdata(dev);
1658         int nr, bit, regindex;
1659         unsigned long val;
1660
1661         int err = kstrtoul(buf, 10, &val);
1662         if (err < 0)
1663                 return err;
1664         if (val > 1)
1665                 return -EINVAL;
1666
1667         nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1668         if (nr < 0)
1669                 return nr;
1670
1671         bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1672         regindex = bit >> 3;
1673
1674         mutex_lock(&data->update_lock);
1675         if (val)
1676                 data->beeps |= (1ULL << bit);
1677         else
1678                 data->beeps &= ~(1ULL << bit);
1679         nct6775_write_value(data, data->REG_BEEP[regindex],
1680                             (data->beeps >> (regindex << 3)) & 0xff);
1681         mutex_unlock(&data->update_lock);
1682
1683         return count;
1684 }
1685
1686 static umode_t nct6775_in_is_visible(struct kobject *kobj,
1687                                      struct attribute *attr, int index)
1688 {
1689         struct device *dev = container_of(kobj, struct device, kobj);
1690         struct nct6775_data *data = dev_get_drvdata(dev);
1691         int in = index / 5;     /* voltage index */
1692
1693         if (!(data->have_in & (1 << in)))
1694                 return 0;
1695
1696         return attr->mode;
1697 }
1698
1699 SENSOR_TEMPLATE_2(in_input, "in%d_input", S_IRUGO, show_in_reg, NULL, 0, 0);
1700 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", S_IRUGO, show_alarm, NULL, 0);
1701 SENSOR_TEMPLATE(in_beep, "in%d_beep", S_IWUSR | S_IRUGO, show_beep, store_beep,
1702                 0);
1703 SENSOR_TEMPLATE_2(in_min, "in%d_min", S_IWUSR | S_IRUGO, show_in_reg,
1704                   store_in_reg, 0, 1);
1705 SENSOR_TEMPLATE_2(in_max, "in%d_max", S_IWUSR | S_IRUGO, show_in_reg,
1706                   store_in_reg, 0, 2);
1707
1708 /*
1709  * nct6775_in_is_visible uses the index into the following array
1710  * to determine if attributes should be created or not.
1711  * Any change in order or content must be matched.
1712  */
1713 static struct sensor_device_template *nct6775_attributes_in_template[] = {
1714         &sensor_dev_template_in_input,
1715         &sensor_dev_template_in_alarm,
1716         &sensor_dev_template_in_beep,
1717         &sensor_dev_template_in_min,
1718         &sensor_dev_template_in_max,
1719         NULL
1720 };
1721
1722 static struct sensor_template_group nct6775_in_template_group = {
1723         .templates = nct6775_attributes_in_template,
1724         .is_visible = nct6775_in_is_visible,
1725 };
1726
1727 static ssize_t
1728 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1729 {
1730         struct nct6775_data *data = nct6775_update_device(dev);
1731         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1732         int nr = sattr->index;
1733         return sprintf(buf, "%d\n", data->rpm[nr]);
1734 }
1735
1736 static ssize_t
1737 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1738 {
1739         struct nct6775_data *data = nct6775_update_device(dev);
1740         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1741         int nr = sattr->index;
1742         return sprintf(buf, "%d\n",
1743                        data->fan_from_reg_min(data->fan_min[nr],
1744                                               data->fan_div[nr]));
1745 }
1746
1747 static ssize_t
1748 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1749 {
1750         struct nct6775_data *data = nct6775_update_device(dev);
1751         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1752         int nr = sattr->index;
1753         return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1754 }
1755
1756 static ssize_t
1757 store_fan_min(struct device *dev, struct device_attribute *attr,
1758               const char *buf, size_t count)
1759 {
1760         struct nct6775_data *data = dev_get_drvdata(dev);
1761         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1762         int nr = sattr->index;
1763         unsigned long val;
1764         int err;
1765         unsigned int reg;
1766         u8 new_div;
1767
1768         err = kstrtoul(buf, 10, &val);
1769         if (err < 0)
1770                 return err;
1771
1772         mutex_lock(&data->update_lock);
1773         if (!data->has_fan_div) {
1774                 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1775                 if (!val) {
1776                         val = 0xff1f;
1777                 } else {
1778                         if (val > 1350000U)
1779                                 val = 135000U;
1780                         val = 1350000U / val;
1781                         val = (val & 0x1f) | ((val << 3) & 0xff00);
1782                 }
1783                 data->fan_min[nr] = val;
1784                 goto write_min; /* Leave fan divider alone */
1785         }
1786         if (!val) {
1787                 /* No min limit, alarm disabled */
1788                 data->fan_min[nr] = 255;
1789                 new_div = data->fan_div[nr]; /* No change */
1790                 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1791                 goto write_div;
1792         }
1793         reg = 1350000U / val;
1794         if (reg >= 128 * 255) {
1795                 /*
1796                  * Speed below this value cannot possibly be represented,
1797                  * even with the highest divider (128)
1798                  */
1799                 data->fan_min[nr] = 254;
1800                 new_div = 7; /* 128 == (1 << 7) */
1801                 dev_warn(dev,
1802                          "fan%u low limit %lu below minimum %u, set to minimum\n",
1803                          nr + 1, val, data->fan_from_reg_min(254, 7));
1804         } else if (!reg) {
1805                 /*
1806                  * Speed above this value cannot possibly be represented,
1807                  * even with the lowest divider (1)
1808                  */
1809                 data->fan_min[nr] = 1;
1810                 new_div = 0; /* 1 == (1 << 0) */
1811                 dev_warn(dev,
1812                          "fan%u low limit %lu above maximum %u, set to maximum\n",
1813                          nr + 1, val, data->fan_from_reg_min(1, 0));
1814         } else {
1815                 /*
1816                  * Automatically pick the best divider, i.e. the one such
1817                  * that the min limit will correspond to a register value
1818                  * in the 96..192 range
1819                  */
1820                 new_div = 0;
1821                 while (reg > 192 && new_div < 7) {
1822                         reg >>= 1;
1823                         new_div++;
1824                 }
1825                 data->fan_min[nr] = reg;
1826         }
1827
1828 write_div:
1829         /*
1830          * Write both the fan clock divider (if it changed) and the new
1831          * fan min (unconditionally)
1832          */
1833         if (new_div != data->fan_div[nr]) {
1834                 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1835                         nr + 1, div_from_reg(data->fan_div[nr]),
1836                         div_from_reg(new_div));
1837                 data->fan_div[nr] = new_div;
1838                 nct6775_write_fan_div_common(data, nr);
1839                 /* Give the chip time to sample a new speed value */
1840                 data->last_updated = jiffies;
1841         }
1842
1843 write_min:
1844         nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1845         mutex_unlock(&data->update_lock);
1846
1847         return count;
1848 }
1849
1850 static ssize_t
1851 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
1852 {
1853         struct nct6775_data *data = nct6775_update_device(dev);
1854         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1855         int p = data->fan_pulses[sattr->index];
1856
1857         return sprintf(buf, "%d\n", p ? : 4);
1858 }
1859
1860 static ssize_t
1861 store_fan_pulses(struct device *dev, struct device_attribute *attr,
1862                  const char *buf, size_t count)
1863 {
1864         struct nct6775_data *data = dev_get_drvdata(dev);
1865         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1866         int nr = sattr->index;
1867         unsigned long val;
1868         int err;
1869         u8 reg;
1870
1871         err = kstrtoul(buf, 10, &val);
1872         if (err < 0)
1873                 return err;
1874
1875         if (val > 4)
1876                 return -EINVAL;
1877
1878         mutex_lock(&data->update_lock);
1879         data->fan_pulses[nr] = val & 3;
1880         reg = nct6775_read_value(data, data->REG_FAN_PULSES[nr]);
1881         reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
1882         reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
1883         nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
1884         mutex_unlock(&data->update_lock);
1885
1886         return count;
1887 }
1888
1889 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
1890                                       struct attribute *attr, int index)
1891 {
1892         struct device *dev = container_of(kobj, struct device, kobj);
1893         struct nct6775_data *data = dev_get_drvdata(dev);
1894         int fan = index / 6;    /* fan index */
1895         int nr = index % 6;     /* attribute index */
1896
1897         if (!(data->has_fan & (1 << fan)))
1898                 return 0;
1899
1900         if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1)
1901                 return 0;
1902         if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1)
1903                 return 0;
1904         if (nr == 4 && !(data->has_fan_min & (1 << fan)))
1905                 return 0;
1906         if (nr == 5 && data->kind != nct6775)
1907                 return 0;
1908
1909         return attr->mode;
1910 }
1911
1912 SENSOR_TEMPLATE(fan_input, "fan%d_input", S_IRUGO, show_fan, NULL, 0);
1913 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", S_IRUGO, show_alarm, NULL,
1914                 FAN_ALARM_BASE);
1915 SENSOR_TEMPLATE(fan_beep, "fan%d_beep", S_IWUSR | S_IRUGO, show_beep,
1916                 store_beep, FAN_ALARM_BASE);
1917 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", S_IWUSR | S_IRUGO, show_fan_pulses,
1918                 store_fan_pulses, 0);
1919 SENSOR_TEMPLATE(fan_min, "fan%d_min", S_IWUSR | S_IRUGO, show_fan_min,
1920                 store_fan_min, 0);
1921 SENSOR_TEMPLATE(fan_div, "fan%d_div", S_IRUGO, show_fan_div, NULL, 0);
1922
1923 /*
1924  * nct6775_fan_is_visible uses the index into the following array
1925  * to determine if attributes should be created or not.
1926  * Any change in order or content must be matched.
1927  */
1928 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
1929         &sensor_dev_template_fan_input,
1930         &sensor_dev_template_fan_alarm, /* 1 */
1931         &sensor_dev_template_fan_beep,  /* 2 */
1932         &sensor_dev_template_fan_pulses,
1933         &sensor_dev_template_fan_min,   /* 4 */
1934         &sensor_dev_template_fan_div,   /* 5 */
1935         NULL
1936 };
1937
1938 static struct sensor_template_group nct6775_fan_template_group = {
1939         .templates = nct6775_attributes_fan_template,
1940         .is_visible = nct6775_fan_is_visible,
1941         .base = 1,
1942 };
1943
1944 static ssize_t
1945 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1946 {
1947         struct nct6775_data *data = nct6775_update_device(dev);
1948         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1949         int nr = sattr->index;
1950         return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1951 }
1952
1953 static ssize_t
1954 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1955 {
1956         struct nct6775_data *data = nct6775_update_device(dev);
1957         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1958         int nr = sattr->nr;
1959         int index = sattr->index;
1960
1961         return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
1962 }
1963
1964 static ssize_t
1965 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
1966            size_t count)
1967 {
1968         struct nct6775_data *data = dev_get_drvdata(dev);
1969         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1970         int nr = sattr->nr;
1971         int index = sattr->index;
1972         int err;
1973         long val;
1974
1975         err = kstrtol(buf, 10, &val);
1976         if (err < 0)
1977                 return err;
1978
1979         mutex_lock(&data->update_lock);
1980         data->temp[index][nr] = LM75_TEMP_TO_REG(val);
1981         nct6775_write_temp(data, data->reg_temp[index][nr],
1982                            data->temp[index][nr]);
1983         mutex_unlock(&data->update_lock);
1984         return count;
1985 }
1986
1987 static ssize_t
1988 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
1989 {
1990         struct nct6775_data *data = nct6775_update_device(dev);
1991         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1992
1993         return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
1994 }
1995
1996 static ssize_t
1997 store_temp_offset(struct device *dev, struct device_attribute *attr,
1998                   const char *buf, size_t count)
1999 {
2000         struct nct6775_data *data = dev_get_drvdata(dev);
2001         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2002         int nr = sattr->index;
2003         long val;
2004         int err;
2005
2006         err = kstrtol(buf, 10, &val);
2007         if (err < 0)
2008                 return err;
2009
2010         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
2011
2012         mutex_lock(&data->update_lock);
2013         data->temp_offset[nr] = val;
2014         nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
2015         mutex_unlock(&data->update_lock);
2016
2017         return count;
2018 }
2019
2020 static ssize_t
2021 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
2022 {
2023         struct nct6775_data *data = nct6775_update_device(dev);
2024         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2025         int nr = sattr->index;
2026         return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
2027 }
2028
2029 static ssize_t
2030 store_temp_type(struct device *dev, struct device_attribute *attr,
2031                 const char *buf, size_t count)
2032 {
2033         struct nct6775_data *data = nct6775_update_device(dev);
2034         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2035         int nr = sattr->index;
2036         unsigned long val;
2037         int err;
2038         u8 vbat, diode, vbit, dbit;
2039
2040         err = kstrtoul(buf, 10, &val);
2041         if (err < 0)
2042                 return err;
2043
2044         if (val != 1 && val != 3 && val != 4)
2045                 return -EINVAL;
2046
2047         mutex_lock(&data->update_lock);
2048
2049         data->temp_type[nr] = val;
2050         vbit = 0x02 << nr;
2051         dbit = data->DIODE_MASK << nr;
2052         vbat = nct6775_read_value(data, data->REG_VBAT) & ~vbit;
2053         diode = nct6775_read_value(data, data->REG_DIODE) & ~dbit;
2054         switch (val) {
2055         case 1: /* CPU diode (diode, current mode) */
2056                 vbat |= vbit;
2057                 diode |= dbit;
2058                 break;
2059         case 3: /* diode, voltage mode */
2060                 vbat |= dbit;
2061                 break;
2062         case 4: /* thermistor */
2063                 break;
2064         }
2065         nct6775_write_value(data, data->REG_VBAT, vbat);
2066         nct6775_write_value(data, data->REG_DIODE, diode);
2067
2068         mutex_unlock(&data->update_lock);
2069         return count;
2070 }
2071
2072 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
2073                                        struct attribute *attr, int index)
2074 {
2075         struct device *dev = container_of(kobj, struct device, kobj);
2076         struct nct6775_data *data = dev_get_drvdata(dev);
2077         int temp = index / 10;  /* temp index */
2078         int nr = index % 10;    /* attribute index */
2079
2080         if (!(data->have_temp & (1 << temp)))
2081                 return 0;
2082
2083         if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0)
2084                 return 0;                               /* alarm */
2085
2086         if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0)
2087                 return 0;                               /* beep */
2088
2089         if (nr == 4 && !data->reg_temp[1][temp])        /* max */
2090                 return 0;
2091
2092         if (nr == 5 && !data->reg_temp[2][temp])        /* max_hyst */
2093                 return 0;
2094
2095         if (nr == 6 && !data->reg_temp[3][temp])        /* crit */
2096                 return 0;
2097
2098         if (nr == 7 && !data->reg_temp[4][temp])        /* lcrit */
2099                 return 0;
2100
2101         /* offset and type only apply to fixed sensors */
2102         if (nr > 7 && !(data->have_temp_fixed & (1 << temp)))
2103                 return 0;
2104
2105         return attr->mode;
2106 }
2107
2108 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", S_IRUGO, show_temp, NULL, 0, 0);
2109 SENSOR_TEMPLATE(temp_label, "temp%d_label", S_IRUGO, show_temp_label, NULL, 0);
2110 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", S_IRUGO | S_IWUSR, show_temp,
2111                   store_temp, 0, 1);
2112 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", S_IRUGO | S_IWUSR,
2113                   show_temp, store_temp, 0, 2);
2114 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", S_IRUGO | S_IWUSR, show_temp,
2115                   store_temp, 0, 3);
2116 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", S_IRUGO | S_IWUSR, show_temp,
2117                   store_temp, 0, 4);
2118 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", S_IRUGO | S_IWUSR,
2119                 show_temp_offset, store_temp_offset, 0);
2120 SENSOR_TEMPLATE(temp_type, "temp%d_type", S_IRUGO | S_IWUSR, show_temp_type,
2121                 store_temp_type, 0);
2122 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", S_IRUGO, show_temp_alarm, NULL, 0);
2123 SENSOR_TEMPLATE(temp_beep, "temp%d_beep", S_IRUGO | S_IWUSR, show_temp_beep,
2124                 store_temp_beep, 0);
2125
2126 /*
2127  * nct6775_temp_is_visible uses the index into the following array
2128  * to determine if attributes should be created or not.
2129  * Any change in order or content must be matched.
2130  */
2131 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
2132         &sensor_dev_template_temp_input,
2133         &sensor_dev_template_temp_label,
2134         &sensor_dev_template_temp_alarm,        /* 2 */
2135         &sensor_dev_template_temp_beep,         /* 3 */
2136         &sensor_dev_template_temp_max,          /* 4 */
2137         &sensor_dev_template_temp_max_hyst,     /* 5 */
2138         &sensor_dev_template_temp_crit,         /* 6 */
2139         &sensor_dev_template_temp_lcrit,        /* 7 */
2140         &sensor_dev_template_temp_offset,       /* 8 */
2141         &sensor_dev_template_temp_type,         /* 9 */
2142         NULL
2143 };
2144
2145 static struct sensor_template_group nct6775_temp_template_group = {
2146         .templates = nct6775_attributes_temp_template,
2147         .is_visible = nct6775_temp_is_visible,
2148         .base = 1,
2149 };
2150
2151 static ssize_t
2152 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
2153 {
2154         struct nct6775_data *data = nct6775_update_device(dev);
2155         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2156
2157         return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
2158 }
2159
2160 static ssize_t
2161 store_pwm_mode(struct device *dev, struct device_attribute *attr,
2162                const char *buf, size_t count)
2163 {
2164         struct nct6775_data *data = dev_get_drvdata(dev);
2165         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2166         int nr = sattr->index;
2167         unsigned long val;
2168         int err;
2169         u8 reg;
2170
2171         err = kstrtoul(buf, 10, &val);
2172         if (err < 0)
2173                 return err;
2174
2175         if (val > 1)
2176                 return -EINVAL;
2177
2178         /* Setting DC mode is not supported for all chips/channels */
2179         if (data->REG_PWM_MODE[nr] == 0) {
2180                 if (val)
2181                         return -EINVAL;
2182                 return count;
2183         }
2184
2185         mutex_lock(&data->update_lock);
2186         data->pwm_mode[nr] = val;
2187         reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
2188         reg &= ~data->PWM_MODE_MASK[nr];
2189         if (val)
2190                 reg |= data->PWM_MODE_MASK[nr];
2191         nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
2192         mutex_unlock(&data->update_lock);
2193         return count;
2194 }
2195
2196 static ssize_t
2197 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2198 {
2199         struct nct6775_data *data = nct6775_update_device(dev);
2200         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2201         int nr = sattr->nr;
2202         int index = sattr->index;
2203         int pwm;
2204
2205         /*
2206          * For automatic fan control modes, show current pwm readings.
2207          * Otherwise, show the configured value.
2208          */
2209         if (index == 0 && data->pwm_enable[nr] > manual)
2210                 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
2211         else
2212                 pwm = data->pwm[index][nr];
2213
2214         return sprintf(buf, "%d\n", pwm);
2215 }
2216
2217 static ssize_t
2218 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
2219           size_t count)
2220 {
2221         struct nct6775_data *data = dev_get_drvdata(dev);
2222         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2223         int nr = sattr->nr;
2224         int index = sattr->index;
2225         unsigned long val;
2226         int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
2227         int maxval[7]
2228           = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
2229         int err;
2230         u8 reg;
2231
2232         err = kstrtoul(buf, 10, &val);
2233         if (err < 0)
2234                 return err;
2235         val = clamp_val(val, minval[index], maxval[index]);
2236
2237         mutex_lock(&data->update_lock);
2238         data->pwm[index][nr] = val;
2239         nct6775_write_value(data, data->REG_PWM[index][nr], val);
2240         if (index == 2) { /* floor: disable if val == 0 */
2241                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2242                 reg &= 0x7f;
2243                 if (val)
2244                         reg |= 0x80;
2245                 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2246         }
2247         mutex_unlock(&data->update_lock);
2248         return count;
2249 }
2250
2251 /* Returns 0 if OK, -EINVAL otherwise */
2252 static int check_trip_points(struct nct6775_data *data, int nr)
2253 {
2254         int i;
2255
2256         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2257                 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
2258                         return -EINVAL;
2259         }
2260         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2261                 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
2262                         return -EINVAL;
2263         }
2264         /* validate critical temperature and pwm if enabled (pwm > 0) */
2265         if (data->auto_pwm[nr][data->auto_pwm_num]) {
2266                 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2267                                 data->auto_temp[nr][data->auto_pwm_num] ||
2268                     data->auto_pwm[nr][data->auto_pwm_num - 1] >
2269                                 data->auto_pwm[nr][data->auto_pwm_num])
2270                         return -EINVAL;
2271         }
2272         return 0;
2273 }
2274
2275 static void pwm_update_registers(struct nct6775_data *data, int nr)
2276 {
2277         u8 reg;
2278
2279         switch (data->pwm_enable[nr]) {
2280         case off:
2281         case manual:
2282                 break;
2283         case speed_cruise:
2284                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2285                 reg = (reg & ~data->tolerance_mask) |
2286                   (data->target_speed_tolerance[nr] & data->tolerance_mask);
2287                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2288                 nct6775_write_value(data, data->REG_TARGET[nr],
2289                                     data->target_speed[nr] & 0xff);
2290                 if (data->REG_TOLERANCE_H) {
2291                         reg = (data->target_speed[nr] >> 8) & 0x0f;
2292                         reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2293                         nct6775_write_value(data,
2294                                             data->REG_TOLERANCE_H[nr],
2295                                             reg);
2296                 }
2297                 break;
2298         case thermal_cruise:
2299                 nct6775_write_value(data, data->REG_TARGET[nr],
2300                                     data->target_temp[nr]);
2301                 /* intentional */
2302         default:
2303                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2304                 reg = (reg & ~data->tolerance_mask) |
2305                   data->temp_tolerance[0][nr];
2306                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2307                 break;
2308         }
2309 }
2310
2311 static ssize_t
2312 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2313 {
2314         struct nct6775_data *data = nct6775_update_device(dev);
2315         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2316
2317         return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2318 }
2319
2320 static ssize_t
2321 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2322                  const char *buf, size_t count)
2323 {
2324         struct nct6775_data *data = dev_get_drvdata(dev);
2325         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2326         int nr = sattr->index;
2327         unsigned long val;
2328         int err;
2329         u16 reg;
2330
2331         err = kstrtoul(buf, 10, &val);
2332         if (err < 0)
2333                 return err;
2334
2335         if (val > sf4)
2336                 return -EINVAL;
2337
2338         if (val == sf3 && data->kind != nct6775)
2339                 return -EINVAL;
2340
2341         if (val == sf4 && check_trip_points(data, nr)) {
2342                 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2343                 dev_err(dev, "Adjust trip points and try again\n");
2344                 return -EINVAL;
2345         }
2346
2347         mutex_lock(&data->update_lock);
2348         data->pwm_enable[nr] = val;
2349         if (val == off) {
2350                 /*
2351                  * turn off pwm control: select manual mode, set pwm to maximum
2352                  */
2353                 data->pwm[0][nr] = 255;
2354                 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2355         }
2356         pwm_update_registers(data, nr);
2357         reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2358         reg &= 0x0f;
2359         reg |= pwm_enable_to_reg(val) << 4;
2360         nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2361         mutex_unlock(&data->update_lock);
2362         return count;
2363 }
2364
2365 static ssize_t
2366 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2367 {
2368         int i, sel = 0;
2369
2370         for (i = 0; i < NUM_TEMP; i++) {
2371                 if (!(data->have_temp & (1 << i)))
2372                         continue;
2373                 if (src == data->temp_src[i]) {
2374                         sel = i + 1;
2375                         break;
2376                 }
2377         }
2378
2379         return sprintf(buf, "%d\n", sel);
2380 }
2381
2382 static ssize_t
2383 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2384 {
2385         struct nct6775_data *data = nct6775_update_device(dev);
2386         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2387         int index = sattr->index;
2388
2389         return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2390 }
2391
2392 static ssize_t
2393 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2394                    const char *buf, size_t count)
2395 {
2396         struct nct6775_data *data = nct6775_update_device(dev);
2397         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2398         int nr = sattr->index;
2399         unsigned long val;
2400         int err, reg, src;
2401
2402         err = kstrtoul(buf, 10, &val);
2403         if (err < 0)
2404                 return err;
2405         if (val == 0 || val > NUM_TEMP)
2406                 return -EINVAL;
2407         if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
2408                 return -EINVAL;
2409
2410         mutex_lock(&data->update_lock);
2411         src = data->temp_src[val - 1];
2412         data->pwm_temp_sel[nr] = src;
2413         reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2414         reg &= 0xe0;
2415         reg |= src;
2416         nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2417         mutex_unlock(&data->update_lock);
2418
2419         return count;
2420 }
2421
2422 static ssize_t
2423 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2424                          char *buf)
2425 {
2426         struct nct6775_data *data = nct6775_update_device(dev);
2427         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2428         int index = sattr->index;
2429
2430         return show_pwm_temp_sel_common(data, buf,
2431                                         data->pwm_weight_temp_sel[index]);
2432 }
2433
2434 static ssize_t
2435 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2436                           const char *buf, size_t count)
2437 {
2438         struct nct6775_data *data = nct6775_update_device(dev);
2439         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2440         int nr = sattr->index;
2441         unsigned long val;
2442         int err, reg, src;
2443
2444         err = kstrtoul(buf, 10, &val);
2445         if (err < 0)
2446                 return err;
2447         if (val > NUM_TEMP)
2448                 return -EINVAL;
2449         if (val && (!(data->have_temp & (1 << (val - 1))) ||
2450                     !data->temp_src[val - 1]))
2451                 return -EINVAL;
2452
2453         mutex_lock(&data->update_lock);
2454         if (val) {
2455                 src = data->temp_src[val - 1];
2456                 data->pwm_weight_temp_sel[nr] = src;
2457                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2458                 reg &= 0xe0;
2459                 reg |= (src | 0x80);
2460                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2461         } else {
2462                 data->pwm_weight_temp_sel[nr] = 0;
2463                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2464                 reg &= 0x7f;
2465                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2466         }
2467         mutex_unlock(&data->update_lock);
2468
2469         return count;
2470 }
2471
2472 static ssize_t
2473 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2474 {
2475         struct nct6775_data *data = nct6775_update_device(dev);
2476         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2477
2478         return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2479 }
2480
2481 static ssize_t
2482 store_target_temp(struct device *dev, struct device_attribute *attr,
2483                   const char *buf, size_t count)
2484 {
2485         struct nct6775_data *data = dev_get_drvdata(dev);
2486         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2487         int nr = sattr->index;
2488         unsigned long val;
2489         int err;
2490
2491         err = kstrtoul(buf, 10, &val);
2492         if (err < 0)
2493                 return err;
2494
2495         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2496                         data->target_temp_mask);
2497
2498         mutex_lock(&data->update_lock);
2499         data->target_temp[nr] = val;
2500         pwm_update_registers(data, nr);
2501         mutex_unlock(&data->update_lock);
2502         return count;
2503 }
2504
2505 static ssize_t
2506 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2507 {
2508         struct nct6775_data *data = nct6775_update_device(dev);
2509         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2510         int nr = sattr->index;
2511
2512         return sprintf(buf, "%d\n",
2513                        fan_from_reg16(data->target_speed[nr],
2514                                       data->fan_div[nr]));
2515 }
2516
2517 static ssize_t
2518 store_target_speed(struct device *dev, struct device_attribute *attr,
2519                    const char *buf, size_t count)
2520 {
2521         struct nct6775_data *data = dev_get_drvdata(dev);
2522         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2523         int nr = sattr->index;
2524         unsigned long val;
2525         int err;
2526         u16 speed;
2527
2528         err = kstrtoul(buf, 10, &val);
2529         if (err < 0)
2530                 return err;
2531
2532         val = clamp_val(val, 0, 1350000U);
2533         speed = fan_to_reg(val, data->fan_div[nr]);
2534
2535         mutex_lock(&data->update_lock);
2536         data->target_speed[nr] = speed;
2537         pwm_update_registers(data, nr);
2538         mutex_unlock(&data->update_lock);
2539         return count;
2540 }
2541
2542 static ssize_t
2543 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2544                     char *buf)
2545 {
2546         struct nct6775_data *data = nct6775_update_device(dev);
2547         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2548         int nr = sattr->nr;
2549         int index = sattr->index;
2550
2551         return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2552 }
2553
2554 static ssize_t
2555 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2556                      const char *buf, size_t count)
2557 {
2558         struct nct6775_data *data = dev_get_drvdata(dev);
2559         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2560         int nr = sattr->nr;
2561         int index = sattr->index;
2562         unsigned long val;
2563         int err;
2564
2565         err = kstrtoul(buf, 10, &val);
2566         if (err < 0)
2567                 return err;
2568
2569         /* Limit tolerance as needed */
2570         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2571
2572         mutex_lock(&data->update_lock);
2573         data->temp_tolerance[index][nr] = val;
2574         if (index)
2575                 pwm_update_registers(data, nr);
2576         else
2577                 nct6775_write_value(data,
2578                                     data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2579                                     val);
2580         mutex_unlock(&data->update_lock);
2581         return count;
2582 }
2583
2584 /*
2585  * Fan speed tolerance is a tricky beast, since the associated register is
2586  * a tick counter, but the value is reported and configured as rpm.
2587  * Compute resulting low and high rpm values and report the difference.
2588  */
2589 static ssize_t
2590 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2591                      char *buf)
2592 {
2593         struct nct6775_data *data = nct6775_update_device(dev);
2594         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2595         int nr = sattr->index;
2596         int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2597         int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2598         int tolerance;
2599
2600         if (low <= 0)
2601                 low = 1;
2602         if (high > 0xffff)
2603                 high = 0xffff;
2604         if (high < low)
2605                 high = low;
2606
2607         tolerance = (fan_from_reg16(low, data->fan_div[nr])
2608                      - fan_from_reg16(high, data->fan_div[nr])) / 2;
2609
2610         return sprintf(buf, "%d\n", tolerance);
2611 }
2612
2613 static ssize_t
2614 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2615                       const char *buf, size_t count)
2616 {
2617         struct nct6775_data *data = dev_get_drvdata(dev);
2618         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2619         int nr = sattr->index;
2620         unsigned long val;
2621         int err;
2622         int low, high;
2623
2624         err = kstrtoul(buf, 10, &val);
2625         if (err < 0)
2626                 return err;
2627
2628         high = fan_from_reg16(data->target_speed[nr],
2629                               data->fan_div[nr]) + val;
2630         low = fan_from_reg16(data->target_speed[nr],
2631                              data->fan_div[nr]) - val;
2632         if (low <= 0)
2633                 low = 1;
2634         if (high < low)
2635                 high = low;
2636
2637         val = (fan_to_reg(low, data->fan_div[nr]) -
2638                fan_to_reg(high, data->fan_div[nr])) / 2;
2639
2640         /* Limit tolerance as needed */
2641         val = clamp_val(val, 0, data->speed_tolerance_limit);
2642
2643         mutex_lock(&data->update_lock);
2644         data->target_speed_tolerance[nr] = val;
2645         pwm_update_registers(data, nr);
2646         mutex_unlock(&data->update_lock);
2647         return count;
2648 }
2649
2650 SENSOR_TEMPLATE_2(pwm, "pwm%d", S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2651 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", S_IWUSR | S_IRUGO, show_pwm_mode,
2652                 store_pwm_mode, 0);
2653 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", S_IWUSR | S_IRUGO, show_pwm_enable,
2654                 store_pwm_enable, 0);
2655 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", S_IWUSR | S_IRUGO,
2656                 show_pwm_temp_sel, store_pwm_temp_sel, 0);
2657 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", S_IWUSR | S_IRUGO,
2658                 show_target_temp, store_target_temp, 0);
2659 SENSOR_TEMPLATE(fan_target, "fan%d_target", S_IWUSR | S_IRUGO,
2660                 show_target_speed, store_target_speed, 0);
2661 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", S_IWUSR | S_IRUGO,
2662                 show_speed_tolerance, store_speed_tolerance, 0);
2663
2664 /* Smart Fan registers */
2665
2666 static ssize_t
2667 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2668 {
2669         struct nct6775_data *data = nct6775_update_device(dev);
2670         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2671         int nr = sattr->nr;
2672         int index = sattr->index;
2673
2674         return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2675 }
2676
2677 static ssize_t
2678 store_weight_temp(struct device *dev, struct device_attribute *attr,
2679                   const char *buf, size_t count)
2680 {
2681         struct nct6775_data *data = dev_get_drvdata(dev);
2682         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2683         int nr = sattr->nr;
2684         int index = sattr->index;
2685         unsigned long val;
2686         int err;
2687
2688         err = kstrtoul(buf, 10, &val);
2689         if (err < 0)
2690                 return err;
2691
2692         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2693
2694         mutex_lock(&data->update_lock);
2695         data->weight_temp[index][nr] = val;
2696         nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2697         mutex_unlock(&data->update_lock);
2698         return count;
2699 }
2700
2701 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", S_IWUSR | S_IRUGO,
2702                   show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
2703 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step",
2704                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 0);
2705 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol",
2706                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 1);
2707 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base",
2708                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 2);
2709 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step",
2710                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 5);
2711 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base",
2712                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 6);
2713
2714 static ssize_t
2715 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2716 {
2717         struct nct6775_data *data = nct6775_update_device(dev);
2718         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2719         int nr = sattr->nr;
2720         int index = sattr->index;
2721
2722         return sprintf(buf, "%d\n",
2723                        step_time_from_reg(data->fan_time[index][nr],
2724                                           data->pwm_mode[nr]));
2725 }
2726
2727 static ssize_t
2728 store_fan_time(struct device *dev, struct device_attribute *attr,
2729                const char *buf, size_t count)
2730 {
2731         struct nct6775_data *data = dev_get_drvdata(dev);
2732         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2733         int nr = sattr->nr;
2734         int index = sattr->index;
2735         unsigned long val;
2736         int err;
2737
2738         err = kstrtoul(buf, 10, &val);
2739         if (err < 0)
2740                 return err;
2741
2742         val = step_time_to_reg(val, data->pwm_mode[nr]);
2743         mutex_lock(&data->update_lock);
2744         data->fan_time[index][nr] = val;
2745         nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2746         mutex_unlock(&data->update_lock);
2747         return count;
2748 }
2749
2750 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
2751 static ssize_t
2752 show_name(struct device *dev, struct device_attribute *attr, char *buf)
2753 {
2754         struct nct6775_data *data = dev_get_drvdata(dev);
2755
2756         return sprintf(buf, "%s\n", data->name);
2757 }
2758
2759 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
2760 #endif
2761
2762 static ssize_t
2763 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2764 {
2765         struct nct6775_data *data = nct6775_update_device(dev);
2766         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2767
2768         return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2769 }
2770
2771 static ssize_t
2772 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2773                const char *buf, size_t count)
2774 {
2775         struct nct6775_data *data = dev_get_drvdata(dev);
2776         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2777         int nr = sattr->nr;
2778         int point = sattr->index;
2779         unsigned long val;
2780         int err;
2781         u8 reg;
2782
2783         err = kstrtoul(buf, 10, &val);
2784         if (err < 0)
2785                 return err;
2786         if (val > 255)
2787                 return -EINVAL;
2788
2789         if (point == data->auto_pwm_num) {
2790                 if (data->kind != nct6775 && !val)
2791                         return -EINVAL;
2792                 if (data->kind != nct6779 && val)
2793                         val = 0xff;
2794         }
2795
2796         mutex_lock(&data->update_lock);
2797         data->auto_pwm[nr][point] = val;
2798         if (point < data->auto_pwm_num) {
2799                 nct6775_write_value(data,
2800                                     NCT6775_AUTO_PWM(data, nr, point),
2801                                     data->auto_pwm[nr][point]);
2802         } else {
2803                 switch (data->kind) {
2804                 case nct6775:
2805                         /* disable if needed (pwm == 0) */
2806                         reg = nct6775_read_value(data,
2807                                                  NCT6775_REG_CRITICAL_ENAB[nr]);
2808                         if (val)
2809                                 reg |= 0x02;
2810                         else
2811                                 reg &= ~0x02;
2812                         nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
2813                                             reg);
2814                         break;
2815                 case nct6776:
2816                         break; /* always enabled, nothing to do */
2817                 case nct6106:
2818                 case nct6779:
2819                 case nct6791:
2820                 case nct6792:
2821                         nct6775_write_value(data, data->REG_CRITICAL_PWM[nr],
2822                                             val);
2823                         reg = nct6775_read_value(data,
2824                                         data->REG_CRITICAL_PWM_ENABLE[nr]);
2825                         if (val == 255)
2826                                 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
2827                         else
2828                                 reg |= data->CRITICAL_PWM_ENABLE_MASK;
2829                         nct6775_write_value(data,
2830                                             data->REG_CRITICAL_PWM_ENABLE[nr],
2831                                             reg);
2832                         break;
2833                 }
2834         }
2835         mutex_unlock(&data->update_lock);
2836         return count;
2837 }
2838
2839 static ssize_t
2840 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
2841 {
2842         struct nct6775_data *data = nct6775_update_device(dev);
2843         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2844         int nr = sattr->nr;
2845         int point = sattr->index;
2846
2847         /*
2848          * We don't know for sure if the temperature is signed or unsigned.
2849          * Assume it is unsigned.
2850          */
2851         return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
2852 }
2853
2854 static ssize_t
2855 store_auto_temp(struct device *dev, struct device_attribute *attr,
2856                 const char *buf, size_t count)
2857 {
2858         struct nct6775_data *data = dev_get_drvdata(dev);
2859         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2860         int nr = sattr->nr;
2861         int point = sattr->index;
2862         unsigned long val;
2863         int err;
2864
2865         err = kstrtoul(buf, 10, &val);
2866         if (err)
2867                 return err;
2868         if (val > 255000)
2869                 return -EINVAL;
2870
2871         mutex_lock(&data->update_lock);
2872         data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
2873         if (point < data->auto_pwm_num) {
2874                 nct6775_write_value(data,
2875                                     NCT6775_AUTO_TEMP(data, nr, point),
2876                                     data->auto_temp[nr][point]);
2877         } else {
2878                 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
2879                                     data->auto_temp[nr][point]);
2880         }
2881         mutex_unlock(&data->update_lock);
2882         return count;
2883 }
2884
2885 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
2886                                       struct attribute *attr, int index)
2887 {
2888         struct device *dev = container_of(kobj, struct device, kobj);
2889         struct nct6775_data *data = dev_get_drvdata(dev);
2890         int pwm = index / 36;   /* pwm index */
2891         int nr = index % 36;    /* attribute index */
2892
2893         if (!(data->has_pwm & (1 << pwm)))
2894                 return 0;
2895
2896         if ((nr >= 14 && nr <= 18) || nr == 21)   /* weight */
2897                 if (!data->REG_WEIGHT_TEMP_SEL[pwm])
2898                         return 0;
2899         if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
2900                 return 0;
2901         if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
2902                 return 0;
2903         if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
2904                 return 0;
2905
2906         if (nr >= 22 && nr <= 35) {             /* auto point */
2907                 int api = (nr - 22) / 2;        /* auto point index */
2908
2909                 if (api > data->auto_pwm_num)
2910                         return 0;
2911         }
2912         return attr->mode;
2913 }
2914
2915 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", S_IWUSR | S_IRUGO,
2916                   show_fan_time, store_fan_time, 0, 0);
2917 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", S_IWUSR | S_IRUGO,
2918                   show_fan_time, store_fan_time, 0, 1);
2919 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", S_IWUSR | S_IRUGO,
2920                   show_fan_time, store_fan_time, 0, 2);
2921 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", S_IWUSR | S_IRUGO, show_pwm,
2922                   store_pwm, 0, 1);
2923 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", S_IWUSR | S_IRUGO, show_pwm,
2924                   store_pwm, 0, 2);
2925 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", S_IWUSR | S_IRUGO,
2926                   show_temp_tolerance, store_temp_tolerance, 0, 0);
2927 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance",
2928                   S_IWUSR | S_IRUGO, show_temp_tolerance, store_temp_tolerance,
2929                   0, 1);
2930
2931 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2932                   0, 3);
2933
2934 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", S_IWUSR | S_IRUGO, show_pwm,
2935                   store_pwm, 0, 4);
2936
2937 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm",
2938                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 0);
2939 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp",
2940                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 0);
2941
2942 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm",
2943                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 1);
2944 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp",
2945                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 1);
2946
2947 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm",
2948                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 2);
2949 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp",
2950                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 2);
2951
2952 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm",
2953                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 3);
2954 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp",
2955                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 3);
2956
2957 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm",
2958                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 4);
2959 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp",
2960                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 4);
2961
2962 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm",
2963                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 5);
2964 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp",
2965                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 5);
2966
2967 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm",
2968                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 6);
2969 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp",
2970                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 6);
2971
2972 /*
2973  * nct6775_pwm_is_visible uses the index into the following array
2974  * to determine if attributes should be created or not.
2975  * Any change in order or content must be matched.
2976  */
2977 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
2978         &sensor_dev_template_pwm,
2979         &sensor_dev_template_pwm_mode,
2980         &sensor_dev_template_pwm_enable,
2981         &sensor_dev_template_pwm_temp_sel,
2982         &sensor_dev_template_pwm_temp_tolerance,
2983         &sensor_dev_template_pwm_crit_temp_tolerance,
2984         &sensor_dev_template_pwm_target_temp,
2985         &sensor_dev_template_fan_target,
2986         &sensor_dev_template_fan_tolerance,
2987         &sensor_dev_template_pwm_stop_time,
2988         &sensor_dev_template_pwm_step_up_time,
2989         &sensor_dev_template_pwm_step_down_time,
2990         &sensor_dev_template_pwm_start,
2991         &sensor_dev_template_pwm_floor,
2992         &sensor_dev_template_pwm_weight_temp_sel,       /* 14 */
2993         &sensor_dev_template_pwm_weight_temp_step,
2994         &sensor_dev_template_pwm_weight_temp_step_tol,
2995         &sensor_dev_template_pwm_weight_temp_step_base,
2996         &sensor_dev_template_pwm_weight_duty_step,      /* 18 */
2997         &sensor_dev_template_pwm_max,                   /* 19 */
2998         &sensor_dev_template_pwm_step,                  /* 20 */
2999         &sensor_dev_template_pwm_weight_duty_base,      /* 21 */
3000         &sensor_dev_template_pwm_auto_point1_pwm,       /* 22 */
3001         &sensor_dev_template_pwm_auto_point1_temp,
3002         &sensor_dev_template_pwm_auto_point2_pwm,
3003         &sensor_dev_template_pwm_auto_point2_temp,
3004         &sensor_dev_template_pwm_auto_point3_pwm,
3005         &sensor_dev_template_pwm_auto_point3_temp,
3006         &sensor_dev_template_pwm_auto_point4_pwm,
3007         &sensor_dev_template_pwm_auto_point4_temp,
3008         &sensor_dev_template_pwm_auto_point5_pwm,
3009         &sensor_dev_template_pwm_auto_point5_temp,
3010         &sensor_dev_template_pwm_auto_point6_pwm,
3011         &sensor_dev_template_pwm_auto_point6_temp,
3012         &sensor_dev_template_pwm_auto_point7_pwm,
3013         &sensor_dev_template_pwm_auto_point7_temp,      /* 35 */
3014         NULL
3015 };
3016
3017 static struct sensor_template_group nct6775_pwm_template_group = {
3018         .templates = nct6775_attributes_pwm_template,
3019         .is_visible = nct6775_pwm_is_visible,
3020         .base = 1,
3021 };
3022
3023 static ssize_t
3024 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
3025 {
3026         struct nct6775_data *data = dev_get_drvdata(dev);
3027         return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
3028 }
3029
3030 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
3031
3032 /* Case open detection */
3033
3034 static ssize_t
3035 clear_caseopen(struct device *dev, struct device_attribute *attr,
3036                const char *buf, size_t count)
3037 {
3038         struct nct6775_data *data = dev_get_drvdata(dev);
3039         int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
3040         unsigned long val;
3041         u8 reg;
3042         int ret;
3043
3044         if (kstrtoul(buf, 10, &val) || val != 0)
3045                 return -EINVAL;
3046
3047         mutex_lock(&data->update_lock);
3048
3049         /*
3050          * Use CR registers to clear caseopen status.
3051          * The CR registers are the same for all chips, and not all chips
3052          * support clearing the caseopen status through "regular" registers.
3053          */
3054         ret = superio_enter(data->sioreg);
3055         if (ret) {
3056                 count = ret;
3057                 goto error;
3058         }
3059
3060         superio_select(data->sioreg, NCT6775_LD_ACPI);
3061         reg = superio_inb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
3062         reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3063         superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3064         reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3065         superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3066         superio_exit(data->sioreg);
3067
3068         data->valid = false;    /* Force cache refresh */
3069 error:
3070         mutex_unlock(&data->update_lock);
3071         return count;
3072 }
3073
3074 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
3075                           clear_caseopen, INTRUSION_ALARM_BASE);
3076 static SENSOR_DEVICE_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
3077                           clear_caseopen, INTRUSION_ALARM_BASE + 1);
3078 static SENSOR_DEVICE_ATTR(intrusion0_beep, S_IWUSR | S_IRUGO, show_beep,
3079                           store_beep, INTRUSION_ALARM_BASE);
3080 static SENSOR_DEVICE_ATTR(intrusion1_beep, S_IWUSR | S_IRUGO, show_beep,
3081                           store_beep, INTRUSION_ALARM_BASE + 1);
3082 static SENSOR_DEVICE_ATTR(beep_enable, S_IWUSR | S_IRUGO, show_beep,
3083                           store_beep, BEEP_ENABLE_BASE);
3084
3085 static umode_t nct6775_other_is_visible(struct kobject *kobj,
3086                                         struct attribute *attr, int index)
3087 {
3088         struct device *dev = container_of(kobj, struct device, kobj);
3089         struct nct6775_data *data = dev_get_drvdata(dev);
3090
3091         if (index == 0 && !data->have_vid)
3092                 return 0;
3093
3094         if (index == 1 || index == 2) {
3095                 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + index - 1] < 0)
3096                         return 0;
3097         }
3098
3099         if (index == 3 || index == 4) {
3100                 if (data->BEEP_BITS[INTRUSION_ALARM_BASE + index - 3] < 0)
3101                         return 0;
3102         }
3103
3104         return attr->mode;
3105 }
3106
3107 /*
3108  * nct6775_other_is_visible uses the index into the following array
3109  * to determine if attributes should be created or not.
3110  * Any change in order or content must be matched.
3111  */
3112 static struct attribute *nct6775_attributes_other[] = {
3113         &dev_attr_cpu0_vid.attr,                                /* 0 */
3114         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,        /* 1 */
3115         &sensor_dev_attr_intrusion1_alarm.dev_attr.attr,        /* 2 */
3116         &sensor_dev_attr_intrusion0_beep.dev_attr.attr,         /* 3 */
3117         &sensor_dev_attr_intrusion1_beep.dev_attr.attr,         /* 4 */
3118         &sensor_dev_attr_beep_enable.dev_attr.attr,             /* 5 */
3119 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
3120         &dev_attr_name.attr,
3121 #endif
3122         NULL
3123 };
3124
3125 static const struct attribute_group nct6775_group_other = {
3126         .attrs = nct6775_attributes_other,
3127         .is_visible = nct6775_other_is_visible,
3128 };
3129
3130 static inline void nct6775_init_device(struct nct6775_data *data)
3131 {
3132         int i;
3133         u8 tmp, diode;
3134
3135         /* Start monitoring if needed */
3136         if (data->REG_CONFIG) {
3137                 tmp = nct6775_read_value(data, data->REG_CONFIG);
3138                 if (!(tmp & 0x01))
3139                         nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
3140         }
3141
3142         /* Enable temperature sensors if needed */
3143         for (i = 0; i < NUM_TEMP; i++) {
3144                 if (!(data->have_temp & (1 << i)))
3145                         continue;
3146                 if (!data->reg_temp_config[i])
3147                         continue;
3148                 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
3149                 if (tmp & 0x01)
3150                         nct6775_write_value(data, data->reg_temp_config[i],
3151                                             tmp & 0xfe);
3152         }
3153
3154         /* Enable VBAT monitoring if needed */
3155         tmp = nct6775_read_value(data, data->REG_VBAT);
3156         if (!(tmp & 0x01))
3157                 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
3158
3159         diode = nct6775_read_value(data, data->REG_DIODE);
3160
3161         for (i = 0; i < data->temp_fixed_num; i++) {
3162                 if (!(data->have_temp_fixed & (1 << i)))
3163                         continue;
3164                 if ((tmp & (data->DIODE_MASK << i)))    /* diode */
3165                         data->temp_type[i]
3166                           = 3 - ((diode >> i) & data->DIODE_MASK);
3167                 else                            /* thermistor */
3168                         data->temp_type[i] = 4;
3169         }
3170 }
3171
3172 static void
3173 nct6775_check_fan_inputs(struct nct6775_data *data)
3174 {
3175         bool fan3pin, fan4pin, fan4min, fan5pin, fan6pin;
3176         bool pwm3pin, pwm4pin, pwm5pin, pwm6pin;
3177         int sioreg = data->sioreg;
3178         int regval;
3179
3180         /* fan4 and fan5 share some pins with the GPIO and serial flash */
3181         if (data->kind == nct6775) {
3182                 regval = superio_inb(sioreg, 0x2c);
3183
3184                 fan3pin = regval & (1 << 6);
3185                 pwm3pin = regval & (1 << 7);
3186
3187                 /* On NCT6775, fan4 shares pins with the fdc interface */
3188                 fan4pin = !(superio_inb(sioreg, 0x2A) & 0x80);
3189                 fan4min = false;
3190                 fan5pin = false;
3191                 fan6pin = false;
3192                 pwm4pin = false;
3193                 pwm5pin = false;
3194                 pwm6pin = false;
3195         } else if (data->kind == nct6776) {
3196                 bool gpok = superio_inb(sioreg, 0x27) & 0x80;
3197
3198                 superio_select(sioreg, NCT6775_LD_HWM);
3199                 regval = superio_inb(sioreg, SIO_REG_ENABLE);
3200
3201                 if (regval & 0x80)
3202                         fan3pin = gpok;
3203                 else
3204                         fan3pin = !(superio_inb(sioreg, 0x24) & 0x40);
3205
3206                 if (regval & 0x40)
3207                         fan4pin = gpok;
3208                 else
3209                         fan4pin = superio_inb(sioreg, 0x1C) & 0x01;
3210
3211                 if (regval & 0x20)
3212                         fan5pin = gpok;
3213                 else
3214                         fan5pin = superio_inb(sioreg, 0x1C) & 0x02;
3215
3216                 fan4min = fan4pin;
3217                 fan6pin = false;
3218                 pwm3pin = fan3pin;
3219                 pwm4pin = false;
3220                 pwm5pin = false;
3221                 pwm6pin = false;
3222         } else if (data->kind == nct6106) {
3223                 regval = superio_inb(sioreg, 0x24);
3224                 fan3pin = !(regval & 0x80);
3225                 pwm3pin = regval & 0x08;
3226
3227                 fan4pin = false;
3228                 fan4min = false;
3229                 fan5pin = false;
3230                 fan6pin = false;
3231                 pwm4pin = false;
3232                 pwm5pin = false;
3233                 pwm6pin = false;
3234         } else {        /* NCT6779D, NCT6791D, or NCT6792D */
3235                 regval = superio_inb(sioreg, 0x1c);
3236
3237                 fan3pin = !(regval & (1 << 5));
3238                 fan4pin = !(regval & (1 << 6));
3239                 fan5pin = !(regval & (1 << 7));
3240
3241                 pwm3pin = !(regval & (1 << 0));
3242                 pwm4pin = !(regval & (1 << 1));
3243                 pwm5pin = !(regval & (1 << 2));
3244
3245                 fan4min = fan4pin;
3246
3247                 if (data->kind == nct6791 || data->kind == nct6792) {
3248                         regval = superio_inb(sioreg, 0x2d);
3249                         fan6pin = (regval & (1 << 1));
3250                         pwm6pin = (regval & (1 << 0));
3251                 } else {        /* NCT6779D */
3252                         fan6pin = false;
3253                         pwm6pin = false;
3254                 }
3255         }
3256
3257         /* fan 1 and 2 (0x03) are always present */
3258         data->has_fan = 0x03 | (fan3pin << 2) | (fan4pin << 3) |
3259                 (fan5pin << 4) | (fan6pin << 5);
3260         data->has_fan_min = 0x03 | (fan3pin << 2) | (fan4min << 3) |
3261                 (fan5pin << 4);
3262         data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) |
3263                 (pwm5pin << 4) | (pwm6pin << 5);
3264 }
3265
3266 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
3267                              int *available, int *mask)
3268 {
3269         int i;
3270         u8 src;
3271
3272         for (i = 0; i < data->pwm_num && *available; i++) {
3273                 int index;
3274
3275                 if (!regp[i])
3276                         continue;
3277                 src = nct6775_read_value(data, regp[i]);
3278                 src &= 0x1f;
3279                 if (!src || (*mask & (1 << src)))
3280                         continue;
3281                 if (src >= data->temp_label_num ||
3282                     !strlen(data->temp_label[src]))
3283                         continue;
3284
3285                 index = __ffs(*available);
3286                 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3287                 *available &= ~(1 << index);
3288                 *mask |= 1 << src;
3289         }
3290 }
3291
3292 static int nct6775_probe(struct platform_device *pdev)
3293 {
3294         struct device *dev = &pdev->dev;
3295         struct nct6775_sio_data *sio_data = dev_get_platdata(dev);
3296         struct nct6775_data *data;
3297         struct resource *res;
3298         int i, s, err = 0;
3299         int src, mask, available;
3300         const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3301         const u16 *reg_temp_mon, *reg_temp_alternate, *reg_temp_crit;
3302         const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL;
3303         int num_reg_temp, num_reg_temp_mon;
3304         u8 cr2a;
3305         struct attribute_group *group;
3306         struct device *hwmon_dev;
3307
3308         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3309         if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3310                                  DRVNAME))
3311                 return -EBUSY;
3312
3313         data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3314                             GFP_KERNEL);
3315         if (!data)
3316                 return -ENOMEM;
3317
3318         data->kind = sio_data->kind;
3319         data->sioreg = sio_data->sioreg;
3320         data->addr = res->start;
3321         mutex_init(&data->update_lock);
3322         data->name = nct6775_device_names[data->kind];
3323         data->bank = 0xff;              /* Force initial bank selection */
3324         platform_set_drvdata(pdev, data);
3325
3326         switch (data->kind) {
3327         case nct6106:
3328                 data->in_num = 9;
3329                 data->pwm_num = 3;
3330                 data->auto_pwm_num = 4;
3331                 data->temp_fixed_num = 3;
3332                 data->num_temp_alarms = 6;
3333                 data->num_temp_beeps = 6;
3334
3335                 data->fan_from_reg = fan_from_reg13;
3336                 data->fan_from_reg_min = fan_from_reg13;
3337
3338                 data->temp_label = nct6776_temp_label;
3339                 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3340
3341                 data->REG_VBAT = NCT6106_REG_VBAT;
3342                 data->REG_DIODE = NCT6106_REG_DIODE;
3343                 data->DIODE_MASK = NCT6106_DIODE_MASK;
3344                 data->REG_VIN = NCT6106_REG_IN;
3345                 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3346                 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3347                 data->REG_TARGET = NCT6106_REG_TARGET;
3348                 data->REG_FAN = NCT6106_REG_FAN;
3349                 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
3350                 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
3351                 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
3352                 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
3353                 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
3354                 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
3355                 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
3356                 data->REG_PWM[0] = NCT6106_REG_PWM;
3357                 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
3358                 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
3359                 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3360                 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3361                 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3362                 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3363                 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3364                 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
3365                 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
3366                 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
3367                 data->REG_CRITICAL_TEMP_TOLERANCE
3368                   = NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
3369                 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
3370                 data->CRITICAL_PWM_ENABLE_MASK
3371                   = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3372                 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
3373                 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3374                 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3375                 data->REG_TEMP_SEL = NCT6106_REG_TEMP_SEL;
3376                 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3377                 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3378                 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3379                 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3380                 data->REG_ALARM = NCT6106_REG_ALARM;
3381                 data->ALARM_BITS = NCT6106_ALARM_BITS;
3382                 data->REG_BEEP = NCT6106_REG_BEEP;
3383                 data->BEEP_BITS = NCT6106_BEEP_BITS;
3384
3385                 reg_temp = NCT6106_REG_TEMP;
3386                 reg_temp_mon = NCT6106_REG_TEMP_MON;
3387                 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3388                 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON);
3389                 reg_temp_over = NCT6106_REG_TEMP_OVER;
3390                 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3391                 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3392                 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3393                 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3394                 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3395                 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3396
3397                 break;
3398         case nct6775:
3399                 data->in_num = 9;
3400                 data->pwm_num = 3;
3401                 data->auto_pwm_num = 6;
3402                 data->has_fan_div = true;
3403                 data->temp_fixed_num = 3;
3404                 data->num_temp_alarms = 3;
3405                 data->num_temp_beeps = 3;
3406
3407                 data->ALARM_BITS = NCT6775_ALARM_BITS;
3408                 data->BEEP_BITS = NCT6775_BEEP_BITS;
3409
3410                 data->fan_from_reg = fan_from_reg16;
3411                 data->fan_from_reg_min = fan_from_reg8;
3412                 data->target_temp_mask = 0x7f;
3413                 data->tolerance_mask = 0x0f;
3414                 data->speed_tolerance_limit = 15;
3415
3416                 data->temp_label = nct6775_temp_label;
3417                 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
3418
3419                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3420                 data->REG_VBAT = NCT6775_REG_VBAT;
3421                 data->REG_DIODE = NCT6775_REG_DIODE;
3422                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3423                 data->REG_VIN = NCT6775_REG_IN;
3424                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3425                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3426                 data->REG_TARGET = NCT6775_REG_TARGET;
3427                 data->REG_FAN = NCT6775_REG_FAN;
3428                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3429                 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3430                 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3431                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3432                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3433                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3434                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3435                 data->REG_PWM[0] = NCT6775_REG_PWM;
3436                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3437                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3438                 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3439                 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3440                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3441                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3442                 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3443                 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3444                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3445                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3446                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3447                 data->REG_CRITICAL_TEMP_TOLERANCE
3448                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3449                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3450                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3451                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3452                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3453                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3454                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3455                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3456                 data->REG_ALARM = NCT6775_REG_ALARM;
3457                 data->REG_BEEP = NCT6775_REG_BEEP;
3458
3459                 reg_temp = NCT6775_REG_TEMP;
3460                 reg_temp_mon = NCT6775_REG_TEMP_MON;
3461                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3462                 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3463                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3464                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3465                 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3466                 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3467                 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3468
3469                 break;
3470         case nct6776:
3471                 data->in_num = 9;
3472                 data->pwm_num = 3;
3473                 data->auto_pwm_num = 4;
3474                 data->has_fan_div = false;
3475                 data->temp_fixed_num = 3;
3476                 data->num_temp_alarms = 3;
3477                 data->num_temp_beeps = 6;
3478
3479                 data->ALARM_BITS = NCT6776_ALARM_BITS;
3480                 data->BEEP_BITS = NCT6776_BEEP_BITS;
3481
3482                 data->fan_from_reg = fan_from_reg13;
3483                 data->fan_from_reg_min = fan_from_reg13;
3484                 data->target_temp_mask = 0xff;
3485                 data->tolerance_mask = 0x07;
3486                 data->speed_tolerance_limit = 63;
3487
3488                 data->temp_label = nct6776_temp_label;
3489                 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3490
3491                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3492                 data->REG_VBAT = NCT6775_REG_VBAT;
3493                 data->REG_DIODE = NCT6775_REG_DIODE;
3494                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3495                 data->REG_VIN = NCT6775_REG_IN;
3496                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3497                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3498                 data->REG_TARGET = NCT6775_REG_TARGET;
3499                 data->REG_FAN = NCT6775_REG_FAN;
3500                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3501                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3502                 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3503                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3504                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3505                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3506                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3507                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3508                 data->REG_PWM[0] = NCT6775_REG_PWM;
3509                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3510                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3511                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3512                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3513                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3514                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3515                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3516                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3517                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3518                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3519                 data->REG_CRITICAL_TEMP_TOLERANCE
3520                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3521                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3522                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3523                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3524                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3525                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3526                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3527                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3528                 data->REG_ALARM = NCT6775_REG_ALARM;
3529                 data->REG_BEEP = NCT6776_REG_BEEP;
3530
3531                 reg_temp = NCT6775_REG_TEMP;
3532                 reg_temp_mon = NCT6775_REG_TEMP_MON;
3533                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3534                 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3535                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3536                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3537                 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3538                 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3539                 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3540
3541                 break;
3542         case nct6779:
3543                 data->in_num = 15;
3544                 data->pwm_num = 5;
3545                 data->auto_pwm_num = 4;
3546                 data->has_fan_div = false;
3547                 data->temp_fixed_num = 6;
3548                 data->num_temp_alarms = 2;
3549                 data->num_temp_beeps = 2;
3550
3551                 data->ALARM_BITS = NCT6779_ALARM_BITS;
3552                 data->BEEP_BITS = NCT6779_BEEP_BITS;
3553
3554                 data->fan_from_reg = fan_from_reg13;
3555                 data->fan_from_reg_min = fan_from_reg13;
3556                 data->target_temp_mask = 0xff;
3557                 data->tolerance_mask = 0x07;
3558                 data->speed_tolerance_limit = 63;
3559
3560                 data->temp_label = nct6779_temp_label;
3561                 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3562
3563                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3564                 data->REG_VBAT = NCT6775_REG_VBAT;
3565                 data->REG_DIODE = NCT6775_REG_DIODE;
3566                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3567                 data->REG_VIN = NCT6779_REG_IN;
3568                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3569                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3570                 data->REG_TARGET = NCT6775_REG_TARGET;
3571                 data->REG_FAN = NCT6779_REG_FAN;
3572                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3573                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3574                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3575                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3576                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3577                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3578                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3579                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3580                 data->REG_PWM[0] = NCT6775_REG_PWM;
3581                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3582                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3583                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3584                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3585                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3586                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3587                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3588                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3589                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3590                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3591                 data->REG_CRITICAL_TEMP_TOLERANCE
3592                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3593                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3594                 data->CRITICAL_PWM_ENABLE_MASK
3595                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3596                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3597                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3598                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3599                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3600                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3601                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3602                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3603                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3604                 data->REG_ALARM = NCT6779_REG_ALARM;
3605                 data->REG_BEEP = NCT6776_REG_BEEP;
3606
3607                 reg_temp = NCT6779_REG_TEMP;
3608                 reg_temp_mon = NCT6779_REG_TEMP_MON;
3609                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3610                 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3611                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3612                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3613                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3614                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3615                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3616
3617                 break;
3618         case nct6791:
3619         case nct6792:
3620                 data->in_num = 15;
3621                 data->pwm_num = 6;
3622                 data->auto_pwm_num = 4;
3623                 data->has_fan_div = false;
3624                 data->temp_fixed_num = 6;
3625                 data->num_temp_alarms = 2;
3626                 data->num_temp_beeps = 2;
3627
3628                 data->ALARM_BITS = NCT6791_ALARM_BITS;
3629                 data->BEEP_BITS = NCT6779_BEEP_BITS;
3630
3631                 data->fan_from_reg = fan_from_reg13;
3632                 data->fan_from_reg_min = fan_from_reg13;
3633                 data->target_temp_mask = 0xff;
3634                 data->tolerance_mask = 0x07;
3635                 data->speed_tolerance_limit = 63;
3636
3637                 data->temp_label = nct6779_temp_label;
3638                 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3639
3640                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3641                 data->REG_VBAT = NCT6775_REG_VBAT;
3642                 data->REG_DIODE = NCT6775_REG_DIODE;
3643                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3644                 data->REG_VIN = NCT6779_REG_IN;
3645                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3646                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3647                 data->REG_TARGET = NCT6775_REG_TARGET;
3648                 data->REG_FAN = NCT6779_REG_FAN;
3649                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3650                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3651                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3652                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3653                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3654                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3655                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3656                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3657                 data->REG_PWM[0] = NCT6775_REG_PWM;
3658                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3659                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3660                 data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP;
3661                 data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE;
3662                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3663                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3664                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3665                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3666                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3667                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3668                 data->REG_CRITICAL_TEMP_TOLERANCE
3669                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3670                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3671                 data->CRITICAL_PWM_ENABLE_MASK
3672                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3673                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3674                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3675                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3676                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3677                 data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL;
3678                 data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP;
3679                 data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL;
3680                 data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE;
3681                 data->REG_ALARM = NCT6791_REG_ALARM;
3682                 if (data->kind == nct6791)
3683                         data->REG_BEEP = NCT6776_REG_BEEP;
3684                 else
3685                         data->REG_BEEP = NCT6792_REG_BEEP;
3686
3687                 reg_temp = NCT6779_REG_TEMP;
3688                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3689                 if (data->kind == nct6791) {
3690                         reg_temp_mon = NCT6779_REG_TEMP_MON;
3691                         num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3692                 } else {
3693                         reg_temp_mon = NCT6792_REG_TEMP_MON;
3694                         num_reg_temp_mon = ARRAY_SIZE(NCT6792_REG_TEMP_MON);
3695                 }
3696                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3697                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3698                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3699                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3700                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3701
3702                 break;
3703         default:
3704                 return -ENODEV;
3705         }
3706         data->have_in = (1 << data->in_num) - 1;
3707         data->have_temp = 0;
3708
3709         /*
3710          * On some boards, not all available temperature sources are monitored,
3711          * even though some of the monitoring registers are unused.
3712          * Get list of unused monitoring registers, then detect if any fan
3713          * controls are configured to use unmonitored temperature sources.
3714          * If so, assign the unmonitored temperature sources to available
3715          * monitoring registers.
3716          */
3717         mask = 0;
3718         available = 0;
3719         for (i = 0; i < num_reg_temp; i++) {
3720                 if (reg_temp[i] == 0)
3721                         continue;
3722
3723                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3724                 if (!src || (mask & (1 << src)))
3725                         available |= 1 << i;
3726
3727                 mask |= 1 << src;
3728         }
3729
3730         /*
3731          * Now find unmonitored temperature registers and enable monitoring
3732          * if additional monitoring registers are available.
3733          */
3734         add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
3735         add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
3736
3737         mask = 0;
3738         s = NUM_TEMP_FIXED;     /* First dynamic temperature attribute */
3739         for (i = 0; i < num_reg_temp; i++) {
3740                 if (reg_temp[i] == 0)
3741                         continue;
3742
3743                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3744                 if (!src || (mask & (1 << src)))
3745                         continue;
3746
3747                 if (src >= data->temp_label_num ||
3748                     !strlen(data->temp_label[src])) {
3749                         dev_info(dev,
3750                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3751                                  src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
3752                         continue;
3753                 }
3754
3755                 mask |= 1 << src;
3756
3757                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3758                 if (src <= data->temp_fixed_num) {
3759                         data->have_temp |= 1 << (src - 1);
3760                         data->have_temp_fixed |= 1 << (src - 1);
3761                         data->reg_temp[0][src - 1] = reg_temp[i];
3762                         data->reg_temp[1][src - 1] = reg_temp_over[i];
3763                         data->reg_temp[2][src - 1] = reg_temp_hyst[i];
3764                         if (reg_temp_crit_h && reg_temp_crit_h[i])
3765                                 data->reg_temp[3][src - 1] = reg_temp_crit_h[i];
3766                         else if (reg_temp_crit[src - 1])
3767                                 data->reg_temp[3][src - 1]
3768                                   = reg_temp_crit[src - 1];
3769                         if (reg_temp_crit_l && reg_temp_crit_l[i])
3770                                 data->reg_temp[4][src - 1] = reg_temp_crit_l[i];
3771                         data->reg_temp_config[src - 1] = reg_temp_config[i];
3772                         data->temp_src[src - 1] = src;
3773                         continue;
3774                 }
3775
3776                 if (s >= NUM_TEMP)
3777                         continue;
3778
3779                 /* Use dynamic index for other sources */
3780                 data->have_temp |= 1 << s;
3781                 data->reg_temp[0][s] = reg_temp[i];
3782                 data->reg_temp[1][s] = reg_temp_over[i];
3783                 data->reg_temp[2][s] = reg_temp_hyst[i];
3784                 data->reg_temp_config[s] = reg_temp_config[i];
3785                 if (reg_temp_crit_h && reg_temp_crit_h[i])
3786                         data->reg_temp[3][s] = reg_temp_crit_h[i];
3787                 else if (reg_temp_crit[src - 1])
3788                         data->reg_temp[3][s] = reg_temp_crit[src - 1];
3789                 if (reg_temp_crit_l && reg_temp_crit_l[i])
3790                         data->reg_temp[4][s] = reg_temp_crit_l[i];
3791
3792                 data->temp_src[s] = src;
3793                 s++;
3794         }
3795
3796         /*
3797          * Repeat with temperatures used for fan control.
3798          * This set of registers does not support limits.
3799          */
3800         for (i = 0; i < num_reg_temp_mon; i++) {
3801                 if (reg_temp_mon[i] == 0)
3802                         continue;
3803
3804                 src = nct6775_read_value(data, data->REG_TEMP_SEL[i]) & 0x1f;
3805                 if (!src || (mask & (1 << src)))
3806                         continue;
3807
3808                 if (src >= data->temp_label_num ||
3809                     !strlen(data->temp_label[src])) {
3810                         dev_info(dev,
3811                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3812                                  src, i, data->REG_TEMP_SEL[i],
3813                                  reg_temp_mon[i]);
3814                         continue;
3815                 }
3816
3817                 mask |= 1 << src;
3818
3819                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3820                 if (src <= data->temp_fixed_num) {
3821                         if (data->have_temp & (1 << (src - 1)))
3822                                 continue;
3823                         data->have_temp |= 1 << (src - 1);
3824                         data->have_temp_fixed |= 1 << (src - 1);
3825                         data->reg_temp[0][src - 1] = reg_temp_mon[i];
3826                         data->temp_src[src - 1] = src;
3827                         continue;
3828                 }
3829
3830                 if (s >= NUM_TEMP)
3831                         continue;
3832
3833                 /* Use dynamic index for other sources */
3834                 data->have_temp |= 1 << s;
3835                 data->reg_temp[0][s] = reg_temp_mon[i];
3836                 data->temp_src[s] = src;
3837                 s++;
3838         }
3839
3840 #ifdef USE_ALTERNATE
3841         /*
3842          * Go through the list of alternate temp registers and enable
3843          * if possible.
3844          * The temperature is already monitored if the respective bit in <mask>
3845          * is set.
3846          */
3847         for (i = 0; i < data->temp_label_num - 1; i++) {
3848                 if (!reg_temp_alternate[i])
3849                         continue;
3850                 if (mask & (1 << (i + 1)))
3851                         continue;
3852                 if (i < data->temp_fixed_num) {
3853                         if (data->have_temp & (1 << i))
3854                                 continue;
3855                         data->have_temp |= 1 << i;
3856                         data->have_temp_fixed |= 1 << i;
3857                         data->reg_temp[0][i] = reg_temp_alternate[i];
3858                         if (i < num_reg_temp) {
3859                                 data->reg_temp[1][i] = reg_temp_over[i];
3860                                 data->reg_temp[2][i] = reg_temp_hyst[i];
3861                         }
3862                         data->temp_src[i] = i + 1;
3863                         continue;
3864                 }
3865
3866                 if (s >= NUM_TEMP)      /* Abort if no more space */
3867                         break;
3868
3869                 data->have_temp |= 1 << s;
3870                 data->reg_temp[0][s] = reg_temp_alternate[i];
3871                 data->temp_src[s] = i + 1;
3872                 s++;
3873         }
3874 #endif /* USE_ALTERNATE */
3875
3876         /* Initialize the chip */
3877         nct6775_init_device(data);
3878
3879         err = superio_enter(sio_data->sioreg);
3880         if (err)
3881                 return err;
3882
3883         cr2a = superio_inb(sio_data->sioreg, 0x2a);
3884         switch (data->kind) {
3885         case nct6775:
3886                 data->have_vid = (cr2a & 0x40);
3887                 break;
3888         case nct6776:
3889                 data->have_vid = (cr2a & 0x60) == 0x40;
3890                 break;
3891         case nct6106:
3892         case nct6779:
3893         case nct6791:
3894         case nct6792:
3895                 break;
3896         }
3897
3898         /*
3899          * Read VID value
3900          * We can get the VID input values directly at logical device D 0xe3.
3901          */
3902         if (data->have_vid) {
3903                 superio_select(sio_data->sioreg, NCT6775_LD_VID);
3904                 data->vid = superio_inb(sio_data->sioreg, 0xe3);
3905                 data->vrm = vid_which_vrm();
3906         }
3907
3908         if (fan_debounce) {
3909                 u8 tmp;
3910
3911                 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3912                 tmp = superio_inb(sio_data->sioreg,
3913                                   NCT6775_REG_CR_FAN_DEBOUNCE);
3914                 switch (data->kind) {
3915                 case nct6106:
3916                         tmp |= 0xe0;
3917                         break;
3918                 case nct6775:
3919                         tmp |= 0x1e;
3920                         break;
3921                 case nct6776:
3922                 case nct6779:
3923                         tmp |= 0x3e;
3924                         break;
3925                 case nct6791:
3926                 case nct6792:
3927                         tmp |= 0x7e;
3928                         break;
3929                 }
3930                 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
3931                              tmp);
3932                 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
3933                          data->name);
3934         }
3935
3936         nct6775_check_fan_inputs(data);
3937
3938         superio_exit(sio_data->sioreg);
3939
3940         /* Read fan clock dividers immediately */
3941         nct6775_init_fan_common(dev, data);
3942
3943         /* Register sysfs hooks */
3944         group = nct6775_create_attr_group(dev, &nct6775_pwm_template_group,
3945                                           data->pwm_num);
3946         if (IS_ERR(group))
3947                 return PTR_ERR(group);
3948
3949         data->groups[data->num_attr_groups++] = group;
3950
3951         group = nct6775_create_attr_group(dev, &nct6775_in_template_group,
3952                                           fls(data->have_in));
3953         if (IS_ERR(group))
3954                 return PTR_ERR(group);
3955
3956         data->groups[data->num_attr_groups++] = group;
3957
3958         group = nct6775_create_attr_group(dev, &nct6775_fan_template_group,
3959                                           fls(data->has_fan));
3960         if (IS_ERR(group))
3961                 return PTR_ERR(group);
3962
3963         data->groups[data->num_attr_groups++] = group;
3964
3965         group = nct6775_create_attr_group(dev, &nct6775_temp_template_group,
3966                                           fls(data->have_temp));
3967         if (IS_ERR(group))
3968                 return PTR_ERR(group);
3969
3970         data->groups[data->num_attr_groups++] = group;
3971         data->groups[data->num_attr_groups++] = &nct6775_group_other;
3972
3973 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
3974         err = sysfs_create_groups(&dev->kobj, data->groups);
3975         if (err < 0)
3976                 return err;
3977         hwmon_dev = hwmon_device_register(dev);
3978         if (IS_ERR(hwmon_dev)) {
3979                 sysfs_remove_groups(&dev->kobj, data->groups);
3980                 return PTR_ERR(hwmon_dev);
3981         }
3982         data->hwmon_dev = hwmon_dev;
3983 #else
3984         hwmon_dev = devm_hwmon_device_register_with_groups(dev, data->name,
3985                                                            data, data->groups);
3986 #endif
3987         return PTR_ERR_OR_ZERO(hwmon_dev);
3988 }
3989
3990 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
3991 static int nct6775_remove(struct platform_device *pdev)
3992 {
3993         struct nct6775_data *data = platform_get_drvdata(pdev);
3994
3995         hwmon_device_unregister(data->hwmon_dev);
3996         sysfs_remove_groups(&pdev->dev.kobj, data->groups);
3997         return 0;
3998 }
3999 #endif
4000
4001 static void nct6791_enable_io_mapping(int sioaddr)
4002 {
4003         int val;
4004
4005         val = superio_inb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE);
4006         if (val & 0x10) {
4007                 pr_info("Enabling hardware monitor logical device mappings.\n");
4008                 superio_outb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE,
4009                              val & ~0x10);
4010         }
4011 }
4012
4013 #ifdef CONFIG_PM
4014 static int nct6775_suspend(struct device *dev)
4015 {
4016         struct nct6775_data *data = nct6775_update_device(dev);
4017
4018         mutex_lock(&data->update_lock);
4019         data->vbat = nct6775_read_value(data, data->REG_VBAT);
4020         if (data->kind == nct6775) {
4021                 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
4022                 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
4023         }
4024         mutex_unlock(&data->update_lock);
4025
4026         return 0;
4027 }
4028
4029 static int nct6775_resume(struct device *dev)
4030 {
4031         struct nct6775_data *data = dev_get_drvdata(dev);
4032         int i, j, err = 0;
4033
4034         mutex_lock(&data->update_lock);
4035         data->bank = 0xff;              /* Force initial bank selection */
4036
4037         if (data->kind == nct6791 || data->kind == nct6792) {
4038                 err = superio_enter(data->sioreg);
4039                 if (err)
4040                         goto abort;
4041
4042                 nct6791_enable_io_mapping(data->sioreg);
4043                 superio_exit(data->sioreg);
4044         }
4045
4046         /* Restore limits */
4047         for (i = 0; i < data->in_num; i++) {
4048                 if (!(data->have_in & (1 << i)))
4049                         continue;
4050
4051                 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
4052                                     data->in[i][1]);
4053                 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
4054                                     data->in[i][2]);
4055         }
4056
4057         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
4058                 if (!(data->has_fan_min & (1 << i)))
4059                         continue;
4060
4061                 nct6775_write_value(data, data->REG_FAN_MIN[i],
4062                                     data->fan_min[i]);
4063         }
4064
4065         for (i = 0; i < NUM_TEMP; i++) {
4066                 if (!(data->have_temp & (1 << i)))
4067                         continue;
4068
4069                 for (j = 1; j < ARRAY_SIZE(data->reg_temp); j++)
4070                         if (data->reg_temp[j][i])
4071                                 nct6775_write_temp(data, data->reg_temp[j][i],
4072                                                    data->temp[j][i]);
4073         }
4074
4075         /* Restore other settings */
4076         nct6775_write_value(data, data->REG_VBAT, data->vbat);
4077         if (data->kind == nct6775) {
4078                 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
4079                 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
4080         }
4081
4082 abort:
4083         /* Force re-reading all values */
4084         data->valid = false;
4085         mutex_unlock(&data->update_lock);
4086
4087         return err;
4088 }
4089
4090 static const struct dev_pm_ops nct6775_dev_pm_ops = {
4091         .suspend = nct6775_suspend,
4092         .resume = nct6775_resume,
4093         .freeze = nct6775_suspend,
4094         .restore = nct6775_resume,
4095 };
4096
4097 #define NCT6775_DEV_PM_OPS      (&nct6775_dev_pm_ops)
4098 #else
4099 #define NCT6775_DEV_PM_OPS      NULL
4100 #endif /* CONFIG_PM */
4101
4102 static struct platform_driver nct6775_driver = {
4103         .driver = {
4104                 .owner  = THIS_MODULE,
4105                 .name   = DRVNAME,
4106                 .pm     = NCT6775_DEV_PM_OPS,
4107         },
4108         .probe          = nct6775_probe,
4109 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4110         .remove         = nct6775_remove,
4111 #endif
4112 };
4113
4114 static const char * const nct6775_sio_names[] __initconst = {
4115         "NCT6106D",
4116         "NCT6775F",
4117         "NCT6776D/F",
4118         "NCT6779D",
4119         "NCT6791D",
4120         "NCT6792D",
4121 };
4122
4123 /* nct6775_find() looks for a '627 in the Super-I/O config space */
4124 static int __init nct6775_find(int sioaddr, struct nct6775_sio_data *sio_data)
4125 {
4126         u16 val;
4127         int err;
4128         int addr;
4129
4130         err = superio_enter(sioaddr);
4131         if (err)
4132                 return err;
4133
4134         if (force_id)
4135                 val = force_id;
4136         else
4137                 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
4138                     | superio_inb(sioaddr, SIO_REG_DEVID + 1);
4139         switch (val & SIO_ID_MASK) {
4140         case SIO_NCT6106_ID:
4141                 sio_data->kind = nct6106;
4142                 break;
4143         case SIO_NCT6775_ID:
4144                 sio_data->kind = nct6775;
4145                 break;
4146         case SIO_NCT6776_ID:
4147                 sio_data->kind = nct6776;
4148                 break;
4149         case SIO_NCT6779_ID:
4150                 sio_data->kind = nct6779;
4151                 break;
4152         case SIO_NCT6791_ID:
4153                 sio_data->kind = nct6791;
4154                 break;
4155         case SIO_NCT6792_ID:
4156                 sio_data->kind = nct6792;
4157                 break;
4158         default:
4159                 if (val != 0xffff)
4160                         pr_debug("unsupported chip ID: 0x%04x\n", val);
4161                 superio_exit(sioaddr);
4162                 return -ENODEV;
4163         }
4164
4165         /* We have a known chip, find the HWM I/O address */
4166         superio_select(sioaddr, NCT6775_LD_HWM);
4167         val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
4168             | superio_inb(sioaddr, SIO_REG_ADDR + 1);
4169         addr = val & IOREGION_ALIGNMENT;
4170         if (addr == 0) {
4171                 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
4172                 superio_exit(sioaddr);
4173                 return -ENODEV;
4174         }
4175
4176         /* Activate logical device if needed */
4177         val = superio_inb(sioaddr, SIO_REG_ENABLE);
4178         if (!(val & 0x01)) {
4179                 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
4180                 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
4181         }
4182
4183         if (sio_data->kind == nct6791 || sio_data->kind == nct6792)
4184                 nct6791_enable_io_mapping(sioaddr);
4185
4186         superio_exit(sioaddr);
4187         pr_info("Found %s or compatible chip at %#x:%#x\n",
4188                 nct6775_sio_names[sio_data->kind], sioaddr, addr);
4189         sio_data->sioreg = sioaddr;
4190
4191         return addr;
4192 }
4193
4194 /*
4195  * when Super-I/O functions move to a separate file, the Super-I/O
4196  * bus will manage the lifetime of the device and this module will only keep
4197  * track of the nct6775 driver. But since we use platform_device_alloc(), we
4198  * must keep track of the device
4199  */
4200 static struct platform_device *pdev[2];
4201
4202 static int __init sensors_nct6775_init(void)
4203 {
4204         int i, err;
4205         bool found = false;
4206         int address;
4207         struct resource res;
4208         struct nct6775_sio_data sio_data;
4209         int sioaddr[2] = { 0x2e, 0x4e };
4210
4211         err = platform_driver_register(&nct6775_driver);
4212         if (err)
4213                 return err;
4214
4215         /*
4216          * initialize sio_data->kind and sio_data->sioreg.
4217          *
4218          * when Super-I/O functions move to a separate file, the Super-I/O
4219          * driver will probe 0x2e and 0x4e and auto-detect the presence of a
4220          * nct6775 hardware monitor, and call probe()
4221          */
4222         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4223                 address = nct6775_find(sioaddr[i], &sio_data);
4224                 if (address <= 0)
4225                         continue;
4226
4227                 found = true;
4228
4229                 pdev[i] = platform_device_alloc(DRVNAME, address);
4230                 if (!pdev[i]) {
4231                         err = -ENOMEM;
4232                         goto exit_device_put;
4233                 }
4234
4235                 err = platform_device_add_data(pdev[i], &sio_data,
4236                                                sizeof(struct nct6775_sio_data));
4237                 if (err)
4238                         goto exit_device_put;
4239
4240                 memset(&res, 0, sizeof(res));
4241                 res.name = DRVNAME;
4242                 res.start = address + IOREGION_OFFSET;
4243                 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
4244                 res.flags = IORESOURCE_IO;
4245
4246                 err = acpi_check_resource_conflict(&res);
4247                 if (err) {
4248                         platform_device_put(pdev[i]);
4249                         pdev[i] = NULL;
4250                         continue;
4251                 }
4252
4253                 err = platform_device_add_resources(pdev[i], &res, 1);
4254                 if (err)
4255                         goto exit_device_put;
4256
4257                 /* platform_device_add calls probe() */
4258                 err = platform_device_add(pdev[i]);
4259                 if (err)
4260                         goto exit_device_put;
4261         }
4262         if (!found) {
4263                 err = -ENODEV;
4264                 goto exit_unregister;
4265         }
4266
4267         return 0;
4268
4269 exit_device_put:
4270         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4271                 if (pdev[i])
4272                         platform_device_put(pdev[i]);
4273         }
4274 exit_unregister:
4275         platform_driver_unregister(&nct6775_driver);
4276         return err;
4277 }
4278
4279 static void __exit sensors_nct6775_exit(void)
4280 {
4281         int i;
4282
4283         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4284                 if (pdev[i])
4285                         platform_device_unregister(pdev[i]);
4286         }
4287         platform_driver_unregister(&nct6775_driver);
4288 }
4289
4290 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4291 MODULE_DESCRIPTION("NCT6775F/NCT6776F/NCT6779D driver");
4292 MODULE_LICENSE("GPL");
4293
4294 module_init(sensors_nct6775_init);
4295 module_exit(sensors_nct6775_exit);