git.sur5r.net Git - groeck-nct6775/blob - nct6775.c

   1 /*
   2  * nct6775 - Driver for the hardware monitoring functionality of
   3  *             Nuvoton NCT677x Super-I/O chips
   4  *
   5  * Copyright (C) 2012  Guenter Roeck <linux@roeck-us.net>
   6  *
   7  * Derived from w83627ehf driver
   8  * Copyright (C) 2005-2012  Jean Delvare <khali@linux-fr.org>
   9  * Copyright (C) 2006  Yuan Mu (Winbond),
  10  *                     Rudolf Marek <r.marek@assembler.cz>
  11  *                     David Hubbard <david.c.hubbard@gmail.com>
  12  *                     Daniel J Blueman <daniel.blueman@gmail.com>
  13  * Copyright (C) 2010  Sheng-Yuan Huang (Nuvoton) (PS00)
  14  *
  15  * Shamelessly ripped from the w83627hf driver
  16  * Copyright (C) 2003  Mark Studebaker
  17  *
  18  * This program is free software; you can redistribute it and/or modify
  19  * it under the terms of the GNU General Public License as published by
  20  * the Free Software Foundation; either version 2 of the License, or
  21  * (at your option) any later version.
  22  *
  23  * This program is distributed in the hope that it will be useful,
  24  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26  * GNU General Public License for more details.
  27  *
  28  * You should have received a copy of the GNU General Public License
  29  * along with this program; if not, write to the Free Software
  30  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  31  *
  32  *
  33  * Supports the following chips:
  34  *
  35  * Chip        #vin    #fan    #pwm    #temp  chip IDs       man ID
  36  * nct6106d     9      3       3       6+3    0xc450 0xc1    0x5ca3
  37  * nct6775f     9      4       3       6+3    0xb470 0xc1    0x5ca3
  38  * nct6776f     9      5       3       6+3    0xc330 0xc1    0x5ca3
  39  * nct6779d    15      5       5       2+6    0xc560 0xc1    0x5ca3
  40  *
  41  * #temp lists the number of monitored temperature sources (first value) plus
  42  * the number of directly connectable temperature sensors (second value).
  43  */
  44
  45 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  46
  47 #include <linux/module.h>
  48 #include <linux/init.h>
  49 #include <linux/slab.h>
  50 #include <linux/jiffies.h>
  51 #include <linux/platform_device.h>
  52 #include <linux/hwmon.h>
  53 #include <linux/hwmon-sysfs.h>
  54 #include <linux/hwmon-vid.h>
  55 #include <linux/err.h>
  56 #include <linux/mutex.h>
  57 #include <linux/acpi.h>
  58 #include <linux/io.h>
  59 #include "lm75.h"
  60 #include "compat.h"
  61
  62 #define USE_ALTERNATE
  63
  64 enum kinds { nct6106, nct6775, nct6776, nct6779 };
  65
  66 /* used to set data->name = nct6775_device_names[data->sio_kind] */
  67 static const char * const nct6775_device_names[] = {
  68         "nct6106",
  69         "nct6775",
  70         "nct6776",
  71         "nct6779",
  72 };
  73
  74 static unsigned short force_id;
  75 module_param(force_id, ushort, 0);
  76 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  77
  78 static unsigned short fan_debounce;
  79 module_param(fan_debounce, ushort, 0);
  80 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
  81
  82 #define DRVNAME "nct6775"
  83
  84 /*
  85  * Super-I/O constants and functions
  86  */
  87
  88 #define NCT6775_LD_ACPI         0x0a
  89 #define NCT6775_LD_HWM          0x0b
  90 #define NCT6775_LD_VID          0x0d
  91
  92 #define SIO_REG_LDSEL           0x07    /* Logical device select */
  93 #define SIO_REG_DEVID           0x20    /* Device ID (2 bytes) */
  94 #define SIO_REG_ENABLE          0x30    /* Logical device enable */
  95 #define SIO_REG_ADDR            0x60    /* Logical device address (2 bytes) */
  96
  97 #define SIO_NCT6106_ID          0xc450
  98 #define SIO_NCT6775_ID          0xb470
  99 #define SIO_NCT6776_ID          0xc330
 100 #define SIO_NCT6779_ID          0xc560
 101 #define SIO_ID_MASK             0xFFF0
 102
 103 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
 104
 105 static inline void
 106 superio_outb(int ioreg, int reg, int val)
 107 {
 108         outb(reg, ioreg);
 109         outb(val, ioreg + 1);
 110 }
 111
 112 static inline int
 113 superio_inb(int ioreg, int reg)
 114 {
 115         outb(reg, ioreg);
 116         return inb(ioreg + 1);
 117 }
 118
 119 static inline void
 120 superio_select(int ioreg, int ld)
 121 {
 122         outb(SIO_REG_LDSEL, ioreg);
 123         outb(ld, ioreg + 1);
 124 }
 125
 126 static inline int
 127 superio_enter(int ioreg)
 128 {
 129         /*
 130          * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
 131          */
 132         if (!request_muxed_region(ioreg, 2, DRVNAME))
 133                 return -EBUSY;
 134
 135         outb(0x87, ioreg);
 136         outb(0x87, ioreg);
 137
 138         return 0;
 139 }
 140
 141 static inline void
 142 superio_exit(int ioreg)
 143 {
 144         outb(0xaa, ioreg);
 145         outb(0x02, ioreg);
 146         outb(0x02, ioreg + 1);
 147         release_region(ioreg, 2);
 148 }
 149
 150 /*
 151  * ISA constants
 152  */
 153
 154 #define IOREGION_ALIGNMENT      (~7)
 155 #define IOREGION_OFFSET         5
 156 #define IOREGION_LENGTH         2
 157 #define ADDR_REG_OFFSET         0
 158 #define DATA_REG_OFFSET         1
 159
 160 #define NCT6775_REG_BANK        0x4E
 161 #define NCT6775_REG_CONFIG      0x40
 162
 163 /*
 164  * Not currently used:
 165  * REG_MAN_ID has the value 0x5ca3 for all supported chips.
 166  * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
 167  * REG_MAN_ID is at port 0x4f
 168  * REG_CHIP_ID is at port 0x58
 169  */
 170
 171 #define NUM_TEMP        10      /* Max number of temp attribute sets w/ limits*/
 172 #define NUM_TEMP_FIXED  6       /* Max number of fixed temp attribute sets */
 173
 174 #define NUM_REG_ALARM   7       /* Max number of alarm registers */
 175
 176 /* Common and NCT6775 specific data */
 177
 178 /* Voltage min/max registers for nr=7..14 are in bank 5 */
 179
 180 static const u16 NCT6775_REG_IN_MAX[] = {
 181         0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
 182         0x55c, 0x55e, 0x560, 0x562 };
 183 static const u16 NCT6775_REG_IN_MIN[] = {
 184         0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
 185         0x55d, 0x55f, 0x561, 0x563 };
 186 static const u16 NCT6775_REG_IN[] = {
 187         0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
 188 };
 189
 190 #define NCT6775_REG_VBAT                0x5D
 191 #define NCT6775_REG_DIODE               0x5E
 192 #define NCT6775_DIODE_MASK              0x02
 193
 194 #define NCT6775_REG_FANDIV1             0x506
 195 #define NCT6775_REG_FANDIV2             0x507
 196
 197 #define NCT6775_REG_CR_FAN_DEBOUNCE     0xf0
 198
 199 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
 200
 201 /* 0..15 voltages, 16..23 fans, 24..31 temperatures */
 202
 203 static const s8 NCT6775_ALARM_BITS[] = {
 204         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 205         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 206         -1,                             /* unused */
 207         6, 7, 11, 10, 23,               /* fan1..fan5 */
 208         -1, -1, -1,                     /* unused */
 209         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 210         12, -1 };                       /* intrusion0, intrusion1 */
 211
 212 #define FAN_ALARM_BASE          16
 213 #define TEMP_ALARM_BASE         24
 214 #define INTRUSION_ALARM_BASE    30
 215
 216 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
 217 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
 218
 219 /* DC or PWM output fan configuration */
 220 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
 221 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
 222
 223 /* Advanced Fan control, some values are common for all fans */
 224
 225 static const u16 NCT6775_REG_TARGET[] = { 0x101, 0x201, 0x301, 0x801, 0x901 };
 226 static const u16 NCT6775_REG_FAN_MODE[] = { 0x102, 0x202, 0x302, 0x802, 0x902 };
 227 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
 228         0x103, 0x203, 0x303, 0x803, 0x903 };
 229 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
 230         0x104, 0x204, 0x304, 0x804, 0x904 };
 231 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
 232         0x105, 0x205, 0x305, 0x805, 0x905 };
 233 static const u16 NCT6775_REG_FAN_START_OUTPUT[]
 234         = { 0x106, 0x206, 0x306, 0x806, 0x906 };
 235 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
 236 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
 237
 238 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
 239         0x107, 0x207, 0x307, 0x807, 0x907 };
 240 static const u16 NCT6775_REG_PWM[] = { 0x109, 0x209, 0x309, 0x809, 0x909 };
 241 static const u16 NCT6775_REG_PWM_READ[] = { 0x01, 0x03, 0x11, 0x13, 0x15 };
 242
 243 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
 244 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
 245 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
 246 static const u16 NCT6775_FAN_PULSE_SHIFT[] = { 0, 0, 0, 0, 0 };
 247
 248 static const u16 NCT6775_REG_TEMP[] = {
 249         0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
 250
 251 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 252         0, 0x152, 0x252, 0x628, 0x629, 0x62A };
 253 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 254         0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
 255 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 256         0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
 257
 258 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 259         0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
 260
 261 static const u16 NCT6775_REG_TEMP_SEL[] = {
 262         0x100, 0x200, 0x300, 0x800, 0x900 };
 263
 264 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
 265         0x139, 0x239, 0x339, 0x839, 0x939 };
 266 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
 267         0x13a, 0x23a, 0x33a, 0x83a, 0x93a };
 268 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
 269         0x13b, 0x23b, 0x33b, 0x83b, 0x93b };
 270 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
 271         0x13c, 0x23c, 0x33c, 0x83c, 0x93c };
 272 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
 273         0x13d, 0x23d, 0x33d, 0x83d, 0x93d };
 274
 275 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
 276
 277 static const u16 NCT6775_REG_AUTO_TEMP[] = {
 278         0x121, 0x221, 0x321, 0x821, 0x921 };
 279 static const u16 NCT6775_REG_AUTO_PWM[] = {
 280         0x127, 0x227, 0x327, 0x827, 0x927 };
 281
 282 #define NCT6775_AUTO_TEMP(data, nr, p)  ((data)->REG_AUTO_TEMP[nr] + (p))
 283 #define NCT6775_AUTO_PWM(data, nr, p)   ((data)->REG_AUTO_PWM[nr] + (p))
 284
 285 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
 286
 287 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
 288         0x135, 0x235, 0x335, 0x835, 0x935 };
 289 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
 290         0x138, 0x238, 0x338, 0x838, 0x938 };
 291
 292 static const char *const nct6775_temp_label[] = {
 293         "",
 294         "SYSTIN",
 295         "CPUTIN",
 296         "AUXTIN",
 297         "AMD SB-TSI",
 298         "PECI Agent 0",
 299         "PECI Agent 1",
 300         "PECI Agent 2",
 301         "PECI Agent 3",
 302         "PECI Agent 4",
 303         "PECI Agent 5",
 304         "PECI Agent 6",
 305         "PECI Agent 7",
 306         "PCH_CHIP_CPU_MAX_TEMP",
 307         "PCH_CHIP_TEMP",
 308         "PCH_CPU_TEMP",
 309         "PCH_MCH_TEMP",
 310         "PCH_DIM0_TEMP",
 311         "PCH_DIM1_TEMP",
 312         "PCH_DIM2_TEMP",
 313         "PCH_DIM3_TEMP"
 314 };
 315
 316 static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
 317         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
 318
 319 static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
 320         = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
 321             0xa07 };
 322
 323 /* NCT6776 specific data */
 324
 325 static const s8 NCT6776_ALARM_BITS[] = {
 326         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 327         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 328         -1,                             /* unused */
 329         6, 7, 11, 10, 23,               /* fan1..fan5 */
 330         -1, -1, -1,                     /* unused */
 331         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 332         12, 9 };                        /* intrusion0, intrusion1 */
 333
 334 static const u16 NCT6776_REG_TOLERANCE_H[] = {
 335         0x10c, 0x20c, 0x30c, 0x80c, 0x90c };
 336
 337 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0 };
 338 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0 };
 339
 340 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
 341 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
 342
 343 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
 344         0x13e, 0x23e, 0x33e, 0x83e, 0x93e };
 345
 346 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 347         0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
 348
 349 static const char *const nct6776_temp_label[] = {
 350         "",
 351         "SYSTIN",
 352         "CPUTIN",
 353         "AUXTIN",
 354         "SMBUSMASTER 0",
 355         "SMBUSMASTER 1",
 356         "SMBUSMASTER 2",
 357         "SMBUSMASTER 3",
 358         "SMBUSMASTER 4",
 359         "SMBUSMASTER 5",
 360         "SMBUSMASTER 6",
 361         "SMBUSMASTER 7",
 362         "PECI Agent 0",
 363         "PECI Agent 1",
 364         "PCH_CHIP_CPU_MAX_TEMP",
 365         "PCH_CHIP_TEMP",
 366         "PCH_CPU_TEMP",
 367         "PCH_MCH_TEMP",
 368         "PCH_DIM0_TEMP",
 369         "PCH_DIM1_TEMP",
 370         "PCH_DIM2_TEMP",
 371         "PCH_DIM3_TEMP",
 372         "BYTE_TEMP"
 373 };
 374
 375 static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
 376         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
 377
 378 static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
 379         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
 380
 381 /* NCT6779 specific data */
 382
 383 static const u16 NCT6779_REG_IN[] = {
 384         0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
 385         0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
 386
 387 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
 388         0x459, 0x45A, 0x45B, 0x568 };
 389
 390 static const s8 NCT6779_ALARM_BITS[] = {
 391         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 392         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 393         -1,                             /* unused */
 394         6, 7, 11, 10, 23,               /* fan1..fan5 */
 395         -1, -1, -1,                     /* unused */
 396         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 397         12, 9 };                        /* intrusion0, intrusion1 */
 398
 399 static const u16 NCT6779_REG_FAN[] = { 0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8 };
 400 static const u16 NCT6779_REG_FAN_PULSES[] = {
 401         0x644, 0x645, 0x646, 0x647, 0x648 };
 402
 403 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
 404         0x136, 0x236, 0x336, 0x836, 0x936 };
 405 #define NCT6779_CRITICAL_PWM_ENABLE_MASK        0x01
 406 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
 407         0x137, 0x237, 0x337, 0x837, 0x937 };
 408
 409 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
 410 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 411         0x18, 0x152 };
 412 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 413         0x3a, 0x153 };
 414 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 415         0x39, 0x155 };
 416
 417 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
 418         0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
 419
 420 static const char *const nct6779_temp_label[] = {
 421         "",
 422         "SYSTIN",
 423         "CPUTIN",
 424         "AUXTIN0",
 425         "AUXTIN1",
 426         "AUXTIN2",
 427         "AUXTIN3",
 428         "",
 429         "SMBUSMASTER 0",
 430         "SMBUSMASTER 1",
 431         "SMBUSMASTER 2",
 432         "SMBUSMASTER 3",
 433         "SMBUSMASTER 4",
 434         "SMBUSMASTER 5",
 435         "SMBUSMASTER 6",
 436         "SMBUSMASTER 7",
 437         "PECI Agent 0",
 438         "PECI Agent 1",
 439         "PCH_CHIP_CPU_MAX_TEMP",
 440         "PCH_CHIP_TEMP",
 441         "PCH_CPU_TEMP",
 442         "PCH_MCH_TEMP",
 443         "PCH_DIM0_TEMP",
 444         "PCH_DIM1_TEMP",
 445         "PCH_DIM2_TEMP",
 446         "PCH_DIM3_TEMP",
 447         "BYTE_TEMP"
 448 };
 449
 450 static const u16 NCT6779_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6779_temp_label) - 1]
 451         = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
 452             0, 0, 0, 0, 0, 0, 0, 0,
 453             0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
 454             0x408, 0 };
 455
 456 static const u16 NCT6779_REG_TEMP_CRIT[ARRAY_SIZE(nct6779_temp_label) - 1]
 457         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
 458
 459 /* NCT6102D/NCT6106D specific data */
 460
 461 #define NCT6106_REG_VBAT        0x318
 462 #define NCT6106_REG_DIODE       0x319
 463 #define NCT6106_DIODE_MASK      0x01
 464
 465 static const u16 NCT6106_REG_IN_MAX[] = {
 466         0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
 467 static const u16 NCT6106_REG_IN_MIN[] = {
 468         0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
 469 static const u16 NCT6106_REG_IN[] = {
 470         0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
 471
 472 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
 473 static const u16 NCT6106_REG_TEMP_HYST[] = {
 474         0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
 475 static const u16 NCT6106_REG_TEMP_OVER[] = {
 476         0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
 477 static const u16 NCT6106_REG_TEMP_CRIT_L[] = {
 478         0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
 479 static const u16 NCT6106_REG_TEMP_CRIT_H[] = {
 480         0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
 481 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
 482 static const u16 NCT6106_REG_TEMP_CONFIG[] = {
 483         0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
 484
 485 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
 486 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
 487 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0, 0 };
 488 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4, 0, 0 };
 489
 490 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
 491 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
 492 static const u16 NCT6106_REG_PWM[] = { 0x119, 0x129, 0x139 };
 493 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c };
 494 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
 495 static const u16 NCT6106_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130 };
 496 static const u16 NCT6106_REG_TEMP_SOURCE[] = {
 497         0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
 498
 499 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
 500 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = { 0x11b, 0x12b, 0x13b };
 501
 502 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
 503 #define NCT6106_CRITICAL_PWM_ENABLE_MASK        0x10
 504 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
 505
 506 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
 507 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
 508 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
 509 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
 510 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
 511 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
 512
 513 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
 514
 515 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
 516 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
 517 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
 518 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x17c };
 519 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
 520 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
 521
 522 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
 523 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
 524
 525 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] =
 526         { 0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
 527
 528 static const s8 NCT6106_ALARM_BITS[]
 529         = { 0, 1, 2, 3, 4, 5, 7, 8,             /* in0.. in7 */
 530             9, -1, -1, -1, -1, -1, -1,          /* in8..in14 */
 531             -1,                                 /* unused */
 532             32, 33, 34, -1, -1,                 /* fan1..fan5 */
 533             -1, -1, -1,                         /* unused */
 534             16, 17, 18, 19, 20, 21,             /* temp1..temp6 */
 535             48, -1 };                           /* intrusion0, intrusion1 */
 536
 537 static const u16 NCT6106_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
 538         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x51, 0x52, 0x54 };
 539
 540 static const u16 NCT6106_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
 541         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x204, 0x205 };
 542
 543 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
 544 {
 545         if (mode == 0 && pwm == 255)
 546                 return off;
 547         return mode + 1;
 548 }
 549
 550 static int pwm_enable_to_reg(enum pwm_enable mode)
 551 {
 552         if (mode == off)
 553                 return 0;
 554         return mode - 1;
 555 }
 556
 557 /*
 558  * Conversions
 559  */
 560
 561 /* 1 is DC mode, output in ms */
 562 static unsigned int step_time_from_reg(u8 reg, u8 mode)
 563 {
 564         return mode ? 400 * reg : 100 * reg;
 565 }
 566
 567 static u8 step_time_to_reg(unsigned int msec, u8 mode)
 568 {
 569         return clamp_val((mode ? (msec + 200) / 400 :
 570                                         (msec + 50) / 100), 1, 255);
 571 }
 572
 573 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
 574 {
 575         if (reg == 0 || reg == 255)
 576                 return 0;
 577         return 1350000U / (reg << divreg);
 578 }
 579
 580 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
 581 {
 582         if ((reg & 0xff1f) == 0xff1f)
 583                 return 0;
 584
 585         reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
 586
 587         if (reg == 0)
 588                 return 0;
 589
 590         return 1350000U / reg;
 591 }
 592
 593 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
 594 {
 595         if (reg == 0 || reg == 0xffff)
 596                 return 0;
 597
 598         /*
 599          * Even though the registers are 16 bit wide, the fan divisor
 600          * still applies.
 601          */
 602         return 1350000U / (reg << divreg);
 603 }
 604
 605 static u16 fan_to_reg(u32 fan, unsigned int divreg)
 606 {
 607         if (!fan)
 608                 return 0;
 609
 610         return (1350000U / fan) >> divreg;
 611 }
 612
 613 static inline unsigned int
 614 div_from_reg(u8 reg)
 615 {
 616         return 1 << reg;
 617 }
 618
 619 /*
 620  * Some of the voltage inputs have internal scaling, the tables below
 621  * contain 8 (the ADC LSB in mV) * scaling factor * 100
 622  */
 623 static const u16 scale_in[15] = {
 624         800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
 625         800, 800
 626 };
 627
 628 static inline long in_from_reg(u8 reg, u8 nr)
 629 {
 630         return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
 631 }
 632
 633 static inline u8 in_to_reg(u32 val, u8 nr)
 634 {
 635         return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
 636 }
 637
 638 /*
 639  * Data structures and manipulation thereof
 640  */
 641
 642 struct nct6775_data {
 643         int addr;       /* IO base of hw monitor block */
 644         enum kinds kind;
 645         const char *name;
 646
 647         struct device *hwmon_dev;
 648         struct attribute_group *group_in;
 649         struct attribute_group *group_fan;
 650         struct attribute_group *group_temp;
 651         struct attribute_group *group_pwm;
 652
 653         u16 reg_temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 654                                     * 3=temp_crit, 4=temp_lcrit
 655                                     */
 656         u8 temp_src[NUM_TEMP];
 657         u16 reg_temp_config[NUM_TEMP];
 658         const char * const *temp_label;
 659         int temp_label_num;
 660
 661         u16 REG_CONFIG;
 662         u16 REG_VBAT;
 663         u16 REG_DIODE;
 664         u8 DIODE_MASK;
 665
 666         const s8 *ALARM_BITS;
 667
 668         const u16 *REG_VIN;
 669         const u16 *REG_IN_MINMAX[2];
 670
 671         const u16 *REG_TARGET;
 672         const u16 *REG_FAN;
 673         const u16 *REG_FAN_MODE;
 674         const u16 *REG_FAN_MIN;
 675         const u16 *REG_FAN_PULSES;
 676         const u16 *FAN_PULSE_SHIFT;
 677         const u16 *REG_FAN_TIME[3];
 678
 679         const u16 *REG_TOLERANCE_H;
 680
 681         const u8 *REG_PWM_MODE;
 682         const u8 *PWM_MODE_MASK;
 683
 684         const u16 *REG_PWM[7];  /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 685                                  * [3]=pwm_max, [4]=pwm_step,
 686                                  * [5]=weight_duty_step, [6]=weight_duty_base
 687                                  */
 688         const u16 *REG_PWM_READ;
 689
 690         const u16 *REG_CRITICAL_PWM_ENABLE;
 691         u8 CRITICAL_PWM_ENABLE_MASK;
 692         const u16 *REG_CRITICAL_PWM;
 693
 694         const u16 *REG_AUTO_TEMP;
 695         const u16 *REG_AUTO_PWM;
 696
 697         const u16 *REG_CRITICAL_TEMP;
 698         const u16 *REG_CRITICAL_TEMP_TOLERANCE;
 699
 700         const u16 *REG_TEMP_SOURCE;     /* temp register sources */
 701         const u16 *REG_TEMP_SEL;
 702         const u16 *REG_WEIGHT_TEMP_SEL;
 703         const u16 *REG_WEIGHT_TEMP[3];  /* 0=base, 1=tolerance, 2=step */
 704
 705         const u16 *REG_TEMP_OFFSET;
 706
 707         const u16 *REG_ALARM;
 708
 709         unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
 710         unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
 711
 712         struct mutex update_lock;
 713         bool valid;             /* true if following fields are valid */
 714         unsigned long last_updated;     /* In jiffies */
 715
 716         /* Register values */
 717         u8 bank;                /* current register bank */
 718         u8 in_num;              /* number of in inputs we have */
 719         u8 in[15][3];           /* [0]=in, [1]=in_max, [2]=in_min */
 720         unsigned int rpm[5];
 721         u16 fan_min[5];
 722         u8 fan_pulses[5];
 723         u8 fan_div[5];
 724         u8 has_pwm;
 725         u8 has_fan;             /* some fan inputs can be disabled */
 726         u8 has_fan_min;         /* some fans don't have min register */
 727         bool has_fan_div;
 728
 729         u8 temp_fixed_num;      /* 3 or 6 */
 730         u8 temp_type[NUM_TEMP_FIXED];
 731         s8 temp_offset[NUM_TEMP_FIXED];
 732         s16 temp[4][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 733                                 * 3=temp_crit */
 734         u64 alarms;
 735
 736         u8 pwm_num;     /* number of pwm */
 737         u8 pwm_mode[5]; /* 1->DC variable voltage, 0->PWM variable duty cycle */
 738         enum pwm_enable pwm_enable[5];
 739                         /* 0->off
 740                          * 1->manual
 741                          * 2->thermal cruise mode (also called SmartFan I)
 742                          * 3->fan speed cruise mode
 743                          * 4->SmartFan III
 744                          * 5->enhanced variable thermal cruise (SmartFan IV)
 745                          */
 746         u8 pwm[7][5];   /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 747                          * [3]=pwm_max, [4]=pwm_step,
 748                          * [5]=weight_duty_step, [6]=weight_duty_base
 749                          */
 750
 751         u8 target_temp[5];
 752         u8 target_temp_mask;
 753         u32 target_speed[5];
 754         u32 target_speed_tolerance[5];
 755         u8 speed_tolerance_limit;
 756
 757         u8 temp_tolerance[2][5];
 758         u8 tolerance_mask;
 759
 760         u8 fan_time[3][5]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
 761
 762         /* Automatic fan speed control registers */
 763         int auto_pwm_num;
 764         u8 auto_pwm[5][7];
 765         u8 auto_temp[5][7];
 766         u8 pwm_temp_sel[5];
 767         u8 pwm_weight_temp_sel[5];
 768         u8 weight_temp[3][5];   /* 0->temp_step, 1->temp_step_tol,
 769                                  * 2->temp_base
 770                                  */
 771
 772         u8 vid;
 773         u8 vrm;
 774
 775         bool have_vid;
 776
 777         u16 have_temp;
 778         u16 have_temp_fixed;
 779         u16 have_in;
 780 #ifdef CONFIG_PM
 781         /* Remember extra register values over suspend/resume */
 782         u8 vbat;
 783         u8 fandiv1;
 784         u8 fandiv2;
 785 #endif
 786 };
 787
 788 struct nct6775_sio_data {
 789         int sioreg;
 790         enum kinds kind;
 791 };
 792
 793 struct sensor_device_template {
 794         struct device_attribute dev_attr;
 795         union {
 796                 struct {
 797                         u8 nr;
 798                         u8 index;
 799                 } s;
 800                 int index;
 801         } u;
 802         bool s2;        /* true if both index and nr are used */
 803 };
 804
 805 struct sensor_device_attr_u {
 806         union {
 807                 struct sensor_device_attribute a1;
 808                 struct sensor_device_attribute_2 a2;
 809         } u;
 810         char name[32];
 811 };
 812
 813 #define SENSOR_DEVICE_TEMPLATE(_name, _mode, _show, _store, _index)     \
 814         { .dev_attr = __ATTR(_name, _mode, _show, _store),              \
 815           .u.index = _index,                                            \
 816           .s2 = false }
 817
 818 #define SENSOR_DEVICE_TEMPLATE_2(_name, _mode, _show, _store,           \
 819                                  _nr, _index)                           \
 820         { .dev_attr = __ATTR(_name, _mode, _show, _store),              \
 821           .u.s.index = _index,                                          \
 822           .u.s.nr = _nr,                                                \
 823           .s2 = true }
 824
 825 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
 826 static struct sensor_device_template sensor_dev_template_##_name        \
 827         = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store,       \
 828                                  _index)
 829
 830 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store,       \
 831                           _nr, _index)                                  \
 832 static struct sensor_device_template sensor_dev_template_##_name        \
 833         = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,     \
 834                                  _nr, _index)
 835
 836 struct sensor_template_group {
 837         struct sensor_device_template **templates;
 838         umode_t (*is_visible)(struct kobject *, struct attribute *, int);
 839         int base;
 840 };
 841
 842 static struct attribute_group *
 843 nct6775_create_attr_group(struct device *dev, struct sensor_template_group *tg,
 844                           int repeat)
 845 {
 846         struct attribute_group *group;
 847         struct sensor_device_attr_u *su;
 848         struct sensor_device_attribute *a;
 849         struct sensor_device_attribute_2 *a2;
 850         struct attribute **attrs;
 851         struct sensor_device_template **t;
 852         int err, i, j, count;
 853
 854         if (repeat <= 0)
 855                 return ERR_PTR(-EINVAL);
 856
 857         t = tg->templates;
 858         for (count = 0; *t; t++, count++)
 859                 ;
 860
 861         if (count == 0)
 862                 return ERR_PTR(-EINVAL);
 863
 864         group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
 865         if (group == NULL)
 866                 return ERR_PTR(-ENOMEM);
 867
 868         attrs = devm_kzalloc(dev, sizeof(*attrs) * (repeat * count + 1),
 869                              GFP_KERNEL);
 870         if (attrs == NULL)
 871                 return ERR_PTR(-ENOMEM);
 872
 873         su = devm_kzalloc(dev, sizeof(*su) * repeat * count,
 874                                GFP_KERNEL);
 875         if (su == NULL)
 876                 return ERR_PTR(-ENOMEM);
 877
 878         group->attrs = attrs;
 879         group->is_visible = tg->is_visible;
 880
 881         for (i = 0; i < repeat; i++) {
 882                 t = tg->templates;
 883                 for (j = 0; *t != NULL; j++) {
 884                         snprintf(su->name, sizeof(su->name),
 885                                  (*t)->dev_attr.attr.name, tg->base + i);
 886                         if ((*t)->s2) {
 887                                 a2 = &su->u.a2;
 888                                 a2->dev_attr.attr.name = su->name;
 889                                 a2->nr = (*t)->u.s.nr + i;
 890                                 a2->index = (*t)->u.s.index;
 891                                 a2->dev_attr.attr.mode =
 892                                   (*t)->dev_attr.attr.mode;
 893                                 a2->dev_attr.show = (*t)->dev_attr.show;
 894                                 a2->dev_attr.store = (*t)->dev_attr.store;
 895                                 *attrs = &a2->dev_attr.attr;
 896                         } else {
 897                                 a = &su->u.a1;
 898                                 a->dev_attr.attr.name = su->name;
 899                                 a->index = (*t)->u.index + i;
 900                                 a->dev_attr.attr.mode =
 901                                   (*t)->dev_attr.attr.mode;
 902                                 a->dev_attr.show = (*t)->dev_attr.show;
 903                                 a->dev_attr.store = (*t)->dev_attr.store;
 904                                 *attrs = &a->dev_attr.attr;
 905                         }
 906                         attrs++;
 907                         su++;
 908                         t++;
 909                 }
 910         }
 911
 912         err = sysfs_create_group(&dev->kobj, group);
 913         if (err)
 914                 return ERR_PTR(-ENOMEM);
 915
 916         return group;
 917 }
 918
 919 static bool is_word_sized(struct nct6775_data *data, u16 reg)
 920 {
 921         switch (data->kind) {
 922         case nct6106:
 923                 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
 924                   reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
 925                   reg == 0x111 || reg == 0x121 || reg == 0x131;
 926         case nct6775:
 927                 return (((reg & 0xff00) == 0x100 ||
 928                     (reg & 0xff00) == 0x200) &&
 929                    ((reg & 0x00ff) == 0x50 ||
 930                     (reg & 0x00ff) == 0x53 ||
 931                     (reg & 0x00ff) == 0x55)) ||
 932                   (reg & 0xfff0) == 0x630 ||
 933                   reg == 0x640 || reg == 0x642 ||
 934                   reg == 0x662 ||
 935                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
 936                   reg == 0x73 || reg == 0x75 || reg == 0x77;
 937         case nct6776:
 938                 return (((reg & 0xff00) == 0x100 ||
 939                     (reg & 0xff00) == 0x200) &&
 940                    ((reg & 0x00ff) == 0x50 ||
 941                     (reg & 0x00ff) == 0x53 ||
 942                     (reg & 0x00ff) == 0x55)) ||
 943                   (reg & 0xfff0) == 0x630 ||
 944                   reg == 0x402 ||
 945                   reg == 0x640 || reg == 0x642 ||
 946                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
 947                   reg == 0x73 || reg == 0x75 || reg == 0x77;
 948         case nct6779:
 949                 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
 950                   ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x09) ||
 951                   reg == 0x402 ||
 952                   reg == 0x63a || reg == 0x63c || reg == 0x63e ||
 953                   reg == 0x640 || reg == 0x642 ||
 954                   reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
 955                   reg == 0x7b;
 956         }
 957         return false;
 958 }
 959
 960 /*
 961  * On older chips, only registers 0x50-0x5f are banked.
 962  * On more recent chips, all registers are banked.
 963  * Assume that is the case and set the bank number for each access.
 964  * Cache the bank number so it only needs to be set if it changes.
 965  */
 966 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
 967 {
 968         u8 bank = reg >> 8;
 969         if (data->bank != bank) {
 970                 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
 971                 outb_p(bank, data->addr + DATA_REG_OFFSET);
 972                 data->bank = bank;
 973         }
 974 }
 975
 976 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
 977 {
 978         int res, word_sized = is_word_sized(data, reg);
 979
 980         nct6775_set_bank(data, reg);
 981         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
 982         res = inb_p(data->addr + DATA_REG_OFFSET);
 983         if (word_sized) {
 984                 outb_p((reg & 0xff) + 1,
 985                        data->addr + ADDR_REG_OFFSET);
 986                 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
 987         }
 988         return res;
 989 }
 990
 991 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
 992 {
 993         int word_sized = is_word_sized(data, reg);
 994
 995         nct6775_set_bank(data, reg);
 996         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
 997         if (word_sized) {
 998                 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
 999                 outb_p((reg & 0xff) + 1,
1000                        data->addr + ADDR_REG_OFFSET);
1001         }
1002         outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
1003         return 0;
1004 }
1005
1006 /* We left-align 8-bit temperature values to make the code simpler */
1007 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
1008 {
1009         u16 res;
1010
1011         res = nct6775_read_value(data, reg);
1012         if (!is_word_sized(data, reg))
1013                 res <<= 8;
1014
1015         return res;
1016 }
1017
1018 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
1019 {
1020         if (!is_word_sized(data, reg))
1021                 value >>= 8;
1022         return nct6775_write_value(data, reg, value);
1023 }
1024
1025 /* This function assumes that the caller holds data->update_lock */
1026 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
1027 {
1028         u8 reg;
1029
1030         switch (nr) {
1031         case 0:
1032                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
1033                     | (data->fan_div[0] & 0x7);
1034                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1035                 break;
1036         case 1:
1037                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
1038                     | ((data->fan_div[1] << 4) & 0x70);
1039                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1040                 break;
1041         case 2:
1042                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
1043                     | (data->fan_div[2] & 0x7);
1044                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1045                 break;
1046         case 3:
1047                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
1048                     | ((data->fan_div[3] << 4) & 0x70);
1049                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1050                 break;
1051         }
1052 }
1053
1054 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
1055 {
1056         if (data->kind == nct6775)
1057                 nct6775_write_fan_div(data, nr);
1058 }
1059
1060 static void nct6775_update_fan_div(struct nct6775_data *data)
1061 {
1062         u8 i;
1063
1064         i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
1065         data->fan_div[0] = i & 0x7;
1066         data->fan_div[1] = (i & 0x70) >> 4;
1067         i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
1068         data->fan_div[2] = i & 0x7;
1069         if (data->has_fan & (1<<3))
1070                 data->fan_div[3] = (i & 0x70) >> 4;
1071 }
1072
1073 static void nct6775_update_fan_div_common(struct nct6775_data *data)
1074 {
1075         if (data->kind == nct6775)
1076                 nct6775_update_fan_div(data);
1077 }
1078
1079 static void nct6775_init_fan_div(struct nct6775_data *data)
1080 {
1081         int i;
1082
1083         nct6775_update_fan_div_common(data);
1084         /*
1085          * For all fans, start with highest divider value if the divider
1086          * register is not initialized. This ensures that we get a
1087          * reading from the fan count register, even if it is not optimal.
1088          * We'll compute a better divider later on.
1089          */
1090         for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
1091                 if (!(data->has_fan & (1 << i)))
1092                         continue;
1093                 if (data->fan_div[i] == 0) {
1094                         data->fan_div[i] = 7;
1095                         nct6775_write_fan_div_common(data, i);
1096                 }
1097         }
1098 }
1099
1100 static void nct6775_init_fan_common(struct device *dev,
1101                                     struct nct6775_data *data)
1102 {
1103         int i;
1104         u8 reg;
1105
1106         if (data->has_fan_div)
1107                 nct6775_init_fan_div(data);
1108
1109         /*
1110          * If fan_min is not set (0), set it to 0xff to disable it. This
1111          * prevents the unnecessary warning when fanX_min is reported as 0.
1112          */
1113         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1114                 if (data->has_fan_min & (1 << i)) {
1115                         reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
1116                         if (!reg)
1117                                 nct6775_write_value(data, data->REG_FAN_MIN[i],
1118                                                     data->has_fan_div ? 0xff
1119                                                                       : 0xff1f);
1120                 }
1121         }
1122 }
1123
1124 static void nct6775_select_fan_div(struct device *dev,
1125                                    struct nct6775_data *data, int nr, u16 reg)
1126 {
1127         u8 fan_div = data->fan_div[nr];
1128         u16 fan_min;
1129
1130         if (!data->has_fan_div)
1131                 return;
1132
1133         /*
1134          * If we failed to measure the fan speed, or the reported value is not
1135          * in the optimal range, and the clock divider can be modified,
1136          * let's try that for next time.
1137          */
1138         if (reg == 0x00 && fan_div < 0x07)
1139                 fan_div++;
1140         else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1141                 fan_div--;
1142
1143         if (fan_div != data->fan_div[nr]) {
1144                 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1145                         nr + 1, div_from_reg(data->fan_div[nr]),
1146                         div_from_reg(fan_div));
1147
1148                 /* Preserve min limit if possible */
1149                 if (data->has_fan_min & (1 << nr)) {
1150                         fan_min = data->fan_min[nr];
1151                         if (fan_div > data->fan_div[nr]) {
1152                                 if (fan_min != 255 && fan_min > 1)
1153                                         fan_min >>= 1;
1154                         } else {
1155                                 if (fan_min != 255) {
1156                                         fan_min <<= 1;
1157                                         if (fan_min > 254)
1158                                                 fan_min = 254;
1159                                 }
1160                         }
1161                         if (fan_min != data->fan_min[nr]) {
1162                                 data->fan_min[nr] = fan_min;
1163                                 nct6775_write_value(data, data->REG_FAN_MIN[nr],
1164                                                     fan_min);
1165                         }
1166                 }
1167                 data->fan_div[nr] = fan_div;
1168                 nct6775_write_fan_div_common(data, nr);
1169         }
1170 }
1171
1172 static void nct6775_update_pwm(struct device *dev)
1173 {
1174         struct nct6775_data *data = dev_get_drvdata(dev);
1175         int i, j;
1176         int fanmodecfg, reg;
1177         bool duty_is_dc;
1178
1179         for (i = 0; i < data->pwm_num; i++) {
1180                 if (!(data->has_pwm & (1 << i)))
1181                         continue;
1182
1183                 duty_is_dc = data->REG_PWM_MODE[i] &&
1184                   (nct6775_read_value(data, data->REG_PWM_MODE[i])
1185                    & data->PWM_MODE_MASK[i]);
1186                 data->pwm_mode[i] = duty_is_dc;
1187
1188                 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
1189                 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1190                         if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1191                                 data->pwm[j][i]
1192                                   = nct6775_read_value(data,
1193                                                        data->REG_PWM[j][i]);
1194                         }
1195                 }
1196
1197                 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1198                                                         (fanmodecfg >> 4) & 7);
1199
1200                 if (!data->temp_tolerance[0][i] ||
1201                     data->pwm_enable[i] != speed_cruise)
1202                         data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1203                 if (!data->target_speed_tolerance[i] ||
1204                     data->pwm_enable[i] == speed_cruise) {
1205                         u8 t = fanmodecfg & 0x0f;
1206                         if (data->REG_TOLERANCE_H) {
1207                                 t |= (nct6775_read_value(data,
1208                                       data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
1209                         }
1210                         data->target_speed_tolerance[i] = t;
1211                 }
1212
1213                 data->temp_tolerance[1][i] =
1214                         nct6775_read_value(data,
1215                                         data->REG_CRITICAL_TEMP_TOLERANCE[i]);
1216
1217                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
1218                 data->pwm_temp_sel[i] = reg & 0x1f;
1219                 /* If fan can stop, report floor as 0 */
1220                 if (reg & 0x80)
1221                         data->pwm[2][i] = 0;
1222
1223                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
1224                 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1225                 /* If weight is disabled, report weight source as 0 */
1226                 if (j == 1 && !(reg & 0x80))
1227                         data->pwm_weight_temp_sel[i] = 0;
1228
1229                 /* Weight temp data */
1230                 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
1231                         data->weight_temp[j][i]
1232                           = nct6775_read_value(data,
1233                                                data->REG_WEIGHT_TEMP[j][i]);
1234                 }
1235         }
1236 }
1237
1238 static void nct6775_update_pwm_limits(struct device *dev)
1239 {
1240         struct nct6775_data *data = dev_get_drvdata(dev);
1241         int i, j;
1242         u8 reg;
1243         u16 reg_t;
1244
1245         for (i = 0; i < data->pwm_num; i++) {
1246                 if (!(data->has_pwm & (1 << i)))
1247                         continue;
1248
1249                 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1250                         data->fan_time[j][i] =
1251                           nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1252                 }
1253
1254                 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1255                 /* Update only in matching mode or if never updated */
1256                 if (!data->target_temp[i] ||
1257                     data->pwm_enable[i] == thermal_cruise)
1258                         data->target_temp[i] = reg_t & data->target_temp_mask;
1259                 if (!data->target_speed[i] ||
1260                     data->pwm_enable[i] == speed_cruise) {
1261                         if (data->REG_TOLERANCE_H) {
1262                                 reg_t |= (nct6775_read_value(data,
1263                                         data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1264                         }
1265                         data->target_speed[i] = reg_t;
1266                 }
1267
1268                 for (j = 0; j < data->auto_pwm_num; j++) {
1269                         data->auto_pwm[i][j] =
1270                           nct6775_read_value(data,
1271                                              NCT6775_AUTO_PWM(data, i, j));
1272                         data->auto_temp[i][j] =
1273                           nct6775_read_value(data,
1274                                              NCT6775_AUTO_TEMP(data, i, j));
1275                 }
1276
1277                 /* critical auto_pwm temperature data */
1278                 data->auto_temp[i][data->auto_pwm_num] =
1279                         nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1280
1281                 switch (data->kind) {
1282                 case nct6775:
1283                         reg = nct6775_read_value(data,
1284                                                  NCT6775_REG_CRITICAL_ENAB[i]);
1285                         data->auto_pwm[i][data->auto_pwm_num] =
1286                                                 (reg & 0x02) ? 0xff : 0x00;
1287                         break;
1288                 case nct6776:
1289                         data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1290                         break;
1291                 case nct6106:
1292                 case nct6779:
1293                         reg = nct6775_read_value(data,
1294                                         data->REG_CRITICAL_PWM_ENABLE[i]);
1295                         if (reg & data->CRITICAL_PWM_ENABLE_MASK)
1296                                 reg = nct6775_read_value(data,
1297                                         data->REG_CRITICAL_PWM[i]);
1298                         else
1299                                 reg = 0xff;
1300                         data->auto_pwm[i][data->auto_pwm_num] = reg;
1301                         break;
1302                 }
1303         }
1304 }
1305
1306 static struct nct6775_data *nct6775_update_device(struct device *dev)
1307 {
1308         struct nct6775_data *data = dev_get_drvdata(dev);
1309         int i, j;
1310
1311         mutex_lock(&data->update_lock);
1312
1313         if (time_after(jiffies, data->last_updated + HZ + HZ/2)
1314             || !data->valid) {
1315                 /* Fan clock dividers */
1316                 nct6775_update_fan_div_common(data);
1317
1318                 /* Measured voltages and limits */
1319                 for (i = 0; i < data->in_num; i++) {
1320                         if (!(data->have_in & (1 << i)))
1321                                 continue;
1322
1323                         data->in[i][0] = nct6775_read_value(data,
1324                                                             data->REG_VIN[i]);
1325                         data->in[i][1] = nct6775_read_value(data,
1326                                           data->REG_IN_MINMAX[0][i]);
1327                         data->in[i][2] = nct6775_read_value(data,
1328                                           data->REG_IN_MINMAX[1][i]);
1329                 }
1330
1331                 /* Measured fan speeds and limits */
1332                 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
1333                         u16 reg;
1334
1335                         if (!(data->has_fan & (1 << i)))
1336                                 continue;
1337
1338                         reg = nct6775_read_value(data, data->REG_FAN[i]);
1339                         data->rpm[i] = data->fan_from_reg(reg,
1340                                                           data->fan_div[i]);
1341
1342                         if (data->has_fan_min & (1 << i))
1343                                 data->fan_min[i] = nct6775_read_value(data,
1344                                            data->REG_FAN_MIN[i]);
1345                         data->fan_pulses[i] =
1346                           (nct6775_read_value(data, data->REG_FAN_PULSES[i])
1347                                 >> data->FAN_PULSE_SHIFT[i]) & 0x03;
1348
1349                         nct6775_select_fan_div(dev, data, i, reg);
1350                 }
1351
1352                 nct6775_update_pwm(dev);
1353                 nct6775_update_pwm_limits(dev);
1354
1355                 /* Measured temperatures and limits */
1356                 for (i = 0; i < NUM_TEMP; i++) {
1357                         if (!(data->have_temp & (1 << i)))
1358                                 continue;
1359                         for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1360                                 if (data->reg_temp[j][i])
1361                                         data->temp[j][i]
1362                                           = nct6775_read_temp(data,
1363                                                 data->reg_temp[j][i]);
1364                         }
1365                         if (!(data->have_temp_fixed & (1 << i)))
1366                                 continue;
1367                         data->temp_offset[i]
1368                           = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1369                 }
1370
1371                 data->alarms = 0;
1372                 for (i = 0; i < NUM_REG_ALARM; i++) {
1373                         u8 alarm;
1374                         if (!data->REG_ALARM[i])
1375                                 continue;
1376                         alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1377                         data->alarms |= ((u64)alarm) << (i << 3);
1378                 }
1379
1380                 data->last_updated = jiffies;
1381                 data->valid = true;
1382         }
1383
1384         mutex_unlock(&data->update_lock);
1385         return data;
1386 }
1387
1388 /*
1389  * Sysfs callback functions
1390  */
1391 static ssize_t
1392 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1393 {
1394         struct nct6775_data *data = nct6775_update_device(dev);
1395         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1396         int nr = sattr->nr;
1397         int index = sattr->index;
1398         return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1399 }
1400
1401 static ssize_t
1402 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1403              size_t count)
1404 {
1405         struct nct6775_data *data = dev_get_drvdata(dev);
1406         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1407         int nr = sattr->nr;
1408         int index = sattr->index;
1409         unsigned long val;
1410         int err = kstrtoul(buf, 10, &val);
1411         if (err < 0)
1412                 return err;
1413         mutex_lock(&data->update_lock);
1414         data->in[nr][index] = in_to_reg(val, nr);
1415         nct6775_write_value(data, data->REG_IN_MINMAX[index-1][nr],
1416                             data->in[nr][index]);
1417         mutex_unlock(&data->update_lock);
1418         return count;
1419 }
1420
1421 static ssize_t
1422 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1423 {
1424         struct nct6775_data *data = nct6775_update_device(dev);
1425         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1426         int nr = data->ALARM_BITS[sattr->index];
1427         return sprintf(buf, "%u\n",
1428                        (unsigned int)((data->alarms >> nr) & 0x01));
1429 }
1430
1431 static umode_t nct6775_in_is_visible(struct kobject *kobj,
1432                                      struct attribute *attr, int index)
1433 {
1434         struct device *dev = container_of(kobj, struct device, kobj);
1435         struct nct6775_data *data = dev_get_drvdata(dev);
1436         int in = index / 4;     /* voltage index */
1437
1438         if (!(data->have_in & (1 << in)))
1439                 return 0;
1440
1441         return attr->mode;
1442 }
1443
1444 SENSOR_TEMPLATE_2(in_input, in%d_input, S_IRUGO, show_in_reg, NULL, 0, 0);
1445 SENSOR_TEMPLATE(in_alarm, in%d_alarm, S_IRUGO, show_alarm, NULL, 0);
1446 SENSOR_TEMPLATE_2(in_min, in%d_min, S_IWUSR | S_IRUGO, show_in_reg,
1447                   store_in_reg, 0, 1);
1448 SENSOR_TEMPLATE_2(in_max, in%d_max, S_IWUSR | S_IRUGO, show_in_reg,
1449                   store_in_reg, 0, 2);
1450
1451 /*
1452  * nct6775_in_is_visible uses the index into the following array
1453  * to determine if attributes should be created or not.
1454  * Any change in order or content must be matched.
1455  */
1456 static struct sensor_device_template *nct6775_attributes_in_template[] = {
1457         &sensor_dev_template_in_input,
1458         &sensor_dev_template_in_alarm,
1459         &sensor_dev_template_in_min,
1460         &sensor_dev_template_in_max,
1461         NULL
1462 };
1463
1464 static struct sensor_template_group nct6775_in_template_group = {
1465         .templates = nct6775_attributes_in_template,
1466         .is_visible = nct6775_in_is_visible,
1467 };
1468
1469 static ssize_t
1470 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1471 {
1472         struct nct6775_data *data = nct6775_update_device(dev);
1473         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1474         int nr = sattr->index;
1475         return sprintf(buf, "%d\n", data->rpm[nr]);
1476 }
1477
1478 static ssize_t
1479 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1480 {
1481         struct nct6775_data *data = nct6775_update_device(dev);
1482         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1483         int nr = sattr->index;
1484         return sprintf(buf, "%d\n",
1485                        data->fan_from_reg_min(data->fan_min[nr],
1486                                               data->fan_div[nr]));
1487 }
1488
1489 static ssize_t
1490 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1491 {
1492         struct nct6775_data *data = nct6775_update_device(dev);
1493         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1494         int nr = sattr->index;
1495         return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1496 }
1497
1498 static ssize_t
1499 store_fan_min(struct device *dev, struct device_attribute *attr,
1500               const char *buf, size_t count)
1501 {
1502         struct nct6775_data *data = dev_get_drvdata(dev);
1503         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1504         int nr = sattr->index;
1505         unsigned long val;
1506         int err;
1507         unsigned int reg;
1508         u8 new_div;
1509
1510         err = kstrtoul(buf, 10, &val);
1511         if (err < 0)
1512                 return err;
1513
1514         mutex_lock(&data->update_lock);
1515         if (!data->has_fan_div) {
1516                 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1517                 if (!val) {
1518                         val = 0xff1f;
1519                 } else {
1520                         if (val > 1350000U)
1521                                 val = 135000U;
1522                         val = 1350000U / val;
1523                         val = (val & 0x1f) | ((val << 3) & 0xff00);
1524                 }
1525                 data->fan_min[nr] = val;
1526                 goto write_min; /* Leave fan divider alone */
1527         }
1528         if (!val) {
1529                 /* No min limit, alarm disabled */
1530                 data->fan_min[nr] = 255;
1531                 new_div = data->fan_div[nr]; /* No change */
1532                 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1533                 goto write_div;
1534         }
1535         reg = 1350000U / val;
1536         if (reg >= 128 * 255) {
1537                 /*
1538                  * Speed below this value cannot possibly be represented,
1539                  * even with the highest divider (128)
1540                  */
1541                 data->fan_min[nr] = 254;
1542                 new_div = 7; /* 128 == (1 << 7) */
1543                 dev_warn(dev,
1544                          "fan%u low limit %lu below minimum %u, set to minimum\n",
1545                          nr + 1, val, data->fan_from_reg_min(254, 7));
1546         } else if (!reg) {
1547                 /*
1548                  * Speed above this value cannot possibly be represented,
1549                  * even with the lowest divider (1)
1550                  */
1551                 data->fan_min[nr] = 1;
1552                 new_div = 0; /* 1 == (1 << 0) */
1553                 dev_warn(dev,
1554                          "fan%u low limit %lu above maximum %u, set to maximum\n",
1555                          nr + 1, val, data->fan_from_reg_min(1, 0));
1556         } else {
1557                 /*
1558                  * Automatically pick the best divider, i.e. the one such
1559                  * that the min limit will correspond to a register value
1560                  * in the 96..192 range
1561                  */
1562                 new_div = 0;
1563                 while (reg > 192 && new_div < 7) {
1564                         reg >>= 1;
1565                         new_div++;
1566                 }
1567                 data->fan_min[nr] = reg;
1568         }
1569
1570 write_div:
1571         /*
1572          * Write both the fan clock divider (if it changed) and the new
1573          * fan min (unconditionally)
1574          */
1575         if (new_div != data->fan_div[nr]) {
1576                 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1577                         nr + 1, div_from_reg(data->fan_div[nr]),
1578                         div_from_reg(new_div));
1579                 data->fan_div[nr] = new_div;
1580                 nct6775_write_fan_div_common(data, nr);
1581                 /* Give the chip time to sample a new speed value */
1582                 data->last_updated = jiffies;
1583         }
1584
1585 write_min:
1586         nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1587         mutex_unlock(&data->update_lock);
1588
1589         return count;
1590 }
1591
1592 static ssize_t
1593 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
1594 {
1595         struct nct6775_data *data = nct6775_update_device(dev);
1596         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1597         int p = data->fan_pulses[sattr->index];
1598
1599         return sprintf(buf, "%d\n", p ? : 4);
1600 }
1601
1602 static ssize_t
1603 store_fan_pulses(struct device *dev, struct device_attribute *attr,
1604                  const char *buf, size_t count)
1605 {
1606         struct nct6775_data *data = dev_get_drvdata(dev);
1607         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1608         int nr = sattr->index;
1609         unsigned long val;
1610         int err;
1611         u8 reg;
1612
1613         err = kstrtoul(buf, 10, &val);
1614         if (err < 0)
1615                 return err;
1616
1617         if (val > 4)
1618                 return -EINVAL;
1619
1620         mutex_lock(&data->update_lock);
1621         data->fan_pulses[nr] = val & 3;
1622         reg = nct6775_read_value(data, data->REG_FAN_PULSES[nr]);
1623         reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
1624         reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
1625         nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
1626         mutex_unlock(&data->update_lock);
1627
1628         return count;
1629 }
1630
1631 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
1632                                       struct attribute *attr, int index)
1633 {
1634         struct device *dev = container_of(kobj, struct device, kobj);
1635         struct nct6775_data *data = dev_get_drvdata(dev);
1636         int fan = index / 5;    /* fan index */
1637         int nr = index % 5;     /* attribute index */
1638
1639         if (!(data->has_fan & (1 << fan)))
1640                 return 0;
1641
1642         if (nr == 3 && !(data->has_fan_min & (1 << fan)))
1643                 return 0;
1644         if (nr == 4 && data->kind != nct6775)
1645                 return 0;
1646
1647         return attr->mode;
1648 }
1649
1650 SENSOR_TEMPLATE(fan_input, fan%d_input, S_IRUGO, show_fan, NULL, 0);
1651 SENSOR_TEMPLATE(fan_alarm, fan%d_alarm, S_IRUGO, show_alarm, NULL,
1652                 FAN_ALARM_BASE);
1653 SENSOR_TEMPLATE(fan_pulses, fan%d_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1654                 store_fan_pulses, 0);
1655 SENSOR_TEMPLATE(fan_min, fan%d_min, S_IWUSR | S_IRUGO, show_fan_min,
1656                 store_fan_min, 0);
1657 SENSOR_TEMPLATE(fan_div, fan%d_div, S_IRUGO, show_fan_div, NULL, 0);
1658
1659 /*
1660  * nct6775_fan_is_visible uses the index into the following array
1661  * to determine if attributes should be created or not.
1662  * Any change in order or content must be matched.
1663  */
1664 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
1665         &sensor_dev_template_fan_input,
1666         &sensor_dev_template_fan_alarm,
1667         &sensor_dev_template_fan_pulses,
1668         &sensor_dev_template_fan_min,   /* 3 */
1669         &sensor_dev_template_fan_div,   /* 4 */
1670         NULL
1671 };
1672
1673 static struct sensor_template_group nct6775_fan_template_group = {
1674         .templates = nct6775_attributes_fan_template,
1675         .is_visible = nct6775_fan_is_visible,
1676         .base = 1,
1677 };
1678
1679 static ssize_t
1680 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1681 {
1682         struct nct6775_data *data = nct6775_update_device(dev);
1683         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1684         int nr = sattr->index;
1685         return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1686 }
1687
1688 static ssize_t
1689 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1690 {
1691         struct nct6775_data *data = nct6775_update_device(dev);
1692         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1693         int nr = sattr->nr;
1694         int index = sattr->index;
1695
1696         return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
1697 }
1698
1699 static ssize_t
1700 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
1701            size_t count)
1702 {
1703         struct nct6775_data *data = dev_get_drvdata(dev);
1704         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1705         int nr = sattr->nr;
1706         int index = sattr->index;
1707         int err;
1708         long val;
1709
1710         err = kstrtol(buf, 10, &val);
1711         if (err < 0)
1712                 return err;
1713
1714         mutex_lock(&data->update_lock);
1715         data->temp[index][nr] = LM75_TEMP_TO_REG(val);
1716         nct6775_write_temp(data, data->reg_temp[index][nr],
1717                            data->temp[index][nr]);
1718         mutex_unlock(&data->update_lock);
1719         return count;
1720 }
1721
1722 static ssize_t
1723 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
1724 {
1725         struct nct6775_data *data = nct6775_update_device(dev);
1726         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1727
1728         return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
1729 }
1730
1731 static ssize_t
1732 store_temp_offset(struct device *dev, struct device_attribute *attr,
1733                   const char *buf, size_t count)
1734 {
1735         struct nct6775_data *data = dev_get_drvdata(dev);
1736         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1737         int nr = sattr->index;
1738         long val;
1739         int err;
1740
1741         err = kstrtol(buf, 10, &val);
1742         if (err < 0)
1743                 return err;
1744
1745         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
1746
1747         mutex_lock(&data->update_lock);
1748         data->temp_offset[nr] = val;
1749         nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
1750         mutex_unlock(&data->update_lock);
1751
1752         return count;
1753 }
1754
1755 static ssize_t
1756 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
1757 {
1758         struct nct6775_data *data = nct6775_update_device(dev);
1759         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1760         int nr = sattr->index;
1761         return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
1762 }
1763
1764 static ssize_t
1765 store_temp_type(struct device *dev, struct device_attribute *attr,
1766                 const char *buf, size_t count)
1767 {
1768         struct nct6775_data *data = nct6775_update_device(dev);
1769         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1770         int nr = sattr->index;
1771         unsigned long val;
1772         int err;
1773         u8 vbat, diode, vbit, dbit;
1774
1775         err = kstrtoul(buf, 10, &val);
1776         if (err < 0)
1777                 return err;
1778
1779         if (val != 1 && val != 3 && val != 4)
1780                 return -EINVAL;
1781
1782         mutex_lock(&data->update_lock);
1783
1784         data->temp_type[nr] = val;
1785         vbit = 0x02 << nr;
1786         dbit = data->DIODE_MASK << nr;
1787         vbat = nct6775_read_value(data, data->REG_VBAT) & ~vbit;
1788         diode = nct6775_read_value(data, data->REG_DIODE) & ~dbit;
1789         switch (val) {
1790         case 1: /* CPU diode (diode, current mode) */
1791                 vbat |= vbit;
1792                 diode |= dbit;
1793                 break;
1794         case 3: /* diode, voltage mode */
1795                 vbat |= dbit;
1796                 break;
1797         case 4: /* thermistor */
1798                 break;
1799         }
1800         nct6775_write_value(data, data->REG_VBAT, vbat);
1801         nct6775_write_value(data, data->REG_DIODE, diode);
1802
1803         mutex_unlock(&data->update_lock);
1804         return count;
1805 }
1806
1807 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
1808                                        struct attribute *attr, int index)
1809 {
1810         struct device *dev = container_of(kobj, struct device, kobj);
1811         struct nct6775_data *data = dev_get_drvdata(dev);
1812         int temp = index / 9;   /* temp index */
1813         int nr = index % 9;     /* attribute index */
1814
1815         if (!(data->have_temp & (1 << temp)))
1816                 return 0;
1817
1818         if (nr == 2 && !data->reg_temp[1][temp])        /* max */
1819                 return 0;
1820
1821         if (nr == 3 && !data->reg_temp[2][temp])        /* max_hyst */
1822                 return 0;
1823
1824         if (nr == 4 && !data->reg_temp[3][temp])        /* crit */
1825                 return 0;
1826
1827         if (nr == 5 && !data->reg_temp[4][temp])        /* lcrit */
1828                 return 0;
1829
1830         if (nr > 5 && !(data->have_temp_fixed & (1 << temp)))
1831                 return 0;
1832
1833         if (nr == 8 && data->ALARM_BITS[TEMP_ALARM_BASE + temp] < 0)
1834                 return 0;
1835
1836         return attr->mode;
1837 }
1838
1839 SENSOR_TEMPLATE_2(temp_input, temp%d_input, S_IRUGO, show_temp, NULL, 0, 0);
1840 SENSOR_TEMPLATE(temp_label, temp%d_label, S_IRUGO, show_temp_label, NULL, 0);
1841 SENSOR_TEMPLATE_2(temp_max, temp%d_max, S_IRUGO | S_IWUSR, show_temp,
1842                   store_temp, 0, 1);
1843 SENSOR_TEMPLATE_2(temp_max_hyst, temp%d_max_hyst, S_IRUGO | S_IWUSR, show_temp,
1844                   store_temp, 0, 2);
1845 SENSOR_TEMPLATE_2(temp_crit, temp%d_crit, S_IRUGO | S_IWUSR, show_temp,
1846                   store_temp, 0, 3);
1847 SENSOR_TEMPLATE(temp_offset, temp%d_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1848                 store_temp_offset, 0);
1849 SENSOR_TEMPLATE(temp_type, temp%d_type, S_IRUGO | S_IWUSR, show_temp_type,
1850                 store_temp_type, 0);
1851 SENSOR_TEMPLATE(temp_alarm, temp%d_alarm, S_IRUGO, show_alarm, NULL,
1852                 TEMP_ALARM_BASE);
1853 SENSOR_TEMPLATE_2(temp_lcrit, temp%d_lcrit, S_IRUGO | S_IWUSR, show_temp,
1854                   store_temp, 0, 4);
1855
1856 /*
1857  * nct6775_temp_is_visible uses the index into the following array
1858  * to determine if attributes should be created or not.
1859  * Any change in order or content must be matched.
1860  */
1861 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
1862         &sensor_dev_template_temp_input,
1863         &sensor_dev_template_temp_label,
1864         &sensor_dev_template_temp_max,          /* 2 */
1865         &sensor_dev_template_temp_max_hyst,     /* 3 */
1866         &sensor_dev_template_temp_crit,         /* 4 */
1867         &sensor_dev_template_temp_lcrit,        /* 5 */
1868         &sensor_dev_template_temp_offset,       /* 6 */
1869         &sensor_dev_template_temp_type,         /* 7 */
1870         &sensor_dev_template_temp_alarm,        /* 8 */
1871         NULL
1872 };
1873
1874 static struct sensor_template_group nct6775_temp_template_group = {
1875         .templates = nct6775_attributes_temp_template,
1876         .is_visible = nct6775_temp_is_visible,
1877         .base = 1,
1878 };
1879
1880 static ssize_t
1881 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
1882 {
1883         struct nct6775_data *data = nct6775_update_device(dev);
1884         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1885
1886         return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
1887 }
1888
1889 static ssize_t
1890 store_pwm_mode(struct device *dev, struct device_attribute *attr,
1891                const char *buf, size_t count)
1892 {
1893         struct nct6775_data *data = dev_get_drvdata(dev);
1894         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1895         int nr = sattr->index;
1896         unsigned long val;
1897         int err;
1898         u8 reg;
1899
1900         err = kstrtoul(buf, 10, &val);
1901         if (err < 0)
1902                 return err;
1903
1904         if (val > 1)
1905                 return -EINVAL;
1906
1907         /* Setting DC mode is not supported for all chips/channels */
1908         if (data->REG_PWM_MODE[nr] == 0) {
1909                 if (val)
1910                         return -EINVAL;
1911                 return count;
1912         }
1913
1914         mutex_lock(&data->update_lock);
1915         data->pwm_mode[nr] = val;
1916         reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
1917         reg &= ~data->PWM_MODE_MASK[nr];
1918         if (val)
1919                 reg |= data->PWM_MODE_MASK[nr];
1920         nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
1921         mutex_unlock(&data->update_lock);
1922         return count;
1923 }
1924
1925 static ssize_t
1926 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1927 {
1928         struct nct6775_data *data = nct6775_update_device(dev);
1929         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1930         int nr = sattr->nr;
1931         int index = sattr->index;
1932         int pwm;
1933
1934         /*
1935          * For automatic fan control modes, show current pwm readings.
1936          * Otherwise, show the configured value.
1937          */
1938         if (index == 0 && data->pwm_enable[nr] > manual)
1939                 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
1940         else
1941                 pwm = data->pwm[index][nr];
1942
1943         return sprintf(buf, "%d\n", pwm);
1944 }
1945
1946 static ssize_t
1947 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
1948           size_t count)
1949 {
1950         struct nct6775_data *data = dev_get_drvdata(dev);
1951         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1952         int nr = sattr->nr;
1953         int index = sattr->index;
1954         unsigned long val;
1955         int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
1956         int maxval[7]
1957           = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
1958         int err;
1959         u8 reg;
1960
1961         err = kstrtoul(buf, 10, &val);
1962         if (err < 0)
1963                 return err;
1964         val = clamp_val(val, minval[index], maxval[index]);
1965
1966         mutex_lock(&data->update_lock);
1967         data->pwm[index][nr] = val;
1968         nct6775_write_value(data, data->REG_PWM[index][nr], val);
1969         if (index == 2) { /* floor: disable if val == 0 */
1970                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
1971                 reg &= 0x7f;
1972                 if (val)
1973                         reg |= 0x80;
1974                 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
1975         }
1976         mutex_unlock(&data->update_lock);
1977         return count;
1978 }
1979
1980 /* Returns 0 if OK, -EINVAL otherwise */
1981 static int check_trip_points(struct nct6775_data *data, int nr)
1982 {
1983         int i;
1984
1985         for (i = 0; i < data->auto_pwm_num - 1; i++) {
1986                 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1987                         return -EINVAL;
1988         }
1989         for (i = 0; i < data->auto_pwm_num - 1; i++) {
1990                 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1991                         return -EINVAL;
1992         }
1993         /* validate critical temperature and pwm if enabled (pwm > 0) */
1994         if (data->auto_pwm[nr][data->auto_pwm_num]) {
1995                 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
1996                                 data->auto_temp[nr][data->auto_pwm_num] ||
1997                     data->auto_pwm[nr][data->auto_pwm_num - 1] >
1998                                 data->auto_pwm[nr][data->auto_pwm_num])
1999                         return -EINVAL;
2000         }
2001         return 0;
2002 }
2003
2004 static void pwm_update_registers(struct nct6775_data *data, int nr)
2005 {
2006         u8 reg;
2007
2008         switch (data->pwm_enable[nr]) {
2009         case off:
2010         case manual:
2011                 break;
2012         case speed_cruise:
2013                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2014                 reg = (reg & ~data->tolerance_mask) |
2015                   (data->target_speed_tolerance[nr] & data->tolerance_mask);
2016                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2017                 nct6775_write_value(data, data->REG_TARGET[nr],
2018                                     data->target_speed[nr] & 0xff);
2019                 if (data->REG_TOLERANCE_H) {
2020                         reg = (data->target_speed[nr] >> 8) & 0x0f;
2021                         reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2022                         nct6775_write_value(data,
2023                                             data->REG_TOLERANCE_H[nr],
2024                                             reg);
2025                 }
2026                 break;
2027         case thermal_cruise:
2028                 nct6775_write_value(data, data->REG_TARGET[nr],
2029                                     data->target_temp[nr]);
2030                 /* intentional */
2031         default:
2032                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2033                 reg = (reg & ~data->tolerance_mask) |
2034                   data->temp_tolerance[0][nr];
2035                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2036                 break;
2037         }
2038 }
2039
2040 static ssize_t
2041 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2042 {
2043         struct nct6775_data *data = nct6775_update_device(dev);
2044         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2045
2046         return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2047 }
2048
2049 static ssize_t
2050 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2051                  const char *buf, size_t count)
2052 {
2053         struct nct6775_data *data = dev_get_drvdata(dev);
2054         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2055         int nr = sattr->index;
2056         unsigned long val;
2057         int err;
2058         u16 reg;
2059
2060         err = kstrtoul(buf, 10, &val);
2061         if (err < 0)
2062                 return err;
2063
2064         if (val > sf4)
2065                 return -EINVAL;
2066
2067         if (val == sf3 && data->kind != nct6775)
2068                 return -EINVAL;
2069
2070         if (val == sf4 && check_trip_points(data, nr)) {
2071                 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2072                 dev_err(dev, "Adjust trip points and try again\n");
2073                 return -EINVAL;
2074         }
2075
2076         mutex_lock(&data->update_lock);
2077         data->pwm_enable[nr] = val;
2078         if (val == off) {
2079                 /*
2080                  * turn off pwm control: select manual mode, set pwm to maximum
2081                  */
2082                 data->pwm[0][nr] = 255;
2083                 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2084         }
2085         pwm_update_registers(data, nr);
2086         reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2087         reg &= 0x0f;
2088         reg |= pwm_enable_to_reg(val) << 4;
2089         nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2090         mutex_unlock(&data->update_lock);
2091         return count;
2092 }
2093
2094 static ssize_t
2095 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2096 {
2097         int i, sel = 0;
2098
2099         for (i = 0; i < NUM_TEMP; i++) {
2100                 if (!(data->have_temp & (1 << i)))
2101                         continue;
2102                 if (src == data->temp_src[i]) {
2103                         sel = i + 1;
2104                         break;
2105                 }
2106         }
2107
2108         return sprintf(buf, "%d\n", sel);
2109 }
2110
2111 static ssize_t
2112 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2113 {
2114         struct nct6775_data *data = nct6775_update_device(dev);
2115         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2116         int index = sattr->index;
2117
2118         return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2119 }
2120
2121 static ssize_t
2122 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2123                    const char *buf, size_t count)
2124 {
2125         struct nct6775_data *data = nct6775_update_device(dev);
2126         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2127         int nr = sattr->index;
2128         unsigned long val;
2129         int err, reg, src;
2130
2131         err = kstrtoul(buf, 10, &val);
2132         if (err < 0)
2133                 return err;
2134         if (val == 0 || val > NUM_TEMP)
2135                 return -EINVAL;
2136         if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
2137                 return -EINVAL;
2138
2139         mutex_lock(&data->update_lock);
2140         src = data->temp_src[val - 1];
2141         data->pwm_temp_sel[nr] = src;
2142         reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2143         reg &= 0xe0;
2144         reg |= src;
2145         nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2146         mutex_unlock(&data->update_lock);
2147
2148         return count;
2149 }
2150
2151 static ssize_t
2152 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2153                          char *buf)
2154 {
2155         struct nct6775_data *data = nct6775_update_device(dev);
2156         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2157         int index = sattr->index;
2158
2159         return show_pwm_temp_sel_common(data, buf,
2160                                         data->pwm_weight_temp_sel[index]);
2161 }
2162
2163 static ssize_t
2164 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2165                           const char *buf, size_t count)
2166 {
2167         struct nct6775_data *data = nct6775_update_device(dev);
2168         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2169         int nr = sattr->index;
2170         unsigned long val;
2171         int err, reg, src;
2172
2173         err = kstrtoul(buf, 10, &val);
2174         if (err < 0)
2175                 return err;
2176         if (val > NUM_TEMP)
2177                 return -EINVAL;
2178         if (val && (!(data->have_temp & (1 << (val - 1))) ||
2179                     !data->temp_src[val - 1]))
2180                 return -EINVAL;
2181
2182         mutex_lock(&data->update_lock);
2183         if (val) {
2184                 src = data->temp_src[val - 1];
2185                 data->pwm_weight_temp_sel[nr] = src;
2186                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2187                 reg &= 0xe0;
2188                 reg |= (src | 0x80);
2189                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2190         } else {
2191                 data->pwm_weight_temp_sel[nr] = 0;
2192                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2193                 reg &= 0x7f;
2194                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2195         }
2196         mutex_unlock(&data->update_lock);
2197
2198         return count;
2199 }
2200
2201 static ssize_t
2202 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2203 {
2204         struct nct6775_data *data = nct6775_update_device(dev);
2205         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2206
2207         return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2208 }
2209
2210 static ssize_t
2211 store_target_temp(struct device *dev, struct device_attribute *attr,
2212                   const char *buf, size_t count)
2213 {
2214         struct nct6775_data *data = dev_get_drvdata(dev);
2215         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2216         int nr = sattr->index;
2217         unsigned long val;
2218         int err;
2219
2220         err = kstrtoul(buf, 10, &val);
2221         if (err < 0)
2222                 return err;
2223
2224         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2225                         data->target_temp_mask);
2226
2227         mutex_lock(&data->update_lock);
2228         data->target_temp[nr] = val;
2229         pwm_update_registers(data, nr);
2230         mutex_unlock(&data->update_lock);
2231         return count;
2232 }
2233
2234 static ssize_t
2235 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2236 {
2237         struct nct6775_data *data = nct6775_update_device(dev);
2238         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2239         int nr = sattr->index;
2240
2241         return sprintf(buf, "%d\n",
2242                        fan_from_reg16(data->target_speed[nr],
2243                                       data->fan_div[nr]));
2244 }
2245
2246 static ssize_t
2247 store_target_speed(struct device *dev, struct device_attribute *attr,
2248                    const char *buf, size_t count)
2249 {
2250         struct nct6775_data *data = dev_get_drvdata(dev);
2251         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2252         int nr = sattr->index;
2253         unsigned long val;
2254         int err;
2255         u16 speed;
2256
2257         err = kstrtoul(buf, 10, &val);
2258         if (err < 0)
2259                 return err;
2260
2261         val = clamp_val(val, 0, 1350000U);
2262         speed = fan_to_reg(val, data->fan_div[nr]);
2263
2264         mutex_lock(&data->update_lock);
2265         data->target_speed[nr] = speed;
2266         pwm_update_registers(data, nr);
2267         mutex_unlock(&data->update_lock);
2268         return count;
2269 }
2270
2271 static ssize_t
2272 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2273                     char *buf)
2274 {
2275         struct nct6775_data *data = nct6775_update_device(dev);
2276         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2277         int nr = sattr->nr;
2278         int index = sattr->index;
2279
2280         return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2281 }
2282
2283 static ssize_t
2284 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2285                      const char *buf, size_t count)
2286 {
2287         struct nct6775_data *data = dev_get_drvdata(dev);
2288         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2289         int nr = sattr->nr;
2290         int index = sattr->index;
2291         unsigned long val;
2292         int err;
2293
2294         err = kstrtoul(buf, 10, &val);
2295         if (err < 0)
2296                 return err;
2297
2298         /* Limit tolerance as needed */
2299         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2300
2301         mutex_lock(&data->update_lock);
2302         data->temp_tolerance[index][nr] = val;
2303         if (index)
2304                 pwm_update_registers(data, nr);
2305         else
2306                 nct6775_write_value(data,
2307                                     data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2308                                     val);
2309         mutex_unlock(&data->update_lock);
2310         return count;
2311 }
2312
2313 /*
2314  * Fan speed tolerance is a tricky beast, since the associated register is
2315  * a tick counter, but the value is reported and configured as rpm.
2316  * Compute resulting low and high rpm values and report the difference.
2317  */
2318 static ssize_t
2319 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2320                      char *buf)
2321 {
2322         struct nct6775_data *data = nct6775_update_device(dev);
2323         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2324         int nr = sattr->index;
2325         int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2326         int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2327         int tolerance;
2328
2329         if (low <= 0)
2330                 low = 1;
2331         if (high > 0xffff)
2332                 high = 0xffff;
2333         if (high < low)
2334                 high = low;
2335
2336         tolerance = (fan_from_reg16(low, data->fan_div[nr])
2337                      - fan_from_reg16(high, data->fan_div[nr])) / 2;
2338
2339         return sprintf(buf, "%d\n", tolerance);
2340 }
2341
2342 static ssize_t
2343 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2344                       const char *buf, size_t count)
2345 {
2346         struct nct6775_data *data = dev_get_drvdata(dev);
2347         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2348         int nr = sattr->index;
2349         unsigned long val;
2350         int err;
2351         int low, high;
2352
2353         err = kstrtoul(buf, 10, &val);
2354         if (err < 0)
2355                 return err;
2356
2357         high = fan_from_reg16(data->target_speed[nr],
2358                               data->fan_div[nr]) + val;
2359         low = fan_from_reg16(data->target_speed[nr],
2360                              data->fan_div[nr]) - val;
2361         if (low <= 0)
2362                 low = 1;
2363         if (high < low)
2364                 high = low;
2365
2366         val = (fan_to_reg(low, data->fan_div[nr]) -
2367                fan_to_reg(high, data->fan_div[nr])) / 2;
2368
2369         /* Limit tolerance as needed */
2370         val = clamp_val(val, 0, data->speed_tolerance_limit);
2371
2372         mutex_lock(&data->update_lock);
2373         data->target_speed_tolerance[nr] = val;
2374         pwm_update_registers(data, nr);
2375         mutex_unlock(&data->update_lock);
2376         return count;
2377 }
2378
2379 SENSOR_TEMPLATE_2(pwm, pwm%d, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2380 SENSOR_TEMPLATE(pwm_mode, pwm%d_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2381                 store_pwm_mode, 0);
2382 SENSOR_TEMPLATE(pwm_enable, pwm%d_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2383                 store_pwm_enable, 0);
2384 SENSOR_TEMPLATE(pwm_temp_sel, pwm%d_temp_sel, S_IWUSR | S_IRUGO,
2385                 show_pwm_temp_sel, store_pwm_temp_sel, 0);
2386 SENSOR_TEMPLATE(pwm_target_temp, pwm%d_target_temp, S_IWUSR | S_IRUGO,
2387                 show_target_temp, store_target_temp, 0);
2388 SENSOR_TEMPLATE(fan_target, fan%d_target, S_IWUSR | S_IRUGO, show_target_speed,
2389                 store_target_speed, 0);
2390 SENSOR_TEMPLATE(fan_tolerance, fan%d_tolerance, S_IWUSR | S_IRUGO,
2391                 show_speed_tolerance, store_speed_tolerance, 0);
2392
2393 /* Smart Fan registers */
2394
2395 static ssize_t
2396 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2397 {
2398         struct nct6775_data *data = nct6775_update_device(dev);
2399         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2400         int nr = sattr->nr;
2401         int index = sattr->index;
2402
2403         return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2404 }
2405
2406 static ssize_t
2407 store_weight_temp(struct device *dev, struct device_attribute *attr,
2408                   const char *buf, size_t count)
2409 {
2410         struct nct6775_data *data = dev_get_drvdata(dev);
2411         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2412         int nr = sattr->nr;
2413         int index = sattr->index;
2414         unsigned long val;
2415         int err;
2416
2417         err = kstrtoul(buf, 10, &val);
2418         if (err < 0)
2419                 return err;
2420
2421         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2422
2423         mutex_lock(&data->update_lock);
2424         data->weight_temp[index][nr] = val;
2425         nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2426         mutex_unlock(&data->update_lock);
2427         return count;
2428 }
2429
2430 SENSOR_TEMPLATE(pwm_weight_temp_sel, pwm%d_weight_temp_sel, S_IWUSR | S_IRUGO,
2431                   show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
2432 SENSOR_TEMPLATE_2(pwm_weight_temp_step, pwm%d_weight_temp_step,
2433                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 0);
2434 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, pwm%d_weight_temp_step_tol,
2435                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 1);
2436 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, pwm%d_weight_temp_step_base,
2437                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 2);
2438 SENSOR_TEMPLATE_2(pwm_weight_duty_step, pwm%d_weight_duty_step,
2439                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 5);
2440 SENSOR_TEMPLATE_2(pwm_weight_duty_base, pwm%d_weight_duty_base,
2441                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 6);
2442
2443 static ssize_t
2444 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2445 {
2446         struct nct6775_data *data = nct6775_update_device(dev);
2447         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2448         int nr = sattr->nr;
2449         int index = sattr->index;
2450
2451         return sprintf(buf, "%d\n",
2452                        step_time_from_reg(data->fan_time[index][nr],
2453                                           data->pwm_mode[nr]));
2454 }
2455
2456 static ssize_t
2457 store_fan_time(struct device *dev, struct device_attribute *attr,
2458                const char *buf, size_t count)
2459 {
2460         struct nct6775_data *data = dev_get_drvdata(dev);
2461         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2462         int nr = sattr->nr;
2463         int index = sattr->index;
2464         unsigned long val;
2465         int err;
2466
2467         err = kstrtoul(buf, 10, &val);
2468         if (err < 0)
2469                 return err;
2470
2471         val = step_time_to_reg(val, data->pwm_mode[nr]);
2472         mutex_lock(&data->update_lock);
2473         data->fan_time[index][nr] = val;
2474         nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2475         mutex_unlock(&data->update_lock);
2476         return count;
2477 }
2478
2479 static ssize_t
2480 show_name(struct device *dev, struct device_attribute *attr, char *buf)
2481 {
2482         struct nct6775_data *data = dev_get_drvdata(dev);
2483
2484         return sprintf(buf, "%s\n", data->name);
2485 }
2486
2487 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
2488
2489 static ssize_t
2490 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2491 {
2492         struct nct6775_data *data = nct6775_update_device(dev);
2493         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2494
2495         return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2496 }
2497
2498 static ssize_t
2499 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2500                const char *buf, size_t count)
2501 {
2502         struct nct6775_data *data = dev_get_drvdata(dev);
2503         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2504         int nr = sattr->nr;
2505         int point = sattr->index;
2506         unsigned long val;
2507         int err;
2508         u8 reg;
2509
2510         err = kstrtoul(buf, 10, &val);
2511         if (err < 0)
2512                 return err;
2513         if (val > 255)
2514                 return -EINVAL;
2515
2516         if (point == data->auto_pwm_num) {
2517                 if (data->kind != nct6775 && !val)
2518                         return -EINVAL;
2519                 if (data->kind != nct6779 && val)
2520                         val = 0xff;
2521         }
2522
2523         mutex_lock(&data->update_lock);
2524         data->auto_pwm[nr][point] = val;
2525         if (point < data->auto_pwm_num) {
2526                 nct6775_write_value(data,
2527                                     NCT6775_AUTO_PWM(data, nr, point),
2528                                     data->auto_pwm[nr][point]);
2529         } else {
2530                 switch (data->kind) {
2531                 case nct6775:
2532                         /* disable if needed (pwm == 0) */
2533                         reg = nct6775_read_value(data,
2534                                                  NCT6775_REG_CRITICAL_ENAB[nr]);
2535                         if (val)
2536                                 reg |= 0x02;
2537                         else
2538                                 reg &= ~0x02;
2539                         nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
2540                                             reg);
2541                         break;
2542                 case nct6776:
2543                         break; /* always enabled, nothing to do */
2544                 case nct6106:
2545                 case nct6779:
2546                         nct6775_write_value(data, data->REG_CRITICAL_PWM[nr],
2547                                             val);
2548                         reg = nct6775_read_value(data,
2549                                         data->REG_CRITICAL_PWM_ENABLE[nr]);
2550                         if (val == 255)
2551                                 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
2552                         else
2553                                 reg |= data->CRITICAL_PWM_ENABLE_MASK;
2554                         nct6775_write_value(data,
2555                                             data->REG_CRITICAL_PWM_ENABLE[nr],
2556                                             reg);
2557                         break;
2558                 }
2559         }
2560         mutex_unlock(&data->update_lock);
2561         return count;
2562 }
2563
2564 static ssize_t
2565 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
2566 {
2567         struct nct6775_data *data = nct6775_update_device(dev);
2568         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2569         int nr = sattr->nr;
2570         int point = sattr->index;
2571
2572         /*
2573          * We don't know for sure if the temperature is signed or unsigned.
2574          * Assume it is unsigned.
2575          */
2576         return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
2577 }
2578
2579 static ssize_t
2580 store_auto_temp(struct device *dev, struct device_attribute *attr,
2581                 const char *buf, size_t count)
2582 {
2583         struct nct6775_data *data = dev_get_drvdata(dev);
2584         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2585         int nr = sattr->nr;
2586         int point = sattr->index;
2587         unsigned long val;
2588         int err;
2589
2590         err = kstrtoul(buf, 10, &val);
2591         if (err)
2592                 return err;
2593         if (val > 255000)
2594                 return -EINVAL;
2595
2596         mutex_lock(&data->update_lock);
2597         data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
2598         if (point < data->auto_pwm_num) {
2599                 nct6775_write_value(data,
2600                                     NCT6775_AUTO_TEMP(data, nr, point),
2601                                     data->auto_temp[nr][point]);
2602         } else {
2603                 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
2604                                     data->auto_temp[nr][point]);
2605         }
2606         mutex_unlock(&data->update_lock);
2607         return count;
2608 }
2609
2610 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
2611                                       struct attribute *attr, int index)
2612 {
2613         struct device *dev = container_of(kobj, struct device, kobj);
2614         struct nct6775_data *data = dev_get_drvdata(dev);
2615         int pwm = index / 36;   /* pwm index */
2616         int nr = index % 36;    /* attribute index */
2617
2618         if (!(data->has_pwm & (1 << pwm)))
2619                 return 0;
2620
2621         if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
2622                 return 0;
2623         if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
2624                 return 0;
2625         if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
2626                 return 0;
2627
2628         if (nr >= 22 && nr <= 35) {             /* auto point */
2629                 int api = (nr - 22) / 2;        /* auto point index */
2630
2631                 if (api > data->auto_pwm_num)
2632                         return 0;
2633         }
2634         return attr->mode;
2635 }
2636
2637 SENSOR_TEMPLATE_2(pwm_stop_time, pwm%d_stop_time, S_IWUSR | S_IRUGO,
2638                   show_fan_time, store_fan_time, 0, 0);
2639 SENSOR_TEMPLATE_2(pwm_step_up_time, pwm%d_step_up_time, S_IWUSR | S_IRUGO,
2640                   show_fan_time, store_fan_time, 0, 1);
2641 SENSOR_TEMPLATE_2(pwm_step_down_time, pwm%d_step_down_time, S_IWUSR | S_IRUGO,
2642                   show_fan_time, store_fan_time, 0, 2);
2643 SENSOR_TEMPLATE_2(pwm_start, pwm%d_start, S_IWUSR | S_IRUGO, show_pwm,
2644                   store_pwm, 0, 1);
2645 SENSOR_TEMPLATE_2(pwm_floor, pwm%d_floor, S_IWUSR | S_IRUGO, show_pwm,
2646                   store_pwm, 0, 2);
2647 SENSOR_TEMPLATE_2(pwm_temp_tolerance, pwm%d_temp_tolerance, S_IWUSR | S_IRUGO,
2648                   show_temp_tolerance, store_temp_tolerance, 0, 0);
2649 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, pwm%d_crit_temp_tolerance,
2650                   S_IWUSR | S_IRUGO, show_temp_tolerance, store_temp_tolerance,
2651                   0, 1);
2652
2653 SENSOR_TEMPLATE_2(pwm_max, pwm%d_max, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2654                   0, 3);
2655
2656 SENSOR_TEMPLATE_2(pwm_step, pwm%d_step, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2657                   0, 4);
2658
2659 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, pwm%d_auto_point1_pwm, S_IWUSR | S_IRUGO,
2660                   show_auto_pwm, store_auto_pwm, 0, 0);
2661 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, pwm%d_auto_point1_temp,
2662                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 0);
2663
2664 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, pwm%d_auto_point2_pwm, S_IWUSR | S_IRUGO,
2665                   show_auto_pwm, store_auto_pwm, 0, 1);
2666 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, pwm%d_auto_point2_temp,
2667                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 1);
2668
2669 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, pwm%d_auto_point3_pwm, S_IWUSR | S_IRUGO,
2670                   show_auto_pwm, store_auto_pwm, 0, 2);
2671 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, pwm%d_auto_point3_temp,
2672                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 2);
2673
2674 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, pwm%d_auto_point4_pwm, S_IWUSR | S_IRUGO,
2675                   show_auto_pwm, store_auto_pwm, 0, 3);
2676 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, pwm%d_auto_point4_temp,
2677                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 3);
2678
2679 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, pwm%d_auto_point5_pwm, S_IWUSR | S_IRUGO,
2680                   show_auto_pwm, store_auto_pwm, 0, 4);
2681 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, pwm%d_auto_point5_temp,
2682                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 4);
2683
2684 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, pwm%d_auto_point6_pwm, S_IWUSR | S_IRUGO,
2685                   show_auto_pwm, store_auto_pwm, 0, 5);
2686 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, pwm%d_auto_point6_temp,
2687                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 5);
2688
2689 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, pwm%d_auto_point7_pwm, S_IWUSR | S_IRUGO,
2690                   show_auto_pwm, store_auto_pwm, 0, 6);
2691 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, pwm%d_auto_point7_temp,
2692                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 6);
2693
2694 /*
2695  * nct6775_pwm_is_visible uses the index into the following array
2696  * to determine if attributes should be created or not.
2697  * Any change in order or content must be matched.
2698  */
2699 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
2700         &sensor_dev_template_pwm,
2701         &sensor_dev_template_pwm_mode,
2702         &sensor_dev_template_pwm_enable,
2703         &sensor_dev_template_pwm_temp_sel,
2704         &sensor_dev_template_pwm_temp_tolerance,
2705         &sensor_dev_template_pwm_crit_temp_tolerance,
2706         &sensor_dev_template_pwm_target_temp,
2707         &sensor_dev_template_fan_target,
2708         &sensor_dev_template_fan_tolerance,
2709         &sensor_dev_template_pwm_stop_time,
2710         &sensor_dev_template_pwm_step_up_time,
2711         &sensor_dev_template_pwm_step_down_time,
2712         &sensor_dev_template_pwm_start,
2713         &sensor_dev_template_pwm_floor,
2714         &sensor_dev_template_pwm_weight_temp_sel,
2715         &sensor_dev_template_pwm_weight_temp_step,
2716         &sensor_dev_template_pwm_weight_temp_step_tol,
2717         &sensor_dev_template_pwm_weight_temp_step_base,
2718         &sensor_dev_template_pwm_weight_duty_step,
2719         &sensor_dev_template_pwm_max,                   /* 19 */
2720         &sensor_dev_template_pwm_step,                  /* 20 */
2721         &sensor_dev_template_pwm_weight_duty_base,      /* 21 */
2722         &sensor_dev_template_pwm_auto_point1_pwm,       /* 22 */
2723         &sensor_dev_template_pwm_auto_point1_temp,
2724         &sensor_dev_template_pwm_auto_point2_pwm,
2725         &sensor_dev_template_pwm_auto_point2_temp,
2726         &sensor_dev_template_pwm_auto_point3_pwm,
2727         &sensor_dev_template_pwm_auto_point3_temp,
2728         &sensor_dev_template_pwm_auto_point4_pwm,
2729         &sensor_dev_template_pwm_auto_point4_temp,
2730         &sensor_dev_template_pwm_auto_point5_pwm,
2731         &sensor_dev_template_pwm_auto_point5_temp,
2732         &sensor_dev_template_pwm_auto_point6_pwm,
2733         &sensor_dev_template_pwm_auto_point6_temp,
2734         &sensor_dev_template_pwm_auto_point7_pwm,
2735         &sensor_dev_template_pwm_auto_point7_temp,      /* 35 */
2736
2737         NULL
2738 };
2739
2740 static struct sensor_template_group nct6775_pwm_template_group = {
2741         .templates = nct6775_attributes_pwm_template,
2742         .is_visible = nct6775_pwm_is_visible,
2743         .base = 1,
2744 };
2745
2746 static ssize_t
2747 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
2748 {
2749         struct nct6775_data *data = dev_get_drvdata(dev);
2750         return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
2751 }
2752
2753 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
2754
2755 /* Case open detection */
2756
2757 static ssize_t
2758 clear_caseopen(struct device *dev, struct device_attribute *attr,
2759                const char *buf, size_t count)
2760 {
2761         struct nct6775_data *data = dev_get_drvdata(dev);
2762         struct nct6775_sio_data *sio_data = dev->platform_data;
2763         int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
2764         unsigned long val;
2765         u8 reg;
2766         int ret;
2767
2768         if (kstrtoul(buf, 10, &val) || val != 0)
2769                 return -EINVAL;
2770
2771         mutex_lock(&data->update_lock);
2772
2773         /*
2774          * Use CR registers to clear caseopen status.
2775          * The CR registers are the same for all chips, and not all chips
2776          * support clearing the caseopen status through "regular" registers.
2777          */
2778         ret = superio_enter(sio_data->sioreg);
2779         if (ret) {
2780                 count = ret;
2781                 goto error;
2782         }
2783
2784         superio_select(sio_data->sioreg, NCT6775_LD_ACPI);
2785         reg = superio_inb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
2786         reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
2787         superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
2788         reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
2789         superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
2790         superio_exit(sio_data->sioreg);
2791
2792         data->valid = false;    /* Force cache refresh */
2793 error:
2794         mutex_unlock(&data->update_lock);
2795         return count;
2796 }
2797
2798 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
2799                           clear_caseopen, INTRUSION_ALARM_BASE);
2800 static SENSOR_DEVICE_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
2801                           clear_caseopen, INTRUSION_ALARM_BASE + 1);
2802
2803 static umode_t nct6775_other_is_visible(struct kobject *kobj,
2804                                         struct attribute *attr, int index)
2805 {
2806         struct device *dev = container_of(kobj, struct device, kobj);
2807         struct nct6775_data *data = dev_get_drvdata(dev);
2808
2809         if (index == 1 && !data->have_vid)
2810                 return 0;
2811
2812         if (index == 2 || index == 3) {
2813                 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + index - 2] < 0)
2814                         return 0;
2815         }
2816
2817         return attr->mode;
2818 }
2819
2820 /*
2821  * nct6775_other_is_visible uses the index into the following array
2822  * to determine if attributes should be created or not.
2823  * Any change in order or content must be matched.
2824  */
2825 static struct attribute *nct6775_attributes_other[] = {
2826         &dev_attr_name.attr,
2827         &dev_attr_cpu0_vid.attr,                                /* 1 */
2828         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,        /* 2 */
2829         &sensor_dev_attr_intrusion1_alarm.dev_attr.attr,        /* 3 */
2830
2831         NULL
2832 };
2833
2834 static const struct attribute_group nct6775_group_other = {
2835         .attrs = nct6775_attributes_other,
2836         .is_visible = nct6775_other_is_visible,
2837 };
2838
2839 /*
2840  * Driver and device management
2841  */
2842
2843 static void nct6775_device_remove_files(struct device *dev)
2844 {
2845         struct nct6775_data *data = dev_get_drvdata(dev);
2846
2847         if (data->group_pwm)
2848                 sysfs_remove_group(&dev->kobj, data->group_pwm);
2849         if (data->group_in)
2850                 sysfs_remove_group(&dev->kobj, data->group_in);
2851         if (data->group_fan)
2852                 sysfs_remove_group(&dev->kobj, data->group_fan);
2853         if (data->group_temp)
2854                 sysfs_remove_group(&dev->kobj, data->group_temp);
2855
2856         sysfs_remove_group(&dev->kobj, &nct6775_group_other);
2857 }
2858
2859 /* Get the monitoring functions started */
2860 static inline void nct6775_init_device(struct nct6775_data *data)
2861 {
2862         int i;
2863         u8 tmp, diode;
2864
2865         /* Start monitoring if needed */
2866         if (data->REG_CONFIG) {
2867                 tmp = nct6775_read_value(data, data->REG_CONFIG);
2868                 if (!(tmp & 0x01))
2869                         nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
2870         }
2871
2872         /* Enable temperature sensors if needed */
2873         for (i = 0; i < NUM_TEMP; i++) {
2874                 if (!(data->have_temp & (1 << i)))
2875                         continue;
2876                 if (!data->reg_temp_config[i])
2877                         continue;
2878                 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
2879                 if (tmp & 0x01)
2880                         nct6775_write_value(data, data->reg_temp_config[i],
2881                                             tmp & 0xfe);
2882         }
2883
2884         /* Enable VBAT monitoring if needed */
2885         tmp = nct6775_read_value(data, data->REG_VBAT);
2886         if (!(tmp & 0x01))
2887                 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
2888
2889         diode = nct6775_read_value(data, data->REG_DIODE);
2890
2891         for (i = 0; i < data->temp_fixed_num; i++) {
2892                 if (!(data->have_temp_fixed & (1 << i)))
2893                         continue;
2894                 if ((tmp & (data->DIODE_MASK << i)))    /* diode */
2895                         data->temp_type[i]
2896                           = 3 - ((diode >> i) & data->DIODE_MASK);
2897                 else                            /* thermistor */
2898                         data->temp_type[i] = 4;
2899         }
2900 }
2901
2902 static void
2903 nct6775_check_fan_inputs(const struct nct6775_sio_data *sio_data,
2904                          struct nct6775_data *data)
2905 {
2906         int regval;
2907         bool fan3pin, fan3min, fan4pin, fan4min, fan5pin;
2908         bool pwm3pin, pwm4pin, pwm5pin;
2909
2910         /* fan4 and fan5 share some pins with the GPIO and serial flash */
2911         if (data->kind == nct6775) {
2912                 regval = superio_inb(sio_data->sioreg, 0x2c);
2913
2914                 fan3pin = regval & (1 << 6);
2915                 fan3min = fan3pin;
2916                 pwm3pin = regval & (1 << 7);
2917
2918                 /* On NCT6775, fan4 shares pins with the fdc interface */
2919                 fan4pin = !(superio_inb(sio_data->sioreg, 0x2A) & 0x80);
2920                 fan4min = 0;
2921                 fan5pin = 0;
2922                 pwm4pin = 0;
2923                 pwm5pin = 0;
2924         } else if (data->kind == nct6776) {
2925                 bool gpok = superio_inb(sio_data->sioreg, 0x27) & 0x80;
2926
2927                 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
2928                 regval = superio_inb(sio_data->sioreg, SIO_REG_ENABLE);
2929
2930                 if (regval & 0x80)
2931                         fan3pin = gpok;
2932                 else
2933                         fan3pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x40);
2934
2935                 if (regval & 0x40)
2936                         fan4pin = gpok;
2937                 else
2938                         fan4pin = superio_inb(sio_data->sioreg, 0x1C) & 0x01;
2939
2940                 if (regval & 0x20)
2941                         fan5pin = gpok;
2942                 else
2943                         fan5pin = superio_inb(sio_data->sioreg, 0x1C) & 0x02;
2944
2945                 fan4min = fan4pin;
2946                 fan3min = fan3pin;
2947                 pwm3pin = fan3pin;
2948                 pwm4pin = 0;
2949                 pwm5pin = 0;
2950         } else if (data->kind == nct6106) {
2951                 regval = superio_inb(sio_data->sioreg, 0x24);
2952                 fan3pin = !(regval & 0x80);
2953                 pwm3pin = regval & 0x08;
2954                 fan3min = fan3pin;
2955
2956                 fan4pin = false;
2957                 fan4min = false;
2958                 fan5pin = false;
2959                 pwm4pin = false;
2960                 pwm5pin = false;
2961         } else {        /* NCT6779D */
2962                 regval = superio_inb(sio_data->sioreg, 0x1c);
2963
2964                 fan3pin = !(regval & (1 << 5));
2965                 fan4pin = !(regval & (1 << 6));
2966                 fan5pin = !(regval & (1 << 7));
2967
2968                 pwm3pin = !(regval & (1 << 0));
2969                 pwm4pin = !(regval & (1 << 1));
2970                 pwm5pin = !(regval & (1 << 2));
2971
2972                 fan3min = fan3pin;
2973                 fan4min = fan4pin;
2974         }
2975
2976         data->has_fan = data->has_fan_min = 0x03; /* fan1 and fan2 */
2977         data->has_fan |= fan3pin << 2;
2978         data->has_fan_min |= fan3min << 2;
2979
2980         data->has_fan |= (fan4pin << 3) | (fan5pin << 4);
2981         data->has_fan_min |= (fan4min << 3) | (fan5pin << 4);
2982
2983         data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) | (pwm5pin << 4);
2984 }
2985
2986 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
2987                              int *available, int *mask)
2988 {
2989         int i;
2990         u8 src;
2991
2992         for (i = 0; i < data->pwm_num && *available; i++) {
2993                 int index;
2994
2995                 if (!regp[i])
2996                         continue;
2997                 src = nct6775_read_value(data, regp[i]);
2998                 src &= 0x1f;
2999                 if (!src || (*mask & (1 << src)))
3000                         continue;
3001                 if (src >= data->temp_label_num ||
3002                     !strlen(data->temp_label[src]))
3003                         continue;
3004
3005                 index = __ffs(*available);
3006                 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3007                 *available &= ~(1 << index);
3008                 *mask |= 1 << src;
3009         }
3010 }
3011
3012 static int nct6775_probe(struct platform_device *pdev)
3013 {
3014         struct device *dev = &pdev->dev;
3015         struct nct6775_sio_data *sio_data = dev->platform_data;
3016         struct nct6775_data *data;
3017         struct resource *res;
3018         int i, s, err = 0;
3019         int src, mask, available;
3020         const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3021         const u16 *reg_temp_alternate, *reg_temp_crit;
3022         const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL;
3023         int num_reg_temp;
3024         u8 cr2a;
3025         struct attribute_group *group;
3026
3027         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3028         if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3029                                  DRVNAME))
3030                 return -EBUSY;
3031
3032         data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3033                             GFP_KERNEL);
3034         if (!data)
3035                 return -ENOMEM;
3036
3037         data->kind = sio_data->kind;
3038         data->addr = res->start;
3039         mutex_init(&data->update_lock);
3040         data->name = nct6775_device_names[data->kind];
3041         data->bank = 0xff;              /* Force initial bank selection */
3042         platform_set_drvdata(pdev, data);
3043
3044         switch (data->kind) {
3045         case nct6106:
3046                 data->in_num = 9;
3047                 data->pwm_num = 3;
3048                 data->auto_pwm_num = 4;
3049                 data->temp_fixed_num = 3;
3050
3051                 data->fan_from_reg = fan_from_reg13;
3052                 data->fan_from_reg_min = fan_from_reg13;
3053
3054                 data->temp_label = nct6776_temp_label;
3055                 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3056
3057                 data->REG_VBAT = NCT6106_REG_VBAT;
3058                 data->REG_DIODE = NCT6106_REG_DIODE;
3059                 data->DIODE_MASK = NCT6106_DIODE_MASK;
3060                 data->REG_VIN = NCT6106_REG_IN;
3061                 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3062                 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3063                 data->REG_TARGET = NCT6106_REG_TARGET;
3064                 data->REG_FAN = NCT6106_REG_FAN;
3065                 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
3066                 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
3067                 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
3068                 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
3069                 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
3070                 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
3071                 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
3072                 data->REG_PWM[0] = NCT6106_REG_PWM;
3073                 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
3074                 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
3075                 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3076                 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3077                 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3078                 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3079                 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3080                 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
3081                 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
3082                 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
3083                 data->REG_CRITICAL_TEMP_TOLERANCE
3084                   = NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
3085                 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
3086                 data->CRITICAL_PWM_ENABLE_MASK
3087                   = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3088                 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
3089                 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3090                 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3091                 data->REG_TEMP_SEL = NCT6106_REG_TEMP_SEL;
3092                 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3093                 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3094                 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3095                 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3096                 data->REG_ALARM = NCT6106_REG_ALARM;
3097                 data->ALARM_BITS = NCT6106_ALARM_BITS;
3098
3099                 reg_temp = NCT6106_REG_TEMP;
3100                 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3101                 reg_temp_over = NCT6106_REG_TEMP_OVER;
3102                 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3103                 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3104                 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3105                 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3106                 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3107                 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3108
3109                 break;
3110         case nct6775:
3111                 data->in_num = 9;
3112                 data->pwm_num = 3;
3113                 data->auto_pwm_num = 6;
3114                 data->has_fan_div = true;
3115                 data->temp_fixed_num = 3;
3116
3117                 data->ALARM_BITS = NCT6775_ALARM_BITS;
3118
3119                 data->fan_from_reg = fan_from_reg16;
3120                 data->fan_from_reg_min = fan_from_reg8;
3121                 data->target_temp_mask = 0x7f;
3122                 data->tolerance_mask = 0x0f;
3123                 data->speed_tolerance_limit = 15;
3124
3125                 data->temp_label = nct6775_temp_label;
3126                 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
3127
3128                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3129                 data->REG_VBAT = NCT6775_REG_VBAT;
3130                 data->REG_DIODE = NCT6775_REG_DIODE;
3131                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3132                 data->REG_VIN = NCT6775_REG_IN;
3133                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3134                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3135                 data->REG_TARGET = NCT6775_REG_TARGET;
3136                 data->REG_FAN = NCT6775_REG_FAN;
3137                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3138                 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3139                 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3140                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3141                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3142                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3143                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3144                 data->REG_PWM[0] = NCT6775_REG_PWM;
3145                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3146                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3147                 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3148                 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3149                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3150                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3151                 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3152                 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3153                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3154                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3155                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3156                 data->REG_CRITICAL_TEMP_TOLERANCE
3157                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3158                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3159                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3160                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3161                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3162                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3163                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3164                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3165                 data->REG_ALARM = NCT6775_REG_ALARM;
3166
3167                 reg_temp = NCT6775_REG_TEMP;
3168                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3169                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3170                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3171                 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3172                 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3173                 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3174
3175                 break;
3176         case nct6776:
3177                 data->in_num = 9;
3178                 data->pwm_num = 3;
3179                 data->auto_pwm_num = 4;
3180                 data->has_fan_div = false;
3181                 data->temp_fixed_num = 3;
3182
3183                 data->ALARM_BITS = NCT6776_ALARM_BITS;
3184
3185                 data->fan_from_reg = fan_from_reg13;
3186                 data->fan_from_reg_min = fan_from_reg13;
3187                 data->target_temp_mask = 0xff;
3188                 data->tolerance_mask = 0x07;
3189                 data->speed_tolerance_limit = 63;
3190
3191                 data->temp_label = nct6776_temp_label;
3192                 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3193
3194                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3195                 data->REG_VBAT = NCT6775_REG_VBAT;
3196                 data->REG_DIODE = NCT6775_REG_DIODE;
3197                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3198                 data->REG_VIN = NCT6775_REG_IN;
3199                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3200                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3201                 data->REG_TARGET = NCT6775_REG_TARGET;
3202                 data->REG_FAN = NCT6775_REG_FAN;
3203                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3204                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3205                 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3206                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3207                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3208                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3209                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3210                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3211                 data->REG_PWM[0] = NCT6775_REG_PWM;
3212                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3213                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3214                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3215                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3216                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3217                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3218                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3219                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3220                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3221                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3222                 data->REG_CRITICAL_TEMP_TOLERANCE
3223                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3224                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3225                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3226                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3227                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3228                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3229                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3230                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3231                 data->REG_ALARM = NCT6775_REG_ALARM;
3232
3233                 reg_temp = NCT6775_REG_TEMP;
3234                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3235                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3236                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3237                 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3238                 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3239                 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3240
3241                 break;
3242         case nct6779:
3243                 data->in_num = 15;
3244                 data->pwm_num = 5;
3245                 data->auto_pwm_num = 4;
3246                 data->has_fan_div = false;
3247                 data->temp_fixed_num = 6;
3248
3249                 data->ALARM_BITS = NCT6779_ALARM_BITS;
3250
3251                 data->fan_from_reg = fan_from_reg13;
3252                 data->fan_from_reg_min = fan_from_reg13;
3253                 data->target_temp_mask = 0xff;
3254                 data->tolerance_mask = 0x07;
3255                 data->speed_tolerance_limit = 63;
3256
3257                 data->temp_label = nct6779_temp_label;
3258                 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3259
3260                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3261                 data->REG_VBAT = NCT6775_REG_VBAT;
3262                 data->REG_DIODE = NCT6775_REG_DIODE;
3263                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3264                 data->REG_VIN = NCT6779_REG_IN;
3265                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3266                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3267                 data->REG_TARGET = NCT6775_REG_TARGET;
3268                 data->REG_FAN = NCT6779_REG_FAN;
3269                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3270                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3271                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3272                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3273                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3274                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3275                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3276                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3277                 data->REG_PWM[0] = NCT6775_REG_PWM;
3278                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3279                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3280                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3281                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3282                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3283                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3284                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3285                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3286                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3287                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3288                 data->REG_CRITICAL_TEMP_TOLERANCE
3289                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3290                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3291                 data->CRITICAL_PWM_ENABLE_MASK
3292                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3293                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3294                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3295                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3296                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3297                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3298                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3299                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3300                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3301                 data->REG_ALARM = NCT6779_REG_ALARM;
3302
3303                 reg_temp = NCT6779_REG_TEMP;
3304                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3305                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3306                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3307                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3308                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3309                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3310
3311                 break;
3312         default:
3313                 return -ENODEV;
3314         }
3315         data->have_in = (1 << data->in_num) - 1;
3316         data->have_temp = 0;
3317
3318         /*
3319          * On some boards, not all available temperature sources are monitored,
3320          * even though some of the monitoring registers are unused.
3321          * Get list of unused monitoring registers, then detect if any fan
3322          * controls are configured to use unmonitored temperature sources.
3323          * If so, assign the unmonitored temperature sources to available
3324          * monitoring registers.
3325          */
3326         mask = 0;
3327         available = 0;
3328         for (i = 0; i < num_reg_temp; i++) {
3329                 if (reg_temp[i] == 0)
3330                         continue;
3331
3332                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3333                 if (!src || (mask & (1 << src)))
3334                         available |= 1 << i;
3335
3336                 mask |= 1 << src;
3337         }
3338
3339         /*
3340          * Now find unmonitored temperature registers and enable monitoring
3341          * if additional monitoring registers are available.
3342          */
3343         add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
3344         add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
3345
3346         mask = 0;
3347         s = NUM_TEMP_FIXED;     /* First dynamic temperature attribute */
3348         for (i = 0; i < num_reg_temp; i++) {
3349                 if (reg_temp[i] == 0)
3350                         continue;
3351
3352                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3353                 if (!src || (mask & (1 << src)))
3354                         continue;
3355
3356                 if (src >= data->temp_label_num ||
3357                     !strlen(data->temp_label[src])) {
3358                         dev_info(dev,
3359                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3360                                  src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
3361                         continue;
3362                 }
3363
3364                 mask |= 1 << src;
3365
3366                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3367                 if (src <= data->temp_fixed_num) {
3368                         data->have_temp |= 1 << (src - 1);
3369                         data->have_temp_fixed |= 1 << (src - 1);
3370                         data->reg_temp[0][src - 1] = reg_temp[i];
3371                         data->reg_temp[1][src - 1] = reg_temp_over[i];
3372                         data->reg_temp[2][src - 1] = reg_temp_hyst[i];
3373                         if (reg_temp_crit_h && reg_temp_crit_h[i])
3374                                 data->reg_temp[3][src - 1] = reg_temp_crit_h[i];
3375                         else if (reg_temp_crit[src - 1])
3376                                 data->reg_temp[3][src - 1] = reg_temp_crit[src - 1];
3377                         if (reg_temp_crit_l && reg_temp_crit_l[i])
3378                                 data->reg_temp[4][src - 1] = reg_temp_crit_l[i];
3379                         data->reg_temp_config[src - 1] = reg_temp_config[i];
3380                         data->temp_src[src - 1] = src;
3381                         continue;
3382                 }
3383
3384                 if (s >= NUM_TEMP)
3385                         continue;
3386
3387                 /* Use dynamic index for other sources */
3388                 data->have_temp |= 1 << s;
3389                 data->reg_temp[0][s] = reg_temp[i];
3390                 data->reg_temp[1][s] = reg_temp_over[i];
3391                 data->reg_temp[2][s] = reg_temp_hyst[i];
3392                 data->reg_temp_config[s] = reg_temp_config[i];
3393                 if (reg_temp_crit_h && reg_temp_crit_h[i])
3394                         data->reg_temp[3][s] = reg_temp_crit_h[i];
3395                 else if (reg_temp_crit[src - 1])
3396                         data->reg_temp[3][s] = reg_temp_crit[src - 1];
3397                 if (reg_temp_crit_l && reg_temp_crit_l[i])
3398                         data->reg_temp[4][s] = reg_temp_crit_l[i];
3399
3400                 data->temp_src[s] = src;
3401                 s++;
3402         }
3403
3404 #ifdef USE_ALTERNATE
3405         /*
3406          * Go through the list of alternate temp registers and enable
3407          * if possible.
3408          * The temperature is already monitored if the respective bit in <mask>
3409          * is set.
3410          */
3411         for (i = 0; i < data->temp_label_num - 1; i++) {
3412                 if (!reg_temp_alternate[i])
3413                         continue;
3414                 if (mask & (1 << (i + 1)))
3415                         continue;
3416                 if (i < data->temp_fixed_num) {
3417                         if (data->have_temp & (1 << i))
3418                                 continue;
3419                         data->have_temp |= 1 << i;
3420                         data->have_temp_fixed |= 1 << i;
3421                         data->reg_temp[0][i] = reg_temp_alternate[i];
3422                         data->reg_temp[1][i] = reg_temp_over[i];
3423                         data->reg_temp[2][i] = reg_temp_hyst[i];
3424                         data->temp_src[i] = i + 1;
3425                         continue;
3426                 }
3427
3428                 if (s >= NUM_TEMP)      /* Abort if no more space */
3429                         break;
3430
3431                 data->have_temp |= 1 << s;
3432                 data->reg_temp[0][s] = reg_temp_alternate[i];
3433                 data->temp_src[s] = i + 1;
3434                 s++;
3435         }
3436 #endif /* USE_ALTERNATE */
3437
3438         /* Initialize the chip */
3439         nct6775_init_device(data);
3440
3441         err = superio_enter(sio_data->sioreg);
3442         if (err)
3443                 return err;
3444
3445         cr2a = superio_inb(sio_data->sioreg, 0x2a);
3446         switch (data->kind) {
3447         case nct6775:
3448                 data->have_vid = (cr2a & 0x40);
3449                 break;
3450         case nct6776:
3451                 data->have_vid = (cr2a & 0x60) == 0x40;
3452                 break;
3453         case nct6106:
3454         case nct6779:
3455                 break;
3456         }
3457
3458         /*
3459          * Read VID value
3460          * We can get the VID input values directly at logical device D 0xe3.
3461          */
3462         if (data->have_vid) {
3463                 superio_select(sio_data->sioreg, NCT6775_LD_VID);
3464                 data->vid = superio_inb(sio_data->sioreg, 0xe3);
3465                 data->vrm = vid_which_vrm();
3466         }
3467
3468         if (fan_debounce) {
3469                 u8 tmp;
3470
3471                 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3472                 tmp = superio_inb(sio_data->sioreg,
3473                                   NCT6775_REG_CR_FAN_DEBOUNCE);
3474                 switch (data->kind) {
3475                 case nct6106:
3476                         tmp |= 0xe0;
3477                         break;
3478                 case nct6775:
3479                         tmp |= 0x1e;
3480                         break;
3481                 case nct6776:
3482                 case nct6779:
3483                         tmp |= 0x3e;
3484                         break;
3485                 }
3486                 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
3487                              tmp);
3488                 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
3489                          data->name);
3490         }
3491
3492         nct6775_check_fan_inputs(sio_data, data);
3493
3494         superio_exit(sio_data->sioreg);
3495
3496         /* Read fan clock dividers immediately */
3497         nct6775_init_fan_common(dev, data);
3498
3499         /* Register sysfs hooks */
3500         group = nct6775_create_attr_group(dev, &nct6775_pwm_template_group,
3501                                           data->pwm_num);
3502         if (IS_ERR(group)) {
3503                 err = PTR_ERR(group);
3504                 goto exit_remove;
3505         }
3506         data->group_pwm = group;
3507
3508         group = nct6775_create_attr_group(dev, &nct6775_in_template_group,
3509                                           fls(data->have_in));
3510         if (IS_ERR(group)) {
3511                 err = PTR_ERR(group);
3512                 goto exit_remove;
3513         }
3514         data->group_in = group;
3515
3516         group = nct6775_create_attr_group(dev, &nct6775_fan_template_group,
3517                                           fls(data->has_fan));
3518         if (IS_ERR(group)) {
3519                 err = PTR_ERR(group);
3520                 goto exit_remove;
3521         }
3522         data->group_fan = group;
3523
3524         group = nct6775_create_attr_group(dev, &nct6775_temp_template_group,
3525                                           fls(data->have_temp));
3526         if (IS_ERR(group)) {
3527                 err = PTR_ERR(group);
3528                 goto exit_remove;
3529         }
3530         data->group_temp = group;
3531
3532         err = sysfs_create_group(&dev->kobj, &nct6775_group_other);
3533         if (err)
3534                 goto exit_remove;
3535
3536         data->hwmon_dev = hwmon_device_register(dev);
3537         if (IS_ERR(data->hwmon_dev)) {
3538                 err = PTR_ERR(data->hwmon_dev);
3539                 goto exit_remove;
3540         }
3541
3542         return 0;
3543
3544 exit_remove:
3545         nct6775_device_remove_files(dev);
3546         return err;
3547 }
3548
3549 static int nct6775_remove(struct platform_device *pdev)
3550 {
3551         struct nct6775_data *data = platform_get_drvdata(pdev);
3552
3553         hwmon_device_unregister(data->hwmon_dev);
3554         nct6775_device_remove_files(&pdev->dev);
3555
3556         return 0;
3557 }
3558
3559 #ifdef CONFIG_PM
3560 static int nct6775_suspend(struct device *dev)
3561 {
3562         struct nct6775_data *data = nct6775_update_device(dev);
3563         struct nct6775_sio_data *sio_data = dev->platform_data;
3564
3565         mutex_lock(&data->update_lock);
3566         data->vbat = nct6775_read_value(data, data->REG_VBAT);
3567         if (sio_data->kind == nct6775) {
3568                 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
3569                 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
3570         }
3571         mutex_unlock(&data->update_lock);
3572
3573         return 0;
3574 }
3575
3576 static int nct6775_resume(struct device *dev)
3577 {
3578         struct nct6775_data *data = dev_get_drvdata(dev);
3579         struct nct6775_sio_data *sio_data = dev->platform_data;
3580         int i, j;
3581
3582         mutex_lock(&data->update_lock);
3583         data->bank = 0xff;              /* Force initial bank selection */
3584
3585         /* Restore limits */
3586         for (i = 0; i < data->in_num; i++) {
3587                 if (!(data->have_in & (1 << i)))
3588                         continue;
3589
3590                 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
3591                                     data->in[i][1]);
3592                 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
3593                                     data->in[i][2]);
3594         }
3595
3596         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
3597                 if (!(data->has_fan_min & (1 << i)))
3598                         continue;
3599
3600                 nct6775_write_value(data, data->REG_FAN_MIN[i],
3601                                     data->fan_min[i]);
3602         }
3603
3604         for (i = 0; i < NUM_TEMP; i++) {
3605                 if (!(data->have_temp & (1 << i)))
3606                         continue;
3607
3608                 for (j = 1; j < ARRAY_SIZE(data->reg_temp); j++)
3609                         if (data->reg_temp[j][i])
3610                                 nct6775_write_temp(data, data->reg_temp[j][i],
3611                                                    data->temp[j][i]);
3612         }
3613
3614         /* Restore other settings */
3615         nct6775_write_value(data, data->REG_VBAT, data->vbat);
3616         if (sio_data->kind == nct6775) {
3617                 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
3618                 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
3619         }
3620
3621         /* Force re-reading all values */
3622         data->valid = false;
3623         mutex_unlock(&data->update_lock);
3624
3625         return 0;
3626 }
3627
3628 static const struct dev_pm_ops nct6775_dev_pm_ops = {
3629         .suspend = nct6775_suspend,
3630         .resume = nct6775_resume,
3631 };
3632
3633 #define NCT6775_DEV_PM_OPS      (&nct6775_dev_pm_ops)
3634 #else
3635 #define NCT6775_DEV_PM_OPS      NULL
3636 #endif /* CONFIG_PM */
3637
3638 static struct platform_driver nct6775_driver = {
3639         .driver = {
3640                 .owner  = THIS_MODULE,
3641                 .name   = DRVNAME,
3642                 .pm     = NCT6775_DEV_PM_OPS,
3643         },
3644         .probe          = nct6775_probe,
3645         .remove         = nct6775_remove,
3646 };
3647
3648 static const char *nct6775_sio_names[] __initconst = {
3649         "NCT6106D",
3650         "NCT6775F",
3651         "NCT6776D/F",
3652         "NCT6779D",
3653 };
3654
3655 /* nct6775_find() looks for a '627 in the Super-I/O config space */
3656 static int __init nct6775_find(int sioaddr, unsigned short *addr,
3657                                struct nct6775_sio_data *sio_data)
3658 {
3659         u16 val;
3660         int err;
3661
3662         err = superio_enter(sioaddr);
3663         if (err)
3664                 return err;
3665
3666         if (force_id)
3667                 val = force_id;
3668         else
3669                 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
3670                     | superio_inb(sioaddr, SIO_REG_DEVID + 1);
3671         switch (val & SIO_ID_MASK) {
3672         case SIO_NCT6106_ID:
3673                 sio_data->kind = nct6106;
3674                 break;
3675         case SIO_NCT6775_ID:
3676                 sio_data->kind = nct6775;
3677                 break;
3678         case SIO_NCT6776_ID:
3679                 sio_data->kind = nct6776;
3680                 break;
3681         case SIO_NCT6779_ID:
3682                 sio_data->kind = nct6779;
3683                 break;
3684         default:
3685                 if (val != 0xffff)
3686                         pr_debug("unsupported chip ID: 0x%04x\n", val);
3687                 superio_exit(sioaddr);
3688                 return -ENODEV;
3689         }
3690
3691         /* We have a known chip, find the HWM I/O address */
3692         superio_select(sioaddr, NCT6775_LD_HWM);
3693         val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
3694             | superio_inb(sioaddr, SIO_REG_ADDR + 1);
3695         *addr = val & IOREGION_ALIGNMENT;
3696         if (*addr == 0) {
3697                 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
3698                 superio_exit(sioaddr);
3699                 return -ENODEV;
3700         }
3701
3702         /* Activate logical device if needed */
3703         val = superio_inb(sioaddr, SIO_REG_ENABLE);
3704         if (!(val & 0x01)) {
3705                 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
3706                 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
3707         }
3708
3709         superio_exit(sioaddr);
3710         pr_info("Found %s or compatible chip at %#x:%#x\n",
3711                 nct6775_sio_names[sio_data->kind], sioaddr, *addr);
3712         sio_data->sioreg = sioaddr;
3713
3714         return 0;
3715 }
3716
3717 /*
3718  * when Super-I/O functions move to a separate file, the Super-I/O
3719  * bus will manage the lifetime of the device and this module will only keep
3720  * track of the nct6775 driver. But since we platform_device_alloc(), we
3721  * must keep track of the device
3722  */
3723 static struct platform_device *pdev[2];
3724
3725 static int __init sensors_nct6775_init(void)
3726 {
3727         int i, err;
3728         bool found = false;
3729         unsigned short address;
3730         struct resource res;
3731         struct nct6775_sio_data sio_data;
3732         int sioaddr[2] = { 0x2e, 0x4e };
3733
3734         err = platform_driver_register(&nct6775_driver);
3735         if (err)
3736                 return err;
3737
3738         /*
3739          * initialize sio_data->kind and sio_data->sioreg.
3740          *
3741          * when Super-I/O functions move to a separate file, the Super-I/O
3742          * driver will probe 0x2e and 0x4e and auto-detect the presence of a
3743          * nct6775 hardware monitor, and call probe()
3744          */
3745         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
3746                 if (nct6775_find(sioaddr[i], &address, &sio_data))
3747                         continue;
3748
3749                 found = true;
3750
3751                 pdev[i] = platform_device_alloc(DRVNAME, address);
3752                 if (!pdev[i]) {
3753                         err = -ENOMEM;
3754                         goto exit_device_put;
3755                 }
3756
3757                 err = platform_device_add_data(pdev[i], &sio_data,
3758                                                sizeof(struct nct6775_sio_data));
3759                 if (err)
3760                         goto exit_device_put;
3761
3762                 memset(&res, 0, sizeof(res));
3763                 res.name = DRVNAME;
3764                 res.start = address + IOREGION_OFFSET;
3765                 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
3766                 res.flags = IORESOURCE_IO;
3767
3768                 err = acpi_check_resource_conflict(&res);
3769                 if (err) {
3770                         platform_device_put(pdev[i]);
3771                         pdev[i] = NULL;
3772                         continue;
3773                 }
3774
3775                 err = platform_device_add_resources(pdev[i], &res, 1);
3776                 if (err)
3777                         goto exit_device_put;
3778
3779                 /* platform_device_add calls probe() */
3780                 err = platform_device_add(pdev[i]);
3781                 if (err)
3782                         goto exit_device_put;
3783         }
3784         if (!found) {
3785                 err = -ENODEV;
3786                 goto exit_unregister;
3787         }
3788
3789         return 0;
3790
3791 exit_device_put:
3792         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
3793                 if (pdev[i])
3794                         platform_device_put(pdev[i]);
3795         }
3796 exit_unregister:
3797         platform_driver_unregister(&nct6775_driver);
3798         return err;
3799 }
3800
3801 static void __exit sensors_nct6775_exit(void)
3802 {
3803         int i;
3804
3805         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
3806                 if (pdev[i])
3807                         platform_device_unregister(pdev[i]);
3808         }
3809         platform_driver_unregister(&nct6775_driver);
3810 }
3811
3812 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
3813 MODULE_DESCRIPTION("NCT6775F/NCT6776F/NCT6779D driver");
3814 MODULE_LICENSE("GPL");
3815
3816 module_init(sensors_nct6775_init);
3817 module_exit(sensors_nct6775_exit);