git.sur5r.net Git - groeck-nct6775/blob - nct6775.c

   1 /*
   2  * nct6775 - Driver for the hardware monitoring functionality of
   3  *             Nuvoton NCT677x Super-I/O chips
   4  *
   5  * Copyright (C) 2012  Guenter Roeck <linux@roeck-us.net>
   6  *
   7  * Derived from w83627ehf driver
   8  * Copyright (C) 2005-2012  Jean Delvare <jdelvare@suse.de>
   9  * Copyright (C) 2006  Yuan Mu (Winbond),
  10  *                     Rudolf Marek <r.marek@assembler.cz>
  11  *                     David Hubbard <david.c.hubbard@gmail.com>
  12  *                     Daniel J Blueman <daniel.blueman@gmail.com>
  13  * Copyright (C) 2010  Sheng-Yuan Huang (Nuvoton) (PS00)
  14  *
  15  * Shamelessly ripped from the w83627hf driver
  16  * Copyright (C) 2003  Mark Studebaker
  17  *
  18  * This program is free software; you can redistribute it and/or modify
  19  * it under the terms of the GNU General Public License as published by
  20  * the Free Software Foundation; either version 2 of the License, or
  21  * (at your option) any later version.
  22  *
  23  * This program is distributed in the hope that it will be useful,
  24  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26  * GNU General Public License for more details.
  27  *
  28  * You should have received a copy of the GNU General Public License
  29  * along with this program; if not, write to the Free Software
  30  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  31  *
  32  *
  33  * Supports the following chips:
  34  *
  35  * Chip        #vin    #fan    #pwm    #temp  chip IDs       man ID
  36  * nct6106d     9      3       3       6+3    0xc450 0xc1    0x5ca3
  37  * nct6775f     9      4       3       6+3    0xb470 0xc1    0x5ca3
  38  * nct6776f     9      5       3       6+3    0xc330 0xc1    0x5ca3
  39  * nct6779d    15      5       5       2+6    0xc560 0xc1    0x5ca3
  40  * nct6791d    15      6       6       2+6    0xc800 0xc1    0x5ca3
  41  * nct6792d    15      6       6       2+6    0xc910 0xc1    0x5ca3
  42  * nct6793d    15      6       6       2+6    0xd120 0xc1    0x5ca3
  43  * nct6795d    15?     6?      6?      2+6?   0xd350 0xc1    0x5ca3
  44  *
  45  * #temp lists the number of monitored temperature sources (first value) plus
  46  * the number of directly connectable temperature sensors (second value).
  47  */
  48
  49 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  50
  51 #include <linux/module.h>
  52 #include <linux/init.h>
  53 #include <linux/slab.h>
  54 #include <linux/jiffies.h>
  55 #include <linux/platform_device.h>
  56 #include <linux/hwmon.h>
  57 #include <linux/hwmon-sysfs.h>
  58 #include <linux/hwmon-vid.h>
  59 #include <linux/err.h>
  60 #include <linux/mutex.h>
  61 #include <linux/acpi.h>
  62 #include <linux/dmi.h>
  63 #include <linux/io.h>
  64 #include "lm75.h"
  65 #include "compat.h"
  66
  67 #define USE_ALTERNATE
  68
  69 enum kinds { nct6106, nct6775, nct6776, nct6779, nct6791, nct6792, nct6793,
  70              nct6795 };
  71
  72 /* used to set data->name = nct6775_device_names[data->sio_kind] */
  73 static const char * const nct6775_device_names[] = {
  74         "nct6106",
  75         "nct6775",
  76         "nct6776",
  77         "nct6779",
  78         "nct6791",
  79         "nct6792",
  80         "nct6793",
  81         "nct6795",
  82 };
  83
  84 static const char * const nct6775_sio_names[] __initconst = {
  85         "NCT6106D",
  86         "NCT6775F",
  87         "NCT6776D/F",
  88         "NCT6779D",
  89         "NCT6791D",
  90         "NCT6792D",
  91         "NCT6793D",
  92         "NCT6795D",
  93 };
  94
  95 static unsigned short force_id;
  96 module_param(force_id, ushort, 0);
  97 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  98
  99 static unsigned short fan_debounce;
 100 module_param(fan_debounce, ushort, 0);
 101 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
 102
 103 #define DRVNAME "nct6775"
 104
 105 /*
 106  * Super-I/O constants and functions
 107  */
 108
 109 #define NCT6775_LD_ACPI         0x0a
 110 #define NCT6775_LD_HWM          0x0b
 111 #define NCT6775_LD_VID          0x0d
 112
 113 #define SIO_REG_LDSEL           0x07    /* Logical device select */
 114 #define SIO_REG_DEVID           0x20    /* Device ID (2 bytes) */
 115 #define SIO_REG_ENABLE          0x30    /* Logical device enable */
 116 #define SIO_REG_ADDR            0x60    /* Logical device address (2 bytes) */
 117
 118 #define SIO_NCT6106_ID          0xc450
 119 #define SIO_NCT6775_ID          0xb470
 120 #define SIO_NCT6776_ID          0xc330
 121 #define SIO_NCT6779_ID          0xc560
 122 #define SIO_NCT6791_ID          0xc800
 123 #define SIO_NCT6792_ID          0xc910
 124 #define SIO_NCT6793_ID          0xd120
 125 #define SIO_NCT6795_ID          0xd350
 126 #define SIO_ID_MASK             0xFFF0
 127
 128 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
 129
 130 static inline void
 131 superio_outb(int ioreg, int reg, int val)
 132 {
 133         outb(reg, ioreg);
 134         outb(val, ioreg + 1);
 135 }
 136
 137 static inline int
 138 superio_inb(int ioreg, int reg)
 139 {
 140         outb(reg, ioreg);
 141         return inb(ioreg + 1);
 142 }
 143
 144 static inline void
 145 superio_select(int ioreg, int ld)
 146 {
 147         outb(SIO_REG_LDSEL, ioreg);
 148         outb(ld, ioreg + 1);
 149 }
 150
 151 static inline int
 152 superio_enter(int ioreg)
 153 {
 154         /*
 155          * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
 156          */
 157         if (!request_muxed_region(ioreg, 2, DRVNAME))
 158                 return -EBUSY;
 159
 160         outb(0x87, ioreg);
 161         outb(0x87, ioreg);
 162
 163         return 0;
 164 }
 165
 166 static inline void
 167 superio_exit(int ioreg)
 168 {
 169         outb(0xaa, ioreg);
 170         outb(0x02, ioreg);
 171         outb(0x02, ioreg + 1);
 172         release_region(ioreg, 2);
 173 }
 174
 175 /*
 176  * ISA constants
 177  */
 178
 179 #define IOREGION_ALIGNMENT      (~7)
 180 #define IOREGION_OFFSET         5
 181 #define IOREGION_LENGTH         2
 182 #define ADDR_REG_OFFSET         0
 183 #define DATA_REG_OFFSET         1
 184
 185 #define NCT6775_REG_BANK        0x4E
 186 #define NCT6775_REG_CONFIG      0x40
 187
 188 /*
 189  * Not currently used:
 190  * REG_MAN_ID has the value 0x5ca3 for all supported chips.
 191  * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
 192  * REG_MAN_ID is at port 0x4f
 193  * REG_CHIP_ID is at port 0x58
 194  */
 195
 196 #define NUM_TEMP        10      /* Max number of temp attribute sets w/ limits*/
 197 #define NUM_TEMP_FIXED  6       /* Max number of fixed temp attribute sets */
 198
 199 #define NUM_REG_ALARM   7       /* Max number of alarm registers */
 200 #define NUM_REG_BEEP    5       /* Max number of beep registers */
 201
 202 #define NUM_FAN         6
 203
 204 #define TEMP_SOURCE_VIRTUAL     0x1f
 205
 206 /* Common and NCT6775 specific data */
 207
 208 /* Voltage min/max registers for nr=7..14 are in bank 5 */
 209
 210 static const u16 NCT6775_REG_IN_MAX[] = {
 211         0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
 212         0x55c, 0x55e, 0x560, 0x562 };
 213 static const u16 NCT6775_REG_IN_MIN[] = {
 214         0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
 215         0x55d, 0x55f, 0x561, 0x563 };
 216 static const u16 NCT6775_REG_IN[] = {
 217         0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
 218 };
 219
 220 #define NCT6775_REG_VBAT                0x5D
 221 #define NCT6775_REG_DIODE               0x5E
 222 #define NCT6775_DIODE_MASK              0x02
 223
 224 #define NCT6775_REG_FANDIV1             0x506
 225 #define NCT6775_REG_FANDIV2             0x507
 226
 227 #define NCT6775_REG_CR_FAN_DEBOUNCE     0xf0
 228
 229 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
 230
 231 /* 0..15 voltages, 16..23 fans, 24..29 temperatures, 30..31 intrusion */
 232
 233 static const s8 NCT6775_ALARM_BITS[] = {
 234         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 235         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 236         -1,                             /* unused */
 237         6, 7, 11, -1, -1,               /* fan1..fan5 */
 238         -1, -1, -1,                     /* unused */
 239         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 240         12, -1 };                       /* intrusion0, intrusion1 */
 241
 242 #define FAN_ALARM_BASE          16
 243 #define TEMP_ALARM_BASE         24
 244 #define INTRUSION_ALARM_BASE    30
 245
 246 static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e };
 247
 248 /*
 249  * 0..14 voltages, 15 global beep enable, 16..23 fans, 24..29 temperatures,
 250  * 30..31 intrusion
 251  */
 252 static const s8 NCT6775_BEEP_BITS[] = {
 253         0, 1, 2, 3, 8, 9, 10, 16,       /* in0.. in7 */
 254         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 255         21,                             /* global beep enable */
 256         6, 7, 11, 28, -1,               /* fan1..fan5 */
 257         -1, -1, -1,                     /* unused */
 258         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 259         12, -1 };                       /* intrusion0, intrusion1 */
 260
 261 #define BEEP_ENABLE_BASE                15
 262
 263 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
 264 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
 265
 266 /* DC or PWM output fan configuration */
 267 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
 268 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
 269
 270 /* Advanced Fan control, some values are common for all fans */
 271
 272 static const u16 NCT6775_REG_TARGET[] = {
 273         0x101, 0x201, 0x301, 0x801, 0x901, 0xa01 };
 274 static const u16 NCT6775_REG_FAN_MODE[] = {
 275         0x102, 0x202, 0x302, 0x802, 0x902, 0xa02 };
 276 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
 277         0x103, 0x203, 0x303, 0x803, 0x903, 0xa03 };
 278 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
 279         0x104, 0x204, 0x304, 0x804, 0x904, 0xa04 };
 280 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
 281         0x105, 0x205, 0x305, 0x805, 0x905, 0xa05 };
 282 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = {
 283         0x106, 0x206, 0x306, 0x806, 0x906, 0xa06 };
 284 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
 285 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
 286
 287 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
 288         0x107, 0x207, 0x307, 0x807, 0x907, 0xa07 };
 289 static const u16 NCT6775_REG_PWM[] = {
 290         0x109, 0x209, 0x309, 0x809, 0x909, 0xa09 };
 291 static const u16 NCT6775_REG_PWM_READ[] = {
 292         0x01, 0x03, 0x11, 0x13, 0x15, 0xa09 };
 293
 294 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
 295 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
 296 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
 297 static const u16 NCT6775_FAN_PULSE_SHIFT[] = { 0, 0, 0, 0, 0, 0 };
 298
 299 static const u16 NCT6775_REG_TEMP[] = {
 300         0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
 301
 302 static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77 };
 303
 304 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 305         0, 0x152, 0x252, 0x628, 0x629, 0x62A };
 306 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 307         0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
 308 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 309         0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
 310
 311 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 312         0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
 313
 314 static const u16 NCT6775_REG_TEMP_SEL[] = {
 315         0x100, 0x200, 0x300, 0x800, 0x900, 0xa00 };
 316
 317 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
 318         0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 };
 319 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
 320         0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a };
 321 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
 322         0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b };
 323 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
 324         0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c };
 325 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
 326         0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d };
 327
 328 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
 329
 330 static const u16 NCT6775_REG_AUTO_TEMP[] = {
 331         0x121, 0x221, 0x321, 0x821, 0x921, 0xa21 };
 332 static const u16 NCT6775_REG_AUTO_PWM[] = {
 333         0x127, 0x227, 0x327, 0x827, 0x927, 0xa27 };
 334
 335 #define NCT6775_AUTO_TEMP(data, nr, p)  ((data)->REG_AUTO_TEMP[nr] + (p))
 336 #define NCT6775_AUTO_PWM(data, nr, p)   ((data)->REG_AUTO_PWM[nr] + (p))
 337
 338 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
 339
 340 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
 341         0x135, 0x235, 0x335, 0x835, 0x935, 0xa35 };
 342 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
 343         0x138, 0x238, 0x338, 0x838, 0x938, 0xa38 };
 344
 345 static const char *const nct6775_temp_label[] = {
 346         "",
 347         "SYSTIN",
 348         "CPUTIN",
 349         "AUXTIN",
 350         "AMD SB-TSI",
 351         "PECI Agent 0",
 352         "PECI Agent 1",
 353         "PECI Agent 2",
 354         "PECI Agent 3",
 355         "PECI Agent 4",
 356         "PECI Agent 5",
 357         "PECI Agent 6",
 358         "PECI Agent 7",
 359         "PCH_CHIP_CPU_MAX_TEMP",
 360         "PCH_CHIP_TEMP",
 361         "PCH_CPU_TEMP",
 362         "PCH_MCH_TEMP",
 363         "PCH_DIM0_TEMP",
 364         "PCH_DIM1_TEMP",
 365         "PCH_DIM2_TEMP",
 366         "PCH_DIM3_TEMP"
 367 };
 368
 369 #define NCT6775_TEMP_MASK       0x001ffffe
 370
 371 static const u16 NCT6775_REG_TEMP_ALTERNATE[32] = {
 372         [13] = 0x661,
 373         [14] = 0x662,
 374         [15] = 0x664,
 375 };
 376
 377 static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
 378         = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
 379             0xa07 };
 380
 381 /* NCT6776 specific data */
 382
 383 /* STEP_UP_TIME and STEP_DOWN_TIME regs are swapped for all chips but NCT6775 */
 384 #define NCT6776_REG_FAN_STEP_UP_TIME NCT6775_REG_FAN_STEP_DOWN_TIME
 385 #define NCT6776_REG_FAN_STEP_DOWN_TIME NCT6775_REG_FAN_STEP_UP_TIME
 386
 387 static const s8 NCT6776_ALARM_BITS[] = {
 388         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 389         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 390         -1,                             /* unused */
 391         6, 7, 11, 10, 23,               /* fan1..fan5 */
 392         -1, -1, -1,                     /* unused */
 393         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 394         12, 9 };                        /* intrusion0, intrusion1 */
 395
 396 static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5 };
 397
 398 static const s8 NCT6776_BEEP_BITS[] = {
 399         0, 1, 2, 3, 4, 5, 6, 7,         /* in0.. in7 */
 400         8, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 401         24,                             /* global beep enable */
 402         25, 26, 27, 28, 29,             /* fan1..fan5 */
 403         -1, -1, -1,                     /* unused */
 404         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 405         30, 31 };                       /* intrusion0, intrusion1 */
 406
 407 static const u16 NCT6776_REG_TOLERANCE_H[] = {
 408         0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c };
 409
 410 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0 };
 411 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0 };
 412
 413 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
 414 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
 415
 416 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
 417         0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e };
 418
 419 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 420         0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
 421
 422 static const char *const nct6776_temp_label[] = {
 423         "",
 424         "SYSTIN",
 425         "CPUTIN",
 426         "AUXTIN",
 427         "SMBUSMASTER 0",
 428         "SMBUSMASTER 1",
 429         "SMBUSMASTER 2",
 430         "SMBUSMASTER 3",
 431         "SMBUSMASTER 4",
 432         "SMBUSMASTER 5",
 433         "SMBUSMASTER 6",
 434         "SMBUSMASTER 7",
 435         "PECI Agent 0",
 436         "PECI Agent 1",
 437         "PCH_CHIP_CPU_MAX_TEMP",
 438         "PCH_CHIP_TEMP",
 439         "PCH_CPU_TEMP",
 440         "PCH_MCH_TEMP",
 441         "PCH_DIM0_TEMP",
 442         "PCH_DIM1_TEMP",
 443         "PCH_DIM2_TEMP",
 444         "PCH_DIM3_TEMP",
 445         "BYTE_TEMP"
 446 };
 447
 448 #define NCT6776_TEMP_MASK       0x007ffffe
 449
 450 static const u16 NCT6776_REG_TEMP_ALTERNATE[32] = {
 451         [14] = 0x401,
 452         [15] = 0x402,
 453         [16] = 0x404,
 454 };
 455
 456 static const u16 NCT6776_REG_TEMP_CRIT[32] = {
 457         [11] = 0x709,
 458         [12] = 0x70a,
 459 };
 460
 461 /* NCT6779 specific data */
 462
 463 static const u16 NCT6779_REG_IN[] = {
 464         0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
 465         0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
 466
 467 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
 468         0x459, 0x45A, 0x45B, 0x568 };
 469
 470 static const s8 NCT6779_ALARM_BITS[] = {
 471         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 472         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 473         -1,                             /* unused */
 474         6, 7, 11, 10, 23,               /* fan1..fan5 */
 475         -1, -1, -1,                     /* unused */
 476         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 477         12, 9 };                        /* intrusion0, intrusion1 */
 478
 479 static const s8 NCT6779_BEEP_BITS[] = {
 480         0, 1, 2, 3, 4, 5, 6, 7,         /* in0.. in7 */
 481         8, 9, 10, 11, 12, 13, 14,       /* in8..in14 */
 482         24,                             /* global beep enable */
 483         25, 26, 27, 28, 29,             /* fan1..fan5 */
 484         -1, -1, -1,                     /* unused */
 485         16, 17, -1, -1, -1, -1,         /* temp1..temp6 */
 486         30, 31 };                       /* intrusion0, intrusion1 */
 487
 488 static const u16 NCT6779_REG_FAN[] = {
 489         0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8, 0x4ba };
 490 static const u16 NCT6779_REG_FAN_PULSES[] = {
 491         0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
 492
 493 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
 494         0x136, 0x236, 0x336, 0x836, 0x936, 0xa36 };
 495 #define NCT6779_CRITICAL_PWM_ENABLE_MASK        0x01
 496 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
 497         0x137, 0x237, 0x337, 0x837, 0x937, 0xa37 };
 498
 499 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
 500 static const u16 NCT6779_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b };
 501 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 502         0x18, 0x152 };
 503 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 504         0x3a, 0x153 };
 505 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 506         0x39, 0x155 };
 507
 508 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
 509         0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
 510
 511 static const char *const nct6779_temp_label[] = {
 512         "",
 513         "SYSTIN",
 514         "CPUTIN",
 515         "AUXTIN0",
 516         "AUXTIN1",
 517         "AUXTIN2",
 518         "AUXTIN3",
 519         "",
 520         "SMBUSMASTER 0",
 521         "SMBUSMASTER 1",
 522         "SMBUSMASTER 2",
 523         "SMBUSMASTER 3",
 524         "SMBUSMASTER 4",
 525         "SMBUSMASTER 5",
 526         "SMBUSMASTER 6",
 527         "SMBUSMASTER 7",
 528         "PECI Agent 0",
 529         "PECI Agent 1",
 530         "PCH_CHIP_CPU_MAX_TEMP",
 531         "PCH_CHIP_TEMP",
 532         "PCH_CPU_TEMP",
 533         "PCH_MCH_TEMP",
 534         "PCH_DIM0_TEMP",
 535         "PCH_DIM1_TEMP",
 536         "PCH_DIM2_TEMP",
 537         "PCH_DIM3_TEMP",
 538         "BYTE_TEMP",
 539         "",
 540         "",
 541         "",
 542         "",
 543         "Virtual_TEMP"
 544 };
 545
 546 #define NCT6779_TEMP_MASK       0x07ffff7e
 547 #define NCT6791_TEMP_MASK       0x87ffff7e
 548
 549 static const u16 NCT6779_REG_TEMP_ALTERNATE[32]
 550         = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
 551             0, 0, 0, 0, 0, 0, 0, 0,
 552             0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
 553             0x408, 0 };
 554
 555 static const u16 NCT6779_REG_TEMP_CRIT[32] = {
 556         [15] = 0x709,
 557         [16] = 0x70a,
 558 };
 559
 560 /* NCT6791 specific data */
 561
 562 #define NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE     0x28
 563
 564 static const u16 NCT6791_REG_WEIGHT_TEMP_SEL[6] = { 0, 0x239 };
 565 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP[6] = { 0, 0x23a };
 566 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP_TOL[6] = { 0, 0x23b };
 567 static const u16 NCT6791_REG_WEIGHT_DUTY_STEP[6] = { 0, 0x23c };
 568 static const u16 NCT6791_REG_WEIGHT_TEMP_BASE[6] = { 0, 0x23d };
 569 static const u16 NCT6791_REG_WEIGHT_DUTY_BASE[6] = { 0, 0x23e };
 570
 571 static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = {
 572         0x459, 0x45A, 0x45B, 0x568, 0x45D };
 573
 574 static const s8 NCT6791_ALARM_BITS[] = {
 575         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 576         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 577         -1,                             /* unused */
 578         6, 7, 11, 10, 23, 33,           /* fan1..fan6 */
 579         -1, -1,                         /* unused */
 580         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 581         12, 9 };                        /* intrusion0, intrusion1 */
 582
 583 /* NCT6792/NCT6793 specific data */
 584
 585 static const u16 NCT6792_REG_TEMP_MON[] = {
 586         0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d };
 587 static const u16 NCT6792_REG_BEEP[NUM_REG_BEEP] = {
 588         0xb2, 0xb3, 0xb4, 0xb5, 0xbf };
 589
 590 static const char *const nct6792_temp_label[] = {
 591         "",
 592         "SYSTIN",
 593         "CPUTIN",
 594         "AUXTIN0",
 595         "AUXTIN1",
 596         "AUXTIN2",
 597         "AUXTIN3",
 598         "",
 599         "SMBUSMASTER 0",
 600         "SMBUSMASTER 1",
 601         "SMBUSMASTER 2",
 602         "SMBUSMASTER 3",
 603         "SMBUSMASTER 4",
 604         "SMBUSMASTER 5",
 605         "SMBUSMASTER 6",
 606         "SMBUSMASTER 7",
 607         "PECI Agent 0",
 608         "PECI Agent 1",
 609         "PCH_CHIP_CPU_MAX_TEMP",
 610         "PCH_CHIP_TEMP",
 611         "PCH_CPU_TEMP",
 612         "PCH_MCH_TEMP",
 613         "PCH_DIM0_TEMP",
 614         "PCH_DIM1_TEMP",
 615         "PCH_DIM2_TEMP",
 616         "PCH_DIM3_TEMP",
 617         "BYTE_TEMP",
 618         "PECI Agent 0 Calibration",
 619         "PECI Agent 1 Calibration",
 620         "",
 621         "",
 622         "Virtual_TEMP"
 623 };
 624
 625 #define NCT6792_TEMP_MASK       0x9fffff7e
 626
 627 static const char *const nct6793_temp_label[] = {
 628         "",
 629         "SYSTIN",
 630         "CPUTIN",
 631         "AUXTIN0",
 632         "AUXTIN1",
 633         "AUXTIN2",
 634         "AUXTIN3",
 635         "",
 636         "SMBUSMASTER 0",
 637         "SMBUSMASTER 1",
 638         "",
 639         "",
 640         "",
 641         "",
 642         "",
 643         "",
 644         "PECI Agent 0",
 645         "PECI Agent 1",
 646         "PCH_CHIP_CPU_MAX_TEMP",
 647         "PCH_CHIP_TEMP",
 648         "PCH_CPU_TEMP",
 649         "PCH_MCH_TEMP",
 650         "Agent0 Dimm0 ",
 651         "Agent0 Dimm1",
 652         "Agent1 Dimm0",
 653         "Agent1 Dimm1",
 654         "BYTE_TEMP0",
 655         "BYTE_TEMP1",
 656         "PECI Agent 0 Calibration",
 657         "PECI Agent 1 Calibration",
 658         "",
 659         "Virtual_TEMP"
 660 };
 661
 662 #define NCT6793_TEMP_MASK       0xbfff037e
 663 #define NCT6795_TEMP_MASK       0xbfff037e      /* probably incorrect */
 664
 665 /* NCT6102D/NCT6106D specific data */
 666
 667 #define NCT6106_REG_VBAT        0x318
 668 #define NCT6106_REG_DIODE       0x319
 669 #define NCT6106_DIODE_MASK      0x01
 670
 671 static const u16 NCT6106_REG_IN_MAX[] = {
 672         0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
 673 static const u16 NCT6106_REG_IN_MIN[] = {
 674         0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
 675 static const u16 NCT6106_REG_IN[] = {
 676         0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
 677
 678 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
 679 static const u16 NCT6106_REG_TEMP_MON[] = { 0x18, 0x19, 0x1a };
 680 static const u16 NCT6106_REG_TEMP_HYST[] = {
 681         0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
 682 static const u16 NCT6106_REG_TEMP_OVER[] = {
 683         0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
 684 static const u16 NCT6106_REG_TEMP_CRIT_L[] = {
 685         0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
 686 static const u16 NCT6106_REG_TEMP_CRIT_H[] = {
 687         0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
 688 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
 689 static const u16 NCT6106_REG_TEMP_CONFIG[] = {
 690         0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
 691
 692 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
 693 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
 694 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0, 0 };
 695 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4, 0, 0 };
 696
 697 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
 698 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
 699 static const u16 NCT6106_REG_PWM[] = { 0x119, 0x129, 0x139 };
 700 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c };
 701 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
 702 static const u16 NCT6106_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130 };
 703 static const u16 NCT6106_REG_TEMP_SOURCE[] = {
 704         0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
 705
 706 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
 707 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = {
 708         0x11b, 0x12b, 0x13b };
 709
 710 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
 711 #define NCT6106_CRITICAL_PWM_ENABLE_MASK        0x10
 712 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
 713
 714 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
 715 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
 716 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
 717 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
 718 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
 719 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
 720
 721 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
 722
 723 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
 724 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
 725 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
 726 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x17c };
 727 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
 728 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
 729
 730 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
 731 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
 732
 733 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = {
 734         0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
 735
 736 static const s8 NCT6106_ALARM_BITS[] = {
 737         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 738         9, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 739         -1,                             /* unused */
 740         32, 33, 34, -1, -1,             /* fan1..fan5 */
 741         -1, -1, -1,                     /* unused */
 742         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 743         48, -1                          /* intrusion0, intrusion1 */
 744 };
 745
 746 static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = {
 747         0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 };
 748
 749 static const s8 NCT6106_BEEP_BITS[] = {
 750         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 751         9, 10, 11, 12, -1, -1, -1,      /* in8..in14 */
 752         32,                             /* global beep enable */
 753         24, 25, 26, 27, 28,             /* fan1..fan5 */
 754         -1, -1, -1,                     /* unused */
 755         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 756         34, -1                          /* intrusion0, intrusion1 */
 757 };
 758
 759 static const u16 NCT6106_REG_TEMP_ALTERNATE[32] = {
 760         [14] = 0x51,
 761         [15] = 0x52,
 762         [16] = 0x54,
 763 };
 764
 765 static const u16 NCT6106_REG_TEMP_CRIT[32] = {
 766         [11] = 0x204,
 767         [12] = 0x205,
 768 };
 769
 770 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
 771 {
 772         if (mode == 0 && pwm == 255)
 773                 return off;
 774         return mode + 1;
 775 }
 776
 777 static int pwm_enable_to_reg(enum pwm_enable mode)
 778 {
 779         if (mode == off)
 780                 return 0;
 781         return mode - 1;
 782 }
 783
 784 /*
 785  * Conversions
 786  */
 787
 788 /* 1 is DC mode, output in ms */
 789 static unsigned int step_time_from_reg(u8 reg, u8 mode)
 790 {
 791         return mode ? 400 * reg : 100 * reg;
 792 }
 793
 794 static u8 step_time_to_reg(unsigned int msec, u8 mode)
 795 {
 796         return clamp_val((mode ? (msec + 200) / 400 :
 797                                         (msec + 50) / 100), 1, 255);
 798 }
 799
 800 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
 801 {
 802         if (reg == 0 || reg == 255)
 803                 return 0;
 804         return 1350000U / (reg << divreg);
 805 }
 806
 807 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
 808 {
 809         if ((reg & 0xff1f) == 0xff1f)
 810                 return 0;
 811
 812         reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
 813
 814         if (reg == 0)
 815                 return 0;
 816
 817         return 1350000U / reg;
 818 }
 819
 820 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
 821 {
 822         if (reg == 0 || reg == 0xffff)
 823                 return 0;
 824
 825         /*
 826          * Even though the registers are 16 bit wide, the fan divisor
 827          * still applies.
 828          */
 829         return 1350000U / (reg << divreg);
 830 }
 831
 832 static u16 fan_to_reg(u32 fan, unsigned int divreg)
 833 {
 834         if (!fan)
 835                 return 0;
 836
 837         return (1350000U / fan) >> divreg;
 838 }
 839
 840 static inline unsigned int
 841 div_from_reg(u8 reg)
 842 {
 843         return 1 << reg;
 844 }
 845
 846 /*
 847  * Some of the voltage inputs have internal scaling, the tables below
 848  * contain 8 (the ADC LSB in mV) * scaling factor * 100
 849  */
 850 static const u16 scale_in[15] = {
 851         800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
 852         800, 800
 853 };
 854
 855 static inline long in_from_reg(u8 reg, u8 nr)
 856 {
 857         return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
 858 }
 859
 860 static inline u8 in_to_reg(u32 val, u8 nr)
 861 {
 862         return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
 863 }
 864
 865 /*
 866  * Data structures and manipulation thereof
 867  */
 868
 869 struct nct6775_data {
 870         int addr;       /* IO base of hw monitor block */
 871         int sioreg;     /* SIO register address */
 872         enum kinds kind;
 873         const char *name;
 874
 875 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
 876         struct device *hwmon_dev;
 877 #endif
 878
 879         const struct attribute_group *groups[6];
 880
 881         u16 reg_temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 882                                     * 3=temp_crit, 4=temp_lcrit
 883                                     */
 884         u8 temp_src[NUM_TEMP];
 885         u16 reg_temp_config[NUM_TEMP];
 886         const char * const *temp_label;
 887         int temp_mask;
 888
 889         u16 REG_CONFIG;
 890         u16 REG_VBAT;
 891         u16 REG_DIODE;
 892         u8 DIODE_MASK;
 893
 894         const s8 *ALARM_BITS;
 895         const s8 *BEEP_BITS;
 896
 897         const u16 *REG_VIN;
 898         const u16 *REG_IN_MINMAX[2];
 899
 900         const u16 *REG_TARGET;
 901         const u16 *REG_FAN;
 902         const u16 *REG_FAN_MODE;
 903         const u16 *REG_FAN_MIN;
 904         const u16 *REG_FAN_PULSES;
 905         const u16 *FAN_PULSE_SHIFT;
 906         const u16 *REG_FAN_TIME[3];
 907
 908         const u16 *REG_TOLERANCE_H;
 909
 910         const u8 *REG_PWM_MODE;
 911         const u8 *PWM_MODE_MASK;
 912
 913         const u16 *REG_PWM[7];  /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 914                                  * [3]=pwm_max, [4]=pwm_step,
 915                                  * [5]=weight_duty_step, [6]=weight_duty_base
 916                                  */
 917         const u16 *REG_PWM_READ;
 918
 919         const u16 *REG_CRITICAL_PWM_ENABLE;
 920         u8 CRITICAL_PWM_ENABLE_MASK;
 921         const u16 *REG_CRITICAL_PWM;
 922
 923         const u16 *REG_AUTO_TEMP;
 924         const u16 *REG_AUTO_PWM;
 925
 926         const u16 *REG_CRITICAL_TEMP;
 927         const u16 *REG_CRITICAL_TEMP_TOLERANCE;
 928
 929         const u16 *REG_TEMP_SOURCE;     /* temp register sources */
 930         const u16 *REG_TEMP_SEL;
 931         const u16 *REG_WEIGHT_TEMP_SEL;
 932         const u16 *REG_WEIGHT_TEMP[3];  /* 0=base, 1=tolerance, 2=step */
 933
 934         const u16 *REG_TEMP_OFFSET;
 935
 936         const u16 *REG_ALARM;
 937         const u16 *REG_BEEP;
 938
 939         unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
 940         unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
 941
 942         struct mutex update_lock;
 943         bool valid;             /* true if following fields are valid */
 944         unsigned long last_updated;     /* In jiffies */
 945
 946         /* Register values */
 947         u8 bank;                /* current register bank */
 948         u8 in_num;              /* number of in inputs we have */
 949         u8 in[15][3];           /* [0]=in, [1]=in_max, [2]=in_min */
 950         unsigned int rpm[NUM_FAN];
 951         u16 fan_min[NUM_FAN];
 952         u8 fan_pulses[NUM_FAN];
 953         u8 fan_div[NUM_FAN];
 954         u8 has_pwm;
 955         u8 has_fan;             /* some fan inputs can be disabled */
 956         u8 has_fan_min;         /* some fans don't have min register */
 957         bool has_fan_div;
 958
 959         u8 num_temp_alarms;     /* 2, 3, or 6 */
 960         u8 num_temp_beeps;      /* 2, 3, or 6 */
 961         u8 temp_fixed_num;      /* 3 or 6 */
 962         u8 temp_type[NUM_TEMP_FIXED];
 963         s8 temp_offset[NUM_TEMP_FIXED];
 964         s16 temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 965                                 * 3=temp_crit, 4=temp_lcrit */
 966         u64 alarms;
 967         u64 beeps;
 968
 969         u8 pwm_num;     /* number of pwm */
 970         u8 pwm_mode[NUM_FAN];   /* 1->DC variable voltage,
 971                                  * 0->PWM variable duty cycle
 972                                  */
 973         enum pwm_enable pwm_enable[NUM_FAN];
 974                         /* 0->off
 975                          * 1->manual
 976                          * 2->thermal cruise mode (also called SmartFan I)
 977                          * 3->fan speed cruise mode
 978                          * 4->SmartFan III
 979                          * 5->enhanced variable thermal cruise (SmartFan IV)
 980                          */
 981         u8 pwm[7][NUM_FAN];     /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 982                                  * [3]=pwm_max, [4]=pwm_step,
 983                                  * [5]=weight_duty_step, [6]=weight_duty_base
 984                                  */
 985
 986         u8 target_temp[NUM_FAN];
 987         u8 target_temp_mask;
 988         u32 target_speed[NUM_FAN];
 989         u32 target_speed_tolerance[NUM_FAN];
 990         u8 speed_tolerance_limit;
 991
 992         u8 temp_tolerance[2][NUM_FAN];
 993         u8 tolerance_mask;
 994
 995         u8 fan_time[3][NUM_FAN]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
 996
 997         /* Automatic fan speed control registers */
 998         int auto_pwm_num;
 999         u8 auto_pwm[NUM_FAN][7];
1000         u8 auto_temp[NUM_FAN][7];
1001         u8 pwm_temp_sel[NUM_FAN];
1002         u8 pwm_weight_temp_sel[NUM_FAN];
1003         u8 weight_temp[3][NUM_FAN];     /* 0->temp_step, 1->temp_step_tol,
1004                                          * 2->temp_base
1005                                          */
1006
1007         u8 vid;
1008         u8 vrm;
1009
1010         bool have_vid;
1011
1012         u16 have_temp;
1013         u16 have_temp_fixed;
1014         u16 have_in;
1015
1016         /* Remember extra register values over suspend/resume */
1017         u8 vbat;
1018         u8 fandiv1;
1019         u8 fandiv2;
1020         u8 sio_reg_enable;
1021 };
1022
1023 struct nct6775_sio_data {
1024         int sioreg;
1025         enum kinds kind;
1026 };
1027
1028 struct sensor_device_template {
1029         struct device_attribute dev_attr;
1030         union {
1031                 struct {
1032                         u8 nr;
1033                         u8 index;
1034                 } s;
1035                 int index;
1036         } u;
1037         bool s2;        /* true if both index and nr are used */
1038 };
1039
1040 struct sensor_device_attr_u {
1041         union {
1042                 struct sensor_device_attribute a1;
1043                 struct sensor_device_attribute_2 a2;
1044         } u;
1045         char name[32];
1046 };
1047
1048 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) {      \
1049         .attr = {.name = _template, .mode = _mode },            \
1050         .show   = _show,                                        \
1051         .store  = _store,                                       \
1052 }
1053
1054 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \
1055         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
1056           .u.index = _index,                                            \
1057           .s2 = false }
1058
1059 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,       \
1060                                  _nr, _index)                           \
1061         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
1062           .u.s.index = _index,                                          \
1063           .u.s.nr = _nr,                                                \
1064           .s2 = true }
1065
1066 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
1067 static struct sensor_device_template sensor_dev_template_##_name        \
1068         = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store,       \
1069                                  _index)
1070
1071 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store,       \
1072                           _nr, _index)                                  \
1073 static struct sensor_device_template sensor_dev_template_##_name        \
1074         = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,     \
1075                                  _nr, _index)
1076
1077 struct sensor_template_group {
1078         struct sensor_device_template **templates;
1079         umode_t (*is_visible)(struct kobject *, struct attribute *, int);
1080         int base;
1081 };
1082
1083 static struct attribute_group *
1084 nct6775_create_attr_group(struct device *dev,
1085                           const struct sensor_template_group *tg,
1086                           int repeat)
1087 {
1088         struct attribute_group *group;
1089         struct sensor_device_attr_u *su;
1090         struct sensor_device_attribute *a;
1091         struct sensor_device_attribute_2 *a2;
1092         struct attribute **attrs;
1093         struct sensor_device_template **t;
1094         int i, count;
1095
1096         if (repeat <= 0)
1097                 return ERR_PTR(-EINVAL);
1098
1099         t = tg->templates;
1100         for (count = 0; *t; t++, count++)
1101                 ;
1102
1103         if (count == 0)
1104                 return ERR_PTR(-EINVAL);
1105
1106         group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
1107         if (group == NULL)
1108                 return ERR_PTR(-ENOMEM);
1109
1110         attrs = devm_kzalloc(dev, sizeof(*attrs) * (repeat * count + 1),
1111                              GFP_KERNEL);
1112         if (attrs == NULL)
1113                 return ERR_PTR(-ENOMEM);
1114
1115         su = devm_kzalloc(dev, sizeof(*su) * repeat * count,
1116                                GFP_KERNEL);
1117         if (su == NULL)
1118                 return ERR_PTR(-ENOMEM);
1119
1120         group->attrs = attrs;
1121         group->is_visible = tg->is_visible;
1122
1123         for (i = 0; i < repeat; i++) {
1124                 t = tg->templates;
1125                 while (*t != NULL) {
1126                         snprintf(su->name, sizeof(su->name),
1127                                  (*t)->dev_attr.attr.name, tg->base + i);
1128                         if ((*t)->s2) {
1129                                 a2 = &su->u.a2;
1130                                 sysfs_attr_init(&a2->dev_attr.attr);
1131                                 a2->dev_attr.attr.name = su->name;
1132                                 a2->nr = (*t)->u.s.nr + i;
1133                                 a2->index = (*t)->u.s.index;
1134                                 a2->dev_attr.attr.mode =
1135                                   (*t)->dev_attr.attr.mode;
1136                                 a2->dev_attr.show = (*t)->dev_attr.show;
1137                                 a2->dev_attr.store = (*t)->dev_attr.store;
1138                                 *attrs = &a2->dev_attr.attr;
1139                         } else {
1140                                 a = &su->u.a1;
1141                                 sysfs_attr_init(&a->dev_attr.attr);
1142                                 a->dev_attr.attr.name = su->name;
1143                                 a->index = (*t)->u.index + i;
1144                                 a->dev_attr.attr.mode =
1145                                   (*t)->dev_attr.attr.mode;
1146                                 a->dev_attr.show = (*t)->dev_attr.show;
1147                                 a->dev_attr.store = (*t)->dev_attr.store;
1148                                 *attrs = &a->dev_attr.attr;
1149                         }
1150                         attrs++;
1151                         su++;
1152                         t++;
1153                 }
1154         }
1155
1156         return group;
1157 }
1158
1159 static bool is_word_sized(struct nct6775_data *data, u16 reg)
1160 {
1161         switch (data->kind) {
1162         case nct6106:
1163                 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1164                   reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
1165                   reg == 0x111 || reg == 0x121 || reg == 0x131;
1166         case nct6775:
1167                 return (((reg & 0xff00) == 0x100 ||
1168                     (reg & 0xff00) == 0x200) &&
1169                    ((reg & 0x00ff) == 0x50 ||
1170                     (reg & 0x00ff) == 0x53 ||
1171                     (reg & 0x00ff) == 0x55)) ||
1172                   (reg & 0xfff0) == 0x630 ||
1173                   reg == 0x640 || reg == 0x642 ||
1174                   reg == 0x662 ||
1175                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1176                   reg == 0x73 || reg == 0x75 || reg == 0x77;
1177         case nct6776:
1178                 return (((reg & 0xff00) == 0x100 ||
1179                     (reg & 0xff00) == 0x200) &&
1180                    ((reg & 0x00ff) == 0x50 ||
1181                     (reg & 0x00ff) == 0x53 ||
1182                     (reg & 0x00ff) == 0x55)) ||
1183                   (reg & 0xfff0) == 0x630 ||
1184                   reg == 0x402 ||
1185                   reg == 0x640 || reg == 0x642 ||
1186                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1187                   reg == 0x73 || reg == 0x75 || reg == 0x77;
1188         case nct6779:
1189         case nct6791:
1190         case nct6792:
1191         case nct6793:
1192         case nct6795:
1193                 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
1194                   ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x0b) ||
1195                   reg == 0x402 ||
1196                   reg == 0x63a || reg == 0x63c || reg == 0x63e ||
1197                   reg == 0x640 || reg == 0x642 ||
1198                   reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
1199                   reg == 0x7b || reg == 0x7d;
1200         }
1201         return false;
1202 }
1203
1204 /*
1205  * On older chips, only registers 0x50-0x5f are banked.
1206  * On more recent chips, all registers are banked.
1207  * Assume that is the case and set the bank number for each access.
1208  * Cache the bank number so it only needs to be set if it changes.
1209  */
1210 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
1211 {
1212         u8 bank = reg >> 8;
1213
1214         if (data->bank != bank) {
1215                 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
1216                 outb_p(bank, data->addr + DATA_REG_OFFSET);
1217                 data->bank = bank;
1218         }
1219 }
1220
1221 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
1222 {
1223         int res, word_sized = is_word_sized(data, reg);
1224
1225         nct6775_set_bank(data, reg);
1226         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1227         res = inb_p(data->addr + DATA_REG_OFFSET);
1228         if (word_sized) {
1229                 outb_p((reg & 0xff) + 1,
1230                        data->addr + ADDR_REG_OFFSET);
1231                 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
1232         }
1233         return res;
1234 }
1235
1236 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
1237 {
1238         int word_sized = is_word_sized(data, reg);
1239
1240         nct6775_set_bank(data, reg);
1241         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1242         if (word_sized) {
1243                 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
1244                 outb_p((reg & 0xff) + 1,
1245                        data->addr + ADDR_REG_OFFSET);
1246         }
1247         outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
1248         return 0;
1249 }
1250
1251 /* We left-align 8-bit temperature values to make the code simpler */
1252 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
1253 {
1254         u16 res;
1255
1256         res = nct6775_read_value(data, reg);
1257         if (!is_word_sized(data, reg))
1258                 res <<= 8;
1259
1260         return res;
1261 }
1262
1263 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
1264 {
1265         if (!is_word_sized(data, reg))
1266                 value >>= 8;
1267         return nct6775_write_value(data, reg, value);
1268 }
1269
1270 /* This function assumes that the caller holds data->update_lock */
1271 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
1272 {
1273         u8 reg;
1274
1275         switch (nr) {
1276         case 0:
1277                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
1278                     | (data->fan_div[0] & 0x7);
1279                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1280                 break;
1281         case 1:
1282                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
1283                     | ((data->fan_div[1] << 4) & 0x70);
1284                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1285                 break;
1286         case 2:
1287                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
1288                     | (data->fan_div[2] & 0x7);
1289                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1290                 break;
1291         case 3:
1292                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
1293                     | ((data->fan_div[3] << 4) & 0x70);
1294                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1295                 break;
1296         }
1297 }
1298
1299 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
1300 {
1301         if (data->kind == nct6775)
1302                 nct6775_write_fan_div(data, nr);
1303 }
1304
1305 static void nct6775_update_fan_div(struct nct6775_data *data)
1306 {
1307         u8 i;
1308
1309         i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
1310         data->fan_div[0] = i & 0x7;
1311         data->fan_div[1] = (i & 0x70) >> 4;
1312         i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
1313         data->fan_div[2] = i & 0x7;
1314         if (data->has_fan & (1 << 3))
1315                 data->fan_div[3] = (i & 0x70) >> 4;
1316 }
1317
1318 static void nct6775_update_fan_div_common(struct nct6775_data *data)
1319 {
1320         if (data->kind == nct6775)
1321                 nct6775_update_fan_div(data);
1322 }
1323
1324 static void nct6775_init_fan_div(struct nct6775_data *data)
1325 {
1326         int i;
1327
1328         nct6775_update_fan_div_common(data);
1329         /*
1330          * For all fans, start with highest divider value if the divider
1331          * register is not initialized. This ensures that we get a
1332          * reading from the fan count register, even if it is not optimal.
1333          * We'll compute a better divider later on.
1334          */
1335         for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
1336                 if (!(data->has_fan & (1 << i)))
1337                         continue;
1338                 if (data->fan_div[i] == 0) {
1339                         data->fan_div[i] = 7;
1340                         nct6775_write_fan_div_common(data, i);
1341                 }
1342         }
1343 }
1344
1345 static void nct6775_init_fan_common(struct device *dev,
1346                                     struct nct6775_data *data)
1347 {
1348         int i;
1349         u8 reg;
1350
1351         if (data->has_fan_div)
1352                 nct6775_init_fan_div(data);
1353
1354         /*
1355          * If fan_min is not set (0), set it to 0xff to disable it. This
1356          * prevents the unnecessary warning when fanX_min is reported as 0.
1357          */
1358         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1359                 if (data->has_fan_min & (1 << i)) {
1360                         reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
1361                         if (!reg)
1362                                 nct6775_write_value(data, data->REG_FAN_MIN[i],
1363                                                     data->has_fan_div ? 0xff
1364                                                                       : 0xff1f);
1365                 }
1366         }
1367 }
1368
1369 static void nct6775_select_fan_div(struct device *dev,
1370                                    struct nct6775_data *data, int nr, u16 reg)
1371 {
1372         u8 fan_div = data->fan_div[nr];
1373         u16 fan_min;
1374
1375         if (!data->has_fan_div)
1376                 return;
1377
1378         /*
1379          * If we failed to measure the fan speed, or the reported value is not
1380          * in the optimal range, and the clock divider can be modified,
1381          * let's try that for next time.
1382          */
1383         if (reg == 0x00 && fan_div < 0x07)
1384                 fan_div++;
1385         else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1386                 fan_div--;
1387
1388         if (fan_div != data->fan_div[nr]) {
1389                 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1390                         nr + 1, div_from_reg(data->fan_div[nr]),
1391                         div_from_reg(fan_div));
1392
1393                 /* Preserve min limit if possible */
1394                 if (data->has_fan_min & (1 << nr)) {
1395                         fan_min = data->fan_min[nr];
1396                         if (fan_div > data->fan_div[nr]) {
1397                                 if (fan_min != 255 && fan_min > 1)
1398                                         fan_min >>= 1;
1399                         } else {
1400                                 if (fan_min != 255) {
1401                                         fan_min <<= 1;
1402                                         if (fan_min > 254)
1403                                                 fan_min = 254;
1404                                 }
1405                         }
1406                         if (fan_min != data->fan_min[nr]) {
1407                                 data->fan_min[nr] = fan_min;
1408                                 nct6775_write_value(data, data->REG_FAN_MIN[nr],
1409                                                     fan_min);
1410                         }
1411                 }
1412                 data->fan_div[nr] = fan_div;
1413                 nct6775_write_fan_div_common(data, nr);
1414         }
1415 }
1416
1417 static void nct6775_update_pwm(struct device *dev)
1418 {
1419         struct nct6775_data *data = dev_get_drvdata(dev);
1420         int i, j;
1421         int fanmodecfg, reg;
1422         bool duty_is_dc;
1423
1424         for (i = 0; i < data->pwm_num; i++) {
1425                 if (!(data->has_pwm & (1 << i)))
1426                         continue;
1427
1428                 duty_is_dc = data->REG_PWM_MODE[i] &&
1429                   (nct6775_read_value(data, data->REG_PWM_MODE[i])
1430                    & data->PWM_MODE_MASK[i]);
1431                 data->pwm_mode[i] = duty_is_dc;
1432
1433                 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
1434                 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1435                         if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1436                                 data->pwm[j][i]
1437                                   = nct6775_read_value(data,
1438                                                        data->REG_PWM[j][i]);
1439                         }
1440                 }
1441
1442                 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1443                                                         (fanmodecfg >> 4) & 7);
1444
1445                 if (!data->temp_tolerance[0][i] ||
1446                     data->pwm_enable[i] != speed_cruise)
1447                         data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1448                 if (!data->target_speed_tolerance[i] ||
1449                     data->pwm_enable[i] == speed_cruise) {
1450                         u8 t = fanmodecfg & 0x0f;
1451
1452                         if (data->REG_TOLERANCE_H) {
1453                                 t |= (nct6775_read_value(data,
1454                                       data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
1455                         }
1456                         data->target_speed_tolerance[i] = t;
1457                 }
1458
1459                 data->temp_tolerance[1][i] =
1460                         nct6775_read_value(data,
1461                                         data->REG_CRITICAL_TEMP_TOLERANCE[i]);
1462
1463                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
1464                 data->pwm_temp_sel[i] = reg & 0x1f;
1465                 /* If fan can stop, report floor as 0 */
1466                 if (reg & 0x80)
1467                         data->pwm[2][i] = 0;
1468
1469                 if (!data->REG_WEIGHT_TEMP_SEL[i])
1470                         continue;
1471
1472                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
1473                 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1474                 /* If weight is disabled, report weight source as 0 */
1475                 if (j == 1 && !(reg & 0x80))
1476                         data->pwm_weight_temp_sel[i] = 0;
1477
1478                 /* Weight temp data */
1479                 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
1480                         data->weight_temp[j][i]
1481                           = nct6775_read_value(data,
1482                                                data->REG_WEIGHT_TEMP[j][i]);
1483                 }
1484         }
1485 }
1486
1487 static void nct6775_update_pwm_limits(struct device *dev)
1488 {
1489         struct nct6775_data *data = dev_get_drvdata(dev);
1490         int i, j;
1491         u8 reg;
1492         u16 reg_t;
1493
1494         for (i = 0; i < data->pwm_num; i++) {
1495                 if (!(data->has_pwm & (1 << i)))
1496                         continue;
1497
1498                 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1499                         data->fan_time[j][i] =
1500                           nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1501                 }
1502
1503                 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1504                 /* Update only in matching mode or if never updated */
1505                 if (!data->target_temp[i] ||
1506                     data->pwm_enable[i] == thermal_cruise)
1507                         data->target_temp[i] = reg_t & data->target_temp_mask;
1508                 if (!data->target_speed[i] ||
1509                     data->pwm_enable[i] == speed_cruise) {
1510                         if (data->REG_TOLERANCE_H) {
1511                                 reg_t |= (nct6775_read_value(data,
1512                                         data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1513                         }
1514                         data->target_speed[i] = reg_t;
1515                 }
1516
1517                 for (j = 0; j < data->auto_pwm_num; j++) {
1518                         data->auto_pwm[i][j] =
1519                           nct6775_read_value(data,
1520                                              NCT6775_AUTO_PWM(data, i, j));
1521                         data->auto_temp[i][j] =
1522                           nct6775_read_value(data,
1523                                              NCT6775_AUTO_TEMP(data, i, j));
1524                 }
1525
1526                 /* critical auto_pwm temperature data */
1527                 data->auto_temp[i][data->auto_pwm_num] =
1528                         nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1529
1530                 switch (data->kind) {
1531                 case nct6775:
1532                         reg = nct6775_read_value(data,
1533                                                  NCT6775_REG_CRITICAL_ENAB[i]);
1534                         data->auto_pwm[i][data->auto_pwm_num] =
1535                                                 (reg & 0x02) ? 0xff : 0x00;
1536                         break;
1537                 case nct6776:
1538                         data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1539                         break;
1540                 case nct6106:
1541                 case nct6779:
1542                 case nct6791:
1543                 case nct6792:
1544                 case nct6793:
1545                 case nct6795:
1546                         reg = nct6775_read_value(data,
1547                                         data->REG_CRITICAL_PWM_ENABLE[i]);
1548                         if (reg & data->CRITICAL_PWM_ENABLE_MASK)
1549                                 reg = nct6775_read_value(data,
1550                                         data->REG_CRITICAL_PWM[i]);
1551                         else
1552                                 reg = 0xff;
1553                         data->auto_pwm[i][data->auto_pwm_num] = reg;
1554                         break;
1555                 }
1556         }
1557 }
1558
1559 static struct nct6775_data *nct6775_update_device(struct device *dev)
1560 {
1561         struct nct6775_data *data = dev_get_drvdata(dev);
1562         int i, j;
1563
1564         mutex_lock(&data->update_lock);
1565
1566         if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1567             || !data->valid) {
1568                 /* Fan clock dividers */
1569                 nct6775_update_fan_div_common(data);
1570
1571                 /* Measured voltages and limits */
1572                 for (i = 0; i < data->in_num; i++) {
1573                         if (!(data->have_in & (1 << i)))
1574                                 continue;
1575
1576                         data->in[i][0] = nct6775_read_value(data,
1577                                                             data->REG_VIN[i]);
1578                         data->in[i][1] = nct6775_read_value(data,
1579                                           data->REG_IN_MINMAX[0][i]);
1580                         data->in[i][2] = nct6775_read_value(data,
1581                                           data->REG_IN_MINMAX[1][i]);
1582                 }
1583
1584                 /* Measured fan speeds and limits */
1585                 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
1586                         u16 reg;
1587
1588                         if (!(data->has_fan & (1 << i)))
1589                                 continue;
1590
1591                         reg = nct6775_read_value(data, data->REG_FAN[i]);
1592                         data->rpm[i] = data->fan_from_reg(reg,
1593                                                           data->fan_div[i]);
1594
1595                         if (data->has_fan_min & (1 << i))
1596                                 data->fan_min[i] = nct6775_read_value(data,
1597                                            data->REG_FAN_MIN[i]);
1598                         data->fan_pulses[i] =
1599                           (nct6775_read_value(data, data->REG_FAN_PULSES[i])
1600                                 >> data->FAN_PULSE_SHIFT[i]) & 0x03;
1601
1602                         nct6775_select_fan_div(dev, data, i, reg);
1603                 }
1604
1605                 nct6775_update_pwm(dev);
1606                 nct6775_update_pwm_limits(dev);
1607
1608                 /* Measured temperatures and limits */
1609                 for (i = 0; i < NUM_TEMP; i++) {
1610                         if (!(data->have_temp & (1 << i)))
1611                                 continue;
1612                         for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1613                                 if (data->reg_temp[j][i])
1614                                         data->temp[j][i]
1615                                           = nct6775_read_temp(data,
1616                                                 data->reg_temp[j][i]);
1617                         }
1618                         if (i >= NUM_TEMP_FIXED ||
1619                             !(data->have_temp_fixed & (1 << i)))
1620                                 continue;
1621                         data->temp_offset[i]
1622                           = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1623                 }
1624
1625                 data->alarms = 0;
1626                 for (i = 0; i < NUM_REG_ALARM; i++) {
1627                         u8 alarm;
1628
1629                         if (!data->REG_ALARM[i])
1630                                 continue;
1631                         alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1632                         data->alarms |= ((u64)alarm) << (i << 3);
1633                 }
1634
1635                 data->beeps = 0;
1636                 for (i = 0; i < NUM_REG_BEEP; i++) {
1637                         u8 beep;
1638
1639                         if (!data->REG_BEEP[i])
1640                                 continue;
1641                         beep = nct6775_read_value(data, data->REG_BEEP[i]);
1642                         data->beeps |= ((u64)beep) << (i << 3);
1643                 }
1644
1645                 data->last_updated = jiffies;
1646                 data->valid = true;
1647         }
1648
1649         mutex_unlock(&data->update_lock);
1650         return data;
1651 }
1652
1653 /*
1654  * Sysfs callback functions
1655  */
1656 static ssize_t
1657 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1658 {
1659         struct nct6775_data *data = nct6775_update_device(dev);
1660         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1661         int index = sattr->index;
1662         int nr = sattr->nr;
1663
1664         return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1665 }
1666
1667 static ssize_t
1668 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1669              size_t count)
1670 {
1671         struct nct6775_data *data = dev_get_drvdata(dev);
1672         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1673         int index = sattr->index;
1674         int nr = sattr->nr;
1675         unsigned long val;
1676         int err;
1677
1678         err = kstrtoul(buf, 10, &val);
1679         if (err < 0)
1680                 return err;
1681         mutex_lock(&data->update_lock);
1682         data->in[nr][index] = in_to_reg(val, nr);
1683         nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr],
1684                             data->in[nr][index]);
1685         mutex_unlock(&data->update_lock);
1686         return count;
1687 }
1688
1689 static ssize_t
1690 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1691 {
1692         struct nct6775_data *data = nct6775_update_device(dev);
1693         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1694         int nr = data->ALARM_BITS[sattr->index];
1695
1696         return sprintf(buf, "%u\n",
1697                        (unsigned int)((data->alarms >> nr) & 0x01));
1698 }
1699
1700 static int find_temp_source(struct nct6775_data *data, int index, int count)
1701 {
1702         int source = data->temp_src[index];
1703         int nr;
1704
1705         for (nr = 0; nr < count; nr++) {
1706                 int src;
1707
1708                 src = nct6775_read_value(data,
1709                                          data->REG_TEMP_SOURCE[nr]) & 0x1f;
1710                 if (src == source)
1711                         return nr;
1712         }
1713         return -ENODEV;
1714 }
1715
1716 static ssize_t
1717 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1718 {
1719         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1720         struct nct6775_data *data = nct6775_update_device(dev);
1721         unsigned int alarm = 0;
1722         int nr;
1723
1724         /*
1725          * For temperatures, there is no fixed mapping from registers to alarm
1726          * bits. Alarm bits are determined by the temperature source mapping.
1727          */
1728         nr = find_temp_source(data, sattr->index, data->num_temp_alarms);
1729         if (nr >= 0) {
1730                 int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE];
1731
1732                 alarm = (data->alarms >> bit) & 0x01;
1733         }
1734         return sprintf(buf, "%u\n", alarm);
1735 }
1736
1737 static ssize_t
1738 show_beep(struct device *dev, struct device_attribute *attr, char *buf)
1739 {
1740         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1741         struct nct6775_data *data = nct6775_update_device(dev);
1742         int nr = data->BEEP_BITS[sattr->index];
1743
1744         return sprintf(buf, "%u\n",
1745                        (unsigned int)((data->beeps >> nr) & 0x01));
1746 }
1747
1748 static ssize_t
1749 store_beep(struct device *dev, struct device_attribute *attr, const char *buf,
1750            size_t count)
1751 {
1752         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1753         struct nct6775_data *data = dev_get_drvdata(dev);
1754         int nr = data->BEEP_BITS[sattr->index];
1755         int regindex = nr >> 3;
1756         unsigned long val;
1757         int err;
1758
1759         err = kstrtoul(buf, 10, &val);
1760         if (err < 0)
1761                 return err;
1762         if (val > 1)
1763                 return -EINVAL;
1764
1765         mutex_lock(&data->update_lock);
1766         if (val)
1767                 data->beeps |= (1ULL << nr);
1768         else
1769                 data->beeps &= ~(1ULL << nr);
1770         nct6775_write_value(data, data->REG_BEEP[regindex],
1771                             (data->beeps >> (regindex << 3)) & 0xff);
1772         mutex_unlock(&data->update_lock);
1773         return count;
1774 }
1775
1776 static ssize_t
1777 show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf)
1778 {
1779         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1780         struct nct6775_data *data = nct6775_update_device(dev);
1781         unsigned int beep = 0;
1782         int nr;
1783
1784         /*
1785          * For temperatures, there is no fixed mapping from registers to beep
1786          * enable bits. Beep enable bits are determined by the temperature
1787          * source mapping.
1788          */
1789         nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1790         if (nr >= 0) {
1791                 int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1792
1793                 beep = (data->beeps >> bit) & 0x01;
1794         }
1795         return sprintf(buf, "%u\n", beep);
1796 }
1797
1798 static ssize_t
1799 store_temp_beep(struct device *dev, struct device_attribute *attr,
1800                 const char *buf, size_t count)
1801 {
1802         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1803         struct nct6775_data *data = dev_get_drvdata(dev);
1804         int nr, bit, regindex;
1805         unsigned long val;
1806         int err;
1807
1808         err = kstrtoul(buf, 10, &val);
1809         if (err < 0)
1810                 return err;
1811         if (val > 1)
1812                 return -EINVAL;
1813
1814         nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1815         if (nr < 0)
1816                 return nr;
1817
1818         bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1819         regindex = bit >> 3;
1820
1821         mutex_lock(&data->update_lock);
1822         if (val)
1823                 data->beeps |= (1ULL << bit);
1824         else
1825                 data->beeps &= ~(1ULL << bit);
1826         nct6775_write_value(data, data->REG_BEEP[regindex],
1827                             (data->beeps >> (regindex << 3)) & 0xff);
1828         mutex_unlock(&data->update_lock);
1829
1830         return count;
1831 }
1832
1833 static umode_t nct6775_in_is_visible(struct kobject *kobj,
1834                                      struct attribute *attr, int index)
1835 {
1836         struct device *dev = container_of(kobj, struct device, kobj);
1837         struct nct6775_data *data = dev_get_drvdata(dev);
1838         int in = index / 5;     /* voltage index */
1839
1840         if (!(data->have_in & (1 << in)))
1841                 return 0;
1842
1843         return attr->mode;
1844 }
1845
1846 SENSOR_TEMPLATE_2(in_input, "in%d_input", S_IRUGO, show_in_reg, NULL, 0, 0);
1847 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", S_IRUGO, show_alarm, NULL, 0);
1848 SENSOR_TEMPLATE(in_beep, "in%d_beep", S_IWUSR | S_IRUGO, show_beep, store_beep,
1849                 0);
1850 SENSOR_TEMPLATE_2(in_min, "in%d_min", S_IWUSR | S_IRUGO, show_in_reg,
1851                   store_in_reg, 0, 1);
1852 SENSOR_TEMPLATE_2(in_max, "in%d_max", S_IWUSR | S_IRUGO, show_in_reg,
1853                   store_in_reg, 0, 2);
1854
1855 /*
1856  * nct6775_in_is_visible uses the index into the following array
1857  * to determine if attributes should be created or not.
1858  * Any change in order or content must be matched.
1859  */
1860 static struct sensor_device_template *nct6775_attributes_in_template[] = {
1861         &sensor_dev_template_in_input,
1862         &sensor_dev_template_in_alarm,
1863         &sensor_dev_template_in_beep,
1864         &sensor_dev_template_in_min,
1865         &sensor_dev_template_in_max,
1866         NULL
1867 };
1868
1869 static const struct sensor_template_group nct6775_in_template_group = {
1870         .templates = nct6775_attributes_in_template,
1871         .is_visible = nct6775_in_is_visible,
1872 };
1873
1874 static ssize_t
1875 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1876 {
1877         struct nct6775_data *data = nct6775_update_device(dev);
1878         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1879         int nr = sattr->index;
1880
1881         return sprintf(buf, "%d\n", data->rpm[nr]);
1882 }
1883
1884 static ssize_t
1885 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1886 {
1887         struct nct6775_data *data = nct6775_update_device(dev);
1888         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1889         int nr = sattr->index;
1890
1891         return sprintf(buf, "%d\n",
1892                        data->fan_from_reg_min(data->fan_min[nr],
1893                                               data->fan_div[nr]));
1894 }
1895
1896 static ssize_t
1897 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1898 {
1899         struct nct6775_data *data = nct6775_update_device(dev);
1900         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1901         int nr = sattr->index;
1902
1903         return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1904 }
1905
1906 static ssize_t
1907 store_fan_min(struct device *dev, struct device_attribute *attr,
1908               const char *buf, size_t count)
1909 {
1910         struct nct6775_data *data = dev_get_drvdata(dev);
1911         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1912         int nr = sattr->index;
1913         unsigned long val;
1914         unsigned int reg;
1915         u8 new_div;
1916         int err;
1917
1918         err = kstrtoul(buf, 10, &val);
1919         if (err < 0)
1920                 return err;
1921
1922         mutex_lock(&data->update_lock);
1923         if (!data->has_fan_div) {
1924                 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1925                 if (!val) {
1926                         val = 0xff1f;
1927                 } else {
1928                         if (val > 1350000U)
1929                                 val = 135000U;
1930                         val = 1350000U / val;
1931                         val = (val & 0x1f) | ((val << 3) & 0xff00);
1932                 }
1933                 data->fan_min[nr] = val;
1934                 goto write_min; /* Leave fan divider alone */
1935         }
1936         if (!val) {
1937                 /* No min limit, alarm disabled */
1938                 data->fan_min[nr] = 255;
1939                 new_div = data->fan_div[nr]; /* No change */
1940                 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1941                 goto write_div;
1942         }
1943         reg = 1350000U / val;
1944         if (reg >= 128 * 255) {
1945                 /*
1946                  * Speed below this value cannot possibly be represented,
1947                  * even with the highest divider (128)
1948                  */
1949                 data->fan_min[nr] = 254;
1950                 new_div = 7; /* 128 == (1 << 7) */
1951                 dev_warn(dev,
1952                          "fan%u low limit %lu below minimum %u, set to minimum\n",
1953                          nr + 1, val, data->fan_from_reg_min(254, 7));
1954         } else if (!reg) {
1955                 /*
1956                  * Speed above this value cannot possibly be represented,
1957                  * even with the lowest divider (1)
1958                  */
1959                 data->fan_min[nr] = 1;
1960                 new_div = 0; /* 1 == (1 << 0) */
1961                 dev_warn(dev,
1962                          "fan%u low limit %lu above maximum %u, set to maximum\n",
1963                          nr + 1, val, data->fan_from_reg_min(1, 0));
1964         } else {
1965                 /*
1966                  * Automatically pick the best divider, i.e. the one such
1967                  * that the min limit will correspond to a register value
1968                  * in the 96..192 range
1969                  */
1970                 new_div = 0;
1971                 while (reg > 192 && new_div < 7) {
1972                         reg >>= 1;
1973                         new_div++;
1974                 }
1975                 data->fan_min[nr] = reg;
1976         }
1977
1978 write_div:
1979         /*
1980          * Write both the fan clock divider (if it changed) and the new
1981          * fan min (unconditionally)
1982          */
1983         if (new_div != data->fan_div[nr]) {
1984                 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1985                         nr + 1, div_from_reg(data->fan_div[nr]),
1986                         div_from_reg(new_div));
1987                 data->fan_div[nr] = new_div;
1988                 nct6775_write_fan_div_common(data, nr);
1989                 /* Give the chip time to sample a new speed value */
1990                 data->last_updated = jiffies;
1991         }
1992
1993 write_min:
1994         nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1995         mutex_unlock(&data->update_lock);
1996
1997         return count;
1998 }
1999
2000 static ssize_t
2001 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
2002 {
2003         struct nct6775_data *data = nct6775_update_device(dev);
2004         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2005         int p = data->fan_pulses[sattr->index];
2006
2007         return sprintf(buf, "%d\n", p ? : 4);
2008 }
2009
2010 static ssize_t
2011 store_fan_pulses(struct device *dev, struct device_attribute *attr,
2012                  const char *buf, size_t count)
2013 {
2014         struct nct6775_data *data = dev_get_drvdata(dev);
2015         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2016         int nr = sattr->index;
2017         unsigned long val;
2018         int err;
2019         u8 reg;
2020
2021         err = kstrtoul(buf, 10, &val);
2022         if (err < 0)
2023                 return err;
2024
2025         if (val > 4)
2026                 return -EINVAL;
2027
2028         mutex_lock(&data->update_lock);
2029         data->fan_pulses[nr] = val & 3;
2030         reg = nct6775_read_value(data, data->REG_FAN_PULSES[nr]);
2031         reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
2032         reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
2033         nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
2034         mutex_unlock(&data->update_lock);
2035
2036         return count;
2037 }
2038
2039 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
2040                                       struct attribute *attr, int index)
2041 {
2042         struct device *dev = container_of(kobj, struct device, kobj);
2043         struct nct6775_data *data = dev_get_drvdata(dev);
2044         int fan = index / 6;    /* fan index */
2045         int nr = index % 6;     /* attribute index */
2046
2047         if (!(data->has_fan & (1 << fan)))
2048                 return 0;
2049
2050         if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1)
2051                 return 0;
2052         if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1)
2053                 return 0;
2054         if (nr == 4 && !(data->has_fan_min & (1 << fan)))
2055                 return 0;
2056         if (nr == 5 && data->kind != nct6775)
2057                 return 0;
2058
2059         return attr->mode;
2060 }
2061
2062 SENSOR_TEMPLATE(fan_input, "fan%d_input", S_IRUGO, show_fan, NULL, 0);
2063 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", S_IRUGO, show_alarm, NULL,
2064                 FAN_ALARM_BASE);
2065 SENSOR_TEMPLATE(fan_beep, "fan%d_beep", S_IWUSR | S_IRUGO, show_beep,
2066                 store_beep, FAN_ALARM_BASE);
2067 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", S_IWUSR | S_IRUGO, show_fan_pulses,
2068                 store_fan_pulses, 0);
2069 SENSOR_TEMPLATE(fan_min, "fan%d_min", S_IWUSR | S_IRUGO, show_fan_min,
2070                 store_fan_min, 0);
2071 SENSOR_TEMPLATE(fan_div, "fan%d_div", S_IRUGO, show_fan_div, NULL, 0);
2072
2073 /*
2074  * nct6775_fan_is_visible uses the index into the following array
2075  * to determine if attributes should be created or not.
2076  * Any change in order or content must be matched.
2077  */
2078 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
2079         &sensor_dev_template_fan_input,
2080         &sensor_dev_template_fan_alarm, /* 1 */
2081         &sensor_dev_template_fan_beep,  /* 2 */
2082         &sensor_dev_template_fan_pulses,
2083         &sensor_dev_template_fan_min,   /* 4 */
2084         &sensor_dev_template_fan_div,   /* 5 */
2085         NULL
2086 };
2087
2088 static const struct sensor_template_group nct6775_fan_template_group = {
2089         .templates = nct6775_attributes_fan_template,
2090         .is_visible = nct6775_fan_is_visible,
2091         .base = 1,
2092 };
2093
2094 static ssize_t
2095 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
2096 {
2097         struct nct6775_data *data = nct6775_update_device(dev);
2098         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2099         int nr = sattr->index;
2100
2101         return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
2102 }
2103
2104 static ssize_t
2105 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
2106 {
2107         struct nct6775_data *data = nct6775_update_device(dev);
2108         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2109         int nr = sattr->nr;
2110         int index = sattr->index;
2111
2112         return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
2113 }
2114
2115 static ssize_t
2116 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
2117            size_t count)
2118 {
2119         struct nct6775_data *data = dev_get_drvdata(dev);
2120         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2121         int nr = sattr->nr;
2122         int index = sattr->index;
2123         int err;
2124         long val;
2125
2126         err = kstrtol(buf, 10, &val);
2127         if (err < 0)
2128                 return err;
2129
2130         mutex_lock(&data->update_lock);
2131         data->temp[index][nr] = LM75_TEMP_TO_REG(val);
2132         nct6775_write_temp(data, data->reg_temp[index][nr],
2133                            data->temp[index][nr]);
2134         mutex_unlock(&data->update_lock);
2135         return count;
2136 }
2137
2138 static ssize_t
2139 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
2140 {
2141         struct nct6775_data *data = nct6775_update_device(dev);
2142         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2143
2144         return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
2145 }
2146
2147 static ssize_t
2148 store_temp_offset(struct device *dev, struct device_attribute *attr,
2149                   const char *buf, size_t count)
2150 {
2151         struct nct6775_data *data = dev_get_drvdata(dev);
2152         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2153         int nr = sattr->index;
2154         long val;
2155         int err;
2156
2157         err = kstrtol(buf, 10, &val);
2158         if (err < 0)
2159                 return err;
2160
2161         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
2162
2163         mutex_lock(&data->update_lock);
2164         data->temp_offset[nr] = val;
2165         nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
2166         mutex_unlock(&data->update_lock);
2167
2168         return count;
2169 }
2170
2171 static ssize_t
2172 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
2173 {
2174         struct nct6775_data *data = nct6775_update_device(dev);
2175         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2176         int nr = sattr->index;
2177
2178         return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
2179 }
2180
2181 static ssize_t
2182 store_temp_type(struct device *dev, struct device_attribute *attr,
2183                 const char *buf, size_t count)
2184 {
2185         struct nct6775_data *data = nct6775_update_device(dev);
2186         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2187         int nr = sattr->index;
2188         unsigned long val;
2189         int err;
2190         u8 vbat, diode, vbit, dbit;
2191
2192         err = kstrtoul(buf, 10, &val);
2193         if (err < 0)
2194                 return err;
2195
2196         if (val != 1 && val != 3 && val != 4)
2197                 return -EINVAL;
2198
2199         mutex_lock(&data->update_lock);
2200
2201         data->temp_type[nr] = val;
2202         vbit = 0x02 << nr;
2203         dbit = data->DIODE_MASK << nr;
2204         vbat = nct6775_read_value(data, data->REG_VBAT) & ~vbit;
2205         diode = nct6775_read_value(data, data->REG_DIODE) & ~dbit;
2206         switch (val) {
2207         case 1: /* CPU diode (diode, current mode) */
2208                 vbat |= vbit;
2209                 diode |= dbit;
2210                 break;
2211         case 3: /* diode, voltage mode */
2212                 vbat |= dbit;
2213                 break;
2214         case 4: /* thermistor */
2215                 break;
2216         }
2217         nct6775_write_value(data, data->REG_VBAT, vbat);
2218         nct6775_write_value(data, data->REG_DIODE, diode);
2219
2220         mutex_unlock(&data->update_lock);
2221         return count;
2222 }
2223
2224 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
2225                                        struct attribute *attr, int index)
2226 {
2227         struct device *dev = container_of(kobj, struct device, kobj);
2228         struct nct6775_data *data = dev_get_drvdata(dev);
2229         int temp = index / 10;  /* temp index */
2230         int nr = index % 10;    /* attribute index */
2231
2232         if (!(data->have_temp & (1 << temp)))
2233                 return 0;
2234
2235         if (nr == 1 && !data->temp_label)
2236                 return 0;
2237
2238         if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0)
2239                 return 0;                               /* alarm */
2240
2241         if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0)
2242                 return 0;                               /* beep */
2243
2244         if (nr == 4 && !data->reg_temp[1][temp])        /* max */
2245                 return 0;
2246
2247         if (nr == 5 && !data->reg_temp[2][temp])        /* max_hyst */
2248                 return 0;
2249
2250         if (nr == 6 && !data->reg_temp[3][temp])        /* crit */
2251                 return 0;
2252
2253         if (nr == 7 && !data->reg_temp[4][temp])        /* lcrit */
2254                 return 0;
2255
2256         /* offset and type only apply to fixed sensors */
2257         if (nr > 7 && !(data->have_temp_fixed & (1 << temp)))
2258                 return 0;
2259
2260         return attr->mode;
2261 }
2262
2263 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", S_IRUGO, show_temp, NULL, 0, 0);
2264 SENSOR_TEMPLATE(temp_label, "temp%d_label", S_IRUGO, show_temp_label, NULL, 0);
2265 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", S_IRUGO | S_IWUSR, show_temp,
2266                   store_temp, 0, 1);
2267 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", S_IRUGO | S_IWUSR,
2268                   show_temp, store_temp, 0, 2);
2269 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", S_IRUGO | S_IWUSR, show_temp,
2270                   store_temp, 0, 3);
2271 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", S_IRUGO | S_IWUSR, show_temp,
2272                   store_temp, 0, 4);
2273 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", S_IRUGO | S_IWUSR,
2274                 show_temp_offset, store_temp_offset, 0);
2275 SENSOR_TEMPLATE(temp_type, "temp%d_type", S_IRUGO | S_IWUSR, show_temp_type,
2276                 store_temp_type, 0);
2277 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", S_IRUGO, show_temp_alarm, NULL, 0);
2278 SENSOR_TEMPLATE(temp_beep, "temp%d_beep", S_IRUGO | S_IWUSR, show_temp_beep,
2279                 store_temp_beep, 0);
2280
2281 /*
2282  * nct6775_temp_is_visible uses the index into the following array
2283  * to determine if attributes should be created or not.
2284  * Any change in order or content must be matched.
2285  */
2286 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
2287         &sensor_dev_template_temp_input,
2288         &sensor_dev_template_temp_label,
2289         &sensor_dev_template_temp_alarm,        /* 2 */
2290         &sensor_dev_template_temp_beep,         /* 3 */
2291         &sensor_dev_template_temp_max,          /* 4 */
2292         &sensor_dev_template_temp_max_hyst,     /* 5 */
2293         &sensor_dev_template_temp_crit,         /* 6 */
2294         &sensor_dev_template_temp_lcrit,        /* 7 */
2295         &sensor_dev_template_temp_offset,       /* 8 */
2296         &sensor_dev_template_temp_type,         /* 9 */
2297         NULL
2298 };
2299
2300 static const struct sensor_template_group nct6775_temp_template_group = {
2301         .templates = nct6775_attributes_temp_template,
2302         .is_visible = nct6775_temp_is_visible,
2303         .base = 1,
2304 };
2305
2306 static ssize_t
2307 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
2308 {
2309         struct nct6775_data *data = nct6775_update_device(dev);
2310         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2311
2312         return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
2313 }
2314
2315 static ssize_t
2316 store_pwm_mode(struct device *dev, struct device_attribute *attr,
2317                const char *buf, size_t count)
2318 {
2319         struct nct6775_data *data = dev_get_drvdata(dev);
2320         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2321         int nr = sattr->index;
2322         unsigned long val;
2323         int err;
2324         u8 reg;
2325
2326         err = kstrtoul(buf, 10, &val);
2327         if (err < 0)
2328                 return err;
2329
2330         if (val > 1)
2331                 return -EINVAL;
2332
2333         /* Setting DC mode is not supported for all chips/channels */
2334         if (data->REG_PWM_MODE[nr] == 0) {
2335                 if (val)
2336                         return -EINVAL;
2337                 return count;
2338         }
2339
2340         mutex_lock(&data->update_lock);
2341         data->pwm_mode[nr] = val;
2342         reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
2343         reg &= ~data->PWM_MODE_MASK[nr];
2344         if (val)
2345                 reg |= data->PWM_MODE_MASK[nr];
2346         nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
2347         mutex_unlock(&data->update_lock);
2348         return count;
2349 }
2350
2351 static ssize_t
2352 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2353 {
2354         struct nct6775_data *data = nct6775_update_device(dev);
2355         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2356         int nr = sattr->nr;
2357         int index = sattr->index;
2358         int pwm;
2359
2360         /*
2361          * For automatic fan control modes, show current pwm readings.
2362          * Otherwise, show the configured value.
2363          */
2364         if (index == 0 && data->pwm_enable[nr] > manual)
2365                 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
2366         else
2367                 pwm = data->pwm[index][nr];
2368
2369         return sprintf(buf, "%d\n", pwm);
2370 }
2371
2372 static ssize_t
2373 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
2374           size_t count)
2375 {
2376         struct nct6775_data *data = dev_get_drvdata(dev);
2377         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2378         int nr = sattr->nr;
2379         int index = sattr->index;
2380         unsigned long val;
2381         int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
2382         int maxval[7]
2383           = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
2384         int err;
2385         u8 reg;
2386
2387         err = kstrtoul(buf, 10, &val);
2388         if (err < 0)
2389                 return err;
2390         val = clamp_val(val, minval[index], maxval[index]);
2391
2392         mutex_lock(&data->update_lock);
2393         data->pwm[index][nr] = val;
2394         nct6775_write_value(data, data->REG_PWM[index][nr], val);
2395         if (index == 2) { /* floor: disable if val == 0 */
2396                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2397                 reg &= 0x7f;
2398                 if (val)
2399                         reg |= 0x80;
2400                 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2401         }
2402         mutex_unlock(&data->update_lock);
2403         return count;
2404 }
2405
2406 /* Returns 0 if OK, -EINVAL otherwise */
2407 static int check_trip_points(struct nct6775_data *data, int nr)
2408 {
2409         int i;
2410
2411         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2412                 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
2413                         return -EINVAL;
2414         }
2415         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2416                 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
2417                         return -EINVAL;
2418         }
2419         /* validate critical temperature and pwm if enabled (pwm > 0) */
2420         if (data->auto_pwm[nr][data->auto_pwm_num]) {
2421                 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2422                                 data->auto_temp[nr][data->auto_pwm_num] ||
2423                     data->auto_pwm[nr][data->auto_pwm_num - 1] >
2424                                 data->auto_pwm[nr][data->auto_pwm_num])
2425                         return -EINVAL;
2426         }
2427         return 0;
2428 }
2429
2430 static void pwm_update_registers(struct nct6775_data *data, int nr)
2431 {
2432         u8 reg;
2433
2434         switch (data->pwm_enable[nr]) {
2435         case off:
2436         case manual:
2437                 break;
2438         case speed_cruise:
2439                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2440                 reg = (reg & ~data->tolerance_mask) |
2441                   (data->target_speed_tolerance[nr] & data->tolerance_mask);
2442                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2443                 nct6775_write_value(data, data->REG_TARGET[nr],
2444                                     data->target_speed[nr] & 0xff);
2445                 if (data->REG_TOLERANCE_H) {
2446                         reg = (data->target_speed[nr] >> 8) & 0x0f;
2447                         reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2448                         nct6775_write_value(data,
2449                                             data->REG_TOLERANCE_H[nr],
2450                                             reg);
2451                 }
2452                 break;
2453         case thermal_cruise:
2454                 nct6775_write_value(data, data->REG_TARGET[nr],
2455                                     data->target_temp[nr]);
2456                 /* intentional */
2457         default:
2458                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2459                 reg = (reg & ~data->tolerance_mask) |
2460                   data->temp_tolerance[0][nr];
2461                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2462                 break;
2463         }
2464 }
2465
2466 static ssize_t
2467 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2468 {
2469         struct nct6775_data *data = nct6775_update_device(dev);
2470         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2471
2472         return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2473 }
2474
2475 static ssize_t
2476 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2477                  const char *buf, size_t count)
2478 {
2479         struct nct6775_data *data = dev_get_drvdata(dev);
2480         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2481         int nr = sattr->index;
2482         unsigned long val;
2483         int err;
2484         u16 reg;
2485
2486         err = kstrtoul(buf, 10, &val);
2487         if (err < 0)
2488                 return err;
2489
2490         if (val > sf4)
2491                 return -EINVAL;
2492
2493         if (val == sf3 && data->kind != nct6775)
2494                 return -EINVAL;
2495
2496         if (val == sf4 && check_trip_points(data, nr)) {
2497                 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2498                 dev_err(dev, "Adjust trip points and try again\n");
2499                 return -EINVAL;
2500         }
2501
2502         mutex_lock(&data->update_lock);
2503         data->pwm_enable[nr] = val;
2504         if (val == off) {
2505                 /*
2506                  * turn off pwm control: select manual mode, set pwm to maximum
2507                  */
2508                 data->pwm[0][nr] = 255;
2509                 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2510         }
2511         pwm_update_registers(data, nr);
2512         reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2513         reg &= 0x0f;
2514         reg |= pwm_enable_to_reg(val) << 4;
2515         nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2516         mutex_unlock(&data->update_lock);
2517         return count;
2518 }
2519
2520 static ssize_t
2521 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2522 {
2523         int i, sel = 0;
2524
2525         for (i = 0; i < NUM_TEMP; i++) {
2526                 if (!(data->have_temp & (1 << i)))
2527                         continue;
2528                 if (src == data->temp_src[i]) {
2529                         sel = i + 1;
2530                         break;
2531                 }
2532         }
2533
2534         return sprintf(buf, "%d\n", sel);
2535 }
2536
2537 static ssize_t
2538 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2539 {
2540         struct nct6775_data *data = nct6775_update_device(dev);
2541         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2542         int index = sattr->index;
2543
2544         return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2545 }
2546
2547 static ssize_t
2548 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2549                    const char *buf, size_t count)
2550 {
2551         struct nct6775_data *data = nct6775_update_device(dev);
2552         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2553         int nr = sattr->index;
2554         unsigned long val;
2555         int err, reg, src;
2556
2557         err = kstrtoul(buf, 10, &val);
2558         if (err < 0)
2559                 return err;
2560         if (val == 0 || val > NUM_TEMP)
2561                 return -EINVAL;
2562         if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
2563                 return -EINVAL;
2564
2565         mutex_lock(&data->update_lock);
2566         src = data->temp_src[val - 1];
2567         data->pwm_temp_sel[nr] = src;
2568         reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2569         reg &= 0xe0;
2570         reg |= src;
2571         nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2572         mutex_unlock(&data->update_lock);
2573
2574         return count;
2575 }
2576
2577 static ssize_t
2578 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2579                          char *buf)
2580 {
2581         struct nct6775_data *data = nct6775_update_device(dev);
2582         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2583         int index = sattr->index;
2584
2585         return show_pwm_temp_sel_common(data, buf,
2586                                         data->pwm_weight_temp_sel[index]);
2587 }
2588
2589 static ssize_t
2590 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2591                           const char *buf, size_t count)
2592 {
2593         struct nct6775_data *data = nct6775_update_device(dev);
2594         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2595         int nr = sattr->index;
2596         unsigned long val;
2597         int err, reg, src;
2598
2599         err = kstrtoul(buf, 10, &val);
2600         if (err < 0)
2601                 return err;
2602         if (val > NUM_TEMP)
2603                 return -EINVAL;
2604         if (val && (!(data->have_temp & (1 << (val - 1))) ||
2605                     !data->temp_src[val - 1]))
2606                 return -EINVAL;
2607
2608         mutex_lock(&data->update_lock);
2609         if (val) {
2610                 src = data->temp_src[val - 1];
2611                 data->pwm_weight_temp_sel[nr] = src;
2612                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2613                 reg &= 0xe0;
2614                 reg |= (src | 0x80);
2615                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2616         } else {
2617                 data->pwm_weight_temp_sel[nr] = 0;
2618                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2619                 reg &= 0x7f;
2620                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2621         }
2622         mutex_unlock(&data->update_lock);
2623
2624         return count;
2625 }
2626
2627 static ssize_t
2628 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2629 {
2630         struct nct6775_data *data = nct6775_update_device(dev);
2631         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2632
2633         return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2634 }
2635
2636 static ssize_t
2637 store_target_temp(struct device *dev, struct device_attribute *attr,
2638                   const char *buf, size_t count)
2639 {
2640         struct nct6775_data *data = dev_get_drvdata(dev);
2641         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2642         int nr = sattr->index;
2643         unsigned long val;
2644         int err;
2645
2646         err = kstrtoul(buf, 10, &val);
2647         if (err < 0)
2648                 return err;
2649
2650         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2651                         data->target_temp_mask);
2652
2653         mutex_lock(&data->update_lock);
2654         data->target_temp[nr] = val;
2655         pwm_update_registers(data, nr);
2656         mutex_unlock(&data->update_lock);
2657         return count;
2658 }
2659
2660 static ssize_t
2661 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2662 {
2663         struct nct6775_data *data = nct6775_update_device(dev);
2664         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2665         int nr = sattr->index;
2666
2667         return sprintf(buf, "%d\n",
2668                        fan_from_reg16(data->target_speed[nr],
2669                                       data->fan_div[nr]));
2670 }
2671
2672 static ssize_t
2673 store_target_speed(struct device *dev, struct device_attribute *attr,
2674                    const char *buf, size_t count)
2675 {
2676         struct nct6775_data *data = dev_get_drvdata(dev);
2677         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2678         int nr = sattr->index;
2679         unsigned long val;
2680         int err;
2681         u16 speed;
2682
2683         err = kstrtoul(buf, 10, &val);
2684         if (err < 0)
2685                 return err;
2686
2687         val = clamp_val(val, 0, 1350000U);
2688         speed = fan_to_reg(val, data->fan_div[nr]);
2689
2690         mutex_lock(&data->update_lock);
2691         data->target_speed[nr] = speed;
2692         pwm_update_registers(data, nr);
2693         mutex_unlock(&data->update_lock);
2694         return count;
2695 }
2696
2697 static ssize_t
2698 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2699                     char *buf)
2700 {
2701         struct nct6775_data *data = nct6775_update_device(dev);
2702         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2703         int nr = sattr->nr;
2704         int index = sattr->index;
2705
2706         return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2707 }
2708
2709 static ssize_t
2710 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2711                      const char *buf, size_t count)
2712 {
2713         struct nct6775_data *data = dev_get_drvdata(dev);
2714         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2715         int nr = sattr->nr;
2716         int index = sattr->index;
2717         unsigned long val;
2718         int err;
2719
2720         err = kstrtoul(buf, 10, &val);
2721         if (err < 0)
2722                 return err;
2723
2724         /* Limit tolerance as needed */
2725         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2726
2727         mutex_lock(&data->update_lock);
2728         data->temp_tolerance[index][nr] = val;
2729         if (index)
2730                 pwm_update_registers(data, nr);
2731         else
2732                 nct6775_write_value(data,
2733                                     data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2734                                     val);
2735         mutex_unlock(&data->update_lock);
2736         return count;
2737 }
2738
2739 /*
2740  * Fan speed tolerance is a tricky beast, since the associated register is
2741  * a tick counter, but the value is reported and configured as rpm.
2742  * Compute resulting low and high rpm values and report the difference.
2743  */
2744 static ssize_t
2745 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2746                      char *buf)
2747 {
2748         struct nct6775_data *data = nct6775_update_device(dev);
2749         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2750         int nr = sattr->index;
2751         int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2752         int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2753         int tolerance;
2754
2755         if (low <= 0)
2756                 low = 1;
2757         if (high > 0xffff)
2758                 high = 0xffff;
2759         if (high < low)
2760                 high = low;
2761
2762         tolerance = (fan_from_reg16(low, data->fan_div[nr])
2763                      - fan_from_reg16(high, data->fan_div[nr])) / 2;
2764
2765         return sprintf(buf, "%d\n", tolerance);
2766 }
2767
2768 static ssize_t
2769 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2770                       const char *buf, size_t count)
2771 {
2772         struct nct6775_data *data = dev_get_drvdata(dev);
2773         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2774         int nr = sattr->index;
2775         unsigned long val;
2776         int err;
2777         int low, high;
2778
2779         err = kstrtoul(buf, 10, &val);
2780         if (err < 0)
2781                 return err;
2782
2783         high = fan_from_reg16(data->target_speed[nr],
2784                               data->fan_div[nr]) + val;
2785         low = fan_from_reg16(data->target_speed[nr],
2786                              data->fan_div[nr]) - val;
2787         if (low <= 0)
2788                 low = 1;
2789         if (high < low)
2790                 high = low;
2791
2792         val = (fan_to_reg(low, data->fan_div[nr]) -
2793                fan_to_reg(high, data->fan_div[nr])) / 2;
2794
2795         /* Limit tolerance as needed */
2796         val = clamp_val(val, 0, data->speed_tolerance_limit);
2797
2798         mutex_lock(&data->update_lock);
2799         data->target_speed_tolerance[nr] = val;
2800         pwm_update_registers(data, nr);
2801         mutex_unlock(&data->update_lock);
2802         return count;
2803 }
2804
2805 SENSOR_TEMPLATE_2(pwm, "pwm%d", S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2806 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", S_IWUSR | S_IRUGO, show_pwm_mode,
2807                 store_pwm_mode, 0);
2808 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", S_IWUSR | S_IRUGO, show_pwm_enable,
2809                 store_pwm_enable, 0);
2810 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", S_IWUSR | S_IRUGO,
2811                 show_pwm_temp_sel, store_pwm_temp_sel, 0);
2812 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", S_IWUSR | S_IRUGO,
2813                 show_target_temp, store_target_temp, 0);
2814 SENSOR_TEMPLATE(fan_target, "fan%d_target", S_IWUSR | S_IRUGO,
2815                 show_target_speed, store_target_speed, 0);
2816 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", S_IWUSR | S_IRUGO,
2817                 show_speed_tolerance, store_speed_tolerance, 0);
2818
2819 /* Smart Fan registers */
2820
2821 static ssize_t
2822 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2823 {
2824         struct nct6775_data *data = nct6775_update_device(dev);
2825         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2826         int nr = sattr->nr;
2827         int index = sattr->index;
2828
2829         return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2830 }
2831
2832 static ssize_t
2833 store_weight_temp(struct device *dev, struct device_attribute *attr,
2834                   const char *buf, size_t count)
2835 {
2836         struct nct6775_data *data = dev_get_drvdata(dev);
2837         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2838         int nr = sattr->nr;
2839         int index = sattr->index;
2840         unsigned long val;
2841         int err;
2842
2843         err = kstrtoul(buf, 10, &val);
2844         if (err < 0)
2845                 return err;
2846
2847         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2848
2849         mutex_lock(&data->update_lock);
2850         data->weight_temp[index][nr] = val;
2851         nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2852         mutex_unlock(&data->update_lock);
2853         return count;
2854 }
2855
2856 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", S_IWUSR | S_IRUGO,
2857                   show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
2858 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step",
2859                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 0);
2860 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol",
2861                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 1);
2862 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base",
2863                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 2);
2864 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step",
2865                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 5);
2866 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base",
2867                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 6);
2868
2869 static ssize_t
2870 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2871 {
2872         struct nct6775_data *data = nct6775_update_device(dev);
2873         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2874         int nr = sattr->nr;
2875         int index = sattr->index;
2876
2877         return sprintf(buf, "%d\n",
2878                        step_time_from_reg(data->fan_time[index][nr],
2879                                           data->pwm_mode[nr]));
2880 }
2881
2882 static ssize_t
2883 store_fan_time(struct device *dev, struct device_attribute *attr,
2884                const char *buf, size_t count)
2885 {
2886         struct nct6775_data *data = dev_get_drvdata(dev);
2887         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2888         int nr = sattr->nr;
2889         int index = sattr->index;
2890         unsigned long val;
2891         int err;
2892
2893         err = kstrtoul(buf, 10, &val);
2894         if (err < 0)
2895                 return err;
2896
2897         val = step_time_to_reg(val, data->pwm_mode[nr]);
2898         mutex_lock(&data->update_lock);
2899         data->fan_time[index][nr] = val;
2900         nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2901         mutex_unlock(&data->update_lock);
2902         return count;
2903 }
2904
2905 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
2906 static ssize_t
2907 show_name(struct device *dev, struct device_attribute *attr, char *buf)
2908 {
2909         struct nct6775_data *data = dev_get_drvdata(dev);
2910
2911         return sprintf(buf, "%s\n", data->name);
2912 }
2913
2914 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
2915 #endif
2916
2917 static ssize_t
2918 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2919 {
2920         struct nct6775_data *data = nct6775_update_device(dev);
2921         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2922
2923         return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2924 }
2925
2926 static ssize_t
2927 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2928                const char *buf, size_t count)
2929 {
2930         struct nct6775_data *data = dev_get_drvdata(dev);
2931         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2932         int nr = sattr->nr;
2933         int point = sattr->index;
2934         unsigned long val;
2935         int err;
2936         u8 reg;
2937
2938         err = kstrtoul(buf, 10, &val);
2939         if (err < 0)
2940                 return err;
2941         if (val > 255)
2942                 return -EINVAL;
2943
2944         if (point == data->auto_pwm_num) {
2945                 if (data->kind != nct6775 && !val)
2946                         return -EINVAL;
2947                 if (data->kind != nct6779 && val)
2948                         val = 0xff;
2949         }
2950
2951         mutex_lock(&data->update_lock);
2952         data->auto_pwm[nr][point] = val;
2953         if (point < data->auto_pwm_num) {
2954                 nct6775_write_value(data,
2955                                     NCT6775_AUTO_PWM(data, nr, point),
2956                                     data->auto_pwm[nr][point]);
2957         } else {
2958                 switch (data->kind) {
2959                 case nct6775:
2960                         /* disable if needed (pwm == 0) */
2961                         reg = nct6775_read_value(data,
2962                                                  NCT6775_REG_CRITICAL_ENAB[nr]);
2963                         if (val)
2964                                 reg |= 0x02;
2965                         else
2966                                 reg &= ~0x02;
2967                         nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
2968                                             reg);
2969                         break;
2970                 case nct6776:
2971                         break; /* always enabled, nothing to do */
2972                 case nct6106:
2973                 case nct6779:
2974                 case nct6791:
2975                 case nct6792:
2976                 case nct6793:
2977                 case nct6795:
2978                         nct6775_write_value(data, data->REG_CRITICAL_PWM[nr],
2979                                             val);
2980                         reg = nct6775_read_value(data,
2981                                         data->REG_CRITICAL_PWM_ENABLE[nr]);
2982                         if (val == 255)
2983                                 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
2984                         else
2985                                 reg |= data->CRITICAL_PWM_ENABLE_MASK;
2986                         nct6775_write_value(data,
2987                                             data->REG_CRITICAL_PWM_ENABLE[nr],
2988                                             reg);
2989                         break;
2990                 }
2991         }
2992         mutex_unlock(&data->update_lock);
2993         return count;
2994 }
2995
2996 static ssize_t
2997 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
2998 {
2999         struct nct6775_data *data = nct6775_update_device(dev);
3000         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3001         int nr = sattr->nr;
3002         int point = sattr->index;
3003
3004         /*
3005          * We don't know for sure if the temperature is signed or unsigned.
3006          * Assume it is unsigned.
3007          */
3008         return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
3009 }
3010
3011 static ssize_t
3012 store_auto_temp(struct device *dev, struct device_attribute *attr,
3013                 const char *buf, size_t count)
3014 {
3015         struct nct6775_data *data = dev_get_drvdata(dev);
3016         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3017         int nr = sattr->nr;
3018         int point = sattr->index;
3019         unsigned long val;
3020         int err;
3021
3022         err = kstrtoul(buf, 10, &val);
3023         if (err)
3024                 return err;
3025         if (val > 255000)
3026                 return -EINVAL;
3027
3028         mutex_lock(&data->update_lock);
3029         data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
3030         if (point < data->auto_pwm_num) {
3031                 nct6775_write_value(data,
3032                                     NCT6775_AUTO_TEMP(data, nr, point),
3033                                     data->auto_temp[nr][point]);
3034         } else {
3035                 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
3036                                     data->auto_temp[nr][point]);
3037         }
3038         mutex_unlock(&data->update_lock);
3039         return count;
3040 }
3041
3042 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
3043                                       struct attribute *attr, int index)
3044 {
3045         struct device *dev = container_of(kobj, struct device, kobj);
3046         struct nct6775_data *data = dev_get_drvdata(dev);
3047         int pwm = index / 36;   /* pwm index */
3048         int nr = index % 36;    /* attribute index */
3049
3050         if (!(data->has_pwm & (1 << pwm)))
3051                 return 0;
3052
3053         if ((nr >= 14 && nr <= 18) || nr == 21)   /* weight */
3054                 if (!data->REG_WEIGHT_TEMP_SEL[pwm])
3055                         return 0;
3056         if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
3057                 return 0;
3058         if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
3059                 return 0;
3060         if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
3061                 return 0;
3062
3063         if (nr >= 22 && nr <= 35) {             /* auto point */
3064                 int api = (nr - 22) / 2;        /* auto point index */
3065
3066                 if (api > data->auto_pwm_num)
3067                         return 0;
3068         }
3069         return attr->mode;
3070 }
3071
3072 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", S_IWUSR | S_IRUGO,
3073                   show_fan_time, store_fan_time, 0, 0);
3074 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", S_IWUSR | S_IRUGO,
3075                   show_fan_time, store_fan_time, 0, 1);
3076 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", S_IWUSR | S_IRUGO,
3077                   show_fan_time, store_fan_time, 0, 2);
3078 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", S_IWUSR | S_IRUGO, show_pwm,
3079                   store_pwm, 0, 1);
3080 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", S_IWUSR | S_IRUGO, show_pwm,
3081                   store_pwm, 0, 2);
3082 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", S_IWUSR | S_IRUGO,
3083                   show_temp_tolerance, store_temp_tolerance, 0, 0);
3084 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance",
3085                   S_IWUSR | S_IRUGO, show_temp_tolerance, store_temp_tolerance,
3086                   0, 1);
3087
3088 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", S_IWUSR | S_IRUGO, show_pwm, store_pwm,
3089                   0, 3);
3090
3091 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", S_IWUSR | S_IRUGO, show_pwm,
3092                   store_pwm, 0, 4);
3093
3094 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm",
3095                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 0);
3096 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp",
3097                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 0);
3098
3099 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm",
3100                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 1);
3101 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp",
3102                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 1);
3103
3104 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm",
3105                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 2);
3106 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp",
3107                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 2);
3108
3109 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm",
3110                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 3);
3111 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp",
3112                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 3);
3113
3114 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm",
3115                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 4);
3116 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp",
3117                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 4);
3118
3119 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm",
3120                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 5);
3121 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp",
3122                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 5);
3123
3124 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm",
3125                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 6);
3126 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp",
3127                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 6);
3128
3129 /*
3130  * nct6775_pwm_is_visible uses the index into the following array
3131  * to determine if attributes should be created or not.
3132  * Any change in order or content must be matched.
3133  */
3134 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
3135         &sensor_dev_template_pwm,
3136         &sensor_dev_template_pwm_mode,
3137         &sensor_dev_template_pwm_enable,
3138         &sensor_dev_template_pwm_temp_sel,
3139         &sensor_dev_template_pwm_temp_tolerance,
3140         &sensor_dev_template_pwm_crit_temp_tolerance,
3141         &sensor_dev_template_pwm_target_temp,
3142         &sensor_dev_template_fan_target,
3143         &sensor_dev_template_fan_tolerance,
3144         &sensor_dev_template_pwm_stop_time,
3145         &sensor_dev_template_pwm_step_up_time,
3146         &sensor_dev_template_pwm_step_down_time,
3147         &sensor_dev_template_pwm_start,
3148         &sensor_dev_template_pwm_floor,
3149         &sensor_dev_template_pwm_weight_temp_sel,       /* 14 */
3150         &sensor_dev_template_pwm_weight_temp_step,
3151         &sensor_dev_template_pwm_weight_temp_step_tol,
3152         &sensor_dev_template_pwm_weight_temp_step_base,
3153         &sensor_dev_template_pwm_weight_duty_step,      /* 18 */
3154         &sensor_dev_template_pwm_max,                   /* 19 */
3155         &sensor_dev_template_pwm_step,                  /* 20 */
3156         &sensor_dev_template_pwm_weight_duty_base,      /* 21 */
3157         &sensor_dev_template_pwm_auto_point1_pwm,       /* 22 */
3158         &sensor_dev_template_pwm_auto_point1_temp,
3159         &sensor_dev_template_pwm_auto_point2_pwm,
3160         &sensor_dev_template_pwm_auto_point2_temp,
3161         &sensor_dev_template_pwm_auto_point3_pwm,
3162         &sensor_dev_template_pwm_auto_point3_temp,
3163         &sensor_dev_template_pwm_auto_point4_pwm,
3164         &sensor_dev_template_pwm_auto_point4_temp,
3165         &sensor_dev_template_pwm_auto_point5_pwm,
3166         &sensor_dev_template_pwm_auto_point5_temp,
3167         &sensor_dev_template_pwm_auto_point6_pwm,
3168         &sensor_dev_template_pwm_auto_point6_temp,
3169         &sensor_dev_template_pwm_auto_point7_pwm,
3170         &sensor_dev_template_pwm_auto_point7_temp,      /* 35 */
3171
3172         NULL
3173 };
3174
3175 static const struct sensor_template_group nct6775_pwm_template_group = {
3176         .templates = nct6775_attributes_pwm_template,
3177         .is_visible = nct6775_pwm_is_visible,
3178         .base = 1,
3179 };
3180
3181 static ssize_t
3182 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
3183 {
3184         struct nct6775_data *data = dev_get_drvdata(dev);
3185
3186         return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
3187 }
3188
3189 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
3190
3191 /* Case open detection */
3192
3193 static ssize_t
3194 clear_caseopen(struct device *dev, struct device_attribute *attr,
3195                const char *buf, size_t count)
3196 {
3197         struct nct6775_data *data = dev_get_drvdata(dev);
3198         int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
3199         unsigned long val;
3200         u8 reg;
3201         int ret;
3202
3203         if (kstrtoul(buf, 10, &val) || val != 0)
3204                 return -EINVAL;
3205
3206         mutex_lock(&data->update_lock);
3207
3208         /*
3209          * Use CR registers to clear caseopen status.
3210          * The CR registers are the same for all chips, and not all chips
3211          * support clearing the caseopen status through "regular" registers.
3212          */
3213         ret = superio_enter(data->sioreg);
3214         if (ret) {
3215                 count = ret;
3216                 goto error;
3217         }
3218
3219         superio_select(data->sioreg, NCT6775_LD_ACPI);
3220         reg = superio_inb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
3221         reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3222         superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3223         reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3224         superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3225         superio_exit(data->sioreg);
3226
3227         data->valid = false;    /* Force cache refresh */
3228 error:
3229         mutex_unlock(&data->update_lock);
3230         return count;
3231 }
3232
3233 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
3234                           clear_caseopen, INTRUSION_ALARM_BASE);
3235 static SENSOR_DEVICE_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
3236                           clear_caseopen, INTRUSION_ALARM_BASE + 1);
3237 static SENSOR_DEVICE_ATTR(intrusion0_beep, S_IWUSR | S_IRUGO, show_beep,
3238                           store_beep, INTRUSION_ALARM_BASE);
3239 static SENSOR_DEVICE_ATTR(intrusion1_beep, S_IWUSR | S_IRUGO, show_beep,
3240                           store_beep, INTRUSION_ALARM_BASE + 1);
3241 static SENSOR_DEVICE_ATTR(beep_enable, S_IWUSR | S_IRUGO, show_beep,
3242                           store_beep, BEEP_ENABLE_BASE);
3243
3244 static umode_t nct6775_other_is_visible(struct kobject *kobj,
3245                                         struct attribute *attr, int index)
3246 {
3247         struct device *dev = container_of(kobj, struct device, kobj);
3248         struct nct6775_data *data = dev_get_drvdata(dev);
3249
3250         if (index == 0 && !data->have_vid)
3251                 return 0;
3252
3253         if (index == 1 || index == 2) {
3254                 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + index - 1] < 0)
3255                         return 0;
3256         }
3257
3258         if (index == 3 || index == 4) {
3259                 if (data->BEEP_BITS[INTRUSION_ALARM_BASE + index - 3] < 0)
3260                         return 0;
3261         }
3262
3263         return attr->mode;
3264 }
3265
3266 /*
3267  * nct6775_other_is_visible uses the index into the following array
3268  * to determine if attributes should be created or not.
3269  * Any change in order or content must be matched.
3270  */
3271 static struct attribute *nct6775_attributes_other[] = {
3272         &dev_attr_cpu0_vid.attr,                                /* 0 */
3273         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,        /* 1 */
3274         &sensor_dev_attr_intrusion1_alarm.dev_attr.attr,        /* 2 */
3275         &sensor_dev_attr_intrusion0_beep.dev_attr.attr,         /* 3 */
3276         &sensor_dev_attr_intrusion1_beep.dev_attr.attr,         /* 4 */
3277         &sensor_dev_attr_beep_enable.dev_attr.attr,             /* 5 */
3278 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
3279         &dev_attr_name.attr,
3280 #endif
3281         NULL
3282 };
3283
3284 static const struct attribute_group nct6775_group_other = {
3285         .attrs = nct6775_attributes_other,
3286         .is_visible = nct6775_other_is_visible,
3287 };
3288
3289 static inline void nct6775_init_device(struct nct6775_data *data)
3290 {
3291         int i;
3292         u8 tmp, diode;
3293
3294         /* Start monitoring if needed */
3295         if (data->REG_CONFIG) {
3296                 tmp = nct6775_read_value(data, data->REG_CONFIG);
3297                 if (!(tmp & 0x01))
3298                         nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
3299         }
3300
3301         /* Enable temperature sensors if needed */
3302         for (i = 0; i < NUM_TEMP; i++) {
3303                 if (!(data->have_temp & (1 << i)))
3304                         continue;
3305                 if (!data->reg_temp_config[i])
3306                         continue;
3307                 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
3308                 if (tmp & 0x01)
3309                         nct6775_write_value(data, data->reg_temp_config[i],
3310                                             tmp & 0xfe);
3311         }
3312
3313         /* Enable VBAT monitoring if needed */
3314         tmp = nct6775_read_value(data, data->REG_VBAT);
3315         if (!(tmp & 0x01))
3316                 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
3317
3318         diode = nct6775_read_value(data, data->REG_DIODE);
3319
3320         for (i = 0; i < data->temp_fixed_num; i++) {
3321                 if (!(data->have_temp_fixed & (1 << i)))
3322                         continue;
3323                 if ((tmp & (data->DIODE_MASK << i)))    /* diode */
3324                         data->temp_type[i]
3325                           = 3 - ((diode >> i) & data->DIODE_MASK);
3326                 else                            /* thermistor */
3327                         data->temp_type[i] = 4;
3328         }
3329 }
3330
3331 static void
3332 nct6775_check_fan_inputs(struct nct6775_data *data)
3333 {
3334         bool fan3pin, fan4pin, fan4min, fan5pin, fan6pin;
3335         bool pwm3pin, pwm4pin, pwm5pin, pwm6pin;
3336         int sioreg = data->sioreg;
3337         int regval;
3338
3339         /* Store SIO_REG_ENABLE for use during resume */
3340         superio_select(sioreg, NCT6775_LD_HWM);
3341         data->sio_reg_enable = superio_inb(sioreg, SIO_REG_ENABLE);
3342
3343         /* fan4 and fan5 share some pins with the GPIO and serial flash */
3344         if (data->kind == nct6775) {
3345                 regval = superio_inb(sioreg, 0x2c);
3346
3347                 fan3pin = regval & (1 << 6);
3348                 pwm3pin = regval & (1 << 7);
3349
3350                 /* On NCT6775, fan4 shares pins with the fdc interface */
3351                 fan4pin = !(superio_inb(sioreg, 0x2A) & 0x80);
3352                 fan4min = false;
3353                 fan5pin = false;
3354                 fan6pin = false;
3355                 pwm4pin = false;
3356                 pwm5pin = false;
3357                 pwm6pin = false;
3358         } else if (data->kind == nct6776) {
3359                 bool gpok = superio_inb(sioreg, 0x27) & 0x80;
3360                 const char *board_vendor, *board_name;
3361
3362                 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
3363                 board_name = dmi_get_system_info(DMI_BOARD_NAME);
3364
3365                 if (board_name && board_vendor &&
3366                     !strcmp(board_vendor, "ASRock")) {
3367                         /*
3368                          * Auxiliary fan monitoring is not enabled on ASRock
3369                          * Z77 Pro4-M if booted in UEFI Ultra-FastBoot mode.
3370                          * Observed with BIOS version 2.00.
3371                          */
3372                         if (!strcmp(board_name, "Z77 Pro4-M")) {
3373                                 if ((data->sio_reg_enable & 0xe0) != 0xe0) {
3374                                         data->sio_reg_enable |= 0xe0;
3375                                         superio_outb(sioreg, SIO_REG_ENABLE,
3376                                                      data->sio_reg_enable);
3377                                 }
3378                         }
3379                 }
3380
3381                 if (data->sio_reg_enable & 0x80)
3382                         fan3pin = gpok;
3383                 else
3384                         fan3pin = !(superio_inb(sioreg, 0x24) & 0x40);
3385
3386                 if (data->sio_reg_enable & 0x40)
3387                         fan4pin = gpok;
3388                 else
3389                         fan4pin = superio_inb(sioreg, 0x1C) & 0x01;
3390
3391                 if (data->sio_reg_enable & 0x20)
3392                         fan5pin = gpok;
3393                 else
3394                         fan5pin = superio_inb(sioreg, 0x1C) & 0x02;
3395
3396                 fan4min = fan4pin;
3397                 fan6pin = false;
3398                 pwm3pin = fan3pin;
3399                 pwm4pin = false;
3400                 pwm5pin = false;
3401                 pwm6pin = false;
3402         } else if (data->kind == nct6106) {
3403                 regval = superio_inb(sioreg, 0x24);
3404                 fan3pin = !(regval & 0x80);
3405                 pwm3pin = regval & 0x08;
3406
3407                 fan4pin = false;
3408                 fan4min = false;
3409                 fan5pin = false;
3410                 fan6pin = false;
3411                 pwm4pin = false;
3412                 pwm5pin = false;
3413                 pwm6pin = false;
3414         } else {        /* NCT6779D, NCT6791D, NCT6792D, NCT6793D, NCT6795D */
3415                 regval = superio_inb(sioreg, 0x1c);
3416
3417                 fan3pin = !(regval & (1 << 5));
3418                 fan4pin = !(regval & (1 << 6));
3419                 fan5pin = !(regval & (1 << 7));
3420
3421                 pwm3pin = !(regval & (1 << 0));
3422                 pwm4pin = !(regval & (1 << 1));
3423                 pwm5pin = !(regval & (1 << 2));
3424
3425                 fan4min = fan4pin;
3426
3427                 if (data->kind == nct6791 || data->kind == nct6792 ||
3428                     data->kind == nct6793 || data->kind == nct6795) {
3429                         regval = superio_inb(sioreg, 0x2d);
3430                         fan6pin = (regval & (1 << 1));
3431                         pwm6pin = (regval & (1 << 0));
3432                 } else {        /* NCT6779D */
3433                         fan6pin = false;
3434                         pwm6pin = false;
3435                 }
3436         }
3437
3438         /* fan 1 and 2 (0x03) are always present */
3439         data->has_fan = 0x03 | (fan3pin << 2) | (fan4pin << 3) |
3440                 (fan5pin << 4) | (fan6pin << 5);
3441         data->has_fan_min = 0x03 | (fan3pin << 2) | (fan4min << 3) |
3442                 (fan5pin << 4);
3443         data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) |
3444                 (pwm5pin << 4) | (pwm6pin << 5);
3445 }
3446
3447 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
3448                              int *available, int *mask)
3449 {
3450         int i;
3451         u8 src;
3452
3453         for (i = 0; i < data->pwm_num && *available; i++) {
3454                 int index;
3455
3456                 if (!regp[i])
3457                         continue;
3458                 src = nct6775_read_value(data, regp[i]);
3459                 src &= 0x1f;
3460                 if (!src || (*mask & (1 << src)))
3461                         continue;
3462                 if (!(data->temp_mask & BIT(src)))
3463                         continue;
3464
3465                 index = __ffs(*available);
3466                 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3467                 *available &= ~(1 << index);
3468                 *mask |= 1 << src;
3469         }
3470 }
3471
3472 static int nct6775_probe(struct platform_device *pdev)
3473 {
3474         struct device *dev = &pdev->dev;
3475         struct nct6775_sio_data *sio_data = dev_get_platdata(dev);
3476         struct nct6775_data *data;
3477         struct resource *res;
3478         int i, s, err = 0;
3479         int src, mask, available;
3480         const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3481         const u16 *reg_temp_mon, *reg_temp_alternate, *reg_temp_crit;
3482         const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL;
3483         int num_reg_temp, num_reg_temp_mon;
3484         u8 cr2a;
3485         struct attribute_group *group;
3486         struct device *hwmon_dev;
3487         int num_attr_groups = 0;
3488
3489         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3490         if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3491                                  DRVNAME))
3492                 return -EBUSY;
3493
3494         data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3495                             GFP_KERNEL);
3496         if (!data)
3497                 return -ENOMEM;
3498
3499         data->kind = sio_data->kind;
3500         data->sioreg = sio_data->sioreg;
3501         data->addr = res->start;
3502         mutex_init(&data->update_lock);
3503         data->name = nct6775_device_names[data->kind];
3504         data->bank = 0xff;              /* Force initial bank selection */
3505         platform_set_drvdata(pdev, data);
3506
3507         switch (data->kind) {
3508         case nct6106:
3509                 data->in_num = 9;
3510                 data->pwm_num = 3;
3511                 data->auto_pwm_num = 4;
3512                 data->temp_fixed_num = 3;
3513                 data->num_temp_alarms = 6;
3514                 data->num_temp_beeps = 6;
3515
3516                 data->fan_from_reg = fan_from_reg13;
3517                 data->fan_from_reg_min = fan_from_reg13;
3518
3519                 data->temp_label = nct6776_temp_label;
3520                 data->temp_mask = NCT6776_TEMP_MASK;
3521
3522                 data->REG_VBAT = NCT6106_REG_VBAT;
3523                 data->REG_DIODE = NCT6106_REG_DIODE;
3524                 data->DIODE_MASK = NCT6106_DIODE_MASK;
3525                 data->REG_VIN = NCT6106_REG_IN;
3526                 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3527                 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3528                 data->REG_TARGET = NCT6106_REG_TARGET;
3529                 data->REG_FAN = NCT6106_REG_FAN;
3530                 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
3531                 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
3532                 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
3533                 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
3534                 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
3535                 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
3536                 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
3537                 data->REG_PWM[0] = NCT6106_REG_PWM;
3538                 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
3539                 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
3540                 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3541                 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3542                 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3543                 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3544                 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3545                 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
3546                 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
3547                 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
3548                 data->REG_CRITICAL_TEMP_TOLERANCE
3549                   = NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
3550                 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
3551                 data->CRITICAL_PWM_ENABLE_MASK
3552                   = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3553                 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
3554                 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3555                 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3556                 data->REG_TEMP_SEL = NCT6106_REG_TEMP_SEL;
3557                 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3558                 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3559                 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3560                 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3561                 data->REG_ALARM = NCT6106_REG_ALARM;
3562                 data->ALARM_BITS = NCT6106_ALARM_BITS;
3563                 data->REG_BEEP = NCT6106_REG_BEEP;
3564                 data->BEEP_BITS = NCT6106_BEEP_BITS;
3565
3566                 reg_temp = NCT6106_REG_TEMP;
3567                 reg_temp_mon = NCT6106_REG_TEMP_MON;
3568                 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3569                 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON);
3570                 reg_temp_over = NCT6106_REG_TEMP_OVER;
3571                 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3572                 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3573                 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3574                 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3575                 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3576                 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3577
3578                 break;
3579         case nct6775:
3580                 data->in_num = 9;
3581                 data->pwm_num = 3;
3582                 data->auto_pwm_num = 6;
3583                 data->has_fan_div = true;
3584                 data->temp_fixed_num = 3;
3585                 data->num_temp_alarms = 3;
3586                 data->num_temp_beeps = 3;
3587
3588                 data->ALARM_BITS = NCT6775_ALARM_BITS;
3589                 data->BEEP_BITS = NCT6775_BEEP_BITS;
3590
3591                 data->fan_from_reg = fan_from_reg16;
3592                 data->fan_from_reg_min = fan_from_reg8;
3593                 data->target_temp_mask = 0x7f;
3594                 data->tolerance_mask = 0x0f;
3595                 data->speed_tolerance_limit = 15;
3596
3597                 data->temp_label = nct6775_temp_label;
3598                 data->temp_mask = NCT6775_TEMP_MASK;
3599
3600                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3601                 data->REG_VBAT = NCT6775_REG_VBAT;
3602                 data->REG_DIODE = NCT6775_REG_DIODE;
3603                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3604                 data->REG_VIN = NCT6775_REG_IN;
3605                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3606                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3607                 data->REG_TARGET = NCT6775_REG_TARGET;
3608                 data->REG_FAN = NCT6775_REG_FAN;
3609                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3610                 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3611                 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3612                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3613                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3614                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3615                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3616                 data->REG_PWM[0] = NCT6775_REG_PWM;
3617                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3618                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3619                 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3620                 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3621                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3622                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3623                 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3624                 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3625                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3626                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3627                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3628                 data->REG_CRITICAL_TEMP_TOLERANCE
3629                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3630                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3631                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3632                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3633                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3634                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3635                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3636                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3637                 data->REG_ALARM = NCT6775_REG_ALARM;
3638                 data->REG_BEEP = NCT6775_REG_BEEP;
3639
3640                 reg_temp = NCT6775_REG_TEMP;
3641                 reg_temp_mon = NCT6775_REG_TEMP_MON;
3642                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3643                 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3644                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3645                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3646                 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3647                 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3648                 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3649
3650                 break;
3651         case nct6776:
3652                 data->in_num = 9;
3653                 data->pwm_num = 3;
3654                 data->auto_pwm_num = 4;
3655                 data->has_fan_div = false;
3656                 data->temp_fixed_num = 3;
3657                 data->num_temp_alarms = 3;
3658                 data->num_temp_beeps = 6;
3659
3660                 data->ALARM_BITS = NCT6776_ALARM_BITS;
3661                 data->BEEP_BITS = NCT6776_BEEP_BITS;
3662
3663                 data->fan_from_reg = fan_from_reg13;
3664                 data->fan_from_reg_min = fan_from_reg13;
3665                 data->target_temp_mask = 0xff;
3666                 data->tolerance_mask = 0x07;
3667                 data->speed_tolerance_limit = 63;
3668
3669                 data->temp_label = nct6776_temp_label;
3670                 data->temp_mask = NCT6776_TEMP_MASK;
3671
3672                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3673                 data->REG_VBAT = NCT6775_REG_VBAT;
3674                 data->REG_DIODE = NCT6775_REG_DIODE;
3675                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3676                 data->REG_VIN = NCT6775_REG_IN;
3677                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3678                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3679                 data->REG_TARGET = NCT6775_REG_TARGET;
3680                 data->REG_FAN = NCT6775_REG_FAN;
3681                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3682                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3683                 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3684                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3685                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3686                 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3687                 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3688                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3689                 data->REG_PWM[0] = NCT6775_REG_PWM;
3690                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3691                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3692                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3693                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3694                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3695                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3696                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3697                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3698                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3699                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3700                 data->REG_CRITICAL_TEMP_TOLERANCE
3701                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3702                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3703                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3704                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3705                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3706                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3707                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3708                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3709                 data->REG_ALARM = NCT6775_REG_ALARM;
3710                 data->REG_BEEP = NCT6776_REG_BEEP;
3711
3712                 reg_temp = NCT6775_REG_TEMP;
3713                 reg_temp_mon = NCT6775_REG_TEMP_MON;
3714                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3715                 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3716                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3717                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3718                 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3719                 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3720                 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3721
3722                 break;
3723         case nct6779:
3724                 data->in_num = 15;
3725                 data->pwm_num = 5;
3726                 data->auto_pwm_num = 4;
3727                 data->has_fan_div = false;
3728                 data->temp_fixed_num = 6;
3729                 data->num_temp_alarms = 2;
3730                 data->num_temp_beeps = 2;
3731
3732                 data->ALARM_BITS = NCT6779_ALARM_BITS;
3733                 data->BEEP_BITS = NCT6779_BEEP_BITS;
3734
3735                 data->fan_from_reg = fan_from_reg13;
3736                 data->fan_from_reg_min = fan_from_reg13;
3737                 data->target_temp_mask = 0xff;
3738                 data->tolerance_mask = 0x07;
3739                 data->speed_tolerance_limit = 63;
3740
3741                 data->temp_label = nct6779_temp_label;
3742                 data->temp_mask = NCT6779_TEMP_MASK;
3743
3744                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3745                 data->REG_VBAT = NCT6775_REG_VBAT;
3746                 data->REG_DIODE = NCT6775_REG_DIODE;
3747                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3748                 data->REG_VIN = NCT6779_REG_IN;
3749                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3750                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3751                 data->REG_TARGET = NCT6775_REG_TARGET;
3752                 data->REG_FAN = NCT6779_REG_FAN;
3753                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3754                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3755                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3756                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3757                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3758                 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3759                 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3760                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3761                 data->REG_PWM[0] = NCT6775_REG_PWM;
3762                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3763                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3764                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3765                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3766                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3767                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3768                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3769                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3770                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3771                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3772                 data->REG_CRITICAL_TEMP_TOLERANCE
3773                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3774                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3775                 data->CRITICAL_PWM_ENABLE_MASK
3776                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3777                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3778                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3779                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3780                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3781                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3782                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3783                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3784                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3785                 data->REG_ALARM = NCT6779_REG_ALARM;
3786                 data->REG_BEEP = NCT6776_REG_BEEP;
3787
3788                 reg_temp = NCT6779_REG_TEMP;
3789                 reg_temp_mon = NCT6779_REG_TEMP_MON;
3790                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3791                 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3792                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3793                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3794                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3795                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3796                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3797
3798                 break;
3799         case nct6791:
3800         case nct6792:
3801         case nct6793:
3802         case nct6795:
3803                 data->in_num = 15;
3804                 data->pwm_num = 6;
3805                 data->auto_pwm_num = 4;
3806                 data->has_fan_div = false;
3807                 data->temp_fixed_num = 6;
3808                 data->num_temp_alarms = 2;
3809                 data->num_temp_beeps = 2;
3810
3811                 data->ALARM_BITS = NCT6791_ALARM_BITS;
3812                 data->BEEP_BITS = NCT6779_BEEP_BITS;
3813
3814                 data->fan_from_reg = fan_from_reg13;
3815                 data->fan_from_reg_min = fan_from_reg13;
3816                 data->target_temp_mask = 0xff;
3817                 data->tolerance_mask = 0x07;
3818                 data->speed_tolerance_limit = 63;
3819
3820                 switch (data->kind) {
3821                 default:
3822                 case nct6791:
3823                         data->temp_label = nct6779_temp_label;
3824                         data->temp_mask = NCT6791_TEMP_MASK;
3825                         break;
3826                 case nct6792:
3827                         data->temp_label = nct6792_temp_label;
3828                         data->temp_mask = NCT6792_TEMP_MASK;
3829                         break;
3830                 case nct6793:
3831                         data->temp_label = nct6793_temp_label;
3832                         data->temp_mask = NCT6793_TEMP_MASK;
3833                         break;
3834                 case nct6795:   /* unknown */
3835                         data->temp_mask = NCT6795_TEMP_MASK;
3836                         break;
3837                 }
3838
3839                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3840                 data->REG_VBAT = NCT6775_REG_VBAT;
3841                 data->REG_DIODE = NCT6775_REG_DIODE;
3842                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3843                 data->REG_VIN = NCT6779_REG_IN;
3844                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3845                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3846                 data->REG_TARGET = NCT6775_REG_TARGET;
3847                 data->REG_FAN = NCT6779_REG_FAN;
3848                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3849                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3850                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3851                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3852                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3853                 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3854                 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3855                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3856                 data->REG_PWM[0] = NCT6775_REG_PWM;
3857                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3858                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3859                 data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP;
3860                 data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE;
3861                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3862                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3863                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3864                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3865                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3866                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3867                 data->REG_CRITICAL_TEMP_TOLERANCE
3868                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3869                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3870                 data->CRITICAL_PWM_ENABLE_MASK
3871                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3872                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3873                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3874                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3875                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3876                 data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL;
3877                 data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP;
3878                 data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL;
3879                 data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE;
3880                 data->REG_ALARM = NCT6791_REG_ALARM;
3881                 if (data->kind == nct6791)
3882                         data->REG_BEEP = NCT6776_REG_BEEP;
3883                 else
3884                         data->REG_BEEP = NCT6792_REG_BEEP;
3885
3886                 reg_temp = NCT6779_REG_TEMP;
3887                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3888                 if (data->kind == nct6791) {
3889                         reg_temp_mon = NCT6779_REG_TEMP_MON;
3890                         num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3891                 } else {
3892                         reg_temp_mon = NCT6792_REG_TEMP_MON;
3893                         num_reg_temp_mon = ARRAY_SIZE(NCT6792_REG_TEMP_MON);
3894                 }
3895                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3896                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3897                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3898                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3899                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3900
3901                 break;
3902         default:
3903                 return -ENODEV;
3904         }
3905         data->have_in = (1 << data->in_num) - 1;
3906         data->have_temp = 0;
3907
3908         /*
3909          * On some boards, not all available temperature sources are monitored,
3910          * even though some of the monitoring registers are unused.
3911          * Get list of unused monitoring registers, then detect if any fan
3912          * controls are configured to use unmonitored temperature sources.
3913          * If so, assign the unmonitored temperature sources to available
3914          * monitoring registers.
3915          */
3916         mask = 0;
3917         available = 0;
3918         for (i = 0; i < num_reg_temp; i++) {
3919                 if (reg_temp[i] == 0)
3920                         continue;
3921
3922                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3923                 if (!src || (mask & (1 << src)))
3924                         available |= 1 << i;
3925
3926                 mask |= 1 << src;
3927         }
3928
3929         /*
3930          * Now find unmonitored temperature registers and enable monitoring
3931          * if additional monitoring registers are available.
3932          */
3933         add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
3934         add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
3935
3936         mask = 0;
3937         s = NUM_TEMP_FIXED;     /* First dynamic temperature attribute */
3938         for (i = 0; i < num_reg_temp; i++) {
3939                 if (reg_temp[i] == 0)
3940                         continue;
3941
3942                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3943                 if (!src || (mask & (1 << src)))
3944                         continue;
3945
3946                 if (!(data->temp_mask & BIT(src))) {
3947                         dev_info(dev,
3948                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3949                                  src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
3950                         continue;
3951                 }
3952
3953                 mask |= 1 << src;
3954
3955                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3956                 if (src <= data->temp_fixed_num) {
3957                         data->have_temp |= 1 << (src - 1);
3958                         data->have_temp_fixed |= 1 << (src - 1);
3959                         data->reg_temp[0][src - 1] = reg_temp[i];
3960                         data->reg_temp[1][src - 1] = reg_temp_over[i];
3961                         data->reg_temp[2][src - 1] = reg_temp_hyst[i];
3962                         if (reg_temp_crit_h && reg_temp_crit_h[i])
3963                                 data->reg_temp[3][src - 1] = reg_temp_crit_h[i];
3964                         else if (reg_temp_crit[src - 1])
3965                                 data->reg_temp[3][src - 1]
3966                                   = reg_temp_crit[src - 1];
3967                         if (reg_temp_crit_l && reg_temp_crit_l[i])
3968                                 data->reg_temp[4][src - 1] = reg_temp_crit_l[i];
3969                         data->reg_temp_config[src - 1] = reg_temp_config[i];
3970                         data->temp_src[src - 1] = src;
3971                         continue;
3972                 }
3973
3974                 if (s >= NUM_TEMP)
3975                         continue;
3976
3977                 /* Use dynamic index for other sources */
3978                 data->have_temp |= 1 << s;
3979                 data->reg_temp[0][s] = reg_temp[i];
3980                 data->reg_temp[1][s] = reg_temp_over[i];
3981                 data->reg_temp[2][s] = reg_temp_hyst[i];
3982                 data->reg_temp_config[s] = reg_temp_config[i];
3983                 if (reg_temp_crit_h && reg_temp_crit_h[i])
3984                         data->reg_temp[3][s] = reg_temp_crit_h[i];
3985                 else if (reg_temp_crit[src - 1])
3986                         data->reg_temp[3][s] = reg_temp_crit[src - 1];
3987                 if (reg_temp_crit_l && reg_temp_crit_l[i])
3988                         data->reg_temp[4][s] = reg_temp_crit_l[i];
3989
3990                 data->temp_src[s] = src;
3991                 s++;
3992         }
3993
3994         /*
3995          * Repeat with temperatures used for fan control.
3996          * This set of registers does not support limits.
3997          */
3998         for (i = 0; i < num_reg_temp_mon; i++) {
3999                 if (reg_temp_mon[i] == 0)
4000                         continue;
4001
4002                 src = nct6775_read_value(data, data->REG_TEMP_SEL[i]) & 0x1f;
4003                 if (!src)
4004                         continue;
4005
4006                 if (!(data->temp_mask & BIT(src))) {
4007                         dev_info(dev,
4008                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
4009                                  src, i, data->REG_TEMP_SEL[i],
4010                                  reg_temp_mon[i]);
4011                         continue;
4012                 }
4013
4014                 /*
4015                  * For virtual temperature sources, the 'virtual' temperature
4016                  * for each fan reflects a different temperature, and there
4017                  * are no duplicates.
4018                  */
4019                 if (src != TEMP_SOURCE_VIRTUAL) {
4020                         if (mask & (1 << src))
4021                                 continue;
4022                         mask |= 1 << src;
4023                 }
4024
4025                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
4026                 if (src <= data->temp_fixed_num) {
4027                         if (data->have_temp & (1 << (src - 1)))
4028                                 continue;
4029                         data->have_temp |= 1 << (src - 1);
4030                         data->have_temp_fixed |= 1 << (src - 1);
4031                         data->reg_temp[0][src - 1] = reg_temp_mon[i];
4032                         data->temp_src[src - 1] = src;
4033                         continue;
4034                 }
4035
4036                 if (s >= NUM_TEMP)
4037                         continue;
4038
4039                 /* Use dynamic index for other sources */
4040                 data->have_temp |= 1 << s;
4041                 data->reg_temp[0][s] = reg_temp_mon[i];
4042                 data->temp_src[s] = src;
4043                 s++;
4044         }
4045
4046 #ifdef USE_ALTERNATE
4047         /*
4048          * Go through the list of alternate temp registers and enable
4049          * if possible.
4050          * The temperature is already monitored if the respective bit in <mask>
4051          * is set.
4052          */
4053         for (i = 0; i < 32; i++) {
4054                 if (!(data->temp_mask & BIT(i)))
4055                         continue;
4056                 if (!reg_temp_alternate[i])
4057                         continue;
4058                 if (mask & (1 << (i + 1)))
4059                         continue;
4060                 if (i < data->temp_fixed_num) {
4061                         if (data->have_temp & (1 << i))
4062                                 continue;
4063                         data->have_temp |= 1 << i;
4064                         data->have_temp_fixed |= 1 << i;
4065                         data->reg_temp[0][i] = reg_temp_alternate[i];
4066                         if (i < num_reg_temp) {
4067                                 data->reg_temp[1][i] = reg_temp_over[i];
4068                                 data->reg_temp[2][i] = reg_temp_hyst[i];
4069                         }
4070                         data->temp_src[i] = i + 1;
4071                         continue;
4072                 }
4073
4074                 if (s >= NUM_TEMP)      /* Abort if no more space */
4075                         break;
4076
4077                 data->have_temp |= 1 << s;
4078                 data->reg_temp[0][s] = reg_temp_alternate[i];
4079                 data->temp_src[s] = i + 1;
4080                 s++;
4081         }
4082 #endif /* USE_ALTERNATE */
4083
4084         /* Initialize the chip */
4085         nct6775_init_device(data);
4086
4087         err = superio_enter(sio_data->sioreg);
4088         if (err)
4089                 return err;
4090
4091         cr2a = superio_inb(sio_data->sioreg, 0x2a);
4092         switch (data->kind) {
4093         case nct6775:
4094                 data->have_vid = (cr2a & 0x40);
4095                 break;
4096         case nct6776:
4097                 data->have_vid = (cr2a & 0x60) == 0x40;
4098                 break;
4099         case nct6106:
4100         case nct6779:
4101         case nct6791:
4102         case nct6792:
4103         case nct6793:
4104         case nct6795:
4105                 break;
4106         }
4107
4108         /*
4109          * Read VID value
4110          * We can get the VID input values directly at logical device D 0xe3.
4111          */
4112         if (data->have_vid) {
4113                 superio_select(sio_data->sioreg, NCT6775_LD_VID);
4114                 data->vid = superio_inb(sio_data->sioreg, 0xe3);
4115                 data->vrm = vid_which_vrm();
4116         }
4117
4118         if (fan_debounce) {
4119                 u8 tmp;
4120
4121                 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
4122                 tmp = superio_inb(sio_data->sioreg,
4123                                   NCT6775_REG_CR_FAN_DEBOUNCE);
4124                 switch (data->kind) {
4125                 case nct6106:
4126                         tmp |= 0xe0;
4127                         break;
4128                 case nct6775:
4129                         tmp |= 0x1e;
4130                         break;
4131                 case nct6776:
4132                 case nct6779:
4133                         tmp |= 0x3e;
4134                         break;
4135                 case nct6791:
4136                 case nct6792:
4137                 case nct6793:
4138                 case nct6795:
4139                         tmp |= 0x7e;
4140                         break;
4141                 }
4142                 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
4143                              tmp);
4144                 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
4145                          data->name);
4146         }
4147
4148         nct6775_check_fan_inputs(data);
4149
4150         superio_exit(sio_data->sioreg);
4151
4152         /* Read fan clock dividers immediately */
4153         nct6775_init_fan_common(dev, data);
4154
4155         /* Register sysfs hooks */
4156         group = nct6775_create_attr_group(dev, &nct6775_pwm_template_group,
4157                                           data->pwm_num);
4158         if (IS_ERR(group))
4159                 return PTR_ERR(group);
4160
4161         data->groups[num_attr_groups++] = group;
4162
4163         group = nct6775_create_attr_group(dev, &nct6775_in_template_group,
4164                                           fls(data->have_in));
4165         if (IS_ERR(group))
4166                 return PTR_ERR(group);
4167
4168         data->groups[num_attr_groups++] = group;
4169
4170         group = nct6775_create_attr_group(dev, &nct6775_fan_template_group,
4171                                           fls(data->has_fan));
4172         if (IS_ERR(group))
4173                 return PTR_ERR(group);
4174
4175         data->groups[num_attr_groups++] = group;
4176
4177         group = nct6775_create_attr_group(dev, &nct6775_temp_template_group,
4178                                           fls(data->have_temp));
4179         if (IS_ERR(group))
4180                 return PTR_ERR(group);
4181
4182         data->groups[num_attr_groups++] = group;
4183         data->groups[num_attr_groups++] = &nct6775_group_other;
4184
4185 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4186         err = sysfs_create_groups(&dev->kobj, data->groups);
4187         if (err < 0)
4188                 return err;
4189         hwmon_dev = hwmon_device_register(dev);
4190         if (IS_ERR(hwmon_dev)) {
4191                 sysfs_remove_groups(&dev->kobj, data->groups);
4192                 return PTR_ERR(hwmon_dev);
4193         }
4194         data->hwmon_dev = hwmon_dev;
4195 #else
4196         hwmon_dev = devm_hwmon_device_register_with_groups(dev, data->name,
4197                                                            data, data->groups);
4198 #endif
4199         return PTR_ERR_OR_ZERO(hwmon_dev);
4200 }
4201
4202 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4203 static int nct6775_remove(struct platform_device *pdev)
4204 {
4205         struct nct6775_data *data = platform_get_drvdata(pdev);
4206
4207         hwmon_device_unregister(data->hwmon_dev);
4208         sysfs_remove_groups(&pdev->dev.kobj, data->groups);
4209         return 0;
4210 }
4211 #endif
4212
4213 static void nct6791_enable_io_mapping(int sioaddr)
4214 {
4215         int val;
4216
4217         val = superio_inb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE);
4218         if (val & 0x10) {
4219                 pr_info("Enabling hardware monitor logical device mappings.\n");
4220                 superio_outb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE,
4221                              val & ~0x10);
4222         }
4223 }
4224
4225 static int __maybe_unused nct6775_suspend(struct device *dev)
4226 {
4227         struct nct6775_data *data = nct6775_update_device(dev);
4228
4229         mutex_lock(&data->update_lock);
4230         data->vbat = nct6775_read_value(data, data->REG_VBAT);
4231         if (data->kind == nct6775) {
4232                 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
4233                 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
4234         }
4235         mutex_unlock(&data->update_lock);
4236
4237         return 0;
4238 }
4239
4240 static int __maybe_unused nct6775_resume(struct device *dev)
4241 {
4242         struct nct6775_data *data = dev_get_drvdata(dev);
4243         int sioreg = data->sioreg;
4244         int i, j, err = 0;
4245         u8 reg;
4246
4247         mutex_lock(&data->update_lock);
4248         data->bank = 0xff;              /* Force initial bank selection */
4249
4250         err = superio_enter(sioreg);
4251         if (err)
4252                 goto abort;
4253
4254         superio_select(sioreg, NCT6775_LD_HWM);
4255         reg = superio_inb(sioreg, SIO_REG_ENABLE);
4256         if (reg != data->sio_reg_enable)
4257                 superio_outb(sioreg, SIO_REG_ENABLE, data->sio_reg_enable);
4258
4259         if (data->kind == nct6791 || data->kind == nct6792 ||
4260             data->kind == nct6793 || data->kind == nct6795)
4261                 nct6791_enable_io_mapping(sioreg);
4262
4263         superio_exit(sioreg);
4264
4265         /* Restore limits */
4266         for (i = 0; i < data->in_num; i++) {
4267                 if (!(data->have_in & (1 << i)))
4268                         continue;
4269
4270                 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
4271                                     data->in[i][1]);
4272                 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
4273                                     data->in[i][2]);
4274         }
4275
4276         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
4277                 if (!(data->has_fan_min & (1 << i)))
4278                         continue;
4279
4280                 nct6775_write_value(data, data->REG_FAN_MIN[i],
4281                                     data->fan_min[i]);
4282         }
4283
4284         for (i = 0; i < NUM_TEMP; i++) {
4285                 if (!(data->have_temp & (1 << i)))
4286                         continue;
4287
4288                 for (j = 1; j < ARRAY_SIZE(data->reg_temp); j++)
4289                         if (data->reg_temp[j][i])
4290                                 nct6775_write_temp(data, data->reg_temp[j][i],
4291                                                    data->temp[j][i]);
4292         }
4293
4294         /* Restore other settings */
4295         nct6775_write_value(data, data->REG_VBAT, data->vbat);
4296         if (data->kind == nct6775) {
4297                 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
4298                 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
4299         }
4300
4301 abort:
4302         /* Force re-reading all values */
4303         data->valid = false;
4304         mutex_unlock(&data->update_lock);
4305
4306         return err;
4307 }
4308
4309 static SIMPLE_DEV_PM_OPS(nct6775_dev_pm_ops, nct6775_suspend, nct6775_resume);
4310
4311 static struct platform_driver nct6775_driver = {
4312         .driver = {
4313                 .owner  = THIS_MODULE,
4314                 .name   = DRVNAME,
4315                 .pm     = &nct6775_dev_pm_ops,
4316         },
4317         .probe          = nct6775_probe,
4318 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4319         .remove         = nct6775_remove,
4320 #endif
4321 };
4322
4323 /* nct6775_find() looks for a '627 in the Super-I/O config space */
4324 static int __init nct6775_find(int sioaddr, struct nct6775_sio_data *sio_data)
4325 {
4326         u16 val;
4327         int err;
4328         int addr;
4329
4330         err = superio_enter(sioaddr);
4331         if (err)
4332                 return err;
4333
4334         val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8) |
4335                 superio_inb(sioaddr, SIO_REG_DEVID + 1);
4336         if (force_id && val != 0xffff)
4337                 val = force_id;
4338
4339         switch (val & SIO_ID_MASK) {
4340         case SIO_NCT6106_ID:
4341                 sio_data->kind = nct6106;
4342                 break;
4343         case SIO_NCT6775_ID:
4344                 sio_data->kind = nct6775;
4345                 break;
4346         case SIO_NCT6776_ID:
4347                 sio_data->kind = nct6776;
4348                 break;
4349         case SIO_NCT6779_ID:
4350                 sio_data->kind = nct6779;
4351                 break;
4352         case SIO_NCT6791_ID:
4353                 sio_data->kind = nct6791;
4354                 break;
4355         case SIO_NCT6792_ID:
4356                 sio_data->kind = nct6792;
4357                 break;
4358         case SIO_NCT6793_ID:
4359                 sio_data->kind = nct6793;
4360                 break;
4361         case SIO_NCT6795_ID:
4362                 sio_data->kind = nct6795;
4363                 break;
4364         default:
4365                 if (val != 0xffff)
4366                         pr_debug("unsupported chip ID: 0x%04x\n", val);
4367                 superio_exit(sioaddr);
4368                 return -ENODEV;
4369         }
4370
4371         /* We have a known chip, find the HWM I/O address */
4372         superio_select(sioaddr, NCT6775_LD_HWM);
4373         val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
4374             | superio_inb(sioaddr, SIO_REG_ADDR + 1);
4375         addr = val & IOREGION_ALIGNMENT;
4376         if (addr == 0) {
4377                 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
4378                 superio_exit(sioaddr);
4379                 return -ENODEV;
4380         }
4381
4382         /* Activate logical device if needed */
4383         val = superio_inb(sioaddr, SIO_REG_ENABLE);
4384         if (!(val & 0x01)) {
4385                 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
4386                 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
4387         }
4388
4389         if (sio_data->kind == nct6791 || sio_data->kind == nct6792 ||
4390             sio_data->kind == nct6793 || sio_data->kind == nct6795)
4391                 nct6791_enable_io_mapping(sioaddr);
4392
4393         superio_exit(sioaddr);
4394         pr_info("Found %s or compatible chip at %#x:%#x\n",
4395                 nct6775_sio_names[sio_data->kind], sioaddr, addr);
4396         sio_data->sioreg = sioaddr;
4397
4398         return addr;
4399 }
4400
4401 /*
4402  * when Super-I/O functions move to a separate file, the Super-I/O
4403  * bus will manage the lifetime of the device and this module will only keep
4404  * track of the nct6775 driver. But since we use platform_device_alloc(), we
4405  * must keep track of the device
4406  */
4407 static struct platform_device *pdev[2];
4408
4409 static int __init sensors_nct6775_init(void)
4410 {
4411         int i, err;
4412         bool found = false;
4413         int address;
4414         struct resource res;
4415         struct nct6775_sio_data sio_data;
4416         int sioaddr[2] = { 0x2e, 0x4e };
4417
4418         err = platform_driver_register(&nct6775_driver);
4419         if (err)
4420                 return err;
4421
4422         /*
4423          * initialize sio_data->kind and sio_data->sioreg.
4424          *
4425          * when Super-I/O functions move to a separate file, the Super-I/O
4426          * driver will probe 0x2e and 0x4e and auto-detect the presence of a
4427          * nct6775 hardware monitor, and call probe()
4428          */
4429         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4430                 address = nct6775_find(sioaddr[i], &sio_data);
4431                 if (address <= 0)
4432                         continue;
4433
4434                 found = true;
4435
4436                 pdev[i] = platform_device_alloc(DRVNAME, address);
4437                 if (!pdev[i]) {
4438                         err = -ENOMEM;
4439                         goto exit_device_unregister;
4440                 }
4441
4442                 err = platform_device_add_data(pdev[i], &sio_data,
4443                                                sizeof(struct nct6775_sio_data));
4444                 if (err)
4445                         goto exit_device_put;
4446
4447                 memset(&res, 0, sizeof(res));
4448                 res.name = DRVNAME;
4449                 res.start = address + IOREGION_OFFSET;
4450                 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
4451                 res.flags = IORESOURCE_IO;
4452
4453                 err = acpi_check_resource_conflict(&res);
4454                 if (err) {
4455                         platform_device_put(pdev[i]);
4456                         pdev[i] = NULL;
4457                         continue;
4458                 }
4459
4460                 err = platform_device_add_resources(pdev[i], &res, 1);
4461                 if (err)
4462                         goto exit_device_put;
4463
4464                 /* platform_device_add calls probe() */
4465                 err = platform_device_add(pdev[i]);
4466                 if (err)
4467                         goto exit_device_put;
4468         }
4469         if (!found) {
4470                 err = -ENODEV;
4471                 goto exit_unregister;
4472         }
4473
4474         return 0;
4475
4476 exit_device_put:
4477         platform_device_put(pdev[i]);
4478 exit_device_unregister:
4479         while (--i >= 0) {
4480                 if (pdev[i])
4481                         platform_device_unregister(pdev[i]);
4482         }
4483 exit_unregister:
4484         platform_driver_unregister(&nct6775_driver);
4485         return err;
4486 }
4487
4488 static void __exit sensors_nct6775_exit(void)
4489 {
4490         int i;
4491
4492         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4493                 if (pdev[i])
4494                         platform_device_unregister(pdev[i]);
4495         }
4496         platform_driver_unregister(&nct6775_driver);
4497 }
4498
4499 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4500 MODULE_DESCRIPTION("Driver for NCT6775F and compatible chips");
4501 MODULE_LICENSE("GPL");
4502
4503 module_init(sensors_nct6775_init);
4504 module_exit(sensors_nct6775_exit);