git.sur5r.net Git - groeck-nct6775/blob - nct6775.c

   1 /*
   2  * nct6775 - Driver for the hardware monitoring functionality of
   3  *             Nuvoton NCT677x Super-I/O chips
   4  *
   5  * Copyright (C) 2012  Guenter Roeck <linux@roeck-us.net>
   6  *
   7  * Derived from w83627ehf driver
   8  * Copyright (C) 2005-2012  Jean Delvare <jdelvare@suse.de>
   9  * Copyright (C) 2006  Yuan Mu (Winbond),
  10  *                     Rudolf Marek <r.marek@assembler.cz>
  11  *                     David Hubbard <david.c.hubbard@gmail.com>
  12  *                     Daniel J Blueman <daniel.blueman@gmail.com>
  13  * Copyright (C) 2010  Sheng-Yuan Huang (Nuvoton) (PS00)
  14  *
  15  * Shamelessly ripped from the w83627hf driver
  16  * Copyright (C) 2003  Mark Studebaker
  17  *
  18  * This program is free software; you can redistribute it and/or modify
  19  * it under the terms of the GNU General Public License as published by
  20  * the Free Software Foundation; either version 2 of the License, or
  21  * (at your option) any later version.
  22  *
  23  * This program is distributed in the hope that it will be useful,
  24  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26  * GNU General Public License for more details.
  27  *
  28  * You should have received a copy of the GNU General Public License
  29  * along with this program; if not, write to the Free Software
  30  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  31  *
  32  *
  33  * Supports the following chips:
  34  *
  35  * Chip        #vin    #fan    #pwm    #temp  chip IDs       man ID
  36  * nct6106d     9      3       3       6+3    0xc450 0xc1    0x5ca3
  37  * nct6775f     9      4       3       6+3    0xb470 0xc1    0x5ca3
  38  * nct6776f     9      5       3       6+3    0xc330 0xc1    0x5ca3
  39  * nct6779d    15      5       5       2+6    0xc560 0xc1    0x5ca3
  40  * nct6791d    15      6       6       2+6    0xc800 0xc1    0x5ca3
  41  * nct6792d    15      6       6       2+6    0xc911 0xc1    0x5ca3
  42  *
  43  * #temp lists the number of monitored temperature sources (first value) plus
  44  * the number of directly connectable temperature sensors (second value).
  45  */
  46
  47 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  48
  49 #include <linux/module.h>
  50 #include <linux/init.h>
  51 #include <linux/slab.h>
  52 #include <linux/jiffies.h>
  53 #include <linux/platform_device.h>
  54 #include <linux/hwmon.h>
  55 #include <linux/hwmon-sysfs.h>
  56 #include <linux/hwmon-vid.h>
  57 #include <linux/err.h>
  58 #include <linux/mutex.h>
  59 #include <linux/acpi.h>
  60 #include <linux/dmi.h>
  61 #include <linux/io.h>
  62 #include "lm75.h"
  63 #include "compat.h"
  64
  65 #define USE_ALTERNATE
  66
  67 enum kinds { nct6106, nct6775, nct6776, nct6779, nct6791, nct6792 };
  68
  69 /* used to set data->name = nct6775_device_names[data->sio_kind] */
  70 static const char * const nct6775_device_names[] = {
  71         "nct6106",
  72         "nct6775",
  73         "nct6776",
  74         "nct6779",
  75         "nct6791",
  76         "nct6792",
  77 };
  78
  79 static unsigned short force_id;
  80 module_param(force_id, ushort, 0);
  81 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  82
  83 static unsigned short fan_debounce;
  84 module_param(fan_debounce, ushort, 0);
  85 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
  86
  87 #define DRVNAME "nct6775"
  88
  89 /*
  90  * Super-I/O constants and functions
  91  */
  92
  93 #define NCT6775_LD_ACPI         0x0a
  94 #define NCT6775_LD_HWM          0x0b
  95 #define NCT6775_LD_VID          0x0d
  96
  97 #define SIO_REG_LDSEL           0x07    /* Logical device select */
  98 #define SIO_REG_DEVID           0x20    /* Device ID (2 bytes) */
  99 #define SIO_REG_ENABLE          0x30    /* Logical device enable */
 100 #define SIO_REG_ADDR            0x60    /* Logical device address (2 bytes) */
 101
 102 #define SIO_NCT6106_ID          0xc450
 103 #define SIO_NCT6775_ID          0xb470
 104 #define SIO_NCT6776_ID          0xc330
 105 #define SIO_NCT6779_ID          0xc560
 106 #define SIO_NCT6791_ID          0xc800
 107 #define SIO_NCT6792_ID          0xc910
 108 #define SIO_ID_MASK             0xFFF0
 109
 110 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
 111
 112 static inline void
 113 superio_outb(int ioreg, int reg, int val)
 114 {
 115         outb(reg, ioreg);
 116         outb(val, ioreg + 1);
 117 }
 118
 119 static inline int
 120 superio_inb(int ioreg, int reg)
 121 {
 122         outb(reg, ioreg);
 123         return inb(ioreg + 1);
 124 }
 125
 126 static inline void
 127 superio_select(int ioreg, int ld)
 128 {
 129         outb(SIO_REG_LDSEL, ioreg);
 130         outb(ld, ioreg + 1);
 131 }
 132
 133 static inline int
 134 superio_enter(int ioreg)
 135 {
 136         /*
 137          * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
 138          */
 139         if (!request_muxed_region(ioreg, 2, DRVNAME))
 140                 return -EBUSY;
 141
 142         outb(0x87, ioreg);
 143         outb(0x87, ioreg);
 144
 145         return 0;
 146 }
 147
 148 static inline void
 149 superio_exit(int ioreg)
 150 {
 151         outb(0xaa, ioreg);
 152         outb(0x02, ioreg);
 153         outb(0x02, ioreg + 1);
 154         release_region(ioreg, 2);
 155 }
 156
 157 /*
 158  * ISA constants
 159  */
 160
 161 #define IOREGION_ALIGNMENT      (~7)
 162 #define IOREGION_OFFSET         5
 163 #define IOREGION_LENGTH         2
 164 #define ADDR_REG_OFFSET         0
 165 #define DATA_REG_OFFSET         1
 166
 167 #define NCT6775_REG_BANK        0x4E
 168 #define NCT6775_REG_CONFIG      0x40
 169
 170 /*
 171  * Not currently used:
 172  * REG_MAN_ID has the value 0x5ca3 for all supported chips.
 173  * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
 174  * REG_MAN_ID is at port 0x4f
 175  * REG_CHIP_ID is at port 0x58
 176  */
 177
 178 #define NUM_TEMP        10      /* Max number of temp attribute sets w/ limits*/
 179 #define NUM_TEMP_FIXED  6       /* Max number of fixed temp attribute sets */
 180
 181 #define NUM_REG_ALARM   7       /* Max number of alarm registers */
 182 #define NUM_REG_BEEP    5       /* Max number of beep registers */
 183
 184 #define NUM_FAN         6
 185
 186 /* Common and NCT6775 specific data */
 187
 188 /* Voltage min/max registers for nr=7..14 are in bank 5 */
 189
 190 static const u16 NCT6775_REG_IN_MAX[] = {
 191         0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
 192         0x55c, 0x55e, 0x560, 0x562 };
 193 static const u16 NCT6775_REG_IN_MIN[] = {
 194         0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
 195         0x55d, 0x55f, 0x561, 0x563 };
 196 static const u16 NCT6775_REG_IN[] = {
 197         0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
 198 };
 199
 200 #define NCT6775_REG_VBAT                0x5D
 201 #define NCT6775_REG_DIODE               0x5E
 202 #define NCT6775_DIODE_MASK              0x02
 203
 204 #define NCT6775_REG_FANDIV1             0x506
 205 #define NCT6775_REG_FANDIV2             0x507
 206
 207 #define NCT6775_REG_CR_FAN_DEBOUNCE     0xf0
 208
 209 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
 210
 211 /* 0..15 voltages, 16..23 fans, 24..29 temperatures, 30..31 intrusion */
 212
 213 static const s8 NCT6775_ALARM_BITS[] = {
 214         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 215         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 216         -1,                             /* unused */
 217         6, 7, 11, -1, -1,               /* fan1..fan5 */
 218         -1, -1, -1,                     /* unused */
 219         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 220         12, -1 };                       /* intrusion0, intrusion1 */
 221
 222 #define FAN_ALARM_BASE          16
 223 #define TEMP_ALARM_BASE         24
 224 #define INTRUSION_ALARM_BASE    30
 225
 226 static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e };
 227
 228 /*
 229  * 0..14 voltages, 15 global beep enable, 16..23 fans, 24..29 temperatures,
 230  * 30..31 intrusion
 231  */
 232 static const s8 NCT6775_BEEP_BITS[] = {
 233         0, 1, 2, 3, 8, 9, 10, 16,       /* in0.. in7 */
 234         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 235         21,                             /* global beep enable */
 236         6, 7, 11, 28, -1,               /* fan1..fan5 */
 237         -1, -1, -1,                     /* unused */
 238         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 239         12, -1 };                       /* intrusion0, intrusion1 */
 240
 241 #define BEEP_ENABLE_BASE                15
 242
 243 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
 244 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
 245
 246 /* DC or PWM output fan configuration */
 247 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
 248 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
 249
 250 /* Advanced Fan control, some values are common for all fans */
 251
 252 static const u16 NCT6775_REG_TARGET[] = {
 253         0x101, 0x201, 0x301, 0x801, 0x901, 0xa01 };
 254 static const u16 NCT6775_REG_FAN_MODE[] = {
 255         0x102, 0x202, 0x302, 0x802, 0x902, 0xa02 };
 256 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
 257         0x103, 0x203, 0x303, 0x803, 0x903, 0xa03 };
 258 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
 259         0x104, 0x204, 0x304, 0x804, 0x904, 0xa04 };
 260 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
 261         0x105, 0x205, 0x305, 0x805, 0x905, 0xa05 };
 262 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = {
 263         0x106, 0x206, 0x306, 0x806, 0x906, 0xa06 };
 264 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
 265 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
 266
 267 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
 268         0x107, 0x207, 0x307, 0x807, 0x907, 0xa07 };
 269 static const u16 NCT6775_REG_PWM[] = {
 270         0x109, 0x209, 0x309, 0x809, 0x909, 0xa09 };
 271 static const u16 NCT6775_REG_PWM_READ[] = {
 272         0x01, 0x03, 0x11, 0x13, 0x15, 0xa09 };
 273
 274 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
 275 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
 276 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
 277 static const u16 NCT6775_FAN_PULSE_SHIFT[] = { 0, 0, 0, 0, 0, 0 };
 278
 279 static const u16 NCT6775_REG_TEMP[] = {
 280         0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
 281
 282 static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77 };
 283
 284 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 285         0, 0x152, 0x252, 0x628, 0x629, 0x62A };
 286 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 287         0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
 288 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 289         0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
 290
 291 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 292         0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
 293
 294 static const u16 NCT6775_REG_TEMP_SEL[] = {
 295         0x100, 0x200, 0x300, 0x800, 0x900, 0xa00 };
 296
 297 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
 298         0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 };
 299 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
 300         0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a };
 301 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
 302         0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b };
 303 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
 304         0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c };
 305 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
 306         0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d };
 307
 308 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
 309
 310 static const u16 NCT6775_REG_AUTO_TEMP[] = {
 311         0x121, 0x221, 0x321, 0x821, 0x921, 0xa21 };
 312 static const u16 NCT6775_REG_AUTO_PWM[] = {
 313         0x127, 0x227, 0x327, 0x827, 0x927, 0xa27 };
 314
 315 #define NCT6775_AUTO_TEMP(data, nr, p)  ((data)->REG_AUTO_TEMP[nr] + (p))
 316 #define NCT6775_AUTO_PWM(data, nr, p)   ((data)->REG_AUTO_PWM[nr] + (p))
 317
 318 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
 319
 320 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
 321         0x135, 0x235, 0x335, 0x835, 0x935, 0xa35 };
 322 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
 323         0x138, 0x238, 0x338, 0x838, 0x938, 0xa38 };
 324
 325 static const char *const nct6775_temp_label[] = {
 326         "",
 327         "SYSTIN",
 328         "CPUTIN",
 329         "AUXTIN",
 330         "AMD SB-TSI",
 331         "PECI Agent 0",
 332         "PECI Agent 1",
 333         "PECI Agent 2",
 334         "PECI Agent 3",
 335         "PECI Agent 4",
 336         "PECI Agent 5",
 337         "PECI Agent 6",
 338         "PECI Agent 7",
 339         "PCH_CHIP_CPU_MAX_TEMP",
 340         "PCH_CHIP_TEMP",
 341         "PCH_CPU_TEMP",
 342         "PCH_MCH_TEMP",
 343         "PCH_DIM0_TEMP",
 344         "PCH_DIM1_TEMP",
 345         "PCH_DIM2_TEMP",
 346         "PCH_DIM3_TEMP"
 347 };
 348
 349 static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
 350         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
 351
 352 static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
 353         = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
 354             0xa07 };
 355
 356 /* NCT6776 specific data */
 357
 358 static const s8 NCT6776_ALARM_BITS[] = {
 359         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 360         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 361         -1,                             /* unused */
 362         6, 7, 11, 10, 23,               /* fan1..fan5 */
 363         -1, -1, -1,                     /* unused */
 364         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 365         12, 9 };                        /* intrusion0, intrusion1 */
 366
 367 static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5 };
 368
 369 static const s8 NCT6776_BEEP_BITS[] = {
 370         0, 1, 2, 3, 4, 5, 6, 7,         /* in0.. in7 */
 371         8, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 372         24,                             /* global beep enable */
 373         25, 26, 27, 28, 29,             /* fan1..fan5 */
 374         -1, -1, -1,                     /* unused */
 375         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 376         30, 31 };                       /* intrusion0, intrusion1 */
 377
 378 static const u16 NCT6776_REG_TOLERANCE_H[] = {
 379         0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c };
 380
 381 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0 };
 382 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0 };
 383
 384 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
 385 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
 386
 387 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
 388         0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e };
 389
 390 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 391         0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
 392
 393 static const char *const nct6776_temp_label[] = {
 394         "",
 395         "SYSTIN",
 396         "CPUTIN",
 397         "AUXTIN",
 398         "SMBUSMASTER 0",
 399         "SMBUSMASTER 1",
 400         "SMBUSMASTER 2",
 401         "SMBUSMASTER 3",
 402         "SMBUSMASTER 4",
 403         "SMBUSMASTER 5",
 404         "SMBUSMASTER 6",
 405         "SMBUSMASTER 7",
 406         "PECI Agent 0",
 407         "PECI Agent 1",
 408         "PCH_CHIP_CPU_MAX_TEMP",
 409         "PCH_CHIP_TEMP",
 410         "PCH_CPU_TEMP",
 411         "PCH_MCH_TEMP",
 412         "PCH_DIM0_TEMP",
 413         "PCH_DIM1_TEMP",
 414         "PCH_DIM2_TEMP",
 415         "PCH_DIM3_TEMP",
 416         "BYTE_TEMP"
 417 };
 418
 419 static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
 420         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
 421
 422 static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
 423         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
 424
 425 /* NCT6779 specific data */
 426
 427 static const u16 NCT6779_REG_IN[] = {
 428         0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
 429         0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
 430
 431 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
 432         0x459, 0x45A, 0x45B, 0x568 };
 433
 434 static const s8 NCT6779_ALARM_BITS[] = {
 435         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 436         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 437         -1,                             /* unused */
 438         6, 7, 11, 10, 23,               /* fan1..fan5 */
 439         -1, -1, -1,                     /* unused */
 440         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 441         12, 9 };                        /* intrusion0, intrusion1 */
 442
 443 static const s8 NCT6779_BEEP_BITS[] = {
 444         0, 1, 2, 3, 4, 5, 6, 7,         /* in0.. in7 */
 445         8, 9, 10, 11, 12, 13, 14,       /* in8..in14 */
 446         24,                             /* global beep enable */
 447         25, 26, 27, 28, 29,             /* fan1..fan5 */
 448         -1, -1, -1,                     /* unused */
 449         16, 17, -1, -1, -1, -1,         /* temp1..temp6 */
 450         30, 31 };                       /* intrusion0, intrusion1 */
 451
 452 static const u16 NCT6779_REG_FAN[] = {
 453         0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8, 0x4ba };
 454 static const u16 NCT6779_REG_FAN_PULSES[] = {
 455         0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
 456
 457 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
 458         0x136, 0x236, 0x336, 0x836, 0x936, 0xa36 };
 459 #define NCT6779_CRITICAL_PWM_ENABLE_MASK        0x01
 460 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
 461         0x137, 0x237, 0x337, 0x837, 0x937, 0xa37 };
 462
 463 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
 464 static const u16 NCT6779_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b };
 465 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 466         0x18, 0x152 };
 467 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 468         0x3a, 0x153 };
 469 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 470         0x39, 0x155 };
 471
 472 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
 473         0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
 474
 475 static const char *const nct6779_temp_label[] = {
 476         "",
 477         "SYSTIN",
 478         "CPUTIN",
 479         "AUXTIN0",
 480         "AUXTIN1",
 481         "AUXTIN2",
 482         "AUXTIN3",
 483         "",
 484         "SMBUSMASTER 0",
 485         "SMBUSMASTER 1",
 486         "SMBUSMASTER 2",
 487         "SMBUSMASTER 3",
 488         "SMBUSMASTER 4",
 489         "SMBUSMASTER 5",
 490         "SMBUSMASTER 6",
 491         "SMBUSMASTER 7",
 492         "PECI Agent 0",
 493         "PECI Agent 1",
 494         "PCH_CHIP_CPU_MAX_TEMP",
 495         "PCH_CHIP_TEMP",
 496         "PCH_CPU_TEMP",
 497         "PCH_MCH_TEMP",
 498         "PCH_DIM0_TEMP",
 499         "PCH_DIM1_TEMP",
 500         "PCH_DIM2_TEMP",
 501         "PCH_DIM3_TEMP",
 502         "BYTE_TEMP"
 503 };
 504
 505 static const u16 NCT6779_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6779_temp_label) - 1]
 506         = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
 507             0, 0, 0, 0, 0, 0, 0, 0,
 508             0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
 509             0x408, 0 };
 510
 511 static const u16 NCT6779_REG_TEMP_CRIT[ARRAY_SIZE(nct6779_temp_label) - 1]
 512         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
 513
 514 /* NCT6791 specific data */
 515
 516 #define NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE     0x28
 517
 518 static const u16 NCT6791_REG_WEIGHT_TEMP_SEL[6] = { 0, 0x239 };
 519 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP[6] = { 0, 0x23a };
 520 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP_TOL[6] = { 0, 0x23b };
 521 static const u16 NCT6791_REG_WEIGHT_DUTY_STEP[6] = { 0, 0x23c };
 522 static const u16 NCT6791_REG_WEIGHT_TEMP_BASE[6] = { 0, 0x23d };
 523 static const u16 NCT6791_REG_WEIGHT_DUTY_BASE[6] = { 0, 0x23e };
 524
 525 static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = {
 526         0x459, 0x45A, 0x45B, 0x568, 0x45D };
 527
 528 static const s8 NCT6791_ALARM_BITS[] = {
 529         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 530         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 531         -1,                             /* unused */
 532         6, 7, 11, 10, 23, 33,           /* fan1..fan6 */
 533         -1, -1,                         /* unused */
 534         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 535         12, 9 };                        /* intrusion0, intrusion1 */
 536
 537 /* NCT6792 specific data */
 538
 539 static const u16 NCT6792_REG_TEMP_MON[] = {
 540         0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d };
 541 static const u16 NCT6792_REG_BEEP[NUM_REG_BEEP] = {
 542         0xb2, 0xb3, 0xb4, 0xb5, 0xbf };
 543
 544 /* NCT6102D/NCT6106D specific data */
 545
 546 #define NCT6106_REG_VBAT        0x318
 547 #define NCT6106_REG_DIODE       0x319
 548 #define NCT6106_DIODE_MASK      0x01
 549
 550 static const u16 NCT6106_REG_IN_MAX[] = {
 551         0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
 552 static const u16 NCT6106_REG_IN_MIN[] = {
 553         0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
 554 static const u16 NCT6106_REG_IN[] = {
 555         0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
 556
 557 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
 558 static const u16 NCT6106_REG_TEMP_MON[] = { 0x18, 0x19, 0x1a };
 559 static const u16 NCT6106_REG_TEMP_HYST[] = {
 560         0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
 561 static const u16 NCT6106_REG_TEMP_OVER[] = {
 562         0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
 563 static const u16 NCT6106_REG_TEMP_CRIT_L[] = {
 564         0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
 565 static const u16 NCT6106_REG_TEMP_CRIT_H[] = {
 566         0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
 567 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
 568 static const u16 NCT6106_REG_TEMP_CONFIG[] = {
 569         0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
 570
 571 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
 572 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
 573 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0, 0 };
 574 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4, 0, 0 };
 575
 576 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
 577 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
 578 static const u16 NCT6106_REG_PWM[] = { 0x119, 0x129, 0x139 };
 579 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c };
 580 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
 581 static const u16 NCT6106_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130 };
 582 static const u16 NCT6106_REG_TEMP_SOURCE[] = {
 583         0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
 584
 585 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
 586 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = {
 587         0x11b, 0x12b, 0x13b };
 588
 589 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
 590 #define NCT6106_CRITICAL_PWM_ENABLE_MASK        0x10
 591 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
 592
 593 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
 594 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
 595 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
 596 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
 597 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
 598 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
 599
 600 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
 601
 602 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
 603 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
 604 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
 605 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x17c };
 606 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
 607 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
 608
 609 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
 610 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
 611
 612 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = {
 613         0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
 614
 615 static const s8 NCT6106_ALARM_BITS[] = {
 616         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 617         9, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 618         -1,                             /* unused */
 619         32, 33, 34, -1, -1,             /* fan1..fan5 */
 620         -1, -1, -1,                     /* unused */
 621         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 622         48, -1                          /* intrusion0, intrusion1 */
 623 };
 624
 625 static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = {
 626         0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 };
 627
 628 static const s8 NCT6106_BEEP_BITS[] = {
 629         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 630         9, 10, 11, 12, -1, -1, -1,      /* in8..in14 */
 631         32,                             /* global beep enable */
 632         24, 25, 26, 27, 28,             /* fan1..fan5 */
 633         -1, -1, -1,                     /* unused */
 634         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 635         34, -1                          /* intrusion0, intrusion1 */
 636 };
 637
 638 static const u16 NCT6106_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
 639         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x51, 0x52, 0x54 };
 640
 641 static const u16 NCT6106_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
 642         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x204, 0x205 };
 643
 644 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
 645 {
 646         if (mode == 0 && pwm == 255)
 647                 return off;
 648         return mode + 1;
 649 }
 650
 651 static int pwm_enable_to_reg(enum pwm_enable mode)
 652 {
 653         if (mode == off)
 654                 return 0;
 655         return mode - 1;
 656 }
 657
 658 /*
 659  * Conversions
 660  */
 661
 662 /* 1 is DC mode, output in ms */
 663 static unsigned int step_time_from_reg(u8 reg, u8 mode)
 664 {
 665         return mode ? 400 * reg : 100 * reg;
 666 }
 667
 668 static u8 step_time_to_reg(unsigned int msec, u8 mode)
 669 {
 670         return clamp_val((mode ? (msec + 200) / 400 :
 671                                         (msec + 50) / 100), 1, 255);
 672 }
 673
 674 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
 675 {
 676         if (reg == 0 || reg == 255)
 677                 return 0;
 678         return 1350000U / (reg << divreg);
 679 }
 680
 681 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
 682 {
 683         if ((reg & 0xff1f) == 0xff1f)
 684                 return 0;
 685
 686         reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
 687
 688         if (reg == 0)
 689                 return 0;
 690
 691         return 1350000U / reg;
 692 }
 693
 694 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
 695 {
 696         if (reg == 0 || reg == 0xffff)
 697                 return 0;
 698
 699         /*
 700          * Even though the registers are 16 bit wide, the fan divisor
 701          * still applies.
 702          */
 703         return 1350000U / (reg << divreg);
 704 }
 705
 706 static u16 fan_to_reg(u32 fan, unsigned int divreg)
 707 {
 708         if (!fan)
 709                 return 0;
 710
 711         return (1350000U / fan) >> divreg;
 712 }
 713
 714 static inline unsigned int
 715 div_from_reg(u8 reg)
 716 {
 717         return 1 << reg;
 718 }
 719
 720 /*
 721  * Some of the voltage inputs have internal scaling, the tables below
 722  * contain 8 (the ADC LSB in mV) * scaling factor * 100
 723  */
 724 static const u16 scale_in[15] = {
 725         800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
 726         800, 800
 727 };
 728
 729 static inline long in_from_reg(u8 reg, u8 nr)
 730 {
 731         return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
 732 }
 733
 734 static inline u8 in_to_reg(u32 val, u8 nr)
 735 {
 736         return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
 737 }
 738
 739 /*
 740  * Data structures and manipulation thereof
 741  */
 742
 743 struct nct6775_data {
 744         int addr;       /* IO base of hw monitor block */
 745         int sioreg;     /* SIO register address */
 746         enum kinds kind;
 747         const char *name;
 748
 749 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
 750         struct device *hwmon_dev;
 751 #endif
 752
 753         const struct attribute_group *groups[6];
 754
 755         u16 reg_temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 756                                     * 3=temp_crit, 4=temp_lcrit
 757                                     */
 758         u8 temp_src[NUM_TEMP];
 759         u16 reg_temp_config[NUM_TEMP];
 760         const char * const *temp_label;
 761         int temp_label_num;
 762
 763         u16 REG_CONFIG;
 764         u16 REG_VBAT;
 765         u16 REG_DIODE;
 766         u8 DIODE_MASK;
 767
 768         const s8 *ALARM_BITS;
 769         const s8 *BEEP_BITS;
 770
 771         const u16 *REG_VIN;
 772         const u16 *REG_IN_MINMAX[2];
 773
 774         const u16 *REG_TARGET;
 775         const u16 *REG_FAN;
 776         const u16 *REG_FAN_MODE;
 777         const u16 *REG_FAN_MIN;
 778         const u16 *REG_FAN_PULSES;
 779         const u16 *FAN_PULSE_SHIFT;
 780         const u16 *REG_FAN_TIME[3];
 781
 782         const u16 *REG_TOLERANCE_H;
 783
 784         const u8 *REG_PWM_MODE;
 785         const u8 *PWM_MODE_MASK;
 786
 787         const u16 *REG_PWM[7];  /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 788                                  * [3]=pwm_max, [4]=pwm_step,
 789                                  * [5]=weight_duty_step, [6]=weight_duty_base
 790                                  */
 791         const u16 *REG_PWM_READ;
 792
 793         const u16 *REG_CRITICAL_PWM_ENABLE;
 794         u8 CRITICAL_PWM_ENABLE_MASK;
 795         const u16 *REG_CRITICAL_PWM;
 796
 797         const u16 *REG_AUTO_TEMP;
 798         const u16 *REG_AUTO_PWM;
 799
 800         const u16 *REG_CRITICAL_TEMP;
 801         const u16 *REG_CRITICAL_TEMP_TOLERANCE;
 802
 803         const u16 *REG_TEMP_SOURCE;     /* temp register sources */
 804         const u16 *REG_TEMP_SEL;
 805         const u16 *REG_WEIGHT_TEMP_SEL;
 806         const u16 *REG_WEIGHT_TEMP[3];  /* 0=base, 1=tolerance, 2=step */
 807
 808         const u16 *REG_TEMP_OFFSET;
 809
 810         const u16 *REG_ALARM;
 811         const u16 *REG_BEEP;
 812
 813         unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
 814         unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
 815
 816         struct mutex update_lock;
 817         bool valid;             /* true if following fields are valid */
 818         unsigned long last_updated;     /* In jiffies */
 819
 820         /* Register values */
 821         u8 bank;                /* current register bank */
 822         u8 in_num;              /* number of in inputs we have */
 823         u8 in[15][3];           /* [0]=in, [1]=in_max, [2]=in_min */
 824         unsigned int rpm[NUM_FAN];
 825         u16 fan_min[NUM_FAN];
 826         u8 fan_pulses[NUM_FAN];
 827         u8 fan_div[NUM_FAN];
 828         u8 has_pwm;
 829         u8 has_fan;             /* some fan inputs can be disabled */
 830         u8 has_fan_min;         /* some fans don't have min register */
 831         bool has_fan_div;
 832
 833         u8 num_temp_alarms;     /* 2, 3, or 6 */
 834         u8 num_temp_beeps;      /* 2, 3, or 6 */
 835         u8 temp_fixed_num;      /* 3 or 6 */
 836         u8 temp_type[NUM_TEMP_FIXED];
 837         s8 temp_offset[NUM_TEMP_FIXED];
 838         s16 temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 839                                 * 3=temp_crit, 4=temp_lcrit */
 840         u64 alarms;
 841         u64 beeps;
 842
 843         u8 pwm_num;     /* number of pwm */
 844         u8 pwm_mode[NUM_FAN];   /* 1->DC variable voltage,
 845                                  * 0->PWM variable duty cycle
 846                                  */
 847         enum pwm_enable pwm_enable[NUM_FAN];
 848                         /* 0->off
 849                          * 1->manual
 850                          * 2->thermal cruise mode (also called SmartFan I)
 851                          * 3->fan speed cruise mode
 852                          * 4->SmartFan III
 853                          * 5->enhanced variable thermal cruise (SmartFan IV)
 854                          */
 855         u8 pwm[7][NUM_FAN];     /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 856                                  * [3]=pwm_max, [4]=pwm_step,
 857                                  * [5]=weight_duty_step, [6]=weight_duty_base
 858                                  */
 859
 860         u8 target_temp[NUM_FAN];
 861         u8 target_temp_mask;
 862         u32 target_speed[NUM_FAN];
 863         u32 target_speed_tolerance[NUM_FAN];
 864         u8 speed_tolerance_limit;
 865
 866         u8 temp_tolerance[2][NUM_FAN];
 867         u8 tolerance_mask;
 868
 869         u8 fan_time[3][NUM_FAN]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
 870
 871         /* Automatic fan speed control registers */
 872         int auto_pwm_num;
 873         u8 auto_pwm[NUM_FAN][7];
 874         u8 auto_temp[NUM_FAN][7];
 875         u8 pwm_temp_sel[NUM_FAN];
 876         u8 pwm_weight_temp_sel[NUM_FAN];
 877         u8 weight_temp[3][NUM_FAN];     /* 0->temp_step, 1->temp_step_tol,
 878                                          * 2->temp_base
 879                                          */
 880
 881         u8 vid;
 882         u8 vrm;
 883
 884         bool have_vid;
 885
 886         u16 have_temp;
 887         u16 have_temp_fixed;
 888         u16 have_in;
 889 #ifdef CONFIG_PM
 890         /* Remember extra register values over suspend/resume */
 891         u8 vbat;
 892         u8 fandiv1;
 893         u8 fandiv2;
 894         u8 sio_enable;
 895 #endif
 896 };
 897
 898 struct nct6775_sio_data {
 899         int sioreg;
 900         enum kinds kind;
 901 };
 902
 903 struct sensor_device_template {
 904         struct device_attribute dev_attr;
 905         union {
 906                 struct {
 907                         u8 nr;
 908                         u8 index;
 909                 } s;
 910                 int index;
 911         } u;
 912         bool s2;        /* true if both index and nr are used */
 913 };
 914
 915 struct sensor_device_attr_u {
 916         union {
 917                 struct sensor_device_attribute a1;
 918                 struct sensor_device_attribute_2 a2;
 919         } u;
 920         char name[32];
 921 };
 922
 923 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) {      \
 924         .attr = {.name = _template, .mode = _mode },            \
 925         .show   = _show,                                        \
 926         .store  = _store,                                       \
 927 }
 928
 929 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \
 930         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
 931           .u.index = _index,                                            \
 932           .s2 = false }
 933
 934 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,       \
 935                                  _nr, _index)                           \
 936         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
 937           .u.s.index = _index,                                          \
 938           .u.s.nr = _nr,                                                \
 939           .s2 = true }
 940
 941 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
 942 static struct sensor_device_template sensor_dev_template_##_name        \
 943         = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store,       \
 944                                  _index)
 945
 946 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store,       \
 947                           _nr, _index)                                  \
 948 static struct sensor_device_template sensor_dev_template_##_name        \
 949         = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,     \
 950                                  _nr, _index)
 951
 952 struct sensor_template_group {
 953         struct sensor_device_template **templates;
 954         umode_t (*is_visible)(struct kobject *, struct attribute *, int);
 955         int base;
 956 };
 957
 958 static struct attribute_group *
 959 nct6775_create_attr_group(struct device *dev, struct sensor_template_group *tg,
 960                           int repeat)
 961 {
 962         struct attribute_group *group;
 963         struct sensor_device_attr_u *su;
 964         struct sensor_device_attribute *a;
 965         struct sensor_device_attribute_2 *a2;
 966         struct attribute **attrs;
 967         struct sensor_device_template **t;
 968         int i, count;
 969
 970         if (repeat <= 0)
 971                 return ERR_PTR(-EINVAL);
 972
 973         t = tg->templates;
 974         for (count = 0; *t; t++, count++)
 975                 ;
 976
 977         if (count == 0)
 978                 return ERR_PTR(-EINVAL);
 979
 980         group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
 981         if (group == NULL)
 982                 return ERR_PTR(-ENOMEM);
 983
 984         attrs = devm_kzalloc(dev, sizeof(*attrs) * (repeat * count + 1),
 985                              GFP_KERNEL);
 986         if (attrs == NULL)
 987                 return ERR_PTR(-ENOMEM);
 988
 989         su = devm_kzalloc(dev, sizeof(*su) * repeat * count,
 990                                GFP_KERNEL);
 991         if (su == NULL)
 992                 return ERR_PTR(-ENOMEM);
 993
 994         group->attrs = attrs;
 995         group->is_visible = tg->is_visible;
 996
 997         for (i = 0; i < repeat; i++) {
 998                 t = tg->templates;
 999                 while (*t != NULL) {
1000                         snprintf(su->name, sizeof(su->name),
1001                                  (*t)->dev_attr.attr.name, tg->base + i);
1002                         if ((*t)->s2) {
1003                                 a2 = &su->u.a2;
1004                                 a2->dev_attr.attr.name = su->name;
1005                                 a2->nr = (*t)->u.s.nr + i;
1006                                 a2->index = (*t)->u.s.index;
1007                                 a2->dev_attr.attr.mode =
1008                                   (*t)->dev_attr.attr.mode;
1009                                 a2->dev_attr.show = (*t)->dev_attr.show;
1010                                 a2->dev_attr.store = (*t)->dev_attr.store;
1011                                 *attrs = &a2->dev_attr.attr;
1012                         } else {
1013                                 a = &su->u.a1;
1014                                 a->dev_attr.attr.name = su->name;
1015                                 a->index = (*t)->u.index + i;
1016                                 a->dev_attr.attr.mode =
1017                                   (*t)->dev_attr.attr.mode;
1018                                 a->dev_attr.show = (*t)->dev_attr.show;
1019                                 a->dev_attr.store = (*t)->dev_attr.store;
1020                                 *attrs = &a->dev_attr.attr;
1021                         }
1022                         attrs++;
1023                         su++;
1024                         t++;
1025                 }
1026         }
1027
1028         return group;
1029 }
1030
1031 static bool is_word_sized(struct nct6775_data *data, u16 reg)
1032 {
1033         switch (data->kind) {
1034         case nct6106:
1035                 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1036                   reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
1037                   reg == 0x111 || reg == 0x121 || reg == 0x131;
1038         case nct6775:
1039                 return (((reg & 0xff00) == 0x100 ||
1040                     (reg & 0xff00) == 0x200) &&
1041                    ((reg & 0x00ff) == 0x50 ||
1042                     (reg & 0x00ff) == 0x53 ||
1043                     (reg & 0x00ff) == 0x55)) ||
1044                   (reg & 0xfff0) == 0x630 ||
1045                   reg == 0x640 || reg == 0x642 ||
1046                   reg == 0x662 ||
1047                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1048                   reg == 0x73 || reg == 0x75 || reg == 0x77;
1049         case nct6776:
1050                 return (((reg & 0xff00) == 0x100 ||
1051                     (reg & 0xff00) == 0x200) &&
1052                    ((reg & 0x00ff) == 0x50 ||
1053                     (reg & 0x00ff) == 0x53 ||
1054                     (reg & 0x00ff) == 0x55)) ||
1055                   (reg & 0xfff0) == 0x630 ||
1056                   reg == 0x402 ||
1057                   reg == 0x640 || reg == 0x642 ||
1058                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1059                   reg == 0x73 || reg == 0x75 || reg == 0x77;
1060         case nct6779:
1061         case nct6791:
1062         case nct6792:
1063                 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
1064                   ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x0b) ||
1065                   reg == 0x402 ||
1066                   reg == 0x63a || reg == 0x63c || reg == 0x63e ||
1067                   reg == 0x640 || reg == 0x642 ||
1068                   reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
1069                   reg == 0x7b || reg == 0x7d;
1070         }
1071         return false;
1072 }
1073
1074 /*
1075  * On older chips, only registers 0x50-0x5f are banked.
1076  * On more recent chips, all registers are banked.
1077  * Assume that is the case and set the bank number for each access.
1078  * Cache the bank number so it only needs to be set if it changes.
1079  */
1080 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
1081 {
1082         u8 bank = reg >> 8;
1083
1084         if (data->bank != bank) {
1085                 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
1086                 outb_p(bank, data->addr + DATA_REG_OFFSET);
1087                 data->bank = bank;
1088         }
1089 }
1090
1091 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
1092 {
1093         int res, word_sized = is_word_sized(data, reg);
1094
1095         nct6775_set_bank(data, reg);
1096         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1097         res = inb_p(data->addr + DATA_REG_OFFSET);
1098         if (word_sized) {
1099                 outb_p((reg & 0xff) + 1,
1100                        data->addr + ADDR_REG_OFFSET);
1101                 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
1102         }
1103         return res;
1104 }
1105
1106 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
1107 {
1108         int word_sized = is_word_sized(data, reg);
1109
1110         nct6775_set_bank(data, reg);
1111         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1112         if (word_sized) {
1113                 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
1114                 outb_p((reg & 0xff) + 1,
1115                        data->addr + ADDR_REG_OFFSET);
1116         }
1117         outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
1118         return 0;
1119 }
1120
1121 /* We left-align 8-bit temperature values to make the code simpler */
1122 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
1123 {
1124         u16 res;
1125
1126         res = nct6775_read_value(data, reg);
1127         if (!is_word_sized(data, reg))
1128                 res <<= 8;
1129
1130         return res;
1131 }
1132
1133 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
1134 {
1135         if (!is_word_sized(data, reg))
1136                 value >>= 8;
1137         return nct6775_write_value(data, reg, value);
1138 }
1139
1140 /* This function assumes that the caller holds data->update_lock */
1141 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
1142 {
1143         u8 reg;
1144
1145         switch (nr) {
1146         case 0:
1147                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
1148                     | (data->fan_div[0] & 0x7);
1149                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1150                 break;
1151         case 1:
1152                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
1153                     | ((data->fan_div[1] << 4) & 0x70);
1154                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1155                 break;
1156         case 2:
1157                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
1158                     | (data->fan_div[2] & 0x7);
1159                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1160                 break;
1161         case 3:
1162                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
1163                     | ((data->fan_div[3] << 4) & 0x70);
1164                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1165                 break;
1166         }
1167 }
1168
1169 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
1170 {
1171         if (data->kind == nct6775)
1172                 nct6775_write_fan_div(data, nr);
1173 }
1174
1175 static void nct6775_update_fan_div(struct nct6775_data *data)
1176 {
1177         u8 i;
1178
1179         i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
1180         data->fan_div[0] = i & 0x7;
1181         data->fan_div[1] = (i & 0x70) >> 4;
1182         i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
1183         data->fan_div[2] = i & 0x7;
1184         if (data->has_fan & (1 << 3))
1185                 data->fan_div[3] = (i & 0x70) >> 4;
1186 }
1187
1188 static void nct6775_update_fan_div_common(struct nct6775_data *data)
1189 {
1190         if (data->kind == nct6775)
1191                 nct6775_update_fan_div(data);
1192 }
1193
1194 static void nct6775_init_fan_div(struct nct6775_data *data)
1195 {
1196         int i;
1197
1198         nct6775_update_fan_div_common(data);
1199         /*
1200          * For all fans, start with highest divider value if the divider
1201          * register is not initialized. This ensures that we get a
1202          * reading from the fan count register, even if it is not optimal.
1203          * We'll compute a better divider later on.
1204          */
1205         for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
1206                 if (!(data->has_fan & (1 << i)))
1207                         continue;
1208                 if (data->fan_div[i] == 0) {
1209                         data->fan_div[i] = 7;
1210                         nct6775_write_fan_div_common(data, i);
1211                 }
1212         }
1213 }
1214
1215 static void nct6775_init_fan_common(struct device *dev,
1216                                     struct nct6775_data *data)
1217 {
1218         int i;
1219         u8 reg;
1220
1221         if (data->has_fan_div)
1222                 nct6775_init_fan_div(data);
1223
1224         /*
1225          * If fan_min is not set (0), set it to 0xff to disable it. This
1226          * prevents the unnecessary warning when fanX_min is reported as 0.
1227          */
1228         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1229                 if (data->has_fan_min & (1 << i)) {
1230                         reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
1231                         if (!reg)
1232                                 nct6775_write_value(data, data->REG_FAN_MIN[i],
1233                                                     data->has_fan_div ? 0xff
1234                                                                       : 0xff1f);
1235                 }
1236         }
1237 }
1238
1239 static void nct6775_select_fan_div(struct device *dev,
1240                                    struct nct6775_data *data, int nr, u16 reg)
1241 {
1242         u8 fan_div = data->fan_div[nr];
1243         u16 fan_min;
1244
1245         if (!data->has_fan_div)
1246                 return;
1247
1248         /*
1249          * If we failed to measure the fan speed, or the reported value is not
1250          * in the optimal range, and the clock divider can be modified,
1251          * let's try that for next time.
1252          */
1253         if (reg == 0x00 && fan_div < 0x07)
1254                 fan_div++;
1255         else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1256                 fan_div--;
1257
1258         if (fan_div != data->fan_div[nr]) {
1259                 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1260                         nr + 1, div_from_reg(data->fan_div[nr]),
1261                         div_from_reg(fan_div));
1262
1263                 /* Preserve min limit if possible */
1264                 if (data->has_fan_min & (1 << nr)) {
1265                         fan_min = data->fan_min[nr];
1266                         if (fan_div > data->fan_div[nr]) {
1267                                 if (fan_min != 255 && fan_min > 1)
1268                                         fan_min >>= 1;
1269                         } else {
1270                                 if (fan_min != 255) {
1271                                         fan_min <<= 1;
1272                                         if (fan_min > 254)
1273                                                 fan_min = 254;
1274                                 }
1275                         }
1276                         if (fan_min != data->fan_min[nr]) {
1277                                 data->fan_min[nr] = fan_min;
1278                                 nct6775_write_value(data, data->REG_FAN_MIN[nr],
1279                                                     fan_min);
1280                         }
1281                 }
1282                 data->fan_div[nr] = fan_div;
1283                 nct6775_write_fan_div_common(data, nr);
1284         }
1285 }
1286
1287 static void nct6775_update_pwm(struct device *dev)
1288 {
1289         struct nct6775_data *data = dev_get_drvdata(dev);
1290         int i, j;
1291         int fanmodecfg, reg;
1292         bool duty_is_dc;
1293
1294         for (i = 0; i < data->pwm_num; i++) {
1295                 if (!(data->has_pwm & (1 << i)))
1296                         continue;
1297
1298                 duty_is_dc = data->REG_PWM_MODE[i] &&
1299                   (nct6775_read_value(data, data->REG_PWM_MODE[i])
1300                    & data->PWM_MODE_MASK[i]);
1301                 data->pwm_mode[i] = duty_is_dc;
1302
1303                 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
1304                 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1305                         if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1306                                 data->pwm[j][i]
1307                                   = nct6775_read_value(data,
1308                                                        data->REG_PWM[j][i]);
1309                         }
1310                 }
1311
1312                 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1313                                                         (fanmodecfg >> 4) & 7);
1314
1315                 if (!data->temp_tolerance[0][i] ||
1316                     data->pwm_enable[i] != speed_cruise)
1317                         data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1318                 if (!data->target_speed_tolerance[i] ||
1319                     data->pwm_enable[i] == speed_cruise) {
1320                         u8 t = fanmodecfg & 0x0f;
1321
1322                         if (data->REG_TOLERANCE_H) {
1323                                 t |= (nct6775_read_value(data,
1324                                       data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
1325                         }
1326                         data->target_speed_tolerance[i] = t;
1327                 }
1328
1329                 data->temp_tolerance[1][i] =
1330                         nct6775_read_value(data,
1331                                         data->REG_CRITICAL_TEMP_TOLERANCE[i]);
1332
1333                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
1334                 data->pwm_temp_sel[i] = reg & 0x1f;
1335                 /* If fan can stop, report floor as 0 */
1336                 if (reg & 0x80)
1337                         data->pwm[2][i] = 0;
1338
1339                 if (!data->REG_WEIGHT_TEMP_SEL[i])
1340                         continue;
1341
1342                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
1343                 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1344                 /* If weight is disabled, report weight source as 0 */
1345                 if (j == 1 && !(reg & 0x80))
1346                         data->pwm_weight_temp_sel[i] = 0;
1347
1348                 /* Weight temp data */
1349                 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
1350                         data->weight_temp[j][i]
1351                           = nct6775_read_value(data,
1352                                                data->REG_WEIGHT_TEMP[j][i]);
1353                 }
1354         }
1355 }
1356
1357 static void nct6775_update_pwm_limits(struct device *dev)
1358 {
1359         struct nct6775_data *data = dev_get_drvdata(dev);
1360         int i, j;
1361         u8 reg;
1362         u16 reg_t;
1363
1364         for (i = 0; i < data->pwm_num; i++) {
1365                 if (!(data->has_pwm & (1 << i)))
1366                         continue;
1367
1368                 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1369                         data->fan_time[j][i] =
1370                           nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1371                 }
1372
1373                 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1374                 /* Update only in matching mode or if never updated */
1375                 if (!data->target_temp[i] ||
1376                     data->pwm_enable[i] == thermal_cruise)
1377                         data->target_temp[i] = reg_t & data->target_temp_mask;
1378                 if (!data->target_speed[i] ||
1379                     data->pwm_enable[i] == speed_cruise) {
1380                         if (data->REG_TOLERANCE_H) {
1381                                 reg_t |= (nct6775_read_value(data,
1382                                         data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1383                         }
1384                         data->target_speed[i] = reg_t;
1385                 }
1386
1387                 for (j = 0; j < data->auto_pwm_num; j++) {
1388                         data->auto_pwm[i][j] =
1389                           nct6775_read_value(data,
1390                                              NCT6775_AUTO_PWM(data, i, j));
1391                         data->auto_temp[i][j] =
1392                           nct6775_read_value(data,
1393                                              NCT6775_AUTO_TEMP(data, i, j));
1394                 }
1395
1396                 /* critical auto_pwm temperature data */
1397                 data->auto_temp[i][data->auto_pwm_num] =
1398                         nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1399
1400                 switch (data->kind) {
1401                 case nct6775:
1402                         reg = nct6775_read_value(data,
1403                                                  NCT6775_REG_CRITICAL_ENAB[i]);
1404                         data->auto_pwm[i][data->auto_pwm_num] =
1405                                                 (reg & 0x02) ? 0xff : 0x00;
1406                         break;
1407                 case nct6776:
1408                         data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1409                         break;
1410                 case nct6106:
1411                 case nct6779:
1412                 case nct6791:
1413                 case nct6792:
1414                         reg = nct6775_read_value(data,
1415                                         data->REG_CRITICAL_PWM_ENABLE[i]);
1416                         if (reg & data->CRITICAL_PWM_ENABLE_MASK)
1417                                 reg = nct6775_read_value(data,
1418                                         data->REG_CRITICAL_PWM[i]);
1419                         else
1420                                 reg = 0xff;
1421                         data->auto_pwm[i][data->auto_pwm_num] = reg;
1422                         break;
1423                 }
1424         }
1425 }
1426
1427 static struct nct6775_data *nct6775_update_device(struct device *dev)
1428 {
1429         struct nct6775_data *data = dev_get_drvdata(dev);
1430         int i, j;
1431
1432         mutex_lock(&data->update_lock);
1433
1434         if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1435             || !data->valid) {
1436                 /* Fan clock dividers */
1437                 nct6775_update_fan_div_common(data);
1438
1439                 /* Measured voltages and limits */
1440                 for (i = 0; i < data->in_num; i++) {
1441                         if (!(data->have_in & (1 << i)))
1442                                 continue;
1443
1444                         data->in[i][0] = nct6775_read_value(data,
1445                                                             data->REG_VIN[i]);
1446                         data->in[i][1] = nct6775_read_value(data,
1447                                           data->REG_IN_MINMAX[0][i]);
1448                         data->in[i][2] = nct6775_read_value(data,
1449                                           data->REG_IN_MINMAX[1][i]);
1450                 }
1451
1452                 /* Measured fan speeds and limits */
1453                 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
1454                         u16 reg;
1455
1456                         if (!(data->has_fan & (1 << i)))
1457                                 continue;
1458
1459                         reg = nct6775_read_value(data, data->REG_FAN[i]);
1460                         data->rpm[i] = data->fan_from_reg(reg,
1461                                                           data->fan_div[i]);
1462
1463                         if (data->has_fan_min & (1 << i))
1464                                 data->fan_min[i] = nct6775_read_value(data,
1465                                            data->REG_FAN_MIN[i]);
1466                         data->fan_pulses[i] =
1467                           (nct6775_read_value(data, data->REG_FAN_PULSES[i])
1468                                 >> data->FAN_PULSE_SHIFT[i]) & 0x03;
1469
1470                         nct6775_select_fan_div(dev, data, i, reg);
1471                 }
1472
1473                 nct6775_update_pwm(dev);
1474                 nct6775_update_pwm_limits(dev);
1475
1476                 /* Measured temperatures and limits */
1477                 for (i = 0; i < NUM_TEMP; i++) {
1478                         if (!(data->have_temp & (1 << i)))
1479                                 continue;
1480                         for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1481                                 if (data->reg_temp[j][i])
1482                                         data->temp[j][i]
1483                                           = nct6775_read_temp(data,
1484                                                 data->reg_temp[j][i]);
1485                         }
1486                         if (i >= NUM_TEMP_FIXED ||
1487                             !(data->have_temp_fixed & (1 << i)))
1488                                 continue;
1489                         data->temp_offset[i]
1490                           = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1491                 }
1492
1493                 data->alarms = 0;
1494                 for (i = 0; i < NUM_REG_ALARM; i++) {
1495                         u8 alarm;
1496
1497                         if (!data->REG_ALARM[i])
1498                                 continue;
1499                         alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1500                         data->alarms |= ((u64)alarm) << (i << 3);
1501                 }
1502
1503                 data->beeps = 0;
1504                 for (i = 0; i < NUM_REG_BEEP; i++) {
1505                         u8 beep;
1506
1507                         if (!data->REG_BEEP[i])
1508                                 continue;
1509                         beep = nct6775_read_value(data, data->REG_BEEP[i]);
1510                         data->beeps |= ((u64)beep) << (i << 3);
1511                 }
1512
1513                 data->last_updated = jiffies;
1514                 data->valid = true;
1515         }
1516
1517         mutex_unlock(&data->update_lock);
1518         return data;
1519 }
1520
1521 /*
1522  * Sysfs callback functions
1523  */
1524 static ssize_t
1525 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1526 {
1527         struct nct6775_data *data = nct6775_update_device(dev);
1528         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1529         int index = sattr->index;
1530         int nr = sattr->nr;
1531
1532         return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1533 }
1534
1535 static ssize_t
1536 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1537              size_t count)
1538 {
1539         struct nct6775_data *data = dev_get_drvdata(dev);
1540         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1541         int index = sattr->index;
1542         int nr = sattr->nr;
1543         unsigned long val;
1544         int err;
1545
1546         err = kstrtoul(buf, 10, &val);
1547         if (err < 0)
1548                 return err;
1549         mutex_lock(&data->update_lock);
1550         data->in[nr][index] = in_to_reg(val, nr);
1551         nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr],
1552                             data->in[nr][index]);
1553         mutex_unlock(&data->update_lock);
1554         return count;
1555 }
1556
1557 static ssize_t
1558 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1559 {
1560         struct nct6775_data *data = nct6775_update_device(dev);
1561         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1562         int nr = data->ALARM_BITS[sattr->index];
1563
1564         return sprintf(buf, "%u\n",
1565                        (unsigned int)((data->alarms >> nr) & 0x01));
1566 }
1567
1568 static int find_temp_source(struct nct6775_data *data, int index, int count)
1569 {
1570         int source = data->temp_src[index];
1571         int nr;
1572
1573         for (nr = 0; nr < count; nr++) {
1574                 int src;
1575
1576                 src = nct6775_read_value(data,
1577                                          data->REG_TEMP_SOURCE[nr]) & 0x1f;
1578                 if (src == source)
1579                         return nr;
1580         }
1581         return -ENODEV;
1582 }
1583
1584 static ssize_t
1585 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1586 {
1587         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1588         struct nct6775_data *data = nct6775_update_device(dev);
1589         unsigned int alarm = 0;
1590         int nr;
1591
1592         /*
1593          * For temperatures, there is no fixed mapping from registers to alarm
1594          * bits. Alarm bits are determined by the temperature source mapping.
1595          */
1596         nr = find_temp_source(data, sattr->index, data->num_temp_alarms);
1597         if (nr >= 0) {
1598                 int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE];
1599
1600                 alarm = (data->alarms >> bit) & 0x01;
1601         }
1602         return sprintf(buf, "%u\n", alarm);
1603 }
1604
1605 static ssize_t
1606 show_beep(struct device *dev, struct device_attribute *attr, char *buf)
1607 {
1608         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1609         struct nct6775_data *data = nct6775_update_device(dev);
1610         int nr = data->BEEP_BITS[sattr->index];
1611
1612         return sprintf(buf, "%u\n",
1613                        (unsigned int)((data->beeps >> nr) & 0x01));
1614 }
1615
1616 static ssize_t
1617 store_beep(struct device *dev, struct device_attribute *attr, const char *buf,
1618            size_t count)
1619 {
1620         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1621         struct nct6775_data *data = dev_get_drvdata(dev);
1622         int nr = data->BEEP_BITS[sattr->index];
1623         int regindex = nr >> 3;
1624         unsigned long val;
1625         int err;
1626
1627         err = kstrtoul(buf, 10, &val);
1628         if (err < 0)
1629                 return err;
1630         if (val > 1)
1631                 return -EINVAL;
1632
1633         mutex_lock(&data->update_lock);
1634         if (val)
1635                 data->beeps |= (1ULL << nr);
1636         else
1637                 data->beeps &= ~(1ULL << nr);
1638         nct6775_write_value(data, data->REG_BEEP[regindex],
1639                             (data->beeps >> (regindex << 3)) & 0xff);
1640         mutex_unlock(&data->update_lock);
1641         return count;
1642 }
1643
1644 static ssize_t
1645 show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf)
1646 {
1647         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1648         struct nct6775_data *data = nct6775_update_device(dev);
1649         unsigned int beep = 0;
1650         int nr;
1651
1652         /*
1653          * For temperatures, there is no fixed mapping from registers to beep
1654          * enable bits. Beep enable bits are determined by the temperature
1655          * source mapping.
1656          */
1657         nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1658         if (nr >= 0) {
1659                 int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1660
1661                 beep = (data->beeps >> bit) & 0x01;
1662         }
1663         return sprintf(buf, "%u\n", beep);
1664 }
1665
1666 static ssize_t
1667 store_temp_beep(struct device *dev, struct device_attribute *attr,
1668                 const char *buf, size_t count)
1669 {
1670         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1671         struct nct6775_data *data = dev_get_drvdata(dev);
1672         int nr, bit, regindex;
1673         unsigned long val;
1674         int err;
1675
1676         err = kstrtoul(buf, 10, &val);
1677         if (err < 0)
1678                 return err;
1679         if (val > 1)
1680                 return -EINVAL;
1681
1682         nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1683         if (nr < 0)
1684                 return nr;
1685
1686         bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1687         regindex = bit >> 3;
1688
1689         mutex_lock(&data->update_lock);
1690         if (val)
1691                 data->beeps |= (1ULL << bit);
1692         else
1693                 data->beeps &= ~(1ULL << bit);
1694         nct6775_write_value(data, data->REG_BEEP[regindex],
1695                             (data->beeps >> (regindex << 3)) & 0xff);
1696         mutex_unlock(&data->update_lock);
1697
1698         return count;
1699 }
1700
1701 static umode_t nct6775_in_is_visible(struct kobject *kobj,
1702                                      struct attribute *attr, int index)
1703 {
1704         struct device *dev = container_of(kobj, struct device, kobj);
1705         struct nct6775_data *data = dev_get_drvdata(dev);
1706         int in = index / 5;     /* voltage index */
1707
1708         if (!(data->have_in & (1 << in)))
1709                 return 0;
1710
1711         return attr->mode;
1712 }
1713
1714 SENSOR_TEMPLATE_2(in_input, "in%d_input", S_IRUGO, show_in_reg, NULL, 0, 0);
1715 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", S_IRUGO, show_alarm, NULL, 0);
1716 SENSOR_TEMPLATE(in_beep, "in%d_beep", S_IWUSR | S_IRUGO, show_beep, store_beep,
1717                 0);
1718 SENSOR_TEMPLATE_2(in_min, "in%d_min", S_IWUSR | S_IRUGO, show_in_reg,
1719                   store_in_reg, 0, 1);
1720 SENSOR_TEMPLATE_2(in_max, "in%d_max", S_IWUSR | S_IRUGO, show_in_reg,
1721                   store_in_reg, 0, 2);
1722
1723 /*
1724  * nct6775_in_is_visible uses the index into the following array
1725  * to determine if attributes should be created or not.
1726  * Any change in order or content must be matched.
1727  */
1728 static struct sensor_device_template *nct6775_attributes_in_template[] = {
1729         &sensor_dev_template_in_input,
1730         &sensor_dev_template_in_alarm,
1731         &sensor_dev_template_in_beep,
1732         &sensor_dev_template_in_min,
1733         &sensor_dev_template_in_max,
1734         NULL
1735 };
1736
1737 static struct sensor_template_group nct6775_in_template_group = {
1738         .templates = nct6775_attributes_in_template,
1739         .is_visible = nct6775_in_is_visible,
1740 };
1741
1742 static ssize_t
1743 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1744 {
1745         struct nct6775_data *data = nct6775_update_device(dev);
1746         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1747         int nr = sattr->index;
1748
1749         return sprintf(buf, "%d\n", data->rpm[nr]);
1750 }
1751
1752 static ssize_t
1753 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1754 {
1755         struct nct6775_data *data = nct6775_update_device(dev);
1756         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1757         int nr = sattr->index;
1758
1759         return sprintf(buf, "%d\n",
1760                        data->fan_from_reg_min(data->fan_min[nr],
1761                                               data->fan_div[nr]));
1762 }
1763
1764 static ssize_t
1765 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1766 {
1767         struct nct6775_data *data = nct6775_update_device(dev);
1768         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1769         int nr = sattr->index;
1770
1771         return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1772 }
1773
1774 static ssize_t
1775 store_fan_min(struct device *dev, struct device_attribute *attr,
1776               const char *buf, size_t count)
1777 {
1778         struct nct6775_data *data = dev_get_drvdata(dev);
1779         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1780         int nr = sattr->index;
1781         unsigned long val;
1782         unsigned int reg;
1783         u8 new_div;
1784         int err;
1785
1786         err = kstrtoul(buf, 10, &val);
1787         if (err < 0)
1788                 return err;
1789
1790         mutex_lock(&data->update_lock);
1791         if (!data->has_fan_div) {
1792                 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1793                 if (!val) {
1794                         val = 0xff1f;
1795                 } else {
1796                         if (val > 1350000U)
1797                                 val = 135000U;
1798                         val = 1350000U / val;
1799                         val = (val & 0x1f) | ((val << 3) & 0xff00);
1800                 }
1801                 data->fan_min[nr] = val;
1802                 goto write_min; /* Leave fan divider alone */
1803         }
1804         if (!val) {
1805                 /* No min limit, alarm disabled */
1806                 data->fan_min[nr] = 255;
1807                 new_div = data->fan_div[nr]; /* No change */
1808                 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1809                 goto write_div;
1810         }
1811         reg = 1350000U / val;
1812         if (reg >= 128 * 255) {
1813                 /*
1814                  * Speed below this value cannot possibly be represented,
1815                  * even with the highest divider (128)
1816                  */
1817                 data->fan_min[nr] = 254;
1818                 new_div = 7; /* 128 == (1 << 7) */
1819                 dev_warn(dev,
1820                          "fan%u low limit %lu below minimum %u, set to minimum\n",
1821                          nr + 1, val, data->fan_from_reg_min(254, 7));
1822         } else if (!reg) {
1823                 /*
1824                  * Speed above this value cannot possibly be represented,
1825                  * even with the lowest divider (1)
1826                  */
1827                 data->fan_min[nr] = 1;
1828                 new_div = 0; /* 1 == (1 << 0) */
1829                 dev_warn(dev,
1830                          "fan%u low limit %lu above maximum %u, set to maximum\n",
1831                          nr + 1, val, data->fan_from_reg_min(1, 0));
1832         } else {
1833                 /*
1834                  * Automatically pick the best divider, i.e. the one such
1835                  * that the min limit will correspond to a register value
1836                  * in the 96..192 range
1837                  */
1838                 new_div = 0;
1839                 while (reg > 192 && new_div < 7) {
1840                         reg >>= 1;
1841                         new_div++;
1842                 }
1843                 data->fan_min[nr] = reg;
1844         }
1845
1846 write_div:
1847         /*
1848          * Write both the fan clock divider (if it changed) and the new
1849          * fan min (unconditionally)
1850          */
1851         if (new_div != data->fan_div[nr]) {
1852                 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1853                         nr + 1, div_from_reg(data->fan_div[nr]),
1854                         div_from_reg(new_div));
1855                 data->fan_div[nr] = new_div;
1856                 nct6775_write_fan_div_common(data, nr);
1857                 /* Give the chip time to sample a new speed value */
1858                 data->last_updated = jiffies;
1859         }
1860
1861 write_min:
1862         nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1863         mutex_unlock(&data->update_lock);
1864
1865         return count;
1866 }
1867
1868 static ssize_t
1869 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
1870 {
1871         struct nct6775_data *data = nct6775_update_device(dev);
1872         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1873         int p = data->fan_pulses[sattr->index];
1874
1875         return sprintf(buf, "%d\n", p ? : 4);
1876 }
1877
1878 static ssize_t
1879 store_fan_pulses(struct device *dev, struct device_attribute *attr,
1880                  const char *buf, size_t count)
1881 {
1882         struct nct6775_data *data = dev_get_drvdata(dev);
1883         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1884         int nr = sattr->index;
1885         unsigned long val;
1886         int err;
1887         u8 reg;
1888
1889         err = kstrtoul(buf, 10, &val);
1890         if (err < 0)
1891                 return err;
1892
1893         if (val > 4)
1894                 return -EINVAL;
1895
1896         mutex_lock(&data->update_lock);
1897         data->fan_pulses[nr] = val & 3;
1898         reg = nct6775_read_value(data, data->REG_FAN_PULSES[nr]);
1899         reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
1900         reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
1901         nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
1902         mutex_unlock(&data->update_lock);
1903
1904         return count;
1905 }
1906
1907 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
1908                                       struct attribute *attr, int index)
1909 {
1910         struct device *dev = container_of(kobj, struct device, kobj);
1911         struct nct6775_data *data = dev_get_drvdata(dev);
1912         int fan = index / 6;    /* fan index */
1913         int nr = index % 6;     /* attribute index */
1914
1915         if (!(data->has_fan & (1 << fan)))
1916                 return 0;
1917
1918         if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1)
1919                 return 0;
1920         if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1)
1921                 return 0;
1922         if (nr == 4 && !(data->has_fan_min & (1 << fan)))
1923                 return 0;
1924         if (nr == 5 && data->kind != nct6775)
1925                 return 0;
1926
1927         return attr->mode;
1928 }
1929
1930 SENSOR_TEMPLATE(fan_input, "fan%d_input", S_IRUGO, show_fan, NULL, 0);
1931 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", S_IRUGO, show_alarm, NULL,
1932                 FAN_ALARM_BASE);
1933 SENSOR_TEMPLATE(fan_beep, "fan%d_beep", S_IWUSR | S_IRUGO, show_beep,
1934                 store_beep, FAN_ALARM_BASE);
1935 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", S_IWUSR | S_IRUGO, show_fan_pulses,
1936                 store_fan_pulses, 0);
1937 SENSOR_TEMPLATE(fan_min, "fan%d_min", S_IWUSR | S_IRUGO, show_fan_min,
1938                 store_fan_min, 0);
1939 SENSOR_TEMPLATE(fan_div, "fan%d_div", S_IRUGO, show_fan_div, NULL, 0);
1940
1941 /*
1942  * nct6775_fan_is_visible uses the index into the following array
1943  * to determine if attributes should be created or not.
1944  * Any change in order or content must be matched.
1945  */
1946 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
1947         &sensor_dev_template_fan_input,
1948         &sensor_dev_template_fan_alarm, /* 1 */
1949         &sensor_dev_template_fan_beep,  /* 2 */
1950         &sensor_dev_template_fan_pulses,
1951         &sensor_dev_template_fan_min,   /* 4 */
1952         &sensor_dev_template_fan_div,   /* 5 */
1953         NULL
1954 };
1955
1956 static struct sensor_template_group nct6775_fan_template_group = {
1957         .templates = nct6775_attributes_fan_template,
1958         .is_visible = nct6775_fan_is_visible,
1959         .base = 1,
1960 };
1961
1962 static ssize_t
1963 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1964 {
1965         struct nct6775_data *data = nct6775_update_device(dev);
1966         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1967         int nr = sattr->index;
1968
1969         return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1970 }
1971
1972 static ssize_t
1973 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1974 {
1975         struct nct6775_data *data = nct6775_update_device(dev);
1976         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1977         int nr = sattr->nr;
1978         int index = sattr->index;
1979
1980         return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
1981 }
1982
1983 static ssize_t
1984 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
1985            size_t count)
1986 {
1987         struct nct6775_data *data = dev_get_drvdata(dev);
1988         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1989         int nr = sattr->nr;
1990         int index = sattr->index;
1991         int err;
1992         long val;
1993
1994         err = kstrtol(buf, 10, &val);
1995         if (err < 0)
1996                 return err;
1997
1998         mutex_lock(&data->update_lock);
1999         data->temp[index][nr] = LM75_TEMP_TO_REG(val);
2000         nct6775_write_temp(data, data->reg_temp[index][nr],
2001                            data->temp[index][nr]);
2002         mutex_unlock(&data->update_lock);
2003         return count;
2004 }
2005
2006 static ssize_t
2007 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
2008 {
2009         struct nct6775_data *data = nct6775_update_device(dev);
2010         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2011
2012         return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
2013 }
2014
2015 static ssize_t
2016 store_temp_offset(struct device *dev, struct device_attribute *attr,
2017                   const char *buf, size_t count)
2018 {
2019         struct nct6775_data *data = dev_get_drvdata(dev);
2020         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2021         int nr = sattr->index;
2022         long val;
2023         int err;
2024
2025         err = kstrtol(buf, 10, &val);
2026         if (err < 0)
2027                 return err;
2028
2029         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
2030
2031         mutex_lock(&data->update_lock);
2032         data->temp_offset[nr] = val;
2033         nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
2034         mutex_unlock(&data->update_lock);
2035
2036         return count;
2037 }
2038
2039 static ssize_t
2040 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
2041 {
2042         struct nct6775_data *data = nct6775_update_device(dev);
2043         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2044         int nr = sattr->index;
2045
2046         return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
2047 }
2048
2049 static ssize_t
2050 store_temp_type(struct device *dev, struct device_attribute *attr,
2051                 const char *buf, size_t count)
2052 {
2053         struct nct6775_data *data = nct6775_update_device(dev);
2054         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2055         int nr = sattr->index;
2056         unsigned long val;
2057         int err;
2058         u8 vbat, diode, vbit, dbit;
2059
2060         err = kstrtoul(buf, 10, &val);
2061         if (err < 0)
2062                 return err;
2063
2064         if (val != 1 && val != 3 && val != 4)
2065                 return -EINVAL;
2066
2067         mutex_lock(&data->update_lock);
2068
2069         data->temp_type[nr] = val;
2070         vbit = 0x02 << nr;
2071         dbit = data->DIODE_MASK << nr;
2072         vbat = nct6775_read_value(data, data->REG_VBAT) & ~vbit;
2073         diode = nct6775_read_value(data, data->REG_DIODE) & ~dbit;
2074         switch (val) {
2075         case 1: /* CPU diode (diode, current mode) */
2076                 vbat |= vbit;
2077                 diode |= dbit;
2078                 break;
2079         case 3: /* diode, voltage mode */
2080                 vbat |= dbit;
2081                 break;
2082         case 4: /* thermistor */
2083                 break;
2084         }
2085         nct6775_write_value(data, data->REG_VBAT, vbat);
2086         nct6775_write_value(data, data->REG_DIODE, diode);
2087
2088         mutex_unlock(&data->update_lock);
2089         return count;
2090 }
2091
2092 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
2093                                        struct attribute *attr, int index)
2094 {
2095         struct device *dev = container_of(kobj, struct device, kobj);
2096         struct nct6775_data *data = dev_get_drvdata(dev);
2097         int temp = index / 10;  /* temp index */
2098         int nr = index % 10;    /* attribute index */
2099
2100         if (!(data->have_temp & (1 << temp)))
2101                 return 0;
2102
2103         if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0)
2104                 return 0;                               /* alarm */
2105
2106         if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0)
2107                 return 0;                               /* beep */
2108
2109         if (nr == 4 && !data->reg_temp[1][temp])        /* max */
2110                 return 0;
2111
2112         if (nr == 5 && !data->reg_temp[2][temp])        /* max_hyst */
2113                 return 0;
2114
2115         if (nr == 6 && !data->reg_temp[3][temp])        /* crit */
2116                 return 0;
2117
2118         if (nr == 7 && !data->reg_temp[4][temp])        /* lcrit */
2119                 return 0;
2120
2121         /* offset and type only apply to fixed sensors */
2122         if (nr > 7 && !(data->have_temp_fixed & (1 << temp)))
2123                 return 0;
2124
2125         return attr->mode;
2126 }
2127
2128 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", S_IRUGO, show_temp, NULL, 0, 0);
2129 SENSOR_TEMPLATE(temp_label, "temp%d_label", S_IRUGO, show_temp_label, NULL, 0);
2130 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", S_IRUGO | S_IWUSR, show_temp,
2131                   store_temp, 0, 1);
2132 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", S_IRUGO | S_IWUSR,
2133                   show_temp, store_temp, 0, 2);
2134 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", S_IRUGO | S_IWUSR, show_temp,
2135                   store_temp, 0, 3);
2136 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", S_IRUGO | S_IWUSR, show_temp,
2137                   store_temp, 0, 4);
2138 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", S_IRUGO | S_IWUSR,
2139                 show_temp_offset, store_temp_offset, 0);
2140 SENSOR_TEMPLATE(temp_type, "temp%d_type", S_IRUGO | S_IWUSR, show_temp_type,
2141                 store_temp_type, 0);
2142 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", S_IRUGO, show_temp_alarm, NULL, 0);
2143 SENSOR_TEMPLATE(temp_beep, "temp%d_beep", S_IRUGO | S_IWUSR, show_temp_beep,
2144                 store_temp_beep, 0);
2145
2146 /*
2147  * nct6775_temp_is_visible uses the index into the following array
2148  * to determine if attributes should be created or not.
2149  * Any change in order or content must be matched.
2150  */
2151 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
2152         &sensor_dev_template_temp_input,
2153         &sensor_dev_template_temp_label,
2154         &sensor_dev_template_temp_alarm,        /* 2 */
2155         &sensor_dev_template_temp_beep,         /* 3 */
2156         &sensor_dev_template_temp_max,          /* 4 */
2157         &sensor_dev_template_temp_max_hyst,     /* 5 */
2158         &sensor_dev_template_temp_crit,         /* 6 */
2159         &sensor_dev_template_temp_lcrit,        /* 7 */
2160         &sensor_dev_template_temp_offset,       /* 8 */
2161         &sensor_dev_template_temp_type,         /* 9 */
2162         NULL
2163 };
2164
2165 static struct sensor_template_group nct6775_temp_template_group = {
2166         .templates = nct6775_attributes_temp_template,
2167         .is_visible = nct6775_temp_is_visible,
2168         .base = 1,
2169 };
2170
2171 static ssize_t
2172 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
2173 {
2174         struct nct6775_data *data = nct6775_update_device(dev);
2175         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2176
2177         return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
2178 }
2179
2180 static ssize_t
2181 store_pwm_mode(struct device *dev, struct device_attribute *attr,
2182                const char *buf, size_t count)
2183 {
2184         struct nct6775_data *data = dev_get_drvdata(dev);
2185         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2186         int nr = sattr->index;
2187         unsigned long val;
2188         int err;
2189         u8 reg;
2190
2191         err = kstrtoul(buf, 10, &val);
2192         if (err < 0)
2193                 return err;
2194
2195         if (val > 1)
2196                 return -EINVAL;
2197
2198         /* Setting DC mode is not supported for all chips/channels */
2199         if (data->REG_PWM_MODE[nr] == 0) {
2200                 if (val)
2201                         return -EINVAL;
2202                 return count;
2203         }
2204
2205         mutex_lock(&data->update_lock);
2206         data->pwm_mode[nr] = val;
2207         reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
2208         reg &= ~data->PWM_MODE_MASK[nr];
2209         if (val)
2210                 reg |= data->PWM_MODE_MASK[nr];
2211         nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
2212         mutex_unlock(&data->update_lock);
2213         return count;
2214 }
2215
2216 static ssize_t
2217 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2218 {
2219         struct nct6775_data *data = nct6775_update_device(dev);
2220         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2221         int nr = sattr->nr;
2222         int index = sattr->index;
2223         int pwm;
2224
2225         /*
2226          * For automatic fan control modes, show current pwm readings.
2227          * Otherwise, show the configured value.
2228          */
2229         if (index == 0 && data->pwm_enable[nr] > manual)
2230                 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
2231         else
2232                 pwm = data->pwm[index][nr];
2233
2234         return sprintf(buf, "%d\n", pwm);
2235 }
2236
2237 static ssize_t
2238 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
2239           size_t count)
2240 {
2241         struct nct6775_data *data = dev_get_drvdata(dev);
2242         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2243         int nr = sattr->nr;
2244         int index = sattr->index;
2245         unsigned long val;
2246         int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
2247         int maxval[7]
2248           = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
2249         int err;
2250         u8 reg;
2251
2252         err = kstrtoul(buf, 10, &val);
2253         if (err < 0)
2254                 return err;
2255         val = clamp_val(val, minval[index], maxval[index]);
2256
2257         mutex_lock(&data->update_lock);
2258         data->pwm[index][nr] = val;
2259         nct6775_write_value(data, data->REG_PWM[index][nr], val);
2260         if (index == 2) { /* floor: disable if val == 0 */
2261                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2262                 reg &= 0x7f;
2263                 if (val)
2264                         reg |= 0x80;
2265                 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2266         }
2267         mutex_unlock(&data->update_lock);
2268         return count;
2269 }
2270
2271 /* Returns 0 if OK, -EINVAL otherwise */
2272 static int check_trip_points(struct nct6775_data *data, int nr)
2273 {
2274         int i;
2275
2276         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2277                 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
2278                         return -EINVAL;
2279         }
2280         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2281                 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
2282                         return -EINVAL;
2283         }
2284         /* validate critical temperature and pwm if enabled (pwm > 0) */
2285         if (data->auto_pwm[nr][data->auto_pwm_num]) {
2286                 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2287                                 data->auto_temp[nr][data->auto_pwm_num] ||
2288                     data->auto_pwm[nr][data->auto_pwm_num - 1] >
2289                                 data->auto_pwm[nr][data->auto_pwm_num])
2290                         return -EINVAL;
2291         }
2292         return 0;
2293 }
2294
2295 static void pwm_update_registers(struct nct6775_data *data, int nr)
2296 {
2297         u8 reg;
2298
2299         switch (data->pwm_enable[nr]) {
2300         case off:
2301         case manual:
2302                 break;
2303         case speed_cruise:
2304                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2305                 reg = (reg & ~data->tolerance_mask) |
2306                   (data->target_speed_tolerance[nr] & data->tolerance_mask);
2307                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2308                 nct6775_write_value(data, data->REG_TARGET[nr],
2309                                     data->target_speed[nr] & 0xff);
2310                 if (data->REG_TOLERANCE_H) {
2311                         reg = (data->target_speed[nr] >> 8) & 0x0f;
2312                         reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2313                         nct6775_write_value(data,
2314                                             data->REG_TOLERANCE_H[nr],
2315                                             reg);
2316                 }
2317                 break;
2318         case thermal_cruise:
2319                 nct6775_write_value(data, data->REG_TARGET[nr],
2320                                     data->target_temp[nr]);
2321                 /* intentional */
2322         default:
2323                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2324                 reg = (reg & ~data->tolerance_mask) |
2325                   data->temp_tolerance[0][nr];
2326                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2327                 break;
2328         }
2329 }
2330
2331 static ssize_t
2332 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2333 {
2334         struct nct6775_data *data = nct6775_update_device(dev);
2335         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2336
2337         return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2338 }
2339
2340 static ssize_t
2341 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2342                  const char *buf, size_t count)
2343 {
2344         struct nct6775_data *data = dev_get_drvdata(dev);
2345         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2346         int nr = sattr->index;
2347         unsigned long val;
2348         int err;
2349         u16 reg;
2350
2351         err = kstrtoul(buf, 10, &val);
2352         if (err < 0)
2353                 return err;
2354
2355         if (val > sf4)
2356                 return -EINVAL;
2357
2358         if (val == sf3 && data->kind != nct6775)
2359                 return -EINVAL;
2360
2361         if (val == sf4 && check_trip_points(data, nr)) {
2362                 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2363                 dev_err(dev, "Adjust trip points and try again\n");
2364                 return -EINVAL;
2365         }
2366
2367         mutex_lock(&data->update_lock);
2368         data->pwm_enable[nr] = val;
2369         if (val == off) {
2370                 /*
2371                  * turn off pwm control: select manual mode, set pwm to maximum
2372                  */
2373                 data->pwm[0][nr] = 255;
2374                 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2375         }
2376         pwm_update_registers(data, nr);
2377         reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2378         reg &= 0x0f;
2379         reg |= pwm_enable_to_reg(val) << 4;
2380         nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2381         mutex_unlock(&data->update_lock);
2382         return count;
2383 }
2384
2385 static ssize_t
2386 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2387 {
2388         int i, sel = 0;
2389
2390         for (i = 0; i < NUM_TEMP; i++) {
2391                 if (!(data->have_temp & (1 << i)))
2392                         continue;
2393                 if (src == data->temp_src[i]) {
2394                         sel = i + 1;
2395                         break;
2396                 }
2397         }
2398
2399         return sprintf(buf, "%d\n", sel);
2400 }
2401
2402 static ssize_t
2403 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2404 {
2405         struct nct6775_data *data = nct6775_update_device(dev);
2406         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2407         int index = sattr->index;
2408
2409         return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2410 }
2411
2412 static ssize_t
2413 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2414                    const char *buf, size_t count)
2415 {
2416         struct nct6775_data *data = nct6775_update_device(dev);
2417         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2418         int nr = sattr->index;
2419         unsigned long val;
2420         int err, reg, src;
2421
2422         err = kstrtoul(buf, 10, &val);
2423         if (err < 0)
2424                 return err;
2425         if (val == 0 || val > NUM_TEMP)
2426                 return -EINVAL;
2427         if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
2428                 return -EINVAL;
2429
2430         mutex_lock(&data->update_lock);
2431         src = data->temp_src[val - 1];
2432         data->pwm_temp_sel[nr] = src;
2433         reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2434         reg &= 0xe0;
2435         reg |= src;
2436         nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2437         mutex_unlock(&data->update_lock);
2438
2439         return count;
2440 }
2441
2442 static ssize_t
2443 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2444                          char *buf)
2445 {
2446         struct nct6775_data *data = nct6775_update_device(dev);
2447         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2448         int index = sattr->index;
2449
2450         return show_pwm_temp_sel_common(data, buf,
2451                                         data->pwm_weight_temp_sel[index]);
2452 }
2453
2454 static ssize_t
2455 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2456                           const char *buf, size_t count)
2457 {
2458         struct nct6775_data *data = nct6775_update_device(dev);
2459         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2460         int nr = sattr->index;
2461         unsigned long val;
2462         int err, reg, src;
2463
2464         err = kstrtoul(buf, 10, &val);
2465         if (err < 0)
2466                 return err;
2467         if (val > NUM_TEMP)
2468                 return -EINVAL;
2469         if (val && (!(data->have_temp & (1 << (val - 1))) ||
2470                     !data->temp_src[val - 1]))
2471                 return -EINVAL;
2472
2473         mutex_lock(&data->update_lock);
2474         if (val) {
2475                 src = data->temp_src[val - 1];
2476                 data->pwm_weight_temp_sel[nr] = src;
2477                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2478                 reg &= 0xe0;
2479                 reg |= (src | 0x80);
2480                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2481         } else {
2482                 data->pwm_weight_temp_sel[nr] = 0;
2483                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2484                 reg &= 0x7f;
2485                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2486         }
2487         mutex_unlock(&data->update_lock);
2488
2489         return count;
2490 }
2491
2492 static ssize_t
2493 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2494 {
2495         struct nct6775_data *data = nct6775_update_device(dev);
2496         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2497
2498         return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2499 }
2500
2501 static ssize_t
2502 store_target_temp(struct device *dev, struct device_attribute *attr,
2503                   const char *buf, size_t count)
2504 {
2505         struct nct6775_data *data = dev_get_drvdata(dev);
2506         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2507         int nr = sattr->index;
2508         unsigned long val;
2509         int err;
2510
2511         err = kstrtoul(buf, 10, &val);
2512         if (err < 0)
2513                 return err;
2514
2515         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2516                         data->target_temp_mask);
2517
2518         mutex_lock(&data->update_lock);
2519         data->target_temp[nr] = val;
2520         pwm_update_registers(data, nr);
2521         mutex_unlock(&data->update_lock);
2522         return count;
2523 }
2524
2525 static ssize_t
2526 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2527 {
2528         struct nct6775_data *data = nct6775_update_device(dev);
2529         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2530         int nr = sattr->index;
2531
2532         return sprintf(buf, "%d\n",
2533                        fan_from_reg16(data->target_speed[nr],
2534                                       data->fan_div[nr]));
2535 }
2536
2537 static ssize_t
2538 store_target_speed(struct device *dev, struct device_attribute *attr,
2539                    const char *buf, size_t count)
2540 {
2541         struct nct6775_data *data = dev_get_drvdata(dev);
2542         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2543         int nr = sattr->index;
2544         unsigned long val;
2545         int err;
2546         u16 speed;
2547
2548         err = kstrtoul(buf, 10, &val);
2549         if (err < 0)
2550                 return err;
2551
2552         val = clamp_val(val, 0, 1350000U);
2553         speed = fan_to_reg(val, data->fan_div[nr]);
2554
2555         mutex_lock(&data->update_lock);
2556         data->target_speed[nr] = speed;
2557         pwm_update_registers(data, nr);
2558         mutex_unlock(&data->update_lock);
2559         return count;
2560 }
2561
2562 static ssize_t
2563 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2564                     char *buf)
2565 {
2566         struct nct6775_data *data = nct6775_update_device(dev);
2567         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2568         int nr = sattr->nr;
2569         int index = sattr->index;
2570
2571         return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2572 }
2573
2574 static ssize_t
2575 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2576                      const char *buf, size_t count)
2577 {
2578         struct nct6775_data *data = dev_get_drvdata(dev);
2579         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2580         int nr = sattr->nr;
2581         int index = sattr->index;
2582         unsigned long val;
2583         int err;
2584
2585         err = kstrtoul(buf, 10, &val);
2586         if (err < 0)
2587                 return err;
2588
2589         /* Limit tolerance as needed */
2590         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2591
2592         mutex_lock(&data->update_lock);
2593         data->temp_tolerance[index][nr] = val;
2594         if (index)
2595                 pwm_update_registers(data, nr);
2596         else
2597                 nct6775_write_value(data,
2598                                     data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2599                                     val);
2600         mutex_unlock(&data->update_lock);
2601         return count;
2602 }
2603
2604 /*
2605  * Fan speed tolerance is a tricky beast, since the associated register is
2606  * a tick counter, but the value is reported and configured as rpm.
2607  * Compute resulting low and high rpm values and report the difference.
2608  */
2609 static ssize_t
2610 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2611                      char *buf)
2612 {
2613         struct nct6775_data *data = nct6775_update_device(dev);
2614         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2615         int nr = sattr->index;
2616         int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2617         int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2618         int tolerance;
2619
2620         if (low <= 0)
2621                 low = 1;
2622         if (high > 0xffff)
2623                 high = 0xffff;
2624         if (high < low)
2625                 high = low;
2626
2627         tolerance = (fan_from_reg16(low, data->fan_div[nr])
2628                      - fan_from_reg16(high, data->fan_div[nr])) / 2;
2629
2630         return sprintf(buf, "%d\n", tolerance);
2631 }
2632
2633 static ssize_t
2634 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2635                       const char *buf, size_t count)
2636 {
2637         struct nct6775_data *data = dev_get_drvdata(dev);
2638         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2639         int nr = sattr->index;
2640         unsigned long val;
2641         int err;
2642         int low, high;
2643
2644         err = kstrtoul(buf, 10, &val);
2645         if (err < 0)
2646                 return err;
2647
2648         high = fan_from_reg16(data->target_speed[nr],
2649                               data->fan_div[nr]) + val;
2650         low = fan_from_reg16(data->target_speed[nr],
2651                              data->fan_div[nr]) - val;
2652         if (low <= 0)
2653                 low = 1;
2654         if (high < low)
2655                 high = low;
2656
2657         val = (fan_to_reg(low, data->fan_div[nr]) -
2658                fan_to_reg(high, data->fan_div[nr])) / 2;
2659
2660         /* Limit tolerance as needed */
2661         val = clamp_val(val, 0, data->speed_tolerance_limit);
2662
2663         mutex_lock(&data->update_lock);
2664         data->target_speed_tolerance[nr] = val;
2665         pwm_update_registers(data, nr);
2666         mutex_unlock(&data->update_lock);
2667         return count;
2668 }
2669
2670 SENSOR_TEMPLATE_2(pwm, "pwm%d", S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2671 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", S_IWUSR | S_IRUGO, show_pwm_mode,
2672                 store_pwm_mode, 0);
2673 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", S_IWUSR | S_IRUGO, show_pwm_enable,
2674                 store_pwm_enable, 0);
2675 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", S_IWUSR | S_IRUGO,
2676                 show_pwm_temp_sel, store_pwm_temp_sel, 0);
2677 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", S_IWUSR | S_IRUGO,
2678                 show_target_temp, store_target_temp, 0);
2679 SENSOR_TEMPLATE(fan_target, "fan%d_target", S_IWUSR | S_IRUGO,
2680                 show_target_speed, store_target_speed, 0);
2681 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", S_IWUSR | S_IRUGO,
2682                 show_speed_tolerance, store_speed_tolerance, 0);
2683
2684 /* Smart Fan registers */
2685
2686 static ssize_t
2687 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2688 {
2689         struct nct6775_data *data = nct6775_update_device(dev);
2690         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2691         int nr = sattr->nr;
2692         int index = sattr->index;
2693
2694         return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2695 }
2696
2697 static ssize_t
2698 store_weight_temp(struct device *dev, struct device_attribute *attr,
2699                   const char *buf, size_t count)
2700 {
2701         struct nct6775_data *data = dev_get_drvdata(dev);
2702         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2703         int nr = sattr->nr;
2704         int index = sattr->index;
2705         unsigned long val;
2706         int err;
2707
2708         err = kstrtoul(buf, 10, &val);
2709         if (err < 0)
2710                 return err;
2711
2712         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2713
2714         mutex_lock(&data->update_lock);
2715         data->weight_temp[index][nr] = val;
2716         nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2717         mutex_unlock(&data->update_lock);
2718         return count;
2719 }
2720
2721 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", S_IWUSR | S_IRUGO,
2722                   show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
2723 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step",
2724                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 0);
2725 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol",
2726                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 1);
2727 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base",
2728                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 2);
2729 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step",
2730                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 5);
2731 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base",
2732                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 6);
2733
2734 static ssize_t
2735 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2736 {
2737         struct nct6775_data *data = nct6775_update_device(dev);
2738         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2739         int nr = sattr->nr;
2740         int index = sattr->index;
2741
2742         return sprintf(buf, "%d\n",
2743                        step_time_from_reg(data->fan_time[index][nr],
2744                                           data->pwm_mode[nr]));
2745 }
2746
2747 static ssize_t
2748 store_fan_time(struct device *dev, struct device_attribute *attr,
2749                const char *buf, size_t count)
2750 {
2751         struct nct6775_data *data = dev_get_drvdata(dev);
2752         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2753         int nr = sattr->nr;
2754         int index = sattr->index;
2755         unsigned long val;
2756         int err;
2757
2758         err = kstrtoul(buf, 10, &val);
2759         if (err < 0)
2760                 return err;
2761
2762         val = step_time_to_reg(val, data->pwm_mode[nr]);
2763         mutex_lock(&data->update_lock);
2764         data->fan_time[index][nr] = val;
2765         nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2766         mutex_unlock(&data->update_lock);
2767         return count;
2768 }
2769
2770 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
2771 static ssize_t
2772 show_name(struct device *dev, struct device_attribute *attr, char *buf)
2773 {
2774         struct nct6775_data *data = dev_get_drvdata(dev);
2775
2776         return sprintf(buf, "%s\n", data->name);
2777 }
2778
2779 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
2780 #endif
2781
2782 static ssize_t
2783 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2784 {
2785         struct nct6775_data *data = nct6775_update_device(dev);
2786         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2787
2788         return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2789 }
2790
2791 static ssize_t
2792 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2793                const char *buf, size_t count)
2794 {
2795         struct nct6775_data *data = dev_get_drvdata(dev);
2796         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2797         int nr = sattr->nr;
2798         int point = sattr->index;
2799         unsigned long val;
2800         int err;
2801         u8 reg;
2802
2803         err = kstrtoul(buf, 10, &val);
2804         if (err < 0)
2805                 return err;
2806         if (val > 255)
2807                 return -EINVAL;
2808
2809         if (point == data->auto_pwm_num) {
2810                 if (data->kind != nct6775 && !val)
2811                         return -EINVAL;
2812                 if (data->kind != nct6779 && val)
2813                         val = 0xff;
2814         }
2815
2816         mutex_lock(&data->update_lock);
2817         data->auto_pwm[nr][point] = val;
2818         if (point < data->auto_pwm_num) {
2819                 nct6775_write_value(data,
2820                                     NCT6775_AUTO_PWM(data, nr, point),
2821                                     data->auto_pwm[nr][point]);
2822         } else {
2823                 switch (data->kind) {
2824                 case nct6775:
2825                         /* disable if needed (pwm == 0) */
2826                         reg = nct6775_read_value(data,
2827                                                  NCT6775_REG_CRITICAL_ENAB[nr]);
2828                         if (val)
2829                                 reg |= 0x02;
2830                         else
2831                                 reg &= ~0x02;
2832                         nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
2833                                             reg);
2834                         break;
2835                 case nct6776:
2836                         break; /* always enabled, nothing to do */
2837                 case nct6106:
2838                 case nct6779:
2839                 case nct6791:
2840                 case nct6792:
2841                         nct6775_write_value(data, data->REG_CRITICAL_PWM[nr],
2842                                             val);
2843                         reg = nct6775_read_value(data,
2844                                         data->REG_CRITICAL_PWM_ENABLE[nr]);
2845                         if (val == 255)
2846                                 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
2847                         else
2848                                 reg |= data->CRITICAL_PWM_ENABLE_MASK;
2849                         nct6775_write_value(data,
2850                                             data->REG_CRITICAL_PWM_ENABLE[nr],
2851                                             reg);
2852                         break;
2853                 }
2854         }
2855         mutex_unlock(&data->update_lock);
2856         return count;
2857 }
2858
2859 static ssize_t
2860 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
2861 {
2862         struct nct6775_data *data = nct6775_update_device(dev);
2863         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2864         int nr = sattr->nr;
2865         int point = sattr->index;
2866
2867         /*
2868          * We don't know for sure if the temperature is signed or unsigned.
2869          * Assume it is unsigned.
2870          */
2871         return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
2872 }
2873
2874 static ssize_t
2875 store_auto_temp(struct device *dev, struct device_attribute *attr,
2876                 const char *buf, size_t count)
2877 {
2878         struct nct6775_data *data = dev_get_drvdata(dev);
2879         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2880         int nr = sattr->nr;
2881         int point = sattr->index;
2882         unsigned long val;
2883         int err;
2884
2885         err = kstrtoul(buf, 10, &val);
2886         if (err)
2887                 return err;
2888         if (val > 255000)
2889                 return -EINVAL;
2890
2891         mutex_lock(&data->update_lock);
2892         data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
2893         if (point < data->auto_pwm_num) {
2894                 nct6775_write_value(data,
2895                                     NCT6775_AUTO_TEMP(data, nr, point),
2896                                     data->auto_temp[nr][point]);
2897         } else {
2898                 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
2899                                     data->auto_temp[nr][point]);
2900         }
2901         mutex_unlock(&data->update_lock);
2902         return count;
2903 }
2904
2905 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
2906                                       struct attribute *attr, int index)
2907 {
2908         struct device *dev = container_of(kobj, struct device, kobj);
2909         struct nct6775_data *data = dev_get_drvdata(dev);
2910         int pwm = index / 36;   /* pwm index */
2911         int nr = index % 36;    /* attribute index */
2912
2913         if (!(data->has_pwm & (1 << pwm)))
2914                 return 0;
2915
2916         if ((nr >= 14 && nr <= 18) || nr == 21)   /* weight */
2917                 if (!data->REG_WEIGHT_TEMP_SEL[pwm])
2918                         return 0;
2919         if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
2920                 return 0;
2921         if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
2922                 return 0;
2923         if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
2924                 return 0;
2925
2926         if (nr >= 22 && nr <= 35) {             /* auto point */
2927                 int api = (nr - 22) / 2;        /* auto point index */
2928
2929                 if (api > data->auto_pwm_num)
2930                         return 0;
2931         }
2932         return attr->mode;
2933 }
2934
2935 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", S_IWUSR | S_IRUGO,
2936                   show_fan_time, store_fan_time, 0, 0);
2937 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", S_IWUSR | S_IRUGO,
2938                   show_fan_time, store_fan_time, 0, 1);
2939 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", S_IWUSR | S_IRUGO,
2940                   show_fan_time, store_fan_time, 0, 2);
2941 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", S_IWUSR | S_IRUGO, show_pwm,
2942                   store_pwm, 0, 1);
2943 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", S_IWUSR | S_IRUGO, show_pwm,
2944                   store_pwm, 0, 2);
2945 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", S_IWUSR | S_IRUGO,
2946                   show_temp_tolerance, store_temp_tolerance, 0, 0);
2947 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance",
2948                   S_IWUSR | S_IRUGO, show_temp_tolerance, store_temp_tolerance,
2949                   0, 1);
2950
2951 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2952                   0, 3);
2953
2954 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", S_IWUSR | S_IRUGO, show_pwm,
2955                   store_pwm, 0, 4);
2956
2957 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm",
2958                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 0);
2959 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp",
2960                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 0);
2961
2962 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm",
2963                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 1);
2964 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp",
2965                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 1);
2966
2967 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm",
2968                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 2);
2969 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp",
2970                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 2);
2971
2972 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm",
2973                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 3);
2974 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp",
2975                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 3);
2976
2977 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm",
2978                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 4);
2979 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp",
2980                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 4);
2981
2982 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm",
2983                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 5);
2984 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp",
2985                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 5);
2986
2987 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm",
2988                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 6);
2989 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp",
2990                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 6);
2991
2992 /*
2993  * nct6775_pwm_is_visible uses the index into the following array
2994  * to determine if attributes should be created or not.
2995  * Any change in order or content must be matched.
2996  */
2997 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
2998         &sensor_dev_template_pwm,
2999         &sensor_dev_template_pwm_mode,
3000         &sensor_dev_template_pwm_enable,
3001         &sensor_dev_template_pwm_temp_sel,
3002         &sensor_dev_template_pwm_temp_tolerance,
3003         &sensor_dev_template_pwm_crit_temp_tolerance,
3004         &sensor_dev_template_pwm_target_temp,
3005         &sensor_dev_template_fan_target,
3006         &sensor_dev_template_fan_tolerance,
3007         &sensor_dev_template_pwm_stop_time,
3008         &sensor_dev_template_pwm_step_up_time,
3009         &sensor_dev_template_pwm_step_down_time,
3010         &sensor_dev_template_pwm_start,
3011         &sensor_dev_template_pwm_floor,
3012         &sensor_dev_template_pwm_weight_temp_sel,       /* 14 */
3013         &sensor_dev_template_pwm_weight_temp_step,
3014         &sensor_dev_template_pwm_weight_temp_step_tol,
3015         &sensor_dev_template_pwm_weight_temp_step_base,
3016         &sensor_dev_template_pwm_weight_duty_step,      /* 18 */
3017         &sensor_dev_template_pwm_max,                   /* 19 */
3018         &sensor_dev_template_pwm_step,                  /* 20 */
3019         &sensor_dev_template_pwm_weight_duty_base,      /* 21 */
3020         &sensor_dev_template_pwm_auto_point1_pwm,       /* 22 */
3021         &sensor_dev_template_pwm_auto_point1_temp,
3022         &sensor_dev_template_pwm_auto_point2_pwm,
3023         &sensor_dev_template_pwm_auto_point2_temp,
3024         &sensor_dev_template_pwm_auto_point3_pwm,
3025         &sensor_dev_template_pwm_auto_point3_temp,
3026         &sensor_dev_template_pwm_auto_point4_pwm,
3027         &sensor_dev_template_pwm_auto_point4_temp,
3028         &sensor_dev_template_pwm_auto_point5_pwm,
3029         &sensor_dev_template_pwm_auto_point5_temp,
3030         &sensor_dev_template_pwm_auto_point6_pwm,
3031         &sensor_dev_template_pwm_auto_point6_temp,
3032         &sensor_dev_template_pwm_auto_point7_pwm,
3033         &sensor_dev_template_pwm_auto_point7_temp,      /* 35 */
3034
3035         NULL
3036 };
3037
3038 static struct sensor_template_group nct6775_pwm_template_group = {
3039         .templates = nct6775_attributes_pwm_template,
3040         .is_visible = nct6775_pwm_is_visible,
3041         .base = 1,
3042 };
3043
3044 static ssize_t
3045 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
3046 {
3047         struct nct6775_data *data = dev_get_drvdata(dev);
3048
3049         return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
3050 }
3051
3052 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
3053
3054 /* Case open detection */
3055
3056 static ssize_t
3057 clear_caseopen(struct device *dev, struct device_attribute *attr,
3058                const char *buf, size_t count)
3059 {
3060         struct nct6775_data *data = dev_get_drvdata(dev);
3061         int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
3062         unsigned long val;
3063         u8 reg;
3064         int ret;
3065
3066         if (kstrtoul(buf, 10, &val) || val != 0)
3067                 return -EINVAL;
3068
3069         mutex_lock(&data->update_lock);
3070
3071         /*
3072          * Use CR registers to clear caseopen status.
3073          * The CR registers are the same for all chips, and not all chips
3074          * support clearing the caseopen status through "regular" registers.
3075          */
3076         ret = superio_enter(data->sioreg);
3077         if (ret) {
3078                 count = ret;
3079                 goto error;
3080         }
3081
3082         superio_select(data->sioreg, NCT6775_LD_ACPI);
3083         reg = superio_inb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
3084         reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3085         superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3086         reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3087         superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3088         superio_exit(data->sioreg);
3089
3090         data->valid = false;    /* Force cache refresh */
3091 error:
3092         mutex_unlock(&data->update_lock);
3093         return count;
3094 }
3095
3096 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
3097                           clear_caseopen, INTRUSION_ALARM_BASE);
3098 static SENSOR_DEVICE_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
3099                           clear_caseopen, INTRUSION_ALARM_BASE + 1);
3100 static SENSOR_DEVICE_ATTR(intrusion0_beep, S_IWUSR | S_IRUGO, show_beep,
3101                           store_beep, INTRUSION_ALARM_BASE);
3102 static SENSOR_DEVICE_ATTR(intrusion1_beep, S_IWUSR | S_IRUGO, show_beep,
3103                           store_beep, INTRUSION_ALARM_BASE + 1);
3104 static SENSOR_DEVICE_ATTR(beep_enable, S_IWUSR | S_IRUGO, show_beep,
3105                           store_beep, BEEP_ENABLE_BASE);
3106
3107 static umode_t nct6775_other_is_visible(struct kobject *kobj,
3108                                         struct attribute *attr, int index)
3109 {
3110         struct device *dev = container_of(kobj, struct device, kobj);
3111         struct nct6775_data *data = dev_get_drvdata(dev);
3112
3113         if (index == 0 && !data->have_vid)
3114                 return 0;
3115
3116         if (index == 1 || index == 2) {
3117                 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + index - 1] < 0)
3118                         return 0;
3119         }
3120
3121         if (index == 3 || index == 4) {
3122                 if (data->BEEP_BITS[INTRUSION_ALARM_BASE + index - 3] < 0)
3123                         return 0;
3124         }
3125
3126         return attr->mode;
3127 }
3128
3129 /*
3130  * nct6775_other_is_visible uses the index into the following array
3131  * to determine if attributes should be created or not.
3132  * Any change in order or content must be matched.
3133  */
3134 static struct attribute *nct6775_attributes_other[] = {
3135         &dev_attr_cpu0_vid.attr,                                /* 0 */
3136         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,        /* 1 */
3137         &sensor_dev_attr_intrusion1_alarm.dev_attr.attr,        /* 2 */
3138         &sensor_dev_attr_intrusion0_beep.dev_attr.attr,         /* 3 */
3139         &sensor_dev_attr_intrusion1_beep.dev_attr.attr,         /* 4 */
3140         &sensor_dev_attr_beep_enable.dev_attr.attr,             /* 5 */
3141 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
3142         &dev_attr_name.attr,
3143 #endif
3144         NULL
3145 };
3146
3147 static const struct attribute_group nct6775_group_other = {
3148         .attrs = nct6775_attributes_other,
3149         .is_visible = nct6775_other_is_visible,
3150 };
3151
3152 static inline void nct6775_init_device(struct nct6775_data *data)
3153 {
3154         int i;
3155         u8 tmp, diode;
3156
3157         /* Start monitoring if needed */
3158         if (data->REG_CONFIG) {
3159                 tmp = nct6775_read_value(data, data->REG_CONFIG);
3160                 if (!(tmp & 0x01))
3161                         nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
3162         }
3163
3164         /* Enable temperature sensors if needed */
3165         for (i = 0; i < NUM_TEMP; i++) {
3166                 if (!(data->have_temp & (1 << i)))
3167                         continue;
3168                 if (!data->reg_temp_config[i])
3169                         continue;
3170                 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
3171                 if (tmp & 0x01)
3172                         nct6775_write_value(data, data->reg_temp_config[i],
3173                                             tmp & 0xfe);
3174         }
3175
3176         /* Enable VBAT monitoring if needed */
3177         tmp = nct6775_read_value(data, data->REG_VBAT);
3178         if (!(tmp & 0x01))
3179                 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
3180
3181         diode = nct6775_read_value(data, data->REG_DIODE);
3182
3183         for (i = 0; i < data->temp_fixed_num; i++) {
3184                 if (!(data->have_temp_fixed & (1 << i)))
3185                         continue;
3186                 if ((tmp & (data->DIODE_MASK << i)))    /* diode */
3187                         data->temp_type[i]
3188                           = 3 - ((diode >> i) & data->DIODE_MASK);
3189                 else                            /* thermistor */
3190                         data->temp_type[i] = 4;
3191         }
3192 }
3193
3194 static void
3195 nct6775_check_fan_inputs(struct nct6775_data *data)
3196 {
3197         bool fan3pin, fan4pin, fan4min, fan5pin, fan6pin;
3198         bool pwm3pin, pwm4pin, pwm5pin, pwm6pin;
3199         int sioreg = data->sioreg;
3200         int regval;
3201
3202         /* fan4 and fan5 share some pins with the GPIO and serial flash */
3203         if (data->kind == nct6775) {
3204                 regval = superio_inb(sioreg, 0x2c);
3205
3206                 fan3pin = regval & (1 << 6);
3207                 pwm3pin = regval & (1 << 7);
3208
3209                 /* On NCT6775, fan4 shares pins with the fdc interface */
3210                 fan4pin = !(superio_inb(sioreg, 0x2A) & 0x80);
3211                 fan4min = false;
3212                 fan5pin = false;
3213                 fan6pin = false;
3214                 pwm4pin = false;
3215                 pwm5pin = false;
3216                 pwm6pin = false;
3217         } else if (data->kind == nct6776) {
3218                 bool gpok = superio_inb(sioreg, 0x27) & 0x80;
3219                 const char *board_vendor, *board_name;
3220
3221                 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
3222                 board_name = dmi_get_system_info(DMI_BOARD_NAME);
3223
3224                 superio_select(sioreg, NCT6775_LD_HWM);
3225                 regval = superio_inb(sioreg, SIO_REG_ENABLE);
3226
3227                 /*
3228                  * ASRock Z77 Pro4-M is known to not enable fan 3..5
3229                  * if booted in UEFI Ultra-FastBoot mode.
3230                  */
3231                 if (!strcmp(board_vendor, "ASRock") &&
3232                     !strcmp(board_name, "Z77 Pro4-M")) {
3233                         if ((regval & 0xe0) != 0xe0) {
3234                                 pr_warn("Enabling Fans 3-5\n");
3235                                 regval |= 0xe0;
3236                                 superio_outb(sioreg, SIO_REG_ENABLE, regval);
3237                         }
3238                 }
3239
3240                 data->sio_enable = regval;
3241
3242                 if (regval & 0x80)
3243                         fan3pin = gpok;
3244                 else
3245                         fan3pin = !(superio_inb(sioreg, 0x24) & 0x40);
3246
3247                 if (regval & 0x40)
3248                         fan4pin = gpok;
3249                 else
3250                         fan4pin = superio_inb(sioreg, 0x1C) & 0x01;
3251
3252                 if (regval & 0x20)
3253                         fan5pin = gpok;
3254                 else
3255                         fan5pin = superio_inb(sioreg, 0x1C) & 0x02;
3256
3257                 fan4min = fan4pin;
3258                 fan6pin = false;
3259                 pwm3pin = fan3pin;
3260                 pwm4pin = false;
3261                 pwm5pin = false;
3262                 pwm6pin = false;
3263         } else if (data->kind == nct6106) {
3264                 regval = superio_inb(sioreg, 0x24);
3265                 fan3pin = !(regval & 0x80);
3266                 pwm3pin = regval & 0x08;
3267
3268                 fan4pin = false;
3269                 fan4min = false;
3270                 fan5pin = false;
3271                 fan6pin = false;
3272                 pwm4pin = false;
3273                 pwm5pin = false;
3274                 pwm6pin = false;
3275         } else {        /* NCT6779D, NCT6791D, or NCT6792D */
3276                 regval = superio_inb(sioreg, 0x1c);
3277
3278                 fan3pin = !(regval & (1 << 5));
3279                 fan4pin = !(regval & (1 << 6));
3280                 fan5pin = !(regval & (1 << 7));
3281
3282                 pwm3pin = !(regval & (1 << 0));
3283                 pwm4pin = !(regval & (1 << 1));
3284                 pwm5pin = !(regval & (1 << 2));
3285
3286                 fan4min = fan4pin;
3287
3288                 if (data->kind == nct6791 || data->kind == nct6792) {
3289                         regval = superio_inb(sioreg, 0x2d);
3290                         fan6pin = (regval & (1 << 1));
3291                         pwm6pin = (regval & (1 << 0));
3292                 } else {        /* NCT6779D */
3293                         fan6pin = false;
3294                         pwm6pin = false;
3295                 }
3296         }
3297
3298         /* fan 1 and 2 (0x03) are always present */
3299         data->has_fan = 0x03 | (fan3pin << 2) | (fan4pin << 3) |
3300                 (fan5pin << 4) | (fan6pin << 5);
3301         data->has_fan_min = 0x03 | (fan3pin << 2) | (fan4min << 3) |
3302                 (fan5pin << 4);
3303         data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) |
3304                 (pwm5pin << 4) | (pwm6pin << 5);
3305 }
3306
3307 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
3308                              int *available, int *mask)
3309 {
3310         int i;
3311         u8 src;
3312
3313         for (i = 0; i < data->pwm_num && *available; i++) {
3314                 int index;
3315
3316                 if (!regp[i])
3317                         continue;
3318                 src = nct6775_read_value(data, regp[i]);
3319                 src &= 0x1f;
3320                 if (!src || (*mask & (1 << src)))
3321                         continue;
3322                 if (src >= data->temp_label_num ||
3323                     !strlen(data->temp_label[src]))
3324                         continue;
3325
3326                 index = __ffs(*available);
3327                 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3328                 *available &= ~(1 << index);
3329                 *mask |= 1 << src;
3330         }
3331 }
3332
3333 static int nct6775_probe(struct platform_device *pdev)
3334 {
3335         struct device *dev = &pdev->dev;
3336         struct nct6775_sio_data *sio_data = dev_get_platdata(dev);
3337         struct nct6775_data *data;
3338         struct resource *res;
3339         int i, s, err = 0;
3340         int src, mask, available;
3341         const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3342         const u16 *reg_temp_mon, *reg_temp_alternate, *reg_temp_crit;
3343         const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL;
3344         int num_reg_temp, num_reg_temp_mon;
3345         u8 cr2a;
3346         struct attribute_group *group;
3347         struct device *hwmon_dev;
3348         int num_attr_groups = 0;
3349
3350         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3351         if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3352                                  DRVNAME))
3353                 return -EBUSY;
3354
3355         data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3356                             GFP_KERNEL);
3357         if (!data)
3358                 return -ENOMEM;
3359
3360         data->kind = sio_data->kind;
3361         data->sioreg = sio_data->sioreg;
3362         data->addr = res->start;
3363         mutex_init(&data->update_lock);
3364         data->name = nct6775_device_names[data->kind];
3365         data->bank = 0xff;              /* Force initial bank selection */
3366         platform_set_drvdata(pdev, data);
3367
3368         switch (data->kind) {
3369         case nct6106:
3370                 data->in_num = 9;
3371                 data->pwm_num = 3;
3372                 data->auto_pwm_num = 4;
3373                 data->temp_fixed_num = 3;
3374                 data->num_temp_alarms = 6;
3375                 data->num_temp_beeps = 6;
3376
3377                 data->fan_from_reg = fan_from_reg13;
3378                 data->fan_from_reg_min = fan_from_reg13;
3379
3380                 data->temp_label = nct6776_temp_label;
3381                 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3382
3383                 data->REG_VBAT = NCT6106_REG_VBAT;
3384                 data->REG_DIODE = NCT6106_REG_DIODE;
3385                 data->DIODE_MASK = NCT6106_DIODE_MASK;
3386                 data->REG_VIN = NCT6106_REG_IN;
3387                 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3388                 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3389                 data->REG_TARGET = NCT6106_REG_TARGET;
3390                 data->REG_FAN = NCT6106_REG_FAN;
3391                 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
3392                 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
3393                 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
3394                 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
3395                 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
3396                 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
3397                 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
3398                 data->REG_PWM[0] = NCT6106_REG_PWM;
3399                 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
3400                 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
3401                 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3402                 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3403                 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3404                 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3405                 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3406                 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
3407                 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
3408                 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
3409                 data->REG_CRITICAL_TEMP_TOLERANCE
3410                   = NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
3411                 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
3412                 data->CRITICAL_PWM_ENABLE_MASK
3413                   = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3414                 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
3415                 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3416                 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3417                 data->REG_TEMP_SEL = NCT6106_REG_TEMP_SEL;
3418                 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3419                 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3420                 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3421                 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3422                 data->REG_ALARM = NCT6106_REG_ALARM;
3423                 data->ALARM_BITS = NCT6106_ALARM_BITS;
3424                 data->REG_BEEP = NCT6106_REG_BEEP;
3425                 data->BEEP_BITS = NCT6106_BEEP_BITS;
3426
3427                 reg_temp = NCT6106_REG_TEMP;
3428                 reg_temp_mon = NCT6106_REG_TEMP_MON;
3429                 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3430                 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON);
3431                 reg_temp_over = NCT6106_REG_TEMP_OVER;
3432                 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3433                 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3434                 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3435                 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3436                 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3437                 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3438
3439                 break;
3440         case nct6775:
3441                 data->in_num = 9;
3442                 data->pwm_num = 3;
3443                 data->auto_pwm_num = 6;
3444                 data->has_fan_div = true;
3445                 data->temp_fixed_num = 3;
3446                 data->num_temp_alarms = 3;
3447                 data->num_temp_beeps = 3;
3448
3449                 data->ALARM_BITS = NCT6775_ALARM_BITS;
3450                 data->BEEP_BITS = NCT6775_BEEP_BITS;
3451
3452                 data->fan_from_reg = fan_from_reg16;
3453                 data->fan_from_reg_min = fan_from_reg8;
3454                 data->target_temp_mask = 0x7f;
3455                 data->tolerance_mask = 0x0f;
3456                 data->speed_tolerance_limit = 15;
3457
3458                 data->temp_label = nct6775_temp_label;
3459                 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
3460
3461                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3462                 data->REG_VBAT = NCT6775_REG_VBAT;
3463                 data->REG_DIODE = NCT6775_REG_DIODE;
3464                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3465                 data->REG_VIN = NCT6775_REG_IN;
3466                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3467                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3468                 data->REG_TARGET = NCT6775_REG_TARGET;
3469                 data->REG_FAN = NCT6775_REG_FAN;
3470                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3471                 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3472                 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3473                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3474                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3475                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3476                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3477                 data->REG_PWM[0] = NCT6775_REG_PWM;
3478                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3479                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3480                 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3481                 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3482                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3483                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3484                 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3485                 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3486                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3487                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3488                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3489                 data->REG_CRITICAL_TEMP_TOLERANCE
3490                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3491                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3492                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3493                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3494                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3495                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3496                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3497                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3498                 data->REG_ALARM = NCT6775_REG_ALARM;
3499                 data->REG_BEEP = NCT6775_REG_BEEP;
3500
3501                 reg_temp = NCT6775_REG_TEMP;
3502                 reg_temp_mon = NCT6775_REG_TEMP_MON;
3503                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3504                 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3505                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3506                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3507                 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3508                 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3509                 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3510
3511                 break;
3512         case nct6776:
3513                 data->in_num = 9;
3514                 data->pwm_num = 3;
3515                 data->auto_pwm_num = 4;
3516                 data->has_fan_div = false;
3517                 data->temp_fixed_num = 3;
3518                 data->num_temp_alarms = 3;
3519                 data->num_temp_beeps = 6;
3520
3521                 data->ALARM_BITS = NCT6776_ALARM_BITS;
3522                 data->BEEP_BITS = NCT6776_BEEP_BITS;
3523
3524                 data->fan_from_reg = fan_from_reg13;
3525                 data->fan_from_reg_min = fan_from_reg13;
3526                 data->target_temp_mask = 0xff;
3527                 data->tolerance_mask = 0x07;
3528                 data->speed_tolerance_limit = 63;
3529
3530                 data->temp_label = nct6776_temp_label;
3531                 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3532
3533                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3534                 data->REG_VBAT = NCT6775_REG_VBAT;
3535                 data->REG_DIODE = NCT6775_REG_DIODE;
3536                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3537                 data->REG_VIN = NCT6775_REG_IN;
3538                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3539                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3540                 data->REG_TARGET = NCT6775_REG_TARGET;
3541                 data->REG_FAN = NCT6775_REG_FAN;
3542                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3543                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3544                 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3545                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3546                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3547                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3548                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3549                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3550                 data->REG_PWM[0] = NCT6775_REG_PWM;
3551                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3552                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3553                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3554                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3555                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3556                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3557                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3558                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3559                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3560                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3561                 data->REG_CRITICAL_TEMP_TOLERANCE
3562                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3563                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3564                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3565                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3566                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3567                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3568                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3569                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3570                 data->REG_ALARM = NCT6775_REG_ALARM;
3571                 data->REG_BEEP = NCT6776_REG_BEEP;
3572
3573                 reg_temp = NCT6775_REG_TEMP;
3574                 reg_temp_mon = NCT6775_REG_TEMP_MON;
3575                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3576                 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3577                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3578                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3579                 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3580                 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3581                 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3582
3583                 break;
3584         case nct6779:
3585                 data->in_num = 15;
3586                 data->pwm_num = 5;
3587                 data->auto_pwm_num = 4;
3588                 data->has_fan_div = false;
3589                 data->temp_fixed_num = 6;
3590                 data->num_temp_alarms = 2;
3591                 data->num_temp_beeps = 2;
3592
3593                 data->ALARM_BITS = NCT6779_ALARM_BITS;
3594                 data->BEEP_BITS = NCT6779_BEEP_BITS;
3595
3596                 data->fan_from_reg = fan_from_reg13;
3597                 data->fan_from_reg_min = fan_from_reg13;
3598                 data->target_temp_mask = 0xff;
3599                 data->tolerance_mask = 0x07;
3600                 data->speed_tolerance_limit = 63;
3601
3602                 data->temp_label = nct6779_temp_label;
3603                 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3604
3605                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3606                 data->REG_VBAT = NCT6775_REG_VBAT;
3607                 data->REG_DIODE = NCT6775_REG_DIODE;
3608                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3609                 data->REG_VIN = NCT6779_REG_IN;
3610                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3611                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3612                 data->REG_TARGET = NCT6775_REG_TARGET;
3613                 data->REG_FAN = NCT6779_REG_FAN;
3614                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3615                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3616                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3617                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3618                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3619                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3620                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3621                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3622                 data->REG_PWM[0] = NCT6775_REG_PWM;
3623                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3624                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3625                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3626                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3627                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3628                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3629                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3630                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3631                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3632                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3633                 data->REG_CRITICAL_TEMP_TOLERANCE
3634                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3635                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3636                 data->CRITICAL_PWM_ENABLE_MASK
3637                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3638                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3639                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3640                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3641                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3642                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3643                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3644                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3645                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3646                 data->REG_ALARM = NCT6779_REG_ALARM;
3647                 data->REG_BEEP = NCT6776_REG_BEEP;
3648
3649                 reg_temp = NCT6779_REG_TEMP;
3650                 reg_temp_mon = NCT6779_REG_TEMP_MON;
3651                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3652                 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3653                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3654                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3655                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3656                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3657                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3658
3659                 break;
3660         case nct6791:
3661         case nct6792:
3662                 data->in_num = 15;
3663                 data->pwm_num = 6;
3664                 data->auto_pwm_num = 4;
3665                 data->has_fan_div = false;
3666                 data->temp_fixed_num = 6;
3667                 data->num_temp_alarms = 2;
3668                 data->num_temp_beeps = 2;
3669
3670                 data->ALARM_BITS = NCT6791_ALARM_BITS;
3671                 data->BEEP_BITS = NCT6779_BEEP_BITS;
3672
3673                 data->fan_from_reg = fan_from_reg13;
3674                 data->fan_from_reg_min = fan_from_reg13;
3675                 data->target_temp_mask = 0xff;
3676                 data->tolerance_mask = 0x07;
3677                 data->speed_tolerance_limit = 63;
3678
3679                 data->temp_label = nct6779_temp_label;
3680                 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3681
3682                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3683                 data->REG_VBAT = NCT6775_REG_VBAT;
3684                 data->REG_DIODE = NCT6775_REG_DIODE;
3685                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3686                 data->REG_VIN = NCT6779_REG_IN;
3687                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3688                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3689                 data->REG_TARGET = NCT6775_REG_TARGET;
3690                 data->REG_FAN = NCT6779_REG_FAN;
3691                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3692                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3693                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3694                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3695                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3696                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3697                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3698                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3699                 data->REG_PWM[0] = NCT6775_REG_PWM;
3700                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3701                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3702                 data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP;
3703                 data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE;
3704                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3705                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3706                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3707                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3708                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3709                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3710                 data->REG_CRITICAL_TEMP_TOLERANCE
3711                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3712                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3713                 data->CRITICAL_PWM_ENABLE_MASK
3714                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3715                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3716                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3717                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3718                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3719                 data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL;
3720                 data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP;
3721                 data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL;
3722                 data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE;
3723                 data->REG_ALARM = NCT6791_REG_ALARM;
3724                 if (data->kind == nct6791)
3725                         data->REG_BEEP = NCT6776_REG_BEEP;
3726                 else
3727                         data->REG_BEEP = NCT6792_REG_BEEP;
3728
3729                 reg_temp = NCT6779_REG_TEMP;
3730                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3731                 if (data->kind == nct6791) {
3732                         reg_temp_mon = NCT6779_REG_TEMP_MON;
3733                         num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3734                 } else {
3735                         reg_temp_mon = NCT6792_REG_TEMP_MON;
3736                         num_reg_temp_mon = ARRAY_SIZE(NCT6792_REG_TEMP_MON);
3737                 }
3738                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3739                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3740                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3741                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3742                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3743
3744                 break;
3745         default:
3746                 return -ENODEV;
3747         }
3748         data->have_in = (1 << data->in_num) - 1;
3749         data->have_temp = 0;
3750
3751         /*
3752          * On some boards, not all available temperature sources are monitored,
3753          * even though some of the monitoring registers are unused.
3754          * Get list of unused monitoring registers, then detect if any fan
3755          * controls are configured to use unmonitored temperature sources.
3756          * If so, assign the unmonitored temperature sources to available
3757          * monitoring registers.
3758          */
3759         mask = 0;
3760         available = 0;
3761         for (i = 0; i < num_reg_temp; i++) {
3762                 if (reg_temp[i] == 0)
3763                         continue;
3764
3765                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3766                 if (!src || (mask & (1 << src)))
3767                         available |= 1 << i;
3768
3769                 mask |= 1 << src;
3770         }
3771
3772         /*
3773          * Now find unmonitored temperature registers and enable monitoring
3774          * if additional monitoring registers are available.
3775          */
3776         add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
3777         add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
3778
3779         mask = 0;
3780         s = NUM_TEMP_FIXED;     /* First dynamic temperature attribute */
3781         for (i = 0; i < num_reg_temp; i++) {
3782                 if (reg_temp[i] == 0)
3783                         continue;
3784
3785                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3786                 if (!src || (mask & (1 << src)))
3787                         continue;
3788
3789                 if (src >= data->temp_label_num ||
3790                     !strlen(data->temp_label[src])) {
3791                         dev_info(dev,
3792                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3793                                  src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
3794                         continue;
3795                 }
3796
3797                 mask |= 1 << src;
3798
3799                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3800                 if (src <= data->temp_fixed_num) {
3801                         data->have_temp |= 1 << (src - 1);
3802                         data->have_temp_fixed |= 1 << (src - 1);
3803                         data->reg_temp[0][src - 1] = reg_temp[i];
3804                         data->reg_temp[1][src - 1] = reg_temp_over[i];
3805                         data->reg_temp[2][src - 1] = reg_temp_hyst[i];
3806                         if (reg_temp_crit_h && reg_temp_crit_h[i])
3807                                 data->reg_temp[3][src - 1] = reg_temp_crit_h[i];
3808                         else if (reg_temp_crit[src - 1])
3809                                 data->reg_temp[3][src - 1]
3810                                   = reg_temp_crit[src - 1];
3811                         if (reg_temp_crit_l && reg_temp_crit_l[i])
3812                                 data->reg_temp[4][src - 1] = reg_temp_crit_l[i];
3813                         data->reg_temp_config[src - 1] = reg_temp_config[i];
3814                         data->temp_src[src - 1] = src;
3815                         continue;
3816                 }
3817
3818                 if (s >= NUM_TEMP)
3819                         continue;
3820
3821                 /* Use dynamic index for other sources */
3822                 data->have_temp |= 1 << s;
3823                 data->reg_temp[0][s] = reg_temp[i];
3824                 data->reg_temp[1][s] = reg_temp_over[i];
3825                 data->reg_temp[2][s] = reg_temp_hyst[i];
3826                 data->reg_temp_config[s] = reg_temp_config[i];
3827                 if (reg_temp_crit_h && reg_temp_crit_h[i])
3828                         data->reg_temp[3][s] = reg_temp_crit_h[i];
3829                 else if (reg_temp_crit[src - 1])
3830                         data->reg_temp[3][s] = reg_temp_crit[src - 1];
3831                 if (reg_temp_crit_l && reg_temp_crit_l[i])
3832                         data->reg_temp[4][s] = reg_temp_crit_l[i];
3833
3834                 data->temp_src[s] = src;
3835                 s++;
3836         }
3837
3838         /*
3839          * Repeat with temperatures used for fan control.
3840          * This set of registers does not support limits.
3841          */
3842         for (i = 0; i < num_reg_temp_mon; i++) {
3843                 if (reg_temp_mon[i] == 0)
3844                         continue;
3845
3846                 src = nct6775_read_value(data, data->REG_TEMP_SEL[i]) & 0x1f;
3847                 if (!src || (mask & (1 << src)))
3848                         continue;
3849
3850                 if (src >= data->temp_label_num ||
3851                     !strlen(data->temp_label[src])) {
3852                         dev_info(dev,
3853                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3854                                  src, i, data->REG_TEMP_SEL[i],
3855                                  reg_temp_mon[i]);
3856                         continue;
3857                 }
3858
3859                 mask |= 1 << src;
3860
3861                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3862                 if (src <= data->temp_fixed_num) {
3863                         if (data->have_temp & (1 << (src - 1)))
3864                                 continue;
3865                         data->have_temp |= 1 << (src - 1);
3866                         data->have_temp_fixed |= 1 << (src - 1);
3867                         data->reg_temp[0][src - 1] = reg_temp_mon[i];
3868                         data->temp_src[src - 1] = src;
3869                         continue;
3870                 }
3871
3872                 if (s >= NUM_TEMP)
3873                         continue;
3874
3875                 /* Use dynamic index for other sources */
3876                 data->have_temp |= 1 << s;
3877                 data->reg_temp[0][s] = reg_temp_mon[i];
3878                 data->temp_src[s] = src;
3879                 s++;
3880         }
3881
3882 #ifdef USE_ALTERNATE
3883         /*
3884          * Go through the list of alternate temp registers and enable
3885          * if possible.
3886          * The temperature is already monitored if the respective bit in <mask>
3887          * is set.
3888          */
3889         for (i = 0; i < data->temp_label_num - 1; i++) {
3890                 if (!reg_temp_alternate[i])
3891                         continue;
3892                 if (mask & (1 << (i + 1)))
3893                         continue;
3894                 if (i < data->temp_fixed_num) {
3895                         if (data->have_temp & (1 << i))
3896                                 continue;
3897                         data->have_temp |= 1 << i;
3898                         data->have_temp_fixed |= 1 << i;
3899                         data->reg_temp[0][i] = reg_temp_alternate[i];
3900                         if (i < num_reg_temp) {
3901                                 data->reg_temp[1][i] = reg_temp_over[i];
3902                                 data->reg_temp[2][i] = reg_temp_hyst[i];
3903                         }
3904                         data->temp_src[i] = i + 1;
3905                         continue;
3906                 }
3907
3908                 if (s >= NUM_TEMP)      /* Abort if no more space */
3909                         break;
3910
3911                 data->have_temp |= 1 << s;
3912                 data->reg_temp[0][s] = reg_temp_alternate[i];
3913                 data->temp_src[s] = i + 1;
3914                 s++;
3915         }
3916 #endif /* USE_ALTERNATE */
3917
3918         /* Initialize the chip */
3919         nct6775_init_device(data);
3920
3921         err = superio_enter(sio_data->sioreg);
3922         if (err)
3923                 return err;
3924
3925         cr2a = superio_inb(sio_data->sioreg, 0x2a);
3926         switch (data->kind) {
3927         case nct6775:
3928                 data->have_vid = (cr2a & 0x40);
3929                 break;
3930         case nct6776:
3931                 data->have_vid = (cr2a & 0x60) == 0x40;
3932                 break;
3933         case nct6106:
3934         case nct6779:
3935         case nct6791:
3936         case nct6792:
3937                 break;
3938         }
3939
3940         /*
3941          * Read VID value
3942          * We can get the VID input values directly at logical device D 0xe3.
3943          */
3944         if (data->have_vid) {
3945                 superio_select(sio_data->sioreg, NCT6775_LD_VID);
3946                 data->vid = superio_inb(sio_data->sioreg, 0xe3);
3947                 data->vrm = vid_which_vrm();
3948         }
3949
3950         if (fan_debounce) {
3951                 u8 tmp;
3952
3953                 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3954                 tmp = superio_inb(sio_data->sioreg,
3955                                   NCT6775_REG_CR_FAN_DEBOUNCE);
3956                 switch (data->kind) {
3957                 case nct6106:
3958                         tmp |= 0xe0;
3959                         break;
3960                 case nct6775:
3961                         tmp |= 0x1e;
3962                         break;
3963                 case nct6776:
3964                 case nct6779:
3965                         tmp |= 0x3e;
3966                         break;
3967                 case nct6791:
3968                 case nct6792:
3969                         tmp |= 0x7e;
3970                         break;
3971                 }
3972                 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
3973                              tmp);
3974                 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
3975                          data->name);
3976         }
3977
3978         nct6775_check_fan_inputs(data);
3979
3980         superio_exit(sio_data->sioreg);
3981
3982         /* Read fan clock dividers immediately */
3983         nct6775_init_fan_common(dev, data);
3984
3985         /* Register sysfs hooks */
3986         group = nct6775_create_attr_group(dev, &nct6775_pwm_template_group,
3987                                           data->pwm_num);
3988         if (IS_ERR(group))
3989                 return PTR_ERR(group);
3990
3991         data->groups[num_attr_groups++] = group;
3992
3993         group = nct6775_create_attr_group(dev, &nct6775_in_template_group,
3994                                           fls(data->have_in));
3995         if (IS_ERR(group))
3996                 return PTR_ERR(group);
3997
3998         data->groups[num_attr_groups++] = group;
3999
4000         group = nct6775_create_attr_group(dev, &nct6775_fan_template_group,
4001                                           fls(data->has_fan));
4002         if (IS_ERR(group))
4003                 return PTR_ERR(group);
4004
4005         data->groups[num_attr_groups++] = group;
4006
4007         group = nct6775_create_attr_group(dev, &nct6775_temp_template_group,
4008                                           fls(data->have_temp));
4009         if (IS_ERR(group))
4010                 return PTR_ERR(group);
4011
4012         data->groups[num_attr_groups++] = group;
4013         data->groups[num_attr_groups++] = &nct6775_group_other;
4014
4015 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4016         err = sysfs_create_groups(&dev->kobj, data->groups);
4017         if (err < 0)
4018                 return err;
4019         hwmon_dev = hwmon_device_register(dev);
4020         if (IS_ERR(hwmon_dev)) {
4021                 sysfs_remove_groups(&dev->kobj, data->groups);
4022                 return PTR_ERR(hwmon_dev);
4023         }
4024         data->hwmon_dev = hwmon_dev;
4025 #else
4026         hwmon_dev = devm_hwmon_device_register_with_groups(dev, data->name,
4027                                                            data, data->groups);
4028 #endif
4029         return PTR_ERR_OR_ZERO(hwmon_dev);
4030 }
4031
4032 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4033 static int nct6775_remove(struct platform_device *pdev)
4034 {
4035         struct nct6775_data *data = platform_get_drvdata(pdev);
4036
4037         hwmon_device_unregister(data->hwmon_dev);
4038         sysfs_remove_groups(&pdev->dev.kobj, data->groups);
4039         return 0;
4040 }
4041 #endif
4042
4043 static void nct6791_enable_io_mapping(int sioaddr)
4044 {
4045         int val;
4046
4047         val = superio_inb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE);
4048         if (val & 0x10) {
4049                 pr_info("Enabling hardware monitor logical device mappings.\n");
4050                 superio_outb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE,
4051                              val & ~0x10);
4052         }
4053 }
4054
4055 #ifdef CONFIG_PM
4056 static int nct6775_suspend(struct device *dev)
4057 {
4058         struct nct6775_data *data = nct6775_update_device(dev);
4059
4060         mutex_lock(&data->update_lock);
4061         data->vbat = nct6775_read_value(data, data->REG_VBAT);
4062         if (data->kind == nct6775) {
4063                 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
4064                 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
4065         }
4066         mutex_unlock(&data->update_lock);
4067
4068         return 0;
4069 }
4070
4071 static int nct6775_resume(struct device *dev)
4072 {
4073         struct nct6775_data *data = dev_get_drvdata(dev);
4074         int sioreg = data->sioreg;
4075         int i, j, err = 0;
4076         u8 reg;
4077
4078         mutex_lock(&data->update_lock);
4079         data->bank = 0xff;              /* Force initial bank selection */
4080
4081         err = superio_enter(sioreg);
4082         if (err)
4083                 goto abort;
4084
4085         superio_select(sioreg, NCT6775_LD_HWM);
4086         reg = superio_inb(sioreg, SIO_REG_ENABLE);
4087         if (reg != data->sio_enable)
4088                 superio_outb(sioreg, SIO_REG_ENABLE, data->sio_enable);
4089
4090         if (data->kind == nct6791 || data->kind == nct6792)
4091                 nct6791_enable_io_mapping(sioreg);
4092
4093         superio_exit(sioreg);
4094
4095         /* Restore limits */
4096         for (i = 0; i < data->in_num; i++) {
4097                 if (!(data->have_in & (1 << i)))
4098                         continue;
4099
4100                 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
4101                                     data->in[i][1]);
4102                 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
4103                                     data->in[i][2]);
4104         }
4105
4106         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
4107                 if (!(data->has_fan_min & (1 << i)))
4108                         continue;
4109
4110                 nct6775_write_value(data, data->REG_FAN_MIN[i],
4111                                     data->fan_min[i]);
4112         }
4113
4114         for (i = 0; i < NUM_TEMP; i++) {
4115                 if (!(data->have_temp & (1 << i)))
4116                         continue;
4117
4118                 for (j = 1; j < ARRAY_SIZE(data->reg_temp); j++)
4119                         if (data->reg_temp[j][i])
4120                                 nct6775_write_temp(data, data->reg_temp[j][i],
4121                                                    data->temp[j][i]);
4122         }
4123
4124         /* Restore other settings */
4125         nct6775_write_value(data, data->REG_VBAT, data->vbat);
4126         if (data->kind == nct6775) {
4127                 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
4128                 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
4129         }
4130
4131 abort:
4132         /* Force re-reading all values */
4133         data->valid = false;
4134         mutex_unlock(&data->update_lock);
4135
4136         return err;
4137 }
4138
4139 static const struct dev_pm_ops nct6775_dev_pm_ops = {
4140         .suspend = nct6775_suspend,
4141         .resume = nct6775_resume,
4142         .freeze = nct6775_suspend,
4143         .restore = nct6775_resume,
4144 };
4145
4146 #define NCT6775_DEV_PM_OPS      (&nct6775_dev_pm_ops)
4147 #else
4148 #define NCT6775_DEV_PM_OPS      NULL
4149 #endif /* CONFIG_PM */
4150
4151 static struct platform_driver nct6775_driver = {
4152         .driver = {
4153                 .owner  = THIS_MODULE,
4154                 .name   = DRVNAME,
4155                 .pm     = NCT6775_DEV_PM_OPS,
4156         },
4157         .probe          = nct6775_probe,
4158 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4159         .remove         = nct6775_remove,
4160 #endif
4161 };
4162
4163 static const char * const nct6775_sio_names[] __initconst = {
4164         "NCT6106D",
4165         "NCT6775F",
4166         "NCT6776D/F",
4167         "NCT6779D",
4168         "NCT6791D",
4169         "NCT6792D",
4170 };
4171
4172 /* nct6775_find() looks for a '627 in the Super-I/O config space */
4173 static int __init nct6775_find(int sioaddr, struct nct6775_sio_data *sio_data)
4174 {
4175         u16 val;
4176         int err;
4177         int addr;
4178
4179         err = superio_enter(sioaddr);
4180         if (err)
4181                 return err;
4182
4183         if (force_id)
4184                 val = force_id;
4185         else
4186                 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
4187                     | superio_inb(sioaddr, SIO_REG_DEVID + 1);
4188         switch (val & SIO_ID_MASK) {
4189         case SIO_NCT6106_ID:
4190                 sio_data->kind = nct6106;
4191                 break;
4192         case SIO_NCT6775_ID:
4193                 sio_data->kind = nct6775;
4194                 break;
4195         case SIO_NCT6776_ID:
4196                 sio_data->kind = nct6776;
4197                 break;
4198         case SIO_NCT6779_ID:
4199                 sio_data->kind = nct6779;
4200                 break;
4201         case SIO_NCT6791_ID:
4202                 sio_data->kind = nct6791;
4203                 break;
4204         case SIO_NCT6792_ID:
4205                 sio_data->kind = nct6792;
4206                 break;
4207         default:
4208                 if (val != 0xffff)
4209                         pr_debug("unsupported chip ID: 0x%04x\n", val);
4210                 superio_exit(sioaddr);
4211                 return -ENODEV;
4212         }
4213
4214         /* We have a known chip, find the HWM I/O address */
4215         superio_select(sioaddr, NCT6775_LD_HWM);
4216         val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
4217             | superio_inb(sioaddr, SIO_REG_ADDR + 1);
4218         addr = val & IOREGION_ALIGNMENT;
4219         if (addr == 0) {
4220                 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
4221                 superio_exit(sioaddr);
4222                 return -ENODEV;
4223         }
4224
4225         /* Activate logical device if needed */
4226         val = superio_inb(sioaddr, SIO_REG_ENABLE);
4227         if (!(val & 0x01)) {
4228                 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
4229                 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
4230         }
4231
4232         if (sio_data->kind == nct6791 || sio_data->kind == nct6792)
4233                 nct6791_enable_io_mapping(sioaddr);
4234
4235         superio_exit(sioaddr);
4236         pr_info("Found %s or compatible chip at %#x:%#x\n",
4237                 nct6775_sio_names[sio_data->kind], sioaddr, addr);
4238         sio_data->sioreg = sioaddr;
4239
4240         return addr;
4241 }
4242
4243 /*
4244  * when Super-I/O functions move to a separate file, the Super-I/O
4245  * bus will manage the lifetime of the device and this module will only keep
4246  * track of the nct6775 driver. But since we use platform_device_alloc(), we
4247  * must keep track of the device
4248  */
4249 static struct platform_device *pdev[2];
4250
4251 static int __init sensors_nct6775_init(void)
4252 {
4253         int i, err;
4254         bool found = false;
4255         int address;
4256         struct resource res;
4257         struct nct6775_sio_data sio_data;
4258         int sioaddr[2] = { 0x2e, 0x4e };
4259
4260         err = platform_driver_register(&nct6775_driver);
4261         if (err)
4262                 return err;
4263
4264         /*
4265          * initialize sio_data->kind and sio_data->sioreg.
4266          *
4267          * when Super-I/O functions move to a separate file, the Super-I/O
4268          * driver will probe 0x2e and 0x4e and auto-detect the presence of a
4269          * nct6775 hardware monitor, and call probe()
4270          */
4271         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4272                 address = nct6775_find(sioaddr[i], &sio_data);
4273                 if (address <= 0)
4274                         continue;
4275
4276                 found = true;
4277
4278                 pdev[i] = platform_device_alloc(DRVNAME, address);
4279                 if (!pdev[i]) {
4280                         err = -ENOMEM;
4281                         goto exit_device_unregister;
4282                 }
4283
4284                 err = platform_device_add_data(pdev[i], &sio_data,
4285                                                sizeof(struct nct6775_sio_data));
4286                 if (err)
4287                         goto exit_device_put;
4288
4289                 memset(&res, 0, sizeof(res));
4290                 res.name = DRVNAME;
4291                 res.start = address + IOREGION_OFFSET;
4292                 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
4293                 res.flags = IORESOURCE_IO;
4294
4295                 err = acpi_check_resource_conflict(&res);
4296                 if (err) {
4297                         platform_device_put(pdev[i]);
4298                         pdev[i] = NULL;
4299                         continue;
4300                 }
4301
4302                 err = platform_device_add_resources(pdev[i], &res, 1);
4303                 if (err)
4304                         goto exit_device_put;
4305
4306                 /* platform_device_add calls probe() */
4307                 err = platform_device_add(pdev[i]);
4308                 if (err)
4309                         goto exit_device_put;
4310         }
4311         if (!found) {
4312                 err = -ENODEV;
4313                 goto exit_unregister;
4314         }
4315
4316         return 0;
4317
4318 exit_device_put:
4319         platform_device_put(pdev[i]);
4320 exit_device_unregister:
4321         while (--i >= 0) {
4322                 if (pdev[i])
4323                         platform_device_unregister(pdev[i]);
4324         }
4325 exit_unregister:
4326         platform_driver_unregister(&nct6775_driver);
4327         return err;
4328 }
4329
4330 static void __exit sensors_nct6775_exit(void)
4331 {
4332         int i;
4333
4334         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4335                 if (pdev[i])
4336                         platform_device_unregister(pdev[i]);
4337         }
4338         platform_driver_unregister(&nct6775_driver);
4339 }
4340
4341 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4342 MODULE_DESCRIPTION("NCT6106D/NCT6775F/NCT6776F/NCT6779D/NCT6791D/NCT6792D driver");
4343 MODULE_LICENSE("GPL");
4344
4345 module_init(sensors_nct6775_init);
4346 module_exit(sensors_nct6775_exit);