git.sur5r.net Git - groeck-nct6775/blob - nct6775.c

   1 /*
   2  * nct6775 - Driver for the hardware monitoring functionality of
   3  *             Nuvoton NCT677x Super-I/O chips
   4  *
   5  * Copyright (C) 2012  Guenter Roeck <linux@roeck-us.net>
   6  *
   7  * Derived from w83627ehf driver
   8  * Copyright (C) 2005-2012  Jean Delvare <khali@linux-fr.org>
   9  * Copyright (C) 2006  Yuan Mu (Winbond),
  10  *                     Rudolf Marek <r.marek@assembler.cz>
  11  *                     David Hubbard <david.c.hubbard@gmail.com>
  12  *                     Daniel J Blueman <daniel.blueman@gmail.com>
  13  * Copyright (C) 2010  Sheng-Yuan Huang (Nuvoton) (PS00)
  14  *
  15  * Shamelessly ripped from the w83627hf driver
  16  * Copyright (C) 2003  Mark Studebaker
  17  *
  18  * This program is free software; you can redistribute it and/or modify
  19  * it under the terms of the GNU General Public License as published by
  20  * the Free Software Foundation; either version 2 of the License, or
  21  * (at your option) any later version.
  22  *
  23  * This program is distributed in the hope that it will be useful,
  24  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26  * GNU General Public License for more details.
  27  *
  28  * You should have received a copy of the GNU General Public License
  29  * along with this program; if not, write to the Free Software
  30  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  31  *
  32  *
  33  * Supports the following chips:
  34  *
  35  * Chip        #vin    #fan    #pwm    #temp  chip IDs       man ID
  36  * nct6106d     9      3       3       6+3    0xc450 0xc1    0x5ca3
  37  * nct6775f     9      4       3       6+3    0xb470 0xc1    0x5ca3
  38  * nct6776f     9      5       3       6+3    0xc330 0xc1    0x5ca3
  39  * nct6779d    15      5       5       2+6    0xc560 0xc1    0x5ca3
  40  *
  41  * #temp lists the number of monitored temperature sources (first value) plus
  42  * the number of directly connectable temperature sensors (second value).
  43  */
  44
  45 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  46
  47 #include <linux/module.h>
  48 #include <linux/init.h>
  49 #include <linux/slab.h>
  50 #include <linux/jiffies.h>
  51 #include <linux/platform_device.h>
  52 #include <linux/hwmon.h>
  53 #include <linux/hwmon-sysfs.h>
  54 #include <linux/hwmon-vid.h>
  55 #include <linux/err.h>
  56 #include <linux/mutex.h>
  57 #include <linux/acpi.h>
  58 #include <linux/io.h>
  59 #include "lm75.h"
  60 #include "compat.h"
  61
  62 #define USE_ALTERNATE
  63
  64 enum kinds { nct6106, nct6775, nct6776, nct6779 };
  65
  66 /* used to set data->name = nct6775_device_names[data->sio_kind] */
  67 static const char * const nct6775_device_names[] = {
  68         "nct6106",
  69         "nct6775",
  70         "nct6776",
  71         "nct6779",
  72 };
  73
  74 static unsigned short force_id;
  75 module_param(force_id, ushort, 0);
  76 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  77
  78 static unsigned short fan_debounce;
  79 module_param(fan_debounce, ushort, 0);
  80 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
  81
  82 #define DRVNAME "nct6775"
  83
  84 /*
  85  * Super-I/O constants and functions
  86  */
  87
  88 #define NCT6775_LD_ACPI         0x0a
  89 #define NCT6775_LD_HWM          0x0b
  90 #define NCT6775_LD_VID          0x0d
  91
  92 #define SIO_REG_LDSEL           0x07    /* Logical device select */
  93 #define SIO_REG_DEVID           0x20    /* Device ID (2 bytes) */
  94 #define SIO_REG_ENABLE          0x30    /* Logical device enable */
  95 #define SIO_REG_ADDR            0x60    /* Logical device address (2 bytes) */
  96
  97 #define SIO_NCT6106_ID          0xc450
  98 #define SIO_NCT6775_ID          0xb470
  99 #define SIO_NCT6776_ID          0xc330
 100 #define SIO_NCT6779_ID          0xc560
 101 #define SIO_ID_MASK             0xFFF0
 102
 103 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
 104
 105 static inline void
 106 superio_outb(int ioreg, int reg, int val)
 107 {
 108         outb(reg, ioreg);
 109         outb(val, ioreg + 1);
 110 }
 111
 112 static inline int
 113 superio_inb(int ioreg, int reg)
 114 {
 115         outb(reg, ioreg);
 116         return inb(ioreg + 1);
 117 }
 118
 119 static inline void
 120 superio_select(int ioreg, int ld)
 121 {
 122         outb(SIO_REG_LDSEL, ioreg);
 123         outb(ld, ioreg + 1);
 124 }
 125
 126 static inline int
 127 superio_enter(int ioreg)
 128 {
 129         /*
 130          * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
 131          */
 132         if (!request_muxed_region(ioreg, 2, DRVNAME))
 133                 return -EBUSY;
 134
 135         outb(0x87, ioreg);
 136         outb(0x87, ioreg);
 137
 138         return 0;
 139 }
 140
 141 static inline void
 142 superio_exit(int ioreg)
 143 {
 144         outb(0xaa, ioreg);
 145         outb(0x02, ioreg);
 146         outb(0x02, ioreg + 1);
 147         release_region(ioreg, 2);
 148 }
 149
 150 /*
 151  * ISA constants
 152  */
 153
 154 #define IOREGION_ALIGNMENT      (~7)
 155 #define IOREGION_OFFSET         5
 156 #define IOREGION_LENGTH         2
 157 #define ADDR_REG_OFFSET         0
 158 #define DATA_REG_OFFSET         1
 159
 160 #define NCT6775_REG_BANK        0x4E
 161 #define NCT6775_REG_CONFIG      0x40
 162
 163 /*
 164  * Not currently used:
 165  * REG_MAN_ID has the value 0x5ca3 for all supported chips.
 166  * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
 167  * REG_MAN_ID is at port 0x4f
 168  * REG_CHIP_ID is at port 0x58
 169  */
 170
 171 #define NUM_TEMP        10      /* Max number of temp attribute sets w/ limits*/
 172 #define NUM_TEMP_FIXED  6       /* Max number of fixed temp attribute sets */
 173
 174 #define NUM_REG_ALARM   7       /* Max number of alarm registers */
 175
 176 /* Common and NCT6775 specific data */
 177
 178 /* Voltage min/max registers for nr=7..14 are in bank 5 */
 179
 180 static const u16 NCT6775_REG_IN_MAX[] = {
 181         0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
 182         0x55c, 0x55e, 0x560, 0x562 };
 183 static const u16 NCT6775_REG_IN_MIN[] = {
 184         0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
 185         0x55d, 0x55f, 0x561, 0x563 };
 186 static const u16 NCT6775_REG_IN[] = {
 187         0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
 188 };
 189
 190 #define NCT6775_REG_VBAT                0x5D
 191 #define NCT6775_REG_DIODE               0x5E
 192 #define NCT6775_DIODE_MASK              0x02
 193
 194 #define NCT6775_REG_FANDIV1             0x506
 195 #define NCT6775_REG_FANDIV2             0x507
 196
 197 #define NCT6775_REG_CR_FAN_DEBOUNCE     0xf0
 198
 199 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
 200
 201 /* 0..15 voltages, 16..23 fans, 24..31 temperatures */
 202
 203 static const s8 NCT6775_ALARM_BITS[] = {
 204         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 205         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 206         -1,                             /* unused */
 207         6, 7, 11, 10, 23,               /* fan1..fan5 */
 208         -1, -1, -1,                     /* unused */
 209         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 210         12, -1 };                       /* intrusion0, intrusion1 */
 211
 212 #define FAN_ALARM_BASE          16
 213 #define TEMP_ALARM_BASE         24
 214 #define INTRUSION_ALARM_BASE    30
 215
 216 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
 217 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
 218
 219 /* DC or PWM output fan configuration */
 220 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
 221 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
 222
 223 /* Advanced Fan control, some values are common for all fans */
 224
 225 static const u16 NCT6775_REG_TARGET[] = { 0x101, 0x201, 0x301, 0x801, 0x901 };
 226 static const u16 NCT6775_REG_FAN_MODE[] = { 0x102, 0x202, 0x302, 0x802, 0x902 };
 227 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
 228         0x103, 0x203, 0x303, 0x803, 0x903 };
 229 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
 230         0x104, 0x204, 0x304, 0x804, 0x904 };
 231 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
 232         0x105, 0x205, 0x305, 0x805, 0x905 };
 233 static const u16 NCT6775_REG_FAN_START_OUTPUT[]
 234         = { 0x106, 0x206, 0x306, 0x806, 0x906 };
 235 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
 236 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
 237
 238 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
 239         0x107, 0x207, 0x307, 0x807, 0x907 };
 240 static const u16 NCT6775_REG_PWM[] = { 0x109, 0x209, 0x309, 0x809, 0x909 };
 241 static const u16 NCT6775_REG_PWM_READ[] = { 0x01, 0x03, 0x11, 0x13, 0x15 };
 242
 243 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
 244 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
 245 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
 246 static const u16 NCT6775_FAN_PULSE_SHIFT[] = { 0, 0, 0, 0, 0 };
 247
 248 static const u16 NCT6775_REG_TEMP[] = {
 249         0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
 250
 251 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 252         0, 0x152, 0x252, 0x628, 0x629, 0x62A };
 253 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 254         0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
 255 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 256         0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
 257
 258 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 259         0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
 260
 261 static const u16 NCT6775_REG_TEMP_SEL[] = {
 262         0x100, 0x200, 0x300, 0x800, 0x900 };
 263
 264 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
 265         0x139, 0x239, 0x339, 0x839, 0x939 };
 266 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
 267         0x13a, 0x23a, 0x33a, 0x83a, 0x93a };
 268 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
 269         0x13b, 0x23b, 0x33b, 0x83b, 0x93b };
 270 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
 271         0x13c, 0x23c, 0x33c, 0x83c, 0x93c };
 272 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
 273         0x13d, 0x23d, 0x33d, 0x83d, 0x93d };
 274
 275 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
 276
 277 static const u16 NCT6775_REG_AUTO_TEMP[] = {
 278         0x121, 0x221, 0x321, 0x821, 0x921 };
 279 static const u16 NCT6775_REG_AUTO_PWM[] = {
 280         0x127, 0x227, 0x327, 0x827, 0x927 };
 281
 282 #define NCT6775_AUTO_TEMP(data, nr, p)  ((data)->REG_AUTO_TEMP[nr] + (p))
 283 #define NCT6775_AUTO_PWM(data, nr, p)   ((data)->REG_AUTO_PWM[nr] + (p))
 284
 285 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
 286
 287 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
 288         0x135, 0x235, 0x335, 0x835, 0x935 };
 289 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
 290         0x138, 0x238, 0x338, 0x838, 0x938 };
 291
 292 static const char *const nct6775_temp_label[] = {
 293         "",
 294         "SYSTIN",
 295         "CPUTIN",
 296         "AUXTIN",
 297         "AMD SB-TSI",
 298         "PECI Agent 0",
 299         "PECI Agent 1",
 300         "PECI Agent 2",
 301         "PECI Agent 3",
 302         "PECI Agent 4",
 303         "PECI Agent 5",
 304         "PECI Agent 6",
 305         "PECI Agent 7",
 306         "PCH_CHIP_CPU_MAX_TEMP",
 307         "PCH_CHIP_TEMP",
 308         "PCH_CPU_TEMP",
 309         "PCH_MCH_TEMP",
 310         "PCH_DIM0_TEMP",
 311         "PCH_DIM1_TEMP",
 312         "PCH_DIM2_TEMP",
 313         "PCH_DIM3_TEMP"
 314 };
 315
 316 static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
 317         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
 318
 319 static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
 320         = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
 321             0xa07 };
 322
 323 /* NCT6776 specific data */
 324
 325 static const s8 NCT6776_ALARM_BITS[] = {
 326         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 327         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 328         -1,                             /* unused */
 329         6, 7, 11, 10, 23,               /* fan1..fan5 */
 330         -1, -1, -1,                     /* unused */
 331         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 332         12, 9 };                        /* intrusion0, intrusion1 */
 333
 334 static const u16 NCT6776_REG_TOLERANCE_H[] = {
 335         0x10c, 0x20c, 0x30c, 0x80c, 0x90c };
 336
 337 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0 };
 338 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0 };
 339
 340 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
 341 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
 342
 343 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
 344         0x13e, 0x23e, 0x33e, 0x83e, 0x93e };
 345
 346 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 347         0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
 348
 349 static const char *const nct6776_temp_label[] = {
 350         "",
 351         "SYSTIN",
 352         "CPUTIN",
 353         "AUXTIN",
 354         "SMBUSMASTER 0",
 355         "SMBUSMASTER 1",
 356         "SMBUSMASTER 2",
 357         "SMBUSMASTER 3",
 358         "SMBUSMASTER 4",
 359         "SMBUSMASTER 5",
 360         "SMBUSMASTER 6",
 361         "SMBUSMASTER 7",
 362         "PECI Agent 0",
 363         "PECI Agent 1",
 364         "PCH_CHIP_CPU_MAX_TEMP",
 365         "PCH_CHIP_TEMP",
 366         "PCH_CPU_TEMP",
 367         "PCH_MCH_TEMP",
 368         "PCH_DIM0_TEMP",
 369         "PCH_DIM1_TEMP",
 370         "PCH_DIM2_TEMP",
 371         "PCH_DIM3_TEMP",
 372         "BYTE_TEMP"
 373 };
 374
 375 static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
 376         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
 377
 378 static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
 379         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
 380
 381 /* NCT6779 specific data */
 382
 383 static const u16 NCT6779_REG_IN[] = {
 384         0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
 385         0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
 386
 387 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
 388         0x459, 0x45A, 0x45B, 0x568 };
 389
 390 static const s8 NCT6779_ALARM_BITS[] = {
 391         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 392         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 393         -1,                             /* unused */
 394         6, 7, 11, 10, 23,               /* fan1..fan5 */
 395         -1, -1, -1,                     /* unused */
 396         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 397         12, 9 };                        /* intrusion0, intrusion1 */
 398
 399 static const u16 NCT6779_REG_FAN[] = { 0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8 };
 400 static const u16 NCT6779_REG_FAN_PULSES[] = {
 401         0x644, 0x645, 0x646, 0x647, 0x648 };
 402
 403 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
 404         0x136, 0x236, 0x336, 0x836, 0x936 };
 405 #define NCT6779_CRITICAL_PWM_ENABLE_MASK        0x01
 406 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
 407         0x137, 0x237, 0x337, 0x837, 0x937 };
 408
 409 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
 410 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 411         0x18, 0x152 };
 412 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 413         0x3a, 0x153 };
 414 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 415         0x39, 0x155 };
 416
 417 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
 418         0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
 419
 420 static const char *const nct6779_temp_label[] = {
 421         "",
 422         "SYSTIN",
 423         "CPUTIN",
 424         "AUXTIN0",
 425         "AUXTIN1",
 426         "AUXTIN2",
 427         "AUXTIN3",
 428         "",
 429         "SMBUSMASTER 0",
 430         "SMBUSMASTER 1",
 431         "SMBUSMASTER 2",
 432         "SMBUSMASTER 3",
 433         "SMBUSMASTER 4",
 434         "SMBUSMASTER 5",
 435         "SMBUSMASTER 6",
 436         "SMBUSMASTER 7",
 437         "PECI Agent 0",
 438         "PECI Agent 1",
 439         "PCH_CHIP_CPU_MAX_TEMP",
 440         "PCH_CHIP_TEMP",
 441         "PCH_CPU_TEMP",
 442         "PCH_MCH_TEMP",
 443         "PCH_DIM0_TEMP",
 444         "PCH_DIM1_TEMP",
 445         "PCH_DIM2_TEMP",
 446         "PCH_DIM3_TEMP",
 447         "BYTE_TEMP"
 448 };
 449
 450 static const u16 NCT6779_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6779_temp_label) - 1]
 451         = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
 452             0, 0, 0, 0, 0, 0, 0, 0,
 453             0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
 454             0x408, 0 };
 455
 456 static const u16 NCT6779_REG_TEMP_CRIT[ARRAY_SIZE(nct6779_temp_label) - 1]
 457         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
 458
 459 /* NCT6102D/NCT6106D specific data */
 460
 461 #define NCT6106_REG_VBAT        0x318
 462 #define NCT6106_REG_DIODE       0x319
 463 #define NCT6106_DIODE_MASK      0x01
 464
 465 static const u16 NCT6106_REG_IN_MAX[] = {
 466         0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
 467 static const u16 NCT6106_REG_IN_MIN[] = {
 468         0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
 469 static const u16 NCT6106_REG_IN[] = {
 470         0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
 471
 472 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
 473 static const u16 NCT6106_REG_TEMP_HYST[] = {
 474         0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
 475 static const u16 NCT6106_REG_TEMP_OVER[] = {
 476         0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
 477 static const u16 NCT6106_REG_TEMP_CRIT_L[] = {
 478         0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
 479 static const u16 NCT6106_REG_TEMP_CRIT_H[] = {
 480         0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
 481 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
 482 static const u16 NCT6106_REG_TEMP_CONFIG[] = {
 483         0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
 484
 485 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
 486 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
 487 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0, 0 };
 488 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4, 0, 0 };
 489
 490 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
 491 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
 492 static const u16 NCT6106_REG_PWM[] = { 0x119, 0x129, 0x139 };
 493 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c };
 494 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
 495 static const u16 NCT6106_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130 };
 496 static const u16 NCT6106_REG_TEMP_SOURCE[] = {
 497         0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
 498
 499 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
 500 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = {
 501         0x11b, 0x12b, 0x13b };
 502
 503 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
 504 #define NCT6106_CRITICAL_PWM_ENABLE_MASK        0x10
 505 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
 506
 507 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
 508 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
 509 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
 510 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
 511 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
 512 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
 513
 514 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
 515
 516 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
 517 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
 518 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
 519 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x17c };
 520 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
 521 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
 522
 523 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
 524 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
 525
 526 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = {
 527         0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
 528
 529 static const s8 NCT6106_ALARM_BITS[] = {
 530         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 531         9, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 532         -1,                             /* unused */
 533         32, 33, 34, -1, -1,             /* fan1..fan5 */
 534         -1, -1, -1,                     /* unused */
 535         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 536         48, -1                          /* intrusion0, intrusion1 */
 537 };
 538
 539 static const u16 NCT6106_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
 540         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x51, 0x52, 0x54 };
 541
 542 static const u16 NCT6106_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
 543         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x204, 0x205 };
 544
 545 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
 546 {
 547         if (mode == 0 && pwm == 255)
 548                 return off;
 549         return mode + 1;
 550 }
 551
 552 static int pwm_enable_to_reg(enum pwm_enable mode)
 553 {
 554         if (mode == off)
 555                 return 0;
 556         return mode - 1;
 557 }
 558
 559 /*
 560  * Conversions
 561  */
 562
 563 /* 1 is DC mode, output in ms */
 564 static unsigned int step_time_from_reg(u8 reg, u8 mode)
 565 {
 566         return mode ? 400 * reg : 100 * reg;
 567 }
 568
 569 static u8 step_time_to_reg(unsigned int msec, u8 mode)
 570 {
 571         return clamp_val((mode ? (msec + 200) / 400 :
 572                                         (msec + 50) / 100), 1, 255);
 573 }
 574
 575 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
 576 {
 577         if (reg == 0 || reg == 255)
 578                 return 0;
 579         return 1350000U / (reg << divreg);
 580 }
 581
 582 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
 583 {
 584         if ((reg & 0xff1f) == 0xff1f)
 585                 return 0;
 586
 587         reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
 588
 589         if (reg == 0)
 590                 return 0;
 591
 592         return 1350000U / reg;
 593 }
 594
 595 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
 596 {
 597         if (reg == 0 || reg == 0xffff)
 598                 return 0;
 599
 600         /*
 601          * Even though the registers are 16 bit wide, the fan divisor
 602          * still applies.
 603          */
 604         return 1350000U / (reg << divreg);
 605 }
 606
 607 static u16 fan_to_reg(u32 fan, unsigned int divreg)
 608 {
 609         if (!fan)
 610                 return 0;
 611
 612         return (1350000U / fan) >> divreg;
 613 }
 614
 615 static inline unsigned int
 616 div_from_reg(u8 reg)
 617 {
 618         return 1 << reg;
 619 }
 620
 621 /*
 622  * Some of the voltage inputs have internal scaling, the tables below
 623  * contain 8 (the ADC LSB in mV) * scaling factor * 100
 624  */
 625 static const u16 scale_in[15] = {
 626         800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
 627         800, 800
 628 };
 629
 630 static inline long in_from_reg(u8 reg, u8 nr)
 631 {
 632         return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
 633 }
 634
 635 static inline u8 in_to_reg(u32 val, u8 nr)
 636 {
 637         return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
 638 }
 639
 640 /*
 641  * Data structures and manipulation thereof
 642  */
 643
 644 struct nct6775_data {
 645         int addr;       /* IO base of hw monitor block */
 646         enum kinds kind;
 647         const char *name;
 648
 649         struct device *hwmon_dev;
 650         struct attribute_group *group_in;
 651         struct attribute_group *group_fan;
 652         struct attribute_group *group_temp;
 653         struct attribute_group *group_pwm;
 654
 655         u16 reg_temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 656                                     * 3=temp_crit, 4=temp_lcrit
 657                                     */
 658         u8 temp_src[NUM_TEMP];
 659         u16 reg_temp_config[NUM_TEMP];
 660         const char * const *temp_label;
 661         int temp_label_num;
 662
 663         u16 REG_CONFIG;
 664         u16 REG_VBAT;
 665         u16 REG_DIODE;
 666         u8 DIODE_MASK;
 667
 668         const s8 *ALARM_BITS;
 669
 670         const u16 *REG_VIN;
 671         const u16 *REG_IN_MINMAX[2];
 672
 673         const u16 *REG_TARGET;
 674         const u16 *REG_FAN;
 675         const u16 *REG_FAN_MODE;
 676         const u16 *REG_FAN_MIN;
 677         const u16 *REG_FAN_PULSES;
 678         const u16 *FAN_PULSE_SHIFT;
 679         const u16 *REG_FAN_TIME[3];
 680
 681         const u16 *REG_TOLERANCE_H;
 682
 683         const u8 *REG_PWM_MODE;
 684         const u8 *PWM_MODE_MASK;
 685
 686         const u16 *REG_PWM[7];  /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 687                                  * [3]=pwm_max, [4]=pwm_step,
 688                                  * [5]=weight_duty_step, [6]=weight_duty_base
 689                                  */
 690         const u16 *REG_PWM_READ;
 691
 692         const u16 *REG_CRITICAL_PWM_ENABLE;
 693         u8 CRITICAL_PWM_ENABLE_MASK;
 694         const u16 *REG_CRITICAL_PWM;
 695
 696         const u16 *REG_AUTO_TEMP;
 697         const u16 *REG_AUTO_PWM;
 698
 699         const u16 *REG_CRITICAL_TEMP;
 700         const u16 *REG_CRITICAL_TEMP_TOLERANCE;
 701
 702         const u16 *REG_TEMP_SOURCE;     /* temp register sources */
 703         const u16 *REG_TEMP_SEL;
 704         const u16 *REG_WEIGHT_TEMP_SEL;
 705         const u16 *REG_WEIGHT_TEMP[3];  /* 0=base, 1=tolerance, 2=step */
 706
 707         const u16 *REG_TEMP_OFFSET;
 708
 709         const u16 *REG_ALARM;
 710
 711         unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
 712         unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
 713
 714         struct mutex update_lock;
 715         bool valid;             /* true if following fields are valid */
 716         unsigned long last_updated;     /* In jiffies */
 717
 718         /* Register values */
 719         u8 bank;                /* current register bank */
 720         u8 in_num;              /* number of in inputs we have */
 721         u8 in[15][3];           /* [0]=in, [1]=in_max, [2]=in_min */
 722         unsigned int rpm[5];
 723         u16 fan_min[5];
 724         u8 fan_pulses[5];
 725         u8 fan_div[5];
 726         u8 has_pwm;
 727         u8 has_fan;             /* some fan inputs can be disabled */
 728         u8 has_fan_min;         /* some fans don't have min register */
 729         bool has_fan_div;
 730
 731         u8 temp_fixed_num;      /* 3 or 6 */
 732         u8 temp_type[NUM_TEMP_FIXED];
 733         s8 temp_offset[NUM_TEMP_FIXED];
 734         s16 temp[4][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 735                                 * 3=temp_crit */
 736         u64 alarms;
 737
 738         u8 pwm_num;     /* number of pwm */
 739         u8 pwm_mode[5]; /* 1->DC variable voltage, 0->PWM variable duty cycle */
 740         enum pwm_enable pwm_enable[5];
 741                         /* 0->off
 742                          * 1->manual
 743                          * 2->thermal cruise mode (also called SmartFan I)
 744                          * 3->fan speed cruise mode
 745                          * 4->SmartFan III
 746                          * 5->enhanced variable thermal cruise (SmartFan IV)
 747                          */
 748         u8 pwm[7][5];   /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 749                          * [3]=pwm_max, [4]=pwm_step,
 750                          * [5]=weight_duty_step, [6]=weight_duty_base
 751                          */
 752
 753         u8 target_temp[5];
 754         u8 target_temp_mask;
 755         u32 target_speed[5];
 756         u32 target_speed_tolerance[5];
 757         u8 speed_tolerance_limit;
 758
 759         u8 temp_tolerance[2][5];
 760         u8 tolerance_mask;
 761
 762         u8 fan_time[3][5]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
 763
 764         /* Automatic fan speed control registers */
 765         int auto_pwm_num;
 766         u8 auto_pwm[5][7];
 767         u8 auto_temp[5][7];
 768         u8 pwm_temp_sel[5];
 769         u8 pwm_weight_temp_sel[5];
 770         u8 weight_temp[3][5];   /* 0->temp_step, 1->temp_step_tol,
 771                                  * 2->temp_base
 772                                  */
 773
 774         u8 vid;
 775         u8 vrm;
 776
 777         bool have_vid;
 778
 779         u16 have_temp;
 780         u16 have_temp_fixed;
 781         u16 have_in;
 782 #ifdef CONFIG_PM
 783         /* Remember extra register values over suspend/resume */
 784         u8 vbat;
 785         u8 fandiv1;
 786         u8 fandiv2;
 787 #endif
 788 };
 789
 790 struct nct6775_sio_data {
 791         int sioreg;
 792         enum kinds kind;
 793 };
 794
 795 struct sensor_device_template {
 796         struct device_attribute dev_attr;
 797         union {
 798                 struct {
 799                         u8 nr;
 800                         u8 index;
 801                 } s;
 802                 int index;
 803         } u;
 804         bool s2;        /* true if both index and nr are used */
 805 };
 806
 807 struct sensor_device_attr_u {
 808         union {
 809                 struct sensor_device_attribute a1;
 810                 struct sensor_device_attribute_2 a2;
 811         } u;
 812         char name[32];
 813 };
 814
 815 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) {      \
 816         .attr = {.name = _template, .mode = _mode },            \
 817         .show   = _show,                                        \
 818         .store  = _store,                                       \
 819 }
 820
 821 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \
 822         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
 823           .u.index = _index,                                            \
 824           .s2 = false }
 825
 826 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,       \
 827                                  _nr, _index)                           \
 828         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
 829           .u.s.index = _index,                                          \
 830           .u.s.nr = _nr,                                                \
 831           .s2 = true }
 832
 833 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
 834 static struct sensor_device_template sensor_dev_template_##_name        \
 835         = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store,       \
 836                                  _index)
 837
 838 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store,       \
 839                           _nr, _index)                                  \
 840 static struct sensor_device_template sensor_dev_template_##_name        \
 841         = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,     \
 842                                  _nr, _index)
 843
 844 struct sensor_template_group {
 845         struct sensor_device_template **templates;
 846         umode_t (*is_visible)(struct kobject *, struct attribute *, int);
 847         int base;
 848 };
 849
 850 static struct attribute_group *
 851 nct6775_create_attr_group(struct device *dev, struct sensor_template_group *tg,
 852                           int repeat)
 853 {
 854         struct attribute_group *group;
 855         struct sensor_device_attr_u *su;
 856         struct sensor_device_attribute *a;
 857         struct sensor_device_attribute_2 *a2;
 858         struct attribute **attrs;
 859         struct sensor_device_template **t;
 860         int err, i, j, count;
 861
 862         if (repeat <= 0)
 863                 return ERR_PTR(-EINVAL);
 864
 865         t = tg->templates;
 866         for (count = 0; *t; t++, count++)
 867                 ;
 868
 869         if (count == 0)
 870                 return ERR_PTR(-EINVAL);
 871
 872         group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
 873         if (group == NULL)
 874                 return ERR_PTR(-ENOMEM);
 875
 876         attrs = devm_kzalloc(dev, sizeof(*attrs) * (repeat * count + 1),
 877                              GFP_KERNEL);
 878         if (attrs == NULL)
 879                 return ERR_PTR(-ENOMEM);
 880
 881         su = devm_kzalloc(dev, sizeof(*su) * repeat * count,
 882                                GFP_KERNEL);
 883         if (su == NULL)
 884                 return ERR_PTR(-ENOMEM);
 885
 886         group->attrs = attrs;
 887         group->is_visible = tg->is_visible;
 888
 889         for (i = 0; i < repeat; i++) {
 890                 t = tg->templates;
 891                 for (j = 0; *t != NULL; j++) {
 892                         snprintf(su->name, sizeof(su->name),
 893                                  (*t)->dev_attr.attr.name, tg->base + i);
 894                         if ((*t)->s2) {
 895                                 a2 = &su->u.a2;
 896                                 a2->dev_attr.attr.name = su->name;
 897                                 a2->nr = (*t)->u.s.nr + i;
 898                                 a2->index = (*t)->u.s.index;
 899                                 a2->dev_attr.attr.mode =
 900                                   (*t)->dev_attr.attr.mode;
 901                                 a2->dev_attr.show = (*t)->dev_attr.show;
 902                                 a2->dev_attr.store = (*t)->dev_attr.store;
 903                                 *attrs = &a2->dev_attr.attr;
 904                         } else {
 905                                 a = &su->u.a1;
 906                                 a->dev_attr.attr.name = su->name;
 907                                 a->index = (*t)->u.index + i;
 908                                 a->dev_attr.attr.mode =
 909                                   (*t)->dev_attr.attr.mode;
 910                                 a->dev_attr.show = (*t)->dev_attr.show;
 911                                 a->dev_attr.store = (*t)->dev_attr.store;
 912                                 *attrs = &a->dev_attr.attr;
 913                         }
 914                         attrs++;
 915                         su++;
 916                         t++;
 917                 }
 918         }
 919
 920         err = sysfs_create_group(&dev->kobj, group);
 921         if (err)
 922                 return ERR_PTR(-ENOMEM);
 923
 924         return group;
 925 }
 926
 927 static bool is_word_sized(struct nct6775_data *data, u16 reg)
 928 {
 929         switch (data->kind) {
 930         case nct6106:
 931                 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
 932                   reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
 933                   reg == 0x111 || reg == 0x121 || reg == 0x131;
 934         case nct6775:
 935                 return (((reg & 0xff00) == 0x100 ||
 936                     (reg & 0xff00) == 0x200) &&
 937                    ((reg & 0x00ff) == 0x50 ||
 938                     (reg & 0x00ff) == 0x53 ||
 939                     (reg & 0x00ff) == 0x55)) ||
 940                   (reg & 0xfff0) == 0x630 ||
 941                   reg == 0x640 || reg == 0x642 ||
 942                   reg == 0x662 ||
 943                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
 944                   reg == 0x73 || reg == 0x75 || reg == 0x77;
 945         case nct6776:
 946                 return (((reg & 0xff00) == 0x100 ||
 947                     (reg & 0xff00) == 0x200) &&
 948                    ((reg & 0x00ff) == 0x50 ||
 949                     (reg & 0x00ff) == 0x53 ||
 950                     (reg & 0x00ff) == 0x55)) ||
 951                   (reg & 0xfff0) == 0x630 ||
 952                   reg == 0x402 ||
 953                   reg == 0x640 || reg == 0x642 ||
 954                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
 955                   reg == 0x73 || reg == 0x75 || reg == 0x77;
 956         case nct6779:
 957                 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
 958                   ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x09) ||
 959                   reg == 0x402 ||
 960                   reg == 0x63a || reg == 0x63c || reg == 0x63e ||
 961                   reg == 0x640 || reg == 0x642 ||
 962                   reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
 963                   reg == 0x7b;
 964         }
 965         return false;
 966 }
 967
 968 /*
 969  * On older chips, only registers 0x50-0x5f are banked.
 970  * On more recent chips, all registers are banked.
 971  * Assume that is the case and set the bank number for each access.
 972  * Cache the bank number so it only needs to be set if it changes.
 973  */
 974 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
 975 {
 976         u8 bank = reg >> 8;
 977         if (data->bank != bank) {
 978                 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
 979                 outb_p(bank, data->addr + DATA_REG_OFFSET);
 980                 data->bank = bank;
 981         }
 982 }
 983
 984 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
 985 {
 986         int res, word_sized = is_word_sized(data, reg);
 987
 988         nct6775_set_bank(data, reg);
 989         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
 990         res = inb_p(data->addr + DATA_REG_OFFSET);
 991         if (word_sized) {
 992                 outb_p((reg & 0xff) + 1,
 993                        data->addr + ADDR_REG_OFFSET);
 994                 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
 995         }
 996         return res;
 997 }
 998
 999 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
1000 {
1001         int word_sized = is_word_sized(data, reg);
1002
1003         nct6775_set_bank(data, reg);
1004         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1005         if (word_sized) {
1006                 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
1007                 outb_p((reg & 0xff) + 1,
1008                        data->addr + ADDR_REG_OFFSET);
1009         }
1010         outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
1011         return 0;
1012 }
1013
1014 /* We left-align 8-bit temperature values to make the code simpler */
1015 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
1016 {
1017         u16 res;
1018
1019         res = nct6775_read_value(data, reg);
1020         if (!is_word_sized(data, reg))
1021                 res <<= 8;
1022
1023         return res;
1024 }
1025
1026 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
1027 {
1028         if (!is_word_sized(data, reg))
1029                 value >>= 8;
1030         return nct6775_write_value(data, reg, value);
1031 }
1032
1033 /* This function assumes that the caller holds data->update_lock */
1034 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
1035 {
1036         u8 reg;
1037
1038         switch (nr) {
1039         case 0:
1040                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
1041                     | (data->fan_div[0] & 0x7);
1042                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1043                 break;
1044         case 1:
1045                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
1046                     | ((data->fan_div[1] << 4) & 0x70);
1047                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1048                 break;
1049         case 2:
1050                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
1051                     | (data->fan_div[2] & 0x7);
1052                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1053                 break;
1054         case 3:
1055                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
1056                     | ((data->fan_div[3] << 4) & 0x70);
1057                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1058                 break;
1059         }
1060 }
1061
1062 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
1063 {
1064         if (data->kind == nct6775)
1065                 nct6775_write_fan_div(data, nr);
1066 }
1067
1068 static void nct6775_update_fan_div(struct nct6775_data *data)
1069 {
1070         u8 i;
1071
1072         i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
1073         data->fan_div[0] = i & 0x7;
1074         data->fan_div[1] = (i & 0x70) >> 4;
1075         i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
1076         data->fan_div[2] = i & 0x7;
1077         if (data->has_fan & (1 << 3))
1078                 data->fan_div[3] = (i & 0x70) >> 4;
1079 }
1080
1081 static void nct6775_update_fan_div_common(struct nct6775_data *data)
1082 {
1083         if (data->kind == nct6775)
1084                 nct6775_update_fan_div(data);
1085 }
1086
1087 static void nct6775_init_fan_div(struct nct6775_data *data)
1088 {
1089         int i;
1090
1091         nct6775_update_fan_div_common(data);
1092         /*
1093          * For all fans, start with highest divider value if the divider
1094          * register is not initialized. This ensures that we get a
1095          * reading from the fan count register, even if it is not optimal.
1096          * We'll compute a better divider later on.
1097          */
1098         for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
1099                 if (!(data->has_fan & (1 << i)))
1100                         continue;
1101                 if (data->fan_div[i] == 0) {
1102                         data->fan_div[i] = 7;
1103                         nct6775_write_fan_div_common(data, i);
1104                 }
1105         }
1106 }
1107
1108 static void nct6775_init_fan_common(struct device *dev,
1109                                     struct nct6775_data *data)
1110 {
1111         int i;
1112         u8 reg;
1113
1114         if (data->has_fan_div)
1115                 nct6775_init_fan_div(data);
1116
1117         /*
1118          * If fan_min is not set (0), set it to 0xff to disable it. This
1119          * prevents the unnecessary warning when fanX_min is reported as 0.
1120          */
1121         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1122                 if (data->has_fan_min & (1 << i)) {
1123                         reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
1124                         if (!reg)
1125                                 nct6775_write_value(data, data->REG_FAN_MIN[i],
1126                                                     data->has_fan_div ? 0xff
1127                                                                       : 0xff1f);
1128                 }
1129         }
1130 }
1131
1132 static void nct6775_select_fan_div(struct device *dev,
1133                                    struct nct6775_data *data, int nr, u16 reg)
1134 {
1135         u8 fan_div = data->fan_div[nr];
1136         u16 fan_min;
1137
1138         if (!data->has_fan_div)
1139                 return;
1140
1141         /*
1142          * If we failed to measure the fan speed, or the reported value is not
1143          * in the optimal range, and the clock divider can be modified,
1144          * let's try that for next time.
1145          */
1146         if (reg == 0x00 && fan_div < 0x07)
1147                 fan_div++;
1148         else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1149                 fan_div--;
1150
1151         if (fan_div != data->fan_div[nr]) {
1152                 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1153                         nr + 1, div_from_reg(data->fan_div[nr]),
1154                         div_from_reg(fan_div));
1155
1156                 /* Preserve min limit if possible */
1157                 if (data->has_fan_min & (1 << nr)) {
1158                         fan_min = data->fan_min[nr];
1159                         if (fan_div > data->fan_div[nr]) {
1160                                 if (fan_min != 255 && fan_min > 1)
1161                                         fan_min >>= 1;
1162                         } else {
1163                                 if (fan_min != 255) {
1164                                         fan_min <<= 1;
1165                                         if (fan_min > 254)
1166                                                 fan_min = 254;
1167                                 }
1168                         }
1169                         if (fan_min != data->fan_min[nr]) {
1170                                 data->fan_min[nr] = fan_min;
1171                                 nct6775_write_value(data, data->REG_FAN_MIN[nr],
1172                                                     fan_min);
1173                         }
1174                 }
1175                 data->fan_div[nr] = fan_div;
1176                 nct6775_write_fan_div_common(data, nr);
1177         }
1178 }
1179
1180 static void nct6775_update_pwm(struct device *dev)
1181 {
1182         struct nct6775_data *data = dev_get_drvdata(dev);
1183         int i, j;
1184         int fanmodecfg, reg;
1185         bool duty_is_dc;
1186
1187         for (i = 0; i < data->pwm_num; i++) {
1188                 if (!(data->has_pwm & (1 << i)))
1189                         continue;
1190
1191                 duty_is_dc = data->REG_PWM_MODE[i] &&
1192                   (nct6775_read_value(data, data->REG_PWM_MODE[i])
1193                    & data->PWM_MODE_MASK[i]);
1194                 data->pwm_mode[i] = duty_is_dc;
1195
1196                 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
1197                 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1198                         if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1199                                 data->pwm[j][i]
1200                                   = nct6775_read_value(data,
1201                                                        data->REG_PWM[j][i]);
1202                         }
1203                 }
1204
1205                 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1206                                                         (fanmodecfg >> 4) & 7);
1207
1208                 if (!data->temp_tolerance[0][i] ||
1209                     data->pwm_enable[i] != speed_cruise)
1210                         data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1211                 if (!data->target_speed_tolerance[i] ||
1212                     data->pwm_enable[i] == speed_cruise) {
1213                         u8 t = fanmodecfg & 0x0f;
1214                         if (data->REG_TOLERANCE_H) {
1215                                 t |= (nct6775_read_value(data,
1216                                       data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
1217                         }
1218                         data->target_speed_tolerance[i] = t;
1219                 }
1220
1221                 data->temp_tolerance[1][i] =
1222                         nct6775_read_value(data,
1223                                         data->REG_CRITICAL_TEMP_TOLERANCE[i]);
1224
1225                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
1226                 data->pwm_temp_sel[i] = reg & 0x1f;
1227                 /* If fan can stop, report floor as 0 */
1228                 if (reg & 0x80)
1229                         data->pwm[2][i] = 0;
1230
1231                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
1232                 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1233                 /* If weight is disabled, report weight source as 0 */
1234                 if (j == 1 && !(reg & 0x80))
1235                         data->pwm_weight_temp_sel[i] = 0;
1236
1237                 /* Weight temp data */
1238                 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
1239                         data->weight_temp[j][i]
1240                           = nct6775_read_value(data,
1241                                                data->REG_WEIGHT_TEMP[j][i]);
1242                 }
1243         }
1244 }
1245
1246 static void nct6775_update_pwm_limits(struct device *dev)
1247 {
1248         struct nct6775_data *data = dev_get_drvdata(dev);
1249         int i, j;
1250         u8 reg;
1251         u16 reg_t;
1252
1253         for (i = 0; i < data->pwm_num; i++) {
1254                 if (!(data->has_pwm & (1 << i)))
1255                         continue;
1256
1257                 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1258                         data->fan_time[j][i] =
1259                           nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1260                 }
1261
1262                 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1263                 /* Update only in matching mode or if never updated */
1264                 if (!data->target_temp[i] ||
1265                     data->pwm_enable[i] == thermal_cruise)
1266                         data->target_temp[i] = reg_t & data->target_temp_mask;
1267                 if (!data->target_speed[i] ||
1268                     data->pwm_enable[i] == speed_cruise) {
1269                         if (data->REG_TOLERANCE_H) {
1270                                 reg_t |= (nct6775_read_value(data,
1271                                         data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1272                         }
1273                         data->target_speed[i] = reg_t;
1274                 }
1275
1276                 for (j = 0; j < data->auto_pwm_num; j++) {
1277                         data->auto_pwm[i][j] =
1278                           nct6775_read_value(data,
1279                                              NCT6775_AUTO_PWM(data, i, j));
1280                         data->auto_temp[i][j] =
1281                           nct6775_read_value(data,
1282                                              NCT6775_AUTO_TEMP(data, i, j));
1283                 }
1284
1285                 /* critical auto_pwm temperature data */
1286                 data->auto_temp[i][data->auto_pwm_num] =
1287                         nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1288
1289                 switch (data->kind) {
1290                 case nct6775:
1291                         reg = nct6775_read_value(data,
1292                                                  NCT6775_REG_CRITICAL_ENAB[i]);
1293                         data->auto_pwm[i][data->auto_pwm_num] =
1294                                                 (reg & 0x02) ? 0xff : 0x00;
1295                         break;
1296                 case nct6776:
1297                         data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1298                         break;
1299                 case nct6106:
1300                 case nct6779:
1301                         reg = nct6775_read_value(data,
1302                                         data->REG_CRITICAL_PWM_ENABLE[i]);
1303                         if (reg & data->CRITICAL_PWM_ENABLE_MASK)
1304                                 reg = nct6775_read_value(data,
1305                                         data->REG_CRITICAL_PWM[i]);
1306                         else
1307                                 reg = 0xff;
1308                         data->auto_pwm[i][data->auto_pwm_num] = reg;
1309                         break;
1310                 }
1311         }
1312 }
1313
1314 static struct nct6775_data *nct6775_update_device(struct device *dev)
1315 {
1316         struct nct6775_data *data = dev_get_drvdata(dev);
1317         int i, j;
1318
1319         mutex_lock(&data->update_lock);
1320
1321         if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1322             || !data->valid) {
1323                 /* Fan clock dividers */
1324                 nct6775_update_fan_div_common(data);
1325
1326                 /* Measured voltages and limits */
1327                 for (i = 0; i < data->in_num; i++) {
1328                         if (!(data->have_in & (1 << i)))
1329                                 continue;
1330
1331                         data->in[i][0] = nct6775_read_value(data,
1332                                                             data->REG_VIN[i]);
1333                         data->in[i][1] = nct6775_read_value(data,
1334                                           data->REG_IN_MINMAX[0][i]);
1335                         data->in[i][2] = nct6775_read_value(data,
1336                                           data->REG_IN_MINMAX[1][i]);
1337                 }
1338
1339                 /* Measured fan speeds and limits */
1340                 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
1341                         u16 reg;
1342
1343                         if (!(data->has_fan & (1 << i)))
1344                                 continue;
1345
1346                         reg = nct6775_read_value(data, data->REG_FAN[i]);
1347                         data->rpm[i] = data->fan_from_reg(reg,
1348                                                           data->fan_div[i]);
1349
1350                         if (data->has_fan_min & (1 << i))
1351                                 data->fan_min[i] = nct6775_read_value(data,
1352                                            data->REG_FAN_MIN[i]);
1353                         data->fan_pulses[i] =
1354                           (nct6775_read_value(data, data->REG_FAN_PULSES[i])
1355                                 >> data->FAN_PULSE_SHIFT[i]) & 0x03;
1356
1357                         nct6775_select_fan_div(dev, data, i, reg);
1358                 }
1359
1360                 nct6775_update_pwm(dev);
1361                 nct6775_update_pwm_limits(dev);
1362
1363                 /* Measured temperatures and limits */
1364                 for (i = 0; i < NUM_TEMP; i++) {
1365                         if (!(data->have_temp & (1 << i)))
1366                                 continue;
1367                         for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1368                                 if (data->reg_temp[j][i])
1369                                         data->temp[j][i]
1370                                           = nct6775_read_temp(data,
1371                                                 data->reg_temp[j][i]);
1372                         }
1373                         if (!(data->have_temp_fixed & (1 << i)))
1374                                 continue;
1375                         data->temp_offset[i]
1376                           = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1377                 }
1378
1379                 data->alarms = 0;
1380                 for (i = 0; i < NUM_REG_ALARM; i++) {
1381                         u8 alarm;
1382                         if (!data->REG_ALARM[i])
1383                                 continue;
1384                         alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1385                         data->alarms |= ((u64)alarm) << (i << 3);
1386                 }
1387
1388                 data->last_updated = jiffies;
1389                 data->valid = true;
1390         }
1391
1392         mutex_unlock(&data->update_lock);
1393         return data;
1394 }
1395
1396 /*
1397  * Sysfs callback functions
1398  */
1399 static ssize_t
1400 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1401 {
1402         struct nct6775_data *data = nct6775_update_device(dev);
1403         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1404         int nr = sattr->nr;
1405         int index = sattr->index;
1406         return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1407 }
1408
1409 static ssize_t
1410 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1411              size_t count)
1412 {
1413         struct nct6775_data *data = dev_get_drvdata(dev);
1414         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1415         int nr = sattr->nr;
1416         int index = sattr->index;
1417         unsigned long val;
1418         int err = kstrtoul(buf, 10, &val);
1419         if (err < 0)
1420                 return err;
1421         mutex_lock(&data->update_lock);
1422         data->in[nr][index] = in_to_reg(val, nr);
1423         nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr],
1424                             data->in[nr][index]);
1425         mutex_unlock(&data->update_lock);
1426         return count;
1427 }
1428
1429 static ssize_t
1430 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1431 {
1432         struct nct6775_data *data = nct6775_update_device(dev);
1433         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1434         int nr = data->ALARM_BITS[sattr->index];
1435         return sprintf(buf, "%u\n",
1436                        (unsigned int)((data->alarms >> nr) & 0x01));
1437 }
1438
1439 static umode_t nct6775_in_is_visible(struct kobject *kobj,
1440                                      struct attribute *attr, int index)
1441 {
1442         struct device *dev = container_of(kobj, struct device, kobj);
1443         struct nct6775_data *data = dev_get_drvdata(dev);
1444         int in = index / 4;     /* voltage index */
1445
1446         if (!(data->have_in & (1 << in)))
1447                 return 0;
1448
1449         return attr->mode;
1450 }
1451
1452 SENSOR_TEMPLATE_2(in_input, "in%d_input", S_IRUGO, show_in_reg, NULL, 0, 0);
1453 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", S_IRUGO, show_alarm, NULL, 0);
1454 SENSOR_TEMPLATE_2(in_min, "in%d_min", S_IWUSR | S_IRUGO, show_in_reg,
1455                   store_in_reg, 0, 1);
1456 SENSOR_TEMPLATE_2(in_max, "in%d_max", S_IWUSR | S_IRUGO, show_in_reg,
1457                   store_in_reg, 0, 2);
1458
1459 /*
1460  * nct6775_in_is_visible uses the index into the following array
1461  * to determine if attributes should be created or not.
1462  * Any change in order or content must be matched.
1463  */
1464 static struct sensor_device_template *nct6775_attributes_in_template[] = {
1465         &sensor_dev_template_in_input,
1466         &sensor_dev_template_in_alarm,
1467         &sensor_dev_template_in_min,
1468         &sensor_dev_template_in_max,
1469         NULL
1470 };
1471
1472 static struct sensor_template_group nct6775_in_template_group = {
1473         .templates = nct6775_attributes_in_template,
1474         .is_visible = nct6775_in_is_visible,
1475 };
1476
1477 static ssize_t
1478 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1479 {
1480         struct nct6775_data *data = nct6775_update_device(dev);
1481         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1482         int nr = sattr->index;
1483         return sprintf(buf, "%d\n", data->rpm[nr]);
1484 }
1485
1486 static ssize_t
1487 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1488 {
1489         struct nct6775_data *data = nct6775_update_device(dev);
1490         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1491         int nr = sattr->index;
1492         return sprintf(buf, "%d\n",
1493                        data->fan_from_reg_min(data->fan_min[nr],
1494                                               data->fan_div[nr]));
1495 }
1496
1497 static ssize_t
1498 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1499 {
1500         struct nct6775_data *data = nct6775_update_device(dev);
1501         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1502         int nr = sattr->index;
1503         return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1504 }
1505
1506 static ssize_t
1507 store_fan_min(struct device *dev, struct device_attribute *attr,
1508               const char *buf, size_t count)
1509 {
1510         struct nct6775_data *data = dev_get_drvdata(dev);
1511         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1512         int nr = sattr->index;
1513         unsigned long val;
1514         int err;
1515         unsigned int reg;
1516         u8 new_div;
1517
1518         err = kstrtoul(buf, 10, &val);
1519         if (err < 0)
1520                 return err;
1521
1522         mutex_lock(&data->update_lock);
1523         if (!data->has_fan_div) {
1524                 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1525                 if (!val) {
1526                         val = 0xff1f;
1527                 } else {
1528                         if (val > 1350000U)
1529                                 val = 135000U;
1530                         val = 1350000U / val;
1531                         val = (val & 0x1f) | ((val << 3) & 0xff00);
1532                 }
1533                 data->fan_min[nr] = val;
1534                 goto write_min; /* Leave fan divider alone */
1535         }
1536         if (!val) {
1537                 /* No min limit, alarm disabled */
1538                 data->fan_min[nr] = 255;
1539                 new_div = data->fan_div[nr]; /* No change */
1540                 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1541                 goto write_div;
1542         }
1543         reg = 1350000U / val;
1544         if (reg >= 128 * 255) {
1545                 /*
1546                  * Speed below this value cannot possibly be represented,
1547                  * even with the highest divider (128)
1548                  */
1549                 data->fan_min[nr] = 254;
1550                 new_div = 7; /* 128 == (1 << 7) */
1551                 dev_warn(dev,
1552                          "fan%u low limit %lu below minimum %u, set to minimum\n",
1553                          nr + 1, val, data->fan_from_reg_min(254, 7));
1554         } else if (!reg) {
1555                 /*
1556                  * Speed above this value cannot possibly be represented,
1557                  * even with the lowest divider (1)
1558                  */
1559                 data->fan_min[nr] = 1;
1560                 new_div = 0; /* 1 == (1 << 0) */
1561                 dev_warn(dev,
1562                          "fan%u low limit %lu above maximum %u, set to maximum\n",
1563                          nr + 1, val, data->fan_from_reg_min(1, 0));
1564         } else {
1565                 /*
1566                  * Automatically pick the best divider, i.e. the one such
1567                  * that the min limit will correspond to a register value
1568                  * in the 96..192 range
1569                  */
1570                 new_div = 0;
1571                 while (reg > 192 && new_div < 7) {
1572                         reg >>= 1;
1573                         new_div++;
1574                 }
1575                 data->fan_min[nr] = reg;
1576         }
1577
1578 write_div:
1579         /*
1580          * Write both the fan clock divider (if it changed) and the new
1581          * fan min (unconditionally)
1582          */
1583         if (new_div != data->fan_div[nr]) {
1584                 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1585                         nr + 1, div_from_reg(data->fan_div[nr]),
1586                         div_from_reg(new_div));
1587                 data->fan_div[nr] = new_div;
1588                 nct6775_write_fan_div_common(data, nr);
1589                 /* Give the chip time to sample a new speed value */
1590                 data->last_updated = jiffies;
1591         }
1592
1593 write_min:
1594         nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1595         mutex_unlock(&data->update_lock);
1596
1597         return count;
1598 }
1599
1600 static ssize_t
1601 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
1602 {
1603         struct nct6775_data *data = nct6775_update_device(dev);
1604         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1605         int p = data->fan_pulses[sattr->index];
1606
1607         return sprintf(buf, "%d\n", p ? : 4);
1608 }
1609
1610 static ssize_t
1611 store_fan_pulses(struct device *dev, struct device_attribute *attr,
1612                  const char *buf, size_t count)
1613 {
1614         struct nct6775_data *data = dev_get_drvdata(dev);
1615         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1616         int nr = sattr->index;
1617         unsigned long val;
1618         int err;
1619         u8 reg;
1620
1621         err = kstrtoul(buf, 10, &val);
1622         if (err < 0)
1623                 return err;
1624
1625         if (val > 4)
1626                 return -EINVAL;
1627
1628         mutex_lock(&data->update_lock);
1629         data->fan_pulses[nr] = val & 3;
1630         reg = nct6775_read_value(data, data->REG_FAN_PULSES[nr]);
1631         reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
1632         reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
1633         nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
1634         mutex_unlock(&data->update_lock);
1635
1636         return count;
1637 }
1638
1639 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
1640                                       struct attribute *attr, int index)
1641 {
1642         struct device *dev = container_of(kobj, struct device, kobj);
1643         struct nct6775_data *data = dev_get_drvdata(dev);
1644         int fan = index / 5;    /* fan index */
1645         int nr = index % 5;     /* attribute index */
1646
1647         if (!(data->has_fan & (1 << fan)))
1648                 return 0;
1649
1650         if (nr == 3 && !(data->has_fan_min & (1 << fan)))
1651                 return 0;
1652         if (nr == 4 && data->kind != nct6775)
1653                 return 0;
1654
1655         return attr->mode;
1656 }
1657
1658 SENSOR_TEMPLATE(fan_input, "fan%d_input", S_IRUGO, show_fan, NULL, 0);
1659 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", S_IRUGO, show_alarm, NULL,
1660                 FAN_ALARM_BASE);
1661 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", S_IWUSR | S_IRUGO, show_fan_pulses,
1662                 store_fan_pulses, 0);
1663 SENSOR_TEMPLATE(fan_min, "fan%d_min", S_IWUSR | S_IRUGO, show_fan_min,
1664                 store_fan_min, 0);
1665 SENSOR_TEMPLATE(fan_div, "fan%d_div", S_IRUGO, show_fan_div, NULL, 0);
1666
1667 /*
1668  * nct6775_fan_is_visible uses the index into the following array
1669  * to determine if attributes should be created or not.
1670  * Any change in order or content must be matched.
1671  */
1672 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
1673         &sensor_dev_template_fan_input,
1674         &sensor_dev_template_fan_alarm,
1675         &sensor_dev_template_fan_pulses,
1676         &sensor_dev_template_fan_min,   /* 3 */
1677         &sensor_dev_template_fan_div,   /* 4 */
1678         NULL
1679 };
1680
1681 static struct sensor_template_group nct6775_fan_template_group = {
1682         .templates = nct6775_attributes_fan_template,
1683         .is_visible = nct6775_fan_is_visible,
1684         .base = 1,
1685 };
1686
1687 static ssize_t
1688 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1689 {
1690         struct nct6775_data *data = nct6775_update_device(dev);
1691         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1692         int nr = sattr->index;
1693         return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1694 }
1695
1696 static ssize_t
1697 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1698 {
1699         struct nct6775_data *data = nct6775_update_device(dev);
1700         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1701         int nr = sattr->nr;
1702         int index = sattr->index;
1703
1704         return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
1705 }
1706
1707 static ssize_t
1708 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
1709            size_t count)
1710 {
1711         struct nct6775_data *data = dev_get_drvdata(dev);
1712         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1713         int nr = sattr->nr;
1714         int index = sattr->index;
1715         int err;
1716         long val;
1717
1718         err = kstrtol(buf, 10, &val);
1719         if (err < 0)
1720                 return err;
1721
1722         mutex_lock(&data->update_lock);
1723         data->temp[index][nr] = LM75_TEMP_TO_REG(val);
1724         nct6775_write_temp(data, data->reg_temp[index][nr],
1725                            data->temp[index][nr]);
1726         mutex_unlock(&data->update_lock);
1727         return count;
1728 }
1729
1730 static ssize_t
1731 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
1732 {
1733         struct nct6775_data *data = nct6775_update_device(dev);
1734         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1735
1736         return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
1737 }
1738
1739 static ssize_t
1740 store_temp_offset(struct device *dev, struct device_attribute *attr,
1741                   const char *buf, size_t count)
1742 {
1743         struct nct6775_data *data = dev_get_drvdata(dev);
1744         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1745         int nr = sattr->index;
1746         long val;
1747         int err;
1748
1749         err = kstrtol(buf, 10, &val);
1750         if (err < 0)
1751                 return err;
1752
1753         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
1754
1755         mutex_lock(&data->update_lock);
1756         data->temp_offset[nr] = val;
1757         nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
1758         mutex_unlock(&data->update_lock);
1759
1760         return count;
1761 }
1762
1763 static ssize_t
1764 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
1765 {
1766         struct nct6775_data *data = nct6775_update_device(dev);
1767         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1768         int nr = sattr->index;
1769         return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
1770 }
1771
1772 static ssize_t
1773 store_temp_type(struct device *dev, struct device_attribute *attr,
1774                 const char *buf, size_t count)
1775 {
1776         struct nct6775_data *data = nct6775_update_device(dev);
1777         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1778         int nr = sattr->index;
1779         unsigned long val;
1780         int err;
1781         u8 vbat, diode, vbit, dbit;
1782
1783         err = kstrtoul(buf, 10, &val);
1784         if (err < 0)
1785                 return err;
1786
1787         if (val != 1 && val != 3 && val != 4)
1788                 return -EINVAL;
1789
1790         mutex_lock(&data->update_lock);
1791
1792         data->temp_type[nr] = val;
1793         vbit = 0x02 << nr;
1794         dbit = data->DIODE_MASK << nr;
1795         vbat = nct6775_read_value(data, data->REG_VBAT) & ~vbit;
1796         diode = nct6775_read_value(data, data->REG_DIODE) & ~dbit;
1797         switch (val) {
1798         case 1: /* CPU diode (diode, current mode) */
1799                 vbat |= vbit;
1800                 diode |= dbit;
1801                 break;
1802         case 3: /* diode, voltage mode */
1803                 vbat |= dbit;
1804                 break;
1805         case 4: /* thermistor */
1806                 break;
1807         }
1808         nct6775_write_value(data, data->REG_VBAT, vbat);
1809         nct6775_write_value(data, data->REG_DIODE, diode);
1810
1811         mutex_unlock(&data->update_lock);
1812         return count;
1813 }
1814
1815 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
1816                                        struct attribute *attr, int index)
1817 {
1818         struct device *dev = container_of(kobj, struct device, kobj);
1819         struct nct6775_data *data = dev_get_drvdata(dev);
1820         int temp = index / 9;   /* temp index */
1821         int nr = index % 9;     /* attribute index */
1822
1823         if (!(data->have_temp & (1 << temp)))
1824                 return 0;
1825
1826         if (nr == 2 && !data->reg_temp[1][temp])        /* max */
1827                 return 0;
1828
1829         if (nr == 3 && !data->reg_temp[2][temp])        /* max_hyst */
1830                 return 0;
1831
1832         if (nr == 4 && !data->reg_temp[3][temp])        /* crit */
1833                 return 0;
1834
1835         if (nr == 5 && !data->reg_temp[4][temp])        /* lcrit */
1836                 return 0;
1837
1838         if (nr > 5 && !(data->have_temp_fixed & (1 << temp)))
1839                 return 0;
1840
1841         if (nr == 8 && data->ALARM_BITS[TEMP_ALARM_BASE + temp] < 0)
1842                 return 0;
1843
1844         return attr->mode;
1845 }
1846
1847 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", S_IRUGO, show_temp, NULL, 0, 0);
1848 SENSOR_TEMPLATE(temp_label, "temp%d_label", S_IRUGO, show_temp_label, NULL, 0);
1849 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", S_IRUGO | S_IWUSR, show_temp,
1850                   store_temp, 0, 1);
1851 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", S_IRUGO | S_IWUSR,
1852                   show_temp, store_temp, 0, 2);
1853 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", S_IRUGO | S_IWUSR, show_temp,
1854                   store_temp, 0, 3);
1855 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", S_IRUGO | S_IWUSR,
1856                 show_temp_offset, store_temp_offset, 0);
1857 SENSOR_TEMPLATE(temp_type, "temp%d_type", S_IRUGO | S_IWUSR, show_temp_type,
1858                 store_temp_type, 0);
1859 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", S_IRUGO, show_alarm, NULL,
1860                 TEMP_ALARM_BASE);
1861 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", S_IRUGO | S_IWUSR, show_temp,
1862                   store_temp, 0, 4);
1863
1864 /*
1865  * nct6775_temp_is_visible uses the index into the following array
1866  * to determine if attributes should be created or not.
1867  * Any change in order or content must be matched.
1868  */
1869 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
1870         &sensor_dev_template_temp_input,
1871         &sensor_dev_template_temp_label,
1872         &sensor_dev_template_temp_max,          /* 2 */
1873         &sensor_dev_template_temp_max_hyst,     /* 3 */
1874         &sensor_dev_template_temp_crit,         /* 4 */
1875         &sensor_dev_template_temp_lcrit,        /* 5 */
1876         &sensor_dev_template_temp_offset,       /* 6 */
1877         &sensor_dev_template_temp_type,         /* 7 */
1878         &sensor_dev_template_temp_alarm,        /* 8 */
1879         NULL
1880 };
1881
1882 static struct sensor_template_group nct6775_temp_template_group = {
1883         .templates = nct6775_attributes_temp_template,
1884         .is_visible = nct6775_temp_is_visible,
1885         .base = 1,
1886 };
1887
1888 static ssize_t
1889 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
1890 {
1891         struct nct6775_data *data = nct6775_update_device(dev);
1892         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1893
1894         return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
1895 }
1896
1897 static ssize_t
1898 store_pwm_mode(struct device *dev, struct device_attribute *attr,
1899                const char *buf, size_t count)
1900 {
1901         struct nct6775_data *data = dev_get_drvdata(dev);
1902         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1903         int nr = sattr->index;
1904         unsigned long val;
1905         int err;
1906         u8 reg;
1907
1908         err = kstrtoul(buf, 10, &val);
1909         if (err < 0)
1910                 return err;
1911
1912         if (val > 1)
1913                 return -EINVAL;
1914
1915         /* Setting DC mode is not supported for all chips/channels */
1916         if (data->REG_PWM_MODE[nr] == 0) {
1917                 if (val)
1918                         return -EINVAL;
1919                 return count;
1920         }
1921
1922         mutex_lock(&data->update_lock);
1923         data->pwm_mode[nr] = val;
1924         reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
1925         reg &= ~data->PWM_MODE_MASK[nr];
1926         if (val)
1927                 reg |= data->PWM_MODE_MASK[nr];
1928         nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
1929         mutex_unlock(&data->update_lock);
1930         return count;
1931 }
1932
1933 static ssize_t
1934 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1935 {
1936         struct nct6775_data *data = nct6775_update_device(dev);
1937         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1938         int nr = sattr->nr;
1939         int index = sattr->index;
1940         int pwm;
1941
1942         /*
1943          * For automatic fan control modes, show current pwm readings.
1944          * Otherwise, show the configured value.
1945          */
1946         if (index == 0 && data->pwm_enable[nr] > manual)
1947                 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
1948         else
1949                 pwm = data->pwm[index][nr];
1950
1951         return sprintf(buf, "%d\n", pwm);
1952 }
1953
1954 static ssize_t
1955 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
1956           size_t count)
1957 {
1958         struct nct6775_data *data = dev_get_drvdata(dev);
1959         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1960         int nr = sattr->nr;
1961         int index = sattr->index;
1962         unsigned long val;
1963         int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
1964         int maxval[7]
1965           = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
1966         int err;
1967         u8 reg;
1968
1969         err = kstrtoul(buf, 10, &val);
1970         if (err < 0)
1971                 return err;
1972         val = clamp_val(val, minval[index], maxval[index]);
1973
1974         mutex_lock(&data->update_lock);
1975         data->pwm[index][nr] = val;
1976         nct6775_write_value(data, data->REG_PWM[index][nr], val);
1977         if (index == 2) { /* floor: disable if val == 0 */
1978                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
1979                 reg &= 0x7f;
1980                 if (val)
1981                         reg |= 0x80;
1982                 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
1983         }
1984         mutex_unlock(&data->update_lock);
1985         return count;
1986 }
1987
1988 /* Returns 0 if OK, -EINVAL otherwise */
1989 static int check_trip_points(struct nct6775_data *data, int nr)
1990 {
1991         int i;
1992
1993         for (i = 0; i < data->auto_pwm_num - 1; i++) {
1994                 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1995                         return -EINVAL;
1996         }
1997         for (i = 0; i < data->auto_pwm_num - 1; i++) {
1998                 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1999                         return -EINVAL;
2000         }
2001         /* validate critical temperature and pwm if enabled (pwm > 0) */
2002         if (data->auto_pwm[nr][data->auto_pwm_num]) {
2003                 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2004                                 data->auto_temp[nr][data->auto_pwm_num] ||
2005                     data->auto_pwm[nr][data->auto_pwm_num - 1] >
2006                                 data->auto_pwm[nr][data->auto_pwm_num])
2007                         return -EINVAL;
2008         }
2009         return 0;
2010 }
2011
2012 static void pwm_update_registers(struct nct6775_data *data, int nr)
2013 {
2014         u8 reg;
2015
2016         switch (data->pwm_enable[nr]) {
2017         case off:
2018         case manual:
2019                 break;
2020         case speed_cruise:
2021                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2022                 reg = (reg & ~data->tolerance_mask) |
2023                   (data->target_speed_tolerance[nr] & data->tolerance_mask);
2024                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2025                 nct6775_write_value(data, data->REG_TARGET[nr],
2026                                     data->target_speed[nr] & 0xff);
2027                 if (data->REG_TOLERANCE_H) {
2028                         reg = (data->target_speed[nr] >> 8) & 0x0f;
2029                         reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2030                         nct6775_write_value(data,
2031                                             data->REG_TOLERANCE_H[nr],
2032                                             reg);
2033                 }
2034                 break;
2035         case thermal_cruise:
2036                 nct6775_write_value(data, data->REG_TARGET[nr],
2037                                     data->target_temp[nr]);
2038                 /* intentional */
2039         default:
2040                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2041                 reg = (reg & ~data->tolerance_mask) |
2042                   data->temp_tolerance[0][nr];
2043                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2044                 break;
2045         }
2046 }
2047
2048 static ssize_t
2049 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2050 {
2051         struct nct6775_data *data = nct6775_update_device(dev);
2052         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2053
2054         return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2055 }
2056
2057 static ssize_t
2058 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2059                  const char *buf, size_t count)
2060 {
2061         struct nct6775_data *data = dev_get_drvdata(dev);
2062         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2063         int nr = sattr->index;
2064         unsigned long val;
2065         int err;
2066         u16 reg;
2067
2068         err = kstrtoul(buf, 10, &val);
2069         if (err < 0)
2070                 return err;
2071
2072         if (val > sf4)
2073                 return -EINVAL;
2074
2075         if (val == sf3 && data->kind != nct6775)
2076                 return -EINVAL;
2077
2078         if (val == sf4 && check_trip_points(data, nr)) {
2079                 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2080                 dev_err(dev, "Adjust trip points and try again\n");
2081                 return -EINVAL;
2082         }
2083
2084         mutex_lock(&data->update_lock);
2085         data->pwm_enable[nr] = val;
2086         if (val == off) {
2087                 /*
2088                  * turn off pwm control: select manual mode, set pwm to maximum
2089                  */
2090                 data->pwm[0][nr] = 255;
2091                 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2092         }
2093         pwm_update_registers(data, nr);
2094         reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2095         reg &= 0x0f;
2096         reg |= pwm_enable_to_reg(val) << 4;
2097         nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2098         mutex_unlock(&data->update_lock);
2099         return count;
2100 }
2101
2102 static ssize_t
2103 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2104 {
2105         int i, sel = 0;
2106
2107         for (i = 0; i < NUM_TEMP; i++) {
2108                 if (!(data->have_temp & (1 << i)))
2109                         continue;
2110                 if (src == data->temp_src[i]) {
2111                         sel = i + 1;
2112                         break;
2113                 }
2114         }
2115
2116         return sprintf(buf, "%d\n", sel);
2117 }
2118
2119 static ssize_t
2120 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2121 {
2122         struct nct6775_data *data = nct6775_update_device(dev);
2123         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2124         int index = sattr->index;
2125
2126         return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2127 }
2128
2129 static ssize_t
2130 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2131                    const char *buf, size_t count)
2132 {
2133         struct nct6775_data *data = nct6775_update_device(dev);
2134         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2135         int nr = sattr->index;
2136         unsigned long val;
2137         int err, reg, src;
2138
2139         err = kstrtoul(buf, 10, &val);
2140         if (err < 0)
2141                 return err;
2142         if (val == 0 || val > NUM_TEMP)
2143                 return -EINVAL;
2144         if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
2145                 return -EINVAL;
2146
2147         mutex_lock(&data->update_lock);
2148         src = data->temp_src[val - 1];
2149         data->pwm_temp_sel[nr] = src;
2150         reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2151         reg &= 0xe0;
2152         reg |= src;
2153         nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2154         mutex_unlock(&data->update_lock);
2155
2156         return count;
2157 }
2158
2159 static ssize_t
2160 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2161                          char *buf)
2162 {
2163         struct nct6775_data *data = nct6775_update_device(dev);
2164         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2165         int index = sattr->index;
2166
2167         return show_pwm_temp_sel_common(data, buf,
2168                                         data->pwm_weight_temp_sel[index]);
2169 }
2170
2171 static ssize_t
2172 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2173                           const char *buf, size_t count)
2174 {
2175         struct nct6775_data *data = nct6775_update_device(dev);
2176         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2177         int nr = sattr->index;
2178         unsigned long val;
2179         int err, reg, src;
2180
2181         err = kstrtoul(buf, 10, &val);
2182         if (err < 0)
2183                 return err;
2184         if (val > NUM_TEMP)
2185                 return -EINVAL;
2186         if (val && (!(data->have_temp & (1 << (val - 1))) ||
2187                     !data->temp_src[val - 1]))
2188                 return -EINVAL;
2189
2190         mutex_lock(&data->update_lock);
2191         if (val) {
2192                 src = data->temp_src[val - 1];
2193                 data->pwm_weight_temp_sel[nr] = src;
2194                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2195                 reg &= 0xe0;
2196                 reg |= (src | 0x80);
2197                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2198         } else {
2199                 data->pwm_weight_temp_sel[nr] = 0;
2200                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2201                 reg &= 0x7f;
2202                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2203         }
2204         mutex_unlock(&data->update_lock);
2205
2206         return count;
2207 }
2208
2209 static ssize_t
2210 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2211 {
2212         struct nct6775_data *data = nct6775_update_device(dev);
2213         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2214
2215         return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2216 }
2217
2218 static ssize_t
2219 store_target_temp(struct device *dev, struct device_attribute *attr,
2220                   const char *buf, size_t count)
2221 {
2222         struct nct6775_data *data = dev_get_drvdata(dev);
2223         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2224         int nr = sattr->index;
2225         unsigned long val;
2226         int err;
2227
2228         err = kstrtoul(buf, 10, &val);
2229         if (err < 0)
2230                 return err;
2231
2232         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2233                         data->target_temp_mask);
2234
2235         mutex_lock(&data->update_lock);
2236         data->target_temp[nr] = val;
2237         pwm_update_registers(data, nr);
2238         mutex_unlock(&data->update_lock);
2239         return count;
2240 }
2241
2242 static ssize_t
2243 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2244 {
2245         struct nct6775_data *data = nct6775_update_device(dev);
2246         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2247         int nr = sattr->index;
2248
2249         return sprintf(buf, "%d\n",
2250                        fan_from_reg16(data->target_speed[nr],
2251                                       data->fan_div[nr]));
2252 }
2253
2254 static ssize_t
2255 store_target_speed(struct device *dev, struct device_attribute *attr,
2256                    const char *buf, size_t count)
2257 {
2258         struct nct6775_data *data = dev_get_drvdata(dev);
2259         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2260         int nr = sattr->index;
2261         unsigned long val;
2262         int err;
2263         u16 speed;
2264
2265         err = kstrtoul(buf, 10, &val);
2266         if (err < 0)
2267                 return err;
2268
2269         val = clamp_val(val, 0, 1350000U);
2270         speed = fan_to_reg(val, data->fan_div[nr]);
2271
2272         mutex_lock(&data->update_lock);
2273         data->target_speed[nr] = speed;
2274         pwm_update_registers(data, nr);
2275         mutex_unlock(&data->update_lock);
2276         return count;
2277 }
2278
2279 static ssize_t
2280 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2281                     char *buf)
2282 {
2283         struct nct6775_data *data = nct6775_update_device(dev);
2284         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2285         int nr = sattr->nr;
2286         int index = sattr->index;
2287
2288         return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2289 }
2290
2291 static ssize_t
2292 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2293                      const char *buf, size_t count)
2294 {
2295         struct nct6775_data *data = dev_get_drvdata(dev);
2296         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2297         int nr = sattr->nr;
2298         int index = sattr->index;
2299         unsigned long val;
2300         int err;
2301
2302         err = kstrtoul(buf, 10, &val);
2303         if (err < 0)
2304                 return err;
2305
2306         /* Limit tolerance as needed */
2307         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2308
2309         mutex_lock(&data->update_lock);
2310         data->temp_tolerance[index][nr] = val;
2311         if (index)
2312                 pwm_update_registers(data, nr);
2313         else
2314                 nct6775_write_value(data,
2315                                     data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2316                                     val);
2317         mutex_unlock(&data->update_lock);
2318         return count;
2319 }
2320
2321 /*
2322  * Fan speed tolerance is a tricky beast, since the associated register is
2323  * a tick counter, but the value is reported and configured as rpm.
2324  * Compute resulting low and high rpm values and report the difference.
2325  */
2326 static ssize_t
2327 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2328                      char *buf)
2329 {
2330         struct nct6775_data *data = nct6775_update_device(dev);
2331         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2332         int nr = sattr->index;
2333         int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2334         int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2335         int tolerance;
2336
2337         if (low <= 0)
2338                 low = 1;
2339         if (high > 0xffff)
2340                 high = 0xffff;
2341         if (high < low)
2342                 high = low;
2343
2344         tolerance = (fan_from_reg16(low, data->fan_div[nr])
2345                      - fan_from_reg16(high, data->fan_div[nr])) / 2;
2346
2347         return sprintf(buf, "%d\n", tolerance);
2348 }
2349
2350 static ssize_t
2351 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2352                       const char *buf, size_t count)
2353 {
2354         struct nct6775_data *data = dev_get_drvdata(dev);
2355         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2356         int nr = sattr->index;
2357         unsigned long val;
2358         int err;
2359         int low, high;
2360
2361         err = kstrtoul(buf, 10, &val);
2362         if (err < 0)
2363                 return err;
2364
2365         high = fan_from_reg16(data->target_speed[nr],
2366                               data->fan_div[nr]) + val;
2367         low = fan_from_reg16(data->target_speed[nr],
2368                              data->fan_div[nr]) - val;
2369         if (low <= 0)
2370                 low = 1;
2371         if (high < low)
2372                 high = low;
2373
2374         val = (fan_to_reg(low, data->fan_div[nr]) -
2375                fan_to_reg(high, data->fan_div[nr])) / 2;
2376
2377         /* Limit tolerance as needed */
2378         val = clamp_val(val, 0, data->speed_tolerance_limit);
2379
2380         mutex_lock(&data->update_lock);
2381         data->target_speed_tolerance[nr] = val;
2382         pwm_update_registers(data, nr);
2383         mutex_unlock(&data->update_lock);
2384         return count;
2385 }
2386
2387 SENSOR_TEMPLATE_2(pwm, "pwm%d", S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2388 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", S_IWUSR | S_IRUGO, show_pwm_mode,
2389                 store_pwm_mode, 0);
2390 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", S_IWUSR | S_IRUGO, show_pwm_enable,
2391                 store_pwm_enable, 0);
2392 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", S_IWUSR | S_IRUGO,
2393                 show_pwm_temp_sel, store_pwm_temp_sel, 0);
2394 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", S_IWUSR | S_IRUGO,
2395                 show_target_temp, store_target_temp, 0);
2396 SENSOR_TEMPLATE(fan_target, "fan%d_target", S_IWUSR | S_IRUGO,
2397                 show_target_speed, store_target_speed, 0);
2398 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", S_IWUSR | S_IRUGO,
2399                 show_speed_tolerance, store_speed_tolerance, 0);
2400
2401 /* Smart Fan registers */
2402
2403 static ssize_t
2404 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2405 {
2406         struct nct6775_data *data = nct6775_update_device(dev);
2407         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2408         int nr = sattr->nr;
2409         int index = sattr->index;
2410
2411         return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2412 }
2413
2414 static ssize_t
2415 store_weight_temp(struct device *dev, struct device_attribute *attr,
2416                   const char *buf, size_t count)
2417 {
2418         struct nct6775_data *data = dev_get_drvdata(dev);
2419         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2420         int nr = sattr->nr;
2421         int index = sattr->index;
2422         unsigned long val;
2423         int err;
2424
2425         err = kstrtoul(buf, 10, &val);
2426         if (err < 0)
2427                 return err;
2428
2429         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2430
2431         mutex_lock(&data->update_lock);
2432         data->weight_temp[index][nr] = val;
2433         nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2434         mutex_unlock(&data->update_lock);
2435         return count;
2436 }
2437
2438 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", S_IWUSR | S_IRUGO,
2439                   show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
2440 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step",
2441                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 0);
2442 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol",
2443                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 1);
2444 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base",
2445                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 2);
2446 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step",
2447                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 5);
2448 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base",
2449                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 6);
2450
2451 static ssize_t
2452 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2453 {
2454         struct nct6775_data *data = nct6775_update_device(dev);
2455         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2456         int nr = sattr->nr;
2457         int index = sattr->index;
2458
2459         return sprintf(buf, "%d\n",
2460                        step_time_from_reg(data->fan_time[index][nr],
2461                                           data->pwm_mode[nr]));
2462 }
2463
2464 static ssize_t
2465 store_fan_time(struct device *dev, struct device_attribute *attr,
2466                const char *buf, size_t count)
2467 {
2468         struct nct6775_data *data = dev_get_drvdata(dev);
2469         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2470         int nr = sattr->nr;
2471         int index = sattr->index;
2472         unsigned long val;
2473         int err;
2474
2475         err = kstrtoul(buf, 10, &val);
2476         if (err < 0)
2477                 return err;
2478
2479         val = step_time_to_reg(val, data->pwm_mode[nr]);
2480         mutex_lock(&data->update_lock);
2481         data->fan_time[index][nr] = val;
2482         nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2483         mutex_unlock(&data->update_lock);
2484         return count;
2485 }
2486
2487 static ssize_t
2488 show_name(struct device *dev, struct device_attribute *attr, char *buf)
2489 {
2490         struct nct6775_data *data = dev_get_drvdata(dev);
2491
2492         return sprintf(buf, "%s\n", data->name);
2493 }
2494
2495 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
2496
2497 static ssize_t
2498 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2499 {
2500         struct nct6775_data *data = nct6775_update_device(dev);
2501         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2502
2503         return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2504 }
2505
2506 static ssize_t
2507 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2508                const char *buf, size_t count)
2509 {
2510         struct nct6775_data *data = dev_get_drvdata(dev);
2511         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2512         int nr = sattr->nr;
2513         int point = sattr->index;
2514         unsigned long val;
2515         int err;
2516         u8 reg;
2517
2518         err = kstrtoul(buf, 10, &val);
2519         if (err < 0)
2520                 return err;
2521         if (val > 255)
2522                 return -EINVAL;
2523
2524         if (point == data->auto_pwm_num) {
2525                 if (data->kind != nct6775 && !val)
2526                         return -EINVAL;
2527                 if (data->kind != nct6779 && val)
2528                         val = 0xff;
2529         }
2530
2531         mutex_lock(&data->update_lock);
2532         data->auto_pwm[nr][point] = val;
2533         if (point < data->auto_pwm_num) {
2534                 nct6775_write_value(data,
2535                                     NCT6775_AUTO_PWM(data, nr, point),
2536                                     data->auto_pwm[nr][point]);
2537         } else {
2538                 switch (data->kind) {
2539                 case nct6775:
2540                         /* disable if needed (pwm == 0) */
2541                         reg = nct6775_read_value(data,
2542                                                  NCT6775_REG_CRITICAL_ENAB[nr]);
2543                         if (val)
2544                                 reg |= 0x02;
2545                         else
2546                                 reg &= ~0x02;
2547                         nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
2548                                             reg);
2549                         break;
2550                 case nct6776:
2551                         break; /* always enabled, nothing to do */
2552                 case nct6106:
2553                 case nct6779:
2554                         nct6775_write_value(data, data->REG_CRITICAL_PWM[nr],
2555                                             val);
2556                         reg = nct6775_read_value(data,
2557                                         data->REG_CRITICAL_PWM_ENABLE[nr]);
2558                         if (val == 255)
2559                                 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
2560                         else
2561                                 reg |= data->CRITICAL_PWM_ENABLE_MASK;
2562                         nct6775_write_value(data,
2563                                             data->REG_CRITICAL_PWM_ENABLE[nr],
2564                                             reg);
2565                         break;
2566                 }
2567         }
2568         mutex_unlock(&data->update_lock);
2569         return count;
2570 }
2571
2572 static ssize_t
2573 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
2574 {
2575         struct nct6775_data *data = nct6775_update_device(dev);
2576         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2577         int nr = sattr->nr;
2578         int point = sattr->index;
2579
2580         /*
2581          * We don't know for sure if the temperature is signed or unsigned.
2582          * Assume it is unsigned.
2583          */
2584         return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
2585 }
2586
2587 static ssize_t
2588 store_auto_temp(struct device *dev, struct device_attribute *attr,
2589                 const char *buf, size_t count)
2590 {
2591         struct nct6775_data *data = dev_get_drvdata(dev);
2592         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2593         int nr = sattr->nr;
2594         int point = sattr->index;
2595         unsigned long val;
2596         int err;
2597
2598         err = kstrtoul(buf, 10, &val);
2599         if (err)
2600                 return err;
2601         if (val > 255000)
2602                 return -EINVAL;
2603
2604         mutex_lock(&data->update_lock);
2605         data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
2606         if (point < data->auto_pwm_num) {
2607                 nct6775_write_value(data,
2608                                     NCT6775_AUTO_TEMP(data, nr, point),
2609                                     data->auto_temp[nr][point]);
2610         } else {
2611                 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
2612                                     data->auto_temp[nr][point]);
2613         }
2614         mutex_unlock(&data->update_lock);
2615         return count;
2616 }
2617
2618 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
2619                                       struct attribute *attr, int index)
2620 {
2621         struct device *dev = container_of(kobj, struct device, kobj);
2622         struct nct6775_data *data = dev_get_drvdata(dev);
2623         int pwm = index / 36;   /* pwm index */
2624         int nr = index % 36;    /* attribute index */
2625
2626         if (!(data->has_pwm & (1 << pwm)))
2627                 return 0;
2628
2629         if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
2630                 return 0;
2631         if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
2632                 return 0;
2633         if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
2634                 return 0;
2635
2636         if (nr >= 22 && nr <= 35) {             /* auto point */
2637                 int api = (nr - 22) / 2;        /* auto point index */
2638
2639                 if (api > data->auto_pwm_num)
2640                         return 0;
2641         }
2642         return attr->mode;
2643 }
2644
2645 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", S_IWUSR | S_IRUGO,
2646                   show_fan_time, store_fan_time, 0, 0);
2647 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", S_IWUSR | S_IRUGO,
2648                   show_fan_time, store_fan_time, 0, 1);
2649 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", S_IWUSR | S_IRUGO,
2650                   show_fan_time, store_fan_time, 0, 2);
2651 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", S_IWUSR | S_IRUGO, show_pwm,
2652                   store_pwm, 0, 1);
2653 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", S_IWUSR | S_IRUGO, show_pwm,
2654                   store_pwm, 0, 2);
2655 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", S_IWUSR | S_IRUGO,
2656                   show_temp_tolerance, store_temp_tolerance, 0, 0);
2657 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance",
2658                   S_IWUSR | S_IRUGO, show_temp_tolerance, store_temp_tolerance,
2659                   0, 1);
2660
2661 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2662                   0, 3);
2663
2664 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", S_IWUSR | S_IRUGO, show_pwm,
2665                   store_pwm, 0, 4);
2666
2667 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm",
2668                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 0);
2669 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp",
2670                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 0);
2671
2672 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm",
2673                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 1);
2674 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp",
2675                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 1);
2676
2677 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm",
2678                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 2);
2679 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp",
2680                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 2);
2681
2682 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm",
2683                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 3);
2684 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp",
2685                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 3);
2686
2687 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm",
2688                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 4);
2689 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp",
2690                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 4);
2691
2692 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm",
2693                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 5);
2694 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp",
2695                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 5);
2696
2697 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm",
2698                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 6);
2699 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp",
2700                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 6);
2701
2702 /*
2703  * nct6775_pwm_is_visible uses the index into the following array
2704  * to determine if attributes should be created or not.
2705  * Any change in order or content must be matched.
2706  */
2707 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
2708         &sensor_dev_template_pwm,
2709         &sensor_dev_template_pwm_mode,
2710         &sensor_dev_template_pwm_enable,
2711         &sensor_dev_template_pwm_temp_sel,
2712         &sensor_dev_template_pwm_temp_tolerance,
2713         &sensor_dev_template_pwm_crit_temp_tolerance,
2714         &sensor_dev_template_pwm_target_temp,
2715         &sensor_dev_template_fan_target,
2716         &sensor_dev_template_fan_tolerance,
2717         &sensor_dev_template_pwm_stop_time,
2718         &sensor_dev_template_pwm_step_up_time,
2719         &sensor_dev_template_pwm_step_down_time,
2720         &sensor_dev_template_pwm_start,
2721         &sensor_dev_template_pwm_floor,
2722         &sensor_dev_template_pwm_weight_temp_sel,
2723         &sensor_dev_template_pwm_weight_temp_step,
2724         &sensor_dev_template_pwm_weight_temp_step_tol,
2725         &sensor_dev_template_pwm_weight_temp_step_base,
2726         &sensor_dev_template_pwm_weight_duty_step,
2727         &sensor_dev_template_pwm_max,                   /* 19 */
2728         &sensor_dev_template_pwm_step,                  /* 20 */
2729         &sensor_dev_template_pwm_weight_duty_base,      /* 21 */
2730         &sensor_dev_template_pwm_auto_point1_pwm,       /* 22 */
2731         &sensor_dev_template_pwm_auto_point1_temp,
2732         &sensor_dev_template_pwm_auto_point2_pwm,
2733         &sensor_dev_template_pwm_auto_point2_temp,
2734         &sensor_dev_template_pwm_auto_point3_pwm,
2735         &sensor_dev_template_pwm_auto_point3_temp,
2736         &sensor_dev_template_pwm_auto_point4_pwm,
2737         &sensor_dev_template_pwm_auto_point4_temp,
2738         &sensor_dev_template_pwm_auto_point5_pwm,
2739         &sensor_dev_template_pwm_auto_point5_temp,
2740         &sensor_dev_template_pwm_auto_point6_pwm,
2741         &sensor_dev_template_pwm_auto_point6_temp,
2742         &sensor_dev_template_pwm_auto_point7_pwm,
2743         &sensor_dev_template_pwm_auto_point7_temp,      /* 35 */
2744
2745         NULL
2746 };
2747
2748 static struct sensor_template_group nct6775_pwm_template_group = {
2749         .templates = nct6775_attributes_pwm_template,
2750         .is_visible = nct6775_pwm_is_visible,
2751         .base = 1,
2752 };
2753
2754 static ssize_t
2755 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
2756 {
2757         struct nct6775_data *data = dev_get_drvdata(dev);
2758         return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
2759 }
2760
2761 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
2762
2763 /* Case open detection */
2764
2765 static ssize_t
2766 clear_caseopen(struct device *dev, struct device_attribute *attr,
2767                const char *buf, size_t count)
2768 {
2769         struct nct6775_data *data = dev_get_drvdata(dev);
2770         struct nct6775_sio_data *sio_data = dev->platform_data;
2771         int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
2772         unsigned long val;
2773         u8 reg;
2774         int ret;
2775
2776         if (kstrtoul(buf, 10, &val) || val != 0)
2777                 return -EINVAL;
2778
2779         mutex_lock(&data->update_lock);
2780
2781         /*
2782          * Use CR registers to clear caseopen status.
2783          * The CR registers are the same for all chips, and not all chips
2784          * support clearing the caseopen status through "regular" registers.
2785          */
2786         ret = superio_enter(sio_data->sioreg);
2787         if (ret) {
2788                 count = ret;
2789                 goto error;
2790         }
2791
2792         superio_select(sio_data->sioreg, NCT6775_LD_ACPI);
2793         reg = superio_inb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
2794         reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
2795         superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
2796         reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
2797         superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
2798         superio_exit(sio_data->sioreg);
2799
2800         data->valid = false;    /* Force cache refresh */
2801 error:
2802         mutex_unlock(&data->update_lock);
2803         return count;
2804 }
2805
2806 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
2807                           clear_caseopen, INTRUSION_ALARM_BASE);
2808 static SENSOR_DEVICE_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
2809                           clear_caseopen, INTRUSION_ALARM_BASE + 1);
2810
2811 static umode_t nct6775_other_is_visible(struct kobject *kobj,
2812                                         struct attribute *attr, int index)
2813 {
2814         struct device *dev = container_of(kobj, struct device, kobj);
2815         struct nct6775_data *data = dev_get_drvdata(dev);
2816
2817         if (index == 1 && !data->have_vid)
2818                 return 0;
2819
2820         if (index == 2 || index == 3) {
2821                 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + index - 2] < 0)
2822                         return 0;
2823         }
2824
2825         return attr->mode;
2826 }
2827
2828 /*
2829  * nct6775_other_is_visible uses the index into the following array
2830  * to determine if attributes should be created or not.
2831  * Any change in order or content must be matched.
2832  */
2833 static struct attribute *nct6775_attributes_other[] = {
2834         &dev_attr_name.attr,
2835         &dev_attr_cpu0_vid.attr,                                /* 1 */
2836         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,        /* 2 */
2837         &sensor_dev_attr_intrusion1_alarm.dev_attr.attr,        /* 3 */
2838
2839         NULL
2840 };
2841
2842 static const struct attribute_group nct6775_group_other = {
2843         .attrs = nct6775_attributes_other,
2844         .is_visible = nct6775_other_is_visible,
2845 };
2846
2847 /*
2848  * Driver and device management
2849  */
2850
2851 static void nct6775_device_remove_files(struct device *dev)
2852 {
2853         struct nct6775_data *data = dev_get_drvdata(dev);
2854
2855         if (data->group_pwm)
2856                 sysfs_remove_group(&dev->kobj, data->group_pwm);
2857         if (data->group_in)
2858                 sysfs_remove_group(&dev->kobj, data->group_in);
2859         if (data->group_fan)
2860                 sysfs_remove_group(&dev->kobj, data->group_fan);
2861         if (data->group_temp)
2862                 sysfs_remove_group(&dev->kobj, data->group_temp);
2863
2864         sysfs_remove_group(&dev->kobj, &nct6775_group_other);
2865 }
2866
2867 /* Get the monitoring functions started */
2868 static inline void nct6775_init_device(struct nct6775_data *data)
2869 {
2870         int i;
2871         u8 tmp, diode;
2872
2873         /* Start monitoring if needed */
2874         if (data->REG_CONFIG) {
2875                 tmp = nct6775_read_value(data, data->REG_CONFIG);
2876                 if (!(tmp & 0x01))
2877                         nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
2878         }
2879
2880         /* Enable temperature sensors if needed */
2881         for (i = 0; i < NUM_TEMP; i++) {
2882                 if (!(data->have_temp & (1 << i)))
2883                         continue;
2884                 if (!data->reg_temp_config[i])
2885                         continue;
2886                 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
2887                 if (tmp & 0x01)
2888                         nct6775_write_value(data, data->reg_temp_config[i],
2889                                             tmp & 0xfe);
2890         }
2891
2892         /* Enable VBAT monitoring if needed */
2893         tmp = nct6775_read_value(data, data->REG_VBAT);
2894         if (!(tmp & 0x01))
2895                 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
2896
2897         diode = nct6775_read_value(data, data->REG_DIODE);
2898
2899         for (i = 0; i < data->temp_fixed_num; i++) {
2900                 if (!(data->have_temp_fixed & (1 << i)))
2901                         continue;
2902                 if ((tmp & (data->DIODE_MASK << i)))    /* diode */
2903                         data->temp_type[i]
2904                           = 3 - ((diode >> i) & data->DIODE_MASK);
2905                 else                            /* thermistor */
2906                         data->temp_type[i] = 4;
2907         }
2908 }
2909
2910 static void
2911 nct6775_check_fan_inputs(const struct nct6775_sio_data *sio_data,
2912                          struct nct6775_data *data)
2913 {
2914         int regval;
2915         bool fan3pin, fan3min, fan4pin, fan4min, fan5pin;
2916         bool pwm3pin, pwm4pin, pwm5pin;
2917
2918         /* fan4 and fan5 share some pins with the GPIO and serial flash */
2919         if (data->kind == nct6775) {
2920                 regval = superio_inb(sio_data->sioreg, 0x2c);
2921
2922                 fan3pin = regval & (1 << 6);
2923                 fan3min = fan3pin;
2924                 pwm3pin = regval & (1 << 7);
2925
2926                 /* On NCT6775, fan4 shares pins with the fdc interface */
2927                 fan4pin = !(superio_inb(sio_data->sioreg, 0x2A) & 0x80);
2928                 fan4min = 0;
2929                 fan5pin = 0;
2930                 pwm4pin = 0;
2931                 pwm5pin = 0;
2932         } else if (data->kind == nct6776) {
2933                 bool gpok = superio_inb(sio_data->sioreg, 0x27) & 0x80;
2934
2935                 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
2936                 regval = superio_inb(sio_data->sioreg, SIO_REG_ENABLE);
2937
2938                 if (regval & 0x80)
2939                         fan3pin = gpok;
2940                 else
2941                         fan3pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x40);
2942
2943                 if (regval & 0x40)
2944                         fan4pin = gpok;
2945                 else
2946                         fan4pin = superio_inb(sio_data->sioreg, 0x1C) & 0x01;
2947
2948                 if (regval & 0x20)
2949                         fan5pin = gpok;
2950                 else
2951                         fan5pin = superio_inb(sio_data->sioreg, 0x1C) & 0x02;
2952
2953                 fan4min = fan4pin;
2954                 fan3min = fan3pin;
2955                 pwm3pin = fan3pin;
2956                 pwm4pin = 0;
2957                 pwm5pin = 0;
2958         } else if (data->kind == nct6106) {
2959                 regval = superio_inb(sio_data->sioreg, 0x24);
2960                 fan3pin = !(regval & 0x80);
2961                 pwm3pin = regval & 0x08;
2962                 fan3min = fan3pin;
2963
2964                 fan4pin = false;
2965                 fan4min = false;
2966                 fan5pin = false;
2967                 pwm4pin = false;
2968                 pwm5pin = false;
2969         } else {        /* NCT6779D */
2970                 regval = superio_inb(sio_data->sioreg, 0x1c);
2971
2972                 fan3pin = !(regval & (1 << 5));
2973                 fan4pin = !(regval & (1 << 6));
2974                 fan5pin = !(regval & (1 << 7));
2975
2976                 pwm3pin = !(regval & (1 << 0));
2977                 pwm4pin = !(regval & (1 << 1));
2978                 pwm5pin = !(regval & (1 << 2));
2979
2980                 fan3min = fan3pin;
2981                 fan4min = fan4pin;
2982         }
2983
2984         data->has_fan = data->has_fan_min = 0x03; /* fan1 and fan2 */
2985         data->has_fan |= fan3pin << 2;
2986         data->has_fan_min |= fan3min << 2;
2987
2988         data->has_fan |= (fan4pin << 3) | (fan5pin << 4);
2989         data->has_fan_min |= (fan4min << 3) | (fan5pin << 4);
2990
2991         data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) | (pwm5pin << 4);
2992 }
2993
2994 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
2995                              int *available, int *mask)
2996 {
2997         int i;
2998         u8 src;
2999
3000         for (i = 0; i < data->pwm_num && *available; i++) {
3001                 int index;
3002
3003                 if (!regp[i])
3004                         continue;
3005                 src = nct6775_read_value(data, regp[i]);
3006                 src &= 0x1f;
3007                 if (!src || (*mask & (1 << src)))
3008                         continue;
3009                 if (src >= data->temp_label_num ||
3010                     !strlen(data->temp_label[src]))
3011                         continue;
3012
3013                 index = __ffs(*available);
3014                 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3015                 *available &= ~(1 << index);
3016                 *mask |= 1 << src;
3017         }
3018 }
3019
3020 static int nct6775_probe(struct platform_device *pdev)
3021 {
3022         struct device *dev = &pdev->dev;
3023         struct nct6775_sio_data *sio_data = dev->platform_data;
3024         struct nct6775_data *data;
3025         struct resource *res;
3026         int i, s, err = 0;
3027         int src, mask, available;
3028         const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3029         const u16 *reg_temp_alternate, *reg_temp_crit;
3030         const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL;
3031         int num_reg_temp;
3032         u8 cr2a;
3033         struct attribute_group *group;
3034
3035         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3036         if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3037                                  DRVNAME))
3038                 return -EBUSY;
3039
3040         data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3041                             GFP_KERNEL);
3042         if (!data)
3043                 return -ENOMEM;
3044
3045         data->kind = sio_data->kind;
3046         data->addr = res->start;
3047         mutex_init(&data->update_lock);
3048         data->name = nct6775_device_names[data->kind];
3049         data->bank = 0xff;              /* Force initial bank selection */
3050         platform_set_drvdata(pdev, data);
3051
3052         switch (data->kind) {
3053         case nct6106:
3054                 data->in_num = 9;
3055                 data->pwm_num = 3;
3056                 data->auto_pwm_num = 4;
3057                 data->temp_fixed_num = 3;
3058
3059                 data->fan_from_reg = fan_from_reg13;
3060                 data->fan_from_reg_min = fan_from_reg13;
3061
3062                 data->temp_label = nct6776_temp_label;
3063                 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3064
3065                 data->REG_VBAT = NCT6106_REG_VBAT;
3066                 data->REG_DIODE = NCT6106_REG_DIODE;
3067                 data->DIODE_MASK = NCT6106_DIODE_MASK;
3068                 data->REG_VIN = NCT6106_REG_IN;
3069                 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3070                 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3071                 data->REG_TARGET = NCT6106_REG_TARGET;
3072                 data->REG_FAN = NCT6106_REG_FAN;
3073                 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
3074                 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
3075                 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
3076                 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
3077                 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
3078                 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
3079                 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
3080                 data->REG_PWM[0] = NCT6106_REG_PWM;
3081                 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
3082                 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
3083                 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3084                 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3085                 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3086                 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3087                 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3088                 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
3089                 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
3090                 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
3091                 data->REG_CRITICAL_TEMP_TOLERANCE
3092                   = NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
3093                 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
3094                 data->CRITICAL_PWM_ENABLE_MASK
3095                   = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3096                 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
3097                 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3098                 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3099                 data->REG_TEMP_SEL = NCT6106_REG_TEMP_SEL;
3100                 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3101                 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3102                 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3103                 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3104                 data->REG_ALARM = NCT6106_REG_ALARM;
3105                 data->ALARM_BITS = NCT6106_ALARM_BITS;
3106
3107                 reg_temp = NCT6106_REG_TEMP;
3108                 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3109                 reg_temp_over = NCT6106_REG_TEMP_OVER;
3110                 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3111                 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3112                 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3113                 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3114                 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3115                 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3116
3117                 break;
3118         case nct6775:
3119                 data->in_num = 9;
3120                 data->pwm_num = 3;
3121                 data->auto_pwm_num = 6;
3122                 data->has_fan_div = true;
3123                 data->temp_fixed_num = 3;
3124
3125                 data->ALARM_BITS = NCT6775_ALARM_BITS;
3126
3127                 data->fan_from_reg = fan_from_reg16;
3128                 data->fan_from_reg_min = fan_from_reg8;
3129                 data->target_temp_mask = 0x7f;
3130                 data->tolerance_mask = 0x0f;
3131                 data->speed_tolerance_limit = 15;
3132
3133                 data->temp_label = nct6775_temp_label;
3134                 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
3135
3136                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3137                 data->REG_VBAT = NCT6775_REG_VBAT;
3138                 data->REG_DIODE = NCT6775_REG_DIODE;
3139                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3140                 data->REG_VIN = NCT6775_REG_IN;
3141                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3142                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3143                 data->REG_TARGET = NCT6775_REG_TARGET;
3144                 data->REG_FAN = NCT6775_REG_FAN;
3145                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3146                 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3147                 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3148                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3149                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3150                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3151                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3152                 data->REG_PWM[0] = NCT6775_REG_PWM;
3153                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3154                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3155                 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3156                 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3157                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3158                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3159                 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3160                 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3161                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3162                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3163                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3164                 data->REG_CRITICAL_TEMP_TOLERANCE
3165                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3166                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3167                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3168                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3169                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3170                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3171                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3172                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3173                 data->REG_ALARM = NCT6775_REG_ALARM;
3174
3175                 reg_temp = NCT6775_REG_TEMP;
3176                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3177                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3178                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3179                 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3180                 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3181                 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3182
3183                 break;
3184         case nct6776:
3185                 data->in_num = 9;
3186                 data->pwm_num = 3;
3187                 data->auto_pwm_num = 4;
3188                 data->has_fan_div = false;
3189                 data->temp_fixed_num = 3;
3190
3191                 data->ALARM_BITS = NCT6776_ALARM_BITS;
3192
3193                 data->fan_from_reg = fan_from_reg13;
3194                 data->fan_from_reg_min = fan_from_reg13;
3195                 data->target_temp_mask = 0xff;
3196                 data->tolerance_mask = 0x07;
3197                 data->speed_tolerance_limit = 63;
3198
3199                 data->temp_label = nct6776_temp_label;
3200                 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3201
3202                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3203                 data->REG_VBAT = NCT6775_REG_VBAT;
3204                 data->REG_DIODE = NCT6775_REG_DIODE;
3205                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3206                 data->REG_VIN = NCT6775_REG_IN;
3207                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3208                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3209                 data->REG_TARGET = NCT6775_REG_TARGET;
3210                 data->REG_FAN = NCT6775_REG_FAN;
3211                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3212                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3213                 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3214                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3215                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3216                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3217                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3218                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3219                 data->REG_PWM[0] = NCT6775_REG_PWM;
3220                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3221                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3222                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3223                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3224                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3225                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3226                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3227                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3228                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3229                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3230                 data->REG_CRITICAL_TEMP_TOLERANCE
3231                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3232                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3233                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3234                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3235                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3236                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3237                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3238                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3239                 data->REG_ALARM = NCT6775_REG_ALARM;
3240
3241                 reg_temp = NCT6775_REG_TEMP;
3242                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3243                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3244                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3245                 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3246                 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3247                 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3248
3249                 break;
3250         case nct6779:
3251                 data->in_num = 15;
3252                 data->pwm_num = 5;
3253                 data->auto_pwm_num = 4;
3254                 data->has_fan_div = false;
3255                 data->temp_fixed_num = 6;
3256
3257                 data->ALARM_BITS = NCT6779_ALARM_BITS;
3258
3259                 data->fan_from_reg = fan_from_reg13;
3260                 data->fan_from_reg_min = fan_from_reg13;
3261                 data->target_temp_mask = 0xff;
3262                 data->tolerance_mask = 0x07;
3263                 data->speed_tolerance_limit = 63;
3264
3265                 data->temp_label = nct6779_temp_label;
3266                 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3267
3268                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3269                 data->REG_VBAT = NCT6775_REG_VBAT;
3270                 data->REG_DIODE = NCT6775_REG_DIODE;
3271                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3272                 data->REG_VIN = NCT6779_REG_IN;
3273                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3274                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3275                 data->REG_TARGET = NCT6775_REG_TARGET;
3276                 data->REG_FAN = NCT6779_REG_FAN;
3277                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3278                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3279                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3280                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3281                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3282                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3283                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3284                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3285                 data->REG_PWM[0] = NCT6775_REG_PWM;
3286                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3287                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3288                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3289                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3290                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3291                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3292                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3293                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3294                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3295                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3296                 data->REG_CRITICAL_TEMP_TOLERANCE
3297                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3298                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3299                 data->CRITICAL_PWM_ENABLE_MASK
3300                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3301                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3302                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3303                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3304                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3305                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3306                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3307                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3308                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3309                 data->REG_ALARM = NCT6779_REG_ALARM;
3310
3311                 reg_temp = NCT6779_REG_TEMP;
3312                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3313                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3314                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3315                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3316                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3317                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3318
3319                 break;
3320         default:
3321                 return -ENODEV;
3322         }
3323         data->have_in = (1 << data->in_num) - 1;
3324         data->have_temp = 0;
3325
3326         /*
3327          * On some boards, not all available temperature sources are monitored,
3328          * even though some of the monitoring registers are unused.
3329          * Get list of unused monitoring registers, then detect if any fan
3330          * controls are configured to use unmonitored temperature sources.
3331          * If so, assign the unmonitored temperature sources to available
3332          * monitoring registers.
3333          */
3334         mask = 0;
3335         available = 0;
3336         for (i = 0; i < num_reg_temp; i++) {
3337                 if (reg_temp[i] == 0)
3338                         continue;
3339
3340                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3341                 if (!src || (mask & (1 << src)))
3342                         available |= 1 << i;
3343
3344                 mask |= 1 << src;
3345         }
3346
3347         /*
3348          * Now find unmonitored temperature registers and enable monitoring
3349          * if additional monitoring registers are available.
3350          */
3351         add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
3352         add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
3353
3354         mask = 0;
3355         s = NUM_TEMP_FIXED;     /* First dynamic temperature attribute */
3356         for (i = 0; i < num_reg_temp; i++) {
3357                 if (reg_temp[i] == 0)
3358                         continue;
3359
3360                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3361                 if (!src || (mask & (1 << src)))
3362                         continue;
3363
3364                 if (src >= data->temp_label_num ||
3365                     !strlen(data->temp_label[src])) {
3366                         dev_info(dev,
3367                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3368                                  src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
3369                         continue;
3370                 }
3371
3372                 mask |= 1 << src;
3373
3374                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3375                 if (src <= data->temp_fixed_num) {
3376                         data->have_temp |= 1 << (src - 1);
3377                         data->have_temp_fixed |= 1 << (src - 1);
3378                         data->reg_temp[0][src - 1] = reg_temp[i];
3379                         data->reg_temp[1][src - 1] = reg_temp_over[i];
3380                         data->reg_temp[2][src - 1] = reg_temp_hyst[i];
3381                         if (reg_temp_crit_h && reg_temp_crit_h[i])
3382                                 data->reg_temp[3][src - 1] = reg_temp_crit_h[i];
3383                         else if (reg_temp_crit[src - 1])
3384                                 data->reg_temp[3][src - 1]
3385                                   = reg_temp_crit[src - 1];
3386                         if (reg_temp_crit_l && reg_temp_crit_l[i])
3387                                 data->reg_temp[4][src - 1] = reg_temp_crit_l[i];
3388                         data->reg_temp_config[src - 1] = reg_temp_config[i];
3389                         data->temp_src[src - 1] = src;
3390                         continue;
3391                 }
3392
3393                 if (s >= NUM_TEMP)
3394                         continue;
3395
3396                 /* Use dynamic index for other sources */
3397                 data->have_temp |= 1 << s;
3398                 data->reg_temp[0][s] = reg_temp[i];
3399                 data->reg_temp[1][s] = reg_temp_over[i];
3400                 data->reg_temp[2][s] = reg_temp_hyst[i];
3401                 data->reg_temp_config[s] = reg_temp_config[i];
3402                 if (reg_temp_crit_h && reg_temp_crit_h[i])
3403                         data->reg_temp[3][s] = reg_temp_crit_h[i];
3404                 else if (reg_temp_crit[src - 1])
3405                         data->reg_temp[3][s] = reg_temp_crit[src - 1];
3406                 if (reg_temp_crit_l && reg_temp_crit_l[i])
3407                         data->reg_temp[4][s] = reg_temp_crit_l[i];
3408
3409                 data->temp_src[s] = src;
3410                 s++;
3411         }
3412
3413 #ifdef USE_ALTERNATE
3414         /*
3415          * Go through the list of alternate temp registers and enable
3416          * if possible.
3417          * The temperature is already monitored if the respective bit in <mask>
3418          * is set.
3419          */
3420         for (i = 0; i < data->temp_label_num - 1; i++) {
3421                 if (!reg_temp_alternate[i])
3422                         continue;
3423                 if (mask & (1 << (i + 1)))
3424                         continue;
3425                 if (i < data->temp_fixed_num) {
3426                         if (data->have_temp & (1 << i))
3427                                 continue;
3428                         data->have_temp |= 1 << i;
3429                         data->have_temp_fixed |= 1 << i;
3430                         data->reg_temp[0][i] = reg_temp_alternate[i];
3431                         data->reg_temp[1][i] = reg_temp_over[i];
3432                         data->reg_temp[2][i] = reg_temp_hyst[i];
3433                         data->temp_src[i] = i + 1;
3434                         continue;
3435                 }
3436
3437                 if (s >= NUM_TEMP)      /* Abort if no more space */
3438                         break;
3439
3440                 data->have_temp |= 1 << s;
3441                 data->reg_temp[0][s] = reg_temp_alternate[i];
3442                 data->temp_src[s] = i + 1;
3443                 s++;
3444         }
3445 #endif /* USE_ALTERNATE */
3446
3447         /* Initialize the chip */
3448         nct6775_init_device(data);
3449
3450         err = superio_enter(sio_data->sioreg);
3451         if (err)
3452                 return err;
3453
3454         cr2a = superio_inb(sio_data->sioreg, 0x2a);
3455         switch (data->kind) {
3456         case nct6775:
3457                 data->have_vid = (cr2a & 0x40);
3458                 break;
3459         case nct6776:
3460                 data->have_vid = (cr2a & 0x60) == 0x40;
3461                 break;
3462         case nct6106:
3463         case nct6779:
3464                 break;
3465         }
3466
3467         /*
3468          * Read VID value
3469          * We can get the VID input values directly at logical device D 0xe3.
3470          */
3471         if (data->have_vid) {
3472                 superio_select(sio_data->sioreg, NCT6775_LD_VID);
3473                 data->vid = superio_inb(sio_data->sioreg, 0xe3);
3474                 data->vrm = vid_which_vrm();
3475         }
3476
3477         if (fan_debounce) {
3478                 u8 tmp;
3479
3480                 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3481                 tmp = superio_inb(sio_data->sioreg,
3482                                   NCT6775_REG_CR_FAN_DEBOUNCE);
3483                 switch (data->kind) {
3484                 case nct6106:
3485                         tmp |= 0xe0;
3486                         break;
3487                 case nct6775:
3488                         tmp |= 0x1e;
3489                         break;
3490                 case nct6776:
3491                 case nct6779:
3492                         tmp |= 0x3e;
3493                         break;
3494                 }
3495                 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
3496                              tmp);
3497                 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
3498                          data->name);
3499         }
3500
3501         nct6775_check_fan_inputs(sio_data, data);
3502
3503         superio_exit(sio_data->sioreg);
3504
3505         /* Read fan clock dividers immediately */
3506         nct6775_init_fan_common(dev, data);
3507
3508         /* Register sysfs hooks */
3509         group = nct6775_create_attr_group(dev, &nct6775_pwm_template_group,
3510                                           data->pwm_num);
3511         if (IS_ERR(group)) {
3512                 err = PTR_ERR(group);
3513                 goto exit_remove;
3514         }
3515         data->group_pwm = group;
3516
3517         group = nct6775_create_attr_group(dev, &nct6775_in_template_group,
3518                                           fls(data->have_in));
3519         if (IS_ERR(group)) {
3520                 err = PTR_ERR(group);
3521                 goto exit_remove;
3522         }
3523         data->group_in = group;
3524
3525         group = nct6775_create_attr_group(dev, &nct6775_fan_template_group,
3526                                           fls(data->has_fan));
3527         if (IS_ERR(group)) {
3528                 err = PTR_ERR(group);
3529                 goto exit_remove;
3530         }
3531         data->group_fan = group;
3532
3533         group = nct6775_create_attr_group(dev, &nct6775_temp_template_group,
3534                                           fls(data->have_temp));
3535         if (IS_ERR(group)) {
3536                 err = PTR_ERR(group);
3537                 goto exit_remove;
3538         }
3539         data->group_temp = group;
3540
3541         err = sysfs_create_group(&dev->kobj, &nct6775_group_other);
3542         if (err)
3543                 goto exit_remove;
3544
3545         data->hwmon_dev = hwmon_device_register(dev);
3546         if (IS_ERR(data->hwmon_dev)) {
3547                 err = PTR_ERR(data->hwmon_dev);
3548                 goto exit_remove;
3549         }
3550
3551         return 0;
3552
3553 exit_remove:
3554         nct6775_device_remove_files(dev);
3555         return err;
3556 }
3557
3558 static int nct6775_remove(struct platform_device *pdev)
3559 {
3560         struct nct6775_data *data = platform_get_drvdata(pdev);
3561
3562         hwmon_device_unregister(data->hwmon_dev);
3563         nct6775_device_remove_files(&pdev->dev);
3564
3565         return 0;
3566 }
3567
3568 #ifdef CONFIG_PM
3569 static int nct6775_suspend(struct device *dev)
3570 {
3571         struct nct6775_data *data = nct6775_update_device(dev);
3572         struct nct6775_sio_data *sio_data = dev->platform_data;
3573
3574         mutex_lock(&data->update_lock);
3575         data->vbat = nct6775_read_value(data, data->REG_VBAT);
3576         if (sio_data->kind == nct6775) {
3577                 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
3578                 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
3579         }
3580         mutex_unlock(&data->update_lock);
3581
3582         return 0;
3583 }
3584
3585 static int nct6775_resume(struct device *dev)
3586 {
3587         struct nct6775_data *data = dev_get_drvdata(dev);
3588         struct nct6775_sio_data *sio_data = dev->platform_data;
3589         int i, j;
3590
3591         mutex_lock(&data->update_lock);
3592         data->bank = 0xff;              /* Force initial bank selection */
3593
3594         /* Restore limits */
3595         for (i = 0; i < data->in_num; i++) {
3596                 if (!(data->have_in & (1 << i)))
3597                         continue;
3598
3599                 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
3600                                     data->in[i][1]);
3601                 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
3602                                     data->in[i][2]);
3603         }
3604
3605         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
3606                 if (!(data->has_fan_min & (1 << i)))
3607                         continue;
3608
3609                 nct6775_write_value(data, data->REG_FAN_MIN[i],
3610                                     data->fan_min[i]);
3611         }
3612
3613         for (i = 0; i < NUM_TEMP; i++) {
3614                 if (!(data->have_temp & (1 << i)))
3615                         continue;
3616
3617                 for (j = 1; j < ARRAY_SIZE(data->reg_temp); j++)
3618                         if (data->reg_temp[j][i])
3619                                 nct6775_write_temp(data, data->reg_temp[j][i],
3620                                                    data->temp[j][i]);
3621         }
3622
3623         /* Restore other settings */
3624         nct6775_write_value(data, data->REG_VBAT, data->vbat);
3625         if (sio_data->kind == nct6775) {
3626                 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
3627                 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
3628         }
3629
3630         /* Force re-reading all values */
3631         data->valid = false;
3632         mutex_unlock(&data->update_lock);
3633
3634         return 0;
3635 }
3636
3637 static const struct dev_pm_ops nct6775_dev_pm_ops = {
3638         .suspend = nct6775_suspend,
3639         .resume = nct6775_resume,
3640 };
3641
3642 #define NCT6775_DEV_PM_OPS      (&nct6775_dev_pm_ops)
3643 #else
3644 #define NCT6775_DEV_PM_OPS      NULL
3645 #endif /* CONFIG_PM */
3646
3647 static struct platform_driver nct6775_driver = {
3648         .driver = {
3649                 .owner  = THIS_MODULE,
3650                 .name   = DRVNAME,
3651                 .pm     = NCT6775_DEV_PM_OPS,
3652         },
3653         .probe          = nct6775_probe,
3654         .remove         = nct6775_remove,
3655 };
3656
3657 static const char * const nct6775_sio_names[] __initconst = {
3658         "NCT6106D",
3659         "NCT6775F",
3660         "NCT6776D/F",
3661         "NCT6779D",
3662 };
3663
3664 /* nct6775_find() looks for a '627 in the Super-I/O config space */
3665 static int __init nct6775_find(int sioaddr, struct nct6775_sio_data *sio_data)
3666 {
3667         u16 val;
3668         int err;
3669         int addr;
3670
3671         err = superio_enter(sioaddr);
3672         if (err)
3673                 return err;
3674
3675         if (force_id)
3676                 val = force_id;
3677         else
3678                 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
3679                     | superio_inb(sioaddr, SIO_REG_DEVID + 1);
3680         switch (val & SIO_ID_MASK) {
3681         case SIO_NCT6106_ID:
3682                 sio_data->kind = nct6106;
3683                 break;
3684         case SIO_NCT6775_ID:
3685                 sio_data->kind = nct6775;
3686                 break;
3687         case SIO_NCT6776_ID:
3688                 sio_data->kind = nct6776;
3689                 break;
3690         case SIO_NCT6779_ID:
3691                 sio_data->kind = nct6779;
3692                 break;
3693         default:
3694                 if (val != 0xffff)
3695                         pr_debug("unsupported chip ID: 0x%04x\n", val);
3696                 superio_exit(sioaddr);
3697                 return -ENODEV;
3698         }
3699
3700         /* We have a known chip, find the HWM I/O address */
3701         superio_select(sioaddr, NCT6775_LD_HWM);
3702         val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
3703             | superio_inb(sioaddr, SIO_REG_ADDR + 1);
3704         addr = val & IOREGION_ALIGNMENT;
3705         if (addr == 0) {
3706                 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
3707                 superio_exit(sioaddr);
3708                 return -ENODEV;
3709         }
3710
3711         /* Activate logical device if needed */
3712         val = superio_inb(sioaddr, SIO_REG_ENABLE);
3713         if (!(val & 0x01)) {
3714                 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
3715                 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
3716         }
3717
3718         superio_exit(sioaddr);
3719         pr_info("Found %s or compatible chip at %#x:%#x\n",
3720                 nct6775_sio_names[sio_data->kind], sioaddr, addr);
3721         sio_data->sioreg = sioaddr;
3722
3723         return addr;
3724 }
3725
3726 /*
3727  * when Super-I/O functions move to a separate file, the Super-I/O
3728  * bus will manage the lifetime of the device and this module will only keep
3729  * track of the nct6775 driver. But since we platform_device_alloc(), we
3730  * must keep track of the device
3731  */
3732 static struct platform_device *pdev[2];
3733
3734 static int __init sensors_nct6775_init(void)
3735 {
3736         int i, err;
3737         bool found = false;
3738         int address;
3739         struct resource res;
3740         struct nct6775_sio_data sio_data;
3741         int sioaddr[2] = { 0x2e, 0x4e };
3742
3743         err = platform_driver_register(&nct6775_driver);
3744         if (err)
3745                 return err;
3746
3747         /*
3748          * initialize sio_data->kind and sio_data->sioreg.
3749          *
3750          * when Super-I/O functions move to a separate file, the Super-I/O
3751          * driver will probe 0x2e and 0x4e and auto-detect the presence of a
3752          * nct6775 hardware monitor, and call probe()
3753          */
3754         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
3755                 address = nct6775_find(sioaddr[i], &sio_data);
3756                 if (address <= 0)
3757                         continue;
3758
3759                 found = true;
3760
3761                 pdev[i] = platform_device_alloc(DRVNAME, address);
3762                 if (!pdev[i]) {
3763                         err = -ENOMEM;
3764                         goto exit_device_put;
3765                 }
3766
3767                 err = platform_device_add_data(pdev[i], &sio_data,
3768                                                sizeof(struct nct6775_sio_data));
3769                 if (err)
3770                         goto exit_device_put;
3771
3772                 memset(&res, 0, sizeof(res));
3773                 res.name = DRVNAME;
3774                 res.start = address + IOREGION_OFFSET;
3775                 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
3776                 res.flags = IORESOURCE_IO;
3777
3778                 err = acpi_check_resource_conflict(&res);
3779                 if (err) {
3780                         platform_device_put(pdev[i]);
3781                         pdev[i] = NULL;
3782                         continue;
3783                 }
3784
3785                 err = platform_device_add_resources(pdev[i], &res, 1);
3786                 if (err)
3787                         goto exit_device_put;
3788
3789                 /* platform_device_add calls probe() */
3790                 err = platform_device_add(pdev[i]);
3791                 if (err)
3792                         goto exit_device_put;
3793         }
3794         if (!found) {
3795                 err = -ENODEV;
3796                 goto exit_unregister;
3797         }
3798
3799         return 0;
3800
3801 exit_device_put:
3802         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
3803                 if (pdev[i])
3804                         platform_device_put(pdev[i]);
3805         }
3806 exit_unregister:
3807         platform_driver_unregister(&nct6775_driver);
3808         return err;
3809 }
3810
3811 static void __exit sensors_nct6775_exit(void)
3812 {
3813         int i;
3814
3815         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
3816                 if (pdev[i])
3817                         platform_device_unregister(pdev[i]);
3818         }
3819         platform_driver_unregister(&nct6775_driver);
3820 }
3821
3822 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
3823 MODULE_DESCRIPTION("NCT6775F/NCT6776F/NCT6779D driver");
3824 MODULE_LICENSE("GPL");
3825
3826 module_init(sensors_nct6775_init);
3827 module_exit(sensors_nct6775_exit);