2 * nct6775 - Driver for the hardware monitoring functionality of
3 * Nuvoton NCT677x Super-I/O chips
5 * Copyright (C) 2012 Guenter Roeck <linux@roeck-us.net>
7 * Derived from w83627ehf driver
8 * Copyright (C) 2005-2012 Jean Delvare <jdelvare@suse.de>
9 * Copyright (C) 2006 Yuan Mu (Winbond),
10 * Rudolf Marek <r.marek@assembler.cz>
11 * David Hubbard <david.c.hubbard@gmail.com>
12 * Daniel J Blueman <daniel.blueman@gmail.com>
13 * Copyright (C) 2010 Sheng-Yuan Huang (Nuvoton) (PS00)
15 * Shamelessly ripped from the w83627hf driver
16 * Copyright (C) 2003 Mark Studebaker
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
33 * Supports the following chips:
35 * Chip #vin #fan #pwm #temp chip IDs man ID
36 * nct6106d 9 3 3 6+3 0xc450 0xc1 0x5ca3
37 * nct6775f 9 4 3 6+3 0xb470 0xc1 0x5ca3
38 * nct6776f 9 5 3 6+3 0xc330 0xc1 0x5ca3
39 * nct6779d 15 5 5 2+6 0xc560 0xc1 0x5ca3
40 * nct6791d 15 6 6 2+6 0xc800 0xc1 0x5ca3
41 * nct6792d 15 6 6 2+6 0xc910 0xc1 0x5ca3
42 * nct6793d 15 6 6 2+6 0xd120 0xc1 0x5ca3
44 * #temp lists the number of monitored temperature sources (first value) plus
45 * the number of directly connectable temperature sensors (second value).
48 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
50 #include <linux/module.h>
51 #include <linux/init.h>
52 #include <linux/slab.h>
53 #include <linux/jiffies.h>
54 #include <linux/platform_device.h>
55 #include <linux/hwmon.h>
56 #include <linux/hwmon-sysfs.h>
57 #include <linux/hwmon-vid.h>
58 #include <linux/err.h>
59 #include <linux/mutex.h>
60 #include <linux/acpi.h>
61 #include <linux/dmi.h>
68 enum kinds { nct6106, nct6775, nct6776, nct6779, nct6791, nct6792, nct6793 };
70 /* used to set data->name = nct6775_device_names[data->sio_kind] */
71 static const char * const nct6775_device_names[] = {
81 static const char * const nct6775_sio_names[] __initconst = {
91 static unsigned short force_id;
92 module_param(force_id, ushort, 0);
93 MODULE_PARM_DESC(force_id, "Override the detected device ID");
95 static unsigned short fan_debounce;
96 module_param(fan_debounce, ushort, 0);
97 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
99 #define DRVNAME "nct6775"
102 * Super-I/O constants and functions
105 #define NCT6775_LD_ACPI 0x0a
106 #define NCT6775_LD_HWM 0x0b
107 #define NCT6775_LD_VID 0x0d
109 #define SIO_REG_LDSEL 0x07 /* Logical device select */
110 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
111 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
112 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
114 #define SIO_NCT6106_ID 0xc450
115 #define SIO_NCT6775_ID 0xb470
116 #define SIO_NCT6776_ID 0xc330
117 #define SIO_NCT6779_ID 0xc560
118 #define SIO_NCT6791_ID 0xc800
119 #define SIO_NCT6792_ID 0xc910
120 #define SIO_NCT6793_ID 0xd120
121 #define SIO_ID_MASK 0xFFF0
123 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
126 superio_outb(int ioreg, int reg, int val)
129 outb(val, ioreg + 1);
133 superio_inb(int ioreg, int reg)
136 return inb(ioreg + 1);
140 superio_select(int ioreg, int ld)
142 outb(SIO_REG_LDSEL, ioreg);
147 superio_enter(int ioreg)
150 * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
152 if (!request_muxed_region(ioreg, 2, DRVNAME))
162 superio_exit(int ioreg)
166 outb(0x02, ioreg + 1);
167 release_region(ioreg, 2);
174 #define IOREGION_ALIGNMENT (~7)
175 #define IOREGION_OFFSET 5
176 #define IOREGION_LENGTH 2
177 #define ADDR_REG_OFFSET 0
178 #define DATA_REG_OFFSET 1
180 #define NCT6775_REG_BANK 0x4E
181 #define NCT6775_REG_CONFIG 0x40
184 * Not currently used:
185 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
186 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
187 * REG_MAN_ID is at port 0x4f
188 * REG_CHIP_ID is at port 0x58
191 #define NUM_TEMP 10 /* Max number of temp attribute sets w/ limits*/
192 #define NUM_TEMP_FIXED 6 /* Max number of fixed temp attribute sets */
194 #define NUM_REG_ALARM 7 /* Max number of alarm registers */
195 #define NUM_REG_BEEP 5 /* Max number of beep registers */
199 /* Common and NCT6775 specific data */
201 /* Voltage min/max registers for nr=7..14 are in bank 5 */
203 static const u16 NCT6775_REG_IN_MAX[] = {
204 0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
205 0x55c, 0x55e, 0x560, 0x562 };
206 static const u16 NCT6775_REG_IN_MIN[] = {
207 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
208 0x55d, 0x55f, 0x561, 0x563 };
209 static const u16 NCT6775_REG_IN[] = {
210 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
213 #define NCT6775_REG_VBAT 0x5D
214 #define NCT6775_REG_DIODE 0x5E
215 #define NCT6775_DIODE_MASK 0x02
217 #define NCT6775_REG_FANDIV1 0x506
218 #define NCT6775_REG_FANDIV2 0x507
220 #define NCT6775_REG_CR_FAN_DEBOUNCE 0xf0
222 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
224 /* 0..15 voltages, 16..23 fans, 24..29 temperatures, 30..31 intrusion */
226 static const s8 NCT6775_ALARM_BITS[] = {
227 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
228 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
230 6, 7, 11, -1, -1, /* fan1..fan5 */
231 -1, -1, -1, /* unused */
232 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
233 12, -1 }; /* intrusion0, intrusion1 */
235 #define FAN_ALARM_BASE 16
236 #define TEMP_ALARM_BASE 24
237 #define INTRUSION_ALARM_BASE 30
239 static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e };
242 * 0..14 voltages, 15 global beep enable, 16..23 fans, 24..29 temperatures,
245 static const s8 NCT6775_BEEP_BITS[] = {
246 0, 1, 2, 3, 8, 9, 10, 16, /* in0.. in7 */
247 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
248 21, /* global beep enable */
249 6, 7, 11, 28, -1, /* fan1..fan5 */
250 -1, -1, -1, /* unused */
251 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
252 12, -1 }; /* intrusion0, intrusion1 */
254 #define BEEP_ENABLE_BASE 15
256 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
257 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
259 /* DC or PWM output fan configuration */
260 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
261 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
263 /* Advanced Fan control, some values are common for all fans */
265 static const u16 NCT6775_REG_TARGET[] = {
266 0x101, 0x201, 0x301, 0x801, 0x901, 0xa01 };
267 static const u16 NCT6775_REG_FAN_MODE[] = {
268 0x102, 0x202, 0x302, 0x802, 0x902, 0xa02 };
269 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
270 0x103, 0x203, 0x303, 0x803, 0x903, 0xa03 };
271 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
272 0x104, 0x204, 0x304, 0x804, 0x904, 0xa04 };
273 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
274 0x105, 0x205, 0x305, 0x805, 0x905, 0xa05 };
275 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = {
276 0x106, 0x206, 0x306, 0x806, 0x906, 0xa06 };
277 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
278 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
280 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
281 0x107, 0x207, 0x307, 0x807, 0x907, 0xa07 };
282 static const u16 NCT6775_REG_PWM[] = {
283 0x109, 0x209, 0x309, 0x809, 0x909, 0xa09 };
284 static const u16 NCT6775_REG_PWM_READ[] = {
285 0x01, 0x03, 0x11, 0x13, 0x15, 0xa09 };
287 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
288 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
289 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
290 static const u16 NCT6775_FAN_PULSE_SHIFT[] = { 0, 0, 0, 0, 0, 0 };
292 static const u16 NCT6775_REG_TEMP[] = {
293 0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
295 static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77 };
297 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
298 0, 0x152, 0x252, 0x628, 0x629, 0x62A };
299 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
300 0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
301 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
302 0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
304 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
305 0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
307 static const u16 NCT6775_REG_TEMP_SEL[] = {
308 0x100, 0x200, 0x300, 0x800, 0x900, 0xa00 };
310 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
311 0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 };
312 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
313 0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a };
314 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
315 0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b };
316 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
317 0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c };
318 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
319 0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d };
321 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
323 static const u16 NCT6775_REG_AUTO_TEMP[] = {
324 0x121, 0x221, 0x321, 0x821, 0x921, 0xa21 };
325 static const u16 NCT6775_REG_AUTO_PWM[] = {
326 0x127, 0x227, 0x327, 0x827, 0x927, 0xa27 };
328 #define NCT6775_AUTO_TEMP(data, nr, p) ((data)->REG_AUTO_TEMP[nr] + (p))
329 #define NCT6775_AUTO_PWM(data, nr, p) ((data)->REG_AUTO_PWM[nr] + (p))
331 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
333 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
334 0x135, 0x235, 0x335, 0x835, 0x935, 0xa35 };
335 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
336 0x138, 0x238, 0x338, 0x838, 0x938, 0xa38 };
338 static const char *const nct6775_temp_label[] = {
352 "PCH_CHIP_CPU_MAX_TEMP",
362 static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
363 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
365 static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
366 = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
369 /* NCT6776 specific data */
371 /* STEP_UP_TIME and STEP_DOWN_TIME regs are swapped for all chips but NCT6775 */
372 #define NCT6776_REG_FAN_STEP_UP_TIME NCT6775_REG_FAN_STEP_DOWN_TIME
373 #define NCT6776_REG_FAN_STEP_DOWN_TIME NCT6775_REG_FAN_STEP_UP_TIME
375 static const s8 NCT6776_ALARM_BITS[] = {
376 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
377 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
379 6, 7, 11, 10, 23, /* fan1..fan5 */
380 -1, -1, -1, /* unused */
381 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
382 12, 9 }; /* intrusion0, intrusion1 */
384 static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5 };
386 static const s8 NCT6776_BEEP_BITS[] = {
387 0, 1, 2, 3, 4, 5, 6, 7, /* in0.. in7 */
388 8, -1, -1, -1, -1, -1, -1, /* in8..in14 */
389 24, /* global beep enable */
390 25, 26, 27, 28, 29, /* fan1..fan5 */
391 -1, -1, -1, /* unused */
392 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
393 30, 31 }; /* intrusion0, intrusion1 */
395 static const u16 NCT6776_REG_TOLERANCE_H[] = {
396 0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c };
398 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0 };
399 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0 };
401 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
402 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
404 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
405 0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e };
407 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
408 0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
410 static const char *const nct6776_temp_label[] = {
425 "PCH_CHIP_CPU_MAX_TEMP",
436 static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
437 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
439 static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
440 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
442 /* NCT6779 specific data */
444 static const u16 NCT6779_REG_IN[] = {
445 0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
446 0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
448 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
449 0x459, 0x45A, 0x45B, 0x568 };
451 static const s8 NCT6779_ALARM_BITS[] = {
452 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
453 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */
455 6, 7, 11, 10, 23, /* fan1..fan5 */
456 -1, -1, -1, /* unused */
457 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
458 12, 9 }; /* intrusion0, intrusion1 */
460 static const s8 NCT6779_BEEP_BITS[] = {
461 0, 1, 2, 3, 4, 5, 6, 7, /* in0.. in7 */
462 8, 9, 10, 11, 12, 13, 14, /* in8..in14 */
463 24, /* global beep enable */
464 25, 26, 27, 28, 29, /* fan1..fan5 */
465 -1, -1, -1, /* unused */
466 16, 17, -1, -1, -1, -1, /* temp1..temp6 */
467 30, 31 }; /* intrusion0, intrusion1 */
469 static const u16 NCT6779_REG_FAN[] = {
470 0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8, 0x4ba };
471 static const u16 NCT6779_REG_FAN_PULSES[] = {
472 0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
474 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
475 0x136, 0x236, 0x336, 0x836, 0x936, 0xa36 };
476 #define NCT6779_CRITICAL_PWM_ENABLE_MASK 0x01
477 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
478 0x137, 0x237, 0x337, 0x837, 0x937, 0xa37 };
480 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
481 static const u16 NCT6779_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b };
482 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
484 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
486 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
489 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
490 0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
492 static const char *const nct6779_temp_label[] = {
511 "PCH_CHIP_CPU_MAX_TEMP",
527 #define NCT6779_NUM_LABELS (ARRAY_SIZE(nct6779_temp_label) - 5)
528 #define NCT6791_NUM_LABELS ARRAY_SIZE(nct6779_temp_label)
530 static const u16 NCT6779_REG_TEMP_ALTERNATE[NCT6791_NUM_LABELS - 1]
531 = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
532 0, 0, 0, 0, 0, 0, 0, 0,
533 0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
536 static const u16 NCT6779_REG_TEMP_CRIT[NCT6791_NUM_LABELS - 1]
537 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
539 /* NCT6791 specific data */
541 #define NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE 0x28
543 static const u16 NCT6791_REG_WEIGHT_TEMP_SEL[6] = { 0, 0x239 };
544 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP[6] = { 0, 0x23a };
545 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP_TOL[6] = { 0, 0x23b };
546 static const u16 NCT6791_REG_WEIGHT_DUTY_STEP[6] = { 0, 0x23c };
547 static const u16 NCT6791_REG_WEIGHT_TEMP_BASE[6] = { 0, 0x23d };
548 static const u16 NCT6791_REG_WEIGHT_DUTY_BASE[6] = { 0, 0x23e };
550 static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = {
551 0x459, 0x45A, 0x45B, 0x568, 0x45D };
553 static const s8 NCT6791_ALARM_BITS[] = {
554 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
555 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */
557 6, 7, 11, 10, 23, 33, /* fan1..fan6 */
559 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
560 12, 9 }; /* intrusion0, intrusion1 */
562 /* NCT6792/NCT6793 specific data */
564 static const u16 NCT6792_REG_TEMP_MON[] = {
565 0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d };
566 static const u16 NCT6792_REG_BEEP[NUM_REG_BEEP] = {
567 0xb2, 0xb3, 0xb4, 0xb5, 0xbf };
569 /* NCT6102D/NCT6106D specific data */
571 #define NCT6106_REG_VBAT 0x318
572 #define NCT6106_REG_DIODE 0x319
573 #define NCT6106_DIODE_MASK 0x01
575 static const u16 NCT6106_REG_IN_MAX[] = {
576 0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
577 static const u16 NCT6106_REG_IN_MIN[] = {
578 0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
579 static const u16 NCT6106_REG_IN[] = {
580 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
582 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
583 static const u16 NCT6106_REG_TEMP_MON[] = { 0x18, 0x19, 0x1a };
584 static const u16 NCT6106_REG_TEMP_HYST[] = {
585 0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
586 static const u16 NCT6106_REG_TEMP_OVER[] = {
587 0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
588 static const u16 NCT6106_REG_TEMP_CRIT_L[] = {
589 0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
590 static const u16 NCT6106_REG_TEMP_CRIT_H[] = {
591 0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
592 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
593 static const u16 NCT6106_REG_TEMP_CONFIG[] = {
594 0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
596 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
597 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
598 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0, 0 };
599 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4, 0, 0 };
601 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
602 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
603 static const u16 NCT6106_REG_PWM[] = { 0x119, 0x129, 0x139 };
604 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c };
605 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
606 static const u16 NCT6106_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130 };
607 static const u16 NCT6106_REG_TEMP_SOURCE[] = {
608 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
610 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
611 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = {
612 0x11b, 0x12b, 0x13b };
614 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
615 #define NCT6106_CRITICAL_PWM_ENABLE_MASK 0x10
616 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
618 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
619 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
620 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
621 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
622 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
623 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
625 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
627 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
628 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
629 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
630 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x17c };
631 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
632 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
634 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
635 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
637 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = {
638 0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
640 static const s8 NCT6106_ALARM_BITS[] = {
641 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */
642 9, -1, -1, -1, -1, -1, -1, /* in8..in14 */
644 32, 33, 34, -1, -1, /* fan1..fan5 */
645 -1, -1, -1, /* unused */
646 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
647 48, -1 /* intrusion0, intrusion1 */
650 static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = {
651 0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 };
653 static const s8 NCT6106_BEEP_BITS[] = {
654 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */
655 9, 10, 11, 12, -1, -1, -1, /* in8..in14 */
656 32, /* global beep enable */
657 24, 25, 26, 27, 28, /* fan1..fan5 */
658 -1, -1, -1, /* unused */
659 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
660 34, -1 /* intrusion0, intrusion1 */
663 static const u16 NCT6106_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
664 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x51, 0x52, 0x54 };
666 static const u16 NCT6106_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
667 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x204, 0x205 };
669 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
671 if (mode == 0 && pwm == 255)
676 static int pwm_enable_to_reg(enum pwm_enable mode)
687 /* 1 is DC mode, output in ms */
688 static unsigned int step_time_from_reg(u8 reg, u8 mode)
690 return mode ? 400 * reg : 100 * reg;
693 static u8 step_time_to_reg(unsigned int msec, u8 mode)
695 return clamp_val((mode ? (msec + 200) / 400 :
696 (msec + 50) / 100), 1, 255);
699 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
701 if (reg == 0 || reg == 255)
703 return 1350000U / (reg << divreg);
706 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
708 if ((reg & 0xff1f) == 0xff1f)
711 reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
716 return 1350000U / reg;
719 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
721 if (reg == 0 || reg == 0xffff)
725 * Even though the registers are 16 bit wide, the fan divisor
728 return 1350000U / (reg << divreg);
731 static u16 fan_to_reg(u32 fan, unsigned int divreg)
736 return (1350000U / fan) >> divreg;
739 static inline unsigned int
746 * Some of the voltage inputs have internal scaling, the tables below
747 * contain 8 (the ADC LSB in mV) * scaling factor * 100
749 static const u16 scale_in[15] = {
750 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
754 static inline long in_from_reg(u8 reg, u8 nr)
756 return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
759 static inline u8 in_to_reg(u32 val, u8 nr)
761 return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
765 * Data structures and manipulation thereof
768 struct nct6775_data {
769 int addr; /* IO base of hw monitor block */
770 int sioreg; /* SIO register address */
774 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
775 struct device *hwmon_dev;
778 const struct attribute_group *groups[6];
780 u16 reg_temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
781 * 3=temp_crit, 4=temp_lcrit
783 u8 temp_src[NUM_TEMP];
784 u16 reg_temp_config[NUM_TEMP];
785 const char * const *temp_label;
793 const s8 *ALARM_BITS;
797 const u16 *REG_IN_MINMAX[2];
799 const u16 *REG_TARGET;
801 const u16 *REG_FAN_MODE;
802 const u16 *REG_FAN_MIN;
803 const u16 *REG_FAN_PULSES;
804 const u16 *FAN_PULSE_SHIFT;
805 const u16 *REG_FAN_TIME[3];
807 const u16 *REG_TOLERANCE_H;
809 const u8 *REG_PWM_MODE;
810 const u8 *PWM_MODE_MASK;
812 const u16 *REG_PWM[7]; /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
813 * [3]=pwm_max, [4]=pwm_step,
814 * [5]=weight_duty_step, [6]=weight_duty_base
816 const u16 *REG_PWM_READ;
818 const u16 *REG_CRITICAL_PWM_ENABLE;
819 u8 CRITICAL_PWM_ENABLE_MASK;
820 const u16 *REG_CRITICAL_PWM;
822 const u16 *REG_AUTO_TEMP;
823 const u16 *REG_AUTO_PWM;
825 const u16 *REG_CRITICAL_TEMP;
826 const u16 *REG_CRITICAL_TEMP_TOLERANCE;
828 const u16 *REG_TEMP_SOURCE; /* temp register sources */
829 const u16 *REG_TEMP_SEL;
830 const u16 *REG_WEIGHT_TEMP_SEL;
831 const u16 *REG_WEIGHT_TEMP[3]; /* 0=base, 1=tolerance, 2=step */
833 const u16 *REG_TEMP_OFFSET;
835 const u16 *REG_ALARM;
838 unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
839 unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
841 struct mutex update_lock;
842 bool valid; /* true if following fields are valid */
843 unsigned long last_updated; /* In jiffies */
845 /* Register values */
846 u8 bank; /* current register bank */
847 u8 in_num; /* number of in inputs we have */
848 u8 in[15][3]; /* [0]=in, [1]=in_max, [2]=in_min */
849 unsigned int rpm[NUM_FAN];
850 u16 fan_min[NUM_FAN];
851 u8 fan_pulses[NUM_FAN];
854 u8 has_fan; /* some fan inputs can be disabled */
855 u8 has_fan_min; /* some fans don't have min register */
858 u8 num_temp_alarms; /* 2, 3, or 6 */
859 u8 num_temp_beeps; /* 2, 3, or 6 */
860 u8 temp_fixed_num; /* 3 or 6 */
861 u8 temp_type[NUM_TEMP_FIXED];
862 s8 temp_offset[NUM_TEMP_FIXED];
863 s16 temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
864 * 3=temp_crit, 4=temp_lcrit */
868 u8 pwm_num; /* number of pwm */
869 u8 pwm_mode[NUM_FAN]; /* 1->DC variable voltage,
870 * 0->PWM variable duty cycle
872 enum pwm_enable pwm_enable[NUM_FAN];
875 * 2->thermal cruise mode (also called SmartFan I)
876 * 3->fan speed cruise mode
878 * 5->enhanced variable thermal cruise (SmartFan IV)
880 u8 pwm[7][NUM_FAN]; /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
881 * [3]=pwm_max, [4]=pwm_step,
882 * [5]=weight_duty_step, [6]=weight_duty_base
885 u8 target_temp[NUM_FAN];
887 u32 target_speed[NUM_FAN];
888 u32 target_speed_tolerance[NUM_FAN];
889 u8 speed_tolerance_limit;
891 u8 temp_tolerance[2][NUM_FAN];
894 u8 fan_time[3][NUM_FAN]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
896 /* Automatic fan speed control registers */
898 u8 auto_pwm[NUM_FAN][7];
899 u8 auto_temp[NUM_FAN][7];
900 u8 pwm_temp_sel[NUM_FAN];
901 u8 pwm_weight_temp_sel[NUM_FAN];
902 u8 weight_temp[3][NUM_FAN]; /* 0->temp_step, 1->temp_step_tol,
915 /* Remember extra register values over suspend/resume */
922 struct nct6775_sio_data {
927 struct sensor_device_template {
928 struct device_attribute dev_attr;
936 bool s2; /* true if both index and nr are used */
939 struct sensor_device_attr_u {
941 struct sensor_device_attribute a1;
942 struct sensor_device_attribute_2 a2;
947 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) { \
948 .attr = {.name = _template, .mode = _mode }, \
953 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \
954 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
958 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \
960 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
961 .u.s.index = _index, \
965 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
966 static struct sensor_device_template sensor_dev_template_##_name \
967 = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, \
970 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store, \
972 static struct sensor_device_template sensor_dev_template_##_name \
973 = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \
976 struct sensor_template_group {
977 struct sensor_device_template **templates;
978 umode_t (*is_visible)(struct kobject *, struct attribute *, int);
982 static struct attribute_group *
983 nct6775_create_attr_group(struct device *dev, struct sensor_template_group *tg,
986 struct attribute_group *group;
987 struct sensor_device_attr_u *su;
988 struct sensor_device_attribute *a;
989 struct sensor_device_attribute_2 *a2;
990 struct attribute **attrs;
991 struct sensor_device_template **t;
995 return ERR_PTR(-EINVAL);
998 for (count = 0; *t; t++, count++)
1002 return ERR_PTR(-EINVAL);
1004 group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
1006 return ERR_PTR(-ENOMEM);
1008 attrs = devm_kzalloc(dev, sizeof(*attrs) * (repeat * count + 1),
1011 return ERR_PTR(-ENOMEM);
1013 su = devm_kzalloc(dev, sizeof(*su) * repeat * count,
1016 return ERR_PTR(-ENOMEM);
1018 group->attrs = attrs;
1019 group->is_visible = tg->is_visible;
1021 for (i = 0; i < repeat; i++) {
1023 while (*t != NULL) {
1024 snprintf(su->name, sizeof(su->name),
1025 (*t)->dev_attr.attr.name, tg->base + i);
1028 sysfs_attr_init(&a2->dev_attr.attr);
1029 a2->dev_attr.attr.name = su->name;
1030 a2->nr = (*t)->u.s.nr + i;
1031 a2->index = (*t)->u.s.index;
1032 a2->dev_attr.attr.mode =
1033 (*t)->dev_attr.attr.mode;
1034 a2->dev_attr.show = (*t)->dev_attr.show;
1035 a2->dev_attr.store = (*t)->dev_attr.store;
1036 *attrs = &a2->dev_attr.attr;
1039 sysfs_attr_init(&a->dev_attr.attr);
1040 a->dev_attr.attr.name = su->name;
1041 a->index = (*t)->u.index + i;
1042 a->dev_attr.attr.mode =
1043 (*t)->dev_attr.attr.mode;
1044 a->dev_attr.show = (*t)->dev_attr.show;
1045 a->dev_attr.store = (*t)->dev_attr.store;
1046 *attrs = &a->dev_attr.attr;
1057 static bool is_word_sized(struct nct6775_data *data, u16 reg)
1059 switch (data->kind) {
1061 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1062 reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
1063 reg == 0x111 || reg == 0x121 || reg == 0x131;
1065 return (((reg & 0xff00) == 0x100 ||
1066 (reg & 0xff00) == 0x200) &&
1067 ((reg & 0x00ff) == 0x50 ||
1068 (reg & 0x00ff) == 0x53 ||
1069 (reg & 0x00ff) == 0x55)) ||
1070 (reg & 0xfff0) == 0x630 ||
1071 reg == 0x640 || reg == 0x642 ||
1073 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1074 reg == 0x73 || reg == 0x75 || reg == 0x77;
1076 return (((reg & 0xff00) == 0x100 ||
1077 (reg & 0xff00) == 0x200) &&
1078 ((reg & 0x00ff) == 0x50 ||
1079 (reg & 0x00ff) == 0x53 ||
1080 (reg & 0x00ff) == 0x55)) ||
1081 (reg & 0xfff0) == 0x630 ||
1083 reg == 0x640 || reg == 0x642 ||
1084 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1085 reg == 0x73 || reg == 0x75 || reg == 0x77;
1090 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
1091 ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x0b) ||
1093 reg == 0x63a || reg == 0x63c || reg == 0x63e ||
1094 reg == 0x640 || reg == 0x642 ||
1095 reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
1096 reg == 0x7b || reg == 0x7d;
1102 * On older chips, only registers 0x50-0x5f are banked.
1103 * On more recent chips, all registers are banked.
1104 * Assume that is the case and set the bank number for each access.
1105 * Cache the bank number so it only needs to be set if it changes.
1107 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
1111 if (data->bank != bank) {
1112 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
1113 outb_p(bank, data->addr + DATA_REG_OFFSET);
1118 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
1120 int res, word_sized = is_word_sized(data, reg);
1122 nct6775_set_bank(data, reg);
1123 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1124 res = inb_p(data->addr + DATA_REG_OFFSET);
1126 outb_p((reg & 0xff) + 1,
1127 data->addr + ADDR_REG_OFFSET);
1128 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
1133 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
1135 int word_sized = is_word_sized(data, reg);
1137 nct6775_set_bank(data, reg);
1138 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1140 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
1141 outb_p((reg & 0xff) + 1,
1142 data->addr + ADDR_REG_OFFSET);
1144 outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
1148 /* We left-align 8-bit temperature values to make the code simpler */
1149 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
1153 res = nct6775_read_value(data, reg);
1154 if (!is_word_sized(data, reg))
1160 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
1162 if (!is_word_sized(data, reg))
1164 return nct6775_write_value(data, reg, value);
1167 /* This function assumes that the caller holds data->update_lock */
1168 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
1174 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
1175 | (data->fan_div[0] & 0x7);
1176 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1179 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
1180 | ((data->fan_div[1] << 4) & 0x70);
1181 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1184 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
1185 | (data->fan_div[2] & 0x7);
1186 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1189 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
1190 | ((data->fan_div[3] << 4) & 0x70);
1191 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1196 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
1198 if (data->kind == nct6775)
1199 nct6775_write_fan_div(data, nr);
1202 static void nct6775_update_fan_div(struct nct6775_data *data)
1206 i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
1207 data->fan_div[0] = i & 0x7;
1208 data->fan_div[1] = (i & 0x70) >> 4;
1209 i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
1210 data->fan_div[2] = i & 0x7;
1211 if (data->has_fan & (1 << 3))
1212 data->fan_div[3] = (i & 0x70) >> 4;
1215 static void nct6775_update_fan_div_common(struct nct6775_data *data)
1217 if (data->kind == nct6775)
1218 nct6775_update_fan_div(data);
1221 static void nct6775_init_fan_div(struct nct6775_data *data)
1225 nct6775_update_fan_div_common(data);
1227 * For all fans, start with highest divider value if the divider
1228 * register is not initialized. This ensures that we get a
1229 * reading from the fan count register, even if it is not optimal.
1230 * We'll compute a better divider later on.
1232 for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
1233 if (!(data->has_fan & (1 << i)))
1235 if (data->fan_div[i] == 0) {
1236 data->fan_div[i] = 7;
1237 nct6775_write_fan_div_common(data, i);
1242 static void nct6775_init_fan_common(struct device *dev,
1243 struct nct6775_data *data)
1248 if (data->has_fan_div)
1249 nct6775_init_fan_div(data);
1252 * If fan_min is not set (0), set it to 0xff to disable it. This
1253 * prevents the unnecessary warning when fanX_min is reported as 0.
1255 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1256 if (data->has_fan_min & (1 << i)) {
1257 reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
1259 nct6775_write_value(data, data->REG_FAN_MIN[i],
1260 data->has_fan_div ? 0xff
1266 static void nct6775_select_fan_div(struct device *dev,
1267 struct nct6775_data *data, int nr, u16 reg)
1269 u8 fan_div = data->fan_div[nr];
1272 if (!data->has_fan_div)
1276 * If we failed to measure the fan speed, or the reported value is not
1277 * in the optimal range, and the clock divider can be modified,
1278 * let's try that for next time.
1280 if (reg == 0x00 && fan_div < 0x07)
1282 else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1285 if (fan_div != data->fan_div[nr]) {
1286 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1287 nr + 1, div_from_reg(data->fan_div[nr]),
1288 div_from_reg(fan_div));
1290 /* Preserve min limit if possible */
1291 if (data->has_fan_min & (1 << nr)) {
1292 fan_min = data->fan_min[nr];
1293 if (fan_div > data->fan_div[nr]) {
1294 if (fan_min != 255 && fan_min > 1)
1297 if (fan_min != 255) {
1303 if (fan_min != data->fan_min[nr]) {
1304 data->fan_min[nr] = fan_min;
1305 nct6775_write_value(data, data->REG_FAN_MIN[nr],
1309 data->fan_div[nr] = fan_div;
1310 nct6775_write_fan_div_common(data, nr);
1314 static void nct6775_update_pwm(struct device *dev)
1316 struct nct6775_data *data = dev_get_drvdata(dev);
1318 int fanmodecfg, reg;
1321 for (i = 0; i < data->pwm_num; i++) {
1322 if (!(data->has_pwm & (1 << i)))
1325 duty_is_dc = data->REG_PWM_MODE[i] &&
1326 (nct6775_read_value(data, data->REG_PWM_MODE[i])
1327 & data->PWM_MODE_MASK[i]);
1328 data->pwm_mode[i] = duty_is_dc;
1330 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
1331 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1332 if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1334 = nct6775_read_value(data,
1335 data->REG_PWM[j][i]);
1339 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1340 (fanmodecfg >> 4) & 7);
1342 if (!data->temp_tolerance[0][i] ||
1343 data->pwm_enable[i] != speed_cruise)
1344 data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1345 if (!data->target_speed_tolerance[i] ||
1346 data->pwm_enable[i] == speed_cruise) {
1347 u8 t = fanmodecfg & 0x0f;
1349 if (data->REG_TOLERANCE_H) {
1350 t |= (nct6775_read_value(data,
1351 data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
1353 data->target_speed_tolerance[i] = t;
1356 data->temp_tolerance[1][i] =
1357 nct6775_read_value(data,
1358 data->REG_CRITICAL_TEMP_TOLERANCE[i]);
1360 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
1361 data->pwm_temp_sel[i] = reg & 0x1f;
1362 /* If fan can stop, report floor as 0 */
1364 data->pwm[2][i] = 0;
1366 if (!data->REG_WEIGHT_TEMP_SEL[i])
1369 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
1370 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1371 /* If weight is disabled, report weight source as 0 */
1372 if (j == 1 && !(reg & 0x80))
1373 data->pwm_weight_temp_sel[i] = 0;
1375 /* Weight temp data */
1376 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
1377 data->weight_temp[j][i]
1378 = nct6775_read_value(data,
1379 data->REG_WEIGHT_TEMP[j][i]);
1384 static void nct6775_update_pwm_limits(struct device *dev)
1386 struct nct6775_data *data = dev_get_drvdata(dev);
1391 for (i = 0; i < data->pwm_num; i++) {
1392 if (!(data->has_pwm & (1 << i)))
1395 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1396 data->fan_time[j][i] =
1397 nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1400 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1401 /* Update only in matching mode or if never updated */
1402 if (!data->target_temp[i] ||
1403 data->pwm_enable[i] == thermal_cruise)
1404 data->target_temp[i] = reg_t & data->target_temp_mask;
1405 if (!data->target_speed[i] ||
1406 data->pwm_enable[i] == speed_cruise) {
1407 if (data->REG_TOLERANCE_H) {
1408 reg_t |= (nct6775_read_value(data,
1409 data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1411 data->target_speed[i] = reg_t;
1414 for (j = 0; j < data->auto_pwm_num; j++) {
1415 data->auto_pwm[i][j] =
1416 nct6775_read_value(data,
1417 NCT6775_AUTO_PWM(data, i, j));
1418 data->auto_temp[i][j] =
1419 nct6775_read_value(data,
1420 NCT6775_AUTO_TEMP(data, i, j));
1423 /* critical auto_pwm temperature data */
1424 data->auto_temp[i][data->auto_pwm_num] =
1425 nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1427 switch (data->kind) {
1429 reg = nct6775_read_value(data,
1430 NCT6775_REG_CRITICAL_ENAB[i]);
1431 data->auto_pwm[i][data->auto_pwm_num] =
1432 (reg & 0x02) ? 0xff : 0x00;
1435 data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1442 reg = nct6775_read_value(data,
1443 data->REG_CRITICAL_PWM_ENABLE[i]);
1444 if (reg & data->CRITICAL_PWM_ENABLE_MASK)
1445 reg = nct6775_read_value(data,
1446 data->REG_CRITICAL_PWM[i]);
1449 data->auto_pwm[i][data->auto_pwm_num] = reg;
1455 static struct nct6775_data *nct6775_update_device(struct device *dev)
1457 struct nct6775_data *data = dev_get_drvdata(dev);
1460 mutex_lock(&data->update_lock);
1462 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1464 /* Fan clock dividers */
1465 nct6775_update_fan_div_common(data);
1467 /* Measured voltages and limits */
1468 for (i = 0; i < data->in_num; i++) {
1469 if (!(data->have_in & (1 << i)))
1472 data->in[i][0] = nct6775_read_value(data,
1474 data->in[i][1] = nct6775_read_value(data,
1475 data->REG_IN_MINMAX[0][i]);
1476 data->in[i][2] = nct6775_read_value(data,
1477 data->REG_IN_MINMAX[1][i]);
1480 /* Measured fan speeds and limits */
1481 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
1484 if (!(data->has_fan & (1 << i)))
1487 reg = nct6775_read_value(data, data->REG_FAN[i]);
1488 data->rpm[i] = data->fan_from_reg(reg,
1491 if (data->has_fan_min & (1 << i))
1492 data->fan_min[i] = nct6775_read_value(data,
1493 data->REG_FAN_MIN[i]);
1494 data->fan_pulses[i] =
1495 (nct6775_read_value(data, data->REG_FAN_PULSES[i])
1496 >> data->FAN_PULSE_SHIFT[i]) & 0x03;
1498 nct6775_select_fan_div(dev, data, i, reg);
1501 nct6775_update_pwm(dev);
1502 nct6775_update_pwm_limits(dev);
1504 /* Measured temperatures and limits */
1505 for (i = 0; i < NUM_TEMP; i++) {
1506 if (!(data->have_temp & (1 << i)))
1508 for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1509 if (data->reg_temp[j][i])
1511 = nct6775_read_temp(data,
1512 data->reg_temp[j][i]);
1514 if (i >= NUM_TEMP_FIXED ||
1515 !(data->have_temp_fixed & (1 << i)))
1517 data->temp_offset[i]
1518 = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1522 for (i = 0; i < NUM_REG_ALARM; i++) {
1525 if (!data->REG_ALARM[i])
1527 alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1528 data->alarms |= ((u64)alarm) << (i << 3);
1532 for (i = 0; i < NUM_REG_BEEP; i++) {
1535 if (!data->REG_BEEP[i])
1537 beep = nct6775_read_value(data, data->REG_BEEP[i]);
1538 data->beeps |= ((u64)beep) << (i << 3);
1541 data->last_updated = jiffies;
1545 mutex_unlock(&data->update_lock);
1550 * Sysfs callback functions
1553 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1555 struct nct6775_data *data = nct6775_update_device(dev);
1556 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1557 int index = sattr->index;
1560 return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1564 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1567 struct nct6775_data *data = dev_get_drvdata(dev);
1568 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1569 int index = sattr->index;
1574 err = kstrtoul(buf, 10, &val);
1577 mutex_lock(&data->update_lock);
1578 data->in[nr][index] = in_to_reg(val, nr);
1579 nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr],
1580 data->in[nr][index]);
1581 mutex_unlock(&data->update_lock);
1586 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1588 struct nct6775_data *data = nct6775_update_device(dev);
1589 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1590 int nr = data->ALARM_BITS[sattr->index];
1592 return sprintf(buf, "%u\n",
1593 (unsigned int)((data->alarms >> nr) & 0x01));
1596 static int find_temp_source(struct nct6775_data *data, int index, int count)
1598 int source = data->temp_src[index];
1601 for (nr = 0; nr < count; nr++) {
1604 src = nct6775_read_value(data,
1605 data->REG_TEMP_SOURCE[nr]) & 0x1f;
1613 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1615 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1616 struct nct6775_data *data = nct6775_update_device(dev);
1617 unsigned int alarm = 0;
1621 * For temperatures, there is no fixed mapping from registers to alarm
1622 * bits. Alarm bits are determined by the temperature source mapping.
1624 nr = find_temp_source(data, sattr->index, data->num_temp_alarms);
1626 int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE];
1628 alarm = (data->alarms >> bit) & 0x01;
1630 return sprintf(buf, "%u\n", alarm);
1634 show_beep(struct device *dev, struct device_attribute *attr, char *buf)
1636 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1637 struct nct6775_data *data = nct6775_update_device(dev);
1638 int nr = data->BEEP_BITS[sattr->index];
1640 return sprintf(buf, "%u\n",
1641 (unsigned int)((data->beeps >> nr) & 0x01));
1645 store_beep(struct device *dev, struct device_attribute *attr, const char *buf,
1648 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1649 struct nct6775_data *data = dev_get_drvdata(dev);
1650 int nr = data->BEEP_BITS[sattr->index];
1651 int regindex = nr >> 3;
1655 err = kstrtoul(buf, 10, &val);
1661 mutex_lock(&data->update_lock);
1663 data->beeps |= (1ULL << nr);
1665 data->beeps &= ~(1ULL << nr);
1666 nct6775_write_value(data, data->REG_BEEP[regindex],
1667 (data->beeps >> (regindex << 3)) & 0xff);
1668 mutex_unlock(&data->update_lock);
1673 show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf)
1675 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1676 struct nct6775_data *data = nct6775_update_device(dev);
1677 unsigned int beep = 0;
1681 * For temperatures, there is no fixed mapping from registers to beep
1682 * enable bits. Beep enable bits are determined by the temperature
1685 nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1687 int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1689 beep = (data->beeps >> bit) & 0x01;
1691 return sprintf(buf, "%u\n", beep);
1695 store_temp_beep(struct device *dev, struct device_attribute *attr,
1696 const char *buf, size_t count)
1698 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1699 struct nct6775_data *data = dev_get_drvdata(dev);
1700 int nr, bit, regindex;
1704 err = kstrtoul(buf, 10, &val);
1710 nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1714 bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1715 regindex = bit >> 3;
1717 mutex_lock(&data->update_lock);
1719 data->beeps |= (1ULL << bit);
1721 data->beeps &= ~(1ULL << bit);
1722 nct6775_write_value(data, data->REG_BEEP[regindex],
1723 (data->beeps >> (regindex << 3)) & 0xff);
1724 mutex_unlock(&data->update_lock);
1729 static umode_t nct6775_in_is_visible(struct kobject *kobj,
1730 struct attribute *attr, int index)
1732 struct device *dev = container_of(kobj, struct device, kobj);
1733 struct nct6775_data *data = dev_get_drvdata(dev);
1734 int in = index / 5; /* voltage index */
1736 if (!(data->have_in & (1 << in)))
1742 SENSOR_TEMPLATE_2(in_input, "in%d_input", S_IRUGO, show_in_reg, NULL, 0, 0);
1743 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", S_IRUGO, show_alarm, NULL, 0);
1744 SENSOR_TEMPLATE(in_beep, "in%d_beep", S_IWUSR | S_IRUGO, show_beep, store_beep,
1746 SENSOR_TEMPLATE_2(in_min, "in%d_min", S_IWUSR | S_IRUGO, show_in_reg,
1747 store_in_reg, 0, 1);
1748 SENSOR_TEMPLATE_2(in_max, "in%d_max", S_IWUSR | S_IRUGO, show_in_reg,
1749 store_in_reg, 0, 2);
1752 * nct6775_in_is_visible uses the index into the following array
1753 * to determine if attributes should be created or not.
1754 * Any change in order or content must be matched.
1756 static struct sensor_device_template *nct6775_attributes_in_template[] = {
1757 &sensor_dev_template_in_input,
1758 &sensor_dev_template_in_alarm,
1759 &sensor_dev_template_in_beep,
1760 &sensor_dev_template_in_min,
1761 &sensor_dev_template_in_max,
1765 static struct sensor_template_group nct6775_in_template_group = {
1766 .templates = nct6775_attributes_in_template,
1767 .is_visible = nct6775_in_is_visible,
1771 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1773 struct nct6775_data *data = nct6775_update_device(dev);
1774 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1775 int nr = sattr->index;
1777 return sprintf(buf, "%d\n", data->rpm[nr]);
1781 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1783 struct nct6775_data *data = nct6775_update_device(dev);
1784 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1785 int nr = sattr->index;
1787 return sprintf(buf, "%d\n",
1788 data->fan_from_reg_min(data->fan_min[nr],
1789 data->fan_div[nr]));
1793 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1795 struct nct6775_data *data = nct6775_update_device(dev);
1796 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1797 int nr = sattr->index;
1799 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1803 store_fan_min(struct device *dev, struct device_attribute *attr,
1804 const char *buf, size_t count)
1806 struct nct6775_data *data = dev_get_drvdata(dev);
1807 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1808 int nr = sattr->index;
1814 err = kstrtoul(buf, 10, &val);
1818 mutex_lock(&data->update_lock);
1819 if (!data->has_fan_div) {
1820 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1826 val = 1350000U / val;
1827 val = (val & 0x1f) | ((val << 3) & 0xff00);
1829 data->fan_min[nr] = val;
1830 goto write_min; /* Leave fan divider alone */
1833 /* No min limit, alarm disabled */
1834 data->fan_min[nr] = 255;
1835 new_div = data->fan_div[nr]; /* No change */
1836 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1839 reg = 1350000U / val;
1840 if (reg >= 128 * 255) {
1842 * Speed below this value cannot possibly be represented,
1843 * even with the highest divider (128)
1845 data->fan_min[nr] = 254;
1846 new_div = 7; /* 128 == (1 << 7) */
1848 "fan%u low limit %lu below minimum %u, set to minimum\n",
1849 nr + 1, val, data->fan_from_reg_min(254, 7));
1852 * Speed above this value cannot possibly be represented,
1853 * even with the lowest divider (1)
1855 data->fan_min[nr] = 1;
1856 new_div = 0; /* 1 == (1 << 0) */
1858 "fan%u low limit %lu above maximum %u, set to maximum\n",
1859 nr + 1, val, data->fan_from_reg_min(1, 0));
1862 * Automatically pick the best divider, i.e. the one such
1863 * that the min limit will correspond to a register value
1864 * in the 96..192 range
1867 while (reg > 192 && new_div < 7) {
1871 data->fan_min[nr] = reg;
1876 * Write both the fan clock divider (if it changed) and the new
1877 * fan min (unconditionally)
1879 if (new_div != data->fan_div[nr]) {
1880 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1881 nr + 1, div_from_reg(data->fan_div[nr]),
1882 div_from_reg(new_div));
1883 data->fan_div[nr] = new_div;
1884 nct6775_write_fan_div_common(data, nr);
1885 /* Give the chip time to sample a new speed value */
1886 data->last_updated = jiffies;
1890 nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1891 mutex_unlock(&data->update_lock);
1897 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
1899 struct nct6775_data *data = nct6775_update_device(dev);
1900 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1901 int p = data->fan_pulses[sattr->index];
1903 return sprintf(buf, "%d\n", p ? : 4);
1907 store_fan_pulses(struct device *dev, struct device_attribute *attr,
1908 const char *buf, size_t count)
1910 struct nct6775_data *data = dev_get_drvdata(dev);
1911 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1912 int nr = sattr->index;
1917 err = kstrtoul(buf, 10, &val);
1924 mutex_lock(&data->update_lock);
1925 data->fan_pulses[nr] = val & 3;
1926 reg = nct6775_read_value(data, data->REG_FAN_PULSES[nr]);
1927 reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
1928 reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
1929 nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
1930 mutex_unlock(&data->update_lock);
1935 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
1936 struct attribute *attr, int index)
1938 struct device *dev = container_of(kobj, struct device, kobj);
1939 struct nct6775_data *data = dev_get_drvdata(dev);
1940 int fan = index / 6; /* fan index */
1941 int nr = index % 6; /* attribute index */
1943 if (!(data->has_fan & (1 << fan)))
1946 if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1)
1948 if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1)
1950 if (nr == 4 && !(data->has_fan_min & (1 << fan)))
1952 if (nr == 5 && data->kind != nct6775)
1958 SENSOR_TEMPLATE(fan_input, "fan%d_input", S_IRUGO, show_fan, NULL, 0);
1959 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", S_IRUGO, show_alarm, NULL,
1961 SENSOR_TEMPLATE(fan_beep, "fan%d_beep", S_IWUSR | S_IRUGO, show_beep,
1962 store_beep, FAN_ALARM_BASE);
1963 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", S_IWUSR | S_IRUGO, show_fan_pulses,
1964 store_fan_pulses, 0);
1965 SENSOR_TEMPLATE(fan_min, "fan%d_min", S_IWUSR | S_IRUGO, show_fan_min,
1967 SENSOR_TEMPLATE(fan_div, "fan%d_div", S_IRUGO, show_fan_div, NULL, 0);
1970 * nct6775_fan_is_visible uses the index into the following array
1971 * to determine if attributes should be created or not.
1972 * Any change in order or content must be matched.
1974 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
1975 &sensor_dev_template_fan_input,
1976 &sensor_dev_template_fan_alarm, /* 1 */
1977 &sensor_dev_template_fan_beep, /* 2 */
1978 &sensor_dev_template_fan_pulses,
1979 &sensor_dev_template_fan_min, /* 4 */
1980 &sensor_dev_template_fan_div, /* 5 */
1984 static struct sensor_template_group nct6775_fan_template_group = {
1985 .templates = nct6775_attributes_fan_template,
1986 .is_visible = nct6775_fan_is_visible,
1991 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1993 struct nct6775_data *data = nct6775_update_device(dev);
1994 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1995 int nr = sattr->index;
1997 return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
2001 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
2003 struct nct6775_data *data = nct6775_update_device(dev);
2004 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2006 int index = sattr->index;
2008 return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
2012 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
2015 struct nct6775_data *data = dev_get_drvdata(dev);
2016 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2018 int index = sattr->index;
2022 err = kstrtol(buf, 10, &val);
2026 mutex_lock(&data->update_lock);
2027 data->temp[index][nr] = LM75_TEMP_TO_REG(val);
2028 nct6775_write_temp(data, data->reg_temp[index][nr],
2029 data->temp[index][nr]);
2030 mutex_unlock(&data->update_lock);
2035 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
2037 struct nct6775_data *data = nct6775_update_device(dev);
2038 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2040 return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
2044 store_temp_offset(struct device *dev, struct device_attribute *attr,
2045 const char *buf, size_t count)
2047 struct nct6775_data *data = dev_get_drvdata(dev);
2048 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2049 int nr = sattr->index;
2053 err = kstrtol(buf, 10, &val);
2057 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
2059 mutex_lock(&data->update_lock);
2060 data->temp_offset[nr] = val;
2061 nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
2062 mutex_unlock(&data->update_lock);
2068 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
2070 struct nct6775_data *data = nct6775_update_device(dev);
2071 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2072 int nr = sattr->index;
2074 return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
2078 store_temp_type(struct device *dev, struct device_attribute *attr,
2079 const char *buf, size_t count)
2081 struct nct6775_data *data = nct6775_update_device(dev);
2082 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2083 int nr = sattr->index;
2086 u8 vbat, diode, vbit, dbit;
2088 err = kstrtoul(buf, 10, &val);
2092 if (val != 1 && val != 3 && val != 4)
2095 mutex_lock(&data->update_lock);
2097 data->temp_type[nr] = val;
2099 dbit = data->DIODE_MASK << nr;
2100 vbat = nct6775_read_value(data, data->REG_VBAT) & ~vbit;
2101 diode = nct6775_read_value(data, data->REG_DIODE) & ~dbit;
2103 case 1: /* CPU diode (diode, current mode) */
2107 case 3: /* diode, voltage mode */
2110 case 4: /* thermistor */
2113 nct6775_write_value(data, data->REG_VBAT, vbat);
2114 nct6775_write_value(data, data->REG_DIODE, diode);
2116 mutex_unlock(&data->update_lock);
2120 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
2121 struct attribute *attr, int index)
2123 struct device *dev = container_of(kobj, struct device, kobj);
2124 struct nct6775_data *data = dev_get_drvdata(dev);
2125 int temp = index / 10; /* temp index */
2126 int nr = index % 10; /* attribute index */
2128 if (!(data->have_temp & (1 << temp)))
2131 if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0)
2132 return 0; /* alarm */
2134 if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0)
2135 return 0; /* beep */
2137 if (nr == 4 && !data->reg_temp[1][temp]) /* max */
2140 if (nr == 5 && !data->reg_temp[2][temp]) /* max_hyst */
2143 if (nr == 6 && !data->reg_temp[3][temp]) /* crit */
2146 if (nr == 7 && !data->reg_temp[4][temp]) /* lcrit */
2149 /* offset and type only apply to fixed sensors */
2150 if (nr > 7 && !(data->have_temp_fixed & (1 << temp)))
2156 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", S_IRUGO, show_temp, NULL, 0, 0);
2157 SENSOR_TEMPLATE(temp_label, "temp%d_label", S_IRUGO, show_temp_label, NULL, 0);
2158 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", S_IRUGO | S_IWUSR, show_temp,
2160 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", S_IRUGO | S_IWUSR,
2161 show_temp, store_temp, 0, 2);
2162 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", S_IRUGO | S_IWUSR, show_temp,
2164 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", S_IRUGO | S_IWUSR, show_temp,
2166 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", S_IRUGO | S_IWUSR,
2167 show_temp_offset, store_temp_offset, 0);
2168 SENSOR_TEMPLATE(temp_type, "temp%d_type", S_IRUGO | S_IWUSR, show_temp_type,
2169 store_temp_type, 0);
2170 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", S_IRUGO, show_temp_alarm, NULL, 0);
2171 SENSOR_TEMPLATE(temp_beep, "temp%d_beep", S_IRUGO | S_IWUSR, show_temp_beep,
2172 store_temp_beep, 0);
2175 * nct6775_temp_is_visible uses the index into the following array
2176 * to determine if attributes should be created or not.
2177 * Any change in order or content must be matched.
2179 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
2180 &sensor_dev_template_temp_input,
2181 &sensor_dev_template_temp_label,
2182 &sensor_dev_template_temp_alarm, /* 2 */
2183 &sensor_dev_template_temp_beep, /* 3 */
2184 &sensor_dev_template_temp_max, /* 4 */
2185 &sensor_dev_template_temp_max_hyst, /* 5 */
2186 &sensor_dev_template_temp_crit, /* 6 */
2187 &sensor_dev_template_temp_lcrit, /* 7 */
2188 &sensor_dev_template_temp_offset, /* 8 */
2189 &sensor_dev_template_temp_type, /* 9 */
2193 static struct sensor_template_group nct6775_temp_template_group = {
2194 .templates = nct6775_attributes_temp_template,
2195 .is_visible = nct6775_temp_is_visible,
2200 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
2202 struct nct6775_data *data = nct6775_update_device(dev);
2203 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2205 return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
2209 store_pwm_mode(struct device *dev, struct device_attribute *attr,
2210 const char *buf, size_t count)
2212 struct nct6775_data *data = dev_get_drvdata(dev);
2213 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2214 int nr = sattr->index;
2219 err = kstrtoul(buf, 10, &val);
2226 /* Setting DC mode is not supported for all chips/channels */
2227 if (data->REG_PWM_MODE[nr] == 0) {
2233 mutex_lock(&data->update_lock);
2234 data->pwm_mode[nr] = val;
2235 reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
2236 reg &= ~data->PWM_MODE_MASK[nr];
2238 reg |= data->PWM_MODE_MASK[nr];
2239 nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
2240 mutex_unlock(&data->update_lock);
2245 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2247 struct nct6775_data *data = nct6775_update_device(dev);
2248 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2250 int index = sattr->index;
2254 * For automatic fan control modes, show current pwm readings.
2255 * Otherwise, show the configured value.
2257 if (index == 0 && data->pwm_enable[nr] > manual)
2258 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
2260 pwm = data->pwm[index][nr];
2262 return sprintf(buf, "%d\n", pwm);
2266 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
2269 struct nct6775_data *data = dev_get_drvdata(dev);
2270 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2272 int index = sattr->index;
2274 int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
2276 = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
2280 err = kstrtoul(buf, 10, &val);
2283 val = clamp_val(val, minval[index], maxval[index]);
2285 mutex_lock(&data->update_lock);
2286 data->pwm[index][nr] = val;
2287 nct6775_write_value(data, data->REG_PWM[index][nr], val);
2288 if (index == 2) { /* floor: disable if val == 0 */
2289 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2293 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2295 mutex_unlock(&data->update_lock);
2299 /* Returns 0 if OK, -EINVAL otherwise */
2300 static int check_trip_points(struct nct6775_data *data, int nr)
2304 for (i = 0; i < data->auto_pwm_num - 1; i++) {
2305 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
2308 for (i = 0; i < data->auto_pwm_num - 1; i++) {
2309 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
2312 /* validate critical temperature and pwm if enabled (pwm > 0) */
2313 if (data->auto_pwm[nr][data->auto_pwm_num]) {
2314 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2315 data->auto_temp[nr][data->auto_pwm_num] ||
2316 data->auto_pwm[nr][data->auto_pwm_num - 1] >
2317 data->auto_pwm[nr][data->auto_pwm_num])
2323 static void pwm_update_registers(struct nct6775_data *data, int nr)
2327 switch (data->pwm_enable[nr]) {
2332 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2333 reg = (reg & ~data->tolerance_mask) |
2334 (data->target_speed_tolerance[nr] & data->tolerance_mask);
2335 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2336 nct6775_write_value(data, data->REG_TARGET[nr],
2337 data->target_speed[nr] & 0xff);
2338 if (data->REG_TOLERANCE_H) {
2339 reg = (data->target_speed[nr] >> 8) & 0x0f;
2340 reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2341 nct6775_write_value(data,
2342 data->REG_TOLERANCE_H[nr],
2346 case thermal_cruise:
2347 nct6775_write_value(data, data->REG_TARGET[nr],
2348 data->target_temp[nr]);
2351 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2352 reg = (reg & ~data->tolerance_mask) |
2353 data->temp_tolerance[0][nr];
2354 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2360 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2362 struct nct6775_data *data = nct6775_update_device(dev);
2363 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2365 return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2369 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2370 const char *buf, size_t count)
2372 struct nct6775_data *data = dev_get_drvdata(dev);
2373 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2374 int nr = sattr->index;
2379 err = kstrtoul(buf, 10, &val);
2386 if (val == sf3 && data->kind != nct6775)
2389 if (val == sf4 && check_trip_points(data, nr)) {
2390 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2391 dev_err(dev, "Adjust trip points and try again\n");
2395 mutex_lock(&data->update_lock);
2396 data->pwm_enable[nr] = val;
2399 * turn off pwm control: select manual mode, set pwm to maximum
2401 data->pwm[0][nr] = 255;
2402 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2404 pwm_update_registers(data, nr);
2405 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2407 reg |= pwm_enable_to_reg(val) << 4;
2408 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2409 mutex_unlock(&data->update_lock);
2414 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2418 for (i = 0; i < NUM_TEMP; i++) {
2419 if (!(data->have_temp & (1 << i)))
2421 if (src == data->temp_src[i]) {
2427 return sprintf(buf, "%d\n", sel);
2431 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2433 struct nct6775_data *data = nct6775_update_device(dev);
2434 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2435 int index = sattr->index;
2437 return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2441 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2442 const char *buf, size_t count)
2444 struct nct6775_data *data = nct6775_update_device(dev);
2445 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2446 int nr = sattr->index;
2450 err = kstrtoul(buf, 10, &val);
2453 if (val == 0 || val > NUM_TEMP)
2455 if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
2458 mutex_lock(&data->update_lock);
2459 src = data->temp_src[val - 1];
2460 data->pwm_temp_sel[nr] = src;
2461 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2464 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2465 mutex_unlock(&data->update_lock);
2471 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2474 struct nct6775_data *data = nct6775_update_device(dev);
2475 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2476 int index = sattr->index;
2478 return show_pwm_temp_sel_common(data, buf,
2479 data->pwm_weight_temp_sel[index]);
2483 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2484 const char *buf, size_t count)
2486 struct nct6775_data *data = nct6775_update_device(dev);
2487 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2488 int nr = sattr->index;
2492 err = kstrtoul(buf, 10, &val);
2497 if (val && (!(data->have_temp & (1 << (val - 1))) ||
2498 !data->temp_src[val - 1]))
2501 mutex_lock(&data->update_lock);
2503 src = data->temp_src[val - 1];
2504 data->pwm_weight_temp_sel[nr] = src;
2505 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2507 reg |= (src | 0x80);
2508 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2510 data->pwm_weight_temp_sel[nr] = 0;
2511 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2513 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2515 mutex_unlock(&data->update_lock);
2521 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2523 struct nct6775_data *data = nct6775_update_device(dev);
2524 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2526 return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2530 store_target_temp(struct device *dev, struct device_attribute *attr,
2531 const char *buf, size_t count)
2533 struct nct6775_data *data = dev_get_drvdata(dev);
2534 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2535 int nr = sattr->index;
2539 err = kstrtoul(buf, 10, &val);
2543 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2544 data->target_temp_mask);
2546 mutex_lock(&data->update_lock);
2547 data->target_temp[nr] = val;
2548 pwm_update_registers(data, nr);
2549 mutex_unlock(&data->update_lock);
2554 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2556 struct nct6775_data *data = nct6775_update_device(dev);
2557 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2558 int nr = sattr->index;
2560 return sprintf(buf, "%d\n",
2561 fan_from_reg16(data->target_speed[nr],
2562 data->fan_div[nr]));
2566 store_target_speed(struct device *dev, struct device_attribute *attr,
2567 const char *buf, size_t count)
2569 struct nct6775_data *data = dev_get_drvdata(dev);
2570 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2571 int nr = sattr->index;
2576 err = kstrtoul(buf, 10, &val);
2580 val = clamp_val(val, 0, 1350000U);
2581 speed = fan_to_reg(val, data->fan_div[nr]);
2583 mutex_lock(&data->update_lock);
2584 data->target_speed[nr] = speed;
2585 pwm_update_registers(data, nr);
2586 mutex_unlock(&data->update_lock);
2591 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2594 struct nct6775_data *data = nct6775_update_device(dev);
2595 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2597 int index = sattr->index;
2599 return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2603 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2604 const char *buf, size_t count)
2606 struct nct6775_data *data = dev_get_drvdata(dev);
2607 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2609 int index = sattr->index;
2613 err = kstrtoul(buf, 10, &val);
2617 /* Limit tolerance as needed */
2618 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2620 mutex_lock(&data->update_lock);
2621 data->temp_tolerance[index][nr] = val;
2623 pwm_update_registers(data, nr);
2625 nct6775_write_value(data,
2626 data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2628 mutex_unlock(&data->update_lock);
2633 * Fan speed tolerance is a tricky beast, since the associated register is
2634 * a tick counter, but the value is reported and configured as rpm.
2635 * Compute resulting low and high rpm values and report the difference.
2638 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2641 struct nct6775_data *data = nct6775_update_device(dev);
2642 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2643 int nr = sattr->index;
2644 int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2645 int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2655 tolerance = (fan_from_reg16(low, data->fan_div[nr])
2656 - fan_from_reg16(high, data->fan_div[nr])) / 2;
2658 return sprintf(buf, "%d\n", tolerance);
2662 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2663 const char *buf, size_t count)
2665 struct nct6775_data *data = dev_get_drvdata(dev);
2666 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2667 int nr = sattr->index;
2672 err = kstrtoul(buf, 10, &val);
2676 high = fan_from_reg16(data->target_speed[nr],
2677 data->fan_div[nr]) + val;
2678 low = fan_from_reg16(data->target_speed[nr],
2679 data->fan_div[nr]) - val;
2685 val = (fan_to_reg(low, data->fan_div[nr]) -
2686 fan_to_reg(high, data->fan_div[nr])) / 2;
2688 /* Limit tolerance as needed */
2689 val = clamp_val(val, 0, data->speed_tolerance_limit);
2691 mutex_lock(&data->update_lock);
2692 data->target_speed_tolerance[nr] = val;
2693 pwm_update_registers(data, nr);
2694 mutex_unlock(&data->update_lock);
2698 SENSOR_TEMPLATE_2(pwm, "pwm%d", S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2699 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", S_IWUSR | S_IRUGO, show_pwm_mode,
2701 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", S_IWUSR | S_IRUGO, show_pwm_enable,
2702 store_pwm_enable, 0);
2703 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", S_IWUSR | S_IRUGO,
2704 show_pwm_temp_sel, store_pwm_temp_sel, 0);
2705 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", S_IWUSR | S_IRUGO,
2706 show_target_temp, store_target_temp, 0);
2707 SENSOR_TEMPLATE(fan_target, "fan%d_target", S_IWUSR | S_IRUGO,
2708 show_target_speed, store_target_speed, 0);
2709 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", S_IWUSR | S_IRUGO,
2710 show_speed_tolerance, store_speed_tolerance, 0);
2712 /* Smart Fan registers */
2715 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2717 struct nct6775_data *data = nct6775_update_device(dev);
2718 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2720 int index = sattr->index;
2722 return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2726 store_weight_temp(struct device *dev, struct device_attribute *attr,
2727 const char *buf, size_t count)
2729 struct nct6775_data *data = dev_get_drvdata(dev);
2730 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2732 int index = sattr->index;
2736 err = kstrtoul(buf, 10, &val);
2740 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2742 mutex_lock(&data->update_lock);
2743 data->weight_temp[index][nr] = val;
2744 nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2745 mutex_unlock(&data->update_lock);
2749 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", S_IWUSR | S_IRUGO,
2750 show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
2751 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step",
2752 S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 0);
2753 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol",
2754 S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 1);
2755 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base",
2756 S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 2);
2757 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step",
2758 S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 5);
2759 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base",
2760 S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 6);
2763 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2765 struct nct6775_data *data = nct6775_update_device(dev);
2766 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2768 int index = sattr->index;
2770 return sprintf(buf, "%d\n",
2771 step_time_from_reg(data->fan_time[index][nr],
2772 data->pwm_mode[nr]));
2776 store_fan_time(struct device *dev, struct device_attribute *attr,
2777 const char *buf, size_t count)
2779 struct nct6775_data *data = dev_get_drvdata(dev);
2780 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2782 int index = sattr->index;
2786 err = kstrtoul(buf, 10, &val);
2790 val = step_time_to_reg(val, data->pwm_mode[nr]);
2791 mutex_lock(&data->update_lock);
2792 data->fan_time[index][nr] = val;
2793 nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2794 mutex_unlock(&data->update_lock);
2798 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
2800 show_name(struct device *dev, struct device_attribute *attr, char *buf)
2802 struct nct6775_data *data = dev_get_drvdata(dev);
2804 return sprintf(buf, "%s\n", data->name);
2807 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
2811 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2813 struct nct6775_data *data = nct6775_update_device(dev);
2814 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2816 return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2820 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2821 const char *buf, size_t count)
2823 struct nct6775_data *data = dev_get_drvdata(dev);
2824 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2826 int point = sattr->index;
2831 err = kstrtoul(buf, 10, &val);
2837 if (point == data->auto_pwm_num) {
2838 if (data->kind != nct6775 && !val)
2840 if (data->kind != nct6779 && val)
2844 mutex_lock(&data->update_lock);
2845 data->auto_pwm[nr][point] = val;
2846 if (point < data->auto_pwm_num) {
2847 nct6775_write_value(data,
2848 NCT6775_AUTO_PWM(data, nr, point),
2849 data->auto_pwm[nr][point]);
2851 switch (data->kind) {
2853 /* disable if needed (pwm == 0) */
2854 reg = nct6775_read_value(data,
2855 NCT6775_REG_CRITICAL_ENAB[nr]);
2860 nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
2864 break; /* always enabled, nothing to do */
2870 nct6775_write_value(data, data->REG_CRITICAL_PWM[nr],
2872 reg = nct6775_read_value(data,
2873 data->REG_CRITICAL_PWM_ENABLE[nr]);
2875 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
2877 reg |= data->CRITICAL_PWM_ENABLE_MASK;
2878 nct6775_write_value(data,
2879 data->REG_CRITICAL_PWM_ENABLE[nr],
2884 mutex_unlock(&data->update_lock);
2889 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
2891 struct nct6775_data *data = nct6775_update_device(dev);
2892 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2894 int point = sattr->index;
2897 * We don't know for sure if the temperature is signed or unsigned.
2898 * Assume it is unsigned.
2900 return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
2904 store_auto_temp(struct device *dev, struct device_attribute *attr,
2905 const char *buf, size_t count)
2907 struct nct6775_data *data = dev_get_drvdata(dev);
2908 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2910 int point = sattr->index;
2914 err = kstrtoul(buf, 10, &val);
2920 mutex_lock(&data->update_lock);
2921 data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
2922 if (point < data->auto_pwm_num) {
2923 nct6775_write_value(data,
2924 NCT6775_AUTO_TEMP(data, nr, point),
2925 data->auto_temp[nr][point]);
2927 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
2928 data->auto_temp[nr][point]);
2930 mutex_unlock(&data->update_lock);
2934 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
2935 struct attribute *attr, int index)
2937 struct device *dev = container_of(kobj, struct device, kobj);
2938 struct nct6775_data *data = dev_get_drvdata(dev);
2939 int pwm = index / 36; /* pwm index */
2940 int nr = index % 36; /* attribute index */
2942 if (!(data->has_pwm & (1 << pwm)))
2945 if ((nr >= 14 && nr <= 18) || nr == 21) /* weight */
2946 if (!data->REG_WEIGHT_TEMP_SEL[pwm])
2948 if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
2950 if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
2952 if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
2955 if (nr >= 22 && nr <= 35) { /* auto point */
2956 int api = (nr - 22) / 2; /* auto point index */
2958 if (api > data->auto_pwm_num)
2964 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", S_IWUSR | S_IRUGO,
2965 show_fan_time, store_fan_time, 0, 0);
2966 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", S_IWUSR | S_IRUGO,
2967 show_fan_time, store_fan_time, 0, 1);
2968 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", S_IWUSR | S_IRUGO,
2969 show_fan_time, store_fan_time, 0, 2);
2970 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", S_IWUSR | S_IRUGO, show_pwm,
2972 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", S_IWUSR | S_IRUGO, show_pwm,
2974 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", S_IWUSR | S_IRUGO,
2975 show_temp_tolerance, store_temp_tolerance, 0, 0);
2976 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance",
2977 S_IWUSR | S_IRUGO, show_temp_tolerance, store_temp_tolerance,
2980 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2983 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", S_IWUSR | S_IRUGO, show_pwm,
2986 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm",
2987 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 0);
2988 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp",
2989 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 0);
2991 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm",
2992 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 1);
2993 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp",
2994 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 1);
2996 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm",
2997 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 2);
2998 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp",
2999 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 2);
3001 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm",
3002 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 3);
3003 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp",
3004 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 3);
3006 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm",
3007 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 4);
3008 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp",
3009 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 4);
3011 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm",
3012 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 5);
3013 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp",
3014 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 5);
3016 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm",
3017 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 6);
3018 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp",
3019 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 6);
3022 * nct6775_pwm_is_visible uses the index into the following array
3023 * to determine if attributes should be created or not.
3024 * Any change in order or content must be matched.
3026 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
3027 &sensor_dev_template_pwm,
3028 &sensor_dev_template_pwm_mode,
3029 &sensor_dev_template_pwm_enable,
3030 &sensor_dev_template_pwm_temp_sel,
3031 &sensor_dev_template_pwm_temp_tolerance,
3032 &sensor_dev_template_pwm_crit_temp_tolerance,
3033 &sensor_dev_template_pwm_target_temp,
3034 &sensor_dev_template_fan_target,
3035 &sensor_dev_template_fan_tolerance,
3036 &sensor_dev_template_pwm_stop_time,
3037 &sensor_dev_template_pwm_step_up_time,
3038 &sensor_dev_template_pwm_step_down_time,
3039 &sensor_dev_template_pwm_start,
3040 &sensor_dev_template_pwm_floor,
3041 &sensor_dev_template_pwm_weight_temp_sel, /* 14 */
3042 &sensor_dev_template_pwm_weight_temp_step,
3043 &sensor_dev_template_pwm_weight_temp_step_tol,
3044 &sensor_dev_template_pwm_weight_temp_step_base,
3045 &sensor_dev_template_pwm_weight_duty_step, /* 18 */
3046 &sensor_dev_template_pwm_max, /* 19 */
3047 &sensor_dev_template_pwm_step, /* 20 */
3048 &sensor_dev_template_pwm_weight_duty_base, /* 21 */
3049 &sensor_dev_template_pwm_auto_point1_pwm, /* 22 */
3050 &sensor_dev_template_pwm_auto_point1_temp,
3051 &sensor_dev_template_pwm_auto_point2_pwm,
3052 &sensor_dev_template_pwm_auto_point2_temp,
3053 &sensor_dev_template_pwm_auto_point3_pwm,
3054 &sensor_dev_template_pwm_auto_point3_temp,
3055 &sensor_dev_template_pwm_auto_point4_pwm,
3056 &sensor_dev_template_pwm_auto_point4_temp,
3057 &sensor_dev_template_pwm_auto_point5_pwm,
3058 &sensor_dev_template_pwm_auto_point5_temp,
3059 &sensor_dev_template_pwm_auto_point6_pwm,
3060 &sensor_dev_template_pwm_auto_point6_temp,
3061 &sensor_dev_template_pwm_auto_point7_pwm,
3062 &sensor_dev_template_pwm_auto_point7_temp, /* 35 */
3067 static struct sensor_template_group nct6775_pwm_template_group = {
3068 .templates = nct6775_attributes_pwm_template,
3069 .is_visible = nct6775_pwm_is_visible,
3074 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
3076 struct nct6775_data *data = dev_get_drvdata(dev);
3078 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
3081 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
3083 /* Case open detection */
3086 clear_caseopen(struct device *dev, struct device_attribute *attr,
3087 const char *buf, size_t count)
3089 struct nct6775_data *data = dev_get_drvdata(dev);
3090 int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
3095 if (kstrtoul(buf, 10, &val) || val != 0)
3098 mutex_lock(&data->update_lock);
3101 * Use CR registers to clear caseopen status.
3102 * The CR registers are the same for all chips, and not all chips
3103 * support clearing the caseopen status through "regular" registers.
3105 ret = superio_enter(data->sioreg);
3111 superio_select(data->sioreg, NCT6775_LD_ACPI);
3112 reg = superio_inb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
3113 reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3114 superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3115 reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3116 superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3117 superio_exit(data->sioreg);
3119 data->valid = false; /* Force cache refresh */
3121 mutex_unlock(&data->update_lock);
3125 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
3126 clear_caseopen, INTRUSION_ALARM_BASE);
3127 static SENSOR_DEVICE_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
3128 clear_caseopen, INTRUSION_ALARM_BASE + 1);
3129 static SENSOR_DEVICE_ATTR(intrusion0_beep, S_IWUSR | S_IRUGO, show_beep,
3130 store_beep, INTRUSION_ALARM_BASE);
3131 static SENSOR_DEVICE_ATTR(intrusion1_beep, S_IWUSR | S_IRUGO, show_beep,
3132 store_beep, INTRUSION_ALARM_BASE + 1);
3133 static SENSOR_DEVICE_ATTR(beep_enable, S_IWUSR | S_IRUGO, show_beep,
3134 store_beep, BEEP_ENABLE_BASE);
3136 static umode_t nct6775_other_is_visible(struct kobject *kobj,
3137 struct attribute *attr, int index)
3139 struct device *dev = container_of(kobj, struct device, kobj);
3140 struct nct6775_data *data = dev_get_drvdata(dev);
3142 if (index == 0 && !data->have_vid)
3145 if (index == 1 || index == 2) {
3146 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + index - 1] < 0)
3150 if (index == 3 || index == 4) {
3151 if (data->BEEP_BITS[INTRUSION_ALARM_BASE + index - 3] < 0)
3159 * nct6775_other_is_visible uses the index into the following array
3160 * to determine if attributes should be created or not.
3161 * Any change in order or content must be matched.
3163 static struct attribute *nct6775_attributes_other[] = {
3164 &dev_attr_cpu0_vid.attr, /* 0 */
3165 &sensor_dev_attr_intrusion0_alarm.dev_attr.attr, /* 1 */
3166 &sensor_dev_attr_intrusion1_alarm.dev_attr.attr, /* 2 */
3167 &sensor_dev_attr_intrusion0_beep.dev_attr.attr, /* 3 */
3168 &sensor_dev_attr_intrusion1_beep.dev_attr.attr, /* 4 */
3169 &sensor_dev_attr_beep_enable.dev_attr.attr, /* 5 */
3170 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
3171 &dev_attr_name.attr,
3176 static const struct attribute_group nct6775_group_other = {
3177 .attrs = nct6775_attributes_other,
3178 .is_visible = nct6775_other_is_visible,
3181 static inline void nct6775_init_device(struct nct6775_data *data)
3186 /* Start monitoring if needed */
3187 if (data->REG_CONFIG) {
3188 tmp = nct6775_read_value(data, data->REG_CONFIG);
3190 nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
3193 /* Enable temperature sensors if needed */
3194 for (i = 0; i < NUM_TEMP; i++) {
3195 if (!(data->have_temp & (1 << i)))
3197 if (!data->reg_temp_config[i])
3199 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
3201 nct6775_write_value(data, data->reg_temp_config[i],
3205 /* Enable VBAT monitoring if needed */
3206 tmp = nct6775_read_value(data, data->REG_VBAT);
3208 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
3210 diode = nct6775_read_value(data, data->REG_DIODE);
3212 for (i = 0; i < data->temp_fixed_num; i++) {
3213 if (!(data->have_temp_fixed & (1 << i)))
3215 if ((tmp & (data->DIODE_MASK << i))) /* diode */
3217 = 3 - ((diode >> i) & data->DIODE_MASK);
3218 else /* thermistor */
3219 data->temp_type[i] = 4;
3224 nct6775_check_fan_inputs(struct nct6775_data *data)
3226 bool fan3pin, fan4pin, fan4min, fan5pin, fan6pin;
3227 bool pwm3pin, pwm4pin, pwm5pin, pwm6pin;
3228 int sioreg = data->sioreg;
3231 /* Store SIO_REG_ENABLE for use during resume */
3232 superio_select(sioreg, NCT6775_LD_HWM);
3233 data->sio_reg_enable = superio_inb(sioreg, SIO_REG_ENABLE);
3235 /* fan4 and fan5 share some pins with the GPIO and serial flash */
3236 if (data->kind == nct6775) {
3237 regval = superio_inb(sioreg, 0x2c);
3239 fan3pin = regval & (1 << 6);
3240 pwm3pin = regval & (1 << 7);
3242 /* On NCT6775, fan4 shares pins with the fdc interface */
3243 fan4pin = !(superio_inb(sioreg, 0x2A) & 0x80);
3250 } else if (data->kind == nct6776) {
3251 bool gpok = superio_inb(sioreg, 0x27) & 0x80;
3252 const char *board_vendor, *board_name;
3254 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
3255 board_name = dmi_get_system_info(DMI_BOARD_NAME);
3257 if (board_name && board_vendor &&
3258 !strcmp(board_vendor, "ASRock")) {
3260 * Auxiliary fan monitoring is not enabled on ASRock
3261 * Z77 Pro4-M if booted in UEFI Ultra-FastBoot mode.
3262 * Observed with BIOS version 2.00.
3264 if (!strcmp(board_name, "Z77 Pro4-M")) {
3265 if ((data->sio_reg_enable & 0xe0) != 0xe0) {
3266 data->sio_reg_enable |= 0xe0;
3267 superio_outb(sioreg, SIO_REG_ENABLE,
3268 data->sio_reg_enable);
3273 if (data->sio_reg_enable & 0x80)
3276 fan3pin = !(superio_inb(sioreg, 0x24) & 0x40);
3278 if (data->sio_reg_enable & 0x40)
3281 fan4pin = superio_inb(sioreg, 0x1C) & 0x01;
3283 if (data->sio_reg_enable & 0x20)
3286 fan5pin = superio_inb(sioreg, 0x1C) & 0x02;
3294 } else if (data->kind == nct6106) {
3295 regval = superio_inb(sioreg, 0x24);
3296 fan3pin = !(regval & 0x80);
3297 pwm3pin = regval & 0x08;
3306 } else { /* NCT6779D, NCT6791D, NCT6792D, or NCT6793D */
3307 regval = superio_inb(sioreg, 0x1c);
3309 fan3pin = !(regval & (1 << 5));
3310 fan4pin = !(regval & (1 << 6));
3311 fan5pin = !(regval & (1 << 7));
3313 pwm3pin = !(regval & (1 << 0));
3314 pwm4pin = !(regval & (1 << 1));
3315 pwm5pin = !(regval & (1 << 2));
3319 if (data->kind == nct6791 || data->kind == nct6792 ||
3320 data->kind == nct6793) {
3321 regval = superio_inb(sioreg, 0x2d);
3322 fan6pin = (regval & (1 << 1));
3323 pwm6pin = (regval & (1 << 0));
3324 } else { /* NCT6779D */
3330 /* fan 1 and 2 (0x03) are always present */
3331 data->has_fan = 0x03 | (fan3pin << 2) | (fan4pin << 3) |
3332 (fan5pin << 4) | (fan6pin << 5);
3333 data->has_fan_min = 0x03 | (fan3pin << 2) | (fan4min << 3) |
3335 data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) |
3336 (pwm5pin << 4) | (pwm6pin << 5);
3339 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
3340 int *available, int *mask)
3345 for (i = 0; i < data->pwm_num && *available; i++) {
3350 src = nct6775_read_value(data, regp[i]);
3352 if (!src || (*mask & (1 << src)))
3354 if (src >= data->temp_label_num ||
3355 !strlen(data->temp_label[src]))
3358 index = __ffs(*available);
3359 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3360 *available &= ~(1 << index);
3365 static int nct6775_probe(struct platform_device *pdev)
3367 struct device *dev = &pdev->dev;
3368 struct nct6775_sio_data *sio_data = dev_get_platdata(dev);
3369 struct nct6775_data *data;
3370 struct resource *res;
3372 int src, mask, available;
3373 const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3374 const u16 *reg_temp_mon, *reg_temp_alternate, *reg_temp_crit;
3375 const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL;
3376 int num_reg_temp, num_reg_temp_mon;
3378 struct attribute_group *group;
3379 struct device *hwmon_dev;
3380 int num_attr_groups = 0;
3382 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3383 if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3387 data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3392 data->kind = sio_data->kind;
3393 data->sioreg = sio_data->sioreg;
3394 data->addr = res->start;
3395 mutex_init(&data->update_lock);
3396 data->name = nct6775_device_names[data->kind];
3397 data->bank = 0xff; /* Force initial bank selection */
3398 platform_set_drvdata(pdev, data);
3400 switch (data->kind) {
3404 data->auto_pwm_num = 4;
3405 data->temp_fixed_num = 3;
3406 data->num_temp_alarms = 6;
3407 data->num_temp_beeps = 6;
3409 data->fan_from_reg = fan_from_reg13;
3410 data->fan_from_reg_min = fan_from_reg13;
3412 data->temp_label = nct6776_temp_label;
3413 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3415 data->REG_VBAT = NCT6106_REG_VBAT;
3416 data->REG_DIODE = NCT6106_REG_DIODE;
3417 data->DIODE_MASK = NCT6106_DIODE_MASK;
3418 data->REG_VIN = NCT6106_REG_IN;
3419 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3420 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3421 data->REG_TARGET = NCT6106_REG_TARGET;
3422 data->REG_FAN = NCT6106_REG_FAN;
3423 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
3424 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
3425 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
3426 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
3427 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
3428 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
3429 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
3430 data->REG_PWM[0] = NCT6106_REG_PWM;
3431 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
3432 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
3433 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3434 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3435 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3436 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3437 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3438 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
3439 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
3440 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
3441 data->REG_CRITICAL_TEMP_TOLERANCE
3442 = NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
3443 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
3444 data->CRITICAL_PWM_ENABLE_MASK
3445 = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3446 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
3447 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3448 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3449 data->REG_TEMP_SEL = NCT6106_REG_TEMP_SEL;
3450 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3451 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3452 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3453 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3454 data->REG_ALARM = NCT6106_REG_ALARM;
3455 data->ALARM_BITS = NCT6106_ALARM_BITS;
3456 data->REG_BEEP = NCT6106_REG_BEEP;
3457 data->BEEP_BITS = NCT6106_BEEP_BITS;
3459 reg_temp = NCT6106_REG_TEMP;
3460 reg_temp_mon = NCT6106_REG_TEMP_MON;
3461 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3462 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON);
3463 reg_temp_over = NCT6106_REG_TEMP_OVER;
3464 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3465 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3466 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3467 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3468 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3469 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3475 data->auto_pwm_num = 6;
3476 data->has_fan_div = true;
3477 data->temp_fixed_num = 3;
3478 data->num_temp_alarms = 3;
3479 data->num_temp_beeps = 3;
3481 data->ALARM_BITS = NCT6775_ALARM_BITS;
3482 data->BEEP_BITS = NCT6775_BEEP_BITS;
3484 data->fan_from_reg = fan_from_reg16;
3485 data->fan_from_reg_min = fan_from_reg8;
3486 data->target_temp_mask = 0x7f;
3487 data->tolerance_mask = 0x0f;
3488 data->speed_tolerance_limit = 15;
3490 data->temp_label = nct6775_temp_label;
3491 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
3493 data->REG_CONFIG = NCT6775_REG_CONFIG;
3494 data->REG_VBAT = NCT6775_REG_VBAT;
3495 data->REG_DIODE = NCT6775_REG_DIODE;
3496 data->DIODE_MASK = NCT6775_DIODE_MASK;
3497 data->REG_VIN = NCT6775_REG_IN;
3498 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3499 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3500 data->REG_TARGET = NCT6775_REG_TARGET;
3501 data->REG_FAN = NCT6775_REG_FAN;
3502 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3503 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3504 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3505 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3506 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3507 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3508 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3509 data->REG_PWM[0] = NCT6775_REG_PWM;
3510 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3511 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3512 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3513 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3514 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3515 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3516 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3517 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3518 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3519 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3520 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3521 data->REG_CRITICAL_TEMP_TOLERANCE
3522 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3523 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3524 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3525 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3526 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3527 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3528 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3529 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3530 data->REG_ALARM = NCT6775_REG_ALARM;
3531 data->REG_BEEP = NCT6775_REG_BEEP;
3533 reg_temp = NCT6775_REG_TEMP;
3534 reg_temp_mon = NCT6775_REG_TEMP_MON;
3535 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3536 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3537 reg_temp_over = NCT6775_REG_TEMP_OVER;
3538 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3539 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3540 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3541 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3547 data->auto_pwm_num = 4;
3548 data->has_fan_div = false;
3549 data->temp_fixed_num = 3;
3550 data->num_temp_alarms = 3;
3551 data->num_temp_beeps = 6;
3553 data->ALARM_BITS = NCT6776_ALARM_BITS;
3554 data->BEEP_BITS = NCT6776_BEEP_BITS;
3556 data->fan_from_reg = fan_from_reg13;
3557 data->fan_from_reg_min = fan_from_reg13;
3558 data->target_temp_mask = 0xff;
3559 data->tolerance_mask = 0x07;
3560 data->speed_tolerance_limit = 63;
3562 data->temp_label = nct6776_temp_label;
3563 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3565 data->REG_CONFIG = NCT6775_REG_CONFIG;
3566 data->REG_VBAT = NCT6775_REG_VBAT;
3567 data->REG_DIODE = NCT6775_REG_DIODE;
3568 data->DIODE_MASK = NCT6775_DIODE_MASK;
3569 data->REG_VIN = NCT6775_REG_IN;
3570 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3571 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3572 data->REG_TARGET = NCT6775_REG_TARGET;
3573 data->REG_FAN = NCT6775_REG_FAN;
3574 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3575 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3576 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3577 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3578 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3579 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3580 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3581 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3582 data->REG_PWM[0] = NCT6775_REG_PWM;
3583 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3584 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3585 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3586 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3587 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3588 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3589 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3590 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3591 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3592 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3593 data->REG_CRITICAL_TEMP_TOLERANCE
3594 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3595 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3596 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3597 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3598 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3599 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3600 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3601 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3602 data->REG_ALARM = NCT6775_REG_ALARM;
3603 data->REG_BEEP = NCT6776_REG_BEEP;
3605 reg_temp = NCT6775_REG_TEMP;
3606 reg_temp_mon = NCT6775_REG_TEMP_MON;
3607 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3608 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3609 reg_temp_over = NCT6775_REG_TEMP_OVER;
3610 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3611 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3612 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3613 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3619 data->auto_pwm_num = 4;
3620 data->has_fan_div = false;
3621 data->temp_fixed_num = 6;
3622 data->num_temp_alarms = 2;
3623 data->num_temp_beeps = 2;
3625 data->ALARM_BITS = NCT6779_ALARM_BITS;
3626 data->BEEP_BITS = NCT6779_BEEP_BITS;
3628 data->fan_from_reg = fan_from_reg13;
3629 data->fan_from_reg_min = fan_from_reg13;
3630 data->target_temp_mask = 0xff;
3631 data->tolerance_mask = 0x07;
3632 data->speed_tolerance_limit = 63;
3634 data->temp_label = nct6779_temp_label;
3635 data->temp_label_num = NCT6779_NUM_LABELS;
3637 data->REG_CONFIG = NCT6775_REG_CONFIG;
3638 data->REG_VBAT = NCT6775_REG_VBAT;
3639 data->REG_DIODE = NCT6775_REG_DIODE;
3640 data->DIODE_MASK = NCT6775_DIODE_MASK;
3641 data->REG_VIN = NCT6779_REG_IN;
3642 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3643 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3644 data->REG_TARGET = NCT6775_REG_TARGET;
3645 data->REG_FAN = NCT6779_REG_FAN;
3646 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3647 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3648 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3649 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3650 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3651 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3652 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3653 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3654 data->REG_PWM[0] = NCT6775_REG_PWM;
3655 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3656 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3657 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3658 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3659 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3660 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3661 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3662 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3663 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3664 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3665 data->REG_CRITICAL_TEMP_TOLERANCE
3666 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3667 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3668 data->CRITICAL_PWM_ENABLE_MASK
3669 = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3670 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3671 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3672 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3673 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3674 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3675 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3676 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3677 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3678 data->REG_ALARM = NCT6779_REG_ALARM;
3679 data->REG_BEEP = NCT6776_REG_BEEP;
3681 reg_temp = NCT6779_REG_TEMP;
3682 reg_temp_mon = NCT6779_REG_TEMP_MON;
3683 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3684 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3685 reg_temp_over = NCT6779_REG_TEMP_OVER;
3686 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3687 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3688 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3689 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3697 data->auto_pwm_num = 4;
3698 data->has_fan_div = false;
3699 data->temp_fixed_num = 6;
3700 data->num_temp_alarms = 2;
3701 data->num_temp_beeps = 2;
3703 data->ALARM_BITS = NCT6791_ALARM_BITS;
3704 data->BEEP_BITS = NCT6779_BEEP_BITS;
3706 data->fan_from_reg = fan_from_reg13;
3707 data->fan_from_reg_min = fan_from_reg13;
3708 data->target_temp_mask = 0xff;
3709 data->tolerance_mask = 0x07;
3710 data->speed_tolerance_limit = 63;
3712 data->temp_label = nct6779_temp_label;
3713 data->temp_label_num = NCT6791_NUM_LABELS;
3715 data->REG_CONFIG = NCT6775_REG_CONFIG;
3716 data->REG_VBAT = NCT6775_REG_VBAT;
3717 data->REG_DIODE = NCT6775_REG_DIODE;
3718 data->DIODE_MASK = NCT6775_DIODE_MASK;
3719 data->REG_VIN = NCT6779_REG_IN;
3720 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3721 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3722 data->REG_TARGET = NCT6775_REG_TARGET;
3723 data->REG_FAN = NCT6779_REG_FAN;
3724 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3725 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3726 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3727 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3728 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3729 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3730 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3731 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3732 data->REG_PWM[0] = NCT6775_REG_PWM;
3733 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3734 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3735 data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP;
3736 data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE;
3737 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3738 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3739 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3740 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3741 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3742 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3743 data->REG_CRITICAL_TEMP_TOLERANCE
3744 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3745 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3746 data->CRITICAL_PWM_ENABLE_MASK
3747 = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3748 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3749 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3750 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3751 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3752 data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL;
3753 data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP;
3754 data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL;
3755 data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE;
3756 data->REG_ALARM = NCT6791_REG_ALARM;
3757 if (data->kind == nct6791)
3758 data->REG_BEEP = NCT6776_REG_BEEP;
3760 data->REG_BEEP = NCT6792_REG_BEEP;
3762 reg_temp = NCT6779_REG_TEMP;
3763 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3764 if (data->kind == nct6791) {
3765 reg_temp_mon = NCT6779_REG_TEMP_MON;
3766 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3768 reg_temp_mon = NCT6792_REG_TEMP_MON;
3769 num_reg_temp_mon = ARRAY_SIZE(NCT6792_REG_TEMP_MON);
3771 reg_temp_over = NCT6779_REG_TEMP_OVER;
3772 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3773 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3774 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3775 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3781 data->have_in = (1 << data->in_num) - 1;
3782 data->have_temp = 0;
3785 * On some boards, not all available temperature sources are monitored,
3786 * even though some of the monitoring registers are unused.
3787 * Get list of unused monitoring registers, then detect if any fan
3788 * controls are configured to use unmonitored temperature sources.
3789 * If so, assign the unmonitored temperature sources to available
3790 * monitoring registers.
3794 for (i = 0; i < num_reg_temp; i++) {
3795 if (reg_temp[i] == 0)
3798 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3799 if (!src || (mask & (1 << src)))
3800 available |= 1 << i;
3806 * Now find unmonitored temperature registers and enable monitoring
3807 * if additional monitoring registers are available.
3809 add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
3810 add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
3813 s = NUM_TEMP_FIXED; /* First dynamic temperature attribute */
3814 for (i = 0; i < num_reg_temp; i++) {
3815 if (reg_temp[i] == 0)
3818 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3819 if (!src || (mask & (1 << src)))
3822 if (src >= data->temp_label_num ||
3823 !strlen(data->temp_label[src])) {
3825 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3826 src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
3832 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3833 if (src <= data->temp_fixed_num) {
3834 data->have_temp |= 1 << (src - 1);
3835 data->have_temp_fixed |= 1 << (src - 1);
3836 data->reg_temp[0][src - 1] = reg_temp[i];
3837 data->reg_temp[1][src - 1] = reg_temp_over[i];
3838 data->reg_temp[2][src - 1] = reg_temp_hyst[i];
3839 if (reg_temp_crit_h && reg_temp_crit_h[i])
3840 data->reg_temp[3][src - 1] = reg_temp_crit_h[i];
3841 else if (reg_temp_crit[src - 1])
3842 data->reg_temp[3][src - 1]
3843 = reg_temp_crit[src - 1];
3844 if (reg_temp_crit_l && reg_temp_crit_l[i])
3845 data->reg_temp[4][src - 1] = reg_temp_crit_l[i];
3846 data->reg_temp_config[src - 1] = reg_temp_config[i];
3847 data->temp_src[src - 1] = src;
3854 /* Use dynamic index for other sources */
3855 data->have_temp |= 1 << s;
3856 data->reg_temp[0][s] = reg_temp[i];
3857 data->reg_temp[1][s] = reg_temp_over[i];
3858 data->reg_temp[2][s] = reg_temp_hyst[i];
3859 data->reg_temp_config[s] = reg_temp_config[i];
3860 if (reg_temp_crit_h && reg_temp_crit_h[i])
3861 data->reg_temp[3][s] = reg_temp_crit_h[i];
3862 else if (reg_temp_crit[src - 1])
3863 data->reg_temp[3][s] = reg_temp_crit[src - 1];
3864 if (reg_temp_crit_l && reg_temp_crit_l[i])
3865 data->reg_temp[4][s] = reg_temp_crit_l[i];
3867 data->temp_src[s] = src;
3872 * Repeat with temperatures used for fan control.
3873 * This set of registers does not support limits.
3875 for (i = 0; i < num_reg_temp_mon; i++) {
3876 if (reg_temp_mon[i] == 0)
3879 src = nct6775_read_value(data, data->REG_TEMP_SEL[i]) & 0x1f;
3880 if (!src || (mask & (1 << src)))
3883 if (src >= data->temp_label_num ||
3884 !strlen(data->temp_label[src])) {
3886 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3887 src, i, data->REG_TEMP_SEL[i],
3894 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3895 if (src <= data->temp_fixed_num) {
3896 if (data->have_temp & (1 << (src - 1)))
3898 data->have_temp |= 1 << (src - 1);
3899 data->have_temp_fixed |= 1 << (src - 1);
3900 data->reg_temp[0][src - 1] = reg_temp_mon[i];
3901 data->temp_src[src - 1] = src;
3908 /* Use dynamic index for other sources */
3909 data->have_temp |= 1 << s;
3910 data->reg_temp[0][s] = reg_temp_mon[i];
3911 data->temp_src[s] = src;
3915 #ifdef USE_ALTERNATE
3917 * Go through the list of alternate temp registers and enable
3919 * The temperature is already monitored if the respective bit in <mask>
3922 for (i = 0; i < data->temp_label_num - 1; i++) {
3923 if (!reg_temp_alternate[i])
3925 if (mask & (1 << (i + 1)))
3927 if (i < data->temp_fixed_num) {
3928 if (data->have_temp & (1 << i))
3930 data->have_temp |= 1 << i;
3931 data->have_temp_fixed |= 1 << i;
3932 data->reg_temp[0][i] = reg_temp_alternate[i];
3933 if (i < num_reg_temp) {
3934 data->reg_temp[1][i] = reg_temp_over[i];
3935 data->reg_temp[2][i] = reg_temp_hyst[i];
3937 data->temp_src[i] = i + 1;
3941 if (s >= NUM_TEMP) /* Abort if no more space */
3944 data->have_temp |= 1 << s;
3945 data->reg_temp[0][s] = reg_temp_alternate[i];
3946 data->temp_src[s] = i + 1;
3949 #endif /* USE_ALTERNATE */
3951 /* Initialize the chip */
3952 nct6775_init_device(data);
3954 err = superio_enter(sio_data->sioreg);
3958 cr2a = superio_inb(sio_data->sioreg, 0x2a);
3959 switch (data->kind) {
3961 data->have_vid = (cr2a & 0x40);
3964 data->have_vid = (cr2a & 0x60) == 0x40;
3976 * We can get the VID input values directly at logical device D 0xe3.
3978 if (data->have_vid) {
3979 superio_select(sio_data->sioreg, NCT6775_LD_VID);
3980 data->vid = superio_inb(sio_data->sioreg, 0xe3);
3981 data->vrm = vid_which_vrm();
3987 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3988 tmp = superio_inb(sio_data->sioreg,
3989 NCT6775_REG_CR_FAN_DEBOUNCE);
3990 switch (data->kind) {
4007 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
4009 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
4013 nct6775_check_fan_inputs(data);
4015 superio_exit(sio_data->sioreg);
4017 /* Read fan clock dividers immediately */
4018 nct6775_init_fan_common(dev, data);
4020 /* Register sysfs hooks */
4021 group = nct6775_create_attr_group(dev, &nct6775_pwm_template_group,
4024 return PTR_ERR(group);
4026 data->groups[num_attr_groups++] = group;
4028 group = nct6775_create_attr_group(dev, &nct6775_in_template_group,
4029 fls(data->have_in));
4031 return PTR_ERR(group);
4033 data->groups[num_attr_groups++] = group;
4035 group = nct6775_create_attr_group(dev, &nct6775_fan_template_group,
4036 fls(data->has_fan));
4038 return PTR_ERR(group);
4040 data->groups[num_attr_groups++] = group;
4042 group = nct6775_create_attr_group(dev, &nct6775_temp_template_group,
4043 fls(data->have_temp));
4045 return PTR_ERR(group);
4047 data->groups[num_attr_groups++] = group;
4048 data->groups[num_attr_groups++] = &nct6775_group_other;
4050 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4051 err = sysfs_create_groups(&dev->kobj, data->groups);
4054 hwmon_dev = hwmon_device_register(dev);
4055 if (IS_ERR(hwmon_dev)) {
4056 sysfs_remove_groups(&dev->kobj, data->groups);
4057 return PTR_ERR(hwmon_dev);
4059 data->hwmon_dev = hwmon_dev;
4061 hwmon_dev = devm_hwmon_device_register_with_groups(dev, data->name,
4062 data, data->groups);
4064 return PTR_ERR_OR_ZERO(hwmon_dev);
4067 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4068 static int nct6775_remove(struct platform_device *pdev)
4070 struct nct6775_data *data = platform_get_drvdata(pdev);
4072 hwmon_device_unregister(data->hwmon_dev);
4073 sysfs_remove_groups(&pdev->dev.kobj, data->groups);
4078 static void nct6791_enable_io_mapping(int sioaddr)
4082 val = superio_inb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE);
4084 pr_info("Enabling hardware monitor logical device mappings.\n");
4085 superio_outb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE,
4090 static int __maybe_unused nct6775_suspend(struct device *dev)
4092 struct nct6775_data *data = nct6775_update_device(dev);
4094 mutex_lock(&data->update_lock);
4095 data->vbat = nct6775_read_value(data, data->REG_VBAT);
4096 if (data->kind == nct6775) {
4097 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
4098 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
4100 mutex_unlock(&data->update_lock);
4105 static int __maybe_unused nct6775_resume(struct device *dev)
4107 struct nct6775_data *data = dev_get_drvdata(dev);
4108 int sioreg = data->sioreg;
4112 mutex_lock(&data->update_lock);
4113 data->bank = 0xff; /* Force initial bank selection */
4115 err = superio_enter(sioreg);
4119 superio_select(sioreg, NCT6775_LD_HWM);
4120 reg = superio_inb(sioreg, SIO_REG_ENABLE);
4121 if (reg != data->sio_reg_enable)
4122 superio_outb(sioreg, SIO_REG_ENABLE, data->sio_reg_enable);
4124 if (data->kind == nct6791 || data->kind == nct6792 ||
4125 data->kind == nct6793)
4126 nct6791_enable_io_mapping(sioreg);
4128 superio_exit(sioreg);
4130 /* Restore limits */
4131 for (i = 0; i < data->in_num; i++) {
4132 if (!(data->have_in & (1 << i)))
4135 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
4137 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
4141 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
4142 if (!(data->has_fan_min & (1 << i)))
4145 nct6775_write_value(data, data->REG_FAN_MIN[i],
4149 for (i = 0; i < NUM_TEMP; i++) {
4150 if (!(data->have_temp & (1 << i)))
4153 for (j = 1; j < ARRAY_SIZE(data->reg_temp); j++)
4154 if (data->reg_temp[j][i])
4155 nct6775_write_temp(data, data->reg_temp[j][i],
4159 /* Restore other settings */
4160 nct6775_write_value(data, data->REG_VBAT, data->vbat);
4161 if (data->kind == nct6775) {
4162 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
4163 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
4167 /* Force re-reading all values */
4168 data->valid = false;
4169 mutex_unlock(&data->update_lock);
4174 static SIMPLE_DEV_PM_OPS(nct6775_dev_pm_ops, nct6775_suspend, nct6775_resume);
4176 static struct platform_driver nct6775_driver = {
4178 .owner = THIS_MODULE,
4180 .pm = &nct6775_dev_pm_ops,
4182 .probe = nct6775_probe,
4183 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4184 .remove = nct6775_remove,
4188 /* nct6775_find() looks for a '627 in the Super-I/O config space */
4189 static int __init nct6775_find(int sioaddr, struct nct6775_sio_data *sio_data)
4195 err = superio_enter(sioaddr);
4202 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
4203 | superio_inb(sioaddr, SIO_REG_DEVID + 1);
4204 switch (val & SIO_ID_MASK) {
4205 case SIO_NCT6106_ID:
4206 sio_data->kind = nct6106;
4208 case SIO_NCT6775_ID:
4209 sio_data->kind = nct6775;
4211 case SIO_NCT6776_ID:
4212 sio_data->kind = nct6776;
4214 case SIO_NCT6779_ID:
4215 sio_data->kind = nct6779;
4217 case SIO_NCT6791_ID:
4218 sio_data->kind = nct6791;
4220 case SIO_NCT6792_ID:
4221 sio_data->kind = nct6792;
4223 case SIO_NCT6793_ID:
4224 sio_data->kind = nct6793;
4228 pr_debug("unsupported chip ID: 0x%04x\n", val);
4229 superio_exit(sioaddr);
4233 /* We have a known chip, find the HWM I/O address */
4234 superio_select(sioaddr, NCT6775_LD_HWM);
4235 val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
4236 | superio_inb(sioaddr, SIO_REG_ADDR + 1);
4237 addr = val & IOREGION_ALIGNMENT;
4239 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
4240 superio_exit(sioaddr);
4244 /* Activate logical device if needed */
4245 val = superio_inb(sioaddr, SIO_REG_ENABLE);
4246 if (!(val & 0x01)) {
4247 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
4248 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
4251 if (sio_data->kind == nct6791 || sio_data->kind == nct6792 ||
4252 sio_data->kind == nct6793)
4253 nct6791_enable_io_mapping(sioaddr);
4255 superio_exit(sioaddr);
4256 pr_info("Found %s or compatible chip at %#x:%#x\n",
4257 nct6775_sio_names[sio_data->kind], sioaddr, addr);
4258 sio_data->sioreg = sioaddr;
4264 * when Super-I/O functions move to a separate file, the Super-I/O
4265 * bus will manage the lifetime of the device and this module will only keep
4266 * track of the nct6775 driver. But since we use platform_device_alloc(), we
4267 * must keep track of the device
4269 static struct platform_device *pdev[2];
4271 static int __init sensors_nct6775_init(void)
4276 struct resource res;
4277 struct nct6775_sio_data sio_data;
4278 int sioaddr[2] = { 0x2e, 0x4e };
4280 err = platform_driver_register(&nct6775_driver);
4285 * initialize sio_data->kind and sio_data->sioreg.
4287 * when Super-I/O functions move to a separate file, the Super-I/O
4288 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
4289 * nct6775 hardware monitor, and call probe()
4291 for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4292 address = nct6775_find(sioaddr[i], &sio_data);
4298 pdev[i] = platform_device_alloc(DRVNAME, address);
4301 goto exit_device_unregister;
4304 err = platform_device_add_data(pdev[i], &sio_data,
4305 sizeof(struct nct6775_sio_data));
4307 goto exit_device_put;
4309 memset(&res, 0, sizeof(res));
4311 res.start = address + IOREGION_OFFSET;
4312 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
4313 res.flags = IORESOURCE_IO;
4315 err = acpi_check_resource_conflict(&res);
4317 platform_device_put(pdev[i]);
4322 err = platform_device_add_resources(pdev[i], &res, 1);
4324 goto exit_device_put;
4326 /* platform_device_add calls probe() */
4327 err = platform_device_add(pdev[i]);
4329 goto exit_device_put;
4333 goto exit_unregister;
4339 platform_device_put(pdev[i]);
4340 exit_device_unregister:
4343 platform_device_unregister(pdev[i]);
4346 platform_driver_unregister(&nct6775_driver);
4350 static void __exit sensors_nct6775_exit(void)
4354 for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4356 platform_device_unregister(pdev[i]);
4358 platform_driver_unregister(&nct6775_driver);
4361 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4362 MODULE_DESCRIPTION("Driver for NCT6775F and compatible chips");
4363 MODULE_LICENSE("GPL");
4365 module_init(sensors_nct6775_init);
4366 module_exit(sensors_nct6775_exit);