git.sur5r.net Git - groeck-nct6775/blob - nct6775.c

   1 /*
   2  * nct6775 - Driver for the hardware monitoring functionality of
   3  *             Nuvoton NCT677x Super-I/O chips
   4  *
   5  * Copyright (C) 2012  Guenter Roeck <linux@roeck-us.net>
   6  *
   7  * Derived from w83627ehf driver
   8  * Copyright (C) 2005-2012  Jean Delvare <jdelvare@suse.de>
   9  * Copyright (C) 2006  Yuan Mu (Winbond),
  10  *                     Rudolf Marek <r.marek@assembler.cz>
  11  *                     David Hubbard <david.c.hubbard@gmail.com>
  12  *                     Daniel J Blueman <daniel.blueman@gmail.com>
  13  * Copyright (C) 2010  Sheng-Yuan Huang (Nuvoton) (PS00)
  14  *
  15  * Shamelessly ripped from the w83627hf driver
  16  * Copyright (C) 2003  Mark Studebaker
  17  *
  18  * This program is free software; you can redistribute it and/or modify
  19  * it under the terms of the GNU General Public License as published by
  20  * the Free Software Foundation; either version 2 of the License, or
  21  * (at your option) any later version.
  22  *
  23  * This program is distributed in the hope that it will be useful,
  24  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26  * GNU General Public License for more details.
  27  *
  28  * You should have received a copy of the GNU General Public License
  29  * along with this program; if not, write to the Free Software
  30  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  31  *
  32  *
  33  * Supports the following chips:
  34  *
  35  * Chip        #vin    #fan    #pwm    #temp  chip IDs       man ID
  36  * nct6106d     9      3       3       6+3    0xc450 0xc1    0x5ca3
  37  * nct6775f     9      4       3       6+3    0xb470 0xc1    0x5ca3
  38  * nct6776f     9      5       3       6+3    0xc330 0xc1    0x5ca3
  39  * nct6779d    15      5       5       2+6    0xc560 0xc1    0x5ca3
  40  * nct6791d    15      6       6       2+6    0xc800 0xc1    0x5ca3
  41  * nct6792d    15      6       6       2+6    0xc910 0xc1    0x5ca3
  42  * nct6793d    15      6       6       2+6    0xd120 0xc1    0x5ca3
  43  *
  44  * #temp lists the number of monitored temperature sources (first value) plus
  45  * the number of directly connectable temperature sensors (second value).
  46  */
  47
  48 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  49
  50 #include <linux/module.h>
  51 #include <linux/init.h>
  52 #include <linux/slab.h>
  53 #include <linux/jiffies.h>
  54 #include <linux/platform_device.h>
  55 #include <linux/hwmon.h>
  56 #include <linux/hwmon-sysfs.h>
  57 #include <linux/hwmon-vid.h>
  58 #include <linux/err.h>
  59 #include <linux/mutex.h>
  60 #include <linux/acpi.h>
  61 #include <linux/dmi.h>
  62 #include <linux/io.h>
  63 #include "lm75.h"
  64 #include "compat.h"
  65
  66 #define USE_ALTERNATE
  67
  68 enum kinds { nct6106, nct6775, nct6776, nct6779, nct6791, nct6792, nct6793 };
  69
  70 /* used to set data->name = nct6775_device_names[data->sio_kind] */
  71 static const char * const nct6775_device_names[] = {
  72         "nct6106",
  73         "nct6775",
  74         "nct6776",
  75         "nct6779",
  76         "nct6791",
  77         "nct6792",
  78         "nct6793",
  79 };
  80
  81 static const char * const nct6775_sio_names[] __initconst = {
  82         "NCT6106D",
  83         "NCT6775F",
  84         "NCT6776D/F",
  85         "NCT6779D",
  86         "NCT6791D",
  87         "NCT6792D",
  88         "NCT6793D",
  89 };
  90
  91 static unsigned short force_id;
  92 module_param(force_id, ushort, 0);
  93 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  94
  95 static unsigned short fan_debounce;
  96 module_param(fan_debounce, ushort, 0);
  97 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
  98
  99 #define DRVNAME "nct6775"
 100
 101 /*
 102  * Super-I/O constants and functions
 103  */
 104
 105 #define NCT6775_LD_ACPI         0x0a
 106 #define NCT6775_LD_HWM          0x0b
 107 #define NCT6775_LD_VID          0x0d
 108
 109 #define SIO_REG_LDSEL           0x07    /* Logical device select */
 110 #define SIO_REG_DEVID           0x20    /* Device ID (2 bytes) */
 111 #define SIO_REG_ENABLE          0x30    /* Logical device enable */
 112 #define SIO_REG_ADDR            0x60    /* Logical device address (2 bytes) */
 113
 114 #define SIO_NCT6106_ID          0xc450
 115 #define SIO_NCT6775_ID          0xb470
 116 #define SIO_NCT6776_ID          0xc330
 117 #define SIO_NCT6779_ID          0xc560
 118 #define SIO_NCT6791_ID          0xc800
 119 #define SIO_NCT6792_ID          0xc910
 120 #define SIO_NCT6793_ID          0xd120
 121 #define SIO_ID_MASK             0xFFF0
 122
 123 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
 124
 125 static inline void
 126 superio_outb(int ioreg, int reg, int val)
 127 {
 128         outb(reg, ioreg);
 129         outb(val, ioreg + 1);
 130 }
 131
 132 static inline int
 133 superio_inb(int ioreg, int reg)
 134 {
 135         outb(reg, ioreg);
 136         return inb(ioreg + 1);
 137 }
 138
 139 static inline void
 140 superio_select(int ioreg, int ld)
 141 {
 142         outb(SIO_REG_LDSEL, ioreg);
 143         outb(ld, ioreg + 1);
 144 }
 145
 146 static inline int
 147 superio_enter(int ioreg)
 148 {
 149         /*
 150          * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
 151          */
 152         if (!request_muxed_region(ioreg, 2, DRVNAME))
 153                 return -EBUSY;
 154
 155         outb(0x87, ioreg);
 156         outb(0x87, ioreg);
 157
 158         return 0;
 159 }
 160
 161 static inline void
 162 superio_exit(int ioreg)
 163 {
 164         outb(0xaa, ioreg);
 165         outb(0x02, ioreg);
 166         outb(0x02, ioreg + 1);
 167         release_region(ioreg, 2);
 168 }
 169
 170 /*
 171  * ISA constants
 172  */
 173
 174 #define IOREGION_ALIGNMENT      (~7)
 175 #define IOREGION_OFFSET         5
 176 #define IOREGION_LENGTH         2
 177 #define ADDR_REG_OFFSET         0
 178 #define DATA_REG_OFFSET         1
 179
 180 #define NCT6775_REG_BANK        0x4E
 181 #define NCT6775_REG_CONFIG      0x40
 182
 183 /*
 184  * Not currently used:
 185  * REG_MAN_ID has the value 0x5ca3 for all supported chips.
 186  * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
 187  * REG_MAN_ID is at port 0x4f
 188  * REG_CHIP_ID is at port 0x58
 189  */
 190
 191 #define NUM_TEMP        10      /* Max number of temp attribute sets w/ limits*/
 192 #define NUM_TEMP_FIXED  6       /* Max number of fixed temp attribute sets */
 193
 194 #define NUM_REG_ALARM   7       /* Max number of alarm registers */
 195 #define NUM_REG_BEEP    5       /* Max number of beep registers */
 196
 197 #define NUM_FAN         6
 198
 199 /* Common and NCT6775 specific data */
 200
 201 /* Voltage min/max registers for nr=7..14 are in bank 5 */
 202
 203 static const u16 NCT6775_REG_IN_MAX[] = {
 204         0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
 205         0x55c, 0x55e, 0x560, 0x562 };
 206 static const u16 NCT6775_REG_IN_MIN[] = {
 207         0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
 208         0x55d, 0x55f, 0x561, 0x563 };
 209 static const u16 NCT6775_REG_IN[] = {
 210         0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
 211 };
 212
 213 #define NCT6775_REG_VBAT                0x5D
 214 #define NCT6775_REG_DIODE               0x5E
 215 #define NCT6775_DIODE_MASK              0x02
 216
 217 #define NCT6775_REG_FANDIV1             0x506
 218 #define NCT6775_REG_FANDIV2             0x507
 219
 220 #define NCT6775_REG_CR_FAN_DEBOUNCE     0xf0
 221
 222 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
 223
 224 /* 0..15 voltages, 16..23 fans, 24..29 temperatures, 30..31 intrusion */
 225
 226 static const s8 NCT6775_ALARM_BITS[] = {
 227         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 228         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 229         -1,                             /* unused */
 230         6, 7, 11, -1, -1,               /* fan1..fan5 */
 231         -1, -1, -1,                     /* unused */
 232         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 233         12, -1 };                       /* intrusion0, intrusion1 */
 234
 235 #define FAN_ALARM_BASE          16
 236 #define TEMP_ALARM_BASE         24
 237 #define INTRUSION_ALARM_BASE    30
 238
 239 static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e };
 240
 241 /*
 242  * 0..14 voltages, 15 global beep enable, 16..23 fans, 24..29 temperatures,
 243  * 30..31 intrusion
 244  */
 245 static const s8 NCT6775_BEEP_BITS[] = {
 246         0, 1, 2, 3, 8, 9, 10, 16,       /* in0.. in7 */
 247         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 248         21,                             /* global beep enable */
 249         6, 7, 11, 28, -1,               /* fan1..fan5 */
 250         -1, -1, -1,                     /* unused */
 251         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 252         12, -1 };                       /* intrusion0, intrusion1 */
 253
 254 #define BEEP_ENABLE_BASE                15
 255
 256 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
 257 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
 258
 259 /* DC or PWM output fan configuration */
 260 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
 261 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
 262
 263 /* Advanced Fan control, some values are common for all fans */
 264
 265 static const u16 NCT6775_REG_TARGET[] = {
 266         0x101, 0x201, 0x301, 0x801, 0x901, 0xa01 };
 267 static const u16 NCT6775_REG_FAN_MODE[] = {
 268         0x102, 0x202, 0x302, 0x802, 0x902, 0xa02 };
 269 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
 270         0x103, 0x203, 0x303, 0x803, 0x903, 0xa03 };
 271 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
 272         0x104, 0x204, 0x304, 0x804, 0x904, 0xa04 };
 273 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
 274         0x105, 0x205, 0x305, 0x805, 0x905, 0xa05 };
 275 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = {
 276         0x106, 0x206, 0x306, 0x806, 0x906, 0xa06 };
 277 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
 278 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
 279
 280 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
 281         0x107, 0x207, 0x307, 0x807, 0x907, 0xa07 };
 282 static const u16 NCT6775_REG_PWM[] = {
 283         0x109, 0x209, 0x309, 0x809, 0x909, 0xa09 };
 284 static const u16 NCT6775_REG_PWM_READ[] = {
 285         0x01, 0x03, 0x11, 0x13, 0x15, 0xa09 };
 286
 287 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
 288 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
 289 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
 290 static const u16 NCT6775_FAN_PULSE_SHIFT[] = { 0, 0, 0, 0, 0, 0 };
 291
 292 static const u16 NCT6775_REG_TEMP[] = {
 293         0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
 294
 295 static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77 };
 296
 297 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 298         0, 0x152, 0x252, 0x628, 0x629, 0x62A };
 299 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 300         0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
 301 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 302         0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
 303
 304 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 305         0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
 306
 307 static const u16 NCT6775_REG_TEMP_SEL[] = {
 308         0x100, 0x200, 0x300, 0x800, 0x900, 0xa00 };
 309
 310 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
 311         0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 };
 312 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
 313         0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a };
 314 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
 315         0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b };
 316 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
 317         0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c };
 318 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
 319         0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d };
 320
 321 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
 322
 323 static const u16 NCT6775_REG_AUTO_TEMP[] = {
 324         0x121, 0x221, 0x321, 0x821, 0x921, 0xa21 };
 325 static const u16 NCT6775_REG_AUTO_PWM[] = {
 326         0x127, 0x227, 0x327, 0x827, 0x927, 0xa27 };
 327
 328 #define NCT6775_AUTO_TEMP(data, nr, p)  ((data)->REG_AUTO_TEMP[nr] + (p))
 329 #define NCT6775_AUTO_PWM(data, nr, p)   ((data)->REG_AUTO_PWM[nr] + (p))
 330
 331 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
 332
 333 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
 334         0x135, 0x235, 0x335, 0x835, 0x935, 0xa35 };
 335 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
 336         0x138, 0x238, 0x338, 0x838, 0x938, 0xa38 };
 337
 338 static const char *const nct6775_temp_label[] = {
 339         "",
 340         "SYSTIN",
 341         "CPUTIN",
 342         "AUXTIN",
 343         "AMD SB-TSI",
 344         "PECI Agent 0",
 345         "PECI Agent 1",
 346         "PECI Agent 2",
 347         "PECI Agent 3",
 348         "PECI Agent 4",
 349         "PECI Agent 5",
 350         "PECI Agent 6",
 351         "PECI Agent 7",
 352         "PCH_CHIP_CPU_MAX_TEMP",
 353         "PCH_CHIP_TEMP",
 354         "PCH_CPU_TEMP",
 355         "PCH_MCH_TEMP",
 356         "PCH_DIM0_TEMP",
 357         "PCH_DIM1_TEMP",
 358         "PCH_DIM2_TEMP",
 359         "PCH_DIM3_TEMP"
 360 };
 361
 362 static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
 363         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
 364
 365 static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
 366         = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
 367             0xa07 };
 368
 369 /* NCT6776 specific data */
 370
 371 /* STEP_UP_TIME and STEP_DOWN_TIME regs are swapped for all chips but NCT6775 */
 372 #define NCT6776_REG_FAN_STEP_UP_TIME NCT6775_REG_FAN_STEP_DOWN_TIME
 373 #define NCT6776_REG_FAN_STEP_DOWN_TIME NCT6775_REG_FAN_STEP_UP_TIME
 374
 375 static const s8 NCT6776_ALARM_BITS[] = {
 376         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 377         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 378         -1,                             /* unused */
 379         6, 7, 11, 10, 23,               /* fan1..fan5 */
 380         -1, -1, -1,                     /* unused */
 381         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 382         12, 9 };                        /* intrusion0, intrusion1 */
 383
 384 static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5 };
 385
 386 static const s8 NCT6776_BEEP_BITS[] = {
 387         0, 1, 2, 3, 4, 5, 6, 7,         /* in0.. in7 */
 388         8, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 389         24,                             /* global beep enable */
 390         25, 26, 27, 28, 29,             /* fan1..fan5 */
 391         -1, -1, -1,                     /* unused */
 392         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 393         30, 31 };                       /* intrusion0, intrusion1 */
 394
 395 static const u16 NCT6776_REG_TOLERANCE_H[] = {
 396         0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c };
 397
 398 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0 };
 399 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0 };
 400
 401 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
 402 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
 403
 404 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
 405         0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e };
 406
 407 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 408         0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
 409
 410 static const char *const nct6776_temp_label[] = {
 411         "",
 412         "SYSTIN",
 413         "CPUTIN",
 414         "AUXTIN",
 415         "SMBUSMASTER 0",
 416         "SMBUSMASTER 1",
 417         "SMBUSMASTER 2",
 418         "SMBUSMASTER 3",
 419         "SMBUSMASTER 4",
 420         "SMBUSMASTER 5",
 421         "SMBUSMASTER 6",
 422         "SMBUSMASTER 7",
 423         "PECI Agent 0",
 424         "PECI Agent 1",
 425         "PCH_CHIP_CPU_MAX_TEMP",
 426         "PCH_CHIP_TEMP",
 427         "PCH_CPU_TEMP",
 428         "PCH_MCH_TEMP",
 429         "PCH_DIM0_TEMP",
 430         "PCH_DIM1_TEMP",
 431         "PCH_DIM2_TEMP",
 432         "PCH_DIM3_TEMP",
 433         "BYTE_TEMP"
 434 };
 435
 436 static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
 437         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
 438
 439 static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
 440         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
 441
 442 /* NCT6779 specific data */
 443
 444 static const u16 NCT6779_REG_IN[] = {
 445         0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
 446         0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
 447
 448 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
 449         0x459, 0x45A, 0x45B, 0x568 };
 450
 451 static const s8 NCT6779_ALARM_BITS[] = {
 452         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 453         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 454         -1,                             /* unused */
 455         6, 7, 11, 10, 23,               /* fan1..fan5 */
 456         -1, -1, -1,                     /* unused */
 457         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 458         12, 9 };                        /* intrusion0, intrusion1 */
 459
 460 static const s8 NCT6779_BEEP_BITS[] = {
 461         0, 1, 2, 3, 4, 5, 6, 7,         /* in0.. in7 */
 462         8, 9, 10, 11, 12, 13, 14,       /* in8..in14 */
 463         24,                             /* global beep enable */
 464         25, 26, 27, 28, 29,             /* fan1..fan5 */
 465         -1, -1, -1,                     /* unused */
 466         16, 17, -1, -1, -1, -1,         /* temp1..temp6 */
 467         30, 31 };                       /* intrusion0, intrusion1 */
 468
 469 static const u16 NCT6779_REG_FAN[] = {
 470         0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8, 0x4ba };
 471 static const u16 NCT6779_REG_FAN_PULSES[] = {
 472         0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
 473
 474 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
 475         0x136, 0x236, 0x336, 0x836, 0x936, 0xa36 };
 476 #define NCT6779_CRITICAL_PWM_ENABLE_MASK        0x01
 477 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
 478         0x137, 0x237, 0x337, 0x837, 0x937, 0xa37 };
 479
 480 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
 481 static const u16 NCT6779_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b };
 482 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 483         0x18, 0x152 };
 484 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 485         0x3a, 0x153 };
 486 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 487         0x39, 0x155 };
 488
 489 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
 490         0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
 491
 492 static const char *const nct6779_temp_label[] = {
 493         "",
 494         "SYSTIN",
 495         "CPUTIN",
 496         "AUXTIN0",
 497         "AUXTIN1",
 498         "AUXTIN2",
 499         "AUXTIN3",
 500         "",
 501         "SMBUSMASTER 0",
 502         "SMBUSMASTER 1",
 503         "SMBUSMASTER 2",
 504         "SMBUSMASTER 3",
 505         "SMBUSMASTER 4",
 506         "SMBUSMASTER 5",
 507         "SMBUSMASTER 6",
 508         "SMBUSMASTER 7",
 509         "PECI Agent 0",
 510         "PECI Agent 1",
 511         "PCH_CHIP_CPU_MAX_TEMP",
 512         "PCH_CHIP_TEMP",
 513         "PCH_CPU_TEMP",
 514         "PCH_MCH_TEMP",
 515         "PCH_DIM0_TEMP",
 516         "PCH_DIM1_TEMP",
 517         "PCH_DIM2_TEMP",
 518         "PCH_DIM3_TEMP",
 519         "BYTE_TEMP",
 520         "",
 521         "",
 522         "",
 523         "",
 524         "Virtual_TEMP"
 525 };
 526
 527 #define NCT6779_NUM_LABELS      (ARRAY_SIZE(nct6779_temp_label) - 5)
 528 #define NCT6791_NUM_LABELS      ARRAY_SIZE(nct6779_temp_label)
 529
 530 static const u16 NCT6779_REG_TEMP_ALTERNATE[NCT6791_NUM_LABELS - 1]
 531         = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
 532             0, 0, 0, 0, 0, 0, 0, 0,
 533             0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
 534             0x408, 0 };
 535
 536 static const u16 NCT6779_REG_TEMP_CRIT[NCT6791_NUM_LABELS - 1]
 537         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
 538
 539 /* NCT6791 specific data */
 540
 541 #define NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE     0x28
 542
 543 static const u16 NCT6791_REG_WEIGHT_TEMP_SEL[6] = { 0, 0x239 };
 544 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP[6] = { 0, 0x23a };
 545 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP_TOL[6] = { 0, 0x23b };
 546 static const u16 NCT6791_REG_WEIGHT_DUTY_STEP[6] = { 0, 0x23c };
 547 static const u16 NCT6791_REG_WEIGHT_TEMP_BASE[6] = { 0, 0x23d };
 548 static const u16 NCT6791_REG_WEIGHT_DUTY_BASE[6] = { 0, 0x23e };
 549
 550 static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = {
 551         0x459, 0x45A, 0x45B, 0x568, 0x45D };
 552
 553 static const s8 NCT6791_ALARM_BITS[] = {
 554         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 555         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 556         -1,                             /* unused */
 557         6, 7, 11, 10, 23, 33,           /* fan1..fan6 */
 558         -1, -1,                         /* unused */
 559         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 560         12, 9 };                        /* intrusion0, intrusion1 */
 561
 562 /* NCT6792/NCT6793 specific data */
 563
 564 static const u16 NCT6792_REG_TEMP_MON[] = {
 565         0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d };
 566 static const u16 NCT6792_REG_BEEP[NUM_REG_BEEP] = {
 567         0xb2, 0xb3, 0xb4, 0xb5, 0xbf };
 568
 569 static const char *const nct6792_temp_label[] = {
 570         "",
 571         "SYSTIN",
 572         "CPUTIN",
 573         "AUXTIN0",
 574         "AUXTIN1",
 575         "AUXTIN2",
 576         "AUXTIN3",
 577         "",
 578         "SMBUSMASTER 0",
 579         "SMBUSMASTER 1",
 580         "SMBUSMASTER 2",
 581         "SMBUSMASTER 3",
 582         "SMBUSMASTER 4",
 583         "SMBUSMASTER 5",
 584         "SMBUSMASTER 6",
 585         "SMBUSMASTER 7",
 586         "PECI Agent 0",
 587         "PECI Agent 1",
 588         "PCH_CHIP_CPU_MAX_TEMP",
 589         "PCH_CHIP_TEMP",
 590         "PCH_CPU_TEMP",
 591         "PCH_MCH_TEMP",
 592         "PCH_DIM0_TEMP",
 593         "PCH_DIM1_TEMP",
 594         "PCH_DIM2_TEMP",
 595         "PCH_DIM3_TEMP",
 596         "BYTE_TEMP",
 597         "PECI Agent 0 Calibration",
 598         "PECI Agent 1 Calibration",
 599         "",
 600         "",
 601         "Virtual_TEMP"
 602 };
 603
 604 static const char *const nct6793_temp_label[] = {
 605         "",
 606         "SYSTIN",
 607         "CPUTIN",
 608         "AUXTIN0",
 609         "AUXTIN1",
 610         "AUXTIN2",
 611         "AUXTIN3",
 612         "",
 613         "SMBUSMASTER 0",
 614         "SMBUSMASTER 1",
 615         "",
 616         "",
 617         "",
 618         "",
 619         "",
 620         "",
 621         "PECI Agent 0",
 622         "PECI Agent 1",
 623         "PCH_CHIP_CPU_MAX_TEMP",
 624         "PCH_CHIP_TEMP",
 625         "PCH_CPU_TEMP",
 626         "PCH_MCH_TEMP",
 627         "Agent0 Dimm0 ",
 628         "Agent0 Dimm1",
 629         "Agent1 Dimm0",
 630         "Agent1 Dimm1",
 631         "BYTE_TEMP0",
 632         "BYTE_TEMP1",
 633         "PECI Agent 0 Calibration",
 634         "PECI Agent 1 Calibration",
 635         "",
 636         "Virtual_TEMP"
 637 };
 638
 639 /* NCT6102D/NCT6106D specific data */
 640
 641 #define NCT6106_REG_VBAT        0x318
 642 #define NCT6106_REG_DIODE       0x319
 643 #define NCT6106_DIODE_MASK      0x01
 644
 645 static const u16 NCT6106_REG_IN_MAX[] = {
 646         0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
 647 static const u16 NCT6106_REG_IN_MIN[] = {
 648         0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
 649 static const u16 NCT6106_REG_IN[] = {
 650         0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
 651
 652 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
 653 static const u16 NCT6106_REG_TEMP_MON[] = { 0x18, 0x19, 0x1a };
 654 static const u16 NCT6106_REG_TEMP_HYST[] = {
 655         0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
 656 static const u16 NCT6106_REG_TEMP_OVER[] = {
 657         0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
 658 static const u16 NCT6106_REG_TEMP_CRIT_L[] = {
 659         0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
 660 static const u16 NCT6106_REG_TEMP_CRIT_H[] = {
 661         0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
 662 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
 663 static const u16 NCT6106_REG_TEMP_CONFIG[] = {
 664         0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
 665
 666 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
 667 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
 668 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0, 0 };
 669 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4, 0, 0 };
 670
 671 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
 672 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
 673 static const u16 NCT6106_REG_PWM[] = { 0x119, 0x129, 0x139 };
 674 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c };
 675 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
 676 static const u16 NCT6106_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130 };
 677 static const u16 NCT6106_REG_TEMP_SOURCE[] = {
 678         0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
 679
 680 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
 681 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = {
 682         0x11b, 0x12b, 0x13b };
 683
 684 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
 685 #define NCT6106_CRITICAL_PWM_ENABLE_MASK        0x10
 686 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
 687
 688 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
 689 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
 690 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
 691 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
 692 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
 693 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
 694
 695 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
 696
 697 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
 698 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
 699 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
 700 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x17c };
 701 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
 702 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
 703
 704 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
 705 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
 706
 707 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = {
 708         0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
 709
 710 static const s8 NCT6106_ALARM_BITS[] = {
 711         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 712         9, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 713         -1,                             /* unused */
 714         32, 33, 34, -1, -1,             /* fan1..fan5 */
 715         -1, -1, -1,                     /* unused */
 716         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 717         48, -1                          /* intrusion0, intrusion1 */
 718 };
 719
 720 static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = {
 721         0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 };
 722
 723 static const s8 NCT6106_BEEP_BITS[] = {
 724         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 725         9, 10, 11, 12, -1, -1, -1,      /* in8..in14 */
 726         32,                             /* global beep enable */
 727         24, 25, 26, 27, 28,             /* fan1..fan5 */
 728         -1, -1, -1,                     /* unused */
 729         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 730         34, -1                          /* intrusion0, intrusion1 */
 731 };
 732
 733 static const u16 NCT6106_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
 734         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x51, 0x52, 0x54 };
 735
 736 static const u16 NCT6106_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
 737         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x204, 0x205 };
 738
 739 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
 740 {
 741         if (mode == 0 && pwm == 255)
 742                 return off;
 743         return mode + 1;
 744 }
 745
 746 static int pwm_enable_to_reg(enum pwm_enable mode)
 747 {
 748         if (mode == off)
 749                 return 0;
 750         return mode - 1;
 751 }
 752
 753 /*
 754  * Conversions
 755  */
 756
 757 /* 1 is DC mode, output in ms */
 758 static unsigned int step_time_from_reg(u8 reg, u8 mode)
 759 {
 760         return mode ? 400 * reg : 100 * reg;
 761 }
 762
 763 static u8 step_time_to_reg(unsigned int msec, u8 mode)
 764 {
 765         return clamp_val((mode ? (msec + 200) / 400 :
 766                                         (msec + 50) / 100), 1, 255);
 767 }
 768
 769 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
 770 {
 771         if (reg == 0 || reg == 255)
 772                 return 0;
 773         return 1350000U / (reg << divreg);
 774 }
 775
 776 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
 777 {
 778         if ((reg & 0xff1f) == 0xff1f)
 779                 return 0;
 780
 781         reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
 782
 783         if (reg == 0)
 784                 return 0;
 785
 786         return 1350000U / reg;
 787 }
 788
 789 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
 790 {
 791         if (reg == 0 || reg == 0xffff)
 792                 return 0;
 793
 794         /*
 795          * Even though the registers are 16 bit wide, the fan divisor
 796          * still applies.
 797          */
 798         return 1350000U / (reg << divreg);
 799 }
 800
 801 static u16 fan_to_reg(u32 fan, unsigned int divreg)
 802 {
 803         if (!fan)
 804                 return 0;
 805
 806         return (1350000U / fan) >> divreg;
 807 }
 808
 809 static inline unsigned int
 810 div_from_reg(u8 reg)
 811 {
 812         return 1 << reg;
 813 }
 814
 815 /*
 816  * Some of the voltage inputs have internal scaling, the tables below
 817  * contain 8 (the ADC LSB in mV) * scaling factor * 100
 818  */
 819 static const u16 scale_in[15] = {
 820         800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
 821         800, 800
 822 };
 823
 824 static inline long in_from_reg(u8 reg, u8 nr)
 825 {
 826         return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
 827 }
 828
 829 static inline u8 in_to_reg(u32 val, u8 nr)
 830 {
 831         return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
 832 }
 833
 834 /*
 835  * Data structures and manipulation thereof
 836  */
 837
 838 struct nct6775_data {
 839         int addr;       /* IO base of hw monitor block */
 840         int sioreg;     /* SIO register address */
 841         enum kinds kind;
 842         const char *name;
 843
 844 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
 845         struct device *hwmon_dev;
 846 #endif
 847
 848         const struct attribute_group *groups[6];
 849
 850         u16 reg_temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 851                                     * 3=temp_crit, 4=temp_lcrit
 852                                     */
 853         u8 temp_src[NUM_TEMP];
 854         u16 reg_temp_config[NUM_TEMP];
 855         const char * const *temp_label;
 856         int temp_label_num;
 857
 858         u16 REG_CONFIG;
 859         u16 REG_VBAT;
 860         u16 REG_DIODE;
 861         u8 DIODE_MASK;
 862
 863         const s8 *ALARM_BITS;
 864         const s8 *BEEP_BITS;
 865
 866         const u16 *REG_VIN;
 867         const u16 *REG_IN_MINMAX[2];
 868
 869         const u16 *REG_TARGET;
 870         const u16 *REG_FAN;
 871         const u16 *REG_FAN_MODE;
 872         const u16 *REG_FAN_MIN;
 873         const u16 *REG_FAN_PULSES;
 874         const u16 *FAN_PULSE_SHIFT;
 875         const u16 *REG_FAN_TIME[3];
 876
 877         const u16 *REG_TOLERANCE_H;
 878
 879         const u8 *REG_PWM_MODE;
 880         const u8 *PWM_MODE_MASK;
 881
 882         const u16 *REG_PWM[7];  /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 883                                  * [3]=pwm_max, [4]=pwm_step,
 884                                  * [5]=weight_duty_step, [6]=weight_duty_base
 885                                  */
 886         const u16 *REG_PWM_READ;
 887
 888         const u16 *REG_CRITICAL_PWM_ENABLE;
 889         u8 CRITICAL_PWM_ENABLE_MASK;
 890         const u16 *REG_CRITICAL_PWM;
 891
 892         const u16 *REG_AUTO_TEMP;
 893         const u16 *REG_AUTO_PWM;
 894
 895         const u16 *REG_CRITICAL_TEMP;
 896         const u16 *REG_CRITICAL_TEMP_TOLERANCE;
 897
 898         const u16 *REG_TEMP_SOURCE;     /* temp register sources */
 899         const u16 *REG_TEMP_SEL;
 900         const u16 *REG_WEIGHT_TEMP_SEL;
 901         const u16 *REG_WEIGHT_TEMP[3];  /* 0=base, 1=tolerance, 2=step */
 902
 903         const u16 *REG_TEMP_OFFSET;
 904
 905         const u16 *REG_ALARM;
 906         const u16 *REG_BEEP;
 907
 908         unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
 909         unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
 910
 911         struct mutex update_lock;
 912         bool valid;             /* true if following fields are valid */
 913         unsigned long last_updated;     /* In jiffies */
 914
 915         /* Register values */
 916         u8 bank;                /* current register bank */
 917         u8 in_num;              /* number of in inputs we have */
 918         u8 in[15][3];           /* [0]=in, [1]=in_max, [2]=in_min */
 919         unsigned int rpm[NUM_FAN];
 920         u16 fan_min[NUM_FAN];
 921         u8 fan_pulses[NUM_FAN];
 922         u8 fan_div[NUM_FAN];
 923         u8 has_pwm;
 924         u8 has_fan;             /* some fan inputs can be disabled */
 925         u8 has_fan_min;         /* some fans don't have min register */
 926         bool has_fan_div;
 927
 928         u8 num_temp_alarms;     /* 2, 3, or 6 */
 929         u8 num_temp_beeps;      /* 2, 3, or 6 */
 930         u8 temp_fixed_num;      /* 3 or 6 */
 931         u8 temp_type[NUM_TEMP_FIXED];
 932         s8 temp_offset[NUM_TEMP_FIXED];
 933         s16 temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 934                                 * 3=temp_crit, 4=temp_lcrit */
 935         u64 alarms;
 936         u64 beeps;
 937
 938         u8 pwm_num;     /* number of pwm */
 939         u8 pwm_mode[NUM_FAN];   /* 1->DC variable voltage,
 940                                  * 0->PWM variable duty cycle
 941                                  */
 942         enum pwm_enable pwm_enable[NUM_FAN];
 943                         /* 0->off
 944                          * 1->manual
 945                          * 2->thermal cruise mode (also called SmartFan I)
 946                          * 3->fan speed cruise mode
 947                          * 4->SmartFan III
 948                          * 5->enhanced variable thermal cruise (SmartFan IV)
 949                          */
 950         u8 pwm[7][NUM_FAN];     /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 951                                  * [3]=pwm_max, [4]=pwm_step,
 952                                  * [5]=weight_duty_step, [6]=weight_duty_base
 953                                  */
 954
 955         u8 target_temp[NUM_FAN];
 956         u8 target_temp_mask;
 957         u32 target_speed[NUM_FAN];
 958         u32 target_speed_tolerance[NUM_FAN];
 959         u8 speed_tolerance_limit;
 960
 961         u8 temp_tolerance[2][NUM_FAN];
 962         u8 tolerance_mask;
 963
 964         u8 fan_time[3][NUM_FAN]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
 965
 966         /* Automatic fan speed control registers */
 967         int auto_pwm_num;
 968         u8 auto_pwm[NUM_FAN][7];
 969         u8 auto_temp[NUM_FAN][7];
 970         u8 pwm_temp_sel[NUM_FAN];
 971         u8 pwm_weight_temp_sel[NUM_FAN];
 972         u8 weight_temp[3][NUM_FAN];     /* 0->temp_step, 1->temp_step_tol,
 973                                          * 2->temp_base
 974                                          */
 975
 976         u8 vid;
 977         u8 vrm;
 978
 979         bool have_vid;
 980
 981         u16 have_temp;
 982         u16 have_temp_fixed;
 983         u16 have_in;
 984
 985         /* Remember extra register values over suspend/resume */
 986         u8 vbat;
 987         u8 fandiv1;
 988         u8 fandiv2;
 989         u8 sio_reg_enable;
 990 };
 991
 992 struct nct6775_sio_data {
 993         int sioreg;
 994         enum kinds kind;
 995 };
 996
 997 struct sensor_device_template {
 998         struct device_attribute dev_attr;
 999         union {
1000                 struct {
1001                         u8 nr;
1002                         u8 index;
1003                 } s;
1004                 int index;
1005         } u;
1006         bool s2;        /* true if both index and nr are used */
1007 };
1008
1009 struct sensor_device_attr_u {
1010         union {
1011                 struct sensor_device_attribute a1;
1012                 struct sensor_device_attribute_2 a2;
1013         } u;
1014         char name[32];
1015 };
1016
1017 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) {      \
1018         .attr = {.name = _template, .mode = _mode },            \
1019         .show   = _show,                                        \
1020         .store  = _store,                                       \
1021 }
1022
1023 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \
1024         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
1025           .u.index = _index,                                            \
1026           .s2 = false }
1027
1028 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,       \
1029                                  _nr, _index)                           \
1030         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
1031           .u.s.index = _index,                                          \
1032           .u.s.nr = _nr,                                                \
1033           .s2 = true }
1034
1035 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
1036 static struct sensor_device_template sensor_dev_template_##_name        \
1037         = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store,       \
1038                                  _index)
1039
1040 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store,       \
1041                           _nr, _index)                                  \
1042 static struct sensor_device_template sensor_dev_template_##_name        \
1043         = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,     \
1044                                  _nr, _index)
1045
1046 struct sensor_template_group {
1047         struct sensor_device_template **templates;
1048         umode_t (*is_visible)(struct kobject *, struct attribute *, int);
1049         int base;
1050 };
1051
1052 static struct attribute_group *
1053 nct6775_create_attr_group(struct device *dev, struct sensor_template_group *tg,
1054                           int repeat)
1055 {
1056         struct attribute_group *group;
1057         struct sensor_device_attr_u *su;
1058         struct sensor_device_attribute *a;
1059         struct sensor_device_attribute_2 *a2;
1060         struct attribute **attrs;
1061         struct sensor_device_template **t;
1062         int i, count;
1063
1064         if (repeat <= 0)
1065                 return ERR_PTR(-EINVAL);
1066
1067         t = tg->templates;
1068         for (count = 0; *t; t++, count++)
1069                 ;
1070
1071         if (count == 0)
1072                 return ERR_PTR(-EINVAL);
1073
1074         group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
1075         if (group == NULL)
1076                 return ERR_PTR(-ENOMEM);
1077
1078         attrs = devm_kzalloc(dev, sizeof(*attrs) * (repeat * count + 1),
1079                              GFP_KERNEL);
1080         if (attrs == NULL)
1081                 return ERR_PTR(-ENOMEM);
1082
1083         su = devm_kzalloc(dev, sizeof(*su) * repeat * count,
1084                                GFP_KERNEL);
1085         if (su == NULL)
1086                 return ERR_PTR(-ENOMEM);
1087
1088         group->attrs = attrs;
1089         group->is_visible = tg->is_visible;
1090
1091         for (i = 0; i < repeat; i++) {
1092                 t = tg->templates;
1093                 while (*t != NULL) {
1094                         snprintf(su->name, sizeof(su->name),
1095                                  (*t)->dev_attr.attr.name, tg->base + i);
1096                         if ((*t)->s2) {
1097                                 a2 = &su->u.a2;
1098                                 sysfs_attr_init(&a2->dev_attr.attr);
1099                                 a2->dev_attr.attr.name = su->name;
1100                                 a2->nr = (*t)->u.s.nr + i;
1101                                 a2->index = (*t)->u.s.index;
1102                                 a2->dev_attr.attr.mode =
1103                                   (*t)->dev_attr.attr.mode;
1104                                 a2->dev_attr.show = (*t)->dev_attr.show;
1105                                 a2->dev_attr.store = (*t)->dev_attr.store;
1106                                 *attrs = &a2->dev_attr.attr;
1107                         } else {
1108                                 a = &su->u.a1;
1109                                 sysfs_attr_init(&a->dev_attr.attr);
1110                                 a->dev_attr.attr.name = su->name;
1111                                 a->index = (*t)->u.index + i;
1112                                 a->dev_attr.attr.mode =
1113                                   (*t)->dev_attr.attr.mode;
1114                                 a->dev_attr.show = (*t)->dev_attr.show;
1115                                 a->dev_attr.store = (*t)->dev_attr.store;
1116                                 *attrs = &a->dev_attr.attr;
1117                         }
1118                         attrs++;
1119                         su++;
1120                         t++;
1121                 }
1122         }
1123
1124         return group;
1125 }
1126
1127 static bool is_word_sized(struct nct6775_data *data, u16 reg)
1128 {
1129         switch (data->kind) {
1130         case nct6106:
1131                 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1132                   reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
1133                   reg == 0x111 || reg == 0x121 || reg == 0x131;
1134         case nct6775:
1135                 return (((reg & 0xff00) == 0x100 ||
1136                     (reg & 0xff00) == 0x200) &&
1137                    ((reg & 0x00ff) == 0x50 ||
1138                     (reg & 0x00ff) == 0x53 ||
1139                     (reg & 0x00ff) == 0x55)) ||
1140                   (reg & 0xfff0) == 0x630 ||
1141                   reg == 0x640 || reg == 0x642 ||
1142                   reg == 0x662 ||
1143                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1144                   reg == 0x73 || reg == 0x75 || reg == 0x77;
1145         case nct6776:
1146                 return (((reg & 0xff00) == 0x100 ||
1147                     (reg & 0xff00) == 0x200) &&
1148                    ((reg & 0x00ff) == 0x50 ||
1149                     (reg & 0x00ff) == 0x53 ||
1150                     (reg & 0x00ff) == 0x55)) ||
1151                   (reg & 0xfff0) == 0x630 ||
1152                   reg == 0x402 ||
1153                   reg == 0x640 || reg == 0x642 ||
1154                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1155                   reg == 0x73 || reg == 0x75 || reg == 0x77;
1156         case nct6779:
1157         case nct6791:
1158         case nct6792:
1159         case nct6793:
1160                 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
1161                   ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x0b) ||
1162                   reg == 0x402 ||
1163                   reg == 0x63a || reg == 0x63c || reg == 0x63e ||
1164                   reg == 0x640 || reg == 0x642 ||
1165                   reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
1166                   reg == 0x7b || reg == 0x7d;
1167         }
1168         return false;
1169 }
1170
1171 /*
1172  * On older chips, only registers 0x50-0x5f are banked.
1173  * On more recent chips, all registers are banked.
1174  * Assume that is the case and set the bank number for each access.
1175  * Cache the bank number so it only needs to be set if it changes.
1176  */
1177 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
1178 {
1179         u8 bank = reg >> 8;
1180
1181         if (data->bank != bank) {
1182                 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
1183                 outb_p(bank, data->addr + DATA_REG_OFFSET);
1184                 data->bank = bank;
1185         }
1186 }
1187
1188 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
1189 {
1190         int res, word_sized = is_word_sized(data, reg);
1191
1192         nct6775_set_bank(data, reg);
1193         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1194         res = inb_p(data->addr + DATA_REG_OFFSET);
1195         if (word_sized) {
1196                 outb_p((reg & 0xff) + 1,
1197                        data->addr + ADDR_REG_OFFSET);
1198                 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
1199         }
1200         return res;
1201 }
1202
1203 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
1204 {
1205         int word_sized = is_word_sized(data, reg);
1206
1207         nct6775_set_bank(data, reg);
1208         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1209         if (word_sized) {
1210                 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
1211                 outb_p((reg & 0xff) + 1,
1212                        data->addr + ADDR_REG_OFFSET);
1213         }
1214         outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
1215         return 0;
1216 }
1217
1218 /* We left-align 8-bit temperature values to make the code simpler */
1219 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
1220 {
1221         u16 res;
1222
1223         res = nct6775_read_value(data, reg);
1224         if (!is_word_sized(data, reg))
1225                 res <<= 8;
1226
1227         return res;
1228 }
1229
1230 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
1231 {
1232         if (!is_word_sized(data, reg))
1233                 value >>= 8;
1234         return nct6775_write_value(data, reg, value);
1235 }
1236
1237 /* This function assumes that the caller holds data->update_lock */
1238 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
1239 {
1240         u8 reg;
1241
1242         switch (nr) {
1243         case 0:
1244                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
1245                     | (data->fan_div[0] & 0x7);
1246                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1247                 break;
1248         case 1:
1249                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
1250                     | ((data->fan_div[1] << 4) & 0x70);
1251                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1252                 break;
1253         case 2:
1254                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
1255                     | (data->fan_div[2] & 0x7);
1256                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1257                 break;
1258         case 3:
1259                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
1260                     | ((data->fan_div[3] << 4) & 0x70);
1261                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1262                 break;
1263         }
1264 }
1265
1266 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
1267 {
1268         if (data->kind == nct6775)
1269                 nct6775_write_fan_div(data, nr);
1270 }
1271
1272 static void nct6775_update_fan_div(struct nct6775_data *data)
1273 {
1274         u8 i;
1275
1276         i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
1277         data->fan_div[0] = i & 0x7;
1278         data->fan_div[1] = (i & 0x70) >> 4;
1279         i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
1280         data->fan_div[2] = i & 0x7;
1281         if (data->has_fan & (1 << 3))
1282                 data->fan_div[3] = (i & 0x70) >> 4;
1283 }
1284
1285 static void nct6775_update_fan_div_common(struct nct6775_data *data)
1286 {
1287         if (data->kind == nct6775)
1288                 nct6775_update_fan_div(data);
1289 }
1290
1291 static void nct6775_init_fan_div(struct nct6775_data *data)
1292 {
1293         int i;
1294
1295         nct6775_update_fan_div_common(data);
1296         /*
1297          * For all fans, start with highest divider value if the divider
1298          * register is not initialized. This ensures that we get a
1299          * reading from the fan count register, even if it is not optimal.
1300          * We'll compute a better divider later on.
1301          */
1302         for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
1303                 if (!(data->has_fan & (1 << i)))
1304                         continue;
1305                 if (data->fan_div[i] == 0) {
1306                         data->fan_div[i] = 7;
1307                         nct6775_write_fan_div_common(data, i);
1308                 }
1309         }
1310 }
1311
1312 static void nct6775_init_fan_common(struct device *dev,
1313                                     struct nct6775_data *data)
1314 {
1315         int i;
1316         u8 reg;
1317
1318         if (data->has_fan_div)
1319                 nct6775_init_fan_div(data);
1320
1321         /*
1322          * If fan_min is not set (0), set it to 0xff to disable it. This
1323          * prevents the unnecessary warning when fanX_min is reported as 0.
1324          */
1325         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1326                 if (data->has_fan_min & (1 << i)) {
1327                         reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
1328                         if (!reg)
1329                                 nct6775_write_value(data, data->REG_FAN_MIN[i],
1330                                                     data->has_fan_div ? 0xff
1331                                                                       : 0xff1f);
1332                 }
1333         }
1334 }
1335
1336 static void nct6775_select_fan_div(struct device *dev,
1337                                    struct nct6775_data *data, int nr, u16 reg)
1338 {
1339         u8 fan_div = data->fan_div[nr];
1340         u16 fan_min;
1341
1342         if (!data->has_fan_div)
1343                 return;
1344
1345         /*
1346          * If we failed to measure the fan speed, or the reported value is not
1347          * in the optimal range, and the clock divider can be modified,
1348          * let's try that for next time.
1349          */
1350         if (reg == 0x00 && fan_div < 0x07)
1351                 fan_div++;
1352         else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1353                 fan_div--;
1354
1355         if (fan_div != data->fan_div[nr]) {
1356                 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1357                         nr + 1, div_from_reg(data->fan_div[nr]),
1358                         div_from_reg(fan_div));
1359
1360                 /* Preserve min limit if possible */
1361                 if (data->has_fan_min & (1 << nr)) {
1362                         fan_min = data->fan_min[nr];
1363                         if (fan_div > data->fan_div[nr]) {
1364                                 if (fan_min != 255 && fan_min > 1)
1365                                         fan_min >>= 1;
1366                         } else {
1367                                 if (fan_min != 255) {
1368                                         fan_min <<= 1;
1369                                         if (fan_min > 254)
1370                                                 fan_min = 254;
1371                                 }
1372                         }
1373                         if (fan_min != data->fan_min[nr]) {
1374                                 data->fan_min[nr] = fan_min;
1375                                 nct6775_write_value(data, data->REG_FAN_MIN[nr],
1376                                                     fan_min);
1377                         }
1378                 }
1379                 data->fan_div[nr] = fan_div;
1380                 nct6775_write_fan_div_common(data, nr);
1381         }
1382 }
1383
1384 static void nct6775_update_pwm(struct device *dev)
1385 {
1386         struct nct6775_data *data = dev_get_drvdata(dev);
1387         int i, j;
1388         int fanmodecfg, reg;
1389         bool duty_is_dc;
1390
1391         for (i = 0; i < data->pwm_num; i++) {
1392                 if (!(data->has_pwm & (1 << i)))
1393                         continue;
1394
1395                 duty_is_dc = data->REG_PWM_MODE[i] &&
1396                   (nct6775_read_value(data, data->REG_PWM_MODE[i])
1397                    & data->PWM_MODE_MASK[i]);
1398                 data->pwm_mode[i] = duty_is_dc;
1399
1400                 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
1401                 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1402                         if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1403                                 data->pwm[j][i]
1404                                   = nct6775_read_value(data,
1405                                                        data->REG_PWM[j][i]);
1406                         }
1407                 }
1408
1409                 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1410                                                         (fanmodecfg >> 4) & 7);
1411
1412                 if (!data->temp_tolerance[0][i] ||
1413                     data->pwm_enable[i] != speed_cruise)
1414                         data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1415                 if (!data->target_speed_tolerance[i] ||
1416                     data->pwm_enable[i] == speed_cruise) {
1417                         u8 t = fanmodecfg & 0x0f;
1418
1419                         if (data->REG_TOLERANCE_H) {
1420                                 t |= (nct6775_read_value(data,
1421                                       data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
1422                         }
1423                         data->target_speed_tolerance[i] = t;
1424                 }
1425
1426                 data->temp_tolerance[1][i] =
1427                         nct6775_read_value(data,
1428                                         data->REG_CRITICAL_TEMP_TOLERANCE[i]);
1429
1430                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
1431                 data->pwm_temp_sel[i] = reg & 0x1f;
1432                 /* If fan can stop, report floor as 0 */
1433                 if (reg & 0x80)
1434                         data->pwm[2][i] = 0;
1435
1436                 if (!data->REG_WEIGHT_TEMP_SEL[i])
1437                         continue;
1438
1439                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
1440                 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1441                 /* If weight is disabled, report weight source as 0 */
1442                 if (j == 1 && !(reg & 0x80))
1443                         data->pwm_weight_temp_sel[i] = 0;
1444
1445                 /* Weight temp data */
1446                 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
1447                         data->weight_temp[j][i]
1448                           = nct6775_read_value(data,
1449                                                data->REG_WEIGHT_TEMP[j][i]);
1450                 }
1451         }
1452 }
1453
1454 static void nct6775_update_pwm_limits(struct device *dev)
1455 {
1456         struct nct6775_data *data = dev_get_drvdata(dev);
1457         int i, j;
1458         u8 reg;
1459         u16 reg_t;
1460
1461         for (i = 0; i < data->pwm_num; i++) {
1462                 if (!(data->has_pwm & (1 << i)))
1463                         continue;
1464
1465                 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1466                         data->fan_time[j][i] =
1467                           nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1468                 }
1469
1470                 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1471                 /* Update only in matching mode or if never updated */
1472                 if (!data->target_temp[i] ||
1473                     data->pwm_enable[i] == thermal_cruise)
1474                         data->target_temp[i] = reg_t & data->target_temp_mask;
1475                 if (!data->target_speed[i] ||
1476                     data->pwm_enable[i] == speed_cruise) {
1477                         if (data->REG_TOLERANCE_H) {
1478                                 reg_t |= (nct6775_read_value(data,
1479                                         data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1480                         }
1481                         data->target_speed[i] = reg_t;
1482                 }
1483
1484                 for (j = 0; j < data->auto_pwm_num; j++) {
1485                         data->auto_pwm[i][j] =
1486                           nct6775_read_value(data,
1487                                              NCT6775_AUTO_PWM(data, i, j));
1488                         data->auto_temp[i][j] =
1489                           nct6775_read_value(data,
1490                                              NCT6775_AUTO_TEMP(data, i, j));
1491                 }
1492
1493                 /* critical auto_pwm temperature data */
1494                 data->auto_temp[i][data->auto_pwm_num] =
1495                         nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1496
1497                 switch (data->kind) {
1498                 case nct6775:
1499                         reg = nct6775_read_value(data,
1500                                                  NCT6775_REG_CRITICAL_ENAB[i]);
1501                         data->auto_pwm[i][data->auto_pwm_num] =
1502                                                 (reg & 0x02) ? 0xff : 0x00;
1503                         break;
1504                 case nct6776:
1505                         data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1506                         break;
1507                 case nct6106:
1508                 case nct6779:
1509                 case nct6791:
1510                 case nct6792:
1511                 case nct6793:
1512                         reg = nct6775_read_value(data,
1513                                         data->REG_CRITICAL_PWM_ENABLE[i]);
1514                         if (reg & data->CRITICAL_PWM_ENABLE_MASK)
1515                                 reg = nct6775_read_value(data,
1516                                         data->REG_CRITICAL_PWM[i]);
1517                         else
1518                                 reg = 0xff;
1519                         data->auto_pwm[i][data->auto_pwm_num] = reg;
1520                         break;
1521                 }
1522         }
1523 }
1524
1525 static struct nct6775_data *nct6775_update_device(struct device *dev)
1526 {
1527         struct nct6775_data *data = dev_get_drvdata(dev);
1528         int i, j;
1529
1530         mutex_lock(&data->update_lock);
1531
1532         if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1533             || !data->valid) {
1534                 /* Fan clock dividers */
1535                 nct6775_update_fan_div_common(data);
1536
1537                 /* Measured voltages and limits */
1538                 for (i = 0; i < data->in_num; i++) {
1539                         if (!(data->have_in & (1 << i)))
1540                                 continue;
1541
1542                         data->in[i][0] = nct6775_read_value(data,
1543                                                             data->REG_VIN[i]);
1544                         data->in[i][1] = nct6775_read_value(data,
1545                                           data->REG_IN_MINMAX[0][i]);
1546                         data->in[i][2] = nct6775_read_value(data,
1547                                           data->REG_IN_MINMAX[1][i]);
1548                 }
1549
1550                 /* Measured fan speeds and limits */
1551                 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
1552                         u16 reg;
1553
1554                         if (!(data->has_fan & (1 << i)))
1555                                 continue;
1556
1557                         reg = nct6775_read_value(data, data->REG_FAN[i]);
1558                         data->rpm[i] = data->fan_from_reg(reg,
1559                                                           data->fan_div[i]);
1560
1561                         if (data->has_fan_min & (1 << i))
1562                                 data->fan_min[i] = nct6775_read_value(data,
1563                                            data->REG_FAN_MIN[i]);
1564                         data->fan_pulses[i] =
1565                           (nct6775_read_value(data, data->REG_FAN_PULSES[i])
1566                                 >> data->FAN_PULSE_SHIFT[i]) & 0x03;
1567
1568                         nct6775_select_fan_div(dev, data, i, reg);
1569                 }
1570
1571                 nct6775_update_pwm(dev);
1572                 nct6775_update_pwm_limits(dev);
1573
1574                 /* Measured temperatures and limits */
1575                 for (i = 0; i < NUM_TEMP; i++) {
1576                         if (!(data->have_temp & (1 << i)))
1577                                 continue;
1578                         for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1579                                 if (data->reg_temp[j][i])
1580                                         data->temp[j][i]
1581                                           = nct6775_read_temp(data,
1582                                                 data->reg_temp[j][i]);
1583                         }
1584                         if (i >= NUM_TEMP_FIXED ||
1585                             !(data->have_temp_fixed & (1 << i)))
1586                                 continue;
1587                         data->temp_offset[i]
1588                           = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1589                 }
1590
1591                 data->alarms = 0;
1592                 for (i = 0; i < NUM_REG_ALARM; i++) {
1593                         u8 alarm;
1594
1595                         if (!data->REG_ALARM[i])
1596                                 continue;
1597                         alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1598                         data->alarms |= ((u64)alarm) << (i << 3);
1599                 }
1600
1601                 data->beeps = 0;
1602                 for (i = 0; i < NUM_REG_BEEP; i++) {
1603                         u8 beep;
1604
1605                         if (!data->REG_BEEP[i])
1606                                 continue;
1607                         beep = nct6775_read_value(data, data->REG_BEEP[i]);
1608                         data->beeps |= ((u64)beep) << (i << 3);
1609                 }
1610
1611                 data->last_updated = jiffies;
1612                 data->valid = true;
1613         }
1614
1615         mutex_unlock(&data->update_lock);
1616         return data;
1617 }
1618
1619 /*
1620  * Sysfs callback functions
1621  */
1622 static ssize_t
1623 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1624 {
1625         struct nct6775_data *data = nct6775_update_device(dev);
1626         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1627         int index = sattr->index;
1628         int nr = sattr->nr;
1629
1630         return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1631 }
1632
1633 static ssize_t
1634 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1635              size_t count)
1636 {
1637         struct nct6775_data *data = dev_get_drvdata(dev);
1638         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1639         int index = sattr->index;
1640         int nr = sattr->nr;
1641         unsigned long val;
1642         int err;
1643
1644         err = kstrtoul(buf, 10, &val);
1645         if (err < 0)
1646                 return err;
1647         mutex_lock(&data->update_lock);
1648         data->in[nr][index] = in_to_reg(val, nr);
1649         nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr],
1650                             data->in[nr][index]);
1651         mutex_unlock(&data->update_lock);
1652         return count;
1653 }
1654
1655 static ssize_t
1656 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1657 {
1658         struct nct6775_data *data = nct6775_update_device(dev);
1659         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1660         int nr = data->ALARM_BITS[sattr->index];
1661
1662         return sprintf(buf, "%u\n",
1663                        (unsigned int)((data->alarms >> nr) & 0x01));
1664 }
1665
1666 static int find_temp_source(struct nct6775_data *data, int index, int count)
1667 {
1668         int source = data->temp_src[index];
1669         int nr;
1670
1671         for (nr = 0; nr < count; nr++) {
1672                 int src;
1673
1674                 src = nct6775_read_value(data,
1675                                          data->REG_TEMP_SOURCE[nr]) & 0x1f;
1676                 if (src == source)
1677                         return nr;
1678         }
1679         return -ENODEV;
1680 }
1681
1682 static ssize_t
1683 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1684 {
1685         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1686         struct nct6775_data *data = nct6775_update_device(dev);
1687         unsigned int alarm = 0;
1688         int nr;
1689
1690         /*
1691          * For temperatures, there is no fixed mapping from registers to alarm
1692          * bits. Alarm bits are determined by the temperature source mapping.
1693          */
1694         nr = find_temp_source(data, sattr->index, data->num_temp_alarms);
1695         if (nr >= 0) {
1696                 int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE];
1697
1698                 alarm = (data->alarms >> bit) & 0x01;
1699         }
1700         return sprintf(buf, "%u\n", alarm);
1701 }
1702
1703 static ssize_t
1704 show_beep(struct device *dev, struct device_attribute *attr, char *buf)
1705 {
1706         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1707         struct nct6775_data *data = nct6775_update_device(dev);
1708         int nr = data->BEEP_BITS[sattr->index];
1709
1710         return sprintf(buf, "%u\n",
1711                        (unsigned int)((data->beeps >> nr) & 0x01));
1712 }
1713
1714 static ssize_t
1715 store_beep(struct device *dev, struct device_attribute *attr, const char *buf,
1716            size_t count)
1717 {
1718         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1719         struct nct6775_data *data = dev_get_drvdata(dev);
1720         int nr = data->BEEP_BITS[sattr->index];
1721         int regindex = nr >> 3;
1722         unsigned long val;
1723         int err;
1724
1725         err = kstrtoul(buf, 10, &val);
1726         if (err < 0)
1727                 return err;
1728         if (val > 1)
1729                 return -EINVAL;
1730
1731         mutex_lock(&data->update_lock);
1732         if (val)
1733                 data->beeps |= (1ULL << nr);
1734         else
1735                 data->beeps &= ~(1ULL << nr);
1736         nct6775_write_value(data, data->REG_BEEP[regindex],
1737                             (data->beeps >> (regindex << 3)) & 0xff);
1738         mutex_unlock(&data->update_lock);
1739         return count;
1740 }
1741
1742 static ssize_t
1743 show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf)
1744 {
1745         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1746         struct nct6775_data *data = nct6775_update_device(dev);
1747         unsigned int beep = 0;
1748         int nr;
1749
1750         /*
1751          * For temperatures, there is no fixed mapping from registers to beep
1752          * enable bits. Beep enable bits are determined by the temperature
1753          * source mapping.
1754          */
1755         nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1756         if (nr >= 0) {
1757                 int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1758
1759                 beep = (data->beeps >> bit) & 0x01;
1760         }
1761         return sprintf(buf, "%u\n", beep);
1762 }
1763
1764 static ssize_t
1765 store_temp_beep(struct device *dev, struct device_attribute *attr,
1766                 const char *buf, size_t count)
1767 {
1768         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1769         struct nct6775_data *data = dev_get_drvdata(dev);
1770         int nr, bit, regindex;
1771         unsigned long val;
1772         int err;
1773
1774         err = kstrtoul(buf, 10, &val);
1775         if (err < 0)
1776                 return err;
1777         if (val > 1)
1778                 return -EINVAL;
1779
1780         nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1781         if (nr < 0)
1782                 return nr;
1783
1784         bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1785         regindex = bit >> 3;
1786
1787         mutex_lock(&data->update_lock);
1788         if (val)
1789                 data->beeps |= (1ULL << bit);
1790         else
1791                 data->beeps &= ~(1ULL << bit);
1792         nct6775_write_value(data, data->REG_BEEP[regindex],
1793                             (data->beeps >> (regindex << 3)) & 0xff);
1794         mutex_unlock(&data->update_lock);
1795
1796         return count;
1797 }
1798
1799 static umode_t nct6775_in_is_visible(struct kobject *kobj,
1800                                      struct attribute *attr, int index)
1801 {
1802         struct device *dev = container_of(kobj, struct device, kobj);
1803         struct nct6775_data *data = dev_get_drvdata(dev);
1804         int in = index / 5;     /* voltage index */
1805
1806         if (!(data->have_in & (1 << in)))
1807                 return 0;
1808
1809         return attr->mode;
1810 }
1811
1812 SENSOR_TEMPLATE_2(in_input, "in%d_input", S_IRUGO, show_in_reg, NULL, 0, 0);
1813 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", S_IRUGO, show_alarm, NULL, 0);
1814 SENSOR_TEMPLATE(in_beep, "in%d_beep", S_IWUSR | S_IRUGO, show_beep, store_beep,
1815                 0);
1816 SENSOR_TEMPLATE_2(in_min, "in%d_min", S_IWUSR | S_IRUGO, show_in_reg,
1817                   store_in_reg, 0, 1);
1818 SENSOR_TEMPLATE_2(in_max, "in%d_max", S_IWUSR | S_IRUGO, show_in_reg,
1819                   store_in_reg, 0, 2);
1820
1821 /*
1822  * nct6775_in_is_visible uses the index into the following array
1823  * to determine if attributes should be created or not.
1824  * Any change in order or content must be matched.
1825  */
1826 static struct sensor_device_template *nct6775_attributes_in_template[] = {
1827         &sensor_dev_template_in_input,
1828         &sensor_dev_template_in_alarm,
1829         &sensor_dev_template_in_beep,
1830         &sensor_dev_template_in_min,
1831         &sensor_dev_template_in_max,
1832         NULL
1833 };
1834
1835 static struct sensor_template_group nct6775_in_template_group = {
1836         .templates = nct6775_attributes_in_template,
1837         .is_visible = nct6775_in_is_visible,
1838 };
1839
1840 static ssize_t
1841 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1842 {
1843         struct nct6775_data *data = nct6775_update_device(dev);
1844         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1845         int nr = sattr->index;
1846
1847         return sprintf(buf, "%d\n", data->rpm[nr]);
1848 }
1849
1850 static ssize_t
1851 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1852 {
1853         struct nct6775_data *data = nct6775_update_device(dev);
1854         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1855         int nr = sattr->index;
1856
1857         return sprintf(buf, "%d\n",
1858                        data->fan_from_reg_min(data->fan_min[nr],
1859                                               data->fan_div[nr]));
1860 }
1861
1862 static ssize_t
1863 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1864 {
1865         struct nct6775_data *data = nct6775_update_device(dev);
1866         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1867         int nr = sattr->index;
1868
1869         return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1870 }
1871
1872 static ssize_t
1873 store_fan_min(struct device *dev, struct device_attribute *attr,
1874               const char *buf, size_t count)
1875 {
1876         struct nct6775_data *data = dev_get_drvdata(dev);
1877         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1878         int nr = sattr->index;
1879         unsigned long val;
1880         unsigned int reg;
1881         u8 new_div;
1882         int err;
1883
1884         err = kstrtoul(buf, 10, &val);
1885         if (err < 0)
1886                 return err;
1887
1888         mutex_lock(&data->update_lock);
1889         if (!data->has_fan_div) {
1890                 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1891                 if (!val) {
1892                         val = 0xff1f;
1893                 } else {
1894                         if (val > 1350000U)
1895                                 val = 135000U;
1896                         val = 1350000U / val;
1897                         val = (val & 0x1f) | ((val << 3) & 0xff00);
1898                 }
1899                 data->fan_min[nr] = val;
1900                 goto write_min; /* Leave fan divider alone */
1901         }
1902         if (!val) {
1903                 /* No min limit, alarm disabled */
1904                 data->fan_min[nr] = 255;
1905                 new_div = data->fan_div[nr]; /* No change */
1906                 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1907                 goto write_div;
1908         }
1909         reg = 1350000U / val;
1910         if (reg >= 128 * 255) {
1911                 /*
1912                  * Speed below this value cannot possibly be represented,
1913                  * even with the highest divider (128)
1914                  */
1915                 data->fan_min[nr] = 254;
1916                 new_div = 7; /* 128 == (1 << 7) */
1917                 dev_warn(dev,
1918                          "fan%u low limit %lu below minimum %u, set to minimum\n",
1919                          nr + 1, val, data->fan_from_reg_min(254, 7));
1920         } else if (!reg) {
1921                 /*
1922                  * Speed above this value cannot possibly be represented,
1923                  * even with the lowest divider (1)
1924                  */
1925                 data->fan_min[nr] = 1;
1926                 new_div = 0; /* 1 == (1 << 0) */
1927                 dev_warn(dev,
1928                          "fan%u low limit %lu above maximum %u, set to maximum\n",
1929                          nr + 1, val, data->fan_from_reg_min(1, 0));
1930         } else {
1931                 /*
1932                  * Automatically pick the best divider, i.e. the one such
1933                  * that the min limit will correspond to a register value
1934                  * in the 96..192 range
1935                  */
1936                 new_div = 0;
1937                 while (reg > 192 && new_div < 7) {
1938                         reg >>= 1;
1939                         new_div++;
1940                 }
1941                 data->fan_min[nr] = reg;
1942         }
1943
1944 write_div:
1945         /*
1946          * Write both the fan clock divider (if it changed) and the new
1947          * fan min (unconditionally)
1948          */
1949         if (new_div != data->fan_div[nr]) {
1950                 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1951                         nr + 1, div_from_reg(data->fan_div[nr]),
1952                         div_from_reg(new_div));
1953                 data->fan_div[nr] = new_div;
1954                 nct6775_write_fan_div_common(data, nr);
1955                 /* Give the chip time to sample a new speed value */
1956                 data->last_updated = jiffies;
1957         }
1958
1959 write_min:
1960         nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1961         mutex_unlock(&data->update_lock);
1962
1963         return count;
1964 }
1965
1966 static ssize_t
1967 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
1968 {
1969         struct nct6775_data *data = nct6775_update_device(dev);
1970         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1971         int p = data->fan_pulses[sattr->index];
1972
1973         return sprintf(buf, "%d\n", p ? : 4);
1974 }
1975
1976 static ssize_t
1977 store_fan_pulses(struct device *dev, struct device_attribute *attr,
1978                  const char *buf, size_t count)
1979 {
1980         struct nct6775_data *data = dev_get_drvdata(dev);
1981         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1982         int nr = sattr->index;
1983         unsigned long val;
1984         int err;
1985         u8 reg;
1986
1987         err = kstrtoul(buf, 10, &val);
1988         if (err < 0)
1989                 return err;
1990
1991         if (val > 4)
1992                 return -EINVAL;
1993
1994         mutex_lock(&data->update_lock);
1995         data->fan_pulses[nr] = val & 3;
1996         reg = nct6775_read_value(data, data->REG_FAN_PULSES[nr]);
1997         reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
1998         reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
1999         nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
2000         mutex_unlock(&data->update_lock);
2001
2002         return count;
2003 }
2004
2005 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
2006                                       struct attribute *attr, int index)
2007 {
2008         struct device *dev = container_of(kobj, struct device, kobj);
2009         struct nct6775_data *data = dev_get_drvdata(dev);
2010         int fan = index / 6;    /* fan index */
2011         int nr = index % 6;     /* attribute index */
2012
2013         if (!(data->has_fan & (1 << fan)))
2014                 return 0;
2015
2016         if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1)
2017                 return 0;
2018         if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1)
2019                 return 0;
2020         if (nr == 4 && !(data->has_fan_min & (1 << fan)))
2021                 return 0;
2022         if (nr == 5 && data->kind != nct6775)
2023                 return 0;
2024
2025         return attr->mode;
2026 }
2027
2028 SENSOR_TEMPLATE(fan_input, "fan%d_input", S_IRUGO, show_fan, NULL, 0);
2029 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", S_IRUGO, show_alarm, NULL,
2030                 FAN_ALARM_BASE);
2031 SENSOR_TEMPLATE(fan_beep, "fan%d_beep", S_IWUSR | S_IRUGO, show_beep,
2032                 store_beep, FAN_ALARM_BASE);
2033 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", S_IWUSR | S_IRUGO, show_fan_pulses,
2034                 store_fan_pulses, 0);
2035 SENSOR_TEMPLATE(fan_min, "fan%d_min", S_IWUSR | S_IRUGO, show_fan_min,
2036                 store_fan_min, 0);
2037 SENSOR_TEMPLATE(fan_div, "fan%d_div", S_IRUGO, show_fan_div, NULL, 0);
2038
2039 /*
2040  * nct6775_fan_is_visible uses the index into the following array
2041  * to determine if attributes should be created or not.
2042  * Any change in order or content must be matched.
2043  */
2044 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
2045         &sensor_dev_template_fan_input,
2046         &sensor_dev_template_fan_alarm, /* 1 */
2047         &sensor_dev_template_fan_beep,  /* 2 */
2048         &sensor_dev_template_fan_pulses,
2049         &sensor_dev_template_fan_min,   /* 4 */
2050         &sensor_dev_template_fan_div,   /* 5 */
2051         NULL
2052 };
2053
2054 static struct sensor_template_group nct6775_fan_template_group = {
2055         .templates = nct6775_attributes_fan_template,
2056         .is_visible = nct6775_fan_is_visible,
2057         .base = 1,
2058 };
2059
2060 static ssize_t
2061 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
2062 {
2063         struct nct6775_data *data = nct6775_update_device(dev);
2064         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2065         int nr = sattr->index;
2066
2067         return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
2068 }
2069
2070 static ssize_t
2071 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
2072 {
2073         struct nct6775_data *data = nct6775_update_device(dev);
2074         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2075         int nr = sattr->nr;
2076         int index = sattr->index;
2077
2078         return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
2079 }
2080
2081 static ssize_t
2082 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
2083            size_t count)
2084 {
2085         struct nct6775_data *data = dev_get_drvdata(dev);
2086         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2087         int nr = sattr->nr;
2088         int index = sattr->index;
2089         int err;
2090         long val;
2091
2092         err = kstrtol(buf, 10, &val);
2093         if (err < 0)
2094                 return err;
2095
2096         mutex_lock(&data->update_lock);
2097         data->temp[index][nr] = LM75_TEMP_TO_REG(val);
2098         nct6775_write_temp(data, data->reg_temp[index][nr],
2099                            data->temp[index][nr]);
2100         mutex_unlock(&data->update_lock);
2101         return count;
2102 }
2103
2104 static ssize_t
2105 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
2106 {
2107         struct nct6775_data *data = nct6775_update_device(dev);
2108         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2109
2110         return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
2111 }
2112
2113 static ssize_t
2114 store_temp_offset(struct device *dev, struct device_attribute *attr,
2115                   const char *buf, size_t count)
2116 {
2117         struct nct6775_data *data = dev_get_drvdata(dev);
2118         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2119         int nr = sattr->index;
2120         long val;
2121         int err;
2122
2123         err = kstrtol(buf, 10, &val);
2124         if (err < 0)
2125                 return err;
2126
2127         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
2128
2129         mutex_lock(&data->update_lock);
2130         data->temp_offset[nr] = val;
2131         nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
2132         mutex_unlock(&data->update_lock);
2133
2134         return count;
2135 }
2136
2137 static ssize_t
2138 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
2139 {
2140         struct nct6775_data *data = nct6775_update_device(dev);
2141         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2142         int nr = sattr->index;
2143
2144         return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
2145 }
2146
2147 static ssize_t
2148 store_temp_type(struct device *dev, struct device_attribute *attr,
2149                 const char *buf, size_t count)
2150 {
2151         struct nct6775_data *data = nct6775_update_device(dev);
2152         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2153         int nr = sattr->index;
2154         unsigned long val;
2155         int err;
2156         u8 vbat, diode, vbit, dbit;
2157
2158         err = kstrtoul(buf, 10, &val);
2159         if (err < 0)
2160                 return err;
2161
2162         if (val != 1 && val != 3 && val != 4)
2163                 return -EINVAL;
2164
2165         mutex_lock(&data->update_lock);
2166
2167         data->temp_type[nr] = val;
2168         vbit = 0x02 << nr;
2169         dbit = data->DIODE_MASK << nr;
2170         vbat = nct6775_read_value(data, data->REG_VBAT) & ~vbit;
2171         diode = nct6775_read_value(data, data->REG_DIODE) & ~dbit;
2172         switch (val) {
2173         case 1: /* CPU diode (diode, current mode) */
2174                 vbat |= vbit;
2175                 diode |= dbit;
2176                 break;
2177         case 3: /* diode, voltage mode */
2178                 vbat |= dbit;
2179                 break;
2180         case 4: /* thermistor */
2181                 break;
2182         }
2183         nct6775_write_value(data, data->REG_VBAT, vbat);
2184         nct6775_write_value(data, data->REG_DIODE, diode);
2185
2186         mutex_unlock(&data->update_lock);
2187         return count;
2188 }
2189
2190 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
2191                                        struct attribute *attr, int index)
2192 {
2193         struct device *dev = container_of(kobj, struct device, kobj);
2194         struct nct6775_data *data = dev_get_drvdata(dev);
2195         int temp = index / 10;  /* temp index */
2196         int nr = index % 10;    /* attribute index */
2197
2198         if (!(data->have_temp & (1 << temp)))
2199                 return 0;
2200
2201         if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0)
2202                 return 0;                               /* alarm */
2203
2204         if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0)
2205                 return 0;                               /* beep */
2206
2207         if (nr == 4 && !data->reg_temp[1][temp])        /* max */
2208                 return 0;
2209
2210         if (nr == 5 && !data->reg_temp[2][temp])        /* max_hyst */
2211                 return 0;
2212
2213         if (nr == 6 && !data->reg_temp[3][temp])        /* crit */
2214                 return 0;
2215
2216         if (nr == 7 && !data->reg_temp[4][temp])        /* lcrit */
2217                 return 0;
2218
2219         /* offset and type only apply to fixed sensors */
2220         if (nr > 7 && !(data->have_temp_fixed & (1 << temp)))
2221                 return 0;
2222
2223         return attr->mode;
2224 }
2225
2226 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", S_IRUGO, show_temp, NULL, 0, 0);
2227 SENSOR_TEMPLATE(temp_label, "temp%d_label", S_IRUGO, show_temp_label, NULL, 0);
2228 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", S_IRUGO | S_IWUSR, show_temp,
2229                   store_temp, 0, 1);
2230 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", S_IRUGO | S_IWUSR,
2231                   show_temp, store_temp, 0, 2);
2232 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", S_IRUGO | S_IWUSR, show_temp,
2233                   store_temp, 0, 3);
2234 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", S_IRUGO | S_IWUSR, show_temp,
2235                   store_temp, 0, 4);
2236 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", S_IRUGO | S_IWUSR,
2237                 show_temp_offset, store_temp_offset, 0);
2238 SENSOR_TEMPLATE(temp_type, "temp%d_type", S_IRUGO | S_IWUSR, show_temp_type,
2239                 store_temp_type, 0);
2240 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", S_IRUGO, show_temp_alarm, NULL, 0);
2241 SENSOR_TEMPLATE(temp_beep, "temp%d_beep", S_IRUGO | S_IWUSR, show_temp_beep,
2242                 store_temp_beep, 0);
2243
2244 /*
2245  * nct6775_temp_is_visible uses the index into the following array
2246  * to determine if attributes should be created or not.
2247  * Any change in order or content must be matched.
2248  */
2249 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
2250         &sensor_dev_template_temp_input,
2251         &sensor_dev_template_temp_label,
2252         &sensor_dev_template_temp_alarm,        /* 2 */
2253         &sensor_dev_template_temp_beep,         /* 3 */
2254         &sensor_dev_template_temp_max,          /* 4 */
2255         &sensor_dev_template_temp_max_hyst,     /* 5 */
2256         &sensor_dev_template_temp_crit,         /* 6 */
2257         &sensor_dev_template_temp_lcrit,        /* 7 */
2258         &sensor_dev_template_temp_offset,       /* 8 */
2259         &sensor_dev_template_temp_type,         /* 9 */
2260         NULL
2261 };
2262
2263 static struct sensor_template_group nct6775_temp_template_group = {
2264         .templates = nct6775_attributes_temp_template,
2265         .is_visible = nct6775_temp_is_visible,
2266         .base = 1,
2267 };
2268
2269 static ssize_t
2270 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
2271 {
2272         struct nct6775_data *data = nct6775_update_device(dev);
2273         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2274
2275         return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
2276 }
2277
2278 static ssize_t
2279 store_pwm_mode(struct device *dev, struct device_attribute *attr,
2280                const char *buf, size_t count)
2281 {
2282         struct nct6775_data *data = dev_get_drvdata(dev);
2283         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2284         int nr = sattr->index;
2285         unsigned long val;
2286         int err;
2287         u8 reg;
2288
2289         err = kstrtoul(buf, 10, &val);
2290         if (err < 0)
2291                 return err;
2292
2293         if (val > 1)
2294                 return -EINVAL;
2295
2296         /* Setting DC mode is not supported for all chips/channels */
2297         if (data->REG_PWM_MODE[nr] == 0) {
2298                 if (val)
2299                         return -EINVAL;
2300                 return count;
2301         }
2302
2303         mutex_lock(&data->update_lock);
2304         data->pwm_mode[nr] = val;
2305         reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
2306         reg &= ~data->PWM_MODE_MASK[nr];
2307         if (val)
2308                 reg |= data->PWM_MODE_MASK[nr];
2309         nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
2310         mutex_unlock(&data->update_lock);
2311         return count;
2312 }
2313
2314 static ssize_t
2315 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2316 {
2317         struct nct6775_data *data = nct6775_update_device(dev);
2318         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2319         int nr = sattr->nr;
2320         int index = sattr->index;
2321         int pwm;
2322
2323         /*
2324          * For automatic fan control modes, show current pwm readings.
2325          * Otherwise, show the configured value.
2326          */
2327         if (index == 0 && data->pwm_enable[nr] > manual)
2328                 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
2329         else
2330                 pwm = data->pwm[index][nr];
2331
2332         return sprintf(buf, "%d\n", pwm);
2333 }
2334
2335 static ssize_t
2336 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
2337           size_t count)
2338 {
2339         struct nct6775_data *data = dev_get_drvdata(dev);
2340         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2341         int nr = sattr->nr;
2342         int index = sattr->index;
2343         unsigned long val;
2344         int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
2345         int maxval[7]
2346           = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
2347         int err;
2348         u8 reg;
2349
2350         err = kstrtoul(buf, 10, &val);
2351         if (err < 0)
2352                 return err;
2353         val = clamp_val(val, minval[index], maxval[index]);
2354
2355         mutex_lock(&data->update_lock);
2356         data->pwm[index][nr] = val;
2357         nct6775_write_value(data, data->REG_PWM[index][nr], val);
2358         if (index == 2) { /* floor: disable if val == 0 */
2359                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2360                 reg &= 0x7f;
2361                 if (val)
2362                         reg |= 0x80;
2363                 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2364         }
2365         mutex_unlock(&data->update_lock);
2366         return count;
2367 }
2368
2369 /* Returns 0 if OK, -EINVAL otherwise */
2370 static int check_trip_points(struct nct6775_data *data, int nr)
2371 {
2372         int i;
2373
2374         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2375                 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
2376                         return -EINVAL;
2377         }
2378         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2379                 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
2380                         return -EINVAL;
2381         }
2382         /* validate critical temperature and pwm if enabled (pwm > 0) */
2383         if (data->auto_pwm[nr][data->auto_pwm_num]) {
2384                 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2385                                 data->auto_temp[nr][data->auto_pwm_num] ||
2386                     data->auto_pwm[nr][data->auto_pwm_num - 1] >
2387                                 data->auto_pwm[nr][data->auto_pwm_num])
2388                         return -EINVAL;
2389         }
2390         return 0;
2391 }
2392
2393 static void pwm_update_registers(struct nct6775_data *data, int nr)
2394 {
2395         u8 reg;
2396
2397         switch (data->pwm_enable[nr]) {
2398         case off:
2399         case manual:
2400                 break;
2401         case speed_cruise:
2402                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2403                 reg = (reg & ~data->tolerance_mask) |
2404                   (data->target_speed_tolerance[nr] & data->tolerance_mask);
2405                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2406                 nct6775_write_value(data, data->REG_TARGET[nr],
2407                                     data->target_speed[nr] & 0xff);
2408                 if (data->REG_TOLERANCE_H) {
2409                         reg = (data->target_speed[nr] >> 8) & 0x0f;
2410                         reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2411                         nct6775_write_value(data,
2412                                             data->REG_TOLERANCE_H[nr],
2413                                             reg);
2414                 }
2415                 break;
2416         case thermal_cruise:
2417                 nct6775_write_value(data, data->REG_TARGET[nr],
2418                                     data->target_temp[nr]);
2419                 /* intentional */
2420         default:
2421                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2422                 reg = (reg & ~data->tolerance_mask) |
2423                   data->temp_tolerance[0][nr];
2424                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2425                 break;
2426         }
2427 }
2428
2429 static ssize_t
2430 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2431 {
2432         struct nct6775_data *data = nct6775_update_device(dev);
2433         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2434
2435         return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2436 }
2437
2438 static ssize_t
2439 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2440                  const char *buf, size_t count)
2441 {
2442         struct nct6775_data *data = dev_get_drvdata(dev);
2443         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2444         int nr = sattr->index;
2445         unsigned long val;
2446         int err;
2447         u16 reg;
2448
2449         err = kstrtoul(buf, 10, &val);
2450         if (err < 0)
2451                 return err;
2452
2453         if (val > sf4)
2454                 return -EINVAL;
2455
2456         if (val == sf3 && data->kind != nct6775)
2457                 return -EINVAL;
2458
2459         if (val == sf4 && check_trip_points(data, nr)) {
2460                 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2461                 dev_err(dev, "Adjust trip points and try again\n");
2462                 return -EINVAL;
2463         }
2464
2465         mutex_lock(&data->update_lock);
2466         data->pwm_enable[nr] = val;
2467         if (val == off) {
2468                 /*
2469                  * turn off pwm control: select manual mode, set pwm to maximum
2470                  */
2471                 data->pwm[0][nr] = 255;
2472                 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2473         }
2474         pwm_update_registers(data, nr);
2475         reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2476         reg &= 0x0f;
2477         reg |= pwm_enable_to_reg(val) << 4;
2478         nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2479         mutex_unlock(&data->update_lock);
2480         return count;
2481 }
2482
2483 static ssize_t
2484 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2485 {
2486         int i, sel = 0;
2487
2488         for (i = 0; i < NUM_TEMP; i++) {
2489                 if (!(data->have_temp & (1 << i)))
2490                         continue;
2491                 if (src == data->temp_src[i]) {
2492                         sel = i + 1;
2493                         break;
2494                 }
2495         }
2496
2497         return sprintf(buf, "%d\n", sel);
2498 }
2499
2500 static ssize_t
2501 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2502 {
2503         struct nct6775_data *data = nct6775_update_device(dev);
2504         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2505         int index = sattr->index;
2506
2507         return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2508 }
2509
2510 static ssize_t
2511 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2512                    const char *buf, size_t count)
2513 {
2514         struct nct6775_data *data = nct6775_update_device(dev);
2515         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2516         int nr = sattr->index;
2517         unsigned long val;
2518         int err, reg, src;
2519
2520         err = kstrtoul(buf, 10, &val);
2521         if (err < 0)
2522                 return err;
2523         if (val == 0 || val > NUM_TEMP)
2524                 return -EINVAL;
2525         if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
2526                 return -EINVAL;
2527
2528         mutex_lock(&data->update_lock);
2529         src = data->temp_src[val - 1];
2530         data->pwm_temp_sel[nr] = src;
2531         reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2532         reg &= 0xe0;
2533         reg |= src;
2534         nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2535         mutex_unlock(&data->update_lock);
2536
2537         return count;
2538 }
2539
2540 static ssize_t
2541 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2542                          char *buf)
2543 {
2544         struct nct6775_data *data = nct6775_update_device(dev);
2545         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2546         int index = sattr->index;
2547
2548         return show_pwm_temp_sel_common(data, buf,
2549                                         data->pwm_weight_temp_sel[index]);
2550 }
2551
2552 static ssize_t
2553 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2554                           const char *buf, size_t count)
2555 {
2556         struct nct6775_data *data = nct6775_update_device(dev);
2557         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2558         int nr = sattr->index;
2559         unsigned long val;
2560         int err, reg, src;
2561
2562         err = kstrtoul(buf, 10, &val);
2563         if (err < 0)
2564                 return err;
2565         if (val > NUM_TEMP)
2566                 return -EINVAL;
2567         if (val && (!(data->have_temp & (1 << (val - 1))) ||
2568                     !data->temp_src[val - 1]))
2569                 return -EINVAL;
2570
2571         mutex_lock(&data->update_lock);
2572         if (val) {
2573                 src = data->temp_src[val - 1];
2574                 data->pwm_weight_temp_sel[nr] = src;
2575                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2576                 reg &= 0xe0;
2577                 reg |= (src | 0x80);
2578                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2579         } else {
2580                 data->pwm_weight_temp_sel[nr] = 0;
2581                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2582                 reg &= 0x7f;
2583                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2584         }
2585         mutex_unlock(&data->update_lock);
2586
2587         return count;
2588 }
2589
2590 static ssize_t
2591 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2592 {
2593         struct nct6775_data *data = nct6775_update_device(dev);
2594         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2595
2596         return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2597 }
2598
2599 static ssize_t
2600 store_target_temp(struct device *dev, struct device_attribute *attr,
2601                   const char *buf, size_t count)
2602 {
2603         struct nct6775_data *data = dev_get_drvdata(dev);
2604         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2605         int nr = sattr->index;
2606         unsigned long val;
2607         int err;
2608
2609         err = kstrtoul(buf, 10, &val);
2610         if (err < 0)
2611                 return err;
2612
2613         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2614                         data->target_temp_mask);
2615
2616         mutex_lock(&data->update_lock);
2617         data->target_temp[nr] = val;
2618         pwm_update_registers(data, nr);
2619         mutex_unlock(&data->update_lock);
2620         return count;
2621 }
2622
2623 static ssize_t
2624 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2625 {
2626         struct nct6775_data *data = nct6775_update_device(dev);
2627         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2628         int nr = sattr->index;
2629
2630         return sprintf(buf, "%d\n",
2631                        fan_from_reg16(data->target_speed[nr],
2632                                       data->fan_div[nr]));
2633 }
2634
2635 static ssize_t
2636 store_target_speed(struct device *dev, struct device_attribute *attr,
2637                    const char *buf, size_t count)
2638 {
2639         struct nct6775_data *data = dev_get_drvdata(dev);
2640         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2641         int nr = sattr->index;
2642         unsigned long val;
2643         int err;
2644         u16 speed;
2645
2646         err = kstrtoul(buf, 10, &val);
2647         if (err < 0)
2648                 return err;
2649
2650         val = clamp_val(val, 0, 1350000U);
2651         speed = fan_to_reg(val, data->fan_div[nr]);
2652
2653         mutex_lock(&data->update_lock);
2654         data->target_speed[nr] = speed;
2655         pwm_update_registers(data, nr);
2656         mutex_unlock(&data->update_lock);
2657         return count;
2658 }
2659
2660 static ssize_t
2661 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2662                     char *buf)
2663 {
2664         struct nct6775_data *data = nct6775_update_device(dev);
2665         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2666         int nr = sattr->nr;
2667         int index = sattr->index;
2668
2669         return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2670 }
2671
2672 static ssize_t
2673 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2674                      const char *buf, size_t count)
2675 {
2676         struct nct6775_data *data = dev_get_drvdata(dev);
2677         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2678         int nr = sattr->nr;
2679         int index = sattr->index;
2680         unsigned long val;
2681         int err;
2682
2683         err = kstrtoul(buf, 10, &val);
2684         if (err < 0)
2685                 return err;
2686
2687         /* Limit tolerance as needed */
2688         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2689
2690         mutex_lock(&data->update_lock);
2691         data->temp_tolerance[index][nr] = val;
2692         if (index)
2693                 pwm_update_registers(data, nr);
2694         else
2695                 nct6775_write_value(data,
2696                                     data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2697                                     val);
2698         mutex_unlock(&data->update_lock);
2699         return count;
2700 }
2701
2702 /*
2703  * Fan speed tolerance is a tricky beast, since the associated register is
2704  * a tick counter, but the value is reported and configured as rpm.
2705  * Compute resulting low and high rpm values and report the difference.
2706  */
2707 static ssize_t
2708 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2709                      char *buf)
2710 {
2711         struct nct6775_data *data = nct6775_update_device(dev);
2712         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2713         int nr = sattr->index;
2714         int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2715         int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2716         int tolerance;
2717
2718         if (low <= 0)
2719                 low = 1;
2720         if (high > 0xffff)
2721                 high = 0xffff;
2722         if (high < low)
2723                 high = low;
2724
2725         tolerance = (fan_from_reg16(low, data->fan_div[nr])
2726                      - fan_from_reg16(high, data->fan_div[nr])) / 2;
2727
2728         return sprintf(buf, "%d\n", tolerance);
2729 }
2730
2731 static ssize_t
2732 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2733                       const char *buf, size_t count)
2734 {
2735         struct nct6775_data *data = dev_get_drvdata(dev);
2736         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2737         int nr = sattr->index;
2738         unsigned long val;
2739         int err;
2740         int low, high;
2741
2742         err = kstrtoul(buf, 10, &val);
2743         if (err < 0)
2744                 return err;
2745
2746         high = fan_from_reg16(data->target_speed[nr],
2747                               data->fan_div[nr]) + val;
2748         low = fan_from_reg16(data->target_speed[nr],
2749                              data->fan_div[nr]) - val;
2750         if (low <= 0)
2751                 low = 1;
2752         if (high < low)
2753                 high = low;
2754
2755         val = (fan_to_reg(low, data->fan_div[nr]) -
2756                fan_to_reg(high, data->fan_div[nr])) / 2;
2757
2758         /* Limit tolerance as needed */
2759         val = clamp_val(val, 0, data->speed_tolerance_limit);
2760
2761         mutex_lock(&data->update_lock);
2762         data->target_speed_tolerance[nr] = val;
2763         pwm_update_registers(data, nr);
2764         mutex_unlock(&data->update_lock);
2765         return count;
2766 }
2767
2768 SENSOR_TEMPLATE_2(pwm, "pwm%d", S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2769 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", S_IWUSR | S_IRUGO, show_pwm_mode,
2770                 store_pwm_mode, 0);
2771 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", S_IWUSR | S_IRUGO, show_pwm_enable,
2772                 store_pwm_enable, 0);
2773 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", S_IWUSR | S_IRUGO,
2774                 show_pwm_temp_sel, store_pwm_temp_sel, 0);
2775 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", S_IWUSR | S_IRUGO,
2776                 show_target_temp, store_target_temp, 0);
2777 SENSOR_TEMPLATE(fan_target, "fan%d_target", S_IWUSR | S_IRUGO,
2778                 show_target_speed, store_target_speed, 0);
2779 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", S_IWUSR | S_IRUGO,
2780                 show_speed_tolerance, store_speed_tolerance, 0);
2781
2782 /* Smart Fan registers */
2783
2784 static ssize_t
2785 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2786 {
2787         struct nct6775_data *data = nct6775_update_device(dev);
2788         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2789         int nr = sattr->nr;
2790         int index = sattr->index;
2791
2792         return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2793 }
2794
2795 static ssize_t
2796 store_weight_temp(struct device *dev, struct device_attribute *attr,
2797                   const char *buf, size_t count)
2798 {
2799         struct nct6775_data *data = dev_get_drvdata(dev);
2800         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2801         int nr = sattr->nr;
2802         int index = sattr->index;
2803         unsigned long val;
2804         int err;
2805
2806         err = kstrtoul(buf, 10, &val);
2807         if (err < 0)
2808                 return err;
2809
2810         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2811
2812         mutex_lock(&data->update_lock);
2813         data->weight_temp[index][nr] = val;
2814         nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2815         mutex_unlock(&data->update_lock);
2816         return count;
2817 }
2818
2819 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", S_IWUSR | S_IRUGO,
2820                   show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
2821 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step",
2822                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 0);
2823 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol",
2824                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 1);
2825 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base",
2826                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 2);
2827 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step",
2828                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 5);
2829 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base",
2830                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 6);
2831
2832 static ssize_t
2833 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2834 {
2835         struct nct6775_data *data = nct6775_update_device(dev);
2836         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2837         int nr = sattr->nr;
2838         int index = sattr->index;
2839
2840         return sprintf(buf, "%d\n",
2841                        step_time_from_reg(data->fan_time[index][nr],
2842                                           data->pwm_mode[nr]));
2843 }
2844
2845 static ssize_t
2846 store_fan_time(struct device *dev, struct device_attribute *attr,
2847                const char *buf, size_t count)
2848 {
2849         struct nct6775_data *data = dev_get_drvdata(dev);
2850         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2851         int nr = sattr->nr;
2852         int index = sattr->index;
2853         unsigned long val;
2854         int err;
2855
2856         err = kstrtoul(buf, 10, &val);
2857         if (err < 0)
2858                 return err;
2859
2860         val = step_time_to_reg(val, data->pwm_mode[nr]);
2861         mutex_lock(&data->update_lock);
2862         data->fan_time[index][nr] = val;
2863         nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2864         mutex_unlock(&data->update_lock);
2865         return count;
2866 }
2867
2868 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
2869 static ssize_t
2870 show_name(struct device *dev, struct device_attribute *attr, char *buf)
2871 {
2872         struct nct6775_data *data = dev_get_drvdata(dev);
2873
2874         return sprintf(buf, "%s\n", data->name);
2875 }
2876
2877 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
2878 #endif
2879
2880 static ssize_t
2881 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2882 {
2883         struct nct6775_data *data = nct6775_update_device(dev);
2884         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2885
2886         return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2887 }
2888
2889 static ssize_t
2890 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2891                const char *buf, size_t count)
2892 {
2893         struct nct6775_data *data = dev_get_drvdata(dev);
2894         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2895         int nr = sattr->nr;
2896         int point = sattr->index;
2897         unsigned long val;
2898         int err;
2899         u8 reg;
2900
2901         err = kstrtoul(buf, 10, &val);
2902         if (err < 0)
2903                 return err;
2904         if (val > 255)
2905                 return -EINVAL;
2906
2907         if (point == data->auto_pwm_num) {
2908                 if (data->kind != nct6775 && !val)
2909                         return -EINVAL;
2910                 if (data->kind != nct6779 && val)
2911                         val = 0xff;
2912         }
2913
2914         mutex_lock(&data->update_lock);
2915         data->auto_pwm[nr][point] = val;
2916         if (point < data->auto_pwm_num) {
2917                 nct6775_write_value(data,
2918                                     NCT6775_AUTO_PWM(data, nr, point),
2919                                     data->auto_pwm[nr][point]);
2920         } else {
2921                 switch (data->kind) {
2922                 case nct6775:
2923                         /* disable if needed (pwm == 0) */
2924                         reg = nct6775_read_value(data,
2925                                                  NCT6775_REG_CRITICAL_ENAB[nr]);
2926                         if (val)
2927                                 reg |= 0x02;
2928                         else
2929                                 reg &= ~0x02;
2930                         nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
2931                                             reg);
2932                         break;
2933                 case nct6776:
2934                         break; /* always enabled, nothing to do */
2935                 case nct6106:
2936                 case nct6779:
2937                 case nct6791:
2938                 case nct6792:
2939                 case nct6793:
2940                         nct6775_write_value(data, data->REG_CRITICAL_PWM[nr],
2941                                             val);
2942                         reg = nct6775_read_value(data,
2943                                         data->REG_CRITICAL_PWM_ENABLE[nr]);
2944                         if (val == 255)
2945                                 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
2946                         else
2947                                 reg |= data->CRITICAL_PWM_ENABLE_MASK;
2948                         nct6775_write_value(data,
2949                                             data->REG_CRITICAL_PWM_ENABLE[nr],
2950                                             reg);
2951                         break;
2952                 }
2953         }
2954         mutex_unlock(&data->update_lock);
2955         return count;
2956 }
2957
2958 static ssize_t
2959 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
2960 {
2961         struct nct6775_data *data = nct6775_update_device(dev);
2962         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2963         int nr = sattr->nr;
2964         int point = sattr->index;
2965
2966         /*
2967          * We don't know for sure if the temperature is signed or unsigned.
2968          * Assume it is unsigned.
2969          */
2970         return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
2971 }
2972
2973 static ssize_t
2974 store_auto_temp(struct device *dev, struct device_attribute *attr,
2975                 const char *buf, size_t count)
2976 {
2977         struct nct6775_data *data = dev_get_drvdata(dev);
2978         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2979         int nr = sattr->nr;
2980         int point = sattr->index;
2981         unsigned long val;
2982         int err;
2983
2984         err = kstrtoul(buf, 10, &val);
2985         if (err)
2986                 return err;
2987         if (val > 255000)
2988                 return -EINVAL;
2989
2990         mutex_lock(&data->update_lock);
2991         data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
2992         if (point < data->auto_pwm_num) {
2993                 nct6775_write_value(data,
2994                                     NCT6775_AUTO_TEMP(data, nr, point),
2995                                     data->auto_temp[nr][point]);
2996         } else {
2997                 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
2998                                     data->auto_temp[nr][point]);
2999         }
3000         mutex_unlock(&data->update_lock);
3001         return count;
3002 }
3003
3004 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
3005                                       struct attribute *attr, int index)
3006 {
3007         struct device *dev = container_of(kobj, struct device, kobj);
3008         struct nct6775_data *data = dev_get_drvdata(dev);
3009         int pwm = index / 36;   /* pwm index */
3010         int nr = index % 36;    /* attribute index */
3011
3012         if (!(data->has_pwm & (1 << pwm)))
3013                 return 0;
3014
3015         if ((nr >= 14 && nr <= 18) || nr == 21)   /* weight */
3016                 if (!data->REG_WEIGHT_TEMP_SEL[pwm])
3017                         return 0;
3018         if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
3019                 return 0;
3020         if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
3021                 return 0;
3022         if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
3023                 return 0;
3024
3025         if (nr >= 22 && nr <= 35) {             /* auto point */
3026                 int api = (nr - 22) / 2;        /* auto point index */
3027
3028                 if (api > data->auto_pwm_num)
3029                         return 0;
3030         }
3031         return attr->mode;
3032 }
3033
3034 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", S_IWUSR | S_IRUGO,
3035                   show_fan_time, store_fan_time, 0, 0);
3036 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", S_IWUSR | S_IRUGO,
3037                   show_fan_time, store_fan_time, 0, 1);
3038 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", S_IWUSR | S_IRUGO,
3039                   show_fan_time, store_fan_time, 0, 2);
3040 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", S_IWUSR | S_IRUGO, show_pwm,
3041                   store_pwm, 0, 1);
3042 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", S_IWUSR | S_IRUGO, show_pwm,
3043                   store_pwm, 0, 2);
3044 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", S_IWUSR | S_IRUGO,
3045                   show_temp_tolerance, store_temp_tolerance, 0, 0);
3046 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance",
3047                   S_IWUSR | S_IRUGO, show_temp_tolerance, store_temp_tolerance,
3048                   0, 1);
3049
3050 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", S_IWUSR | S_IRUGO, show_pwm, store_pwm,
3051                   0, 3);
3052
3053 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", S_IWUSR | S_IRUGO, show_pwm,
3054                   store_pwm, 0, 4);
3055
3056 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm",
3057                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 0);
3058 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp",
3059                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 0);
3060
3061 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm",
3062                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 1);
3063 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp",
3064                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 1);
3065
3066 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm",
3067                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 2);
3068 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp",
3069                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 2);
3070
3071 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm",
3072                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 3);
3073 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp",
3074                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 3);
3075
3076 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm",
3077                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 4);
3078 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp",
3079                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 4);
3080
3081 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm",
3082                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 5);
3083 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp",
3084                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 5);
3085
3086 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm",
3087                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 6);
3088 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp",
3089                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 6);
3090
3091 /*
3092  * nct6775_pwm_is_visible uses the index into the following array
3093  * to determine if attributes should be created or not.
3094  * Any change in order or content must be matched.
3095  */
3096 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
3097         &sensor_dev_template_pwm,
3098         &sensor_dev_template_pwm_mode,
3099         &sensor_dev_template_pwm_enable,
3100         &sensor_dev_template_pwm_temp_sel,
3101         &sensor_dev_template_pwm_temp_tolerance,
3102         &sensor_dev_template_pwm_crit_temp_tolerance,
3103         &sensor_dev_template_pwm_target_temp,
3104         &sensor_dev_template_fan_target,
3105         &sensor_dev_template_fan_tolerance,
3106         &sensor_dev_template_pwm_stop_time,
3107         &sensor_dev_template_pwm_step_up_time,
3108         &sensor_dev_template_pwm_step_down_time,
3109         &sensor_dev_template_pwm_start,
3110         &sensor_dev_template_pwm_floor,
3111         &sensor_dev_template_pwm_weight_temp_sel,       /* 14 */
3112         &sensor_dev_template_pwm_weight_temp_step,
3113         &sensor_dev_template_pwm_weight_temp_step_tol,
3114         &sensor_dev_template_pwm_weight_temp_step_base,
3115         &sensor_dev_template_pwm_weight_duty_step,      /* 18 */
3116         &sensor_dev_template_pwm_max,                   /* 19 */
3117         &sensor_dev_template_pwm_step,                  /* 20 */
3118         &sensor_dev_template_pwm_weight_duty_base,      /* 21 */
3119         &sensor_dev_template_pwm_auto_point1_pwm,       /* 22 */
3120         &sensor_dev_template_pwm_auto_point1_temp,
3121         &sensor_dev_template_pwm_auto_point2_pwm,
3122         &sensor_dev_template_pwm_auto_point2_temp,
3123         &sensor_dev_template_pwm_auto_point3_pwm,
3124         &sensor_dev_template_pwm_auto_point3_temp,
3125         &sensor_dev_template_pwm_auto_point4_pwm,
3126         &sensor_dev_template_pwm_auto_point4_temp,
3127         &sensor_dev_template_pwm_auto_point5_pwm,
3128         &sensor_dev_template_pwm_auto_point5_temp,
3129         &sensor_dev_template_pwm_auto_point6_pwm,
3130         &sensor_dev_template_pwm_auto_point6_temp,
3131         &sensor_dev_template_pwm_auto_point7_pwm,
3132         &sensor_dev_template_pwm_auto_point7_temp,      /* 35 */
3133
3134         NULL
3135 };
3136
3137 static struct sensor_template_group nct6775_pwm_template_group = {
3138         .templates = nct6775_attributes_pwm_template,
3139         .is_visible = nct6775_pwm_is_visible,
3140         .base = 1,
3141 };
3142
3143 static ssize_t
3144 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
3145 {
3146         struct nct6775_data *data = dev_get_drvdata(dev);
3147
3148         return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
3149 }
3150
3151 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
3152
3153 /* Case open detection */
3154
3155 static ssize_t
3156 clear_caseopen(struct device *dev, struct device_attribute *attr,
3157                const char *buf, size_t count)
3158 {
3159         struct nct6775_data *data = dev_get_drvdata(dev);
3160         int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
3161         unsigned long val;
3162         u8 reg;
3163         int ret;
3164
3165         if (kstrtoul(buf, 10, &val) || val != 0)
3166                 return -EINVAL;
3167
3168         mutex_lock(&data->update_lock);
3169
3170         /*
3171          * Use CR registers to clear caseopen status.
3172          * The CR registers are the same for all chips, and not all chips
3173          * support clearing the caseopen status through "regular" registers.
3174          */
3175         ret = superio_enter(data->sioreg);
3176         if (ret) {
3177                 count = ret;
3178                 goto error;
3179         }
3180
3181         superio_select(data->sioreg, NCT6775_LD_ACPI);
3182         reg = superio_inb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
3183         reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3184         superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3185         reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3186         superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3187         superio_exit(data->sioreg);
3188
3189         data->valid = false;    /* Force cache refresh */
3190 error:
3191         mutex_unlock(&data->update_lock);
3192         return count;
3193 }
3194
3195 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
3196                           clear_caseopen, INTRUSION_ALARM_BASE);
3197 static SENSOR_DEVICE_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
3198                           clear_caseopen, INTRUSION_ALARM_BASE + 1);
3199 static SENSOR_DEVICE_ATTR(intrusion0_beep, S_IWUSR | S_IRUGO, show_beep,
3200                           store_beep, INTRUSION_ALARM_BASE);
3201 static SENSOR_DEVICE_ATTR(intrusion1_beep, S_IWUSR | S_IRUGO, show_beep,
3202                           store_beep, INTRUSION_ALARM_BASE + 1);
3203 static SENSOR_DEVICE_ATTR(beep_enable, S_IWUSR | S_IRUGO, show_beep,
3204                           store_beep, BEEP_ENABLE_BASE);
3205
3206 static umode_t nct6775_other_is_visible(struct kobject *kobj,
3207                                         struct attribute *attr, int index)
3208 {
3209         struct device *dev = container_of(kobj, struct device, kobj);
3210         struct nct6775_data *data = dev_get_drvdata(dev);
3211
3212         if (index == 0 && !data->have_vid)
3213                 return 0;
3214
3215         if (index == 1 || index == 2) {
3216                 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + index - 1] < 0)
3217                         return 0;
3218         }
3219
3220         if (index == 3 || index == 4) {
3221                 if (data->BEEP_BITS[INTRUSION_ALARM_BASE + index - 3] < 0)
3222                         return 0;
3223         }
3224
3225         return attr->mode;
3226 }
3227
3228 /*
3229  * nct6775_other_is_visible uses the index into the following array
3230  * to determine if attributes should be created or not.
3231  * Any change in order or content must be matched.
3232  */
3233 static struct attribute *nct6775_attributes_other[] = {
3234         &dev_attr_cpu0_vid.attr,                                /* 0 */
3235         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,        /* 1 */
3236         &sensor_dev_attr_intrusion1_alarm.dev_attr.attr,        /* 2 */
3237         &sensor_dev_attr_intrusion0_beep.dev_attr.attr,         /* 3 */
3238         &sensor_dev_attr_intrusion1_beep.dev_attr.attr,         /* 4 */
3239         &sensor_dev_attr_beep_enable.dev_attr.attr,             /* 5 */
3240 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
3241         &dev_attr_name.attr,
3242 #endif
3243         NULL
3244 };
3245
3246 static const struct attribute_group nct6775_group_other = {
3247         .attrs = nct6775_attributes_other,
3248         .is_visible = nct6775_other_is_visible,
3249 };
3250
3251 static inline void nct6775_init_device(struct nct6775_data *data)
3252 {
3253         int i;
3254         u8 tmp, diode;
3255
3256         /* Start monitoring if needed */
3257         if (data->REG_CONFIG) {
3258                 tmp = nct6775_read_value(data, data->REG_CONFIG);
3259                 if (!(tmp & 0x01))
3260                         nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
3261         }
3262
3263         /* Enable temperature sensors if needed */
3264         for (i = 0; i < NUM_TEMP; i++) {
3265                 if (!(data->have_temp & (1 << i)))
3266                         continue;
3267                 if (!data->reg_temp_config[i])
3268                         continue;
3269                 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
3270                 if (tmp & 0x01)
3271                         nct6775_write_value(data, data->reg_temp_config[i],
3272                                             tmp & 0xfe);
3273         }
3274
3275         /* Enable VBAT monitoring if needed */
3276         tmp = nct6775_read_value(data, data->REG_VBAT);
3277         if (!(tmp & 0x01))
3278                 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
3279
3280         diode = nct6775_read_value(data, data->REG_DIODE);
3281
3282         for (i = 0; i < data->temp_fixed_num; i++) {
3283                 if (!(data->have_temp_fixed & (1 << i)))
3284                         continue;
3285                 if ((tmp & (data->DIODE_MASK << i)))    /* diode */
3286                         data->temp_type[i]
3287                           = 3 - ((diode >> i) & data->DIODE_MASK);
3288                 else                            /* thermistor */
3289                         data->temp_type[i] = 4;
3290         }
3291 }
3292
3293 static void
3294 nct6775_check_fan_inputs(struct nct6775_data *data)
3295 {
3296         bool fan3pin, fan4pin, fan4min, fan5pin, fan6pin;
3297         bool pwm3pin, pwm4pin, pwm5pin, pwm6pin;
3298         int sioreg = data->sioreg;
3299         int regval;
3300
3301         /* Store SIO_REG_ENABLE for use during resume */
3302         superio_select(sioreg, NCT6775_LD_HWM);
3303         data->sio_reg_enable = superio_inb(sioreg, SIO_REG_ENABLE);
3304
3305         /* fan4 and fan5 share some pins with the GPIO and serial flash */
3306         if (data->kind == nct6775) {
3307                 regval = superio_inb(sioreg, 0x2c);
3308
3309                 fan3pin = regval & (1 << 6);
3310                 pwm3pin = regval & (1 << 7);
3311
3312                 /* On NCT6775, fan4 shares pins with the fdc interface */
3313                 fan4pin = !(superio_inb(sioreg, 0x2A) & 0x80);
3314                 fan4min = false;
3315                 fan5pin = false;
3316                 fan6pin = false;
3317                 pwm4pin = false;
3318                 pwm5pin = false;
3319                 pwm6pin = false;
3320         } else if (data->kind == nct6776) {
3321                 bool gpok = superio_inb(sioreg, 0x27) & 0x80;
3322                 const char *board_vendor, *board_name;
3323
3324                 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
3325                 board_name = dmi_get_system_info(DMI_BOARD_NAME);
3326
3327                 if (board_name && board_vendor &&
3328                     !strcmp(board_vendor, "ASRock")) {
3329                         /*
3330                          * Auxiliary fan monitoring is not enabled on ASRock
3331                          * Z77 Pro4-M if booted in UEFI Ultra-FastBoot mode.
3332                          * Observed with BIOS version 2.00.
3333                          */
3334                         if (!strcmp(board_name, "Z77 Pro4-M")) {
3335                                 if ((data->sio_reg_enable & 0xe0) != 0xe0) {
3336                                         data->sio_reg_enable |= 0xe0;
3337                                         superio_outb(sioreg, SIO_REG_ENABLE,
3338                                                      data->sio_reg_enable);
3339                                 }
3340                         }
3341                 }
3342
3343                 if (data->sio_reg_enable & 0x80)
3344                         fan3pin = gpok;
3345                 else
3346                         fan3pin = !(superio_inb(sioreg, 0x24) & 0x40);
3347
3348                 if (data->sio_reg_enable & 0x40)
3349                         fan4pin = gpok;
3350                 else
3351                         fan4pin = superio_inb(sioreg, 0x1C) & 0x01;
3352
3353                 if (data->sio_reg_enable & 0x20)
3354                         fan5pin = gpok;
3355                 else
3356                         fan5pin = superio_inb(sioreg, 0x1C) & 0x02;
3357
3358                 fan4min = fan4pin;
3359                 fan6pin = false;
3360                 pwm3pin = fan3pin;
3361                 pwm4pin = false;
3362                 pwm5pin = false;
3363                 pwm6pin = false;
3364         } else if (data->kind == nct6106) {
3365                 regval = superio_inb(sioreg, 0x24);
3366                 fan3pin = !(regval & 0x80);
3367                 pwm3pin = regval & 0x08;
3368
3369                 fan4pin = false;
3370                 fan4min = false;
3371                 fan5pin = false;
3372                 fan6pin = false;
3373                 pwm4pin = false;
3374                 pwm5pin = false;
3375                 pwm6pin = false;
3376         } else {        /* NCT6779D, NCT6791D, NCT6792D, or NCT6793D */
3377                 regval = superio_inb(sioreg, 0x1c);
3378
3379                 fan3pin = !(regval & (1 << 5));
3380                 fan4pin = !(regval & (1 << 6));
3381                 fan5pin = !(regval & (1 << 7));
3382
3383                 pwm3pin = !(regval & (1 << 0));
3384                 pwm4pin = !(regval & (1 << 1));
3385                 pwm5pin = !(regval & (1 << 2));
3386
3387                 fan4min = fan4pin;
3388
3389                 if (data->kind == nct6791 || data->kind == nct6792 ||
3390                     data->kind == nct6793) {
3391                         regval = superio_inb(sioreg, 0x2d);
3392                         fan6pin = (regval & (1 << 1));
3393                         pwm6pin = (regval & (1 << 0));
3394                 } else {        /* NCT6779D */
3395                         fan6pin = false;
3396                         pwm6pin = false;
3397                 }
3398         }
3399
3400         /* fan 1 and 2 (0x03) are always present */
3401         data->has_fan = 0x03 | (fan3pin << 2) | (fan4pin << 3) |
3402                 (fan5pin << 4) | (fan6pin << 5);
3403         data->has_fan_min = 0x03 | (fan3pin << 2) | (fan4min << 3) |
3404                 (fan5pin << 4);
3405         data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) |
3406                 (pwm5pin << 4) | (pwm6pin << 5);
3407 }
3408
3409 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
3410                              int *available, int *mask)
3411 {
3412         int i;
3413         u8 src;
3414
3415         for (i = 0; i < data->pwm_num && *available; i++) {
3416                 int index;
3417
3418                 if (!regp[i])
3419                         continue;
3420                 src = nct6775_read_value(data, regp[i]);
3421                 src &= 0x1f;
3422                 if (!src || (*mask & (1 << src)))
3423                         continue;
3424                 if (src >= data->temp_label_num ||
3425                     !strlen(data->temp_label[src]))
3426                         continue;
3427
3428                 index = __ffs(*available);
3429                 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3430                 *available &= ~(1 << index);
3431                 *mask |= 1 << src;
3432         }
3433 }
3434
3435 static int nct6775_probe(struct platform_device *pdev)
3436 {
3437         struct device *dev = &pdev->dev;
3438         struct nct6775_sio_data *sio_data = dev_get_platdata(dev);
3439         struct nct6775_data *data;
3440         struct resource *res;
3441         int i, s, err = 0;
3442         int src, mask, available;
3443         const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3444         const u16 *reg_temp_mon, *reg_temp_alternate, *reg_temp_crit;
3445         const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL;
3446         int num_reg_temp, num_reg_temp_mon;
3447         u8 cr2a;
3448         struct attribute_group *group;
3449         struct device *hwmon_dev;
3450         int num_attr_groups = 0;
3451
3452         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3453         if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3454                                  DRVNAME))
3455                 return -EBUSY;
3456
3457         data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3458                             GFP_KERNEL);
3459         if (!data)
3460                 return -ENOMEM;
3461
3462         data->kind = sio_data->kind;
3463         data->sioreg = sio_data->sioreg;
3464         data->addr = res->start;
3465         mutex_init(&data->update_lock);
3466         data->name = nct6775_device_names[data->kind];
3467         data->bank = 0xff;              /* Force initial bank selection */
3468         platform_set_drvdata(pdev, data);
3469
3470         switch (data->kind) {
3471         case nct6106:
3472                 data->in_num = 9;
3473                 data->pwm_num = 3;
3474                 data->auto_pwm_num = 4;
3475                 data->temp_fixed_num = 3;
3476                 data->num_temp_alarms = 6;
3477                 data->num_temp_beeps = 6;
3478
3479                 data->fan_from_reg = fan_from_reg13;
3480                 data->fan_from_reg_min = fan_from_reg13;
3481
3482                 data->temp_label = nct6776_temp_label;
3483                 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3484
3485                 data->REG_VBAT = NCT6106_REG_VBAT;
3486                 data->REG_DIODE = NCT6106_REG_DIODE;
3487                 data->DIODE_MASK = NCT6106_DIODE_MASK;
3488                 data->REG_VIN = NCT6106_REG_IN;
3489                 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3490                 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3491                 data->REG_TARGET = NCT6106_REG_TARGET;
3492                 data->REG_FAN = NCT6106_REG_FAN;
3493                 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
3494                 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
3495                 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
3496                 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
3497                 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
3498                 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
3499                 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
3500                 data->REG_PWM[0] = NCT6106_REG_PWM;
3501                 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
3502                 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
3503                 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3504                 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3505                 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3506                 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3507                 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3508                 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
3509                 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
3510                 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
3511                 data->REG_CRITICAL_TEMP_TOLERANCE
3512                   = NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
3513                 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
3514                 data->CRITICAL_PWM_ENABLE_MASK
3515                   = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3516                 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
3517                 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3518                 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3519                 data->REG_TEMP_SEL = NCT6106_REG_TEMP_SEL;
3520                 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3521                 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3522                 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3523                 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3524                 data->REG_ALARM = NCT6106_REG_ALARM;
3525                 data->ALARM_BITS = NCT6106_ALARM_BITS;
3526                 data->REG_BEEP = NCT6106_REG_BEEP;
3527                 data->BEEP_BITS = NCT6106_BEEP_BITS;
3528
3529                 reg_temp = NCT6106_REG_TEMP;
3530                 reg_temp_mon = NCT6106_REG_TEMP_MON;
3531                 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3532                 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON);
3533                 reg_temp_over = NCT6106_REG_TEMP_OVER;
3534                 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3535                 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3536                 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3537                 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3538                 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3539                 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3540
3541                 break;
3542         case nct6775:
3543                 data->in_num = 9;
3544                 data->pwm_num = 3;
3545                 data->auto_pwm_num = 6;
3546                 data->has_fan_div = true;
3547                 data->temp_fixed_num = 3;
3548                 data->num_temp_alarms = 3;
3549                 data->num_temp_beeps = 3;
3550
3551                 data->ALARM_BITS = NCT6775_ALARM_BITS;
3552                 data->BEEP_BITS = NCT6775_BEEP_BITS;
3553
3554                 data->fan_from_reg = fan_from_reg16;
3555                 data->fan_from_reg_min = fan_from_reg8;
3556                 data->target_temp_mask = 0x7f;
3557                 data->tolerance_mask = 0x0f;
3558                 data->speed_tolerance_limit = 15;
3559
3560                 data->temp_label = nct6775_temp_label;
3561                 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
3562
3563                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3564                 data->REG_VBAT = NCT6775_REG_VBAT;
3565                 data->REG_DIODE = NCT6775_REG_DIODE;
3566                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3567                 data->REG_VIN = NCT6775_REG_IN;
3568                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3569                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3570                 data->REG_TARGET = NCT6775_REG_TARGET;
3571                 data->REG_FAN = NCT6775_REG_FAN;
3572                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3573                 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3574                 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3575                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3576                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3577                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3578                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3579                 data->REG_PWM[0] = NCT6775_REG_PWM;
3580                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3581                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3582                 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3583                 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3584                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3585                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3586                 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3587                 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3588                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3589                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3590                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3591                 data->REG_CRITICAL_TEMP_TOLERANCE
3592                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3593                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3594                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3595                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3596                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3597                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3598                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3599                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3600                 data->REG_ALARM = NCT6775_REG_ALARM;
3601                 data->REG_BEEP = NCT6775_REG_BEEP;
3602
3603                 reg_temp = NCT6775_REG_TEMP;
3604                 reg_temp_mon = NCT6775_REG_TEMP_MON;
3605                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3606                 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3607                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3608                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3609                 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3610                 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3611                 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3612
3613                 break;
3614         case nct6776:
3615                 data->in_num = 9;
3616                 data->pwm_num = 3;
3617                 data->auto_pwm_num = 4;
3618                 data->has_fan_div = false;
3619                 data->temp_fixed_num = 3;
3620                 data->num_temp_alarms = 3;
3621                 data->num_temp_beeps = 6;
3622
3623                 data->ALARM_BITS = NCT6776_ALARM_BITS;
3624                 data->BEEP_BITS = NCT6776_BEEP_BITS;
3625
3626                 data->fan_from_reg = fan_from_reg13;
3627                 data->fan_from_reg_min = fan_from_reg13;
3628                 data->target_temp_mask = 0xff;
3629                 data->tolerance_mask = 0x07;
3630                 data->speed_tolerance_limit = 63;
3631
3632                 data->temp_label = nct6776_temp_label;
3633                 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3634
3635                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3636                 data->REG_VBAT = NCT6775_REG_VBAT;
3637                 data->REG_DIODE = NCT6775_REG_DIODE;
3638                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3639                 data->REG_VIN = NCT6775_REG_IN;
3640                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3641                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3642                 data->REG_TARGET = NCT6775_REG_TARGET;
3643                 data->REG_FAN = NCT6775_REG_FAN;
3644                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3645                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3646                 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3647                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3648                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3649                 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3650                 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3651                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3652                 data->REG_PWM[0] = NCT6775_REG_PWM;
3653                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3654                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3655                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3656                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3657                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3658                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3659                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3660                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3661                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3662                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3663                 data->REG_CRITICAL_TEMP_TOLERANCE
3664                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3665                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3666                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3667                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3668                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3669                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3670                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3671                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3672                 data->REG_ALARM = NCT6775_REG_ALARM;
3673                 data->REG_BEEP = NCT6776_REG_BEEP;
3674
3675                 reg_temp = NCT6775_REG_TEMP;
3676                 reg_temp_mon = NCT6775_REG_TEMP_MON;
3677                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3678                 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3679                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3680                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3681                 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3682                 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3683                 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3684
3685                 break;
3686         case nct6779:
3687                 data->in_num = 15;
3688                 data->pwm_num = 5;
3689                 data->auto_pwm_num = 4;
3690                 data->has_fan_div = false;
3691                 data->temp_fixed_num = 6;
3692                 data->num_temp_alarms = 2;
3693                 data->num_temp_beeps = 2;
3694
3695                 data->ALARM_BITS = NCT6779_ALARM_BITS;
3696                 data->BEEP_BITS = NCT6779_BEEP_BITS;
3697
3698                 data->fan_from_reg = fan_from_reg13;
3699                 data->fan_from_reg_min = fan_from_reg13;
3700                 data->target_temp_mask = 0xff;
3701                 data->tolerance_mask = 0x07;
3702                 data->speed_tolerance_limit = 63;
3703
3704                 data->temp_label = nct6779_temp_label;
3705                 data->temp_label_num = NCT6779_NUM_LABELS;
3706
3707                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3708                 data->REG_VBAT = NCT6775_REG_VBAT;
3709                 data->REG_DIODE = NCT6775_REG_DIODE;
3710                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3711                 data->REG_VIN = NCT6779_REG_IN;
3712                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3713                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3714                 data->REG_TARGET = NCT6775_REG_TARGET;
3715                 data->REG_FAN = NCT6779_REG_FAN;
3716                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3717                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3718                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3719                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3720                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3721                 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3722                 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3723                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3724                 data->REG_PWM[0] = NCT6775_REG_PWM;
3725                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3726                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3727                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3728                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3729                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3730                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3731                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3732                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3733                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3734                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3735                 data->REG_CRITICAL_TEMP_TOLERANCE
3736                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3737                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3738                 data->CRITICAL_PWM_ENABLE_MASK
3739                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3740                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3741                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3742                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3743                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3744                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3745                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3746                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3747                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3748                 data->REG_ALARM = NCT6779_REG_ALARM;
3749                 data->REG_BEEP = NCT6776_REG_BEEP;
3750
3751                 reg_temp = NCT6779_REG_TEMP;
3752                 reg_temp_mon = NCT6779_REG_TEMP_MON;
3753                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3754                 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3755                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3756                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3757                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3758                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3759                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3760
3761                 break;
3762         case nct6791:
3763         case nct6792:
3764         case nct6793:
3765                 data->in_num = 15;
3766                 data->pwm_num = 6;
3767                 data->auto_pwm_num = 4;
3768                 data->has_fan_div = false;
3769                 data->temp_fixed_num = 6;
3770                 data->num_temp_alarms = 2;
3771                 data->num_temp_beeps = 2;
3772
3773                 data->ALARM_BITS = NCT6791_ALARM_BITS;
3774                 data->BEEP_BITS = NCT6779_BEEP_BITS;
3775
3776                 data->fan_from_reg = fan_from_reg13;
3777                 data->fan_from_reg_min = fan_from_reg13;
3778                 data->target_temp_mask = 0xff;
3779                 data->tolerance_mask = 0x07;
3780                 data->speed_tolerance_limit = 63;
3781
3782                 switch (data->kind) {
3783                 default:
3784                 case nct6791:
3785                         data->temp_label = nct6779_temp_label;
3786                         break;
3787                 case nct6792:
3788                         data->temp_label = nct6792_temp_label;
3789                         break;
3790                 case nct6793:
3791                         data->temp_label = nct6793_temp_label;
3792                         break;
3793                 }
3794                 data->temp_label_num = NCT6791_NUM_LABELS;
3795
3796                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3797                 data->REG_VBAT = NCT6775_REG_VBAT;
3798                 data->REG_DIODE = NCT6775_REG_DIODE;
3799                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3800                 data->REG_VIN = NCT6779_REG_IN;
3801                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3802                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3803                 data->REG_TARGET = NCT6775_REG_TARGET;
3804                 data->REG_FAN = NCT6779_REG_FAN;
3805                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3806                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3807                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3808                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3809                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3810                 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3811                 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3812                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3813                 data->REG_PWM[0] = NCT6775_REG_PWM;
3814                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3815                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3816                 data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP;
3817                 data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE;
3818                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3819                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3820                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3821                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3822                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3823                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3824                 data->REG_CRITICAL_TEMP_TOLERANCE
3825                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3826                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3827                 data->CRITICAL_PWM_ENABLE_MASK
3828                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3829                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3830                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3831                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3832                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3833                 data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL;
3834                 data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP;
3835                 data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL;
3836                 data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE;
3837                 data->REG_ALARM = NCT6791_REG_ALARM;
3838                 if (data->kind == nct6791)
3839                         data->REG_BEEP = NCT6776_REG_BEEP;
3840                 else
3841                         data->REG_BEEP = NCT6792_REG_BEEP;
3842
3843                 reg_temp = NCT6779_REG_TEMP;
3844                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3845                 if (data->kind == nct6791) {
3846                         reg_temp_mon = NCT6779_REG_TEMP_MON;
3847                         num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3848                 } else {
3849                         reg_temp_mon = NCT6792_REG_TEMP_MON;
3850                         num_reg_temp_mon = ARRAY_SIZE(NCT6792_REG_TEMP_MON);
3851                 }
3852                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3853                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3854                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3855                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3856                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3857
3858                 break;
3859         default:
3860                 return -ENODEV;
3861         }
3862         data->have_in = (1 << data->in_num) - 1;
3863         data->have_temp = 0;
3864
3865         /*
3866          * On some boards, not all available temperature sources are monitored,
3867          * even though some of the monitoring registers are unused.
3868          * Get list of unused monitoring registers, then detect if any fan
3869          * controls are configured to use unmonitored temperature sources.
3870          * If so, assign the unmonitored temperature sources to available
3871          * monitoring registers.
3872          */
3873         mask = 0;
3874         available = 0;
3875         for (i = 0; i < num_reg_temp; i++) {
3876                 if (reg_temp[i] == 0)
3877                         continue;
3878
3879                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3880                 if (!src || (mask & (1 << src)))
3881                         available |= 1 << i;
3882
3883                 mask |= 1 << src;
3884         }
3885
3886         /*
3887          * Now find unmonitored temperature registers and enable monitoring
3888          * if additional monitoring registers are available.
3889          */
3890         add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
3891         add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
3892
3893         mask = 0;
3894         s = NUM_TEMP_FIXED;     /* First dynamic temperature attribute */
3895         for (i = 0; i < num_reg_temp; i++) {
3896                 if (reg_temp[i] == 0)
3897                         continue;
3898
3899                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3900                 if (!src || (mask & (1 << src)))
3901                         continue;
3902
3903                 if (src >= data->temp_label_num ||
3904                     !strlen(data->temp_label[src])) {
3905                         dev_info(dev,
3906                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3907                                  src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
3908                         continue;
3909                 }
3910
3911                 mask |= 1 << src;
3912
3913                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3914                 if (src <= data->temp_fixed_num) {
3915                         data->have_temp |= 1 << (src - 1);
3916                         data->have_temp_fixed |= 1 << (src - 1);
3917                         data->reg_temp[0][src - 1] = reg_temp[i];
3918                         data->reg_temp[1][src - 1] = reg_temp_over[i];
3919                         data->reg_temp[2][src - 1] = reg_temp_hyst[i];
3920                         if (reg_temp_crit_h && reg_temp_crit_h[i])
3921                                 data->reg_temp[3][src - 1] = reg_temp_crit_h[i];
3922                         else if (reg_temp_crit[src - 1])
3923                                 data->reg_temp[3][src - 1]
3924                                   = reg_temp_crit[src - 1];
3925                         if (reg_temp_crit_l && reg_temp_crit_l[i])
3926                                 data->reg_temp[4][src - 1] = reg_temp_crit_l[i];
3927                         data->reg_temp_config[src - 1] = reg_temp_config[i];
3928                         data->temp_src[src - 1] = src;
3929                         continue;
3930                 }
3931
3932                 if (s >= NUM_TEMP)
3933                         continue;
3934
3935                 /* Use dynamic index for other sources */
3936                 data->have_temp |= 1 << s;
3937                 data->reg_temp[0][s] = reg_temp[i];
3938                 data->reg_temp[1][s] = reg_temp_over[i];
3939                 data->reg_temp[2][s] = reg_temp_hyst[i];
3940                 data->reg_temp_config[s] = reg_temp_config[i];
3941                 if (reg_temp_crit_h && reg_temp_crit_h[i])
3942                         data->reg_temp[3][s] = reg_temp_crit_h[i];
3943                 else if (reg_temp_crit[src - 1])
3944                         data->reg_temp[3][s] = reg_temp_crit[src - 1];
3945                 if (reg_temp_crit_l && reg_temp_crit_l[i])
3946                         data->reg_temp[4][s] = reg_temp_crit_l[i];
3947
3948                 data->temp_src[s] = src;
3949                 s++;
3950         }
3951
3952         /*
3953          * Repeat with temperatures used for fan control.
3954          * This set of registers does not support limits.
3955          */
3956         for (i = 0; i < num_reg_temp_mon; i++) {
3957                 if (reg_temp_mon[i] == 0)
3958                         continue;
3959
3960                 src = nct6775_read_value(data, data->REG_TEMP_SEL[i]) & 0x1f;
3961                 if (!src || (mask & (1 << src)))
3962                         continue;
3963
3964                 if (src >= data->temp_label_num ||
3965                     !strlen(data->temp_label[src])) {
3966                         dev_info(dev,
3967                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3968                                  src, i, data->REG_TEMP_SEL[i],
3969                                  reg_temp_mon[i]);
3970                         continue;
3971                 }
3972
3973                 mask |= 1 << src;
3974
3975                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3976                 if (src <= data->temp_fixed_num) {
3977                         if (data->have_temp & (1 << (src - 1)))
3978                                 continue;
3979                         data->have_temp |= 1 << (src - 1);
3980                         data->have_temp_fixed |= 1 << (src - 1);
3981                         data->reg_temp[0][src - 1] = reg_temp_mon[i];
3982                         data->temp_src[src - 1] = src;
3983                         continue;
3984                 }
3985
3986                 if (s >= NUM_TEMP)
3987                         continue;
3988
3989                 /* Use dynamic index for other sources */
3990                 data->have_temp |= 1 << s;
3991                 data->reg_temp[0][s] = reg_temp_mon[i];
3992                 data->temp_src[s] = src;
3993                 s++;
3994         }
3995
3996 #ifdef USE_ALTERNATE
3997         /*
3998          * Go through the list of alternate temp registers and enable
3999          * if possible.
4000          * The temperature is already monitored if the respective bit in <mask>
4001          * is set.
4002          */
4003         for (i = 0; i < data->temp_label_num - 1; i++) {
4004                 if (!reg_temp_alternate[i])
4005                         continue;
4006                 if (mask & (1 << (i + 1)))
4007                         continue;
4008                 if (i < data->temp_fixed_num) {
4009                         if (data->have_temp & (1 << i))
4010                                 continue;
4011                         data->have_temp |= 1 << i;
4012                         data->have_temp_fixed |= 1 << i;
4013                         data->reg_temp[0][i] = reg_temp_alternate[i];
4014                         if (i < num_reg_temp) {
4015                                 data->reg_temp[1][i] = reg_temp_over[i];
4016                                 data->reg_temp[2][i] = reg_temp_hyst[i];
4017                         }
4018                         data->temp_src[i] = i + 1;
4019                         continue;
4020                 }
4021
4022                 if (s >= NUM_TEMP)      /* Abort if no more space */
4023                         break;
4024
4025                 data->have_temp |= 1 << s;
4026                 data->reg_temp[0][s] = reg_temp_alternate[i];
4027                 data->temp_src[s] = i + 1;
4028                 s++;
4029         }
4030 #endif /* USE_ALTERNATE */
4031
4032         /* Initialize the chip */
4033         nct6775_init_device(data);
4034
4035         err = superio_enter(sio_data->sioreg);
4036         if (err)
4037                 return err;
4038
4039         cr2a = superio_inb(sio_data->sioreg, 0x2a);
4040         switch (data->kind) {
4041         case nct6775:
4042                 data->have_vid = (cr2a & 0x40);
4043                 break;
4044         case nct6776:
4045                 data->have_vid = (cr2a & 0x60) == 0x40;
4046                 break;
4047         case nct6106:
4048         case nct6779:
4049         case nct6791:
4050         case nct6792:
4051         case nct6793:
4052                 break;
4053         }
4054
4055         /*
4056          * Read VID value
4057          * We can get the VID input values directly at logical device D 0xe3.
4058          */
4059         if (data->have_vid) {
4060                 superio_select(sio_data->sioreg, NCT6775_LD_VID);
4061                 data->vid = superio_inb(sio_data->sioreg, 0xe3);
4062                 data->vrm = vid_which_vrm();
4063         }
4064
4065         if (fan_debounce) {
4066                 u8 tmp;
4067
4068                 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
4069                 tmp = superio_inb(sio_data->sioreg,
4070                                   NCT6775_REG_CR_FAN_DEBOUNCE);
4071                 switch (data->kind) {
4072                 case nct6106:
4073                         tmp |= 0xe0;
4074                         break;
4075                 case nct6775:
4076                         tmp |= 0x1e;
4077                         break;
4078                 case nct6776:
4079                 case nct6779:
4080                         tmp |= 0x3e;
4081                         break;
4082                 case nct6791:
4083                 case nct6792:
4084                 case nct6793:
4085                         tmp |= 0x7e;
4086                         break;
4087                 }
4088                 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
4089                              tmp);
4090                 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
4091                          data->name);
4092         }
4093
4094         nct6775_check_fan_inputs(data);
4095
4096         superio_exit(sio_data->sioreg);
4097
4098         /* Read fan clock dividers immediately */
4099         nct6775_init_fan_common(dev, data);
4100
4101         /* Register sysfs hooks */
4102         group = nct6775_create_attr_group(dev, &nct6775_pwm_template_group,
4103                                           data->pwm_num);
4104         if (IS_ERR(group))
4105                 return PTR_ERR(group);
4106
4107         data->groups[num_attr_groups++] = group;
4108
4109         group = nct6775_create_attr_group(dev, &nct6775_in_template_group,
4110                                           fls(data->have_in));
4111         if (IS_ERR(group))
4112                 return PTR_ERR(group);
4113
4114         data->groups[num_attr_groups++] = group;
4115
4116         group = nct6775_create_attr_group(dev, &nct6775_fan_template_group,
4117                                           fls(data->has_fan));
4118         if (IS_ERR(group))
4119                 return PTR_ERR(group);
4120
4121         data->groups[num_attr_groups++] = group;
4122
4123         group = nct6775_create_attr_group(dev, &nct6775_temp_template_group,
4124                                           fls(data->have_temp));
4125         if (IS_ERR(group))
4126                 return PTR_ERR(group);
4127
4128         data->groups[num_attr_groups++] = group;
4129         data->groups[num_attr_groups++] = &nct6775_group_other;
4130
4131 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4132         err = sysfs_create_groups(&dev->kobj, data->groups);
4133         if (err < 0)
4134                 return err;
4135         hwmon_dev = hwmon_device_register(dev);
4136         if (IS_ERR(hwmon_dev)) {
4137                 sysfs_remove_groups(&dev->kobj, data->groups);
4138                 return PTR_ERR(hwmon_dev);
4139         }
4140         data->hwmon_dev = hwmon_dev;
4141 #else
4142         hwmon_dev = devm_hwmon_device_register_with_groups(dev, data->name,
4143                                                            data, data->groups);
4144 #endif
4145         return PTR_ERR_OR_ZERO(hwmon_dev);
4146 }
4147
4148 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4149 static int nct6775_remove(struct platform_device *pdev)
4150 {
4151         struct nct6775_data *data = platform_get_drvdata(pdev);
4152
4153         hwmon_device_unregister(data->hwmon_dev);
4154         sysfs_remove_groups(&pdev->dev.kobj, data->groups);
4155         return 0;
4156 }
4157 #endif
4158
4159 static void nct6791_enable_io_mapping(int sioaddr)
4160 {
4161         int val;
4162
4163         val = superio_inb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE);
4164         if (val & 0x10) {
4165                 pr_info("Enabling hardware monitor logical device mappings.\n");
4166                 superio_outb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE,
4167                              val & ~0x10);
4168         }
4169 }
4170
4171 static int __maybe_unused nct6775_suspend(struct device *dev)
4172 {
4173         struct nct6775_data *data = nct6775_update_device(dev);
4174
4175         mutex_lock(&data->update_lock);
4176         data->vbat = nct6775_read_value(data, data->REG_VBAT);
4177         if (data->kind == nct6775) {
4178                 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
4179                 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
4180         }
4181         mutex_unlock(&data->update_lock);
4182
4183         return 0;
4184 }
4185
4186 static int __maybe_unused nct6775_resume(struct device *dev)
4187 {
4188         struct nct6775_data *data = dev_get_drvdata(dev);
4189         int sioreg = data->sioreg;
4190         int i, j, err = 0;
4191         u8 reg;
4192
4193         mutex_lock(&data->update_lock);
4194         data->bank = 0xff;              /* Force initial bank selection */
4195
4196         err = superio_enter(sioreg);
4197         if (err)
4198                 goto abort;
4199
4200         superio_select(sioreg, NCT6775_LD_HWM);
4201         reg = superio_inb(sioreg, SIO_REG_ENABLE);
4202         if (reg != data->sio_reg_enable)
4203                 superio_outb(sioreg, SIO_REG_ENABLE, data->sio_reg_enable);
4204
4205         if (data->kind == nct6791 || data->kind == nct6792 ||
4206             data->kind == nct6793)
4207                 nct6791_enable_io_mapping(sioreg);
4208
4209         superio_exit(sioreg);
4210
4211         /* Restore limits */
4212         for (i = 0; i < data->in_num; i++) {
4213                 if (!(data->have_in & (1 << i)))
4214                         continue;
4215
4216                 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
4217                                     data->in[i][1]);
4218                 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
4219                                     data->in[i][2]);
4220         }
4221
4222         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
4223                 if (!(data->has_fan_min & (1 << i)))
4224                         continue;
4225
4226                 nct6775_write_value(data, data->REG_FAN_MIN[i],
4227                                     data->fan_min[i]);
4228         }
4229
4230         for (i = 0; i < NUM_TEMP; i++) {
4231                 if (!(data->have_temp & (1 << i)))
4232                         continue;
4233
4234                 for (j = 1; j < ARRAY_SIZE(data->reg_temp); j++)
4235                         if (data->reg_temp[j][i])
4236                                 nct6775_write_temp(data, data->reg_temp[j][i],
4237                                                    data->temp[j][i]);
4238         }
4239
4240         /* Restore other settings */
4241         nct6775_write_value(data, data->REG_VBAT, data->vbat);
4242         if (data->kind == nct6775) {
4243                 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
4244                 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
4245         }
4246
4247 abort:
4248         /* Force re-reading all values */
4249         data->valid = false;
4250         mutex_unlock(&data->update_lock);
4251
4252         return err;
4253 }
4254
4255 static SIMPLE_DEV_PM_OPS(nct6775_dev_pm_ops, nct6775_suspend, nct6775_resume);
4256
4257 static struct platform_driver nct6775_driver = {
4258         .driver = {
4259                 .owner  = THIS_MODULE,
4260                 .name   = DRVNAME,
4261                 .pm     = &nct6775_dev_pm_ops,
4262         },
4263         .probe          = nct6775_probe,
4264 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4265         .remove         = nct6775_remove,
4266 #endif
4267 };
4268
4269 /* nct6775_find() looks for a '627 in the Super-I/O config space */
4270 static int __init nct6775_find(int sioaddr, struct nct6775_sio_data *sio_data)
4271 {
4272         u16 val;
4273         int err;
4274         int addr;
4275
4276         err = superio_enter(sioaddr);
4277         if (err)
4278                 return err;
4279
4280         if (force_id)
4281                 val = force_id;
4282         else
4283                 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
4284                     | superio_inb(sioaddr, SIO_REG_DEVID + 1);
4285         switch (val & SIO_ID_MASK) {
4286         case SIO_NCT6106_ID:
4287                 sio_data->kind = nct6106;
4288                 break;
4289         case SIO_NCT6775_ID:
4290                 sio_data->kind = nct6775;
4291                 break;
4292         case SIO_NCT6776_ID:
4293                 sio_data->kind = nct6776;
4294                 break;
4295         case SIO_NCT6779_ID:
4296                 sio_data->kind = nct6779;
4297                 break;
4298         case SIO_NCT6791_ID:
4299                 sio_data->kind = nct6791;
4300                 break;
4301         case SIO_NCT6792_ID:
4302                 sio_data->kind = nct6792;
4303                 break;
4304         case SIO_NCT6793_ID:
4305                 sio_data->kind = nct6793;
4306                 break;
4307         default:
4308                 if (val != 0xffff)
4309                         pr_debug("unsupported chip ID: 0x%04x\n", val);
4310                 superio_exit(sioaddr);
4311                 return -ENODEV;
4312         }
4313
4314         /* We have a known chip, find the HWM I/O address */
4315         superio_select(sioaddr, NCT6775_LD_HWM);
4316         val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
4317             | superio_inb(sioaddr, SIO_REG_ADDR + 1);
4318         addr = val & IOREGION_ALIGNMENT;
4319         if (addr == 0) {
4320                 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
4321                 superio_exit(sioaddr);
4322                 return -ENODEV;
4323         }
4324
4325         /* Activate logical device if needed */
4326         val = superio_inb(sioaddr, SIO_REG_ENABLE);
4327         if (!(val & 0x01)) {
4328                 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
4329                 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
4330         }
4331
4332         if (sio_data->kind == nct6791 || sio_data->kind == nct6792 ||
4333             sio_data->kind == nct6793)
4334                 nct6791_enable_io_mapping(sioaddr);
4335
4336         superio_exit(sioaddr);
4337         pr_info("Found %s or compatible chip at %#x:%#x\n",
4338                 nct6775_sio_names[sio_data->kind], sioaddr, addr);
4339         sio_data->sioreg = sioaddr;
4340
4341         return addr;
4342 }
4343
4344 /*
4345  * when Super-I/O functions move to a separate file, the Super-I/O
4346  * bus will manage the lifetime of the device and this module will only keep
4347  * track of the nct6775 driver. But since we use platform_device_alloc(), we
4348  * must keep track of the device
4349  */
4350 static struct platform_device *pdev[2];
4351
4352 static int __init sensors_nct6775_init(void)
4353 {
4354         int i, err;
4355         bool found = false;
4356         int address;
4357         struct resource res;
4358         struct nct6775_sio_data sio_data;
4359         int sioaddr[2] = { 0x2e, 0x4e };
4360
4361         err = platform_driver_register(&nct6775_driver);
4362         if (err)
4363                 return err;
4364
4365         /*
4366          * initialize sio_data->kind and sio_data->sioreg.
4367          *
4368          * when Super-I/O functions move to a separate file, the Super-I/O
4369          * driver will probe 0x2e and 0x4e and auto-detect the presence of a
4370          * nct6775 hardware monitor, and call probe()
4371          */
4372         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4373                 address = nct6775_find(sioaddr[i], &sio_data);
4374                 if (address <= 0)
4375                         continue;
4376
4377                 found = true;
4378
4379                 pdev[i] = platform_device_alloc(DRVNAME, address);
4380                 if (!pdev[i]) {
4381                         err = -ENOMEM;
4382                         goto exit_device_unregister;
4383                 }
4384
4385                 err = platform_device_add_data(pdev[i], &sio_data,
4386                                                sizeof(struct nct6775_sio_data));
4387                 if (err)
4388                         goto exit_device_put;
4389
4390                 memset(&res, 0, sizeof(res));
4391                 res.name = DRVNAME;
4392                 res.start = address + IOREGION_OFFSET;
4393                 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
4394                 res.flags = IORESOURCE_IO;
4395
4396                 err = acpi_check_resource_conflict(&res);
4397                 if (err) {
4398                         platform_device_put(pdev[i]);
4399                         pdev[i] = NULL;
4400                         continue;
4401                 }
4402
4403                 err = platform_device_add_resources(pdev[i], &res, 1);
4404                 if (err)
4405                         goto exit_device_put;
4406
4407                 /* platform_device_add calls probe() */
4408                 err = platform_device_add(pdev[i]);
4409                 if (err)
4410                         goto exit_device_put;
4411         }
4412         if (!found) {
4413                 err = -ENODEV;
4414                 goto exit_unregister;
4415         }
4416
4417         return 0;
4418
4419 exit_device_put:
4420         platform_device_put(pdev[i]);
4421 exit_device_unregister:
4422         while (--i >= 0) {
4423                 if (pdev[i])
4424                         platform_device_unregister(pdev[i]);
4425         }
4426 exit_unregister:
4427         platform_driver_unregister(&nct6775_driver);
4428         return err;
4429 }
4430
4431 static void __exit sensors_nct6775_exit(void)
4432 {
4433         int i;
4434
4435         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4436                 if (pdev[i])
4437                         platform_device_unregister(pdev[i]);
4438         }
4439         platform_driver_unregister(&nct6775_driver);
4440 }
4441
4442 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4443 MODULE_DESCRIPTION("Driver for NCT6775F and compatible chips");
4444 MODULE_LICENSE("GPL");
4445
4446 module_init(sensors_nct6775_init);
4447 module_exit(sensors_nct6775_exit);