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Improve temperature register array declarations
[groeck-nct6775] / nct6775.c
1 /*
2  * nct6775 - Driver for the hardware monitoring functionality of
3  *             Nuvoton NCT677x Super-I/O chips
4  *
5  * Copyright (C) 2012  Guenter Roeck <linux@roeck-us.net>
6  *
7  * Derived from w83627ehf driver
8  * Copyright (C) 2005-2012  Jean Delvare <khali@linux-fr.org>
9  * Copyright (C) 2006  Yuan Mu (Winbond),
10  *                     Rudolf Marek <r.marek@assembler.cz>
11  *                     David Hubbard <david.c.hubbard@gmail.com>
12  *                     Daniel J Blueman <daniel.blueman@gmail.com>
13  * Copyright (C) 2010  Sheng-Yuan Huang (Nuvoton) (PS00)
14  *
15  * Shamelessly ripped from the w83627hf driver
16  * Copyright (C) 2003  Mark Studebaker
17  *
18  * This program is free software; you can redistribute it and/or modify
19  * it under the terms of the GNU General Public License as published by
20  * the Free Software Foundation; either version 2 of the License, or
21  * (at your option) any later version.
22  *
23  * This program is distributed in the hope that it will be useful,
24  * but WITHOUT ANY WARRANTY; without even the implied warranty of
25  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
26  * GNU General Public License for more details.
27  *
28  * You should have received a copy of the GNU General Public License
29  * along with this program; if not, write to the Free Software
30  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
31  *
32  *
33  * Supports the following chips:
34  *
35  * Chip        #vin    #fan    #pwm    #temp  chip IDs       man ID
36  * nct6775f     9      4       3       6+3    0xb470 0xc1    0x5ca3
37  * nct6776f     9      5       3       6+3    0xc330 0xc1    0x5ca3
38  * nct6779d    15      5       5       2+6    0xc560 0xc1    0x5ca3
39  *
40  * #temp lists the number of monitored temperature sources (first value) plus
41  * the number of directly connectable temperature sensors (second value).
42  */
43
44 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
45
46 #include <linux/module.h>
47 #include <linux/init.h>
48 #include <linux/slab.h>
49 #include <linux/jiffies.h>
50 #include <linux/platform_device.h>
51 #include <linux/hwmon.h>
52 #include <linux/hwmon-sysfs.h>
53 #include <linux/hwmon-vid.h>
54 #include <linux/err.h>
55 #include <linux/mutex.h>
56 #include <linux/acpi.h>
57 #include <linux/io.h>
58 #include "lm75.h"
59 #include "compat.h"
60
61 #define USE_ALTERNATE
62
63 enum kinds { nct6775, nct6776, nct6779 };
64
65 /* used to set data->name = nct6775_device_names[data->sio_kind] */
66 static const char * const nct6775_device_names[] = {
67         "nct6775",
68         "nct6776",
69         "nct6779",
70 };
71
72 static unsigned short force_id;
73 module_param(force_id, ushort, 0);
74 MODULE_PARM_DESC(force_id, "Override the detected device ID");
75
76 static unsigned short fan_debounce;
77 module_param(fan_debounce, ushort, 0);
78 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
79
80 #define DRVNAME "nct6775"
81
82 /*
83  * Super-I/O constants and functions
84  */
85
86 #define NCT6775_LD_ACPI         0x0a
87 #define NCT6775_LD_HWM          0x0b
88 #define NCT6775_LD_VID          0x0d
89
90 #define SIO_REG_LDSEL           0x07    /* Logical device select */
91 #define SIO_REG_DEVID           0x20    /* Device ID (2 bytes) */
92 #define SIO_REG_ENABLE          0x30    /* Logical device enable */
93 #define SIO_REG_ADDR            0x60    /* Logical device address (2 bytes) */
94
95 #define SIO_NCT6775_ID          0xb470
96 #define SIO_NCT6776_ID          0xc330
97 #define SIO_NCT6779_ID          0xc560
98 #define SIO_ID_MASK             0xFFF0
99
100 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
101
102 static inline void
103 superio_outb(int ioreg, int reg, int val)
104 {
105         outb(reg, ioreg);
106         outb(val, ioreg + 1);
107 }
108
109 static inline int
110 superio_inb(int ioreg, int reg)
111 {
112         outb(reg, ioreg);
113         return inb(ioreg + 1);
114 }
115
116 static inline void
117 superio_select(int ioreg, int ld)
118 {
119         outb(SIO_REG_LDSEL, ioreg);
120         outb(ld, ioreg + 1);
121 }
122
123 static inline int
124 superio_enter(int ioreg)
125 {
126         /*
127          * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
128          */
129         if (!request_muxed_region(ioreg, 2, DRVNAME))
130                 return -EBUSY;
131
132         outb(0x87, ioreg);
133         outb(0x87, ioreg);
134
135         return 0;
136 }
137
138 static inline void
139 superio_exit(int ioreg)
140 {
141         outb(0xaa, ioreg);
142         outb(0x02, ioreg);
143         outb(0x02, ioreg + 1);
144         release_region(ioreg, 2);
145 }
146
147 /*
148  * ISA constants
149  */
150
151 #define IOREGION_ALIGNMENT      (~7)
152 #define IOREGION_OFFSET         5
153 #define IOREGION_LENGTH         2
154 #define ADDR_REG_OFFSET         0
155 #define DATA_REG_OFFSET         1
156
157 #define NCT6775_REG_BANK        0x4E
158 #define NCT6775_REG_CONFIG      0x40
159
160 /*
161  * Not currently used:
162  * REG_MAN_ID has the value 0x5ca3 for all supported chips.
163  * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
164  * REG_MAN_ID is at port 0x4f
165  * REG_CHIP_ID is at port 0x58
166  */
167
168 #define NUM_TEMP        10      /* Max number of temp attribute sets w/ limits*/
169 #define NUM_TEMP_FIXED  6       /* Max number of fixed temp attribute sets */
170
171 #define NUM_REG_ALARM   4       /* Max number of alarm registers */
172
173 /* Common and NCT6775 specific data */
174
175 /* Voltage min/max registers for nr=7..14 are in bank 5 */
176
177 static const u16 NCT6775_REG_IN_MAX[] = {
178         0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
179         0x55c, 0x55e, 0x560, 0x562 };
180 static const u16 NCT6775_REG_IN_MIN[] = {
181         0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
182         0x55d, 0x55f, 0x561, 0x563 };
183 static const u16 NCT6775_REG_IN[] = {
184         0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
185 };
186
187 #define NCT6775_REG_VBAT                0x5D
188 #define NCT6775_REG_DIODE               0x5E
189
190 #define NCT6775_REG_FANDIV1             0x506
191 #define NCT6775_REG_FANDIV2             0x507
192
193 #define NCT6775_REG_CR_FAN_DEBOUNCE     0xf0
194
195 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
196
197 /* 0..15 voltages, 16..23 fans, 24..31 temperatures */
198
199 static const s8 NCT6775_ALARM_BITS[] = {
200         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
201         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
202         -1,                             /* unused */
203         6, 7, 11, 10, 23,               /* fan1..fan5 */
204         -1, -1, -1,                     /* unused */
205         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
206         12, -1 };                       /* intrusion0, intrusion1 */
207
208 #define FAN_ALARM_BASE          16
209 #define TEMP_ALARM_BASE         24
210 #define INTRUSION_ALARM_BASE    30
211
212 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
213 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
214
215 /* DC or PWM output fan configuration */
216 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
217 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
218
219 /* Advanced Fan control, some values are common for all fans */
220
221 static const u16 NCT6775_REG_TARGET[] = { 0x101, 0x201, 0x301, 0x801, 0x901 };
222 static const u16 NCT6775_REG_FAN_MODE[] = { 0x102, 0x202, 0x302, 0x802, 0x902 };
223 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
224         0x103, 0x203, 0x303, 0x803, 0x903 };
225 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
226         0x104, 0x204, 0x304, 0x804, 0x904 };
227 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
228         0x105, 0x205, 0x305, 0x805, 0x905 };
229 static const u16 NCT6775_REG_FAN_START_OUTPUT[]
230         = { 0x106, 0x206, 0x306, 0x806, 0x906 };
231 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
232 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
233
234 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
235         0x107, 0x207, 0x307, 0x807, 0x907 };
236 static const u16 NCT6775_REG_PWM[] = { 0x109, 0x209, 0x309, 0x809, 0x909 };
237 static const u16 NCT6775_REG_PWM_READ[] = { 0x01, 0x03, 0x11, 0x13, 0x15 };
238
239 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
240 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
241 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
242
243 static const u16 NCT6775_REG_TEMP[] = {
244         0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
245
246 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
247         0, 0x152, 0x252, 0x628, 0x629, 0x62A };
248 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
249         0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
250 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
251         0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
252
253 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
254         0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
255
256 static const u16 NCT6775_REG_TEMP_SEL[] = {
257         0x100, 0x200, 0x300, 0x800, 0x900 };
258
259 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
260         0x139, 0x239, 0x339, 0x839, 0x939 };
261 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
262         0x13a, 0x23a, 0x33a, 0x83a, 0x93a };
263 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
264         0x13b, 0x23b, 0x33b, 0x83b, 0x93b };
265 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
266         0x13c, 0x23c, 0x33c, 0x83c, 0x93c };
267 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
268         0x13d, 0x23d, 0x33d, 0x83d, 0x93d };
269
270 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
271
272 static const u16 NCT6775_REG_AUTO_TEMP[] = {
273         0x121, 0x221, 0x321, 0x821, 0x921 };
274 static const u16 NCT6775_REG_AUTO_PWM[] = {
275         0x127, 0x227, 0x327, 0x827, 0x927 };
276
277 #define NCT6775_AUTO_TEMP(data, nr, p)  ((data)->REG_AUTO_TEMP[nr] + (p))
278 #define NCT6775_AUTO_PWM(data, nr, p)   ((data)->REG_AUTO_PWM[nr] + (p))
279
280 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
281
282 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
283         0x135, 0x235, 0x335, 0x835, 0x935 };
284 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
285         0x138, 0x238, 0x338, 0x838, 0x938 };
286
287 static const char *const nct6775_temp_label[] = {
288         "",
289         "SYSTIN",
290         "CPUTIN",
291         "AUXTIN",
292         "AMD SB-TSI",
293         "PECI Agent 0",
294         "PECI Agent 1",
295         "PECI Agent 2",
296         "PECI Agent 3",
297         "PECI Agent 4",
298         "PECI Agent 5",
299         "PECI Agent 6",
300         "PECI Agent 7",
301         "PCH_CHIP_CPU_MAX_TEMP",
302         "PCH_CHIP_TEMP",
303         "PCH_CPU_TEMP",
304         "PCH_MCH_TEMP",
305         "PCH_DIM0_TEMP",
306         "PCH_DIM1_TEMP",
307         "PCH_DIM2_TEMP",
308         "PCH_DIM3_TEMP"
309 };
310
311 static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
312         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
313
314 static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
315         = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
316             0xa07 };
317
318 /* NCT6776 specific data */
319
320 static const s8 NCT6776_ALARM_BITS[] = {
321         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
322         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
323         -1,                             /* unused */
324         6, 7, 11, 10, 23,               /* fan1..fan5 */
325         -1, -1, -1,                     /* unused */
326         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
327         12, 9 };                        /* intrusion0, intrusion1 */
328
329 static const u16 NCT6776_REG_TOLERANCE_H[] = {
330         0x10c, 0x20c, 0x30c, 0x80c, 0x90c };
331
332 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0 };
333 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0 };
334
335 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
336 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
337
338 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
339         0x13e, 0x23e, 0x33e, 0x83e, 0x93e };
340
341 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
342         0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
343
344 static const char *const nct6776_temp_label[] = {
345         "",
346         "SYSTIN",
347         "CPUTIN",
348         "AUXTIN",
349         "SMBUSMASTER 0",
350         "SMBUSMASTER 1",
351         "SMBUSMASTER 2",
352         "SMBUSMASTER 3",
353         "SMBUSMASTER 4",
354         "SMBUSMASTER 5",
355         "SMBUSMASTER 6",
356         "SMBUSMASTER 7",
357         "PECI Agent 0",
358         "PECI Agent 1",
359         "PCH_CHIP_CPU_MAX_TEMP",
360         "PCH_CHIP_TEMP",
361         "PCH_CPU_TEMP",
362         "PCH_MCH_TEMP",
363         "PCH_DIM0_TEMP",
364         "PCH_DIM1_TEMP",
365         "PCH_DIM2_TEMP",
366         "PCH_DIM3_TEMP",
367         "BYTE_TEMP"
368 };
369
370 static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
371         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
372
373 static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
374         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
375
376 /* NCT6779 specific data */
377
378 static const u16 NCT6779_REG_IN[] = {
379         0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
380         0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
381
382 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
383         0x459, 0x45A, 0x45B, 0x568 };
384
385 static const s8 NCT6779_ALARM_BITS[] = {
386         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
387         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
388         -1,                             /* unused */
389         6, 7, 11, 10, 23,               /* fan1..fan5 */
390         -1, -1, -1,                     /* unused */
391         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
392         12, 9 };                        /* intrusion0, intrusion1 */
393
394 static const u16 NCT6779_REG_FAN[] = { 0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8 };
395 static const u16 NCT6779_REG_FAN_PULSES[] = {
396         0x644, 0x645, 0x646, 0x647, 0x648 };
397
398 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
399         0x136, 0x236, 0x336, 0x836, 0x936 };
400 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
401         0x137, 0x237, 0x337, 0x837, 0x937 };
402
403 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
404 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
405         0x18, 0x152 };
406 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
407         0x3a, 0x153 };
408 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
409         0x39, 0x155 };
410
411 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
412         0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
413
414 static const char *const nct6779_temp_label[] = {
415         "",
416         "SYSTIN",
417         "CPUTIN",
418         "AUXTIN0",
419         "AUXTIN1",
420         "AUXTIN2",
421         "AUXTIN3",
422         "",
423         "SMBUSMASTER 0",
424         "SMBUSMASTER 1",
425         "SMBUSMASTER 2",
426         "SMBUSMASTER 3",
427         "SMBUSMASTER 4",
428         "SMBUSMASTER 5",
429         "SMBUSMASTER 6",
430         "SMBUSMASTER 7",
431         "PECI Agent 0",
432         "PECI Agent 1",
433         "PCH_CHIP_CPU_MAX_TEMP",
434         "PCH_CHIP_TEMP",
435         "PCH_CPU_TEMP",
436         "PCH_MCH_TEMP",
437         "PCH_DIM0_TEMP",
438         "PCH_DIM1_TEMP",
439         "PCH_DIM2_TEMP",
440         "PCH_DIM3_TEMP",
441         "BYTE_TEMP"
442 };
443
444 static const u16 NCT6779_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6779_temp_label) - 1]
445         = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
446             0, 0, 0, 0, 0, 0, 0, 0,
447             0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
448             0x408, 0 };
449
450 static const u16 NCT6779_REG_TEMP_CRIT[ARRAY_SIZE(nct6779_temp_label) - 1]
451         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
452
453 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
454 {
455         if (mode == 0 && pwm == 255)
456                 return off;
457         return mode + 1;
458 }
459
460 static int pwm_enable_to_reg(enum pwm_enable mode)
461 {
462         if (mode == off)
463                 return 0;
464         return mode - 1;
465 }
466
467 /*
468  * Conversions
469  */
470
471 /* 1 is DC mode, output in ms */
472 static unsigned int step_time_from_reg(u8 reg, u8 mode)
473 {
474         return mode ? 400 * reg : 100 * reg;
475 }
476
477 static u8 step_time_to_reg(unsigned int msec, u8 mode)
478 {
479         return clamp_val((mode ? (msec + 200) / 400 :
480                                         (msec + 50) / 100), 1, 255);
481 }
482
483 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
484 {
485         if (reg == 0 || reg == 255)
486                 return 0;
487         return 1350000U / (reg << divreg);
488 }
489
490 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
491 {
492         if ((reg & 0xff1f) == 0xff1f)
493                 return 0;
494
495         reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
496
497         if (reg == 0)
498                 return 0;
499
500         return 1350000U / reg;
501 }
502
503 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
504 {
505         if (reg == 0 || reg == 0xffff)
506                 return 0;
507
508         /*
509          * Even though the registers are 16 bit wide, the fan divisor
510          * still applies.
511          */
512         return 1350000U / (reg << divreg);
513 }
514
515 static u16 fan_to_reg(u32 fan, unsigned int divreg)
516 {
517         if (!fan)
518                 return 0;
519
520         return (1350000U / fan) >> divreg;
521 }
522
523 static inline unsigned int
524 div_from_reg(u8 reg)
525 {
526         return 1 << reg;
527 }
528
529 /*
530  * Some of the voltage inputs have internal scaling, the tables below
531  * contain 8 (the ADC LSB in mV) * scaling factor * 100
532  */
533 static const u16 scale_in[15] = {
534         800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
535         800, 800
536 };
537
538 static inline long in_from_reg(u8 reg, u8 nr)
539 {
540         return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
541 }
542
543 static inline u8 in_to_reg(u32 val, u8 nr)
544 {
545         return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
546 }
547
548 /*
549  * Data structures and manipulation thereof
550  */
551
552 struct nct6775_data {
553         int addr;       /* IO base of hw monitor block */
554         enum kinds kind;
555         const char *name;
556
557         struct device *hwmon_dev;
558         struct mutex lock;
559
560         u16 reg_temp[4][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
561                                     * 3=temp_crit
562                                     */
563         u8 temp_src[NUM_TEMP];
564         u16 reg_temp_config[NUM_TEMP];
565         const char * const *temp_label;
566         int temp_label_num;
567
568         u16 REG_CONFIG;
569         u16 REG_VBAT;
570         u16 REG_DIODE;
571
572         const s8 *ALARM_BITS;
573
574         const u16 *REG_VIN;
575         const u16 *REG_IN_MINMAX[2];
576
577         const u16 *REG_TARGET;
578         const u16 *REG_FAN;
579         const u16 *REG_FAN_MODE;
580         const u16 *REG_FAN_MIN;
581         const u16 *REG_FAN_PULSES;
582         const u16 *REG_FAN_TIME[3];
583
584         const u16 *REG_TOLERANCE_H;
585
586         const u8 *REG_PWM_MODE;
587         const u8 *PWM_MODE_MASK;
588
589         const u16 *REG_PWM[7];  /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
590                                  * [3]=pwm_max, [4]=pwm_step,
591                                  * [5]=weight_duty_step, [6]=weight_duty_base
592                                  */
593         const u16 *REG_PWM_READ;
594
595         const u16 *REG_AUTO_TEMP;
596         const u16 *REG_AUTO_PWM;
597
598         const u16 *REG_CRITICAL_TEMP;
599         const u16 *REG_CRITICAL_TEMP_TOLERANCE;
600
601         const u16 *REG_TEMP_SOURCE;     /* temp register sources */
602         const u16 *REG_TEMP_SEL;
603         const u16 *REG_WEIGHT_TEMP_SEL;
604         const u16 *REG_WEIGHT_TEMP[3];  /* 0=base, 1=tolerance, 2=step */
605
606         const u16 *REG_TEMP_OFFSET;
607
608         const u16 *REG_ALARM;
609
610         unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
611         unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
612
613         struct mutex update_lock;
614         bool valid;             /* true if following fields are valid */
615         unsigned long last_updated;     /* In jiffies */
616
617         /* Register values */
618         u8 bank;                /* current register bank */
619         u8 in_num;              /* number of in inputs we have */
620         u8 in[15][3];           /* [0]=in, [1]=in_max, [2]=in_min */
621         unsigned int rpm[5];
622         u16 fan_min[5];
623         u8 fan_pulses[5];
624         u8 fan_div[5];
625         u8 has_pwm;
626         u8 has_fan;             /* some fan inputs can be disabled */
627         u8 has_fan_min;         /* some fans don't have min register */
628         bool has_fan_div;
629
630         u8 temp_fixed_num;      /* 3 or 6 */
631         u8 temp_type[NUM_TEMP_FIXED];
632         s8 temp_offset[NUM_TEMP_FIXED];
633         s16 temp[4][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
634                                 * 3=temp_crit */
635         u64 alarms;
636
637         u8 pwm_num;     /* number of pwm */
638         u8 pwm_mode[5]; /* 1->DC variable voltage, 0->PWM variable duty cycle */
639         enum pwm_enable pwm_enable[5];
640                         /* 0->off
641                          * 1->manual
642                          * 2->thermal cruise mode (also called SmartFan I)
643                          * 3->fan speed cruise mode
644                          * 4->SmartFan III
645                          * 5->enhanced variable thermal cruise (SmartFan IV)
646                          */
647         u8 pwm[7][5];   /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
648                          * [3]=pwm_max, [4]=pwm_step,
649                          * [5]=weight_duty_step, [6]=weight_duty_base
650                          */
651
652         u8 target_temp[5];
653         u8 target_temp_mask;
654         u32 target_speed[5];
655         u32 target_speed_tolerance[5];
656         u8 speed_tolerance_limit;
657
658         u8 temp_tolerance[2][5];
659         u8 tolerance_mask;
660
661         u8 fan_time[3][5]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
662
663         /* Automatic fan speed control registers */
664         int auto_pwm_num;
665         u8 auto_pwm[5][7];
666         u8 auto_temp[5][7];
667         u8 pwm_temp_sel[5];
668         u8 pwm_weight_temp_sel[5];
669         u8 weight_temp[3][5];   /* 0->temp_step, 1->temp_step_tol,
670                                  * 2->temp_base
671                                  */
672
673         u8 vid;
674         u8 vrm;
675
676         u16 have_temp;
677         u16 have_temp_fixed;
678         u16 have_in;
679 #ifdef CONFIG_PM
680         /* Remember extra register values over suspend/resume */
681         u8 vbat;
682         u8 fandiv1;
683         u8 fandiv2;
684 #endif
685 };
686
687 struct nct6775_sio_data {
688         int sioreg;
689         enum kinds kind;
690 };
691
692 static bool is_word_sized(struct nct6775_data *data, u16 reg)
693 {
694         switch (data->kind) {
695         case nct6775:
696                 return (((reg & 0xff00) == 0x100 ||
697                     (reg & 0xff00) == 0x200) &&
698                    ((reg & 0x00ff) == 0x50 ||
699                     (reg & 0x00ff) == 0x53 ||
700                     (reg & 0x00ff) == 0x55)) ||
701                   (reg & 0xfff0) == 0x630 ||
702                   reg == 0x640 || reg == 0x642 ||
703                   reg == 0x662 ||
704                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
705                   reg == 0x73 || reg == 0x75 || reg == 0x77;
706         case nct6776:
707                 return (((reg & 0xff00) == 0x100 ||
708                     (reg & 0xff00) == 0x200) &&
709                    ((reg & 0x00ff) == 0x50 ||
710                     (reg & 0x00ff) == 0x53 ||
711                     (reg & 0x00ff) == 0x55)) ||
712                   (reg & 0xfff0) == 0x630 ||
713                   reg == 0x402 ||
714                   reg == 0x640 || reg == 0x642 ||
715                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
716                   reg == 0x73 || reg == 0x75 || reg == 0x77;
717         case nct6779:
718                 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
719                   ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x09) ||
720                   reg == 0x402 ||
721                   reg == 0x63a || reg == 0x63c || reg == 0x63e ||
722                   reg == 0x640 || reg == 0x642 ||
723                   reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
724                   reg == 0x7b;
725         }
726         return false;
727 }
728
729 /*
730  * On older chips, only registers 0x50-0x5f are banked.
731  * On more recent chips, all registers are banked.
732  * Assume that is the case and set the bank number for each access.
733  * Cache the bank number so it only needs to be set if it changes.
734  */
735 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
736 {
737         u8 bank = reg >> 8;
738         if (data->bank != bank) {
739                 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
740                 outb_p(bank, data->addr + DATA_REG_OFFSET);
741                 data->bank = bank;
742         }
743 }
744
745 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
746 {
747         int res, word_sized = is_word_sized(data, reg);
748
749         mutex_lock(&data->lock);
750
751         nct6775_set_bank(data, reg);
752         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
753         res = inb_p(data->addr + DATA_REG_OFFSET);
754         if (word_sized) {
755                 outb_p((reg & 0xff) + 1,
756                        data->addr + ADDR_REG_OFFSET);
757                 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
758         }
759
760         mutex_unlock(&data->lock);
761         return res;
762 }
763
764 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
765 {
766         int word_sized = is_word_sized(data, reg);
767
768         mutex_lock(&data->lock);
769
770         nct6775_set_bank(data, reg);
771         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
772         if (word_sized) {
773                 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
774                 outb_p((reg & 0xff) + 1,
775                        data->addr + ADDR_REG_OFFSET);
776         }
777         outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
778
779         mutex_unlock(&data->lock);
780         return 0;
781 }
782
783 /* We left-align 8-bit temperature values to make the code simpler */
784 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
785 {
786         u16 res;
787
788         res = nct6775_read_value(data, reg);
789         if (!is_word_sized(data, reg))
790                 res <<= 8;
791
792         return res;
793 }
794
795 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
796 {
797         if (!is_word_sized(data, reg))
798                 value >>= 8;
799         return nct6775_write_value(data, reg, value);
800 }
801
802 /* This function assumes that the caller holds data->update_lock */
803 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
804 {
805         u8 reg;
806
807         switch (nr) {
808         case 0:
809                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
810                     | (data->fan_div[0] & 0x7);
811                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
812                 break;
813         case 1:
814                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
815                     | ((data->fan_div[1] << 4) & 0x70);
816                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
817                 break;
818         case 2:
819                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
820                     | (data->fan_div[2] & 0x7);
821                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
822                 break;
823         case 3:
824                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
825                     | ((data->fan_div[3] << 4) & 0x70);
826                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
827                 break;
828         }
829 }
830
831 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
832 {
833         if (data->kind == nct6775)
834                 nct6775_write_fan_div(data, nr);
835 }
836
837 static void nct6775_update_fan_div(struct nct6775_data *data)
838 {
839         u8 i;
840
841         i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
842         data->fan_div[0] = i & 0x7;
843         data->fan_div[1] = (i & 0x70) >> 4;
844         i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
845         data->fan_div[2] = i & 0x7;
846         if (data->has_fan & (1<<3))
847                 data->fan_div[3] = (i & 0x70) >> 4;
848 }
849
850 static void nct6775_update_fan_div_common(struct nct6775_data *data)
851 {
852         if (data->kind == nct6775)
853                 nct6775_update_fan_div(data);
854 }
855
856 static void nct6775_init_fan_div(struct nct6775_data *data)
857 {
858         int i;
859
860         nct6775_update_fan_div_common(data);
861         /*
862          * For all fans, start with highest divider value if the divider
863          * register is not initialized. This ensures that we get a
864          * reading from the fan count register, even if it is not optimal.
865          * We'll compute a better divider later on.
866          */
867         for (i = 0; i < 3; i++) {
868                 if (!(data->has_fan & (1 << i)))
869                         continue;
870                 if (data->fan_div[i] == 0) {
871                         data->fan_div[i] = 7;
872                         nct6775_write_fan_div_common(data, i);
873                 }
874         }
875 }
876
877 static void nct6775_init_fan_common(struct device *dev,
878                                     struct nct6775_data *data)
879 {
880         int i;
881         u8 reg;
882
883         if (data->has_fan_div)
884                 nct6775_init_fan_div(data);
885
886         /*
887          * If fan_min is not set (0), set it to 0xff to disable it. This
888          * prevents the unnecessary warning when fanX_min is reported as 0.
889          */
890         for (i = 0; i < 5; i++) {
891                 if (data->has_fan_min & (1 << i)) {
892                         reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
893                         if (!reg)
894                                 nct6775_write_value(data, data->REG_FAN_MIN[i],
895                                                     data->has_fan_div ? 0xff
896                                                                       : 0xff1f);
897                 }
898         }
899 }
900
901 static void nct6775_select_fan_div(struct device *dev,
902                                    struct nct6775_data *data, int nr, u16 reg)
903 {
904         u8 fan_div = data->fan_div[nr];
905         u16 fan_min;
906
907         if (!data->has_fan_div)
908                 return;
909
910         /*
911          * If we failed to measure the fan speed, or the reported value is not
912          * in the optimal range, and the clock divider can be modified,
913          * let's try that for next time.
914          */
915         if (reg == 0x00 && fan_div < 0x07)
916                 fan_div++;
917         else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
918                 fan_div--;
919
920         if (fan_div != data->fan_div[nr]) {
921                 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
922                         nr + 1, div_from_reg(data->fan_div[nr]),
923                         div_from_reg(fan_div));
924
925                 /* Preserve min limit if possible */
926                 if (data->has_fan_min & (1 << nr)) {
927                         fan_min = data->fan_min[nr];
928                         if (fan_div > data->fan_div[nr]) {
929                                 if (fan_min != 255 && fan_min > 1)
930                                         fan_min >>= 1;
931                         } else {
932                                 if (fan_min != 255) {
933                                         fan_min <<= 1;
934                                         if (fan_min > 254)
935                                                 fan_min = 254;
936                                 }
937                         }
938                         if (fan_min != data->fan_min[nr]) {
939                                 data->fan_min[nr] = fan_min;
940                                 nct6775_write_value(data, data->REG_FAN_MIN[nr],
941                                                     fan_min);
942                         }
943                 }
944                 data->fan_div[nr] = fan_div;
945                 nct6775_write_fan_div_common(data, nr);
946         }
947 }
948
949 static void nct6775_update_pwm(struct device *dev)
950 {
951         struct nct6775_data *data = dev_get_drvdata(dev);
952         int i, j;
953         int fanmodecfg, reg;
954         bool duty_is_dc;
955
956         for (i = 0; i < data->pwm_num; i++) {
957                 if (!(data->has_pwm & (1 << i)))
958                         continue;
959
960                 duty_is_dc = data->REG_PWM_MODE[i] &&
961                   (nct6775_read_value(data, data->REG_PWM_MODE[i])
962                    & data->PWM_MODE_MASK[i]);
963                 data->pwm_mode[i] = duty_is_dc;
964
965                 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
966                 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
967                         if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
968                                 data->pwm[j][i]
969                                   = nct6775_read_value(data,
970                                                        data->REG_PWM[j][i]);
971                         }
972                 }
973
974                 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
975                                                         (fanmodecfg >> 4) & 7);
976
977                 if (!data->temp_tolerance[0][i] ||
978                     data->pwm_enable[i] != speed_cruise)
979                         data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
980                 if (!data->target_speed_tolerance[i] ||
981                     data->pwm_enable[i] == speed_cruise) {
982                         u8 t = fanmodecfg & 0x0f;
983                         if (data->REG_TOLERANCE_H) {
984                                 t |= (nct6775_read_value(data,
985                                       data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
986                         }
987                         data->target_speed_tolerance[i] = t;
988                 }
989
990                 data->temp_tolerance[1][i] =
991                         nct6775_read_value(data,
992                                         data->REG_CRITICAL_TEMP_TOLERANCE[i]);
993
994                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
995                 data->pwm_temp_sel[i] = reg & 0x1f;
996                 /* If fan can stop, report floor as 0 */
997                 if (reg & 0x80)
998                         data->pwm[2][i] = 0;
999
1000                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
1001                 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1002                 /* If weight is disabled, report weight source as 0 */
1003                 if (j == 1 && !(reg & 0x80))
1004                         data->pwm_weight_temp_sel[i] = 0;
1005
1006                 /* Weight temp data */
1007                 for (j = 0; j < 3; j++) {
1008                         data->weight_temp[j][i]
1009                           = nct6775_read_value(data,
1010                                                data->REG_WEIGHT_TEMP[j][i]);
1011                 }
1012         }
1013 }
1014
1015 static void nct6775_update_pwm_limits(struct device *dev)
1016 {
1017         struct nct6775_data *data = dev_get_drvdata(dev);
1018         int i, j;
1019         u8 reg;
1020         u16 reg_t;
1021
1022         for (i = 0; i < data->pwm_num; i++) {
1023                 if (!(data->has_pwm & (1 << i)))
1024                         continue;
1025
1026                 for (j = 0; j < 3; j++) {
1027                         data->fan_time[j][i] =
1028                           nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1029                 }
1030
1031                 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1032                 /* Update only in matching mode or if never updated */
1033                 if (!data->target_temp[i] ||
1034                     data->pwm_enable[i] == thermal_cruise)
1035                         data->target_temp[i] = reg_t & data->target_temp_mask;
1036                 if (!data->target_speed[i] ||
1037                     data->pwm_enable[i] == speed_cruise) {
1038                         if (data->REG_TOLERANCE_H) {
1039                                 reg_t |= (nct6775_read_value(data,
1040                                         data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1041                         }
1042                         data->target_speed[i] = reg_t;
1043                 }
1044
1045                 for (j = 0; j < data->auto_pwm_num; j++) {
1046                         data->auto_pwm[i][j] =
1047                           nct6775_read_value(data,
1048                                              NCT6775_AUTO_PWM(data, i, j));
1049                         data->auto_temp[i][j] =
1050                           nct6775_read_value(data,
1051                                              NCT6775_AUTO_TEMP(data, i, j));
1052                 }
1053
1054                 /* critical auto_pwm temperature data */
1055                 data->auto_temp[i][data->auto_pwm_num] =
1056                         nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1057
1058                 switch (data->kind) {
1059                 case nct6775:
1060                         reg = nct6775_read_value(data,
1061                                                  NCT6775_REG_CRITICAL_ENAB[i]);
1062                         data->auto_pwm[i][data->auto_pwm_num] =
1063                                                 (reg & 0x02) ? 0xff : 0x00;
1064                         break;
1065                 case nct6776:
1066                         data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1067                         break;
1068                 case nct6779:
1069                         reg = nct6775_read_value(data,
1070                                         NCT6779_REG_CRITICAL_PWM_ENABLE[i]);
1071                         if (reg & 1)
1072                                 data->auto_pwm[i][data->auto_pwm_num] =
1073                                   nct6775_read_value(data,
1074                                         NCT6779_REG_CRITICAL_PWM[i]);
1075                         else
1076                                 data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1077                         break;
1078                 }
1079         }
1080 }
1081
1082 static struct nct6775_data *nct6775_update_device(struct device *dev)
1083 {
1084         struct nct6775_data *data = dev_get_drvdata(dev);
1085         int i, j;
1086
1087         mutex_lock(&data->update_lock);
1088
1089         if (time_after(jiffies, data->last_updated + HZ + HZ/2)
1090             || !data->valid) {
1091                 /* Fan clock dividers */
1092                 nct6775_update_fan_div_common(data);
1093
1094                 /* Measured voltages and limits */
1095                 for (i = 0; i < data->in_num; i++) {
1096                         if (!(data->have_in & (1 << i)))
1097                                 continue;
1098
1099                         data->in[i][0] = nct6775_read_value(data,
1100                                                             data->REG_VIN[i]);
1101                         data->in[i][1] = nct6775_read_value(data,
1102                                           data->REG_IN_MINMAX[0][i]);
1103                         data->in[i][2] = nct6775_read_value(data,
1104                                           data->REG_IN_MINMAX[1][i]);
1105                 }
1106
1107                 /* Measured fan speeds and limits */
1108                 for (i = 0; i < 5; i++) {
1109                         u16 reg;
1110
1111                         if (!(data->has_fan & (1 << i)))
1112                                 continue;
1113
1114                         reg = nct6775_read_value(data, data->REG_FAN[i]);
1115                         data->rpm[i] = data->fan_from_reg(reg,
1116                                                           data->fan_div[i]);
1117
1118                         if (data->has_fan_min & (1 << i))
1119                                 data->fan_min[i] = nct6775_read_value(data,
1120                                            data->REG_FAN_MIN[i]);
1121                         data->fan_pulses[i] =
1122                           nct6775_read_value(data, data->REG_FAN_PULSES[i]);
1123
1124                         nct6775_select_fan_div(dev, data, i, reg);
1125                 }
1126
1127                 nct6775_update_pwm(dev);
1128                 nct6775_update_pwm_limits(dev);
1129
1130                 /* Measured temperatures and limits */
1131                 for (i = 0; i < NUM_TEMP; i++) {
1132                         if (!(data->have_temp & (1 << i)))
1133                                 continue;
1134                         for (j = 0; j < 4; j++) {
1135                                 if (data->reg_temp[j][i])
1136                                         data->temp[j][i]
1137                                           = nct6775_read_temp(data,
1138                                                 data->reg_temp[j][i]);
1139                         }
1140                         if (!(data->have_temp_fixed & (1 << i)))
1141                                 continue;
1142                         data->temp_offset[i]
1143                           = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1144                 }
1145
1146                 data->alarms = 0;
1147                 for (i = 0; i < NUM_REG_ALARM; i++) {
1148                         u8 alarm;
1149                         if (!data->REG_ALARM[i])
1150                                 continue;
1151                         alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1152                         data->alarms |= ((u64)alarm) << (i << 3);
1153                 }
1154
1155                 data->last_updated = jiffies;
1156                 data->valid = true;
1157         }
1158
1159         mutex_unlock(&data->update_lock);
1160         return data;
1161 }
1162
1163 /*
1164  * Sysfs callback functions
1165  */
1166 static ssize_t
1167 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1168 {
1169         struct nct6775_data *data = nct6775_update_device(dev);
1170         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1171         int nr = sattr->nr;
1172         int index = sattr->index;
1173         return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1174 }
1175
1176 static ssize_t
1177 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1178              size_t count)
1179 {
1180         struct nct6775_data *data = dev_get_drvdata(dev);
1181         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1182         int nr = sattr->nr;
1183         int index = sattr->index;
1184         unsigned long val;
1185         int err = kstrtoul(buf, 10, &val);
1186         if (err < 0)
1187                 return err;
1188         mutex_lock(&data->update_lock);
1189         data->in[nr][index] = in_to_reg(val, nr);
1190         nct6775_write_value(data, data->REG_IN_MINMAX[index-1][nr],
1191                             data->in[nr][index]);
1192         mutex_unlock(&data->update_lock);
1193         return count;
1194 }
1195
1196 static ssize_t
1197 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1198 {
1199         struct nct6775_data *data = nct6775_update_device(dev);
1200         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1201         int nr = data->ALARM_BITS[sattr->index];
1202         return sprintf(buf, "%u\n",
1203                        (unsigned int)((data->alarms >> nr) & 0x01));
1204 }
1205
1206 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in_reg, NULL, 0, 0);
1207 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in_reg, NULL, 1, 0);
1208 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in_reg, NULL, 2, 0);
1209 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in_reg, NULL, 3, 0);
1210 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in_reg, NULL, 4, 0);
1211 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in_reg, NULL, 5, 0);
1212 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in_reg, NULL, 6, 0);
1213 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in_reg, NULL, 7, 0);
1214 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in_reg, NULL, 8, 0);
1215 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in_reg, NULL, 9, 0);
1216 static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in_reg, NULL, 10, 0);
1217 static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in_reg, NULL, 11, 0);
1218 static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in_reg, NULL, 12, 0);
1219 static SENSOR_DEVICE_ATTR_2(in13_input, S_IRUGO, show_in_reg, NULL, 13, 0);
1220 static SENSOR_DEVICE_ATTR_2(in14_input, S_IRUGO, show_in_reg, NULL, 14, 0);
1221
1222 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
1223 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
1224 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
1225 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
1226 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 4);
1227 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 5);
1228 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 6);
1229 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 7);
1230 static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 8);
1231 static SENSOR_DEVICE_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 9);
1232 static SENSOR_DEVICE_ATTR(in10_alarm, S_IRUGO, show_alarm, NULL, 10);
1233 static SENSOR_DEVICE_ATTR(in11_alarm, S_IRUGO, show_alarm, NULL, 11);
1234 static SENSOR_DEVICE_ATTR(in12_alarm, S_IRUGO, show_alarm, NULL, 12);
1235 static SENSOR_DEVICE_ATTR(in13_alarm, S_IRUGO, show_alarm, NULL, 13);
1236 static SENSOR_DEVICE_ATTR(in14_alarm, S_IRUGO, show_alarm, NULL, 14);
1237
1238 static SENSOR_DEVICE_ATTR_2(in0_min, S_IWUSR | S_IRUGO, show_in_reg,
1239                             store_in_reg, 0, 1);
1240 static SENSOR_DEVICE_ATTR_2(in1_min, S_IWUSR | S_IRUGO, show_in_reg,
1241                             store_in_reg, 1, 1);
1242 static SENSOR_DEVICE_ATTR_2(in2_min, S_IWUSR | S_IRUGO, show_in_reg,
1243                             store_in_reg, 2, 1);
1244 static SENSOR_DEVICE_ATTR_2(in3_min, S_IWUSR | S_IRUGO, show_in_reg,
1245                             store_in_reg, 3, 1);
1246 static SENSOR_DEVICE_ATTR_2(in4_min, S_IWUSR | S_IRUGO, show_in_reg,
1247                             store_in_reg, 4, 1);
1248 static SENSOR_DEVICE_ATTR_2(in5_min, S_IWUSR | S_IRUGO, show_in_reg,
1249                             store_in_reg, 5, 1);
1250 static SENSOR_DEVICE_ATTR_2(in6_min, S_IWUSR | S_IRUGO, show_in_reg,
1251                             store_in_reg, 6, 1);
1252 static SENSOR_DEVICE_ATTR_2(in7_min, S_IWUSR | S_IRUGO, show_in_reg,
1253                             store_in_reg, 7, 1);
1254 static SENSOR_DEVICE_ATTR_2(in8_min, S_IWUSR | S_IRUGO, show_in_reg,
1255                             store_in_reg, 8, 1);
1256 static SENSOR_DEVICE_ATTR_2(in9_min, S_IWUSR | S_IRUGO, show_in_reg,
1257                             store_in_reg, 9, 1);
1258 static SENSOR_DEVICE_ATTR_2(in10_min, S_IWUSR | S_IRUGO, show_in_reg,
1259                             store_in_reg, 10, 1);
1260 static SENSOR_DEVICE_ATTR_2(in11_min, S_IWUSR | S_IRUGO, show_in_reg,
1261                             store_in_reg, 11, 1);
1262 static SENSOR_DEVICE_ATTR_2(in12_min, S_IWUSR | S_IRUGO, show_in_reg,
1263                             store_in_reg, 12, 1);
1264 static SENSOR_DEVICE_ATTR_2(in13_min, S_IWUSR | S_IRUGO, show_in_reg,
1265                             store_in_reg, 13, 1);
1266 static SENSOR_DEVICE_ATTR_2(in14_min, S_IWUSR | S_IRUGO, show_in_reg,
1267                             store_in_reg, 14, 1);
1268
1269 static SENSOR_DEVICE_ATTR_2(in0_max, S_IWUSR | S_IRUGO, show_in_reg,
1270                             store_in_reg, 0, 2);
1271 static SENSOR_DEVICE_ATTR_2(in1_max, S_IWUSR | S_IRUGO, show_in_reg,
1272                             store_in_reg, 1, 2);
1273 static SENSOR_DEVICE_ATTR_2(in2_max, S_IWUSR | S_IRUGO, show_in_reg,
1274                             store_in_reg, 2, 2);
1275 static SENSOR_DEVICE_ATTR_2(in3_max, S_IWUSR | S_IRUGO, show_in_reg,
1276                             store_in_reg, 3, 2);
1277 static SENSOR_DEVICE_ATTR_2(in4_max, S_IWUSR | S_IRUGO, show_in_reg,
1278                             store_in_reg, 4, 2);
1279 static SENSOR_DEVICE_ATTR_2(in5_max, S_IWUSR | S_IRUGO, show_in_reg,
1280                             store_in_reg, 5, 2);
1281 static SENSOR_DEVICE_ATTR_2(in6_max, S_IWUSR | S_IRUGO, show_in_reg,
1282                             store_in_reg, 6, 2);
1283 static SENSOR_DEVICE_ATTR_2(in7_max, S_IWUSR | S_IRUGO, show_in_reg,
1284                             store_in_reg, 7, 2);
1285 static SENSOR_DEVICE_ATTR_2(in8_max, S_IWUSR | S_IRUGO, show_in_reg,
1286                             store_in_reg, 8, 2);
1287 static SENSOR_DEVICE_ATTR_2(in9_max, S_IWUSR | S_IRUGO, show_in_reg,
1288                             store_in_reg, 9, 2);
1289 static SENSOR_DEVICE_ATTR_2(in10_max, S_IWUSR | S_IRUGO, show_in_reg,
1290                             store_in_reg, 10, 2);
1291 static SENSOR_DEVICE_ATTR_2(in11_max, S_IWUSR | S_IRUGO, show_in_reg,
1292                             store_in_reg, 11, 2);
1293 static SENSOR_DEVICE_ATTR_2(in12_max, S_IWUSR | S_IRUGO, show_in_reg,
1294                             store_in_reg, 12, 2);
1295 static SENSOR_DEVICE_ATTR_2(in13_max, S_IWUSR | S_IRUGO, show_in_reg,
1296                             store_in_reg, 13, 2);
1297 static SENSOR_DEVICE_ATTR_2(in14_max, S_IWUSR | S_IRUGO, show_in_reg,
1298                             store_in_reg, 14, 2);
1299
1300 static struct attribute *nct6775_attributes_in[15][5] = {
1301         {
1302                 &sensor_dev_attr_in0_input.dev_attr.attr,
1303                 &sensor_dev_attr_in0_min.dev_attr.attr,
1304                 &sensor_dev_attr_in0_max.dev_attr.attr,
1305                 &sensor_dev_attr_in0_alarm.dev_attr.attr,
1306                 NULL
1307         },
1308         {
1309                 &sensor_dev_attr_in1_input.dev_attr.attr,
1310                 &sensor_dev_attr_in1_min.dev_attr.attr,
1311                 &sensor_dev_attr_in1_max.dev_attr.attr,
1312                 &sensor_dev_attr_in1_alarm.dev_attr.attr,
1313                 NULL
1314         },
1315         {
1316                 &sensor_dev_attr_in2_input.dev_attr.attr,
1317                 &sensor_dev_attr_in2_min.dev_attr.attr,
1318                 &sensor_dev_attr_in2_max.dev_attr.attr,
1319                 &sensor_dev_attr_in2_alarm.dev_attr.attr,
1320                 NULL
1321         },
1322         {
1323                 &sensor_dev_attr_in3_input.dev_attr.attr,
1324                 &sensor_dev_attr_in3_min.dev_attr.attr,
1325                 &sensor_dev_attr_in3_max.dev_attr.attr,
1326                 &sensor_dev_attr_in3_alarm.dev_attr.attr,
1327                 NULL
1328         },
1329         {
1330                 &sensor_dev_attr_in4_input.dev_attr.attr,
1331                 &sensor_dev_attr_in4_min.dev_attr.attr,
1332                 &sensor_dev_attr_in4_max.dev_attr.attr,
1333                 &sensor_dev_attr_in4_alarm.dev_attr.attr,
1334                 NULL
1335         },
1336         {
1337                 &sensor_dev_attr_in5_input.dev_attr.attr,
1338                 &sensor_dev_attr_in5_min.dev_attr.attr,
1339                 &sensor_dev_attr_in5_max.dev_attr.attr,
1340                 &sensor_dev_attr_in5_alarm.dev_attr.attr,
1341                 NULL
1342         },
1343         {
1344                 &sensor_dev_attr_in6_input.dev_attr.attr,
1345                 &sensor_dev_attr_in6_min.dev_attr.attr,
1346                 &sensor_dev_attr_in6_max.dev_attr.attr,
1347                 &sensor_dev_attr_in6_alarm.dev_attr.attr,
1348                 NULL
1349         },
1350         {
1351                 &sensor_dev_attr_in7_input.dev_attr.attr,
1352                 &sensor_dev_attr_in7_min.dev_attr.attr,
1353                 &sensor_dev_attr_in7_max.dev_attr.attr,
1354                 &sensor_dev_attr_in7_alarm.dev_attr.attr,
1355                 NULL
1356         },
1357         {
1358                 &sensor_dev_attr_in8_input.dev_attr.attr,
1359                 &sensor_dev_attr_in8_min.dev_attr.attr,
1360                 &sensor_dev_attr_in8_max.dev_attr.attr,
1361                 &sensor_dev_attr_in8_alarm.dev_attr.attr,
1362                 NULL
1363         },
1364         {
1365                 &sensor_dev_attr_in9_input.dev_attr.attr,
1366                 &sensor_dev_attr_in9_min.dev_attr.attr,
1367                 &sensor_dev_attr_in9_max.dev_attr.attr,
1368                 &sensor_dev_attr_in9_alarm.dev_attr.attr,
1369                 NULL
1370         },
1371         {
1372                 &sensor_dev_attr_in10_input.dev_attr.attr,
1373                 &sensor_dev_attr_in10_min.dev_attr.attr,
1374                 &sensor_dev_attr_in10_max.dev_attr.attr,
1375                 &sensor_dev_attr_in10_alarm.dev_attr.attr,
1376                 NULL
1377         },
1378         {
1379                 &sensor_dev_attr_in11_input.dev_attr.attr,
1380                 &sensor_dev_attr_in11_min.dev_attr.attr,
1381                 &sensor_dev_attr_in11_max.dev_attr.attr,
1382                 &sensor_dev_attr_in11_alarm.dev_attr.attr,
1383                 NULL
1384         },
1385         {
1386                 &sensor_dev_attr_in12_input.dev_attr.attr,
1387                 &sensor_dev_attr_in12_min.dev_attr.attr,
1388                 &sensor_dev_attr_in12_max.dev_attr.attr,
1389                 &sensor_dev_attr_in12_alarm.dev_attr.attr,
1390                 NULL
1391         },
1392         {
1393                 &sensor_dev_attr_in13_input.dev_attr.attr,
1394                 &sensor_dev_attr_in13_min.dev_attr.attr,
1395                 &sensor_dev_attr_in13_max.dev_attr.attr,
1396                 &sensor_dev_attr_in13_alarm.dev_attr.attr,
1397                 NULL
1398         },
1399         {
1400                 &sensor_dev_attr_in14_input.dev_attr.attr,
1401                 &sensor_dev_attr_in14_min.dev_attr.attr,
1402                 &sensor_dev_attr_in14_max.dev_attr.attr,
1403                 &sensor_dev_attr_in14_alarm.dev_attr.attr,
1404                 NULL
1405         },
1406 };
1407
1408 static const struct attribute_group nct6775_group_in[15] = {
1409         { .attrs = nct6775_attributes_in[0] },
1410         { .attrs = nct6775_attributes_in[1] },
1411         { .attrs = nct6775_attributes_in[2] },
1412         { .attrs = nct6775_attributes_in[3] },
1413         { .attrs = nct6775_attributes_in[4] },
1414         { .attrs = nct6775_attributes_in[5] },
1415         { .attrs = nct6775_attributes_in[6] },
1416         { .attrs = nct6775_attributes_in[7] },
1417         { .attrs = nct6775_attributes_in[8] },
1418         { .attrs = nct6775_attributes_in[9] },
1419         { .attrs = nct6775_attributes_in[10] },
1420         { .attrs = nct6775_attributes_in[11] },
1421         { .attrs = nct6775_attributes_in[12] },
1422         { .attrs = nct6775_attributes_in[13] },
1423         { .attrs = nct6775_attributes_in[14] },
1424 };
1425
1426 static ssize_t
1427 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1428 {
1429         struct nct6775_data *data = nct6775_update_device(dev);
1430         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1431         int nr = sattr->index;
1432         return sprintf(buf, "%d\n", data->rpm[nr]);
1433 }
1434
1435 static ssize_t
1436 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1437 {
1438         struct nct6775_data *data = nct6775_update_device(dev);
1439         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1440         int nr = sattr->index;
1441         return sprintf(buf, "%d\n",
1442                        data->fan_from_reg_min(data->fan_min[nr],
1443                                               data->fan_div[nr]));
1444 }
1445
1446 static ssize_t
1447 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1448 {
1449         struct nct6775_data *data = nct6775_update_device(dev);
1450         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1451         int nr = sattr->index;
1452         return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1453 }
1454
1455 static ssize_t
1456 store_fan_min(struct device *dev, struct device_attribute *attr,
1457               const char *buf, size_t count)
1458 {
1459         struct nct6775_data *data = dev_get_drvdata(dev);
1460         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1461         int nr = sattr->index;
1462         unsigned long val;
1463         int err;
1464         unsigned int reg;
1465         u8 new_div;
1466
1467         err = kstrtoul(buf, 10, &val);
1468         if (err < 0)
1469                 return err;
1470
1471         mutex_lock(&data->update_lock);
1472         if (!data->has_fan_div) {
1473                 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1474                 if (!val) {
1475                         val = 0xff1f;
1476                 } else {
1477                         if (val > 1350000U)
1478                                 val = 135000U;
1479                         val = 1350000U / val;
1480                         val = (val & 0x1f) | ((val << 3) & 0xff00);
1481                 }
1482                 data->fan_min[nr] = val;
1483                 goto write_min; /* Leave fan divider alone */
1484         }
1485         if (!val) {
1486                 /* No min limit, alarm disabled */
1487                 data->fan_min[nr] = 255;
1488                 new_div = data->fan_div[nr]; /* No change */
1489                 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1490                 goto write_div;
1491         }
1492         reg = 1350000U / val;
1493         if (reg >= 128 * 255) {
1494                 /*
1495                  * Speed below this value cannot possibly be represented,
1496                  * even with the highest divider (128)
1497                  */
1498                 data->fan_min[nr] = 254;
1499                 new_div = 7; /* 128 == (1 << 7) */
1500                 dev_warn(dev,
1501                          "fan%u low limit %lu below minimum %u, set to minimum\n",
1502                          nr + 1, val, data->fan_from_reg_min(254, 7));
1503         } else if (!reg) {
1504                 /*
1505                  * Speed above this value cannot possibly be represented,
1506                  * even with the lowest divider (1)
1507                  */
1508                 data->fan_min[nr] = 1;
1509                 new_div = 0; /* 1 == (1 << 0) */
1510                 dev_warn(dev,
1511                          "fan%u low limit %lu above maximum %u, set to maximum\n",
1512                          nr + 1, val, data->fan_from_reg_min(1, 0));
1513         } else {
1514                 /*
1515                  * Automatically pick the best divider, i.e. the one such
1516                  * that the min limit will correspond to a register value
1517                  * in the 96..192 range
1518                  */
1519                 new_div = 0;
1520                 while (reg > 192 && new_div < 7) {
1521                         reg >>= 1;
1522                         new_div++;
1523                 }
1524                 data->fan_min[nr] = reg;
1525         }
1526
1527 write_div:
1528         /*
1529          * Write both the fan clock divider (if it changed) and the new
1530          * fan min (unconditionally)
1531          */
1532         if (new_div != data->fan_div[nr]) {
1533                 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1534                         nr + 1, div_from_reg(data->fan_div[nr]),
1535                         div_from_reg(new_div));
1536                 data->fan_div[nr] = new_div;
1537                 nct6775_write_fan_div_common(data, nr);
1538                 /* Give the chip time to sample a new speed value */
1539                 data->last_updated = jiffies;
1540         }
1541
1542 write_min:
1543         nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1544         mutex_unlock(&data->update_lock);
1545
1546         return count;
1547 }
1548
1549 static ssize_t
1550 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
1551 {
1552         struct nct6775_data *data = nct6775_update_device(dev);
1553         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1554         int p = data->fan_pulses[sattr->index];
1555
1556         return sprintf(buf, "%d\n", p ? : 4);
1557 }
1558
1559 static ssize_t
1560 store_fan_pulses(struct device *dev, struct device_attribute *attr,
1561                  const char *buf, size_t count)
1562 {
1563         struct nct6775_data *data = dev_get_drvdata(dev);
1564         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1565         int nr = sattr->index;
1566         unsigned long val;
1567         int err;
1568
1569         err = kstrtoul(buf, 10, &val);
1570         if (err < 0)
1571                 return err;
1572
1573         if (val > 4)
1574                 return -EINVAL;
1575
1576         mutex_lock(&data->update_lock);
1577         data->fan_pulses[nr] = val & 3;
1578         nct6775_write_value(data, data->REG_FAN_PULSES[nr], val & 3);
1579         mutex_unlock(&data->update_lock);
1580
1581         return count;
1582 }
1583
1584 static struct sensor_device_attribute sda_fan_input[] = {
1585         SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
1586         SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
1587         SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),
1588         SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3),
1589         SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4),
1590 };
1591
1592 static struct sensor_device_attribute sda_fan_alarm[] = {
1593         SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE),
1594         SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 1),
1595         SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 2),
1596         SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 3),
1597         SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 4),
1598 };
1599
1600 static struct sensor_device_attribute sda_fan_min[] = {
1601         SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min,
1602                     store_fan_min, 0),
1603         SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min,
1604                     store_fan_min, 1),
1605         SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, show_fan_min,
1606                     store_fan_min, 2),
1607         SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, show_fan_min,
1608                     store_fan_min, 3),
1609         SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, show_fan_min,
1610                     store_fan_min, 4),
1611 };
1612
1613 static struct sensor_device_attribute sda_fan_pulses[] = {
1614         SENSOR_ATTR(fan1_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1615                     store_fan_pulses, 0),
1616         SENSOR_ATTR(fan2_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1617                     store_fan_pulses, 1),
1618         SENSOR_ATTR(fan3_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1619                     store_fan_pulses, 2),
1620         SENSOR_ATTR(fan4_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1621                     store_fan_pulses, 3),
1622         SENSOR_ATTR(fan5_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1623                     store_fan_pulses, 4),
1624 };
1625
1626 static struct sensor_device_attribute sda_fan_div[] = {
1627         SENSOR_ATTR(fan1_div, S_IRUGO, show_fan_div, NULL, 0),
1628         SENSOR_ATTR(fan2_div, S_IRUGO, show_fan_div, NULL, 1),
1629         SENSOR_ATTR(fan3_div, S_IRUGO, show_fan_div, NULL, 2),
1630         SENSOR_ATTR(fan4_div, S_IRUGO, show_fan_div, NULL, 3),
1631         SENSOR_ATTR(fan5_div, S_IRUGO, show_fan_div, NULL, 4),
1632 };
1633
1634 static ssize_t
1635 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1636 {
1637         struct nct6775_data *data = nct6775_update_device(dev);
1638         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1639         int nr = sattr->index;
1640         return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1641 }
1642
1643 static ssize_t
1644 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1645 {
1646         struct nct6775_data *data = nct6775_update_device(dev);
1647         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1648         int nr = sattr->nr;
1649         int index = sattr->index;
1650
1651         return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
1652 }
1653
1654 static ssize_t
1655 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
1656            size_t count)
1657 {
1658         struct nct6775_data *data = dev_get_drvdata(dev);
1659         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1660         int nr = sattr->nr;
1661         int index = sattr->index;
1662         int err;
1663         long val;
1664
1665         err = kstrtol(buf, 10, &val);
1666         if (err < 0)
1667                 return err;
1668
1669         mutex_lock(&data->update_lock);
1670         data->temp[index][nr] = LM75_TEMP_TO_REG(val);
1671         nct6775_write_temp(data, data->reg_temp[index][nr],
1672                            data->temp[index][nr]);
1673         mutex_unlock(&data->update_lock);
1674         return count;
1675 }
1676
1677 static ssize_t
1678 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
1679 {
1680         struct nct6775_data *data = nct6775_update_device(dev);
1681         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1682
1683         return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
1684 }
1685
1686 static ssize_t
1687 store_temp_offset(struct device *dev, struct device_attribute *attr,
1688                   const char *buf, size_t count)
1689 {
1690         struct nct6775_data *data = dev_get_drvdata(dev);
1691         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1692         int nr = sattr->index;
1693         long val;
1694         int err;
1695
1696         err = kstrtol(buf, 10, &val);
1697         if (err < 0)
1698                 return err;
1699
1700         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
1701
1702         mutex_lock(&data->update_lock);
1703         data->temp_offset[nr] = val;
1704         nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
1705         mutex_unlock(&data->update_lock);
1706
1707         return count;
1708 }
1709
1710 static ssize_t
1711 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
1712 {
1713         struct nct6775_data *data = nct6775_update_device(dev);
1714         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1715         int nr = sattr->index;
1716         return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
1717 }
1718
1719 static ssize_t
1720 store_temp_type(struct device *dev, struct device_attribute *attr,
1721                 const char *buf, size_t count)
1722 {
1723         struct nct6775_data *data = nct6775_update_device(dev);
1724         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1725         int nr = sattr->index;
1726         unsigned long val;
1727         int err;
1728         u8 vbat, diode, bit;
1729
1730         err = kstrtoul(buf, 10, &val);
1731         if (err < 0)
1732                 return err;
1733
1734         if (val != 1 && val != 3 && val != 4)
1735                 return -EINVAL;
1736
1737         mutex_lock(&data->update_lock);
1738
1739         data->temp_type[nr] = val;
1740         vbat = nct6775_read_value(data, data->REG_VBAT) & ~(0x02 << nr);
1741         diode = nct6775_read_value(data, data->REG_DIODE) & ~(0x02 << nr);
1742         bit = 0x02 << nr;
1743         switch (val) {
1744         case 1: /* CPU diode (diode, current mode) */
1745                 vbat |= bit;
1746                 diode |= bit;
1747                 break;
1748         case 3: /* diode, voltage mode */
1749                 vbat |= bit;
1750                 break;
1751         case 4: /* thermistor */
1752                 break;
1753         };
1754         nct6775_write_value(data, data->REG_VBAT, vbat);
1755         nct6775_write_value(data, data->REG_DIODE, diode);
1756
1757         mutex_unlock(&data->update_lock);
1758         return count;
1759 }
1760
1761 static struct sensor_device_attribute_2 sda_temp_input[] = {
1762         SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0),
1763         SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0),
1764         SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0),
1765         SENSOR_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0),
1766         SENSOR_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0),
1767         SENSOR_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0),
1768         SENSOR_ATTR_2(temp7_input, S_IRUGO, show_temp, NULL, 6, 0),
1769         SENSOR_ATTR_2(temp8_input, S_IRUGO, show_temp, NULL, 7, 0),
1770         SENSOR_ATTR_2(temp9_input, S_IRUGO, show_temp, NULL, 8, 0),
1771         SENSOR_ATTR_2(temp10_input, S_IRUGO, show_temp, NULL, 9, 0),
1772 };
1773
1774 static struct sensor_device_attribute sda_temp_label[] = {
1775         SENSOR_ATTR(temp1_label, S_IRUGO, show_temp_label, NULL, 0),
1776         SENSOR_ATTR(temp2_label, S_IRUGO, show_temp_label, NULL, 1),
1777         SENSOR_ATTR(temp3_label, S_IRUGO, show_temp_label, NULL, 2),
1778         SENSOR_ATTR(temp4_label, S_IRUGO, show_temp_label, NULL, 3),
1779         SENSOR_ATTR(temp5_label, S_IRUGO, show_temp_label, NULL, 4),
1780         SENSOR_ATTR(temp6_label, S_IRUGO, show_temp_label, NULL, 5),
1781         SENSOR_ATTR(temp7_label, S_IRUGO, show_temp_label, NULL, 6),
1782         SENSOR_ATTR(temp8_label, S_IRUGO, show_temp_label, NULL, 7),
1783         SENSOR_ATTR(temp9_label, S_IRUGO, show_temp_label, NULL, 8),
1784         SENSOR_ATTR(temp10_label, S_IRUGO, show_temp_label, NULL, 9),
1785 };
1786
1787 static struct sensor_device_attribute_2 sda_temp_max[] = {
1788         SENSOR_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1789                       0, 1),
1790         SENSOR_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1791                       1, 1),
1792         SENSOR_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1793                       2, 1),
1794         SENSOR_ATTR_2(temp4_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1795                       3, 1),
1796         SENSOR_ATTR_2(temp5_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1797                       4, 1),
1798         SENSOR_ATTR_2(temp6_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1799                       5, 1),
1800         SENSOR_ATTR_2(temp7_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1801                       6, 1),
1802         SENSOR_ATTR_2(temp8_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1803                       7, 1),
1804         SENSOR_ATTR_2(temp9_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1805                       8, 1),
1806         SENSOR_ATTR_2(temp10_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1807                       9, 1),
1808 };
1809
1810 static struct sensor_device_attribute_2 sda_temp_max_hyst[] = {
1811         SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1812                       0, 2),
1813         SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1814                       1, 2),
1815         SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1816                       2, 2),
1817         SENSOR_ATTR_2(temp4_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1818                       3, 2),
1819         SENSOR_ATTR_2(temp5_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1820                       4, 2),
1821         SENSOR_ATTR_2(temp6_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1822                       5, 2),
1823         SENSOR_ATTR_2(temp7_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1824                       6, 2),
1825         SENSOR_ATTR_2(temp8_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1826                       7, 2),
1827         SENSOR_ATTR_2(temp9_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1828                       8, 2),
1829         SENSOR_ATTR_2(temp10_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1830                       9, 2),
1831 };
1832
1833 static struct sensor_device_attribute_2 sda_temp_crit[] = {
1834         SENSOR_ATTR_2(temp1_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1835                       0, 3),
1836         SENSOR_ATTR_2(temp2_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1837                       1, 3),
1838         SENSOR_ATTR_2(temp3_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1839                       2, 3),
1840         SENSOR_ATTR_2(temp4_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1841                       3, 3),
1842         SENSOR_ATTR_2(temp5_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1843                       4, 3),
1844         SENSOR_ATTR_2(temp6_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1845                       5, 3),
1846         SENSOR_ATTR_2(temp7_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1847                       6, 3),
1848         SENSOR_ATTR_2(temp8_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1849                       7, 3),
1850         SENSOR_ATTR_2(temp9_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1851                       8, 3),
1852         SENSOR_ATTR_2(temp10_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1853                       9, 3),
1854 };
1855
1856 static struct sensor_device_attribute sda_temp_offset[] = {
1857         SENSOR_ATTR(temp1_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1858                     store_temp_offset, 0),
1859         SENSOR_ATTR(temp2_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1860                     store_temp_offset, 1),
1861         SENSOR_ATTR(temp3_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1862                     store_temp_offset, 2),
1863         SENSOR_ATTR(temp4_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1864                     store_temp_offset, 3),
1865         SENSOR_ATTR(temp5_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1866                     store_temp_offset, 4),
1867         SENSOR_ATTR(temp6_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1868                     store_temp_offset, 5),
1869 };
1870
1871 static struct sensor_device_attribute sda_temp_type[] = {
1872         SENSOR_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1873                     store_temp_type, 0),
1874         SENSOR_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1875                     store_temp_type, 1),
1876         SENSOR_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1877                     store_temp_type, 2),
1878         SENSOR_ATTR(temp4_type, S_IRUGO | S_IWUSR, show_temp_type,
1879                     store_temp_type, 3),
1880         SENSOR_ATTR(temp5_type, S_IRUGO | S_IWUSR, show_temp_type,
1881                     store_temp_type, 4),
1882         SENSOR_ATTR(temp6_type, S_IRUGO | S_IWUSR, show_temp_type,
1883                     store_temp_type, 5),
1884 };
1885
1886 static struct sensor_device_attribute sda_temp_alarm[] = {
1887         SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL,
1888                     TEMP_ALARM_BASE),
1889         SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL,
1890                     TEMP_ALARM_BASE + 1),
1891         SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL,
1892                     TEMP_ALARM_BASE + 2),
1893         SENSOR_ATTR(temp4_alarm, S_IRUGO, show_alarm, NULL,
1894                     TEMP_ALARM_BASE + 3),
1895         SENSOR_ATTR(temp5_alarm, S_IRUGO, show_alarm, NULL,
1896                     TEMP_ALARM_BASE + 4),
1897         SENSOR_ATTR(temp6_alarm, S_IRUGO, show_alarm, NULL,
1898                     TEMP_ALARM_BASE + 5),
1899 };
1900
1901 #define NUM_TEMP_ALARM  ARRAY_SIZE(sda_temp_alarm)
1902
1903 static ssize_t
1904 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
1905 {
1906         struct nct6775_data *data = nct6775_update_device(dev);
1907         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1908
1909         return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
1910 }
1911
1912 static ssize_t
1913 store_pwm_mode(struct device *dev, struct device_attribute *attr,
1914                const char *buf, size_t count)
1915 {
1916         struct nct6775_data *data = dev_get_drvdata(dev);
1917         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1918         int nr = sattr->index;
1919         unsigned long val;
1920         int err;
1921         u8 reg;
1922
1923         err = kstrtoul(buf, 10, &val);
1924         if (err < 0)
1925                 return err;
1926
1927         if (val > 1)
1928                 return -EINVAL;
1929
1930         /* Setting DC mode is not supported for all chips/channels */
1931         if (data->REG_PWM_MODE[nr] == 0) {
1932                 if (val)
1933                         return -EINVAL;
1934                 return count;
1935         }
1936
1937         mutex_lock(&data->update_lock);
1938         data->pwm_mode[nr] = val;
1939         reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
1940         reg &= ~data->PWM_MODE_MASK[nr];
1941         if (val)
1942                 reg |= data->PWM_MODE_MASK[nr];
1943         nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
1944         mutex_unlock(&data->update_lock);
1945         return count;
1946 }
1947
1948 static ssize_t
1949 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1950 {
1951         struct nct6775_data *data = nct6775_update_device(dev);
1952         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1953         int nr = sattr->nr;
1954         int index = sattr->index;
1955         int pwm;
1956
1957         /*
1958          * For automatic fan control modes, show current pwm readings.
1959          * Otherwise, show the configured value.
1960          */
1961         if (index == 0 && data->pwm_enable[nr] > manual)
1962                 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
1963         else
1964                 pwm = data->pwm[index][nr];
1965
1966         return sprintf(buf, "%d\n", pwm);
1967 }
1968
1969 static ssize_t
1970 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
1971           size_t count)
1972 {
1973         struct nct6775_data *data = dev_get_drvdata(dev);
1974         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1975         int nr = sattr->nr;
1976         int index = sattr->index;
1977         unsigned long val;
1978         int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
1979         int maxval[7]
1980           = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
1981         int err;
1982         u8 reg;
1983
1984         err = kstrtoul(buf, 10, &val);
1985         if (err < 0)
1986                 return err;
1987         val = clamp_val(val, minval[index], maxval[index]);
1988
1989         mutex_lock(&data->update_lock);
1990         data->pwm[index][nr] = val;
1991         nct6775_write_value(data, data->REG_PWM[index][nr], val);
1992         if (index == 2) { /* floor: disable if val == 0 */
1993                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
1994                 reg &= 0x7f;
1995                 if (val)
1996                         reg |= 0x80;
1997                 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
1998         }
1999         mutex_unlock(&data->update_lock);
2000         return count;
2001 }
2002
2003 /* Returns 0 if OK, -EINVAL otherwise */
2004 static int check_trip_points(struct nct6775_data *data, int nr)
2005 {
2006         int i;
2007
2008         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2009                 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
2010                         return -EINVAL;
2011         }
2012         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2013                 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
2014                         return -EINVAL;
2015         }
2016         /* validate critical temperature and pwm if enabled (pwm > 0) */
2017         if (data->auto_pwm[nr][data->auto_pwm_num]) {
2018                 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2019                                 data->auto_temp[nr][data->auto_pwm_num] ||
2020                     data->auto_pwm[nr][data->auto_pwm_num - 1] >
2021                                 data->auto_pwm[nr][data->auto_pwm_num])
2022                         return -EINVAL;
2023         }
2024         return 0;
2025 }
2026
2027 static void pwm_update_registers(struct nct6775_data *data, int nr)
2028 {
2029         u8 reg;
2030
2031         switch (data->pwm_enable[nr]) {
2032         case off:
2033         case manual:
2034                 break;
2035         case speed_cruise:
2036                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2037                 reg = (reg & ~data->tolerance_mask) |
2038                   (data->target_speed_tolerance[nr] & data->tolerance_mask);
2039                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2040                 nct6775_write_value(data, data->REG_TARGET[nr],
2041                                     data->target_speed[nr] & 0xff);
2042                 if (data->REG_TOLERANCE_H) {
2043                         reg = (data->target_speed[nr] >> 8) & 0x0f;
2044                         reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2045                         nct6775_write_value(data,
2046                                             data->REG_TOLERANCE_H[nr],
2047                                             reg);
2048                 }
2049                 break;
2050         case thermal_cruise:
2051                 nct6775_write_value(data, data->REG_TARGET[nr],
2052                                     data->target_temp[nr]);
2053                 /* intentional */
2054         default:
2055                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2056                 reg = (reg & ~data->tolerance_mask) |
2057                   data->temp_tolerance[0][nr];
2058                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2059                 break;
2060         }
2061 }
2062
2063 static ssize_t
2064 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2065 {
2066         struct nct6775_data *data = nct6775_update_device(dev);
2067         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2068
2069         return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2070 }
2071
2072 static ssize_t
2073 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2074                  const char *buf, size_t count)
2075 {
2076         struct nct6775_data *data = dev_get_drvdata(dev);
2077         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2078         int nr = sattr->index;
2079         unsigned long val;
2080         int err;
2081         u16 reg;
2082
2083         err = kstrtoul(buf, 10, &val);
2084         if (err < 0)
2085                 return err;
2086
2087         if (val > sf4)
2088                 return -EINVAL;
2089
2090         if (val == sf3 && data->kind != nct6775)
2091                 return -EINVAL;
2092
2093         if (val == sf4 && check_trip_points(data, nr)) {
2094                 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2095                 dev_err(dev, "Adjust trip points and try again\n");
2096                 return -EINVAL;
2097         }
2098
2099         mutex_lock(&data->update_lock);
2100         data->pwm_enable[nr] = val;
2101         if (val == off) {
2102                 /*
2103                  * turn off pwm control: select manual mode, set pwm to maximum
2104                  */
2105                 data->pwm[0][nr] = 255;
2106                 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2107         }
2108         pwm_update_registers(data, nr);
2109         reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2110         reg &= 0x0f;
2111         reg |= pwm_enable_to_reg(val) << 4;
2112         nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2113         mutex_unlock(&data->update_lock);
2114         return count;
2115 }
2116
2117 static ssize_t
2118 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2119 {
2120         int i, sel = 0;
2121
2122         for (i = 0; i < NUM_TEMP; i++) {
2123                 if (!(data->have_temp & (1 << i)))
2124                         continue;
2125                 if (src == data->temp_src[i]) {
2126                         sel = i + 1;
2127                         break;
2128                 }
2129         }
2130
2131         return sprintf(buf, "%d\n", sel);
2132 }
2133
2134 static ssize_t
2135 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2136 {
2137         struct nct6775_data *data = nct6775_update_device(dev);
2138         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2139         int index = sattr->index;
2140
2141         return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2142 }
2143
2144 static ssize_t
2145 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2146                    const char *buf, size_t count)
2147 {
2148         struct nct6775_data *data = nct6775_update_device(dev);
2149         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2150         int nr = sattr->index;
2151         unsigned long val;
2152         int err, reg, src;
2153
2154         err = kstrtoul(buf, 10, &val);
2155         if (err < 0)
2156                 return err;
2157         if (val == 0 || val > NUM_TEMP)
2158                 return -EINVAL;
2159         if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
2160                 return -EINVAL;
2161
2162         mutex_lock(&data->update_lock);
2163         src = data->temp_src[val - 1];
2164         data->pwm_temp_sel[nr] = src;
2165         reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2166         reg &= 0xe0;
2167         reg |= src;
2168         nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2169         mutex_unlock(&data->update_lock);
2170
2171         return count;
2172 }
2173
2174 static ssize_t
2175 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2176                          char *buf)
2177 {
2178         struct nct6775_data *data = nct6775_update_device(dev);
2179         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2180         int index = sattr->index;
2181
2182         return show_pwm_temp_sel_common(data, buf,
2183                                         data->pwm_weight_temp_sel[index]);
2184 }
2185
2186 static ssize_t
2187 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2188                           const char *buf, size_t count)
2189 {
2190         struct nct6775_data *data = nct6775_update_device(dev);
2191         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2192         int nr = sattr->index;
2193         unsigned long val;
2194         int err, reg, src;
2195
2196         err = kstrtoul(buf, 10, &val);
2197         if (err < 0)
2198                 return err;
2199         if (val > NUM_TEMP)
2200                 return -EINVAL;
2201         if (val && (!(data->have_temp & (1 << (val - 1))) ||
2202                     !data->temp_src[val - 1]))
2203                 return -EINVAL;
2204
2205         mutex_lock(&data->update_lock);
2206         if (val) {
2207                 src = data->temp_src[val - 1];
2208                 data->pwm_weight_temp_sel[nr] = src;
2209                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2210                 reg &= 0xe0;
2211                 reg |= (src | 0x80);
2212                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2213         } else {
2214                 data->pwm_weight_temp_sel[nr] = 0;
2215                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2216                 reg &= 0x7f;
2217                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2218         }
2219         mutex_unlock(&data->update_lock);
2220
2221         return count;
2222 }
2223
2224 static ssize_t
2225 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2226 {
2227         struct nct6775_data *data = nct6775_update_device(dev);
2228         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2229
2230         return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2231 }
2232
2233 static ssize_t
2234 store_target_temp(struct device *dev, struct device_attribute *attr,
2235                   const char *buf, size_t count)
2236 {
2237         struct nct6775_data *data = dev_get_drvdata(dev);
2238         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2239         int nr = sattr->index;
2240         unsigned long val;
2241         int err;
2242
2243         err = kstrtoul(buf, 10, &val);
2244         if (err < 0)
2245                 return err;
2246
2247         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2248                         data->target_temp_mask);
2249
2250         mutex_lock(&data->update_lock);
2251         data->target_temp[nr] = val;
2252         pwm_update_registers(data, nr);
2253         mutex_unlock(&data->update_lock);
2254         return count;
2255 }
2256
2257 static ssize_t
2258 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2259 {
2260         struct nct6775_data *data = nct6775_update_device(dev);
2261         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2262         int nr = sattr->index;
2263
2264         return sprintf(buf, "%d\n",
2265                        fan_from_reg16(data->target_speed[nr],
2266                                       data->fan_div[nr]));
2267 }
2268
2269 static ssize_t
2270 store_target_speed(struct device *dev, struct device_attribute *attr,
2271                    const char *buf, size_t count)
2272 {
2273         struct nct6775_data *data = dev_get_drvdata(dev);
2274         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2275         int nr = sattr->index;
2276         unsigned long val;
2277         int err;
2278         u16 speed;
2279
2280         err = kstrtoul(buf, 10, &val);
2281         if (err < 0)
2282                 return err;
2283
2284         val = clamp_val(val, 0, 1350000U);
2285         speed = fan_to_reg(val, data->fan_div[nr]);
2286
2287         mutex_lock(&data->update_lock);
2288         data->target_speed[nr] = speed;
2289         pwm_update_registers(data, nr);
2290         mutex_unlock(&data->update_lock);
2291         return count;
2292 }
2293
2294 static ssize_t
2295 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2296                     char *buf)
2297 {
2298         struct nct6775_data *data = nct6775_update_device(dev);
2299         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2300         int nr = sattr->nr;
2301         int index = sattr->index;
2302
2303         return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2304 }
2305
2306 static ssize_t
2307 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2308                      const char *buf, size_t count)
2309 {
2310         struct nct6775_data *data = dev_get_drvdata(dev);
2311         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2312         int nr = sattr->nr;
2313         int index = sattr->index;
2314         unsigned long val;
2315         int err;
2316
2317         err = kstrtoul(buf, 10, &val);
2318         if (err < 0)
2319                 return err;
2320
2321         /* Limit tolerance as needed */
2322         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2323
2324         mutex_lock(&data->update_lock);
2325         data->temp_tolerance[index][nr] = val;
2326         if (index)
2327                 pwm_update_registers(data, nr);
2328         else
2329                 nct6775_write_value(data,
2330                                     data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2331                                     val);
2332         mutex_unlock(&data->update_lock);
2333         return count;
2334 }
2335
2336 /*
2337  * Fan speed tolerance is a tricky beast, since the associated register is
2338  * a tick counter, but the value is reported and configured as rpm.
2339  * Compute resulting low and high rpm values and report the difference.
2340  */
2341 static ssize_t
2342 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2343                      char *buf)
2344 {
2345         struct nct6775_data *data = nct6775_update_device(dev);
2346         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2347         int nr = sattr->index;
2348         int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2349         int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2350         int tolerance;
2351
2352         if (low <= 0)
2353                 low = 1;
2354         if (high > 0xffff)
2355                 high = 0xffff;
2356         if (high < low)
2357                 high = low;
2358
2359         tolerance = (fan_from_reg16(low, data->fan_div[nr])
2360                      - fan_from_reg16(high, data->fan_div[nr])) / 2;
2361
2362         return sprintf(buf, "%d\n", tolerance);
2363 }
2364
2365 static ssize_t
2366 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2367                       const char *buf, size_t count)
2368 {
2369         struct nct6775_data *data = dev_get_drvdata(dev);
2370         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2371         int nr = sattr->index;
2372         unsigned long val;
2373         int err;
2374         int low, high;
2375
2376         err = kstrtoul(buf, 10, &val);
2377         if (err < 0)
2378                 return err;
2379
2380         high = fan_from_reg16(data->target_speed[nr],
2381                               data->fan_div[nr]) + val;
2382         low = fan_from_reg16(data->target_speed[nr],
2383                              data->fan_div[nr]) - val;
2384         if (low <= 0)
2385                 low = 1;
2386         if (high < low)
2387                 high = low;
2388
2389         val = (fan_to_reg(low, data->fan_div[nr]) -
2390                fan_to_reg(high, data->fan_div[nr])) / 2;
2391
2392         /* Limit tolerance as needed */
2393         val = clamp_val(val, 0, data->speed_tolerance_limit);
2394
2395         mutex_lock(&data->update_lock);
2396         data->target_speed_tolerance[nr] = val;
2397         pwm_update_registers(data, nr);
2398         mutex_unlock(&data->update_lock);
2399         return count;
2400 }
2401
2402 static SENSOR_DEVICE_ATTR_2(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2403 static SENSOR_DEVICE_ATTR_2(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1, 0);
2404 static SENSOR_DEVICE_ATTR_2(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2, 0);
2405 static SENSOR_DEVICE_ATTR_2(pwm4, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3, 0);
2406 static SENSOR_DEVICE_ATTR_2(pwm5, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 4, 0);
2407
2408 static SENSOR_DEVICE_ATTR(pwm1_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2409                           store_pwm_mode, 0);
2410 static SENSOR_DEVICE_ATTR(pwm2_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2411                           store_pwm_mode, 1);
2412 static SENSOR_DEVICE_ATTR(pwm3_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2413                           store_pwm_mode, 2);
2414 static SENSOR_DEVICE_ATTR(pwm4_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2415                           store_pwm_mode, 3);
2416 static SENSOR_DEVICE_ATTR(pwm5_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2417                           store_pwm_mode, 4);
2418
2419 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2420                           store_pwm_enable, 0);
2421 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2422                           store_pwm_enable, 1);
2423 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2424                           store_pwm_enable, 2);
2425 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2426                           store_pwm_enable, 3);
2427 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2428                           store_pwm_enable, 4);
2429
2430 static SENSOR_DEVICE_ATTR(pwm1_temp_sel, S_IWUSR | S_IRUGO,
2431                             show_pwm_temp_sel, store_pwm_temp_sel, 0);
2432 static SENSOR_DEVICE_ATTR(pwm2_temp_sel, S_IWUSR | S_IRUGO,
2433                             show_pwm_temp_sel, store_pwm_temp_sel, 1);
2434 static SENSOR_DEVICE_ATTR(pwm3_temp_sel, S_IWUSR | S_IRUGO,
2435                             show_pwm_temp_sel, store_pwm_temp_sel, 2);
2436 static SENSOR_DEVICE_ATTR(pwm4_temp_sel, S_IWUSR | S_IRUGO,
2437                             show_pwm_temp_sel, store_pwm_temp_sel, 3);
2438 static SENSOR_DEVICE_ATTR(pwm5_temp_sel, S_IWUSR | S_IRUGO,
2439                             show_pwm_temp_sel, store_pwm_temp_sel, 4);
2440
2441 static SENSOR_DEVICE_ATTR(pwm1_target_temp, S_IWUSR | S_IRUGO, show_target_temp,
2442                           store_target_temp, 0);
2443 static SENSOR_DEVICE_ATTR(pwm2_target_temp, S_IWUSR | S_IRUGO, show_target_temp,
2444                           store_target_temp, 1);
2445 static SENSOR_DEVICE_ATTR(pwm3_target_temp, S_IWUSR | S_IRUGO, show_target_temp,
2446                           store_target_temp, 2);
2447 static SENSOR_DEVICE_ATTR(pwm4_target_temp, S_IWUSR | S_IRUGO, show_target_temp,
2448                           store_target_temp, 3);
2449 static SENSOR_DEVICE_ATTR(pwm5_target_temp, S_IWUSR | S_IRUGO, show_target_temp,
2450                           store_target_temp, 4);
2451
2452 static SENSOR_DEVICE_ATTR(fan1_target, S_IWUSR | S_IRUGO, show_target_speed,
2453                           store_target_speed, 0);
2454 static SENSOR_DEVICE_ATTR(fan2_target, S_IWUSR | S_IRUGO, show_target_speed,
2455                           store_target_speed, 1);
2456 static SENSOR_DEVICE_ATTR(fan3_target, S_IWUSR | S_IRUGO, show_target_speed,
2457                           store_target_speed, 2);
2458 static SENSOR_DEVICE_ATTR(fan4_target, S_IWUSR | S_IRUGO, show_target_speed,
2459                           store_target_speed, 3);
2460 static SENSOR_DEVICE_ATTR(fan5_target, S_IWUSR | S_IRUGO, show_target_speed,
2461                           store_target_speed, 4);
2462
2463 static SENSOR_DEVICE_ATTR(fan1_tolerance, S_IWUSR | S_IRUGO,
2464                             show_speed_tolerance, store_speed_tolerance, 0);
2465 static SENSOR_DEVICE_ATTR(fan2_tolerance, S_IWUSR | S_IRUGO,
2466                             show_speed_tolerance, store_speed_tolerance, 1);
2467 static SENSOR_DEVICE_ATTR(fan3_tolerance, S_IWUSR | S_IRUGO,
2468                             show_speed_tolerance, store_speed_tolerance, 2);
2469 static SENSOR_DEVICE_ATTR(fan4_tolerance, S_IWUSR | S_IRUGO,
2470                             show_speed_tolerance, store_speed_tolerance, 3);
2471 static SENSOR_DEVICE_ATTR(fan5_tolerance, S_IWUSR | S_IRUGO,
2472                             show_speed_tolerance, store_speed_tolerance, 4);
2473
2474 /* Smart Fan registers */
2475
2476 static ssize_t
2477 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2478 {
2479         struct nct6775_data *data = nct6775_update_device(dev);
2480         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2481         int nr = sattr->nr;
2482         int index = sattr->index;
2483
2484         return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2485 }
2486
2487 static ssize_t
2488 store_weight_temp(struct device *dev, struct device_attribute *attr,
2489                   const char *buf, size_t count)
2490 {
2491         struct nct6775_data *data = dev_get_drvdata(dev);
2492         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2493         int nr = sattr->nr;
2494         int index = sattr->index;
2495         unsigned long val;
2496         int err;
2497
2498         err = kstrtoul(buf, 10, &val);
2499         if (err < 0)
2500                 return err;
2501
2502         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2503
2504         mutex_lock(&data->update_lock);
2505         data->weight_temp[index][nr] = val;
2506         nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2507         mutex_unlock(&data->update_lock);
2508         return count;
2509 }
2510
2511 static SENSOR_DEVICE_ATTR(pwm1_weight_temp_sel, S_IWUSR | S_IRUGO,
2512                             show_pwm_weight_temp_sel, store_pwm_weight_temp_sel,
2513                             0);
2514 static SENSOR_DEVICE_ATTR(pwm2_weight_temp_sel, S_IWUSR | S_IRUGO,
2515                             show_pwm_weight_temp_sel, store_pwm_weight_temp_sel,
2516                             1);
2517 static SENSOR_DEVICE_ATTR(pwm3_weight_temp_sel, S_IWUSR | S_IRUGO,
2518                             show_pwm_weight_temp_sel, store_pwm_weight_temp_sel,
2519                             2);
2520 static SENSOR_DEVICE_ATTR(pwm4_weight_temp_sel, S_IWUSR | S_IRUGO,
2521                             show_pwm_weight_temp_sel, store_pwm_weight_temp_sel,
2522                             3);
2523 static SENSOR_DEVICE_ATTR(pwm5_weight_temp_sel, S_IWUSR | S_IRUGO,
2524                             show_pwm_weight_temp_sel, store_pwm_weight_temp_sel,
2525                             4);
2526
2527 static SENSOR_DEVICE_ATTR_2(pwm1_weight_temp_step, S_IWUSR | S_IRUGO,
2528                             show_weight_temp, store_weight_temp, 0, 0);
2529 static SENSOR_DEVICE_ATTR_2(pwm2_weight_temp_step, S_IWUSR | S_IRUGO,
2530                             show_weight_temp, store_weight_temp, 1, 0);
2531 static SENSOR_DEVICE_ATTR_2(pwm3_weight_temp_step, S_IWUSR | S_IRUGO,
2532                             show_weight_temp, store_weight_temp, 2, 0);
2533 static SENSOR_DEVICE_ATTR_2(pwm4_weight_temp_step, S_IWUSR | S_IRUGO,
2534                             show_weight_temp, store_weight_temp, 3, 0);
2535 static SENSOR_DEVICE_ATTR_2(pwm5_weight_temp_step, S_IWUSR | S_IRUGO,
2536                             show_weight_temp, store_weight_temp, 4, 0);
2537
2538 static SENSOR_DEVICE_ATTR_2(pwm1_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2539                             show_weight_temp, store_weight_temp, 0, 1);
2540 static SENSOR_DEVICE_ATTR_2(pwm2_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2541                             show_weight_temp, store_weight_temp, 1, 1);
2542 static SENSOR_DEVICE_ATTR_2(pwm3_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2543                             show_weight_temp, store_weight_temp, 2, 1);
2544 static SENSOR_DEVICE_ATTR_2(pwm4_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2545                             show_weight_temp, store_weight_temp, 3, 1);
2546 static SENSOR_DEVICE_ATTR_2(pwm5_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2547                             show_weight_temp, store_weight_temp, 4, 1);
2548
2549 static SENSOR_DEVICE_ATTR_2(pwm1_weight_temp_step_base, S_IWUSR | S_IRUGO,
2550                             show_weight_temp, store_weight_temp, 0, 2);
2551 static SENSOR_DEVICE_ATTR_2(pwm2_weight_temp_step_base, S_IWUSR | S_IRUGO,
2552                             show_weight_temp, store_weight_temp, 1, 2);
2553 static SENSOR_DEVICE_ATTR_2(pwm3_weight_temp_step_base, S_IWUSR | S_IRUGO,
2554                             show_weight_temp, store_weight_temp, 2, 2);
2555 static SENSOR_DEVICE_ATTR_2(pwm4_weight_temp_step_base, S_IWUSR | S_IRUGO,
2556                             show_weight_temp, store_weight_temp, 3, 2);
2557 static SENSOR_DEVICE_ATTR_2(pwm5_weight_temp_step_base, S_IWUSR | S_IRUGO,
2558                             show_weight_temp, store_weight_temp, 4, 2);
2559
2560 static SENSOR_DEVICE_ATTR_2(pwm1_weight_duty_step, S_IWUSR | S_IRUGO,
2561                             show_pwm, store_pwm, 0, 5);
2562 static SENSOR_DEVICE_ATTR_2(pwm2_weight_duty_step, S_IWUSR | S_IRUGO,
2563                             show_pwm, store_pwm, 1, 5);
2564 static SENSOR_DEVICE_ATTR_2(pwm3_weight_duty_step, S_IWUSR | S_IRUGO,
2565                             show_pwm, store_pwm, 2, 5);
2566 static SENSOR_DEVICE_ATTR_2(pwm4_weight_duty_step, S_IWUSR | S_IRUGO,
2567                             show_pwm, store_pwm, 3, 5);
2568 static SENSOR_DEVICE_ATTR_2(pwm5_weight_duty_step, S_IWUSR | S_IRUGO,
2569                             show_pwm, store_pwm, 4, 5);
2570
2571 /* duty_base is not supported on all chips */
2572 static struct sensor_device_attribute_2 sda_weight_duty_base[] = {
2573         SENSOR_ATTR_2(pwm1_weight_duty_base, S_IWUSR | S_IRUGO,
2574                       show_pwm, store_pwm, 0, 6),
2575         SENSOR_ATTR_2(pwm2_weight_duty_base, S_IWUSR | S_IRUGO,
2576                       show_pwm, store_pwm, 1, 6),
2577         SENSOR_ATTR_2(pwm3_weight_duty_base, S_IWUSR | S_IRUGO,
2578                       show_pwm, store_pwm, 2, 6),
2579         SENSOR_ATTR_2(pwm4_weight_duty_base, S_IWUSR | S_IRUGO,
2580                       show_pwm, store_pwm, 3, 6),
2581         SENSOR_ATTR_2(pwm5_weight_duty_base, S_IWUSR | S_IRUGO,
2582                       show_pwm, store_pwm, 4, 6),
2583 };
2584
2585 static ssize_t
2586 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2587 {
2588         struct nct6775_data *data = nct6775_update_device(dev);
2589         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2590         int nr = sattr->nr;
2591         int index = sattr->index;
2592
2593         return sprintf(buf, "%d\n",
2594                        step_time_from_reg(data->fan_time[index][nr],
2595                                           data->pwm_mode[nr]));
2596 }
2597
2598 static ssize_t
2599 store_fan_time(struct device *dev, struct device_attribute *attr,
2600                const char *buf, size_t count)
2601 {
2602         struct nct6775_data *data = dev_get_drvdata(dev);
2603         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2604         int nr = sattr->nr;
2605         int index = sattr->index;
2606         unsigned long val;
2607         int err;
2608
2609         err = kstrtoul(buf, 10, &val);
2610         if (err < 0)
2611                 return err;
2612
2613         val = step_time_to_reg(val, data->pwm_mode[nr]);
2614         mutex_lock(&data->update_lock);
2615         data->fan_time[index][nr] = val;
2616         nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2617         mutex_unlock(&data->update_lock);
2618         return count;
2619 }
2620
2621 static ssize_t
2622 show_name(struct device *dev, struct device_attribute *attr, char *buf)
2623 {
2624         struct nct6775_data *data = dev_get_drvdata(dev);
2625
2626         return sprintf(buf, "%s\n", data->name);
2627 }
2628
2629 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
2630
2631 static SENSOR_DEVICE_ATTR_2(pwm1_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2632                             store_fan_time, 0, 0);
2633 static SENSOR_DEVICE_ATTR_2(pwm2_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2634                             store_fan_time, 1, 0);
2635 static SENSOR_DEVICE_ATTR_2(pwm3_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2636                             store_fan_time, 2, 0);
2637 static SENSOR_DEVICE_ATTR_2(pwm4_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2638                             store_fan_time, 3, 0);
2639 static SENSOR_DEVICE_ATTR_2(pwm5_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2640                             store_fan_time, 4, 0);
2641
2642 static SENSOR_DEVICE_ATTR_2(pwm1_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2643                             store_fan_time, 0, 1);
2644 static SENSOR_DEVICE_ATTR_2(pwm2_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2645                             store_fan_time, 1, 1);
2646 static SENSOR_DEVICE_ATTR_2(pwm3_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2647                             store_fan_time, 2, 1);
2648 static SENSOR_DEVICE_ATTR_2(pwm4_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2649                             store_fan_time, 3, 1);
2650 static SENSOR_DEVICE_ATTR_2(pwm5_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2651                             store_fan_time, 4, 1);
2652
2653 static SENSOR_DEVICE_ATTR_2(pwm1_step_down_time, S_IWUSR | S_IRUGO,
2654                             show_fan_time, store_fan_time, 0, 2);
2655 static SENSOR_DEVICE_ATTR_2(pwm2_step_down_time, S_IWUSR | S_IRUGO,
2656                             show_fan_time, store_fan_time, 1, 2);
2657 static SENSOR_DEVICE_ATTR_2(pwm3_step_down_time, S_IWUSR | S_IRUGO,
2658                             show_fan_time, store_fan_time, 2, 2);
2659 static SENSOR_DEVICE_ATTR_2(pwm4_step_down_time, S_IWUSR | S_IRUGO,
2660                             show_fan_time, store_fan_time, 3, 2);
2661 static SENSOR_DEVICE_ATTR_2(pwm5_step_down_time, S_IWUSR | S_IRUGO,
2662                             show_fan_time, store_fan_time, 4, 2);
2663
2664 static SENSOR_DEVICE_ATTR_2(pwm1_start, S_IWUSR | S_IRUGO, show_pwm,
2665                             store_pwm, 0, 1);
2666 static SENSOR_DEVICE_ATTR_2(pwm2_start, S_IWUSR | S_IRUGO, show_pwm,
2667                             store_pwm, 1, 1);
2668 static SENSOR_DEVICE_ATTR_2(pwm3_start, S_IWUSR | S_IRUGO, show_pwm,
2669                             store_pwm, 2, 1);
2670 static SENSOR_DEVICE_ATTR_2(pwm4_start, S_IWUSR | S_IRUGO, show_pwm,
2671                             store_pwm, 3, 1);
2672 static SENSOR_DEVICE_ATTR_2(pwm5_start, S_IWUSR | S_IRUGO, show_pwm,
2673                             store_pwm, 4, 1);
2674
2675 static SENSOR_DEVICE_ATTR_2(pwm1_floor, S_IWUSR | S_IRUGO, show_pwm,
2676                             store_pwm, 0, 2);
2677 static SENSOR_DEVICE_ATTR_2(pwm2_floor, S_IWUSR | S_IRUGO, show_pwm,
2678                             store_pwm, 1, 2);
2679 static SENSOR_DEVICE_ATTR_2(pwm3_floor, S_IWUSR | S_IRUGO, show_pwm,
2680                             store_pwm, 2, 2);
2681 static SENSOR_DEVICE_ATTR_2(pwm4_floor, S_IWUSR | S_IRUGO, show_pwm,
2682                             store_pwm, 3, 2);
2683 static SENSOR_DEVICE_ATTR_2(pwm5_floor, S_IWUSR | S_IRUGO, show_pwm,
2684                             store_pwm, 4, 2);
2685
2686 static SENSOR_DEVICE_ATTR_2(pwm1_temp_tolerance, S_IWUSR | S_IRUGO,
2687                             show_temp_tolerance, store_temp_tolerance, 0, 0);
2688 static SENSOR_DEVICE_ATTR_2(pwm2_temp_tolerance, S_IWUSR | S_IRUGO,
2689                             show_temp_tolerance, store_temp_tolerance, 1, 0);
2690 static SENSOR_DEVICE_ATTR_2(pwm3_temp_tolerance, S_IWUSR | S_IRUGO,
2691                             show_temp_tolerance, store_temp_tolerance, 2, 0);
2692 static SENSOR_DEVICE_ATTR_2(pwm4_temp_tolerance, S_IWUSR | S_IRUGO,
2693                             show_temp_tolerance, store_temp_tolerance, 3, 0);
2694 static SENSOR_DEVICE_ATTR_2(pwm5_temp_tolerance, S_IWUSR | S_IRUGO,
2695                             show_temp_tolerance, store_temp_tolerance, 4, 0);
2696
2697 static SENSOR_DEVICE_ATTR_2(pwm1_crit_temp_tolerance, S_IWUSR | S_IRUGO,
2698                             show_temp_tolerance, store_temp_tolerance, 0, 1);
2699 static SENSOR_DEVICE_ATTR_2(pwm2_crit_temp_tolerance, S_IWUSR | S_IRUGO,
2700                             show_temp_tolerance, store_temp_tolerance, 1, 1);
2701 static SENSOR_DEVICE_ATTR_2(pwm3_crit_temp_tolerance, S_IWUSR | S_IRUGO,
2702                             show_temp_tolerance, store_temp_tolerance, 2, 1);
2703 static SENSOR_DEVICE_ATTR_2(pwm4_crit_temp_tolerance, S_IWUSR | S_IRUGO,
2704                             show_temp_tolerance, store_temp_tolerance, 3, 1);
2705 static SENSOR_DEVICE_ATTR_2(pwm5_crit_temp_tolerance, S_IWUSR | S_IRUGO,
2706                             show_temp_tolerance, store_temp_tolerance, 4, 1);
2707
2708 /* pwm_max is not supported on all chips */
2709 static struct sensor_device_attribute_2 sda_pwm_max[] = {
2710         SENSOR_ATTR_2(pwm1_max, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2711                       0, 3),
2712         SENSOR_ATTR_2(pwm2_max, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2713                       1, 3),
2714         SENSOR_ATTR_2(pwm3_max, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2715                       2, 3),
2716         SENSOR_ATTR_2(pwm4_max, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2717                       3, 3),
2718         SENSOR_ATTR_2(pwm5_max, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2719                       4, 3),
2720 };
2721
2722 /* pwm_step is not supported on all chips */
2723 static struct sensor_device_attribute_2 sda_pwm_step[] = {
2724         SENSOR_ATTR_2(pwm1_step, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 4),
2725         SENSOR_ATTR_2(pwm2_step, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1, 4),
2726         SENSOR_ATTR_2(pwm3_step, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2, 4),
2727         SENSOR_ATTR_2(pwm4_step, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3, 4),
2728         SENSOR_ATTR_2(pwm5_step, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 4, 4),
2729 };
2730
2731 static struct attribute *nct6775_attributes_pwm[5][20] = {
2732         {
2733                 &sensor_dev_attr_pwm1.dev_attr.attr,
2734                 &sensor_dev_attr_pwm1_mode.dev_attr.attr,
2735                 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2736                 &sensor_dev_attr_pwm1_temp_sel.dev_attr.attr,
2737                 &sensor_dev_attr_pwm1_temp_tolerance.dev_attr.attr,
2738                 &sensor_dev_attr_pwm1_crit_temp_tolerance.dev_attr.attr,
2739                 &sensor_dev_attr_pwm1_target_temp.dev_attr.attr,
2740                 &sensor_dev_attr_fan1_target.dev_attr.attr,
2741                 &sensor_dev_attr_fan1_tolerance.dev_attr.attr,
2742                 &sensor_dev_attr_pwm1_stop_time.dev_attr.attr,
2743                 &sensor_dev_attr_pwm1_step_up_time.dev_attr.attr,
2744                 &sensor_dev_attr_pwm1_step_down_time.dev_attr.attr,
2745                 &sensor_dev_attr_pwm1_start.dev_attr.attr,
2746                 &sensor_dev_attr_pwm1_floor.dev_attr.attr,
2747                 &sensor_dev_attr_pwm1_weight_temp_sel.dev_attr.attr,
2748                 &sensor_dev_attr_pwm1_weight_temp_step.dev_attr.attr,
2749                 &sensor_dev_attr_pwm1_weight_temp_step_tol.dev_attr.attr,
2750                 &sensor_dev_attr_pwm1_weight_temp_step_base.dev_attr.attr,
2751                 &sensor_dev_attr_pwm1_weight_duty_step.dev_attr.attr,
2752                 NULL
2753         },
2754         {
2755                 &sensor_dev_attr_pwm2.dev_attr.attr,
2756                 &sensor_dev_attr_pwm2_mode.dev_attr.attr,
2757                 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2758                 &sensor_dev_attr_pwm2_temp_sel.dev_attr.attr,
2759                 &sensor_dev_attr_pwm2_temp_tolerance.dev_attr.attr,
2760                 &sensor_dev_attr_pwm2_crit_temp_tolerance.dev_attr.attr,
2761                 &sensor_dev_attr_pwm2_target_temp.dev_attr.attr,
2762                 &sensor_dev_attr_fan2_target.dev_attr.attr,
2763                 &sensor_dev_attr_fan2_tolerance.dev_attr.attr,
2764                 &sensor_dev_attr_pwm2_stop_time.dev_attr.attr,
2765                 &sensor_dev_attr_pwm2_step_up_time.dev_attr.attr,
2766                 &sensor_dev_attr_pwm2_step_down_time.dev_attr.attr,
2767                 &sensor_dev_attr_pwm2_start.dev_attr.attr,
2768                 &sensor_dev_attr_pwm2_floor.dev_attr.attr,
2769                 &sensor_dev_attr_pwm2_weight_temp_sel.dev_attr.attr,
2770                 &sensor_dev_attr_pwm2_weight_temp_step.dev_attr.attr,
2771                 &sensor_dev_attr_pwm2_weight_temp_step_tol.dev_attr.attr,
2772                 &sensor_dev_attr_pwm2_weight_temp_step_base.dev_attr.attr,
2773                 &sensor_dev_attr_pwm2_weight_duty_step.dev_attr.attr,
2774                 NULL
2775         },
2776         {
2777                 &sensor_dev_attr_pwm3.dev_attr.attr,
2778                 &sensor_dev_attr_pwm3_mode.dev_attr.attr,
2779                 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2780                 &sensor_dev_attr_pwm3_temp_sel.dev_attr.attr,
2781                 &sensor_dev_attr_pwm3_temp_tolerance.dev_attr.attr,
2782                 &sensor_dev_attr_pwm3_crit_temp_tolerance.dev_attr.attr,
2783                 &sensor_dev_attr_pwm3_target_temp.dev_attr.attr,
2784                 &sensor_dev_attr_fan3_target.dev_attr.attr,
2785                 &sensor_dev_attr_fan3_tolerance.dev_attr.attr,
2786                 &sensor_dev_attr_pwm3_stop_time.dev_attr.attr,
2787                 &sensor_dev_attr_pwm3_step_up_time.dev_attr.attr,
2788                 &sensor_dev_attr_pwm3_step_down_time.dev_attr.attr,
2789                 &sensor_dev_attr_pwm3_start.dev_attr.attr,
2790                 &sensor_dev_attr_pwm3_floor.dev_attr.attr,
2791                 &sensor_dev_attr_pwm3_weight_temp_sel.dev_attr.attr,
2792                 &sensor_dev_attr_pwm3_weight_temp_step.dev_attr.attr,
2793                 &sensor_dev_attr_pwm3_weight_temp_step_tol.dev_attr.attr,
2794                 &sensor_dev_attr_pwm3_weight_temp_step_base.dev_attr.attr,
2795                 &sensor_dev_attr_pwm3_weight_duty_step.dev_attr.attr,
2796                 NULL
2797         },
2798         {
2799                 &sensor_dev_attr_pwm4.dev_attr.attr,
2800                 &sensor_dev_attr_pwm4_mode.dev_attr.attr,
2801                 &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2802                 &sensor_dev_attr_pwm4_temp_sel.dev_attr.attr,
2803                 &sensor_dev_attr_pwm4_temp_tolerance.dev_attr.attr,
2804                 &sensor_dev_attr_pwm4_crit_temp_tolerance.dev_attr.attr,
2805                 &sensor_dev_attr_pwm4_target_temp.dev_attr.attr,
2806                 &sensor_dev_attr_fan4_target.dev_attr.attr,
2807                 &sensor_dev_attr_fan4_tolerance.dev_attr.attr,
2808                 &sensor_dev_attr_pwm4_stop_time.dev_attr.attr,
2809                 &sensor_dev_attr_pwm4_step_up_time.dev_attr.attr,
2810                 &sensor_dev_attr_pwm4_step_down_time.dev_attr.attr,
2811                 &sensor_dev_attr_pwm4_start.dev_attr.attr,
2812                 &sensor_dev_attr_pwm4_floor.dev_attr.attr,
2813                 &sensor_dev_attr_pwm4_weight_temp_sel.dev_attr.attr,
2814                 &sensor_dev_attr_pwm4_weight_temp_step.dev_attr.attr,
2815                 &sensor_dev_attr_pwm4_weight_temp_step_tol.dev_attr.attr,
2816                 &sensor_dev_attr_pwm4_weight_temp_step_base.dev_attr.attr,
2817                 &sensor_dev_attr_pwm4_weight_duty_step.dev_attr.attr,
2818                 NULL
2819         },
2820         {
2821                 &sensor_dev_attr_pwm5.dev_attr.attr,
2822                 &sensor_dev_attr_pwm5_mode.dev_attr.attr,
2823                 &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2824                 &sensor_dev_attr_pwm5_temp_sel.dev_attr.attr,
2825                 &sensor_dev_attr_pwm5_temp_tolerance.dev_attr.attr,
2826                 &sensor_dev_attr_pwm5_crit_temp_tolerance.dev_attr.attr,
2827                 &sensor_dev_attr_pwm5_target_temp.dev_attr.attr,
2828                 &sensor_dev_attr_fan5_target.dev_attr.attr,
2829                 &sensor_dev_attr_fan5_tolerance.dev_attr.attr,
2830                 &sensor_dev_attr_pwm5_stop_time.dev_attr.attr,
2831                 &sensor_dev_attr_pwm5_step_up_time.dev_attr.attr,
2832                 &sensor_dev_attr_pwm5_step_down_time.dev_attr.attr,
2833                 &sensor_dev_attr_pwm5_start.dev_attr.attr,
2834                 &sensor_dev_attr_pwm5_floor.dev_attr.attr,
2835                 &sensor_dev_attr_pwm5_weight_temp_sel.dev_attr.attr,
2836                 &sensor_dev_attr_pwm5_weight_temp_step.dev_attr.attr,
2837                 &sensor_dev_attr_pwm5_weight_temp_step_tol.dev_attr.attr,
2838                 &sensor_dev_attr_pwm5_weight_temp_step_base.dev_attr.attr,
2839                 &sensor_dev_attr_pwm5_weight_duty_step.dev_attr.attr,
2840                 NULL
2841         },
2842 };
2843
2844 static const struct attribute_group nct6775_group_pwm[5] = {
2845         { .attrs = nct6775_attributes_pwm[0] },
2846         { .attrs = nct6775_attributes_pwm[1] },
2847         { .attrs = nct6775_attributes_pwm[2] },
2848         { .attrs = nct6775_attributes_pwm[3] },
2849         { .attrs = nct6775_attributes_pwm[4] },
2850 };
2851
2852 static ssize_t
2853 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2854 {
2855         struct nct6775_data *data = nct6775_update_device(dev);
2856         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2857
2858         return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2859 }
2860
2861 static ssize_t
2862 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2863                const char *buf, size_t count)
2864 {
2865         struct nct6775_data *data = dev_get_drvdata(dev);
2866         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2867         int nr = sattr->nr;
2868         int point = sattr->index;
2869         unsigned long val;
2870         int err;
2871         u8 reg;
2872
2873         err = kstrtoul(buf, 10, &val);
2874         if (err < 0)
2875                 return err;
2876         if (val > 255)
2877                 return -EINVAL;
2878
2879         if (point == data->auto_pwm_num) {
2880                 if (data->kind != nct6775 && !val)
2881                         return -EINVAL;
2882                 if (data->kind != nct6779 && val)
2883                         val = 0xff;
2884         }
2885
2886         mutex_lock(&data->update_lock);
2887         data->auto_pwm[nr][point] = val;
2888         if (point < data->auto_pwm_num) {
2889                 nct6775_write_value(data,
2890                                     NCT6775_AUTO_PWM(data, nr, point),
2891                                     data->auto_pwm[nr][point]);
2892         } else {
2893                 switch (data->kind) {
2894                 case nct6775:
2895                         /* disable if needed (pwm == 0) */
2896                         reg = nct6775_read_value(data,
2897                                                  NCT6775_REG_CRITICAL_ENAB[nr]);
2898                         if (val)
2899                                 reg |= 0x02;
2900                         else
2901                                 reg &= ~0x02;
2902                         nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
2903                                             reg);
2904                         break;
2905                 case nct6776:
2906                         break; /* always enabled, nothing to do */
2907                 case nct6779:
2908                         nct6775_write_value(data, NCT6779_REG_CRITICAL_PWM[nr],
2909                                             val);
2910                         reg = nct6775_read_value(data,
2911                                         NCT6779_REG_CRITICAL_PWM_ENABLE[nr]);
2912                         if (val == 255)
2913                                 reg &= ~0x01;
2914                         else
2915                                 reg |= 0x01;
2916                         nct6775_write_value(data,
2917                                             NCT6779_REG_CRITICAL_PWM_ENABLE[nr],
2918                                             reg);
2919                         break;
2920                 }
2921         }
2922         mutex_unlock(&data->update_lock);
2923         return count;
2924 }
2925
2926 static ssize_t
2927 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
2928 {
2929         struct nct6775_data *data = nct6775_update_device(dev);
2930         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2931         int nr = sattr->nr;
2932         int point = sattr->index;
2933
2934         /*
2935          * We don't know for sure if the temperature is signed or unsigned.
2936          * Assume it is unsigned.
2937          */
2938         return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
2939 }
2940
2941 static ssize_t
2942 store_auto_temp(struct device *dev, struct device_attribute *attr,
2943                 const char *buf, size_t count)
2944 {
2945         struct nct6775_data *data = dev_get_drvdata(dev);
2946         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2947         int nr = sattr->nr;
2948         int point = sattr->index;
2949         unsigned long val;
2950         int err;
2951
2952         err = kstrtoul(buf, 10, &val);
2953         if (err)
2954                 return err;
2955         if (val > 255000)
2956                 return -EINVAL;
2957
2958         mutex_lock(&data->update_lock);
2959         data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
2960         if (point < data->auto_pwm_num) {
2961                 nct6775_write_value(data,
2962                                     NCT6775_AUTO_TEMP(data, nr, point),
2963                                     data->auto_temp[nr][point]);
2964         } else {
2965                 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
2966                                     data->auto_temp[nr][point]);
2967         }
2968         mutex_unlock(&data->update_lock);
2969         return count;
2970 }
2971
2972 /*
2973  * The number of auto-point trip points is chip dependent.
2974  * Need to check support while generating/removing attribute files.
2975  */
2976 static struct sensor_device_attribute_2 sda_auto_pwm_arrays[] = {
2977         SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IWUSR | S_IRUGO,
2978                       show_auto_pwm, store_auto_pwm, 0, 0),
2979         SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IWUSR | S_IRUGO,
2980                       show_auto_temp, store_auto_temp, 0, 0),
2981         SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IWUSR | S_IRUGO,
2982                       show_auto_pwm, store_auto_pwm, 0, 1),
2983         SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IWUSR | S_IRUGO,
2984                       show_auto_temp, store_auto_temp, 0, 1),
2985         SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IWUSR | S_IRUGO,
2986                       show_auto_pwm, store_auto_pwm, 0, 2),
2987         SENSOR_ATTR_2(pwm1_auto_point3_temp, S_IWUSR | S_IRUGO,
2988                       show_auto_temp, store_auto_temp, 0, 2),
2989         SENSOR_ATTR_2(pwm1_auto_point4_pwm, S_IWUSR | S_IRUGO,
2990                       show_auto_pwm, store_auto_pwm, 0, 3),
2991         SENSOR_ATTR_2(pwm1_auto_point4_temp, S_IWUSR | S_IRUGO,
2992                       show_auto_temp, store_auto_temp, 0, 3),
2993         SENSOR_ATTR_2(pwm1_auto_point5_pwm, S_IWUSR | S_IRUGO,
2994                       show_auto_pwm, store_auto_pwm, 0, 4),
2995         SENSOR_ATTR_2(pwm1_auto_point5_temp, S_IWUSR | S_IRUGO,
2996                       show_auto_temp, store_auto_temp, 0, 4),
2997         SENSOR_ATTR_2(pwm1_auto_point6_pwm, S_IWUSR | S_IRUGO,
2998                       show_auto_pwm, store_auto_pwm, 0, 5),
2999         SENSOR_ATTR_2(pwm1_auto_point6_temp, S_IWUSR | S_IRUGO,
3000                       show_auto_temp, store_auto_temp, 0, 5),
3001         SENSOR_ATTR_2(pwm1_auto_point7_pwm, S_IWUSR | S_IRUGO,
3002                       show_auto_pwm, store_auto_pwm, 0, 6),
3003         SENSOR_ATTR_2(pwm1_auto_point7_temp, S_IWUSR | S_IRUGO,
3004                       show_auto_temp, store_auto_temp, 0, 6),
3005
3006         SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IWUSR | S_IRUGO,
3007                       show_auto_pwm, store_auto_pwm, 1, 0),
3008         SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IWUSR | S_IRUGO,
3009                       show_auto_temp, store_auto_temp, 1, 0),
3010         SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IWUSR | S_IRUGO,
3011                       show_auto_pwm, store_auto_pwm, 1, 1),
3012         SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IWUSR | S_IRUGO,
3013                       show_auto_temp, store_auto_temp, 1, 1),
3014         SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IWUSR | S_IRUGO,
3015                       show_auto_pwm, store_auto_pwm, 1, 2),
3016         SENSOR_ATTR_2(pwm2_auto_point3_temp, S_IWUSR | S_IRUGO,
3017                       show_auto_temp, store_auto_temp, 1, 2),
3018         SENSOR_ATTR_2(pwm2_auto_point4_pwm, S_IWUSR | S_IRUGO,
3019                       show_auto_pwm, store_auto_pwm, 1, 3),
3020         SENSOR_ATTR_2(pwm2_auto_point4_temp, S_IWUSR | S_IRUGO,
3021                       show_auto_temp, store_auto_temp, 1, 3),
3022         SENSOR_ATTR_2(pwm2_auto_point5_pwm, S_IWUSR | S_IRUGO,
3023                       show_auto_pwm, store_auto_pwm, 1, 4),
3024         SENSOR_ATTR_2(pwm2_auto_point5_temp, S_IWUSR | S_IRUGO,
3025                       show_auto_temp, store_auto_temp, 1, 4),
3026         SENSOR_ATTR_2(pwm2_auto_point6_pwm, S_IWUSR | S_IRUGO,
3027                       show_auto_pwm, store_auto_pwm, 1, 5),
3028         SENSOR_ATTR_2(pwm2_auto_point6_temp, S_IWUSR | S_IRUGO,
3029                       show_auto_temp, store_auto_temp, 1, 5),
3030         SENSOR_ATTR_2(pwm2_auto_point7_pwm, S_IWUSR | S_IRUGO,
3031                       show_auto_pwm, store_auto_pwm, 1, 6),
3032         SENSOR_ATTR_2(pwm2_auto_point7_temp, S_IWUSR | S_IRUGO,
3033                       show_auto_temp, store_auto_temp, 1, 6),
3034
3035         SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IWUSR | S_IRUGO,
3036                       show_auto_pwm, store_auto_pwm, 2, 0),
3037         SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IWUSR | S_IRUGO,
3038                       show_auto_temp, store_auto_temp, 2, 0),
3039         SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IWUSR | S_IRUGO,
3040                       show_auto_pwm, store_auto_pwm, 2, 1),
3041         SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IWUSR | S_IRUGO,
3042                       show_auto_temp, store_auto_temp, 2, 1),
3043         SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IWUSR | S_IRUGO,
3044                       show_auto_pwm, store_auto_pwm, 2, 2),
3045         SENSOR_ATTR_2(pwm3_auto_point3_temp, S_IWUSR | S_IRUGO,
3046                       show_auto_temp, store_auto_temp, 2, 2),
3047         SENSOR_ATTR_2(pwm3_auto_point4_pwm, S_IWUSR | S_IRUGO,
3048                       show_auto_pwm, store_auto_pwm, 2, 3),
3049         SENSOR_ATTR_2(pwm3_auto_point4_temp, S_IWUSR | S_IRUGO,
3050                       show_auto_temp, store_auto_temp, 2, 3),
3051         SENSOR_ATTR_2(pwm3_auto_point5_pwm, S_IWUSR | S_IRUGO,
3052                       show_auto_pwm, store_auto_pwm, 2, 4),
3053         SENSOR_ATTR_2(pwm3_auto_point5_temp, S_IWUSR | S_IRUGO,
3054                       show_auto_temp, store_auto_temp, 2, 4),
3055         SENSOR_ATTR_2(pwm3_auto_point6_pwm, S_IWUSR | S_IRUGO,
3056                       show_auto_pwm, store_auto_pwm, 2, 5),
3057         SENSOR_ATTR_2(pwm3_auto_point6_temp, S_IWUSR | S_IRUGO,
3058                       show_auto_temp, store_auto_temp, 2, 5),
3059         SENSOR_ATTR_2(pwm3_auto_point7_pwm, S_IWUSR | S_IRUGO,
3060                       show_auto_pwm, store_auto_pwm, 2, 6),
3061         SENSOR_ATTR_2(pwm3_auto_point7_temp, S_IWUSR | S_IRUGO,
3062                       show_auto_temp, store_auto_temp, 2, 6),
3063
3064         SENSOR_ATTR_2(pwm4_auto_point1_pwm, S_IWUSR | S_IRUGO,
3065                       show_auto_pwm, store_auto_pwm, 3, 0),
3066         SENSOR_ATTR_2(pwm4_auto_point1_temp, S_IWUSR | S_IRUGO,
3067                       show_auto_temp, store_auto_temp, 3, 0),
3068         SENSOR_ATTR_2(pwm4_auto_point2_pwm, S_IWUSR | S_IRUGO,
3069                       show_auto_pwm, store_auto_pwm, 3, 1),
3070         SENSOR_ATTR_2(pwm4_auto_point2_temp, S_IWUSR | S_IRUGO,
3071                       show_auto_temp, store_auto_temp, 3, 1),
3072         SENSOR_ATTR_2(pwm4_auto_point3_pwm, S_IWUSR | S_IRUGO,
3073                       show_auto_pwm, store_auto_pwm, 3, 2),
3074         SENSOR_ATTR_2(pwm4_auto_point3_temp, S_IWUSR | S_IRUGO,
3075                       show_auto_temp, store_auto_temp, 3, 2),
3076         SENSOR_ATTR_2(pwm4_auto_point4_pwm, S_IWUSR | S_IRUGO,
3077                       show_auto_pwm, store_auto_pwm, 3, 3),
3078         SENSOR_ATTR_2(pwm4_auto_point4_temp, S_IWUSR | S_IRUGO,
3079                       show_auto_temp, store_auto_temp, 3, 3),
3080         SENSOR_ATTR_2(pwm4_auto_point5_pwm, S_IWUSR | S_IRUGO,
3081                       show_auto_pwm, store_auto_pwm, 3, 4),
3082         SENSOR_ATTR_2(pwm4_auto_point5_temp, S_IWUSR | S_IRUGO,
3083                       show_auto_temp, store_auto_temp, 3, 4),
3084         SENSOR_ATTR_2(pwm4_auto_point6_pwm, S_IWUSR | S_IRUGO,
3085                       show_auto_pwm, store_auto_pwm, 3, 5),
3086         SENSOR_ATTR_2(pwm4_auto_point6_temp, S_IWUSR | S_IRUGO,
3087                       show_auto_temp, store_auto_temp, 3, 5),
3088         SENSOR_ATTR_2(pwm4_auto_point7_pwm, S_IWUSR | S_IRUGO,
3089                       show_auto_pwm, store_auto_pwm, 3, 6),
3090         SENSOR_ATTR_2(pwm4_auto_point7_temp, S_IWUSR | S_IRUGO,
3091                       show_auto_temp, store_auto_temp, 3, 6),
3092
3093         SENSOR_ATTR_2(pwm5_auto_point1_pwm, S_IWUSR | S_IRUGO,
3094                       show_auto_pwm, store_auto_pwm, 4, 0),
3095         SENSOR_ATTR_2(pwm5_auto_point1_temp, S_IWUSR | S_IRUGO,
3096                       show_auto_temp, store_auto_temp, 4, 0),
3097         SENSOR_ATTR_2(pwm5_auto_point2_pwm, S_IWUSR | S_IRUGO,
3098                       show_auto_pwm, store_auto_pwm, 4, 1),
3099         SENSOR_ATTR_2(pwm5_auto_point2_temp, S_IWUSR | S_IRUGO,
3100                       show_auto_temp, store_auto_temp, 4, 1),
3101         SENSOR_ATTR_2(pwm5_auto_point3_pwm, S_IWUSR | S_IRUGO,
3102                       show_auto_pwm, store_auto_pwm, 4, 2),
3103         SENSOR_ATTR_2(pwm5_auto_point3_temp, S_IWUSR | S_IRUGO,
3104                       show_auto_temp, store_auto_temp, 4, 2),
3105         SENSOR_ATTR_2(pwm5_auto_point4_pwm, S_IWUSR | S_IRUGO,
3106                       show_auto_pwm, store_auto_pwm, 4, 3),
3107         SENSOR_ATTR_2(pwm5_auto_point4_temp, S_IWUSR | S_IRUGO,
3108                       show_auto_temp, store_auto_temp, 4, 3),
3109         SENSOR_ATTR_2(pwm5_auto_point5_pwm, S_IWUSR | S_IRUGO,
3110                       show_auto_pwm, store_auto_pwm, 4, 4),
3111         SENSOR_ATTR_2(pwm5_auto_point5_temp, S_IWUSR | S_IRUGO,
3112                       show_auto_temp, store_auto_temp, 4, 4),
3113         SENSOR_ATTR_2(pwm5_auto_point6_pwm, S_IWUSR | S_IRUGO,
3114                       show_auto_pwm, store_auto_pwm, 4, 5),
3115         SENSOR_ATTR_2(pwm5_auto_point6_temp, S_IWUSR | S_IRUGO,
3116                       show_auto_temp, store_auto_temp, 4, 5),
3117         SENSOR_ATTR_2(pwm5_auto_point7_pwm, S_IWUSR | S_IRUGO,
3118                       show_auto_pwm, store_auto_pwm, 4, 6),
3119         SENSOR_ATTR_2(pwm5_auto_point7_temp, S_IWUSR | S_IRUGO,
3120                       show_auto_temp, store_auto_temp, 4, 6),
3121 };
3122
3123 static ssize_t
3124 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
3125 {
3126         struct nct6775_data *data = dev_get_drvdata(dev);
3127         return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
3128 }
3129
3130 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
3131
3132 /* Case open detection */
3133
3134 static ssize_t
3135 clear_caseopen(struct device *dev, struct device_attribute *attr,
3136                const char *buf, size_t count)
3137 {
3138         struct nct6775_data *data = dev_get_drvdata(dev);
3139         struct nct6775_sio_data *sio_data = dev->platform_data;
3140         int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
3141         unsigned long val;
3142         u8 reg;
3143         int ret;
3144
3145         if (kstrtoul(buf, 10, &val) || val != 0)
3146                 return -EINVAL;
3147
3148         mutex_lock(&data->update_lock);
3149
3150         /*
3151          * Use CR registers to clear caseopen status.
3152          * The CR registers are the same for all chips, and not all chips
3153          * support clearing the caseopen status through "regular" registers.
3154          */
3155         ret = superio_enter(sio_data->sioreg);
3156         if (ret) {
3157                 count = ret;
3158                 goto error;
3159         }
3160
3161         superio_select(sio_data->sioreg, NCT6775_LD_ACPI);
3162         reg = superio_inb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
3163         reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3164         superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3165         reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3166         superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3167         superio_exit(sio_data->sioreg);
3168
3169         data->valid = false;    /* Force cache refresh */
3170 error:
3171         mutex_unlock(&data->update_lock);
3172         return count;
3173 }
3174
3175 static struct sensor_device_attribute sda_caseopen[] = {
3176         SENSOR_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
3177                     clear_caseopen, INTRUSION_ALARM_BASE),
3178         SENSOR_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
3179                     clear_caseopen, INTRUSION_ALARM_BASE + 1),
3180 };
3181
3182 /*
3183  * Driver and device management
3184  */
3185
3186 static void nct6775_device_remove_files(struct device *dev)
3187 {
3188         /*
3189          * some entries in the following arrays may not have been used in
3190          * device_create_file(), but device_remove_file() will ignore them
3191          */
3192         int i;
3193         struct nct6775_data *data = dev_get_drvdata(dev);
3194
3195         for (i = 0; i < data->pwm_num; i++)
3196                 sysfs_remove_group(&dev->kobj, &nct6775_group_pwm[i]);
3197
3198         for (i = 0; i < ARRAY_SIZE(sda_pwm_max); i++)
3199                 device_remove_file(dev, &sda_pwm_max[i].dev_attr);
3200
3201         for (i = 0; i < ARRAY_SIZE(sda_pwm_step); i++)
3202                 device_remove_file(dev, &sda_pwm_step[i].dev_attr);
3203
3204         for (i = 0; i < ARRAY_SIZE(sda_weight_duty_base); i++)
3205                 device_remove_file(dev, &sda_weight_duty_base[i].dev_attr);
3206
3207         for (i = 0; i < ARRAY_SIZE(sda_auto_pwm_arrays); i++)
3208                 device_remove_file(dev, &sda_auto_pwm_arrays[i].dev_attr);
3209
3210         for (i = 0; i < data->in_num; i++)
3211                 sysfs_remove_group(&dev->kobj, &nct6775_group_in[i]);
3212
3213         for (i = 0; i < 5; i++) {
3214                 device_remove_file(dev, &sda_fan_input[i].dev_attr);
3215                 device_remove_file(dev, &sda_fan_alarm[i].dev_attr);
3216                 device_remove_file(dev, &sda_fan_div[i].dev_attr);
3217                 device_remove_file(dev, &sda_fan_min[i].dev_attr);
3218                 device_remove_file(dev, &sda_fan_pulses[i].dev_attr);
3219         }
3220         for (i = 0; i < NUM_TEMP; i++) {
3221                 if (!(data->have_temp & (1 << i)))
3222                         continue;
3223                 device_remove_file(dev, &sda_temp_input[i].dev_attr);
3224                 device_remove_file(dev, &sda_temp_label[i].dev_attr);
3225                 device_remove_file(dev, &sda_temp_max[i].dev_attr);
3226                 device_remove_file(dev, &sda_temp_max_hyst[i].dev_attr);
3227                 device_remove_file(dev, &sda_temp_crit[i].dev_attr);
3228                 if (!(data->have_temp_fixed & (1 << i)))
3229                         continue;
3230                 device_remove_file(dev, &sda_temp_type[i].dev_attr);
3231                 device_remove_file(dev, &sda_temp_offset[i].dev_attr);
3232                 if (i >= NUM_TEMP_ALARM)
3233                         continue;
3234                 device_remove_file(dev, &sda_temp_alarm[i].dev_attr);
3235         }
3236
3237         device_remove_file(dev, &sda_caseopen[0].dev_attr);
3238         device_remove_file(dev, &sda_caseopen[1].dev_attr);
3239
3240         device_remove_file(dev, &dev_attr_name);
3241         device_remove_file(dev, &dev_attr_cpu0_vid);
3242 }
3243
3244 /* Get the monitoring functions started */
3245 static inline void nct6775_init_device(struct nct6775_data *data)
3246 {
3247         int i;
3248         u8 tmp, diode;
3249
3250         /* Start monitoring if needed */
3251         if (data->REG_CONFIG) {
3252                 tmp = nct6775_read_value(data, data->REG_CONFIG);
3253                 if (!(tmp & 0x01))
3254                         nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
3255         }
3256
3257         /* Enable temperature sensors if needed */
3258         for (i = 0; i < NUM_TEMP; i++) {
3259                 if (!(data->have_temp & (1 << i)))
3260                         continue;
3261                 if (!data->reg_temp_config[i])
3262                         continue;
3263                 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
3264                 if (tmp & 0x01)
3265                         nct6775_write_value(data, data->reg_temp_config[i],
3266                                             tmp & 0xfe);
3267         }
3268
3269         /* Enable VBAT monitoring if needed */
3270         tmp = nct6775_read_value(data, data->REG_VBAT);
3271         if (!(tmp & 0x01))
3272                 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
3273
3274         diode = nct6775_read_value(data, data->REG_DIODE);
3275
3276         for (i = 0; i < data->temp_fixed_num; i++) {
3277                 if (!(data->have_temp_fixed & (1 << i)))
3278                         continue;
3279                 if ((tmp & (0x02 << i)))        /* diode */
3280                         data->temp_type[i] = 3 - ((diode >> i) & 0x02);
3281                 else                            /* thermistor */
3282                         data->temp_type[i] = 4;
3283         }
3284 }
3285
3286 static int
3287 nct6775_check_fan_inputs(const struct nct6775_sio_data *sio_data,
3288                          struct nct6775_data *data)
3289 {
3290         int regval;
3291         bool fan3pin, fan3min, fan4pin, fan4min, fan5pin;
3292         bool pwm3pin, pwm4pin, pwm5pin;
3293         int ret;
3294
3295         ret = superio_enter(sio_data->sioreg);
3296         if (ret)
3297                 return ret;
3298
3299         /* fan4 and fan5 share some pins with the GPIO and serial flash */
3300         if (data->kind == nct6775) {
3301                 regval = superio_inb(sio_data->sioreg, 0x2c);
3302
3303                 fan3pin = regval & (1 << 6);
3304                 fan3min = fan3pin;
3305                 pwm3pin = regval & (1 << 7);
3306
3307                 /* On NCT6775, fan4 shares pins with the fdc interface */
3308                 fan4pin = !(superio_inb(sio_data->sioreg, 0x2A) & 0x80);
3309                 fan4min = 0;
3310                 fan5pin = 0;
3311                 pwm4pin = 0;
3312                 pwm5pin = 0;
3313         } else if (data->kind == nct6776) {
3314                 bool gpok = superio_inb(sio_data->sioreg, 0x27) & 0x80;
3315
3316                 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3317                 regval = superio_inb(sio_data->sioreg, SIO_REG_ENABLE);
3318
3319                 if (regval & 0x80)
3320                         fan3pin = gpok;
3321                 else
3322                         fan3pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x40);
3323
3324                 if (regval & 0x40)
3325                         fan4pin = gpok;
3326                 else
3327                         fan4pin = superio_inb(sio_data->sioreg, 0x1C) & 0x01;
3328
3329                 if (regval & 0x20)
3330                         fan5pin = gpok;
3331                 else
3332                         fan5pin = superio_inb(sio_data->sioreg, 0x1C) & 0x02;
3333
3334                 fan4min = fan4pin;
3335                 fan3min = fan3pin;
3336                 pwm3pin = fan3pin;
3337                 pwm4pin = 0;
3338                 pwm5pin = 0;
3339         } else {        /* NCT6779D */
3340                 regval = superio_inb(sio_data->sioreg, 0x1c);
3341
3342                 fan3pin = !(regval & (1 << 5));
3343                 fan4pin = !(regval & (1 << 6));
3344                 fan5pin = !(regval & (1 << 7));
3345
3346                 pwm3pin = !(regval & (1 << 0));
3347                 pwm4pin = !(regval & (1 << 1));
3348                 pwm5pin = !(regval & (1 << 2));
3349
3350                 fan3min = fan3pin;
3351                 fan4min = fan4pin;
3352         }
3353
3354         superio_exit(sio_data->sioreg);
3355
3356         data->has_fan = data->has_fan_min = 0x03; /* fan1 and fan2 */
3357         data->has_fan |= fan3pin << 2;
3358         data->has_fan_min |= fan3min << 2;
3359
3360         data->has_fan |= (fan4pin << 3) | (fan5pin << 4);
3361         data->has_fan_min |= (fan4min << 3) | (fan5pin << 4);
3362
3363         data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) | (pwm5pin << 4);
3364
3365         return 0;
3366 }
3367
3368 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
3369                              int *available, int *mask)
3370 {
3371         int i;
3372         u8 src;
3373
3374         for (i = 0; i < data->pwm_num && *available; i++) {
3375                 int index;
3376
3377                 if (!regp[i])
3378                         continue;
3379                 src = nct6775_read_value(data, regp[i]);
3380                 src &= 0x1f;
3381                 if (!src || (*mask & (1 << src)))
3382                         continue;
3383                 if (src >= data->temp_label_num ||
3384                     !strlen(data->temp_label[src]))
3385                         continue;
3386
3387                 index = __ffs(*available);
3388                 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3389                 *available &= ~(1 << index);
3390                 *mask |= 1 << src;
3391         }
3392 }
3393
3394 static int nct6775_probe(struct platform_device *pdev)
3395 {
3396         struct device *dev = &pdev->dev;
3397         struct nct6775_sio_data *sio_data = dev->platform_data;
3398         struct nct6775_data *data;
3399         struct resource *res;
3400         int i, s, err = 0;
3401         int src, mask, available;
3402         const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3403         const u16 *reg_temp_alternate, *reg_temp_crit;
3404         int num_reg_temp;
3405         bool have_vid = false;
3406         u8 cr2a;
3407
3408         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3409         if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3410                                  DRVNAME))
3411                 return -EBUSY;
3412
3413         data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3414                             GFP_KERNEL);
3415         if (!data)
3416                 return -ENOMEM;
3417
3418         data->kind = sio_data->kind;
3419         data->addr = res->start;
3420         mutex_init(&data->lock);
3421         mutex_init(&data->update_lock);
3422         data->name = nct6775_device_names[data->kind];
3423         data->bank = 0xff;              /* Force initial bank selection */
3424         platform_set_drvdata(pdev, data);
3425
3426         switch (data->kind) {
3427         case nct6775:
3428                 data->in_num = 9;
3429                 data->pwm_num = 3;
3430                 data->auto_pwm_num = 6;
3431                 data->has_fan_div = true;
3432                 data->temp_fixed_num = 3;
3433
3434                 data->ALARM_BITS = NCT6775_ALARM_BITS;
3435
3436                 data->fan_from_reg = fan_from_reg16;
3437                 data->fan_from_reg_min = fan_from_reg8;
3438                 data->target_temp_mask = 0x7f;
3439                 data->tolerance_mask = 0x0f;
3440                 data->speed_tolerance_limit = 15;
3441
3442                 data->temp_label = nct6775_temp_label;
3443                 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
3444
3445                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3446                 data->REG_VBAT = NCT6775_REG_VBAT;
3447                 data->REG_DIODE = NCT6775_REG_DIODE;
3448                 data->REG_VIN = NCT6775_REG_IN;
3449                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3450                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3451                 data->REG_TARGET = NCT6775_REG_TARGET;
3452                 data->REG_FAN = NCT6775_REG_FAN;
3453                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3454                 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3455                 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3456                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3457                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3458                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3459                 data->REG_PWM[0] = NCT6775_REG_PWM;
3460                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3461                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3462                 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3463                 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3464                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3465                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3466                 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3467                 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3468                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3469                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3470                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3471                 data->REG_CRITICAL_TEMP_TOLERANCE
3472                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3473                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3474                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3475                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3476                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3477                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3478                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3479                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3480                 data->REG_ALARM = NCT6775_REG_ALARM;
3481
3482                 reg_temp = NCT6775_REG_TEMP;
3483                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3484                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3485                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3486                 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3487                 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3488                 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3489
3490                 break;
3491         case nct6776:
3492                 data->in_num = 9;
3493                 data->pwm_num = 3;
3494                 data->auto_pwm_num = 4;
3495                 data->has_fan_div = false;
3496                 data->temp_fixed_num = 3;
3497
3498                 data->ALARM_BITS = NCT6776_ALARM_BITS;
3499
3500                 data->fan_from_reg = fan_from_reg13;
3501                 data->fan_from_reg_min = fan_from_reg13;
3502                 data->target_temp_mask = 0xff;
3503                 data->tolerance_mask = 0x07;
3504                 data->speed_tolerance_limit = 63;
3505
3506                 data->temp_label = nct6776_temp_label;
3507                 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3508
3509                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3510                 data->REG_VBAT = NCT6775_REG_VBAT;
3511                 data->REG_DIODE = NCT6775_REG_DIODE;
3512                 data->REG_VIN = NCT6775_REG_IN;
3513                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3514                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3515                 data->REG_TARGET = NCT6775_REG_TARGET;
3516                 data->REG_FAN = NCT6775_REG_FAN;
3517                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3518                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3519                 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3520                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3521                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3522                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3523                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3524                 data->REG_PWM[0] = NCT6775_REG_PWM;
3525                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3526                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3527                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3528                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3529                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3530                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3531                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3532                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3533                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3534                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3535                 data->REG_CRITICAL_TEMP_TOLERANCE
3536                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3537                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3538                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3539                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3540                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3541                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3542                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3543                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3544                 data->REG_ALARM = NCT6775_REG_ALARM;
3545
3546                 reg_temp = NCT6775_REG_TEMP;
3547                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3548                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3549                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3550                 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3551                 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3552                 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3553
3554                 break;
3555         case nct6779:
3556                 data->in_num = 15;
3557                 data->pwm_num = 5;
3558                 data->auto_pwm_num = 4;
3559                 data->has_fan_div = false;
3560                 data->temp_fixed_num = 6;
3561
3562                 data->ALARM_BITS = NCT6779_ALARM_BITS;
3563
3564                 data->fan_from_reg = fan_from_reg13;
3565                 data->fan_from_reg_min = fan_from_reg13;
3566                 data->target_temp_mask = 0xff;
3567                 data->tolerance_mask = 0x07;
3568                 data->speed_tolerance_limit = 63;
3569
3570                 data->temp_label = nct6779_temp_label;
3571                 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3572
3573                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3574                 data->REG_VBAT = NCT6775_REG_VBAT;
3575                 data->REG_DIODE = NCT6775_REG_DIODE;
3576                 data->REG_VIN = NCT6779_REG_IN;
3577                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3578                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3579                 data->REG_TARGET = NCT6775_REG_TARGET;
3580                 data->REG_FAN = NCT6779_REG_FAN;
3581                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3582                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3583                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3584                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3585                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3586                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3587                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3588                 data->REG_PWM[0] = NCT6775_REG_PWM;
3589                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3590                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3591                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3592                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3593                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3594                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3595                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3596                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3597                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3598                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3599                 data->REG_CRITICAL_TEMP_TOLERANCE
3600                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3601                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3602                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3603                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3604                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3605                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3606                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3607                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3608                 data->REG_ALARM = NCT6779_REG_ALARM;
3609
3610                 reg_temp = NCT6779_REG_TEMP;
3611                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3612                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3613                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3614                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3615                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3616                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3617
3618                 break;
3619         default:
3620                 return -ENODEV;
3621         }
3622         data->have_in = (1 << data->in_num) - 1;
3623         data->have_temp = 0;
3624
3625         /*
3626          * On some boards, not all available temperature sources are monitored,
3627          * even though some of the monitoring registers are unused.
3628          * Get list of unused monitoring registers, then detect if any fan
3629          * controls are configured to use unmonitored temperature sources.
3630          * If so, assign the unmonitored temperature sources to available
3631          * monitoring registers.
3632          */
3633         mask = 0;
3634         available = 0;
3635         for (i = 0; i < num_reg_temp; i++) {
3636                 if (reg_temp[i] == 0)
3637                         continue;
3638
3639                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3640                 if (!src || (mask & (1 << src)))
3641                         available |= 1 << i;
3642
3643                 mask |= 1 << src;
3644         }
3645
3646         /*
3647          * Now find unmonitored temperature registers and enable monitoring
3648          * if additional monitoring registers are available.
3649          */
3650         add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
3651         add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
3652
3653         mask = 0;
3654         s = NUM_TEMP_FIXED;     /* First dynamic temperature attribute */
3655         for (i = 0; i < num_reg_temp; i++) {
3656                 if (reg_temp[i] == 0)
3657                         continue;
3658
3659                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3660                 if (!src || (mask & (1 << src)))
3661                         continue;
3662
3663                 if (src >= data->temp_label_num ||
3664                     !strlen(data->temp_label[src])) {
3665                         dev_info(dev,
3666                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3667                                  src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
3668                         continue;
3669                 }
3670
3671                 mask |= 1 << src;
3672
3673                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3674                 if (src <= data->temp_fixed_num) {
3675                         data->have_temp |= 1 << (src - 1);
3676                         data->have_temp_fixed |= 1 << (src - 1);
3677                         data->reg_temp[0][src - 1] = reg_temp[i];
3678                         data->reg_temp[1][src - 1] = reg_temp_over[i];
3679                         data->reg_temp[2][src - 1] = reg_temp_hyst[i];
3680                         data->reg_temp_config[src - 1] = reg_temp_config[i];
3681                         data->temp_src[src - 1] = src;
3682                         continue;
3683                 }
3684
3685                 if (s >= NUM_TEMP)
3686                         continue;
3687
3688                 /* Use dynamic index for other sources */
3689                 data->have_temp |= 1 << s;
3690                 data->reg_temp[0][s] = reg_temp[i];
3691                 data->reg_temp[1][s] = reg_temp_over[i];
3692                 data->reg_temp[2][s] = reg_temp_hyst[i];
3693                 data->reg_temp_config[s] = reg_temp_config[i];
3694                 if (reg_temp_crit[src - 1])
3695                         data->reg_temp[3][s] = reg_temp_crit[src - 1];
3696
3697                 data->temp_src[s] = src;
3698                 s++;
3699         }
3700
3701 #ifdef USE_ALTERNATE
3702         /*
3703          * Go through the list of alternate temp registers and enable
3704          * if possible.
3705          * The temperature is already monitored if the respective bit in <mask>
3706          * is set.
3707          */
3708         for (i = 0; i < data->temp_label_num - 1; i++) {
3709                 if (!reg_temp_alternate[i])
3710                         continue;
3711                 if (mask & (1 << (i + 1)))
3712                         continue;
3713                 if (i < data->temp_fixed_num) {
3714                         if (data->have_temp & (1 << i))
3715                                 continue;
3716                         data->have_temp |= 1 << i;
3717                         data->have_temp_fixed |= 1 << i;
3718                         data->reg_temp[0][i] = reg_temp_alternate[i];
3719                         data->reg_temp[1][i] = reg_temp_over[i];
3720                         data->reg_temp[2][i] = reg_temp_hyst[i];
3721                         data->temp_src[i] = i + 1;
3722                         continue;
3723                 }
3724
3725                 if (s >= NUM_TEMP)      /* Abort if no more space */
3726                         break;
3727
3728                 data->have_temp |= 1 << s;
3729                 data->reg_temp[0][s] = reg_temp_alternate[i];
3730                 data->temp_src[s] = i + 1;
3731                 s++;
3732         }
3733 #endif /* USE_ALTERNATE */
3734
3735         switch (data->kind) {
3736         case nct6775:
3737                 break;
3738         case nct6776:
3739                 /*
3740                  * On NCT6776, AUXTIN and VIN3 pins are shared.
3741                  * Only way to detect it is to check if AUXTIN is used
3742                  * as a temperature source, and if that source is
3743                  * enabled.
3744                  *
3745                  * If that is the case, disable in6, which reports VIN3.
3746                  * Otherwise disable temp3.
3747                  */
3748                 if (data->have_temp & (1 << 2)) {
3749                         u8 reg = nct6775_read_value(data,
3750                                                     data->reg_temp_config[2]);
3751                         if (reg & 0x01)
3752                                 data->have_temp &= ~(1 << 2);
3753                         else
3754                                 data->have_in &= ~(1 << 6);
3755                 }
3756                 break;
3757         case nct6779:
3758                 /*
3759                  * Shared pins:
3760                  *      VIN4 / AUXTIN0
3761                  *      VIN5 / AUXTIN1
3762                  *      VIN6 / AUXTIN2
3763                  *      VIN7 / AUXTIN3
3764                  *
3765                  * There does not seem to be a clean way to detect if VINx or
3766                  * AUXTINx is active, so for keep both sensor types enabled
3767                  * for now.
3768                  */
3769                 break;
3770         }
3771
3772         /* Initialize the chip */
3773         nct6775_init_device(data);
3774
3775         err = superio_enter(sio_data->sioreg);
3776         if (err)
3777                 return err;
3778
3779         cr2a = superio_inb(sio_data->sioreg, 0x2a);
3780         switch (data->kind) {
3781         case nct6775:
3782                 have_vid = (cr2a & 0x40);
3783                 break;
3784         case nct6776:
3785                 have_vid = (cr2a & 0x60) == 0x40;
3786                 break;
3787         case nct6779:
3788                 break;
3789         }
3790
3791         /*
3792          * Read VID value
3793          * We can get the VID input values directly at logical device D 0xe3.
3794          */
3795         if (have_vid) {
3796                 superio_select(sio_data->sioreg, NCT6775_LD_VID);
3797                 data->vid = superio_inb(sio_data->sioreg, 0xe3);
3798                 data->vrm = vid_which_vrm();
3799         }
3800
3801         if (fan_debounce) {
3802                 u8 tmp;
3803
3804                 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3805                 tmp = superio_inb(sio_data->sioreg,
3806                                   NCT6775_REG_CR_FAN_DEBOUNCE);
3807                 switch (data->kind) {
3808                 case nct6775:
3809                         tmp |= 0x1e;
3810                         break;
3811                 case nct6776:
3812                 case nct6779:
3813                         tmp |= 0x3e;
3814                         break;
3815                 }
3816                 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
3817                              tmp);
3818                 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
3819                          data->name);
3820         }
3821
3822         superio_exit(sio_data->sioreg);
3823
3824         if (have_vid) {
3825                 err = device_create_file(dev, &dev_attr_cpu0_vid);
3826                 if (err)
3827                         return err;
3828         }
3829
3830         err = nct6775_check_fan_inputs(sio_data, data);
3831         if (err)
3832                 goto exit_remove;
3833
3834         /* Read fan clock dividers immediately */
3835         nct6775_init_fan_common(dev, data);
3836
3837         /* Register sysfs hooks */
3838         for (i = 0; i < data->pwm_num; i++) {
3839                 if (!(data->has_pwm & (1 << i)))
3840                         continue;
3841
3842                 err = sysfs_create_group(&dev->kobj, &nct6775_group_pwm[i]);
3843                 if (err)
3844                         goto exit_remove;
3845
3846                 if (data->REG_PWM[3]) {
3847                         err = device_create_file(dev,
3848                                         &sda_pwm_max[i].dev_attr);
3849                         if (err)
3850                                 goto exit_remove;
3851                 }
3852                 if (data->REG_PWM[4]) {
3853                         err = device_create_file(dev,
3854                                         &sda_pwm_step[i].dev_attr);
3855                         if (err)
3856                                 goto exit_remove;
3857                 }
3858                 if (data->REG_PWM[6]) {
3859                         err = device_create_file(dev,
3860                                         &sda_weight_duty_base[i].dev_attr);
3861                         if (err)
3862                                 goto exit_remove;
3863                 }
3864         }
3865         for (i = 0; i < ARRAY_SIZE(sda_auto_pwm_arrays); i++) {
3866                 struct sensor_device_attribute_2 *attr =
3867                         &sda_auto_pwm_arrays[i];
3868
3869                 if (!(data->has_pwm & (1 << attr->nr)))
3870                         continue;
3871                 if (attr->index > data->auto_pwm_num)
3872                         continue;
3873                 err = device_create_file(dev, &attr->dev_attr);
3874                 if (err)
3875                         goto exit_remove;
3876         }
3877
3878         for (i = 0; i < data->in_num; i++) {
3879                 if (!(data->have_in & (1 << i)))
3880                         continue;
3881                 err = sysfs_create_group(&dev->kobj, &nct6775_group_in[i]);
3882                 if (err)
3883                         goto exit_remove;
3884         }
3885
3886         for (i = 0; i < 5; i++) {
3887                 if (data->has_fan & (1 << i)) {
3888                         err = device_create_file(dev,
3889                                                  &sda_fan_input[i].dev_attr);
3890                         if (err)
3891                                 goto exit_remove;
3892                         err = device_create_file(dev,
3893                                                  &sda_fan_alarm[i].dev_attr);
3894                         if (err)
3895                                 goto exit_remove;
3896                         if (data->kind != nct6776 &&
3897                             data->kind != nct6779) {
3898                                 err = device_create_file(dev,
3899                                                 &sda_fan_div[i].dev_attr);
3900                                 if (err)
3901                                         goto exit_remove;
3902                         }
3903                         if (data->has_fan_min & (1 << i)) {
3904                                 err = device_create_file(dev,
3905                                                 &sda_fan_min[i].dev_attr);
3906                                 if (err)
3907                                         goto exit_remove;
3908                         }
3909                         err = device_create_file(dev,
3910                                                 &sda_fan_pulses[i].dev_attr);
3911                         if (err)
3912                                 goto exit_remove;
3913                 }
3914         }
3915
3916         for (i = 0; i < NUM_TEMP; i++) {
3917                 if (!(data->have_temp & (1 << i)))
3918                         continue;
3919                 err = device_create_file(dev, &sda_temp_input[i].dev_attr);
3920                 if (err)
3921                         goto exit_remove;
3922                 if (data->temp_label) {
3923                         err = device_create_file(dev,
3924                                                  &sda_temp_label[i].dev_attr);
3925                         if (err)
3926                                 goto exit_remove;
3927                 }
3928                 if (data->reg_temp[1][i]) {
3929                         err = device_create_file(dev,
3930                                                  &sda_temp_max[i].dev_attr);
3931                         if (err)
3932                                 goto exit_remove;
3933                 }
3934                 if (data->reg_temp[2][i]) {
3935                         err = device_create_file(dev,
3936                                         &sda_temp_max_hyst[i].dev_attr);
3937                         if (err)
3938                                 goto exit_remove;
3939                 }
3940                 if (data->reg_temp[3][i]) {
3941                         err = device_create_file(dev,
3942                                                  &sda_temp_crit[i].dev_attr);
3943                         if (err)
3944                                 goto exit_remove;
3945                 }
3946                 if (!(data->have_temp_fixed & (1 << i)))
3947                         continue;
3948                 err = device_create_file(dev, &sda_temp_type[i].dev_attr);
3949                 if (err)
3950                         goto exit_remove;
3951                 err = device_create_file(dev, &sda_temp_offset[i].dev_attr);
3952                 if (err)
3953                         goto exit_remove;
3954                 if (i >= NUM_TEMP_ALARM ||
3955                     data->ALARM_BITS[TEMP_ALARM_BASE + i] < 0)
3956                         continue;
3957                 err = device_create_file(dev, &sda_temp_alarm[i].dev_attr);
3958                 if (err)
3959                         goto exit_remove;
3960         }
3961
3962         for (i = 0; i < ARRAY_SIZE(sda_caseopen); i++) {
3963                 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + i] < 0)
3964                         continue;
3965                 err = device_create_file(dev, &sda_caseopen[i].dev_attr);
3966                 if (err)
3967                         goto exit_remove;
3968         }
3969
3970         err = device_create_file(dev, &dev_attr_name);
3971         if (err)
3972                 goto exit_remove;
3973
3974         data->hwmon_dev = hwmon_device_register(dev);
3975         if (IS_ERR(data->hwmon_dev)) {
3976                 err = PTR_ERR(data->hwmon_dev);
3977                 goto exit_remove;
3978         }
3979
3980         return 0;
3981
3982 exit_remove:
3983         nct6775_device_remove_files(dev);
3984         return err;
3985 }
3986
3987 static int nct6775_remove(struct platform_device *pdev)
3988 {
3989         struct nct6775_data *data = platform_get_drvdata(pdev);
3990
3991         hwmon_device_unregister(data->hwmon_dev);
3992         nct6775_device_remove_files(&pdev->dev);
3993
3994         return 0;
3995 }
3996
3997 #ifdef CONFIG_PM
3998 static int nct6775_suspend(struct device *dev)
3999 {
4000         struct nct6775_data *data = nct6775_update_device(dev);
4001         struct nct6775_sio_data *sio_data = dev->platform_data;
4002
4003         mutex_lock(&data->update_lock);
4004         data->vbat = nct6775_read_value(data, data->REG_VBAT);
4005         if (sio_data->kind == nct6775) {
4006                 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
4007                 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
4008         }
4009         mutex_unlock(&data->update_lock);
4010
4011         return 0;
4012 }
4013
4014 static int nct6775_resume(struct device *dev)
4015 {
4016         struct nct6775_data *data = dev_get_drvdata(dev);
4017         struct nct6775_sio_data *sio_data = dev->platform_data;
4018         int i, j;
4019
4020         mutex_lock(&data->update_lock);
4021         data->bank = 0xff;              /* Force initial bank selection */
4022
4023         /* Restore limits */
4024         for (i = 0; i < data->in_num; i++) {
4025                 if (!(data->have_in & (1 << i)))
4026                         continue;
4027
4028                 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
4029                                     data->in[i][1]);
4030                 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
4031                                     data->in[i][2]);
4032         }
4033
4034         for (i = 0; i < 5; i++) {
4035                 if (!(data->has_fan_min & (1 << i)))
4036                         continue;
4037
4038                 nct6775_write_value(data, data->REG_FAN_MIN[i],
4039                                     data->fan_min[i]);
4040         }
4041
4042         for (i = 0; i < NUM_TEMP; i++) {
4043                 if (!(data->have_temp & (1 << i)))
4044                         continue;
4045
4046                 for (j = 1; j < 4; j++)
4047                         if (data->reg_temp[j][i])
4048                                 nct6775_write_temp(data, data->reg_temp[j][i],
4049                                                    data->temp[j][i]);
4050         }
4051
4052         /* Restore other settings */
4053         nct6775_write_value(data, data->REG_VBAT, data->vbat);
4054         if (sio_data->kind == nct6775) {
4055                 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
4056                 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
4057         }
4058
4059         /* Force re-reading all values */
4060         data->valid = false;
4061         mutex_unlock(&data->update_lock);
4062
4063         return 0;
4064 }
4065
4066 static const struct dev_pm_ops nct6775_dev_pm_ops = {
4067         .suspend = nct6775_suspend,
4068         .resume = nct6775_resume,
4069 };
4070
4071 #define NCT6775_DEV_PM_OPS      (&nct6775_dev_pm_ops)
4072 #else
4073 #define NCT6775_DEV_PM_OPS      NULL
4074 #endif /* CONFIG_PM */
4075
4076 static struct platform_driver nct6775_driver = {
4077         .driver = {
4078                 .owner  = THIS_MODULE,
4079                 .name   = DRVNAME,
4080                 .pm     = NCT6775_DEV_PM_OPS,
4081         },
4082         .probe          = nct6775_probe,
4083         .remove         = nct6775_remove,
4084 };
4085
4086 /* nct6775_find() looks for a '627 in the Super-I/O config space */
4087 static int __init nct6775_find(int sioaddr, unsigned short *addr,
4088                                struct nct6775_sio_data *sio_data)
4089 {
4090         static const char sio_name_NCT6775[] __initconst = "NCT6775F";
4091         static const char sio_name_NCT6776[] __initconst = "NCT6776F";
4092         static const char sio_name_NCT6779[] __initconst = "NCT6779D";
4093
4094         u16 val;
4095         const char *sio_name;
4096         int err;
4097
4098         err = superio_enter(sioaddr);
4099         if (err)
4100                 return err;
4101
4102         if (force_id)
4103                 val = force_id;
4104         else
4105                 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
4106                     | superio_inb(sioaddr, SIO_REG_DEVID + 1);
4107         switch (val & SIO_ID_MASK) {
4108         case SIO_NCT6775_ID:
4109                 sio_data->kind = nct6775;
4110                 sio_name = sio_name_NCT6775;
4111                 break;
4112         case SIO_NCT6776_ID:
4113                 sio_data->kind = nct6776;
4114                 sio_name = sio_name_NCT6776;
4115                 break;
4116         case SIO_NCT6779_ID:
4117                 sio_data->kind = nct6779;
4118                 sio_name = sio_name_NCT6779;
4119                 break;
4120         default:
4121                 if (val != 0xffff)
4122                         pr_debug("unsupported chip ID: 0x%04x\n", val);
4123                 superio_exit(sioaddr);
4124                 return -ENODEV;
4125         }
4126
4127         /* We have a known chip, find the HWM I/O address */
4128         superio_select(sioaddr, NCT6775_LD_HWM);
4129         val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
4130             | superio_inb(sioaddr, SIO_REG_ADDR + 1);
4131         *addr = val & IOREGION_ALIGNMENT;
4132         if (*addr == 0) {
4133                 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
4134                 superio_exit(sioaddr);
4135                 return -ENODEV;
4136         }
4137
4138         /* Activate logical device if needed */
4139         val = superio_inb(sioaddr, SIO_REG_ENABLE);
4140         if (!(val & 0x01)) {
4141                 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
4142                 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
4143         }
4144
4145         superio_exit(sioaddr);
4146         pr_info("Found %s chip at %#x\n", sio_name, *addr);
4147         sio_data->sioreg = sioaddr;
4148
4149         return 0;
4150 }
4151
4152 /*
4153  * when Super-I/O functions move to a separate file, the Super-I/O
4154  * bus will manage the lifetime of the device and this module will only keep
4155  * track of the nct6775 driver. But since we platform_device_alloc(), we
4156  * must keep track of the device
4157  */
4158 static struct platform_device *pdev;
4159
4160 static int __init sensors_nct6775_init(void)
4161 {
4162         int err;
4163         unsigned short address;
4164         struct resource res;
4165         struct nct6775_sio_data sio_data;
4166
4167         /*
4168          * initialize sio_data->kind and sio_data->sioreg.
4169          *
4170          * when Super-I/O functions move to a separate file, the Super-I/O
4171          * driver will probe 0x2e and 0x4e and auto-detect the presence of a
4172          * nct6775 hardware monitor, and call probe()
4173          */
4174         if (nct6775_find(0x2e, &address, &sio_data) &&
4175             nct6775_find(0x4e, &address, &sio_data))
4176                 return -ENODEV;
4177
4178         err = platform_driver_register(&nct6775_driver);
4179         if (err)
4180                 goto exit;
4181
4182         pdev = platform_device_alloc(DRVNAME, address);
4183         if (!pdev) {
4184                 err = -ENOMEM;
4185                 pr_err("Device allocation failed\n");
4186                 goto exit_unregister;
4187         }
4188
4189         err = platform_device_add_data(pdev, &sio_data,
4190                                        sizeof(struct nct6775_sio_data));
4191         if (err) {
4192                 pr_err("Platform data allocation failed\n");
4193                 goto exit_device_put;
4194         }
4195
4196         memset(&res, 0, sizeof(res));
4197         res.name = DRVNAME;
4198         res.start = address + IOREGION_OFFSET;
4199         res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
4200         res.flags = IORESOURCE_IO;
4201
4202         err = acpi_check_resource_conflict(&res);
4203         if (err)
4204                 goto exit_device_put;
4205
4206         err = platform_device_add_resources(pdev, &res, 1);
4207         if (err) {
4208                 pr_err("Device resource addition failed (%d)\n", err);
4209                 goto exit_device_put;
4210         }
4211
4212         /* platform_device_add calls probe() */
4213         err = platform_device_add(pdev);
4214         if (err) {
4215                 pr_err("Device addition failed (%d)\n", err);
4216                 goto exit_device_put;
4217         }
4218
4219         return 0;
4220
4221 exit_device_put:
4222         platform_device_put(pdev);
4223 exit_unregister:
4224         platform_driver_unregister(&nct6775_driver);
4225 exit:
4226         return err;
4227 }
4228
4229 static void __exit sensors_nct6775_exit(void)
4230 {
4231         platform_device_unregister(pdev);
4232         platform_driver_unregister(&nct6775_driver);
4233 }
4234
4235 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4236 MODULE_DESCRIPTION("NCT6775F/NCT6776F/NCT6779D driver");
4237 MODULE_LICENSE("GPL");
4238
4239 module_init(sensors_nct6775_init);
4240 module_exit(sensors_nct6775_exit);