git.sur5r.net Git - groeck-nct6775/blob - nct6775.c

   1 /*
   2  * nct6775 - Driver for the hardware monitoring functionality of
   3  *             Nuvoton NCT677x Super-I/O chips
   4  *
   5  * Copyright (C) 2012  Guenter Roeck <linux@roeck-us.net>
   6  *
   7  * Derived from w83627ehf driver
   8  * Copyright (C) 2005-2012  Jean Delvare <jdelvare@suse.de>
   9  * Copyright (C) 2006  Yuan Mu (Winbond),
  10  *                     Rudolf Marek <r.marek@assembler.cz>
  11  *                     David Hubbard <david.c.hubbard@gmail.com>
  12  *                     Daniel J Blueman <daniel.blueman@gmail.com>
  13  * Copyright (C) 2010  Sheng-Yuan Huang (Nuvoton) (PS00)
  14  *
  15  * Shamelessly ripped from the w83627hf driver
  16  * Copyright (C) 2003  Mark Studebaker
  17  *
  18  * This program is free software; you can redistribute it and/or modify
  19  * it under the terms of the GNU General Public License as published by
  20  * the Free Software Foundation; either version 2 of the License, or
  21  * (at your option) any later version.
  22  *
  23  * This program is distributed in the hope that it will be useful,
  24  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26  * GNU General Public License for more details.
  27  *
  28  * You should have received a copy of the GNU General Public License
  29  * along with this program; if not, write to the Free Software
  30  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  31  *
  32  *
  33  * Supports the following chips:
  34  *
  35  * Chip        #vin    #fan    #pwm    #temp  chip IDs       man ID
  36  * nct6106d     9      3       3       6+3    0xc450 0xc1    0x5ca3
  37  * nct6775f     9      4       3       6+3    0xb470 0xc1    0x5ca3
  38  * nct6776f     9      5       3       6+3    0xc330 0xc1    0x5ca3
  39  * nct6779d    15      5       5       2+6    0xc560 0xc1    0x5ca3
  40  * nct6791d    15      6       6       2+6    0xc800 0xc1    0x5ca3
  41  * nct6792d    15      6       6       2+6    0xc910 0xc1    0x5ca3
  42  * nct6793d    15      6       6       2+6    0xd120 0xc1    0x5ca3
  43  *
  44  * #temp lists the number of monitored temperature sources (first value) plus
  45  * the number of directly connectable temperature sensors (second value).
  46  */
  47
  48 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  49
  50 #include <linux/module.h>
  51 #include <linux/init.h>
  52 #include <linux/slab.h>
  53 #include <linux/jiffies.h>
  54 #include <linux/platform_device.h>
  55 #include <linux/hwmon.h>
  56 #include <linux/hwmon-sysfs.h>
  57 #include <linux/hwmon-vid.h>
  58 #include <linux/err.h>
  59 #include <linux/mutex.h>
  60 #include <linux/acpi.h>
  61 #include <linux/dmi.h>
  62 #include <linux/io.h>
  63 #include "lm75.h"
  64 #include "compat.h"
  65
  66 #define USE_ALTERNATE
  67
  68 enum kinds { nct6106, nct6775, nct6776, nct6779, nct6791, nct6792, nct6793 };
  69
  70 /* used to set data->name = nct6775_device_names[data->sio_kind] */
  71 static const char * const nct6775_device_names[] = {
  72         "nct6106",
  73         "nct6775",
  74         "nct6776",
  75         "nct6779",
  76         "nct6791",
  77         "nct6792",
  78         "nct6793",
  79 };
  80
  81 static const char * const nct6775_sio_names[] __initconst = {
  82         "NCT6106D",
  83         "NCT6775F",
  84         "NCT6776D/F",
  85         "NCT6779D",
  86         "NCT6791D",
  87         "NCT6792D",
  88         "NCT6793D",
  89 };
  90
  91 static unsigned short force_id;
  92 module_param(force_id, ushort, 0);
  93 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  94
  95 static unsigned short fan_debounce;
  96 module_param(fan_debounce, ushort, 0);
  97 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
  98
  99 #define DRVNAME "nct6775"
 100
 101 /*
 102  * Super-I/O constants and functions
 103  */
 104
 105 #define NCT6775_LD_ACPI         0x0a
 106 #define NCT6775_LD_HWM          0x0b
 107 #define NCT6775_LD_VID          0x0d
 108
 109 #define SIO_REG_LDSEL           0x07    /* Logical device select */
 110 #define SIO_REG_DEVID           0x20    /* Device ID (2 bytes) */
 111 #define SIO_REG_ENABLE          0x30    /* Logical device enable */
 112 #define SIO_REG_ADDR            0x60    /* Logical device address (2 bytes) */
 113
 114 #define SIO_NCT6106_ID          0xc450
 115 #define SIO_NCT6775_ID          0xb470
 116 #define SIO_NCT6776_ID          0xc330
 117 #define SIO_NCT6779_ID          0xc560
 118 #define SIO_NCT6791_ID          0xc800
 119 #define SIO_NCT6792_ID          0xc910
 120 #define SIO_NCT6793_ID          0xd120
 121 #define SIO_ID_MASK             0xFFF0
 122
 123 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
 124
 125 static inline void
 126 superio_outb(int ioreg, int reg, int val)
 127 {
 128         outb(reg, ioreg);
 129         outb(val, ioreg + 1);
 130 }
 131
 132 static inline int
 133 superio_inb(int ioreg, int reg)
 134 {
 135         outb(reg, ioreg);
 136         return inb(ioreg + 1);
 137 }
 138
 139 static inline void
 140 superio_select(int ioreg, int ld)
 141 {
 142         outb(SIO_REG_LDSEL, ioreg);
 143         outb(ld, ioreg + 1);
 144 }
 145
 146 static inline int
 147 superio_enter(int ioreg)
 148 {
 149         /*
 150          * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
 151          */
 152         if (!request_muxed_region(ioreg, 2, DRVNAME))
 153                 return -EBUSY;
 154
 155         outb(0x87, ioreg);
 156         outb(0x87, ioreg);
 157
 158         return 0;
 159 }
 160
 161 static inline void
 162 superio_exit(int ioreg)
 163 {
 164         outb(0xaa, ioreg);
 165         outb(0x02, ioreg);
 166         outb(0x02, ioreg + 1);
 167         release_region(ioreg, 2);
 168 }
 169
 170 /*
 171  * ISA constants
 172  */
 173
 174 #define IOREGION_ALIGNMENT      (~7)
 175 #define IOREGION_OFFSET         5
 176 #define IOREGION_LENGTH         2
 177 #define ADDR_REG_OFFSET         0
 178 #define DATA_REG_OFFSET         1
 179
 180 #define NCT6775_REG_BANK        0x4E
 181 #define NCT6775_REG_CONFIG      0x40
 182
 183 /*
 184  * Not currently used:
 185  * REG_MAN_ID has the value 0x5ca3 for all supported chips.
 186  * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
 187  * REG_MAN_ID is at port 0x4f
 188  * REG_CHIP_ID is at port 0x58
 189  */
 190
 191 #define NUM_TEMP        10      /* Max number of temp attribute sets w/ limits*/
 192 #define NUM_TEMP_FIXED  6       /* Max number of fixed temp attribute sets */
 193
 194 #define NUM_REG_ALARM   7       /* Max number of alarm registers */
 195 #define NUM_REG_BEEP    5       /* Max number of beep registers */
 196
 197 #define NUM_FAN         6
 198
 199 /* Common and NCT6775 specific data */
 200
 201 /* Voltage min/max registers for nr=7..14 are in bank 5 */
 202
 203 static const u16 NCT6775_REG_IN_MAX[] = {
 204         0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
 205         0x55c, 0x55e, 0x560, 0x562 };
 206 static const u16 NCT6775_REG_IN_MIN[] = {
 207         0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
 208         0x55d, 0x55f, 0x561, 0x563 };
 209 static const u16 NCT6775_REG_IN[] = {
 210         0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
 211 };
 212
 213 #define NCT6775_REG_VBAT                0x5D
 214 #define NCT6775_REG_DIODE               0x5E
 215 #define NCT6775_DIODE_MASK              0x02
 216
 217 #define NCT6775_REG_FANDIV1             0x506
 218 #define NCT6775_REG_FANDIV2             0x507
 219
 220 #define NCT6775_REG_CR_FAN_DEBOUNCE     0xf0
 221
 222 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
 223
 224 /* 0..15 voltages, 16..23 fans, 24..29 temperatures, 30..31 intrusion */
 225
 226 static const s8 NCT6775_ALARM_BITS[] = {
 227         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 228         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 229         -1,                             /* unused */
 230         6, 7, 11, -1, -1,               /* fan1..fan5 */
 231         -1, -1, -1,                     /* unused */
 232         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 233         12, -1 };                       /* intrusion0, intrusion1 */
 234
 235 #define FAN_ALARM_BASE          16
 236 #define TEMP_ALARM_BASE         24
 237 #define INTRUSION_ALARM_BASE    30
 238
 239 static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e };
 240
 241 /*
 242  * 0..14 voltages, 15 global beep enable, 16..23 fans, 24..29 temperatures,
 243  * 30..31 intrusion
 244  */
 245 static const s8 NCT6775_BEEP_BITS[] = {
 246         0, 1, 2, 3, 8, 9, 10, 16,       /* in0.. in7 */
 247         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 248         21,                             /* global beep enable */
 249         6, 7, 11, 28, -1,               /* fan1..fan5 */
 250         -1, -1, -1,                     /* unused */
 251         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 252         12, -1 };                       /* intrusion0, intrusion1 */
 253
 254 #define BEEP_ENABLE_BASE                15
 255
 256 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
 257 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
 258
 259 /* DC or PWM output fan configuration */
 260 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
 261 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
 262
 263 /* Advanced Fan control, some values are common for all fans */
 264
 265 static const u16 NCT6775_REG_TARGET[] = {
 266         0x101, 0x201, 0x301, 0x801, 0x901, 0xa01 };
 267 static const u16 NCT6775_REG_FAN_MODE[] = {
 268         0x102, 0x202, 0x302, 0x802, 0x902, 0xa02 };
 269 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
 270         0x103, 0x203, 0x303, 0x803, 0x903, 0xa03 };
 271 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
 272         0x104, 0x204, 0x304, 0x804, 0x904, 0xa04 };
 273 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
 274         0x105, 0x205, 0x305, 0x805, 0x905, 0xa05 };
 275 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = {
 276         0x106, 0x206, 0x306, 0x806, 0x906, 0xa06 };
 277 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
 278 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
 279
 280 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
 281         0x107, 0x207, 0x307, 0x807, 0x907, 0xa07 };
 282 static const u16 NCT6775_REG_PWM[] = {
 283         0x109, 0x209, 0x309, 0x809, 0x909, 0xa09 };
 284 static const u16 NCT6775_REG_PWM_READ[] = {
 285         0x01, 0x03, 0x11, 0x13, 0x15, 0xa09 };
 286
 287 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
 288 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
 289 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
 290 static const u16 NCT6775_FAN_PULSE_SHIFT[] = { 0, 0, 0, 0, 0, 0 };
 291
 292 static const u16 NCT6775_REG_TEMP[] = {
 293         0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
 294
 295 static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77 };
 296
 297 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 298         0, 0x152, 0x252, 0x628, 0x629, 0x62A };
 299 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 300         0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
 301 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 302         0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
 303
 304 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 305         0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
 306
 307 static const u16 NCT6775_REG_TEMP_SEL[] = {
 308         0x100, 0x200, 0x300, 0x800, 0x900, 0xa00 };
 309
 310 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
 311         0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 };
 312 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
 313         0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a };
 314 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
 315         0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b };
 316 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
 317         0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c };
 318 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
 319         0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d };
 320
 321 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
 322
 323 static const u16 NCT6775_REG_AUTO_TEMP[] = {
 324         0x121, 0x221, 0x321, 0x821, 0x921, 0xa21 };
 325 static const u16 NCT6775_REG_AUTO_PWM[] = {
 326         0x127, 0x227, 0x327, 0x827, 0x927, 0xa27 };
 327
 328 #define NCT6775_AUTO_TEMP(data, nr, p)  ((data)->REG_AUTO_TEMP[nr] + (p))
 329 #define NCT6775_AUTO_PWM(data, nr, p)   ((data)->REG_AUTO_PWM[nr] + (p))
 330
 331 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
 332
 333 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
 334         0x135, 0x235, 0x335, 0x835, 0x935, 0xa35 };
 335 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
 336         0x138, 0x238, 0x338, 0x838, 0x938, 0xa38 };
 337
 338 static const char *const nct6775_temp_label[] = {
 339         "",
 340         "SYSTIN",
 341         "CPUTIN",
 342         "AUXTIN",
 343         "AMD SB-TSI",
 344         "PECI Agent 0",
 345         "PECI Agent 1",
 346         "PECI Agent 2",
 347         "PECI Agent 3",
 348         "PECI Agent 4",
 349         "PECI Agent 5",
 350         "PECI Agent 6",
 351         "PECI Agent 7",
 352         "PCH_CHIP_CPU_MAX_TEMP",
 353         "PCH_CHIP_TEMP",
 354         "PCH_CPU_TEMP",
 355         "PCH_MCH_TEMP",
 356         "PCH_DIM0_TEMP",
 357         "PCH_DIM1_TEMP",
 358         "PCH_DIM2_TEMP",
 359         "PCH_DIM3_TEMP"
 360 };
 361
 362 static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
 363         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
 364
 365 static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
 366         = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
 367             0xa07 };
 368
 369 /* NCT6776 specific data */
 370
 371 /* STEP_UP_TIME and STEP_DOWN_TIME regs are swapped for all chips but NCT6775 */
 372 #define NCT6776_REG_FAN_STEP_UP_TIME NCT6775_REG_FAN_STEP_DOWN_TIME
 373 #define NCT6776_REG_FAN_STEP_DOWN_TIME NCT6775_REG_FAN_STEP_UP_TIME
 374
 375 static const s8 NCT6776_ALARM_BITS[] = {
 376         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 377         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 378         -1,                             /* unused */
 379         6, 7, 11, 10, 23,               /* fan1..fan5 */
 380         -1, -1, -1,                     /* unused */
 381         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 382         12, 9 };                        /* intrusion0, intrusion1 */
 383
 384 static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5 };
 385
 386 static const s8 NCT6776_BEEP_BITS[] = {
 387         0, 1, 2, 3, 4, 5, 6, 7,         /* in0.. in7 */
 388         8, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 389         24,                             /* global beep enable */
 390         25, 26, 27, 28, 29,             /* fan1..fan5 */
 391         -1, -1, -1,                     /* unused */
 392         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 393         30, 31 };                       /* intrusion0, intrusion1 */
 394
 395 static const u16 NCT6776_REG_TOLERANCE_H[] = {
 396         0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c };
 397
 398 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0 };
 399 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0 };
 400
 401 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
 402 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
 403
 404 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
 405         0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e };
 406
 407 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 408         0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
 409
 410 static const char *const nct6776_temp_label[] = {
 411         "",
 412         "SYSTIN",
 413         "CPUTIN",
 414         "AUXTIN",
 415         "SMBUSMASTER 0",
 416         "SMBUSMASTER 1",
 417         "SMBUSMASTER 2",
 418         "SMBUSMASTER 3",
 419         "SMBUSMASTER 4",
 420         "SMBUSMASTER 5",
 421         "SMBUSMASTER 6",
 422         "SMBUSMASTER 7",
 423         "PECI Agent 0",
 424         "PECI Agent 1",
 425         "PCH_CHIP_CPU_MAX_TEMP",
 426         "PCH_CHIP_TEMP",
 427         "PCH_CPU_TEMP",
 428         "PCH_MCH_TEMP",
 429         "PCH_DIM0_TEMP",
 430         "PCH_DIM1_TEMP",
 431         "PCH_DIM2_TEMP",
 432         "PCH_DIM3_TEMP",
 433         "BYTE_TEMP"
 434 };
 435
 436 static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
 437         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
 438
 439 static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
 440         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
 441
 442 /* NCT6779 specific data */
 443
 444 static const u16 NCT6779_REG_IN[] = {
 445         0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
 446         0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
 447
 448 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
 449         0x459, 0x45A, 0x45B, 0x568 };
 450
 451 static const s8 NCT6779_ALARM_BITS[] = {
 452         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 453         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 454         -1,                             /* unused */
 455         6, 7, 11, 10, 23,               /* fan1..fan5 */
 456         -1, -1, -1,                     /* unused */
 457         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 458         12, 9 };                        /* intrusion0, intrusion1 */
 459
 460 static const s8 NCT6779_BEEP_BITS[] = {
 461         0, 1, 2, 3, 4, 5, 6, 7,         /* in0.. in7 */
 462         8, 9, 10, 11, 12, 13, 14,       /* in8..in14 */
 463         24,                             /* global beep enable */
 464         25, 26, 27, 28, 29,             /* fan1..fan5 */
 465         -1, -1, -1,                     /* unused */
 466         16, 17, -1, -1, -1, -1,         /* temp1..temp6 */
 467         30, 31 };                       /* intrusion0, intrusion1 */
 468
 469 static const u16 NCT6779_REG_FAN[] = {
 470         0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8, 0x4ba };
 471 static const u16 NCT6779_REG_FAN_PULSES[] = {
 472         0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
 473
 474 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
 475         0x136, 0x236, 0x336, 0x836, 0x936, 0xa36 };
 476 #define NCT6779_CRITICAL_PWM_ENABLE_MASK        0x01
 477 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
 478         0x137, 0x237, 0x337, 0x837, 0x937, 0xa37 };
 479
 480 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
 481 static const u16 NCT6779_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b };
 482 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 483         0x18, 0x152 };
 484 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 485         0x3a, 0x153 };
 486 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 487         0x39, 0x155 };
 488
 489 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
 490         0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
 491
 492 static const char *const nct6779_temp_label[] = {
 493         "",
 494         "SYSTIN",
 495         "CPUTIN",
 496         "AUXTIN0",
 497         "AUXTIN1",
 498         "AUXTIN2",
 499         "AUXTIN3",
 500         "",
 501         "SMBUSMASTER 0",
 502         "SMBUSMASTER 1",
 503         "SMBUSMASTER 2",
 504         "SMBUSMASTER 3",
 505         "SMBUSMASTER 4",
 506         "SMBUSMASTER 5",
 507         "SMBUSMASTER 6",
 508         "SMBUSMASTER 7",
 509         "PECI Agent 0",
 510         "PECI Agent 1",
 511         "PCH_CHIP_CPU_MAX_TEMP",
 512         "PCH_CHIP_TEMP",
 513         "PCH_CPU_TEMP",
 514         "PCH_MCH_TEMP",
 515         "PCH_DIM0_TEMP",
 516         "PCH_DIM1_TEMP",
 517         "PCH_DIM2_TEMP",
 518         "PCH_DIM3_TEMP",
 519         "BYTE_TEMP",
 520         "",
 521         "",
 522         "",
 523         "",
 524         "Virtual_TEMP"
 525 };
 526
 527 #define NCT6779_NUM_LABELS      (ARRAY_SIZE(nct6779_temp_label) - 5)
 528 #define NCT6791_NUM_LABELS      ARRAY_SIZE(nct6779_temp_label)
 529
 530 static const u16 NCT6779_REG_TEMP_ALTERNATE[NCT6791_NUM_LABELS - 1]
 531         = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
 532             0, 0, 0, 0, 0, 0, 0, 0,
 533             0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
 534             0x408, 0 };
 535
 536 static const u16 NCT6779_REG_TEMP_CRIT[NCT6791_NUM_LABELS - 1]
 537         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
 538
 539 /* NCT6791 specific data */
 540
 541 #define NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE     0x28
 542
 543 static const u16 NCT6791_REG_WEIGHT_TEMP_SEL[6] = { 0, 0x239 };
 544 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP[6] = { 0, 0x23a };
 545 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP_TOL[6] = { 0, 0x23b };
 546 static const u16 NCT6791_REG_WEIGHT_DUTY_STEP[6] = { 0, 0x23c };
 547 static const u16 NCT6791_REG_WEIGHT_TEMP_BASE[6] = { 0, 0x23d };
 548 static const u16 NCT6791_REG_WEIGHT_DUTY_BASE[6] = { 0, 0x23e };
 549
 550 static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = {
 551         0x459, 0x45A, 0x45B, 0x568, 0x45D };
 552
 553 static const s8 NCT6791_ALARM_BITS[] = {
 554         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 555         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 556         -1,                             /* unused */
 557         6, 7, 11, 10, 23, 33,           /* fan1..fan6 */
 558         -1, -1,                         /* unused */
 559         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 560         12, 9 };                        /* intrusion0, intrusion1 */
 561
 562 /* NCT6792/NCT6793 specific data */
 563
 564 static const u16 NCT6792_REG_TEMP_MON[] = {
 565         0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d };
 566 static const u16 NCT6792_REG_BEEP[NUM_REG_BEEP] = {
 567         0xb2, 0xb3, 0xb4, 0xb5, 0xbf };
 568
 569 static const char *const nct6792_temp_label[] = {
 570         "",
 571         "SYSTIN",
 572         "CPUTIN",
 573         "AUXTIN0",
 574         "AUXTIN1",
 575         "AUXTIN2",
 576         "AUXTIN3",
 577         "",
 578         "SMBUSMASTER 0",
 579         "SMBUSMASTER 1",
 580         "SMBUSMASTER 2",
 581         "SMBUSMASTER 3",
 582         "SMBUSMASTER 4",
 583         "SMBUSMASTER 5",
 584         "SMBUSMASTER 6",
 585         "SMBUSMASTER 7",
 586         "PECI Agent 0",
 587         "PECI Agent 1",
 588         "PCH_CHIP_CPU_MAX_TEMP",
 589         "PCH_CHIP_TEMP",
 590         "PCH_CPU_TEMP",
 591         "PCH_MCH_TEMP",
 592         "PCH_DIM0_TEMP",
 593         "PCH_DIM1_TEMP",
 594         "PCH_DIM2_TEMP",
 595         "PCH_DIM3_TEMP",
 596         "BYTE_TEMP",
 597         "PECI Agent 0 Calibration",
 598         "PECI Agent 1 Calibration",
 599         "",
 600         "",
 601         "Virtual_TEMP"
 602 };
 603
 604 static const char *const nct6793_temp_label[] = {
 605         "",
 606         "SYSTIN",
 607         "CPUTIN",
 608         "AUXTIN0",
 609         "AUXTIN1",
 610         "AUXTIN2",
 611         "AUXTIN3",
 612         "",
 613         "SMBUSMASTER 0",
 614         "SMBUSMASTER 1",
 615         "",
 616         "",
 617         "",
 618         "",
 619         "",
 620         "",
 621         "PECI Agent 0",
 622         "PECI Agent 1",
 623         "PCH_CHIP_CPU_MAX_TEMP",
 624         "PCH_CHIP_TEMP",
 625         "PCH_CPU_TEMP",
 626         "PCH_MCH_TEMP",
 627         "Agent0 Dimm0 ",
 628         "Agent0 Dimm1",
 629         "Agent1 Dimm0",
 630         "Agent1 Dimm1",
 631         "BYTE_TEMP0",
 632         "BYTE_TEMP1",
 633         "PECI Agent 0 Calibration",
 634         "PECI Agent 1 Calibration",
 635         "",
 636         "Virtual_TEMP"
 637 };
 638
 639 /* NCT6102D/NCT6106D specific data */
 640
 641 #define NCT6106_REG_VBAT        0x318
 642 #define NCT6106_REG_DIODE       0x319
 643 #define NCT6106_DIODE_MASK      0x01
 644
 645 static const u16 NCT6106_REG_IN_MAX[] = {
 646         0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
 647 static const u16 NCT6106_REG_IN_MIN[] = {
 648         0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
 649 static const u16 NCT6106_REG_IN[] = {
 650         0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
 651
 652 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
 653 static const u16 NCT6106_REG_TEMP_MON[] = { 0x18, 0x19, 0x1a };
 654 static const u16 NCT6106_REG_TEMP_HYST[] = {
 655         0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
 656 static const u16 NCT6106_REG_TEMP_OVER[] = {
 657         0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
 658 static const u16 NCT6106_REG_TEMP_CRIT_L[] = {
 659         0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
 660 static const u16 NCT6106_REG_TEMP_CRIT_H[] = {
 661         0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
 662 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
 663 static const u16 NCT6106_REG_TEMP_CONFIG[] = {
 664         0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
 665
 666 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
 667 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
 668 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0, 0 };
 669 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4, 0, 0 };
 670
 671 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
 672 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
 673 static const u16 NCT6106_REG_PWM[] = { 0x119, 0x129, 0x139 };
 674 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c };
 675 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
 676 static const u16 NCT6106_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130 };
 677 static const u16 NCT6106_REG_TEMP_SOURCE[] = {
 678         0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
 679
 680 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
 681 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = {
 682         0x11b, 0x12b, 0x13b };
 683
 684 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
 685 #define NCT6106_CRITICAL_PWM_ENABLE_MASK        0x10
 686 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
 687
 688 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
 689 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
 690 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
 691 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
 692 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
 693 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
 694
 695 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
 696
 697 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
 698 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
 699 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
 700 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x17c };
 701 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
 702 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
 703
 704 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
 705 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
 706
 707 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = {
 708         0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
 709
 710 static const s8 NCT6106_ALARM_BITS[] = {
 711         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 712         9, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 713         -1,                             /* unused */
 714         32, 33, 34, -1, -1,             /* fan1..fan5 */
 715         -1, -1, -1,                     /* unused */
 716         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 717         48, -1                          /* intrusion0, intrusion1 */
 718 };
 719
 720 static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = {
 721         0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 };
 722
 723 static const s8 NCT6106_BEEP_BITS[] = {
 724         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 725         9, 10, 11, 12, -1, -1, -1,      /* in8..in14 */
 726         32,                             /* global beep enable */
 727         24, 25, 26, 27, 28,             /* fan1..fan5 */
 728         -1, -1, -1,                     /* unused */
 729         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 730         34, -1                          /* intrusion0, intrusion1 */
 731 };
 732
 733 static const u16 NCT6106_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
 734         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x51, 0x52, 0x54 };
 735
 736 static const u16 NCT6106_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
 737         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x204, 0x205 };
 738
 739 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
 740 {
 741         if (mode == 0 && pwm == 255)
 742                 return off;
 743         return mode + 1;
 744 }
 745
 746 static int pwm_enable_to_reg(enum pwm_enable mode)
 747 {
 748         if (mode == off)
 749                 return 0;
 750         return mode - 1;
 751 }
 752
 753 /*
 754  * Conversions
 755  */
 756
 757 /* 1 is DC mode, output in ms */
 758 static unsigned int step_time_from_reg(u8 reg, u8 mode)
 759 {
 760         return mode ? 400 * reg : 100 * reg;
 761 }
 762
 763 static u8 step_time_to_reg(unsigned int msec, u8 mode)
 764 {
 765         return clamp_val((mode ? (msec + 200) / 400 :
 766                                         (msec + 50) / 100), 1, 255);
 767 }
 768
 769 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
 770 {
 771         if (reg == 0 || reg == 255)
 772                 return 0;
 773         return 1350000U / (reg << divreg);
 774 }
 775
 776 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
 777 {
 778         if ((reg & 0xff1f) == 0xff1f)
 779                 return 0;
 780
 781         reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
 782
 783         if (reg == 0)
 784                 return 0;
 785
 786         return 1350000U / reg;
 787 }
 788
 789 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
 790 {
 791         if (reg == 0 || reg == 0xffff)
 792                 return 0;
 793
 794         /*
 795          * Even though the registers are 16 bit wide, the fan divisor
 796          * still applies.
 797          */
 798         return 1350000U / (reg << divreg);
 799 }
 800
 801 static u16 fan_to_reg(u32 fan, unsigned int divreg)
 802 {
 803         if (!fan)
 804                 return 0;
 805
 806         return (1350000U / fan) >> divreg;
 807 }
 808
 809 static inline unsigned int
 810 div_from_reg(u8 reg)
 811 {
 812         return 1 << reg;
 813 }
 814
 815 /*
 816  * Some of the voltage inputs have internal scaling, the tables below
 817  * contain 8 (the ADC LSB in mV) * scaling factor * 100
 818  */
 819 static const u16 scale_in[15] = {
 820         800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
 821         800, 800
 822 };
 823
 824 static inline long in_from_reg(u8 reg, u8 nr)
 825 {
 826         return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
 827 }
 828
 829 static inline u8 in_to_reg(u32 val, u8 nr)
 830 {
 831         return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
 832 }
 833
 834 /*
 835  * Data structures and manipulation thereof
 836  */
 837
 838 struct nct6775_data {
 839         int addr;       /* IO base of hw monitor block */
 840         int sioreg;     /* SIO register address */
 841         enum kinds kind;
 842         const char *name;
 843
 844 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
 845         struct device *hwmon_dev;
 846 #endif
 847
 848         const struct attribute_group *groups[6];
 849
 850         u16 reg_temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 851                                     * 3=temp_crit, 4=temp_lcrit
 852                                     */
 853         u8 temp_src[NUM_TEMP];
 854         u16 reg_temp_config[NUM_TEMP];
 855         const char * const *temp_label;
 856         int temp_label_num;
 857
 858         u16 REG_CONFIG;
 859         u16 REG_VBAT;
 860         u16 REG_DIODE;
 861         u8 DIODE_MASK;
 862
 863         const s8 *ALARM_BITS;
 864         const s8 *BEEP_BITS;
 865
 866         const u16 *REG_VIN;
 867         const u16 *REG_IN_MINMAX[2];
 868
 869         const u16 *REG_TARGET;
 870         const u16 *REG_FAN;
 871         const u16 *REG_FAN_MODE;
 872         const u16 *REG_FAN_MIN;
 873         const u16 *REG_FAN_PULSES;
 874         const u16 *FAN_PULSE_SHIFT;
 875         const u16 *REG_FAN_TIME[3];
 876
 877         const u16 *REG_TOLERANCE_H;
 878
 879         const u8 *REG_PWM_MODE;
 880         const u8 *PWM_MODE_MASK;
 881
 882         const u16 *REG_PWM[7];  /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 883                                  * [3]=pwm_max, [4]=pwm_step,
 884                                  * [5]=weight_duty_step, [6]=weight_duty_base
 885                                  */
 886         const u16 *REG_PWM_READ;
 887
 888         const u16 *REG_CRITICAL_PWM_ENABLE;
 889         u8 CRITICAL_PWM_ENABLE_MASK;
 890         const u16 *REG_CRITICAL_PWM;
 891
 892         const u16 *REG_AUTO_TEMP;
 893         const u16 *REG_AUTO_PWM;
 894
 895         const u16 *REG_CRITICAL_TEMP;
 896         const u16 *REG_CRITICAL_TEMP_TOLERANCE;
 897
 898         const u16 *REG_TEMP_SOURCE;     /* temp register sources */
 899         const u16 *REG_TEMP_SEL;
 900         const u16 *REG_WEIGHT_TEMP_SEL;
 901         const u16 *REG_WEIGHT_TEMP[3];  /* 0=base, 1=tolerance, 2=step */
 902
 903         const u16 *REG_TEMP_OFFSET;
 904
 905         const u16 *REG_ALARM;
 906         const u16 *REG_BEEP;
 907
 908         unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
 909         unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
 910
 911         struct mutex update_lock;
 912         bool valid;             /* true if following fields are valid */
 913         unsigned long last_updated;     /* In jiffies */
 914
 915         /* Register values */
 916         u8 bank;                /* current register bank */
 917         u8 in_num;              /* number of in inputs we have */
 918         u8 in[15][3];           /* [0]=in, [1]=in_max, [2]=in_min */
 919         unsigned int rpm[NUM_FAN];
 920         u16 fan_min[NUM_FAN];
 921         u8 fan_pulses[NUM_FAN];
 922         u8 fan_div[NUM_FAN];
 923         u8 has_pwm;
 924         u8 has_fan;             /* some fan inputs can be disabled */
 925         u8 has_fan_min;         /* some fans don't have min register */
 926         bool has_fan_div;
 927
 928         u8 num_temp_alarms;     /* 2, 3, or 6 */
 929         u8 num_temp_beeps;      /* 2, 3, or 6 */
 930         u8 temp_fixed_num;      /* 3 or 6 */
 931         u8 temp_type[NUM_TEMP_FIXED];
 932         s8 temp_offset[NUM_TEMP_FIXED];
 933         s16 temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 934                                 * 3=temp_crit, 4=temp_lcrit */
 935         u64 alarms;
 936         u64 beeps;
 937
 938         u8 pwm_num;     /* number of pwm */
 939         u8 pwm_mode[NUM_FAN];   /* 1->DC variable voltage,
 940                                  * 0->PWM variable duty cycle
 941                                  */
 942         enum pwm_enable pwm_enable[NUM_FAN];
 943                         /* 0->off
 944                          * 1->manual
 945                          * 2->thermal cruise mode (also called SmartFan I)
 946                          * 3->fan speed cruise mode
 947                          * 4->SmartFan III
 948                          * 5->enhanced variable thermal cruise (SmartFan IV)
 949                          */
 950         u8 pwm[7][NUM_FAN];     /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 951                                  * [3]=pwm_max, [4]=pwm_step,
 952                                  * [5]=weight_duty_step, [6]=weight_duty_base
 953                                  */
 954
 955         u8 target_temp[NUM_FAN];
 956         u8 target_temp_mask;
 957         u32 target_speed[NUM_FAN];
 958         u32 target_speed_tolerance[NUM_FAN];
 959         u8 speed_tolerance_limit;
 960
 961         u8 temp_tolerance[2][NUM_FAN];
 962         u8 tolerance_mask;
 963
 964         u8 fan_time[3][NUM_FAN]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
 965
 966         /* Automatic fan speed control registers */
 967         int auto_pwm_num;
 968         u8 auto_pwm[NUM_FAN][7];
 969         u8 auto_temp[NUM_FAN][7];
 970         u8 pwm_temp_sel[NUM_FAN];
 971         u8 pwm_weight_temp_sel[NUM_FAN];
 972         u8 weight_temp[3][NUM_FAN];     /* 0->temp_step, 1->temp_step_tol,
 973                                          * 2->temp_base
 974                                          */
 975
 976         u8 vid;
 977         u8 vrm;
 978
 979         bool have_vid;
 980
 981         u16 have_temp;
 982         u16 have_temp_fixed;
 983         u16 have_in;
 984
 985         /* Remember extra register values over suspend/resume */
 986         u8 vbat;
 987         u8 fandiv1;
 988         u8 fandiv2;
 989         u8 sio_reg_enable;
 990 };
 991
 992 struct nct6775_sio_data {
 993         int sioreg;
 994         enum kinds kind;
 995 };
 996
 997 struct sensor_device_template {
 998         struct device_attribute dev_attr;
 999         union {
1000                 struct {
1001                         u8 nr;
1002                         u8 index;
1003                 } s;
1004                 int index;
1005         } u;
1006         bool s2;        /* true if both index and nr are used */
1007 };
1008
1009 struct sensor_device_attr_u {
1010         union {
1011                 struct sensor_device_attribute a1;
1012                 struct sensor_device_attribute_2 a2;
1013         } u;
1014         char name[32];
1015 };
1016
1017 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) {      \
1018         .attr = {.name = _template, .mode = _mode },            \
1019         .show   = _show,                                        \
1020         .store  = _store,                                       \
1021 }
1022
1023 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \
1024         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
1025           .u.index = _index,                                            \
1026           .s2 = false }
1027
1028 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,       \
1029                                  _nr, _index)                           \
1030         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
1031           .u.s.index = _index,                                          \
1032           .u.s.nr = _nr,                                                \
1033           .s2 = true }
1034
1035 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
1036 static struct sensor_device_template sensor_dev_template_##_name        \
1037         = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store,       \
1038                                  _index)
1039
1040 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store,       \
1041                           _nr, _index)                                  \
1042 static struct sensor_device_template sensor_dev_template_##_name        \
1043         = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,     \
1044                                  _nr, _index)
1045
1046 struct sensor_template_group {
1047         struct sensor_device_template **templates;
1048         umode_t (*is_visible)(struct kobject *, struct attribute *, int);
1049         int base;
1050 };
1051
1052 static struct attribute_group *
1053 nct6775_create_attr_group(struct device *dev,
1054                           const struct sensor_template_group *tg,
1055                           int repeat)
1056 {
1057         struct attribute_group *group;
1058         struct sensor_device_attr_u *su;
1059         struct sensor_device_attribute *a;
1060         struct sensor_device_attribute_2 *a2;
1061         struct attribute **attrs;
1062         struct sensor_device_template **t;
1063         int i, count;
1064
1065         if (repeat <= 0)
1066                 return ERR_PTR(-EINVAL);
1067
1068         t = tg->templates;
1069         for (count = 0; *t; t++, count++)
1070                 ;
1071
1072         if (count == 0)
1073                 return ERR_PTR(-EINVAL);
1074
1075         group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
1076         if (group == NULL)
1077                 return ERR_PTR(-ENOMEM);
1078
1079         attrs = devm_kzalloc(dev, sizeof(*attrs) * (repeat * count + 1),
1080                              GFP_KERNEL);
1081         if (attrs == NULL)
1082                 return ERR_PTR(-ENOMEM);
1083
1084         su = devm_kzalloc(dev, sizeof(*su) * repeat * count,
1085                                GFP_KERNEL);
1086         if (su == NULL)
1087                 return ERR_PTR(-ENOMEM);
1088
1089         group->attrs = attrs;
1090         group->is_visible = tg->is_visible;
1091
1092         for (i = 0; i < repeat; i++) {
1093                 t = tg->templates;
1094                 while (*t != NULL) {
1095                         snprintf(su->name, sizeof(su->name),
1096                                  (*t)->dev_attr.attr.name, tg->base + i);
1097                         if ((*t)->s2) {
1098                                 a2 = &su->u.a2;
1099                                 sysfs_attr_init(&a2->dev_attr.attr);
1100                                 a2->dev_attr.attr.name = su->name;
1101                                 a2->nr = (*t)->u.s.nr + i;
1102                                 a2->index = (*t)->u.s.index;
1103                                 a2->dev_attr.attr.mode =
1104                                   (*t)->dev_attr.attr.mode;
1105                                 a2->dev_attr.show = (*t)->dev_attr.show;
1106                                 a2->dev_attr.store = (*t)->dev_attr.store;
1107                                 *attrs = &a2->dev_attr.attr;
1108                         } else {
1109                                 a = &su->u.a1;
1110                                 sysfs_attr_init(&a->dev_attr.attr);
1111                                 a->dev_attr.attr.name = su->name;
1112                                 a->index = (*t)->u.index + i;
1113                                 a->dev_attr.attr.mode =
1114                                   (*t)->dev_attr.attr.mode;
1115                                 a->dev_attr.show = (*t)->dev_attr.show;
1116                                 a->dev_attr.store = (*t)->dev_attr.store;
1117                                 *attrs = &a->dev_attr.attr;
1118                         }
1119                         attrs++;
1120                         su++;
1121                         t++;
1122                 }
1123         }
1124
1125         return group;
1126 }
1127
1128 static bool is_word_sized(struct nct6775_data *data, u16 reg)
1129 {
1130         switch (data->kind) {
1131         case nct6106:
1132                 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1133                   reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
1134                   reg == 0x111 || reg == 0x121 || reg == 0x131;
1135         case nct6775:
1136                 return (((reg & 0xff00) == 0x100 ||
1137                     (reg & 0xff00) == 0x200) &&
1138                    ((reg & 0x00ff) == 0x50 ||
1139                     (reg & 0x00ff) == 0x53 ||
1140                     (reg & 0x00ff) == 0x55)) ||
1141                   (reg & 0xfff0) == 0x630 ||
1142                   reg == 0x640 || reg == 0x642 ||
1143                   reg == 0x662 ||
1144                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1145                   reg == 0x73 || reg == 0x75 || reg == 0x77;
1146         case nct6776:
1147                 return (((reg & 0xff00) == 0x100 ||
1148                     (reg & 0xff00) == 0x200) &&
1149                    ((reg & 0x00ff) == 0x50 ||
1150                     (reg & 0x00ff) == 0x53 ||
1151                     (reg & 0x00ff) == 0x55)) ||
1152                   (reg & 0xfff0) == 0x630 ||
1153                   reg == 0x402 ||
1154                   reg == 0x640 || reg == 0x642 ||
1155                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1156                   reg == 0x73 || reg == 0x75 || reg == 0x77;
1157         case nct6779:
1158         case nct6791:
1159         case nct6792:
1160         case nct6793:
1161                 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
1162                   ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x0b) ||
1163                   reg == 0x402 ||
1164                   reg == 0x63a || reg == 0x63c || reg == 0x63e ||
1165                   reg == 0x640 || reg == 0x642 ||
1166                   reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
1167                   reg == 0x7b || reg == 0x7d;
1168         }
1169         return false;
1170 }
1171
1172 /*
1173  * On older chips, only registers 0x50-0x5f are banked.
1174  * On more recent chips, all registers are banked.
1175  * Assume that is the case and set the bank number for each access.
1176  * Cache the bank number so it only needs to be set if it changes.
1177  */
1178 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
1179 {
1180         u8 bank = reg >> 8;
1181
1182         if (data->bank != bank) {
1183                 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
1184                 outb_p(bank, data->addr + DATA_REG_OFFSET);
1185                 data->bank = bank;
1186         }
1187 }
1188
1189 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
1190 {
1191         int res, word_sized = is_word_sized(data, reg);
1192
1193         nct6775_set_bank(data, reg);
1194         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1195         res = inb_p(data->addr + DATA_REG_OFFSET);
1196         if (word_sized) {
1197                 outb_p((reg & 0xff) + 1,
1198                        data->addr + ADDR_REG_OFFSET);
1199                 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
1200         }
1201         return res;
1202 }
1203
1204 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
1205 {
1206         int word_sized = is_word_sized(data, reg);
1207
1208         nct6775_set_bank(data, reg);
1209         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1210         if (word_sized) {
1211                 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
1212                 outb_p((reg & 0xff) + 1,
1213                        data->addr + ADDR_REG_OFFSET);
1214         }
1215         outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
1216         return 0;
1217 }
1218
1219 /* We left-align 8-bit temperature values to make the code simpler */
1220 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
1221 {
1222         u16 res;
1223
1224         res = nct6775_read_value(data, reg);
1225         if (!is_word_sized(data, reg))
1226                 res <<= 8;
1227
1228         return res;
1229 }
1230
1231 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
1232 {
1233         if (!is_word_sized(data, reg))
1234                 value >>= 8;
1235         return nct6775_write_value(data, reg, value);
1236 }
1237
1238 /* This function assumes that the caller holds data->update_lock */
1239 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
1240 {
1241         u8 reg;
1242
1243         switch (nr) {
1244         case 0:
1245                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
1246                     | (data->fan_div[0] & 0x7);
1247                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1248                 break;
1249         case 1:
1250                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
1251                     | ((data->fan_div[1] << 4) & 0x70);
1252                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1253                 break;
1254         case 2:
1255                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
1256                     | (data->fan_div[2] & 0x7);
1257                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1258                 break;
1259         case 3:
1260                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
1261                     | ((data->fan_div[3] << 4) & 0x70);
1262                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1263                 break;
1264         }
1265 }
1266
1267 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
1268 {
1269         if (data->kind == nct6775)
1270                 nct6775_write_fan_div(data, nr);
1271 }
1272
1273 static void nct6775_update_fan_div(struct nct6775_data *data)
1274 {
1275         u8 i;
1276
1277         i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
1278         data->fan_div[0] = i & 0x7;
1279         data->fan_div[1] = (i & 0x70) >> 4;
1280         i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
1281         data->fan_div[2] = i & 0x7;
1282         if (data->has_fan & (1 << 3))
1283                 data->fan_div[3] = (i & 0x70) >> 4;
1284 }
1285
1286 static void nct6775_update_fan_div_common(struct nct6775_data *data)
1287 {
1288         if (data->kind == nct6775)
1289                 nct6775_update_fan_div(data);
1290 }
1291
1292 static void nct6775_init_fan_div(struct nct6775_data *data)
1293 {
1294         int i;
1295
1296         nct6775_update_fan_div_common(data);
1297         /*
1298          * For all fans, start with highest divider value if the divider
1299          * register is not initialized. This ensures that we get a
1300          * reading from the fan count register, even if it is not optimal.
1301          * We'll compute a better divider later on.
1302          */
1303         for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
1304                 if (!(data->has_fan & (1 << i)))
1305                         continue;
1306                 if (data->fan_div[i] == 0) {
1307                         data->fan_div[i] = 7;
1308                         nct6775_write_fan_div_common(data, i);
1309                 }
1310         }
1311 }
1312
1313 static void nct6775_init_fan_common(struct device *dev,
1314                                     struct nct6775_data *data)
1315 {
1316         int i;
1317         u8 reg;
1318
1319         if (data->has_fan_div)
1320                 nct6775_init_fan_div(data);
1321
1322         /*
1323          * If fan_min is not set (0), set it to 0xff to disable it. This
1324          * prevents the unnecessary warning when fanX_min is reported as 0.
1325          */
1326         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1327                 if (data->has_fan_min & (1 << i)) {
1328                         reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
1329                         if (!reg)
1330                                 nct6775_write_value(data, data->REG_FAN_MIN[i],
1331                                                     data->has_fan_div ? 0xff
1332                                                                       : 0xff1f);
1333                 }
1334         }
1335 }
1336
1337 static void nct6775_select_fan_div(struct device *dev,
1338                                    struct nct6775_data *data, int nr, u16 reg)
1339 {
1340         u8 fan_div = data->fan_div[nr];
1341         u16 fan_min;
1342
1343         if (!data->has_fan_div)
1344                 return;
1345
1346         /*
1347          * If we failed to measure the fan speed, or the reported value is not
1348          * in the optimal range, and the clock divider can be modified,
1349          * let's try that for next time.
1350          */
1351         if (reg == 0x00 && fan_div < 0x07)
1352                 fan_div++;
1353         else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1354                 fan_div--;
1355
1356         if (fan_div != data->fan_div[nr]) {
1357                 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1358                         nr + 1, div_from_reg(data->fan_div[nr]),
1359                         div_from_reg(fan_div));
1360
1361                 /* Preserve min limit if possible */
1362                 if (data->has_fan_min & (1 << nr)) {
1363                         fan_min = data->fan_min[nr];
1364                         if (fan_div > data->fan_div[nr]) {
1365                                 if (fan_min != 255 && fan_min > 1)
1366                                         fan_min >>= 1;
1367                         } else {
1368                                 if (fan_min != 255) {
1369                                         fan_min <<= 1;
1370                                         if (fan_min > 254)
1371                                                 fan_min = 254;
1372                                 }
1373                         }
1374                         if (fan_min != data->fan_min[nr]) {
1375                                 data->fan_min[nr] = fan_min;
1376                                 nct6775_write_value(data, data->REG_FAN_MIN[nr],
1377                                                     fan_min);
1378                         }
1379                 }
1380                 data->fan_div[nr] = fan_div;
1381                 nct6775_write_fan_div_common(data, nr);
1382         }
1383 }
1384
1385 static void nct6775_update_pwm(struct device *dev)
1386 {
1387         struct nct6775_data *data = dev_get_drvdata(dev);
1388         int i, j;
1389         int fanmodecfg, reg;
1390         bool duty_is_dc;
1391
1392         for (i = 0; i < data->pwm_num; i++) {
1393                 if (!(data->has_pwm & (1 << i)))
1394                         continue;
1395
1396                 duty_is_dc = data->REG_PWM_MODE[i] &&
1397                   (nct6775_read_value(data, data->REG_PWM_MODE[i])
1398                    & data->PWM_MODE_MASK[i]);
1399                 data->pwm_mode[i] = duty_is_dc;
1400
1401                 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
1402                 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1403                         if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1404                                 data->pwm[j][i]
1405                                   = nct6775_read_value(data,
1406                                                        data->REG_PWM[j][i]);
1407                         }
1408                 }
1409
1410                 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1411                                                         (fanmodecfg >> 4) & 7);
1412
1413                 if (!data->temp_tolerance[0][i] ||
1414                     data->pwm_enable[i] != speed_cruise)
1415                         data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1416                 if (!data->target_speed_tolerance[i] ||
1417                     data->pwm_enable[i] == speed_cruise) {
1418                         u8 t = fanmodecfg & 0x0f;
1419
1420                         if (data->REG_TOLERANCE_H) {
1421                                 t |= (nct6775_read_value(data,
1422                                       data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
1423                         }
1424                         data->target_speed_tolerance[i] = t;
1425                 }
1426
1427                 data->temp_tolerance[1][i] =
1428                         nct6775_read_value(data,
1429                                         data->REG_CRITICAL_TEMP_TOLERANCE[i]);
1430
1431                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
1432                 data->pwm_temp_sel[i] = reg & 0x1f;
1433                 /* If fan can stop, report floor as 0 */
1434                 if (reg & 0x80)
1435                         data->pwm[2][i] = 0;
1436
1437                 if (!data->REG_WEIGHT_TEMP_SEL[i])
1438                         continue;
1439
1440                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
1441                 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1442                 /* If weight is disabled, report weight source as 0 */
1443                 if (j == 1 && !(reg & 0x80))
1444                         data->pwm_weight_temp_sel[i] = 0;
1445
1446                 /* Weight temp data */
1447                 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
1448                         data->weight_temp[j][i]
1449                           = nct6775_read_value(data,
1450                                                data->REG_WEIGHT_TEMP[j][i]);
1451                 }
1452         }
1453 }
1454
1455 static void nct6775_update_pwm_limits(struct device *dev)
1456 {
1457         struct nct6775_data *data = dev_get_drvdata(dev);
1458         int i, j;
1459         u8 reg;
1460         u16 reg_t;
1461
1462         for (i = 0; i < data->pwm_num; i++) {
1463                 if (!(data->has_pwm & (1 << i)))
1464                         continue;
1465
1466                 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1467                         data->fan_time[j][i] =
1468                           nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1469                 }
1470
1471                 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1472                 /* Update only in matching mode or if never updated */
1473                 if (!data->target_temp[i] ||
1474                     data->pwm_enable[i] == thermal_cruise)
1475                         data->target_temp[i] = reg_t & data->target_temp_mask;
1476                 if (!data->target_speed[i] ||
1477                     data->pwm_enable[i] == speed_cruise) {
1478                         if (data->REG_TOLERANCE_H) {
1479                                 reg_t |= (nct6775_read_value(data,
1480                                         data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1481                         }
1482                         data->target_speed[i] = reg_t;
1483                 }
1484
1485                 for (j = 0; j < data->auto_pwm_num; j++) {
1486                         data->auto_pwm[i][j] =
1487                           nct6775_read_value(data,
1488                                              NCT6775_AUTO_PWM(data, i, j));
1489                         data->auto_temp[i][j] =
1490                           nct6775_read_value(data,
1491                                              NCT6775_AUTO_TEMP(data, i, j));
1492                 }
1493
1494                 /* critical auto_pwm temperature data */
1495                 data->auto_temp[i][data->auto_pwm_num] =
1496                         nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1497
1498                 switch (data->kind) {
1499                 case nct6775:
1500                         reg = nct6775_read_value(data,
1501                                                  NCT6775_REG_CRITICAL_ENAB[i]);
1502                         data->auto_pwm[i][data->auto_pwm_num] =
1503                                                 (reg & 0x02) ? 0xff : 0x00;
1504                         break;
1505                 case nct6776:
1506                         data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1507                         break;
1508                 case nct6106:
1509                 case nct6779:
1510                 case nct6791:
1511                 case nct6792:
1512                 case nct6793:
1513                         reg = nct6775_read_value(data,
1514                                         data->REG_CRITICAL_PWM_ENABLE[i]);
1515                         if (reg & data->CRITICAL_PWM_ENABLE_MASK)
1516                                 reg = nct6775_read_value(data,
1517                                         data->REG_CRITICAL_PWM[i]);
1518                         else
1519                                 reg = 0xff;
1520                         data->auto_pwm[i][data->auto_pwm_num] = reg;
1521                         break;
1522                 }
1523         }
1524 }
1525
1526 static struct nct6775_data *nct6775_update_device(struct device *dev)
1527 {
1528         struct nct6775_data *data = dev_get_drvdata(dev);
1529         int i, j;
1530
1531         mutex_lock(&data->update_lock);
1532
1533         if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1534             || !data->valid) {
1535                 /* Fan clock dividers */
1536                 nct6775_update_fan_div_common(data);
1537
1538                 /* Measured voltages and limits */
1539                 for (i = 0; i < data->in_num; i++) {
1540                         if (!(data->have_in & (1 << i)))
1541                                 continue;
1542
1543                         data->in[i][0] = nct6775_read_value(data,
1544                                                             data->REG_VIN[i]);
1545                         data->in[i][1] = nct6775_read_value(data,
1546                                           data->REG_IN_MINMAX[0][i]);
1547                         data->in[i][2] = nct6775_read_value(data,
1548                                           data->REG_IN_MINMAX[1][i]);
1549                 }
1550
1551                 /* Measured fan speeds and limits */
1552                 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
1553                         u16 reg;
1554
1555                         if (!(data->has_fan & (1 << i)))
1556                                 continue;
1557
1558                         reg = nct6775_read_value(data, data->REG_FAN[i]);
1559                         data->rpm[i] = data->fan_from_reg(reg,
1560                                                           data->fan_div[i]);
1561
1562                         if (data->has_fan_min & (1 << i))
1563                                 data->fan_min[i] = nct6775_read_value(data,
1564                                            data->REG_FAN_MIN[i]);
1565                         data->fan_pulses[i] =
1566                           (nct6775_read_value(data, data->REG_FAN_PULSES[i])
1567                                 >> data->FAN_PULSE_SHIFT[i]) & 0x03;
1568
1569                         nct6775_select_fan_div(dev, data, i, reg);
1570                 }
1571
1572                 nct6775_update_pwm(dev);
1573                 nct6775_update_pwm_limits(dev);
1574
1575                 /* Measured temperatures and limits */
1576                 for (i = 0; i < NUM_TEMP; i++) {
1577                         if (!(data->have_temp & (1 << i)))
1578                                 continue;
1579                         for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1580                                 if (data->reg_temp[j][i])
1581                                         data->temp[j][i]
1582                                           = nct6775_read_temp(data,
1583                                                 data->reg_temp[j][i]);
1584                         }
1585                         if (i >= NUM_TEMP_FIXED ||
1586                             !(data->have_temp_fixed & (1 << i)))
1587                                 continue;
1588                         data->temp_offset[i]
1589                           = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1590                 }
1591
1592                 data->alarms = 0;
1593                 for (i = 0; i < NUM_REG_ALARM; i++) {
1594                         u8 alarm;
1595
1596                         if (!data->REG_ALARM[i])
1597                                 continue;
1598                         alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1599                         data->alarms |= ((u64)alarm) << (i << 3);
1600                 }
1601
1602                 data->beeps = 0;
1603                 for (i = 0; i < NUM_REG_BEEP; i++) {
1604                         u8 beep;
1605
1606                         if (!data->REG_BEEP[i])
1607                                 continue;
1608                         beep = nct6775_read_value(data, data->REG_BEEP[i]);
1609                         data->beeps |= ((u64)beep) << (i << 3);
1610                 }
1611
1612                 data->last_updated = jiffies;
1613                 data->valid = true;
1614         }
1615
1616         mutex_unlock(&data->update_lock);
1617         return data;
1618 }
1619
1620 /*
1621  * Sysfs callback functions
1622  */
1623 static ssize_t
1624 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1625 {
1626         struct nct6775_data *data = nct6775_update_device(dev);
1627         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1628         int index = sattr->index;
1629         int nr = sattr->nr;
1630
1631         return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1632 }
1633
1634 static ssize_t
1635 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1636              size_t count)
1637 {
1638         struct nct6775_data *data = dev_get_drvdata(dev);
1639         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1640         int index = sattr->index;
1641         int nr = sattr->nr;
1642         unsigned long val;
1643         int err;
1644
1645         err = kstrtoul(buf, 10, &val);
1646         if (err < 0)
1647                 return err;
1648         mutex_lock(&data->update_lock);
1649         data->in[nr][index] = in_to_reg(val, nr);
1650         nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr],
1651                             data->in[nr][index]);
1652         mutex_unlock(&data->update_lock);
1653         return count;
1654 }
1655
1656 static ssize_t
1657 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1658 {
1659         struct nct6775_data *data = nct6775_update_device(dev);
1660         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1661         int nr = data->ALARM_BITS[sattr->index];
1662
1663         return sprintf(buf, "%u\n",
1664                        (unsigned int)((data->alarms >> nr) & 0x01));
1665 }
1666
1667 static int find_temp_source(struct nct6775_data *data, int index, int count)
1668 {
1669         int source = data->temp_src[index];
1670         int nr;
1671
1672         for (nr = 0; nr < count; nr++) {
1673                 int src;
1674
1675                 src = nct6775_read_value(data,
1676                                          data->REG_TEMP_SOURCE[nr]) & 0x1f;
1677                 if (src == source)
1678                         return nr;
1679         }
1680         return -ENODEV;
1681 }
1682
1683 static ssize_t
1684 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1685 {
1686         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1687         struct nct6775_data *data = nct6775_update_device(dev);
1688         unsigned int alarm = 0;
1689         int nr;
1690
1691         /*
1692          * For temperatures, there is no fixed mapping from registers to alarm
1693          * bits. Alarm bits are determined by the temperature source mapping.
1694          */
1695         nr = find_temp_source(data, sattr->index, data->num_temp_alarms);
1696         if (nr >= 0) {
1697                 int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE];
1698
1699                 alarm = (data->alarms >> bit) & 0x01;
1700         }
1701         return sprintf(buf, "%u\n", alarm);
1702 }
1703
1704 static ssize_t
1705 show_beep(struct device *dev, struct device_attribute *attr, char *buf)
1706 {
1707         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1708         struct nct6775_data *data = nct6775_update_device(dev);
1709         int nr = data->BEEP_BITS[sattr->index];
1710
1711         return sprintf(buf, "%u\n",
1712                        (unsigned int)((data->beeps >> nr) & 0x01));
1713 }
1714
1715 static ssize_t
1716 store_beep(struct device *dev, struct device_attribute *attr, const char *buf,
1717            size_t count)
1718 {
1719         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1720         struct nct6775_data *data = dev_get_drvdata(dev);
1721         int nr = data->BEEP_BITS[sattr->index];
1722         int regindex = nr >> 3;
1723         unsigned long val;
1724         int err;
1725
1726         err = kstrtoul(buf, 10, &val);
1727         if (err < 0)
1728                 return err;
1729         if (val > 1)
1730                 return -EINVAL;
1731
1732         mutex_lock(&data->update_lock);
1733         if (val)
1734                 data->beeps |= (1ULL << nr);
1735         else
1736                 data->beeps &= ~(1ULL << nr);
1737         nct6775_write_value(data, data->REG_BEEP[regindex],
1738                             (data->beeps >> (regindex << 3)) & 0xff);
1739         mutex_unlock(&data->update_lock);
1740         return count;
1741 }
1742
1743 static ssize_t
1744 show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf)
1745 {
1746         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1747         struct nct6775_data *data = nct6775_update_device(dev);
1748         unsigned int beep = 0;
1749         int nr;
1750
1751         /*
1752          * For temperatures, there is no fixed mapping from registers to beep
1753          * enable bits. Beep enable bits are determined by the temperature
1754          * source mapping.
1755          */
1756         nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1757         if (nr >= 0) {
1758                 int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1759
1760                 beep = (data->beeps >> bit) & 0x01;
1761         }
1762         return sprintf(buf, "%u\n", beep);
1763 }
1764
1765 static ssize_t
1766 store_temp_beep(struct device *dev, struct device_attribute *attr,
1767                 const char *buf, size_t count)
1768 {
1769         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1770         struct nct6775_data *data = dev_get_drvdata(dev);
1771         int nr, bit, regindex;
1772         unsigned long val;
1773         int err;
1774
1775         err = kstrtoul(buf, 10, &val);
1776         if (err < 0)
1777                 return err;
1778         if (val > 1)
1779                 return -EINVAL;
1780
1781         nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1782         if (nr < 0)
1783                 return nr;
1784
1785         bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1786         regindex = bit >> 3;
1787
1788         mutex_lock(&data->update_lock);
1789         if (val)
1790                 data->beeps |= (1ULL << bit);
1791         else
1792                 data->beeps &= ~(1ULL << bit);
1793         nct6775_write_value(data, data->REG_BEEP[regindex],
1794                             (data->beeps >> (regindex << 3)) & 0xff);
1795         mutex_unlock(&data->update_lock);
1796
1797         return count;
1798 }
1799
1800 static umode_t nct6775_in_is_visible(struct kobject *kobj,
1801                                      struct attribute *attr, int index)
1802 {
1803         struct device *dev = container_of(kobj, struct device, kobj);
1804         struct nct6775_data *data = dev_get_drvdata(dev);
1805         int in = index / 5;     /* voltage index */
1806
1807         if (!(data->have_in & (1 << in)))
1808                 return 0;
1809
1810         return attr->mode;
1811 }
1812
1813 SENSOR_TEMPLATE_2(in_input, "in%d_input", S_IRUGO, show_in_reg, NULL, 0, 0);
1814 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", S_IRUGO, show_alarm, NULL, 0);
1815 SENSOR_TEMPLATE(in_beep, "in%d_beep", S_IWUSR | S_IRUGO, show_beep, store_beep,
1816                 0);
1817 SENSOR_TEMPLATE_2(in_min, "in%d_min", S_IWUSR | S_IRUGO, show_in_reg,
1818                   store_in_reg, 0, 1);
1819 SENSOR_TEMPLATE_2(in_max, "in%d_max", S_IWUSR | S_IRUGO, show_in_reg,
1820                   store_in_reg, 0, 2);
1821
1822 /*
1823  * nct6775_in_is_visible uses the index into the following array
1824  * to determine if attributes should be created or not.
1825  * Any change in order or content must be matched.
1826  */
1827 static struct sensor_device_template *nct6775_attributes_in_template[] = {
1828         &sensor_dev_template_in_input,
1829         &sensor_dev_template_in_alarm,
1830         &sensor_dev_template_in_beep,
1831         &sensor_dev_template_in_min,
1832         &sensor_dev_template_in_max,
1833         NULL
1834 };
1835
1836 static const struct sensor_template_group nct6775_in_template_group = {
1837         .templates = nct6775_attributes_in_template,
1838         .is_visible = nct6775_in_is_visible,
1839 };
1840
1841 static ssize_t
1842 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1843 {
1844         struct nct6775_data *data = nct6775_update_device(dev);
1845         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1846         int nr = sattr->index;
1847
1848         return sprintf(buf, "%d\n", data->rpm[nr]);
1849 }
1850
1851 static ssize_t
1852 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1853 {
1854         struct nct6775_data *data = nct6775_update_device(dev);
1855         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1856         int nr = sattr->index;
1857
1858         return sprintf(buf, "%d\n",
1859                        data->fan_from_reg_min(data->fan_min[nr],
1860                                               data->fan_div[nr]));
1861 }
1862
1863 static ssize_t
1864 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1865 {
1866         struct nct6775_data *data = nct6775_update_device(dev);
1867         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1868         int nr = sattr->index;
1869
1870         return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1871 }
1872
1873 static ssize_t
1874 store_fan_min(struct device *dev, struct device_attribute *attr,
1875               const char *buf, size_t count)
1876 {
1877         struct nct6775_data *data = dev_get_drvdata(dev);
1878         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1879         int nr = sattr->index;
1880         unsigned long val;
1881         unsigned int reg;
1882         u8 new_div;
1883         int err;
1884
1885         err = kstrtoul(buf, 10, &val);
1886         if (err < 0)
1887                 return err;
1888
1889         mutex_lock(&data->update_lock);
1890         if (!data->has_fan_div) {
1891                 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1892                 if (!val) {
1893                         val = 0xff1f;
1894                 } else {
1895                         if (val > 1350000U)
1896                                 val = 135000U;
1897                         val = 1350000U / val;
1898                         val = (val & 0x1f) | ((val << 3) & 0xff00);
1899                 }
1900                 data->fan_min[nr] = val;
1901                 goto write_min; /* Leave fan divider alone */
1902         }
1903         if (!val) {
1904                 /* No min limit, alarm disabled */
1905                 data->fan_min[nr] = 255;
1906                 new_div = data->fan_div[nr]; /* No change */
1907                 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1908                 goto write_div;
1909         }
1910         reg = 1350000U / val;
1911         if (reg >= 128 * 255) {
1912                 /*
1913                  * Speed below this value cannot possibly be represented,
1914                  * even with the highest divider (128)
1915                  */
1916                 data->fan_min[nr] = 254;
1917                 new_div = 7; /* 128 == (1 << 7) */
1918                 dev_warn(dev,
1919                          "fan%u low limit %lu below minimum %u, set to minimum\n",
1920                          nr + 1, val, data->fan_from_reg_min(254, 7));
1921         } else if (!reg) {
1922                 /*
1923                  * Speed above this value cannot possibly be represented,
1924                  * even with the lowest divider (1)
1925                  */
1926                 data->fan_min[nr] = 1;
1927                 new_div = 0; /* 1 == (1 << 0) */
1928                 dev_warn(dev,
1929                          "fan%u low limit %lu above maximum %u, set to maximum\n",
1930                          nr + 1, val, data->fan_from_reg_min(1, 0));
1931         } else {
1932                 /*
1933                  * Automatically pick the best divider, i.e. the one such
1934                  * that the min limit will correspond to a register value
1935                  * in the 96..192 range
1936                  */
1937                 new_div = 0;
1938                 while (reg > 192 && new_div < 7) {
1939                         reg >>= 1;
1940                         new_div++;
1941                 }
1942                 data->fan_min[nr] = reg;
1943         }
1944
1945 write_div:
1946         /*
1947          * Write both the fan clock divider (if it changed) and the new
1948          * fan min (unconditionally)
1949          */
1950         if (new_div != data->fan_div[nr]) {
1951                 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1952                         nr + 1, div_from_reg(data->fan_div[nr]),
1953                         div_from_reg(new_div));
1954                 data->fan_div[nr] = new_div;
1955                 nct6775_write_fan_div_common(data, nr);
1956                 /* Give the chip time to sample a new speed value */
1957                 data->last_updated = jiffies;
1958         }
1959
1960 write_min:
1961         nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1962         mutex_unlock(&data->update_lock);
1963
1964         return count;
1965 }
1966
1967 static ssize_t
1968 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
1969 {
1970         struct nct6775_data *data = nct6775_update_device(dev);
1971         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1972         int p = data->fan_pulses[sattr->index];
1973
1974         return sprintf(buf, "%d\n", p ? : 4);
1975 }
1976
1977 static ssize_t
1978 store_fan_pulses(struct device *dev, struct device_attribute *attr,
1979                  const char *buf, size_t count)
1980 {
1981         struct nct6775_data *data = dev_get_drvdata(dev);
1982         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1983         int nr = sattr->index;
1984         unsigned long val;
1985         int err;
1986         u8 reg;
1987
1988         err = kstrtoul(buf, 10, &val);
1989         if (err < 0)
1990                 return err;
1991
1992         if (val > 4)
1993                 return -EINVAL;
1994
1995         mutex_lock(&data->update_lock);
1996         data->fan_pulses[nr] = val & 3;
1997         reg = nct6775_read_value(data, data->REG_FAN_PULSES[nr]);
1998         reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
1999         reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
2000         nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
2001         mutex_unlock(&data->update_lock);
2002
2003         return count;
2004 }
2005
2006 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
2007                                       struct attribute *attr, int index)
2008 {
2009         struct device *dev = container_of(kobj, struct device, kobj);
2010         struct nct6775_data *data = dev_get_drvdata(dev);
2011         int fan = index / 6;    /* fan index */
2012         int nr = index % 6;     /* attribute index */
2013
2014         if (!(data->has_fan & (1 << fan)))
2015                 return 0;
2016
2017         if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1)
2018                 return 0;
2019         if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1)
2020                 return 0;
2021         if (nr == 4 && !(data->has_fan_min & (1 << fan)))
2022                 return 0;
2023         if (nr == 5 && data->kind != nct6775)
2024                 return 0;
2025
2026         return attr->mode;
2027 }
2028
2029 SENSOR_TEMPLATE(fan_input, "fan%d_input", S_IRUGO, show_fan, NULL, 0);
2030 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", S_IRUGO, show_alarm, NULL,
2031                 FAN_ALARM_BASE);
2032 SENSOR_TEMPLATE(fan_beep, "fan%d_beep", S_IWUSR | S_IRUGO, show_beep,
2033                 store_beep, FAN_ALARM_BASE);
2034 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", S_IWUSR | S_IRUGO, show_fan_pulses,
2035                 store_fan_pulses, 0);
2036 SENSOR_TEMPLATE(fan_min, "fan%d_min", S_IWUSR | S_IRUGO, show_fan_min,
2037                 store_fan_min, 0);
2038 SENSOR_TEMPLATE(fan_div, "fan%d_div", S_IRUGO, show_fan_div, NULL, 0);
2039
2040 /*
2041  * nct6775_fan_is_visible uses the index into the following array
2042  * to determine if attributes should be created or not.
2043  * Any change in order or content must be matched.
2044  */
2045 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
2046         &sensor_dev_template_fan_input,
2047         &sensor_dev_template_fan_alarm, /* 1 */
2048         &sensor_dev_template_fan_beep,  /* 2 */
2049         &sensor_dev_template_fan_pulses,
2050         &sensor_dev_template_fan_min,   /* 4 */
2051         &sensor_dev_template_fan_div,   /* 5 */
2052         NULL
2053 };
2054
2055 static const struct sensor_template_group nct6775_fan_template_group = {
2056         .templates = nct6775_attributes_fan_template,
2057         .is_visible = nct6775_fan_is_visible,
2058         .base = 1,
2059 };
2060
2061 static ssize_t
2062 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
2063 {
2064         struct nct6775_data *data = nct6775_update_device(dev);
2065         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2066         int nr = sattr->index;
2067
2068         return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
2069 }
2070
2071 static ssize_t
2072 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
2073 {
2074         struct nct6775_data *data = nct6775_update_device(dev);
2075         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2076         int nr = sattr->nr;
2077         int index = sattr->index;
2078
2079         return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
2080 }
2081
2082 static ssize_t
2083 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
2084            size_t count)
2085 {
2086         struct nct6775_data *data = dev_get_drvdata(dev);
2087         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2088         int nr = sattr->nr;
2089         int index = sattr->index;
2090         int err;
2091         long val;
2092
2093         err = kstrtol(buf, 10, &val);
2094         if (err < 0)
2095                 return err;
2096
2097         mutex_lock(&data->update_lock);
2098         data->temp[index][nr] = LM75_TEMP_TO_REG(val);
2099         nct6775_write_temp(data, data->reg_temp[index][nr],
2100                            data->temp[index][nr]);
2101         mutex_unlock(&data->update_lock);
2102         return count;
2103 }
2104
2105 static ssize_t
2106 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
2107 {
2108         struct nct6775_data *data = nct6775_update_device(dev);
2109         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2110
2111         return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
2112 }
2113
2114 static ssize_t
2115 store_temp_offset(struct device *dev, struct device_attribute *attr,
2116                   const char *buf, size_t count)
2117 {
2118         struct nct6775_data *data = dev_get_drvdata(dev);
2119         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2120         int nr = sattr->index;
2121         long val;
2122         int err;
2123
2124         err = kstrtol(buf, 10, &val);
2125         if (err < 0)
2126                 return err;
2127
2128         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
2129
2130         mutex_lock(&data->update_lock);
2131         data->temp_offset[nr] = val;
2132         nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
2133         mutex_unlock(&data->update_lock);
2134
2135         return count;
2136 }
2137
2138 static ssize_t
2139 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
2140 {
2141         struct nct6775_data *data = nct6775_update_device(dev);
2142         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2143         int nr = sattr->index;
2144
2145         return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
2146 }
2147
2148 static ssize_t
2149 store_temp_type(struct device *dev, struct device_attribute *attr,
2150                 const char *buf, size_t count)
2151 {
2152         struct nct6775_data *data = nct6775_update_device(dev);
2153         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2154         int nr = sattr->index;
2155         unsigned long val;
2156         int err;
2157         u8 vbat, diode, vbit, dbit;
2158
2159         err = kstrtoul(buf, 10, &val);
2160         if (err < 0)
2161                 return err;
2162
2163         if (val != 1 && val != 3 && val != 4)
2164                 return -EINVAL;
2165
2166         mutex_lock(&data->update_lock);
2167
2168         data->temp_type[nr] = val;
2169         vbit = 0x02 << nr;
2170         dbit = data->DIODE_MASK << nr;
2171         vbat = nct6775_read_value(data, data->REG_VBAT) & ~vbit;
2172         diode = nct6775_read_value(data, data->REG_DIODE) & ~dbit;
2173         switch (val) {
2174         case 1: /* CPU diode (diode, current mode) */
2175                 vbat |= vbit;
2176                 diode |= dbit;
2177                 break;
2178         case 3: /* diode, voltage mode */
2179                 vbat |= dbit;
2180                 break;
2181         case 4: /* thermistor */
2182                 break;
2183         }
2184         nct6775_write_value(data, data->REG_VBAT, vbat);
2185         nct6775_write_value(data, data->REG_DIODE, diode);
2186
2187         mutex_unlock(&data->update_lock);
2188         return count;
2189 }
2190
2191 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
2192                                        struct attribute *attr, int index)
2193 {
2194         struct device *dev = container_of(kobj, struct device, kobj);
2195         struct nct6775_data *data = dev_get_drvdata(dev);
2196         int temp = index / 10;  /* temp index */
2197         int nr = index % 10;    /* attribute index */
2198
2199         if (!(data->have_temp & (1 << temp)))
2200                 return 0;
2201
2202         if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0)
2203                 return 0;                               /* alarm */
2204
2205         if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0)
2206                 return 0;                               /* beep */
2207
2208         if (nr == 4 && !data->reg_temp[1][temp])        /* max */
2209                 return 0;
2210
2211         if (nr == 5 && !data->reg_temp[2][temp])        /* max_hyst */
2212                 return 0;
2213
2214         if (nr == 6 && !data->reg_temp[3][temp])        /* crit */
2215                 return 0;
2216
2217         if (nr == 7 && !data->reg_temp[4][temp])        /* lcrit */
2218                 return 0;
2219
2220         /* offset and type only apply to fixed sensors */
2221         if (nr > 7 && !(data->have_temp_fixed & (1 << temp)))
2222                 return 0;
2223
2224         return attr->mode;
2225 }
2226
2227 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", S_IRUGO, show_temp, NULL, 0, 0);
2228 SENSOR_TEMPLATE(temp_label, "temp%d_label", S_IRUGO, show_temp_label, NULL, 0);
2229 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", S_IRUGO | S_IWUSR, show_temp,
2230                   store_temp, 0, 1);
2231 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", S_IRUGO | S_IWUSR,
2232                   show_temp, store_temp, 0, 2);
2233 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", S_IRUGO | S_IWUSR, show_temp,
2234                   store_temp, 0, 3);
2235 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", S_IRUGO | S_IWUSR, show_temp,
2236                   store_temp, 0, 4);
2237 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", S_IRUGO | S_IWUSR,
2238                 show_temp_offset, store_temp_offset, 0);
2239 SENSOR_TEMPLATE(temp_type, "temp%d_type", S_IRUGO | S_IWUSR, show_temp_type,
2240                 store_temp_type, 0);
2241 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", S_IRUGO, show_temp_alarm, NULL, 0);
2242 SENSOR_TEMPLATE(temp_beep, "temp%d_beep", S_IRUGO | S_IWUSR, show_temp_beep,
2243                 store_temp_beep, 0);
2244
2245 /*
2246  * nct6775_temp_is_visible uses the index into the following array
2247  * to determine if attributes should be created or not.
2248  * Any change in order or content must be matched.
2249  */
2250 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
2251         &sensor_dev_template_temp_input,
2252         &sensor_dev_template_temp_label,
2253         &sensor_dev_template_temp_alarm,        /* 2 */
2254         &sensor_dev_template_temp_beep,         /* 3 */
2255         &sensor_dev_template_temp_max,          /* 4 */
2256         &sensor_dev_template_temp_max_hyst,     /* 5 */
2257         &sensor_dev_template_temp_crit,         /* 6 */
2258         &sensor_dev_template_temp_lcrit,        /* 7 */
2259         &sensor_dev_template_temp_offset,       /* 8 */
2260         &sensor_dev_template_temp_type,         /* 9 */
2261         NULL
2262 };
2263
2264 static const struct sensor_template_group nct6775_temp_template_group = {
2265         .templates = nct6775_attributes_temp_template,
2266         .is_visible = nct6775_temp_is_visible,
2267         .base = 1,
2268 };
2269
2270 static ssize_t
2271 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
2272 {
2273         struct nct6775_data *data = nct6775_update_device(dev);
2274         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2275
2276         return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
2277 }
2278
2279 static ssize_t
2280 store_pwm_mode(struct device *dev, struct device_attribute *attr,
2281                const char *buf, size_t count)
2282 {
2283         struct nct6775_data *data = dev_get_drvdata(dev);
2284         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2285         int nr = sattr->index;
2286         unsigned long val;
2287         int err;
2288         u8 reg;
2289
2290         err = kstrtoul(buf, 10, &val);
2291         if (err < 0)
2292                 return err;
2293
2294         if (val > 1)
2295                 return -EINVAL;
2296
2297         /* Setting DC mode is not supported for all chips/channels */
2298         if (data->REG_PWM_MODE[nr] == 0) {
2299                 if (val)
2300                         return -EINVAL;
2301                 return count;
2302         }
2303
2304         mutex_lock(&data->update_lock);
2305         data->pwm_mode[nr] = val;
2306         reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
2307         reg &= ~data->PWM_MODE_MASK[nr];
2308         if (val)
2309                 reg |= data->PWM_MODE_MASK[nr];
2310         nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
2311         mutex_unlock(&data->update_lock);
2312         return count;
2313 }
2314
2315 static ssize_t
2316 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2317 {
2318         struct nct6775_data *data = nct6775_update_device(dev);
2319         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2320         int nr = sattr->nr;
2321         int index = sattr->index;
2322         int pwm;
2323
2324         /*
2325          * For automatic fan control modes, show current pwm readings.
2326          * Otherwise, show the configured value.
2327          */
2328         if (index == 0 && data->pwm_enable[nr] > manual)
2329                 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
2330         else
2331                 pwm = data->pwm[index][nr];
2332
2333         return sprintf(buf, "%d\n", pwm);
2334 }
2335
2336 static ssize_t
2337 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
2338           size_t count)
2339 {
2340         struct nct6775_data *data = dev_get_drvdata(dev);
2341         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2342         int nr = sattr->nr;
2343         int index = sattr->index;
2344         unsigned long val;
2345         int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
2346         int maxval[7]
2347           = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
2348         int err;
2349         u8 reg;
2350
2351         err = kstrtoul(buf, 10, &val);
2352         if (err < 0)
2353                 return err;
2354         val = clamp_val(val, minval[index], maxval[index]);
2355
2356         mutex_lock(&data->update_lock);
2357         data->pwm[index][nr] = val;
2358         nct6775_write_value(data, data->REG_PWM[index][nr], val);
2359         if (index == 2) { /* floor: disable if val == 0 */
2360                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2361                 reg &= 0x7f;
2362                 if (val)
2363                         reg |= 0x80;
2364                 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2365         }
2366         mutex_unlock(&data->update_lock);
2367         return count;
2368 }
2369
2370 /* Returns 0 if OK, -EINVAL otherwise */
2371 static int check_trip_points(struct nct6775_data *data, int nr)
2372 {
2373         int i;
2374
2375         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2376                 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
2377                         return -EINVAL;
2378         }
2379         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2380                 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
2381                         return -EINVAL;
2382         }
2383         /* validate critical temperature and pwm if enabled (pwm > 0) */
2384         if (data->auto_pwm[nr][data->auto_pwm_num]) {
2385                 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2386                                 data->auto_temp[nr][data->auto_pwm_num] ||
2387                     data->auto_pwm[nr][data->auto_pwm_num - 1] >
2388                                 data->auto_pwm[nr][data->auto_pwm_num])
2389                         return -EINVAL;
2390         }
2391         return 0;
2392 }
2393
2394 static void pwm_update_registers(struct nct6775_data *data, int nr)
2395 {
2396         u8 reg;
2397
2398         switch (data->pwm_enable[nr]) {
2399         case off:
2400         case manual:
2401                 break;
2402         case speed_cruise:
2403                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2404                 reg = (reg & ~data->tolerance_mask) |
2405                   (data->target_speed_tolerance[nr] & data->tolerance_mask);
2406                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2407                 nct6775_write_value(data, data->REG_TARGET[nr],
2408                                     data->target_speed[nr] & 0xff);
2409                 if (data->REG_TOLERANCE_H) {
2410                         reg = (data->target_speed[nr] >> 8) & 0x0f;
2411                         reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2412                         nct6775_write_value(data,
2413                                             data->REG_TOLERANCE_H[nr],
2414                                             reg);
2415                 }
2416                 break;
2417         case thermal_cruise:
2418                 nct6775_write_value(data, data->REG_TARGET[nr],
2419                                     data->target_temp[nr]);
2420                 /* intentional */
2421         default:
2422                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2423                 reg = (reg & ~data->tolerance_mask) |
2424                   data->temp_tolerance[0][nr];
2425                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2426                 break;
2427         }
2428 }
2429
2430 static ssize_t
2431 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2432 {
2433         struct nct6775_data *data = nct6775_update_device(dev);
2434         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2435
2436         return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2437 }
2438
2439 static ssize_t
2440 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2441                  const char *buf, size_t count)
2442 {
2443         struct nct6775_data *data = dev_get_drvdata(dev);
2444         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2445         int nr = sattr->index;
2446         unsigned long val;
2447         int err;
2448         u16 reg;
2449
2450         err = kstrtoul(buf, 10, &val);
2451         if (err < 0)
2452                 return err;
2453
2454         if (val > sf4)
2455                 return -EINVAL;
2456
2457         if (val == sf3 && data->kind != nct6775)
2458                 return -EINVAL;
2459
2460         if (val == sf4 && check_trip_points(data, nr)) {
2461                 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2462                 dev_err(dev, "Adjust trip points and try again\n");
2463                 return -EINVAL;
2464         }
2465
2466         mutex_lock(&data->update_lock);
2467         data->pwm_enable[nr] = val;
2468         if (val == off) {
2469                 /*
2470                  * turn off pwm control: select manual mode, set pwm to maximum
2471                  */
2472                 data->pwm[0][nr] = 255;
2473                 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2474         }
2475         pwm_update_registers(data, nr);
2476         reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2477         reg &= 0x0f;
2478         reg |= pwm_enable_to_reg(val) << 4;
2479         nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2480         mutex_unlock(&data->update_lock);
2481         return count;
2482 }
2483
2484 static ssize_t
2485 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2486 {
2487         int i, sel = 0;
2488
2489         for (i = 0; i < NUM_TEMP; i++) {
2490                 if (!(data->have_temp & (1 << i)))
2491                         continue;
2492                 if (src == data->temp_src[i]) {
2493                         sel = i + 1;
2494                         break;
2495                 }
2496         }
2497
2498         return sprintf(buf, "%d\n", sel);
2499 }
2500
2501 static ssize_t
2502 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2503 {
2504         struct nct6775_data *data = nct6775_update_device(dev);
2505         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2506         int index = sattr->index;
2507
2508         return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2509 }
2510
2511 static ssize_t
2512 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2513                    const char *buf, size_t count)
2514 {
2515         struct nct6775_data *data = nct6775_update_device(dev);
2516         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2517         int nr = sattr->index;
2518         unsigned long val;
2519         int err, reg, src;
2520
2521         err = kstrtoul(buf, 10, &val);
2522         if (err < 0)
2523                 return err;
2524         if (val == 0 || val > NUM_TEMP)
2525                 return -EINVAL;
2526         if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
2527                 return -EINVAL;
2528
2529         mutex_lock(&data->update_lock);
2530         src = data->temp_src[val - 1];
2531         data->pwm_temp_sel[nr] = src;
2532         reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2533         reg &= 0xe0;
2534         reg |= src;
2535         nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2536         mutex_unlock(&data->update_lock);
2537
2538         return count;
2539 }
2540
2541 static ssize_t
2542 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2543                          char *buf)
2544 {
2545         struct nct6775_data *data = nct6775_update_device(dev);
2546         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2547         int index = sattr->index;
2548
2549         return show_pwm_temp_sel_common(data, buf,
2550                                         data->pwm_weight_temp_sel[index]);
2551 }
2552
2553 static ssize_t
2554 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2555                           const char *buf, size_t count)
2556 {
2557         struct nct6775_data *data = nct6775_update_device(dev);
2558         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2559         int nr = sattr->index;
2560         unsigned long val;
2561         int err, reg, src;
2562
2563         err = kstrtoul(buf, 10, &val);
2564         if (err < 0)
2565                 return err;
2566         if (val > NUM_TEMP)
2567                 return -EINVAL;
2568         if (val && (!(data->have_temp & (1 << (val - 1))) ||
2569                     !data->temp_src[val - 1]))
2570                 return -EINVAL;
2571
2572         mutex_lock(&data->update_lock);
2573         if (val) {
2574                 src = data->temp_src[val - 1];
2575                 data->pwm_weight_temp_sel[nr] = src;
2576                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2577                 reg &= 0xe0;
2578                 reg |= (src | 0x80);
2579                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2580         } else {
2581                 data->pwm_weight_temp_sel[nr] = 0;
2582                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2583                 reg &= 0x7f;
2584                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2585         }
2586         mutex_unlock(&data->update_lock);
2587
2588         return count;
2589 }
2590
2591 static ssize_t
2592 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2593 {
2594         struct nct6775_data *data = nct6775_update_device(dev);
2595         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2596
2597         return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2598 }
2599
2600 static ssize_t
2601 store_target_temp(struct device *dev, struct device_attribute *attr,
2602                   const char *buf, size_t count)
2603 {
2604         struct nct6775_data *data = dev_get_drvdata(dev);
2605         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2606         int nr = sattr->index;
2607         unsigned long val;
2608         int err;
2609
2610         err = kstrtoul(buf, 10, &val);
2611         if (err < 0)
2612                 return err;
2613
2614         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2615                         data->target_temp_mask);
2616
2617         mutex_lock(&data->update_lock);
2618         data->target_temp[nr] = val;
2619         pwm_update_registers(data, nr);
2620         mutex_unlock(&data->update_lock);
2621         return count;
2622 }
2623
2624 static ssize_t
2625 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2626 {
2627         struct nct6775_data *data = nct6775_update_device(dev);
2628         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2629         int nr = sattr->index;
2630
2631         return sprintf(buf, "%d\n",
2632                        fan_from_reg16(data->target_speed[nr],
2633                                       data->fan_div[nr]));
2634 }
2635
2636 static ssize_t
2637 store_target_speed(struct device *dev, struct device_attribute *attr,
2638                    const char *buf, size_t count)
2639 {
2640         struct nct6775_data *data = dev_get_drvdata(dev);
2641         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2642         int nr = sattr->index;
2643         unsigned long val;
2644         int err;
2645         u16 speed;
2646
2647         err = kstrtoul(buf, 10, &val);
2648         if (err < 0)
2649                 return err;
2650
2651         val = clamp_val(val, 0, 1350000U);
2652         speed = fan_to_reg(val, data->fan_div[nr]);
2653
2654         mutex_lock(&data->update_lock);
2655         data->target_speed[nr] = speed;
2656         pwm_update_registers(data, nr);
2657         mutex_unlock(&data->update_lock);
2658         return count;
2659 }
2660
2661 static ssize_t
2662 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2663                     char *buf)
2664 {
2665         struct nct6775_data *data = nct6775_update_device(dev);
2666         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2667         int nr = sattr->nr;
2668         int index = sattr->index;
2669
2670         return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2671 }
2672
2673 static ssize_t
2674 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2675                      const char *buf, size_t count)
2676 {
2677         struct nct6775_data *data = dev_get_drvdata(dev);
2678         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2679         int nr = sattr->nr;
2680         int index = sattr->index;
2681         unsigned long val;
2682         int err;
2683
2684         err = kstrtoul(buf, 10, &val);
2685         if (err < 0)
2686                 return err;
2687
2688         /* Limit tolerance as needed */
2689         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2690
2691         mutex_lock(&data->update_lock);
2692         data->temp_tolerance[index][nr] = val;
2693         if (index)
2694                 pwm_update_registers(data, nr);
2695         else
2696                 nct6775_write_value(data,
2697                                     data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2698                                     val);
2699         mutex_unlock(&data->update_lock);
2700         return count;
2701 }
2702
2703 /*
2704  * Fan speed tolerance is a tricky beast, since the associated register is
2705  * a tick counter, but the value is reported and configured as rpm.
2706  * Compute resulting low and high rpm values and report the difference.
2707  */
2708 static ssize_t
2709 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2710                      char *buf)
2711 {
2712         struct nct6775_data *data = nct6775_update_device(dev);
2713         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2714         int nr = sattr->index;
2715         int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2716         int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2717         int tolerance;
2718
2719         if (low <= 0)
2720                 low = 1;
2721         if (high > 0xffff)
2722                 high = 0xffff;
2723         if (high < low)
2724                 high = low;
2725
2726         tolerance = (fan_from_reg16(low, data->fan_div[nr])
2727                      - fan_from_reg16(high, data->fan_div[nr])) / 2;
2728
2729         return sprintf(buf, "%d\n", tolerance);
2730 }
2731
2732 static ssize_t
2733 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2734                       const char *buf, size_t count)
2735 {
2736         struct nct6775_data *data = dev_get_drvdata(dev);
2737         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2738         int nr = sattr->index;
2739         unsigned long val;
2740         int err;
2741         int low, high;
2742
2743         err = kstrtoul(buf, 10, &val);
2744         if (err < 0)
2745                 return err;
2746
2747         high = fan_from_reg16(data->target_speed[nr],
2748                               data->fan_div[nr]) + val;
2749         low = fan_from_reg16(data->target_speed[nr],
2750                              data->fan_div[nr]) - val;
2751         if (low <= 0)
2752                 low = 1;
2753         if (high < low)
2754                 high = low;
2755
2756         val = (fan_to_reg(low, data->fan_div[nr]) -
2757                fan_to_reg(high, data->fan_div[nr])) / 2;
2758
2759         /* Limit tolerance as needed */
2760         val = clamp_val(val, 0, data->speed_tolerance_limit);
2761
2762         mutex_lock(&data->update_lock);
2763         data->target_speed_tolerance[nr] = val;
2764         pwm_update_registers(data, nr);
2765         mutex_unlock(&data->update_lock);
2766         return count;
2767 }
2768
2769 SENSOR_TEMPLATE_2(pwm, "pwm%d", S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2770 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", S_IWUSR | S_IRUGO, show_pwm_mode,
2771                 store_pwm_mode, 0);
2772 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", S_IWUSR | S_IRUGO, show_pwm_enable,
2773                 store_pwm_enable, 0);
2774 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", S_IWUSR | S_IRUGO,
2775                 show_pwm_temp_sel, store_pwm_temp_sel, 0);
2776 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", S_IWUSR | S_IRUGO,
2777                 show_target_temp, store_target_temp, 0);
2778 SENSOR_TEMPLATE(fan_target, "fan%d_target", S_IWUSR | S_IRUGO,
2779                 show_target_speed, store_target_speed, 0);
2780 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", S_IWUSR | S_IRUGO,
2781                 show_speed_tolerance, store_speed_tolerance, 0);
2782
2783 /* Smart Fan registers */
2784
2785 static ssize_t
2786 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2787 {
2788         struct nct6775_data *data = nct6775_update_device(dev);
2789         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2790         int nr = sattr->nr;
2791         int index = sattr->index;
2792
2793         return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2794 }
2795
2796 static ssize_t
2797 store_weight_temp(struct device *dev, struct device_attribute *attr,
2798                   const char *buf, size_t count)
2799 {
2800         struct nct6775_data *data = dev_get_drvdata(dev);
2801         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2802         int nr = sattr->nr;
2803         int index = sattr->index;
2804         unsigned long val;
2805         int err;
2806
2807         err = kstrtoul(buf, 10, &val);
2808         if (err < 0)
2809                 return err;
2810
2811         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2812
2813         mutex_lock(&data->update_lock);
2814         data->weight_temp[index][nr] = val;
2815         nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2816         mutex_unlock(&data->update_lock);
2817         return count;
2818 }
2819
2820 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", S_IWUSR | S_IRUGO,
2821                   show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
2822 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step",
2823                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 0);
2824 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol",
2825                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 1);
2826 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base",
2827                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 2);
2828 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step",
2829                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 5);
2830 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base",
2831                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 6);
2832
2833 static ssize_t
2834 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2835 {
2836         struct nct6775_data *data = nct6775_update_device(dev);
2837         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2838         int nr = sattr->nr;
2839         int index = sattr->index;
2840
2841         return sprintf(buf, "%d\n",
2842                        step_time_from_reg(data->fan_time[index][nr],
2843                                           data->pwm_mode[nr]));
2844 }
2845
2846 static ssize_t
2847 store_fan_time(struct device *dev, struct device_attribute *attr,
2848                const char *buf, size_t count)
2849 {
2850         struct nct6775_data *data = dev_get_drvdata(dev);
2851         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2852         int nr = sattr->nr;
2853         int index = sattr->index;
2854         unsigned long val;
2855         int err;
2856
2857         err = kstrtoul(buf, 10, &val);
2858         if (err < 0)
2859                 return err;
2860
2861         val = step_time_to_reg(val, data->pwm_mode[nr]);
2862         mutex_lock(&data->update_lock);
2863         data->fan_time[index][nr] = val;
2864         nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2865         mutex_unlock(&data->update_lock);
2866         return count;
2867 }
2868
2869 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
2870 static ssize_t
2871 show_name(struct device *dev, struct device_attribute *attr, char *buf)
2872 {
2873         struct nct6775_data *data = dev_get_drvdata(dev);
2874
2875         return sprintf(buf, "%s\n", data->name);
2876 }
2877
2878 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
2879 #endif
2880
2881 static ssize_t
2882 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2883 {
2884         struct nct6775_data *data = nct6775_update_device(dev);
2885         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2886
2887         return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2888 }
2889
2890 static ssize_t
2891 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2892                const char *buf, size_t count)
2893 {
2894         struct nct6775_data *data = dev_get_drvdata(dev);
2895         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2896         int nr = sattr->nr;
2897         int point = sattr->index;
2898         unsigned long val;
2899         int err;
2900         u8 reg;
2901
2902         err = kstrtoul(buf, 10, &val);
2903         if (err < 0)
2904                 return err;
2905         if (val > 255)
2906                 return -EINVAL;
2907
2908         if (point == data->auto_pwm_num) {
2909                 if (data->kind != nct6775 && !val)
2910                         return -EINVAL;
2911                 if (data->kind != nct6779 && val)
2912                         val = 0xff;
2913         }
2914
2915         mutex_lock(&data->update_lock);
2916         data->auto_pwm[nr][point] = val;
2917         if (point < data->auto_pwm_num) {
2918                 nct6775_write_value(data,
2919                                     NCT6775_AUTO_PWM(data, nr, point),
2920                                     data->auto_pwm[nr][point]);
2921         } else {
2922                 switch (data->kind) {
2923                 case nct6775:
2924                         /* disable if needed (pwm == 0) */
2925                         reg = nct6775_read_value(data,
2926                                                  NCT6775_REG_CRITICAL_ENAB[nr]);
2927                         if (val)
2928                                 reg |= 0x02;
2929                         else
2930                                 reg &= ~0x02;
2931                         nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
2932                                             reg);
2933                         break;
2934                 case nct6776:
2935                         break; /* always enabled, nothing to do */
2936                 case nct6106:
2937                 case nct6779:
2938                 case nct6791:
2939                 case nct6792:
2940                 case nct6793:
2941                         nct6775_write_value(data, data->REG_CRITICAL_PWM[nr],
2942                                             val);
2943                         reg = nct6775_read_value(data,
2944                                         data->REG_CRITICAL_PWM_ENABLE[nr]);
2945                         if (val == 255)
2946                                 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
2947                         else
2948                                 reg |= data->CRITICAL_PWM_ENABLE_MASK;
2949                         nct6775_write_value(data,
2950                                             data->REG_CRITICAL_PWM_ENABLE[nr],
2951                                             reg);
2952                         break;
2953                 }
2954         }
2955         mutex_unlock(&data->update_lock);
2956         return count;
2957 }
2958
2959 static ssize_t
2960 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
2961 {
2962         struct nct6775_data *data = nct6775_update_device(dev);
2963         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2964         int nr = sattr->nr;
2965         int point = sattr->index;
2966
2967         /*
2968          * We don't know for sure if the temperature is signed or unsigned.
2969          * Assume it is unsigned.
2970          */
2971         return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
2972 }
2973
2974 static ssize_t
2975 store_auto_temp(struct device *dev, struct device_attribute *attr,
2976                 const char *buf, size_t count)
2977 {
2978         struct nct6775_data *data = dev_get_drvdata(dev);
2979         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2980         int nr = sattr->nr;
2981         int point = sattr->index;
2982         unsigned long val;
2983         int err;
2984
2985         err = kstrtoul(buf, 10, &val);
2986         if (err)
2987                 return err;
2988         if (val > 255000)
2989                 return -EINVAL;
2990
2991         mutex_lock(&data->update_lock);
2992         data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
2993         if (point < data->auto_pwm_num) {
2994                 nct6775_write_value(data,
2995                                     NCT6775_AUTO_TEMP(data, nr, point),
2996                                     data->auto_temp[nr][point]);
2997         } else {
2998                 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
2999                                     data->auto_temp[nr][point]);
3000         }
3001         mutex_unlock(&data->update_lock);
3002         return count;
3003 }
3004
3005 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
3006                                       struct attribute *attr, int index)
3007 {
3008         struct device *dev = container_of(kobj, struct device, kobj);
3009         struct nct6775_data *data = dev_get_drvdata(dev);
3010         int pwm = index / 36;   /* pwm index */
3011         int nr = index % 36;    /* attribute index */
3012
3013         if (!(data->has_pwm & (1 << pwm)))
3014                 return 0;
3015
3016         if ((nr >= 14 && nr <= 18) || nr == 21)   /* weight */
3017                 if (!data->REG_WEIGHT_TEMP_SEL[pwm])
3018                         return 0;
3019         if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
3020                 return 0;
3021         if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
3022                 return 0;
3023         if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
3024                 return 0;
3025
3026         if (nr >= 22 && nr <= 35) {             /* auto point */
3027                 int api = (nr - 22) / 2;        /* auto point index */
3028
3029                 if (api > data->auto_pwm_num)
3030                         return 0;
3031         }
3032         return attr->mode;
3033 }
3034
3035 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", S_IWUSR | S_IRUGO,
3036                   show_fan_time, store_fan_time, 0, 0);
3037 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", S_IWUSR | S_IRUGO,
3038                   show_fan_time, store_fan_time, 0, 1);
3039 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", S_IWUSR | S_IRUGO,
3040                   show_fan_time, store_fan_time, 0, 2);
3041 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", S_IWUSR | S_IRUGO, show_pwm,
3042                   store_pwm, 0, 1);
3043 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", S_IWUSR | S_IRUGO, show_pwm,
3044                   store_pwm, 0, 2);
3045 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", S_IWUSR | S_IRUGO,
3046                   show_temp_tolerance, store_temp_tolerance, 0, 0);
3047 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance",
3048                   S_IWUSR | S_IRUGO, show_temp_tolerance, store_temp_tolerance,
3049                   0, 1);
3050
3051 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", S_IWUSR | S_IRUGO, show_pwm, store_pwm,
3052                   0, 3);
3053
3054 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", S_IWUSR | S_IRUGO, show_pwm,
3055                   store_pwm, 0, 4);
3056
3057 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm",
3058                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 0);
3059 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp",
3060                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 0);
3061
3062 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm",
3063                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 1);
3064 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp",
3065                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 1);
3066
3067 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm",
3068                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 2);
3069 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp",
3070                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 2);
3071
3072 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm",
3073                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 3);
3074 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp",
3075                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 3);
3076
3077 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm",
3078                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 4);
3079 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp",
3080                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 4);
3081
3082 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm",
3083                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 5);
3084 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp",
3085                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 5);
3086
3087 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm",
3088                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 6);
3089 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp",
3090                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 6);
3091
3092 /*
3093  * nct6775_pwm_is_visible uses the index into the following array
3094  * to determine if attributes should be created or not.
3095  * Any change in order or content must be matched.
3096  */
3097 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
3098         &sensor_dev_template_pwm,
3099         &sensor_dev_template_pwm_mode,
3100         &sensor_dev_template_pwm_enable,
3101         &sensor_dev_template_pwm_temp_sel,
3102         &sensor_dev_template_pwm_temp_tolerance,
3103         &sensor_dev_template_pwm_crit_temp_tolerance,
3104         &sensor_dev_template_pwm_target_temp,
3105         &sensor_dev_template_fan_target,
3106         &sensor_dev_template_fan_tolerance,
3107         &sensor_dev_template_pwm_stop_time,
3108         &sensor_dev_template_pwm_step_up_time,
3109         &sensor_dev_template_pwm_step_down_time,
3110         &sensor_dev_template_pwm_start,
3111         &sensor_dev_template_pwm_floor,
3112         &sensor_dev_template_pwm_weight_temp_sel,       /* 14 */
3113         &sensor_dev_template_pwm_weight_temp_step,
3114         &sensor_dev_template_pwm_weight_temp_step_tol,
3115         &sensor_dev_template_pwm_weight_temp_step_base,
3116         &sensor_dev_template_pwm_weight_duty_step,      /* 18 */
3117         &sensor_dev_template_pwm_max,                   /* 19 */
3118         &sensor_dev_template_pwm_step,                  /* 20 */
3119         &sensor_dev_template_pwm_weight_duty_base,      /* 21 */
3120         &sensor_dev_template_pwm_auto_point1_pwm,       /* 22 */
3121         &sensor_dev_template_pwm_auto_point1_temp,
3122         &sensor_dev_template_pwm_auto_point2_pwm,
3123         &sensor_dev_template_pwm_auto_point2_temp,
3124         &sensor_dev_template_pwm_auto_point3_pwm,
3125         &sensor_dev_template_pwm_auto_point3_temp,
3126         &sensor_dev_template_pwm_auto_point4_pwm,
3127         &sensor_dev_template_pwm_auto_point4_temp,
3128         &sensor_dev_template_pwm_auto_point5_pwm,
3129         &sensor_dev_template_pwm_auto_point5_temp,
3130         &sensor_dev_template_pwm_auto_point6_pwm,
3131         &sensor_dev_template_pwm_auto_point6_temp,
3132         &sensor_dev_template_pwm_auto_point7_pwm,
3133         &sensor_dev_template_pwm_auto_point7_temp,      /* 35 */
3134
3135         NULL
3136 };
3137
3138 static const struct sensor_template_group nct6775_pwm_template_group = {
3139         .templates = nct6775_attributes_pwm_template,
3140         .is_visible = nct6775_pwm_is_visible,
3141         .base = 1,
3142 };
3143
3144 static ssize_t
3145 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
3146 {
3147         struct nct6775_data *data = dev_get_drvdata(dev);
3148
3149         return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
3150 }
3151
3152 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
3153
3154 /* Case open detection */
3155
3156 static ssize_t
3157 clear_caseopen(struct device *dev, struct device_attribute *attr,
3158                const char *buf, size_t count)
3159 {
3160         struct nct6775_data *data = dev_get_drvdata(dev);
3161         int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
3162         unsigned long val;
3163         u8 reg;
3164         int ret;
3165
3166         if (kstrtoul(buf, 10, &val) || val != 0)
3167                 return -EINVAL;
3168
3169         mutex_lock(&data->update_lock);
3170
3171         /*
3172          * Use CR registers to clear caseopen status.
3173          * The CR registers are the same for all chips, and not all chips
3174          * support clearing the caseopen status through "regular" registers.
3175          */
3176         ret = superio_enter(data->sioreg);
3177         if (ret) {
3178                 count = ret;
3179                 goto error;
3180         }
3181
3182         superio_select(data->sioreg, NCT6775_LD_ACPI);
3183         reg = superio_inb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
3184         reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3185         superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3186         reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3187         superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3188         superio_exit(data->sioreg);
3189
3190         data->valid = false;    /* Force cache refresh */
3191 error:
3192         mutex_unlock(&data->update_lock);
3193         return count;
3194 }
3195
3196 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
3197                           clear_caseopen, INTRUSION_ALARM_BASE);
3198 static SENSOR_DEVICE_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
3199                           clear_caseopen, INTRUSION_ALARM_BASE + 1);
3200 static SENSOR_DEVICE_ATTR(intrusion0_beep, S_IWUSR | S_IRUGO, show_beep,
3201                           store_beep, INTRUSION_ALARM_BASE);
3202 static SENSOR_DEVICE_ATTR(intrusion1_beep, S_IWUSR | S_IRUGO, show_beep,
3203                           store_beep, INTRUSION_ALARM_BASE + 1);
3204 static SENSOR_DEVICE_ATTR(beep_enable, S_IWUSR | S_IRUGO, show_beep,
3205                           store_beep, BEEP_ENABLE_BASE);
3206
3207 static umode_t nct6775_other_is_visible(struct kobject *kobj,
3208                                         struct attribute *attr, int index)
3209 {
3210         struct device *dev = container_of(kobj, struct device, kobj);
3211         struct nct6775_data *data = dev_get_drvdata(dev);
3212
3213         if (index == 0 && !data->have_vid)
3214                 return 0;
3215
3216         if (index == 1 || index == 2) {
3217                 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + index - 1] < 0)
3218                         return 0;
3219         }
3220
3221         if (index == 3 || index == 4) {
3222                 if (data->BEEP_BITS[INTRUSION_ALARM_BASE + index - 3] < 0)
3223                         return 0;
3224         }
3225
3226         return attr->mode;
3227 }
3228
3229 /*
3230  * nct6775_other_is_visible uses the index into the following array
3231  * to determine if attributes should be created or not.
3232  * Any change in order or content must be matched.
3233  */
3234 static struct attribute *nct6775_attributes_other[] = {
3235         &dev_attr_cpu0_vid.attr,                                /* 0 */
3236         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,        /* 1 */
3237         &sensor_dev_attr_intrusion1_alarm.dev_attr.attr,        /* 2 */
3238         &sensor_dev_attr_intrusion0_beep.dev_attr.attr,         /* 3 */
3239         &sensor_dev_attr_intrusion1_beep.dev_attr.attr,         /* 4 */
3240         &sensor_dev_attr_beep_enable.dev_attr.attr,             /* 5 */
3241 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
3242         &dev_attr_name.attr,
3243 #endif
3244         NULL
3245 };
3246
3247 static const struct attribute_group nct6775_group_other = {
3248         .attrs = nct6775_attributes_other,
3249         .is_visible = nct6775_other_is_visible,
3250 };
3251
3252 static inline void nct6775_init_device(struct nct6775_data *data)
3253 {
3254         int i;
3255         u8 tmp, diode;
3256
3257         /* Start monitoring if needed */
3258         if (data->REG_CONFIG) {
3259                 tmp = nct6775_read_value(data, data->REG_CONFIG);
3260                 if (!(tmp & 0x01))
3261                         nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
3262         }
3263
3264         /* Enable temperature sensors if needed */
3265         for (i = 0; i < NUM_TEMP; i++) {
3266                 if (!(data->have_temp & (1 << i)))
3267                         continue;
3268                 if (!data->reg_temp_config[i])
3269                         continue;
3270                 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
3271                 if (tmp & 0x01)
3272                         nct6775_write_value(data, data->reg_temp_config[i],
3273                                             tmp & 0xfe);
3274         }
3275
3276         /* Enable VBAT monitoring if needed */
3277         tmp = nct6775_read_value(data, data->REG_VBAT);
3278         if (!(tmp & 0x01))
3279                 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
3280
3281         diode = nct6775_read_value(data, data->REG_DIODE);
3282
3283         for (i = 0; i < data->temp_fixed_num; i++) {
3284                 if (!(data->have_temp_fixed & (1 << i)))
3285                         continue;
3286                 if ((tmp & (data->DIODE_MASK << i)))    /* diode */
3287                         data->temp_type[i]
3288                           = 3 - ((diode >> i) & data->DIODE_MASK);
3289                 else                            /* thermistor */
3290                         data->temp_type[i] = 4;
3291         }
3292 }
3293
3294 static void
3295 nct6775_check_fan_inputs(struct nct6775_data *data)
3296 {
3297         bool fan3pin, fan4pin, fan4min, fan5pin, fan6pin;
3298         bool pwm3pin, pwm4pin, pwm5pin, pwm6pin;
3299         int sioreg = data->sioreg;
3300         int regval;
3301
3302         /* Store SIO_REG_ENABLE for use during resume */
3303         superio_select(sioreg, NCT6775_LD_HWM);
3304         data->sio_reg_enable = superio_inb(sioreg, SIO_REG_ENABLE);
3305
3306         /* fan4 and fan5 share some pins with the GPIO and serial flash */
3307         if (data->kind == nct6775) {
3308                 regval = superio_inb(sioreg, 0x2c);
3309
3310                 fan3pin = regval & (1 << 6);
3311                 pwm3pin = regval & (1 << 7);
3312
3313                 /* On NCT6775, fan4 shares pins with the fdc interface */
3314                 fan4pin = !(superio_inb(sioreg, 0x2A) & 0x80);
3315                 fan4min = false;
3316                 fan5pin = false;
3317                 fan6pin = false;
3318                 pwm4pin = false;
3319                 pwm5pin = false;
3320                 pwm6pin = false;
3321         } else if (data->kind == nct6776) {
3322                 bool gpok = superio_inb(sioreg, 0x27) & 0x80;
3323                 const char *board_vendor, *board_name;
3324
3325                 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
3326                 board_name = dmi_get_system_info(DMI_BOARD_NAME);
3327
3328                 if (board_name && board_vendor &&
3329                     !strcmp(board_vendor, "ASRock")) {
3330                         /*
3331                          * Auxiliary fan monitoring is not enabled on ASRock
3332                          * Z77 Pro4-M if booted in UEFI Ultra-FastBoot mode.
3333                          * Observed with BIOS version 2.00.
3334                          */
3335                         if (!strcmp(board_name, "Z77 Pro4-M")) {
3336                                 if ((data->sio_reg_enable & 0xe0) != 0xe0) {
3337                                         data->sio_reg_enable |= 0xe0;
3338                                         superio_outb(sioreg, SIO_REG_ENABLE,
3339                                                      data->sio_reg_enable);
3340                                 }
3341                         }
3342                 }
3343
3344                 if (data->sio_reg_enable & 0x80)
3345                         fan3pin = gpok;
3346                 else
3347                         fan3pin = !(superio_inb(sioreg, 0x24) & 0x40);
3348
3349                 if (data->sio_reg_enable & 0x40)
3350                         fan4pin = gpok;
3351                 else
3352                         fan4pin = superio_inb(sioreg, 0x1C) & 0x01;
3353
3354                 if (data->sio_reg_enable & 0x20)
3355                         fan5pin = gpok;
3356                 else
3357                         fan5pin = superio_inb(sioreg, 0x1C) & 0x02;
3358
3359                 fan4min = fan4pin;
3360                 fan6pin = false;
3361                 pwm3pin = fan3pin;
3362                 pwm4pin = false;
3363                 pwm5pin = false;
3364                 pwm6pin = false;
3365         } else if (data->kind == nct6106) {
3366                 regval = superio_inb(sioreg, 0x24);
3367                 fan3pin = !(regval & 0x80);
3368                 pwm3pin = regval & 0x08;
3369
3370                 fan4pin = false;
3371                 fan4min = false;
3372                 fan5pin = false;
3373                 fan6pin = false;
3374                 pwm4pin = false;
3375                 pwm5pin = false;
3376                 pwm6pin = false;
3377         } else {        /* NCT6779D, NCT6791D, NCT6792D, or NCT6793D */
3378                 regval = superio_inb(sioreg, 0x1c);
3379
3380                 fan3pin = !(regval & (1 << 5));
3381                 fan4pin = !(regval & (1 << 6));
3382                 fan5pin = !(regval & (1 << 7));
3383
3384                 pwm3pin = !(regval & (1 << 0));
3385                 pwm4pin = !(regval & (1 << 1));
3386                 pwm5pin = !(regval & (1 << 2));
3387
3388                 fan4min = fan4pin;
3389
3390                 if (data->kind == nct6791 || data->kind == nct6792 ||
3391                     data->kind == nct6793) {
3392                         regval = superio_inb(sioreg, 0x2d);
3393                         fan6pin = (regval & (1 << 1));
3394                         pwm6pin = (regval & (1 << 0));
3395                 } else {        /* NCT6779D */
3396                         fan6pin = false;
3397                         pwm6pin = false;
3398                 }
3399         }
3400
3401         /* fan 1 and 2 (0x03) are always present */
3402         data->has_fan = 0x03 | (fan3pin << 2) | (fan4pin << 3) |
3403                 (fan5pin << 4) | (fan6pin << 5);
3404         data->has_fan_min = 0x03 | (fan3pin << 2) | (fan4min << 3) |
3405                 (fan5pin << 4);
3406         data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) |
3407                 (pwm5pin << 4) | (pwm6pin << 5);
3408 }
3409
3410 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
3411                              int *available, int *mask)
3412 {
3413         int i;
3414         u8 src;
3415
3416         for (i = 0; i < data->pwm_num && *available; i++) {
3417                 int index;
3418
3419                 if (!regp[i])
3420                         continue;
3421                 src = nct6775_read_value(data, regp[i]);
3422                 src &= 0x1f;
3423                 if (!src || (*mask & (1 << src)))
3424                         continue;
3425                 if (src >= data->temp_label_num ||
3426                     !strlen(data->temp_label[src]))
3427                         continue;
3428
3429                 index = __ffs(*available);
3430                 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3431                 *available &= ~(1 << index);
3432                 *mask |= 1 << src;
3433         }
3434 }
3435
3436 static int nct6775_probe(struct platform_device *pdev)
3437 {
3438         struct device *dev = &pdev->dev;
3439         struct nct6775_sio_data *sio_data = dev_get_platdata(dev);
3440         struct nct6775_data *data;
3441         struct resource *res;
3442         int i, s, err = 0;
3443         int src, mask, available;
3444         const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3445         const u16 *reg_temp_mon, *reg_temp_alternate, *reg_temp_crit;
3446         const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL;
3447         int num_reg_temp, num_reg_temp_mon;
3448         u8 cr2a;
3449         struct attribute_group *group;
3450         struct device *hwmon_dev;
3451         int num_attr_groups = 0;
3452
3453         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3454         if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3455                                  DRVNAME))
3456                 return -EBUSY;
3457
3458         data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3459                             GFP_KERNEL);
3460         if (!data)
3461                 return -ENOMEM;
3462
3463         data->kind = sio_data->kind;
3464         data->sioreg = sio_data->sioreg;
3465         data->addr = res->start;
3466         mutex_init(&data->update_lock);
3467         data->name = nct6775_device_names[data->kind];
3468         data->bank = 0xff;              /* Force initial bank selection */
3469         platform_set_drvdata(pdev, data);
3470
3471         switch (data->kind) {
3472         case nct6106:
3473                 data->in_num = 9;
3474                 data->pwm_num = 3;
3475                 data->auto_pwm_num = 4;
3476                 data->temp_fixed_num = 3;
3477                 data->num_temp_alarms = 6;
3478                 data->num_temp_beeps = 6;
3479
3480                 data->fan_from_reg = fan_from_reg13;
3481                 data->fan_from_reg_min = fan_from_reg13;
3482
3483                 data->temp_label = nct6776_temp_label;
3484                 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3485
3486                 data->REG_VBAT = NCT6106_REG_VBAT;
3487                 data->REG_DIODE = NCT6106_REG_DIODE;
3488                 data->DIODE_MASK = NCT6106_DIODE_MASK;
3489                 data->REG_VIN = NCT6106_REG_IN;
3490                 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3491                 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3492                 data->REG_TARGET = NCT6106_REG_TARGET;
3493                 data->REG_FAN = NCT6106_REG_FAN;
3494                 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
3495                 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
3496                 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
3497                 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
3498                 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
3499                 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
3500                 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
3501                 data->REG_PWM[0] = NCT6106_REG_PWM;
3502                 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
3503                 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
3504                 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3505                 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3506                 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3507                 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3508                 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3509                 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
3510                 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
3511                 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
3512                 data->REG_CRITICAL_TEMP_TOLERANCE
3513                   = NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
3514                 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
3515                 data->CRITICAL_PWM_ENABLE_MASK
3516                   = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3517                 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
3518                 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3519                 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3520                 data->REG_TEMP_SEL = NCT6106_REG_TEMP_SEL;
3521                 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3522                 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3523                 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3524                 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3525                 data->REG_ALARM = NCT6106_REG_ALARM;
3526                 data->ALARM_BITS = NCT6106_ALARM_BITS;
3527                 data->REG_BEEP = NCT6106_REG_BEEP;
3528                 data->BEEP_BITS = NCT6106_BEEP_BITS;
3529
3530                 reg_temp = NCT6106_REG_TEMP;
3531                 reg_temp_mon = NCT6106_REG_TEMP_MON;
3532                 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3533                 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON);
3534                 reg_temp_over = NCT6106_REG_TEMP_OVER;
3535                 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3536                 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3537                 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3538                 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3539                 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3540                 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3541
3542                 break;
3543         case nct6775:
3544                 data->in_num = 9;
3545                 data->pwm_num = 3;
3546                 data->auto_pwm_num = 6;
3547                 data->has_fan_div = true;
3548                 data->temp_fixed_num = 3;
3549                 data->num_temp_alarms = 3;
3550                 data->num_temp_beeps = 3;
3551
3552                 data->ALARM_BITS = NCT6775_ALARM_BITS;
3553                 data->BEEP_BITS = NCT6775_BEEP_BITS;
3554
3555                 data->fan_from_reg = fan_from_reg16;
3556                 data->fan_from_reg_min = fan_from_reg8;
3557                 data->target_temp_mask = 0x7f;
3558                 data->tolerance_mask = 0x0f;
3559                 data->speed_tolerance_limit = 15;
3560
3561                 data->temp_label = nct6775_temp_label;
3562                 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
3563
3564                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3565                 data->REG_VBAT = NCT6775_REG_VBAT;
3566                 data->REG_DIODE = NCT6775_REG_DIODE;
3567                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3568                 data->REG_VIN = NCT6775_REG_IN;
3569                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3570                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3571                 data->REG_TARGET = NCT6775_REG_TARGET;
3572                 data->REG_FAN = NCT6775_REG_FAN;
3573                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3574                 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3575                 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3576                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3577                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3578                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3579                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3580                 data->REG_PWM[0] = NCT6775_REG_PWM;
3581                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3582                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3583                 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3584                 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3585                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3586                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3587                 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3588                 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3589                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3590                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3591                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3592                 data->REG_CRITICAL_TEMP_TOLERANCE
3593                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3594                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3595                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3596                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3597                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3598                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3599                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3600                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3601                 data->REG_ALARM = NCT6775_REG_ALARM;
3602                 data->REG_BEEP = NCT6775_REG_BEEP;
3603
3604                 reg_temp = NCT6775_REG_TEMP;
3605                 reg_temp_mon = NCT6775_REG_TEMP_MON;
3606                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3607                 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3608                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3609                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3610                 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3611                 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3612                 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3613
3614                 break;
3615         case nct6776:
3616                 data->in_num = 9;
3617                 data->pwm_num = 3;
3618                 data->auto_pwm_num = 4;
3619                 data->has_fan_div = false;
3620                 data->temp_fixed_num = 3;
3621                 data->num_temp_alarms = 3;
3622                 data->num_temp_beeps = 6;
3623
3624                 data->ALARM_BITS = NCT6776_ALARM_BITS;
3625                 data->BEEP_BITS = NCT6776_BEEP_BITS;
3626
3627                 data->fan_from_reg = fan_from_reg13;
3628                 data->fan_from_reg_min = fan_from_reg13;
3629                 data->target_temp_mask = 0xff;
3630                 data->tolerance_mask = 0x07;
3631                 data->speed_tolerance_limit = 63;
3632
3633                 data->temp_label = nct6776_temp_label;
3634                 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3635
3636                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3637                 data->REG_VBAT = NCT6775_REG_VBAT;
3638                 data->REG_DIODE = NCT6775_REG_DIODE;
3639                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3640                 data->REG_VIN = NCT6775_REG_IN;
3641                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3642                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3643                 data->REG_TARGET = NCT6775_REG_TARGET;
3644                 data->REG_FAN = NCT6775_REG_FAN;
3645                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3646                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3647                 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3648                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3649                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3650                 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3651                 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3652                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3653                 data->REG_PWM[0] = NCT6775_REG_PWM;
3654                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3655                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3656                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3657                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3658                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3659                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3660                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3661                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3662                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3663                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3664                 data->REG_CRITICAL_TEMP_TOLERANCE
3665                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3666                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3667                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3668                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3669                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3670                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3671                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3672                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3673                 data->REG_ALARM = NCT6775_REG_ALARM;
3674                 data->REG_BEEP = NCT6776_REG_BEEP;
3675
3676                 reg_temp = NCT6775_REG_TEMP;
3677                 reg_temp_mon = NCT6775_REG_TEMP_MON;
3678                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3679                 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3680                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3681                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3682                 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3683                 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3684                 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3685
3686                 break;
3687         case nct6779:
3688                 data->in_num = 15;
3689                 data->pwm_num = 5;
3690                 data->auto_pwm_num = 4;
3691                 data->has_fan_div = false;
3692                 data->temp_fixed_num = 6;
3693                 data->num_temp_alarms = 2;
3694                 data->num_temp_beeps = 2;
3695
3696                 data->ALARM_BITS = NCT6779_ALARM_BITS;
3697                 data->BEEP_BITS = NCT6779_BEEP_BITS;
3698
3699                 data->fan_from_reg = fan_from_reg13;
3700                 data->fan_from_reg_min = fan_from_reg13;
3701                 data->target_temp_mask = 0xff;
3702                 data->tolerance_mask = 0x07;
3703                 data->speed_tolerance_limit = 63;
3704
3705                 data->temp_label = nct6779_temp_label;
3706                 data->temp_label_num = NCT6779_NUM_LABELS;
3707
3708                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3709                 data->REG_VBAT = NCT6775_REG_VBAT;
3710                 data->REG_DIODE = NCT6775_REG_DIODE;
3711                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3712                 data->REG_VIN = NCT6779_REG_IN;
3713                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3714                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3715                 data->REG_TARGET = NCT6775_REG_TARGET;
3716                 data->REG_FAN = NCT6779_REG_FAN;
3717                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3718                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3719                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3720                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3721                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3722                 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3723                 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3724                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3725                 data->REG_PWM[0] = NCT6775_REG_PWM;
3726                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3727                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3728                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3729                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3730                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3731                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3732                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3733                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3734                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3735                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3736                 data->REG_CRITICAL_TEMP_TOLERANCE
3737                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3738                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3739                 data->CRITICAL_PWM_ENABLE_MASK
3740                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3741                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3742                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3743                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3744                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3745                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3746                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3747                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3748                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3749                 data->REG_ALARM = NCT6779_REG_ALARM;
3750                 data->REG_BEEP = NCT6776_REG_BEEP;
3751
3752                 reg_temp = NCT6779_REG_TEMP;
3753                 reg_temp_mon = NCT6779_REG_TEMP_MON;
3754                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3755                 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3756                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3757                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3758                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3759                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3760                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3761
3762                 break;
3763         case nct6791:
3764         case nct6792:
3765         case nct6793:
3766                 data->in_num = 15;
3767                 data->pwm_num = 6;
3768                 data->auto_pwm_num = 4;
3769                 data->has_fan_div = false;
3770                 data->temp_fixed_num = 6;
3771                 data->num_temp_alarms = 2;
3772                 data->num_temp_beeps = 2;
3773
3774                 data->ALARM_BITS = NCT6791_ALARM_BITS;
3775                 data->BEEP_BITS = NCT6779_BEEP_BITS;
3776
3777                 data->fan_from_reg = fan_from_reg13;
3778                 data->fan_from_reg_min = fan_from_reg13;
3779                 data->target_temp_mask = 0xff;
3780                 data->tolerance_mask = 0x07;
3781                 data->speed_tolerance_limit = 63;
3782
3783                 switch (data->kind) {
3784                 default:
3785                 case nct6791:
3786                         data->temp_label = nct6779_temp_label;
3787                         break;
3788                 case nct6792:
3789                         data->temp_label = nct6792_temp_label;
3790                         break;
3791                 case nct6793:
3792                         data->temp_label = nct6793_temp_label;
3793                         break;
3794                 }
3795                 data->temp_label_num = NCT6791_NUM_LABELS;
3796
3797                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3798                 data->REG_VBAT = NCT6775_REG_VBAT;
3799                 data->REG_DIODE = NCT6775_REG_DIODE;
3800                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3801                 data->REG_VIN = NCT6779_REG_IN;
3802                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3803                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3804                 data->REG_TARGET = NCT6775_REG_TARGET;
3805                 data->REG_FAN = NCT6779_REG_FAN;
3806                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3807                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3808                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3809                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3810                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3811                 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3812                 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3813                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3814                 data->REG_PWM[0] = NCT6775_REG_PWM;
3815                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3816                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3817                 data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP;
3818                 data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE;
3819                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3820                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3821                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3822                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3823                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3824                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3825                 data->REG_CRITICAL_TEMP_TOLERANCE
3826                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3827                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3828                 data->CRITICAL_PWM_ENABLE_MASK
3829                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3830                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3831                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3832                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3833                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3834                 data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL;
3835                 data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP;
3836                 data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL;
3837                 data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE;
3838                 data->REG_ALARM = NCT6791_REG_ALARM;
3839                 if (data->kind == nct6791)
3840                         data->REG_BEEP = NCT6776_REG_BEEP;
3841                 else
3842                         data->REG_BEEP = NCT6792_REG_BEEP;
3843
3844                 reg_temp = NCT6779_REG_TEMP;
3845                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3846                 if (data->kind == nct6791) {
3847                         reg_temp_mon = NCT6779_REG_TEMP_MON;
3848                         num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3849                 } else {
3850                         reg_temp_mon = NCT6792_REG_TEMP_MON;
3851                         num_reg_temp_mon = ARRAY_SIZE(NCT6792_REG_TEMP_MON);
3852                 }
3853                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3854                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3855                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3856                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3857                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3858
3859                 break;
3860         default:
3861                 return -ENODEV;
3862         }
3863         data->have_in = (1 << data->in_num) - 1;
3864         data->have_temp = 0;
3865
3866         /*
3867          * On some boards, not all available temperature sources are monitored,
3868          * even though some of the monitoring registers are unused.
3869          * Get list of unused monitoring registers, then detect if any fan
3870          * controls are configured to use unmonitored temperature sources.
3871          * If so, assign the unmonitored temperature sources to available
3872          * monitoring registers.
3873          */
3874         mask = 0;
3875         available = 0;
3876         for (i = 0; i < num_reg_temp; i++) {
3877                 if (reg_temp[i] == 0)
3878                         continue;
3879
3880                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3881                 if (!src || (mask & (1 << src)))
3882                         available |= 1 << i;
3883
3884                 mask |= 1 << src;
3885         }
3886
3887         /*
3888          * Now find unmonitored temperature registers and enable monitoring
3889          * if additional monitoring registers are available.
3890          */
3891         add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
3892         add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
3893
3894         mask = 0;
3895         s = NUM_TEMP_FIXED;     /* First dynamic temperature attribute */
3896         for (i = 0; i < num_reg_temp; i++) {
3897                 if (reg_temp[i] == 0)
3898                         continue;
3899
3900                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3901                 if (!src || (mask & (1 << src)))
3902                         continue;
3903
3904                 if (src >= data->temp_label_num ||
3905                     !strlen(data->temp_label[src])) {
3906                         dev_info(dev,
3907                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3908                                  src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
3909                         continue;
3910                 }
3911
3912                 mask |= 1 << src;
3913
3914                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3915                 if (src <= data->temp_fixed_num) {
3916                         data->have_temp |= 1 << (src - 1);
3917                         data->have_temp_fixed |= 1 << (src - 1);
3918                         data->reg_temp[0][src - 1] = reg_temp[i];
3919                         data->reg_temp[1][src - 1] = reg_temp_over[i];
3920                         data->reg_temp[2][src - 1] = reg_temp_hyst[i];
3921                         if (reg_temp_crit_h && reg_temp_crit_h[i])
3922                                 data->reg_temp[3][src - 1] = reg_temp_crit_h[i];
3923                         else if (reg_temp_crit[src - 1])
3924                                 data->reg_temp[3][src - 1]
3925                                   = reg_temp_crit[src - 1];
3926                         if (reg_temp_crit_l && reg_temp_crit_l[i])
3927                                 data->reg_temp[4][src - 1] = reg_temp_crit_l[i];
3928                         data->reg_temp_config[src - 1] = reg_temp_config[i];
3929                         data->temp_src[src - 1] = src;
3930                         continue;
3931                 }
3932
3933                 if (s >= NUM_TEMP)
3934                         continue;
3935
3936                 /* Use dynamic index for other sources */
3937                 data->have_temp |= 1 << s;
3938                 data->reg_temp[0][s] = reg_temp[i];
3939                 data->reg_temp[1][s] = reg_temp_over[i];
3940                 data->reg_temp[2][s] = reg_temp_hyst[i];
3941                 data->reg_temp_config[s] = reg_temp_config[i];
3942                 if (reg_temp_crit_h && reg_temp_crit_h[i])
3943                         data->reg_temp[3][s] = reg_temp_crit_h[i];
3944                 else if (reg_temp_crit[src - 1])
3945                         data->reg_temp[3][s] = reg_temp_crit[src - 1];
3946                 if (reg_temp_crit_l && reg_temp_crit_l[i])
3947                         data->reg_temp[4][s] = reg_temp_crit_l[i];
3948
3949                 data->temp_src[s] = src;
3950                 s++;
3951         }
3952
3953         /*
3954          * Repeat with temperatures used for fan control.
3955          * This set of registers does not support limits.
3956          */
3957         for (i = 0; i < num_reg_temp_mon; i++) {
3958                 if (reg_temp_mon[i] == 0)
3959                         continue;
3960
3961                 src = nct6775_read_value(data, data->REG_TEMP_SEL[i]) & 0x1f;
3962                 if (!src || (mask & (1 << src)))
3963                         continue;
3964
3965                 if (src >= data->temp_label_num ||
3966                     !strlen(data->temp_label[src])) {
3967                         dev_info(dev,
3968                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3969                                  src, i, data->REG_TEMP_SEL[i],
3970                                  reg_temp_mon[i]);
3971                         continue;
3972                 }
3973
3974                 mask |= 1 << src;
3975
3976                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3977                 if (src <= data->temp_fixed_num) {
3978                         if (data->have_temp & (1 << (src - 1)))
3979                                 continue;
3980                         data->have_temp |= 1 << (src - 1);
3981                         data->have_temp_fixed |= 1 << (src - 1);
3982                         data->reg_temp[0][src - 1] = reg_temp_mon[i];
3983                         data->temp_src[src - 1] = src;
3984                         continue;
3985                 }
3986
3987                 if (s >= NUM_TEMP)
3988                         continue;
3989
3990                 /* Use dynamic index for other sources */
3991                 data->have_temp |= 1 << s;
3992                 data->reg_temp[0][s] = reg_temp_mon[i];
3993                 data->temp_src[s] = src;
3994                 s++;
3995         }
3996
3997 #ifdef USE_ALTERNATE
3998         /*
3999          * Go through the list of alternate temp registers and enable
4000          * if possible.
4001          * The temperature is already monitored if the respective bit in <mask>
4002          * is set.
4003          */
4004         for (i = 0; i < data->temp_label_num - 1; i++) {
4005                 if (!reg_temp_alternate[i])
4006                         continue;
4007                 if (mask & (1 << (i + 1)))
4008                         continue;
4009                 if (i < data->temp_fixed_num) {
4010                         if (data->have_temp & (1 << i))
4011                                 continue;
4012                         data->have_temp |= 1 << i;
4013                         data->have_temp_fixed |= 1 << i;
4014                         data->reg_temp[0][i] = reg_temp_alternate[i];
4015                         if (i < num_reg_temp) {
4016                                 data->reg_temp[1][i] = reg_temp_over[i];
4017                                 data->reg_temp[2][i] = reg_temp_hyst[i];
4018                         }
4019                         data->temp_src[i] = i + 1;
4020                         continue;
4021                 }
4022
4023                 if (s >= NUM_TEMP)      /* Abort if no more space */
4024                         break;
4025
4026                 data->have_temp |= 1 << s;
4027                 data->reg_temp[0][s] = reg_temp_alternate[i];
4028                 data->temp_src[s] = i + 1;
4029                 s++;
4030         }
4031 #endif /* USE_ALTERNATE */
4032
4033         /* Initialize the chip */
4034         nct6775_init_device(data);
4035
4036         err = superio_enter(sio_data->sioreg);
4037         if (err)
4038                 return err;
4039
4040         cr2a = superio_inb(sio_data->sioreg, 0x2a);
4041         switch (data->kind) {
4042         case nct6775:
4043                 data->have_vid = (cr2a & 0x40);
4044                 break;
4045         case nct6776:
4046                 data->have_vid = (cr2a & 0x60) == 0x40;
4047                 break;
4048         case nct6106:
4049         case nct6779:
4050         case nct6791:
4051         case nct6792:
4052         case nct6793:
4053                 break;
4054         }
4055
4056         /*
4057          * Read VID value
4058          * We can get the VID input values directly at logical device D 0xe3.
4059          */
4060         if (data->have_vid) {
4061                 superio_select(sio_data->sioreg, NCT6775_LD_VID);
4062                 data->vid = superio_inb(sio_data->sioreg, 0xe3);
4063                 data->vrm = vid_which_vrm();
4064         }
4065
4066         if (fan_debounce) {
4067                 u8 tmp;
4068
4069                 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
4070                 tmp = superio_inb(sio_data->sioreg,
4071                                   NCT6775_REG_CR_FAN_DEBOUNCE);
4072                 switch (data->kind) {
4073                 case nct6106:
4074                         tmp |= 0xe0;
4075                         break;
4076                 case nct6775:
4077                         tmp |= 0x1e;
4078                         break;
4079                 case nct6776:
4080                 case nct6779:
4081                         tmp |= 0x3e;
4082                         break;
4083                 case nct6791:
4084                 case nct6792:
4085                 case nct6793:
4086                         tmp |= 0x7e;
4087                         break;
4088                 }
4089                 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
4090                              tmp);
4091                 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
4092                          data->name);
4093         }
4094
4095         nct6775_check_fan_inputs(data);
4096
4097         superio_exit(sio_data->sioreg);
4098
4099         /* Read fan clock dividers immediately */
4100         nct6775_init_fan_common(dev, data);
4101
4102         /* Register sysfs hooks */
4103         group = nct6775_create_attr_group(dev, &nct6775_pwm_template_group,
4104                                           data->pwm_num);
4105         if (IS_ERR(group))
4106                 return PTR_ERR(group);
4107
4108         data->groups[num_attr_groups++] = group;
4109
4110         group = nct6775_create_attr_group(dev, &nct6775_in_template_group,
4111                                           fls(data->have_in));
4112         if (IS_ERR(group))
4113                 return PTR_ERR(group);
4114
4115         data->groups[num_attr_groups++] = group;
4116
4117         group = nct6775_create_attr_group(dev, &nct6775_fan_template_group,
4118                                           fls(data->has_fan));
4119         if (IS_ERR(group))
4120                 return PTR_ERR(group);
4121
4122         data->groups[num_attr_groups++] = group;
4123
4124         group = nct6775_create_attr_group(dev, &nct6775_temp_template_group,
4125                                           fls(data->have_temp));
4126         if (IS_ERR(group))
4127                 return PTR_ERR(group);
4128
4129         data->groups[num_attr_groups++] = group;
4130         data->groups[num_attr_groups++] = &nct6775_group_other;
4131
4132 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4133         err = sysfs_create_groups(&dev->kobj, data->groups);
4134         if (err < 0)
4135                 return err;
4136         hwmon_dev = hwmon_device_register(dev);
4137         if (IS_ERR(hwmon_dev)) {
4138                 sysfs_remove_groups(&dev->kobj, data->groups);
4139                 return PTR_ERR(hwmon_dev);
4140         }
4141         data->hwmon_dev = hwmon_dev;
4142 #else
4143         hwmon_dev = devm_hwmon_device_register_with_groups(dev, data->name,
4144                                                            data, data->groups);
4145 #endif
4146         return PTR_ERR_OR_ZERO(hwmon_dev);
4147 }
4148
4149 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4150 static int nct6775_remove(struct platform_device *pdev)
4151 {
4152         struct nct6775_data *data = platform_get_drvdata(pdev);
4153
4154         hwmon_device_unregister(data->hwmon_dev);
4155         sysfs_remove_groups(&pdev->dev.kobj, data->groups);
4156         return 0;
4157 }
4158 #endif
4159
4160 static void nct6791_enable_io_mapping(int sioaddr)
4161 {
4162         int val;
4163
4164         val = superio_inb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE);
4165         if (val & 0x10) {
4166                 pr_info("Enabling hardware monitor logical device mappings.\n");
4167                 superio_outb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE,
4168                              val & ~0x10);
4169         }
4170 }
4171
4172 static int __maybe_unused nct6775_suspend(struct device *dev)
4173 {
4174         struct nct6775_data *data = nct6775_update_device(dev);
4175
4176         mutex_lock(&data->update_lock);
4177         data->vbat = nct6775_read_value(data, data->REG_VBAT);
4178         if (data->kind == nct6775) {
4179                 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
4180                 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
4181         }
4182         mutex_unlock(&data->update_lock);
4183
4184         return 0;
4185 }
4186
4187 static int __maybe_unused nct6775_resume(struct device *dev)
4188 {
4189         struct nct6775_data *data = dev_get_drvdata(dev);
4190         int sioreg = data->sioreg;
4191         int i, j, err = 0;
4192         u8 reg;
4193
4194         mutex_lock(&data->update_lock);
4195         data->bank = 0xff;              /* Force initial bank selection */
4196
4197         err = superio_enter(sioreg);
4198         if (err)
4199                 goto abort;
4200
4201         superio_select(sioreg, NCT6775_LD_HWM);
4202         reg = superio_inb(sioreg, SIO_REG_ENABLE);
4203         if (reg != data->sio_reg_enable)
4204                 superio_outb(sioreg, SIO_REG_ENABLE, data->sio_reg_enable);
4205
4206         if (data->kind == nct6791 || data->kind == nct6792 ||
4207             data->kind == nct6793)
4208                 nct6791_enable_io_mapping(sioreg);
4209
4210         superio_exit(sioreg);
4211
4212         /* Restore limits */
4213         for (i = 0; i < data->in_num; i++) {
4214                 if (!(data->have_in & (1 << i)))
4215                         continue;
4216
4217                 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
4218                                     data->in[i][1]);
4219                 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
4220                                     data->in[i][2]);
4221         }
4222
4223         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
4224                 if (!(data->has_fan_min & (1 << i)))
4225                         continue;
4226
4227                 nct6775_write_value(data, data->REG_FAN_MIN[i],
4228                                     data->fan_min[i]);
4229         }
4230
4231         for (i = 0; i < NUM_TEMP; i++) {
4232                 if (!(data->have_temp & (1 << i)))
4233                         continue;
4234
4235                 for (j = 1; j < ARRAY_SIZE(data->reg_temp); j++)
4236                         if (data->reg_temp[j][i])
4237                                 nct6775_write_temp(data, data->reg_temp[j][i],
4238                                                    data->temp[j][i]);
4239         }
4240
4241         /* Restore other settings */
4242         nct6775_write_value(data, data->REG_VBAT, data->vbat);
4243         if (data->kind == nct6775) {
4244                 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
4245                 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
4246         }
4247
4248 abort:
4249         /* Force re-reading all values */
4250         data->valid = false;
4251         mutex_unlock(&data->update_lock);
4252
4253         return err;
4254 }
4255
4256 static SIMPLE_DEV_PM_OPS(nct6775_dev_pm_ops, nct6775_suspend, nct6775_resume);
4257
4258 static struct platform_driver nct6775_driver = {
4259         .driver = {
4260                 .owner  = THIS_MODULE,
4261                 .name   = DRVNAME,
4262                 .pm     = &nct6775_dev_pm_ops,
4263         },
4264         .probe          = nct6775_probe,
4265 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4266         .remove         = nct6775_remove,
4267 #endif
4268 };
4269
4270 /* nct6775_find() looks for a '627 in the Super-I/O config space */
4271 static int __init nct6775_find(int sioaddr, struct nct6775_sio_data *sio_data)
4272 {
4273         u16 val;
4274         int err;
4275         int addr;
4276
4277         err = superio_enter(sioaddr);
4278         if (err)
4279                 return err;
4280
4281         val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8) |
4282                 superio_inb(sioaddr, SIO_REG_DEVID + 1);
4283         if (force_id && val != 0xffff)
4284                 val = force_id;
4285
4286         switch (val & SIO_ID_MASK) {
4287         case SIO_NCT6106_ID:
4288                 sio_data->kind = nct6106;
4289                 break;
4290         case SIO_NCT6775_ID:
4291                 sio_data->kind = nct6775;
4292                 break;
4293         case SIO_NCT6776_ID:
4294                 sio_data->kind = nct6776;
4295                 break;
4296         case SIO_NCT6779_ID:
4297                 sio_data->kind = nct6779;
4298                 break;
4299         case SIO_NCT6791_ID:
4300                 sio_data->kind = nct6791;
4301                 break;
4302         case SIO_NCT6792_ID:
4303                 sio_data->kind = nct6792;
4304                 break;
4305         case SIO_NCT6793_ID:
4306                 sio_data->kind = nct6793;
4307                 break;
4308         default:
4309                 if (val != 0xffff)
4310                         pr_debug("unsupported chip ID: 0x%04x\n", val);
4311                 superio_exit(sioaddr);
4312                 return -ENODEV;
4313         }
4314
4315         /* We have a known chip, find the HWM I/O address */
4316         superio_select(sioaddr, NCT6775_LD_HWM);
4317         val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
4318             | superio_inb(sioaddr, SIO_REG_ADDR + 1);
4319         addr = val & IOREGION_ALIGNMENT;
4320         if (addr == 0) {
4321                 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
4322                 superio_exit(sioaddr);
4323                 return -ENODEV;
4324         }
4325
4326         /* Activate logical device if needed */
4327         val = superio_inb(sioaddr, SIO_REG_ENABLE);
4328         if (!(val & 0x01)) {
4329                 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
4330                 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
4331         }
4332
4333         if (sio_data->kind == nct6791 || sio_data->kind == nct6792 ||
4334             sio_data->kind == nct6793)
4335                 nct6791_enable_io_mapping(sioaddr);
4336
4337         superio_exit(sioaddr);
4338         pr_info("Found %s or compatible chip at %#x:%#x\n",
4339                 nct6775_sio_names[sio_data->kind], sioaddr, addr);
4340         sio_data->sioreg = sioaddr;
4341
4342         return addr;
4343 }
4344
4345 /*
4346  * when Super-I/O functions move to a separate file, the Super-I/O
4347  * bus will manage the lifetime of the device and this module will only keep
4348  * track of the nct6775 driver. But since we use platform_device_alloc(), we
4349  * must keep track of the device
4350  */
4351 static struct platform_device *pdev[2];
4352
4353 static int __init sensors_nct6775_init(void)
4354 {
4355         int i, err;
4356         bool found = false;
4357         int address;
4358         struct resource res;
4359         struct nct6775_sio_data sio_data;
4360         int sioaddr[2] = { 0x2e, 0x4e };
4361
4362         err = platform_driver_register(&nct6775_driver);
4363         if (err)
4364                 return err;
4365
4366         /*
4367          * initialize sio_data->kind and sio_data->sioreg.
4368          *
4369          * when Super-I/O functions move to a separate file, the Super-I/O
4370          * driver will probe 0x2e and 0x4e and auto-detect the presence of a
4371          * nct6775 hardware monitor, and call probe()
4372          */
4373         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4374                 address = nct6775_find(sioaddr[i], &sio_data);
4375                 if (address <= 0)
4376                         continue;
4377
4378                 found = true;
4379
4380                 pdev[i] = platform_device_alloc(DRVNAME, address);
4381                 if (!pdev[i]) {
4382                         err = -ENOMEM;
4383                         goto exit_device_unregister;
4384                 }
4385
4386                 err = platform_device_add_data(pdev[i], &sio_data,
4387                                                sizeof(struct nct6775_sio_data));
4388                 if (err)
4389                         goto exit_device_put;
4390
4391                 memset(&res, 0, sizeof(res));
4392                 res.name = DRVNAME;
4393                 res.start = address + IOREGION_OFFSET;
4394                 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
4395                 res.flags = IORESOURCE_IO;
4396
4397                 err = acpi_check_resource_conflict(&res);
4398                 if (err) {
4399                         platform_device_put(pdev[i]);
4400                         pdev[i] = NULL;
4401                         continue;
4402                 }
4403
4404                 err = platform_device_add_resources(pdev[i], &res, 1);
4405                 if (err)
4406                         goto exit_device_put;
4407
4408                 /* platform_device_add calls probe() */
4409                 err = platform_device_add(pdev[i]);
4410                 if (err)
4411                         goto exit_device_put;
4412         }
4413         if (!found) {
4414                 err = -ENODEV;
4415                 goto exit_unregister;
4416         }
4417
4418         return 0;
4419
4420 exit_device_put:
4421         platform_device_put(pdev[i]);
4422 exit_device_unregister:
4423         while (--i >= 0) {
4424                 if (pdev[i])
4425                         platform_device_unregister(pdev[i]);
4426         }
4427 exit_unregister:
4428         platform_driver_unregister(&nct6775_driver);
4429         return err;
4430 }
4431
4432 static void __exit sensors_nct6775_exit(void)
4433 {
4434         int i;
4435
4436         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4437                 if (pdev[i])
4438                         platform_device_unregister(pdev[i]);
4439         }
4440         platform_driver_unregister(&nct6775_driver);
4441 }
4442
4443 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4444 MODULE_DESCRIPTION("Driver for NCT6775F and compatible chips");
4445 MODULE_LICENSE("GPL");
4446
4447 module_init(sensors_nct6775_init);
4448 module_exit(sensors_nct6775_exit);