git.sur5r.net Git - groeck-nct6775/blob - nct6775.c

   1 /*
   2  * nct6775 - Driver for the hardware monitoring functionality of
   3  *             Nuvoton NCT677x Super-I/O chips
   4  *
   5  * Copyright (C) 2012  Guenter Roeck <linux@roeck-us.net>
   6  *
   7  * Derived from w83627ehf driver
   8  * Copyright (C) 2005-2012  Jean Delvare <jdelvare@suse.de>
   9  * Copyright (C) 2006  Yuan Mu (Winbond),
  10  *                     Rudolf Marek <r.marek@assembler.cz>
  11  *                     David Hubbard <david.c.hubbard@gmail.com>
  12  *                     Daniel J Blueman <daniel.blueman@gmail.com>
  13  * Copyright (C) 2010  Sheng-Yuan Huang (Nuvoton) (PS00)
  14  *
  15  * Shamelessly ripped from the w83627hf driver
  16  * Copyright (C) 2003  Mark Studebaker
  17  *
  18  * This program is free software; you can redistribute it and/or modify
  19  * it under the terms of the GNU General Public License as published by
  20  * the Free Software Foundation; either version 2 of the License, or
  21  * (at your option) any later version.
  22  *
  23  * This program is distributed in the hope that it will be useful,
  24  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26  * GNU General Public License for more details.
  27  *
  28  * You should have received a copy of the GNU General Public License
  29  * along with this program; if not, write to the Free Software
  30  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  31  *
  32  *
  33  * Supports the following chips:
  34  *
  35  * Chip        #vin    #fan    #pwm    #temp  chip IDs       man ID
  36  * nct6106d     9      3       3       6+3    0xc450 0xc1    0x5ca3
  37  * nct6775f     9      4       3       6+3    0xb470 0xc1    0x5ca3
  38  * nct6776f     9      5       3       6+3    0xc330 0xc1    0x5ca3
  39  * nct6779d    15      5       5       2+6    0xc560 0xc1    0x5ca3
  40  * nct6791d    15      6       6       2+6    0xc800 0xc1    0x5ca3
  41  * nct6792d    15      6       6       2+6    0xc911 0xc1    0x5ca3
  42  *
  43  * #temp lists the number of monitored temperature sources (first value) plus
  44  * the number of directly connectable temperature sensors (second value).
  45  */
  46
  47 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  48
  49 #include <linux/module.h>
  50 #include <linux/init.h>
  51 #include <linux/slab.h>
  52 #include <linux/jiffies.h>
  53 #include <linux/platform_device.h>
  54 #include <linux/hwmon.h>
  55 #include <linux/hwmon-sysfs.h>
  56 #include <linux/hwmon-vid.h>
  57 #include <linux/err.h>
  58 #include <linux/mutex.h>
  59 #include <linux/acpi.h>
  60 #include <linux/io.h>
  61 #include "lm75.h"
  62 #include "compat.h"
  63
  64 #define USE_ALTERNATE
  65
  66 enum kinds { nct6106, nct6775, nct6776, nct6779, nct6791, nct6792 };
  67
  68 /* used to set data->name = nct6775_device_names[data->sio_kind] */
  69 static const char * const nct6775_device_names[] = {
  70         "nct6106",
  71         "nct6775",
  72         "nct6776",
  73         "nct6779",
  74         "nct6791",
  75         "nct6792",
  76 };
  77
  78 static unsigned short force_id;
  79 module_param(force_id, ushort, 0);
  80 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  81
  82 static unsigned short fan_debounce;
  83 module_param(fan_debounce, ushort, 0);
  84 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
  85
  86 #define DRVNAME "nct6775"
  87
  88 /*
  89  * Super-I/O constants and functions
  90  */
  91
  92 #define NCT6775_LD_ACPI         0x0a
  93 #define NCT6775_LD_HWM          0x0b
  94 #define NCT6775_LD_VID          0x0d
  95
  96 #define SIO_REG_LDSEL           0x07    /* Logical device select */
  97 #define SIO_REG_DEVID           0x20    /* Device ID (2 bytes) */
  98 #define SIO_REG_ENABLE          0x30    /* Logical device enable */
  99 #define SIO_REG_ADDR            0x60    /* Logical device address (2 bytes) */
 100
 101 #define SIO_NCT6106_ID          0xc450
 102 #define SIO_NCT6775_ID          0xb470
 103 #define SIO_NCT6776_ID          0xc330
 104 #define SIO_NCT6779_ID          0xc560
 105 #define SIO_NCT6791_ID          0xc800
 106 #define SIO_NCT6792_ID          0xc910
 107 #define SIO_ID_MASK             0xFFF0
 108
 109 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
 110
 111 static inline void
 112 superio_outb(int ioreg, int reg, int val)
 113 {
 114         outb(reg, ioreg);
 115         outb(val, ioreg + 1);
 116 }
 117
 118 static inline int
 119 superio_inb(int ioreg, int reg)
 120 {
 121         outb(reg, ioreg);
 122         return inb(ioreg + 1);
 123 }
 124
 125 static inline void
 126 superio_select(int ioreg, int ld)
 127 {
 128         outb(SIO_REG_LDSEL, ioreg);
 129         outb(ld, ioreg + 1);
 130 }
 131
 132 static inline int
 133 superio_enter(int ioreg)
 134 {
 135         /*
 136          * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
 137          */
 138         if (!request_muxed_region(ioreg, 2, DRVNAME))
 139                 return -EBUSY;
 140
 141         outb(0x87, ioreg);
 142         outb(0x87, ioreg);
 143
 144         return 0;
 145 }
 146
 147 static inline void
 148 superio_exit(int ioreg)
 149 {
 150         outb(0xaa, ioreg);
 151         outb(0x02, ioreg);
 152         outb(0x02, ioreg + 1);
 153         release_region(ioreg, 2);
 154 }
 155
 156 /*
 157  * ISA constants
 158  */
 159
 160 #define IOREGION_ALIGNMENT      (~7)
 161 #define IOREGION_OFFSET         5
 162 #define IOREGION_LENGTH         2
 163 #define ADDR_REG_OFFSET         0
 164 #define DATA_REG_OFFSET         1
 165
 166 #define NCT6775_REG_BANK        0x4E
 167 #define NCT6775_REG_CONFIG      0x40
 168
 169 /*
 170  * Not currently used:
 171  * REG_MAN_ID has the value 0x5ca3 for all supported chips.
 172  * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
 173  * REG_MAN_ID is at port 0x4f
 174  * REG_CHIP_ID is at port 0x58
 175  */
 176
 177 #define NUM_TEMP        10      /* Max number of temp attribute sets w/ limits*/
 178 #define NUM_TEMP_FIXED  6       /* Max number of fixed temp attribute sets */
 179
 180 #define NUM_REG_ALARM   7       /* Max number of alarm registers */
 181 #define NUM_REG_BEEP    5       /* Max number of beep registers */
 182
 183 #define NUM_FAN         6
 184
 185 /* Common and NCT6775 specific data */
 186
 187 /* Voltage min/max registers for nr=7..14 are in bank 5 */
 188
 189 static const u16 NCT6775_REG_IN_MAX[] = {
 190         0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
 191         0x55c, 0x55e, 0x560, 0x562 };
 192 static const u16 NCT6775_REG_IN_MIN[] = {
 193         0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
 194         0x55d, 0x55f, 0x561, 0x563 };
 195 static const u16 NCT6775_REG_IN[] = {
 196         0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
 197 };
 198
 199 #define NCT6775_REG_VBAT                0x5D
 200 #define NCT6775_REG_DIODE               0x5E
 201 #define NCT6775_DIODE_MASK              0x02
 202
 203 #define NCT6775_REG_FANDIV1             0x506
 204 #define NCT6775_REG_FANDIV2             0x507
 205
 206 #define NCT6775_REG_CR_FAN_DEBOUNCE     0xf0
 207
 208 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
 209
 210 /* 0..15 voltages, 16..23 fans, 24..29 temperatures, 30..31 intrusion */
 211
 212 static const s8 NCT6775_ALARM_BITS[] = {
 213         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 214         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 215         -1,                             /* unused */
 216         6, 7, 11, -1, -1,               /* fan1..fan5 */
 217         -1, -1, -1,                     /* unused */
 218         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 219         12, -1 };                       /* intrusion0, intrusion1 */
 220
 221 #define FAN_ALARM_BASE          16
 222 #define TEMP_ALARM_BASE         24
 223 #define INTRUSION_ALARM_BASE    30
 224
 225 static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e };
 226
 227 /*
 228  * 0..14 voltages, 15 global beep enable, 16..23 fans, 24..29 temperatures,
 229  * 30..31 intrusion
 230  */
 231 static const s8 NCT6775_BEEP_BITS[] = {
 232         0, 1, 2, 3, 8, 9, 10, 16,       /* in0.. in7 */
 233         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 234         21,                             /* global beep enable */
 235         6, 7, 11, 28, -1,               /* fan1..fan5 */
 236         -1, -1, -1,                     /* unused */
 237         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 238         12, -1 };                       /* intrusion0, intrusion1 */
 239
 240 #define BEEP_ENABLE_BASE                15
 241
 242 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
 243 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
 244
 245 /* DC or PWM output fan configuration */
 246 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
 247 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
 248
 249 /* Advanced Fan control, some values are common for all fans */
 250
 251 static const u16 NCT6775_REG_TARGET[] = {
 252         0x101, 0x201, 0x301, 0x801, 0x901, 0xa01 };
 253 static const u16 NCT6775_REG_FAN_MODE[] = {
 254         0x102, 0x202, 0x302, 0x802, 0x902, 0xa02 };
 255 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
 256         0x103, 0x203, 0x303, 0x803, 0x903, 0xa03 };
 257 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
 258         0x104, 0x204, 0x304, 0x804, 0x904, 0xa04 };
 259 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
 260         0x105, 0x205, 0x305, 0x805, 0x905, 0xa05 };
 261 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = {
 262         0x106, 0x206, 0x306, 0x806, 0x906, 0xa06 };
 263 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
 264 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
 265
 266 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
 267         0x107, 0x207, 0x307, 0x807, 0x907, 0xa07 };
 268 static const u16 NCT6775_REG_PWM[] = {
 269         0x109, 0x209, 0x309, 0x809, 0x909, 0xa09 };
 270 static const u16 NCT6775_REG_PWM_READ[] = {
 271         0x01, 0x03, 0x11, 0x13, 0x15, 0xa09 };
 272
 273 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
 274 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
 275 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
 276 static const u16 NCT6775_FAN_PULSE_SHIFT[] = { 0, 0, 0, 0, 0, 0 };
 277
 278 static const u16 NCT6775_REG_TEMP[] = {
 279         0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
 280
 281 static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77 };
 282
 283 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 284         0, 0x152, 0x252, 0x628, 0x629, 0x62A };
 285 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 286         0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
 287 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 288         0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
 289
 290 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 291         0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
 292
 293 static const u16 NCT6775_REG_TEMP_SEL[] = {
 294         0x100, 0x200, 0x300, 0x800, 0x900, 0xa00 };
 295
 296 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
 297         0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 };
 298 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
 299         0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a };
 300 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
 301         0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b };
 302 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
 303         0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c };
 304 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
 305         0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d };
 306
 307 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
 308
 309 static const u16 NCT6775_REG_AUTO_TEMP[] = {
 310         0x121, 0x221, 0x321, 0x821, 0x921, 0xa21 };
 311 static const u16 NCT6775_REG_AUTO_PWM[] = {
 312         0x127, 0x227, 0x327, 0x827, 0x927, 0xa27 };
 313
 314 #define NCT6775_AUTO_TEMP(data, nr, p)  ((data)->REG_AUTO_TEMP[nr] + (p))
 315 #define NCT6775_AUTO_PWM(data, nr, p)   ((data)->REG_AUTO_PWM[nr] + (p))
 316
 317 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
 318
 319 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
 320         0x135, 0x235, 0x335, 0x835, 0x935, 0xa35 };
 321 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
 322         0x138, 0x238, 0x338, 0x838, 0x938, 0xa38 };
 323
 324 static const char *const nct6775_temp_label[] = {
 325         "",
 326         "SYSTIN",
 327         "CPUTIN",
 328         "AUXTIN",
 329         "AMD SB-TSI",
 330         "PECI Agent 0",
 331         "PECI Agent 1",
 332         "PECI Agent 2",
 333         "PECI Agent 3",
 334         "PECI Agent 4",
 335         "PECI Agent 5",
 336         "PECI Agent 6",
 337         "PECI Agent 7",
 338         "PCH_CHIP_CPU_MAX_TEMP",
 339         "PCH_CHIP_TEMP",
 340         "PCH_CPU_TEMP",
 341         "PCH_MCH_TEMP",
 342         "PCH_DIM0_TEMP",
 343         "PCH_DIM1_TEMP",
 344         "PCH_DIM2_TEMP",
 345         "PCH_DIM3_TEMP"
 346 };
 347
 348 static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
 349         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
 350
 351 static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
 352         = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
 353             0xa07 };
 354
 355 /* NCT6776 specific data */
 356
 357 static const s8 NCT6776_ALARM_BITS[] = {
 358         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 359         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 360         -1,                             /* unused */
 361         6, 7, 11, 10, 23,               /* fan1..fan5 */
 362         -1, -1, -1,                     /* unused */
 363         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 364         12, 9 };                        /* intrusion0, intrusion1 */
 365
 366 static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5 };
 367
 368 static const s8 NCT6776_BEEP_BITS[] = {
 369         0, 1, 2, 3, 4, 5, 6, 7,         /* in0.. in7 */
 370         8, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 371         24,                             /* global beep enable */
 372         25, 26, 27, 28, 29,             /* fan1..fan5 */
 373         -1, -1, -1,                     /* unused */
 374         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 375         30, 31 };                       /* intrusion0, intrusion1 */
 376
 377 static const u16 NCT6776_REG_TOLERANCE_H[] = {
 378         0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c };
 379
 380 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0 };
 381 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0 };
 382
 383 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
 384 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
 385
 386 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
 387         0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e };
 388
 389 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 390         0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
 391
 392 static const char *const nct6776_temp_label[] = {
 393         "",
 394         "SYSTIN",
 395         "CPUTIN",
 396         "AUXTIN",
 397         "SMBUSMASTER 0",
 398         "SMBUSMASTER 1",
 399         "SMBUSMASTER 2",
 400         "SMBUSMASTER 3",
 401         "SMBUSMASTER 4",
 402         "SMBUSMASTER 5",
 403         "SMBUSMASTER 6",
 404         "SMBUSMASTER 7",
 405         "PECI Agent 0",
 406         "PECI Agent 1",
 407         "PCH_CHIP_CPU_MAX_TEMP",
 408         "PCH_CHIP_TEMP",
 409         "PCH_CPU_TEMP",
 410         "PCH_MCH_TEMP",
 411         "PCH_DIM0_TEMP",
 412         "PCH_DIM1_TEMP",
 413         "PCH_DIM2_TEMP",
 414         "PCH_DIM3_TEMP",
 415         "BYTE_TEMP"
 416 };
 417
 418 static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
 419         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
 420
 421 static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
 422         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
 423
 424 /* NCT6779 specific data */
 425
 426 static const u16 NCT6779_REG_IN[] = {
 427         0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
 428         0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
 429
 430 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
 431         0x459, 0x45A, 0x45B, 0x568 };
 432
 433 static const s8 NCT6779_ALARM_BITS[] = {
 434         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 435         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 436         -1,                             /* unused */
 437         6, 7, 11, 10, 23,               /* fan1..fan5 */
 438         -1, -1, -1,                     /* unused */
 439         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 440         12, 9 };                        /* intrusion0, intrusion1 */
 441
 442 static const s8 NCT6779_BEEP_BITS[] = {
 443         0, 1, 2, 3, 4, 5, 6, 7,         /* in0.. in7 */
 444         8, 9, 10, 11, 12, 13, 14,       /* in8..in14 */
 445         24,                             /* global beep enable */
 446         25, 26, 27, 28, 29,             /* fan1..fan5 */
 447         -1, -1, -1,                     /* unused */
 448         16, 17, -1, -1, -1, -1,         /* temp1..temp6 */
 449         30, 31 };                       /* intrusion0, intrusion1 */
 450
 451 static const u16 NCT6779_REG_FAN[] = {
 452         0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8, 0x4ba };
 453 static const u16 NCT6779_REG_FAN_PULSES[] = {
 454         0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
 455
 456 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
 457         0x136, 0x236, 0x336, 0x836, 0x936, 0xa36 };
 458 #define NCT6779_CRITICAL_PWM_ENABLE_MASK        0x01
 459 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
 460         0x137, 0x237, 0x337, 0x837, 0x937, 0xa37 };
 461
 462 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
 463 static const u16 NCT6779_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b };
 464 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 465         0x18, 0x152 };
 466 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 467         0x3a, 0x153 };
 468 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 469         0x39, 0x155 };
 470
 471 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
 472         0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
 473
 474 static const char *const nct6779_temp_label[] = {
 475         "",
 476         "SYSTIN",
 477         "CPUTIN",
 478         "AUXTIN0",
 479         "AUXTIN1",
 480         "AUXTIN2",
 481         "AUXTIN3",
 482         "",
 483         "SMBUSMASTER 0",
 484         "SMBUSMASTER 1",
 485         "SMBUSMASTER 2",
 486         "SMBUSMASTER 3",
 487         "SMBUSMASTER 4",
 488         "SMBUSMASTER 5",
 489         "SMBUSMASTER 6",
 490         "SMBUSMASTER 7",
 491         "PECI Agent 0",
 492         "PECI Agent 1",
 493         "PCH_CHIP_CPU_MAX_TEMP",
 494         "PCH_CHIP_TEMP",
 495         "PCH_CPU_TEMP",
 496         "PCH_MCH_TEMP",
 497         "PCH_DIM0_TEMP",
 498         "PCH_DIM1_TEMP",
 499         "PCH_DIM2_TEMP",
 500         "PCH_DIM3_TEMP",
 501         "BYTE_TEMP"
 502 };
 503
 504 static const u16 NCT6779_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6779_temp_label) - 1]
 505         = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
 506             0, 0, 0, 0, 0, 0, 0, 0,
 507             0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
 508             0x408, 0 };
 509
 510 static const u16 NCT6779_REG_TEMP_CRIT[ARRAY_SIZE(nct6779_temp_label) - 1]
 511         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
 512
 513 /* NCT6791 specific data */
 514
 515 #define NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE     0x28
 516
 517 static const u16 NCT6791_REG_WEIGHT_TEMP_SEL[6] = { 0, 0x239 };
 518 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP[6] = { 0, 0x23a };
 519 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP_TOL[6] = { 0, 0x23b };
 520 static const u16 NCT6791_REG_WEIGHT_DUTY_STEP[6] = { 0, 0x23c };
 521 static const u16 NCT6791_REG_WEIGHT_TEMP_BASE[6] = { 0, 0x23d };
 522 static const u16 NCT6791_REG_WEIGHT_DUTY_BASE[6] = { 0, 0x23e };
 523
 524 static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = {
 525         0x459, 0x45A, 0x45B, 0x568, 0x45D };
 526
 527 static const s8 NCT6791_ALARM_BITS[] = {
 528         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 529         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 530         -1,                             /* unused */
 531         6, 7, 11, 10, 23, 33,           /* fan1..fan6 */
 532         -1, -1,                         /* unused */
 533         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 534         12, 9 };                        /* intrusion0, intrusion1 */
 535
 536 /* NCT6792 specific data */
 537
 538 static const u16 NCT6792_REG_TEMP_MON[] = {
 539         0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d };
 540 static const u16 NCT6792_REG_BEEP[NUM_REG_BEEP] = {
 541         0xb2, 0xb3, 0xb4, 0xb5, 0xbf };
 542
 543 /* NCT6102D/NCT6106D specific data */
 544
 545 #define NCT6106_REG_VBAT        0x318
 546 #define NCT6106_REG_DIODE       0x319
 547 #define NCT6106_DIODE_MASK      0x01
 548
 549 static const u16 NCT6106_REG_IN_MAX[] = {
 550         0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
 551 static const u16 NCT6106_REG_IN_MIN[] = {
 552         0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
 553 static const u16 NCT6106_REG_IN[] = {
 554         0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
 555
 556 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
 557 static const u16 NCT6106_REG_TEMP_MON[] = { 0x18, 0x19, 0x1a };
 558 static const u16 NCT6106_REG_TEMP_HYST[] = {
 559         0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
 560 static const u16 NCT6106_REG_TEMP_OVER[] = {
 561         0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
 562 static const u16 NCT6106_REG_TEMP_CRIT_L[] = {
 563         0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
 564 static const u16 NCT6106_REG_TEMP_CRIT_H[] = {
 565         0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
 566 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
 567 static const u16 NCT6106_REG_TEMP_CONFIG[] = {
 568         0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
 569
 570 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
 571 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
 572 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0, 0 };
 573 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4, 0, 0 };
 574
 575 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
 576 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
 577 static const u16 NCT6106_REG_PWM[] = { 0x119, 0x129, 0x139 };
 578 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c };
 579 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
 580 static const u16 NCT6106_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130 };
 581 static const u16 NCT6106_REG_TEMP_SOURCE[] = {
 582         0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
 583
 584 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
 585 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = {
 586         0x11b, 0x12b, 0x13b };
 587
 588 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
 589 #define NCT6106_CRITICAL_PWM_ENABLE_MASK        0x10
 590 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
 591
 592 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
 593 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
 594 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
 595 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
 596 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
 597 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
 598
 599 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
 600
 601 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
 602 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
 603 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
 604 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x17c };
 605 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
 606 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
 607
 608 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
 609 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
 610
 611 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = {
 612         0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
 613
 614 static const s8 NCT6106_ALARM_BITS[] = {
 615         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 616         9, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 617         -1,                             /* unused */
 618         32, 33, 34, -1, -1,             /* fan1..fan5 */
 619         -1, -1, -1,                     /* unused */
 620         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 621         48, -1                          /* intrusion0, intrusion1 */
 622 };
 623
 624 static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = {
 625         0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 };
 626
 627 static const s8 NCT6106_BEEP_BITS[] = {
 628         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 629         9, 10, 11, 12, -1, -1, -1,      /* in8..in14 */
 630         32,                             /* global beep enable */
 631         24, 25, 26, 27, 28,             /* fan1..fan5 */
 632         -1, -1, -1,                     /* unused */
 633         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 634         34, -1                          /* intrusion0, intrusion1 */
 635 };
 636
 637 static const u16 NCT6106_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
 638         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x51, 0x52, 0x54 };
 639
 640 static const u16 NCT6106_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
 641         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x204, 0x205 };
 642
 643 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
 644 {
 645         if (mode == 0 && pwm == 255)
 646                 return off;
 647         return mode + 1;
 648 }
 649
 650 static int pwm_enable_to_reg(enum pwm_enable mode)
 651 {
 652         if (mode == off)
 653                 return 0;
 654         return mode - 1;
 655 }
 656
 657 /*
 658  * Conversions
 659  */
 660
 661 /* 1 is DC mode, output in ms */
 662 static unsigned int step_time_from_reg(u8 reg, u8 mode)
 663 {
 664         return mode ? 400 * reg : 100 * reg;
 665 }
 666
 667 static u8 step_time_to_reg(unsigned int msec, u8 mode)
 668 {
 669         return clamp_val((mode ? (msec + 200) / 400 :
 670                                         (msec + 50) / 100), 1, 255);
 671 }
 672
 673 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
 674 {
 675         if (reg == 0 || reg == 255)
 676                 return 0;
 677         return 1350000U / (reg << divreg);
 678 }
 679
 680 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
 681 {
 682         if ((reg & 0xff1f) == 0xff1f)
 683                 return 0;
 684
 685         reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
 686
 687         if (reg == 0)
 688                 return 0;
 689
 690         return 1350000U / reg;
 691 }
 692
 693 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
 694 {
 695         if (reg == 0 || reg == 0xffff)
 696                 return 0;
 697
 698         /*
 699          * Even though the registers are 16 bit wide, the fan divisor
 700          * still applies.
 701          */
 702         return 1350000U / (reg << divreg);
 703 }
 704
 705 static u16 fan_to_reg(u32 fan, unsigned int divreg)
 706 {
 707         if (!fan)
 708                 return 0;
 709
 710         return (1350000U / fan) >> divreg;
 711 }
 712
 713 static inline unsigned int
 714 div_from_reg(u8 reg)
 715 {
 716         return 1 << reg;
 717 }
 718
 719 /*
 720  * Some of the voltage inputs have internal scaling, the tables below
 721  * contain 8 (the ADC LSB in mV) * scaling factor * 100
 722  */
 723 static const u16 scale_in[15] = {
 724         800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
 725         800, 800
 726 };
 727
 728 static inline long in_from_reg(u8 reg, u8 nr)
 729 {
 730         return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
 731 }
 732
 733 static inline u8 in_to_reg(u32 val, u8 nr)
 734 {
 735         return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
 736 }
 737
 738 /*
 739  * Data structures and manipulation thereof
 740  */
 741
 742 struct nct6775_data {
 743         int addr;       /* IO base of hw monitor block */
 744         int sioreg;     /* SIO register address */
 745         enum kinds kind;
 746         const char *name;
 747
 748 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
 749         struct device *hwmon_dev;
 750 #endif
 751
 752         const struct attribute_group *groups[6];
 753
 754         u16 reg_temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 755                                     * 3=temp_crit, 4=temp_lcrit
 756                                     */
 757         u8 temp_src[NUM_TEMP];
 758         u16 reg_temp_config[NUM_TEMP];
 759         const char * const *temp_label;
 760         int temp_label_num;
 761
 762         u16 REG_CONFIG;
 763         u16 REG_VBAT;
 764         u16 REG_DIODE;
 765         u8 DIODE_MASK;
 766
 767         const s8 *ALARM_BITS;
 768         const s8 *BEEP_BITS;
 769
 770         const u16 *REG_VIN;
 771         const u16 *REG_IN_MINMAX[2];
 772
 773         const u16 *REG_TARGET;
 774         const u16 *REG_FAN;
 775         const u16 *REG_FAN_MODE;
 776         const u16 *REG_FAN_MIN;
 777         const u16 *REG_FAN_PULSES;
 778         const u16 *FAN_PULSE_SHIFT;
 779         const u16 *REG_FAN_TIME[3];
 780
 781         const u16 *REG_TOLERANCE_H;
 782
 783         const u8 *REG_PWM_MODE;
 784         const u8 *PWM_MODE_MASK;
 785
 786         const u16 *REG_PWM[7];  /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 787                                  * [3]=pwm_max, [4]=pwm_step,
 788                                  * [5]=weight_duty_step, [6]=weight_duty_base
 789                                  */
 790         const u16 *REG_PWM_READ;
 791
 792         const u16 *REG_CRITICAL_PWM_ENABLE;
 793         u8 CRITICAL_PWM_ENABLE_MASK;
 794         const u16 *REG_CRITICAL_PWM;
 795
 796         const u16 *REG_AUTO_TEMP;
 797         const u16 *REG_AUTO_PWM;
 798
 799         const u16 *REG_CRITICAL_TEMP;
 800         const u16 *REG_CRITICAL_TEMP_TOLERANCE;
 801
 802         const u16 *REG_TEMP_SOURCE;     /* temp register sources */
 803         const u16 *REG_TEMP_SEL;
 804         const u16 *REG_WEIGHT_TEMP_SEL;
 805         const u16 *REG_WEIGHT_TEMP[3];  /* 0=base, 1=tolerance, 2=step */
 806
 807         const u16 *REG_TEMP_OFFSET;
 808
 809         const u16 *REG_ALARM;
 810         const u16 *REG_BEEP;
 811
 812         unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
 813         unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
 814
 815         struct mutex update_lock;
 816         bool valid;             /* true if following fields are valid */
 817         unsigned long last_updated;     /* In jiffies */
 818
 819         /* Register values */
 820         u8 bank;                /* current register bank */
 821         u8 in_num;              /* number of in inputs we have */
 822         u8 in[15][3];           /* [0]=in, [1]=in_max, [2]=in_min */
 823         unsigned int rpm[NUM_FAN];
 824         u16 fan_min[NUM_FAN];
 825         u8 fan_pulses[NUM_FAN];
 826         u8 fan_div[NUM_FAN];
 827         u8 has_pwm;
 828         u8 has_fan;             /* some fan inputs can be disabled */
 829         u8 has_fan_min;         /* some fans don't have min register */
 830         bool has_fan_div;
 831
 832         u8 num_temp_alarms;     /* 2, 3, or 6 */
 833         u8 num_temp_beeps;      /* 2, 3, or 6 */
 834         u8 temp_fixed_num;      /* 3 or 6 */
 835         u8 temp_type[NUM_TEMP_FIXED];
 836         s8 temp_offset[NUM_TEMP_FIXED];
 837         s16 temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 838                                 * 3=temp_crit, 4=temp_lcrit */
 839         u64 alarms;
 840         u64 beeps;
 841
 842         u8 pwm_num;     /* number of pwm */
 843         u8 pwm_mode[NUM_FAN];   /* 1->DC variable voltage,
 844                                  * 0->PWM variable duty cycle
 845                                  */
 846         enum pwm_enable pwm_enable[NUM_FAN];
 847                         /* 0->off
 848                          * 1->manual
 849                          * 2->thermal cruise mode (also called SmartFan I)
 850                          * 3->fan speed cruise mode
 851                          * 4->SmartFan III
 852                          * 5->enhanced variable thermal cruise (SmartFan IV)
 853                          */
 854         u8 pwm[7][NUM_FAN];     /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 855                                  * [3]=pwm_max, [4]=pwm_step,
 856                                  * [5]=weight_duty_step, [6]=weight_duty_base
 857                                  */
 858
 859         u8 target_temp[NUM_FAN];
 860         u8 target_temp_mask;
 861         u32 target_speed[NUM_FAN];
 862         u32 target_speed_tolerance[NUM_FAN];
 863         u8 speed_tolerance_limit;
 864
 865         u8 temp_tolerance[2][NUM_FAN];
 866         u8 tolerance_mask;
 867
 868         u8 fan_time[3][NUM_FAN]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
 869
 870         /* Automatic fan speed control registers */
 871         int auto_pwm_num;
 872         u8 auto_pwm[NUM_FAN][7];
 873         u8 auto_temp[NUM_FAN][7];
 874         u8 pwm_temp_sel[NUM_FAN];
 875         u8 pwm_weight_temp_sel[NUM_FAN];
 876         u8 weight_temp[3][NUM_FAN];     /* 0->temp_step, 1->temp_step_tol,
 877                                          * 2->temp_base
 878                                          */
 879
 880         u8 vid;
 881         u8 vrm;
 882
 883         bool have_vid;
 884
 885         u16 have_temp;
 886         u16 have_temp_fixed;
 887         u16 have_in;
 888
 889         /* Remember extra register values over suspend/resume */
 890         u8 vbat;
 891         u8 fandiv1;
 892         u8 fandiv2;
 893         u8 sio_reg_enable;
 894 };
 895
 896 struct nct6775_sio_data {
 897         int sioreg;
 898         enum kinds kind;
 899 };
 900
 901 struct sensor_device_template {
 902         struct device_attribute dev_attr;
 903         union {
 904                 struct {
 905                         u8 nr;
 906                         u8 index;
 907                 } s;
 908                 int index;
 909         } u;
 910         bool s2;        /* true if both index and nr are used */
 911 };
 912
 913 struct sensor_device_attr_u {
 914         union {
 915                 struct sensor_device_attribute a1;
 916                 struct sensor_device_attribute_2 a2;
 917         } u;
 918         char name[32];
 919 };
 920
 921 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) {      \
 922         .attr = {.name = _template, .mode = _mode },            \
 923         .show   = _show,                                        \
 924         .store  = _store,                                       \
 925 }
 926
 927 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \
 928         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
 929           .u.index = _index,                                            \
 930           .s2 = false }
 931
 932 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,       \
 933                                  _nr, _index)                           \
 934         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
 935           .u.s.index = _index,                                          \
 936           .u.s.nr = _nr,                                                \
 937           .s2 = true }
 938
 939 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
 940 static struct sensor_device_template sensor_dev_template_##_name        \
 941         = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store,       \
 942                                  _index)
 943
 944 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store,       \
 945                           _nr, _index)                                  \
 946 static struct sensor_device_template sensor_dev_template_##_name        \
 947         = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,     \
 948                                  _nr, _index)
 949
 950 struct sensor_template_group {
 951         struct sensor_device_template **templates;
 952         umode_t (*is_visible)(struct kobject *, struct attribute *, int);
 953         int base;
 954 };
 955
 956 static struct attribute_group *
 957 nct6775_create_attr_group(struct device *dev, struct sensor_template_group *tg,
 958                           int repeat)
 959 {
 960         struct attribute_group *group;
 961         struct sensor_device_attr_u *su;
 962         struct sensor_device_attribute *a;
 963         struct sensor_device_attribute_2 *a2;
 964         struct attribute **attrs;
 965         struct sensor_device_template **t;
 966         int i, count;
 967
 968         if (repeat <= 0)
 969                 return ERR_PTR(-EINVAL);
 970
 971         t = tg->templates;
 972         for (count = 0; *t; t++, count++)
 973                 ;
 974
 975         if (count == 0)
 976                 return ERR_PTR(-EINVAL);
 977
 978         group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
 979         if (group == NULL)
 980                 return ERR_PTR(-ENOMEM);
 981
 982         attrs = devm_kzalloc(dev, sizeof(*attrs) * (repeat * count + 1),
 983                              GFP_KERNEL);
 984         if (attrs == NULL)
 985                 return ERR_PTR(-ENOMEM);
 986
 987         su = devm_kzalloc(dev, sizeof(*su) * repeat * count,
 988                                GFP_KERNEL);
 989         if (su == NULL)
 990                 return ERR_PTR(-ENOMEM);
 991
 992         group->attrs = attrs;
 993         group->is_visible = tg->is_visible;
 994
 995         for (i = 0; i < repeat; i++) {
 996                 t = tg->templates;
 997                 while (*t != NULL) {
 998                         snprintf(su->name, sizeof(su->name),
 999                                  (*t)->dev_attr.attr.name, tg->base + i);
1000                         if ((*t)->s2) {
1001                                 a2 = &su->u.a2;
1002                                 a2->dev_attr.attr.name = su->name;
1003                                 a2->nr = (*t)->u.s.nr + i;
1004                                 a2->index = (*t)->u.s.index;
1005                                 a2->dev_attr.attr.mode =
1006                                   (*t)->dev_attr.attr.mode;
1007                                 a2->dev_attr.show = (*t)->dev_attr.show;
1008                                 a2->dev_attr.store = (*t)->dev_attr.store;
1009                                 *attrs = &a2->dev_attr.attr;
1010                         } else {
1011                                 a = &su->u.a1;
1012                                 a->dev_attr.attr.name = su->name;
1013                                 a->index = (*t)->u.index + i;
1014                                 a->dev_attr.attr.mode =
1015                                   (*t)->dev_attr.attr.mode;
1016                                 a->dev_attr.show = (*t)->dev_attr.show;
1017                                 a->dev_attr.store = (*t)->dev_attr.store;
1018                                 *attrs = &a->dev_attr.attr;
1019                         }
1020                         attrs++;
1021                         su++;
1022                         t++;
1023                 }
1024         }
1025
1026         return group;
1027 }
1028
1029 static bool is_word_sized(struct nct6775_data *data, u16 reg)
1030 {
1031         switch (data->kind) {
1032         case nct6106:
1033                 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1034                   reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
1035                   reg == 0x111 || reg == 0x121 || reg == 0x131;
1036         case nct6775:
1037                 return (((reg & 0xff00) == 0x100 ||
1038                     (reg & 0xff00) == 0x200) &&
1039                    ((reg & 0x00ff) == 0x50 ||
1040                     (reg & 0x00ff) == 0x53 ||
1041                     (reg & 0x00ff) == 0x55)) ||
1042                   (reg & 0xfff0) == 0x630 ||
1043                   reg == 0x640 || reg == 0x642 ||
1044                   reg == 0x662 ||
1045                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1046                   reg == 0x73 || reg == 0x75 || reg == 0x77;
1047         case nct6776:
1048                 return (((reg & 0xff00) == 0x100 ||
1049                     (reg & 0xff00) == 0x200) &&
1050                    ((reg & 0x00ff) == 0x50 ||
1051                     (reg & 0x00ff) == 0x53 ||
1052                     (reg & 0x00ff) == 0x55)) ||
1053                   (reg & 0xfff0) == 0x630 ||
1054                   reg == 0x402 ||
1055                   reg == 0x640 || reg == 0x642 ||
1056                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1057                   reg == 0x73 || reg == 0x75 || reg == 0x77;
1058         case nct6779:
1059         case nct6791:
1060         case nct6792:
1061                 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
1062                   ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x0b) ||
1063                   reg == 0x402 ||
1064                   reg == 0x63a || reg == 0x63c || reg == 0x63e ||
1065                   reg == 0x640 || reg == 0x642 ||
1066                   reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
1067                   reg == 0x7b || reg == 0x7d;
1068         }
1069         return false;
1070 }
1071
1072 /*
1073  * On older chips, only registers 0x50-0x5f are banked.
1074  * On more recent chips, all registers are banked.
1075  * Assume that is the case and set the bank number for each access.
1076  * Cache the bank number so it only needs to be set if it changes.
1077  */
1078 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
1079 {
1080         u8 bank = reg >> 8;
1081
1082         if (data->bank != bank) {
1083                 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
1084                 outb_p(bank, data->addr + DATA_REG_OFFSET);
1085                 data->bank = bank;
1086         }
1087 }
1088
1089 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
1090 {
1091         int res, word_sized = is_word_sized(data, reg);
1092
1093         nct6775_set_bank(data, reg);
1094         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1095         res = inb_p(data->addr + DATA_REG_OFFSET);
1096         if (word_sized) {
1097                 outb_p((reg & 0xff) + 1,
1098                        data->addr + ADDR_REG_OFFSET);
1099                 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
1100         }
1101         return res;
1102 }
1103
1104 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
1105 {
1106         int word_sized = is_word_sized(data, reg);
1107
1108         nct6775_set_bank(data, reg);
1109         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1110         if (word_sized) {
1111                 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
1112                 outb_p((reg & 0xff) + 1,
1113                        data->addr + ADDR_REG_OFFSET);
1114         }
1115         outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
1116         return 0;
1117 }
1118
1119 /* We left-align 8-bit temperature values to make the code simpler */
1120 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
1121 {
1122         u16 res;
1123
1124         res = nct6775_read_value(data, reg);
1125         if (!is_word_sized(data, reg))
1126                 res <<= 8;
1127
1128         return res;
1129 }
1130
1131 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
1132 {
1133         if (!is_word_sized(data, reg))
1134                 value >>= 8;
1135         return nct6775_write_value(data, reg, value);
1136 }
1137
1138 /* This function assumes that the caller holds data->update_lock */
1139 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
1140 {
1141         u8 reg;
1142
1143         switch (nr) {
1144         case 0:
1145                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
1146                     | (data->fan_div[0] & 0x7);
1147                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1148                 break;
1149         case 1:
1150                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
1151                     | ((data->fan_div[1] << 4) & 0x70);
1152                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1153                 break;
1154         case 2:
1155                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
1156                     | (data->fan_div[2] & 0x7);
1157                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1158                 break;
1159         case 3:
1160                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
1161                     | ((data->fan_div[3] << 4) & 0x70);
1162                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1163                 break;
1164         }
1165 }
1166
1167 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
1168 {
1169         if (data->kind == nct6775)
1170                 nct6775_write_fan_div(data, nr);
1171 }
1172
1173 static void nct6775_update_fan_div(struct nct6775_data *data)
1174 {
1175         u8 i;
1176
1177         i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
1178         data->fan_div[0] = i & 0x7;
1179         data->fan_div[1] = (i & 0x70) >> 4;
1180         i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
1181         data->fan_div[2] = i & 0x7;
1182         if (data->has_fan & (1 << 3))
1183                 data->fan_div[3] = (i & 0x70) >> 4;
1184 }
1185
1186 static void nct6775_update_fan_div_common(struct nct6775_data *data)
1187 {
1188         if (data->kind == nct6775)
1189                 nct6775_update_fan_div(data);
1190 }
1191
1192 static void nct6775_init_fan_div(struct nct6775_data *data)
1193 {
1194         int i;
1195
1196         nct6775_update_fan_div_common(data);
1197         /*
1198          * For all fans, start with highest divider value if the divider
1199          * register is not initialized. This ensures that we get a
1200          * reading from the fan count register, even if it is not optimal.
1201          * We'll compute a better divider later on.
1202          */
1203         for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
1204                 if (!(data->has_fan & (1 << i)))
1205                         continue;
1206                 if (data->fan_div[i] == 0) {
1207                         data->fan_div[i] = 7;
1208                         nct6775_write_fan_div_common(data, i);
1209                 }
1210         }
1211 }
1212
1213 static void nct6775_init_fan_common(struct device *dev,
1214                                     struct nct6775_data *data)
1215 {
1216         int i;
1217         u8 reg;
1218
1219         if (data->has_fan_div)
1220                 nct6775_init_fan_div(data);
1221
1222         /*
1223          * If fan_min is not set (0), set it to 0xff to disable it. This
1224          * prevents the unnecessary warning when fanX_min is reported as 0.
1225          */
1226         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1227                 if (data->has_fan_min & (1 << i)) {
1228                         reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
1229                         if (!reg)
1230                                 nct6775_write_value(data, data->REG_FAN_MIN[i],
1231                                                     data->has_fan_div ? 0xff
1232                                                                       : 0xff1f);
1233                 }
1234         }
1235 }
1236
1237 static void nct6775_select_fan_div(struct device *dev,
1238                                    struct nct6775_data *data, int nr, u16 reg)
1239 {
1240         u8 fan_div = data->fan_div[nr];
1241         u16 fan_min;
1242
1243         if (!data->has_fan_div)
1244                 return;
1245
1246         /*
1247          * If we failed to measure the fan speed, or the reported value is not
1248          * in the optimal range, and the clock divider can be modified,
1249          * let's try that for next time.
1250          */
1251         if (reg == 0x00 && fan_div < 0x07)
1252                 fan_div++;
1253         else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1254                 fan_div--;
1255
1256         if (fan_div != data->fan_div[nr]) {
1257                 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1258                         nr + 1, div_from_reg(data->fan_div[nr]),
1259                         div_from_reg(fan_div));
1260
1261                 /* Preserve min limit if possible */
1262                 if (data->has_fan_min & (1 << nr)) {
1263                         fan_min = data->fan_min[nr];
1264                         if (fan_div > data->fan_div[nr]) {
1265                                 if (fan_min != 255 && fan_min > 1)
1266                                         fan_min >>= 1;
1267                         } else {
1268                                 if (fan_min != 255) {
1269                                         fan_min <<= 1;
1270                                         if (fan_min > 254)
1271                                                 fan_min = 254;
1272                                 }
1273                         }
1274                         if (fan_min != data->fan_min[nr]) {
1275                                 data->fan_min[nr] = fan_min;
1276                                 nct6775_write_value(data, data->REG_FAN_MIN[nr],
1277                                                     fan_min);
1278                         }
1279                 }
1280                 data->fan_div[nr] = fan_div;
1281                 nct6775_write_fan_div_common(data, nr);
1282         }
1283 }
1284
1285 static void nct6775_update_pwm(struct device *dev)
1286 {
1287         struct nct6775_data *data = dev_get_drvdata(dev);
1288         int i, j;
1289         int fanmodecfg, reg;
1290         bool duty_is_dc;
1291
1292         for (i = 0; i < data->pwm_num; i++) {
1293                 if (!(data->has_pwm & (1 << i)))
1294                         continue;
1295
1296                 duty_is_dc = data->REG_PWM_MODE[i] &&
1297                   (nct6775_read_value(data, data->REG_PWM_MODE[i])
1298                    & data->PWM_MODE_MASK[i]);
1299                 data->pwm_mode[i] = duty_is_dc;
1300
1301                 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
1302                 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1303                         if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1304                                 data->pwm[j][i]
1305                                   = nct6775_read_value(data,
1306                                                        data->REG_PWM[j][i]);
1307                         }
1308                 }
1309
1310                 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1311                                                         (fanmodecfg >> 4) & 7);
1312
1313                 if (!data->temp_tolerance[0][i] ||
1314                     data->pwm_enable[i] != speed_cruise)
1315                         data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1316                 if (!data->target_speed_tolerance[i] ||
1317                     data->pwm_enable[i] == speed_cruise) {
1318                         u8 t = fanmodecfg & 0x0f;
1319
1320                         if (data->REG_TOLERANCE_H) {
1321                                 t |= (nct6775_read_value(data,
1322                                       data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
1323                         }
1324                         data->target_speed_tolerance[i] = t;
1325                 }
1326
1327                 data->temp_tolerance[1][i] =
1328                         nct6775_read_value(data,
1329                                         data->REG_CRITICAL_TEMP_TOLERANCE[i]);
1330
1331                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
1332                 data->pwm_temp_sel[i] = reg & 0x1f;
1333                 /* If fan can stop, report floor as 0 */
1334                 if (reg & 0x80)
1335                         data->pwm[2][i] = 0;
1336
1337                 if (!data->REG_WEIGHT_TEMP_SEL[i])
1338                         continue;
1339
1340                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
1341                 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1342                 /* If weight is disabled, report weight source as 0 */
1343                 if (j == 1 && !(reg & 0x80))
1344                         data->pwm_weight_temp_sel[i] = 0;
1345
1346                 /* Weight temp data */
1347                 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
1348                         data->weight_temp[j][i]
1349                           = nct6775_read_value(data,
1350                                                data->REG_WEIGHT_TEMP[j][i]);
1351                 }
1352         }
1353 }
1354
1355 static void nct6775_update_pwm_limits(struct device *dev)
1356 {
1357         struct nct6775_data *data = dev_get_drvdata(dev);
1358         int i, j;
1359         u8 reg;
1360         u16 reg_t;
1361
1362         for (i = 0; i < data->pwm_num; i++) {
1363                 if (!(data->has_pwm & (1 << i)))
1364                         continue;
1365
1366                 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1367                         data->fan_time[j][i] =
1368                           nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1369                 }
1370
1371                 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1372                 /* Update only in matching mode or if never updated */
1373                 if (!data->target_temp[i] ||
1374                     data->pwm_enable[i] == thermal_cruise)
1375                         data->target_temp[i] = reg_t & data->target_temp_mask;
1376                 if (!data->target_speed[i] ||
1377                     data->pwm_enable[i] == speed_cruise) {
1378                         if (data->REG_TOLERANCE_H) {
1379                                 reg_t |= (nct6775_read_value(data,
1380                                         data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1381                         }
1382                         data->target_speed[i] = reg_t;
1383                 }
1384
1385                 for (j = 0; j < data->auto_pwm_num; j++) {
1386                         data->auto_pwm[i][j] =
1387                           nct6775_read_value(data,
1388                                              NCT6775_AUTO_PWM(data, i, j));
1389                         data->auto_temp[i][j] =
1390                           nct6775_read_value(data,
1391                                              NCT6775_AUTO_TEMP(data, i, j));
1392                 }
1393
1394                 /* critical auto_pwm temperature data */
1395                 data->auto_temp[i][data->auto_pwm_num] =
1396                         nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1397
1398                 switch (data->kind) {
1399                 case nct6775:
1400                         reg = nct6775_read_value(data,
1401                                                  NCT6775_REG_CRITICAL_ENAB[i]);
1402                         data->auto_pwm[i][data->auto_pwm_num] =
1403                                                 (reg & 0x02) ? 0xff : 0x00;
1404                         break;
1405                 case nct6776:
1406                         data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1407                         break;
1408                 case nct6106:
1409                 case nct6779:
1410                 case nct6791:
1411                 case nct6792:
1412                         reg = nct6775_read_value(data,
1413                                         data->REG_CRITICAL_PWM_ENABLE[i]);
1414                         if (reg & data->CRITICAL_PWM_ENABLE_MASK)
1415                                 reg = nct6775_read_value(data,
1416                                         data->REG_CRITICAL_PWM[i]);
1417                         else
1418                                 reg = 0xff;
1419                         data->auto_pwm[i][data->auto_pwm_num] = reg;
1420                         break;
1421                 }
1422         }
1423 }
1424
1425 static struct nct6775_data *nct6775_update_device(struct device *dev)
1426 {
1427         struct nct6775_data *data = dev_get_drvdata(dev);
1428         int i, j;
1429
1430         mutex_lock(&data->update_lock);
1431
1432         if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1433             || !data->valid) {
1434                 /* Fan clock dividers */
1435                 nct6775_update_fan_div_common(data);
1436
1437                 /* Measured voltages and limits */
1438                 for (i = 0; i < data->in_num; i++) {
1439                         if (!(data->have_in & (1 << i)))
1440                                 continue;
1441
1442                         data->in[i][0] = nct6775_read_value(data,
1443                                                             data->REG_VIN[i]);
1444                         data->in[i][1] = nct6775_read_value(data,
1445                                           data->REG_IN_MINMAX[0][i]);
1446                         data->in[i][2] = nct6775_read_value(data,
1447                                           data->REG_IN_MINMAX[1][i]);
1448                 }
1449
1450                 /* Measured fan speeds and limits */
1451                 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
1452                         u16 reg;
1453
1454                         if (!(data->has_fan & (1 << i)))
1455                                 continue;
1456
1457                         reg = nct6775_read_value(data, data->REG_FAN[i]);
1458                         data->rpm[i] = data->fan_from_reg(reg,
1459                                                           data->fan_div[i]);
1460
1461                         if (data->has_fan_min & (1 << i))
1462                                 data->fan_min[i] = nct6775_read_value(data,
1463                                            data->REG_FAN_MIN[i]);
1464                         data->fan_pulses[i] =
1465                           (nct6775_read_value(data, data->REG_FAN_PULSES[i])
1466                                 >> data->FAN_PULSE_SHIFT[i]) & 0x03;
1467
1468                         nct6775_select_fan_div(dev, data, i, reg);
1469                 }
1470
1471                 nct6775_update_pwm(dev);
1472                 nct6775_update_pwm_limits(dev);
1473
1474                 /* Measured temperatures and limits */
1475                 for (i = 0; i < NUM_TEMP; i++) {
1476                         if (!(data->have_temp & (1 << i)))
1477                                 continue;
1478                         for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1479                                 if (data->reg_temp[j][i])
1480                                         data->temp[j][i]
1481                                           = nct6775_read_temp(data,
1482                                                 data->reg_temp[j][i]);
1483                         }
1484                         if (i >= NUM_TEMP_FIXED ||
1485                             !(data->have_temp_fixed & (1 << i)))
1486                                 continue;
1487                         data->temp_offset[i]
1488                           = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1489                 }
1490
1491                 data->alarms = 0;
1492                 for (i = 0; i < NUM_REG_ALARM; i++) {
1493                         u8 alarm;
1494
1495                         if (!data->REG_ALARM[i])
1496                                 continue;
1497                         alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1498                         data->alarms |= ((u64)alarm) << (i << 3);
1499                 }
1500
1501                 data->beeps = 0;
1502                 for (i = 0; i < NUM_REG_BEEP; i++) {
1503                         u8 beep;
1504
1505                         if (!data->REG_BEEP[i])
1506                                 continue;
1507                         beep = nct6775_read_value(data, data->REG_BEEP[i]);
1508                         data->beeps |= ((u64)beep) << (i << 3);
1509                 }
1510
1511                 data->last_updated = jiffies;
1512                 data->valid = true;
1513         }
1514
1515         mutex_unlock(&data->update_lock);
1516         return data;
1517 }
1518
1519 /*
1520  * Sysfs callback functions
1521  */
1522 static ssize_t
1523 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1524 {
1525         struct nct6775_data *data = nct6775_update_device(dev);
1526         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1527         int index = sattr->index;
1528         int nr = sattr->nr;
1529
1530         return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1531 }
1532
1533 static ssize_t
1534 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1535              size_t count)
1536 {
1537         struct nct6775_data *data = dev_get_drvdata(dev);
1538         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1539         int index = sattr->index;
1540         int nr = sattr->nr;
1541         unsigned long val;
1542         int err;
1543
1544         err = kstrtoul(buf, 10, &val);
1545         if (err < 0)
1546                 return err;
1547         mutex_lock(&data->update_lock);
1548         data->in[nr][index] = in_to_reg(val, nr);
1549         nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr],
1550                             data->in[nr][index]);
1551         mutex_unlock(&data->update_lock);
1552         return count;
1553 }
1554
1555 static ssize_t
1556 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1557 {
1558         struct nct6775_data *data = nct6775_update_device(dev);
1559         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1560         int nr = data->ALARM_BITS[sattr->index];
1561
1562         return sprintf(buf, "%u\n",
1563                        (unsigned int)((data->alarms >> nr) & 0x01));
1564 }
1565
1566 static int find_temp_source(struct nct6775_data *data, int index, int count)
1567 {
1568         int source = data->temp_src[index];
1569         int nr;
1570
1571         for (nr = 0; nr < count; nr++) {
1572                 int src;
1573
1574                 src = nct6775_read_value(data,
1575                                          data->REG_TEMP_SOURCE[nr]) & 0x1f;
1576                 if (src == source)
1577                         return nr;
1578         }
1579         return -ENODEV;
1580 }
1581
1582 static ssize_t
1583 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1584 {
1585         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1586         struct nct6775_data *data = nct6775_update_device(dev);
1587         unsigned int alarm = 0;
1588         int nr;
1589
1590         /*
1591          * For temperatures, there is no fixed mapping from registers to alarm
1592          * bits. Alarm bits are determined by the temperature source mapping.
1593          */
1594         nr = find_temp_source(data, sattr->index, data->num_temp_alarms);
1595         if (nr >= 0) {
1596                 int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE];
1597
1598                 alarm = (data->alarms >> bit) & 0x01;
1599         }
1600         return sprintf(buf, "%u\n", alarm);
1601 }
1602
1603 static ssize_t
1604 show_beep(struct device *dev, struct device_attribute *attr, char *buf)
1605 {
1606         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1607         struct nct6775_data *data = nct6775_update_device(dev);
1608         int nr = data->BEEP_BITS[sattr->index];
1609
1610         return sprintf(buf, "%u\n",
1611                        (unsigned int)((data->beeps >> nr) & 0x01));
1612 }
1613
1614 static ssize_t
1615 store_beep(struct device *dev, struct device_attribute *attr, const char *buf,
1616            size_t count)
1617 {
1618         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1619         struct nct6775_data *data = dev_get_drvdata(dev);
1620         int nr = data->BEEP_BITS[sattr->index];
1621         int regindex = nr >> 3;
1622         unsigned long val;
1623         int err;
1624
1625         err = kstrtoul(buf, 10, &val);
1626         if (err < 0)
1627                 return err;
1628         if (val > 1)
1629                 return -EINVAL;
1630
1631         mutex_lock(&data->update_lock);
1632         if (val)
1633                 data->beeps |= (1ULL << nr);
1634         else
1635                 data->beeps &= ~(1ULL << nr);
1636         nct6775_write_value(data, data->REG_BEEP[regindex],
1637                             (data->beeps >> (regindex << 3)) & 0xff);
1638         mutex_unlock(&data->update_lock);
1639         return count;
1640 }
1641
1642 static ssize_t
1643 show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf)
1644 {
1645         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1646         struct nct6775_data *data = nct6775_update_device(dev);
1647         unsigned int beep = 0;
1648         int nr;
1649
1650         /*
1651          * For temperatures, there is no fixed mapping from registers to beep
1652          * enable bits. Beep enable bits are determined by the temperature
1653          * source mapping.
1654          */
1655         nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1656         if (nr >= 0) {
1657                 int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1658
1659                 beep = (data->beeps >> bit) & 0x01;
1660         }
1661         return sprintf(buf, "%u\n", beep);
1662 }
1663
1664 static ssize_t
1665 store_temp_beep(struct device *dev, struct device_attribute *attr,
1666                 const char *buf, size_t count)
1667 {
1668         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1669         struct nct6775_data *data = dev_get_drvdata(dev);
1670         int nr, bit, regindex;
1671         unsigned long val;
1672         int err;
1673
1674         err = kstrtoul(buf, 10, &val);
1675         if (err < 0)
1676                 return err;
1677         if (val > 1)
1678                 return -EINVAL;
1679
1680         nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1681         if (nr < 0)
1682                 return nr;
1683
1684         bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1685         regindex = bit >> 3;
1686
1687         mutex_lock(&data->update_lock);
1688         if (val)
1689                 data->beeps |= (1ULL << bit);
1690         else
1691                 data->beeps &= ~(1ULL << bit);
1692         nct6775_write_value(data, data->REG_BEEP[regindex],
1693                             (data->beeps >> (regindex << 3)) & 0xff);
1694         mutex_unlock(&data->update_lock);
1695
1696         return count;
1697 }
1698
1699 static umode_t nct6775_in_is_visible(struct kobject *kobj,
1700                                      struct attribute *attr, int index)
1701 {
1702         struct device *dev = container_of(kobj, struct device, kobj);
1703         struct nct6775_data *data = dev_get_drvdata(dev);
1704         int in = index / 5;     /* voltage index */
1705
1706         if (!(data->have_in & (1 << in)))
1707                 return 0;
1708
1709         return attr->mode;
1710 }
1711
1712 SENSOR_TEMPLATE_2(in_input, "in%d_input", S_IRUGO, show_in_reg, NULL, 0, 0);
1713 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", S_IRUGO, show_alarm, NULL, 0);
1714 SENSOR_TEMPLATE(in_beep, "in%d_beep", S_IWUSR | S_IRUGO, show_beep, store_beep,
1715                 0);
1716 SENSOR_TEMPLATE_2(in_min, "in%d_min", S_IWUSR | S_IRUGO, show_in_reg,
1717                   store_in_reg, 0, 1);
1718 SENSOR_TEMPLATE_2(in_max, "in%d_max", S_IWUSR | S_IRUGO, show_in_reg,
1719                   store_in_reg, 0, 2);
1720
1721 /*
1722  * nct6775_in_is_visible uses the index into the following array
1723  * to determine if attributes should be created or not.
1724  * Any change in order or content must be matched.
1725  */
1726 static struct sensor_device_template *nct6775_attributes_in_template[] = {
1727         &sensor_dev_template_in_input,
1728         &sensor_dev_template_in_alarm,
1729         &sensor_dev_template_in_beep,
1730         &sensor_dev_template_in_min,
1731         &sensor_dev_template_in_max,
1732         NULL
1733 };
1734
1735 static struct sensor_template_group nct6775_in_template_group = {
1736         .templates = nct6775_attributes_in_template,
1737         .is_visible = nct6775_in_is_visible,
1738 };
1739
1740 static ssize_t
1741 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1742 {
1743         struct nct6775_data *data = nct6775_update_device(dev);
1744         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1745         int nr = sattr->index;
1746
1747         return sprintf(buf, "%d\n", data->rpm[nr]);
1748 }
1749
1750 static ssize_t
1751 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1752 {
1753         struct nct6775_data *data = nct6775_update_device(dev);
1754         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1755         int nr = sattr->index;
1756
1757         return sprintf(buf, "%d\n",
1758                        data->fan_from_reg_min(data->fan_min[nr],
1759                                               data->fan_div[nr]));
1760 }
1761
1762 static ssize_t
1763 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1764 {
1765         struct nct6775_data *data = nct6775_update_device(dev);
1766         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1767         int nr = sattr->index;
1768
1769         return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1770 }
1771
1772 static ssize_t
1773 store_fan_min(struct device *dev, struct device_attribute *attr,
1774               const char *buf, size_t count)
1775 {
1776         struct nct6775_data *data = dev_get_drvdata(dev);
1777         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1778         int nr = sattr->index;
1779         unsigned long val;
1780         unsigned int reg;
1781         u8 new_div;
1782         int err;
1783
1784         err = kstrtoul(buf, 10, &val);
1785         if (err < 0)
1786                 return err;
1787
1788         mutex_lock(&data->update_lock);
1789         if (!data->has_fan_div) {
1790                 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1791                 if (!val) {
1792                         val = 0xff1f;
1793                 } else {
1794                         if (val > 1350000U)
1795                                 val = 135000U;
1796                         val = 1350000U / val;
1797                         val = (val & 0x1f) | ((val << 3) & 0xff00);
1798                 }
1799                 data->fan_min[nr] = val;
1800                 goto write_min; /* Leave fan divider alone */
1801         }
1802         if (!val) {
1803                 /* No min limit, alarm disabled */
1804                 data->fan_min[nr] = 255;
1805                 new_div = data->fan_div[nr]; /* No change */
1806                 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1807                 goto write_div;
1808         }
1809         reg = 1350000U / val;
1810         if (reg >= 128 * 255) {
1811                 /*
1812                  * Speed below this value cannot possibly be represented,
1813                  * even with the highest divider (128)
1814                  */
1815                 data->fan_min[nr] = 254;
1816                 new_div = 7; /* 128 == (1 << 7) */
1817                 dev_warn(dev,
1818                          "fan%u low limit %lu below minimum %u, set to minimum\n",
1819                          nr + 1, val, data->fan_from_reg_min(254, 7));
1820         } else if (!reg) {
1821                 /*
1822                  * Speed above this value cannot possibly be represented,
1823                  * even with the lowest divider (1)
1824                  */
1825                 data->fan_min[nr] = 1;
1826                 new_div = 0; /* 1 == (1 << 0) */
1827                 dev_warn(dev,
1828                          "fan%u low limit %lu above maximum %u, set to maximum\n",
1829                          nr + 1, val, data->fan_from_reg_min(1, 0));
1830         } else {
1831                 /*
1832                  * Automatically pick the best divider, i.e. the one such
1833                  * that the min limit will correspond to a register value
1834                  * in the 96..192 range
1835                  */
1836                 new_div = 0;
1837                 while (reg > 192 && new_div < 7) {
1838                         reg >>= 1;
1839                         new_div++;
1840                 }
1841                 data->fan_min[nr] = reg;
1842         }
1843
1844 write_div:
1845         /*
1846          * Write both the fan clock divider (if it changed) and the new
1847          * fan min (unconditionally)
1848          */
1849         if (new_div != data->fan_div[nr]) {
1850                 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1851                         nr + 1, div_from_reg(data->fan_div[nr]),
1852                         div_from_reg(new_div));
1853                 data->fan_div[nr] = new_div;
1854                 nct6775_write_fan_div_common(data, nr);
1855                 /* Give the chip time to sample a new speed value */
1856                 data->last_updated = jiffies;
1857         }
1858
1859 write_min:
1860         nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1861         mutex_unlock(&data->update_lock);
1862
1863         return count;
1864 }
1865
1866 static ssize_t
1867 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
1868 {
1869         struct nct6775_data *data = nct6775_update_device(dev);
1870         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1871         int p = data->fan_pulses[sattr->index];
1872
1873         return sprintf(buf, "%d\n", p ? : 4);
1874 }
1875
1876 static ssize_t
1877 store_fan_pulses(struct device *dev, struct device_attribute *attr,
1878                  const char *buf, size_t count)
1879 {
1880         struct nct6775_data *data = dev_get_drvdata(dev);
1881         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1882         int nr = sattr->index;
1883         unsigned long val;
1884         int err;
1885         u8 reg;
1886
1887         err = kstrtoul(buf, 10, &val);
1888         if (err < 0)
1889                 return err;
1890
1891         if (val > 4)
1892                 return -EINVAL;
1893
1894         mutex_lock(&data->update_lock);
1895         data->fan_pulses[nr] = val & 3;
1896         reg = nct6775_read_value(data, data->REG_FAN_PULSES[nr]);
1897         reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
1898         reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
1899         nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
1900         mutex_unlock(&data->update_lock);
1901
1902         return count;
1903 }
1904
1905 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
1906                                       struct attribute *attr, int index)
1907 {
1908         struct device *dev = container_of(kobj, struct device, kobj);
1909         struct nct6775_data *data = dev_get_drvdata(dev);
1910         int fan = index / 6;    /* fan index */
1911         int nr = index % 6;     /* attribute index */
1912
1913         if (!(data->has_fan & (1 << fan)))
1914                 return 0;
1915
1916         if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1)
1917                 return 0;
1918         if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1)
1919                 return 0;
1920         if (nr == 4 && !(data->has_fan_min & (1 << fan)))
1921                 return 0;
1922         if (nr == 5 && data->kind != nct6775)
1923                 return 0;
1924
1925         return attr->mode;
1926 }
1927
1928 SENSOR_TEMPLATE(fan_input, "fan%d_input", S_IRUGO, show_fan, NULL, 0);
1929 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", S_IRUGO, show_alarm, NULL,
1930                 FAN_ALARM_BASE);
1931 SENSOR_TEMPLATE(fan_beep, "fan%d_beep", S_IWUSR | S_IRUGO, show_beep,
1932                 store_beep, FAN_ALARM_BASE);
1933 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", S_IWUSR | S_IRUGO, show_fan_pulses,
1934                 store_fan_pulses, 0);
1935 SENSOR_TEMPLATE(fan_min, "fan%d_min", S_IWUSR | S_IRUGO, show_fan_min,
1936                 store_fan_min, 0);
1937 SENSOR_TEMPLATE(fan_div, "fan%d_div", S_IRUGO, show_fan_div, NULL, 0);
1938
1939 /*
1940  * nct6775_fan_is_visible uses the index into the following array
1941  * to determine if attributes should be created or not.
1942  * Any change in order or content must be matched.
1943  */
1944 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
1945         &sensor_dev_template_fan_input,
1946         &sensor_dev_template_fan_alarm, /* 1 */
1947         &sensor_dev_template_fan_beep,  /* 2 */
1948         &sensor_dev_template_fan_pulses,
1949         &sensor_dev_template_fan_min,   /* 4 */
1950         &sensor_dev_template_fan_div,   /* 5 */
1951         NULL
1952 };
1953
1954 static struct sensor_template_group nct6775_fan_template_group = {
1955         .templates = nct6775_attributes_fan_template,
1956         .is_visible = nct6775_fan_is_visible,
1957         .base = 1,
1958 };
1959
1960 static ssize_t
1961 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1962 {
1963         struct nct6775_data *data = nct6775_update_device(dev);
1964         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1965         int nr = sattr->index;
1966
1967         return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1968 }
1969
1970 static ssize_t
1971 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1972 {
1973         struct nct6775_data *data = nct6775_update_device(dev);
1974         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1975         int nr = sattr->nr;
1976         int index = sattr->index;
1977
1978         return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
1979 }
1980
1981 static ssize_t
1982 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
1983            size_t count)
1984 {
1985         struct nct6775_data *data = dev_get_drvdata(dev);
1986         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1987         int nr = sattr->nr;
1988         int index = sattr->index;
1989         int err;
1990         long val;
1991
1992         err = kstrtol(buf, 10, &val);
1993         if (err < 0)
1994                 return err;
1995
1996         mutex_lock(&data->update_lock);
1997         data->temp[index][nr] = LM75_TEMP_TO_REG(val);
1998         nct6775_write_temp(data, data->reg_temp[index][nr],
1999                            data->temp[index][nr]);
2000         mutex_unlock(&data->update_lock);
2001         return count;
2002 }
2003
2004 static ssize_t
2005 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
2006 {
2007         struct nct6775_data *data = nct6775_update_device(dev);
2008         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2009
2010         return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
2011 }
2012
2013 static ssize_t
2014 store_temp_offset(struct device *dev, struct device_attribute *attr,
2015                   const char *buf, size_t count)
2016 {
2017         struct nct6775_data *data = dev_get_drvdata(dev);
2018         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2019         int nr = sattr->index;
2020         long val;
2021         int err;
2022
2023         err = kstrtol(buf, 10, &val);
2024         if (err < 0)
2025                 return err;
2026
2027         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
2028
2029         mutex_lock(&data->update_lock);
2030         data->temp_offset[nr] = val;
2031         nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
2032         mutex_unlock(&data->update_lock);
2033
2034         return count;
2035 }
2036
2037 static ssize_t
2038 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
2039 {
2040         struct nct6775_data *data = nct6775_update_device(dev);
2041         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2042         int nr = sattr->index;
2043
2044         return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
2045 }
2046
2047 static ssize_t
2048 store_temp_type(struct device *dev, struct device_attribute *attr,
2049                 const char *buf, size_t count)
2050 {
2051         struct nct6775_data *data = nct6775_update_device(dev);
2052         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2053         int nr = sattr->index;
2054         unsigned long val;
2055         int err;
2056         u8 vbat, diode, vbit, dbit;
2057
2058         err = kstrtoul(buf, 10, &val);
2059         if (err < 0)
2060                 return err;
2061
2062         if (val != 1 && val != 3 && val != 4)
2063                 return -EINVAL;
2064
2065         mutex_lock(&data->update_lock);
2066
2067         data->temp_type[nr] = val;
2068         vbit = 0x02 << nr;
2069         dbit = data->DIODE_MASK << nr;
2070         vbat = nct6775_read_value(data, data->REG_VBAT) & ~vbit;
2071         diode = nct6775_read_value(data, data->REG_DIODE) & ~dbit;
2072         switch (val) {
2073         case 1: /* CPU diode (diode, current mode) */
2074                 vbat |= vbit;
2075                 diode |= dbit;
2076                 break;
2077         case 3: /* diode, voltage mode */
2078                 vbat |= dbit;
2079                 break;
2080         case 4: /* thermistor */
2081                 break;
2082         }
2083         nct6775_write_value(data, data->REG_VBAT, vbat);
2084         nct6775_write_value(data, data->REG_DIODE, diode);
2085
2086         mutex_unlock(&data->update_lock);
2087         return count;
2088 }
2089
2090 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
2091                                        struct attribute *attr, int index)
2092 {
2093         struct device *dev = container_of(kobj, struct device, kobj);
2094         struct nct6775_data *data = dev_get_drvdata(dev);
2095         int temp = index / 10;  /* temp index */
2096         int nr = index % 10;    /* attribute index */
2097
2098         if (!(data->have_temp & (1 << temp)))
2099                 return 0;
2100
2101         if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0)
2102                 return 0;                               /* alarm */
2103
2104         if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0)
2105                 return 0;                               /* beep */
2106
2107         if (nr == 4 && !data->reg_temp[1][temp])        /* max */
2108                 return 0;
2109
2110         if (nr == 5 && !data->reg_temp[2][temp])        /* max_hyst */
2111                 return 0;
2112
2113         if (nr == 6 && !data->reg_temp[3][temp])        /* crit */
2114                 return 0;
2115
2116         if (nr == 7 && !data->reg_temp[4][temp])        /* lcrit */
2117                 return 0;
2118
2119         /* offset and type only apply to fixed sensors */
2120         if (nr > 7 && !(data->have_temp_fixed & (1 << temp)))
2121                 return 0;
2122
2123         return attr->mode;
2124 }
2125
2126 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", S_IRUGO, show_temp, NULL, 0, 0);
2127 SENSOR_TEMPLATE(temp_label, "temp%d_label", S_IRUGO, show_temp_label, NULL, 0);
2128 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", S_IRUGO | S_IWUSR, show_temp,
2129                   store_temp, 0, 1);
2130 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", S_IRUGO | S_IWUSR,
2131                   show_temp, store_temp, 0, 2);
2132 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", S_IRUGO | S_IWUSR, show_temp,
2133                   store_temp, 0, 3);
2134 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", S_IRUGO | S_IWUSR, show_temp,
2135                   store_temp, 0, 4);
2136 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", S_IRUGO | S_IWUSR,
2137                 show_temp_offset, store_temp_offset, 0);
2138 SENSOR_TEMPLATE(temp_type, "temp%d_type", S_IRUGO | S_IWUSR, show_temp_type,
2139                 store_temp_type, 0);
2140 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", S_IRUGO, show_temp_alarm, NULL, 0);
2141 SENSOR_TEMPLATE(temp_beep, "temp%d_beep", S_IRUGO | S_IWUSR, show_temp_beep,
2142                 store_temp_beep, 0);
2143
2144 /*
2145  * nct6775_temp_is_visible uses the index into the following array
2146  * to determine if attributes should be created or not.
2147  * Any change in order or content must be matched.
2148  */
2149 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
2150         &sensor_dev_template_temp_input,
2151         &sensor_dev_template_temp_label,
2152         &sensor_dev_template_temp_alarm,        /* 2 */
2153         &sensor_dev_template_temp_beep,         /* 3 */
2154         &sensor_dev_template_temp_max,          /* 4 */
2155         &sensor_dev_template_temp_max_hyst,     /* 5 */
2156         &sensor_dev_template_temp_crit,         /* 6 */
2157         &sensor_dev_template_temp_lcrit,        /* 7 */
2158         &sensor_dev_template_temp_offset,       /* 8 */
2159         &sensor_dev_template_temp_type,         /* 9 */
2160         NULL
2161 };
2162
2163 static struct sensor_template_group nct6775_temp_template_group = {
2164         .templates = nct6775_attributes_temp_template,
2165         .is_visible = nct6775_temp_is_visible,
2166         .base = 1,
2167 };
2168
2169 static ssize_t
2170 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
2171 {
2172         struct nct6775_data *data = nct6775_update_device(dev);
2173         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2174
2175         return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
2176 }
2177
2178 static ssize_t
2179 store_pwm_mode(struct device *dev, struct device_attribute *attr,
2180                const char *buf, size_t count)
2181 {
2182         struct nct6775_data *data = dev_get_drvdata(dev);
2183         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2184         int nr = sattr->index;
2185         unsigned long val;
2186         int err;
2187         u8 reg;
2188
2189         err = kstrtoul(buf, 10, &val);
2190         if (err < 0)
2191                 return err;
2192
2193         if (val > 1)
2194                 return -EINVAL;
2195
2196         /* Setting DC mode is not supported for all chips/channels */
2197         if (data->REG_PWM_MODE[nr] == 0) {
2198                 if (val)
2199                         return -EINVAL;
2200                 return count;
2201         }
2202
2203         mutex_lock(&data->update_lock);
2204         data->pwm_mode[nr] = val;
2205         reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
2206         reg &= ~data->PWM_MODE_MASK[nr];
2207         if (val)
2208                 reg |= data->PWM_MODE_MASK[nr];
2209         nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
2210         mutex_unlock(&data->update_lock);
2211         return count;
2212 }
2213
2214 static ssize_t
2215 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2216 {
2217         struct nct6775_data *data = nct6775_update_device(dev);
2218         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2219         int nr = sattr->nr;
2220         int index = sattr->index;
2221         int pwm;
2222
2223         /*
2224          * For automatic fan control modes, show current pwm readings.
2225          * Otherwise, show the configured value.
2226          */
2227         if (index == 0 && data->pwm_enable[nr] > manual)
2228                 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
2229         else
2230                 pwm = data->pwm[index][nr];
2231
2232         return sprintf(buf, "%d\n", pwm);
2233 }
2234
2235 static ssize_t
2236 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
2237           size_t count)
2238 {
2239         struct nct6775_data *data = dev_get_drvdata(dev);
2240         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2241         int nr = sattr->nr;
2242         int index = sattr->index;
2243         unsigned long val;
2244         int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
2245         int maxval[7]
2246           = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
2247         int err;
2248         u8 reg;
2249
2250         err = kstrtoul(buf, 10, &val);
2251         if (err < 0)
2252                 return err;
2253         val = clamp_val(val, minval[index], maxval[index]);
2254
2255         mutex_lock(&data->update_lock);
2256         data->pwm[index][nr] = val;
2257         nct6775_write_value(data, data->REG_PWM[index][nr], val);
2258         if (index == 2) { /* floor: disable if val == 0 */
2259                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2260                 reg &= 0x7f;
2261                 if (val)
2262                         reg |= 0x80;
2263                 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2264         }
2265         mutex_unlock(&data->update_lock);
2266         return count;
2267 }
2268
2269 /* Returns 0 if OK, -EINVAL otherwise */
2270 static int check_trip_points(struct nct6775_data *data, int nr)
2271 {
2272         int i;
2273
2274         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2275                 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
2276                         return -EINVAL;
2277         }
2278         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2279                 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
2280                         return -EINVAL;
2281         }
2282         /* validate critical temperature and pwm if enabled (pwm > 0) */
2283         if (data->auto_pwm[nr][data->auto_pwm_num]) {
2284                 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2285                                 data->auto_temp[nr][data->auto_pwm_num] ||
2286                     data->auto_pwm[nr][data->auto_pwm_num - 1] >
2287                                 data->auto_pwm[nr][data->auto_pwm_num])
2288                         return -EINVAL;
2289         }
2290         return 0;
2291 }
2292
2293 static void pwm_update_registers(struct nct6775_data *data, int nr)
2294 {
2295         u8 reg;
2296
2297         switch (data->pwm_enable[nr]) {
2298         case off:
2299         case manual:
2300                 break;
2301         case speed_cruise:
2302                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2303                 reg = (reg & ~data->tolerance_mask) |
2304                   (data->target_speed_tolerance[nr] & data->tolerance_mask);
2305                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2306                 nct6775_write_value(data, data->REG_TARGET[nr],
2307                                     data->target_speed[nr] & 0xff);
2308                 if (data->REG_TOLERANCE_H) {
2309                         reg = (data->target_speed[nr] >> 8) & 0x0f;
2310                         reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2311                         nct6775_write_value(data,
2312                                             data->REG_TOLERANCE_H[nr],
2313                                             reg);
2314                 }
2315                 break;
2316         case thermal_cruise:
2317                 nct6775_write_value(data, data->REG_TARGET[nr],
2318                                     data->target_temp[nr]);
2319                 /* intentional */
2320         default:
2321                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2322                 reg = (reg & ~data->tolerance_mask) |
2323                   data->temp_tolerance[0][nr];
2324                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2325                 break;
2326         }
2327 }
2328
2329 static ssize_t
2330 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2331 {
2332         struct nct6775_data *data = nct6775_update_device(dev);
2333         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2334
2335         return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2336 }
2337
2338 static ssize_t
2339 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2340                  const char *buf, size_t count)
2341 {
2342         struct nct6775_data *data = dev_get_drvdata(dev);
2343         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2344         int nr = sattr->index;
2345         unsigned long val;
2346         int err;
2347         u16 reg;
2348
2349         err = kstrtoul(buf, 10, &val);
2350         if (err < 0)
2351                 return err;
2352
2353         if (val > sf4)
2354                 return -EINVAL;
2355
2356         if (val == sf3 && data->kind != nct6775)
2357                 return -EINVAL;
2358
2359         if (val == sf4 && check_trip_points(data, nr)) {
2360                 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2361                 dev_err(dev, "Adjust trip points and try again\n");
2362                 return -EINVAL;
2363         }
2364
2365         mutex_lock(&data->update_lock);
2366         data->pwm_enable[nr] = val;
2367         if (val == off) {
2368                 /*
2369                  * turn off pwm control: select manual mode, set pwm to maximum
2370                  */
2371                 data->pwm[0][nr] = 255;
2372                 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2373         }
2374         pwm_update_registers(data, nr);
2375         reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2376         reg &= 0x0f;
2377         reg |= pwm_enable_to_reg(val) << 4;
2378         nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2379         mutex_unlock(&data->update_lock);
2380         return count;
2381 }
2382
2383 static ssize_t
2384 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2385 {
2386         int i, sel = 0;
2387
2388         for (i = 0; i < NUM_TEMP; i++) {
2389                 if (!(data->have_temp & (1 << i)))
2390                         continue;
2391                 if (src == data->temp_src[i]) {
2392                         sel = i + 1;
2393                         break;
2394                 }
2395         }
2396
2397         return sprintf(buf, "%d\n", sel);
2398 }
2399
2400 static ssize_t
2401 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2402 {
2403         struct nct6775_data *data = nct6775_update_device(dev);
2404         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2405         int index = sattr->index;
2406
2407         return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2408 }
2409
2410 static ssize_t
2411 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2412                    const char *buf, size_t count)
2413 {
2414         struct nct6775_data *data = nct6775_update_device(dev);
2415         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2416         int nr = sattr->index;
2417         unsigned long val;
2418         int err, reg, src;
2419
2420         err = kstrtoul(buf, 10, &val);
2421         if (err < 0)
2422                 return err;
2423         if (val == 0 || val > NUM_TEMP)
2424                 return -EINVAL;
2425         if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
2426                 return -EINVAL;
2427
2428         mutex_lock(&data->update_lock);
2429         src = data->temp_src[val - 1];
2430         data->pwm_temp_sel[nr] = src;
2431         reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2432         reg &= 0xe0;
2433         reg |= src;
2434         nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2435         mutex_unlock(&data->update_lock);
2436
2437         return count;
2438 }
2439
2440 static ssize_t
2441 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2442                          char *buf)
2443 {
2444         struct nct6775_data *data = nct6775_update_device(dev);
2445         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2446         int index = sattr->index;
2447
2448         return show_pwm_temp_sel_common(data, buf,
2449                                         data->pwm_weight_temp_sel[index]);
2450 }
2451
2452 static ssize_t
2453 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2454                           const char *buf, size_t count)
2455 {
2456         struct nct6775_data *data = nct6775_update_device(dev);
2457         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2458         int nr = sattr->index;
2459         unsigned long val;
2460         int err, reg, src;
2461
2462         err = kstrtoul(buf, 10, &val);
2463         if (err < 0)
2464                 return err;
2465         if (val > NUM_TEMP)
2466                 return -EINVAL;
2467         if (val && (!(data->have_temp & (1 << (val - 1))) ||
2468                     !data->temp_src[val - 1]))
2469                 return -EINVAL;
2470
2471         mutex_lock(&data->update_lock);
2472         if (val) {
2473                 src = data->temp_src[val - 1];
2474                 data->pwm_weight_temp_sel[nr] = src;
2475                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2476                 reg &= 0xe0;
2477                 reg |= (src | 0x80);
2478                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2479         } else {
2480                 data->pwm_weight_temp_sel[nr] = 0;
2481                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2482                 reg &= 0x7f;
2483                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2484         }
2485         mutex_unlock(&data->update_lock);
2486
2487         return count;
2488 }
2489
2490 static ssize_t
2491 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2492 {
2493         struct nct6775_data *data = nct6775_update_device(dev);
2494         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2495
2496         return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2497 }
2498
2499 static ssize_t
2500 store_target_temp(struct device *dev, struct device_attribute *attr,
2501                   const char *buf, size_t count)
2502 {
2503         struct nct6775_data *data = dev_get_drvdata(dev);
2504         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2505         int nr = sattr->index;
2506         unsigned long val;
2507         int err;
2508
2509         err = kstrtoul(buf, 10, &val);
2510         if (err < 0)
2511                 return err;
2512
2513         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2514                         data->target_temp_mask);
2515
2516         mutex_lock(&data->update_lock);
2517         data->target_temp[nr] = val;
2518         pwm_update_registers(data, nr);
2519         mutex_unlock(&data->update_lock);
2520         return count;
2521 }
2522
2523 static ssize_t
2524 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2525 {
2526         struct nct6775_data *data = nct6775_update_device(dev);
2527         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2528         int nr = sattr->index;
2529
2530         return sprintf(buf, "%d\n",
2531                        fan_from_reg16(data->target_speed[nr],
2532                                       data->fan_div[nr]));
2533 }
2534
2535 static ssize_t
2536 store_target_speed(struct device *dev, struct device_attribute *attr,
2537                    const char *buf, size_t count)
2538 {
2539         struct nct6775_data *data = dev_get_drvdata(dev);
2540         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2541         int nr = sattr->index;
2542         unsigned long val;
2543         int err;
2544         u16 speed;
2545
2546         err = kstrtoul(buf, 10, &val);
2547         if (err < 0)
2548                 return err;
2549
2550         val = clamp_val(val, 0, 1350000U);
2551         speed = fan_to_reg(val, data->fan_div[nr]);
2552
2553         mutex_lock(&data->update_lock);
2554         data->target_speed[nr] = speed;
2555         pwm_update_registers(data, nr);
2556         mutex_unlock(&data->update_lock);
2557         return count;
2558 }
2559
2560 static ssize_t
2561 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2562                     char *buf)
2563 {
2564         struct nct6775_data *data = nct6775_update_device(dev);
2565         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2566         int nr = sattr->nr;
2567         int index = sattr->index;
2568
2569         return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2570 }
2571
2572 static ssize_t
2573 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2574                      const char *buf, size_t count)
2575 {
2576         struct nct6775_data *data = dev_get_drvdata(dev);
2577         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2578         int nr = sattr->nr;
2579         int index = sattr->index;
2580         unsigned long val;
2581         int err;
2582
2583         err = kstrtoul(buf, 10, &val);
2584         if (err < 0)
2585                 return err;
2586
2587         /* Limit tolerance as needed */
2588         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2589
2590         mutex_lock(&data->update_lock);
2591         data->temp_tolerance[index][nr] = val;
2592         if (index)
2593                 pwm_update_registers(data, nr);
2594         else
2595                 nct6775_write_value(data,
2596                                     data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2597                                     val);
2598         mutex_unlock(&data->update_lock);
2599         return count;
2600 }
2601
2602 /*
2603  * Fan speed tolerance is a tricky beast, since the associated register is
2604  * a tick counter, but the value is reported and configured as rpm.
2605  * Compute resulting low and high rpm values and report the difference.
2606  */
2607 static ssize_t
2608 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2609                      char *buf)
2610 {
2611         struct nct6775_data *data = nct6775_update_device(dev);
2612         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2613         int nr = sattr->index;
2614         int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2615         int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2616         int tolerance;
2617
2618         if (low <= 0)
2619                 low = 1;
2620         if (high > 0xffff)
2621                 high = 0xffff;
2622         if (high < low)
2623                 high = low;
2624
2625         tolerance = (fan_from_reg16(low, data->fan_div[nr])
2626                      - fan_from_reg16(high, data->fan_div[nr])) / 2;
2627
2628         return sprintf(buf, "%d\n", tolerance);
2629 }
2630
2631 static ssize_t
2632 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2633                       const char *buf, size_t count)
2634 {
2635         struct nct6775_data *data = dev_get_drvdata(dev);
2636         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2637         int nr = sattr->index;
2638         unsigned long val;
2639         int err;
2640         int low, high;
2641
2642         err = kstrtoul(buf, 10, &val);
2643         if (err < 0)
2644                 return err;
2645
2646         high = fan_from_reg16(data->target_speed[nr],
2647                               data->fan_div[nr]) + val;
2648         low = fan_from_reg16(data->target_speed[nr],
2649                              data->fan_div[nr]) - val;
2650         if (low <= 0)
2651                 low = 1;
2652         if (high < low)
2653                 high = low;
2654
2655         val = (fan_to_reg(low, data->fan_div[nr]) -
2656                fan_to_reg(high, data->fan_div[nr])) / 2;
2657
2658         /* Limit tolerance as needed */
2659         val = clamp_val(val, 0, data->speed_tolerance_limit);
2660
2661         mutex_lock(&data->update_lock);
2662         data->target_speed_tolerance[nr] = val;
2663         pwm_update_registers(data, nr);
2664         mutex_unlock(&data->update_lock);
2665         return count;
2666 }
2667
2668 SENSOR_TEMPLATE_2(pwm, "pwm%d", S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2669 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", S_IWUSR | S_IRUGO, show_pwm_mode,
2670                 store_pwm_mode, 0);
2671 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", S_IWUSR | S_IRUGO, show_pwm_enable,
2672                 store_pwm_enable, 0);
2673 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", S_IWUSR | S_IRUGO,
2674                 show_pwm_temp_sel, store_pwm_temp_sel, 0);
2675 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", S_IWUSR | S_IRUGO,
2676                 show_target_temp, store_target_temp, 0);
2677 SENSOR_TEMPLATE(fan_target, "fan%d_target", S_IWUSR | S_IRUGO,
2678                 show_target_speed, store_target_speed, 0);
2679 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", S_IWUSR | S_IRUGO,
2680                 show_speed_tolerance, store_speed_tolerance, 0);
2681
2682 /* Smart Fan registers */
2683
2684 static ssize_t
2685 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2686 {
2687         struct nct6775_data *data = nct6775_update_device(dev);
2688         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2689         int nr = sattr->nr;
2690         int index = sattr->index;
2691
2692         return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2693 }
2694
2695 static ssize_t
2696 store_weight_temp(struct device *dev, struct device_attribute *attr,
2697                   const char *buf, size_t count)
2698 {
2699         struct nct6775_data *data = dev_get_drvdata(dev);
2700         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2701         int nr = sattr->nr;
2702         int index = sattr->index;
2703         unsigned long val;
2704         int err;
2705
2706         err = kstrtoul(buf, 10, &val);
2707         if (err < 0)
2708                 return err;
2709
2710         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2711
2712         mutex_lock(&data->update_lock);
2713         data->weight_temp[index][nr] = val;
2714         nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2715         mutex_unlock(&data->update_lock);
2716         return count;
2717 }
2718
2719 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", S_IWUSR | S_IRUGO,
2720                   show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
2721 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step",
2722                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 0);
2723 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol",
2724                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 1);
2725 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base",
2726                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 2);
2727 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step",
2728                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 5);
2729 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base",
2730                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 6);
2731
2732 static ssize_t
2733 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2734 {
2735         struct nct6775_data *data = nct6775_update_device(dev);
2736         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2737         int nr = sattr->nr;
2738         int index = sattr->index;
2739
2740         return sprintf(buf, "%d\n",
2741                        step_time_from_reg(data->fan_time[index][nr],
2742                                           data->pwm_mode[nr]));
2743 }
2744
2745 static ssize_t
2746 store_fan_time(struct device *dev, struct device_attribute *attr,
2747                const char *buf, size_t count)
2748 {
2749         struct nct6775_data *data = dev_get_drvdata(dev);
2750         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2751         int nr = sattr->nr;
2752         int index = sattr->index;
2753         unsigned long val;
2754         int err;
2755
2756         err = kstrtoul(buf, 10, &val);
2757         if (err < 0)
2758                 return err;
2759
2760         val = step_time_to_reg(val, data->pwm_mode[nr]);
2761         mutex_lock(&data->update_lock);
2762         data->fan_time[index][nr] = val;
2763         nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2764         mutex_unlock(&data->update_lock);
2765         return count;
2766 }
2767
2768 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
2769 static ssize_t
2770 show_name(struct device *dev, struct device_attribute *attr, char *buf)
2771 {
2772         struct nct6775_data *data = dev_get_drvdata(dev);
2773
2774         return sprintf(buf, "%s\n", data->name);
2775 }
2776
2777 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
2778 #endif
2779
2780 static ssize_t
2781 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2782 {
2783         struct nct6775_data *data = nct6775_update_device(dev);
2784         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2785
2786         return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2787 }
2788
2789 static ssize_t
2790 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2791                const char *buf, size_t count)
2792 {
2793         struct nct6775_data *data = dev_get_drvdata(dev);
2794         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2795         int nr = sattr->nr;
2796         int point = sattr->index;
2797         unsigned long val;
2798         int err;
2799         u8 reg;
2800
2801         err = kstrtoul(buf, 10, &val);
2802         if (err < 0)
2803                 return err;
2804         if (val > 255)
2805                 return -EINVAL;
2806
2807         if (point == data->auto_pwm_num) {
2808                 if (data->kind != nct6775 && !val)
2809                         return -EINVAL;
2810                 if (data->kind != nct6779 && val)
2811                         val = 0xff;
2812         }
2813
2814         mutex_lock(&data->update_lock);
2815         data->auto_pwm[nr][point] = val;
2816         if (point < data->auto_pwm_num) {
2817                 nct6775_write_value(data,
2818                                     NCT6775_AUTO_PWM(data, nr, point),
2819                                     data->auto_pwm[nr][point]);
2820         } else {
2821                 switch (data->kind) {
2822                 case nct6775:
2823                         /* disable if needed (pwm == 0) */
2824                         reg = nct6775_read_value(data,
2825                                                  NCT6775_REG_CRITICAL_ENAB[nr]);
2826                         if (val)
2827                                 reg |= 0x02;
2828                         else
2829                                 reg &= ~0x02;
2830                         nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
2831                                             reg);
2832                         break;
2833                 case nct6776:
2834                         break; /* always enabled, nothing to do */
2835                 case nct6106:
2836                 case nct6779:
2837                 case nct6791:
2838                 case nct6792:
2839                         nct6775_write_value(data, data->REG_CRITICAL_PWM[nr],
2840                                             val);
2841                         reg = nct6775_read_value(data,
2842                                         data->REG_CRITICAL_PWM_ENABLE[nr]);
2843                         if (val == 255)
2844                                 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
2845                         else
2846                                 reg |= data->CRITICAL_PWM_ENABLE_MASK;
2847                         nct6775_write_value(data,
2848                                             data->REG_CRITICAL_PWM_ENABLE[nr],
2849                                             reg);
2850                         break;
2851                 }
2852         }
2853         mutex_unlock(&data->update_lock);
2854         return count;
2855 }
2856
2857 static ssize_t
2858 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
2859 {
2860         struct nct6775_data *data = nct6775_update_device(dev);
2861         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2862         int nr = sattr->nr;
2863         int point = sattr->index;
2864
2865         /*
2866          * We don't know for sure if the temperature is signed or unsigned.
2867          * Assume it is unsigned.
2868          */
2869         return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
2870 }
2871
2872 static ssize_t
2873 store_auto_temp(struct device *dev, struct device_attribute *attr,
2874                 const char *buf, size_t count)
2875 {
2876         struct nct6775_data *data = dev_get_drvdata(dev);
2877         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2878         int nr = sattr->nr;
2879         int point = sattr->index;
2880         unsigned long val;
2881         int err;
2882
2883         err = kstrtoul(buf, 10, &val);
2884         if (err)
2885                 return err;
2886         if (val > 255000)
2887                 return -EINVAL;
2888
2889         mutex_lock(&data->update_lock);
2890         data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
2891         if (point < data->auto_pwm_num) {
2892                 nct6775_write_value(data,
2893                                     NCT6775_AUTO_TEMP(data, nr, point),
2894                                     data->auto_temp[nr][point]);
2895         } else {
2896                 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
2897                                     data->auto_temp[nr][point]);
2898         }
2899         mutex_unlock(&data->update_lock);
2900         return count;
2901 }
2902
2903 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
2904                                       struct attribute *attr, int index)
2905 {
2906         struct device *dev = container_of(kobj, struct device, kobj);
2907         struct nct6775_data *data = dev_get_drvdata(dev);
2908         int pwm = index / 36;   /* pwm index */
2909         int nr = index % 36;    /* attribute index */
2910
2911         if (!(data->has_pwm & (1 << pwm)))
2912                 return 0;
2913
2914         if ((nr >= 14 && nr <= 18) || nr == 21)   /* weight */
2915                 if (!data->REG_WEIGHT_TEMP_SEL[pwm])
2916                         return 0;
2917         if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
2918                 return 0;
2919         if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
2920                 return 0;
2921         if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
2922                 return 0;
2923
2924         if (nr >= 22 && nr <= 35) {             /* auto point */
2925                 int api = (nr - 22) / 2;        /* auto point index */
2926
2927                 if (api > data->auto_pwm_num)
2928                         return 0;
2929         }
2930         return attr->mode;
2931 }
2932
2933 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", S_IWUSR | S_IRUGO,
2934                   show_fan_time, store_fan_time, 0, 0);
2935 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", S_IWUSR | S_IRUGO,
2936                   show_fan_time, store_fan_time, 0, 1);
2937 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", S_IWUSR | S_IRUGO,
2938                   show_fan_time, store_fan_time, 0, 2);
2939 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", S_IWUSR | S_IRUGO, show_pwm,
2940                   store_pwm, 0, 1);
2941 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", S_IWUSR | S_IRUGO, show_pwm,
2942                   store_pwm, 0, 2);
2943 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", S_IWUSR | S_IRUGO,
2944                   show_temp_tolerance, store_temp_tolerance, 0, 0);
2945 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance",
2946                   S_IWUSR | S_IRUGO, show_temp_tolerance, store_temp_tolerance,
2947                   0, 1);
2948
2949 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2950                   0, 3);
2951
2952 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", S_IWUSR | S_IRUGO, show_pwm,
2953                   store_pwm, 0, 4);
2954
2955 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm",
2956                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 0);
2957 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp",
2958                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 0);
2959
2960 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm",
2961                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 1);
2962 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp",
2963                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 1);
2964
2965 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm",
2966                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 2);
2967 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp",
2968                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 2);
2969
2970 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm",
2971                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 3);
2972 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp",
2973                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 3);
2974
2975 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm",
2976                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 4);
2977 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp",
2978                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 4);
2979
2980 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm",
2981                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 5);
2982 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp",
2983                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 5);
2984
2985 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm",
2986                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 6);
2987 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp",
2988                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 6);
2989
2990 /*
2991  * nct6775_pwm_is_visible uses the index into the following array
2992  * to determine if attributes should be created or not.
2993  * Any change in order or content must be matched.
2994  */
2995 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
2996         &sensor_dev_template_pwm,
2997         &sensor_dev_template_pwm_mode,
2998         &sensor_dev_template_pwm_enable,
2999         &sensor_dev_template_pwm_temp_sel,
3000         &sensor_dev_template_pwm_temp_tolerance,
3001         &sensor_dev_template_pwm_crit_temp_tolerance,
3002         &sensor_dev_template_pwm_target_temp,
3003         &sensor_dev_template_fan_target,
3004         &sensor_dev_template_fan_tolerance,
3005         &sensor_dev_template_pwm_stop_time,
3006         &sensor_dev_template_pwm_step_up_time,
3007         &sensor_dev_template_pwm_step_down_time,
3008         &sensor_dev_template_pwm_start,
3009         &sensor_dev_template_pwm_floor,
3010         &sensor_dev_template_pwm_weight_temp_sel,       /* 14 */
3011         &sensor_dev_template_pwm_weight_temp_step,
3012         &sensor_dev_template_pwm_weight_temp_step_tol,
3013         &sensor_dev_template_pwm_weight_temp_step_base,
3014         &sensor_dev_template_pwm_weight_duty_step,      /* 18 */
3015         &sensor_dev_template_pwm_max,                   /* 19 */
3016         &sensor_dev_template_pwm_step,                  /* 20 */
3017         &sensor_dev_template_pwm_weight_duty_base,      /* 21 */
3018         &sensor_dev_template_pwm_auto_point1_pwm,       /* 22 */
3019         &sensor_dev_template_pwm_auto_point1_temp,
3020         &sensor_dev_template_pwm_auto_point2_pwm,
3021         &sensor_dev_template_pwm_auto_point2_temp,
3022         &sensor_dev_template_pwm_auto_point3_pwm,
3023         &sensor_dev_template_pwm_auto_point3_temp,
3024         &sensor_dev_template_pwm_auto_point4_pwm,
3025         &sensor_dev_template_pwm_auto_point4_temp,
3026         &sensor_dev_template_pwm_auto_point5_pwm,
3027         &sensor_dev_template_pwm_auto_point5_temp,
3028         &sensor_dev_template_pwm_auto_point6_pwm,
3029         &sensor_dev_template_pwm_auto_point6_temp,
3030         &sensor_dev_template_pwm_auto_point7_pwm,
3031         &sensor_dev_template_pwm_auto_point7_temp,      /* 35 */
3032
3033         NULL
3034 };
3035
3036 static struct sensor_template_group nct6775_pwm_template_group = {
3037         .templates = nct6775_attributes_pwm_template,
3038         .is_visible = nct6775_pwm_is_visible,
3039         .base = 1,
3040 };
3041
3042 static ssize_t
3043 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
3044 {
3045         struct nct6775_data *data = dev_get_drvdata(dev);
3046
3047         return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
3048 }
3049
3050 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
3051
3052 /* Case open detection */
3053
3054 static ssize_t
3055 clear_caseopen(struct device *dev, struct device_attribute *attr,
3056                const char *buf, size_t count)
3057 {
3058         struct nct6775_data *data = dev_get_drvdata(dev);
3059         int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
3060         unsigned long val;
3061         u8 reg;
3062         int ret;
3063
3064         if (kstrtoul(buf, 10, &val) || val != 0)
3065                 return -EINVAL;
3066
3067         mutex_lock(&data->update_lock);
3068
3069         /*
3070          * Use CR registers to clear caseopen status.
3071          * The CR registers are the same for all chips, and not all chips
3072          * support clearing the caseopen status through "regular" registers.
3073          */
3074         ret = superio_enter(data->sioreg);
3075         if (ret) {
3076                 count = ret;
3077                 goto error;
3078         }
3079
3080         superio_select(data->sioreg, NCT6775_LD_ACPI);
3081         reg = superio_inb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
3082         reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3083         superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3084         reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3085         superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3086         superio_exit(data->sioreg);
3087
3088         data->valid = false;    /* Force cache refresh */
3089 error:
3090         mutex_unlock(&data->update_lock);
3091         return count;
3092 }
3093
3094 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
3095                           clear_caseopen, INTRUSION_ALARM_BASE);
3096 static SENSOR_DEVICE_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
3097                           clear_caseopen, INTRUSION_ALARM_BASE + 1);
3098 static SENSOR_DEVICE_ATTR(intrusion0_beep, S_IWUSR | S_IRUGO, show_beep,
3099                           store_beep, INTRUSION_ALARM_BASE);
3100 static SENSOR_DEVICE_ATTR(intrusion1_beep, S_IWUSR | S_IRUGO, show_beep,
3101                           store_beep, INTRUSION_ALARM_BASE + 1);
3102 static SENSOR_DEVICE_ATTR(beep_enable, S_IWUSR | S_IRUGO, show_beep,
3103                           store_beep, BEEP_ENABLE_BASE);
3104
3105 static umode_t nct6775_other_is_visible(struct kobject *kobj,
3106                                         struct attribute *attr, int index)
3107 {
3108         struct device *dev = container_of(kobj, struct device, kobj);
3109         struct nct6775_data *data = dev_get_drvdata(dev);
3110
3111         if (index == 0 && !data->have_vid)
3112                 return 0;
3113
3114         if (index == 1 || index == 2) {
3115                 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + index - 1] < 0)
3116                         return 0;
3117         }
3118
3119         if (index == 3 || index == 4) {
3120                 if (data->BEEP_BITS[INTRUSION_ALARM_BASE + index - 3] < 0)
3121                         return 0;
3122         }
3123
3124         return attr->mode;
3125 }
3126
3127 /*
3128  * nct6775_other_is_visible uses the index into the following array
3129  * to determine if attributes should be created or not.
3130  * Any change in order or content must be matched.
3131  */
3132 static struct attribute *nct6775_attributes_other[] = {
3133         &dev_attr_cpu0_vid.attr,                                /* 0 */
3134         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,        /* 1 */
3135         &sensor_dev_attr_intrusion1_alarm.dev_attr.attr,        /* 2 */
3136         &sensor_dev_attr_intrusion0_beep.dev_attr.attr,         /* 3 */
3137         &sensor_dev_attr_intrusion1_beep.dev_attr.attr,         /* 4 */
3138         &sensor_dev_attr_beep_enable.dev_attr.attr,             /* 5 */
3139 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
3140         &dev_attr_name.attr,
3141 #endif
3142         NULL
3143 };
3144
3145 static const struct attribute_group nct6775_group_other = {
3146         .attrs = nct6775_attributes_other,
3147         .is_visible = nct6775_other_is_visible,
3148 };
3149
3150 static inline void nct6775_init_device(struct nct6775_data *data)
3151 {
3152         int i;
3153         u8 tmp, diode;
3154
3155         /* Start monitoring if needed */
3156         if (data->REG_CONFIG) {
3157                 tmp = nct6775_read_value(data, data->REG_CONFIG);
3158                 if (!(tmp & 0x01))
3159                         nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
3160         }
3161
3162         /* Enable temperature sensors if needed */
3163         for (i = 0; i < NUM_TEMP; i++) {
3164                 if (!(data->have_temp & (1 << i)))
3165                         continue;
3166                 if (!data->reg_temp_config[i])
3167                         continue;
3168                 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
3169                 if (tmp & 0x01)
3170                         nct6775_write_value(data, data->reg_temp_config[i],
3171                                             tmp & 0xfe);
3172         }
3173
3174         /* Enable VBAT monitoring if needed */
3175         tmp = nct6775_read_value(data, data->REG_VBAT);
3176         if (!(tmp & 0x01))
3177                 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
3178
3179         diode = nct6775_read_value(data, data->REG_DIODE);
3180
3181         for (i = 0; i < data->temp_fixed_num; i++) {
3182                 if (!(data->have_temp_fixed & (1 << i)))
3183                         continue;
3184                 if ((tmp & (data->DIODE_MASK << i)))    /* diode */
3185                         data->temp_type[i]
3186                           = 3 - ((diode >> i) & data->DIODE_MASK);
3187                 else                            /* thermistor */
3188                         data->temp_type[i] = 4;
3189         }
3190 }
3191
3192 static void
3193 nct6775_check_fan_inputs(struct nct6775_data *data)
3194 {
3195         bool fan3pin, fan4pin, fan4min, fan5pin, fan6pin;
3196         bool pwm3pin, pwm4pin, pwm5pin, pwm6pin;
3197         int sioreg = data->sioreg;
3198         int regval;
3199
3200         /* Store SIO_REG_ENABLE for use during resume */
3201         superio_select(sioreg, NCT6775_LD_HWM);
3202         data->sio_reg_enable = superio_inb(sioreg, SIO_REG_ENABLE);
3203
3204         /* fan4 and fan5 share some pins with the GPIO and serial flash */
3205         if (data->kind == nct6775) {
3206                 regval = superio_inb(sioreg, 0x2c);
3207
3208                 fan3pin = regval & (1 << 6);
3209                 pwm3pin = regval & (1 << 7);
3210
3211                 /* On NCT6775, fan4 shares pins with the fdc interface */
3212                 fan4pin = !(superio_inb(sioreg, 0x2A) & 0x80);
3213                 fan4min = false;
3214                 fan5pin = false;
3215                 fan6pin = false;
3216                 pwm4pin = false;
3217                 pwm5pin = false;
3218                 pwm6pin = false;
3219         } else if (data->kind == nct6776) {
3220                 bool gpok = superio_inb(sioreg, 0x27) & 0x80;
3221
3222                 if (data->sio_reg_enable & 0x80)
3223                         fan3pin = gpok;
3224                 else
3225                         fan3pin = !(superio_inb(sioreg, 0x24) & 0x40);
3226
3227                 if (data->sio_reg_enable & 0x40)
3228                         fan4pin = gpok;
3229                 else
3230                         fan4pin = superio_inb(sioreg, 0x1C) & 0x01;
3231
3232                 if (data->sio_reg_enable & 0x20)
3233                         fan5pin = gpok;
3234                 else
3235                         fan5pin = superio_inb(sioreg, 0x1C) & 0x02;
3236
3237                 fan4min = fan4pin;
3238                 fan6pin = false;
3239                 pwm3pin = fan3pin;
3240                 pwm4pin = false;
3241                 pwm5pin = false;
3242                 pwm6pin = false;
3243         } else if (data->kind == nct6106) {
3244                 regval = superio_inb(sioreg, 0x24);
3245                 fan3pin = !(regval & 0x80);
3246                 pwm3pin = regval & 0x08;
3247
3248                 fan4pin = false;
3249                 fan4min = false;
3250                 fan5pin = false;
3251                 fan6pin = false;
3252                 pwm4pin = false;
3253                 pwm5pin = false;
3254                 pwm6pin = false;
3255         } else {        /* NCT6779D, NCT6791D, or NCT6792D */
3256                 regval = superio_inb(sioreg, 0x1c);
3257
3258                 fan3pin = !(regval & (1 << 5));
3259                 fan4pin = !(regval & (1 << 6));
3260                 fan5pin = !(regval & (1 << 7));
3261
3262                 pwm3pin = !(regval & (1 << 0));
3263                 pwm4pin = !(regval & (1 << 1));
3264                 pwm5pin = !(regval & (1 << 2));
3265
3266                 fan4min = fan4pin;
3267
3268                 if (data->kind == nct6791 || data->kind == nct6792) {
3269                         regval = superio_inb(sioreg, 0x2d);
3270                         fan6pin = (regval & (1 << 1));
3271                         pwm6pin = (regval & (1 << 0));
3272                 } else {        /* NCT6779D */
3273                         fan6pin = false;
3274                         pwm6pin = false;
3275                 }
3276         }
3277
3278         /* fan 1 and 2 (0x03) are always present */
3279         data->has_fan = 0x03 | (fan3pin << 2) | (fan4pin << 3) |
3280                 (fan5pin << 4) | (fan6pin << 5);
3281         data->has_fan_min = 0x03 | (fan3pin << 2) | (fan4min << 3) |
3282                 (fan5pin << 4);
3283         data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) |
3284                 (pwm5pin << 4) | (pwm6pin << 5);
3285 }
3286
3287 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
3288                              int *available, int *mask)
3289 {
3290         int i;
3291         u8 src;
3292
3293         for (i = 0; i < data->pwm_num && *available; i++) {
3294                 int index;
3295
3296                 if (!regp[i])
3297                         continue;
3298                 src = nct6775_read_value(data, regp[i]);
3299                 src &= 0x1f;
3300                 if (!src || (*mask & (1 << src)))
3301                         continue;
3302                 if (src >= data->temp_label_num ||
3303                     !strlen(data->temp_label[src]))
3304                         continue;
3305
3306                 index = __ffs(*available);
3307                 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3308                 *available &= ~(1 << index);
3309                 *mask |= 1 << src;
3310         }
3311 }
3312
3313 static int nct6775_probe(struct platform_device *pdev)
3314 {
3315         struct device *dev = &pdev->dev;
3316         struct nct6775_sio_data *sio_data = dev_get_platdata(dev);
3317         struct nct6775_data *data;
3318         struct resource *res;
3319         int i, s, err = 0;
3320         int src, mask, available;
3321         const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3322         const u16 *reg_temp_mon, *reg_temp_alternate, *reg_temp_crit;
3323         const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL;
3324         int num_reg_temp, num_reg_temp_mon;
3325         u8 cr2a;
3326         struct attribute_group *group;
3327         struct device *hwmon_dev;
3328         int num_attr_groups = 0;
3329
3330         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3331         if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3332                                  DRVNAME))
3333                 return -EBUSY;
3334
3335         data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3336                             GFP_KERNEL);
3337         if (!data)
3338                 return -ENOMEM;
3339
3340         data->kind = sio_data->kind;
3341         data->sioreg = sio_data->sioreg;
3342         data->addr = res->start;
3343         mutex_init(&data->update_lock);
3344         data->name = nct6775_device_names[data->kind];
3345         data->bank = 0xff;              /* Force initial bank selection */
3346         platform_set_drvdata(pdev, data);
3347
3348         switch (data->kind) {
3349         case nct6106:
3350                 data->in_num = 9;
3351                 data->pwm_num = 3;
3352                 data->auto_pwm_num = 4;
3353                 data->temp_fixed_num = 3;
3354                 data->num_temp_alarms = 6;
3355                 data->num_temp_beeps = 6;
3356
3357                 data->fan_from_reg = fan_from_reg13;
3358                 data->fan_from_reg_min = fan_from_reg13;
3359
3360                 data->temp_label = nct6776_temp_label;
3361                 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3362
3363                 data->REG_VBAT = NCT6106_REG_VBAT;
3364                 data->REG_DIODE = NCT6106_REG_DIODE;
3365                 data->DIODE_MASK = NCT6106_DIODE_MASK;
3366                 data->REG_VIN = NCT6106_REG_IN;
3367                 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3368                 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3369                 data->REG_TARGET = NCT6106_REG_TARGET;
3370                 data->REG_FAN = NCT6106_REG_FAN;
3371                 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
3372                 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
3373                 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
3374                 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
3375                 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
3376                 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
3377                 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
3378                 data->REG_PWM[0] = NCT6106_REG_PWM;
3379                 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
3380                 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
3381                 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3382                 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3383                 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3384                 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3385                 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3386                 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
3387                 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
3388                 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
3389                 data->REG_CRITICAL_TEMP_TOLERANCE
3390                   = NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
3391                 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
3392                 data->CRITICAL_PWM_ENABLE_MASK
3393                   = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3394                 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
3395                 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3396                 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3397                 data->REG_TEMP_SEL = NCT6106_REG_TEMP_SEL;
3398                 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3399                 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3400                 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3401                 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3402                 data->REG_ALARM = NCT6106_REG_ALARM;
3403                 data->ALARM_BITS = NCT6106_ALARM_BITS;
3404                 data->REG_BEEP = NCT6106_REG_BEEP;
3405                 data->BEEP_BITS = NCT6106_BEEP_BITS;
3406
3407                 reg_temp = NCT6106_REG_TEMP;
3408                 reg_temp_mon = NCT6106_REG_TEMP_MON;
3409                 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3410                 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON);
3411                 reg_temp_over = NCT6106_REG_TEMP_OVER;
3412                 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3413                 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3414                 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3415                 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3416                 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3417                 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3418
3419                 break;
3420         case nct6775:
3421                 data->in_num = 9;
3422                 data->pwm_num = 3;
3423                 data->auto_pwm_num = 6;
3424                 data->has_fan_div = true;
3425                 data->temp_fixed_num = 3;
3426                 data->num_temp_alarms = 3;
3427                 data->num_temp_beeps = 3;
3428
3429                 data->ALARM_BITS = NCT6775_ALARM_BITS;
3430                 data->BEEP_BITS = NCT6775_BEEP_BITS;
3431
3432                 data->fan_from_reg = fan_from_reg16;
3433                 data->fan_from_reg_min = fan_from_reg8;
3434                 data->target_temp_mask = 0x7f;
3435                 data->tolerance_mask = 0x0f;
3436                 data->speed_tolerance_limit = 15;
3437
3438                 data->temp_label = nct6775_temp_label;
3439                 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
3440
3441                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3442                 data->REG_VBAT = NCT6775_REG_VBAT;
3443                 data->REG_DIODE = NCT6775_REG_DIODE;
3444                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3445                 data->REG_VIN = NCT6775_REG_IN;
3446                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3447                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3448                 data->REG_TARGET = NCT6775_REG_TARGET;
3449                 data->REG_FAN = NCT6775_REG_FAN;
3450                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3451                 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3452                 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3453                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3454                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3455                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3456                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3457                 data->REG_PWM[0] = NCT6775_REG_PWM;
3458                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3459                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3460                 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3461                 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3462                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3463                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3464                 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3465                 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3466                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3467                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3468                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3469                 data->REG_CRITICAL_TEMP_TOLERANCE
3470                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3471                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3472                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3473                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3474                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3475                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3476                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3477                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3478                 data->REG_ALARM = NCT6775_REG_ALARM;
3479                 data->REG_BEEP = NCT6775_REG_BEEP;
3480
3481                 reg_temp = NCT6775_REG_TEMP;
3482                 reg_temp_mon = NCT6775_REG_TEMP_MON;
3483                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3484                 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3485                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3486                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3487                 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3488                 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3489                 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3490
3491                 break;
3492         case nct6776:
3493                 data->in_num = 9;
3494                 data->pwm_num = 3;
3495                 data->auto_pwm_num = 4;
3496                 data->has_fan_div = false;
3497                 data->temp_fixed_num = 3;
3498                 data->num_temp_alarms = 3;
3499                 data->num_temp_beeps = 6;
3500
3501                 data->ALARM_BITS = NCT6776_ALARM_BITS;
3502                 data->BEEP_BITS = NCT6776_BEEP_BITS;
3503
3504                 data->fan_from_reg = fan_from_reg13;
3505                 data->fan_from_reg_min = fan_from_reg13;
3506                 data->target_temp_mask = 0xff;
3507                 data->tolerance_mask = 0x07;
3508                 data->speed_tolerance_limit = 63;
3509
3510                 data->temp_label = nct6776_temp_label;
3511                 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3512
3513                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3514                 data->REG_VBAT = NCT6775_REG_VBAT;
3515                 data->REG_DIODE = NCT6775_REG_DIODE;
3516                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3517                 data->REG_VIN = NCT6775_REG_IN;
3518                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3519                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3520                 data->REG_TARGET = NCT6775_REG_TARGET;
3521                 data->REG_FAN = NCT6775_REG_FAN;
3522                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3523                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3524                 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3525                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3526                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3527                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3528                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3529                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3530                 data->REG_PWM[0] = NCT6775_REG_PWM;
3531                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3532                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3533                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3534                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3535                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3536                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3537                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3538                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3539                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3540                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3541                 data->REG_CRITICAL_TEMP_TOLERANCE
3542                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3543                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3544                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3545                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3546                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3547                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3548                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3549                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3550                 data->REG_ALARM = NCT6775_REG_ALARM;
3551                 data->REG_BEEP = NCT6776_REG_BEEP;
3552
3553                 reg_temp = NCT6775_REG_TEMP;
3554                 reg_temp_mon = NCT6775_REG_TEMP_MON;
3555                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3556                 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3557                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3558                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3559                 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3560                 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3561                 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3562
3563                 break;
3564         case nct6779:
3565                 data->in_num = 15;
3566                 data->pwm_num = 5;
3567                 data->auto_pwm_num = 4;
3568                 data->has_fan_div = false;
3569                 data->temp_fixed_num = 6;
3570                 data->num_temp_alarms = 2;
3571                 data->num_temp_beeps = 2;
3572
3573                 data->ALARM_BITS = NCT6779_ALARM_BITS;
3574                 data->BEEP_BITS = NCT6779_BEEP_BITS;
3575
3576                 data->fan_from_reg = fan_from_reg13;
3577                 data->fan_from_reg_min = fan_from_reg13;
3578                 data->target_temp_mask = 0xff;
3579                 data->tolerance_mask = 0x07;
3580                 data->speed_tolerance_limit = 63;
3581
3582                 data->temp_label = nct6779_temp_label;
3583                 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3584
3585                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3586                 data->REG_VBAT = NCT6775_REG_VBAT;
3587                 data->REG_DIODE = NCT6775_REG_DIODE;
3588                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3589                 data->REG_VIN = NCT6779_REG_IN;
3590                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3591                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3592                 data->REG_TARGET = NCT6775_REG_TARGET;
3593                 data->REG_FAN = NCT6779_REG_FAN;
3594                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3595                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3596                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3597                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3598                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3599                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3600                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3601                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3602                 data->REG_PWM[0] = NCT6775_REG_PWM;
3603                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3604                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3605                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3606                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3607                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3608                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3609                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3610                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3611                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3612                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3613                 data->REG_CRITICAL_TEMP_TOLERANCE
3614                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3615                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3616                 data->CRITICAL_PWM_ENABLE_MASK
3617                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3618                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3619                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3620                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3621                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3622                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3623                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3624                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3625                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3626                 data->REG_ALARM = NCT6779_REG_ALARM;
3627                 data->REG_BEEP = NCT6776_REG_BEEP;
3628
3629                 reg_temp = NCT6779_REG_TEMP;
3630                 reg_temp_mon = NCT6779_REG_TEMP_MON;
3631                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3632                 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3633                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3634                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3635                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3636                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3637                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3638
3639                 break;
3640         case nct6791:
3641         case nct6792:
3642                 data->in_num = 15;
3643                 data->pwm_num = 6;
3644                 data->auto_pwm_num = 4;
3645                 data->has_fan_div = false;
3646                 data->temp_fixed_num = 6;
3647                 data->num_temp_alarms = 2;
3648                 data->num_temp_beeps = 2;
3649
3650                 data->ALARM_BITS = NCT6791_ALARM_BITS;
3651                 data->BEEP_BITS = NCT6779_BEEP_BITS;
3652
3653                 data->fan_from_reg = fan_from_reg13;
3654                 data->fan_from_reg_min = fan_from_reg13;
3655                 data->target_temp_mask = 0xff;
3656                 data->tolerance_mask = 0x07;
3657                 data->speed_tolerance_limit = 63;
3658
3659                 data->temp_label = nct6779_temp_label;
3660                 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3661
3662                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3663                 data->REG_VBAT = NCT6775_REG_VBAT;
3664                 data->REG_DIODE = NCT6775_REG_DIODE;
3665                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3666                 data->REG_VIN = NCT6779_REG_IN;
3667                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3668                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3669                 data->REG_TARGET = NCT6775_REG_TARGET;
3670                 data->REG_FAN = NCT6779_REG_FAN;
3671                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3672                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3673                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3674                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3675                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3676                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3677                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3678                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3679                 data->REG_PWM[0] = NCT6775_REG_PWM;
3680                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3681                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3682                 data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP;
3683                 data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE;
3684                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3685                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3686                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3687                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3688                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3689                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3690                 data->REG_CRITICAL_TEMP_TOLERANCE
3691                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3692                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3693                 data->CRITICAL_PWM_ENABLE_MASK
3694                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3695                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3696                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3697                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3698                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3699                 data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL;
3700                 data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP;
3701                 data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL;
3702                 data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE;
3703                 data->REG_ALARM = NCT6791_REG_ALARM;
3704                 if (data->kind == nct6791)
3705                         data->REG_BEEP = NCT6776_REG_BEEP;
3706                 else
3707                         data->REG_BEEP = NCT6792_REG_BEEP;
3708
3709                 reg_temp = NCT6779_REG_TEMP;
3710                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3711                 if (data->kind == nct6791) {
3712                         reg_temp_mon = NCT6779_REG_TEMP_MON;
3713                         num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3714                 } else {
3715                         reg_temp_mon = NCT6792_REG_TEMP_MON;
3716                         num_reg_temp_mon = ARRAY_SIZE(NCT6792_REG_TEMP_MON);
3717                 }
3718                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3719                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3720                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3721                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3722                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3723
3724                 break;
3725         default:
3726                 return -ENODEV;
3727         }
3728         data->have_in = (1 << data->in_num) - 1;
3729         data->have_temp = 0;
3730
3731         /*
3732          * On some boards, not all available temperature sources are monitored,
3733          * even though some of the monitoring registers are unused.
3734          * Get list of unused monitoring registers, then detect if any fan
3735          * controls are configured to use unmonitored temperature sources.
3736          * If so, assign the unmonitored temperature sources to available
3737          * monitoring registers.
3738          */
3739         mask = 0;
3740         available = 0;
3741         for (i = 0; i < num_reg_temp; i++) {
3742                 if (reg_temp[i] == 0)
3743                         continue;
3744
3745                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3746                 if (!src || (mask & (1 << src)))
3747                         available |= 1 << i;
3748
3749                 mask |= 1 << src;
3750         }
3751
3752         /*
3753          * Now find unmonitored temperature registers and enable monitoring
3754          * if additional monitoring registers are available.
3755          */
3756         add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
3757         add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
3758
3759         mask = 0;
3760         s = NUM_TEMP_FIXED;     /* First dynamic temperature attribute */
3761         for (i = 0; i < num_reg_temp; i++) {
3762                 if (reg_temp[i] == 0)
3763                         continue;
3764
3765                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3766                 if (!src || (mask & (1 << src)))
3767                         continue;
3768
3769                 if (src >= data->temp_label_num ||
3770                     !strlen(data->temp_label[src])) {
3771                         dev_info(dev,
3772                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3773                                  src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
3774                         continue;
3775                 }
3776
3777                 mask |= 1 << src;
3778
3779                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3780                 if (src <= data->temp_fixed_num) {
3781                         data->have_temp |= 1 << (src - 1);
3782                         data->have_temp_fixed |= 1 << (src - 1);
3783                         data->reg_temp[0][src - 1] = reg_temp[i];
3784                         data->reg_temp[1][src - 1] = reg_temp_over[i];
3785                         data->reg_temp[2][src - 1] = reg_temp_hyst[i];
3786                         if (reg_temp_crit_h && reg_temp_crit_h[i])
3787                                 data->reg_temp[3][src - 1] = reg_temp_crit_h[i];
3788                         else if (reg_temp_crit[src - 1])
3789                                 data->reg_temp[3][src - 1]
3790                                   = reg_temp_crit[src - 1];
3791                         if (reg_temp_crit_l && reg_temp_crit_l[i])
3792                                 data->reg_temp[4][src - 1] = reg_temp_crit_l[i];
3793                         data->reg_temp_config[src - 1] = reg_temp_config[i];
3794                         data->temp_src[src - 1] = src;
3795                         continue;
3796                 }
3797
3798                 if (s >= NUM_TEMP)
3799                         continue;
3800
3801                 /* Use dynamic index for other sources */
3802                 data->have_temp |= 1 << s;
3803                 data->reg_temp[0][s] = reg_temp[i];
3804                 data->reg_temp[1][s] = reg_temp_over[i];
3805                 data->reg_temp[2][s] = reg_temp_hyst[i];
3806                 data->reg_temp_config[s] = reg_temp_config[i];
3807                 if (reg_temp_crit_h && reg_temp_crit_h[i])
3808                         data->reg_temp[3][s] = reg_temp_crit_h[i];
3809                 else if (reg_temp_crit[src - 1])
3810                         data->reg_temp[3][s] = reg_temp_crit[src - 1];
3811                 if (reg_temp_crit_l && reg_temp_crit_l[i])
3812                         data->reg_temp[4][s] = reg_temp_crit_l[i];
3813
3814                 data->temp_src[s] = src;
3815                 s++;
3816         }
3817
3818         /*
3819          * Repeat with temperatures used for fan control.
3820          * This set of registers does not support limits.
3821          */
3822         for (i = 0; i < num_reg_temp_mon; i++) {
3823                 if (reg_temp_mon[i] == 0)
3824                         continue;
3825
3826                 src = nct6775_read_value(data, data->REG_TEMP_SEL[i]) & 0x1f;
3827                 if (!src || (mask & (1 << src)))
3828                         continue;
3829
3830                 if (src >= data->temp_label_num ||
3831                     !strlen(data->temp_label[src])) {
3832                         dev_info(dev,
3833                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3834                                  src, i, data->REG_TEMP_SEL[i],
3835                                  reg_temp_mon[i]);
3836                         continue;
3837                 }
3838
3839                 mask |= 1 << src;
3840
3841                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3842                 if (src <= data->temp_fixed_num) {
3843                         if (data->have_temp & (1 << (src - 1)))
3844                                 continue;
3845                         data->have_temp |= 1 << (src - 1);
3846                         data->have_temp_fixed |= 1 << (src - 1);
3847                         data->reg_temp[0][src - 1] = reg_temp_mon[i];
3848                         data->temp_src[src - 1] = src;
3849                         continue;
3850                 }
3851
3852                 if (s >= NUM_TEMP)
3853                         continue;
3854
3855                 /* Use dynamic index for other sources */
3856                 data->have_temp |= 1 << s;
3857                 data->reg_temp[0][s] = reg_temp_mon[i];
3858                 data->temp_src[s] = src;
3859                 s++;
3860         }
3861
3862 #ifdef USE_ALTERNATE
3863         /*
3864          * Go through the list of alternate temp registers and enable
3865          * if possible.
3866          * The temperature is already monitored if the respective bit in <mask>
3867          * is set.
3868          */
3869         for (i = 0; i < data->temp_label_num - 1; i++) {
3870                 if (!reg_temp_alternate[i])
3871                         continue;
3872                 if (mask & (1 << (i + 1)))
3873                         continue;
3874                 if (i < data->temp_fixed_num) {
3875                         if (data->have_temp & (1 << i))
3876                                 continue;
3877                         data->have_temp |= 1 << i;
3878                         data->have_temp_fixed |= 1 << i;
3879                         data->reg_temp[0][i] = reg_temp_alternate[i];
3880                         if (i < num_reg_temp) {
3881                                 data->reg_temp[1][i] = reg_temp_over[i];
3882                                 data->reg_temp[2][i] = reg_temp_hyst[i];
3883                         }
3884                         data->temp_src[i] = i + 1;
3885                         continue;
3886                 }
3887
3888                 if (s >= NUM_TEMP)      /* Abort if no more space */
3889                         break;
3890
3891                 data->have_temp |= 1 << s;
3892                 data->reg_temp[0][s] = reg_temp_alternate[i];
3893                 data->temp_src[s] = i + 1;
3894                 s++;
3895         }
3896 #endif /* USE_ALTERNATE */
3897
3898         /* Initialize the chip */
3899         nct6775_init_device(data);
3900
3901         err = superio_enter(sio_data->sioreg);
3902         if (err)
3903                 return err;
3904
3905         cr2a = superio_inb(sio_data->sioreg, 0x2a);
3906         switch (data->kind) {
3907         case nct6775:
3908                 data->have_vid = (cr2a & 0x40);
3909                 break;
3910         case nct6776:
3911                 data->have_vid = (cr2a & 0x60) == 0x40;
3912                 break;
3913         case nct6106:
3914         case nct6779:
3915         case nct6791:
3916         case nct6792:
3917                 break;
3918         }
3919
3920         /*
3921          * Read VID value
3922          * We can get the VID input values directly at logical device D 0xe3.
3923          */
3924         if (data->have_vid) {
3925                 superio_select(sio_data->sioreg, NCT6775_LD_VID);
3926                 data->vid = superio_inb(sio_data->sioreg, 0xe3);
3927                 data->vrm = vid_which_vrm();
3928         }
3929
3930         if (fan_debounce) {
3931                 u8 tmp;
3932
3933                 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3934                 tmp = superio_inb(sio_data->sioreg,
3935                                   NCT6775_REG_CR_FAN_DEBOUNCE);
3936                 switch (data->kind) {
3937                 case nct6106:
3938                         tmp |= 0xe0;
3939                         break;
3940                 case nct6775:
3941                         tmp |= 0x1e;
3942                         break;
3943                 case nct6776:
3944                 case nct6779:
3945                         tmp |= 0x3e;
3946                         break;
3947                 case nct6791:
3948                 case nct6792:
3949                         tmp |= 0x7e;
3950                         break;
3951                 }
3952                 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
3953                              tmp);
3954                 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
3955                          data->name);
3956         }
3957
3958         nct6775_check_fan_inputs(data);
3959
3960         superio_exit(sio_data->sioreg);
3961
3962         /* Read fan clock dividers immediately */
3963         nct6775_init_fan_common(dev, data);
3964
3965         /* Register sysfs hooks */
3966         group = nct6775_create_attr_group(dev, &nct6775_pwm_template_group,
3967                                           data->pwm_num);
3968         if (IS_ERR(group))
3969                 return PTR_ERR(group);
3970
3971         data->groups[num_attr_groups++] = group;
3972
3973         group = nct6775_create_attr_group(dev, &nct6775_in_template_group,
3974                                           fls(data->have_in));
3975         if (IS_ERR(group))
3976                 return PTR_ERR(group);
3977
3978         data->groups[num_attr_groups++] = group;
3979
3980         group = nct6775_create_attr_group(dev, &nct6775_fan_template_group,
3981                                           fls(data->has_fan));
3982         if (IS_ERR(group))
3983                 return PTR_ERR(group);
3984
3985         data->groups[num_attr_groups++] = group;
3986
3987         group = nct6775_create_attr_group(dev, &nct6775_temp_template_group,
3988                                           fls(data->have_temp));
3989         if (IS_ERR(group))
3990                 return PTR_ERR(group);
3991
3992         data->groups[num_attr_groups++] = group;
3993         data->groups[num_attr_groups++] = &nct6775_group_other;
3994
3995 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
3996         err = sysfs_create_groups(&dev->kobj, data->groups);
3997         if (err < 0)
3998                 return err;
3999         hwmon_dev = hwmon_device_register(dev);
4000         if (IS_ERR(hwmon_dev)) {
4001                 sysfs_remove_groups(&dev->kobj, data->groups);
4002                 return PTR_ERR(hwmon_dev);
4003         }
4004         data->hwmon_dev = hwmon_dev;
4005 #else
4006         hwmon_dev = devm_hwmon_device_register_with_groups(dev, data->name,
4007                                                            data, data->groups);
4008 #endif
4009         return PTR_ERR_OR_ZERO(hwmon_dev);
4010 }
4011
4012 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4013 static int nct6775_remove(struct platform_device *pdev)
4014 {
4015         struct nct6775_data *data = platform_get_drvdata(pdev);
4016
4017         hwmon_device_unregister(data->hwmon_dev);
4018         sysfs_remove_groups(&pdev->dev.kobj, data->groups);
4019         return 0;
4020 }
4021 #endif
4022
4023 static void nct6791_enable_io_mapping(int sioaddr)
4024 {
4025         int val;
4026
4027         val = superio_inb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE);
4028         if (val & 0x10) {
4029                 pr_info("Enabling hardware monitor logical device mappings.\n");
4030                 superio_outb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE,
4031                              val & ~0x10);
4032         }
4033 }
4034
4035 static int __maybe_unused nct6775_suspend(struct device *dev)
4036 {
4037         struct nct6775_data *data = nct6775_update_device(dev);
4038
4039         mutex_lock(&data->update_lock);
4040         data->vbat = nct6775_read_value(data, data->REG_VBAT);
4041         if (data->kind == nct6775) {
4042                 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
4043                 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
4044         }
4045         mutex_unlock(&data->update_lock);
4046
4047         return 0;
4048 }
4049
4050 static int __maybe_unused nct6775_resume(struct device *dev)
4051 {
4052         struct nct6775_data *data = dev_get_drvdata(dev);
4053         int sioreg = data->sioreg;
4054         int i, j, err = 0;
4055         u8 reg;
4056
4057         mutex_lock(&data->update_lock);
4058         data->bank = 0xff;              /* Force initial bank selection */
4059
4060         err = superio_enter(sioreg);
4061         if (err)
4062                 goto abort;
4063
4064         superio_select(sioreg, NCT6775_LD_HWM);
4065         reg = superio_inb(sioreg, SIO_REG_ENABLE);
4066         if (reg != data->sio_reg_enable)
4067                 superio_outb(sioreg, SIO_REG_ENABLE, data->sio_reg_enable);
4068
4069         if (data->kind == nct6791 || data->kind == nct6792)
4070                 nct6791_enable_io_mapping(sioreg);
4071
4072         superio_exit(sioreg);
4073
4074         /* Restore limits */
4075         for (i = 0; i < data->in_num; i++) {
4076                 if (!(data->have_in & (1 << i)))
4077                         continue;
4078
4079                 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
4080                                     data->in[i][1]);
4081                 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
4082                                     data->in[i][2]);
4083         }
4084
4085         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
4086                 if (!(data->has_fan_min & (1 << i)))
4087                         continue;
4088
4089                 nct6775_write_value(data, data->REG_FAN_MIN[i],
4090                                     data->fan_min[i]);
4091         }
4092
4093         for (i = 0; i < NUM_TEMP; i++) {
4094                 if (!(data->have_temp & (1 << i)))
4095                         continue;
4096
4097                 for (j = 1; j < ARRAY_SIZE(data->reg_temp); j++)
4098                         if (data->reg_temp[j][i])
4099                                 nct6775_write_temp(data, data->reg_temp[j][i],
4100                                                    data->temp[j][i]);
4101         }
4102
4103         /* Restore other settings */
4104         nct6775_write_value(data, data->REG_VBAT, data->vbat);
4105         if (data->kind == nct6775) {
4106                 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
4107                 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
4108         }
4109
4110 abort:
4111         /* Force re-reading all values */
4112         data->valid = false;
4113         mutex_unlock(&data->update_lock);
4114
4115         return err;
4116 }
4117
4118 static SIMPLE_DEV_PM_OPS(nct6775_dev_pm_ops, nct6775_suspend, nct6775_resume);
4119
4120 static struct platform_driver nct6775_driver = {
4121         .driver = {
4122                 .owner  = THIS_MODULE,
4123                 .name   = DRVNAME,
4124                 .pm     = &nct6775_dev_pm_ops,
4125         },
4126         .probe          = nct6775_probe,
4127 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4128         .remove         = nct6775_remove,
4129 #endif
4130 };
4131
4132 static const char * const nct6775_sio_names[] __initconst = {
4133         "NCT6106D",
4134         "NCT6775F",
4135         "NCT6776D/F",
4136         "NCT6779D",
4137         "NCT6791D",
4138         "NCT6792D",
4139 };
4140
4141 /* nct6775_find() looks for a '627 in the Super-I/O config space */
4142 static int __init nct6775_find(int sioaddr, struct nct6775_sio_data *sio_data)
4143 {
4144         u16 val;
4145         int err;
4146         int addr;
4147
4148         err = superio_enter(sioaddr);
4149         if (err)
4150                 return err;
4151
4152         if (force_id)
4153                 val = force_id;
4154         else
4155                 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
4156                     | superio_inb(sioaddr, SIO_REG_DEVID + 1);
4157         switch (val & SIO_ID_MASK) {
4158         case SIO_NCT6106_ID:
4159                 sio_data->kind = nct6106;
4160                 break;
4161         case SIO_NCT6775_ID:
4162                 sio_data->kind = nct6775;
4163                 break;
4164         case SIO_NCT6776_ID:
4165                 sio_data->kind = nct6776;
4166                 break;
4167         case SIO_NCT6779_ID:
4168                 sio_data->kind = nct6779;
4169                 break;
4170         case SIO_NCT6791_ID:
4171                 sio_data->kind = nct6791;
4172                 break;
4173         case SIO_NCT6792_ID:
4174                 sio_data->kind = nct6792;
4175                 break;
4176         default:
4177                 if (val != 0xffff)
4178                         pr_debug("unsupported chip ID: 0x%04x\n", val);
4179                 superio_exit(sioaddr);
4180                 return -ENODEV;
4181         }
4182
4183         /* We have a known chip, find the HWM I/O address */
4184         superio_select(sioaddr, NCT6775_LD_HWM);
4185         val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
4186             | superio_inb(sioaddr, SIO_REG_ADDR + 1);
4187         addr = val & IOREGION_ALIGNMENT;
4188         if (addr == 0) {
4189                 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
4190                 superio_exit(sioaddr);
4191                 return -ENODEV;
4192         }
4193
4194         /* Activate logical device if needed */
4195         val = superio_inb(sioaddr, SIO_REG_ENABLE);
4196         if (!(val & 0x01)) {
4197                 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
4198                 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
4199         }
4200
4201         if (sio_data->kind == nct6791 || sio_data->kind == nct6792)
4202                 nct6791_enable_io_mapping(sioaddr);
4203
4204         superio_exit(sioaddr);
4205         pr_info("Found %s or compatible chip at %#x:%#x\n",
4206                 nct6775_sio_names[sio_data->kind], sioaddr, addr);
4207         sio_data->sioreg = sioaddr;
4208
4209         return addr;
4210 }
4211
4212 /*
4213  * when Super-I/O functions move to a separate file, the Super-I/O
4214  * bus will manage the lifetime of the device and this module will only keep
4215  * track of the nct6775 driver. But since we use platform_device_alloc(), we
4216  * must keep track of the device
4217  */
4218 static struct platform_device *pdev[2];
4219
4220 static int __init sensors_nct6775_init(void)
4221 {
4222         int i, err;
4223         bool found = false;
4224         int address;
4225         struct resource res;
4226         struct nct6775_sio_data sio_data;
4227         int sioaddr[2] = { 0x2e, 0x4e };
4228
4229         err = platform_driver_register(&nct6775_driver);
4230         if (err)
4231                 return err;
4232
4233         /*
4234          * initialize sio_data->kind and sio_data->sioreg.
4235          *
4236          * when Super-I/O functions move to a separate file, the Super-I/O
4237          * driver will probe 0x2e and 0x4e and auto-detect the presence of a
4238          * nct6775 hardware monitor, and call probe()
4239          */
4240         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4241                 address = nct6775_find(sioaddr[i], &sio_data);
4242                 if (address <= 0)
4243                         continue;
4244
4245                 found = true;
4246
4247                 pdev[i] = platform_device_alloc(DRVNAME, address);
4248                 if (!pdev[i]) {
4249                         err = -ENOMEM;
4250                         goto exit_device_unregister;
4251                 }
4252
4253                 err = platform_device_add_data(pdev[i], &sio_data,
4254                                                sizeof(struct nct6775_sio_data));
4255                 if (err)
4256                         goto exit_device_put;
4257
4258                 memset(&res, 0, sizeof(res));
4259                 res.name = DRVNAME;
4260                 res.start = address + IOREGION_OFFSET;
4261                 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
4262                 res.flags = IORESOURCE_IO;
4263
4264                 err = acpi_check_resource_conflict(&res);
4265                 if (err) {
4266                         platform_device_put(pdev[i]);
4267                         pdev[i] = NULL;
4268                         continue;
4269                 }
4270
4271                 err = platform_device_add_resources(pdev[i], &res, 1);
4272                 if (err)
4273                         goto exit_device_put;
4274
4275                 /* platform_device_add calls probe() */
4276                 err = platform_device_add(pdev[i]);
4277                 if (err)
4278                         goto exit_device_put;
4279         }
4280         if (!found) {
4281                 err = -ENODEV;
4282                 goto exit_unregister;
4283         }
4284
4285         return 0;
4286
4287 exit_device_put:
4288         platform_device_put(pdev[i]);
4289 exit_device_unregister:
4290         while (--i >= 0) {
4291                 if (pdev[i])
4292                         platform_device_unregister(pdev[i]);
4293         }
4294 exit_unregister:
4295         platform_driver_unregister(&nct6775_driver);
4296         return err;
4297 }
4298
4299 static void __exit sensors_nct6775_exit(void)
4300 {
4301         int i;
4302
4303         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4304                 if (pdev[i])
4305                         platform_device_unregister(pdev[i]);
4306         }
4307         platform_driver_unregister(&nct6775_driver);
4308 }
4309
4310 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4311 MODULE_DESCRIPTION("NCT6106D/NCT6775F/NCT6776F/NCT6779D/NCT6791D/NCT6792D driver");
4312 MODULE_LICENSE("GPL");
4313
4314 module_init(sensors_nct6775_init);
4315 module_exit(sensors_nct6775_exit);