git.sur5r.net Git - groeck-nct6775/blob - nct6775.c

   1 /*
   2  * nct6775 - Driver for the hardware monitoring functionality of
   3  *             Nuvoton NCT677x Super-I/O chips
   4  *
   5  * Copyright (C) 2012  Guenter Roeck <linux@roeck-us.net>
   6  *
   7  * Derived from w83627ehf driver
   8  * Copyright (C) 2005-2012  Jean Delvare <khali@linux-fr.org>
   9  * Copyright (C) 2006  Yuan Mu (Winbond),
  10  *                     Rudolf Marek <r.marek@assembler.cz>
  11  *                     David Hubbard <david.c.hubbard@gmail.com>
  12  *                     Daniel J Blueman <daniel.blueman@gmail.com>
  13  * Copyright (C) 2010  Sheng-Yuan Huang (Nuvoton) (PS00)
  14  *
  15  * Shamelessly ripped from the w83627hf driver
  16  * Copyright (C) 2003  Mark Studebaker
  17  *
  18  * This program is free software; you can redistribute it and/or modify
  19  * it under the terms of the GNU General Public License as published by
  20  * the Free Software Foundation; either version 2 of the License, or
  21  * (at your option) any later version.
  22  *
  23  * This program is distributed in the hope that it will be useful,
  24  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26  * GNU General Public License for more details.
  27  *
  28  * You should have received a copy of the GNU General Public License
  29  * along with this program; if not, write to the Free Software
  30  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  31  *
  32  *
  33  * Supports the following chips:
  34  *
  35  * Chip        #vin    #fan    #pwm    #temp  chip IDs       man ID
  36  * nct6775f     9      4       3       6+3    0xb470 0xc1    0x5ca3
  37  * nct6776f     9      5       3       6+3    0xc330 0xc1    0x5ca3
  38  * nct6779d    15      5       5       2+6    0xc560 0xc1    0x5ca3
  39  *
  40  * #temp lists the number of monitored temperature sources (first value) plus
  41  * the number of directly connectable temperature sensors (second value).
  42  */
  43
  44 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  45
  46 #include <linux/module.h>
  47 #include <linux/init.h>
  48 #include <linux/slab.h>
  49 #include <linux/jiffies.h>
  50 #include <linux/platform_device.h>
  51 #include <linux/hwmon.h>
  52 #include <linux/hwmon-sysfs.h>
  53 #include <linux/hwmon-vid.h>
  54 #include <linux/err.h>
  55 #include <linux/mutex.h>
  56 #include <linux/acpi.h>
  57 #include <linux/io.h>
  58 #include "lm75.h"
  59 #include "compat.h"
  60
  61 #define USE_ALTERNATE
  62
  63 enum kinds { nct6775, nct6776, nct6779 };
  64
  65 /* used to set data->name = nct6775_device_names[data->sio_kind] */
  66 static const char * const nct6775_device_names[] = {
  67         "nct6775",
  68         "nct6776",
  69         "nct6779",
  70 };
  71
  72 static unsigned short force_id;
  73 module_param(force_id, ushort, 0);
  74 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  75
  76 static unsigned short fan_debounce;
  77 module_param(fan_debounce, ushort, 0);
  78 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
  79
  80 #define DRVNAME "nct6775"
  81
  82 /*
  83  * Super-I/O constants and functions
  84  */
  85
  86 #define NCT6775_LD_ACPI         0x0a
  87 #define NCT6775_LD_HWM          0x0b
  88 #define NCT6775_LD_VID          0x0d
  89
  90 #define SIO_REG_LDSEL           0x07    /* Logical device select */
  91 #define SIO_REG_DEVID           0x20    /* Device ID (2 bytes) */
  92 #define SIO_REG_ENABLE          0x30    /* Logical device enable */
  93 #define SIO_REG_ADDR            0x60    /* Logical device address (2 bytes) */
  94
  95 #define SIO_NCT6775_ID          0xb470
  96 #define SIO_NCT6776_ID          0xc330
  97 #define SIO_NCT6779_ID          0xc560
  98 #define SIO_ID_MASK             0xFFF0
  99
 100 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
 101
 102 static inline void
 103 superio_outb(int ioreg, int reg, int val)
 104 {
 105         outb(reg, ioreg);
 106         outb(val, ioreg + 1);
 107 }
 108
 109 static inline int
 110 superio_inb(int ioreg, int reg)
 111 {
 112         outb(reg, ioreg);
 113         return inb(ioreg + 1);
 114 }
 115
 116 static inline void
 117 superio_select(int ioreg, int ld)
 118 {
 119         outb(SIO_REG_LDSEL, ioreg);
 120         outb(ld, ioreg + 1);
 121 }
 122
 123 static inline int
 124 superio_enter(int ioreg)
 125 {
 126         /*
 127          * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
 128          */
 129         if (!request_muxed_region(ioreg, 2, DRVNAME))
 130                 return -EBUSY;
 131
 132         outb(0x87, ioreg);
 133         outb(0x87, ioreg);
 134
 135         return 0;
 136 }
 137
 138 static inline void
 139 superio_exit(int ioreg)
 140 {
 141         outb(0xaa, ioreg);
 142         outb(0x02, ioreg);
 143         outb(0x02, ioreg + 1);
 144         release_region(ioreg, 2);
 145 }
 146
 147 /*
 148  * ISA constants
 149  */
 150
 151 #define IOREGION_ALIGNMENT      (~7)
 152 #define IOREGION_OFFSET         5
 153 #define IOREGION_LENGTH         2
 154 #define ADDR_REG_OFFSET         0
 155 #define DATA_REG_OFFSET         1
 156
 157 #define NCT6775_REG_BANK        0x4E
 158 #define NCT6775_REG_CONFIG      0x40
 159
 160 /*
 161  * Not currently used:
 162  * REG_MAN_ID has the value 0x5ca3 for all supported chips.
 163  * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
 164  * REG_MAN_ID is at port 0x4f
 165  * REG_CHIP_ID is at port 0x58
 166  */
 167
 168 #define NUM_TEMP        10      /* Max number of temp attribute sets w/ limits*/
 169 #define NUM_TEMP_FIXED  6       /* Max number of fixed temp attribute sets */
 170
 171 #define NUM_REG_ALARM   4       /* Max number of alarm registers */
 172
 173 /* Common and NCT6775 specific data */
 174
 175 /* Voltage min/max registers for nr=7..14 are in bank 5 */
 176
 177 static const u16 NCT6775_REG_IN_MAX[] = {
 178         0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
 179         0x55c, 0x55e, 0x560, 0x562 };
 180 static const u16 NCT6775_REG_IN_MIN[] = {
 181         0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
 182         0x55d, 0x55f, 0x561, 0x563 };
 183 static const u16 NCT6775_REG_IN[] = {
 184         0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
 185 };
 186
 187 #define NCT6775_REG_VBAT                0x5D
 188 #define NCT6775_REG_DIODE               0x5E
 189
 190 #define NCT6775_REG_FANDIV1             0x506
 191 #define NCT6775_REG_FANDIV2             0x507
 192
 193 #define NCT6775_REG_CR_FAN_DEBOUNCE     0xf0
 194
 195 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
 196
 197 /* 0..15 voltages, 16..23 fans, 24..31 temperatures */
 198
 199 static const s8 NCT6775_ALARM_BITS[] = {
 200         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 201         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 202         -1,                             /* unused */
 203         6, 7, 11, 10, 23,               /* fan1..fan5 */
 204         -1, -1, -1,                     /* unused */
 205         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 206         12, -1 };                       /* intrusion0, intrusion1 */
 207
 208 #define FAN_ALARM_BASE          16
 209 #define TEMP_ALARM_BASE         24
 210 #define INTRUSION_ALARM_BASE    30
 211
 212 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
 213 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
 214
 215 /* DC or PWM output fan configuration */
 216 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
 217 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
 218
 219 /* Advanced Fan control, some values are common for all fans */
 220
 221 static const u16 NCT6775_REG_TARGET[] = { 0x101, 0x201, 0x301, 0x801, 0x901 };
 222 static const u16 NCT6775_REG_FAN_MODE[] = { 0x102, 0x202, 0x302, 0x802, 0x902 };
 223 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
 224         0x103, 0x203, 0x303, 0x803, 0x903 };
 225 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
 226         0x104, 0x204, 0x304, 0x804, 0x904 };
 227 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
 228         0x105, 0x205, 0x305, 0x805, 0x905 };
 229 static const u16 NCT6775_REG_FAN_START_OUTPUT[]
 230         = { 0x106, 0x206, 0x306, 0x806, 0x906 };
 231 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
 232 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
 233
 234 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
 235         0x107, 0x207, 0x307, 0x807, 0x907 };
 236 static const u16 NCT6775_REG_PWM[] = { 0x109, 0x209, 0x309, 0x809, 0x909 };
 237 static const u16 NCT6775_REG_PWM_READ[] = { 0x01, 0x03, 0x11, 0x13, 0x15 };
 238
 239 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
 240 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
 241 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
 242
 243 static const u16 NCT6775_REG_TEMP[] = {
 244         0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
 245
 246 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 247         0, 0x152, 0x252, 0x628, 0x629, 0x62A };
 248 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 249         0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
 250 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 251         0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
 252
 253 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 254         0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
 255
 256 static const u16 NCT6775_REG_TEMP_SEL[] = {
 257         0x100, 0x200, 0x300, 0x800, 0x900 };
 258
 259 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
 260         0x139, 0x239, 0x339, 0x839, 0x939 };
 261 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
 262         0x13a, 0x23a, 0x33a, 0x83a, 0x93a };
 263 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
 264         0x13b, 0x23b, 0x33b, 0x83b, 0x93b };
 265 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
 266         0x13c, 0x23c, 0x33c, 0x83c, 0x93c };
 267 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
 268         0x13d, 0x23d, 0x33d, 0x83d, 0x93d };
 269
 270 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
 271
 272 static const u16 NCT6775_REG_AUTO_TEMP[] = {
 273         0x121, 0x221, 0x321, 0x821, 0x921 };
 274 static const u16 NCT6775_REG_AUTO_PWM[] = {
 275         0x127, 0x227, 0x327, 0x827, 0x927 };
 276
 277 #define NCT6775_AUTO_TEMP(data, nr, p)  ((data)->REG_AUTO_TEMP[nr] + (p))
 278 #define NCT6775_AUTO_PWM(data, nr, p)   ((data)->REG_AUTO_PWM[nr] + (p))
 279
 280 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
 281
 282 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
 283         0x135, 0x235, 0x335, 0x835, 0x935 };
 284 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
 285         0x138, 0x238, 0x338, 0x838, 0x938 };
 286
 287 static const char *const nct6775_temp_label[] = {
 288         "",
 289         "SYSTIN",
 290         "CPUTIN",
 291         "AUXTIN",
 292         "AMD SB-TSI",
 293         "PECI Agent 0",
 294         "PECI Agent 1",
 295         "PECI Agent 2",
 296         "PECI Agent 3",
 297         "PECI Agent 4",
 298         "PECI Agent 5",
 299         "PECI Agent 6",
 300         "PECI Agent 7",
 301         "PCH_CHIP_CPU_MAX_TEMP",
 302         "PCH_CHIP_TEMP",
 303         "PCH_CPU_TEMP",
 304         "PCH_MCH_TEMP",
 305         "PCH_DIM0_TEMP",
 306         "PCH_DIM1_TEMP",
 307         "PCH_DIM2_TEMP",
 308         "PCH_DIM3_TEMP"
 309 };
 310
 311 static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
 312         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
 313
 314 static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
 315         = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
 316             0xa07 };
 317
 318 /* NCT6776 specific data */
 319
 320 static const s8 NCT6776_ALARM_BITS[] = {
 321         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 322         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 323         -1,                             /* unused */
 324         6, 7, 11, 10, 23,               /* fan1..fan5 */
 325         -1, -1, -1,                     /* unused */
 326         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 327         12, 9 };                        /* intrusion0, intrusion1 */
 328
 329 static const u16 NCT6776_REG_TOLERANCE_H[] = {
 330         0x10c, 0x20c, 0x30c, 0x80c, 0x90c };
 331
 332 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0 };
 333 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0 };
 334
 335 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
 336 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
 337
 338 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
 339         0x13e, 0x23e, 0x33e, 0x83e, 0x93e };
 340
 341 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 342         0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
 343
 344 static const char *const nct6776_temp_label[] = {
 345         "",
 346         "SYSTIN",
 347         "CPUTIN",
 348         "AUXTIN",
 349         "SMBUSMASTER 0",
 350         "SMBUSMASTER 1",
 351         "SMBUSMASTER 2",
 352         "SMBUSMASTER 3",
 353         "SMBUSMASTER 4",
 354         "SMBUSMASTER 5",
 355         "SMBUSMASTER 6",
 356         "SMBUSMASTER 7",
 357         "PECI Agent 0",
 358         "PECI Agent 1",
 359         "PCH_CHIP_CPU_MAX_TEMP",
 360         "PCH_CHIP_TEMP",
 361         "PCH_CPU_TEMP",
 362         "PCH_MCH_TEMP",
 363         "PCH_DIM0_TEMP",
 364         "PCH_DIM1_TEMP",
 365         "PCH_DIM2_TEMP",
 366         "PCH_DIM3_TEMP",
 367         "BYTE_TEMP"
 368 };
 369
 370 static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
 371         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
 372
 373 static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
 374         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
 375
 376 /* NCT6779 specific data */
 377
 378 static const u16 NCT6779_REG_IN[] = {
 379         0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
 380         0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
 381
 382 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
 383         0x459, 0x45A, 0x45B, 0x568 };
 384
 385 static const s8 NCT6779_ALARM_BITS[] = {
 386         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 387         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 388         -1,                             /* unused */
 389         6, 7, 11, 10, 23,               /* fan1..fan5 */
 390         -1, -1, -1,                     /* unused */
 391         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 392         12, 9 };                        /* intrusion0, intrusion1 */
 393
 394 static const u16 NCT6779_REG_FAN[] = { 0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8 };
 395 static const u16 NCT6779_REG_FAN_PULSES[] = {
 396         0x644, 0x645, 0x646, 0x647, 0x648 };
 397
 398 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
 399         0x136, 0x236, 0x336, 0x836, 0x936 };
 400 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
 401         0x137, 0x237, 0x337, 0x837, 0x937 };
 402
 403 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
 404 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 405         0x18, 0x152 };
 406 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 407         0x3a, 0x153 };
 408 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 409         0x39, 0x155 };
 410
 411 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
 412         0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
 413
 414 static const char *const nct6779_temp_label[] = {
 415         "",
 416         "SYSTIN",
 417         "CPUTIN",
 418         "AUXTIN0",
 419         "AUXTIN1",
 420         "AUXTIN2",
 421         "AUXTIN3",
 422         "",
 423         "SMBUSMASTER 0",
 424         "SMBUSMASTER 1",
 425         "SMBUSMASTER 2",
 426         "SMBUSMASTER 3",
 427         "SMBUSMASTER 4",
 428         "SMBUSMASTER 5",
 429         "SMBUSMASTER 6",
 430         "SMBUSMASTER 7",
 431         "PECI Agent 0",
 432         "PECI Agent 1",
 433         "PCH_CHIP_CPU_MAX_TEMP",
 434         "PCH_CHIP_TEMP",
 435         "PCH_CPU_TEMP",
 436         "PCH_MCH_TEMP",
 437         "PCH_DIM0_TEMP",
 438         "PCH_DIM1_TEMP",
 439         "PCH_DIM2_TEMP",
 440         "PCH_DIM3_TEMP",
 441         "BYTE_TEMP"
 442 };
 443
 444 static const u16 NCT6779_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6779_temp_label) - 1]
 445         = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
 446             0, 0, 0, 0, 0, 0, 0, 0,
 447             0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
 448             0x408, 0 };
 449
 450 static const u16 NCT6779_REG_TEMP_CRIT[ARRAY_SIZE(nct6779_temp_label) - 1]
 451         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
 452
 453 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
 454 {
 455         if (mode == 0 && pwm == 255)
 456                 return off;
 457         return mode + 1;
 458 }
 459
 460 static int pwm_enable_to_reg(enum pwm_enable mode)
 461 {
 462         if (mode == off)
 463                 return 0;
 464         return mode - 1;
 465 }
 466
 467 /*
 468  * Conversions
 469  */
 470
 471 /* 1 is DC mode, output in ms */
 472 static unsigned int step_time_from_reg(u8 reg, u8 mode)
 473 {
 474         return mode ? 400 * reg : 100 * reg;
 475 }
 476
 477 static u8 step_time_to_reg(unsigned int msec, u8 mode)
 478 {
 479         return clamp_val((mode ? (msec + 200) / 400 :
 480                                         (msec + 50) / 100), 1, 255);
 481 }
 482
 483 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
 484 {
 485         if (reg == 0 || reg == 255)
 486                 return 0;
 487         return 1350000U / (reg << divreg);
 488 }
 489
 490 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
 491 {
 492         if ((reg & 0xff1f) == 0xff1f)
 493                 return 0;
 494
 495         reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
 496
 497         if (reg == 0)
 498                 return 0;
 499
 500         return 1350000U / reg;
 501 }
 502
 503 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
 504 {
 505         if (reg == 0 || reg == 0xffff)
 506                 return 0;
 507
 508         /*
 509          * Even though the registers are 16 bit wide, the fan divisor
 510          * still applies.
 511          */
 512         return 1350000U / (reg << divreg);
 513 }
 514
 515 static u16 fan_to_reg(u32 fan, unsigned int divreg)
 516 {
 517         if (!fan)
 518                 return 0;
 519
 520         return (1350000U / fan) >> divreg;
 521 }
 522
 523 static inline unsigned int
 524 div_from_reg(u8 reg)
 525 {
 526         return 1 << reg;
 527 }
 528
 529 /*
 530  * Some of the voltage inputs have internal scaling, the tables below
 531  * contain 8 (the ADC LSB in mV) * scaling factor * 100
 532  */
 533 static const u16 scale_in[15] = {
 534         800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
 535         800, 800
 536 };
 537
 538 static inline long in_from_reg(u8 reg, u8 nr)
 539 {
 540         return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
 541 }
 542
 543 static inline u8 in_to_reg(u32 val, u8 nr)
 544 {
 545         return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
 546 }
 547
 548 /*
 549  * Data structures and manipulation thereof
 550  */
 551
 552 struct nct6775_data {
 553         int addr;       /* IO base of hw monitor block */
 554         enum kinds kind;
 555         const char *name;
 556
 557         struct device *hwmon_dev;
 558
 559         u16 reg_temp[4][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 560                                     * 3=temp_crit
 561                                     */
 562         u8 temp_src[NUM_TEMP];
 563         u16 reg_temp_config[NUM_TEMP];
 564         const char * const *temp_label;
 565         int temp_label_num;
 566
 567         u16 REG_CONFIG;
 568         u16 REG_VBAT;
 569         u16 REG_DIODE;
 570
 571         const s8 *ALARM_BITS;
 572
 573         const u16 *REG_VIN;
 574         const u16 *REG_IN_MINMAX[2];
 575
 576         const u16 *REG_TARGET;
 577         const u16 *REG_FAN;
 578         const u16 *REG_FAN_MODE;
 579         const u16 *REG_FAN_MIN;
 580         const u16 *REG_FAN_PULSES;
 581         const u16 *REG_FAN_TIME[3];
 582
 583         const u16 *REG_TOLERANCE_H;
 584
 585         const u8 *REG_PWM_MODE;
 586         const u8 *PWM_MODE_MASK;
 587
 588         const u16 *REG_PWM[7];  /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 589                                  * [3]=pwm_max, [4]=pwm_step,
 590                                  * [5]=weight_duty_step, [6]=weight_duty_base
 591                                  */
 592         const u16 *REG_PWM_READ;
 593
 594         const u16 *REG_AUTO_TEMP;
 595         const u16 *REG_AUTO_PWM;
 596
 597         const u16 *REG_CRITICAL_TEMP;
 598         const u16 *REG_CRITICAL_TEMP_TOLERANCE;
 599
 600         const u16 *REG_TEMP_SOURCE;     /* temp register sources */
 601         const u16 *REG_TEMP_SEL;
 602         const u16 *REG_WEIGHT_TEMP_SEL;
 603         const u16 *REG_WEIGHT_TEMP[3];  /* 0=base, 1=tolerance, 2=step */
 604
 605         const u16 *REG_TEMP_OFFSET;
 606
 607         const u16 *REG_ALARM;
 608
 609         unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
 610         unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
 611
 612         struct mutex update_lock;
 613         bool valid;             /* true if following fields are valid */
 614         unsigned long last_updated;     /* In jiffies */
 615
 616         /* Register values */
 617         u8 bank;                /* current register bank */
 618         u8 in_num;              /* number of in inputs we have */
 619         u8 in[15][3];           /* [0]=in, [1]=in_max, [2]=in_min */
 620         unsigned int rpm[5];
 621         u16 fan_min[5];
 622         u8 fan_pulses[5];
 623         u8 fan_div[5];
 624         u8 has_pwm;
 625         u8 has_fan;             /* some fan inputs can be disabled */
 626         u8 has_fan_min;         /* some fans don't have min register */
 627         bool has_fan_div;
 628
 629         u8 temp_fixed_num;      /* 3 or 6 */
 630         u8 temp_type[NUM_TEMP_FIXED];
 631         s8 temp_offset[NUM_TEMP_FIXED];
 632         s16 temp[4][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 633                                 * 3=temp_crit */
 634         u64 alarms;
 635
 636         u8 pwm_num;     /* number of pwm */
 637         u8 pwm_mode[5]; /* 1->DC variable voltage, 0->PWM variable duty cycle */
 638         enum pwm_enable pwm_enable[5];
 639                         /* 0->off
 640                          * 1->manual
 641                          * 2->thermal cruise mode (also called SmartFan I)
 642                          * 3->fan speed cruise mode
 643                          * 4->SmartFan III
 644                          * 5->enhanced variable thermal cruise (SmartFan IV)
 645                          */
 646         u8 pwm[7][5];   /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 647                          * [3]=pwm_max, [4]=pwm_step,
 648                          * [5]=weight_duty_step, [6]=weight_duty_base
 649                          */
 650
 651         u8 target_temp[5];
 652         u8 target_temp_mask;
 653         u32 target_speed[5];
 654         u32 target_speed_tolerance[5];
 655         u8 speed_tolerance_limit;
 656
 657         u8 temp_tolerance[2][5];
 658         u8 tolerance_mask;
 659
 660         u8 fan_time[3][5]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
 661
 662         /* Automatic fan speed control registers */
 663         int auto_pwm_num;
 664         u8 auto_pwm[5][7];
 665         u8 auto_temp[5][7];
 666         u8 pwm_temp_sel[5];
 667         u8 pwm_weight_temp_sel[5];
 668         u8 weight_temp[3][5];   /* 0->temp_step, 1->temp_step_tol,
 669                                  * 2->temp_base
 670                                  */
 671
 672         u8 vid;
 673         u8 vrm;
 674
 675         u16 have_temp;
 676         u16 have_temp_fixed;
 677         u16 have_in;
 678 #ifdef CONFIG_PM
 679         /* Remember extra register values over suspend/resume */
 680         u8 vbat;
 681         u8 fandiv1;
 682         u8 fandiv2;
 683 #endif
 684 };
 685
 686 struct nct6775_sio_data {
 687         int sioreg;
 688         enum kinds kind;
 689 };
 690
 691 static bool is_word_sized(struct nct6775_data *data, u16 reg)
 692 {
 693         switch (data->kind) {
 694         case nct6775:
 695                 return (((reg & 0xff00) == 0x100 ||
 696                     (reg & 0xff00) == 0x200) &&
 697                    ((reg & 0x00ff) == 0x50 ||
 698                     (reg & 0x00ff) == 0x53 ||
 699                     (reg & 0x00ff) == 0x55)) ||
 700                   (reg & 0xfff0) == 0x630 ||
 701                   reg == 0x640 || reg == 0x642 ||
 702                   reg == 0x662 ||
 703                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
 704                   reg == 0x73 || reg == 0x75 || reg == 0x77;
 705         case nct6776:
 706                 return (((reg & 0xff00) == 0x100 ||
 707                     (reg & 0xff00) == 0x200) &&
 708                    ((reg & 0x00ff) == 0x50 ||
 709                     (reg & 0x00ff) == 0x53 ||
 710                     (reg & 0x00ff) == 0x55)) ||
 711                   (reg & 0xfff0) == 0x630 ||
 712                   reg == 0x402 ||
 713                   reg == 0x640 || reg == 0x642 ||
 714                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
 715                   reg == 0x73 || reg == 0x75 || reg == 0x77;
 716         case nct6779:
 717                 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
 718                   ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x09) ||
 719                   reg == 0x402 ||
 720                   reg == 0x63a || reg == 0x63c || reg == 0x63e ||
 721                   reg == 0x640 || reg == 0x642 ||
 722                   reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
 723                   reg == 0x7b;
 724         }
 725         return false;
 726 }
 727
 728 /*
 729  * On older chips, only registers 0x50-0x5f are banked.
 730  * On more recent chips, all registers are banked.
 731  * Assume that is the case and set the bank number for each access.
 732  * Cache the bank number so it only needs to be set if it changes.
 733  */
 734 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
 735 {
 736         u8 bank = reg >> 8;
 737         if (data->bank != bank) {
 738                 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
 739                 outb_p(bank, data->addr + DATA_REG_OFFSET);
 740                 data->bank = bank;
 741         }
 742 }
 743
 744 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
 745 {
 746         int res, word_sized = is_word_sized(data, reg);
 747
 748         nct6775_set_bank(data, reg);
 749         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
 750         res = inb_p(data->addr + DATA_REG_OFFSET);
 751         if (word_sized) {
 752                 outb_p((reg & 0xff) + 1,
 753                        data->addr + ADDR_REG_OFFSET);
 754                 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
 755         }
 756         return res;
 757 }
 758
 759 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
 760 {
 761         int word_sized = is_word_sized(data, reg);
 762
 763         nct6775_set_bank(data, reg);
 764         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
 765         if (word_sized) {
 766                 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
 767                 outb_p((reg & 0xff) + 1,
 768                        data->addr + ADDR_REG_OFFSET);
 769         }
 770         outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
 771         return 0;
 772 }
 773
 774 /* We left-align 8-bit temperature values to make the code simpler */
 775 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
 776 {
 777         u16 res;
 778
 779         res = nct6775_read_value(data, reg);
 780         if (!is_word_sized(data, reg))
 781                 res <<= 8;
 782
 783         return res;
 784 }
 785
 786 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
 787 {
 788         if (!is_word_sized(data, reg))
 789                 value >>= 8;
 790         return nct6775_write_value(data, reg, value);
 791 }
 792
 793 /* This function assumes that the caller holds data->update_lock */
 794 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
 795 {
 796         u8 reg;
 797
 798         switch (nr) {
 799         case 0:
 800                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
 801                     | (data->fan_div[0] & 0x7);
 802                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
 803                 break;
 804         case 1:
 805                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
 806                     | ((data->fan_div[1] << 4) & 0x70);
 807                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
 808                 break;
 809         case 2:
 810                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
 811                     | (data->fan_div[2] & 0x7);
 812                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
 813                 break;
 814         case 3:
 815                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
 816                     | ((data->fan_div[3] << 4) & 0x70);
 817                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
 818                 break;
 819         }
 820 }
 821
 822 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
 823 {
 824         if (data->kind == nct6775)
 825                 nct6775_write_fan_div(data, nr);
 826 }
 827
 828 static void nct6775_update_fan_div(struct nct6775_data *data)
 829 {
 830         u8 i;
 831
 832         i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
 833         data->fan_div[0] = i & 0x7;
 834         data->fan_div[1] = (i & 0x70) >> 4;
 835         i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
 836         data->fan_div[2] = i & 0x7;
 837         if (data->has_fan & (1<<3))
 838                 data->fan_div[3] = (i & 0x70) >> 4;
 839 }
 840
 841 static void nct6775_update_fan_div_common(struct nct6775_data *data)
 842 {
 843         if (data->kind == nct6775)
 844                 nct6775_update_fan_div(data);
 845 }
 846
 847 static void nct6775_init_fan_div(struct nct6775_data *data)
 848 {
 849         int i;
 850
 851         nct6775_update_fan_div_common(data);
 852         /*
 853          * For all fans, start with highest divider value if the divider
 854          * register is not initialized. This ensures that we get a
 855          * reading from the fan count register, even if it is not optimal.
 856          * We'll compute a better divider later on.
 857          */
 858         for (i = 0; i < 3; i++) {
 859                 if (!(data->has_fan & (1 << i)))
 860                         continue;
 861                 if (data->fan_div[i] == 0) {
 862                         data->fan_div[i] = 7;
 863                         nct6775_write_fan_div_common(data, i);
 864                 }
 865         }
 866 }
 867
 868 static void nct6775_init_fan_common(struct device *dev,
 869                                     struct nct6775_data *data)
 870 {
 871         int i;
 872         u8 reg;
 873
 874         if (data->has_fan_div)
 875                 nct6775_init_fan_div(data);
 876
 877         /*
 878          * If fan_min is not set (0), set it to 0xff to disable it. This
 879          * prevents the unnecessary warning when fanX_min is reported as 0.
 880          */
 881         for (i = 0; i < 5; i++) {
 882                 if (data->has_fan_min & (1 << i)) {
 883                         reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
 884                         if (!reg)
 885                                 nct6775_write_value(data, data->REG_FAN_MIN[i],
 886                                                     data->has_fan_div ? 0xff
 887                                                                       : 0xff1f);
 888                 }
 889         }
 890 }
 891
 892 static void nct6775_select_fan_div(struct device *dev,
 893                                    struct nct6775_data *data, int nr, u16 reg)
 894 {
 895         u8 fan_div = data->fan_div[nr];
 896         u16 fan_min;
 897
 898         if (!data->has_fan_div)
 899                 return;
 900
 901         /*
 902          * If we failed to measure the fan speed, or the reported value is not
 903          * in the optimal range, and the clock divider can be modified,
 904          * let's try that for next time.
 905          */
 906         if (reg == 0x00 && fan_div < 0x07)
 907                 fan_div++;
 908         else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
 909                 fan_div--;
 910
 911         if (fan_div != data->fan_div[nr]) {
 912                 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
 913                         nr + 1, div_from_reg(data->fan_div[nr]),
 914                         div_from_reg(fan_div));
 915
 916                 /* Preserve min limit if possible */
 917                 if (data->has_fan_min & (1 << nr)) {
 918                         fan_min = data->fan_min[nr];
 919                         if (fan_div > data->fan_div[nr]) {
 920                                 if (fan_min != 255 && fan_min > 1)
 921                                         fan_min >>= 1;
 922                         } else {
 923                                 if (fan_min != 255) {
 924                                         fan_min <<= 1;
 925                                         if (fan_min > 254)
 926                                                 fan_min = 254;
 927                                 }
 928                         }
 929                         if (fan_min != data->fan_min[nr]) {
 930                                 data->fan_min[nr] = fan_min;
 931                                 nct6775_write_value(data, data->REG_FAN_MIN[nr],
 932                                                     fan_min);
 933                         }
 934                 }
 935                 data->fan_div[nr] = fan_div;
 936                 nct6775_write_fan_div_common(data, nr);
 937         }
 938 }
 939
 940 static void nct6775_update_pwm(struct device *dev)
 941 {
 942         struct nct6775_data *data = dev_get_drvdata(dev);
 943         int i, j;
 944         int fanmodecfg, reg;
 945         bool duty_is_dc;
 946
 947         for (i = 0; i < data->pwm_num; i++) {
 948                 if (!(data->has_pwm & (1 << i)))
 949                         continue;
 950
 951                 duty_is_dc = data->REG_PWM_MODE[i] &&
 952                   (nct6775_read_value(data, data->REG_PWM_MODE[i])
 953                    & data->PWM_MODE_MASK[i]);
 954                 data->pwm_mode[i] = duty_is_dc;
 955
 956                 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
 957                 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
 958                         if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
 959                                 data->pwm[j][i]
 960                                   = nct6775_read_value(data,
 961                                                        data->REG_PWM[j][i]);
 962                         }
 963                 }
 964
 965                 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
 966                                                         (fanmodecfg >> 4) & 7);
 967
 968                 if (!data->temp_tolerance[0][i] ||
 969                     data->pwm_enable[i] != speed_cruise)
 970                         data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
 971                 if (!data->target_speed_tolerance[i] ||
 972                     data->pwm_enable[i] == speed_cruise) {
 973                         u8 t = fanmodecfg & 0x0f;
 974                         if (data->REG_TOLERANCE_H) {
 975                                 t |= (nct6775_read_value(data,
 976                                       data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
 977                         }
 978                         data->target_speed_tolerance[i] = t;
 979                 }
 980
 981                 data->temp_tolerance[1][i] =
 982                         nct6775_read_value(data,
 983                                         data->REG_CRITICAL_TEMP_TOLERANCE[i]);
 984
 985                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
 986                 data->pwm_temp_sel[i] = reg & 0x1f;
 987                 /* If fan can stop, report floor as 0 */
 988                 if (reg & 0x80)
 989                         data->pwm[2][i] = 0;
 990
 991                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
 992                 data->pwm_weight_temp_sel[i] = reg & 0x1f;
 993                 /* If weight is disabled, report weight source as 0 */
 994                 if (j == 1 && !(reg & 0x80))
 995                         data->pwm_weight_temp_sel[i] = 0;
 996
 997                 /* Weight temp data */
 998                 for (j = 0; j < 3; j++) {
 999                         data->weight_temp[j][i]
1000                           = nct6775_read_value(data,
1001                                                data->REG_WEIGHT_TEMP[j][i]);
1002                 }
1003         }
1004 }
1005
1006 static void nct6775_update_pwm_limits(struct device *dev)
1007 {
1008         struct nct6775_data *data = dev_get_drvdata(dev);
1009         int i, j;
1010         u8 reg;
1011         u16 reg_t;
1012
1013         for (i = 0; i < data->pwm_num; i++) {
1014                 if (!(data->has_pwm & (1 << i)))
1015                         continue;
1016
1017                 for (j = 0; j < 3; j++) {
1018                         data->fan_time[j][i] =
1019                           nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1020                 }
1021
1022                 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1023                 /* Update only in matching mode or if never updated */
1024                 if (!data->target_temp[i] ||
1025                     data->pwm_enable[i] == thermal_cruise)
1026                         data->target_temp[i] = reg_t & data->target_temp_mask;
1027                 if (!data->target_speed[i] ||
1028                     data->pwm_enable[i] == speed_cruise) {
1029                         if (data->REG_TOLERANCE_H) {
1030                                 reg_t |= (nct6775_read_value(data,
1031                                         data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1032                         }
1033                         data->target_speed[i] = reg_t;
1034                 }
1035
1036                 for (j = 0; j < data->auto_pwm_num; j++) {
1037                         data->auto_pwm[i][j] =
1038                           nct6775_read_value(data,
1039                                              NCT6775_AUTO_PWM(data, i, j));
1040                         data->auto_temp[i][j] =
1041                           nct6775_read_value(data,
1042                                              NCT6775_AUTO_TEMP(data, i, j));
1043                 }
1044
1045                 /* critical auto_pwm temperature data */
1046                 data->auto_temp[i][data->auto_pwm_num] =
1047                         nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1048
1049                 switch (data->kind) {
1050                 case nct6775:
1051                         reg = nct6775_read_value(data,
1052                                                  NCT6775_REG_CRITICAL_ENAB[i]);
1053                         data->auto_pwm[i][data->auto_pwm_num] =
1054                                                 (reg & 0x02) ? 0xff : 0x00;
1055                         break;
1056                 case nct6776:
1057                         data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1058                         break;
1059                 case nct6779:
1060                         reg = nct6775_read_value(data,
1061                                         NCT6779_REG_CRITICAL_PWM_ENABLE[i]);
1062                         if (reg & 1)
1063                                 data->auto_pwm[i][data->auto_pwm_num] =
1064                                   nct6775_read_value(data,
1065                                         NCT6779_REG_CRITICAL_PWM[i]);
1066                         else
1067                                 data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1068                         break;
1069                 }
1070         }
1071 }
1072
1073 static struct nct6775_data *nct6775_update_device(struct device *dev)
1074 {
1075         struct nct6775_data *data = dev_get_drvdata(dev);
1076         int i, j;
1077
1078         mutex_lock(&data->update_lock);
1079
1080         if (time_after(jiffies, data->last_updated + HZ + HZ/2)
1081             || !data->valid) {
1082                 /* Fan clock dividers */
1083                 nct6775_update_fan_div_common(data);
1084
1085                 /* Measured voltages and limits */
1086                 for (i = 0; i < data->in_num; i++) {
1087                         if (!(data->have_in & (1 << i)))
1088                                 continue;
1089
1090                         data->in[i][0] = nct6775_read_value(data,
1091                                                             data->REG_VIN[i]);
1092                         data->in[i][1] = nct6775_read_value(data,
1093                                           data->REG_IN_MINMAX[0][i]);
1094                         data->in[i][2] = nct6775_read_value(data,
1095                                           data->REG_IN_MINMAX[1][i]);
1096                 }
1097
1098                 /* Measured fan speeds and limits */
1099                 for (i = 0; i < 5; i++) {
1100                         u16 reg;
1101
1102                         if (!(data->has_fan & (1 << i)))
1103                                 continue;
1104
1105                         reg = nct6775_read_value(data, data->REG_FAN[i]);
1106                         data->rpm[i] = data->fan_from_reg(reg,
1107                                                           data->fan_div[i]);
1108
1109                         if (data->has_fan_min & (1 << i))
1110                                 data->fan_min[i] = nct6775_read_value(data,
1111                                            data->REG_FAN_MIN[i]);
1112                         data->fan_pulses[i] =
1113                           nct6775_read_value(data, data->REG_FAN_PULSES[i]);
1114
1115                         nct6775_select_fan_div(dev, data, i, reg);
1116                 }
1117
1118                 nct6775_update_pwm(dev);
1119                 nct6775_update_pwm_limits(dev);
1120
1121                 /* Measured temperatures and limits */
1122                 for (i = 0; i < NUM_TEMP; i++) {
1123                         if (!(data->have_temp & (1 << i)))
1124                                 continue;
1125                         for (j = 0; j < 4; j++) {
1126                                 if (data->reg_temp[j][i])
1127                                         data->temp[j][i]
1128                                           = nct6775_read_temp(data,
1129                                                 data->reg_temp[j][i]);
1130                         }
1131                         if (!(data->have_temp_fixed & (1 << i)))
1132                                 continue;
1133                         data->temp_offset[i]
1134                           = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1135                 }
1136
1137                 data->alarms = 0;
1138                 for (i = 0; i < NUM_REG_ALARM; i++) {
1139                         u8 alarm;
1140                         if (!data->REG_ALARM[i])
1141                                 continue;
1142                         alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1143                         data->alarms |= ((u64)alarm) << (i << 3);
1144                 }
1145
1146                 data->last_updated = jiffies;
1147                 data->valid = true;
1148         }
1149
1150         mutex_unlock(&data->update_lock);
1151         return data;
1152 }
1153
1154 /*
1155  * Sysfs callback functions
1156  */
1157 static ssize_t
1158 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1159 {
1160         struct nct6775_data *data = nct6775_update_device(dev);
1161         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1162         int nr = sattr->nr;
1163         int index = sattr->index;
1164         return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1165 }
1166
1167 static ssize_t
1168 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1169              size_t count)
1170 {
1171         struct nct6775_data *data = dev_get_drvdata(dev);
1172         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1173         int nr = sattr->nr;
1174         int index = sattr->index;
1175         unsigned long val;
1176         int err = kstrtoul(buf, 10, &val);
1177         if (err < 0)
1178                 return err;
1179         mutex_lock(&data->update_lock);
1180         data->in[nr][index] = in_to_reg(val, nr);
1181         nct6775_write_value(data, data->REG_IN_MINMAX[index-1][nr],
1182                             data->in[nr][index]);
1183         mutex_unlock(&data->update_lock);
1184         return count;
1185 }
1186
1187 static ssize_t
1188 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1189 {
1190         struct nct6775_data *data = nct6775_update_device(dev);
1191         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1192         int nr = data->ALARM_BITS[sattr->index];
1193         return sprintf(buf, "%u\n",
1194                        (unsigned int)((data->alarms >> nr) & 0x01));
1195 }
1196
1197 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in_reg, NULL, 0, 0);
1198 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in_reg, NULL, 1, 0);
1199 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in_reg, NULL, 2, 0);
1200 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in_reg, NULL, 3, 0);
1201 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in_reg, NULL, 4, 0);
1202 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in_reg, NULL, 5, 0);
1203 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in_reg, NULL, 6, 0);
1204 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in_reg, NULL, 7, 0);
1205 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in_reg, NULL, 8, 0);
1206 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in_reg, NULL, 9, 0);
1207 static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in_reg, NULL, 10, 0);
1208 static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in_reg, NULL, 11, 0);
1209 static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in_reg, NULL, 12, 0);
1210 static SENSOR_DEVICE_ATTR_2(in13_input, S_IRUGO, show_in_reg, NULL, 13, 0);
1211 static SENSOR_DEVICE_ATTR_2(in14_input, S_IRUGO, show_in_reg, NULL, 14, 0);
1212
1213 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
1214 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
1215 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
1216 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
1217 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 4);
1218 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 5);
1219 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 6);
1220 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 7);
1221 static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 8);
1222 static SENSOR_DEVICE_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 9);
1223 static SENSOR_DEVICE_ATTR(in10_alarm, S_IRUGO, show_alarm, NULL, 10);
1224 static SENSOR_DEVICE_ATTR(in11_alarm, S_IRUGO, show_alarm, NULL, 11);
1225 static SENSOR_DEVICE_ATTR(in12_alarm, S_IRUGO, show_alarm, NULL, 12);
1226 static SENSOR_DEVICE_ATTR(in13_alarm, S_IRUGO, show_alarm, NULL, 13);
1227 static SENSOR_DEVICE_ATTR(in14_alarm, S_IRUGO, show_alarm, NULL, 14);
1228
1229 static SENSOR_DEVICE_ATTR_2(in0_min, S_IWUSR | S_IRUGO, show_in_reg,
1230                             store_in_reg, 0, 1);
1231 static SENSOR_DEVICE_ATTR_2(in1_min, S_IWUSR | S_IRUGO, show_in_reg,
1232                             store_in_reg, 1, 1);
1233 static SENSOR_DEVICE_ATTR_2(in2_min, S_IWUSR | S_IRUGO, show_in_reg,
1234                             store_in_reg, 2, 1);
1235 static SENSOR_DEVICE_ATTR_2(in3_min, S_IWUSR | S_IRUGO, show_in_reg,
1236                             store_in_reg, 3, 1);
1237 static SENSOR_DEVICE_ATTR_2(in4_min, S_IWUSR | S_IRUGO, show_in_reg,
1238                             store_in_reg, 4, 1);
1239 static SENSOR_DEVICE_ATTR_2(in5_min, S_IWUSR | S_IRUGO, show_in_reg,
1240                             store_in_reg, 5, 1);
1241 static SENSOR_DEVICE_ATTR_2(in6_min, S_IWUSR | S_IRUGO, show_in_reg,
1242                             store_in_reg, 6, 1);
1243 static SENSOR_DEVICE_ATTR_2(in7_min, S_IWUSR | S_IRUGO, show_in_reg,
1244                             store_in_reg, 7, 1);
1245 static SENSOR_DEVICE_ATTR_2(in8_min, S_IWUSR | S_IRUGO, show_in_reg,
1246                             store_in_reg, 8, 1);
1247 static SENSOR_DEVICE_ATTR_2(in9_min, S_IWUSR | S_IRUGO, show_in_reg,
1248                             store_in_reg, 9, 1);
1249 static SENSOR_DEVICE_ATTR_2(in10_min, S_IWUSR | S_IRUGO, show_in_reg,
1250                             store_in_reg, 10, 1);
1251 static SENSOR_DEVICE_ATTR_2(in11_min, S_IWUSR | S_IRUGO, show_in_reg,
1252                             store_in_reg, 11, 1);
1253 static SENSOR_DEVICE_ATTR_2(in12_min, S_IWUSR | S_IRUGO, show_in_reg,
1254                             store_in_reg, 12, 1);
1255 static SENSOR_DEVICE_ATTR_2(in13_min, S_IWUSR | S_IRUGO, show_in_reg,
1256                             store_in_reg, 13, 1);
1257 static SENSOR_DEVICE_ATTR_2(in14_min, S_IWUSR | S_IRUGO, show_in_reg,
1258                             store_in_reg, 14, 1);
1259
1260 static SENSOR_DEVICE_ATTR_2(in0_max, S_IWUSR | S_IRUGO, show_in_reg,
1261                             store_in_reg, 0, 2);
1262 static SENSOR_DEVICE_ATTR_2(in1_max, S_IWUSR | S_IRUGO, show_in_reg,
1263                             store_in_reg, 1, 2);
1264 static SENSOR_DEVICE_ATTR_2(in2_max, S_IWUSR | S_IRUGO, show_in_reg,
1265                             store_in_reg, 2, 2);
1266 static SENSOR_DEVICE_ATTR_2(in3_max, S_IWUSR | S_IRUGO, show_in_reg,
1267                             store_in_reg, 3, 2);
1268 static SENSOR_DEVICE_ATTR_2(in4_max, S_IWUSR | S_IRUGO, show_in_reg,
1269                             store_in_reg, 4, 2);
1270 static SENSOR_DEVICE_ATTR_2(in5_max, S_IWUSR | S_IRUGO, show_in_reg,
1271                             store_in_reg, 5, 2);
1272 static SENSOR_DEVICE_ATTR_2(in6_max, S_IWUSR | S_IRUGO, show_in_reg,
1273                             store_in_reg, 6, 2);
1274 static SENSOR_DEVICE_ATTR_2(in7_max, S_IWUSR | S_IRUGO, show_in_reg,
1275                             store_in_reg, 7, 2);
1276 static SENSOR_DEVICE_ATTR_2(in8_max, S_IWUSR | S_IRUGO, show_in_reg,
1277                             store_in_reg, 8, 2);
1278 static SENSOR_DEVICE_ATTR_2(in9_max, S_IWUSR | S_IRUGO, show_in_reg,
1279                             store_in_reg, 9, 2);
1280 static SENSOR_DEVICE_ATTR_2(in10_max, S_IWUSR | S_IRUGO, show_in_reg,
1281                             store_in_reg, 10, 2);
1282 static SENSOR_DEVICE_ATTR_2(in11_max, S_IWUSR | S_IRUGO, show_in_reg,
1283                             store_in_reg, 11, 2);
1284 static SENSOR_DEVICE_ATTR_2(in12_max, S_IWUSR | S_IRUGO, show_in_reg,
1285                             store_in_reg, 12, 2);
1286 static SENSOR_DEVICE_ATTR_2(in13_max, S_IWUSR | S_IRUGO, show_in_reg,
1287                             store_in_reg, 13, 2);
1288 static SENSOR_DEVICE_ATTR_2(in14_max, S_IWUSR | S_IRUGO, show_in_reg,
1289                             store_in_reg, 14, 2);
1290
1291 static struct attribute *nct6775_attributes_in[15][5] = {
1292         {
1293                 &sensor_dev_attr_in0_input.dev_attr.attr,
1294                 &sensor_dev_attr_in0_min.dev_attr.attr,
1295                 &sensor_dev_attr_in0_max.dev_attr.attr,
1296                 &sensor_dev_attr_in0_alarm.dev_attr.attr,
1297                 NULL
1298         },
1299         {
1300                 &sensor_dev_attr_in1_input.dev_attr.attr,
1301                 &sensor_dev_attr_in1_min.dev_attr.attr,
1302                 &sensor_dev_attr_in1_max.dev_attr.attr,
1303                 &sensor_dev_attr_in1_alarm.dev_attr.attr,
1304                 NULL
1305         },
1306         {
1307                 &sensor_dev_attr_in2_input.dev_attr.attr,
1308                 &sensor_dev_attr_in2_min.dev_attr.attr,
1309                 &sensor_dev_attr_in2_max.dev_attr.attr,
1310                 &sensor_dev_attr_in2_alarm.dev_attr.attr,
1311                 NULL
1312         },
1313         {
1314                 &sensor_dev_attr_in3_input.dev_attr.attr,
1315                 &sensor_dev_attr_in3_min.dev_attr.attr,
1316                 &sensor_dev_attr_in3_max.dev_attr.attr,
1317                 &sensor_dev_attr_in3_alarm.dev_attr.attr,
1318                 NULL
1319         },
1320         {
1321                 &sensor_dev_attr_in4_input.dev_attr.attr,
1322                 &sensor_dev_attr_in4_min.dev_attr.attr,
1323                 &sensor_dev_attr_in4_max.dev_attr.attr,
1324                 &sensor_dev_attr_in4_alarm.dev_attr.attr,
1325                 NULL
1326         },
1327         {
1328                 &sensor_dev_attr_in5_input.dev_attr.attr,
1329                 &sensor_dev_attr_in5_min.dev_attr.attr,
1330                 &sensor_dev_attr_in5_max.dev_attr.attr,
1331                 &sensor_dev_attr_in5_alarm.dev_attr.attr,
1332                 NULL
1333         },
1334         {
1335                 &sensor_dev_attr_in6_input.dev_attr.attr,
1336                 &sensor_dev_attr_in6_min.dev_attr.attr,
1337                 &sensor_dev_attr_in6_max.dev_attr.attr,
1338                 &sensor_dev_attr_in6_alarm.dev_attr.attr,
1339                 NULL
1340         },
1341         {
1342                 &sensor_dev_attr_in7_input.dev_attr.attr,
1343                 &sensor_dev_attr_in7_min.dev_attr.attr,
1344                 &sensor_dev_attr_in7_max.dev_attr.attr,
1345                 &sensor_dev_attr_in7_alarm.dev_attr.attr,
1346                 NULL
1347         },
1348         {
1349                 &sensor_dev_attr_in8_input.dev_attr.attr,
1350                 &sensor_dev_attr_in8_min.dev_attr.attr,
1351                 &sensor_dev_attr_in8_max.dev_attr.attr,
1352                 &sensor_dev_attr_in8_alarm.dev_attr.attr,
1353                 NULL
1354         },
1355         {
1356                 &sensor_dev_attr_in9_input.dev_attr.attr,
1357                 &sensor_dev_attr_in9_min.dev_attr.attr,
1358                 &sensor_dev_attr_in9_max.dev_attr.attr,
1359                 &sensor_dev_attr_in9_alarm.dev_attr.attr,
1360                 NULL
1361         },
1362         {
1363                 &sensor_dev_attr_in10_input.dev_attr.attr,
1364                 &sensor_dev_attr_in10_min.dev_attr.attr,
1365                 &sensor_dev_attr_in10_max.dev_attr.attr,
1366                 &sensor_dev_attr_in10_alarm.dev_attr.attr,
1367                 NULL
1368         },
1369         {
1370                 &sensor_dev_attr_in11_input.dev_attr.attr,
1371                 &sensor_dev_attr_in11_min.dev_attr.attr,
1372                 &sensor_dev_attr_in11_max.dev_attr.attr,
1373                 &sensor_dev_attr_in11_alarm.dev_attr.attr,
1374                 NULL
1375         },
1376         {
1377                 &sensor_dev_attr_in12_input.dev_attr.attr,
1378                 &sensor_dev_attr_in12_min.dev_attr.attr,
1379                 &sensor_dev_attr_in12_max.dev_attr.attr,
1380                 &sensor_dev_attr_in12_alarm.dev_attr.attr,
1381                 NULL
1382         },
1383         {
1384                 &sensor_dev_attr_in13_input.dev_attr.attr,
1385                 &sensor_dev_attr_in13_min.dev_attr.attr,
1386                 &sensor_dev_attr_in13_max.dev_attr.attr,
1387                 &sensor_dev_attr_in13_alarm.dev_attr.attr,
1388                 NULL
1389         },
1390         {
1391                 &sensor_dev_attr_in14_input.dev_attr.attr,
1392                 &sensor_dev_attr_in14_min.dev_attr.attr,
1393                 &sensor_dev_attr_in14_max.dev_attr.attr,
1394                 &sensor_dev_attr_in14_alarm.dev_attr.attr,
1395                 NULL
1396         },
1397 };
1398
1399 static const struct attribute_group nct6775_group_in[15] = {
1400         { .attrs = nct6775_attributes_in[0] },
1401         { .attrs = nct6775_attributes_in[1] },
1402         { .attrs = nct6775_attributes_in[2] },
1403         { .attrs = nct6775_attributes_in[3] },
1404         { .attrs = nct6775_attributes_in[4] },
1405         { .attrs = nct6775_attributes_in[5] },
1406         { .attrs = nct6775_attributes_in[6] },
1407         { .attrs = nct6775_attributes_in[7] },
1408         { .attrs = nct6775_attributes_in[8] },
1409         { .attrs = nct6775_attributes_in[9] },
1410         { .attrs = nct6775_attributes_in[10] },
1411         { .attrs = nct6775_attributes_in[11] },
1412         { .attrs = nct6775_attributes_in[12] },
1413         { .attrs = nct6775_attributes_in[13] },
1414         { .attrs = nct6775_attributes_in[14] },
1415 };
1416
1417 static ssize_t
1418 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1419 {
1420         struct nct6775_data *data = nct6775_update_device(dev);
1421         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1422         int nr = sattr->index;
1423         return sprintf(buf, "%d\n", data->rpm[nr]);
1424 }
1425
1426 static ssize_t
1427 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1428 {
1429         struct nct6775_data *data = nct6775_update_device(dev);
1430         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1431         int nr = sattr->index;
1432         return sprintf(buf, "%d\n",
1433                        data->fan_from_reg_min(data->fan_min[nr],
1434                                               data->fan_div[nr]));
1435 }
1436
1437 static ssize_t
1438 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1439 {
1440         struct nct6775_data *data = nct6775_update_device(dev);
1441         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1442         int nr = sattr->index;
1443         return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1444 }
1445
1446 static ssize_t
1447 store_fan_min(struct device *dev, struct device_attribute *attr,
1448               const char *buf, size_t count)
1449 {
1450         struct nct6775_data *data = dev_get_drvdata(dev);
1451         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1452         int nr = sattr->index;
1453         unsigned long val;
1454         int err;
1455         unsigned int reg;
1456         u8 new_div;
1457
1458         err = kstrtoul(buf, 10, &val);
1459         if (err < 0)
1460                 return err;
1461
1462         mutex_lock(&data->update_lock);
1463         if (!data->has_fan_div) {
1464                 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1465                 if (!val) {
1466                         val = 0xff1f;
1467                 } else {
1468                         if (val > 1350000U)
1469                                 val = 135000U;
1470                         val = 1350000U / val;
1471                         val = (val & 0x1f) | ((val << 3) & 0xff00);
1472                 }
1473                 data->fan_min[nr] = val;
1474                 goto write_min; /* Leave fan divider alone */
1475         }
1476         if (!val) {
1477                 /* No min limit, alarm disabled */
1478                 data->fan_min[nr] = 255;
1479                 new_div = data->fan_div[nr]; /* No change */
1480                 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1481                 goto write_div;
1482         }
1483         reg = 1350000U / val;
1484         if (reg >= 128 * 255) {
1485                 /*
1486                  * Speed below this value cannot possibly be represented,
1487                  * even with the highest divider (128)
1488                  */
1489                 data->fan_min[nr] = 254;
1490                 new_div = 7; /* 128 == (1 << 7) */
1491                 dev_warn(dev,
1492                          "fan%u low limit %lu below minimum %u, set to minimum\n",
1493                          nr + 1, val, data->fan_from_reg_min(254, 7));
1494         } else if (!reg) {
1495                 /*
1496                  * Speed above this value cannot possibly be represented,
1497                  * even with the lowest divider (1)
1498                  */
1499                 data->fan_min[nr] = 1;
1500                 new_div = 0; /* 1 == (1 << 0) */
1501                 dev_warn(dev,
1502                          "fan%u low limit %lu above maximum %u, set to maximum\n",
1503                          nr + 1, val, data->fan_from_reg_min(1, 0));
1504         } else {
1505                 /*
1506                  * Automatically pick the best divider, i.e. the one such
1507                  * that the min limit will correspond to a register value
1508                  * in the 96..192 range
1509                  */
1510                 new_div = 0;
1511                 while (reg > 192 && new_div < 7) {
1512                         reg >>= 1;
1513                         new_div++;
1514                 }
1515                 data->fan_min[nr] = reg;
1516         }
1517
1518 write_div:
1519         /*
1520          * Write both the fan clock divider (if it changed) and the new
1521          * fan min (unconditionally)
1522          */
1523         if (new_div != data->fan_div[nr]) {
1524                 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1525                         nr + 1, div_from_reg(data->fan_div[nr]),
1526                         div_from_reg(new_div));
1527                 data->fan_div[nr] = new_div;
1528                 nct6775_write_fan_div_common(data, nr);
1529                 /* Give the chip time to sample a new speed value */
1530                 data->last_updated = jiffies;
1531         }
1532
1533 write_min:
1534         nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1535         mutex_unlock(&data->update_lock);
1536
1537         return count;
1538 }
1539
1540 static ssize_t
1541 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
1542 {
1543         struct nct6775_data *data = nct6775_update_device(dev);
1544         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1545         int p = data->fan_pulses[sattr->index];
1546
1547         return sprintf(buf, "%d\n", p ? : 4);
1548 }
1549
1550 static ssize_t
1551 store_fan_pulses(struct device *dev, struct device_attribute *attr,
1552                  const char *buf, size_t count)
1553 {
1554         struct nct6775_data *data = dev_get_drvdata(dev);
1555         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1556         int nr = sattr->index;
1557         unsigned long val;
1558         int err;
1559
1560         err = kstrtoul(buf, 10, &val);
1561         if (err < 0)
1562                 return err;
1563
1564         if (val > 4)
1565                 return -EINVAL;
1566
1567         mutex_lock(&data->update_lock);
1568         data->fan_pulses[nr] = val & 3;
1569         nct6775_write_value(data, data->REG_FAN_PULSES[nr], val & 3);
1570         mutex_unlock(&data->update_lock);
1571
1572         return count;
1573 }
1574
1575 static struct sensor_device_attribute sda_fan_input[] = {
1576         SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
1577         SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
1578         SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),
1579         SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3),
1580         SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4),
1581 };
1582
1583 static struct sensor_device_attribute sda_fan_alarm[] = {
1584         SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE),
1585         SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 1),
1586         SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 2),
1587         SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 3),
1588         SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 4),
1589 };
1590
1591 static struct sensor_device_attribute sda_fan_min[] = {
1592         SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min,
1593                     store_fan_min, 0),
1594         SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min,
1595                     store_fan_min, 1),
1596         SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, show_fan_min,
1597                     store_fan_min, 2),
1598         SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, show_fan_min,
1599                     store_fan_min, 3),
1600         SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, show_fan_min,
1601                     store_fan_min, 4),
1602 };
1603
1604 static struct sensor_device_attribute sda_fan_pulses[] = {
1605         SENSOR_ATTR(fan1_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1606                     store_fan_pulses, 0),
1607         SENSOR_ATTR(fan2_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1608                     store_fan_pulses, 1),
1609         SENSOR_ATTR(fan3_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1610                     store_fan_pulses, 2),
1611         SENSOR_ATTR(fan4_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1612                     store_fan_pulses, 3),
1613         SENSOR_ATTR(fan5_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1614                     store_fan_pulses, 4),
1615 };
1616
1617 static struct sensor_device_attribute sda_fan_div[] = {
1618         SENSOR_ATTR(fan1_div, S_IRUGO, show_fan_div, NULL, 0),
1619         SENSOR_ATTR(fan2_div, S_IRUGO, show_fan_div, NULL, 1),
1620         SENSOR_ATTR(fan3_div, S_IRUGO, show_fan_div, NULL, 2),
1621         SENSOR_ATTR(fan4_div, S_IRUGO, show_fan_div, NULL, 3),
1622         SENSOR_ATTR(fan5_div, S_IRUGO, show_fan_div, NULL, 4),
1623 };
1624
1625 static ssize_t
1626 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1627 {
1628         struct nct6775_data *data = nct6775_update_device(dev);
1629         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1630         int nr = sattr->index;
1631         return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1632 }
1633
1634 static ssize_t
1635 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1636 {
1637         struct nct6775_data *data = nct6775_update_device(dev);
1638         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1639         int nr = sattr->nr;
1640         int index = sattr->index;
1641
1642         return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
1643 }
1644
1645 static ssize_t
1646 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
1647            size_t count)
1648 {
1649         struct nct6775_data *data = dev_get_drvdata(dev);
1650         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1651         int nr = sattr->nr;
1652         int index = sattr->index;
1653         int err;
1654         long val;
1655
1656         err = kstrtol(buf, 10, &val);
1657         if (err < 0)
1658                 return err;
1659
1660         mutex_lock(&data->update_lock);
1661         data->temp[index][nr] = LM75_TEMP_TO_REG(val);
1662         nct6775_write_temp(data, data->reg_temp[index][nr],
1663                            data->temp[index][nr]);
1664         mutex_unlock(&data->update_lock);
1665         return count;
1666 }
1667
1668 static ssize_t
1669 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
1670 {
1671         struct nct6775_data *data = nct6775_update_device(dev);
1672         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1673
1674         return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
1675 }
1676
1677 static ssize_t
1678 store_temp_offset(struct device *dev, struct device_attribute *attr,
1679                   const char *buf, size_t count)
1680 {
1681         struct nct6775_data *data = dev_get_drvdata(dev);
1682         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1683         int nr = sattr->index;
1684         long val;
1685         int err;
1686
1687         err = kstrtol(buf, 10, &val);
1688         if (err < 0)
1689                 return err;
1690
1691         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
1692
1693         mutex_lock(&data->update_lock);
1694         data->temp_offset[nr] = val;
1695         nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
1696         mutex_unlock(&data->update_lock);
1697
1698         return count;
1699 }
1700
1701 static ssize_t
1702 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
1703 {
1704         struct nct6775_data *data = nct6775_update_device(dev);
1705         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1706         int nr = sattr->index;
1707         return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
1708 }
1709
1710 static ssize_t
1711 store_temp_type(struct device *dev, struct device_attribute *attr,
1712                 const char *buf, size_t count)
1713 {
1714         struct nct6775_data *data = nct6775_update_device(dev);
1715         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1716         int nr = sattr->index;
1717         unsigned long val;
1718         int err;
1719         u8 vbat, diode, bit;
1720
1721         err = kstrtoul(buf, 10, &val);
1722         if (err < 0)
1723                 return err;
1724
1725         if (val != 1 && val != 3 && val != 4)
1726                 return -EINVAL;
1727
1728         mutex_lock(&data->update_lock);
1729
1730         data->temp_type[nr] = val;
1731         vbat = nct6775_read_value(data, data->REG_VBAT) & ~(0x02 << nr);
1732         diode = nct6775_read_value(data, data->REG_DIODE) & ~(0x02 << nr);
1733         bit = 0x02 << nr;
1734         switch (val) {
1735         case 1: /* CPU diode (diode, current mode) */
1736                 vbat |= bit;
1737                 diode |= bit;
1738                 break;
1739         case 3: /* diode, voltage mode */
1740                 vbat |= bit;
1741                 break;
1742         case 4: /* thermistor */
1743                 break;
1744         }
1745         nct6775_write_value(data, data->REG_VBAT, vbat);
1746         nct6775_write_value(data, data->REG_DIODE, diode);
1747
1748         mutex_unlock(&data->update_lock);
1749         return count;
1750 }
1751
1752 static struct sensor_device_attribute_2 sda_temp_input[] = {
1753         SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0),
1754         SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0),
1755         SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0),
1756         SENSOR_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0),
1757         SENSOR_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0),
1758         SENSOR_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0),
1759         SENSOR_ATTR_2(temp7_input, S_IRUGO, show_temp, NULL, 6, 0),
1760         SENSOR_ATTR_2(temp8_input, S_IRUGO, show_temp, NULL, 7, 0),
1761         SENSOR_ATTR_2(temp9_input, S_IRUGO, show_temp, NULL, 8, 0),
1762         SENSOR_ATTR_2(temp10_input, S_IRUGO, show_temp, NULL, 9, 0),
1763 };
1764
1765 static struct sensor_device_attribute sda_temp_label[] = {
1766         SENSOR_ATTR(temp1_label, S_IRUGO, show_temp_label, NULL, 0),
1767         SENSOR_ATTR(temp2_label, S_IRUGO, show_temp_label, NULL, 1),
1768         SENSOR_ATTR(temp3_label, S_IRUGO, show_temp_label, NULL, 2),
1769         SENSOR_ATTR(temp4_label, S_IRUGO, show_temp_label, NULL, 3),
1770         SENSOR_ATTR(temp5_label, S_IRUGO, show_temp_label, NULL, 4),
1771         SENSOR_ATTR(temp6_label, S_IRUGO, show_temp_label, NULL, 5),
1772         SENSOR_ATTR(temp7_label, S_IRUGO, show_temp_label, NULL, 6),
1773         SENSOR_ATTR(temp8_label, S_IRUGO, show_temp_label, NULL, 7),
1774         SENSOR_ATTR(temp9_label, S_IRUGO, show_temp_label, NULL, 8),
1775         SENSOR_ATTR(temp10_label, S_IRUGO, show_temp_label, NULL, 9),
1776 };
1777
1778 static struct sensor_device_attribute_2 sda_temp_max[] = {
1779         SENSOR_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1780                       0, 1),
1781         SENSOR_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1782                       1, 1),
1783         SENSOR_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1784                       2, 1),
1785         SENSOR_ATTR_2(temp4_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1786                       3, 1),
1787         SENSOR_ATTR_2(temp5_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1788                       4, 1),
1789         SENSOR_ATTR_2(temp6_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1790                       5, 1),
1791         SENSOR_ATTR_2(temp7_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1792                       6, 1),
1793         SENSOR_ATTR_2(temp8_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1794                       7, 1),
1795         SENSOR_ATTR_2(temp9_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1796                       8, 1),
1797         SENSOR_ATTR_2(temp10_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1798                       9, 1),
1799 };
1800
1801 static struct sensor_device_attribute_2 sda_temp_max_hyst[] = {
1802         SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1803                       0, 2),
1804         SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1805                       1, 2),
1806         SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1807                       2, 2),
1808         SENSOR_ATTR_2(temp4_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1809                       3, 2),
1810         SENSOR_ATTR_2(temp5_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1811                       4, 2),
1812         SENSOR_ATTR_2(temp6_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1813                       5, 2),
1814         SENSOR_ATTR_2(temp7_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1815                       6, 2),
1816         SENSOR_ATTR_2(temp8_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1817                       7, 2),
1818         SENSOR_ATTR_2(temp9_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1819                       8, 2),
1820         SENSOR_ATTR_2(temp10_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1821                       9, 2),
1822 };
1823
1824 static struct sensor_device_attribute_2 sda_temp_crit[] = {
1825         SENSOR_ATTR_2(temp1_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1826                       0, 3),
1827         SENSOR_ATTR_2(temp2_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1828                       1, 3),
1829         SENSOR_ATTR_2(temp3_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1830                       2, 3),
1831         SENSOR_ATTR_2(temp4_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1832                       3, 3),
1833         SENSOR_ATTR_2(temp5_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1834                       4, 3),
1835         SENSOR_ATTR_2(temp6_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1836                       5, 3),
1837         SENSOR_ATTR_2(temp7_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1838                       6, 3),
1839         SENSOR_ATTR_2(temp8_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1840                       7, 3),
1841         SENSOR_ATTR_2(temp9_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1842                       8, 3),
1843         SENSOR_ATTR_2(temp10_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1844                       9, 3),
1845 };
1846
1847 static struct sensor_device_attribute sda_temp_offset[] = {
1848         SENSOR_ATTR(temp1_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1849                     store_temp_offset, 0),
1850         SENSOR_ATTR(temp2_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1851                     store_temp_offset, 1),
1852         SENSOR_ATTR(temp3_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1853                     store_temp_offset, 2),
1854         SENSOR_ATTR(temp4_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1855                     store_temp_offset, 3),
1856         SENSOR_ATTR(temp5_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1857                     store_temp_offset, 4),
1858         SENSOR_ATTR(temp6_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1859                     store_temp_offset, 5),
1860 };
1861
1862 static struct sensor_device_attribute sda_temp_type[] = {
1863         SENSOR_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1864                     store_temp_type, 0),
1865         SENSOR_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1866                     store_temp_type, 1),
1867         SENSOR_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1868                     store_temp_type, 2),
1869         SENSOR_ATTR(temp4_type, S_IRUGO | S_IWUSR, show_temp_type,
1870                     store_temp_type, 3),
1871         SENSOR_ATTR(temp5_type, S_IRUGO | S_IWUSR, show_temp_type,
1872                     store_temp_type, 4),
1873         SENSOR_ATTR(temp6_type, S_IRUGO | S_IWUSR, show_temp_type,
1874                     store_temp_type, 5),
1875 };
1876
1877 static struct sensor_device_attribute sda_temp_alarm[] = {
1878         SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL,
1879                     TEMP_ALARM_BASE),
1880         SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL,
1881                     TEMP_ALARM_BASE + 1),
1882         SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL,
1883                     TEMP_ALARM_BASE + 2),
1884         SENSOR_ATTR(temp4_alarm, S_IRUGO, show_alarm, NULL,
1885                     TEMP_ALARM_BASE + 3),
1886         SENSOR_ATTR(temp5_alarm, S_IRUGO, show_alarm, NULL,
1887                     TEMP_ALARM_BASE + 4),
1888         SENSOR_ATTR(temp6_alarm, S_IRUGO, show_alarm, NULL,
1889                     TEMP_ALARM_BASE + 5),
1890 };
1891
1892 #define NUM_TEMP_ALARM  ARRAY_SIZE(sda_temp_alarm)
1893
1894 static ssize_t
1895 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
1896 {
1897         struct nct6775_data *data = nct6775_update_device(dev);
1898         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1899
1900         return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
1901 }
1902
1903 static ssize_t
1904 store_pwm_mode(struct device *dev, struct device_attribute *attr,
1905                const char *buf, size_t count)
1906 {
1907         struct nct6775_data *data = dev_get_drvdata(dev);
1908         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1909         int nr = sattr->index;
1910         unsigned long val;
1911         int err;
1912         u8 reg;
1913
1914         err = kstrtoul(buf, 10, &val);
1915         if (err < 0)
1916                 return err;
1917
1918         if (val > 1)
1919                 return -EINVAL;
1920
1921         /* Setting DC mode is not supported for all chips/channels */
1922         if (data->REG_PWM_MODE[nr] == 0) {
1923                 if (val)
1924                         return -EINVAL;
1925                 return count;
1926         }
1927
1928         mutex_lock(&data->update_lock);
1929         data->pwm_mode[nr] = val;
1930         reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
1931         reg &= ~data->PWM_MODE_MASK[nr];
1932         if (val)
1933                 reg |= data->PWM_MODE_MASK[nr];
1934         nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
1935         mutex_unlock(&data->update_lock);
1936         return count;
1937 }
1938
1939 static ssize_t
1940 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1941 {
1942         struct nct6775_data *data = nct6775_update_device(dev);
1943         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1944         int nr = sattr->nr;
1945         int index = sattr->index;
1946         int pwm;
1947
1948         /*
1949          * For automatic fan control modes, show current pwm readings.
1950          * Otherwise, show the configured value.
1951          */
1952         if (index == 0 && data->pwm_enable[nr] > manual)
1953                 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
1954         else
1955                 pwm = data->pwm[index][nr];
1956
1957         return sprintf(buf, "%d\n", pwm);
1958 }
1959
1960 static ssize_t
1961 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
1962           size_t count)
1963 {
1964         struct nct6775_data *data = dev_get_drvdata(dev);
1965         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1966         int nr = sattr->nr;
1967         int index = sattr->index;
1968         unsigned long val;
1969         int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
1970         int maxval[7]
1971           = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
1972         int err;
1973         u8 reg;
1974
1975         err = kstrtoul(buf, 10, &val);
1976         if (err < 0)
1977                 return err;
1978         val = clamp_val(val, minval[index], maxval[index]);
1979
1980         mutex_lock(&data->update_lock);
1981         data->pwm[index][nr] = val;
1982         nct6775_write_value(data, data->REG_PWM[index][nr], val);
1983         if (index == 2) { /* floor: disable if val == 0 */
1984                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
1985                 reg &= 0x7f;
1986                 if (val)
1987                         reg |= 0x80;
1988                 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
1989         }
1990         mutex_unlock(&data->update_lock);
1991         return count;
1992 }
1993
1994 /* Returns 0 if OK, -EINVAL otherwise */
1995 static int check_trip_points(struct nct6775_data *data, int nr)
1996 {
1997         int i;
1998
1999         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2000                 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
2001                         return -EINVAL;
2002         }
2003         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2004                 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
2005                         return -EINVAL;
2006         }
2007         /* validate critical temperature and pwm if enabled (pwm > 0) */
2008         if (data->auto_pwm[nr][data->auto_pwm_num]) {
2009                 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2010                                 data->auto_temp[nr][data->auto_pwm_num] ||
2011                     data->auto_pwm[nr][data->auto_pwm_num - 1] >
2012                                 data->auto_pwm[nr][data->auto_pwm_num])
2013                         return -EINVAL;
2014         }
2015         return 0;
2016 }
2017
2018 static void pwm_update_registers(struct nct6775_data *data, int nr)
2019 {
2020         u8 reg;
2021
2022         switch (data->pwm_enable[nr]) {
2023         case off:
2024         case manual:
2025                 break;
2026         case speed_cruise:
2027                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2028                 reg = (reg & ~data->tolerance_mask) |
2029                   (data->target_speed_tolerance[nr] & data->tolerance_mask);
2030                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2031                 nct6775_write_value(data, data->REG_TARGET[nr],
2032                                     data->target_speed[nr] & 0xff);
2033                 if (data->REG_TOLERANCE_H) {
2034                         reg = (data->target_speed[nr] >> 8) & 0x0f;
2035                         reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2036                         nct6775_write_value(data,
2037                                             data->REG_TOLERANCE_H[nr],
2038                                             reg);
2039                 }
2040                 break;
2041         case thermal_cruise:
2042                 nct6775_write_value(data, data->REG_TARGET[nr],
2043                                     data->target_temp[nr]);
2044                 /* intentional */
2045         default:
2046                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2047                 reg = (reg & ~data->tolerance_mask) |
2048                   data->temp_tolerance[0][nr];
2049                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2050                 break;
2051         }
2052 }
2053
2054 static ssize_t
2055 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2056 {
2057         struct nct6775_data *data = nct6775_update_device(dev);
2058         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2059
2060         return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2061 }
2062
2063 static ssize_t
2064 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2065                  const char *buf, size_t count)
2066 {
2067         struct nct6775_data *data = dev_get_drvdata(dev);
2068         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2069         int nr = sattr->index;
2070         unsigned long val;
2071         int err;
2072         u16 reg;
2073
2074         err = kstrtoul(buf, 10, &val);
2075         if (err < 0)
2076                 return err;
2077
2078         if (val > sf4)
2079                 return -EINVAL;
2080
2081         if (val == sf3 && data->kind != nct6775)
2082                 return -EINVAL;
2083
2084         if (val == sf4 && check_trip_points(data, nr)) {
2085                 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2086                 dev_err(dev, "Adjust trip points and try again\n");
2087                 return -EINVAL;
2088         }
2089
2090         mutex_lock(&data->update_lock);
2091         data->pwm_enable[nr] = val;
2092         if (val == off) {
2093                 /*
2094                  * turn off pwm control: select manual mode, set pwm to maximum
2095                  */
2096                 data->pwm[0][nr] = 255;
2097                 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2098         }
2099         pwm_update_registers(data, nr);
2100         reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2101         reg &= 0x0f;
2102         reg |= pwm_enable_to_reg(val) << 4;
2103         nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2104         mutex_unlock(&data->update_lock);
2105         return count;
2106 }
2107
2108 static ssize_t
2109 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2110 {
2111         int i, sel = 0;
2112
2113         for (i = 0; i < NUM_TEMP; i++) {
2114                 if (!(data->have_temp & (1 << i)))
2115                         continue;
2116                 if (src == data->temp_src[i]) {
2117                         sel = i + 1;
2118                         break;
2119                 }
2120         }
2121
2122         return sprintf(buf, "%d\n", sel);
2123 }
2124
2125 static ssize_t
2126 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2127 {
2128         struct nct6775_data *data = nct6775_update_device(dev);
2129         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2130         int index = sattr->index;
2131
2132         return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2133 }
2134
2135 static ssize_t
2136 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2137                    const char *buf, size_t count)
2138 {
2139         struct nct6775_data *data = nct6775_update_device(dev);
2140         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2141         int nr = sattr->index;
2142         unsigned long val;
2143         int err, reg, src;
2144
2145         err = kstrtoul(buf, 10, &val);
2146         if (err < 0)
2147                 return err;
2148         if (val == 0 || val > NUM_TEMP)
2149                 return -EINVAL;
2150         if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
2151                 return -EINVAL;
2152
2153         mutex_lock(&data->update_lock);
2154         src = data->temp_src[val - 1];
2155         data->pwm_temp_sel[nr] = src;
2156         reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2157         reg &= 0xe0;
2158         reg |= src;
2159         nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2160         mutex_unlock(&data->update_lock);
2161
2162         return count;
2163 }
2164
2165 static ssize_t
2166 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2167                          char *buf)
2168 {
2169         struct nct6775_data *data = nct6775_update_device(dev);
2170         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2171         int index = sattr->index;
2172
2173         return show_pwm_temp_sel_common(data, buf,
2174                                         data->pwm_weight_temp_sel[index]);
2175 }
2176
2177 static ssize_t
2178 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2179                           const char *buf, size_t count)
2180 {
2181         struct nct6775_data *data = nct6775_update_device(dev);
2182         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2183         int nr = sattr->index;
2184         unsigned long val;
2185         int err, reg, src;
2186
2187         err = kstrtoul(buf, 10, &val);
2188         if (err < 0)
2189                 return err;
2190         if (val > NUM_TEMP)
2191                 return -EINVAL;
2192         if (val && (!(data->have_temp & (1 << (val - 1))) ||
2193                     !data->temp_src[val - 1]))
2194                 return -EINVAL;
2195
2196         mutex_lock(&data->update_lock);
2197         if (val) {
2198                 src = data->temp_src[val - 1];
2199                 data->pwm_weight_temp_sel[nr] = src;
2200                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2201                 reg &= 0xe0;
2202                 reg |= (src | 0x80);
2203                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2204         } else {
2205                 data->pwm_weight_temp_sel[nr] = 0;
2206                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2207                 reg &= 0x7f;
2208                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2209         }
2210         mutex_unlock(&data->update_lock);
2211
2212         return count;
2213 }
2214
2215 static ssize_t
2216 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2217 {
2218         struct nct6775_data *data = nct6775_update_device(dev);
2219         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2220
2221         return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2222 }
2223
2224 static ssize_t
2225 store_target_temp(struct device *dev, struct device_attribute *attr,
2226                   const char *buf, size_t count)
2227 {
2228         struct nct6775_data *data = dev_get_drvdata(dev);
2229         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2230         int nr = sattr->index;
2231         unsigned long val;
2232         int err;
2233
2234         err = kstrtoul(buf, 10, &val);
2235         if (err < 0)
2236                 return err;
2237
2238         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2239                         data->target_temp_mask);
2240
2241         mutex_lock(&data->update_lock);
2242         data->target_temp[nr] = val;
2243         pwm_update_registers(data, nr);
2244         mutex_unlock(&data->update_lock);
2245         return count;
2246 }
2247
2248 static ssize_t
2249 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2250 {
2251         struct nct6775_data *data = nct6775_update_device(dev);
2252         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2253         int nr = sattr->index;
2254
2255         return sprintf(buf, "%d\n",
2256                        fan_from_reg16(data->target_speed[nr],
2257                                       data->fan_div[nr]));
2258 }
2259
2260 static ssize_t
2261 store_target_speed(struct device *dev, struct device_attribute *attr,
2262                    const char *buf, size_t count)
2263 {
2264         struct nct6775_data *data = dev_get_drvdata(dev);
2265         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2266         int nr = sattr->index;
2267         unsigned long val;
2268         int err;
2269         u16 speed;
2270
2271         err = kstrtoul(buf, 10, &val);
2272         if (err < 0)
2273                 return err;
2274
2275         val = clamp_val(val, 0, 1350000U);
2276         speed = fan_to_reg(val, data->fan_div[nr]);
2277
2278         mutex_lock(&data->update_lock);
2279         data->target_speed[nr] = speed;
2280         pwm_update_registers(data, nr);
2281         mutex_unlock(&data->update_lock);
2282         return count;
2283 }
2284
2285 static ssize_t
2286 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2287                     char *buf)
2288 {
2289         struct nct6775_data *data = nct6775_update_device(dev);
2290         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2291         int nr = sattr->nr;
2292         int index = sattr->index;
2293
2294         return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2295 }
2296
2297 static ssize_t
2298 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2299                      const char *buf, size_t count)
2300 {
2301         struct nct6775_data *data = dev_get_drvdata(dev);
2302         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2303         int nr = sattr->nr;
2304         int index = sattr->index;
2305         unsigned long val;
2306         int err;
2307
2308         err = kstrtoul(buf, 10, &val);
2309         if (err < 0)
2310                 return err;
2311
2312         /* Limit tolerance as needed */
2313         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2314
2315         mutex_lock(&data->update_lock);
2316         data->temp_tolerance[index][nr] = val;
2317         if (index)
2318                 pwm_update_registers(data, nr);
2319         else
2320                 nct6775_write_value(data,
2321                                     data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2322                                     val);
2323         mutex_unlock(&data->update_lock);
2324         return count;
2325 }
2326
2327 /*
2328  * Fan speed tolerance is a tricky beast, since the associated register is
2329  * a tick counter, but the value is reported and configured as rpm.
2330  * Compute resulting low and high rpm values and report the difference.
2331  */
2332 static ssize_t
2333 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2334                      char *buf)
2335 {
2336         struct nct6775_data *data = nct6775_update_device(dev);
2337         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2338         int nr = sattr->index;
2339         int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2340         int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2341         int tolerance;
2342
2343         if (low <= 0)
2344                 low = 1;
2345         if (high > 0xffff)
2346                 high = 0xffff;
2347         if (high < low)
2348                 high = low;
2349
2350         tolerance = (fan_from_reg16(low, data->fan_div[nr])
2351                      - fan_from_reg16(high, data->fan_div[nr])) / 2;
2352
2353         return sprintf(buf, "%d\n", tolerance);
2354 }
2355
2356 static ssize_t
2357 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2358                       const char *buf, size_t count)
2359 {
2360         struct nct6775_data *data = dev_get_drvdata(dev);
2361         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2362         int nr = sattr->index;
2363         unsigned long val;
2364         int err;
2365         int low, high;
2366
2367         err = kstrtoul(buf, 10, &val);
2368         if (err < 0)
2369                 return err;
2370
2371         high = fan_from_reg16(data->target_speed[nr],
2372                               data->fan_div[nr]) + val;
2373         low = fan_from_reg16(data->target_speed[nr],
2374                              data->fan_div[nr]) - val;
2375         if (low <= 0)
2376                 low = 1;
2377         if (high < low)
2378                 high = low;
2379
2380         val = (fan_to_reg(low, data->fan_div[nr]) -
2381                fan_to_reg(high, data->fan_div[nr])) / 2;
2382
2383         /* Limit tolerance as needed */
2384         val = clamp_val(val, 0, data->speed_tolerance_limit);
2385
2386         mutex_lock(&data->update_lock);
2387         data->target_speed_tolerance[nr] = val;
2388         pwm_update_registers(data, nr);
2389         mutex_unlock(&data->update_lock);
2390         return count;
2391 }
2392
2393 static SENSOR_DEVICE_ATTR_2(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2394 static SENSOR_DEVICE_ATTR_2(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1, 0);
2395 static SENSOR_DEVICE_ATTR_2(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2, 0);
2396 static SENSOR_DEVICE_ATTR_2(pwm4, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3, 0);
2397 static SENSOR_DEVICE_ATTR_2(pwm5, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 4, 0);
2398
2399 static SENSOR_DEVICE_ATTR(pwm1_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2400                           store_pwm_mode, 0);
2401 static SENSOR_DEVICE_ATTR(pwm2_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2402                           store_pwm_mode, 1);
2403 static SENSOR_DEVICE_ATTR(pwm3_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2404                           store_pwm_mode, 2);
2405 static SENSOR_DEVICE_ATTR(pwm4_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2406                           store_pwm_mode, 3);
2407 static SENSOR_DEVICE_ATTR(pwm5_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2408                           store_pwm_mode, 4);
2409
2410 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2411                           store_pwm_enable, 0);
2412 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2413                           store_pwm_enable, 1);
2414 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2415                           store_pwm_enable, 2);
2416 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2417                           store_pwm_enable, 3);
2418 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2419                           store_pwm_enable, 4);
2420
2421 static SENSOR_DEVICE_ATTR(pwm1_temp_sel, S_IWUSR | S_IRUGO,
2422                             show_pwm_temp_sel, store_pwm_temp_sel, 0);
2423 static SENSOR_DEVICE_ATTR(pwm2_temp_sel, S_IWUSR | S_IRUGO,
2424                             show_pwm_temp_sel, store_pwm_temp_sel, 1);
2425 static SENSOR_DEVICE_ATTR(pwm3_temp_sel, S_IWUSR | S_IRUGO,
2426                             show_pwm_temp_sel, store_pwm_temp_sel, 2);
2427 static SENSOR_DEVICE_ATTR(pwm4_temp_sel, S_IWUSR | S_IRUGO,
2428                             show_pwm_temp_sel, store_pwm_temp_sel, 3);
2429 static SENSOR_DEVICE_ATTR(pwm5_temp_sel, S_IWUSR | S_IRUGO,
2430                             show_pwm_temp_sel, store_pwm_temp_sel, 4);
2431
2432 static SENSOR_DEVICE_ATTR(pwm1_target_temp, S_IWUSR | S_IRUGO, show_target_temp,
2433                           store_target_temp, 0);
2434 static SENSOR_DEVICE_ATTR(pwm2_target_temp, S_IWUSR | S_IRUGO, show_target_temp,
2435                           store_target_temp, 1);
2436 static SENSOR_DEVICE_ATTR(pwm3_target_temp, S_IWUSR | S_IRUGO, show_target_temp,
2437                           store_target_temp, 2);
2438 static SENSOR_DEVICE_ATTR(pwm4_target_temp, S_IWUSR | S_IRUGO, show_target_temp,
2439                           store_target_temp, 3);
2440 static SENSOR_DEVICE_ATTR(pwm5_target_temp, S_IWUSR | S_IRUGO, show_target_temp,
2441                           store_target_temp, 4);
2442
2443 static SENSOR_DEVICE_ATTR(fan1_target, S_IWUSR | S_IRUGO, show_target_speed,
2444                           store_target_speed, 0);
2445 static SENSOR_DEVICE_ATTR(fan2_target, S_IWUSR | S_IRUGO, show_target_speed,
2446                           store_target_speed, 1);
2447 static SENSOR_DEVICE_ATTR(fan3_target, S_IWUSR | S_IRUGO, show_target_speed,
2448                           store_target_speed, 2);
2449 static SENSOR_DEVICE_ATTR(fan4_target, S_IWUSR | S_IRUGO, show_target_speed,
2450                           store_target_speed, 3);
2451 static SENSOR_DEVICE_ATTR(fan5_target, S_IWUSR | S_IRUGO, show_target_speed,
2452                           store_target_speed, 4);
2453
2454 static SENSOR_DEVICE_ATTR(fan1_tolerance, S_IWUSR | S_IRUGO,
2455                             show_speed_tolerance, store_speed_tolerance, 0);
2456 static SENSOR_DEVICE_ATTR(fan2_tolerance, S_IWUSR | S_IRUGO,
2457                             show_speed_tolerance, store_speed_tolerance, 1);
2458 static SENSOR_DEVICE_ATTR(fan3_tolerance, S_IWUSR | S_IRUGO,
2459                             show_speed_tolerance, store_speed_tolerance, 2);
2460 static SENSOR_DEVICE_ATTR(fan4_tolerance, S_IWUSR | S_IRUGO,
2461                             show_speed_tolerance, store_speed_tolerance, 3);
2462 static SENSOR_DEVICE_ATTR(fan5_tolerance, S_IWUSR | S_IRUGO,
2463                             show_speed_tolerance, store_speed_tolerance, 4);
2464
2465 /* Smart Fan registers */
2466
2467 static ssize_t
2468 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2469 {
2470         struct nct6775_data *data = nct6775_update_device(dev);
2471         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2472         int nr = sattr->nr;
2473         int index = sattr->index;
2474
2475         return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2476 }
2477
2478 static ssize_t
2479 store_weight_temp(struct device *dev, struct device_attribute *attr,
2480                   const char *buf, size_t count)
2481 {
2482         struct nct6775_data *data = dev_get_drvdata(dev);
2483         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2484         int nr = sattr->nr;
2485         int index = sattr->index;
2486         unsigned long val;
2487         int err;
2488
2489         err = kstrtoul(buf, 10, &val);
2490         if (err < 0)
2491                 return err;
2492
2493         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2494
2495         mutex_lock(&data->update_lock);
2496         data->weight_temp[index][nr] = val;
2497         nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2498         mutex_unlock(&data->update_lock);
2499         return count;
2500 }
2501
2502 static SENSOR_DEVICE_ATTR(pwm1_weight_temp_sel, S_IWUSR | S_IRUGO,
2503                             show_pwm_weight_temp_sel, store_pwm_weight_temp_sel,
2504                             0);
2505 static SENSOR_DEVICE_ATTR(pwm2_weight_temp_sel, S_IWUSR | S_IRUGO,
2506                             show_pwm_weight_temp_sel, store_pwm_weight_temp_sel,
2507                             1);
2508 static SENSOR_DEVICE_ATTR(pwm3_weight_temp_sel, S_IWUSR | S_IRUGO,
2509                             show_pwm_weight_temp_sel, store_pwm_weight_temp_sel,
2510                             2);
2511 static SENSOR_DEVICE_ATTR(pwm4_weight_temp_sel, S_IWUSR | S_IRUGO,
2512                             show_pwm_weight_temp_sel, store_pwm_weight_temp_sel,
2513                             3);
2514 static SENSOR_DEVICE_ATTR(pwm5_weight_temp_sel, S_IWUSR | S_IRUGO,
2515                             show_pwm_weight_temp_sel, store_pwm_weight_temp_sel,
2516                             4);
2517
2518 static SENSOR_DEVICE_ATTR_2(pwm1_weight_temp_step, S_IWUSR | S_IRUGO,
2519                             show_weight_temp, store_weight_temp, 0, 0);
2520 static SENSOR_DEVICE_ATTR_2(pwm2_weight_temp_step, S_IWUSR | S_IRUGO,
2521                             show_weight_temp, store_weight_temp, 1, 0);
2522 static SENSOR_DEVICE_ATTR_2(pwm3_weight_temp_step, S_IWUSR | S_IRUGO,
2523                             show_weight_temp, store_weight_temp, 2, 0);
2524 static SENSOR_DEVICE_ATTR_2(pwm4_weight_temp_step, S_IWUSR | S_IRUGO,
2525                             show_weight_temp, store_weight_temp, 3, 0);
2526 static SENSOR_DEVICE_ATTR_2(pwm5_weight_temp_step, S_IWUSR | S_IRUGO,
2527                             show_weight_temp, store_weight_temp, 4, 0);
2528
2529 static SENSOR_DEVICE_ATTR_2(pwm1_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2530                             show_weight_temp, store_weight_temp, 0, 1);
2531 static SENSOR_DEVICE_ATTR_2(pwm2_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2532                             show_weight_temp, store_weight_temp, 1, 1);
2533 static SENSOR_DEVICE_ATTR_2(pwm3_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2534                             show_weight_temp, store_weight_temp, 2, 1);
2535 static SENSOR_DEVICE_ATTR_2(pwm4_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2536                             show_weight_temp, store_weight_temp, 3, 1);
2537 static SENSOR_DEVICE_ATTR_2(pwm5_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2538                             show_weight_temp, store_weight_temp, 4, 1);
2539
2540 static SENSOR_DEVICE_ATTR_2(pwm1_weight_temp_step_base, S_IWUSR | S_IRUGO,
2541                             show_weight_temp, store_weight_temp, 0, 2);
2542 static SENSOR_DEVICE_ATTR_2(pwm2_weight_temp_step_base, S_IWUSR | S_IRUGO,
2543                             show_weight_temp, store_weight_temp, 1, 2);
2544 static SENSOR_DEVICE_ATTR_2(pwm3_weight_temp_step_base, S_IWUSR | S_IRUGO,
2545                             show_weight_temp, store_weight_temp, 2, 2);
2546 static SENSOR_DEVICE_ATTR_2(pwm4_weight_temp_step_base, S_IWUSR | S_IRUGO,
2547                             show_weight_temp, store_weight_temp, 3, 2);
2548 static SENSOR_DEVICE_ATTR_2(pwm5_weight_temp_step_base, S_IWUSR | S_IRUGO,
2549                             show_weight_temp, store_weight_temp, 4, 2);
2550
2551 static SENSOR_DEVICE_ATTR_2(pwm1_weight_duty_step, S_IWUSR | S_IRUGO,
2552                             show_pwm, store_pwm, 0, 5);
2553 static SENSOR_DEVICE_ATTR_2(pwm2_weight_duty_step, S_IWUSR | S_IRUGO,
2554                             show_pwm, store_pwm, 1, 5);
2555 static SENSOR_DEVICE_ATTR_2(pwm3_weight_duty_step, S_IWUSR | S_IRUGO,
2556                             show_pwm, store_pwm, 2, 5);
2557 static SENSOR_DEVICE_ATTR_2(pwm4_weight_duty_step, S_IWUSR | S_IRUGO,
2558                             show_pwm, store_pwm, 3, 5);
2559 static SENSOR_DEVICE_ATTR_2(pwm5_weight_duty_step, S_IWUSR | S_IRUGO,
2560                             show_pwm, store_pwm, 4, 5);
2561
2562 /* duty_base is not supported on all chips */
2563 static struct sensor_device_attribute_2 sda_weight_duty_base[] = {
2564         SENSOR_ATTR_2(pwm1_weight_duty_base, S_IWUSR | S_IRUGO,
2565                       show_pwm, store_pwm, 0, 6),
2566         SENSOR_ATTR_2(pwm2_weight_duty_base, S_IWUSR | S_IRUGO,
2567                       show_pwm, store_pwm, 1, 6),
2568         SENSOR_ATTR_2(pwm3_weight_duty_base, S_IWUSR | S_IRUGO,
2569                       show_pwm, store_pwm, 2, 6),
2570         SENSOR_ATTR_2(pwm4_weight_duty_base, S_IWUSR | S_IRUGO,
2571                       show_pwm, store_pwm, 3, 6),
2572         SENSOR_ATTR_2(pwm5_weight_duty_base, S_IWUSR | S_IRUGO,
2573                       show_pwm, store_pwm, 4, 6),
2574 };
2575
2576 static ssize_t
2577 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2578 {
2579         struct nct6775_data *data = nct6775_update_device(dev);
2580         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2581         int nr = sattr->nr;
2582         int index = sattr->index;
2583
2584         return sprintf(buf, "%d\n",
2585                        step_time_from_reg(data->fan_time[index][nr],
2586                                           data->pwm_mode[nr]));
2587 }
2588
2589 static ssize_t
2590 store_fan_time(struct device *dev, struct device_attribute *attr,
2591                const char *buf, size_t count)
2592 {
2593         struct nct6775_data *data = dev_get_drvdata(dev);
2594         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2595         int nr = sattr->nr;
2596         int index = sattr->index;
2597         unsigned long val;
2598         int err;
2599
2600         err = kstrtoul(buf, 10, &val);
2601         if (err < 0)
2602                 return err;
2603
2604         val = step_time_to_reg(val, data->pwm_mode[nr]);
2605         mutex_lock(&data->update_lock);
2606         data->fan_time[index][nr] = val;
2607         nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2608         mutex_unlock(&data->update_lock);
2609         return count;
2610 }
2611
2612 static ssize_t
2613 show_name(struct device *dev, struct device_attribute *attr, char *buf)
2614 {
2615         struct nct6775_data *data = dev_get_drvdata(dev);
2616
2617         return sprintf(buf, "%s\n", data->name);
2618 }
2619
2620 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
2621
2622 static SENSOR_DEVICE_ATTR_2(pwm1_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2623                             store_fan_time, 0, 0);
2624 static SENSOR_DEVICE_ATTR_2(pwm2_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2625                             store_fan_time, 1, 0);
2626 static SENSOR_DEVICE_ATTR_2(pwm3_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2627                             store_fan_time, 2, 0);
2628 static SENSOR_DEVICE_ATTR_2(pwm4_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2629                             store_fan_time, 3, 0);
2630 static SENSOR_DEVICE_ATTR_2(pwm5_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2631                             store_fan_time, 4, 0);
2632
2633 static SENSOR_DEVICE_ATTR_2(pwm1_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2634                             store_fan_time, 0, 1);
2635 static SENSOR_DEVICE_ATTR_2(pwm2_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2636                             store_fan_time, 1, 1);
2637 static SENSOR_DEVICE_ATTR_2(pwm3_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2638                             store_fan_time, 2, 1);
2639 static SENSOR_DEVICE_ATTR_2(pwm4_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2640                             store_fan_time, 3, 1);
2641 static SENSOR_DEVICE_ATTR_2(pwm5_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2642                             store_fan_time, 4, 1);
2643
2644 static SENSOR_DEVICE_ATTR_2(pwm1_step_down_time, S_IWUSR | S_IRUGO,
2645                             show_fan_time, store_fan_time, 0, 2);
2646 static SENSOR_DEVICE_ATTR_2(pwm2_step_down_time, S_IWUSR | S_IRUGO,
2647                             show_fan_time, store_fan_time, 1, 2);
2648 static SENSOR_DEVICE_ATTR_2(pwm3_step_down_time, S_IWUSR | S_IRUGO,
2649                             show_fan_time, store_fan_time, 2, 2);
2650 static SENSOR_DEVICE_ATTR_2(pwm4_step_down_time, S_IWUSR | S_IRUGO,
2651                             show_fan_time, store_fan_time, 3, 2);
2652 static SENSOR_DEVICE_ATTR_2(pwm5_step_down_time, S_IWUSR | S_IRUGO,
2653                             show_fan_time, store_fan_time, 4, 2);
2654
2655 static SENSOR_DEVICE_ATTR_2(pwm1_start, S_IWUSR | S_IRUGO, show_pwm,
2656                             store_pwm, 0, 1);
2657 static SENSOR_DEVICE_ATTR_2(pwm2_start, S_IWUSR | S_IRUGO, show_pwm,
2658                             store_pwm, 1, 1);
2659 static SENSOR_DEVICE_ATTR_2(pwm3_start, S_IWUSR | S_IRUGO, show_pwm,
2660                             store_pwm, 2, 1);
2661 static SENSOR_DEVICE_ATTR_2(pwm4_start, S_IWUSR | S_IRUGO, show_pwm,
2662                             store_pwm, 3, 1);
2663 static SENSOR_DEVICE_ATTR_2(pwm5_start, S_IWUSR | S_IRUGO, show_pwm,
2664                             store_pwm, 4, 1);
2665
2666 static SENSOR_DEVICE_ATTR_2(pwm1_floor, S_IWUSR | S_IRUGO, show_pwm,
2667                             store_pwm, 0, 2);
2668 static SENSOR_DEVICE_ATTR_2(pwm2_floor, S_IWUSR | S_IRUGO, show_pwm,
2669                             store_pwm, 1, 2);
2670 static SENSOR_DEVICE_ATTR_2(pwm3_floor, S_IWUSR | S_IRUGO, show_pwm,
2671                             store_pwm, 2, 2);
2672 static SENSOR_DEVICE_ATTR_2(pwm4_floor, S_IWUSR | S_IRUGO, show_pwm,
2673                             store_pwm, 3, 2);
2674 static SENSOR_DEVICE_ATTR_2(pwm5_floor, S_IWUSR | S_IRUGO, show_pwm,
2675                             store_pwm, 4, 2);
2676
2677 static SENSOR_DEVICE_ATTR_2(pwm1_temp_tolerance, S_IWUSR | S_IRUGO,
2678                             show_temp_tolerance, store_temp_tolerance, 0, 0);
2679 static SENSOR_DEVICE_ATTR_2(pwm2_temp_tolerance, S_IWUSR | S_IRUGO,
2680                             show_temp_tolerance, store_temp_tolerance, 1, 0);
2681 static SENSOR_DEVICE_ATTR_2(pwm3_temp_tolerance, S_IWUSR | S_IRUGO,
2682                             show_temp_tolerance, store_temp_tolerance, 2, 0);
2683 static SENSOR_DEVICE_ATTR_2(pwm4_temp_tolerance, S_IWUSR | S_IRUGO,
2684                             show_temp_tolerance, store_temp_tolerance, 3, 0);
2685 static SENSOR_DEVICE_ATTR_2(pwm5_temp_tolerance, S_IWUSR | S_IRUGO,
2686                             show_temp_tolerance, store_temp_tolerance, 4, 0);
2687
2688 static SENSOR_DEVICE_ATTR_2(pwm1_crit_temp_tolerance, S_IWUSR | S_IRUGO,
2689                             show_temp_tolerance, store_temp_tolerance, 0, 1);
2690 static SENSOR_DEVICE_ATTR_2(pwm2_crit_temp_tolerance, S_IWUSR | S_IRUGO,
2691                             show_temp_tolerance, store_temp_tolerance, 1, 1);
2692 static SENSOR_DEVICE_ATTR_2(pwm3_crit_temp_tolerance, S_IWUSR | S_IRUGO,
2693                             show_temp_tolerance, store_temp_tolerance, 2, 1);
2694 static SENSOR_DEVICE_ATTR_2(pwm4_crit_temp_tolerance, S_IWUSR | S_IRUGO,
2695                             show_temp_tolerance, store_temp_tolerance, 3, 1);
2696 static SENSOR_DEVICE_ATTR_2(pwm5_crit_temp_tolerance, S_IWUSR | S_IRUGO,
2697                             show_temp_tolerance, store_temp_tolerance, 4, 1);
2698
2699 /* pwm_max is not supported on all chips */
2700 static struct sensor_device_attribute_2 sda_pwm_max[] = {
2701         SENSOR_ATTR_2(pwm1_max, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2702                       0, 3),
2703         SENSOR_ATTR_2(pwm2_max, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2704                       1, 3),
2705         SENSOR_ATTR_2(pwm3_max, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2706                       2, 3),
2707         SENSOR_ATTR_2(pwm4_max, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2708                       3, 3),
2709         SENSOR_ATTR_2(pwm5_max, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2710                       4, 3),
2711 };
2712
2713 /* pwm_step is not supported on all chips */
2714 static struct sensor_device_attribute_2 sda_pwm_step[] = {
2715         SENSOR_ATTR_2(pwm1_step, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 4),
2716         SENSOR_ATTR_2(pwm2_step, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1, 4),
2717         SENSOR_ATTR_2(pwm3_step, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2, 4),
2718         SENSOR_ATTR_2(pwm4_step, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3, 4),
2719         SENSOR_ATTR_2(pwm5_step, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 4, 4),
2720 };
2721
2722 static struct attribute *nct6775_attributes_pwm[5][20] = {
2723         {
2724                 &sensor_dev_attr_pwm1.dev_attr.attr,
2725                 &sensor_dev_attr_pwm1_mode.dev_attr.attr,
2726                 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2727                 &sensor_dev_attr_pwm1_temp_sel.dev_attr.attr,
2728                 &sensor_dev_attr_pwm1_temp_tolerance.dev_attr.attr,
2729                 &sensor_dev_attr_pwm1_crit_temp_tolerance.dev_attr.attr,
2730                 &sensor_dev_attr_pwm1_target_temp.dev_attr.attr,
2731                 &sensor_dev_attr_fan1_target.dev_attr.attr,
2732                 &sensor_dev_attr_fan1_tolerance.dev_attr.attr,
2733                 &sensor_dev_attr_pwm1_stop_time.dev_attr.attr,
2734                 &sensor_dev_attr_pwm1_step_up_time.dev_attr.attr,
2735                 &sensor_dev_attr_pwm1_step_down_time.dev_attr.attr,
2736                 &sensor_dev_attr_pwm1_start.dev_attr.attr,
2737                 &sensor_dev_attr_pwm1_floor.dev_attr.attr,
2738                 &sensor_dev_attr_pwm1_weight_temp_sel.dev_attr.attr,
2739                 &sensor_dev_attr_pwm1_weight_temp_step.dev_attr.attr,
2740                 &sensor_dev_attr_pwm1_weight_temp_step_tol.dev_attr.attr,
2741                 &sensor_dev_attr_pwm1_weight_temp_step_base.dev_attr.attr,
2742                 &sensor_dev_attr_pwm1_weight_duty_step.dev_attr.attr,
2743                 NULL
2744         },
2745         {
2746                 &sensor_dev_attr_pwm2.dev_attr.attr,
2747                 &sensor_dev_attr_pwm2_mode.dev_attr.attr,
2748                 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2749                 &sensor_dev_attr_pwm2_temp_sel.dev_attr.attr,
2750                 &sensor_dev_attr_pwm2_temp_tolerance.dev_attr.attr,
2751                 &sensor_dev_attr_pwm2_crit_temp_tolerance.dev_attr.attr,
2752                 &sensor_dev_attr_pwm2_target_temp.dev_attr.attr,
2753                 &sensor_dev_attr_fan2_target.dev_attr.attr,
2754                 &sensor_dev_attr_fan2_tolerance.dev_attr.attr,
2755                 &sensor_dev_attr_pwm2_stop_time.dev_attr.attr,
2756                 &sensor_dev_attr_pwm2_step_up_time.dev_attr.attr,
2757                 &sensor_dev_attr_pwm2_step_down_time.dev_attr.attr,
2758                 &sensor_dev_attr_pwm2_start.dev_attr.attr,
2759                 &sensor_dev_attr_pwm2_floor.dev_attr.attr,
2760                 &sensor_dev_attr_pwm2_weight_temp_sel.dev_attr.attr,
2761                 &sensor_dev_attr_pwm2_weight_temp_step.dev_attr.attr,
2762                 &sensor_dev_attr_pwm2_weight_temp_step_tol.dev_attr.attr,
2763                 &sensor_dev_attr_pwm2_weight_temp_step_base.dev_attr.attr,
2764                 &sensor_dev_attr_pwm2_weight_duty_step.dev_attr.attr,
2765                 NULL
2766         },
2767         {
2768                 &sensor_dev_attr_pwm3.dev_attr.attr,
2769                 &sensor_dev_attr_pwm3_mode.dev_attr.attr,
2770                 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2771                 &sensor_dev_attr_pwm3_temp_sel.dev_attr.attr,
2772                 &sensor_dev_attr_pwm3_temp_tolerance.dev_attr.attr,
2773                 &sensor_dev_attr_pwm3_crit_temp_tolerance.dev_attr.attr,
2774                 &sensor_dev_attr_pwm3_target_temp.dev_attr.attr,
2775                 &sensor_dev_attr_fan3_target.dev_attr.attr,
2776                 &sensor_dev_attr_fan3_tolerance.dev_attr.attr,
2777                 &sensor_dev_attr_pwm3_stop_time.dev_attr.attr,
2778                 &sensor_dev_attr_pwm3_step_up_time.dev_attr.attr,
2779                 &sensor_dev_attr_pwm3_step_down_time.dev_attr.attr,
2780                 &sensor_dev_attr_pwm3_start.dev_attr.attr,
2781                 &sensor_dev_attr_pwm3_floor.dev_attr.attr,
2782                 &sensor_dev_attr_pwm3_weight_temp_sel.dev_attr.attr,
2783                 &sensor_dev_attr_pwm3_weight_temp_step.dev_attr.attr,
2784                 &sensor_dev_attr_pwm3_weight_temp_step_tol.dev_attr.attr,
2785                 &sensor_dev_attr_pwm3_weight_temp_step_base.dev_attr.attr,
2786                 &sensor_dev_attr_pwm3_weight_duty_step.dev_attr.attr,
2787                 NULL
2788         },
2789         {
2790                 &sensor_dev_attr_pwm4.dev_attr.attr,
2791                 &sensor_dev_attr_pwm4_mode.dev_attr.attr,
2792                 &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2793                 &sensor_dev_attr_pwm4_temp_sel.dev_attr.attr,
2794                 &sensor_dev_attr_pwm4_temp_tolerance.dev_attr.attr,
2795                 &sensor_dev_attr_pwm4_crit_temp_tolerance.dev_attr.attr,
2796                 &sensor_dev_attr_pwm4_target_temp.dev_attr.attr,
2797                 &sensor_dev_attr_fan4_target.dev_attr.attr,
2798                 &sensor_dev_attr_fan4_tolerance.dev_attr.attr,
2799                 &sensor_dev_attr_pwm4_stop_time.dev_attr.attr,
2800                 &sensor_dev_attr_pwm4_step_up_time.dev_attr.attr,
2801                 &sensor_dev_attr_pwm4_step_down_time.dev_attr.attr,
2802                 &sensor_dev_attr_pwm4_start.dev_attr.attr,
2803                 &sensor_dev_attr_pwm4_floor.dev_attr.attr,
2804                 &sensor_dev_attr_pwm4_weight_temp_sel.dev_attr.attr,
2805                 &sensor_dev_attr_pwm4_weight_temp_step.dev_attr.attr,
2806                 &sensor_dev_attr_pwm4_weight_temp_step_tol.dev_attr.attr,
2807                 &sensor_dev_attr_pwm4_weight_temp_step_base.dev_attr.attr,
2808                 &sensor_dev_attr_pwm4_weight_duty_step.dev_attr.attr,
2809                 NULL
2810         },
2811         {
2812                 &sensor_dev_attr_pwm5.dev_attr.attr,
2813                 &sensor_dev_attr_pwm5_mode.dev_attr.attr,
2814                 &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2815                 &sensor_dev_attr_pwm5_temp_sel.dev_attr.attr,
2816                 &sensor_dev_attr_pwm5_temp_tolerance.dev_attr.attr,
2817                 &sensor_dev_attr_pwm5_crit_temp_tolerance.dev_attr.attr,
2818                 &sensor_dev_attr_pwm5_target_temp.dev_attr.attr,
2819                 &sensor_dev_attr_fan5_target.dev_attr.attr,
2820                 &sensor_dev_attr_fan5_tolerance.dev_attr.attr,
2821                 &sensor_dev_attr_pwm5_stop_time.dev_attr.attr,
2822                 &sensor_dev_attr_pwm5_step_up_time.dev_attr.attr,
2823                 &sensor_dev_attr_pwm5_step_down_time.dev_attr.attr,
2824                 &sensor_dev_attr_pwm5_start.dev_attr.attr,
2825                 &sensor_dev_attr_pwm5_floor.dev_attr.attr,
2826                 &sensor_dev_attr_pwm5_weight_temp_sel.dev_attr.attr,
2827                 &sensor_dev_attr_pwm5_weight_temp_step.dev_attr.attr,
2828                 &sensor_dev_attr_pwm5_weight_temp_step_tol.dev_attr.attr,
2829                 &sensor_dev_attr_pwm5_weight_temp_step_base.dev_attr.attr,
2830                 &sensor_dev_attr_pwm5_weight_duty_step.dev_attr.attr,
2831                 NULL
2832         },
2833 };
2834
2835 static const struct attribute_group nct6775_group_pwm[5] = {
2836         { .attrs = nct6775_attributes_pwm[0] },
2837         { .attrs = nct6775_attributes_pwm[1] },
2838         { .attrs = nct6775_attributes_pwm[2] },
2839         { .attrs = nct6775_attributes_pwm[3] },
2840         { .attrs = nct6775_attributes_pwm[4] },
2841 };
2842
2843 static ssize_t
2844 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2845 {
2846         struct nct6775_data *data = nct6775_update_device(dev);
2847         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2848
2849         return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2850 }
2851
2852 static ssize_t
2853 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2854                const char *buf, size_t count)
2855 {
2856         struct nct6775_data *data = dev_get_drvdata(dev);
2857         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2858         int nr = sattr->nr;
2859         int point = sattr->index;
2860         unsigned long val;
2861         int err;
2862         u8 reg;
2863
2864         err = kstrtoul(buf, 10, &val);
2865         if (err < 0)
2866                 return err;
2867         if (val > 255)
2868                 return -EINVAL;
2869
2870         if (point == data->auto_pwm_num) {
2871                 if (data->kind != nct6775 && !val)
2872                         return -EINVAL;
2873                 if (data->kind != nct6779 && val)
2874                         val = 0xff;
2875         }
2876
2877         mutex_lock(&data->update_lock);
2878         data->auto_pwm[nr][point] = val;
2879         if (point < data->auto_pwm_num) {
2880                 nct6775_write_value(data,
2881                                     NCT6775_AUTO_PWM(data, nr, point),
2882                                     data->auto_pwm[nr][point]);
2883         } else {
2884                 switch (data->kind) {
2885                 case nct6775:
2886                         /* disable if needed (pwm == 0) */
2887                         reg = nct6775_read_value(data,
2888                                                  NCT6775_REG_CRITICAL_ENAB[nr]);
2889                         if (val)
2890                                 reg |= 0x02;
2891                         else
2892                                 reg &= ~0x02;
2893                         nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
2894                                             reg);
2895                         break;
2896                 case nct6776:
2897                         break; /* always enabled, nothing to do */
2898                 case nct6779:
2899                         nct6775_write_value(data, NCT6779_REG_CRITICAL_PWM[nr],
2900                                             val);
2901                         reg = nct6775_read_value(data,
2902                                         NCT6779_REG_CRITICAL_PWM_ENABLE[nr]);
2903                         if (val == 255)
2904                                 reg &= ~0x01;
2905                         else
2906                                 reg |= 0x01;
2907                         nct6775_write_value(data,
2908                                             NCT6779_REG_CRITICAL_PWM_ENABLE[nr],
2909                                             reg);
2910                         break;
2911                 }
2912         }
2913         mutex_unlock(&data->update_lock);
2914         return count;
2915 }
2916
2917 static ssize_t
2918 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
2919 {
2920         struct nct6775_data *data = nct6775_update_device(dev);
2921         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2922         int nr = sattr->nr;
2923         int point = sattr->index;
2924
2925         /*
2926          * We don't know for sure if the temperature is signed or unsigned.
2927          * Assume it is unsigned.
2928          */
2929         return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
2930 }
2931
2932 static ssize_t
2933 store_auto_temp(struct device *dev, struct device_attribute *attr,
2934                 const char *buf, size_t count)
2935 {
2936         struct nct6775_data *data = dev_get_drvdata(dev);
2937         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2938         int nr = sattr->nr;
2939         int point = sattr->index;
2940         unsigned long val;
2941         int err;
2942
2943         err = kstrtoul(buf, 10, &val);
2944         if (err)
2945                 return err;
2946         if (val > 255000)
2947                 return -EINVAL;
2948
2949         mutex_lock(&data->update_lock);
2950         data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
2951         if (point < data->auto_pwm_num) {
2952                 nct6775_write_value(data,
2953                                     NCT6775_AUTO_TEMP(data, nr, point),
2954                                     data->auto_temp[nr][point]);
2955         } else {
2956                 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
2957                                     data->auto_temp[nr][point]);
2958         }
2959         mutex_unlock(&data->update_lock);
2960         return count;
2961 }
2962
2963 /*
2964  * The number of auto-point trip points is chip dependent.
2965  * Need to check support while generating/removing attribute files.
2966  */
2967 static struct sensor_device_attribute_2 sda_auto_pwm_arrays[] = {
2968         SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IWUSR | S_IRUGO,
2969                       show_auto_pwm, store_auto_pwm, 0, 0),
2970         SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IWUSR | S_IRUGO,
2971                       show_auto_temp, store_auto_temp, 0, 0),
2972         SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IWUSR | S_IRUGO,
2973                       show_auto_pwm, store_auto_pwm, 0, 1),
2974         SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IWUSR | S_IRUGO,
2975                       show_auto_temp, store_auto_temp, 0, 1),
2976         SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IWUSR | S_IRUGO,
2977                       show_auto_pwm, store_auto_pwm, 0, 2),
2978         SENSOR_ATTR_2(pwm1_auto_point3_temp, S_IWUSR | S_IRUGO,
2979                       show_auto_temp, store_auto_temp, 0, 2),
2980         SENSOR_ATTR_2(pwm1_auto_point4_pwm, S_IWUSR | S_IRUGO,
2981                       show_auto_pwm, store_auto_pwm, 0, 3),
2982         SENSOR_ATTR_2(pwm1_auto_point4_temp, S_IWUSR | S_IRUGO,
2983                       show_auto_temp, store_auto_temp, 0, 3),
2984         SENSOR_ATTR_2(pwm1_auto_point5_pwm, S_IWUSR | S_IRUGO,
2985                       show_auto_pwm, store_auto_pwm, 0, 4),
2986         SENSOR_ATTR_2(pwm1_auto_point5_temp, S_IWUSR | S_IRUGO,
2987                       show_auto_temp, store_auto_temp, 0, 4),
2988         SENSOR_ATTR_2(pwm1_auto_point6_pwm, S_IWUSR | S_IRUGO,
2989                       show_auto_pwm, store_auto_pwm, 0, 5),
2990         SENSOR_ATTR_2(pwm1_auto_point6_temp, S_IWUSR | S_IRUGO,
2991                       show_auto_temp, store_auto_temp, 0, 5),
2992         SENSOR_ATTR_2(pwm1_auto_point7_pwm, S_IWUSR | S_IRUGO,
2993                       show_auto_pwm, store_auto_pwm, 0, 6),
2994         SENSOR_ATTR_2(pwm1_auto_point7_temp, S_IWUSR | S_IRUGO,
2995                       show_auto_temp, store_auto_temp, 0, 6),
2996
2997         SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IWUSR | S_IRUGO,
2998                       show_auto_pwm, store_auto_pwm, 1, 0),
2999         SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IWUSR | S_IRUGO,
3000                       show_auto_temp, store_auto_temp, 1, 0),
3001         SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IWUSR | S_IRUGO,
3002                       show_auto_pwm, store_auto_pwm, 1, 1),
3003         SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IWUSR | S_IRUGO,
3004                       show_auto_temp, store_auto_temp, 1, 1),
3005         SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IWUSR | S_IRUGO,
3006                       show_auto_pwm, store_auto_pwm, 1, 2),
3007         SENSOR_ATTR_2(pwm2_auto_point3_temp, S_IWUSR | S_IRUGO,
3008                       show_auto_temp, store_auto_temp, 1, 2),
3009         SENSOR_ATTR_2(pwm2_auto_point4_pwm, S_IWUSR | S_IRUGO,
3010                       show_auto_pwm, store_auto_pwm, 1, 3),
3011         SENSOR_ATTR_2(pwm2_auto_point4_temp, S_IWUSR | S_IRUGO,
3012                       show_auto_temp, store_auto_temp, 1, 3),
3013         SENSOR_ATTR_2(pwm2_auto_point5_pwm, S_IWUSR | S_IRUGO,
3014                       show_auto_pwm, store_auto_pwm, 1, 4),
3015         SENSOR_ATTR_2(pwm2_auto_point5_temp, S_IWUSR | S_IRUGO,
3016                       show_auto_temp, store_auto_temp, 1, 4),
3017         SENSOR_ATTR_2(pwm2_auto_point6_pwm, S_IWUSR | S_IRUGO,
3018                       show_auto_pwm, store_auto_pwm, 1, 5),
3019         SENSOR_ATTR_2(pwm2_auto_point6_temp, S_IWUSR | S_IRUGO,
3020                       show_auto_temp, store_auto_temp, 1, 5),
3021         SENSOR_ATTR_2(pwm2_auto_point7_pwm, S_IWUSR | S_IRUGO,
3022                       show_auto_pwm, store_auto_pwm, 1, 6),
3023         SENSOR_ATTR_2(pwm2_auto_point7_temp, S_IWUSR | S_IRUGO,
3024                       show_auto_temp, store_auto_temp, 1, 6),
3025
3026         SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IWUSR | S_IRUGO,
3027                       show_auto_pwm, store_auto_pwm, 2, 0),
3028         SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IWUSR | S_IRUGO,
3029                       show_auto_temp, store_auto_temp, 2, 0),
3030         SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IWUSR | S_IRUGO,
3031                       show_auto_pwm, store_auto_pwm, 2, 1),
3032         SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IWUSR | S_IRUGO,
3033                       show_auto_temp, store_auto_temp, 2, 1),
3034         SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IWUSR | S_IRUGO,
3035                       show_auto_pwm, store_auto_pwm, 2, 2),
3036         SENSOR_ATTR_2(pwm3_auto_point3_temp, S_IWUSR | S_IRUGO,
3037                       show_auto_temp, store_auto_temp, 2, 2),
3038         SENSOR_ATTR_2(pwm3_auto_point4_pwm, S_IWUSR | S_IRUGO,
3039                       show_auto_pwm, store_auto_pwm, 2, 3),
3040         SENSOR_ATTR_2(pwm3_auto_point4_temp, S_IWUSR | S_IRUGO,
3041                       show_auto_temp, store_auto_temp, 2, 3),
3042         SENSOR_ATTR_2(pwm3_auto_point5_pwm, S_IWUSR | S_IRUGO,
3043                       show_auto_pwm, store_auto_pwm, 2, 4),
3044         SENSOR_ATTR_2(pwm3_auto_point5_temp, S_IWUSR | S_IRUGO,
3045                       show_auto_temp, store_auto_temp, 2, 4),
3046         SENSOR_ATTR_2(pwm3_auto_point6_pwm, S_IWUSR | S_IRUGO,
3047                       show_auto_pwm, store_auto_pwm, 2, 5),
3048         SENSOR_ATTR_2(pwm3_auto_point6_temp, S_IWUSR | S_IRUGO,
3049                       show_auto_temp, store_auto_temp, 2, 5),
3050         SENSOR_ATTR_2(pwm3_auto_point7_pwm, S_IWUSR | S_IRUGO,
3051                       show_auto_pwm, store_auto_pwm, 2, 6),
3052         SENSOR_ATTR_2(pwm3_auto_point7_temp, S_IWUSR | S_IRUGO,
3053                       show_auto_temp, store_auto_temp, 2, 6),
3054
3055         SENSOR_ATTR_2(pwm4_auto_point1_pwm, S_IWUSR | S_IRUGO,
3056                       show_auto_pwm, store_auto_pwm, 3, 0),
3057         SENSOR_ATTR_2(pwm4_auto_point1_temp, S_IWUSR | S_IRUGO,
3058                       show_auto_temp, store_auto_temp, 3, 0),
3059         SENSOR_ATTR_2(pwm4_auto_point2_pwm, S_IWUSR | S_IRUGO,
3060                       show_auto_pwm, store_auto_pwm, 3, 1),
3061         SENSOR_ATTR_2(pwm4_auto_point2_temp, S_IWUSR | S_IRUGO,
3062                       show_auto_temp, store_auto_temp, 3, 1),
3063         SENSOR_ATTR_2(pwm4_auto_point3_pwm, S_IWUSR | S_IRUGO,
3064                       show_auto_pwm, store_auto_pwm, 3, 2),
3065         SENSOR_ATTR_2(pwm4_auto_point3_temp, S_IWUSR | S_IRUGO,
3066                       show_auto_temp, store_auto_temp, 3, 2),
3067         SENSOR_ATTR_2(pwm4_auto_point4_pwm, S_IWUSR | S_IRUGO,
3068                       show_auto_pwm, store_auto_pwm, 3, 3),
3069         SENSOR_ATTR_2(pwm4_auto_point4_temp, S_IWUSR | S_IRUGO,
3070                       show_auto_temp, store_auto_temp, 3, 3),
3071         SENSOR_ATTR_2(pwm4_auto_point5_pwm, S_IWUSR | S_IRUGO,
3072                       show_auto_pwm, store_auto_pwm, 3, 4),
3073         SENSOR_ATTR_2(pwm4_auto_point5_temp, S_IWUSR | S_IRUGO,
3074                       show_auto_temp, store_auto_temp, 3, 4),
3075         SENSOR_ATTR_2(pwm4_auto_point6_pwm, S_IWUSR | S_IRUGO,
3076                       show_auto_pwm, store_auto_pwm, 3, 5),
3077         SENSOR_ATTR_2(pwm4_auto_point6_temp, S_IWUSR | S_IRUGO,
3078                       show_auto_temp, store_auto_temp, 3, 5),
3079         SENSOR_ATTR_2(pwm4_auto_point7_pwm, S_IWUSR | S_IRUGO,
3080                       show_auto_pwm, store_auto_pwm, 3, 6),
3081         SENSOR_ATTR_2(pwm4_auto_point7_temp, S_IWUSR | S_IRUGO,
3082                       show_auto_temp, store_auto_temp, 3, 6),
3083
3084         SENSOR_ATTR_2(pwm5_auto_point1_pwm, S_IWUSR | S_IRUGO,
3085                       show_auto_pwm, store_auto_pwm, 4, 0),
3086         SENSOR_ATTR_2(pwm5_auto_point1_temp, S_IWUSR | S_IRUGO,
3087                       show_auto_temp, store_auto_temp, 4, 0),
3088         SENSOR_ATTR_2(pwm5_auto_point2_pwm, S_IWUSR | S_IRUGO,
3089                       show_auto_pwm, store_auto_pwm, 4, 1),
3090         SENSOR_ATTR_2(pwm5_auto_point2_temp, S_IWUSR | S_IRUGO,
3091                       show_auto_temp, store_auto_temp, 4, 1),
3092         SENSOR_ATTR_2(pwm5_auto_point3_pwm, S_IWUSR | S_IRUGO,
3093                       show_auto_pwm, store_auto_pwm, 4, 2),
3094         SENSOR_ATTR_2(pwm5_auto_point3_temp, S_IWUSR | S_IRUGO,
3095                       show_auto_temp, store_auto_temp, 4, 2),
3096         SENSOR_ATTR_2(pwm5_auto_point4_pwm, S_IWUSR | S_IRUGO,
3097                       show_auto_pwm, store_auto_pwm, 4, 3),
3098         SENSOR_ATTR_2(pwm5_auto_point4_temp, S_IWUSR | S_IRUGO,
3099                       show_auto_temp, store_auto_temp, 4, 3),
3100         SENSOR_ATTR_2(pwm5_auto_point5_pwm, S_IWUSR | S_IRUGO,
3101                       show_auto_pwm, store_auto_pwm, 4, 4),
3102         SENSOR_ATTR_2(pwm5_auto_point5_temp, S_IWUSR | S_IRUGO,
3103                       show_auto_temp, store_auto_temp, 4, 4),
3104         SENSOR_ATTR_2(pwm5_auto_point6_pwm, S_IWUSR | S_IRUGO,
3105                       show_auto_pwm, store_auto_pwm, 4, 5),
3106         SENSOR_ATTR_2(pwm5_auto_point6_temp, S_IWUSR | S_IRUGO,
3107                       show_auto_temp, store_auto_temp, 4, 5),
3108         SENSOR_ATTR_2(pwm5_auto_point7_pwm, S_IWUSR | S_IRUGO,
3109                       show_auto_pwm, store_auto_pwm, 4, 6),
3110         SENSOR_ATTR_2(pwm5_auto_point7_temp, S_IWUSR | S_IRUGO,
3111                       show_auto_temp, store_auto_temp, 4, 6),
3112 };
3113
3114 static ssize_t
3115 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
3116 {
3117         struct nct6775_data *data = dev_get_drvdata(dev);
3118         return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
3119 }
3120
3121 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
3122
3123 /* Case open detection */
3124
3125 static ssize_t
3126 clear_caseopen(struct device *dev, struct device_attribute *attr,
3127                const char *buf, size_t count)
3128 {
3129         struct nct6775_data *data = dev_get_drvdata(dev);
3130         struct nct6775_sio_data *sio_data = dev->platform_data;
3131         int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
3132         unsigned long val;
3133         u8 reg;
3134         int ret;
3135
3136         if (kstrtoul(buf, 10, &val) || val != 0)
3137                 return -EINVAL;
3138
3139         mutex_lock(&data->update_lock);
3140
3141         /*
3142          * Use CR registers to clear caseopen status.
3143          * The CR registers are the same for all chips, and not all chips
3144          * support clearing the caseopen status through "regular" registers.
3145          */
3146         ret = superio_enter(sio_data->sioreg);
3147         if (ret) {
3148                 count = ret;
3149                 goto error;
3150         }
3151
3152         superio_select(sio_data->sioreg, NCT6775_LD_ACPI);
3153         reg = superio_inb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
3154         reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3155         superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3156         reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3157         superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3158         superio_exit(sio_data->sioreg);
3159
3160         data->valid = false;    /* Force cache refresh */
3161 error:
3162         mutex_unlock(&data->update_lock);
3163         return count;
3164 }
3165
3166 static struct sensor_device_attribute sda_caseopen[] = {
3167         SENSOR_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
3168                     clear_caseopen, INTRUSION_ALARM_BASE),
3169         SENSOR_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
3170                     clear_caseopen, INTRUSION_ALARM_BASE + 1),
3171 };
3172
3173 /*
3174  * Driver and device management
3175  */
3176
3177 static void nct6775_device_remove_files(struct device *dev)
3178 {
3179         /*
3180          * some entries in the following arrays may not have been used in
3181          * device_create_file(), but device_remove_file() will ignore them
3182          */
3183         int i;
3184         struct nct6775_data *data = dev_get_drvdata(dev);
3185
3186         for (i = 0; i < data->pwm_num; i++)
3187                 sysfs_remove_group(&dev->kobj, &nct6775_group_pwm[i]);
3188
3189         for (i = 0; i < ARRAY_SIZE(sda_pwm_max); i++)
3190                 device_remove_file(dev, &sda_pwm_max[i].dev_attr);
3191
3192         for (i = 0; i < ARRAY_SIZE(sda_pwm_step); i++)
3193                 device_remove_file(dev, &sda_pwm_step[i].dev_attr);
3194
3195         for (i = 0; i < ARRAY_SIZE(sda_weight_duty_base); i++)
3196                 device_remove_file(dev, &sda_weight_duty_base[i].dev_attr);
3197
3198         for (i = 0; i < ARRAY_SIZE(sda_auto_pwm_arrays); i++)
3199                 device_remove_file(dev, &sda_auto_pwm_arrays[i].dev_attr);
3200
3201         for (i = 0; i < data->in_num; i++)
3202                 sysfs_remove_group(&dev->kobj, &nct6775_group_in[i]);
3203
3204         for (i = 0; i < 5; i++) {
3205                 device_remove_file(dev, &sda_fan_input[i].dev_attr);
3206                 device_remove_file(dev, &sda_fan_alarm[i].dev_attr);
3207                 device_remove_file(dev, &sda_fan_div[i].dev_attr);
3208                 device_remove_file(dev, &sda_fan_min[i].dev_attr);
3209                 device_remove_file(dev, &sda_fan_pulses[i].dev_attr);
3210         }
3211         for (i = 0; i < NUM_TEMP; i++) {
3212                 if (!(data->have_temp & (1 << i)))
3213                         continue;
3214                 device_remove_file(dev, &sda_temp_input[i].dev_attr);
3215                 device_remove_file(dev, &sda_temp_label[i].dev_attr);
3216                 device_remove_file(dev, &sda_temp_max[i].dev_attr);
3217                 device_remove_file(dev, &sda_temp_max_hyst[i].dev_attr);
3218                 device_remove_file(dev, &sda_temp_crit[i].dev_attr);
3219                 if (!(data->have_temp_fixed & (1 << i)))
3220                         continue;
3221                 device_remove_file(dev, &sda_temp_type[i].dev_attr);
3222                 device_remove_file(dev, &sda_temp_offset[i].dev_attr);
3223                 if (i >= NUM_TEMP_ALARM)
3224                         continue;
3225                 device_remove_file(dev, &sda_temp_alarm[i].dev_attr);
3226         }
3227
3228         device_remove_file(dev, &sda_caseopen[0].dev_attr);
3229         device_remove_file(dev, &sda_caseopen[1].dev_attr);
3230
3231         device_remove_file(dev, &dev_attr_name);
3232         device_remove_file(dev, &dev_attr_cpu0_vid);
3233 }
3234
3235 /* Get the monitoring functions started */
3236 static inline void nct6775_init_device(struct nct6775_data *data)
3237 {
3238         int i;
3239         u8 tmp, diode;
3240
3241         /* Start monitoring if needed */
3242         if (data->REG_CONFIG) {
3243                 tmp = nct6775_read_value(data, data->REG_CONFIG);
3244                 if (!(tmp & 0x01))
3245                         nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
3246         }
3247
3248         /* Enable temperature sensors if needed */
3249         for (i = 0; i < NUM_TEMP; i++) {
3250                 if (!(data->have_temp & (1 << i)))
3251                         continue;
3252                 if (!data->reg_temp_config[i])
3253                         continue;
3254                 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
3255                 if (tmp & 0x01)
3256                         nct6775_write_value(data, data->reg_temp_config[i],
3257                                             tmp & 0xfe);
3258         }
3259
3260         /* Enable VBAT monitoring if needed */
3261         tmp = nct6775_read_value(data, data->REG_VBAT);
3262         if (!(tmp & 0x01))
3263                 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
3264
3265         diode = nct6775_read_value(data, data->REG_DIODE);
3266
3267         for (i = 0; i < data->temp_fixed_num; i++) {
3268                 if (!(data->have_temp_fixed & (1 << i)))
3269                         continue;
3270                 if ((tmp & (0x02 << i)))        /* diode */
3271                         data->temp_type[i] = 3 - ((diode >> i) & 0x02);
3272                 else                            /* thermistor */
3273                         data->temp_type[i] = 4;
3274         }
3275 }
3276
3277 static int
3278 nct6775_check_fan_inputs(const struct nct6775_sio_data *sio_data,
3279                          struct nct6775_data *data)
3280 {
3281         int regval;
3282         bool fan3pin, fan3min, fan4pin, fan4min, fan5pin;
3283         bool pwm3pin, pwm4pin, pwm5pin;
3284         int ret;
3285
3286         ret = superio_enter(sio_data->sioreg);
3287         if (ret)
3288                 return ret;
3289
3290         /* fan4 and fan5 share some pins with the GPIO and serial flash */
3291         if (data->kind == nct6775) {
3292                 regval = superio_inb(sio_data->sioreg, 0x2c);
3293
3294                 fan3pin = regval & (1 << 6);
3295                 fan3min = fan3pin;
3296                 pwm3pin = regval & (1 << 7);
3297
3298                 /* On NCT6775, fan4 shares pins with the fdc interface */
3299                 fan4pin = !(superio_inb(sio_data->sioreg, 0x2A) & 0x80);
3300                 fan4min = 0;
3301                 fan5pin = 0;
3302                 pwm4pin = 0;
3303                 pwm5pin = 0;
3304         } else if (data->kind == nct6776) {
3305                 bool gpok = superio_inb(sio_data->sioreg, 0x27) & 0x80;
3306
3307                 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3308                 regval = superio_inb(sio_data->sioreg, SIO_REG_ENABLE);
3309
3310                 if (regval & 0x80)
3311                         fan3pin = gpok;
3312                 else
3313                         fan3pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x40);
3314
3315                 if (regval & 0x40)
3316                         fan4pin = gpok;
3317                 else
3318                         fan4pin = superio_inb(sio_data->sioreg, 0x1C) & 0x01;
3319
3320                 if (regval & 0x20)
3321                         fan5pin = gpok;
3322                 else
3323                         fan5pin = superio_inb(sio_data->sioreg, 0x1C) & 0x02;
3324
3325                 fan4min = fan4pin;
3326                 fan3min = fan3pin;
3327                 pwm3pin = fan3pin;
3328                 pwm4pin = 0;
3329                 pwm5pin = 0;
3330         } else {        /* NCT6779D */
3331                 regval = superio_inb(sio_data->sioreg, 0x1c);
3332
3333                 fan3pin = !(regval & (1 << 5));
3334                 fan4pin = !(regval & (1 << 6));
3335                 fan5pin = !(regval & (1 << 7));
3336
3337                 pwm3pin = !(regval & (1 << 0));
3338                 pwm4pin = !(regval & (1 << 1));
3339                 pwm5pin = !(regval & (1 << 2));
3340
3341                 fan3min = fan3pin;
3342                 fan4min = fan4pin;
3343         }
3344
3345         superio_exit(sio_data->sioreg);
3346
3347         data->has_fan = data->has_fan_min = 0x03; /* fan1 and fan2 */
3348         data->has_fan |= fan3pin << 2;
3349         data->has_fan_min |= fan3min << 2;
3350
3351         data->has_fan |= (fan4pin << 3) | (fan5pin << 4);
3352         data->has_fan_min |= (fan4min << 3) | (fan5pin << 4);
3353
3354         data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) | (pwm5pin << 4);
3355
3356         return 0;
3357 }
3358
3359 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
3360                              int *available, int *mask)
3361 {
3362         int i;
3363         u8 src;
3364
3365         for (i = 0; i < data->pwm_num && *available; i++) {
3366                 int index;
3367
3368                 if (!regp[i])
3369                         continue;
3370                 src = nct6775_read_value(data, regp[i]);
3371                 src &= 0x1f;
3372                 if (!src || (*mask & (1 << src)))
3373                         continue;
3374                 if (src >= data->temp_label_num ||
3375                     !strlen(data->temp_label[src]))
3376                         continue;
3377
3378                 index = __ffs(*available);
3379                 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3380                 *available &= ~(1 << index);
3381                 *mask |= 1 << src;
3382         }
3383 }
3384
3385 static int nct6775_probe(struct platform_device *pdev)
3386 {
3387         struct device *dev = &pdev->dev;
3388         struct nct6775_sio_data *sio_data = dev->platform_data;
3389         struct nct6775_data *data;
3390         struct resource *res;
3391         int i, s, err = 0;
3392         int src, mask, available;
3393         const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3394         const u16 *reg_temp_alternate, *reg_temp_crit;
3395         int num_reg_temp;
3396         bool have_vid = false;
3397         u8 cr2a;
3398
3399         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3400         if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3401                                  DRVNAME))
3402                 return -EBUSY;
3403
3404         data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3405                             GFP_KERNEL);
3406         if (!data)
3407                 return -ENOMEM;
3408
3409         data->kind = sio_data->kind;
3410         data->addr = res->start;
3411         mutex_init(&data->update_lock);
3412         data->name = nct6775_device_names[data->kind];
3413         data->bank = 0xff;              /* Force initial bank selection */
3414         platform_set_drvdata(pdev, data);
3415
3416         switch (data->kind) {
3417         case nct6775:
3418                 data->in_num = 9;
3419                 data->pwm_num = 3;
3420                 data->auto_pwm_num = 6;
3421                 data->has_fan_div = true;
3422                 data->temp_fixed_num = 3;
3423
3424                 data->ALARM_BITS = NCT6775_ALARM_BITS;
3425
3426                 data->fan_from_reg = fan_from_reg16;
3427                 data->fan_from_reg_min = fan_from_reg8;
3428                 data->target_temp_mask = 0x7f;
3429                 data->tolerance_mask = 0x0f;
3430                 data->speed_tolerance_limit = 15;
3431
3432                 data->temp_label = nct6775_temp_label;
3433                 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
3434
3435                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3436                 data->REG_VBAT = NCT6775_REG_VBAT;
3437                 data->REG_DIODE = NCT6775_REG_DIODE;
3438                 data->REG_VIN = NCT6775_REG_IN;
3439                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3440                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3441                 data->REG_TARGET = NCT6775_REG_TARGET;
3442                 data->REG_FAN = NCT6775_REG_FAN;
3443                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3444                 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3445                 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3446                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3447                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3448                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3449                 data->REG_PWM[0] = NCT6775_REG_PWM;
3450                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3451                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3452                 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3453                 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3454                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3455                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3456                 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3457                 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3458                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3459                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3460                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3461                 data->REG_CRITICAL_TEMP_TOLERANCE
3462                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3463                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3464                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3465                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3466                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3467                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3468                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3469                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3470                 data->REG_ALARM = NCT6775_REG_ALARM;
3471
3472                 reg_temp = NCT6775_REG_TEMP;
3473                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3474                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3475                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3476                 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3477                 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3478                 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3479
3480                 break;
3481         case nct6776:
3482                 data->in_num = 9;
3483                 data->pwm_num = 3;
3484                 data->auto_pwm_num = 4;
3485                 data->has_fan_div = false;
3486                 data->temp_fixed_num = 3;
3487
3488                 data->ALARM_BITS = NCT6776_ALARM_BITS;
3489
3490                 data->fan_from_reg = fan_from_reg13;
3491                 data->fan_from_reg_min = fan_from_reg13;
3492                 data->target_temp_mask = 0xff;
3493                 data->tolerance_mask = 0x07;
3494                 data->speed_tolerance_limit = 63;
3495
3496                 data->temp_label = nct6776_temp_label;
3497                 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3498
3499                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3500                 data->REG_VBAT = NCT6775_REG_VBAT;
3501                 data->REG_DIODE = NCT6775_REG_DIODE;
3502                 data->REG_VIN = NCT6775_REG_IN;
3503                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3504                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3505                 data->REG_TARGET = NCT6775_REG_TARGET;
3506                 data->REG_FAN = NCT6775_REG_FAN;
3507                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3508                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3509                 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3510                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3511                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3512                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3513                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3514                 data->REG_PWM[0] = NCT6775_REG_PWM;
3515                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3516                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3517                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3518                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3519                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3520                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3521                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3522                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3523                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3524                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3525                 data->REG_CRITICAL_TEMP_TOLERANCE
3526                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3527                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3528                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3529                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3530                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3531                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3532                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3533                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3534                 data->REG_ALARM = NCT6775_REG_ALARM;
3535
3536                 reg_temp = NCT6775_REG_TEMP;
3537                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3538                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3539                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3540                 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3541                 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3542                 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3543
3544                 break;
3545         case nct6779:
3546                 data->in_num = 15;
3547                 data->pwm_num = 5;
3548                 data->auto_pwm_num = 4;
3549                 data->has_fan_div = false;
3550                 data->temp_fixed_num = 6;
3551
3552                 data->ALARM_BITS = NCT6779_ALARM_BITS;
3553
3554                 data->fan_from_reg = fan_from_reg13;
3555                 data->fan_from_reg_min = fan_from_reg13;
3556                 data->target_temp_mask = 0xff;
3557                 data->tolerance_mask = 0x07;
3558                 data->speed_tolerance_limit = 63;
3559
3560                 data->temp_label = nct6779_temp_label;
3561                 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3562
3563                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3564                 data->REG_VBAT = NCT6775_REG_VBAT;
3565                 data->REG_DIODE = NCT6775_REG_DIODE;
3566                 data->REG_VIN = NCT6779_REG_IN;
3567                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3568                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3569                 data->REG_TARGET = NCT6775_REG_TARGET;
3570                 data->REG_FAN = NCT6779_REG_FAN;
3571                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3572                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3573                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3574                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3575                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3576                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3577                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3578                 data->REG_PWM[0] = NCT6775_REG_PWM;
3579                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3580                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3581                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3582                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3583                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3584                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3585                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3586                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3587                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3588                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3589                 data->REG_CRITICAL_TEMP_TOLERANCE
3590                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3591                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3592                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3593                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3594                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3595                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3596                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3597                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3598                 data->REG_ALARM = NCT6779_REG_ALARM;
3599
3600                 reg_temp = NCT6779_REG_TEMP;
3601                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3602                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3603                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3604                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3605                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3606                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3607
3608                 break;
3609         default:
3610                 return -ENODEV;
3611         }
3612         data->have_in = (1 << data->in_num) - 1;
3613         data->have_temp = 0;
3614
3615         /*
3616          * On some boards, not all available temperature sources are monitored,
3617          * even though some of the monitoring registers are unused.
3618          * Get list of unused monitoring registers, then detect if any fan
3619          * controls are configured to use unmonitored temperature sources.
3620          * If so, assign the unmonitored temperature sources to available
3621          * monitoring registers.
3622          */
3623         mask = 0;
3624         available = 0;
3625         for (i = 0; i < num_reg_temp; i++) {
3626                 if (reg_temp[i] == 0)
3627                         continue;
3628
3629                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3630                 if (!src || (mask & (1 << src)))
3631                         available |= 1 << i;
3632
3633                 mask |= 1 << src;
3634         }
3635
3636         /*
3637          * Now find unmonitored temperature registers and enable monitoring
3638          * if additional monitoring registers are available.
3639          */
3640         add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
3641         add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
3642
3643         mask = 0;
3644         s = NUM_TEMP_FIXED;     /* First dynamic temperature attribute */
3645         for (i = 0; i < num_reg_temp; i++) {
3646                 if (reg_temp[i] == 0)
3647                         continue;
3648
3649                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3650                 if (!src || (mask & (1 << src)))
3651                         continue;
3652
3653                 if (src >= data->temp_label_num ||
3654                     !strlen(data->temp_label[src])) {
3655                         dev_info(dev,
3656                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3657                                  src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
3658                         continue;
3659                 }
3660
3661                 mask |= 1 << src;
3662
3663                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3664                 if (src <= data->temp_fixed_num) {
3665                         data->have_temp |= 1 << (src - 1);
3666                         data->have_temp_fixed |= 1 << (src - 1);
3667                         data->reg_temp[0][src - 1] = reg_temp[i];
3668                         data->reg_temp[1][src - 1] = reg_temp_over[i];
3669                         data->reg_temp[2][src - 1] = reg_temp_hyst[i];
3670                         data->reg_temp_config[src - 1] = reg_temp_config[i];
3671                         data->temp_src[src - 1] = src;
3672                         continue;
3673                 }
3674
3675                 if (s >= NUM_TEMP)
3676                         continue;
3677
3678                 /* Use dynamic index for other sources */
3679                 data->have_temp |= 1 << s;
3680                 data->reg_temp[0][s] = reg_temp[i];
3681                 data->reg_temp[1][s] = reg_temp_over[i];
3682                 data->reg_temp[2][s] = reg_temp_hyst[i];
3683                 data->reg_temp_config[s] = reg_temp_config[i];
3684                 if (reg_temp_crit[src - 1])
3685                         data->reg_temp[3][s] = reg_temp_crit[src - 1];
3686
3687                 data->temp_src[s] = src;
3688                 s++;
3689         }
3690
3691 #ifdef USE_ALTERNATE
3692         /*
3693          * Go through the list of alternate temp registers and enable
3694          * if possible.
3695          * The temperature is already monitored if the respective bit in <mask>
3696          * is set.
3697          */
3698         for (i = 0; i < data->temp_label_num - 1; i++) {
3699                 if (!reg_temp_alternate[i])
3700                         continue;
3701                 if (mask & (1 << (i + 1)))
3702                         continue;
3703                 if (i < data->temp_fixed_num) {
3704                         if (data->have_temp & (1 << i))
3705                                 continue;
3706                         data->have_temp |= 1 << i;
3707                         data->have_temp_fixed |= 1 << i;
3708                         data->reg_temp[0][i] = reg_temp_alternate[i];
3709                         data->reg_temp[1][i] = reg_temp_over[i];
3710                         data->reg_temp[2][i] = reg_temp_hyst[i];
3711                         data->temp_src[i] = i + 1;
3712                         continue;
3713                 }
3714
3715                 if (s >= NUM_TEMP)      /* Abort if no more space */
3716                         break;
3717
3718                 data->have_temp |= 1 << s;
3719                 data->reg_temp[0][s] = reg_temp_alternate[i];
3720                 data->temp_src[s] = i + 1;
3721                 s++;
3722         }
3723 #endif /* USE_ALTERNATE */
3724
3725         switch (data->kind) {
3726         case nct6775:
3727                 break;
3728         case nct6776:
3729                 /*
3730                  * On NCT6776, AUXTIN and VIN3 pins are shared.
3731                  * Only way to detect it is to check if AUXTIN is used
3732                  * as a temperature source, and if that source is
3733                  * enabled.
3734                  *
3735                  * If that is the case, disable in6, which reports VIN3.
3736                  * Otherwise disable temp3.
3737                  */
3738                 if (data->have_temp & (1 << 2)) {
3739                         u8 reg = nct6775_read_value(data,
3740                                                     data->reg_temp_config[2]);
3741                         if (reg & 0x01)
3742                                 data->have_temp &= ~(1 << 2);
3743                         else
3744                                 data->have_in &= ~(1 << 6);
3745                 }
3746                 break;
3747         case nct6779:
3748                 /*
3749                  * Shared pins:
3750                  *      VIN4 / AUXTIN0
3751                  *      VIN5 / AUXTIN1
3752                  *      VIN6 / AUXTIN2
3753                  *      VIN7 / AUXTIN3
3754                  *
3755                  * There does not seem to be a clean way to detect if VINx or
3756                  * AUXTINx is active, so for keep both sensor types enabled
3757                  * for now.
3758                  */
3759                 break;
3760         }
3761
3762         /* Initialize the chip */
3763         nct6775_init_device(data);
3764
3765         err = superio_enter(sio_data->sioreg);
3766         if (err)
3767                 return err;
3768
3769         cr2a = superio_inb(sio_data->sioreg, 0x2a);
3770         switch (data->kind) {
3771         case nct6775:
3772                 have_vid = (cr2a & 0x40);
3773                 break;
3774         case nct6776:
3775                 have_vid = (cr2a & 0x60) == 0x40;
3776                 break;
3777         case nct6779:
3778                 break;
3779         }
3780
3781         /*
3782          * Read VID value
3783          * We can get the VID input values directly at logical device D 0xe3.
3784          */
3785         if (have_vid) {
3786                 superio_select(sio_data->sioreg, NCT6775_LD_VID);
3787                 data->vid = superio_inb(sio_data->sioreg, 0xe3);
3788                 data->vrm = vid_which_vrm();
3789         }
3790
3791         if (fan_debounce) {
3792                 u8 tmp;
3793
3794                 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3795                 tmp = superio_inb(sio_data->sioreg,
3796                                   NCT6775_REG_CR_FAN_DEBOUNCE);
3797                 switch (data->kind) {
3798                 case nct6775:
3799                         tmp |= 0x1e;
3800                         break;
3801                 case nct6776:
3802                 case nct6779:
3803                         tmp |= 0x3e;
3804                         break;
3805                 }
3806                 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
3807                              tmp);
3808                 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
3809                          data->name);
3810         }
3811
3812         superio_exit(sio_data->sioreg);
3813
3814         if (have_vid) {
3815                 err = device_create_file(dev, &dev_attr_cpu0_vid);
3816                 if (err)
3817                         return err;
3818         }
3819
3820         err = nct6775_check_fan_inputs(sio_data, data);
3821         if (err)
3822                 goto exit_remove;
3823
3824         /* Read fan clock dividers immediately */
3825         nct6775_init_fan_common(dev, data);
3826
3827         /* Register sysfs hooks */
3828         for (i = 0; i < data->pwm_num; i++) {
3829                 if (!(data->has_pwm & (1 << i)))
3830                         continue;
3831
3832                 err = sysfs_create_group(&dev->kobj, &nct6775_group_pwm[i]);
3833                 if (err)
3834                         goto exit_remove;
3835
3836                 if (data->REG_PWM[3]) {
3837                         err = device_create_file(dev,
3838                                         &sda_pwm_max[i].dev_attr);
3839                         if (err)
3840                                 goto exit_remove;
3841                 }
3842                 if (data->REG_PWM[4]) {
3843                         err = device_create_file(dev,
3844                                         &sda_pwm_step[i].dev_attr);
3845                         if (err)
3846                                 goto exit_remove;
3847                 }
3848                 if (data->REG_PWM[6]) {
3849                         err = device_create_file(dev,
3850                                         &sda_weight_duty_base[i].dev_attr);
3851                         if (err)
3852                                 goto exit_remove;
3853                 }
3854         }
3855         for (i = 0; i < ARRAY_SIZE(sda_auto_pwm_arrays); i++) {
3856                 struct sensor_device_attribute_2 *attr =
3857                         &sda_auto_pwm_arrays[i];
3858
3859                 if (!(data->has_pwm & (1 << attr->nr)))
3860                         continue;
3861                 if (attr->index > data->auto_pwm_num)
3862                         continue;
3863                 err = device_create_file(dev, &attr->dev_attr);
3864                 if (err)
3865                         goto exit_remove;
3866         }
3867
3868         for (i = 0; i < data->in_num; i++) {
3869                 if (!(data->have_in & (1 << i)))
3870                         continue;
3871                 err = sysfs_create_group(&dev->kobj, &nct6775_group_in[i]);
3872                 if (err)
3873                         goto exit_remove;
3874         }
3875
3876         for (i = 0; i < 5; i++) {
3877                 if (data->has_fan & (1 << i)) {
3878                         err = device_create_file(dev,
3879                                                  &sda_fan_input[i].dev_attr);
3880                         if (err)
3881                                 goto exit_remove;
3882                         err = device_create_file(dev,
3883                                                  &sda_fan_alarm[i].dev_attr);
3884                         if (err)
3885                                 goto exit_remove;
3886                         if (data->kind != nct6776 &&
3887                             data->kind != nct6779) {
3888                                 err = device_create_file(dev,
3889                                                 &sda_fan_div[i].dev_attr);
3890                                 if (err)
3891                                         goto exit_remove;
3892                         }
3893                         if (data->has_fan_min & (1 << i)) {
3894                                 err = device_create_file(dev,
3895                                                 &sda_fan_min[i].dev_attr);
3896                                 if (err)
3897                                         goto exit_remove;
3898                         }
3899                         err = device_create_file(dev,
3900                                                 &sda_fan_pulses[i].dev_attr);
3901                         if (err)
3902                                 goto exit_remove;
3903                 }
3904         }
3905
3906         for (i = 0; i < NUM_TEMP; i++) {
3907                 if (!(data->have_temp & (1 << i)))
3908                         continue;
3909                 err = device_create_file(dev, &sda_temp_input[i].dev_attr);
3910                 if (err)
3911                         goto exit_remove;
3912                 if (data->temp_label) {
3913                         err = device_create_file(dev,
3914                                                  &sda_temp_label[i].dev_attr);
3915                         if (err)
3916                                 goto exit_remove;
3917                 }
3918                 if (data->reg_temp[1][i]) {
3919                         err = device_create_file(dev,
3920                                                  &sda_temp_max[i].dev_attr);
3921                         if (err)
3922                                 goto exit_remove;
3923                 }
3924                 if (data->reg_temp[2][i]) {
3925                         err = device_create_file(dev,
3926                                         &sda_temp_max_hyst[i].dev_attr);
3927                         if (err)
3928                                 goto exit_remove;
3929                 }
3930                 if (data->reg_temp[3][i]) {
3931                         err = device_create_file(dev,
3932                                                  &sda_temp_crit[i].dev_attr);
3933                         if (err)
3934                                 goto exit_remove;
3935                 }
3936                 if (!(data->have_temp_fixed & (1 << i)))
3937                         continue;
3938                 err = device_create_file(dev, &sda_temp_type[i].dev_attr);
3939                 if (err)
3940                         goto exit_remove;
3941                 err = device_create_file(dev, &sda_temp_offset[i].dev_attr);
3942                 if (err)
3943                         goto exit_remove;
3944                 if (i >= NUM_TEMP_ALARM ||
3945                     data->ALARM_BITS[TEMP_ALARM_BASE + i] < 0)
3946                         continue;
3947                 err = device_create_file(dev, &sda_temp_alarm[i].dev_attr);
3948                 if (err)
3949                         goto exit_remove;
3950         }
3951
3952         for (i = 0; i < ARRAY_SIZE(sda_caseopen); i++) {
3953                 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + i] < 0)
3954                         continue;
3955                 err = device_create_file(dev, &sda_caseopen[i].dev_attr);
3956                 if (err)
3957                         goto exit_remove;
3958         }
3959
3960         err = device_create_file(dev, &dev_attr_name);
3961         if (err)
3962                 goto exit_remove;
3963
3964         data->hwmon_dev = hwmon_device_register(dev);
3965         if (IS_ERR(data->hwmon_dev)) {
3966                 err = PTR_ERR(data->hwmon_dev);
3967                 goto exit_remove;
3968         }
3969
3970         return 0;
3971
3972 exit_remove:
3973         nct6775_device_remove_files(dev);
3974         return err;
3975 }
3976
3977 static int nct6775_remove(struct platform_device *pdev)
3978 {
3979         struct nct6775_data *data = platform_get_drvdata(pdev);
3980
3981         hwmon_device_unregister(data->hwmon_dev);
3982         nct6775_device_remove_files(&pdev->dev);
3983
3984         return 0;
3985 }
3986
3987 #ifdef CONFIG_PM
3988 static int nct6775_suspend(struct device *dev)
3989 {
3990         struct nct6775_data *data = nct6775_update_device(dev);
3991         struct nct6775_sio_data *sio_data = dev->platform_data;
3992
3993         mutex_lock(&data->update_lock);
3994         data->vbat = nct6775_read_value(data, data->REG_VBAT);
3995         if (sio_data->kind == nct6775) {
3996                 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
3997                 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
3998         }
3999         mutex_unlock(&data->update_lock);
4000
4001         return 0;
4002 }
4003
4004 static int nct6775_resume(struct device *dev)
4005 {
4006         struct nct6775_data *data = dev_get_drvdata(dev);
4007         struct nct6775_sio_data *sio_data = dev->platform_data;
4008         int i, j;
4009
4010         mutex_lock(&data->update_lock);
4011         data->bank = 0xff;              /* Force initial bank selection */
4012
4013         /* Restore limits */
4014         for (i = 0; i < data->in_num; i++) {
4015                 if (!(data->have_in & (1 << i)))
4016                         continue;
4017
4018                 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
4019                                     data->in[i][1]);
4020                 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
4021                                     data->in[i][2]);
4022         }
4023
4024         for (i = 0; i < 5; i++) {
4025                 if (!(data->has_fan_min & (1 << i)))
4026                         continue;
4027
4028                 nct6775_write_value(data, data->REG_FAN_MIN[i],
4029                                     data->fan_min[i]);
4030         }
4031
4032         for (i = 0; i < NUM_TEMP; i++) {
4033                 if (!(data->have_temp & (1 << i)))
4034                         continue;
4035
4036                 for (j = 1; j < 4; j++)
4037                         if (data->reg_temp[j][i])
4038                                 nct6775_write_temp(data, data->reg_temp[j][i],
4039                                                    data->temp[j][i]);
4040         }
4041
4042         /* Restore other settings */
4043         nct6775_write_value(data, data->REG_VBAT, data->vbat);
4044         if (sio_data->kind == nct6775) {
4045                 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
4046                 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
4047         }
4048
4049         /* Force re-reading all values */
4050         data->valid = false;
4051         mutex_unlock(&data->update_lock);
4052
4053         return 0;
4054 }
4055
4056 static const struct dev_pm_ops nct6775_dev_pm_ops = {
4057         .suspend = nct6775_suspend,
4058         .resume = nct6775_resume,
4059 };
4060
4061 #define NCT6775_DEV_PM_OPS      (&nct6775_dev_pm_ops)
4062 #else
4063 #define NCT6775_DEV_PM_OPS      NULL
4064 #endif /* CONFIG_PM */
4065
4066 static struct platform_driver nct6775_driver = {
4067         .driver = {
4068                 .owner  = THIS_MODULE,
4069                 .name   = DRVNAME,
4070                 .pm     = NCT6775_DEV_PM_OPS,
4071         },
4072         .probe          = nct6775_probe,
4073         .remove         = nct6775_remove,
4074 };
4075
4076 static const char *nct6775_sio_names[] __initconst = {
4077         "NCT6775F",
4078         "NCT6776D/F",
4079         "NCT6779D",
4080 };
4081
4082 /* nct6775_find() looks for a '627 in the Super-I/O config space */
4083 static int __init nct6775_find(int sioaddr, unsigned short *addr,
4084                                struct nct6775_sio_data *sio_data)
4085 {
4086         u16 val;
4087         int err;
4088
4089         err = superio_enter(sioaddr);
4090         if (err)
4091                 return err;
4092
4093         if (force_id)
4094                 val = force_id;
4095         else
4096                 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
4097                     | superio_inb(sioaddr, SIO_REG_DEVID + 1);
4098         switch (val & SIO_ID_MASK) {
4099         case SIO_NCT6775_ID:
4100                 sio_data->kind = nct6775;
4101                 break;
4102         case SIO_NCT6776_ID:
4103                 sio_data->kind = nct6776;
4104                 break;
4105         case SIO_NCT6779_ID:
4106                 sio_data->kind = nct6779;
4107                 break;
4108         default:
4109                 if (val != 0xffff)
4110                         pr_debug("unsupported chip ID: 0x%04x\n", val);
4111                 superio_exit(sioaddr);
4112                 return -ENODEV;
4113         }
4114
4115         /* We have a known chip, find the HWM I/O address */
4116         superio_select(sioaddr, NCT6775_LD_HWM);
4117         val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
4118             | superio_inb(sioaddr, SIO_REG_ADDR + 1);
4119         *addr = val & IOREGION_ALIGNMENT;
4120         if (*addr == 0) {
4121                 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
4122                 superio_exit(sioaddr);
4123                 return -ENODEV;
4124         }
4125
4126         /* Activate logical device if needed */
4127         val = superio_inb(sioaddr, SIO_REG_ENABLE);
4128         if (!(val & 0x01)) {
4129                 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
4130                 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
4131         }
4132
4133         superio_exit(sioaddr);
4134         pr_info("Found %s or compatible chip at %#x\n",
4135                 nct6775_sio_names[sio_data->kind], *addr);
4136         sio_data->sioreg = sioaddr;
4137
4138         return 0;
4139 }
4140
4141 /*
4142  * when Super-I/O functions move to a separate file, the Super-I/O
4143  * bus will manage the lifetime of the device and this module will only keep
4144  * track of the nct6775 driver. But since we platform_device_alloc(), we
4145  * must keep track of the device
4146  */
4147 static struct platform_device *pdev;
4148
4149 static int __init sensors_nct6775_init(void)
4150 {
4151         int err;
4152         unsigned short address;
4153         struct resource res;
4154         struct nct6775_sio_data sio_data;
4155
4156         /*
4157          * initialize sio_data->kind and sio_data->sioreg.
4158          *
4159          * when Super-I/O functions move to a separate file, the Super-I/O
4160          * driver will probe 0x2e and 0x4e and auto-detect the presence of a
4161          * nct6775 hardware monitor, and call probe()
4162          */
4163         if (nct6775_find(0x2e, &address, &sio_data) &&
4164             nct6775_find(0x4e, &address, &sio_data))
4165                 return -ENODEV;
4166
4167         err = platform_driver_register(&nct6775_driver);
4168         if (err)
4169                 goto exit;
4170
4171         pdev = platform_device_alloc(DRVNAME, address);
4172         if (!pdev) {
4173                 err = -ENOMEM;
4174                 pr_err("Device allocation failed\n");
4175                 goto exit_unregister;
4176         }
4177
4178         err = platform_device_add_data(pdev, &sio_data,
4179                                        sizeof(struct nct6775_sio_data));
4180         if (err) {
4181                 pr_err("Platform data allocation failed\n");
4182                 goto exit_device_put;
4183         }
4184
4185         memset(&res, 0, sizeof(res));
4186         res.name = DRVNAME;
4187         res.start = address + IOREGION_OFFSET;
4188         res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
4189         res.flags = IORESOURCE_IO;
4190
4191         err = acpi_check_resource_conflict(&res);
4192         if (err)
4193                 goto exit_device_put;
4194
4195         err = platform_device_add_resources(pdev, &res, 1);
4196         if (err) {
4197                 pr_err("Device resource addition failed (%d)\n", err);
4198                 goto exit_device_put;
4199         }
4200
4201         /* platform_device_add calls probe() */
4202         err = platform_device_add(pdev);
4203         if (err) {
4204                 pr_err("Device addition failed (%d)\n", err);
4205                 goto exit_device_put;
4206         }
4207
4208         return 0;
4209
4210 exit_device_put:
4211         platform_device_put(pdev);
4212 exit_unregister:
4213         platform_driver_unregister(&nct6775_driver);
4214 exit:
4215         return err;
4216 }
4217
4218 static void __exit sensors_nct6775_exit(void)
4219 {
4220         platform_device_unregister(pdev);
4221         platform_driver_unregister(&nct6775_driver);
4222 }
4223
4224 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4225 MODULE_DESCRIPTION("NCT6775F/NCT6776F/NCT6779D driver");
4226 MODULE_LICENSE("GPL");
4227
4228 module_init(sensors_nct6775_init);
4229 module_exit(sensors_nct6775_exit);