git.sur5r.net Git - groeck-nct6775/blob - nct6775.c

   1 /*
   2  * nct6775 - Driver for the hardware monitoring functionality of
   3  *             Nuvoton NCT677x Super-I/O chips
   4  *
   5  * Copyright (C) 2012  Guenter Roeck <linux@roeck-us.net>
   6  *
   7  * Derived from w83627ehf driver
   8  * Copyright (C) 2005-2012  Jean Delvare <jdelvare@suse.de>
   9  * Copyright (C) 2006  Yuan Mu (Winbond),
  10  *                     Rudolf Marek <r.marek@assembler.cz>
  11  *                     David Hubbard <david.c.hubbard@gmail.com>
  12  *                     Daniel J Blueman <daniel.blueman@gmail.com>
  13  * Copyright (C) 2010  Sheng-Yuan Huang (Nuvoton) (PS00)
  14  *
  15  * Shamelessly ripped from the w83627hf driver
  16  * Copyright (C) 2003  Mark Studebaker
  17  *
  18  * This program is free software; you can redistribute it and/or modify
  19  * it under the terms of the GNU General Public License as published by
  20  * the Free Software Foundation; either version 2 of the License, or
  21  * (at your option) any later version.
  22  *
  23  * This program is distributed in the hope that it will be useful,
  24  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26  * GNU General Public License for more details.
  27  *
  28  * You should have received a copy of the GNU General Public License
  29  * along with this program; if not, write to the Free Software
  30  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  31  *
  32  *
  33  * Supports the following chips:
  34  *
  35  * Chip        #vin    #fan    #pwm    #temp  chip IDs       man ID
  36  * nct6106d     9      3       3       6+3    0xc450 0xc1    0x5ca3
  37  * nct6775f     9      4       3       6+3    0xb470 0xc1    0x5ca3
  38  * nct6776f     9      5       3       6+3    0xc330 0xc1    0x5ca3
  39  * nct6779d    15      5       5       2+6    0xc560 0xc1    0x5ca3
  40  * nct6791d    15      6       6       2+6    0xc800 0xc1    0x5ca3
  41  * nct6792d    15      6       6       2+6    0xc910 0xc1    0x5ca3
  42  * nct6793d    15      6       6       2+6    0xd120 0xc1    0x5ca3
  43  *
  44  * #temp lists the number of monitored temperature sources (first value) plus
  45  * the number of directly connectable temperature sensors (second value).
  46  */
  47
  48 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  49
  50 #include <linux/module.h>
  51 #include <linux/init.h>
  52 #include <linux/slab.h>
  53 #include <linux/jiffies.h>
  54 #include <linux/platform_device.h>
  55 #include <linux/hwmon.h>
  56 #include <linux/hwmon-sysfs.h>
  57 #include <linux/hwmon-vid.h>
  58 #include <linux/err.h>
  59 #include <linux/mutex.h>
  60 #include <linux/acpi.h>
  61 #include <linux/dmi.h>
  62 #include <linux/io.h>
  63 #include "lm75.h"
  64 #include "compat.h"
  65
  66 #define USE_ALTERNATE
  67
  68 enum kinds { nct6106, nct6775, nct6776, nct6779, nct6791, nct6792, nct6793 };
  69
  70 /* used to set data->name = nct6775_device_names[data->sio_kind] */
  71 static const char * const nct6775_device_names[] = {
  72         "nct6106",
  73         "nct6775",
  74         "nct6776",
  75         "nct6779",
  76         "nct6791",
  77         "nct6792",
  78         "nct6793",
  79 };
  80
  81 static const char * const nct6775_sio_names[] __initconst = {
  82         "NCT6106D",
  83         "NCT6775F",
  84         "NCT6776D/F",
  85         "NCT6779D",
  86         "NCT6791D",
  87         "NCT6792D",
  88         "NCT6793D",
  89 };
  90
  91 static unsigned short force_id;
  92 module_param(force_id, ushort, 0);
  93 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  94
  95 static unsigned short fan_debounce;
  96 module_param(fan_debounce, ushort, 0);
  97 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
  98
  99 #define DRVNAME "nct6775"
 100
 101 /*
 102  * Super-I/O constants and functions
 103  */
 104
 105 #define NCT6775_LD_ACPI         0x0a
 106 #define NCT6775_LD_HWM          0x0b
 107 #define NCT6775_LD_VID          0x0d
 108
 109 #define SIO_REG_LDSEL           0x07    /* Logical device select */
 110 #define SIO_REG_DEVID           0x20    /* Device ID (2 bytes) */
 111 #define SIO_REG_ENABLE          0x30    /* Logical device enable */
 112 #define SIO_REG_ADDR            0x60    /* Logical device address (2 bytes) */
 113
 114 #define SIO_NCT6106_ID          0xc450
 115 #define SIO_NCT6775_ID          0xb470
 116 #define SIO_NCT6776_ID          0xc330
 117 #define SIO_NCT6779_ID          0xc560
 118 #define SIO_NCT6791_ID          0xc800
 119 #define SIO_NCT6792_ID          0xc910
 120 #define SIO_NCT6793_ID          0xd120
 121 #define SIO_ID_MASK             0xFFF0
 122
 123 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
 124
 125 static inline void
 126 superio_outb(int ioreg, int reg, int val)
 127 {
 128         outb(reg, ioreg);
 129         outb(val, ioreg + 1);
 130 }
 131
 132 static inline int
 133 superio_inb(int ioreg, int reg)
 134 {
 135         outb(reg, ioreg);
 136         return inb(ioreg + 1);
 137 }
 138
 139 static inline void
 140 superio_select(int ioreg, int ld)
 141 {
 142         outb(SIO_REG_LDSEL, ioreg);
 143         outb(ld, ioreg + 1);
 144 }
 145
 146 static inline int
 147 superio_enter(int ioreg)
 148 {
 149         /*
 150          * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
 151          */
 152         if (!request_muxed_region(ioreg, 2, DRVNAME))
 153                 return -EBUSY;
 154
 155         outb(0x87, ioreg);
 156         outb(0x87, ioreg);
 157
 158         return 0;
 159 }
 160
 161 static inline void
 162 superio_exit(int ioreg)
 163 {
 164         outb(0xaa, ioreg);
 165         outb(0x02, ioreg);
 166         outb(0x02, ioreg + 1);
 167         release_region(ioreg, 2);
 168 }
 169
 170 /*
 171  * ISA constants
 172  */
 173
 174 #define IOREGION_ALIGNMENT      (~7)
 175 #define IOREGION_OFFSET         5
 176 #define IOREGION_LENGTH         2
 177 #define ADDR_REG_OFFSET         0
 178 #define DATA_REG_OFFSET         1
 179
 180 #define NCT6775_REG_BANK        0x4E
 181 #define NCT6775_REG_CONFIG      0x40
 182
 183 /*
 184  * Not currently used:
 185  * REG_MAN_ID has the value 0x5ca3 for all supported chips.
 186  * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
 187  * REG_MAN_ID is at port 0x4f
 188  * REG_CHIP_ID is at port 0x58
 189  */
 190
 191 #define NUM_TEMP        10      /* Max number of temp attribute sets w/ limits*/
 192 #define NUM_TEMP_FIXED  6       /* Max number of fixed temp attribute sets */
 193
 194 #define NUM_REG_ALARM   7       /* Max number of alarm registers */
 195 #define NUM_REG_BEEP    5       /* Max number of beep registers */
 196
 197 #define NUM_FAN         6
 198
 199 /* Common and NCT6775 specific data */
 200
 201 /* Voltage min/max registers for nr=7..14 are in bank 5 */
 202
 203 static const u16 NCT6775_REG_IN_MAX[] = {
 204         0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
 205         0x55c, 0x55e, 0x560, 0x562 };
 206 static const u16 NCT6775_REG_IN_MIN[] = {
 207         0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
 208         0x55d, 0x55f, 0x561, 0x563 };
 209 static const u16 NCT6775_REG_IN[] = {
 210         0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
 211 };
 212
 213 #define NCT6775_REG_VBAT                0x5D
 214 #define NCT6775_REG_DIODE               0x5E
 215 #define NCT6775_DIODE_MASK              0x02
 216
 217 #define NCT6775_REG_FANDIV1             0x506
 218 #define NCT6775_REG_FANDIV2             0x507
 219
 220 #define NCT6775_REG_CR_FAN_DEBOUNCE     0xf0
 221
 222 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
 223
 224 /* 0..15 voltages, 16..23 fans, 24..29 temperatures, 30..31 intrusion */
 225
 226 static const s8 NCT6775_ALARM_BITS[] = {
 227         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 228         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 229         -1,                             /* unused */
 230         6, 7, 11, -1, -1,               /* fan1..fan5 */
 231         -1, -1, -1,                     /* unused */
 232         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 233         12, -1 };                       /* intrusion0, intrusion1 */
 234
 235 #define FAN_ALARM_BASE          16
 236 #define TEMP_ALARM_BASE         24
 237 #define INTRUSION_ALARM_BASE    30
 238
 239 static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e };
 240
 241 /*
 242  * 0..14 voltages, 15 global beep enable, 16..23 fans, 24..29 temperatures,
 243  * 30..31 intrusion
 244  */
 245 static const s8 NCT6775_BEEP_BITS[] = {
 246         0, 1, 2, 3, 8, 9, 10, 16,       /* in0.. in7 */
 247         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 248         21,                             /* global beep enable */
 249         6, 7, 11, 28, -1,               /* fan1..fan5 */
 250         -1, -1, -1,                     /* unused */
 251         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 252         12, -1 };                       /* intrusion0, intrusion1 */
 253
 254 #define BEEP_ENABLE_BASE                15
 255
 256 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
 257 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
 258
 259 /* DC or PWM output fan configuration */
 260 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
 261 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
 262
 263 /* Advanced Fan control, some values are common for all fans */
 264
 265 static const u16 NCT6775_REG_TARGET[] = {
 266         0x101, 0x201, 0x301, 0x801, 0x901, 0xa01 };
 267 static const u16 NCT6775_REG_FAN_MODE[] = {
 268         0x102, 0x202, 0x302, 0x802, 0x902, 0xa02 };
 269 /* STEP_DOWN_TIME and STEP_UP_TIME regs are swapped for all chips but NCT6775 */
 270 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
 271         0x103, 0x203, 0x303, 0x803, 0x903, 0xa03 };
 272 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
 273         0x104, 0x204, 0x304, 0x804, 0x904, 0xa04 };
 274 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
 275         0x105, 0x205, 0x305, 0x805, 0x905, 0xa05 };
 276 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = {
 277         0x106, 0x206, 0x306, 0x806, 0x906, 0xa06 };
 278 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
 279 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
 280
 281 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
 282         0x107, 0x207, 0x307, 0x807, 0x907, 0xa07 };
 283 static const u16 NCT6775_REG_PWM[] = {
 284         0x109, 0x209, 0x309, 0x809, 0x909, 0xa09 };
 285 static const u16 NCT6775_REG_PWM_READ[] = {
 286         0x01, 0x03, 0x11, 0x13, 0x15, 0xa09 };
 287
 288 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
 289 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
 290 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
 291 static const u16 NCT6775_FAN_PULSE_SHIFT[] = { 0, 0, 0, 0, 0, 0 };
 292
 293 static const u16 NCT6775_REG_TEMP[] = {
 294         0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
 295
 296 static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77 };
 297
 298 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 299         0, 0x152, 0x252, 0x628, 0x629, 0x62A };
 300 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 301         0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
 302 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 303         0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
 304
 305 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 306         0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
 307
 308 static const u16 NCT6775_REG_TEMP_SEL[] = {
 309         0x100, 0x200, 0x300, 0x800, 0x900, 0xa00 };
 310
 311 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
 312         0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 };
 313 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
 314         0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a };
 315 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
 316         0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b };
 317 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
 318         0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c };
 319 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
 320         0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d };
 321
 322 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
 323
 324 static const u16 NCT6775_REG_AUTO_TEMP[] = {
 325         0x121, 0x221, 0x321, 0x821, 0x921, 0xa21 };
 326 static const u16 NCT6775_REG_AUTO_PWM[] = {
 327         0x127, 0x227, 0x327, 0x827, 0x927, 0xa27 };
 328
 329 #define NCT6775_AUTO_TEMP(data, nr, p)  ((data)->REG_AUTO_TEMP[nr] + (p))
 330 #define NCT6775_AUTO_PWM(data, nr, p)   ((data)->REG_AUTO_PWM[nr] + (p))
 331
 332 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
 333
 334 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
 335         0x135, 0x235, 0x335, 0x835, 0x935, 0xa35 };
 336 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
 337         0x138, 0x238, 0x338, 0x838, 0x938, 0xa38 };
 338
 339 static const char *const nct6775_temp_label[] = {
 340         "",
 341         "SYSTIN",
 342         "CPUTIN",
 343         "AUXTIN",
 344         "AMD SB-TSI",
 345         "PECI Agent 0",
 346         "PECI Agent 1",
 347         "PECI Agent 2",
 348         "PECI Agent 3",
 349         "PECI Agent 4",
 350         "PECI Agent 5",
 351         "PECI Agent 6",
 352         "PECI Agent 7",
 353         "PCH_CHIP_CPU_MAX_TEMP",
 354         "PCH_CHIP_TEMP",
 355         "PCH_CPU_TEMP",
 356         "PCH_MCH_TEMP",
 357         "PCH_DIM0_TEMP",
 358         "PCH_DIM1_TEMP",
 359         "PCH_DIM2_TEMP",
 360         "PCH_DIM3_TEMP"
 361 };
 362
 363 static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
 364         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
 365
 366 static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
 367         = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
 368             0xa07 };
 369
 370 /* NCT6776 specific data */
 371
 372 static const s8 NCT6776_ALARM_BITS[] = {
 373         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 374         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 375         -1,                             /* unused */
 376         6, 7, 11, 10, 23,               /* fan1..fan5 */
 377         -1, -1, -1,                     /* unused */
 378         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 379         12, 9 };                        /* intrusion0, intrusion1 */
 380
 381 static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5 };
 382
 383 static const s8 NCT6776_BEEP_BITS[] = {
 384         0, 1, 2, 3, 4, 5, 6, 7,         /* in0.. in7 */
 385         8, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 386         24,                             /* global beep enable */
 387         25, 26, 27, 28, 29,             /* fan1..fan5 */
 388         -1, -1, -1,                     /* unused */
 389         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 390         30, 31 };                       /* intrusion0, intrusion1 */
 391
 392 static const u16 NCT6776_REG_TOLERANCE_H[] = {
 393         0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c };
 394
 395 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0 };
 396 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0 };
 397
 398 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
 399 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
 400
 401 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
 402         0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e };
 403
 404 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 405         0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
 406
 407 static const char *const nct6776_temp_label[] = {
 408         "",
 409         "SYSTIN",
 410         "CPUTIN",
 411         "AUXTIN",
 412         "SMBUSMASTER 0",
 413         "SMBUSMASTER 1",
 414         "SMBUSMASTER 2",
 415         "SMBUSMASTER 3",
 416         "SMBUSMASTER 4",
 417         "SMBUSMASTER 5",
 418         "SMBUSMASTER 6",
 419         "SMBUSMASTER 7",
 420         "PECI Agent 0",
 421         "PECI Agent 1",
 422         "PCH_CHIP_CPU_MAX_TEMP",
 423         "PCH_CHIP_TEMP",
 424         "PCH_CPU_TEMP",
 425         "PCH_MCH_TEMP",
 426         "PCH_DIM0_TEMP",
 427         "PCH_DIM1_TEMP",
 428         "PCH_DIM2_TEMP",
 429         "PCH_DIM3_TEMP",
 430         "BYTE_TEMP"
 431 };
 432
 433 static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
 434         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
 435
 436 static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
 437         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
 438
 439 /* NCT6779 specific data */
 440
 441 static const u16 NCT6779_REG_IN[] = {
 442         0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
 443         0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
 444
 445 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
 446         0x459, 0x45A, 0x45B, 0x568 };
 447
 448 static const s8 NCT6779_ALARM_BITS[] = {
 449         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 450         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 451         -1,                             /* unused */
 452         6, 7, 11, 10, 23,               /* fan1..fan5 */
 453         -1, -1, -1,                     /* unused */
 454         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 455         12, 9 };                        /* intrusion0, intrusion1 */
 456
 457 static const s8 NCT6779_BEEP_BITS[] = {
 458         0, 1, 2, 3, 4, 5, 6, 7,         /* in0.. in7 */
 459         8, 9, 10, 11, 12, 13, 14,       /* in8..in14 */
 460         24,                             /* global beep enable */
 461         25, 26, 27, 28, 29,             /* fan1..fan5 */
 462         -1, -1, -1,                     /* unused */
 463         16, 17, -1, -1, -1, -1,         /* temp1..temp6 */
 464         30, 31 };                       /* intrusion0, intrusion1 */
 465
 466 static const u16 NCT6779_REG_FAN[] = {
 467         0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8, 0x4ba };
 468 static const u16 NCT6779_REG_FAN_PULSES[] = {
 469         0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
 470
 471 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
 472         0x136, 0x236, 0x336, 0x836, 0x936, 0xa36 };
 473 #define NCT6779_CRITICAL_PWM_ENABLE_MASK        0x01
 474 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
 475         0x137, 0x237, 0x337, 0x837, 0x937, 0xa37 };
 476
 477 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
 478 static const u16 NCT6779_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b };
 479 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 480         0x18, 0x152 };
 481 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 482         0x3a, 0x153 };
 483 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 484         0x39, 0x155 };
 485
 486 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
 487         0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
 488
 489 static const char *const nct6779_temp_label[] = {
 490         "",
 491         "SYSTIN",
 492         "CPUTIN",
 493         "AUXTIN0",
 494         "AUXTIN1",
 495         "AUXTIN2",
 496         "AUXTIN3",
 497         "",
 498         "SMBUSMASTER 0",
 499         "SMBUSMASTER 1",
 500         "SMBUSMASTER 2",
 501         "SMBUSMASTER 3",
 502         "SMBUSMASTER 4",
 503         "SMBUSMASTER 5",
 504         "SMBUSMASTER 6",
 505         "SMBUSMASTER 7",
 506         "PECI Agent 0",
 507         "PECI Agent 1",
 508         "PCH_CHIP_CPU_MAX_TEMP",
 509         "PCH_CHIP_TEMP",
 510         "PCH_CPU_TEMP",
 511         "PCH_MCH_TEMP",
 512         "PCH_DIM0_TEMP",
 513         "PCH_DIM1_TEMP",
 514         "PCH_DIM2_TEMP",
 515         "PCH_DIM3_TEMP",
 516         "BYTE_TEMP",
 517         "",
 518         "",
 519         "",
 520         "",
 521         "Virtual_TEMP"
 522 };
 523
 524 #define NCT6779_NUM_LABELS      (ARRAY_SIZE(nct6779_temp_label) - 5)
 525 #define NCT6791_NUM_LABELS      ARRAY_SIZE(nct6779_temp_label)
 526
 527 static const u16 NCT6779_REG_TEMP_ALTERNATE[NCT6791_NUM_LABELS - 1]
 528         = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
 529             0, 0, 0, 0, 0, 0, 0, 0,
 530             0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
 531             0x408, 0 };
 532
 533 static const u16 NCT6779_REG_TEMP_CRIT[NCT6791_NUM_LABELS - 1]
 534         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
 535
 536 /* NCT6791 specific data */
 537
 538 #define NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE     0x28
 539
 540 static const u16 NCT6791_REG_WEIGHT_TEMP_SEL[6] = { 0, 0x239 };
 541 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP[6] = { 0, 0x23a };
 542 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP_TOL[6] = { 0, 0x23b };
 543 static const u16 NCT6791_REG_WEIGHT_DUTY_STEP[6] = { 0, 0x23c };
 544 static const u16 NCT6791_REG_WEIGHT_TEMP_BASE[6] = { 0, 0x23d };
 545 static const u16 NCT6791_REG_WEIGHT_DUTY_BASE[6] = { 0, 0x23e };
 546
 547 static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = {
 548         0x459, 0x45A, 0x45B, 0x568, 0x45D };
 549
 550 static const s8 NCT6791_ALARM_BITS[] = {
 551         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 552         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 553         -1,                             /* unused */
 554         6, 7, 11, 10, 23, 33,           /* fan1..fan6 */
 555         -1, -1,                         /* unused */
 556         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 557         12, 9 };                        /* intrusion0, intrusion1 */
 558
 559 /* NCT6792/NCT6793 specific data */
 560
 561 static const u16 NCT6792_REG_TEMP_MON[] = {
 562         0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d };
 563 static const u16 NCT6792_REG_BEEP[NUM_REG_BEEP] = {
 564         0xb2, 0xb3, 0xb4, 0xb5, 0xbf };
 565
 566 /* NCT6102D/NCT6106D specific data */
 567
 568 #define NCT6106_REG_VBAT        0x318
 569 #define NCT6106_REG_DIODE       0x319
 570 #define NCT6106_DIODE_MASK      0x01
 571
 572 static const u16 NCT6106_REG_IN_MAX[] = {
 573         0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
 574 static const u16 NCT6106_REG_IN_MIN[] = {
 575         0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
 576 static const u16 NCT6106_REG_IN[] = {
 577         0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
 578
 579 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
 580 static const u16 NCT6106_REG_TEMP_MON[] = { 0x18, 0x19, 0x1a };
 581 static const u16 NCT6106_REG_TEMP_HYST[] = {
 582         0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
 583 static const u16 NCT6106_REG_TEMP_OVER[] = {
 584         0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
 585 static const u16 NCT6106_REG_TEMP_CRIT_L[] = {
 586         0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
 587 static const u16 NCT6106_REG_TEMP_CRIT_H[] = {
 588         0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
 589 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
 590 static const u16 NCT6106_REG_TEMP_CONFIG[] = {
 591         0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
 592
 593 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
 594 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
 595 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0, 0 };
 596 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4, 0, 0 };
 597
 598 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
 599 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
 600 static const u16 NCT6106_REG_PWM[] = { 0x119, 0x129, 0x139 };
 601 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c };
 602 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
 603 static const u16 NCT6106_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130 };
 604 static const u16 NCT6106_REG_TEMP_SOURCE[] = {
 605         0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
 606
 607 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
 608 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = {
 609         0x11b, 0x12b, 0x13b };
 610
 611 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
 612 #define NCT6106_CRITICAL_PWM_ENABLE_MASK        0x10
 613 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
 614
 615 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
 616 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
 617 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
 618 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
 619 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
 620 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
 621
 622 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
 623
 624 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
 625 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
 626 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
 627 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x17c };
 628 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
 629 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
 630
 631 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
 632 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
 633
 634 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = {
 635         0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
 636
 637 static const s8 NCT6106_ALARM_BITS[] = {
 638         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 639         9, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 640         -1,                             /* unused */
 641         32, 33, 34, -1, -1,             /* fan1..fan5 */
 642         -1, -1, -1,                     /* unused */
 643         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 644         48, -1                          /* intrusion0, intrusion1 */
 645 };
 646
 647 static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = {
 648         0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 };
 649
 650 static const s8 NCT6106_BEEP_BITS[] = {
 651         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 652         9, 10, 11, 12, -1, -1, -1,      /* in8..in14 */
 653         32,                             /* global beep enable */
 654         24, 25, 26, 27, 28,             /* fan1..fan5 */
 655         -1, -1, -1,                     /* unused */
 656         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 657         34, -1                          /* intrusion0, intrusion1 */
 658 };
 659
 660 static const u16 NCT6106_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
 661         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x51, 0x52, 0x54 };
 662
 663 static const u16 NCT6106_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
 664         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x204, 0x205 };
 665
 666 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
 667 {
 668         if (mode == 0 && pwm == 255)
 669                 return off;
 670         return mode + 1;
 671 }
 672
 673 static int pwm_enable_to_reg(enum pwm_enable mode)
 674 {
 675         if (mode == off)
 676                 return 0;
 677         return mode - 1;
 678 }
 679
 680 /*
 681  * Conversions
 682  */
 683
 684 /* 1 is DC mode, output in ms */
 685 static unsigned int step_time_from_reg(u8 reg, u8 mode)
 686 {
 687         return mode ? 400 * reg : 100 * reg;
 688 }
 689
 690 static u8 step_time_to_reg(unsigned int msec, u8 mode)
 691 {
 692         return clamp_val((mode ? (msec + 200) / 400 :
 693                                         (msec + 50) / 100), 1, 255);
 694 }
 695
 696 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
 697 {
 698         if (reg == 0 || reg == 255)
 699                 return 0;
 700         return 1350000U / (reg << divreg);
 701 }
 702
 703 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
 704 {
 705         if ((reg & 0xff1f) == 0xff1f)
 706                 return 0;
 707
 708         reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
 709
 710         if (reg == 0)
 711                 return 0;
 712
 713         return 1350000U / reg;
 714 }
 715
 716 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
 717 {
 718         if (reg == 0 || reg == 0xffff)
 719                 return 0;
 720
 721         /*
 722          * Even though the registers are 16 bit wide, the fan divisor
 723          * still applies.
 724          */
 725         return 1350000U / (reg << divreg);
 726 }
 727
 728 static u16 fan_to_reg(u32 fan, unsigned int divreg)
 729 {
 730         if (!fan)
 731                 return 0;
 732
 733         return (1350000U / fan) >> divreg;
 734 }
 735
 736 static inline unsigned int
 737 div_from_reg(u8 reg)
 738 {
 739         return 1 << reg;
 740 }
 741
 742 /*
 743  * Some of the voltage inputs have internal scaling, the tables below
 744  * contain 8 (the ADC LSB in mV) * scaling factor * 100
 745  */
 746 static const u16 scale_in[15] = {
 747         800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
 748         800, 800
 749 };
 750
 751 static inline long in_from_reg(u8 reg, u8 nr)
 752 {
 753         return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
 754 }
 755
 756 static inline u8 in_to_reg(u32 val, u8 nr)
 757 {
 758         return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
 759 }
 760
 761 /*
 762  * Data structures and manipulation thereof
 763  */
 764
 765 struct nct6775_data {
 766         int addr;       /* IO base of hw monitor block */
 767         int sioreg;     /* SIO register address */
 768         enum kinds kind;
 769         const char *name;
 770
 771 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
 772         struct device *hwmon_dev;
 773 #endif
 774
 775         const struct attribute_group *groups[6];
 776
 777         u16 reg_temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 778                                     * 3=temp_crit, 4=temp_lcrit
 779                                     */
 780         u8 temp_src[NUM_TEMP];
 781         u16 reg_temp_config[NUM_TEMP];
 782         const char * const *temp_label;
 783         int temp_label_num;
 784
 785         u16 REG_CONFIG;
 786         u16 REG_VBAT;
 787         u16 REG_DIODE;
 788         u8 DIODE_MASK;
 789
 790         const s8 *ALARM_BITS;
 791         const s8 *BEEP_BITS;
 792
 793         const u16 *REG_VIN;
 794         const u16 *REG_IN_MINMAX[2];
 795
 796         const u16 *REG_TARGET;
 797         const u16 *REG_FAN;
 798         const u16 *REG_FAN_MODE;
 799         const u16 *REG_FAN_MIN;
 800         const u16 *REG_FAN_PULSES;
 801         const u16 *FAN_PULSE_SHIFT;
 802         const u16 *REG_FAN_TIME[3];
 803
 804         const u16 *REG_TOLERANCE_H;
 805
 806         const u8 *REG_PWM_MODE;
 807         const u8 *PWM_MODE_MASK;
 808
 809         const u16 *REG_PWM[7];  /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 810                                  * [3]=pwm_max, [4]=pwm_step,
 811                                  * [5]=weight_duty_step, [6]=weight_duty_base
 812                                  */
 813         const u16 *REG_PWM_READ;
 814
 815         const u16 *REG_CRITICAL_PWM_ENABLE;
 816         u8 CRITICAL_PWM_ENABLE_MASK;
 817         const u16 *REG_CRITICAL_PWM;
 818
 819         const u16 *REG_AUTO_TEMP;
 820         const u16 *REG_AUTO_PWM;
 821
 822         const u16 *REG_CRITICAL_TEMP;
 823         const u16 *REG_CRITICAL_TEMP_TOLERANCE;
 824
 825         const u16 *REG_TEMP_SOURCE;     /* temp register sources */
 826         const u16 *REG_TEMP_SEL;
 827         const u16 *REG_WEIGHT_TEMP_SEL;
 828         const u16 *REG_WEIGHT_TEMP[3];  /* 0=base, 1=tolerance, 2=step */
 829
 830         const u16 *REG_TEMP_OFFSET;
 831
 832         const u16 *REG_ALARM;
 833         const u16 *REG_BEEP;
 834
 835         unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
 836         unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
 837
 838         struct mutex update_lock;
 839         bool valid;             /* true if following fields are valid */
 840         unsigned long last_updated;     /* In jiffies */
 841
 842         /* Register values */
 843         u8 bank;                /* current register bank */
 844         u8 in_num;              /* number of in inputs we have */
 845         u8 in[15][3];           /* [0]=in, [1]=in_max, [2]=in_min */
 846         unsigned int rpm[NUM_FAN];
 847         u16 fan_min[NUM_FAN];
 848         u8 fan_pulses[NUM_FAN];
 849         u8 fan_div[NUM_FAN];
 850         u8 has_pwm;
 851         u8 has_fan;             /* some fan inputs can be disabled */
 852         u8 has_fan_min;         /* some fans don't have min register */
 853         bool has_fan_div;
 854
 855         u8 num_temp_alarms;     /* 2, 3, or 6 */
 856         u8 num_temp_beeps;      /* 2, 3, or 6 */
 857         u8 temp_fixed_num;      /* 3 or 6 */
 858         u8 temp_type[NUM_TEMP_FIXED];
 859         s8 temp_offset[NUM_TEMP_FIXED];
 860         s16 temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 861                                 * 3=temp_crit, 4=temp_lcrit */
 862         u64 alarms;
 863         u64 beeps;
 864
 865         u8 pwm_num;     /* number of pwm */
 866         u8 pwm_mode[NUM_FAN];   /* 1->DC variable voltage,
 867                                  * 0->PWM variable duty cycle
 868                                  */
 869         enum pwm_enable pwm_enable[NUM_FAN];
 870                         /* 0->off
 871                          * 1->manual
 872                          * 2->thermal cruise mode (also called SmartFan I)
 873                          * 3->fan speed cruise mode
 874                          * 4->SmartFan III
 875                          * 5->enhanced variable thermal cruise (SmartFan IV)
 876                          */
 877         u8 pwm[7][NUM_FAN];     /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 878                                  * [3]=pwm_max, [4]=pwm_step,
 879                                  * [5]=weight_duty_step, [6]=weight_duty_base
 880                                  */
 881
 882         u8 target_temp[NUM_FAN];
 883         u8 target_temp_mask;
 884         u32 target_speed[NUM_FAN];
 885         u32 target_speed_tolerance[NUM_FAN];
 886         u8 speed_tolerance_limit;
 887
 888         u8 temp_tolerance[2][NUM_FAN];
 889         u8 tolerance_mask;
 890
 891         u8 fan_time[3][NUM_FAN]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
 892
 893         /* Automatic fan speed control registers */
 894         int auto_pwm_num;
 895         u8 auto_pwm[NUM_FAN][7];
 896         u8 auto_temp[NUM_FAN][7];
 897         u8 pwm_temp_sel[NUM_FAN];
 898         u8 pwm_weight_temp_sel[NUM_FAN];
 899         u8 weight_temp[3][NUM_FAN];     /* 0->temp_step, 1->temp_step_tol,
 900                                          * 2->temp_base
 901                                          */
 902
 903         u8 vid;
 904         u8 vrm;
 905
 906         bool have_vid;
 907
 908         u16 have_temp;
 909         u16 have_temp_fixed;
 910         u16 have_in;
 911
 912         /* Remember extra register values over suspend/resume */
 913         u8 vbat;
 914         u8 fandiv1;
 915         u8 fandiv2;
 916         u8 sio_reg_enable;
 917 };
 918
 919 struct nct6775_sio_data {
 920         int sioreg;
 921         enum kinds kind;
 922 };
 923
 924 struct sensor_device_template {
 925         struct device_attribute dev_attr;
 926         union {
 927                 struct {
 928                         u8 nr;
 929                         u8 index;
 930                 } s;
 931                 int index;
 932         } u;
 933         bool s2;        /* true if both index and nr are used */
 934 };
 935
 936 struct sensor_device_attr_u {
 937         union {
 938                 struct sensor_device_attribute a1;
 939                 struct sensor_device_attribute_2 a2;
 940         } u;
 941         char name[32];
 942 };
 943
 944 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) {      \
 945         .attr = {.name = _template, .mode = _mode },            \
 946         .show   = _show,                                        \
 947         .store  = _store,                                       \
 948 }
 949
 950 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \
 951         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
 952           .u.index = _index,                                            \
 953           .s2 = false }
 954
 955 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,       \
 956                                  _nr, _index)                           \
 957         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
 958           .u.s.index = _index,                                          \
 959           .u.s.nr = _nr,                                                \
 960           .s2 = true }
 961
 962 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
 963 static struct sensor_device_template sensor_dev_template_##_name        \
 964         = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store,       \
 965                                  _index)
 966
 967 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store,       \
 968                           _nr, _index)                                  \
 969 static struct sensor_device_template sensor_dev_template_##_name        \
 970         = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,     \
 971                                  _nr, _index)
 972
 973 struct sensor_template_group {
 974         struct sensor_device_template **templates;
 975         umode_t (*is_visible)(struct kobject *, struct attribute *, int);
 976         int base;
 977 };
 978
 979 static struct attribute_group *
 980 nct6775_create_attr_group(struct device *dev, struct sensor_template_group *tg,
 981                           int repeat)
 982 {
 983         struct attribute_group *group;
 984         struct sensor_device_attr_u *su;
 985         struct sensor_device_attribute *a;
 986         struct sensor_device_attribute_2 *a2;
 987         struct attribute **attrs;
 988         struct sensor_device_template **t;
 989         int i, count;
 990
 991         if (repeat <= 0)
 992                 return ERR_PTR(-EINVAL);
 993
 994         t = tg->templates;
 995         for (count = 0; *t; t++, count++)
 996                 ;
 997
 998         if (count == 0)
 999                 return ERR_PTR(-EINVAL);
1000
1001         group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
1002         if (group == NULL)
1003                 return ERR_PTR(-ENOMEM);
1004
1005         attrs = devm_kzalloc(dev, sizeof(*attrs) * (repeat * count + 1),
1006                              GFP_KERNEL);
1007         if (attrs == NULL)
1008                 return ERR_PTR(-ENOMEM);
1009
1010         su = devm_kzalloc(dev, sizeof(*su) * repeat * count,
1011                                GFP_KERNEL);
1012         if (su == NULL)
1013                 return ERR_PTR(-ENOMEM);
1014
1015         group->attrs = attrs;
1016         group->is_visible = tg->is_visible;
1017
1018         for (i = 0; i < repeat; i++) {
1019                 t = tg->templates;
1020                 while (*t != NULL) {
1021                         snprintf(su->name, sizeof(su->name),
1022                                  (*t)->dev_attr.attr.name, tg->base + i);
1023                         if ((*t)->s2) {
1024                                 a2 = &su->u.a2;
1025                                 a2->dev_attr.attr.name = su->name;
1026                                 a2->nr = (*t)->u.s.nr + i;
1027                                 a2->index = (*t)->u.s.index;
1028                                 a2->dev_attr.attr.mode =
1029                                   (*t)->dev_attr.attr.mode;
1030                                 a2->dev_attr.show = (*t)->dev_attr.show;
1031                                 a2->dev_attr.store = (*t)->dev_attr.store;
1032                                 *attrs = &a2->dev_attr.attr;
1033                         } else {
1034                                 a = &su->u.a1;
1035                                 a->dev_attr.attr.name = su->name;
1036                                 a->index = (*t)->u.index + i;
1037                                 a->dev_attr.attr.mode =
1038                                   (*t)->dev_attr.attr.mode;
1039                                 a->dev_attr.show = (*t)->dev_attr.show;
1040                                 a->dev_attr.store = (*t)->dev_attr.store;
1041                                 *attrs = &a->dev_attr.attr;
1042                         }
1043                         attrs++;
1044                         su++;
1045                         t++;
1046                 }
1047         }
1048
1049         return group;
1050 }
1051
1052 static bool is_word_sized(struct nct6775_data *data, u16 reg)
1053 {
1054         switch (data->kind) {
1055         case nct6106:
1056                 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1057                   reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
1058                   reg == 0x111 || reg == 0x121 || reg == 0x131;
1059         case nct6775:
1060                 return (((reg & 0xff00) == 0x100 ||
1061                     (reg & 0xff00) == 0x200) &&
1062                    ((reg & 0x00ff) == 0x50 ||
1063                     (reg & 0x00ff) == 0x53 ||
1064                     (reg & 0x00ff) == 0x55)) ||
1065                   (reg & 0xfff0) == 0x630 ||
1066                   reg == 0x640 || reg == 0x642 ||
1067                   reg == 0x662 ||
1068                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1069                   reg == 0x73 || reg == 0x75 || reg == 0x77;
1070         case nct6776:
1071                 return (((reg & 0xff00) == 0x100 ||
1072                     (reg & 0xff00) == 0x200) &&
1073                    ((reg & 0x00ff) == 0x50 ||
1074                     (reg & 0x00ff) == 0x53 ||
1075                     (reg & 0x00ff) == 0x55)) ||
1076                   (reg & 0xfff0) == 0x630 ||
1077                   reg == 0x402 ||
1078                   reg == 0x640 || reg == 0x642 ||
1079                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1080                   reg == 0x73 || reg == 0x75 || reg == 0x77;
1081         case nct6779:
1082         case nct6791:
1083         case nct6792:
1084         case nct6793:
1085                 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
1086                   ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x0b) ||
1087                   reg == 0x402 ||
1088                   reg == 0x63a || reg == 0x63c || reg == 0x63e ||
1089                   reg == 0x640 || reg == 0x642 ||
1090                   reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
1091                   reg == 0x7b || reg == 0x7d;
1092         }
1093         return false;
1094 }
1095
1096 /*
1097  * On older chips, only registers 0x50-0x5f are banked.
1098  * On more recent chips, all registers are banked.
1099  * Assume that is the case and set the bank number for each access.
1100  * Cache the bank number so it only needs to be set if it changes.
1101  */
1102 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
1103 {
1104         u8 bank = reg >> 8;
1105
1106         if (data->bank != bank) {
1107                 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
1108                 outb_p(bank, data->addr + DATA_REG_OFFSET);
1109                 data->bank = bank;
1110         }
1111 }
1112
1113 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
1114 {
1115         int res, word_sized = is_word_sized(data, reg);
1116
1117         nct6775_set_bank(data, reg);
1118         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1119         res = inb_p(data->addr + DATA_REG_OFFSET);
1120         if (word_sized) {
1121                 outb_p((reg & 0xff) + 1,
1122                        data->addr + ADDR_REG_OFFSET);
1123                 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
1124         }
1125         return res;
1126 }
1127
1128 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
1129 {
1130         int word_sized = is_word_sized(data, reg);
1131
1132         nct6775_set_bank(data, reg);
1133         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1134         if (word_sized) {
1135                 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
1136                 outb_p((reg & 0xff) + 1,
1137                        data->addr + ADDR_REG_OFFSET);
1138         }
1139         outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
1140         return 0;
1141 }
1142
1143 /* We left-align 8-bit temperature values to make the code simpler */
1144 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
1145 {
1146         u16 res;
1147
1148         res = nct6775_read_value(data, reg);
1149         if (!is_word_sized(data, reg))
1150                 res <<= 8;
1151
1152         return res;
1153 }
1154
1155 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
1156 {
1157         if (!is_word_sized(data, reg))
1158                 value >>= 8;
1159         return nct6775_write_value(data, reg, value);
1160 }
1161
1162 /* This function assumes that the caller holds data->update_lock */
1163 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
1164 {
1165         u8 reg;
1166
1167         switch (nr) {
1168         case 0:
1169                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
1170                     | (data->fan_div[0] & 0x7);
1171                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1172                 break;
1173         case 1:
1174                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
1175                     | ((data->fan_div[1] << 4) & 0x70);
1176                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1177                 break;
1178         case 2:
1179                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
1180                     | (data->fan_div[2] & 0x7);
1181                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1182                 break;
1183         case 3:
1184                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
1185                     | ((data->fan_div[3] << 4) & 0x70);
1186                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1187                 break;
1188         }
1189 }
1190
1191 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
1192 {
1193         if (data->kind == nct6775)
1194                 nct6775_write_fan_div(data, nr);
1195 }
1196
1197 static void nct6775_update_fan_div(struct nct6775_data *data)
1198 {
1199         u8 i;
1200
1201         i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
1202         data->fan_div[0] = i & 0x7;
1203         data->fan_div[1] = (i & 0x70) >> 4;
1204         i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
1205         data->fan_div[2] = i & 0x7;
1206         if (data->has_fan & (1 << 3))
1207                 data->fan_div[3] = (i & 0x70) >> 4;
1208 }
1209
1210 static void nct6775_update_fan_div_common(struct nct6775_data *data)
1211 {
1212         if (data->kind == nct6775)
1213                 nct6775_update_fan_div(data);
1214 }
1215
1216 static void nct6775_init_fan_div(struct nct6775_data *data)
1217 {
1218         int i;
1219
1220         nct6775_update_fan_div_common(data);
1221         /*
1222          * For all fans, start with highest divider value if the divider
1223          * register is not initialized. This ensures that we get a
1224          * reading from the fan count register, even if it is not optimal.
1225          * We'll compute a better divider later on.
1226          */
1227         for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
1228                 if (!(data->has_fan & (1 << i)))
1229                         continue;
1230                 if (data->fan_div[i] == 0) {
1231                         data->fan_div[i] = 7;
1232                         nct6775_write_fan_div_common(data, i);
1233                 }
1234         }
1235 }
1236
1237 static void nct6775_init_fan_common(struct device *dev,
1238                                     struct nct6775_data *data)
1239 {
1240         int i;
1241         u8 reg;
1242
1243         if (data->has_fan_div)
1244                 nct6775_init_fan_div(data);
1245
1246         /*
1247          * If fan_min is not set (0), set it to 0xff to disable it. This
1248          * prevents the unnecessary warning when fanX_min is reported as 0.
1249          */
1250         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1251                 if (data->has_fan_min & (1 << i)) {
1252                         reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
1253                         if (!reg)
1254                                 nct6775_write_value(data, data->REG_FAN_MIN[i],
1255                                                     data->has_fan_div ? 0xff
1256                                                                       : 0xff1f);
1257                 }
1258         }
1259 }
1260
1261 static void nct6775_select_fan_div(struct device *dev,
1262                                    struct nct6775_data *data, int nr, u16 reg)
1263 {
1264         u8 fan_div = data->fan_div[nr];
1265         u16 fan_min;
1266
1267         if (!data->has_fan_div)
1268                 return;
1269
1270         /*
1271          * If we failed to measure the fan speed, or the reported value is not
1272          * in the optimal range, and the clock divider can be modified,
1273          * let's try that for next time.
1274          */
1275         if (reg == 0x00 && fan_div < 0x07)
1276                 fan_div++;
1277         else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1278                 fan_div--;
1279
1280         if (fan_div != data->fan_div[nr]) {
1281                 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1282                         nr + 1, div_from_reg(data->fan_div[nr]),
1283                         div_from_reg(fan_div));
1284
1285                 /* Preserve min limit if possible */
1286                 if (data->has_fan_min & (1 << nr)) {
1287                         fan_min = data->fan_min[nr];
1288                         if (fan_div > data->fan_div[nr]) {
1289                                 if (fan_min != 255 && fan_min > 1)
1290                                         fan_min >>= 1;
1291                         } else {
1292                                 if (fan_min != 255) {
1293                                         fan_min <<= 1;
1294                                         if (fan_min > 254)
1295                                                 fan_min = 254;
1296                                 }
1297                         }
1298                         if (fan_min != data->fan_min[nr]) {
1299                                 data->fan_min[nr] = fan_min;
1300                                 nct6775_write_value(data, data->REG_FAN_MIN[nr],
1301                                                     fan_min);
1302                         }
1303                 }
1304                 data->fan_div[nr] = fan_div;
1305                 nct6775_write_fan_div_common(data, nr);
1306         }
1307 }
1308
1309 static void nct6775_update_pwm(struct device *dev)
1310 {
1311         struct nct6775_data *data = dev_get_drvdata(dev);
1312         int i, j;
1313         int fanmodecfg, reg;
1314         bool duty_is_dc;
1315
1316         for (i = 0; i < data->pwm_num; i++) {
1317                 if (!(data->has_pwm & (1 << i)))
1318                         continue;
1319
1320                 duty_is_dc = data->REG_PWM_MODE[i] &&
1321                   (nct6775_read_value(data, data->REG_PWM_MODE[i])
1322                    & data->PWM_MODE_MASK[i]);
1323                 data->pwm_mode[i] = duty_is_dc;
1324
1325                 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
1326                 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1327                         if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1328                                 data->pwm[j][i]
1329                                   = nct6775_read_value(data,
1330                                                        data->REG_PWM[j][i]);
1331                         }
1332                 }
1333
1334                 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1335                                                         (fanmodecfg >> 4) & 7);
1336
1337                 if (!data->temp_tolerance[0][i] ||
1338                     data->pwm_enable[i] != speed_cruise)
1339                         data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1340                 if (!data->target_speed_tolerance[i] ||
1341                     data->pwm_enable[i] == speed_cruise) {
1342                         u8 t = fanmodecfg & 0x0f;
1343
1344                         if (data->REG_TOLERANCE_H) {
1345                                 t |= (nct6775_read_value(data,
1346                                       data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
1347                         }
1348                         data->target_speed_tolerance[i] = t;
1349                 }
1350
1351                 data->temp_tolerance[1][i] =
1352                         nct6775_read_value(data,
1353                                         data->REG_CRITICAL_TEMP_TOLERANCE[i]);
1354
1355                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
1356                 data->pwm_temp_sel[i] = reg & 0x1f;
1357                 /* If fan can stop, report floor as 0 */
1358                 if (reg & 0x80)
1359                         data->pwm[2][i] = 0;
1360
1361                 if (!data->REG_WEIGHT_TEMP_SEL[i])
1362                         continue;
1363
1364                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
1365                 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1366                 /* If weight is disabled, report weight source as 0 */
1367                 if (j == 1 && !(reg & 0x80))
1368                         data->pwm_weight_temp_sel[i] = 0;
1369
1370                 /* Weight temp data */
1371                 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
1372                         data->weight_temp[j][i]
1373                           = nct6775_read_value(data,
1374                                                data->REG_WEIGHT_TEMP[j][i]);
1375                 }
1376         }
1377 }
1378
1379 static void nct6775_update_pwm_limits(struct device *dev)
1380 {
1381         struct nct6775_data *data = dev_get_drvdata(dev);
1382         int i, j;
1383         u8 reg;
1384         u16 reg_t;
1385
1386         for (i = 0; i < data->pwm_num; i++) {
1387                 if (!(data->has_pwm & (1 << i)))
1388                         continue;
1389
1390                 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1391                         data->fan_time[j][i] =
1392                           nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1393                 }
1394
1395                 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1396                 /* Update only in matching mode or if never updated */
1397                 if (!data->target_temp[i] ||
1398                     data->pwm_enable[i] == thermal_cruise)
1399                         data->target_temp[i] = reg_t & data->target_temp_mask;
1400                 if (!data->target_speed[i] ||
1401                     data->pwm_enable[i] == speed_cruise) {
1402                         if (data->REG_TOLERANCE_H) {
1403                                 reg_t |= (nct6775_read_value(data,
1404                                         data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1405                         }
1406                         data->target_speed[i] = reg_t;
1407                 }
1408
1409                 for (j = 0; j < data->auto_pwm_num; j++) {
1410                         data->auto_pwm[i][j] =
1411                           nct6775_read_value(data,
1412                                              NCT6775_AUTO_PWM(data, i, j));
1413                         data->auto_temp[i][j] =
1414                           nct6775_read_value(data,
1415                                              NCT6775_AUTO_TEMP(data, i, j));
1416                 }
1417
1418                 /* critical auto_pwm temperature data */
1419                 data->auto_temp[i][data->auto_pwm_num] =
1420                         nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1421
1422                 switch (data->kind) {
1423                 case nct6775:
1424                         reg = nct6775_read_value(data,
1425                                                  NCT6775_REG_CRITICAL_ENAB[i]);
1426                         data->auto_pwm[i][data->auto_pwm_num] =
1427                                                 (reg & 0x02) ? 0xff : 0x00;
1428                         break;
1429                 case nct6776:
1430                         data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1431                         break;
1432                 case nct6106:
1433                 case nct6779:
1434                 case nct6791:
1435                 case nct6792:
1436                 case nct6793:
1437                         reg = nct6775_read_value(data,
1438                                         data->REG_CRITICAL_PWM_ENABLE[i]);
1439                         if (reg & data->CRITICAL_PWM_ENABLE_MASK)
1440                                 reg = nct6775_read_value(data,
1441                                         data->REG_CRITICAL_PWM[i]);
1442                         else
1443                                 reg = 0xff;
1444                         data->auto_pwm[i][data->auto_pwm_num] = reg;
1445                         break;
1446                 }
1447         }
1448 }
1449
1450 static struct nct6775_data *nct6775_update_device(struct device *dev)
1451 {
1452         struct nct6775_data *data = dev_get_drvdata(dev);
1453         int i, j;
1454
1455         mutex_lock(&data->update_lock);
1456
1457         if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1458             || !data->valid) {
1459                 /* Fan clock dividers */
1460                 nct6775_update_fan_div_common(data);
1461
1462                 /* Measured voltages and limits */
1463                 for (i = 0; i < data->in_num; i++) {
1464                         if (!(data->have_in & (1 << i)))
1465                                 continue;
1466
1467                         data->in[i][0] = nct6775_read_value(data,
1468                                                             data->REG_VIN[i]);
1469                         data->in[i][1] = nct6775_read_value(data,
1470                                           data->REG_IN_MINMAX[0][i]);
1471                         data->in[i][2] = nct6775_read_value(data,
1472                                           data->REG_IN_MINMAX[1][i]);
1473                 }
1474
1475                 /* Measured fan speeds and limits */
1476                 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
1477                         u16 reg;
1478
1479                         if (!(data->has_fan & (1 << i)))
1480                                 continue;
1481
1482                         reg = nct6775_read_value(data, data->REG_FAN[i]);
1483                         data->rpm[i] = data->fan_from_reg(reg,
1484                                                           data->fan_div[i]);
1485
1486                         if (data->has_fan_min & (1 << i))
1487                                 data->fan_min[i] = nct6775_read_value(data,
1488                                            data->REG_FAN_MIN[i]);
1489                         data->fan_pulses[i] =
1490                           (nct6775_read_value(data, data->REG_FAN_PULSES[i])
1491                                 >> data->FAN_PULSE_SHIFT[i]) & 0x03;
1492
1493                         nct6775_select_fan_div(dev, data, i, reg);
1494                 }
1495
1496                 nct6775_update_pwm(dev);
1497                 nct6775_update_pwm_limits(dev);
1498
1499                 /* Measured temperatures and limits */
1500                 for (i = 0; i < NUM_TEMP; i++) {
1501                         if (!(data->have_temp & (1 << i)))
1502                                 continue;
1503                         for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1504                                 if (data->reg_temp[j][i])
1505                                         data->temp[j][i]
1506                                           = nct6775_read_temp(data,
1507                                                 data->reg_temp[j][i]);
1508                         }
1509                         if (i >= NUM_TEMP_FIXED ||
1510                             !(data->have_temp_fixed & (1 << i)))
1511                                 continue;
1512                         data->temp_offset[i]
1513                           = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1514                 }
1515
1516                 data->alarms = 0;
1517                 for (i = 0; i < NUM_REG_ALARM; i++) {
1518                         u8 alarm;
1519
1520                         if (!data->REG_ALARM[i])
1521                                 continue;
1522                         alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1523                         data->alarms |= ((u64)alarm) << (i << 3);
1524                 }
1525
1526                 data->beeps = 0;
1527                 for (i = 0; i < NUM_REG_BEEP; i++) {
1528                         u8 beep;
1529
1530                         if (!data->REG_BEEP[i])
1531                                 continue;
1532                         beep = nct6775_read_value(data, data->REG_BEEP[i]);
1533                         data->beeps |= ((u64)beep) << (i << 3);
1534                 }
1535
1536                 data->last_updated = jiffies;
1537                 data->valid = true;
1538         }
1539
1540         mutex_unlock(&data->update_lock);
1541         return data;
1542 }
1543
1544 /*
1545  * Sysfs callback functions
1546  */
1547 static ssize_t
1548 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1549 {
1550         struct nct6775_data *data = nct6775_update_device(dev);
1551         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1552         int index = sattr->index;
1553         int nr = sattr->nr;
1554
1555         return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1556 }
1557
1558 static ssize_t
1559 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1560              size_t count)
1561 {
1562         struct nct6775_data *data = dev_get_drvdata(dev);
1563         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1564         int index = sattr->index;
1565         int nr = sattr->nr;
1566         unsigned long val;
1567         int err;
1568
1569         err = kstrtoul(buf, 10, &val);
1570         if (err < 0)
1571                 return err;
1572         mutex_lock(&data->update_lock);
1573         data->in[nr][index] = in_to_reg(val, nr);
1574         nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr],
1575                             data->in[nr][index]);
1576         mutex_unlock(&data->update_lock);
1577         return count;
1578 }
1579
1580 static ssize_t
1581 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1582 {
1583         struct nct6775_data *data = nct6775_update_device(dev);
1584         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1585         int nr = data->ALARM_BITS[sattr->index];
1586
1587         return sprintf(buf, "%u\n",
1588                        (unsigned int)((data->alarms >> nr) & 0x01));
1589 }
1590
1591 static int find_temp_source(struct nct6775_data *data, int index, int count)
1592 {
1593         int source = data->temp_src[index];
1594         int nr;
1595
1596         for (nr = 0; nr < count; nr++) {
1597                 int src;
1598
1599                 src = nct6775_read_value(data,
1600                                          data->REG_TEMP_SOURCE[nr]) & 0x1f;
1601                 if (src == source)
1602                         return nr;
1603         }
1604         return -ENODEV;
1605 }
1606
1607 static ssize_t
1608 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1609 {
1610         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1611         struct nct6775_data *data = nct6775_update_device(dev);
1612         unsigned int alarm = 0;
1613         int nr;
1614
1615         /*
1616          * For temperatures, there is no fixed mapping from registers to alarm
1617          * bits. Alarm bits are determined by the temperature source mapping.
1618          */
1619         nr = find_temp_source(data, sattr->index, data->num_temp_alarms);
1620         if (nr >= 0) {
1621                 int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE];
1622
1623                 alarm = (data->alarms >> bit) & 0x01;
1624         }
1625         return sprintf(buf, "%u\n", alarm);
1626 }
1627
1628 static ssize_t
1629 show_beep(struct device *dev, struct device_attribute *attr, char *buf)
1630 {
1631         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1632         struct nct6775_data *data = nct6775_update_device(dev);
1633         int nr = data->BEEP_BITS[sattr->index];
1634
1635         return sprintf(buf, "%u\n",
1636                        (unsigned int)((data->beeps >> nr) & 0x01));
1637 }
1638
1639 static ssize_t
1640 store_beep(struct device *dev, struct device_attribute *attr, const char *buf,
1641            size_t count)
1642 {
1643         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1644         struct nct6775_data *data = dev_get_drvdata(dev);
1645         int nr = data->BEEP_BITS[sattr->index];
1646         int regindex = nr >> 3;
1647         unsigned long val;
1648         int err;
1649
1650         err = kstrtoul(buf, 10, &val);
1651         if (err < 0)
1652                 return err;
1653         if (val > 1)
1654                 return -EINVAL;
1655
1656         mutex_lock(&data->update_lock);
1657         if (val)
1658                 data->beeps |= (1ULL << nr);
1659         else
1660                 data->beeps &= ~(1ULL << nr);
1661         nct6775_write_value(data, data->REG_BEEP[regindex],
1662                             (data->beeps >> (regindex << 3)) & 0xff);
1663         mutex_unlock(&data->update_lock);
1664         return count;
1665 }
1666
1667 static ssize_t
1668 show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf)
1669 {
1670         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1671         struct nct6775_data *data = nct6775_update_device(dev);
1672         unsigned int beep = 0;
1673         int nr;
1674
1675         /*
1676          * For temperatures, there is no fixed mapping from registers to beep
1677          * enable bits. Beep enable bits are determined by the temperature
1678          * source mapping.
1679          */
1680         nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1681         if (nr >= 0) {
1682                 int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1683
1684                 beep = (data->beeps >> bit) & 0x01;
1685         }
1686         return sprintf(buf, "%u\n", beep);
1687 }
1688
1689 static ssize_t
1690 store_temp_beep(struct device *dev, struct device_attribute *attr,
1691                 const char *buf, size_t count)
1692 {
1693         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1694         struct nct6775_data *data = dev_get_drvdata(dev);
1695         int nr, bit, regindex;
1696         unsigned long val;
1697         int err;
1698
1699         err = kstrtoul(buf, 10, &val);
1700         if (err < 0)
1701                 return err;
1702         if (val > 1)
1703                 return -EINVAL;
1704
1705         nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1706         if (nr < 0)
1707                 return nr;
1708
1709         bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1710         regindex = bit >> 3;
1711
1712         mutex_lock(&data->update_lock);
1713         if (val)
1714                 data->beeps |= (1ULL << bit);
1715         else
1716                 data->beeps &= ~(1ULL << bit);
1717         nct6775_write_value(data, data->REG_BEEP[regindex],
1718                             (data->beeps >> (regindex << 3)) & 0xff);
1719         mutex_unlock(&data->update_lock);
1720
1721         return count;
1722 }
1723
1724 static umode_t nct6775_in_is_visible(struct kobject *kobj,
1725                                      struct attribute *attr, int index)
1726 {
1727         struct device *dev = container_of(kobj, struct device, kobj);
1728         struct nct6775_data *data = dev_get_drvdata(dev);
1729         int in = index / 5;     /* voltage index */
1730
1731         if (!(data->have_in & (1 << in)))
1732                 return 0;
1733
1734         return attr->mode;
1735 }
1736
1737 SENSOR_TEMPLATE_2(in_input, "in%d_input", S_IRUGO, show_in_reg, NULL, 0, 0);
1738 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", S_IRUGO, show_alarm, NULL, 0);
1739 SENSOR_TEMPLATE(in_beep, "in%d_beep", S_IWUSR | S_IRUGO, show_beep, store_beep,
1740                 0);
1741 SENSOR_TEMPLATE_2(in_min, "in%d_min", S_IWUSR | S_IRUGO, show_in_reg,
1742                   store_in_reg, 0, 1);
1743 SENSOR_TEMPLATE_2(in_max, "in%d_max", S_IWUSR | S_IRUGO, show_in_reg,
1744                   store_in_reg, 0, 2);
1745
1746 /*
1747  * nct6775_in_is_visible uses the index into the following array
1748  * to determine if attributes should be created or not.
1749  * Any change in order or content must be matched.
1750  */
1751 static struct sensor_device_template *nct6775_attributes_in_template[] = {
1752         &sensor_dev_template_in_input,
1753         &sensor_dev_template_in_alarm,
1754         &sensor_dev_template_in_beep,
1755         &sensor_dev_template_in_min,
1756         &sensor_dev_template_in_max,
1757         NULL
1758 };
1759
1760 static struct sensor_template_group nct6775_in_template_group = {
1761         .templates = nct6775_attributes_in_template,
1762         .is_visible = nct6775_in_is_visible,
1763 };
1764
1765 static ssize_t
1766 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1767 {
1768         struct nct6775_data *data = nct6775_update_device(dev);
1769         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1770         int nr = sattr->index;
1771
1772         return sprintf(buf, "%d\n", data->rpm[nr]);
1773 }
1774
1775 static ssize_t
1776 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1777 {
1778         struct nct6775_data *data = nct6775_update_device(dev);
1779         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1780         int nr = sattr->index;
1781
1782         return sprintf(buf, "%d\n",
1783                        data->fan_from_reg_min(data->fan_min[nr],
1784                                               data->fan_div[nr]));
1785 }
1786
1787 static ssize_t
1788 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1789 {
1790         struct nct6775_data *data = nct6775_update_device(dev);
1791         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1792         int nr = sattr->index;
1793
1794         return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1795 }
1796
1797 static ssize_t
1798 store_fan_min(struct device *dev, struct device_attribute *attr,
1799               const char *buf, size_t count)
1800 {
1801         struct nct6775_data *data = dev_get_drvdata(dev);
1802         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1803         int nr = sattr->index;
1804         unsigned long val;
1805         unsigned int reg;
1806         u8 new_div;
1807         int err;
1808
1809         err = kstrtoul(buf, 10, &val);
1810         if (err < 0)
1811                 return err;
1812
1813         mutex_lock(&data->update_lock);
1814         if (!data->has_fan_div) {
1815                 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1816                 if (!val) {
1817                         val = 0xff1f;
1818                 } else {
1819                         if (val > 1350000U)
1820                                 val = 135000U;
1821                         val = 1350000U / val;
1822                         val = (val & 0x1f) | ((val << 3) & 0xff00);
1823                 }
1824                 data->fan_min[nr] = val;
1825                 goto write_min; /* Leave fan divider alone */
1826         }
1827         if (!val) {
1828                 /* No min limit, alarm disabled */
1829                 data->fan_min[nr] = 255;
1830                 new_div = data->fan_div[nr]; /* No change */
1831                 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1832                 goto write_div;
1833         }
1834         reg = 1350000U / val;
1835         if (reg >= 128 * 255) {
1836                 /*
1837                  * Speed below this value cannot possibly be represented,
1838                  * even with the highest divider (128)
1839                  */
1840                 data->fan_min[nr] = 254;
1841                 new_div = 7; /* 128 == (1 << 7) */
1842                 dev_warn(dev,
1843                          "fan%u low limit %lu below minimum %u, set to minimum\n",
1844                          nr + 1, val, data->fan_from_reg_min(254, 7));
1845         } else if (!reg) {
1846                 /*
1847                  * Speed above this value cannot possibly be represented,
1848                  * even with the lowest divider (1)
1849                  */
1850                 data->fan_min[nr] = 1;
1851                 new_div = 0; /* 1 == (1 << 0) */
1852                 dev_warn(dev,
1853                          "fan%u low limit %lu above maximum %u, set to maximum\n",
1854                          nr + 1, val, data->fan_from_reg_min(1, 0));
1855         } else {
1856                 /*
1857                  * Automatically pick the best divider, i.e. the one such
1858                  * that the min limit will correspond to a register value
1859                  * in the 96..192 range
1860                  */
1861                 new_div = 0;
1862                 while (reg > 192 && new_div < 7) {
1863                         reg >>= 1;
1864                         new_div++;
1865                 }
1866                 data->fan_min[nr] = reg;
1867         }
1868
1869 write_div:
1870         /*
1871          * Write both the fan clock divider (if it changed) and the new
1872          * fan min (unconditionally)
1873          */
1874         if (new_div != data->fan_div[nr]) {
1875                 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1876                         nr + 1, div_from_reg(data->fan_div[nr]),
1877                         div_from_reg(new_div));
1878                 data->fan_div[nr] = new_div;
1879                 nct6775_write_fan_div_common(data, nr);
1880                 /* Give the chip time to sample a new speed value */
1881                 data->last_updated = jiffies;
1882         }
1883
1884 write_min:
1885         nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1886         mutex_unlock(&data->update_lock);
1887
1888         return count;
1889 }
1890
1891 static ssize_t
1892 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
1893 {
1894         struct nct6775_data *data = nct6775_update_device(dev);
1895         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1896         int p = data->fan_pulses[sattr->index];
1897
1898         return sprintf(buf, "%d\n", p ? : 4);
1899 }
1900
1901 static ssize_t
1902 store_fan_pulses(struct device *dev, struct device_attribute *attr,
1903                  const char *buf, size_t count)
1904 {
1905         struct nct6775_data *data = dev_get_drvdata(dev);
1906         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1907         int nr = sattr->index;
1908         unsigned long val;
1909         int err;
1910         u8 reg;
1911
1912         err = kstrtoul(buf, 10, &val);
1913         if (err < 0)
1914                 return err;
1915
1916         if (val > 4)
1917                 return -EINVAL;
1918
1919         mutex_lock(&data->update_lock);
1920         data->fan_pulses[nr] = val & 3;
1921         reg = nct6775_read_value(data, data->REG_FAN_PULSES[nr]);
1922         reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
1923         reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
1924         nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
1925         mutex_unlock(&data->update_lock);
1926
1927         return count;
1928 }
1929
1930 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
1931                                       struct attribute *attr, int index)
1932 {
1933         struct device *dev = container_of(kobj, struct device, kobj);
1934         struct nct6775_data *data = dev_get_drvdata(dev);
1935         int fan = index / 6;    /* fan index */
1936         int nr = index % 6;     /* attribute index */
1937
1938         if (!(data->has_fan & (1 << fan)))
1939                 return 0;
1940
1941         if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1)
1942                 return 0;
1943         if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1)
1944                 return 0;
1945         if (nr == 4 && !(data->has_fan_min & (1 << fan)))
1946                 return 0;
1947         if (nr == 5 && data->kind != nct6775)
1948                 return 0;
1949
1950         return attr->mode;
1951 }
1952
1953 SENSOR_TEMPLATE(fan_input, "fan%d_input", S_IRUGO, show_fan, NULL, 0);
1954 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", S_IRUGO, show_alarm, NULL,
1955                 FAN_ALARM_BASE);
1956 SENSOR_TEMPLATE(fan_beep, "fan%d_beep", S_IWUSR | S_IRUGO, show_beep,
1957                 store_beep, FAN_ALARM_BASE);
1958 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", S_IWUSR | S_IRUGO, show_fan_pulses,
1959                 store_fan_pulses, 0);
1960 SENSOR_TEMPLATE(fan_min, "fan%d_min", S_IWUSR | S_IRUGO, show_fan_min,
1961                 store_fan_min, 0);
1962 SENSOR_TEMPLATE(fan_div, "fan%d_div", S_IRUGO, show_fan_div, NULL, 0);
1963
1964 /*
1965  * nct6775_fan_is_visible uses the index into the following array
1966  * to determine if attributes should be created or not.
1967  * Any change in order or content must be matched.
1968  */
1969 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
1970         &sensor_dev_template_fan_input,
1971         &sensor_dev_template_fan_alarm, /* 1 */
1972         &sensor_dev_template_fan_beep,  /* 2 */
1973         &sensor_dev_template_fan_pulses,
1974         &sensor_dev_template_fan_min,   /* 4 */
1975         &sensor_dev_template_fan_div,   /* 5 */
1976         NULL
1977 };
1978
1979 static struct sensor_template_group nct6775_fan_template_group = {
1980         .templates = nct6775_attributes_fan_template,
1981         .is_visible = nct6775_fan_is_visible,
1982         .base = 1,
1983 };
1984
1985 static ssize_t
1986 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1987 {
1988         struct nct6775_data *data = nct6775_update_device(dev);
1989         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1990         int nr = sattr->index;
1991
1992         return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1993 }
1994
1995 static ssize_t
1996 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1997 {
1998         struct nct6775_data *data = nct6775_update_device(dev);
1999         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2000         int nr = sattr->nr;
2001         int index = sattr->index;
2002
2003         return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
2004 }
2005
2006 static ssize_t
2007 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
2008            size_t count)
2009 {
2010         struct nct6775_data *data = dev_get_drvdata(dev);
2011         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2012         int nr = sattr->nr;
2013         int index = sattr->index;
2014         int err;
2015         long val;
2016
2017         err = kstrtol(buf, 10, &val);
2018         if (err < 0)
2019                 return err;
2020
2021         mutex_lock(&data->update_lock);
2022         data->temp[index][nr] = LM75_TEMP_TO_REG(val);
2023         nct6775_write_temp(data, data->reg_temp[index][nr],
2024                            data->temp[index][nr]);
2025         mutex_unlock(&data->update_lock);
2026         return count;
2027 }
2028
2029 static ssize_t
2030 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
2031 {
2032         struct nct6775_data *data = nct6775_update_device(dev);
2033         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2034
2035         return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
2036 }
2037
2038 static ssize_t
2039 store_temp_offset(struct device *dev, struct device_attribute *attr,
2040                   const char *buf, size_t count)
2041 {
2042         struct nct6775_data *data = dev_get_drvdata(dev);
2043         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2044         int nr = sattr->index;
2045         long val;
2046         int err;
2047
2048         err = kstrtol(buf, 10, &val);
2049         if (err < 0)
2050                 return err;
2051
2052         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
2053
2054         mutex_lock(&data->update_lock);
2055         data->temp_offset[nr] = val;
2056         nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
2057         mutex_unlock(&data->update_lock);
2058
2059         return count;
2060 }
2061
2062 static ssize_t
2063 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
2064 {
2065         struct nct6775_data *data = nct6775_update_device(dev);
2066         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2067         int nr = sattr->index;
2068
2069         return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
2070 }
2071
2072 static ssize_t
2073 store_temp_type(struct device *dev, struct device_attribute *attr,
2074                 const char *buf, size_t count)
2075 {
2076         struct nct6775_data *data = nct6775_update_device(dev);
2077         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2078         int nr = sattr->index;
2079         unsigned long val;
2080         int err;
2081         u8 vbat, diode, vbit, dbit;
2082
2083         err = kstrtoul(buf, 10, &val);
2084         if (err < 0)
2085                 return err;
2086
2087         if (val != 1 && val != 3 && val != 4)
2088                 return -EINVAL;
2089
2090         mutex_lock(&data->update_lock);
2091
2092         data->temp_type[nr] = val;
2093         vbit = 0x02 << nr;
2094         dbit = data->DIODE_MASK << nr;
2095         vbat = nct6775_read_value(data, data->REG_VBAT) & ~vbit;
2096         diode = nct6775_read_value(data, data->REG_DIODE) & ~dbit;
2097         switch (val) {
2098         case 1: /* CPU diode (diode, current mode) */
2099                 vbat |= vbit;
2100                 diode |= dbit;
2101                 break;
2102         case 3: /* diode, voltage mode */
2103                 vbat |= dbit;
2104                 break;
2105         case 4: /* thermistor */
2106                 break;
2107         }
2108         nct6775_write_value(data, data->REG_VBAT, vbat);
2109         nct6775_write_value(data, data->REG_DIODE, diode);
2110
2111         mutex_unlock(&data->update_lock);
2112         return count;
2113 }
2114
2115 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
2116                                        struct attribute *attr, int index)
2117 {
2118         struct device *dev = container_of(kobj, struct device, kobj);
2119         struct nct6775_data *data = dev_get_drvdata(dev);
2120         int temp = index / 10;  /* temp index */
2121         int nr = index % 10;    /* attribute index */
2122
2123         if (!(data->have_temp & (1 << temp)))
2124                 return 0;
2125
2126         if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0)
2127                 return 0;                               /* alarm */
2128
2129         if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0)
2130                 return 0;                               /* beep */
2131
2132         if (nr == 4 && !data->reg_temp[1][temp])        /* max */
2133                 return 0;
2134
2135         if (nr == 5 && !data->reg_temp[2][temp])        /* max_hyst */
2136                 return 0;
2137
2138         if (nr == 6 && !data->reg_temp[3][temp])        /* crit */
2139                 return 0;
2140
2141         if (nr == 7 && !data->reg_temp[4][temp])        /* lcrit */
2142                 return 0;
2143
2144         /* offset and type only apply to fixed sensors */
2145         if (nr > 7 && !(data->have_temp_fixed & (1 << temp)))
2146                 return 0;
2147
2148         return attr->mode;
2149 }
2150
2151 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", S_IRUGO, show_temp, NULL, 0, 0);
2152 SENSOR_TEMPLATE(temp_label, "temp%d_label", S_IRUGO, show_temp_label, NULL, 0);
2153 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", S_IRUGO | S_IWUSR, show_temp,
2154                   store_temp, 0, 1);
2155 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", S_IRUGO | S_IWUSR,
2156                   show_temp, store_temp, 0, 2);
2157 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", S_IRUGO | S_IWUSR, show_temp,
2158                   store_temp, 0, 3);
2159 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", S_IRUGO | S_IWUSR, show_temp,
2160                   store_temp, 0, 4);
2161 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", S_IRUGO | S_IWUSR,
2162                 show_temp_offset, store_temp_offset, 0);
2163 SENSOR_TEMPLATE(temp_type, "temp%d_type", S_IRUGO | S_IWUSR, show_temp_type,
2164                 store_temp_type, 0);
2165 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", S_IRUGO, show_temp_alarm, NULL, 0);
2166 SENSOR_TEMPLATE(temp_beep, "temp%d_beep", S_IRUGO | S_IWUSR, show_temp_beep,
2167                 store_temp_beep, 0);
2168
2169 /*
2170  * nct6775_temp_is_visible uses the index into the following array
2171  * to determine if attributes should be created or not.
2172  * Any change in order or content must be matched.
2173  */
2174 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
2175         &sensor_dev_template_temp_input,
2176         &sensor_dev_template_temp_label,
2177         &sensor_dev_template_temp_alarm,        /* 2 */
2178         &sensor_dev_template_temp_beep,         /* 3 */
2179         &sensor_dev_template_temp_max,          /* 4 */
2180         &sensor_dev_template_temp_max_hyst,     /* 5 */
2181         &sensor_dev_template_temp_crit,         /* 6 */
2182         &sensor_dev_template_temp_lcrit,        /* 7 */
2183         &sensor_dev_template_temp_offset,       /* 8 */
2184         &sensor_dev_template_temp_type,         /* 9 */
2185         NULL
2186 };
2187
2188 static struct sensor_template_group nct6775_temp_template_group = {
2189         .templates = nct6775_attributes_temp_template,
2190         .is_visible = nct6775_temp_is_visible,
2191         .base = 1,
2192 };
2193
2194 static ssize_t
2195 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
2196 {
2197         struct nct6775_data *data = nct6775_update_device(dev);
2198         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2199
2200         return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
2201 }
2202
2203 static ssize_t
2204 store_pwm_mode(struct device *dev, struct device_attribute *attr,
2205                const char *buf, size_t count)
2206 {
2207         struct nct6775_data *data = dev_get_drvdata(dev);
2208         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2209         int nr = sattr->index;
2210         unsigned long val;
2211         int err;
2212         u8 reg;
2213
2214         err = kstrtoul(buf, 10, &val);
2215         if (err < 0)
2216                 return err;
2217
2218         if (val > 1)
2219                 return -EINVAL;
2220
2221         /* Setting DC mode is not supported for all chips/channels */
2222         if (data->REG_PWM_MODE[nr] == 0) {
2223                 if (val)
2224                         return -EINVAL;
2225                 return count;
2226         }
2227
2228         mutex_lock(&data->update_lock);
2229         data->pwm_mode[nr] = val;
2230         reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
2231         reg &= ~data->PWM_MODE_MASK[nr];
2232         if (val)
2233                 reg |= data->PWM_MODE_MASK[nr];
2234         nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
2235         mutex_unlock(&data->update_lock);
2236         return count;
2237 }
2238
2239 static ssize_t
2240 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2241 {
2242         struct nct6775_data *data = nct6775_update_device(dev);
2243         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2244         int nr = sattr->nr;
2245         int index = sattr->index;
2246         int pwm;
2247
2248         /*
2249          * For automatic fan control modes, show current pwm readings.
2250          * Otherwise, show the configured value.
2251          */
2252         if (index == 0 && data->pwm_enable[nr] > manual)
2253                 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
2254         else
2255                 pwm = data->pwm[index][nr];
2256
2257         return sprintf(buf, "%d\n", pwm);
2258 }
2259
2260 static ssize_t
2261 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
2262           size_t count)
2263 {
2264         struct nct6775_data *data = dev_get_drvdata(dev);
2265         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2266         int nr = sattr->nr;
2267         int index = sattr->index;
2268         unsigned long val;
2269         int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
2270         int maxval[7]
2271           = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
2272         int err;
2273         u8 reg;
2274
2275         err = kstrtoul(buf, 10, &val);
2276         if (err < 0)
2277                 return err;
2278         val = clamp_val(val, minval[index], maxval[index]);
2279
2280         mutex_lock(&data->update_lock);
2281         data->pwm[index][nr] = val;
2282         nct6775_write_value(data, data->REG_PWM[index][nr], val);
2283         if (index == 2) { /* floor: disable if val == 0 */
2284                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2285                 reg &= 0x7f;
2286                 if (val)
2287                         reg |= 0x80;
2288                 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2289         }
2290         mutex_unlock(&data->update_lock);
2291         return count;
2292 }
2293
2294 /* Returns 0 if OK, -EINVAL otherwise */
2295 static int check_trip_points(struct nct6775_data *data, int nr)
2296 {
2297         int i;
2298
2299         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2300                 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
2301                         return -EINVAL;
2302         }
2303         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2304                 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
2305                         return -EINVAL;
2306         }
2307         /* validate critical temperature and pwm if enabled (pwm > 0) */
2308         if (data->auto_pwm[nr][data->auto_pwm_num]) {
2309                 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2310                                 data->auto_temp[nr][data->auto_pwm_num] ||
2311                     data->auto_pwm[nr][data->auto_pwm_num - 1] >
2312                                 data->auto_pwm[nr][data->auto_pwm_num])
2313                         return -EINVAL;
2314         }
2315         return 0;
2316 }
2317
2318 static void pwm_update_registers(struct nct6775_data *data, int nr)
2319 {
2320         u8 reg;
2321
2322         switch (data->pwm_enable[nr]) {
2323         case off:
2324         case manual:
2325                 break;
2326         case speed_cruise:
2327                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2328                 reg = (reg & ~data->tolerance_mask) |
2329                   (data->target_speed_tolerance[nr] & data->tolerance_mask);
2330                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2331                 nct6775_write_value(data, data->REG_TARGET[nr],
2332                                     data->target_speed[nr] & 0xff);
2333                 if (data->REG_TOLERANCE_H) {
2334                         reg = (data->target_speed[nr] >> 8) & 0x0f;
2335                         reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2336                         nct6775_write_value(data,
2337                                             data->REG_TOLERANCE_H[nr],
2338                                             reg);
2339                 }
2340                 break;
2341         case thermal_cruise:
2342                 nct6775_write_value(data, data->REG_TARGET[nr],
2343                                     data->target_temp[nr]);
2344                 /* intentional */
2345         default:
2346                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2347                 reg = (reg & ~data->tolerance_mask) |
2348                   data->temp_tolerance[0][nr];
2349                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2350                 break;
2351         }
2352 }
2353
2354 static ssize_t
2355 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2356 {
2357         struct nct6775_data *data = nct6775_update_device(dev);
2358         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2359
2360         return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2361 }
2362
2363 static ssize_t
2364 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2365                  const char *buf, size_t count)
2366 {
2367         struct nct6775_data *data = dev_get_drvdata(dev);
2368         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2369         int nr = sattr->index;
2370         unsigned long val;
2371         int err;
2372         u16 reg;
2373
2374         err = kstrtoul(buf, 10, &val);
2375         if (err < 0)
2376                 return err;
2377
2378         if (val > sf4)
2379                 return -EINVAL;
2380
2381         if (val == sf3 && data->kind != nct6775)
2382                 return -EINVAL;
2383
2384         if (val == sf4 && check_trip_points(data, nr)) {
2385                 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2386                 dev_err(dev, "Adjust trip points and try again\n");
2387                 return -EINVAL;
2388         }
2389
2390         mutex_lock(&data->update_lock);
2391         data->pwm_enable[nr] = val;
2392         if (val == off) {
2393                 /*
2394                  * turn off pwm control: select manual mode, set pwm to maximum
2395                  */
2396                 data->pwm[0][nr] = 255;
2397                 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2398         }
2399         pwm_update_registers(data, nr);
2400         reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2401         reg &= 0x0f;
2402         reg |= pwm_enable_to_reg(val) << 4;
2403         nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2404         mutex_unlock(&data->update_lock);
2405         return count;
2406 }
2407
2408 static ssize_t
2409 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2410 {
2411         int i, sel = 0;
2412
2413         for (i = 0; i < NUM_TEMP; i++) {
2414                 if (!(data->have_temp & (1 << i)))
2415                         continue;
2416                 if (src == data->temp_src[i]) {
2417                         sel = i + 1;
2418                         break;
2419                 }
2420         }
2421
2422         return sprintf(buf, "%d\n", sel);
2423 }
2424
2425 static ssize_t
2426 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2427 {
2428         struct nct6775_data *data = nct6775_update_device(dev);
2429         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2430         int index = sattr->index;
2431
2432         return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2433 }
2434
2435 static ssize_t
2436 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2437                    const char *buf, size_t count)
2438 {
2439         struct nct6775_data *data = nct6775_update_device(dev);
2440         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2441         int nr = sattr->index;
2442         unsigned long val;
2443         int err, reg, src;
2444
2445         err = kstrtoul(buf, 10, &val);
2446         if (err < 0)
2447                 return err;
2448         if (val == 0 || val > NUM_TEMP)
2449                 return -EINVAL;
2450         if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
2451                 return -EINVAL;
2452
2453         mutex_lock(&data->update_lock);
2454         src = data->temp_src[val - 1];
2455         data->pwm_temp_sel[nr] = src;
2456         reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2457         reg &= 0xe0;
2458         reg |= src;
2459         nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2460         mutex_unlock(&data->update_lock);
2461
2462         return count;
2463 }
2464
2465 static ssize_t
2466 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2467                          char *buf)
2468 {
2469         struct nct6775_data *data = nct6775_update_device(dev);
2470         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2471         int index = sattr->index;
2472
2473         return show_pwm_temp_sel_common(data, buf,
2474                                         data->pwm_weight_temp_sel[index]);
2475 }
2476
2477 static ssize_t
2478 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2479                           const char *buf, size_t count)
2480 {
2481         struct nct6775_data *data = nct6775_update_device(dev);
2482         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2483         int nr = sattr->index;
2484         unsigned long val;
2485         int err, reg, src;
2486
2487         err = kstrtoul(buf, 10, &val);
2488         if (err < 0)
2489                 return err;
2490         if (val > NUM_TEMP)
2491                 return -EINVAL;
2492         if (val && (!(data->have_temp & (1 << (val - 1))) ||
2493                     !data->temp_src[val - 1]))
2494                 return -EINVAL;
2495
2496         mutex_lock(&data->update_lock);
2497         if (val) {
2498                 src = data->temp_src[val - 1];
2499                 data->pwm_weight_temp_sel[nr] = src;
2500                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2501                 reg &= 0xe0;
2502                 reg |= (src | 0x80);
2503                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2504         } else {
2505                 data->pwm_weight_temp_sel[nr] = 0;
2506                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2507                 reg &= 0x7f;
2508                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2509         }
2510         mutex_unlock(&data->update_lock);
2511
2512         return count;
2513 }
2514
2515 static ssize_t
2516 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2517 {
2518         struct nct6775_data *data = nct6775_update_device(dev);
2519         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2520
2521         return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2522 }
2523
2524 static ssize_t
2525 store_target_temp(struct device *dev, struct device_attribute *attr,
2526                   const char *buf, size_t count)
2527 {
2528         struct nct6775_data *data = dev_get_drvdata(dev);
2529         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2530         int nr = sattr->index;
2531         unsigned long val;
2532         int err;
2533
2534         err = kstrtoul(buf, 10, &val);
2535         if (err < 0)
2536                 return err;
2537
2538         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2539                         data->target_temp_mask);
2540
2541         mutex_lock(&data->update_lock);
2542         data->target_temp[nr] = val;
2543         pwm_update_registers(data, nr);
2544         mutex_unlock(&data->update_lock);
2545         return count;
2546 }
2547
2548 static ssize_t
2549 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2550 {
2551         struct nct6775_data *data = nct6775_update_device(dev);
2552         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2553         int nr = sattr->index;
2554
2555         return sprintf(buf, "%d\n",
2556                        fan_from_reg16(data->target_speed[nr],
2557                                       data->fan_div[nr]));
2558 }
2559
2560 static ssize_t
2561 store_target_speed(struct device *dev, struct device_attribute *attr,
2562                    const char *buf, size_t count)
2563 {
2564         struct nct6775_data *data = dev_get_drvdata(dev);
2565         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2566         int nr = sattr->index;
2567         unsigned long val;
2568         int err;
2569         u16 speed;
2570
2571         err = kstrtoul(buf, 10, &val);
2572         if (err < 0)
2573                 return err;
2574
2575         val = clamp_val(val, 0, 1350000U);
2576         speed = fan_to_reg(val, data->fan_div[nr]);
2577
2578         mutex_lock(&data->update_lock);
2579         data->target_speed[nr] = speed;
2580         pwm_update_registers(data, nr);
2581         mutex_unlock(&data->update_lock);
2582         return count;
2583 }
2584
2585 static ssize_t
2586 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2587                     char *buf)
2588 {
2589         struct nct6775_data *data = nct6775_update_device(dev);
2590         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2591         int nr = sattr->nr;
2592         int index = sattr->index;
2593
2594         return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2595 }
2596
2597 static ssize_t
2598 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2599                      const char *buf, size_t count)
2600 {
2601         struct nct6775_data *data = dev_get_drvdata(dev);
2602         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2603         int nr = sattr->nr;
2604         int index = sattr->index;
2605         unsigned long val;
2606         int err;
2607
2608         err = kstrtoul(buf, 10, &val);
2609         if (err < 0)
2610                 return err;
2611
2612         /* Limit tolerance as needed */
2613         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2614
2615         mutex_lock(&data->update_lock);
2616         data->temp_tolerance[index][nr] = val;
2617         if (index)
2618                 pwm_update_registers(data, nr);
2619         else
2620                 nct6775_write_value(data,
2621                                     data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2622                                     val);
2623         mutex_unlock(&data->update_lock);
2624         return count;
2625 }
2626
2627 /*
2628  * Fan speed tolerance is a tricky beast, since the associated register is
2629  * a tick counter, but the value is reported and configured as rpm.
2630  * Compute resulting low and high rpm values and report the difference.
2631  */
2632 static ssize_t
2633 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2634                      char *buf)
2635 {
2636         struct nct6775_data *data = nct6775_update_device(dev);
2637         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2638         int nr = sattr->index;
2639         int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2640         int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2641         int tolerance;
2642
2643         if (low <= 0)
2644                 low = 1;
2645         if (high > 0xffff)
2646                 high = 0xffff;
2647         if (high < low)
2648                 high = low;
2649
2650         tolerance = (fan_from_reg16(low, data->fan_div[nr])
2651                      - fan_from_reg16(high, data->fan_div[nr])) / 2;
2652
2653         return sprintf(buf, "%d\n", tolerance);
2654 }
2655
2656 static ssize_t
2657 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2658                       const char *buf, size_t count)
2659 {
2660         struct nct6775_data *data = dev_get_drvdata(dev);
2661         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2662         int nr = sattr->index;
2663         unsigned long val;
2664         int err;
2665         int low, high;
2666
2667         err = kstrtoul(buf, 10, &val);
2668         if (err < 0)
2669                 return err;
2670
2671         high = fan_from_reg16(data->target_speed[nr],
2672                               data->fan_div[nr]) + val;
2673         low = fan_from_reg16(data->target_speed[nr],
2674                              data->fan_div[nr]) - val;
2675         if (low <= 0)
2676                 low = 1;
2677         if (high < low)
2678                 high = low;
2679
2680         val = (fan_to_reg(low, data->fan_div[nr]) -
2681                fan_to_reg(high, data->fan_div[nr])) / 2;
2682
2683         /* Limit tolerance as needed */
2684         val = clamp_val(val, 0, data->speed_tolerance_limit);
2685
2686         mutex_lock(&data->update_lock);
2687         data->target_speed_tolerance[nr] = val;
2688         pwm_update_registers(data, nr);
2689         mutex_unlock(&data->update_lock);
2690         return count;
2691 }
2692
2693 SENSOR_TEMPLATE_2(pwm, "pwm%d", S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2694 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", S_IWUSR | S_IRUGO, show_pwm_mode,
2695                 store_pwm_mode, 0);
2696 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", S_IWUSR | S_IRUGO, show_pwm_enable,
2697                 store_pwm_enable, 0);
2698 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", S_IWUSR | S_IRUGO,
2699                 show_pwm_temp_sel, store_pwm_temp_sel, 0);
2700 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", S_IWUSR | S_IRUGO,
2701                 show_target_temp, store_target_temp, 0);
2702 SENSOR_TEMPLATE(fan_target, "fan%d_target", S_IWUSR | S_IRUGO,
2703                 show_target_speed, store_target_speed, 0);
2704 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", S_IWUSR | S_IRUGO,
2705                 show_speed_tolerance, store_speed_tolerance, 0);
2706
2707 /* Smart Fan registers */
2708
2709 static ssize_t
2710 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2711 {
2712         struct nct6775_data *data = nct6775_update_device(dev);
2713         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2714         int nr = sattr->nr;
2715         int index = sattr->index;
2716
2717         return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2718 }
2719
2720 static ssize_t
2721 store_weight_temp(struct device *dev, struct device_attribute *attr,
2722                   const char *buf, size_t count)
2723 {
2724         struct nct6775_data *data = dev_get_drvdata(dev);
2725         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2726         int nr = sattr->nr;
2727         int index = sattr->index;
2728         unsigned long val;
2729         int err;
2730
2731         err = kstrtoul(buf, 10, &val);
2732         if (err < 0)
2733                 return err;
2734
2735         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2736
2737         mutex_lock(&data->update_lock);
2738         data->weight_temp[index][nr] = val;
2739         nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2740         mutex_unlock(&data->update_lock);
2741         return count;
2742 }
2743
2744 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", S_IWUSR | S_IRUGO,
2745                   show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
2746 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step",
2747                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 0);
2748 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol",
2749                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 1);
2750 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base",
2751                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 2);
2752 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step",
2753                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 5);
2754 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base",
2755                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 6);
2756
2757 static ssize_t
2758 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2759 {
2760         struct nct6775_data *data = nct6775_update_device(dev);
2761         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2762         int nr = sattr->nr;
2763         int index = sattr->index;
2764
2765         return sprintf(buf, "%d\n",
2766                        step_time_from_reg(data->fan_time[index][nr],
2767                                           data->pwm_mode[nr]));
2768 }
2769
2770 static ssize_t
2771 store_fan_time(struct device *dev, struct device_attribute *attr,
2772                const char *buf, size_t count)
2773 {
2774         struct nct6775_data *data = dev_get_drvdata(dev);
2775         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2776         int nr = sattr->nr;
2777         int index = sattr->index;
2778         unsigned long val;
2779         int err;
2780
2781         err = kstrtoul(buf, 10, &val);
2782         if (err < 0)
2783                 return err;
2784
2785         val = step_time_to_reg(val, data->pwm_mode[nr]);
2786         mutex_lock(&data->update_lock);
2787         data->fan_time[index][nr] = val;
2788         nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2789         mutex_unlock(&data->update_lock);
2790         return count;
2791 }
2792
2793 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
2794 static ssize_t
2795 show_name(struct device *dev, struct device_attribute *attr, char *buf)
2796 {
2797         struct nct6775_data *data = dev_get_drvdata(dev);
2798
2799         return sprintf(buf, "%s\n", data->name);
2800 }
2801
2802 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
2803 #endif
2804
2805 static ssize_t
2806 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2807 {
2808         struct nct6775_data *data = nct6775_update_device(dev);
2809         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2810
2811         return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2812 }
2813
2814 static ssize_t
2815 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2816                const char *buf, size_t count)
2817 {
2818         struct nct6775_data *data = dev_get_drvdata(dev);
2819         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2820         int nr = sattr->nr;
2821         int point = sattr->index;
2822         unsigned long val;
2823         int err;
2824         u8 reg;
2825
2826         err = kstrtoul(buf, 10, &val);
2827         if (err < 0)
2828                 return err;
2829         if (val > 255)
2830                 return -EINVAL;
2831
2832         if (point == data->auto_pwm_num) {
2833                 if (data->kind != nct6775 && !val)
2834                         return -EINVAL;
2835                 if (data->kind != nct6779 && val)
2836                         val = 0xff;
2837         }
2838
2839         mutex_lock(&data->update_lock);
2840         data->auto_pwm[nr][point] = val;
2841         if (point < data->auto_pwm_num) {
2842                 nct6775_write_value(data,
2843                                     NCT6775_AUTO_PWM(data, nr, point),
2844                                     data->auto_pwm[nr][point]);
2845         } else {
2846                 switch (data->kind) {
2847                 case nct6775:
2848                         /* disable if needed (pwm == 0) */
2849                         reg = nct6775_read_value(data,
2850                                                  NCT6775_REG_CRITICAL_ENAB[nr]);
2851                         if (val)
2852                                 reg |= 0x02;
2853                         else
2854                                 reg &= ~0x02;
2855                         nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
2856                                             reg);
2857                         break;
2858                 case nct6776:
2859                         break; /* always enabled, nothing to do */
2860                 case nct6106:
2861                 case nct6779:
2862                 case nct6791:
2863                 case nct6792:
2864                 case nct6793:
2865                         nct6775_write_value(data, data->REG_CRITICAL_PWM[nr],
2866                                             val);
2867                         reg = nct6775_read_value(data,
2868                                         data->REG_CRITICAL_PWM_ENABLE[nr]);
2869                         if (val == 255)
2870                                 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
2871                         else
2872                                 reg |= data->CRITICAL_PWM_ENABLE_MASK;
2873                         nct6775_write_value(data,
2874                                             data->REG_CRITICAL_PWM_ENABLE[nr],
2875                                             reg);
2876                         break;
2877                 }
2878         }
2879         mutex_unlock(&data->update_lock);
2880         return count;
2881 }
2882
2883 static ssize_t
2884 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
2885 {
2886         struct nct6775_data *data = nct6775_update_device(dev);
2887         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2888         int nr = sattr->nr;
2889         int point = sattr->index;
2890
2891         /*
2892          * We don't know for sure if the temperature is signed or unsigned.
2893          * Assume it is unsigned.
2894          */
2895         return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
2896 }
2897
2898 static ssize_t
2899 store_auto_temp(struct device *dev, struct device_attribute *attr,
2900                 const char *buf, size_t count)
2901 {
2902         struct nct6775_data *data = dev_get_drvdata(dev);
2903         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2904         int nr = sattr->nr;
2905         int point = sattr->index;
2906         unsigned long val;
2907         int err;
2908
2909         err = kstrtoul(buf, 10, &val);
2910         if (err)
2911                 return err;
2912         if (val > 255000)
2913                 return -EINVAL;
2914
2915         mutex_lock(&data->update_lock);
2916         data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
2917         if (point < data->auto_pwm_num) {
2918                 nct6775_write_value(data,
2919                                     NCT6775_AUTO_TEMP(data, nr, point),
2920                                     data->auto_temp[nr][point]);
2921         } else {
2922                 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
2923                                     data->auto_temp[nr][point]);
2924         }
2925         mutex_unlock(&data->update_lock);
2926         return count;
2927 }
2928
2929 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
2930                                       struct attribute *attr, int index)
2931 {
2932         struct device *dev = container_of(kobj, struct device, kobj);
2933         struct nct6775_data *data = dev_get_drvdata(dev);
2934         int pwm = index / 36;   /* pwm index */
2935         int nr = index % 36;    /* attribute index */
2936
2937         if (!(data->has_pwm & (1 << pwm)))
2938                 return 0;
2939
2940         if ((nr >= 14 && nr <= 18) || nr == 21)   /* weight */
2941                 if (!data->REG_WEIGHT_TEMP_SEL[pwm])
2942                         return 0;
2943         if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
2944                 return 0;
2945         if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
2946                 return 0;
2947         if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
2948                 return 0;
2949
2950         if (nr >= 22 && nr <= 35) {             /* auto point */
2951                 int api = (nr - 22) / 2;        /* auto point index */
2952
2953                 if (api > data->auto_pwm_num)
2954                         return 0;
2955         }
2956         return attr->mode;
2957 }
2958
2959 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", S_IWUSR | S_IRUGO,
2960                   show_fan_time, store_fan_time, 0, 0);
2961 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", S_IWUSR | S_IRUGO,
2962                   show_fan_time, store_fan_time, 0, 1);
2963 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", S_IWUSR | S_IRUGO,
2964                   show_fan_time, store_fan_time, 0, 2);
2965 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", S_IWUSR | S_IRUGO, show_pwm,
2966                   store_pwm, 0, 1);
2967 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", S_IWUSR | S_IRUGO, show_pwm,
2968                   store_pwm, 0, 2);
2969 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", S_IWUSR | S_IRUGO,
2970                   show_temp_tolerance, store_temp_tolerance, 0, 0);
2971 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance",
2972                   S_IWUSR | S_IRUGO, show_temp_tolerance, store_temp_tolerance,
2973                   0, 1);
2974
2975 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2976                   0, 3);
2977
2978 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", S_IWUSR | S_IRUGO, show_pwm,
2979                   store_pwm, 0, 4);
2980
2981 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm",
2982                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 0);
2983 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp",
2984                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 0);
2985
2986 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm",
2987                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 1);
2988 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp",
2989                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 1);
2990
2991 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm",
2992                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 2);
2993 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp",
2994                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 2);
2995
2996 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm",
2997                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 3);
2998 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp",
2999                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 3);
3000
3001 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm",
3002                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 4);
3003 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp",
3004                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 4);
3005
3006 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm",
3007                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 5);
3008 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp",
3009                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 5);
3010
3011 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm",
3012                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 6);
3013 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp",
3014                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 6);
3015
3016 /*
3017  * nct6775_pwm_is_visible uses the index into the following array
3018  * to determine if attributes should be created or not.
3019  * Any change in order or content must be matched.
3020  */
3021 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
3022         &sensor_dev_template_pwm,
3023         &sensor_dev_template_pwm_mode,
3024         &sensor_dev_template_pwm_enable,
3025         &sensor_dev_template_pwm_temp_sel,
3026         &sensor_dev_template_pwm_temp_tolerance,
3027         &sensor_dev_template_pwm_crit_temp_tolerance,
3028         &sensor_dev_template_pwm_target_temp,
3029         &sensor_dev_template_fan_target,
3030         &sensor_dev_template_fan_tolerance,
3031         &sensor_dev_template_pwm_stop_time,
3032         &sensor_dev_template_pwm_step_up_time,
3033         &sensor_dev_template_pwm_step_down_time,
3034         &sensor_dev_template_pwm_start,
3035         &sensor_dev_template_pwm_floor,
3036         &sensor_dev_template_pwm_weight_temp_sel,       /* 14 */
3037         &sensor_dev_template_pwm_weight_temp_step,
3038         &sensor_dev_template_pwm_weight_temp_step_tol,
3039         &sensor_dev_template_pwm_weight_temp_step_base,
3040         &sensor_dev_template_pwm_weight_duty_step,      /* 18 */
3041         &sensor_dev_template_pwm_max,                   /* 19 */
3042         &sensor_dev_template_pwm_step,                  /* 20 */
3043         &sensor_dev_template_pwm_weight_duty_base,      /* 21 */
3044         &sensor_dev_template_pwm_auto_point1_pwm,       /* 22 */
3045         &sensor_dev_template_pwm_auto_point1_temp,
3046         &sensor_dev_template_pwm_auto_point2_pwm,
3047         &sensor_dev_template_pwm_auto_point2_temp,
3048         &sensor_dev_template_pwm_auto_point3_pwm,
3049         &sensor_dev_template_pwm_auto_point3_temp,
3050         &sensor_dev_template_pwm_auto_point4_pwm,
3051         &sensor_dev_template_pwm_auto_point4_temp,
3052         &sensor_dev_template_pwm_auto_point5_pwm,
3053         &sensor_dev_template_pwm_auto_point5_temp,
3054         &sensor_dev_template_pwm_auto_point6_pwm,
3055         &sensor_dev_template_pwm_auto_point6_temp,
3056         &sensor_dev_template_pwm_auto_point7_pwm,
3057         &sensor_dev_template_pwm_auto_point7_temp,      /* 35 */
3058
3059         NULL
3060 };
3061
3062 static struct sensor_template_group nct6775_pwm_template_group = {
3063         .templates = nct6775_attributes_pwm_template,
3064         .is_visible = nct6775_pwm_is_visible,
3065         .base = 1,
3066 };
3067
3068 static ssize_t
3069 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
3070 {
3071         struct nct6775_data *data = dev_get_drvdata(dev);
3072
3073         return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
3074 }
3075
3076 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
3077
3078 /* Case open detection */
3079
3080 static ssize_t
3081 clear_caseopen(struct device *dev, struct device_attribute *attr,
3082                const char *buf, size_t count)
3083 {
3084         struct nct6775_data *data = dev_get_drvdata(dev);
3085         int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
3086         unsigned long val;
3087         u8 reg;
3088         int ret;
3089
3090         if (kstrtoul(buf, 10, &val) || val != 0)
3091                 return -EINVAL;
3092
3093         mutex_lock(&data->update_lock);
3094
3095         /*
3096          * Use CR registers to clear caseopen status.
3097          * The CR registers are the same for all chips, and not all chips
3098          * support clearing the caseopen status through "regular" registers.
3099          */
3100         ret = superio_enter(data->sioreg);
3101         if (ret) {
3102                 count = ret;
3103                 goto error;
3104         }
3105
3106         superio_select(data->sioreg, NCT6775_LD_ACPI);
3107         reg = superio_inb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
3108         reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3109         superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3110         reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3111         superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3112         superio_exit(data->sioreg);
3113
3114         data->valid = false;    /* Force cache refresh */
3115 error:
3116         mutex_unlock(&data->update_lock);
3117         return count;
3118 }
3119
3120 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
3121                           clear_caseopen, INTRUSION_ALARM_BASE);
3122 static SENSOR_DEVICE_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
3123                           clear_caseopen, INTRUSION_ALARM_BASE + 1);
3124 static SENSOR_DEVICE_ATTR(intrusion0_beep, S_IWUSR | S_IRUGO, show_beep,
3125                           store_beep, INTRUSION_ALARM_BASE);
3126 static SENSOR_DEVICE_ATTR(intrusion1_beep, S_IWUSR | S_IRUGO, show_beep,
3127                           store_beep, INTRUSION_ALARM_BASE + 1);
3128 static SENSOR_DEVICE_ATTR(beep_enable, S_IWUSR | S_IRUGO, show_beep,
3129                           store_beep, BEEP_ENABLE_BASE);
3130
3131 static umode_t nct6775_other_is_visible(struct kobject *kobj,
3132                                         struct attribute *attr, int index)
3133 {
3134         struct device *dev = container_of(kobj, struct device, kobj);
3135         struct nct6775_data *data = dev_get_drvdata(dev);
3136
3137         if (index == 0 && !data->have_vid)
3138                 return 0;
3139
3140         if (index == 1 || index == 2) {
3141                 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + index - 1] < 0)
3142                         return 0;
3143         }
3144
3145         if (index == 3 || index == 4) {
3146                 if (data->BEEP_BITS[INTRUSION_ALARM_BASE + index - 3] < 0)
3147                         return 0;
3148         }
3149
3150         return attr->mode;
3151 }
3152
3153 /*
3154  * nct6775_other_is_visible uses the index into the following array
3155  * to determine if attributes should be created or not.
3156  * Any change in order or content must be matched.
3157  */
3158 static struct attribute *nct6775_attributes_other[] = {
3159         &dev_attr_cpu0_vid.attr,                                /* 0 */
3160         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,        /* 1 */
3161         &sensor_dev_attr_intrusion1_alarm.dev_attr.attr,        /* 2 */
3162         &sensor_dev_attr_intrusion0_beep.dev_attr.attr,         /* 3 */
3163         &sensor_dev_attr_intrusion1_beep.dev_attr.attr,         /* 4 */
3164         &sensor_dev_attr_beep_enable.dev_attr.attr,             /* 5 */
3165 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
3166         &dev_attr_name.attr,
3167 #endif
3168         NULL
3169 };
3170
3171 static const struct attribute_group nct6775_group_other = {
3172         .attrs = nct6775_attributes_other,
3173         .is_visible = nct6775_other_is_visible,
3174 };
3175
3176 static inline void nct6775_init_device(struct nct6775_data *data)
3177 {
3178         int i;
3179         u8 tmp, diode;
3180
3181         /* Start monitoring if needed */
3182         if (data->REG_CONFIG) {
3183                 tmp = nct6775_read_value(data, data->REG_CONFIG);
3184                 if (!(tmp & 0x01))
3185                         nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
3186         }
3187
3188         /* Enable temperature sensors if needed */
3189         for (i = 0; i < NUM_TEMP; i++) {
3190                 if (!(data->have_temp & (1 << i)))
3191                         continue;
3192                 if (!data->reg_temp_config[i])
3193                         continue;
3194                 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
3195                 if (tmp & 0x01)
3196                         nct6775_write_value(data, data->reg_temp_config[i],
3197                                             tmp & 0xfe);
3198         }
3199
3200         /* Enable VBAT monitoring if needed */
3201         tmp = nct6775_read_value(data, data->REG_VBAT);
3202         if (!(tmp & 0x01))
3203                 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
3204
3205         diode = nct6775_read_value(data, data->REG_DIODE);
3206
3207         for (i = 0; i < data->temp_fixed_num; i++) {
3208                 if (!(data->have_temp_fixed & (1 << i)))
3209                         continue;
3210                 if ((tmp & (data->DIODE_MASK << i)))    /* diode */
3211                         data->temp_type[i]
3212                           = 3 - ((diode >> i) & data->DIODE_MASK);
3213                 else                            /* thermistor */
3214                         data->temp_type[i] = 4;
3215         }
3216 }
3217
3218 static void
3219 nct6775_check_fan_inputs(struct nct6775_data *data)
3220 {
3221         bool fan3pin, fan4pin, fan4min, fan5pin, fan6pin;
3222         bool pwm3pin, pwm4pin, pwm5pin, pwm6pin;
3223         int sioreg = data->sioreg;
3224         int regval;
3225
3226         /* Store SIO_REG_ENABLE for use during resume */
3227         superio_select(sioreg, NCT6775_LD_HWM);
3228         data->sio_reg_enable = superio_inb(sioreg, SIO_REG_ENABLE);
3229
3230         /* fan4 and fan5 share some pins with the GPIO and serial flash */
3231         if (data->kind == nct6775) {
3232                 regval = superio_inb(sioreg, 0x2c);
3233
3234                 fan3pin = regval & (1 << 6);
3235                 pwm3pin = regval & (1 << 7);
3236
3237                 /* On NCT6775, fan4 shares pins with the fdc interface */
3238                 fan4pin = !(superio_inb(sioreg, 0x2A) & 0x80);
3239                 fan4min = false;
3240                 fan5pin = false;
3241                 fan6pin = false;
3242                 pwm4pin = false;
3243                 pwm5pin = false;
3244                 pwm6pin = false;
3245         } else if (data->kind == nct6776) {
3246                 bool gpok = superio_inb(sioreg, 0x27) & 0x80;
3247                 const char *board_vendor, *board_name;
3248
3249                 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
3250                 board_name = dmi_get_system_info(DMI_BOARD_NAME);
3251
3252                 if (board_name && board_vendor &&
3253                     !strcmp(board_vendor, "ASRock")) {
3254                         /*
3255                          * Auxiliary fan monitoring is not enabled on ASRock
3256                          * Z77 Pro4-M if booted in UEFI Ultra-FastBoot mode.
3257                          * Observed with BIOS version 2.00.
3258                          */
3259                         if (!strcmp(board_name, "Z77 Pro4-M")) {
3260                                 if ((data->sio_reg_enable & 0xe0) != 0xe0) {
3261                                         data->sio_reg_enable |= 0xe0;
3262                                         superio_outb(sioreg, SIO_REG_ENABLE,
3263                                                      data->sio_reg_enable);
3264                                 }
3265                         }
3266                 }
3267
3268                 if (data->sio_reg_enable & 0x80)
3269                         fan3pin = gpok;
3270                 else
3271                         fan3pin = !(superio_inb(sioreg, 0x24) & 0x40);
3272
3273                 if (data->sio_reg_enable & 0x40)
3274                         fan4pin = gpok;
3275                 else
3276                         fan4pin = superio_inb(sioreg, 0x1C) & 0x01;
3277
3278                 if (data->sio_reg_enable & 0x20)
3279                         fan5pin = gpok;
3280                 else
3281                         fan5pin = superio_inb(sioreg, 0x1C) & 0x02;
3282
3283                 fan4min = fan4pin;
3284                 fan6pin = false;
3285                 pwm3pin = fan3pin;
3286                 pwm4pin = false;
3287                 pwm5pin = false;
3288                 pwm6pin = false;
3289         } else if (data->kind == nct6106) {
3290                 regval = superio_inb(sioreg, 0x24);
3291                 fan3pin = !(regval & 0x80);
3292                 pwm3pin = regval & 0x08;
3293
3294                 fan4pin = false;
3295                 fan4min = false;
3296                 fan5pin = false;
3297                 fan6pin = false;
3298                 pwm4pin = false;
3299                 pwm5pin = false;
3300                 pwm6pin = false;
3301         } else {        /* NCT6779D, NCT6791D, NCT6792D, or NCT6793D */
3302                 regval = superio_inb(sioreg, 0x1c);
3303
3304                 fan3pin = !(regval & (1 << 5));
3305                 fan4pin = !(regval & (1 << 6));
3306                 fan5pin = !(regval & (1 << 7));
3307
3308                 pwm3pin = !(regval & (1 << 0));
3309                 pwm4pin = !(regval & (1 << 1));
3310                 pwm5pin = !(regval & (1 << 2));
3311
3312                 fan4min = fan4pin;
3313
3314                 if (data->kind == nct6791 || data->kind == nct6792 ||
3315                     data->kind == nct6793) {
3316                         regval = superio_inb(sioreg, 0x2d);
3317                         fan6pin = (regval & (1 << 1));
3318                         pwm6pin = (regval & (1 << 0));
3319                 } else {        /* NCT6779D */
3320                         fan6pin = false;
3321                         pwm6pin = false;
3322                 }
3323         }
3324
3325         /* fan 1 and 2 (0x03) are always present */
3326         data->has_fan = 0x03 | (fan3pin << 2) | (fan4pin << 3) |
3327                 (fan5pin << 4) | (fan6pin << 5);
3328         data->has_fan_min = 0x03 | (fan3pin << 2) | (fan4min << 3) |
3329                 (fan5pin << 4);
3330         data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) |
3331                 (pwm5pin << 4) | (pwm6pin << 5);
3332 }
3333
3334 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
3335                              int *available, int *mask)
3336 {
3337         int i;
3338         u8 src;
3339
3340         for (i = 0; i < data->pwm_num && *available; i++) {
3341                 int index;
3342
3343                 if (!regp[i])
3344                         continue;
3345                 src = nct6775_read_value(data, regp[i]);
3346                 src &= 0x1f;
3347                 if (!src || (*mask & (1 << src)))
3348                         continue;
3349                 if (src >= data->temp_label_num ||
3350                     !strlen(data->temp_label[src]))
3351                         continue;
3352
3353                 index = __ffs(*available);
3354                 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3355                 *available &= ~(1 << index);
3356                 *mask |= 1 << src;
3357         }
3358 }
3359
3360 static int nct6775_probe(struct platform_device *pdev)
3361 {
3362         struct device *dev = &pdev->dev;
3363         struct nct6775_sio_data *sio_data = dev_get_platdata(dev);
3364         struct nct6775_data *data;
3365         struct resource *res;
3366         int i, s, err = 0;
3367         int src, mask, available;
3368         const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3369         const u16 *reg_temp_mon, *reg_temp_alternate, *reg_temp_crit;
3370         const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL;
3371         int num_reg_temp, num_reg_temp_mon;
3372         u8 cr2a;
3373         struct attribute_group *group;
3374         struct device *hwmon_dev;
3375         int num_attr_groups = 0;
3376
3377         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3378         if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3379                                  DRVNAME))
3380                 return -EBUSY;
3381
3382         data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3383                             GFP_KERNEL);
3384         if (!data)
3385                 return -ENOMEM;
3386
3387         data->kind = sio_data->kind;
3388         data->sioreg = sio_data->sioreg;
3389         data->addr = res->start;
3390         mutex_init(&data->update_lock);
3391         data->name = nct6775_device_names[data->kind];
3392         data->bank = 0xff;              /* Force initial bank selection */
3393         platform_set_drvdata(pdev, data);
3394
3395         switch (data->kind) {
3396         case nct6106:
3397                 data->in_num = 9;
3398                 data->pwm_num = 3;
3399                 data->auto_pwm_num = 4;
3400                 data->temp_fixed_num = 3;
3401                 data->num_temp_alarms = 6;
3402                 data->num_temp_beeps = 6;
3403
3404                 data->fan_from_reg = fan_from_reg13;
3405                 data->fan_from_reg_min = fan_from_reg13;
3406
3407                 data->temp_label = nct6776_temp_label;
3408                 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3409
3410                 data->REG_VBAT = NCT6106_REG_VBAT;
3411                 data->REG_DIODE = NCT6106_REG_DIODE;
3412                 data->DIODE_MASK = NCT6106_DIODE_MASK;
3413                 data->REG_VIN = NCT6106_REG_IN;
3414                 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3415                 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3416                 data->REG_TARGET = NCT6106_REG_TARGET;
3417                 data->REG_FAN = NCT6106_REG_FAN;
3418                 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
3419                 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
3420                 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
3421                 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
3422                 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
3423                 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
3424                 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
3425                 data->REG_PWM[0] = NCT6106_REG_PWM;
3426                 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
3427                 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
3428                 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3429                 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3430                 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3431                 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3432                 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3433                 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
3434                 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
3435                 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
3436                 data->REG_CRITICAL_TEMP_TOLERANCE
3437                   = NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
3438                 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
3439                 data->CRITICAL_PWM_ENABLE_MASK
3440                   = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3441                 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
3442                 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3443                 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3444                 data->REG_TEMP_SEL = NCT6106_REG_TEMP_SEL;
3445                 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3446                 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3447                 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3448                 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3449                 data->REG_ALARM = NCT6106_REG_ALARM;
3450                 data->ALARM_BITS = NCT6106_ALARM_BITS;
3451                 data->REG_BEEP = NCT6106_REG_BEEP;
3452                 data->BEEP_BITS = NCT6106_BEEP_BITS;
3453
3454                 reg_temp = NCT6106_REG_TEMP;
3455                 reg_temp_mon = NCT6106_REG_TEMP_MON;
3456                 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3457                 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON);
3458                 reg_temp_over = NCT6106_REG_TEMP_OVER;
3459                 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3460                 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3461                 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3462                 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3463                 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3464                 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3465
3466                 break;
3467         case nct6775:
3468                 data->in_num = 9;
3469                 data->pwm_num = 3;
3470                 data->auto_pwm_num = 6;
3471                 data->has_fan_div = true;
3472                 data->temp_fixed_num = 3;
3473                 data->num_temp_alarms = 3;
3474                 data->num_temp_beeps = 3;
3475
3476                 data->ALARM_BITS = NCT6775_ALARM_BITS;
3477                 data->BEEP_BITS = NCT6775_BEEP_BITS;
3478
3479                 data->fan_from_reg = fan_from_reg16;
3480                 data->fan_from_reg_min = fan_from_reg8;
3481                 data->target_temp_mask = 0x7f;
3482                 data->tolerance_mask = 0x0f;
3483                 data->speed_tolerance_limit = 15;
3484
3485                 data->temp_label = nct6775_temp_label;
3486                 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
3487
3488                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3489                 data->REG_VBAT = NCT6775_REG_VBAT;
3490                 data->REG_DIODE = NCT6775_REG_DIODE;
3491                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3492                 data->REG_VIN = NCT6775_REG_IN;
3493                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3494                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3495                 data->REG_TARGET = NCT6775_REG_TARGET;
3496                 data->REG_FAN = NCT6775_REG_FAN;
3497                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3498                 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3499                 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3500                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3501                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3502                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3503                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3504                 data->REG_PWM[0] = NCT6775_REG_PWM;
3505                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3506                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3507                 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3508                 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3509                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3510                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3511                 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3512                 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3513                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3514                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3515                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3516                 data->REG_CRITICAL_TEMP_TOLERANCE
3517                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3518                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3519                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3520                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3521                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3522                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3523                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3524                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3525                 data->REG_ALARM = NCT6775_REG_ALARM;
3526                 data->REG_BEEP = NCT6775_REG_BEEP;
3527
3528                 reg_temp = NCT6775_REG_TEMP;
3529                 reg_temp_mon = NCT6775_REG_TEMP_MON;
3530                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3531                 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3532                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3533                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3534                 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3535                 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3536                 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3537
3538                 break;
3539         case nct6776:
3540                 data->in_num = 9;
3541                 data->pwm_num = 3;
3542                 data->auto_pwm_num = 4;
3543                 data->has_fan_div = false;
3544                 data->temp_fixed_num = 3;
3545                 data->num_temp_alarms = 3;
3546                 data->num_temp_beeps = 6;
3547
3548                 data->ALARM_BITS = NCT6776_ALARM_BITS;
3549                 data->BEEP_BITS = NCT6776_BEEP_BITS;
3550
3551                 data->fan_from_reg = fan_from_reg13;
3552                 data->fan_from_reg_min = fan_from_reg13;
3553                 data->target_temp_mask = 0xff;
3554                 data->tolerance_mask = 0x07;
3555                 data->speed_tolerance_limit = 63;
3556
3557                 data->temp_label = nct6776_temp_label;
3558                 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3559
3560                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3561                 data->REG_VBAT = NCT6775_REG_VBAT;
3562                 data->REG_DIODE = NCT6775_REG_DIODE;
3563                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3564                 data->REG_VIN = NCT6775_REG_IN;
3565                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3566                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3567                 data->REG_TARGET = NCT6775_REG_TARGET;
3568                 data->REG_FAN = NCT6775_REG_FAN;
3569                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3570                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3571                 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3572                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3573                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3574                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3575                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_UP_TIME;
3576                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3577                 data->REG_PWM[0] = NCT6775_REG_PWM;
3578                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3579                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3580                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3581                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3582                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3583                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3584                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3585                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3586                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3587                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3588                 data->REG_CRITICAL_TEMP_TOLERANCE
3589                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3590                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3591                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3592                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3593                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3594                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3595                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3596                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3597                 data->REG_ALARM = NCT6775_REG_ALARM;
3598                 data->REG_BEEP = NCT6776_REG_BEEP;
3599
3600                 reg_temp = NCT6775_REG_TEMP;
3601                 reg_temp_mon = NCT6775_REG_TEMP_MON;
3602                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3603                 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3604                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3605                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3606                 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3607                 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3608                 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3609
3610                 break;
3611         case nct6779:
3612                 data->in_num = 15;
3613                 data->pwm_num = 5;
3614                 data->auto_pwm_num = 4;
3615                 data->has_fan_div = false;
3616                 data->temp_fixed_num = 6;
3617                 data->num_temp_alarms = 2;
3618                 data->num_temp_beeps = 2;
3619
3620                 data->ALARM_BITS = NCT6779_ALARM_BITS;
3621                 data->BEEP_BITS = NCT6779_BEEP_BITS;
3622
3623                 data->fan_from_reg = fan_from_reg13;
3624                 data->fan_from_reg_min = fan_from_reg13;
3625                 data->target_temp_mask = 0xff;
3626                 data->tolerance_mask = 0x07;
3627                 data->speed_tolerance_limit = 63;
3628
3629                 data->temp_label = nct6779_temp_label;
3630                 data->temp_label_num = NCT6779_NUM_LABELS;
3631
3632                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3633                 data->REG_VBAT = NCT6775_REG_VBAT;
3634                 data->REG_DIODE = NCT6775_REG_DIODE;
3635                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3636                 data->REG_VIN = NCT6779_REG_IN;
3637                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3638                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3639                 data->REG_TARGET = NCT6775_REG_TARGET;
3640                 data->REG_FAN = NCT6779_REG_FAN;
3641                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3642                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3643                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3644                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3645                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3646                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3647                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_UP_TIME;
3648                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3649                 data->REG_PWM[0] = NCT6775_REG_PWM;
3650                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3651                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3652                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3653                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3654                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3655                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3656                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3657                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3658                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3659                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3660                 data->REG_CRITICAL_TEMP_TOLERANCE
3661                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3662                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3663                 data->CRITICAL_PWM_ENABLE_MASK
3664                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3665                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3666                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3667                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3668                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3669                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3670                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3671                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3672                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3673                 data->REG_ALARM = NCT6779_REG_ALARM;
3674                 data->REG_BEEP = NCT6776_REG_BEEP;
3675
3676                 reg_temp = NCT6779_REG_TEMP;
3677                 reg_temp_mon = NCT6779_REG_TEMP_MON;
3678                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3679                 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3680                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3681                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3682                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3683                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3684                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3685
3686                 break;
3687         case nct6791:
3688         case nct6792:
3689         case nct6793:
3690                 data->in_num = 15;
3691                 data->pwm_num = 6;
3692                 data->auto_pwm_num = 4;
3693                 data->has_fan_div = false;
3694                 data->temp_fixed_num = 6;
3695                 data->num_temp_alarms = 2;
3696                 data->num_temp_beeps = 2;
3697
3698                 data->ALARM_BITS = NCT6791_ALARM_BITS;
3699                 data->BEEP_BITS = NCT6779_BEEP_BITS;
3700
3701                 data->fan_from_reg = fan_from_reg13;
3702                 data->fan_from_reg_min = fan_from_reg13;
3703                 data->target_temp_mask = 0xff;
3704                 data->tolerance_mask = 0x07;
3705                 data->speed_tolerance_limit = 63;
3706
3707                 data->temp_label = nct6779_temp_label;
3708                 data->temp_label_num = NCT6791_NUM_LABELS;
3709
3710                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3711                 data->REG_VBAT = NCT6775_REG_VBAT;
3712                 data->REG_DIODE = NCT6775_REG_DIODE;
3713                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3714                 data->REG_VIN = NCT6779_REG_IN;
3715                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3716                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3717                 data->REG_TARGET = NCT6775_REG_TARGET;
3718                 data->REG_FAN = NCT6779_REG_FAN;
3719                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3720                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3721                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3722                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3723                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3724                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3725                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_UP_TIME;
3726                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3727                 data->REG_PWM[0] = NCT6775_REG_PWM;
3728                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3729                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3730                 data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP;
3731                 data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE;
3732                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3733                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3734                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3735                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3736                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3737                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3738                 data->REG_CRITICAL_TEMP_TOLERANCE
3739                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3740                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3741                 data->CRITICAL_PWM_ENABLE_MASK
3742                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3743                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3744                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3745                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3746                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3747                 data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL;
3748                 data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP;
3749                 data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL;
3750                 data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE;
3751                 data->REG_ALARM = NCT6791_REG_ALARM;
3752                 if (data->kind == nct6791)
3753                         data->REG_BEEP = NCT6776_REG_BEEP;
3754                 else
3755                         data->REG_BEEP = NCT6792_REG_BEEP;
3756
3757                 reg_temp = NCT6779_REG_TEMP;
3758                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3759                 if (data->kind == nct6791) {
3760                         reg_temp_mon = NCT6779_REG_TEMP_MON;
3761                         num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3762                 } else {
3763                         reg_temp_mon = NCT6792_REG_TEMP_MON;
3764                         num_reg_temp_mon = ARRAY_SIZE(NCT6792_REG_TEMP_MON);
3765                 }
3766                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3767                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3768                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3769                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3770                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3771
3772                 break;
3773         default:
3774                 return -ENODEV;
3775         }
3776         data->have_in = (1 << data->in_num) - 1;
3777         data->have_temp = 0;
3778
3779         /*
3780          * On some boards, not all available temperature sources are monitored,
3781          * even though some of the monitoring registers are unused.
3782          * Get list of unused monitoring registers, then detect if any fan
3783          * controls are configured to use unmonitored temperature sources.
3784          * If so, assign the unmonitored temperature sources to available
3785          * monitoring registers.
3786          */
3787         mask = 0;
3788         available = 0;
3789         for (i = 0; i < num_reg_temp; i++) {
3790                 if (reg_temp[i] == 0)
3791                         continue;
3792
3793                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3794                 if (!src || (mask & (1 << src)))
3795                         available |= 1 << i;
3796
3797                 mask |= 1 << src;
3798         }
3799
3800         /*
3801          * Now find unmonitored temperature registers and enable monitoring
3802          * if additional monitoring registers are available.
3803          */
3804         add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
3805         add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
3806
3807         mask = 0;
3808         s = NUM_TEMP_FIXED;     /* First dynamic temperature attribute */
3809         for (i = 0; i < num_reg_temp; i++) {
3810                 if (reg_temp[i] == 0)
3811                         continue;
3812
3813                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3814                 if (!src || (mask & (1 << src)))
3815                         continue;
3816
3817                 if (src >= data->temp_label_num ||
3818                     !strlen(data->temp_label[src])) {
3819                         dev_info(dev,
3820                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3821                                  src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
3822                         continue;
3823                 }
3824
3825                 mask |= 1 << src;
3826
3827                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3828                 if (src <= data->temp_fixed_num) {
3829                         data->have_temp |= 1 << (src - 1);
3830                         data->have_temp_fixed |= 1 << (src - 1);
3831                         data->reg_temp[0][src - 1] = reg_temp[i];
3832                         data->reg_temp[1][src - 1] = reg_temp_over[i];
3833                         data->reg_temp[2][src - 1] = reg_temp_hyst[i];
3834                         if (reg_temp_crit_h && reg_temp_crit_h[i])
3835                                 data->reg_temp[3][src - 1] = reg_temp_crit_h[i];
3836                         else if (reg_temp_crit[src - 1])
3837                                 data->reg_temp[3][src - 1]
3838                                   = reg_temp_crit[src - 1];
3839                         if (reg_temp_crit_l && reg_temp_crit_l[i])
3840                                 data->reg_temp[4][src - 1] = reg_temp_crit_l[i];
3841                         data->reg_temp_config[src - 1] = reg_temp_config[i];
3842                         data->temp_src[src - 1] = src;
3843                         continue;
3844                 }
3845
3846                 if (s >= NUM_TEMP)
3847                         continue;
3848
3849                 /* Use dynamic index for other sources */
3850                 data->have_temp |= 1 << s;
3851                 data->reg_temp[0][s] = reg_temp[i];
3852                 data->reg_temp[1][s] = reg_temp_over[i];
3853                 data->reg_temp[2][s] = reg_temp_hyst[i];
3854                 data->reg_temp_config[s] = reg_temp_config[i];
3855                 if (reg_temp_crit_h && reg_temp_crit_h[i])
3856                         data->reg_temp[3][s] = reg_temp_crit_h[i];
3857                 else if (reg_temp_crit[src - 1])
3858                         data->reg_temp[3][s] = reg_temp_crit[src - 1];
3859                 if (reg_temp_crit_l && reg_temp_crit_l[i])
3860                         data->reg_temp[4][s] = reg_temp_crit_l[i];
3861
3862                 data->temp_src[s] = src;
3863                 s++;
3864         }
3865
3866         /*
3867          * Repeat with temperatures used for fan control.
3868          * This set of registers does not support limits.
3869          */
3870         for (i = 0; i < num_reg_temp_mon; i++) {
3871                 if (reg_temp_mon[i] == 0)
3872                         continue;
3873
3874                 src = nct6775_read_value(data, data->REG_TEMP_SEL[i]) & 0x1f;
3875                 if (!src || (mask & (1 << src)))
3876                         continue;
3877
3878                 if (src >= data->temp_label_num ||
3879                     !strlen(data->temp_label[src])) {
3880                         dev_info(dev,
3881                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3882                                  src, i, data->REG_TEMP_SEL[i],
3883                                  reg_temp_mon[i]);
3884                         continue;
3885                 }
3886
3887                 mask |= 1 << src;
3888
3889                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3890                 if (src <= data->temp_fixed_num) {
3891                         if (data->have_temp & (1 << (src - 1)))
3892                                 continue;
3893                         data->have_temp |= 1 << (src - 1);
3894                         data->have_temp_fixed |= 1 << (src - 1);
3895                         data->reg_temp[0][src - 1] = reg_temp_mon[i];
3896                         data->temp_src[src - 1] = src;
3897                         continue;
3898                 }
3899
3900                 if (s >= NUM_TEMP)
3901                         continue;
3902
3903                 /* Use dynamic index for other sources */
3904                 data->have_temp |= 1 << s;
3905                 data->reg_temp[0][s] = reg_temp_mon[i];
3906                 data->temp_src[s] = src;
3907                 s++;
3908         }
3909
3910 #ifdef USE_ALTERNATE
3911         /*
3912          * Go through the list of alternate temp registers and enable
3913          * if possible.
3914          * The temperature is already monitored if the respective bit in <mask>
3915          * is set.
3916          */
3917         for (i = 0; i < data->temp_label_num - 1; i++) {
3918                 if (!reg_temp_alternate[i])
3919                         continue;
3920                 if (mask & (1 << (i + 1)))
3921                         continue;
3922                 if (i < data->temp_fixed_num) {
3923                         if (data->have_temp & (1 << i))
3924                                 continue;
3925                         data->have_temp |= 1 << i;
3926                         data->have_temp_fixed |= 1 << i;
3927                         data->reg_temp[0][i] = reg_temp_alternate[i];
3928                         if (i < num_reg_temp) {
3929                                 data->reg_temp[1][i] = reg_temp_over[i];
3930                                 data->reg_temp[2][i] = reg_temp_hyst[i];
3931                         }
3932                         data->temp_src[i] = i + 1;
3933                         continue;
3934                 }
3935
3936                 if (s >= NUM_TEMP)      /* Abort if no more space */
3937                         break;
3938
3939                 data->have_temp |= 1 << s;
3940                 data->reg_temp[0][s] = reg_temp_alternate[i];
3941                 data->temp_src[s] = i + 1;
3942                 s++;
3943         }
3944 #endif /* USE_ALTERNATE */
3945
3946         /* Initialize the chip */
3947         nct6775_init_device(data);
3948
3949         err = superio_enter(sio_data->sioreg);
3950         if (err)
3951                 return err;
3952
3953         cr2a = superio_inb(sio_data->sioreg, 0x2a);
3954         switch (data->kind) {
3955         case nct6775:
3956                 data->have_vid = (cr2a & 0x40);
3957                 break;
3958         case nct6776:
3959                 data->have_vid = (cr2a & 0x60) == 0x40;
3960                 break;
3961         case nct6106:
3962         case nct6779:
3963         case nct6791:
3964         case nct6792:
3965         case nct6793:
3966                 break;
3967         }
3968
3969         /*
3970          * Read VID value
3971          * We can get the VID input values directly at logical device D 0xe3.
3972          */
3973         if (data->have_vid) {
3974                 superio_select(sio_data->sioreg, NCT6775_LD_VID);
3975                 data->vid = superio_inb(sio_data->sioreg, 0xe3);
3976                 data->vrm = vid_which_vrm();
3977         }
3978
3979         if (fan_debounce) {
3980                 u8 tmp;
3981
3982                 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3983                 tmp = superio_inb(sio_data->sioreg,
3984                                   NCT6775_REG_CR_FAN_DEBOUNCE);
3985                 switch (data->kind) {
3986                 case nct6106:
3987                         tmp |= 0xe0;
3988                         break;
3989                 case nct6775:
3990                         tmp |= 0x1e;
3991                         break;
3992                 case nct6776:
3993                 case nct6779:
3994                         tmp |= 0x3e;
3995                         break;
3996                 case nct6791:
3997                 case nct6792:
3998                 case nct6793:
3999                         tmp |= 0x7e;
4000                         break;
4001                 }
4002                 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
4003                              tmp);
4004                 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
4005                          data->name);
4006         }
4007
4008         nct6775_check_fan_inputs(data);
4009
4010         superio_exit(sio_data->sioreg);
4011
4012         /* Read fan clock dividers immediately */
4013         nct6775_init_fan_common(dev, data);
4014
4015         /* Register sysfs hooks */
4016         group = nct6775_create_attr_group(dev, &nct6775_pwm_template_group,
4017                                           data->pwm_num);
4018         if (IS_ERR(group))
4019                 return PTR_ERR(group);
4020
4021         data->groups[num_attr_groups++] = group;
4022
4023         group = nct6775_create_attr_group(dev, &nct6775_in_template_group,
4024                                           fls(data->have_in));
4025         if (IS_ERR(group))
4026                 return PTR_ERR(group);
4027
4028         data->groups[num_attr_groups++] = group;
4029
4030         group = nct6775_create_attr_group(dev, &nct6775_fan_template_group,
4031                                           fls(data->has_fan));
4032         if (IS_ERR(group))
4033                 return PTR_ERR(group);
4034
4035         data->groups[num_attr_groups++] = group;
4036
4037         group = nct6775_create_attr_group(dev, &nct6775_temp_template_group,
4038                                           fls(data->have_temp));
4039         if (IS_ERR(group))
4040                 return PTR_ERR(group);
4041
4042         data->groups[num_attr_groups++] = group;
4043         data->groups[num_attr_groups++] = &nct6775_group_other;
4044
4045 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4046         err = sysfs_create_groups(&dev->kobj, data->groups);
4047         if (err < 0)
4048                 return err;
4049         hwmon_dev = hwmon_device_register(dev);
4050         if (IS_ERR(hwmon_dev)) {
4051                 sysfs_remove_groups(&dev->kobj, data->groups);
4052                 return PTR_ERR(hwmon_dev);
4053         }
4054         data->hwmon_dev = hwmon_dev;
4055 #else
4056         hwmon_dev = devm_hwmon_device_register_with_groups(dev, data->name,
4057                                                            data, data->groups);
4058 #endif
4059         return PTR_ERR_OR_ZERO(hwmon_dev);
4060 }
4061
4062 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4063 static int nct6775_remove(struct platform_device *pdev)
4064 {
4065         struct nct6775_data *data = platform_get_drvdata(pdev);
4066
4067         hwmon_device_unregister(data->hwmon_dev);
4068         sysfs_remove_groups(&pdev->dev.kobj, data->groups);
4069         return 0;
4070 }
4071 #endif
4072
4073 static void nct6791_enable_io_mapping(int sioaddr)
4074 {
4075         int val;
4076
4077         val = superio_inb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE);
4078         if (val & 0x10) {
4079                 pr_info("Enabling hardware monitor logical device mappings.\n");
4080                 superio_outb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE,
4081                              val & ~0x10);
4082         }
4083 }
4084
4085 static int __maybe_unused nct6775_suspend(struct device *dev)
4086 {
4087         struct nct6775_data *data = nct6775_update_device(dev);
4088
4089         mutex_lock(&data->update_lock);
4090         data->vbat = nct6775_read_value(data, data->REG_VBAT);
4091         if (data->kind == nct6775) {
4092                 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
4093                 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
4094         }
4095         mutex_unlock(&data->update_lock);
4096
4097         return 0;
4098 }
4099
4100 static int __maybe_unused nct6775_resume(struct device *dev)
4101 {
4102         struct nct6775_data *data = dev_get_drvdata(dev);
4103         int sioreg = data->sioreg;
4104         int i, j, err = 0;
4105         u8 reg;
4106
4107         mutex_lock(&data->update_lock);
4108         data->bank = 0xff;              /* Force initial bank selection */
4109
4110         err = superio_enter(sioreg);
4111         if (err)
4112                 goto abort;
4113
4114         superio_select(sioreg, NCT6775_LD_HWM);
4115         reg = superio_inb(sioreg, SIO_REG_ENABLE);
4116         if (reg != data->sio_reg_enable)
4117                 superio_outb(sioreg, SIO_REG_ENABLE, data->sio_reg_enable);
4118
4119         if (data->kind == nct6791 || data->kind == nct6792 ||
4120             data->kind == nct6793)
4121                 nct6791_enable_io_mapping(sioreg);
4122
4123         superio_exit(sioreg);
4124
4125         /* Restore limits */
4126         for (i = 0; i < data->in_num; i++) {
4127                 if (!(data->have_in & (1 << i)))
4128                         continue;
4129
4130                 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
4131                                     data->in[i][1]);
4132                 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
4133                                     data->in[i][2]);
4134         }
4135
4136         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
4137                 if (!(data->has_fan_min & (1 << i)))
4138                         continue;
4139
4140                 nct6775_write_value(data, data->REG_FAN_MIN[i],
4141                                     data->fan_min[i]);
4142         }
4143
4144         for (i = 0; i < NUM_TEMP; i++) {
4145                 if (!(data->have_temp & (1 << i)))
4146                         continue;
4147
4148                 for (j = 1; j < ARRAY_SIZE(data->reg_temp); j++)
4149                         if (data->reg_temp[j][i])
4150                                 nct6775_write_temp(data, data->reg_temp[j][i],
4151                                                    data->temp[j][i]);
4152         }
4153
4154         /* Restore other settings */
4155         nct6775_write_value(data, data->REG_VBAT, data->vbat);
4156         if (data->kind == nct6775) {
4157                 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
4158                 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
4159         }
4160
4161 abort:
4162         /* Force re-reading all values */
4163         data->valid = false;
4164         mutex_unlock(&data->update_lock);
4165
4166         return err;
4167 }
4168
4169 static SIMPLE_DEV_PM_OPS(nct6775_dev_pm_ops, nct6775_suspend, nct6775_resume);
4170
4171 static struct platform_driver nct6775_driver = {
4172         .driver = {
4173                 .owner  = THIS_MODULE,
4174                 .name   = DRVNAME,
4175                 .pm     = &nct6775_dev_pm_ops,
4176         },
4177         .probe          = nct6775_probe,
4178 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4179         .remove         = nct6775_remove,
4180 #endif
4181 };
4182
4183 /* nct6775_find() looks for a '627 in the Super-I/O config space */
4184 static int __init nct6775_find(int sioaddr, struct nct6775_sio_data *sio_data)
4185 {
4186         u16 val;
4187         int err;
4188         int addr;
4189
4190         err = superio_enter(sioaddr);
4191         if (err)
4192                 return err;
4193
4194         if (force_id)
4195                 val = force_id;
4196         else
4197                 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
4198                     | superio_inb(sioaddr, SIO_REG_DEVID + 1);
4199         switch (val & SIO_ID_MASK) {
4200         case SIO_NCT6106_ID:
4201                 sio_data->kind = nct6106;
4202                 break;
4203         case SIO_NCT6775_ID:
4204                 sio_data->kind = nct6775;
4205                 break;
4206         case SIO_NCT6776_ID:
4207                 sio_data->kind = nct6776;
4208                 break;
4209         case SIO_NCT6779_ID:
4210                 sio_data->kind = nct6779;
4211                 break;
4212         case SIO_NCT6791_ID:
4213                 sio_data->kind = nct6791;
4214                 break;
4215         case SIO_NCT6792_ID:
4216                 sio_data->kind = nct6792;
4217                 break;
4218         case SIO_NCT6793_ID:
4219                 sio_data->kind = nct6793;
4220                 break;
4221         default:
4222                 if (val != 0xffff)
4223                         pr_debug("unsupported chip ID: 0x%04x\n", val);
4224                 superio_exit(sioaddr);
4225                 return -ENODEV;
4226         }
4227
4228         /* We have a known chip, find the HWM I/O address */
4229         superio_select(sioaddr, NCT6775_LD_HWM);
4230         val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
4231             | superio_inb(sioaddr, SIO_REG_ADDR + 1);
4232         addr = val & IOREGION_ALIGNMENT;
4233         if (addr == 0) {
4234                 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
4235                 superio_exit(sioaddr);
4236                 return -ENODEV;
4237         }
4238
4239         /* Activate logical device if needed */
4240         val = superio_inb(sioaddr, SIO_REG_ENABLE);
4241         if (!(val & 0x01)) {
4242                 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
4243                 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
4244         }
4245
4246         if (sio_data->kind == nct6791 || sio_data->kind == nct6792 ||
4247             sio_data->kind == nct6793)
4248                 nct6791_enable_io_mapping(sioaddr);
4249
4250         superio_exit(sioaddr);
4251         pr_info("Found %s or compatible chip at %#x:%#x\n",
4252                 nct6775_sio_names[sio_data->kind], sioaddr, addr);
4253         sio_data->sioreg = sioaddr;
4254
4255         return addr;
4256 }
4257
4258 /*
4259  * when Super-I/O functions move to a separate file, the Super-I/O
4260  * bus will manage the lifetime of the device and this module will only keep
4261  * track of the nct6775 driver. But since we use platform_device_alloc(), we
4262  * must keep track of the device
4263  */
4264 static struct platform_device *pdev[2];
4265
4266 static int __init sensors_nct6775_init(void)
4267 {
4268         int i, err;
4269         bool found = false;
4270         int address;
4271         struct resource res;
4272         struct nct6775_sio_data sio_data;
4273         int sioaddr[2] = { 0x2e, 0x4e };
4274
4275         err = platform_driver_register(&nct6775_driver);
4276         if (err)
4277                 return err;
4278
4279         /*
4280          * initialize sio_data->kind and sio_data->sioreg.
4281          *
4282          * when Super-I/O functions move to a separate file, the Super-I/O
4283          * driver will probe 0x2e and 0x4e and auto-detect the presence of a
4284          * nct6775 hardware monitor, and call probe()
4285          */
4286         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4287                 address = nct6775_find(sioaddr[i], &sio_data);
4288                 if (address <= 0)
4289                         continue;
4290
4291                 found = true;
4292
4293                 pdev[i] = platform_device_alloc(DRVNAME, address);
4294                 if (!pdev[i]) {
4295                         err = -ENOMEM;
4296                         goto exit_device_unregister;
4297                 }
4298
4299                 err = platform_device_add_data(pdev[i], &sio_data,
4300                                                sizeof(struct nct6775_sio_data));
4301                 if (err)
4302                         goto exit_device_put;
4303
4304                 memset(&res, 0, sizeof(res));
4305                 res.name = DRVNAME;
4306                 res.start = address + IOREGION_OFFSET;
4307                 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
4308                 res.flags = IORESOURCE_IO;
4309
4310                 err = acpi_check_resource_conflict(&res);
4311                 if (err) {
4312                         platform_device_put(pdev[i]);
4313                         pdev[i] = NULL;
4314                         continue;
4315                 }
4316
4317                 err = platform_device_add_resources(pdev[i], &res, 1);
4318                 if (err)
4319                         goto exit_device_put;
4320
4321                 /* platform_device_add calls probe() */
4322                 err = platform_device_add(pdev[i]);
4323                 if (err)
4324                         goto exit_device_put;
4325         }
4326         if (!found) {
4327                 err = -ENODEV;
4328                 goto exit_unregister;
4329         }
4330
4331         return 0;
4332
4333 exit_device_put:
4334         platform_device_put(pdev[i]);
4335 exit_device_unregister:
4336         while (--i >= 0) {
4337                 if (pdev[i])
4338                         platform_device_unregister(pdev[i]);
4339         }
4340 exit_unregister:
4341         platform_driver_unregister(&nct6775_driver);
4342         return err;
4343 }
4344
4345 static void __exit sensors_nct6775_exit(void)
4346 {
4347         int i;
4348
4349         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4350                 if (pdev[i])
4351                         platform_device_unregister(pdev[i]);
4352         }
4353         platform_driver_unregister(&nct6775_driver);
4354 }
4355
4356 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4357 MODULE_DESCRIPTION("Driver for NCT6775F and compatible chips");
4358 MODULE_LICENSE("GPL");
4359
4360 module_init(sensors_nct6775_init);
4361 module_exit(sensors_nct6775_exit);