git.sur5r.net Git - groeck-nct6775/blob - nct6775.c

   1 /*
   2  * nct6775 - Driver for the hardware monitoring functionality of
   3  *             Nuvoton NCT677x Super-I/O chips
   4  *
   5  * Copyright (C) 2012  Guenter Roeck <linux@roeck-us.net>
   6  *
   7  * Derived from w83627ehf driver
   8  * Copyright (C) 2005-2012  Jean Delvare <jdelvare@suse.de>
   9  * Copyright (C) 2006  Yuan Mu (Winbond),
  10  *                     Rudolf Marek <r.marek@assembler.cz>
  11  *                     David Hubbard <david.c.hubbard@gmail.com>
  12  *                     Daniel J Blueman <daniel.blueman@gmail.com>
  13  * Copyright (C) 2010  Sheng-Yuan Huang (Nuvoton) (PS00)
  14  *
  15  * Shamelessly ripped from the w83627hf driver
  16  * Copyright (C) 2003  Mark Studebaker
  17  *
  18  * This program is free software; you can redistribute it and/or modify
  19  * it under the terms of the GNU General Public License as published by
  20  * the Free Software Foundation; either version 2 of the License, or
  21  * (at your option) any later version.
  22  *
  23  * This program is distributed in the hope that it will be useful,
  24  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26  * GNU General Public License for more details.
  27  *
  28  * You should have received a copy of the GNU General Public License
  29  * along with this program; if not, write to the Free Software
  30  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  31  *
  32  *
  33  * Supports the following chips:
  34  *
  35  * Chip        #vin    #fan    #pwm    #temp  chip IDs       man ID
  36  * nct6106d     9      3       3       6+3    0xc450 0xc1    0x5ca3
  37  * nct6775f     9      4       3       6+3    0xb470 0xc1    0x5ca3
  38  * nct6776f     9      5       3       6+3    0xc330 0xc1    0x5ca3
  39  * nct6779d    15      5       5       2+6    0xc560 0xc1    0x5ca3
  40  * nct6791d    15      6       6       2+6    0xc800 0xc1    0x5ca3
  41  * nct6792d    15      6       6       2+6    0xc910 0xc1    0x5ca3
  42  * nct6793d    15      6       6       2+6    0xd120 0xc1    0x5ca3
  43  * nct6795d    14      6       6       2+6    0xd350 0xc1    0x5ca3
  44  *
  45  * #temp lists the number of monitored temperature sources (first value) plus
  46  * the number of directly connectable temperature sensors (second value).
  47  */
  48
  49 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  50
  51 #include <linux/module.h>
  52 #include <linux/init.h>
  53 #include <linux/slab.h>
  54 #include <linux/jiffies.h>
  55 #include <linux/platform_device.h>
  56 #include <linux/hwmon.h>
  57 #include <linux/hwmon-sysfs.h>
  58 #include <linux/hwmon-vid.h>
  59 #include <linux/err.h>
  60 #include <linux/mutex.h>
  61 #include <linux/acpi.h>
  62 #include <linux/bitops.h>
  63 #include <linux/dmi.h>
  64 #include <linux/io.h>
  65 #include <linux/debugfs.h>
  66 #include "lm75.h"
  67 #include "compat.h"
  68
  69 #define USE_ALTERNATE
  70
  71 enum kinds { nct6106, nct6775, nct6776, nct6779, nct6791, nct6792, nct6793,
  72              nct6795 };
  73
  74 /* used to set data->name = nct6775_device_names[data->sio_kind] */
  75 static const char * const nct6775_device_names[] = {
  76         "nct6106",
  77         "nct6775",
  78         "nct6776",
  79         "nct6779",
  80         "nct6791",
  81         "nct6792",
  82         "nct6793",
  83         "nct6795",
  84 };
  85
  86 static const char * const nct6775_sio_names[] __initconst = {
  87         "NCT6106D",
  88         "NCT6775F",
  89         "NCT6776D/F",
  90         "NCT6779D",
  91         "NCT6791D",
  92         "NCT6792D",
  93         "NCT6793D",
  94         "NCT6795D",
  95 };
  96
  97 static unsigned short force_id;
  98 module_param(force_id, ushort, 0);
  99 MODULE_PARM_DESC(force_id, "Override the detected device ID");
 100
 101 static unsigned short fan_debounce;
 102 module_param(fan_debounce, ushort, 0);
 103 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
 104
 105 #define DRVNAME "nct6775"
 106
 107 /*
 108  * Super-I/O constants and functions
 109  */
 110
 111 #define NCT6775_LD_ACPI         0x0a
 112 #define NCT6775_LD_HWM          0x0b
 113 #define NCT6775_LD_VID          0x0d
 114 #define NCT6775_LD_12           0x12
 115
 116 #define SIO_REG_LDSEL           0x07    /* Logical device select */
 117 #define SIO_REG_DEVID           0x20    /* Device ID (2 bytes) */
 118 #define SIO_REG_ENABLE          0x30    /* Logical device enable */
 119 #define SIO_REG_ADDR            0x60    /* Logical device address (2 bytes) */
 120
 121 #define SIO_NCT6106_ID          0xc450
 122 #define SIO_NCT6775_ID          0xb470
 123 #define SIO_NCT6776_ID          0xc330
 124 #define SIO_NCT6779_ID          0xc560
 125 #define SIO_NCT6791_ID          0xc800
 126 #define SIO_NCT6792_ID          0xc910
 127 #define SIO_NCT6793_ID          0xd120
 128 #define SIO_NCT6795_ID          0xd350
 129 #define SIO_ID_MASK             0xFFF0
 130
 131 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
 132
 133 static inline void
 134 superio_outb(int ioreg, int reg, int val)
 135 {
 136         outb(reg, ioreg);
 137         outb(val, ioreg + 1);
 138 }
 139
 140 static inline int
 141 superio_inb(int ioreg, int reg)
 142 {
 143         outb(reg, ioreg);
 144         return inb(ioreg + 1);
 145 }
 146
 147 static inline void
 148 superio_select(int ioreg, int ld)
 149 {
 150         outb(SIO_REG_LDSEL, ioreg);
 151         outb(ld, ioreg + 1);
 152 }
 153
 154 static inline int
 155 superio_enter(int ioreg)
 156 {
 157         /*
 158          * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
 159          */
 160         if (!request_muxed_region(ioreg, 2, DRVNAME))
 161                 return -EBUSY;
 162
 163         outb(0x87, ioreg);
 164         outb(0x87, ioreg);
 165
 166         return 0;
 167 }
 168
 169 static inline void
 170 superio_exit(int ioreg)
 171 {
 172         outb(0xaa, ioreg);
 173         outb(0x02, ioreg);
 174         outb(0x02, ioreg + 1);
 175         release_region(ioreg, 2);
 176 }
 177
 178 /*
 179  * ISA constants
 180  */
 181
 182 #define IOREGION_ALIGNMENT      (~7)
 183 #define IOREGION_OFFSET         5
 184 #define IOREGION_LENGTH         2
 185 #define ADDR_REG_OFFSET         0
 186 #define DATA_REG_OFFSET         1
 187
 188 #define NCT6775_REG_BANK        0x4E
 189 #define NCT6775_REG_CONFIG      0x40
 190
 191 /*
 192  * Not currently used:
 193  * REG_MAN_ID has the value 0x5ca3 for all supported chips.
 194  * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
 195  * REG_MAN_ID is at port 0x4f
 196  * REG_CHIP_ID is at port 0x58
 197  */
 198
 199 #define NUM_TEMP        10      /* Max number of temp attribute sets w/ limits*/
 200 #define NUM_TEMP_FIXED  6       /* Max number of fixed temp attribute sets */
 201
 202 #define NUM_REG_ALARM   7       /* Max number of alarm registers */
 203 #define NUM_REG_BEEP    5       /* Max number of beep registers */
 204
 205 #define NUM_FAN         6
 206
 207 #define TEMP_SOURCE_VIRTUAL     0x1f
 208
 209 /* Common and NCT6775 specific data */
 210
 211 /* Voltage min/max registers for nr=7..14 are in bank 5 */
 212
 213 static const u16 NCT6775_REG_IN_MAX[] = {
 214         0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
 215         0x55c, 0x55e, 0x560, 0x562 };
 216 static const u16 NCT6775_REG_IN_MIN[] = {
 217         0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
 218         0x55d, 0x55f, 0x561, 0x563 };
 219 static const u16 NCT6775_REG_IN[] = {
 220         0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
 221 };
 222
 223 #define NCT6775_REG_VBAT                0x5D
 224 #define NCT6775_REG_DIODE               0x5E
 225 #define NCT6775_DIODE_MASK              0x02
 226
 227 #define NCT6775_REG_FANDIV1             0x506
 228 #define NCT6775_REG_FANDIV2             0x507
 229
 230 #define NCT6775_REG_CR_FAN_DEBOUNCE     0xf0
 231
 232 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
 233
 234 /* 0..15 voltages, 16..23 fans, 24..29 temperatures, 30..31 intrusion */
 235
 236 static const s8 NCT6775_ALARM_BITS[] = {
 237         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 238         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 239         -1,                             /* unused */
 240         6, 7, 11, -1, -1,               /* fan1..fan5 */
 241         -1, -1, -1,                     /* unused */
 242         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 243         12, -1 };                       /* intrusion0, intrusion1 */
 244
 245 #define FAN_ALARM_BASE          16
 246 #define TEMP_ALARM_BASE         24
 247 #define INTRUSION_ALARM_BASE    30
 248
 249 static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e };
 250
 251 /*
 252  * 0..14 voltages, 15 global beep enable, 16..23 fans, 24..29 temperatures,
 253  * 30..31 intrusion
 254  */
 255 static const s8 NCT6775_BEEP_BITS[] = {
 256         0, 1, 2, 3, 8, 9, 10, 16,       /* in0.. in7 */
 257         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 258         21,                             /* global beep enable */
 259         6, 7, 11, 28, -1,               /* fan1..fan5 */
 260         -1, -1, -1,                     /* unused */
 261         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 262         12, -1 };                       /* intrusion0, intrusion1 */
 263
 264 #define BEEP_ENABLE_BASE                15
 265
 266 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
 267 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
 268
 269 /* DC or PWM output fan configuration */
 270 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
 271 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
 272
 273 /* Advanced Fan control, some values are common for all fans */
 274
 275 static const u16 NCT6775_REG_TARGET[] = {
 276         0x101, 0x201, 0x301, 0x801, 0x901, 0xa01 };
 277 static const u16 NCT6775_REG_FAN_MODE[] = {
 278         0x102, 0x202, 0x302, 0x802, 0x902, 0xa02 };
 279 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
 280         0x103, 0x203, 0x303, 0x803, 0x903, 0xa03 };
 281 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
 282         0x104, 0x204, 0x304, 0x804, 0x904, 0xa04 };
 283 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
 284         0x105, 0x205, 0x305, 0x805, 0x905, 0xa05 };
 285 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = {
 286         0x106, 0x206, 0x306, 0x806, 0x906, 0xa06 };
 287 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
 288 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
 289
 290 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
 291         0x107, 0x207, 0x307, 0x807, 0x907, 0xa07 };
 292 static const u16 NCT6775_REG_PWM[] = {
 293         0x109, 0x209, 0x309, 0x809, 0x909, 0xa09 };
 294 static const u16 NCT6775_REG_PWM_READ[] = {
 295         0x01, 0x03, 0x11, 0x13, 0x15, 0xa09 };
 296
 297 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
 298 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
 299 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
 300 static const u16 NCT6775_FAN_PULSE_SHIFT[] = { 0, 0, 0, 0, 0, 0 };
 301
 302 static const u16 NCT6775_REG_TEMP[] = {
 303         0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
 304
 305 static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77 };
 306
 307 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 308         0, 0x152, 0x252, 0x628, 0x629, 0x62A };
 309 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 310         0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
 311 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 312         0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
 313
 314 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 315         0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
 316
 317 static const u16 NCT6775_REG_TEMP_SEL[] = {
 318         0x100, 0x200, 0x300, 0x800, 0x900, 0xa00 };
 319
 320 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
 321         0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 };
 322 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
 323         0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a };
 324 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
 325         0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b };
 326 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
 327         0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c };
 328 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
 329         0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d };
 330
 331 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
 332
 333 static const u16 NCT6775_REG_AUTO_TEMP[] = {
 334         0x121, 0x221, 0x321, 0x821, 0x921, 0xa21 };
 335 static const u16 NCT6775_REG_AUTO_PWM[] = {
 336         0x127, 0x227, 0x327, 0x827, 0x927, 0xa27 };
 337
 338 #define NCT6775_AUTO_TEMP(data, nr, p)  ((data)->REG_AUTO_TEMP[nr] + (p))
 339 #define NCT6775_AUTO_PWM(data, nr, p)   ((data)->REG_AUTO_PWM[nr] + (p))
 340
 341 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
 342
 343 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
 344         0x135, 0x235, 0x335, 0x835, 0x935, 0xa35 };
 345 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
 346         0x138, 0x238, 0x338, 0x838, 0x938, 0xa38 };
 347
 348 static const char *const nct6775_temp_label[] = {
 349         "",
 350         "SYSTIN",
 351         "CPUTIN",
 352         "AUXTIN",
 353         "AMD SB-TSI",
 354         "PECI Agent 0",
 355         "PECI Agent 1",
 356         "PECI Agent 2",
 357         "PECI Agent 3",
 358         "PECI Agent 4",
 359         "PECI Agent 5",
 360         "PECI Agent 6",
 361         "PECI Agent 7",
 362         "PCH_CHIP_CPU_MAX_TEMP",
 363         "PCH_CHIP_TEMP",
 364         "PCH_CPU_TEMP",
 365         "PCH_MCH_TEMP",
 366         "PCH_DIM0_TEMP",
 367         "PCH_DIM1_TEMP",
 368         "PCH_DIM2_TEMP",
 369         "PCH_DIM3_TEMP"
 370 };
 371
 372 #define NCT6775_TEMP_MASK       0x001ffffe
 373
 374 static const u16 NCT6775_REG_TEMP_ALTERNATE[32] = {
 375         [13] = 0x661,
 376         [14] = 0x662,
 377         [15] = 0x664,
 378 };
 379
 380 static const u16 NCT6775_REG_TEMP_CRIT[32] = {
 381         [4] = 0xa00,
 382         [5] = 0xa01,
 383         [6] = 0xa02,
 384         [7] = 0xa03,
 385         [8] = 0xa04,
 386         [9] = 0xa05,
 387         [10] = 0xa06,
 388         [11] = 0xa07
 389 };
 390
 391 /* NCT6776 specific data */
 392
 393 /* STEP_UP_TIME and STEP_DOWN_TIME regs are swapped for all chips but NCT6775 */
 394 #define NCT6776_REG_FAN_STEP_UP_TIME NCT6775_REG_FAN_STEP_DOWN_TIME
 395 #define NCT6776_REG_FAN_STEP_DOWN_TIME NCT6775_REG_FAN_STEP_UP_TIME
 396
 397 static const s8 NCT6776_ALARM_BITS[] = {
 398         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 399         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 400         -1,                             /* unused */
 401         6, 7, 11, 10, 23,               /* fan1..fan5 */
 402         -1, -1, -1,                     /* unused */
 403         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 404         12, 9 };                        /* intrusion0, intrusion1 */
 405
 406 static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5 };
 407
 408 static const s8 NCT6776_BEEP_BITS[] = {
 409         0, 1, 2, 3, 4, 5, 6, 7,         /* in0.. in7 */
 410         8, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 411         24,                             /* global beep enable */
 412         25, 26, 27, 28, 29,             /* fan1..fan5 */
 413         -1, -1, -1,                     /* unused */
 414         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 415         30, 31 };                       /* intrusion0, intrusion1 */
 416
 417 static const u16 NCT6776_REG_TOLERANCE_H[] = {
 418         0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c };
 419
 420 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0 };
 421 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0 };
 422
 423 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
 424 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
 425
 426 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
 427         0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e };
 428
 429 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 430         0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
 431
 432 static const char *const nct6776_temp_label[] = {
 433         "",
 434         "SYSTIN",
 435         "CPUTIN",
 436         "AUXTIN",
 437         "SMBUSMASTER 0",
 438         "SMBUSMASTER 1",
 439         "SMBUSMASTER 2",
 440         "SMBUSMASTER 3",
 441         "SMBUSMASTER 4",
 442         "SMBUSMASTER 5",
 443         "SMBUSMASTER 6",
 444         "SMBUSMASTER 7",
 445         "PECI Agent 0",
 446         "PECI Agent 1",
 447         "PCH_CHIP_CPU_MAX_TEMP",
 448         "PCH_CHIP_TEMP",
 449         "PCH_CPU_TEMP",
 450         "PCH_MCH_TEMP",
 451         "PCH_DIM0_TEMP",
 452         "PCH_DIM1_TEMP",
 453         "PCH_DIM2_TEMP",
 454         "PCH_DIM3_TEMP",
 455         "BYTE_TEMP"
 456 };
 457
 458 #define NCT6776_TEMP_MASK       0x007ffffe
 459
 460 static const u16 NCT6776_REG_TEMP_ALTERNATE[32] = {
 461         [14] = 0x401,
 462         [15] = 0x402,
 463         [16] = 0x404,
 464 };
 465
 466 static const u16 NCT6776_REG_TEMP_CRIT[32] = {
 467         [11] = 0x709,
 468         [12] = 0x70a,
 469 };
 470
 471 /* NCT6779 specific data */
 472
 473 static const u16 NCT6779_REG_IN[] = {
 474         0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
 475         0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
 476
 477 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
 478         0x459, 0x45A, 0x45B, 0x568 };
 479
 480 static const s8 NCT6779_ALARM_BITS[] = {
 481         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 482         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 483         -1,                             /* unused */
 484         6, 7, 11, 10, 23,               /* fan1..fan5 */
 485         -1, -1, -1,                     /* unused */
 486         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 487         12, 9 };                        /* intrusion0, intrusion1 */
 488
 489 static const s8 NCT6779_BEEP_BITS[] = {
 490         0, 1, 2, 3, 4, 5, 6, 7,         /* in0.. in7 */
 491         8, 9, 10, 11, 12, 13, 14,       /* in8..in14 */
 492         24,                             /* global beep enable */
 493         25, 26, 27, 28, 29,             /* fan1..fan5 */
 494         -1, -1, -1,                     /* unused */
 495         16, 17, -1, -1, -1, -1,         /* temp1..temp6 */
 496         30, 31 };                       /* intrusion0, intrusion1 */
 497
 498 static const u16 NCT6779_REG_FAN[] = {
 499         0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8, 0x4ba };
 500 static const u16 NCT6779_REG_FAN_PULSES[] = {
 501         0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
 502
 503 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
 504         0x136, 0x236, 0x336, 0x836, 0x936, 0xa36 };
 505 #define NCT6779_CRITICAL_PWM_ENABLE_MASK        0x01
 506 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
 507         0x137, 0x237, 0x337, 0x837, 0x937, 0xa37 };
 508
 509 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
 510 static const u16 NCT6779_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b };
 511 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 512         0x18, 0x152 };
 513 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 514         0x3a, 0x153 };
 515 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 516         0x39, 0x155 };
 517
 518 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
 519         0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
 520
 521 static const char *const nct6779_temp_label[] = {
 522         "",
 523         "SYSTIN",
 524         "CPUTIN",
 525         "AUXTIN0",
 526         "AUXTIN1",
 527         "AUXTIN2",
 528         "AUXTIN3",
 529         "",
 530         "SMBUSMASTER 0",
 531         "SMBUSMASTER 1",
 532         "SMBUSMASTER 2",
 533         "SMBUSMASTER 3",
 534         "SMBUSMASTER 4",
 535         "SMBUSMASTER 5",
 536         "SMBUSMASTER 6",
 537         "SMBUSMASTER 7",
 538         "PECI Agent 0",
 539         "PECI Agent 1",
 540         "PCH_CHIP_CPU_MAX_TEMP",
 541         "PCH_CHIP_TEMP",
 542         "PCH_CPU_TEMP",
 543         "PCH_MCH_TEMP",
 544         "PCH_DIM0_TEMP",
 545         "PCH_DIM1_TEMP",
 546         "PCH_DIM2_TEMP",
 547         "PCH_DIM3_TEMP",
 548         "BYTE_TEMP",
 549         "",
 550         "",
 551         "",
 552         "",
 553         "Virtual_TEMP"
 554 };
 555
 556 #define NCT6779_TEMP_MASK       0x07ffff7e
 557 #define NCT6791_TEMP_MASK       0x87ffff7e
 558
 559 static const u16 NCT6779_REG_TEMP_ALTERNATE[32]
 560         = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
 561             0, 0, 0, 0, 0, 0, 0, 0,
 562             0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
 563             0x408, 0 };
 564
 565 static const u16 NCT6779_REG_TEMP_CRIT[32] = {
 566         [15] = 0x709,
 567         [16] = 0x70a,
 568 };
 569
 570 /* NCT6791 specific data */
 571
 572 #define NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE     0x28
 573
 574 static const u16 NCT6791_REG_WEIGHT_TEMP_SEL[6] = { 0, 0x239 };
 575 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP[6] = { 0, 0x23a };
 576 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP_TOL[6] = { 0, 0x23b };
 577 static const u16 NCT6791_REG_WEIGHT_DUTY_STEP[6] = { 0, 0x23c };
 578 static const u16 NCT6791_REG_WEIGHT_TEMP_BASE[6] = { 0, 0x23d };
 579 static const u16 NCT6791_REG_WEIGHT_DUTY_BASE[6] = { 0, 0x23e };
 580
 581 static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = {
 582         0x459, 0x45A, 0x45B, 0x568, 0x45D };
 583
 584 static const s8 NCT6791_ALARM_BITS[] = {
 585         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 586         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 587         -1,                             /* unused */
 588         6, 7, 11, 10, 23, 33,           /* fan1..fan6 */
 589         -1, -1,                         /* unused */
 590         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 591         12, 9 };                        /* intrusion0, intrusion1 */
 592
 593 /* NCT6792/NCT6793 specific data */
 594
 595 static const u16 NCT6792_REG_TEMP_MON[] = {
 596         0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d };
 597 static const u16 NCT6792_REG_BEEP[NUM_REG_BEEP] = {
 598         0xb2, 0xb3, 0xb4, 0xb5, 0xbf };
 599
 600 static const char *const nct6792_temp_label[] = {
 601         "",
 602         "SYSTIN",
 603         "CPUTIN",
 604         "AUXTIN0",
 605         "AUXTIN1",
 606         "AUXTIN2",
 607         "AUXTIN3",
 608         "",
 609         "SMBUSMASTER 0",
 610         "SMBUSMASTER 1",
 611         "SMBUSMASTER 2",
 612         "SMBUSMASTER 3",
 613         "SMBUSMASTER 4",
 614         "SMBUSMASTER 5",
 615         "SMBUSMASTER 6",
 616         "SMBUSMASTER 7",
 617         "PECI Agent 0",
 618         "PECI Agent 1",
 619         "PCH_CHIP_CPU_MAX_TEMP",
 620         "PCH_CHIP_TEMP",
 621         "PCH_CPU_TEMP",
 622         "PCH_MCH_TEMP",
 623         "PCH_DIM0_TEMP",
 624         "PCH_DIM1_TEMP",
 625         "PCH_DIM2_TEMP",
 626         "PCH_DIM3_TEMP",
 627         "BYTE_TEMP",
 628         "PECI Agent 0 Calibration",
 629         "PECI Agent 1 Calibration",
 630         "",
 631         "",
 632         "Virtual_TEMP"
 633 };
 634
 635 #define NCT6792_TEMP_MASK       0x9fffff7e
 636
 637 static const char *const nct6793_temp_label[] = {
 638         "",
 639         "SYSTIN",
 640         "CPUTIN",
 641         "AUXTIN0",
 642         "AUXTIN1",
 643         "AUXTIN2",
 644         "AUXTIN3",
 645         "",
 646         "SMBUSMASTER 0",
 647         "SMBUSMASTER 1",
 648         "",
 649         "",
 650         "",
 651         "",
 652         "",
 653         "",
 654         "PECI Agent 0",
 655         "PECI Agent 1",
 656         "PCH_CHIP_CPU_MAX_TEMP",
 657         "PCH_CHIP_TEMP",
 658         "PCH_CPU_TEMP",
 659         "PCH_MCH_TEMP",
 660         "Agent0 Dimm0 ",
 661         "Agent0 Dimm1",
 662         "Agent1 Dimm0",
 663         "Agent1 Dimm1",
 664         "BYTE_TEMP0",
 665         "BYTE_TEMP1",
 666         "PECI Agent 0 Calibration",
 667         "PECI Agent 1 Calibration",
 668         "",
 669         "Virtual_TEMP"
 670 };
 671
 672 #define NCT6793_TEMP_MASK       0xbfff037e
 673
 674 static const char *const nct6795_temp_label[] = {
 675         "",
 676         "SYSTIN",
 677         "CPUTIN",
 678         "AUXTIN0",
 679         "AUXTIN1",
 680         "AUXTIN2",
 681         "AUXTIN3",
 682         "",
 683         "SMBUSMASTER 0",
 684         "SMBUSMASTER 1",
 685         "SMBUSMASTER 2",
 686         "SMBUSMASTER 3",
 687         "SMBUSMASTER 4",
 688         "SMBUSMASTER 5",
 689         "SMBUSMASTER 6",
 690         "SMBUSMASTER 7",
 691         "PECI Agent 0",
 692         "PECI Agent 1",
 693         "PCH_CHIP_CPU_MAX_TEMP",
 694         "PCH_CHIP_TEMP",
 695         "PCH_CPU_TEMP",
 696         "PCH_MCH_TEMP",
 697         "PCH_DIM0_TEMP",
 698         "PCH_DIM1_TEMP",
 699         "PCH_DIM2_TEMP",
 700         "PCH_DIM3_TEMP",
 701         "BYTE_TEMP0",
 702         "BYTE_TEMP1",
 703         "PECI Agent 0 Calibration",
 704         "PECI Agent 1 Calibration",
 705         "",
 706         "Virtual_TEMP"
 707 };
 708
 709 #define NCT6795_TEMP_MASK       0xbfffff7e
 710
 711 /* NCT6102D/NCT6106D specific data */
 712
 713 #define NCT6106_REG_VBAT        0x318
 714 #define NCT6106_REG_DIODE       0x319
 715 #define NCT6106_DIODE_MASK      0x01
 716
 717 static const u16 NCT6106_REG_IN_MAX[] = {
 718         0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
 719 static const u16 NCT6106_REG_IN_MIN[] = {
 720         0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
 721 static const u16 NCT6106_REG_IN[] = {
 722         0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
 723
 724 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
 725 static const u16 NCT6106_REG_TEMP_MON[] = { 0x18, 0x19, 0x1a };
 726 static const u16 NCT6106_REG_TEMP_HYST[] = {
 727         0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
 728 static const u16 NCT6106_REG_TEMP_OVER[] = {
 729         0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
 730 static const u16 NCT6106_REG_TEMP_CRIT_L[] = {
 731         0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
 732 static const u16 NCT6106_REG_TEMP_CRIT_H[] = {
 733         0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
 734 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
 735 static const u16 NCT6106_REG_TEMP_CONFIG[] = {
 736         0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
 737
 738 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
 739 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
 740 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0, 0 };
 741 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4, 0, 0 };
 742
 743 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
 744 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
 745 static const u16 NCT6106_REG_PWM[] = { 0x119, 0x129, 0x139 };
 746 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c };
 747 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
 748 static const u16 NCT6106_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130 };
 749 static const u16 NCT6106_REG_TEMP_SOURCE[] = {
 750         0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
 751
 752 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
 753 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = {
 754         0x11b, 0x12b, 0x13b };
 755
 756 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
 757 #define NCT6106_CRITICAL_PWM_ENABLE_MASK        0x10
 758 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
 759
 760 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
 761 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
 762 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
 763 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
 764 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
 765 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
 766
 767 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
 768
 769 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
 770 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
 771 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
 772 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x17c };
 773 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
 774 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
 775
 776 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
 777 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
 778
 779 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = {
 780         0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
 781
 782 static const s8 NCT6106_ALARM_BITS[] = {
 783         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 784         9, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 785         -1,                             /* unused */
 786         32, 33, 34, -1, -1,             /* fan1..fan5 */
 787         -1, -1, -1,                     /* unused */
 788         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 789         48, -1                          /* intrusion0, intrusion1 */
 790 };
 791
 792 static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = {
 793         0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 };
 794
 795 static const s8 NCT6106_BEEP_BITS[] = {
 796         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 797         9, 10, 11, 12, -1, -1, -1,      /* in8..in14 */
 798         32,                             /* global beep enable */
 799         24, 25, 26, 27, 28,             /* fan1..fan5 */
 800         -1, -1, -1,                     /* unused */
 801         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 802         34, -1                          /* intrusion0, intrusion1 */
 803 };
 804
 805 static const u16 NCT6106_REG_TEMP_ALTERNATE[32] = {
 806         [14] = 0x51,
 807         [15] = 0x52,
 808         [16] = 0x54,
 809 };
 810
 811 static const u16 NCT6106_REG_TEMP_CRIT[32] = {
 812         [11] = 0x204,
 813         [12] = 0x205,
 814 };
 815
 816 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
 817 {
 818         if (mode == 0 && pwm == 255)
 819                 return off;
 820         return mode + 1;
 821 }
 822
 823 static int pwm_enable_to_reg(enum pwm_enable mode)
 824 {
 825         if (mode == off)
 826                 return 0;
 827         return mode - 1;
 828 }
 829
 830 /*
 831  * Conversions
 832  */
 833
 834 /* 1 is DC mode, output in ms */
 835 static unsigned int step_time_from_reg(u8 reg, u8 mode)
 836 {
 837         return mode ? 400 * reg : 100 * reg;
 838 }
 839
 840 static u8 step_time_to_reg(unsigned int msec, u8 mode)
 841 {
 842         return clamp_val((mode ? (msec + 200) / 400 :
 843                                         (msec + 50) / 100), 1, 255);
 844 }
 845
 846 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
 847 {
 848         if (reg == 0 || reg == 255)
 849                 return 0;
 850         return 1350000U / (reg << divreg);
 851 }
 852
 853 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
 854 {
 855         if ((reg & 0xff1f) == 0xff1f)
 856                 return 0;
 857
 858         reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
 859
 860         if (reg == 0)
 861                 return 0;
 862
 863         return 1350000U / reg;
 864 }
 865
 866 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
 867 {
 868         if (reg == 0 || reg == 0xffff)
 869                 return 0;
 870
 871         /*
 872          * Even though the registers are 16 bit wide, the fan divisor
 873          * still applies.
 874          */
 875         return 1350000U / (reg << divreg);
 876 }
 877
 878 static u16 fan_to_reg(u32 fan, unsigned int divreg)
 879 {
 880         if (!fan)
 881                 return 0;
 882
 883         return (1350000U / fan) >> divreg;
 884 }
 885
 886 static inline unsigned int
 887 div_from_reg(u8 reg)
 888 {
 889         return BIT(reg);
 890 }
 891
 892 /*
 893  * Some of the voltage inputs have internal scaling, the tables below
 894  * contain 8 (the ADC LSB in mV) * scaling factor * 100
 895  */
 896 static const u16 scale_in[15] = {
 897         800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
 898         800, 800
 899 };
 900
 901 static inline long in_from_reg(u8 reg, u8 nr)
 902 {
 903         return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
 904 }
 905
 906 static inline u8 in_to_reg(u32 val, u8 nr)
 907 {
 908         return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
 909 }
 910
 911 /*
 912  * Data structures and manipulation thereof
 913  */
 914
 915 struct nct6775_data {
 916         int addr;       /* IO base of hw monitor block */
 917         int sioreg;     /* SIO register address */
 918         enum kinds kind;
 919         const char *name;
 920
 921 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
 922         struct device *hwmon_dev;
 923 #endif
 924
 925         const struct attribute_group *groups[6];
 926
 927         u16 reg_temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 928                                     * 3=temp_crit, 4=temp_lcrit
 929                                     */
 930         u8 temp_src[NUM_TEMP];
 931         u16 reg_temp_config[NUM_TEMP];
 932         const char * const *temp_label;
 933         u32 temp_mask;
 934
 935         u16 REG_CONFIG;
 936         u16 REG_VBAT;
 937         u16 REG_DIODE;
 938         u8 DIODE_MASK;
 939
 940         const s8 *ALARM_BITS;
 941         const s8 *BEEP_BITS;
 942
 943         const u16 *REG_VIN;
 944         const u16 *REG_IN_MINMAX[2];
 945
 946         const u16 *REG_TARGET;
 947         const u16 *REG_FAN;
 948         const u16 *REG_FAN_MODE;
 949         const u16 *REG_FAN_MIN;
 950         const u16 *REG_FAN_PULSES;
 951         const u16 *FAN_PULSE_SHIFT;
 952         const u16 *REG_FAN_TIME[3];
 953
 954         const u16 *REG_TOLERANCE_H;
 955
 956         const u8 *REG_PWM_MODE;
 957         const u8 *PWM_MODE_MASK;
 958
 959         const u16 *REG_PWM[7];  /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 960                                  * [3]=pwm_max, [4]=pwm_step,
 961                                  * [5]=weight_duty_step, [6]=weight_duty_base
 962                                  */
 963         const u16 *REG_PWM_READ;
 964
 965         const u16 *REG_CRITICAL_PWM_ENABLE;
 966         u8 CRITICAL_PWM_ENABLE_MASK;
 967         const u16 *REG_CRITICAL_PWM;
 968
 969         const u16 *REG_AUTO_TEMP;
 970         const u16 *REG_AUTO_PWM;
 971
 972         const u16 *REG_CRITICAL_TEMP;
 973         const u16 *REG_CRITICAL_TEMP_TOLERANCE;
 974
 975         const u16 *REG_TEMP_SOURCE;     /* temp register sources */
 976         const u16 *REG_TEMP_SEL;
 977         const u16 *REG_WEIGHT_TEMP_SEL;
 978         const u16 *REG_WEIGHT_TEMP[3];  /* 0=base, 1=tolerance, 2=step */
 979
 980         const u16 *REG_TEMP_OFFSET;
 981
 982         const u16 *REG_ALARM;
 983         const u16 *REG_BEEP;
 984
 985         unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
 986         unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
 987
 988         struct mutex update_lock;
 989         bool valid;             /* true if following fields are valid */
 990         unsigned long last_updated;     /* In jiffies */
 991
 992         /* Register values */
 993         u8 bank;                /* current register bank */
 994         u8 in_num;              /* number of in inputs we have */
 995         u8 in[15][3];           /* [0]=in, [1]=in_max, [2]=in_min */
 996         unsigned int rpm[NUM_FAN];
 997         u16 fan_min[NUM_FAN];
 998         u8 fan_pulses[NUM_FAN];
 999         u8 fan_div[NUM_FAN];
1000         u8 has_pwm;
1001         u8 has_fan;             /* some fan inputs can be disabled */
1002         u8 has_fan_min;         /* some fans don't have min register */
1003         bool has_fan_div;
1004
1005         u8 num_temp_alarms;     /* 2, 3, or 6 */
1006         u8 num_temp_beeps;      /* 2, 3, or 6 */
1007         u8 temp_fixed_num;      /* 3 or 6 */
1008         u8 temp_type[NUM_TEMP_FIXED];
1009         s8 temp_offset[NUM_TEMP_FIXED];
1010         s16 temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
1011                                 * 3=temp_crit, 4=temp_lcrit */
1012         u64 alarms;
1013         u64 beeps;
1014
1015         u8 pwm_num;     /* number of pwm */
1016         u8 pwm_mode[NUM_FAN];   /* 1->DC variable voltage,
1017                                  * 0->PWM variable duty cycle
1018                                  */
1019         enum pwm_enable pwm_enable[NUM_FAN];
1020                         /* 0->off
1021                          * 1->manual
1022                          * 2->thermal cruise mode (also called SmartFan I)
1023                          * 3->fan speed cruise mode
1024                          * 4->SmartFan III
1025                          * 5->enhanced variable thermal cruise (SmartFan IV)
1026                          */
1027         u8 pwm[7][NUM_FAN];     /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
1028                                  * [3]=pwm_max, [4]=pwm_step,
1029                                  * [5]=weight_duty_step, [6]=weight_duty_base
1030                                  */
1031
1032         u8 target_temp[NUM_FAN];
1033         u8 target_temp_mask;
1034         u32 target_speed[NUM_FAN];
1035         u32 target_speed_tolerance[NUM_FAN];
1036         u8 speed_tolerance_limit;
1037
1038         u8 temp_tolerance[2][NUM_FAN];
1039         u8 tolerance_mask;
1040
1041         u8 fan_time[3][NUM_FAN]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
1042
1043         /* Automatic fan speed control registers */
1044         int auto_pwm_num;
1045         u8 auto_pwm[NUM_FAN][7];
1046         u8 auto_temp[NUM_FAN][7];
1047         u8 pwm_temp_sel[NUM_FAN];
1048         u8 pwm_weight_temp_sel[NUM_FAN];
1049         u8 weight_temp[3][NUM_FAN];     /* 0->temp_step, 1->temp_step_tol,
1050                                          * 2->temp_base
1051                                          */
1052
1053         u8 vid;
1054         u8 vrm;
1055
1056         bool have_vid;
1057
1058         u16 have_temp;
1059         u16 have_temp_fixed;
1060         u16 have_in;
1061
1062         /* Remember extra register values over suspend/resume */
1063         u8 vbat;
1064         u8 fandiv1;
1065         u8 fandiv2;
1066         u8 sio_reg_enable;
1067 };
1068
1069 struct nct6775_sio_data {
1070         int sioreg;
1071         enum kinds kind;
1072 };
1073
1074 #ifdef CONFIG_DEBUG_FS
1075
1076 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg);
1077 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg);
1078
1079 static const char *temp_attr_names[5] = {
1080         "input",
1081         "max",
1082         "hyst",
1083         "crit",
1084         "lcrit",
1085 };
1086
1087 static int nct6775_seq_show(struct seq_file *s, void *v)
1088 {
1089         struct device *dev = (struct device *)s->private;
1090         struct nct6775_data *data = dev_get_drvdata(dev);
1091         int i, j;
1092
1093         seq_printf(s, "Temperatures:\n");
1094         for (i = 0; i < NUM_TEMP; i++) {
1095                 if (!(data->have_temp & BIT(i)))
1096                         continue;
1097                 seq_printf(s, "  temp%d [source %d, %s]:\n", i + 1,
1098                            data->temp_src[i],
1099                            data->temp_label[data->temp_src[i]]);
1100                 for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1101                         if (data->reg_temp[j][i]) {
1102                                 seq_printf(s, "    %s: reg=0x%x val=0x%x cached 0x%x\n",
1103                                            temp_attr_names[j],
1104                                            data->reg_temp[j][i],
1105                                            nct6775_read_temp(data, data->reg_temp[j][i]),
1106                                            (u16)data->temp[j][i]);
1107                         }
1108                 }
1109         }
1110         seq_printf(s, "Temperature sources:\n");
1111         for (i = 0; i < data->num_temp_alarms; i++) {
1112                 seq_printf(s, "  index %d register 0x%x: val=0x%x\n",
1113                            i, data->REG_TEMP_SOURCE[i],
1114                            nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f);
1115         }
1116         return 0;
1117 }
1118
1119 static int nct6775_debug_open(struct inode *inode, struct file *file)
1120 {
1121         return single_open(file, nct6775_seq_show, inode->i_private);
1122 }
1123
1124 static const struct file_operations nct6775_debug_operations = {
1125         .open           = nct6775_debug_open,
1126         .llseek         = seq_lseek,
1127         .read           = seq_read,
1128         .release        = single_release,
1129 };
1130
1131 static void nct6775_debugfs_exit(void *data)
1132 {
1133         debugfs_remove_recursive(data);
1134 }
1135
1136 static int nct6775_debugfs_init(struct device *dev)
1137 {
1138         struct dentry *rootdir;
1139
1140         rootdir = debugfs_create_dir(dev_name(dev), NULL);
1141         if (!rootdir)
1142                 return -ENOMEM;
1143
1144         devm_add_action(dev, nct6775_debugfs_exit, rootdir);
1145
1146         debugfs_create_file("registers", S_IFREG | 0444, rootdir,
1147                             dev, &nct6775_debug_operations);
1148
1149         return 0;
1150 }
1151
1152 #else
1153 static int nct6775_debugfs_init(struct device *dev) { return 0; }
1154 #endif
1155
1156 struct sensor_device_template {
1157         struct device_attribute dev_attr;
1158         union {
1159                 struct {
1160                         u8 nr;
1161                         u8 index;
1162                 } s;
1163                 int index;
1164         } u;
1165         bool s2;        /* true if both index and nr are used */
1166 };
1167
1168 struct sensor_device_attr_u {
1169         union {
1170                 struct sensor_device_attribute a1;
1171                 struct sensor_device_attribute_2 a2;
1172         } u;
1173         char name[32];
1174 };
1175
1176 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) {      \
1177         .attr = {.name = _template, .mode = _mode },            \
1178         .show   = _show,                                        \
1179         .store  = _store,                                       \
1180 }
1181
1182 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \
1183         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
1184           .u.index = _index,                                            \
1185           .s2 = false }
1186
1187 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,       \
1188                                  _nr, _index)                           \
1189         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
1190           .u.s.index = _index,                                          \
1191           .u.s.nr = _nr,                                                \
1192           .s2 = true }
1193
1194 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
1195 static struct sensor_device_template sensor_dev_template_##_name        \
1196         = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store,       \
1197                                  _index)
1198
1199 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store,       \
1200                           _nr, _index)                                  \
1201 static struct sensor_device_template sensor_dev_template_##_name        \
1202         = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,     \
1203                                  _nr, _index)
1204
1205 struct sensor_template_group {
1206         struct sensor_device_template **templates;
1207         umode_t (*is_visible)(struct kobject *, struct attribute *, int);
1208         int base;
1209 };
1210
1211 static struct attribute_group *
1212 nct6775_create_attr_group(struct device *dev,
1213                           const struct sensor_template_group *tg,
1214                           int repeat)
1215 {
1216         struct attribute_group *group;
1217         struct sensor_device_attr_u *su;
1218         struct sensor_device_attribute *a;
1219         struct sensor_device_attribute_2 *a2;
1220         struct attribute **attrs;
1221         struct sensor_device_template **t;
1222         int i, count;
1223
1224         if (repeat <= 0)
1225                 return ERR_PTR(-EINVAL);
1226
1227         t = tg->templates;
1228         for (count = 0; *t; t++, count++)
1229                 ;
1230
1231         if (count == 0)
1232                 return ERR_PTR(-EINVAL);
1233
1234         group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
1235         if (group == NULL)
1236                 return ERR_PTR(-ENOMEM);
1237
1238         attrs = devm_kzalloc(dev, sizeof(*attrs) * (repeat * count + 1),
1239                              GFP_KERNEL);
1240         if (attrs == NULL)
1241                 return ERR_PTR(-ENOMEM);
1242
1243         su = devm_kzalloc(dev, sizeof(*su) * repeat * count,
1244                                GFP_KERNEL);
1245         if (su == NULL)
1246                 return ERR_PTR(-ENOMEM);
1247
1248         group->attrs = attrs;
1249         group->is_visible = tg->is_visible;
1250
1251         for (i = 0; i < repeat; i++) {
1252                 t = tg->templates;
1253                 while (*t != NULL) {
1254                         snprintf(su->name, sizeof(su->name),
1255                                  (*t)->dev_attr.attr.name, tg->base + i);
1256                         if ((*t)->s2) {
1257                                 a2 = &su->u.a2;
1258                                 sysfs_attr_init(&a2->dev_attr.attr);
1259                                 a2->dev_attr.attr.name = su->name;
1260                                 a2->nr = (*t)->u.s.nr + i;
1261                                 a2->index = (*t)->u.s.index;
1262                                 a2->dev_attr.attr.mode =
1263                                   (*t)->dev_attr.attr.mode;
1264                                 a2->dev_attr.show = (*t)->dev_attr.show;
1265                                 a2->dev_attr.store = (*t)->dev_attr.store;
1266                                 *attrs = &a2->dev_attr.attr;
1267                         } else {
1268                                 a = &su->u.a1;
1269                                 sysfs_attr_init(&a->dev_attr.attr);
1270                                 a->dev_attr.attr.name = su->name;
1271                                 a->index = (*t)->u.index + i;
1272                                 a->dev_attr.attr.mode =
1273                                   (*t)->dev_attr.attr.mode;
1274                                 a->dev_attr.show = (*t)->dev_attr.show;
1275                                 a->dev_attr.store = (*t)->dev_attr.store;
1276                                 *attrs = &a->dev_attr.attr;
1277                         }
1278                         attrs++;
1279                         su++;
1280                         t++;
1281                 }
1282         }
1283
1284         return group;
1285 }
1286
1287 static bool is_word_sized(struct nct6775_data *data, u16 reg)
1288 {
1289         switch (data->kind) {
1290         case nct6106:
1291                 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1292                   reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
1293                   reg == 0x111 || reg == 0x121 || reg == 0x131;
1294         case nct6775:
1295                 return (((reg & 0xff00) == 0x100 ||
1296                     (reg & 0xff00) == 0x200) &&
1297                    ((reg & 0x00ff) == 0x50 ||
1298                     (reg & 0x00ff) == 0x53 ||
1299                     (reg & 0x00ff) == 0x55)) ||
1300                   (reg & 0xfff0) == 0x630 ||
1301                   reg == 0x640 || reg == 0x642 ||
1302                   reg == 0x662 ||
1303                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1304                   reg == 0x73 || reg == 0x75 || reg == 0x77;
1305         case nct6776:
1306                 return (((reg & 0xff00) == 0x100 ||
1307                     (reg & 0xff00) == 0x200) &&
1308                    ((reg & 0x00ff) == 0x50 ||
1309                     (reg & 0x00ff) == 0x53 ||
1310                     (reg & 0x00ff) == 0x55)) ||
1311                   (reg & 0xfff0) == 0x630 ||
1312                   reg == 0x402 ||
1313                   reg == 0x640 || reg == 0x642 ||
1314                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1315                   reg == 0x73 || reg == 0x75 || reg == 0x77;
1316         case nct6779:
1317         case nct6791:
1318         case nct6792:
1319         case nct6793:
1320         case nct6795:
1321                 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
1322                   ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x0b) ||
1323                   reg == 0x402 ||
1324                   reg == 0x63a || reg == 0x63c || reg == 0x63e ||
1325                   reg == 0x640 || reg == 0x642 ||
1326                   reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
1327                   reg == 0x7b || reg == 0x7d;
1328         }
1329         return false;
1330 }
1331
1332 /*
1333  * On older chips, only registers 0x50-0x5f are banked.
1334  * On more recent chips, all registers are banked.
1335  * Assume that is the case and set the bank number for each access.
1336  * Cache the bank number so it only needs to be set if it changes.
1337  */
1338 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
1339 {
1340         u8 bank = reg >> 8;
1341
1342         if (data->bank != bank) {
1343                 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
1344                 outb_p(bank, data->addr + DATA_REG_OFFSET);
1345                 data->bank = bank;
1346         }
1347 }
1348
1349 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
1350 {
1351         int res, word_sized = is_word_sized(data, reg);
1352
1353         nct6775_set_bank(data, reg);
1354         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1355         res = inb_p(data->addr + DATA_REG_OFFSET);
1356         if (word_sized) {
1357                 outb_p((reg & 0xff) + 1,
1358                        data->addr + ADDR_REG_OFFSET);
1359                 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
1360         }
1361         return res;
1362 }
1363
1364 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
1365 {
1366         int word_sized = is_word_sized(data, reg);
1367
1368         nct6775_set_bank(data, reg);
1369         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1370         if (word_sized) {
1371                 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
1372                 outb_p((reg & 0xff) + 1,
1373                        data->addr + ADDR_REG_OFFSET);
1374         }
1375         outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
1376         return 0;
1377 }
1378
1379 /* We left-align 8-bit temperature values to make the code simpler */
1380 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
1381 {
1382         u16 res;
1383
1384         res = nct6775_read_value(data, reg);
1385         if (!is_word_sized(data, reg))
1386                 res <<= 8;
1387
1388         return res;
1389 }
1390
1391 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
1392 {
1393         if (!is_word_sized(data, reg))
1394                 value >>= 8;
1395         return nct6775_write_value(data, reg, value);
1396 }
1397
1398 /* This function assumes that the caller holds data->update_lock */
1399 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
1400 {
1401         u8 reg;
1402
1403         switch (nr) {
1404         case 0:
1405                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
1406                     | (data->fan_div[0] & 0x7);
1407                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1408                 break;
1409         case 1:
1410                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
1411                     | ((data->fan_div[1] << 4) & 0x70);
1412                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1413                 break;
1414         case 2:
1415                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
1416                     | (data->fan_div[2] & 0x7);
1417                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1418                 break;
1419         case 3:
1420                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
1421                     | ((data->fan_div[3] << 4) & 0x70);
1422                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1423                 break;
1424         }
1425 }
1426
1427 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
1428 {
1429         if (data->kind == nct6775)
1430                 nct6775_write_fan_div(data, nr);
1431 }
1432
1433 static void nct6775_update_fan_div(struct nct6775_data *data)
1434 {
1435         u8 i;
1436
1437         i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
1438         data->fan_div[0] = i & 0x7;
1439         data->fan_div[1] = (i & 0x70) >> 4;
1440         i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
1441         data->fan_div[2] = i & 0x7;
1442         if (data->has_fan & BIT(3))
1443                 data->fan_div[3] = (i & 0x70) >> 4;
1444 }
1445
1446 static void nct6775_update_fan_div_common(struct nct6775_data *data)
1447 {
1448         if (data->kind == nct6775)
1449                 nct6775_update_fan_div(data);
1450 }
1451
1452 static void nct6775_init_fan_div(struct nct6775_data *data)
1453 {
1454         int i;
1455
1456         nct6775_update_fan_div_common(data);
1457         /*
1458          * For all fans, start with highest divider value if the divider
1459          * register is not initialized. This ensures that we get a
1460          * reading from the fan count register, even if it is not optimal.
1461          * We'll compute a better divider later on.
1462          */
1463         for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
1464                 if (!(data->has_fan & BIT(i)))
1465                         continue;
1466                 if (data->fan_div[i] == 0) {
1467                         data->fan_div[i] = 7;
1468                         nct6775_write_fan_div_common(data, i);
1469                 }
1470         }
1471 }
1472
1473 static void nct6775_init_fan_common(struct device *dev,
1474                                     struct nct6775_data *data)
1475 {
1476         int i;
1477         u8 reg;
1478
1479         if (data->has_fan_div)
1480                 nct6775_init_fan_div(data);
1481
1482         /*
1483          * If fan_min is not set (0), set it to 0xff to disable it. This
1484          * prevents the unnecessary warning when fanX_min is reported as 0.
1485          */
1486         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1487                 if (data->has_fan_min & BIT(i)) {
1488                         reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
1489                         if (!reg)
1490                                 nct6775_write_value(data, data->REG_FAN_MIN[i],
1491                                                     data->has_fan_div ? 0xff
1492                                                                       : 0xff1f);
1493                 }
1494         }
1495 }
1496
1497 static void nct6775_select_fan_div(struct device *dev,
1498                                    struct nct6775_data *data, int nr, u16 reg)
1499 {
1500         u8 fan_div = data->fan_div[nr];
1501         u16 fan_min;
1502
1503         if (!data->has_fan_div)
1504                 return;
1505
1506         /*
1507          * If we failed to measure the fan speed, or the reported value is not
1508          * in the optimal range, and the clock divider can be modified,
1509          * let's try that for next time.
1510          */
1511         if (reg == 0x00 && fan_div < 0x07)
1512                 fan_div++;
1513         else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1514                 fan_div--;
1515
1516         if (fan_div != data->fan_div[nr]) {
1517                 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1518                         nr + 1, div_from_reg(data->fan_div[nr]),
1519                         div_from_reg(fan_div));
1520
1521                 /* Preserve min limit if possible */
1522                 if (data->has_fan_min & BIT(nr)) {
1523                         fan_min = data->fan_min[nr];
1524                         if (fan_div > data->fan_div[nr]) {
1525                                 if (fan_min != 255 && fan_min > 1)
1526                                         fan_min >>= 1;
1527                         } else {
1528                                 if (fan_min != 255) {
1529                                         fan_min <<= 1;
1530                                         if (fan_min > 254)
1531                                                 fan_min = 254;
1532                                 }
1533                         }
1534                         if (fan_min != data->fan_min[nr]) {
1535                                 data->fan_min[nr] = fan_min;
1536                                 nct6775_write_value(data, data->REG_FAN_MIN[nr],
1537                                                     fan_min);
1538                         }
1539                 }
1540                 data->fan_div[nr] = fan_div;
1541                 nct6775_write_fan_div_common(data, nr);
1542         }
1543 }
1544
1545 static void nct6775_update_pwm(struct device *dev)
1546 {
1547         struct nct6775_data *data = dev_get_drvdata(dev);
1548         int i, j;
1549         int fanmodecfg, reg;
1550         bool duty_is_dc;
1551
1552         for (i = 0; i < data->pwm_num; i++) {
1553                 if (!(data->has_pwm & BIT(i)))
1554                         continue;
1555
1556                 duty_is_dc = data->REG_PWM_MODE[i] &&
1557                   (nct6775_read_value(data, data->REG_PWM_MODE[i])
1558                    & data->PWM_MODE_MASK[i]);
1559                 data->pwm_mode[i] = duty_is_dc;
1560
1561                 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
1562                 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1563                         if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1564                                 data->pwm[j][i]
1565                                   = nct6775_read_value(data,
1566                                                        data->REG_PWM[j][i]);
1567                         }
1568                 }
1569
1570                 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1571                                                         (fanmodecfg >> 4) & 7);
1572
1573                 if (!data->temp_tolerance[0][i] ||
1574                     data->pwm_enable[i] != speed_cruise)
1575                         data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1576                 if (!data->target_speed_tolerance[i] ||
1577                     data->pwm_enable[i] == speed_cruise) {
1578                         u8 t = fanmodecfg & 0x0f;
1579
1580                         if (data->REG_TOLERANCE_H) {
1581                                 t |= (nct6775_read_value(data,
1582                                       data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
1583                         }
1584                         data->target_speed_tolerance[i] = t;
1585                 }
1586
1587                 data->temp_tolerance[1][i] =
1588                         nct6775_read_value(data,
1589                                         data->REG_CRITICAL_TEMP_TOLERANCE[i]);
1590
1591                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
1592                 data->pwm_temp_sel[i] = reg & 0x1f;
1593                 /* If fan can stop, report floor as 0 */
1594                 if (reg & 0x80)
1595                         data->pwm[2][i] = 0;
1596
1597                 if (!data->REG_WEIGHT_TEMP_SEL[i])
1598                         continue;
1599
1600                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
1601                 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1602                 /* If weight is disabled, report weight source as 0 */
1603                 if (j == 1 && !(reg & 0x80))
1604                         data->pwm_weight_temp_sel[i] = 0;
1605
1606                 /* Weight temp data */
1607                 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
1608                         data->weight_temp[j][i]
1609                           = nct6775_read_value(data,
1610                                                data->REG_WEIGHT_TEMP[j][i]);
1611                 }
1612         }
1613 }
1614
1615 static void nct6775_update_pwm_limits(struct device *dev)
1616 {
1617         struct nct6775_data *data = dev_get_drvdata(dev);
1618         int i, j;
1619         u8 reg;
1620         u16 reg_t;
1621
1622         for (i = 0; i < data->pwm_num; i++) {
1623                 if (!(data->has_pwm & BIT(i)))
1624                         continue;
1625
1626                 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1627                         data->fan_time[j][i] =
1628                           nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1629                 }
1630
1631                 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1632                 /* Update only in matching mode or if never updated */
1633                 if (!data->target_temp[i] ||
1634                     data->pwm_enable[i] == thermal_cruise)
1635                         data->target_temp[i] = reg_t & data->target_temp_mask;
1636                 if (!data->target_speed[i] ||
1637                     data->pwm_enable[i] == speed_cruise) {
1638                         if (data->REG_TOLERANCE_H) {
1639                                 reg_t |= (nct6775_read_value(data,
1640                                         data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1641                         }
1642                         data->target_speed[i] = reg_t;
1643                 }
1644
1645                 for (j = 0; j < data->auto_pwm_num; j++) {
1646                         data->auto_pwm[i][j] =
1647                           nct6775_read_value(data,
1648                                              NCT6775_AUTO_PWM(data, i, j));
1649                         data->auto_temp[i][j] =
1650                           nct6775_read_value(data,
1651                                              NCT6775_AUTO_TEMP(data, i, j));
1652                 }
1653
1654                 /* critical auto_pwm temperature data */
1655                 data->auto_temp[i][data->auto_pwm_num] =
1656                         nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1657
1658                 switch (data->kind) {
1659                 case nct6775:
1660                         reg = nct6775_read_value(data,
1661                                                  NCT6775_REG_CRITICAL_ENAB[i]);
1662                         data->auto_pwm[i][data->auto_pwm_num] =
1663                                                 (reg & 0x02) ? 0xff : 0x00;
1664                         break;
1665                 case nct6776:
1666                         data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1667                         break;
1668                 case nct6106:
1669                 case nct6779:
1670                 case nct6791:
1671                 case nct6792:
1672                 case nct6793:
1673                 case nct6795:
1674                         reg = nct6775_read_value(data,
1675                                         data->REG_CRITICAL_PWM_ENABLE[i]);
1676                         if (reg & data->CRITICAL_PWM_ENABLE_MASK)
1677                                 reg = nct6775_read_value(data,
1678                                         data->REG_CRITICAL_PWM[i]);
1679                         else
1680                                 reg = 0xff;
1681                         data->auto_pwm[i][data->auto_pwm_num] = reg;
1682                         break;
1683                 }
1684         }
1685 }
1686
1687 static struct nct6775_data *nct6775_update_device(struct device *dev)
1688 {
1689         struct nct6775_data *data = dev_get_drvdata(dev);
1690         int i, j;
1691
1692         mutex_lock(&data->update_lock);
1693
1694         if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1695             || !data->valid) {
1696                 /* Fan clock dividers */
1697                 nct6775_update_fan_div_common(data);
1698
1699                 /* Measured voltages and limits */
1700                 for (i = 0; i < data->in_num; i++) {
1701                         if (!(data->have_in & BIT(i)))
1702                                 continue;
1703
1704                         data->in[i][0] = nct6775_read_value(data,
1705                                                             data->REG_VIN[i]);
1706                         data->in[i][1] = nct6775_read_value(data,
1707                                           data->REG_IN_MINMAX[0][i]);
1708                         data->in[i][2] = nct6775_read_value(data,
1709                                           data->REG_IN_MINMAX[1][i]);
1710                 }
1711
1712                 /* Measured fan speeds and limits */
1713                 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
1714                         u16 reg;
1715
1716                         if (!(data->has_fan & BIT(i)))
1717                                 continue;
1718
1719                         reg = nct6775_read_value(data, data->REG_FAN[i]);
1720                         data->rpm[i] = data->fan_from_reg(reg,
1721                                                           data->fan_div[i]);
1722
1723                         if (data->has_fan_min & BIT(i))
1724                                 data->fan_min[i] = nct6775_read_value(data,
1725                                            data->REG_FAN_MIN[i]);
1726                         data->fan_pulses[i] =
1727                           (nct6775_read_value(data, data->REG_FAN_PULSES[i])
1728                                 >> data->FAN_PULSE_SHIFT[i]) & 0x03;
1729
1730                         nct6775_select_fan_div(dev, data, i, reg);
1731                 }
1732
1733                 nct6775_update_pwm(dev);
1734                 nct6775_update_pwm_limits(dev);
1735
1736                 /* Measured temperatures and limits */
1737                 for (i = 0; i < NUM_TEMP; i++) {
1738                         if (!(data->have_temp & BIT(i)))
1739                                 continue;
1740                         for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1741                                 if (data->reg_temp[j][i])
1742                                         data->temp[j][i]
1743                                           = nct6775_read_temp(data,
1744                                                 data->reg_temp[j][i]);
1745                         }
1746                         if (i >= NUM_TEMP_FIXED ||
1747                             !(data->have_temp_fixed & BIT(i)))
1748                                 continue;
1749                         data->temp_offset[i]
1750                           = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1751                 }
1752
1753                 data->alarms = 0;
1754                 for (i = 0; i < NUM_REG_ALARM; i++) {
1755                         u8 alarm;
1756
1757                         if (!data->REG_ALARM[i])
1758                                 continue;
1759                         alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1760                         data->alarms |= ((u64)alarm) << (i << 3);
1761                 }
1762
1763                 data->beeps = 0;
1764                 for (i = 0; i < NUM_REG_BEEP; i++) {
1765                         u8 beep;
1766
1767                         if (!data->REG_BEEP[i])
1768                                 continue;
1769                         beep = nct6775_read_value(data, data->REG_BEEP[i]);
1770                         data->beeps |= ((u64)beep) << (i << 3);
1771                 }
1772
1773                 data->last_updated = jiffies;
1774                 data->valid = true;
1775         }
1776
1777         mutex_unlock(&data->update_lock);
1778         return data;
1779 }
1780
1781 /*
1782  * Sysfs callback functions
1783  */
1784 static ssize_t
1785 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1786 {
1787         struct nct6775_data *data = nct6775_update_device(dev);
1788         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1789         int index = sattr->index;
1790         int nr = sattr->nr;
1791
1792         return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1793 }
1794
1795 static ssize_t
1796 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1797              size_t count)
1798 {
1799         struct nct6775_data *data = dev_get_drvdata(dev);
1800         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1801         int index = sattr->index;
1802         int nr = sattr->nr;
1803         unsigned long val;
1804         int err;
1805
1806         err = kstrtoul(buf, 10, &val);
1807         if (err < 0)
1808                 return err;
1809         mutex_lock(&data->update_lock);
1810         data->in[nr][index] = in_to_reg(val, nr);
1811         nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr],
1812                             data->in[nr][index]);
1813         mutex_unlock(&data->update_lock);
1814         return count;
1815 }
1816
1817 static ssize_t
1818 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1819 {
1820         struct nct6775_data *data = nct6775_update_device(dev);
1821         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1822         int nr = data->ALARM_BITS[sattr->index];
1823
1824         return sprintf(buf, "%u\n",
1825                        (unsigned int)((data->alarms >> nr) & 0x01));
1826 }
1827
1828 static int find_temp_source(struct nct6775_data *data, int index, int count)
1829 {
1830         int source = data->temp_src[index];
1831         int nr;
1832
1833         for (nr = 0; nr < count; nr++) {
1834                 int src;
1835
1836                 src = nct6775_read_value(data,
1837                                          data->REG_TEMP_SOURCE[nr]) & 0x1f;
1838                 if (src == source)
1839                         return nr;
1840         }
1841         return -ENODEV;
1842 }
1843
1844 static ssize_t
1845 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1846 {
1847         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1848         struct nct6775_data *data = nct6775_update_device(dev);
1849         unsigned int alarm = 0;
1850         int nr;
1851
1852         /*
1853          * For temperatures, there is no fixed mapping from registers to alarm
1854          * bits. Alarm bits are determined by the temperature source mapping.
1855          */
1856         nr = find_temp_source(data, sattr->index, data->num_temp_alarms);
1857         if (nr >= 0) {
1858                 int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE];
1859
1860                 alarm = (data->alarms >> bit) & 0x01;
1861         }
1862         return sprintf(buf, "%u\n", alarm);
1863 }
1864
1865 static ssize_t
1866 show_beep(struct device *dev, struct device_attribute *attr, char *buf)
1867 {
1868         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1869         struct nct6775_data *data = nct6775_update_device(dev);
1870         int nr = data->BEEP_BITS[sattr->index];
1871
1872         return sprintf(buf, "%u\n",
1873                        (unsigned int)((data->beeps >> nr) & 0x01));
1874 }
1875
1876 static ssize_t
1877 store_beep(struct device *dev, struct device_attribute *attr, const char *buf,
1878            size_t count)
1879 {
1880         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1881         struct nct6775_data *data = dev_get_drvdata(dev);
1882         int nr = data->BEEP_BITS[sattr->index];
1883         int regindex = nr >> 3;
1884         unsigned long val;
1885         int err;
1886
1887         err = kstrtoul(buf, 10, &val);
1888         if (err < 0)
1889                 return err;
1890         if (val > 1)
1891                 return -EINVAL;
1892
1893         mutex_lock(&data->update_lock);
1894         if (val)
1895                 data->beeps |= (1ULL << nr);
1896         else
1897                 data->beeps &= ~(1ULL << nr);
1898         nct6775_write_value(data, data->REG_BEEP[regindex],
1899                             (data->beeps >> (regindex << 3)) & 0xff);
1900         mutex_unlock(&data->update_lock);
1901         return count;
1902 }
1903
1904 static ssize_t
1905 show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf)
1906 {
1907         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1908         struct nct6775_data *data = nct6775_update_device(dev);
1909         unsigned int beep = 0;
1910         int nr;
1911
1912         /*
1913          * For temperatures, there is no fixed mapping from registers to beep
1914          * enable bits. Beep enable bits are determined by the temperature
1915          * source mapping.
1916          */
1917         nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1918         if (nr >= 0) {
1919                 int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1920
1921                 beep = (data->beeps >> bit) & 0x01;
1922         }
1923         return sprintf(buf, "%u\n", beep);
1924 }
1925
1926 static ssize_t
1927 store_temp_beep(struct device *dev, struct device_attribute *attr,
1928                 const char *buf, size_t count)
1929 {
1930         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1931         struct nct6775_data *data = dev_get_drvdata(dev);
1932         int nr, bit, regindex;
1933         unsigned long val;
1934         int err;
1935
1936         err = kstrtoul(buf, 10, &val);
1937         if (err < 0)
1938                 return err;
1939         if (val > 1)
1940                 return -EINVAL;
1941
1942         nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1943         if (nr < 0)
1944                 return nr;
1945
1946         bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1947         regindex = bit >> 3;
1948
1949         mutex_lock(&data->update_lock);
1950         if (val)
1951                 data->beeps |= (1ULL << bit);
1952         else
1953                 data->beeps &= ~(1ULL << bit);
1954         nct6775_write_value(data, data->REG_BEEP[regindex],
1955                             (data->beeps >> (regindex << 3)) & 0xff);
1956         mutex_unlock(&data->update_lock);
1957
1958         return count;
1959 }
1960
1961 static umode_t nct6775_in_is_visible(struct kobject *kobj,
1962                                      struct attribute *attr, int index)
1963 {
1964         struct device *dev = container_of(kobj, struct device, kobj);
1965         struct nct6775_data *data = dev_get_drvdata(dev);
1966         int in = index / 5;     /* voltage index */
1967
1968         if (!(data->have_in & BIT(in)))
1969                 return 0;
1970
1971         return attr->mode;
1972 }
1973
1974 SENSOR_TEMPLATE_2(in_input, "in%d_input", S_IRUGO, show_in_reg, NULL, 0, 0);
1975 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", S_IRUGO, show_alarm, NULL, 0);
1976 SENSOR_TEMPLATE(in_beep, "in%d_beep", S_IWUSR | S_IRUGO, show_beep, store_beep,
1977                 0);
1978 SENSOR_TEMPLATE_2(in_min, "in%d_min", S_IWUSR | S_IRUGO, show_in_reg,
1979                   store_in_reg, 0, 1);
1980 SENSOR_TEMPLATE_2(in_max, "in%d_max", S_IWUSR | S_IRUGO, show_in_reg,
1981                   store_in_reg, 0, 2);
1982
1983 /*
1984  * nct6775_in_is_visible uses the index into the following array
1985  * to determine if attributes should be created or not.
1986  * Any change in order or content must be matched.
1987  */
1988 static struct sensor_device_template *nct6775_attributes_in_template[] = {
1989         &sensor_dev_template_in_input,
1990         &sensor_dev_template_in_alarm,
1991         &sensor_dev_template_in_beep,
1992         &sensor_dev_template_in_min,
1993         &sensor_dev_template_in_max,
1994         NULL
1995 };
1996
1997 static const struct sensor_template_group nct6775_in_template_group = {
1998         .templates = nct6775_attributes_in_template,
1999         .is_visible = nct6775_in_is_visible,
2000 };
2001
2002 static ssize_t
2003 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
2004 {
2005         struct nct6775_data *data = nct6775_update_device(dev);
2006         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2007         int nr = sattr->index;
2008
2009         return sprintf(buf, "%d\n", data->rpm[nr]);
2010 }
2011
2012 static ssize_t
2013 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
2014 {
2015         struct nct6775_data *data = nct6775_update_device(dev);
2016         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2017         int nr = sattr->index;
2018
2019         return sprintf(buf, "%d\n",
2020                        data->fan_from_reg_min(data->fan_min[nr],
2021                                               data->fan_div[nr]));
2022 }
2023
2024 static ssize_t
2025 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
2026 {
2027         struct nct6775_data *data = nct6775_update_device(dev);
2028         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2029         int nr = sattr->index;
2030
2031         return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
2032 }
2033
2034 static ssize_t
2035 store_fan_min(struct device *dev, struct device_attribute *attr,
2036               const char *buf, size_t count)
2037 {
2038         struct nct6775_data *data = dev_get_drvdata(dev);
2039         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2040         int nr = sattr->index;
2041         unsigned long val;
2042         unsigned int reg;
2043         u8 new_div;
2044         int err;
2045
2046         err = kstrtoul(buf, 10, &val);
2047         if (err < 0)
2048                 return err;
2049
2050         mutex_lock(&data->update_lock);
2051         if (!data->has_fan_div) {
2052                 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
2053                 if (!val) {
2054                         val = 0xff1f;
2055                 } else {
2056                         if (val > 1350000U)
2057                                 val = 135000U;
2058                         val = 1350000U / val;
2059                         val = (val & 0x1f) | ((val << 3) & 0xff00);
2060                 }
2061                 data->fan_min[nr] = val;
2062                 goto write_min; /* Leave fan divider alone */
2063         }
2064         if (!val) {
2065                 /* No min limit, alarm disabled */
2066                 data->fan_min[nr] = 255;
2067                 new_div = data->fan_div[nr]; /* No change */
2068                 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
2069                 goto write_div;
2070         }
2071         reg = 1350000U / val;
2072         if (reg >= 128 * 255) {
2073                 /*
2074                  * Speed below this value cannot possibly be represented,
2075                  * even with the highest divider (128)
2076                  */
2077                 data->fan_min[nr] = 254;
2078                 new_div = 7; /* 128 == BIT(7) */
2079                 dev_warn(dev,
2080                          "fan%u low limit %lu below minimum %u, set to minimum\n",
2081                          nr + 1, val, data->fan_from_reg_min(254, 7));
2082         } else if (!reg) {
2083                 /*
2084                  * Speed above this value cannot possibly be represented,
2085                  * even with the lowest divider (1)
2086                  */
2087                 data->fan_min[nr] = 1;
2088                 new_div = 0; /* 1 == BIT(0) */
2089                 dev_warn(dev,
2090                          "fan%u low limit %lu above maximum %u, set to maximum\n",
2091                          nr + 1, val, data->fan_from_reg_min(1, 0));
2092         } else {
2093                 /*
2094                  * Automatically pick the best divider, i.e. the one such
2095                  * that the min limit will correspond to a register value
2096                  * in the 96..192 range
2097                  */
2098                 new_div = 0;
2099                 while (reg > 192 && new_div < 7) {
2100                         reg >>= 1;
2101                         new_div++;
2102                 }
2103                 data->fan_min[nr] = reg;
2104         }
2105
2106 write_div:
2107         /*
2108          * Write both the fan clock divider (if it changed) and the new
2109          * fan min (unconditionally)
2110          */
2111         if (new_div != data->fan_div[nr]) {
2112                 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
2113                         nr + 1, div_from_reg(data->fan_div[nr]),
2114                         div_from_reg(new_div));
2115                 data->fan_div[nr] = new_div;
2116                 nct6775_write_fan_div_common(data, nr);
2117                 /* Give the chip time to sample a new speed value */
2118                 data->last_updated = jiffies;
2119         }
2120
2121 write_min:
2122         nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
2123         mutex_unlock(&data->update_lock);
2124
2125         return count;
2126 }
2127
2128 static ssize_t
2129 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
2130 {
2131         struct nct6775_data *data = nct6775_update_device(dev);
2132         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2133         int p = data->fan_pulses[sattr->index];
2134
2135         return sprintf(buf, "%d\n", p ? : 4);
2136 }
2137
2138 static ssize_t
2139 store_fan_pulses(struct device *dev, struct device_attribute *attr,
2140                  const char *buf, size_t count)
2141 {
2142         struct nct6775_data *data = dev_get_drvdata(dev);
2143         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2144         int nr = sattr->index;
2145         unsigned long val;
2146         int err;
2147         u8 reg;
2148
2149         err = kstrtoul(buf, 10, &val);
2150         if (err < 0)
2151                 return err;
2152
2153         if (val > 4)
2154                 return -EINVAL;
2155
2156         mutex_lock(&data->update_lock);
2157         data->fan_pulses[nr] = val & 3;
2158         reg = nct6775_read_value(data, data->REG_FAN_PULSES[nr]);
2159         reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
2160         reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
2161         nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
2162         mutex_unlock(&data->update_lock);
2163
2164         return count;
2165 }
2166
2167 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
2168                                       struct attribute *attr, int index)
2169 {
2170         struct device *dev = container_of(kobj, struct device, kobj);
2171         struct nct6775_data *data = dev_get_drvdata(dev);
2172         int fan = index / 6;    /* fan index */
2173         int nr = index % 6;     /* attribute index */
2174
2175         if (!(data->has_fan & BIT(fan)))
2176                 return 0;
2177
2178         if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1)
2179                 return 0;
2180         if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1)
2181                 return 0;
2182         if (nr == 4 && !(data->has_fan_min & BIT(fan)))
2183                 return 0;
2184         if (nr == 5 && data->kind != nct6775)
2185                 return 0;
2186
2187         return attr->mode;
2188 }
2189
2190 SENSOR_TEMPLATE(fan_input, "fan%d_input", S_IRUGO, show_fan, NULL, 0);
2191 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", S_IRUGO, show_alarm, NULL,
2192                 FAN_ALARM_BASE);
2193 SENSOR_TEMPLATE(fan_beep, "fan%d_beep", S_IWUSR | S_IRUGO, show_beep,
2194                 store_beep, FAN_ALARM_BASE);
2195 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", S_IWUSR | S_IRUGO, show_fan_pulses,
2196                 store_fan_pulses, 0);
2197 SENSOR_TEMPLATE(fan_min, "fan%d_min", S_IWUSR | S_IRUGO, show_fan_min,
2198                 store_fan_min, 0);
2199 SENSOR_TEMPLATE(fan_div, "fan%d_div", S_IRUGO, show_fan_div, NULL, 0);
2200
2201 /*
2202  * nct6775_fan_is_visible uses the index into the following array
2203  * to determine if attributes should be created or not.
2204  * Any change in order or content must be matched.
2205  */
2206 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
2207         &sensor_dev_template_fan_input,
2208         &sensor_dev_template_fan_alarm, /* 1 */
2209         &sensor_dev_template_fan_beep,  /* 2 */
2210         &sensor_dev_template_fan_pulses,
2211         &sensor_dev_template_fan_min,   /* 4 */
2212         &sensor_dev_template_fan_div,   /* 5 */
2213         NULL
2214 };
2215
2216 static const struct sensor_template_group nct6775_fan_template_group = {
2217         .templates = nct6775_attributes_fan_template,
2218         .is_visible = nct6775_fan_is_visible,
2219         .base = 1,
2220 };
2221
2222 static ssize_t
2223 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
2224 {
2225         struct nct6775_data *data = nct6775_update_device(dev);
2226         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2227         int nr = sattr->index;
2228
2229         return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
2230 }
2231
2232 static ssize_t
2233 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
2234 {
2235         struct nct6775_data *data = nct6775_update_device(dev);
2236         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2237         int nr = sattr->nr;
2238         int index = sattr->index;
2239
2240         return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
2241 }
2242
2243 static ssize_t
2244 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
2245            size_t count)
2246 {
2247         struct nct6775_data *data = dev_get_drvdata(dev);
2248         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2249         int nr = sattr->nr;
2250         int index = sattr->index;
2251         int err;
2252         long val;
2253
2254         err = kstrtol(buf, 10, &val);
2255         if (err < 0)
2256                 return err;
2257
2258         mutex_lock(&data->update_lock);
2259         data->temp[index][nr] = LM75_TEMP_TO_REG(val);
2260         nct6775_write_temp(data, data->reg_temp[index][nr],
2261                            data->temp[index][nr]);
2262         mutex_unlock(&data->update_lock);
2263         return count;
2264 }
2265
2266 static ssize_t
2267 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
2268 {
2269         struct nct6775_data *data = nct6775_update_device(dev);
2270         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2271
2272         return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
2273 }
2274
2275 static ssize_t
2276 store_temp_offset(struct device *dev, struct device_attribute *attr,
2277                   const char *buf, size_t count)
2278 {
2279         struct nct6775_data *data = dev_get_drvdata(dev);
2280         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2281         int nr = sattr->index;
2282         long val;
2283         int err;
2284
2285         err = kstrtol(buf, 10, &val);
2286         if (err < 0)
2287                 return err;
2288
2289         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
2290
2291         mutex_lock(&data->update_lock);
2292         data->temp_offset[nr] = val;
2293         nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
2294         mutex_unlock(&data->update_lock);
2295
2296         return count;
2297 }
2298
2299 static ssize_t
2300 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
2301 {
2302         struct nct6775_data *data = nct6775_update_device(dev);
2303         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2304         int nr = sattr->index;
2305
2306         return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
2307 }
2308
2309 static ssize_t
2310 store_temp_type(struct device *dev, struct device_attribute *attr,
2311                 const char *buf, size_t count)
2312 {
2313         struct nct6775_data *data = nct6775_update_device(dev);
2314         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2315         int nr = sattr->index;
2316         unsigned long val;
2317         int err;
2318         u8 vbat, diode, vbit, dbit;
2319
2320         err = kstrtoul(buf, 10, &val);
2321         if (err < 0)
2322                 return err;
2323
2324         if (val != 1 && val != 3 && val != 4)
2325                 return -EINVAL;
2326
2327         mutex_lock(&data->update_lock);
2328
2329         data->temp_type[nr] = val;
2330         vbit = 0x02 << nr;
2331         dbit = data->DIODE_MASK << nr;
2332         vbat = nct6775_read_value(data, data->REG_VBAT) & ~vbit;
2333         diode = nct6775_read_value(data, data->REG_DIODE) & ~dbit;
2334         switch (val) {
2335         case 1: /* CPU diode (diode, current mode) */
2336                 vbat |= vbit;
2337                 diode |= dbit;
2338                 break;
2339         case 3: /* diode, voltage mode */
2340                 vbat |= dbit;
2341                 break;
2342         case 4: /* thermistor */
2343                 break;
2344         }
2345         nct6775_write_value(data, data->REG_VBAT, vbat);
2346         nct6775_write_value(data, data->REG_DIODE, diode);
2347
2348         mutex_unlock(&data->update_lock);
2349         return count;
2350 }
2351
2352 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
2353                                        struct attribute *attr, int index)
2354 {
2355         struct device *dev = container_of(kobj, struct device, kobj);
2356         struct nct6775_data *data = dev_get_drvdata(dev);
2357         int temp = index / 10;  /* temp index */
2358         int nr = index % 10;    /* attribute index */
2359
2360         if (!(data->have_temp & BIT(temp)))
2361                 return 0;
2362
2363         if (nr == 1 && !data->temp_label)
2364                 return 0;
2365
2366         if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0)
2367                 return 0;                               /* alarm */
2368
2369         if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0)
2370                 return 0;                               /* beep */
2371
2372         if (nr == 4 && !data->reg_temp[1][temp])        /* max */
2373                 return 0;
2374
2375         if (nr == 5 && !data->reg_temp[2][temp])        /* max_hyst */
2376                 return 0;
2377
2378         if (nr == 6 && !data->reg_temp[3][temp])        /* crit */
2379                 return 0;
2380
2381         if (nr == 7 && !data->reg_temp[4][temp])        /* lcrit */
2382                 return 0;
2383
2384         /* offset and type only apply to fixed sensors */
2385         if (nr > 7 && !(data->have_temp_fixed & BIT(temp)))
2386                 return 0;
2387
2388         return attr->mode;
2389 }
2390
2391 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", S_IRUGO, show_temp, NULL, 0, 0);
2392 SENSOR_TEMPLATE(temp_label, "temp%d_label", S_IRUGO, show_temp_label, NULL, 0);
2393 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", S_IRUGO | S_IWUSR, show_temp,
2394                   store_temp, 0, 1);
2395 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", S_IRUGO | S_IWUSR,
2396                   show_temp, store_temp, 0, 2);
2397 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", S_IRUGO | S_IWUSR, show_temp,
2398                   store_temp, 0, 3);
2399 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", S_IRUGO | S_IWUSR, show_temp,
2400                   store_temp, 0, 4);
2401 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", S_IRUGO | S_IWUSR,
2402                 show_temp_offset, store_temp_offset, 0);
2403 SENSOR_TEMPLATE(temp_type, "temp%d_type", S_IRUGO | S_IWUSR, show_temp_type,
2404                 store_temp_type, 0);
2405 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", S_IRUGO, show_temp_alarm, NULL, 0);
2406 SENSOR_TEMPLATE(temp_beep, "temp%d_beep", S_IRUGO | S_IWUSR, show_temp_beep,
2407                 store_temp_beep, 0);
2408
2409 /*
2410  * nct6775_temp_is_visible uses the index into the following array
2411  * to determine if attributes should be created or not.
2412  * Any change in order or content must be matched.
2413  */
2414 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
2415         &sensor_dev_template_temp_input,
2416         &sensor_dev_template_temp_label,
2417         &sensor_dev_template_temp_alarm,        /* 2 */
2418         &sensor_dev_template_temp_beep,         /* 3 */
2419         &sensor_dev_template_temp_max,          /* 4 */
2420         &sensor_dev_template_temp_max_hyst,     /* 5 */
2421         &sensor_dev_template_temp_crit,         /* 6 */
2422         &sensor_dev_template_temp_lcrit,        /* 7 */
2423         &sensor_dev_template_temp_offset,       /* 8 */
2424         &sensor_dev_template_temp_type,         /* 9 */
2425         NULL
2426 };
2427
2428 static const struct sensor_template_group nct6775_temp_template_group = {
2429         .templates = nct6775_attributes_temp_template,
2430         .is_visible = nct6775_temp_is_visible,
2431         .base = 1,
2432 };
2433
2434 static ssize_t
2435 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
2436 {
2437         struct nct6775_data *data = nct6775_update_device(dev);
2438         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2439
2440         return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
2441 }
2442
2443 static ssize_t
2444 store_pwm_mode(struct device *dev, struct device_attribute *attr,
2445                const char *buf, size_t count)
2446 {
2447         struct nct6775_data *data = dev_get_drvdata(dev);
2448         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2449         int nr = sattr->index;
2450         unsigned long val;
2451         int err;
2452         u8 reg;
2453
2454         err = kstrtoul(buf, 10, &val);
2455         if (err < 0)
2456                 return err;
2457
2458         if (val > 1)
2459                 return -EINVAL;
2460
2461         /* Setting DC mode is not supported for all chips/channels */
2462         if (data->REG_PWM_MODE[nr] == 0) {
2463                 if (val)
2464                         return -EINVAL;
2465                 return count;
2466         }
2467
2468         mutex_lock(&data->update_lock);
2469         data->pwm_mode[nr] = val;
2470         reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
2471         reg &= ~data->PWM_MODE_MASK[nr];
2472         if (val)
2473                 reg |= data->PWM_MODE_MASK[nr];
2474         nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
2475         mutex_unlock(&data->update_lock);
2476         return count;
2477 }
2478
2479 static ssize_t
2480 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2481 {
2482         struct nct6775_data *data = nct6775_update_device(dev);
2483         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2484         int nr = sattr->nr;
2485         int index = sattr->index;
2486         int pwm;
2487
2488         /*
2489          * For automatic fan control modes, show current pwm readings.
2490          * Otherwise, show the configured value.
2491          */
2492         if (index == 0 && data->pwm_enable[nr] > manual)
2493                 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
2494         else
2495                 pwm = data->pwm[index][nr];
2496
2497         return sprintf(buf, "%d\n", pwm);
2498 }
2499
2500 static ssize_t
2501 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
2502           size_t count)
2503 {
2504         struct nct6775_data *data = dev_get_drvdata(dev);
2505         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2506         int nr = sattr->nr;
2507         int index = sattr->index;
2508         unsigned long val;
2509         int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
2510         int maxval[7]
2511           = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
2512         int err;
2513         u8 reg;
2514
2515         err = kstrtoul(buf, 10, &val);
2516         if (err < 0)
2517                 return err;
2518         val = clamp_val(val, minval[index], maxval[index]);
2519
2520         mutex_lock(&data->update_lock);
2521         data->pwm[index][nr] = val;
2522         nct6775_write_value(data, data->REG_PWM[index][nr], val);
2523         if (index == 2) { /* floor: disable if val == 0 */
2524                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2525                 reg &= 0x7f;
2526                 if (val)
2527                         reg |= 0x80;
2528                 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2529         }
2530         mutex_unlock(&data->update_lock);
2531         return count;
2532 }
2533
2534 /* Returns 0 if OK, -EINVAL otherwise */
2535 static int check_trip_points(struct nct6775_data *data, int nr)
2536 {
2537         int i;
2538
2539         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2540                 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
2541                         return -EINVAL;
2542         }
2543         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2544                 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
2545                         return -EINVAL;
2546         }
2547         /* validate critical temperature and pwm if enabled (pwm > 0) */
2548         if (data->auto_pwm[nr][data->auto_pwm_num]) {
2549                 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2550                                 data->auto_temp[nr][data->auto_pwm_num] ||
2551                     data->auto_pwm[nr][data->auto_pwm_num - 1] >
2552                                 data->auto_pwm[nr][data->auto_pwm_num])
2553                         return -EINVAL;
2554         }
2555         return 0;
2556 }
2557
2558 static void pwm_update_registers(struct nct6775_data *data, int nr)
2559 {
2560         u8 reg;
2561
2562         switch (data->pwm_enable[nr]) {
2563         case off:
2564         case manual:
2565                 break;
2566         case speed_cruise:
2567                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2568                 reg = (reg & ~data->tolerance_mask) |
2569                   (data->target_speed_tolerance[nr] & data->tolerance_mask);
2570                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2571                 nct6775_write_value(data, data->REG_TARGET[nr],
2572                                     data->target_speed[nr] & 0xff);
2573                 if (data->REG_TOLERANCE_H) {
2574                         reg = (data->target_speed[nr] >> 8) & 0x0f;
2575                         reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2576                         nct6775_write_value(data,
2577                                             data->REG_TOLERANCE_H[nr],
2578                                             reg);
2579                 }
2580                 break;
2581         case thermal_cruise:
2582                 nct6775_write_value(data, data->REG_TARGET[nr],
2583                                     data->target_temp[nr]);
2584                 /* intentional */
2585         default:
2586                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2587                 reg = (reg & ~data->tolerance_mask) |
2588                   data->temp_tolerance[0][nr];
2589                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2590                 break;
2591         }
2592 }
2593
2594 static ssize_t
2595 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2596 {
2597         struct nct6775_data *data = nct6775_update_device(dev);
2598         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2599
2600         return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2601 }
2602
2603 static ssize_t
2604 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2605                  const char *buf, size_t count)
2606 {
2607         struct nct6775_data *data = dev_get_drvdata(dev);
2608         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2609         int nr = sattr->index;
2610         unsigned long val;
2611         int err;
2612         u16 reg;
2613
2614         err = kstrtoul(buf, 10, &val);
2615         if (err < 0)
2616                 return err;
2617
2618         if (val > sf4)
2619                 return -EINVAL;
2620
2621         if (val == sf3 && data->kind != nct6775)
2622                 return -EINVAL;
2623
2624         if (val == sf4 && check_trip_points(data, nr)) {
2625                 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2626                 dev_err(dev, "Adjust trip points and try again\n");
2627                 return -EINVAL;
2628         }
2629
2630         mutex_lock(&data->update_lock);
2631         data->pwm_enable[nr] = val;
2632         if (val == off) {
2633                 /*
2634                  * turn off pwm control: select manual mode, set pwm to maximum
2635                  */
2636                 data->pwm[0][nr] = 255;
2637                 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2638         }
2639         pwm_update_registers(data, nr);
2640         reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2641         reg &= 0x0f;
2642         reg |= pwm_enable_to_reg(val) << 4;
2643         nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2644         mutex_unlock(&data->update_lock);
2645         return count;
2646 }
2647
2648 static ssize_t
2649 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2650 {
2651         int i, sel = 0;
2652
2653         for (i = 0; i < NUM_TEMP; i++) {
2654                 if (!(data->have_temp & BIT(i)))
2655                         continue;
2656                 if (src == data->temp_src[i]) {
2657                         sel = i + 1;
2658                         break;
2659                 }
2660         }
2661
2662         return sprintf(buf, "%d\n", sel);
2663 }
2664
2665 static ssize_t
2666 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2667 {
2668         struct nct6775_data *data = nct6775_update_device(dev);
2669         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2670         int index = sattr->index;
2671
2672         return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2673 }
2674
2675 static ssize_t
2676 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2677                    const char *buf, size_t count)
2678 {
2679         struct nct6775_data *data = nct6775_update_device(dev);
2680         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2681         int nr = sattr->index;
2682         unsigned long val;
2683         int err, reg, src;
2684
2685         err = kstrtoul(buf, 10, &val);
2686         if (err < 0)
2687                 return err;
2688         if (val == 0 || val > NUM_TEMP)
2689                 return -EINVAL;
2690         if (!(data->have_temp & BIT(val - 1)) || !data->temp_src[val - 1])
2691                 return -EINVAL;
2692
2693         mutex_lock(&data->update_lock);
2694         src = data->temp_src[val - 1];
2695         data->pwm_temp_sel[nr] = src;
2696         reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2697         reg &= 0xe0;
2698         reg |= src;
2699         nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2700         mutex_unlock(&data->update_lock);
2701
2702         return count;
2703 }
2704
2705 static ssize_t
2706 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2707                          char *buf)
2708 {
2709         struct nct6775_data *data = nct6775_update_device(dev);
2710         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2711         int index = sattr->index;
2712
2713         return show_pwm_temp_sel_common(data, buf,
2714                                         data->pwm_weight_temp_sel[index]);
2715 }
2716
2717 static ssize_t
2718 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2719                           const char *buf, size_t count)
2720 {
2721         struct nct6775_data *data = nct6775_update_device(dev);
2722         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2723         int nr = sattr->index;
2724         unsigned long val;
2725         int err, reg, src;
2726
2727         err = kstrtoul(buf, 10, &val);
2728         if (err < 0)
2729                 return err;
2730         if (val > NUM_TEMP)
2731                 return -EINVAL;
2732         if (val && (!(data->have_temp & BIT(val - 1)) ||
2733                     !data->temp_src[val - 1]))
2734                 return -EINVAL;
2735
2736         mutex_lock(&data->update_lock);
2737         if (val) {
2738                 src = data->temp_src[val - 1];
2739                 data->pwm_weight_temp_sel[nr] = src;
2740                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2741                 reg &= 0xe0;
2742                 reg |= (src | 0x80);
2743                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2744         } else {
2745                 data->pwm_weight_temp_sel[nr] = 0;
2746                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2747                 reg &= 0x7f;
2748                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2749         }
2750         mutex_unlock(&data->update_lock);
2751
2752         return count;
2753 }
2754
2755 static ssize_t
2756 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2757 {
2758         struct nct6775_data *data = nct6775_update_device(dev);
2759         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2760
2761         return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2762 }
2763
2764 static ssize_t
2765 store_target_temp(struct device *dev, struct device_attribute *attr,
2766                   const char *buf, size_t count)
2767 {
2768         struct nct6775_data *data = dev_get_drvdata(dev);
2769         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2770         int nr = sattr->index;
2771         unsigned long val;
2772         int err;
2773
2774         err = kstrtoul(buf, 10, &val);
2775         if (err < 0)
2776                 return err;
2777
2778         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2779                         data->target_temp_mask);
2780
2781         mutex_lock(&data->update_lock);
2782         data->target_temp[nr] = val;
2783         pwm_update_registers(data, nr);
2784         mutex_unlock(&data->update_lock);
2785         return count;
2786 }
2787
2788 static ssize_t
2789 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2790 {
2791         struct nct6775_data *data = nct6775_update_device(dev);
2792         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2793         int nr = sattr->index;
2794
2795         return sprintf(buf, "%d\n",
2796                        fan_from_reg16(data->target_speed[nr],
2797                                       data->fan_div[nr]));
2798 }
2799
2800 static ssize_t
2801 store_target_speed(struct device *dev, struct device_attribute *attr,
2802                    const char *buf, size_t count)
2803 {
2804         struct nct6775_data *data = dev_get_drvdata(dev);
2805         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2806         int nr = sattr->index;
2807         unsigned long val;
2808         int err;
2809         u16 speed;
2810
2811         err = kstrtoul(buf, 10, &val);
2812         if (err < 0)
2813                 return err;
2814
2815         val = clamp_val(val, 0, 1350000U);
2816         speed = fan_to_reg(val, data->fan_div[nr]);
2817
2818         mutex_lock(&data->update_lock);
2819         data->target_speed[nr] = speed;
2820         pwm_update_registers(data, nr);
2821         mutex_unlock(&data->update_lock);
2822         return count;
2823 }
2824
2825 static ssize_t
2826 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2827                     char *buf)
2828 {
2829         struct nct6775_data *data = nct6775_update_device(dev);
2830         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2831         int nr = sattr->nr;
2832         int index = sattr->index;
2833
2834         return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2835 }
2836
2837 static ssize_t
2838 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2839                      const char *buf, size_t count)
2840 {
2841         struct nct6775_data *data = dev_get_drvdata(dev);
2842         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2843         int nr = sattr->nr;
2844         int index = sattr->index;
2845         unsigned long val;
2846         int err;
2847
2848         err = kstrtoul(buf, 10, &val);
2849         if (err < 0)
2850                 return err;
2851
2852         /* Limit tolerance as needed */
2853         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2854
2855         mutex_lock(&data->update_lock);
2856         data->temp_tolerance[index][nr] = val;
2857         if (index)
2858                 pwm_update_registers(data, nr);
2859         else
2860                 nct6775_write_value(data,
2861                                     data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2862                                     val);
2863         mutex_unlock(&data->update_lock);
2864         return count;
2865 }
2866
2867 /*
2868  * Fan speed tolerance is a tricky beast, since the associated register is
2869  * a tick counter, but the value is reported and configured as rpm.
2870  * Compute resulting low and high rpm values and report the difference.
2871  */
2872 static ssize_t
2873 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2874                      char *buf)
2875 {
2876         struct nct6775_data *data = nct6775_update_device(dev);
2877         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2878         int nr = sattr->index;
2879         int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2880         int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2881         int tolerance;
2882
2883         if (low <= 0)
2884                 low = 1;
2885         if (high > 0xffff)
2886                 high = 0xffff;
2887         if (high < low)
2888                 high = low;
2889
2890         tolerance = (fan_from_reg16(low, data->fan_div[nr])
2891                      - fan_from_reg16(high, data->fan_div[nr])) / 2;
2892
2893         return sprintf(buf, "%d\n", tolerance);
2894 }
2895
2896 static ssize_t
2897 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2898                       const char *buf, size_t count)
2899 {
2900         struct nct6775_data *data = dev_get_drvdata(dev);
2901         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2902         int nr = sattr->index;
2903         unsigned long val;
2904         int err;
2905         int low, high;
2906
2907         err = kstrtoul(buf, 10, &val);
2908         if (err < 0)
2909                 return err;
2910
2911         high = fan_from_reg16(data->target_speed[nr],
2912                               data->fan_div[nr]) + val;
2913         low = fan_from_reg16(data->target_speed[nr],
2914                              data->fan_div[nr]) - val;
2915         if (low <= 0)
2916                 low = 1;
2917         if (high < low)
2918                 high = low;
2919
2920         val = (fan_to_reg(low, data->fan_div[nr]) -
2921                fan_to_reg(high, data->fan_div[nr])) / 2;
2922
2923         /* Limit tolerance as needed */
2924         val = clamp_val(val, 0, data->speed_tolerance_limit);
2925
2926         mutex_lock(&data->update_lock);
2927         data->target_speed_tolerance[nr] = val;
2928         pwm_update_registers(data, nr);
2929         mutex_unlock(&data->update_lock);
2930         return count;
2931 }
2932
2933 SENSOR_TEMPLATE_2(pwm, "pwm%d", S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2934 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", S_IWUSR | S_IRUGO, show_pwm_mode,
2935                 store_pwm_mode, 0);
2936 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", S_IWUSR | S_IRUGO, show_pwm_enable,
2937                 store_pwm_enable, 0);
2938 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", S_IWUSR | S_IRUGO,
2939                 show_pwm_temp_sel, store_pwm_temp_sel, 0);
2940 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", S_IWUSR | S_IRUGO,
2941                 show_target_temp, store_target_temp, 0);
2942 SENSOR_TEMPLATE(fan_target, "fan%d_target", S_IWUSR | S_IRUGO,
2943                 show_target_speed, store_target_speed, 0);
2944 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", S_IWUSR | S_IRUGO,
2945                 show_speed_tolerance, store_speed_tolerance, 0);
2946
2947 /* Smart Fan registers */
2948
2949 static ssize_t
2950 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2951 {
2952         struct nct6775_data *data = nct6775_update_device(dev);
2953         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2954         int nr = sattr->nr;
2955         int index = sattr->index;
2956
2957         return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2958 }
2959
2960 static ssize_t
2961 store_weight_temp(struct device *dev, struct device_attribute *attr,
2962                   const char *buf, size_t count)
2963 {
2964         struct nct6775_data *data = dev_get_drvdata(dev);
2965         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2966         int nr = sattr->nr;
2967         int index = sattr->index;
2968         unsigned long val;
2969         int err;
2970
2971         err = kstrtoul(buf, 10, &val);
2972         if (err < 0)
2973                 return err;
2974
2975         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2976
2977         mutex_lock(&data->update_lock);
2978         data->weight_temp[index][nr] = val;
2979         nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2980         mutex_unlock(&data->update_lock);
2981         return count;
2982 }
2983
2984 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", S_IWUSR | S_IRUGO,
2985                   show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
2986 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step",
2987                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 0);
2988 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol",
2989                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 1);
2990 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base",
2991                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 2);
2992 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step",
2993                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 5);
2994 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base",
2995                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 6);
2996
2997 static ssize_t
2998 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2999 {
3000         struct nct6775_data *data = nct6775_update_device(dev);
3001         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3002         int nr = sattr->nr;
3003         int index = sattr->index;
3004
3005         return sprintf(buf, "%d\n",
3006                        step_time_from_reg(data->fan_time[index][nr],
3007                                           data->pwm_mode[nr]));
3008 }
3009
3010 static ssize_t
3011 store_fan_time(struct device *dev, struct device_attribute *attr,
3012                const char *buf, size_t count)
3013 {
3014         struct nct6775_data *data = dev_get_drvdata(dev);
3015         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3016         int nr = sattr->nr;
3017         int index = sattr->index;
3018         unsigned long val;
3019         int err;
3020
3021         err = kstrtoul(buf, 10, &val);
3022         if (err < 0)
3023                 return err;
3024
3025         val = step_time_to_reg(val, data->pwm_mode[nr]);
3026         mutex_lock(&data->update_lock);
3027         data->fan_time[index][nr] = val;
3028         nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
3029         mutex_unlock(&data->update_lock);
3030         return count;
3031 }
3032
3033 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
3034 static ssize_t
3035 show_name(struct device *dev, struct device_attribute *attr, char *buf)
3036 {
3037         struct nct6775_data *data = dev_get_drvdata(dev);
3038
3039         return sprintf(buf, "%s\n", data->name);
3040 }
3041
3042 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
3043 #endif
3044
3045 static ssize_t
3046 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
3047 {
3048         struct nct6775_data *data = nct6775_update_device(dev);
3049         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3050
3051         return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
3052 }
3053
3054 static ssize_t
3055 store_auto_pwm(struct device *dev, struct device_attribute *attr,
3056                const char *buf, size_t count)
3057 {
3058         struct nct6775_data *data = dev_get_drvdata(dev);
3059         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3060         int nr = sattr->nr;
3061         int point = sattr->index;
3062         unsigned long val;
3063         int err;
3064         u8 reg;
3065
3066         err = kstrtoul(buf, 10, &val);
3067         if (err < 0)
3068                 return err;
3069         if (val > 255)
3070                 return -EINVAL;
3071
3072         if (point == data->auto_pwm_num) {
3073                 if (data->kind != nct6775 && !val)
3074                         return -EINVAL;
3075                 if (data->kind != nct6779 && val)
3076                         val = 0xff;
3077         }
3078
3079         mutex_lock(&data->update_lock);
3080         data->auto_pwm[nr][point] = val;
3081         if (point < data->auto_pwm_num) {
3082                 nct6775_write_value(data,
3083                                     NCT6775_AUTO_PWM(data, nr, point),
3084                                     data->auto_pwm[nr][point]);
3085         } else {
3086                 switch (data->kind) {
3087                 case nct6775:
3088                         /* disable if needed (pwm == 0) */
3089                         reg = nct6775_read_value(data,
3090                                                  NCT6775_REG_CRITICAL_ENAB[nr]);
3091                         if (val)
3092                                 reg |= 0x02;
3093                         else
3094                                 reg &= ~0x02;
3095                         nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
3096                                             reg);
3097                         break;
3098                 case nct6776:
3099                         break; /* always enabled, nothing to do */
3100                 case nct6106:
3101                 case nct6779:
3102                 case nct6791:
3103                 case nct6792:
3104                 case nct6793:
3105                 case nct6795:
3106                         nct6775_write_value(data, data->REG_CRITICAL_PWM[nr],
3107                                             val);
3108                         reg = nct6775_read_value(data,
3109                                         data->REG_CRITICAL_PWM_ENABLE[nr]);
3110                         if (val == 255)
3111                                 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
3112                         else
3113                                 reg |= data->CRITICAL_PWM_ENABLE_MASK;
3114                         nct6775_write_value(data,
3115                                             data->REG_CRITICAL_PWM_ENABLE[nr],
3116                                             reg);
3117                         break;
3118                 }
3119         }
3120         mutex_unlock(&data->update_lock);
3121         return count;
3122 }
3123
3124 static ssize_t
3125 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
3126 {
3127         struct nct6775_data *data = nct6775_update_device(dev);
3128         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3129         int nr = sattr->nr;
3130         int point = sattr->index;
3131
3132         /*
3133          * We don't know for sure if the temperature is signed or unsigned.
3134          * Assume it is unsigned.
3135          */
3136         return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
3137 }
3138
3139 static ssize_t
3140 store_auto_temp(struct device *dev, struct device_attribute *attr,
3141                 const char *buf, size_t count)
3142 {
3143         struct nct6775_data *data = dev_get_drvdata(dev);
3144         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3145         int nr = sattr->nr;
3146         int point = sattr->index;
3147         unsigned long val;
3148         int err;
3149
3150         err = kstrtoul(buf, 10, &val);
3151         if (err)
3152                 return err;
3153         if (val > 255000)
3154                 return -EINVAL;
3155
3156         mutex_lock(&data->update_lock);
3157         data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
3158         if (point < data->auto_pwm_num) {
3159                 nct6775_write_value(data,
3160                                     NCT6775_AUTO_TEMP(data, nr, point),
3161                                     data->auto_temp[nr][point]);
3162         } else {
3163                 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
3164                                     data->auto_temp[nr][point]);
3165         }
3166         mutex_unlock(&data->update_lock);
3167         return count;
3168 }
3169
3170 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
3171                                       struct attribute *attr, int index)
3172 {
3173         struct device *dev = container_of(kobj, struct device, kobj);
3174         struct nct6775_data *data = dev_get_drvdata(dev);
3175         int pwm = index / 36;   /* pwm index */
3176         int nr = index % 36;    /* attribute index */
3177
3178         if (!(data->has_pwm & BIT(pwm)))
3179                 return 0;
3180
3181         if ((nr >= 14 && nr <= 18) || nr == 21)   /* weight */
3182                 if (!data->REG_WEIGHT_TEMP_SEL[pwm])
3183                         return 0;
3184         if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
3185                 return 0;
3186         if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
3187                 return 0;
3188         if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
3189                 return 0;
3190
3191         if (nr >= 22 && nr <= 35) {             /* auto point */
3192                 int api = (nr - 22) / 2;        /* auto point index */
3193
3194                 if (api > data->auto_pwm_num)
3195                         return 0;
3196         }
3197         return attr->mode;
3198 }
3199
3200 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", S_IWUSR | S_IRUGO,
3201                   show_fan_time, store_fan_time, 0, 0);
3202 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", S_IWUSR | S_IRUGO,
3203                   show_fan_time, store_fan_time, 0, 1);
3204 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", S_IWUSR | S_IRUGO,
3205                   show_fan_time, store_fan_time, 0, 2);
3206 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", S_IWUSR | S_IRUGO, show_pwm,
3207                   store_pwm, 0, 1);
3208 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", S_IWUSR | S_IRUGO, show_pwm,
3209                   store_pwm, 0, 2);
3210 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", S_IWUSR | S_IRUGO,
3211                   show_temp_tolerance, store_temp_tolerance, 0, 0);
3212 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance",
3213                   S_IWUSR | S_IRUGO, show_temp_tolerance, store_temp_tolerance,
3214                   0, 1);
3215
3216 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", S_IWUSR | S_IRUGO, show_pwm, store_pwm,
3217                   0, 3);
3218
3219 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", S_IWUSR | S_IRUGO, show_pwm,
3220                   store_pwm, 0, 4);
3221
3222 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm",
3223                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 0);
3224 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp",
3225                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 0);
3226
3227 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm",
3228                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 1);
3229 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp",
3230                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 1);
3231
3232 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm",
3233                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 2);
3234 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp",
3235                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 2);
3236
3237 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm",
3238                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 3);
3239 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp",
3240                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 3);
3241
3242 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm",
3243                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 4);
3244 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp",
3245                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 4);
3246
3247 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm",
3248                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 5);
3249 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp",
3250                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 5);
3251
3252 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm",
3253                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 6);
3254 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp",
3255                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 6);
3256
3257 /*
3258  * nct6775_pwm_is_visible uses the index into the following array
3259  * to determine if attributes should be created or not.
3260  * Any change in order or content must be matched.
3261  */
3262 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
3263         &sensor_dev_template_pwm,
3264         &sensor_dev_template_pwm_mode,
3265         &sensor_dev_template_pwm_enable,
3266         &sensor_dev_template_pwm_temp_sel,
3267         &sensor_dev_template_pwm_temp_tolerance,
3268         &sensor_dev_template_pwm_crit_temp_tolerance,
3269         &sensor_dev_template_pwm_target_temp,
3270         &sensor_dev_template_fan_target,
3271         &sensor_dev_template_fan_tolerance,
3272         &sensor_dev_template_pwm_stop_time,
3273         &sensor_dev_template_pwm_step_up_time,
3274         &sensor_dev_template_pwm_step_down_time,
3275         &sensor_dev_template_pwm_start,
3276         &sensor_dev_template_pwm_floor,
3277         &sensor_dev_template_pwm_weight_temp_sel,       /* 14 */
3278         &sensor_dev_template_pwm_weight_temp_step,
3279         &sensor_dev_template_pwm_weight_temp_step_tol,
3280         &sensor_dev_template_pwm_weight_temp_step_base,
3281         &sensor_dev_template_pwm_weight_duty_step,      /* 18 */
3282         &sensor_dev_template_pwm_max,                   /* 19 */
3283         &sensor_dev_template_pwm_step,                  /* 20 */
3284         &sensor_dev_template_pwm_weight_duty_base,      /* 21 */
3285         &sensor_dev_template_pwm_auto_point1_pwm,       /* 22 */
3286         &sensor_dev_template_pwm_auto_point1_temp,
3287         &sensor_dev_template_pwm_auto_point2_pwm,
3288         &sensor_dev_template_pwm_auto_point2_temp,
3289         &sensor_dev_template_pwm_auto_point3_pwm,
3290         &sensor_dev_template_pwm_auto_point3_temp,
3291         &sensor_dev_template_pwm_auto_point4_pwm,
3292         &sensor_dev_template_pwm_auto_point4_temp,
3293         &sensor_dev_template_pwm_auto_point5_pwm,
3294         &sensor_dev_template_pwm_auto_point5_temp,
3295         &sensor_dev_template_pwm_auto_point6_pwm,
3296         &sensor_dev_template_pwm_auto_point6_temp,
3297         &sensor_dev_template_pwm_auto_point7_pwm,
3298         &sensor_dev_template_pwm_auto_point7_temp,      /* 35 */
3299
3300         NULL
3301 };
3302
3303 static const struct sensor_template_group nct6775_pwm_template_group = {
3304         .templates = nct6775_attributes_pwm_template,
3305         .is_visible = nct6775_pwm_is_visible,
3306         .base = 1,
3307 };
3308
3309 static ssize_t
3310 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
3311 {
3312         struct nct6775_data *data = dev_get_drvdata(dev);
3313
3314         return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
3315 }
3316
3317 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
3318
3319 /* Case open detection */
3320
3321 static ssize_t
3322 clear_caseopen(struct device *dev, struct device_attribute *attr,
3323                const char *buf, size_t count)
3324 {
3325         struct nct6775_data *data = dev_get_drvdata(dev);
3326         int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
3327         unsigned long val;
3328         u8 reg;
3329         int ret;
3330
3331         if (kstrtoul(buf, 10, &val) || val != 0)
3332                 return -EINVAL;
3333
3334         mutex_lock(&data->update_lock);
3335
3336         /*
3337          * Use CR registers to clear caseopen status.
3338          * The CR registers are the same for all chips, and not all chips
3339          * support clearing the caseopen status through "regular" registers.
3340          */
3341         ret = superio_enter(data->sioreg);
3342         if (ret) {
3343                 count = ret;
3344                 goto error;
3345         }
3346
3347         superio_select(data->sioreg, NCT6775_LD_ACPI);
3348         reg = superio_inb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
3349         reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3350         superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3351         reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3352         superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3353         superio_exit(data->sioreg);
3354
3355         data->valid = false;    /* Force cache refresh */
3356 error:
3357         mutex_unlock(&data->update_lock);
3358         return count;
3359 }
3360
3361 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
3362                           clear_caseopen, INTRUSION_ALARM_BASE);
3363 static SENSOR_DEVICE_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
3364                           clear_caseopen, INTRUSION_ALARM_BASE + 1);
3365 static SENSOR_DEVICE_ATTR(intrusion0_beep, S_IWUSR | S_IRUGO, show_beep,
3366                           store_beep, INTRUSION_ALARM_BASE);
3367 static SENSOR_DEVICE_ATTR(intrusion1_beep, S_IWUSR | S_IRUGO, show_beep,
3368                           store_beep, INTRUSION_ALARM_BASE + 1);
3369 static SENSOR_DEVICE_ATTR(beep_enable, S_IWUSR | S_IRUGO, show_beep,
3370                           store_beep, BEEP_ENABLE_BASE);
3371
3372 static umode_t nct6775_other_is_visible(struct kobject *kobj,
3373                                         struct attribute *attr, int index)
3374 {
3375         struct device *dev = container_of(kobj, struct device, kobj);
3376         struct nct6775_data *data = dev_get_drvdata(dev);
3377
3378         if (index == 0 && !data->have_vid)
3379                 return 0;
3380
3381         if (index == 1 || index == 2) {
3382                 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + index - 1] < 0)
3383                         return 0;
3384         }
3385
3386         if (index == 3 || index == 4) {
3387                 if (data->BEEP_BITS[INTRUSION_ALARM_BASE + index - 3] < 0)
3388                         return 0;
3389         }
3390
3391         return attr->mode;
3392 }
3393
3394 /*
3395  * nct6775_other_is_visible uses the index into the following array
3396  * to determine if attributes should be created or not.
3397  * Any change in order or content must be matched.
3398  */
3399 static struct attribute *nct6775_attributes_other[] = {
3400         &dev_attr_cpu0_vid.attr,                                /* 0 */
3401         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,        /* 1 */
3402         &sensor_dev_attr_intrusion1_alarm.dev_attr.attr,        /* 2 */
3403         &sensor_dev_attr_intrusion0_beep.dev_attr.attr,         /* 3 */
3404         &sensor_dev_attr_intrusion1_beep.dev_attr.attr,         /* 4 */
3405         &sensor_dev_attr_beep_enable.dev_attr.attr,             /* 5 */
3406 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
3407         &dev_attr_name.attr,
3408 #endif
3409         NULL
3410 };
3411
3412 static const struct attribute_group nct6775_group_other = {
3413         .attrs = nct6775_attributes_other,
3414         .is_visible = nct6775_other_is_visible,
3415 };
3416
3417 static inline void nct6775_init_device(struct nct6775_data *data)
3418 {
3419         int i;
3420         u8 tmp, diode;
3421
3422         /* Start monitoring if needed */
3423         if (data->REG_CONFIG) {
3424                 tmp = nct6775_read_value(data, data->REG_CONFIG);
3425                 if (!(tmp & 0x01))
3426                         nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
3427         }
3428
3429         /* Enable temperature sensors if needed */
3430         for (i = 0; i < NUM_TEMP; i++) {
3431                 if (!(data->have_temp & BIT(i)))
3432                         continue;
3433                 if (!data->reg_temp_config[i])
3434                         continue;
3435                 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
3436                 if (tmp & 0x01)
3437                         nct6775_write_value(data, data->reg_temp_config[i],
3438                                             tmp & 0xfe);
3439         }
3440
3441         /* Enable VBAT monitoring if needed */
3442         tmp = nct6775_read_value(data, data->REG_VBAT);
3443         if (!(tmp & 0x01))
3444                 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
3445
3446         diode = nct6775_read_value(data, data->REG_DIODE);
3447
3448         for (i = 0; i < data->temp_fixed_num; i++) {
3449                 if (!(data->have_temp_fixed & BIT(i)))
3450                         continue;
3451                 if ((tmp & (data->DIODE_MASK << i)))    /* diode */
3452                         data->temp_type[i]
3453                           = 3 - ((diode >> i) & data->DIODE_MASK);
3454                 else                            /* thermistor */
3455                         data->temp_type[i] = 4;
3456         }
3457 }
3458
3459 static void
3460 nct6775_check_fan_inputs(struct nct6775_data *data)
3461 {
3462         bool fan3pin, fan4pin, fan4min, fan5pin, fan6pin;
3463         bool pwm3pin, pwm4pin, pwm5pin, pwm6pin;
3464         int sioreg = data->sioreg;
3465         int regval;
3466
3467         /* Store SIO_REG_ENABLE for use during resume */
3468         superio_select(sioreg, NCT6775_LD_HWM);
3469         data->sio_reg_enable = superio_inb(sioreg, SIO_REG_ENABLE);
3470
3471         /* fan4 and fan5 share some pins with the GPIO and serial flash */
3472         if (data->kind == nct6775) {
3473                 regval = superio_inb(sioreg, 0x2c);
3474
3475                 fan3pin = regval & BIT(6);
3476                 pwm3pin = regval & BIT(7);
3477
3478                 /* On NCT6775, fan4 shares pins with the fdc interface */
3479                 fan4pin = !(superio_inb(sioreg, 0x2A) & 0x80);
3480                 fan4min = false;
3481                 fan5pin = false;
3482                 fan6pin = false;
3483                 pwm4pin = false;
3484                 pwm5pin = false;
3485                 pwm6pin = false;
3486         } else if (data->kind == nct6776) {
3487                 bool gpok = superio_inb(sioreg, 0x27) & 0x80;
3488                 const char *board_vendor, *board_name;
3489
3490                 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
3491                 board_name = dmi_get_system_info(DMI_BOARD_NAME);
3492
3493                 if (board_name && board_vendor &&
3494                     !strcmp(board_vendor, "ASRock")) {
3495                         /*
3496                          * Auxiliary fan monitoring is not enabled on ASRock
3497                          * Z77 Pro4-M if booted in UEFI Ultra-FastBoot mode.
3498                          * Observed with BIOS version 2.00.
3499                          */
3500                         if (!strcmp(board_name, "Z77 Pro4-M")) {
3501                                 if ((data->sio_reg_enable & 0xe0) != 0xe0) {
3502                                         data->sio_reg_enable |= 0xe0;
3503                                         superio_outb(sioreg, SIO_REG_ENABLE,
3504                                                      data->sio_reg_enable);
3505                                 }
3506                         }
3507                 }
3508
3509                 if (data->sio_reg_enable & 0x80)
3510                         fan3pin = gpok;
3511                 else
3512                         fan3pin = !(superio_inb(sioreg, 0x24) & 0x40);
3513
3514                 if (data->sio_reg_enable & 0x40)
3515                         fan4pin = gpok;
3516                 else
3517                         fan4pin = superio_inb(sioreg, 0x1C) & 0x01;
3518
3519                 if (data->sio_reg_enable & 0x20)
3520                         fan5pin = gpok;
3521                 else
3522                         fan5pin = superio_inb(sioreg, 0x1C) & 0x02;
3523
3524                 fan4min = fan4pin;
3525                 fan6pin = false;
3526                 pwm3pin = fan3pin;
3527                 pwm4pin = false;
3528                 pwm5pin = false;
3529                 pwm6pin = false;
3530         } else if (data->kind == nct6106) {
3531                 regval = superio_inb(sioreg, 0x24);
3532                 fan3pin = !(regval & 0x80);
3533                 pwm3pin = regval & 0x08;
3534
3535                 fan4pin = false;
3536                 fan4min = false;
3537                 fan5pin = false;
3538                 fan6pin = false;
3539                 pwm4pin = false;
3540                 pwm5pin = false;
3541                 pwm6pin = false;
3542         } else { /* NCT6779D, NCT6791D, NCT6792D, NCT6793D, NCT6795D */
3543                 int regval_1b, regval_2a, regval_eb;
3544
3545                 regval = superio_inb(sioreg, 0x1c);
3546
3547                 fan3pin = !(regval & BIT(5));
3548                 fan4pin = !(regval & BIT(6));
3549                 fan5pin = !(regval & BIT(7));
3550
3551                 pwm3pin = !(regval & BIT(0));
3552                 pwm4pin = !(regval & BIT(1));
3553                 pwm5pin = !(regval & BIT(2));
3554
3555                 regval = superio_inb(sioreg, 0x2d);
3556                 switch (data->kind) {
3557                 case nct6791:
3558                 case nct6792:
3559                         fan6pin = regval & BIT(1);
3560                         pwm6pin = regval & BIT(0);
3561                         break;
3562                 case nct6793:
3563                 case nct6795:
3564                         regval_1b = superio_inb(sioreg, 0x1b);
3565                         regval_2a = superio_inb(sioreg, 0x2a);
3566
3567                         if (!pwm5pin)
3568                                 pwm5pin = regval & BIT(7);
3569                         fan6pin = regval & BIT(1);
3570                         pwm6pin = regval & BIT(0);
3571                         if (!fan5pin)
3572                                 fan5pin = regval_1b & BIT(5);
3573
3574                         superio_select(sioreg, NCT6775_LD_12);
3575                         regval_eb = superio_inb(sioreg, 0xeb);
3576                         if (!fan5pin)
3577                                 fan5pin = regval_eb & BIT(5);
3578                         if (!pwm5pin)
3579                                 pwm5pin = (regval_eb & BIT(4)) &&
3580                                            !(regval_2a & BIT(0));
3581                         if (!fan6pin)
3582                                 fan6pin = regval_eb & BIT(3);
3583                         if (!pwm6pin)
3584                                 pwm6pin = regval_eb & BIT(2);
3585                         break;
3586                 default:        /* NCT6779D */
3587                         fan6pin = false;
3588                         pwm6pin = false;
3589                         break;
3590                 }
3591
3592                 fan4min = fan4pin;
3593         }
3594
3595         /* fan 1 and 2 (0x03) are always present */
3596         data->has_fan = 0x03 | (fan3pin << 2) | (fan4pin << 3) |
3597                 (fan5pin << 4) | (fan6pin << 5);
3598         data->has_fan_min = 0x03 | (fan3pin << 2) | (fan4min << 3) |
3599                 (fan5pin << 4);
3600         data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) |
3601                 (pwm5pin << 4) | (pwm6pin << 5);
3602 }
3603
3604 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
3605                              int *available, int *mask)
3606 {
3607         int i;
3608         u8 src;
3609
3610         for (i = 0; i < data->pwm_num && *available; i++) {
3611                 int index;
3612
3613                 if (!regp[i])
3614                         continue;
3615                 src = nct6775_read_value(data, regp[i]);
3616                 src &= 0x1f;
3617                 if (!src || (*mask & BIT(src)))
3618                         continue;
3619                 if (!(data->temp_mask & BIT(src)))
3620                         continue;
3621
3622                 index = __ffs(*available);
3623                 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3624                 *available &= ~BIT(index);
3625                 *mask |= BIT(src);
3626         }
3627 }
3628
3629 static int nct6775_probe(struct platform_device *pdev)
3630 {
3631         struct device *dev = &pdev->dev;
3632         struct nct6775_sio_data *sio_data = dev_get_platdata(dev);
3633         struct nct6775_data *data;
3634         struct resource *res;
3635         int i, s, err = 0;
3636         int src, mask, available;
3637         const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3638         const u16 *reg_temp_mon, *reg_temp_alternate, *reg_temp_crit;
3639         const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL;
3640         int num_reg_temp, num_reg_temp_mon;
3641         u8 cr2a;
3642         struct attribute_group *group;
3643         struct device *hwmon_dev;
3644         int num_attr_groups = 0;
3645
3646         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3647         if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3648                                  DRVNAME))
3649                 return -EBUSY;
3650
3651         data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3652                             GFP_KERNEL);
3653         if (!data)
3654                 return -ENOMEM;
3655
3656         data->kind = sio_data->kind;
3657         data->sioreg = sio_data->sioreg;
3658         data->addr = res->start;
3659         mutex_init(&data->update_lock);
3660         data->name = nct6775_device_names[data->kind];
3661         data->bank = 0xff;              /* Force initial bank selection */
3662         platform_set_drvdata(pdev, data);
3663
3664         switch (data->kind) {
3665         case nct6106:
3666                 data->in_num = 9;
3667                 data->pwm_num = 3;
3668                 data->auto_pwm_num = 4;
3669                 data->temp_fixed_num = 3;
3670                 data->num_temp_alarms = 6;
3671                 data->num_temp_beeps = 6;
3672
3673                 data->fan_from_reg = fan_from_reg13;
3674                 data->fan_from_reg_min = fan_from_reg13;
3675
3676                 data->temp_label = nct6776_temp_label;
3677                 data->temp_mask = NCT6776_TEMP_MASK;
3678
3679                 data->REG_VBAT = NCT6106_REG_VBAT;
3680                 data->REG_DIODE = NCT6106_REG_DIODE;
3681                 data->DIODE_MASK = NCT6106_DIODE_MASK;
3682                 data->REG_VIN = NCT6106_REG_IN;
3683                 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3684                 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3685                 data->REG_TARGET = NCT6106_REG_TARGET;
3686                 data->REG_FAN = NCT6106_REG_FAN;
3687                 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
3688                 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
3689                 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
3690                 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
3691                 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
3692                 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
3693                 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
3694                 data->REG_PWM[0] = NCT6106_REG_PWM;
3695                 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
3696                 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
3697                 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3698                 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3699                 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3700                 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3701                 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3702                 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
3703                 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
3704                 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
3705                 data->REG_CRITICAL_TEMP_TOLERANCE
3706                   = NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
3707                 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
3708                 data->CRITICAL_PWM_ENABLE_MASK
3709                   = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3710                 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
3711                 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3712                 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3713                 data->REG_TEMP_SEL = NCT6106_REG_TEMP_SEL;
3714                 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3715                 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3716                 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3717                 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3718                 data->REG_ALARM = NCT6106_REG_ALARM;
3719                 data->ALARM_BITS = NCT6106_ALARM_BITS;
3720                 data->REG_BEEP = NCT6106_REG_BEEP;
3721                 data->BEEP_BITS = NCT6106_BEEP_BITS;
3722
3723                 reg_temp = NCT6106_REG_TEMP;
3724                 reg_temp_mon = NCT6106_REG_TEMP_MON;
3725                 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3726                 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON);
3727                 reg_temp_over = NCT6106_REG_TEMP_OVER;
3728                 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3729                 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3730                 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3731                 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3732                 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3733                 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3734
3735                 break;
3736         case nct6775:
3737                 data->in_num = 9;
3738                 data->pwm_num = 3;
3739                 data->auto_pwm_num = 6;
3740                 data->has_fan_div = true;
3741                 data->temp_fixed_num = 3;
3742                 data->num_temp_alarms = 3;
3743                 data->num_temp_beeps = 3;
3744
3745                 data->ALARM_BITS = NCT6775_ALARM_BITS;
3746                 data->BEEP_BITS = NCT6775_BEEP_BITS;
3747
3748                 data->fan_from_reg = fan_from_reg16;
3749                 data->fan_from_reg_min = fan_from_reg8;
3750                 data->target_temp_mask = 0x7f;
3751                 data->tolerance_mask = 0x0f;
3752                 data->speed_tolerance_limit = 15;
3753
3754                 data->temp_label = nct6775_temp_label;
3755                 data->temp_mask = NCT6775_TEMP_MASK;
3756
3757                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3758                 data->REG_VBAT = NCT6775_REG_VBAT;
3759                 data->REG_DIODE = NCT6775_REG_DIODE;
3760                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3761                 data->REG_VIN = NCT6775_REG_IN;
3762                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3763                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3764                 data->REG_TARGET = NCT6775_REG_TARGET;
3765                 data->REG_FAN = NCT6775_REG_FAN;
3766                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3767                 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3768                 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3769                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3770                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3771                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3772                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3773                 data->REG_PWM[0] = NCT6775_REG_PWM;
3774                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3775                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3776                 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3777                 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3778                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3779                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3780                 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3781                 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3782                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3783                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3784                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3785                 data->REG_CRITICAL_TEMP_TOLERANCE
3786                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3787                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3788                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3789                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3790                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3791                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3792                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3793                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3794                 data->REG_ALARM = NCT6775_REG_ALARM;
3795                 data->REG_BEEP = NCT6775_REG_BEEP;
3796
3797                 reg_temp = NCT6775_REG_TEMP;
3798                 reg_temp_mon = NCT6775_REG_TEMP_MON;
3799                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3800                 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3801                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3802                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3803                 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3804                 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3805                 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3806
3807                 break;
3808         case nct6776:
3809                 data->in_num = 9;
3810                 data->pwm_num = 3;
3811                 data->auto_pwm_num = 4;
3812                 data->has_fan_div = false;
3813                 data->temp_fixed_num = 3;
3814                 data->num_temp_alarms = 3;
3815                 data->num_temp_beeps = 6;
3816
3817                 data->ALARM_BITS = NCT6776_ALARM_BITS;
3818                 data->BEEP_BITS = NCT6776_BEEP_BITS;
3819
3820                 data->fan_from_reg = fan_from_reg13;
3821                 data->fan_from_reg_min = fan_from_reg13;
3822                 data->target_temp_mask = 0xff;
3823                 data->tolerance_mask = 0x07;
3824                 data->speed_tolerance_limit = 63;
3825
3826                 data->temp_label = nct6776_temp_label;
3827                 data->temp_mask = NCT6776_TEMP_MASK;
3828
3829                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3830                 data->REG_VBAT = NCT6775_REG_VBAT;
3831                 data->REG_DIODE = NCT6775_REG_DIODE;
3832                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3833                 data->REG_VIN = NCT6775_REG_IN;
3834                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3835                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3836                 data->REG_TARGET = NCT6775_REG_TARGET;
3837                 data->REG_FAN = NCT6775_REG_FAN;
3838                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3839                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3840                 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3841                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3842                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3843                 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3844                 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3845                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3846                 data->REG_PWM[0] = NCT6775_REG_PWM;
3847                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3848                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3849                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3850                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3851                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3852                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3853                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3854                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3855                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3856                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3857                 data->REG_CRITICAL_TEMP_TOLERANCE
3858                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3859                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3860                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3861                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3862                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3863                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3864                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3865                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3866                 data->REG_ALARM = NCT6775_REG_ALARM;
3867                 data->REG_BEEP = NCT6776_REG_BEEP;
3868
3869                 reg_temp = NCT6775_REG_TEMP;
3870                 reg_temp_mon = NCT6775_REG_TEMP_MON;
3871                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3872                 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3873                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3874                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3875                 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3876                 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3877                 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3878
3879                 break;
3880         case nct6779:
3881                 data->in_num = 15;
3882                 data->pwm_num = 5;
3883                 data->auto_pwm_num = 4;
3884                 data->has_fan_div = false;
3885                 data->temp_fixed_num = 6;
3886                 data->num_temp_alarms = 2;
3887                 data->num_temp_beeps = 2;
3888
3889                 data->ALARM_BITS = NCT6779_ALARM_BITS;
3890                 data->BEEP_BITS = NCT6779_BEEP_BITS;
3891
3892                 data->fan_from_reg = fan_from_reg13;
3893                 data->fan_from_reg_min = fan_from_reg13;
3894                 data->target_temp_mask = 0xff;
3895                 data->tolerance_mask = 0x07;
3896                 data->speed_tolerance_limit = 63;
3897
3898                 data->temp_label = nct6779_temp_label;
3899                 data->temp_mask = NCT6779_TEMP_MASK;
3900
3901                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3902                 data->REG_VBAT = NCT6775_REG_VBAT;
3903                 data->REG_DIODE = NCT6775_REG_DIODE;
3904                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3905                 data->REG_VIN = NCT6779_REG_IN;
3906                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3907                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3908                 data->REG_TARGET = NCT6775_REG_TARGET;
3909                 data->REG_FAN = NCT6779_REG_FAN;
3910                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3911                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3912                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3913                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3914                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3915                 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3916                 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3917                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3918                 data->REG_PWM[0] = NCT6775_REG_PWM;
3919                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3920                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3921                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3922                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3923                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3924                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3925                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3926                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3927                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3928                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3929                 data->REG_CRITICAL_TEMP_TOLERANCE
3930                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3931                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3932                 data->CRITICAL_PWM_ENABLE_MASK
3933                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3934                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3935                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3936                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3937                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3938                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3939                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3940                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3941                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3942                 data->REG_ALARM = NCT6779_REG_ALARM;
3943                 data->REG_BEEP = NCT6776_REG_BEEP;
3944
3945                 reg_temp = NCT6779_REG_TEMP;
3946                 reg_temp_mon = NCT6779_REG_TEMP_MON;
3947                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3948                 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3949                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3950                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3951                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3952                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3953                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3954
3955                 break;
3956         case nct6791:
3957         case nct6792:
3958         case nct6793:
3959         case nct6795:
3960                 data->in_num = 15;
3961                 data->pwm_num = 6;
3962                 data->auto_pwm_num = 4;
3963                 data->has_fan_div = false;
3964                 data->temp_fixed_num = 6;
3965                 data->num_temp_alarms = 2;
3966                 data->num_temp_beeps = 2;
3967
3968                 data->ALARM_BITS = NCT6791_ALARM_BITS;
3969                 data->BEEP_BITS = NCT6779_BEEP_BITS;
3970
3971                 data->fan_from_reg = fan_from_reg13;
3972                 data->fan_from_reg_min = fan_from_reg13;
3973                 data->target_temp_mask = 0xff;
3974                 data->tolerance_mask = 0x07;
3975                 data->speed_tolerance_limit = 63;
3976
3977                 switch (data->kind) {
3978                 default:
3979                 case nct6791:
3980                         data->temp_label = nct6779_temp_label;
3981                         data->temp_mask = NCT6791_TEMP_MASK;
3982                         break;
3983                 case nct6792:
3984                         data->temp_label = nct6792_temp_label;
3985                         data->temp_mask = NCT6792_TEMP_MASK;
3986                         break;
3987                 case nct6793:
3988                         data->temp_label = nct6793_temp_label;
3989                         data->temp_mask = NCT6793_TEMP_MASK;
3990                         break;
3991                 case nct6795:
3992                         data->temp_label = nct6795_temp_label;
3993                         data->temp_mask = NCT6795_TEMP_MASK;
3994                         break;
3995                 }
3996
3997                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3998                 data->REG_VBAT = NCT6775_REG_VBAT;
3999                 data->REG_DIODE = NCT6775_REG_DIODE;
4000                 data->DIODE_MASK = NCT6775_DIODE_MASK;
4001                 data->REG_VIN = NCT6779_REG_IN;
4002                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
4003                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
4004                 data->REG_TARGET = NCT6775_REG_TARGET;
4005                 data->REG_FAN = NCT6779_REG_FAN;
4006                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
4007                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
4008                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
4009                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
4010                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
4011                 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
4012                 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
4013                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
4014                 data->REG_PWM[0] = NCT6775_REG_PWM;
4015                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
4016                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
4017                 data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP;
4018                 data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE;
4019                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
4020                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
4021                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
4022                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
4023                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
4024                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
4025                 data->REG_CRITICAL_TEMP_TOLERANCE
4026                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
4027                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
4028                 data->CRITICAL_PWM_ENABLE_MASK
4029                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
4030                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
4031                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
4032                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
4033                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
4034                 data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL;
4035                 data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP;
4036                 data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL;
4037                 data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE;
4038                 data->REG_ALARM = NCT6791_REG_ALARM;
4039                 if (data->kind == nct6791)
4040                         data->REG_BEEP = NCT6776_REG_BEEP;
4041                 else
4042                         data->REG_BEEP = NCT6792_REG_BEEP;
4043
4044                 reg_temp = NCT6779_REG_TEMP;
4045                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
4046                 if (data->kind == nct6791) {
4047                         reg_temp_mon = NCT6779_REG_TEMP_MON;
4048                         num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
4049                 } else {
4050                         reg_temp_mon = NCT6792_REG_TEMP_MON;
4051                         num_reg_temp_mon = ARRAY_SIZE(NCT6792_REG_TEMP_MON);
4052                 }
4053                 reg_temp_over = NCT6779_REG_TEMP_OVER;
4054                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
4055                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
4056                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
4057                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
4058
4059                 break;
4060         default:
4061                 return -ENODEV;
4062         }
4063         data->have_in = BIT(data->in_num) - 1;
4064         data->have_temp = 0;
4065
4066         /*
4067          * On some boards, not all available temperature sources are monitored,
4068          * even though some of the monitoring registers are unused.
4069          * Get list of unused monitoring registers, then detect if any fan
4070          * controls are configured to use unmonitored temperature sources.
4071          * If so, assign the unmonitored temperature sources to available
4072          * monitoring registers.
4073          */
4074         mask = 0;
4075         available = 0;
4076         for (i = 0; i < num_reg_temp; i++) {
4077                 if (reg_temp[i] == 0)
4078                         continue;
4079
4080                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
4081                 if (!src || (mask & BIT(src)))
4082                         available |= BIT(i);
4083
4084                 mask |= BIT(src);
4085         }
4086
4087         /*
4088          * Now find unmonitored temperature registers and enable monitoring
4089          * if additional monitoring registers are available.
4090          */
4091         add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
4092         add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
4093
4094         mask = 0;
4095         s = NUM_TEMP_FIXED;     /* First dynamic temperature attribute */
4096         for (i = 0; i < num_reg_temp; i++) {
4097                 if (reg_temp[i] == 0)
4098                         continue;
4099
4100                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
4101                 if (!src || (mask & BIT(src)))
4102                         continue;
4103
4104                 if (!(data->temp_mask & BIT(src))) {
4105                         dev_info(dev,
4106                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
4107                                  src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
4108                         continue;
4109                 }
4110
4111                 mask |= BIT(src);
4112
4113                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
4114                 if (src <= data->temp_fixed_num) {
4115                         data->have_temp |= BIT(src - 1);
4116                         data->have_temp_fixed |= BIT(src - 1);
4117                         data->reg_temp[0][src - 1] = reg_temp[i];
4118                         data->reg_temp[1][src - 1] = reg_temp_over[i];
4119                         data->reg_temp[2][src - 1] = reg_temp_hyst[i];
4120                         if (reg_temp_crit_h && reg_temp_crit_h[i])
4121                                 data->reg_temp[3][src - 1] = reg_temp_crit_h[i];
4122                         else if (reg_temp_crit[src - 1])
4123                                 data->reg_temp[3][src - 1]
4124                                   = reg_temp_crit[src - 1];
4125                         if (reg_temp_crit_l && reg_temp_crit_l[i])
4126                                 data->reg_temp[4][src - 1] = reg_temp_crit_l[i];
4127                         data->reg_temp_config[src - 1] = reg_temp_config[i];
4128                         data->temp_src[src - 1] = src;
4129                         continue;
4130                 }
4131
4132                 if (s >= NUM_TEMP)
4133                         continue;
4134
4135                 /* Use dynamic index for other sources */
4136                 data->have_temp |= BIT(s);
4137                 data->reg_temp[0][s] = reg_temp[i];
4138                 data->reg_temp[1][s] = reg_temp_over[i];
4139                 data->reg_temp[2][s] = reg_temp_hyst[i];
4140                 data->reg_temp_config[s] = reg_temp_config[i];
4141                 if (reg_temp_crit_h && reg_temp_crit_h[i])
4142                         data->reg_temp[3][s] = reg_temp_crit_h[i];
4143                 else if (reg_temp_crit[src - 1])
4144                         data->reg_temp[3][s] = reg_temp_crit[src - 1];
4145                 if (reg_temp_crit_l && reg_temp_crit_l[i])
4146                         data->reg_temp[4][s] = reg_temp_crit_l[i];
4147
4148                 data->temp_src[s] = src;
4149                 s++;
4150         }
4151
4152         /*
4153          * Repeat with temperatures used for fan control.
4154          * This set of registers does not support limits.
4155          */
4156         for (i = 0; i < num_reg_temp_mon; i++) {
4157                 if (reg_temp_mon[i] == 0)
4158                         continue;
4159
4160                 src = nct6775_read_value(data, data->REG_TEMP_SEL[i]) & 0x1f;
4161                 if (!src)
4162                         continue;
4163
4164                 if (!(data->temp_mask & BIT(src))) {
4165                         dev_info(dev,
4166                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
4167                                  src, i, data->REG_TEMP_SEL[i],
4168                                  reg_temp_mon[i]);
4169                         continue;
4170                 }
4171
4172                 /*
4173                  * For virtual temperature sources, the 'virtual' temperature
4174                  * for each fan reflects a different temperature, and there
4175                  * are no duplicates.
4176                  */
4177                 if (src != TEMP_SOURCE_VIRTUAL) {
4178                         if (mask & BIT(src))
4179                                 continue;
4180                         mask |= BIT(src);
4181                 }
4182
4183                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
4184                 if (src <= data->temp_fixed_num) {
4185                         if (data->have_temp & BIT(src - 1))
4186                                 continue;
4187                         data->have_temp |= BIT(src - 1);
4188                         data->have_temp_fixed |= BIT(src - 1);
4189                         data->reg_temp[0][src - 1] = reg_temp_mon[i];
4190                         data->temp_src[src - 1] = src;
4191                         continue;
4192                 }
4193
4194                 if (s >= NUM_TEMP)
4195                         continue;
4196
4197                 /* Use dynamic index for other sources */
4198                 data->have_temp |= BIT(s);
4199                 data->reg_temp[0][s] = reg_temp_mon[i];
4200                 data->temp_src[s] = src;
4201                 s++;
4202         }
4203
4204 #ifdef USE_ALTERNATE
4205         /*
4206          * Go through the list of alternate temp registers and enable
4207          * if possible.
4208          * The temperature is already monitored if the respective bit in <mask>
4209          * is set.
4210          */
4211         for (i = 0; i < 32; i++) {
4212                 if (!(data->temp_mask & BIT(i + 1)))
4213                         continue;
4214                 if (!reg_temp_alternate[i])
4215                         continue;
4216                 if (mask & BIT(i + 1))
4217                         continue;
4218                 if (i < data->temp_fixed_num) {
4219                         if (data->have_temp & BIT(i))
4220                                 continue;
4221                         data->have_temp |= BIT(i);
4222                         data->have_temp_fixed |= BIT(i);
4223                         data->reg_temp[0][i] = reg_temp_alternate[i];
4224                         if (i < num_reg_temp) {
4225                                 data->reg_temp[1][i] = reg_temp_over[i];
4226                                 data->reg_temp[2][i] = reg_temp_hyst[i];
4227                         }
4228                         data->temp_src[i] = i + 1;
4229                         continue;
4230                 }
4231
4232                 if (s >= NUM_TEMP)      /* Abort if no more space */
4233                         break;
4234
4235                 data->have_temp |= BIT(s);
4236                 data->reg_temp[0][s] = reg_temp_alternate[i];
4237                 data->temp_src[s] = i + 1;
4238                 s++;
4239         }
4240 #endif /* USE_ALTERNATE */
4241
4242         /* Initialize the chip */
4243         nct6775_init_device(data);
4244
4245         err = superio_enter(sio_data->sioreg);
4246         if (err)
4247                 return err;
4248
4249         cr2a = superio_inb(sio_data->sioreg, 0x2a);
4250         switch (data->kind) {
4251         case nct6775:
4252                 data->have_vid = (cr2a & 0x40);
4253                 break;
4254         case nct6776:
4255                 data->have_vid = (cr2a & 0x60) == 0x40;
4256                 break;
4257         case nct6106:
4258         case nct6779:
4259         case nct6791:
4260         case nct6792:
4261         case nct6793:
4262         case nct6795:
4263                 break;
4264         }
4265
4266         /*
4267          * Read VID value
4268          * We can get the VID input values directly at logical device D 0xe3.
4269          */
4270         if (data->have_vid) {
4271                 superio_select(sio_data->sioreg, NCT6775_LD_VID);
4272                 data->vid = superio_inb(sio_data->sioreg, 0xe3);
4273                 data->vrm = vid_which_vrm();
4274         }
4275
4276         if (fan_debounce) {
4277                 u8 tmp;
4278
4279                 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
4280                 tmp = superio_inb(sio_data->sioreg,
4281                                   NCT6775_REG_CR_FAN_DEBOUNCE);
4282                 switch (data->kind) {
4283                 case nct6106:
4284                         tmp |= 0xe0;
4285                         break;
4286                 case nct6775:
4287                         tmp |= 0x1e;
4288                         break;
4289                 case nct6776:
4290                 case nct6779:
4291                         tmp |= 0x3e;
4292                         break;
4293                 case nct6791:
4294                 case nct6792:
4295                 case nct6793:
4296                 case nct6795:
4297                         tmp |= 0x7e;
4298                         break;
4299                 }
4300                 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
4301                              tmp);
4302                 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
4303                          data->name);
4304         }
4305
4306         nct6775_check_fan_inputs(data);
4307
4308         superio_exit(sio_data->sioreg);
4309
4310         /* Read fan clock dividers immediately */
4311         nct6775_init_fan_common(dev, data);
4312
4313         /* Register sysfs hooks */
4314         group = nct6775_create_attr_group(dev, &nct6775_pwm_template_group,
4315                                           data->pwm_num);
4316         if (IS_ERR(group))
4317                 return PTR_ERR(group);
4318
4319         data->groups[num_attr_groups++] = group;
4320
4321         group = nct6775_create_attr_group(dev, &nct6775_in_template_group,
4322                                           fls(data->have_in));
4323         if (IS_ERR(group))
4324                 return PTR_ERR(group);
4325
4326         data->groups[num_attr_groups++] = group;
4327
4328         group = nct6775_create_attr_group(dev, &nct6775_fan_template_group,
4329                                           fls(data->has_fan));
4330         if (IS_ERR(group))
4331                 return PTR_ERR(group);
4332
4333         data->groups[num_attr_groups++] = group;
4334
4335         group = nct6775_create_attr_group(dev, &nct6775_temp_template_group,
4336                                           fls(data->have_temp));
4337         if (IS_ERR(group))
4338                 return PTR_ERR(group);
4339
4340         data->groups[num_attr_groups++] = group;
4341         data->groups[num_attr_groups++] = &nct6775_group_other;
4342
4343 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4344         err = sysfs_create_groups(&dev->kobj, data->groups);
4345         if (err < 0)
4346                 return err;
4347         hwmon_dev = hwmon_device_register(dev);
4348         if (IS_ERR(hwmon_dev)) {
4349                 sysfs_remove_groups(&dev->kobj, data->groups);
4350                 return PTR_ERR(hwmon_dev);
4351         }
4352         data->hwmon_dev = hwmon_dev;
4353 #else
4354         hwmon_dev = devm_hwmon_device_register_with_groups(dev, data->name,
4355                                                            data, data->groups);
4356         if (!IS_ERR(hwmon_dev))
4357                 nct6775_debugfs_init(hwmon_dev);
4358 #endif
4359         return PTR_ERR_OR_ZERO(hwmon_dev);
4360 }
4361
4362 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4363 static int nct6775_remove(struct platform_device *pdev)
4364 {
4365         struct nct6775_data *data = platform_get_drvdata(pdev);
4366
4367         hwmon_device_unregister(data->hwmon_dev);
4368         sysfs_remove_groups(&pdev->dev.kobj, data->groups);
4369         return 0;
4370 }
4371 #endif
4372
4373 static void nct6791_enable_io_mapping(int sioaddr)
4374 {
4375         int val;
4376
4377         val = superio_inb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE);
4378         if (val & 0x10) {
4379                 pr_info("Enabling hardware monitor logical device mappings.\n");
4380                 superio_outb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE,
4381                              val & ~0x10);
4382         }
4383 }
4384
4385 static int __maybe_unused nct6775_suspend(struct device *dev)
4386 {
4387         struct nct6775_data *data = nct6775_update_device(dev);
4388
4389         mutex_lock(&data->update_lock);
4390         data->vbat = nct6775_read_value(data, data->REG_VBAT);
4391         if (data->kind == nct6775) {
4392                 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
4393                 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
4394         }
4395         mutex_unlock(&data->update_lock);
4396
4397         return 0;
4398 }
4399
4400 static int __maybe_unused nct6775_resume(struct device *dev)
4401 {
4402         struct nct6775_data *data = dev_get_drvdata(dev);
4403         int sioreg = data->sioreg;
4404         int i, j, err = 0;
4405         u8 reg;
4406
4407         mutex_lock(&data->update_lock);
4408         data->bank = 0xff;              /* Force initial bank selection */
4409
4410         err = superio_enter(sioreg);
4411         if (err)
4412                 goto abort;
4413
4414         superio_select(sioreg, NCT6775_LD_HWM);
4415         reg = superio_inb(sioreg, SIO_REG_ENABLE);
4416         if (reg != data->sio_reg_enable)
4417                 superio_outb(sioreg, SIO_REG_ENABLE, data->sio_reg_enable);
4418
4419         if (data->kind == nct6791 || data->kind == nct6792 ||
4420             data->kind == nct6793 || data->kind == nct6795)
4421                 nct6791_enable_io_mapping(sioreg);
4422
4423         superio_exit(sioreg);
4424
4425         /* Restore limits */
4426         for (i = 0; i < data->in_num; i++) {
4427                 if (!(data->have_in & BIT(i)))
4428                         continue;
4429
4430                 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
4431                                     data->in[i][1]);
4432                 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
4433                                     data->in[i][2]);
4434         }
4435
4436         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
4437                 if (!(data->has_fan_min & BIT(i)))
4438                         continue;
4439
4440                 nct6775_write_value(data, data->REG_FAN_MIN[i],
4441                                     data->fan_min[i]);
4442         }
4443
4444         for (i = 0; i < NUM_TEMP; i++) {
4445                 if (!(data->have_temp & BIT(i)))
4446                         continue;
4447
4448                 for (j = 1; j < ARRAY_SIZE(data->reg_temp); j++)
4449                         if (data->reg_temp[j][i])
4450                                 nct6775_write_temp(data, data->reg_temp[j][i],
4451                                                    data->temp[j][i]);
4452         }
4453
4454         /* Restore other settings */
4455         nct6775_write_value(data, data->REG_VBAT, data->vbat);
4456         if (data->kind == nct6775) {
4457                 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
4458                 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
4459         }
4460
4461 abort:
4462         /* Force re-reading all values */
4463         data->valid = false;
4464         mutex_unlock(&data->update_lock);
4465
4466         return err;
4467 }
4468
4469 static SIMPLE_DEV_PM_OPS(nct6775_dev_pm_ops, nct6775_suspend, nct6775_resume);
4470
4471 static struct platform_driver nct6775_driver = {
4472         .driver = {
4473                 .owner  = THIS_MODULE,
4474                 .name   = DRVNAME,
4475                 .pm     = &nct6775_dev_pm_ops,
4476         },
4477         .probe          = nct6775_probe,
4478 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4479         .remove         = nct6775_remove,
4480 #endif
4481 };
4482
4483 /* nct6775_find() looks for a '627 in the Super-I/O config space */
4484 static int __init nct6775_find(int sioaddr, struct nct6775_sio_data *sio_data)
4485 {
4486         u16 val;
4487         int err;
4488         int addr;
4489
4490         err = superio_enter(sioaddr);
4491         if (err)
4492                 return err;
4493
4494         val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8) |
4495                 superio_inb(sioaddr, SIO_REG_DEVID + 1);
4496         if (force_id && val != 0xffff)
4497                 val = force_id;
4498
4499         switch (val & SIO_ID_MASK) {
4500         case SIO_NCT6106_ID:
4501                 sio_data->kind = nct6106;
4502                 break;
4503         case SIO_NCT6775_ID:
4504                 sio_data->kind = nct6775;
4505                 break;
4506         case SIO_NCT6776_ID:
4507                 sio_data->kind = nct6776;
4508                 break;
4509         case SIO_NCT6779_ID:
4510                 sio_data->kind = nct6779;
4511                 break;
4512         case SIO_NCT6791_ID:
4513                 sio_data->kind = nct6791;
4514                 break;
4515         case SIO_NCT6792_ID:
4516                 sio_data->kind = nct6792;
4517                 break;
4518         case SIO_NCT6793_ID:
4519                 sio_data->kind = nct6793;
4520                 break;
4521         case SIO_NCT6795_ID:
4522                 sio_data->kind = nct6795;
4523                 break;
4524         default:
4525                 if (val != 0xffff)
4526                         pr_debug("unsupported chip ID: 0x%04x\n", val);
4527                 superio_exit(sioaddr);
4528                 return -ENODEV;
4529         }
4530
4531         /* We have a known chip, find the HWM I/O address */
4532         superio_select(sioaddr, NCT6775_LD_HWM);
4533         val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
4534             | superio_inb(sioaddr, SIO_REG_ADDR + 1);
4535         addr = val & IOREGION_ALIGNMENT;
4536         if (addr == 0) {
4537                 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
4538                 superio_exit(sioaddr);
4539                 return -ENODEV;
4540         }
4541
4542         /* Activate logical device if needed */
4543         val = superio_inb(sioaddr, SIO_REG_ENABLE);
4544         if (!(val & 0x01)) {
4545                 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
4546                 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
4547         }
4548
4549         if (sio_data->kind == nct6791 || sio_data->kind == nct6792 ||
4550             sio_data->kind == nct6793 || sio_data->kind == nct6795)
4551                 nct6791_enable_io_mapping(sioaddr);
4552
4553         superio_exit(sioaddr);
4554         pr_info("Found %s or compatible chip at %#x:%#x\n",
4555                 nct6775_sio_names[sio_data->kind], sioaddr, addr);
4556         sio_data->sioreg = sioaddr;
4557
4558         return addr;
4559 }
4560
4561 /*
4562  * when Super-I/O functions move to a separate file, the Super-I/O
4563  * bus will manage the lifetime of the device and this module will only keep
4564  * track of the nct6775 driver. But since we use platform_device_alloc(), we
4565  * must keep track of the device
4566  */
4567 static struct platform_device *pdev[2];
4568
4569 static int __init sensors_nct6775_init(void)
4570 {
4571         int i, err;
4572         bool found = false;
4573         int address;
4574         struct resource res;
4575         struct nct6775_sio_data sio_data;
4576         int sioaddr[2] = { 0x2e, 0x4e };
4577
4578         err = platform_driver_register(&nct6775_driver);
4579         if (err)
4580                 return err;
4581
4582         /*
4583          * initialize sio_data->kind and sio_data->sioreg.
4584          *
4585          * when Super-I/O functions move to a separate file, the Super-I/O
4586          * driver will probe 0x2e and 0x4e and auto-detect the presence of a
4587          * nct6775 hardware monitor, and call probe()
4588          */
4589         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4590                 address = nct6775_find(sioaddr[i], &sio_data);
4591                 if (address <= 0)
4592                         continue;
4593
4594                 found = true;
4595
4596                 pdev[i] = platform_device_alloc(DRVNAME, address);
4597                 if (!pdev[i]) {
4598                         err = -ENOMEM;
4599                         goto exit_device_unregister;
4600                 }
4601
4602                 err = platform_device_add_data(pdev[i], &sio_data,
4603                                                sizeof(struct nct6775_sio_data));
4604                 if (err)
4605                         goto exit_device_put;
4606
4607                 memset(&res, 0, sizeof(res));
4608                 res.name = DRVNAME;
4609                 res.start = address + IOREGION_OFFSET;
4610                 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
4611                 res.flags = IORESOURCE_IO;
4612
4613                 err = acpi_check_resource_conflict(&res);
4614                 if (err) {
4615                         platform_device_put(pdev[i]);
4616                         pdev[i] = NULL;
4617                         continue;
4618                 }
4619
4620                 err = platform_device_add_resources(pdev[i], &res, 1);
4621                 if (err)
4622                         goto exit_device_put;
4623
4624                 /* platform_device_add calls probe() */
4625                 err = platform_device_add(pdev[i]);
4626                 if (err)
4627                         goto exit_device_put;
4628         }
4629         if (!found) {
4630                 err = -ENODEV;
4631                 goto exit_unregister;
4632         }
4633
4634         return 0;
4635
4636 exit_device_put:
4637         platform_device_put(pdev[i]);
4638 exit_device_unregister:
4639         while (--i >= 0) {
4640                 if (pdev[i])
4641                         platform_device_unregister(pdev[i]);
4642         }
4643 exit_unregister:
4644         platform_driver_unregister(&nct6775_driver);
4645         return err;
4646 }
4647
4648 static void __exit sensors_nct6775_exit(void)
4649 {
4650         int i;
4651
4652         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4653                 if (pdev[i])
4654                         platform_device_unregister(pdev[i]);
4655         }
4656         platform_driver_unregister(&nct6775_driver);
4657 }
4658
4659 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4660 MODULE_DESCRIPTION("Driver for NCT6775F and compatible chips");
4661 MODULE_LICENSE("GPL");
4662
4663 module_init(sensors_nct6775_init);
4664 module_exit(sensors_nct6775_exit);