git.sur5r.net Git - groeck-nct6775/blob - nct6775.c

   1 /*
   2  * nct6775 - Driver for the hardware monitoring functionality of
   3  *             Nuvoton NCT677x Super-I/O chips
   4  *
   5  * Copyright (C) 2012  Guenter Roeck <linux@roeck-us.net>
   6  *
   7  * Derived from w83627ehf driver
   8  * Copyright (C) 2005-2012  Jean Delvare <khali@linux-fr.org>
   9  * Copyright (C) 2006  Yuan Mu (Winbond),
  10  *                     Rudolf Marek <r.marek@assembler.cz>
  11  *                     David Hubbard <david.c.hubbard@gmail.com>
  12  *                     Daniel J Blueman <daniel.blueman@gmail.com>
  13  * Copyright (C) 2010  Sheng-Yuan Huang (Nuvoton) (PS00)
  14  *
  15  * Shamelessly ripped from the w83627hf driver
  16  * Copyright (C) 2003  Mark Studebaker
  17  *
  18  * This program is free software; you can redistribute it and/or modify
  19  * it under the terms of the GNU General Public License as published by
  20  * the Free Software Foundation; either version 2 of the License, or
  21  * (at your option) any later version.
  22  *
  23  * This program is distributed in the hope that it will be useful,
  24  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26  * GNU General Public License for more details.
  27  *
  28  * You should have received a copy of the GNU General Public License
  29  * along with this program; if not, write to the Free Software
  30  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  31  *
  32  *
  33  * Supports the following chips:
  34  *
  35  * Chip        #vin    #fan    #pwm    #temp  chip IDs       man ID
  36  * nct6106d     9      3       3       6+3    0xc450 0xc1    0x5ca3
  37  * nct6775f     9      4       3       6+3    0xb470 0xc1    0x5ca3
  38  * nct6776f     9      5       3       6+3    0xc330 0xc1    0x5ca3
  39  * nct6779d    15      5       5       2+6    0xc560 0xc1    0x5ca3
  40  * nct6791d    15      6       6       2+6    0xc800 0xc1    0x5ca3
  41  *
  42  * #temp lists the number of monitored temperature sources (first value) plus
  43  * the number of directly connectable temperature sensors (second value).
  44  */
  45
  46 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  47
  48 #include <linux/module.h>
  49 #include <linux/init.h>
  50 #include <linux/slab.h>
  51 #include <linux/jiffies.h>
  52 #include <linux/platform_device.h>
  53 #include <linux/hwmon.h>
  54 #include <linux/hwmon-sysfs.h>
  55 #include <linux/hwmon-vid.h>
  56 #include <linux/err.h>
  57 #include <linux/mutex.h>
  58 #include <linux/acpi.h>
  59 #include <linux/io.h>
  60 #include "lm75.h"
  61 #include "compat.h"
  62
  63 #define USE_ALTERNATE
  64
  65 enum kinds { nct6106, nct6775, nct6776, nct6779, nct6791 };
  66
  67 /* used to set data->name = nct6775_device_names[data->sio_kind] */
  68 static const char * const nct6775_device_names[] = {
  69         "nct6106",
  70         "nct6775",
  71         "nct6776",
  72         "nct6779",
  73         "nct6791",
  74 };
  75
  76 static unsigned short force_id;
  77 module_param(force_id, ushort, 0);
  78 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  79
  80 static unsigned short fan_debounce;
  81 module_param(fan_debounce, ushort, 0);
  82 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
  83
  84 #define DRVNAME "nct6775"
  85
  86 /*
  87  * Super-I/O constants and functions
  88  */
  89
  90 #define NCT6775_LD_ACPI         0x0a
  91 #define NCT6775_LD_HWM          0x0b
  92 #define NCT6775_LD_VID          0x0d
  93
  94 #define SIO_REG_LDSEL           0x07    /* Logical device select */
  95 #define SIO_REG_DEVID           0x20    /* Device ID (2 bytes) */
  96 #define SIO_REG_ENABLE          0x30    /* Logical device enable */
  97 #define SIO_REG_ADDR            0x60    /* Logical device address (2 bytes) */
  98
  99 #define SIO_NCT6106_ID          0xc450
 100 #define SIO_NCT6775_ID          0xb470
 101 #define SIO_NCT6776_ID          0xc330
 102 #define SIO_NCT6779_ID          0xc560
 103 #define SIO_NCT6791_ID          0xc800
 104 #define SIO_ID_MASK             0xFFF0
 105
 106 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
 107
 108 static inline void
 109 superio_outb(int ioreg, int reg, int val)
 110 {
 111         outb(reg, ioreg);
 112         outb(val, ioreg + 1);
 113 }
 114
 115 static inline int
 116 superio_inb(int ioreg, int reg)
 117 {
 118         outb(reg, ioreg);
 119         return inb(ioreg + 1);
 120 }
 121
 122 static inline void
 123 superio_select(int ioreg, int ld)
 124 {
 125         outb(SIO_REG_LDSEL, ioreg);
 126         outb(ld, ioreg + 1);
 127 }
 128
 129 static inline int
 130 superio_enter(int ioreg)
 131 {
 132         /*
 133          * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
 134          */
 135         if (!request_muxed_region(ioreg, 2, DRVNAME))
 136                 return -EBUSY;
 137
 138         outb(0x87, ioreg);
 139         outb(0x87, ioreg);
 140
 141         return 0;
 142 }
 143
 144 static inline void
 145 superio_exit(int ioreg)
 146 {
 147         outb(0xaa, ioreg);
 148         outb(0x02, ioreg);
 149         outb(0x02, ioreg + 1);
 150         release_region(ioreg, 2);
 151 }
 152
 153 /*
 154  * ISA constants
 155  */
 156
 157 #define IOREGION_ALIGNMENT      (~7)
 158 #define IOREGION_OFFSET         5
 159 #define IOREGION_LENGTH         2
 160 #define ADDR_REG_OFFSET         0
 161 #define DATA_REG_OFFSET         1
 162
 163 #define NCT6775_REG_BANK        0x4E
 164 #define NCT6775_REG_CONFIG      0x40
 165
 166 /*
 167  * Not currently used:
 168  * REG_MAN_ID has the value 0x5ca3 for all supported chips.
 169  * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
 170  * REG_MAN_ID is at port 0x4f
 171  * REG_CHIP_ID is at port 0x58
 172  */
 173
 174 #define NUM_TEMP        10      /* Max number of temp attribute sets w/ limits*/
 175 #define NUM_TEMP_FIXED  6       /* Max number of fixed temp attribute sets */
 176
 177 #define NUM_REG_ALARM   7       /* Max number of alarm registers */
 178 #define NUM_REG_BEEP    5       /* Max number of beep registers */
 179
 180 #define NUM_FAN         6
 181
 182 /* Common and NCT6775 specific data */
 183
 184 /* Voltage min/max registers for nr=7..14 are in bank 5 */
 185
 186 static const u16 NCT6775_REG_IN_MAX[] = {
 187         0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
 188         0x55c, 0x55e, 0x560, 0x562 };
 189 static const u16 NCT6775_REG_IN_MIN[] = {
 190         0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
 191         0x55d, 0x55f, 0x561, 0x563 };
 192 static const u16 NCT6775_REG_IN[] = {
 193         0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
 194 };
 195
 196 #define NCT6775_REG_VBAT                0x5D
 197 #define NCT6775_REG_DIODE               0x5E
 198 #define NCT6775_DIODE_MASK              0x02
 199
 200 #define NCT6775_REG_FANDIV1             0x506
 201 #define NCT6775_REG_FANDIV2             0x507
 202
 203 #define NCT6775_REG_CR_FAN_DEBOUNCE     0xf0
 204
 205 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
 206
 207 /* 0..15 voltages, 16..23 fans, 24..29 temperatures, 30..31 intrusion */
 208
 209 static const s8 NCT6775_ALARM_BITS[] = {
 210         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 211         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 212         -1,                             /* unused */
 213         6, 7, 11, -1, -1,               /* fan1..fan5 */
 214         -1, -1, -1,                     /* unused */
 215         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 216         12, -1 };                       /* intrusion0, intrusion1 */
 217
 218 #define FAN_ALARM_BASE          16
 219 #define TEMP_ALARM_BASE         24
 220 #define INTRUSION_ALARM_BASE    30
 221
 222 static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e };
 223
 224 /*
 225  * 0..14 voltages, 15 global beep enable, 16..23 fans, 24..29 temperatures,
 226  * 30..31 intrusion
 227  */
 228 static const s8 NCT6775_BEEP_BITS[] = {
 229         0, 1, 2, 3, 8, 9, 10, 16,       /* in0.. in7 */
 230         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 231         21,                             /* global beep enable */
 232         6, 7, 11, 28, -1,               /* fan1..fan5 */
 233         -1, -1, -1,                     /* unused */
 234         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 235         12, -1 };                       /* intrusion0, intrusion1 */
 236
 237 #define BEEP_ENABLE_BASE                15
 238
 239 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
 240 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
 241
 242 /* DC or PWM output fan configuration */
 243 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
 244 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
 245
 246 /* Advanced Fan control, some values are common for all fans */
 247
 248 static const u16 NCT6775_REG_TARGET[] = {
 249         0x101, 0x201, 0x301, 0x801, 0x901, 0xa01 };
 250 static const u16 NCT6775_REG_FAN_MODE[] = {
 251         0x102, 0x202, 0x302, 0x802, 0x902, 0xa02 };
 252 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
 253         0x103, 0x203, 0x303, 0x803, 0x903, 0xa03 };
 254 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
 255         0x104, 0x204, 0x304, 0x804, 0x904, 0xa04 };
 256 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
 257         0x105, 0x205, 0x305, 0x805, 0x905, 0xa05 };
 258 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = {
 259         0x106, 0x206, 0x306, 0x806, 0x906, 0xa06 };
 260 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
 261 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
 262
 263 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
 264         0x107, 0x207, 0x307, 0x807, 0x907, 0xa07 };
 265 static const u16 NCT6775_REG_PWM[] = {
 266         0x109, 0x209, 0x309, 0x809, 0x909, 0xa09 };
 267 static const u16 NCT6775_REG_PWM_READ[] = {
 268         0x01, 0x03, 0x11, 0x13, 0x15, 0xa09 };
 269
 270 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
 271 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
 272 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
 273 static const u16 NCT6775_FAN_PULSE_SHIFT[] = { 0, 0, 0, 0, 0, 0 };
 274
 275 static const u16 NCT6775_REG_TEMP[] = {
 276         0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
 277
 278 static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77 };
 279
 280 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 281         0, 0x152, 0x252, 0x628, 0x629, 0x62A };
 282 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 283         0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
 284 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 285         0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
 286
 287 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 288         0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
 289
 290 static const u16 NCT6775_REG_TEMP_SEL[] = {
 291         0x100, 0x200, 0x300, 0x800, 0x900, 0xa00 };
 292
 293 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
 294         0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 };
 295 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
 296         0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a };
 297 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
 298         0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b };
 299 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
 300         0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c };
 301 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
 302         0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d };
 303
 304 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
 305
 306 static const u16 NCT6775_REG_AUTO_TEMP[] = {
 307         0x121, 0x221, 0x321, 0x821, 0x921, 0xa21 };
 308 static const u16 NCT6775_REG_AUTO_PWM[] = {
 309         0x127, 0x227, 0x327, 0x827, 0x927, 0xa27 };
 310
 311 #define NCT6775_AUTO_TEMP(data, nr, p)  ((data)->REG_AUTO_TEMP[nr] + (p))
 312 #define NCT6775_AUTO_PWM(data, nr, p)   ((data)->REG_AUTO_PWM[nr] + (p))
 313
 314 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
 315
 316 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
 317         0x135, 0x235, 0x335, 0x835, 0x935, 0xa35 };
 318 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
 319         0x138, 0x238, 0x338, 0x838, 0x938, 0xa38 };
 320
 321 static const char *const nct6775_temp_label[] = {
 322         "",
 323         "SYSTIN",
 324         "CPUTIN",
 325         "AUXTIN",
 326         "AMD SB-TSI",
 327         "PECI Agent 0",
 328         "PECI Agent 1",
 329         "PECI Agent 2",
 330         "PECI Agent 3",
 331         "PECI Agent 4",
 332         "PECI Agent 5",
 333         "PECI Agent 6",
 334         "PECI Agent 7",
 335         "PCH_CHIP_CPU_MAX_TEMP",
 336         "PCH_CHIP_TEMP",
 337         "PCH_CPU_TEMP",
 338         "PCH_MCH_TEMP",
 339         "PCH_DIM0_TEMP",
 340         "PCH_DIM1_TEMP",
 341         "PCH_DIM2_TEMP",
 342         "PCH_DIM3_TEMP"
 343 };
 344
 345 static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
 346         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
 347
 348 static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
 349         = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
 350             0xa07 };
 351
 352 /* NCT6776 specific data */
 353
 354 static const s8 NCT6776_ALARM_BITS[] = {
 355         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 356         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 357         -1,                             /* unused */
 358         6, 7, 11, 10, 23,               /* fan1..fan5 */
 359         -1, -1, -1,                     /* unused */
 360         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 361         12, 9 };                        /* intrusion0, intrusion1 */
 362
 363 static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5 };
 364
 365 static const s8 NCT6776_BEEP_BITS[] = {
 366         0, 1, 2, 3, 4, 5, 6, 7,         /* in0.. in7 */
 367         8, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 368         24,                             /* global beep enable */
 369         25, 26, 27, 28, 29,             /* fan1..fan5 */
 370         -1, -1, -1,                     /* unused */
 371         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 372         30, 31 };                       /* intrusion0, intrusion1 */
 373
 374 static const u16 NCT6776_REG_TOLERANCE_H[] = {
 375         0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c };
 376
 377 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0 };
 378 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0 };
 379
 380 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
 381 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
 382
 383 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
 384         0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e };
 385
 386 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 387         0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
 388
 389 static const char *const nct6776_temp_label[] = {
 390         "",
 391         "SYSTIN",
 392         "CPUTIN",
 393         "AUXTIN",
 394         "SMBUSMASTER 0",
 395         "SMBUSMASTER 1",
 396         "SMBUSMASTER 2",
 397         "SMBUSMASTER 3",
 398         "SMBUSMASTER 4",
 399         "SMBUSMASTER 5",
 400         "SMBUSMASTER 6",
 401         "SMBUSMASTER 7",
 402         "PECI Agent 0",
 403         "PECI Agent 1",
 404         "PCH_CHIP_CPU_MAX_TEMP",
 405         "PCH_CHIP_TEMP",
 406         "PCH_CPU_TEMP",
 407         "PCH_MCH_TEMP",
 408         "PCH_DIM0_TEMP",
 409         "PCH_DIM1_TEMP",
 410         "PCH_DIM2_TEMP",
 411         "PCH_DIM3_TEMP",
 412         "BYTE_TEMP"
 413 };
 414
 415 static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
 416         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
 417
 418 static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
 419         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
 420
 421 /* NCT6779 specific data */
 422
 423 static const u16 NCT6779_REG_IN[] = {
 424         0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
 425         0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
 426
 427 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
 428         0x459, 0x45A, 0x45B, 0x568 };
 429
 430 static const s8 NCT6779_ALARM_BITS[] = {
 431         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 432         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 433         -1,                             /* unused */
 434         6, 7, 11, 10, 23,               /* fan1..fan5 */
 435         -1, -1, -1,                     /* unused */
 436         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 437         12, 9 };                        /* intrusion0, intrusion1 */
 438
 439 static const s8 NCT6779_BEEP_BITS[] = {
 440         0, 1, 2, 3, 4, 5, 6, 7,         /* in0.. in7 */
 441         8, 9, 10, 11, 12, 13, 14,       /* in8..in14 */
 442         24,                             /* global beep enable */
 443         25, 26, 27, 28, 29,             /* fan1..fan5 */
 444         -1, -1, -1,                     /* unused */
 445         16, 17, -1, -1, -1, -1,         /* temp1..temp6 */
 446         30, 31 };                       /* intrusion0, intrusion1 */
 447
 448 static const u16 NCT6779_REG_FAN[] = {
 449         0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8, 0x4ba };
 450 static const u16 NCT6779_REG_FAN_PULSES[] = {
 451         0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
 452
 453 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
 454         0x136, 0x236, 0x336, 0x836, 0x936, 0xa36 };
 455 #define NCT6779_CRITICAL_PWM_ENABLE_MASK        0x01
 456 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
 457         0x137, 0x237, 0x337, 0x837, 0x937, 0xa37 };
 458
 459 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
 460 static const u16 NCT6779_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b };
 461 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 462         0x18, 0x152 };
 463 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 464         0x3a, 0x153 };
 465 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 466         0x39, 0x155 };
 467
 468 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
 469         0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
 470
 471 static const char *const nct6779_temp_label[] = {
 472         "",
 473         "SYSTIN",
 474         "CPUTIN",
 475         "AUXTIN0",
 476         "AUXTIN1",
 477         "AUXTIN2",
 478         "AUXTIN3",
 479         "",
 480         "SMBUSMASTER 0",
 481         "SMBUSMASTER 1",
 482         "SMBUSMASTER 2",
 483         "SMBUSMASTER 3",
 484         "SMBUSMASTER 4",
 485         "SMBUSMASTER 5",
 486         "SMBUSMASTER 6",
 487         "SMBUSMASTER 7",
 488         "PECI Agent 0",
 489         "PECI Agent 1",
 490         "PCH_CHIP_CPU_MAX_TEMP",
 491         "PCH_CHIP_TEMP",
 492         "PCH_CPU_TEMP",
 493         "PCH_MCH_TEMP",
 494         "PCH_DIM0_TEMP",
 495         "PCH_DIM1_TEMP",
 496         "PCH_DIM2_TEMP",
 497         "PCH_DIM3_TEMP",
 498         "BYTE_TEMP"
 499 };
 500
 501 static const u16 NCT6779_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6779_temp_label) - 1]
 502         = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
 503             0, 0, 0, 0, 0, 0, 0, 0,
 504             0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
 505             0x408, 0 };
 506
 507 static const u16 NCT6779_REG_TEMP_CRIT[ARRAY_SIZE(nct6779_temp_label) - 1]
 508         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
 509
 510 /* NCT6791 specific data */
 511
 512 #define NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE     0x28
 513
 514 static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = {
 515         0x459, 0x45A, 0x45B, 0x568, 0x45D };
 516
 517 static const s8 NCT6791_ALARM_BITS[] = {
 518         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 519         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 520         -1,                             /* unused */
 521         6, 7, 11, 10, 23, 33,           /* fan1..fan6 */
 522         -1, -1,                         /* unused */
 523         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 524         12, 9 };                        /* intrusion0, intrusion1 */
 525
 526
 527 /* NCT6102D/NCT6106D specific data */
 528
 529 #define NCT6106_REG_VBAT        0x318
 530 #define NCT6106_REG_DIODE       0x319
 531 #define NCT6106_DIODE_MASK      0x01
 532
 533 static const u16 NCT6106_REG_IN_MAX[] = {
 534         0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
 535 static const u16 NCT6106_REG_IN_MIN[] = {
 536         0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
 537 static const u16 NCT6106_REG_IN[] = {
 538         0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
 539
 540 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
 541 static const u16 NCT6106_REG_TEMP_MON[] = { 0x18, 0x19, 0x1a };
 542 static const u16 NCT6106_REG_TEMP_HYST[] = {
 543         0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
 544 static const u16 NCT6106_REG_TEMP_OVER[] = {
 545         0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
 546 static const u16 NCT6106_REG_TEMP_CRIT_L[] = {
 547         0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
 548 static const u16 NCT6106_REG_TEMP_CRIT_H[] = {
 549         0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
 550 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
 551 static const u16 NCT6106_REG_TEMP_CONFIG[] = {
 552         0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
 553
 554 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
 555 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
 556 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0, 0 };
 557 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4, 0, 0 };
 558
 559 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
 560 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
 561 static const u16 NCT6106_REG_PWM[] = { 0x119, 0x129, 0x139 };
 562 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c };
 563 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
 564 static const u16 NCT6106_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130 };
 565 static const u16 NCT6106_REG_TEMP_SOURCE[] = {
 566         0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
 567
 568 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
 569 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = {
 570         0x11b, 0x12b, 0x13b };
 571
 572 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
 573 #define NCT6106_CRITICAL_PWM_ENABLE_MASK        0x10
 574 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
 575
 576 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
 577 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
 578 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
 579 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
 580 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
 581 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
 582
 583 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
 584
 585 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
 586 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
 587 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
 588 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x17c };
 589 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
 590 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
 591
 592 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
 593 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
 594
 595 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = {
 596         0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
 597
 598 static const s8 NCT6106_ALARM_BITS[] = {
 599         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 600         9, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 601         -1,                             /* unused */
 602         32, 33, 34, -1, -1,             /* fan1..fan5 */
 603         -1, -1, -1,                     /* unused */
 604         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 605         48, -1                          /* intrusion0, intrusion1 */
 606 };
 607
 608 static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = {
 609         0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 };
 610
 611 static const s8 NCT6106_BEEP_BITS[] = {
 612         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 613         9, 10, 11, 12, -1, -1, -1,      /* in8..in14 */
 614         32,                             /* global beep enable */
 615         24, 25, 26, 27, 28,             /* fan1..fan5 */
 616         -1, -1, -1,                     /* unused */
 617         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 618         34, -1                          /* intrusion0, intrusion1 */
 619 };
 620
 621 static const u16 NCT6106_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
 622         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x51, 0x52, 0x54 };
 623
 624 static const u16 NCT6106_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
 625         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x204, 0x205 };
 626
 627 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
 628 {
 629         if (mode == 0 && pwm == 255)
 630                 return off;
 631         return mode + 1;
 632 }
 633
 634 static int pwm_enable_to_reg(enum pwm_enable mode)
 635 {
 636         if (mode == off)
 637                 return 0;
 638         return mode - 1;
 639 }
 640
 641 /*
 642  * Conversions
 643  */
 644
 645 /* 1 is DC mode, output in ms */
 646 static unsigned int step_time_from_reg(u8 reg, u8 mode)
 647 {
 648         return mode ? 400 * reg : 100 * reg;
 649 }
 650
 651 static u8 step_time_to_reg(unsigned int msec, u8 mode)
 652 {
 653         return clamp_val((mode ? (msec + 200) / 400 :
 654                                         (msec + 50) / 100), 1, 255);
 655 }
 656
 657 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
 658 {
 659         if (reg == 0 || reg == 255)
 660                 return 0;
 661         return 1350000U / (reg << divreg);
 662 }
 663
 664 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
 665 {
 666         if ((reg & 0xff1f) == 0xff1f)
 667                 return 0;
 668
 669         reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
 670
 671         if (reg == 0)
 672                 return 0;
 673
 674         return 1350000U / reg;
 675 }
 676
 677 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
 678 {
 679         if (reg == 0 || reg == 0xffff)
 680                 return 0;
 681
 682         /*
 683          * Even though the registers are 16 bit wide, the fan divisor
 684          * still applies.
 685          */
 686         return 1350000U / (reg << divreg);
 687 }
 688
 689 static u16 fan_to_reg(u32 fan, unsigned int divreg)
 690 {
 691         if (!fan)
 692                 return 0;
 693
 694         return (1350000U / fan) >> divreg;
 695 }
 696
 697 static inline unsigned int
 698 div_from_reg(u8 reg)
 699 {
 700         return 1 << reg;
 701 }
 702
 703 /*
 704  * Some of the voltage inputs have internal scaling, the tables below
 705  * contain 8 (the ADC LSB in mV) * scaling factor * 100
 706  */
 707 static const u16 scale_in[15] = {
 708         800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
 709         800, 800
 710 };
 711
 712 static inline long in_from_reg(u8 reg, u8 nr)
 713 {
 714         return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
 715 }
 716
 717 static inline u8 in_to_reg(u32 val, u8 nr)
 718 {
 719         return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
 720 }
 721
 722 /*
 723  * Data structures and manipulation thereof
 724  */
 725
 726 struct nct6775_data {
 727         int addr;       /* IO base of hw monitor block */
 728         int sioreg;     /* SIO register address */
 729         enum kinds kind;
 730         const char *name;
 731
 732         struct device *hwmon_dev;
 733         struct attribute_group *group_in;
 734         struct attribute_group *group_fan;
 735         struct attribute_group *group_temp;
 736         struct attribute_group *group_pwm;
 737
 738         u16 reg_temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 739                                     * 3=temp_crit, 4=temp_lcrit
 740                                     */
 741         u8 temp_src[NUM_TEMP];
 742         u16 reg_temp_config[NUM_TEMP];
 743         const char * const *temp_label;
 744         int temp_label_num;
 745
 746         u16 REG_CONFIG;
 747         u16 REG_VBAT;
 748         u16 REG_DIODE;
 749         u8 DIODE_MASK;
 750
 751         const s8 *ALARM_BITS;
 752         const s8 *BEEP_BITS;
 753
 754         const u16 *REG_VIN;
 755         const u16 *REG_IN_MINMAX[2];
 756
 757         const u16 *REG_TARGET;
 758         const u16 *REG_FAN;
 759         const u16 *REG_FAN_MODE;
 760         const u16 *REG_FAN_MIN;
 761         const u16 *REG_FAN_PULSES;
 762         const u16 *FAN_PULSE_SHIFT;
 763         const u16 *REG_FAN_TIME[3];
 764
 765         const u16 *REG_TOLERANCE_H;
 766
 767         const u8 *REG_PWM_MODE;
 768         const u8 *PWM_MODE_MASK;
 769
 770         const u16 *REG_PWM[7];  /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 771                                  * [3]=pwm_max, [4]=pwm_step,
 772                                  * [5]=weight_duty_step, [6]=weight_duty_base
 773                                  */
 774         const u16 *REG_PWM_READ;
 775
 776         const u16 *REG_CRITICAL_PWM_ENABLE;
 777         u8 CRITICAL_PWM_ENABLE_MASK;
 778         const u16 *REG_CRITICAL_PWM;
 779
 780         const u16 *REG_AUTO_TEMP;
 781         const u16 *REG_AUTO_PWM;
 782
 783         const u16 *REG_CRITICAL_TEMP;
 784         const u16 *REG_CRITICAL_TEMP_TOLERANCE;
 785
 786         const u16 *REG_TEMP_SOURCE;     /* temp register sources */
 787         const u16 *REG_TEMP_SEL;
 788         const u16 *REG_WEIGHT_TEMP_SEL;
 789         const u16 *REG_WEIGHT_TEMP[3];  /* 0=base, 1=tolerance, 2=step */
 790
 791         const u16 *REG_TEMP_OFFSET;
 792
 793         const u16 *REG_ALARM;
 794         const u16 *REG_BEEP;
 795
 796         unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
 797         unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
 798
 799         struct mutex update_lock;
 800         bool valid;             /* true if following fields are valid */
 801         unsigned long last_updated;     /* In jiffies */
 802
 803         /* Register values */
 804         u8 bank;                /* current register bank */
 805         u8 in_num;              /* number of in inputs we have */
 806         u8 in[15][3];           /* [0]=in, [1]=in_max, [2]=in_min */
 807         unsigned int rpm[NUM_FAN];
 808         u16 fan_min[NUM_FAN];
 809         u8 fan_pulses[NUM_FAN];
 810         u8 fan_div[NUM_FAN];
 811         u8 has_pwm;
 812         u8 has_fan;             /* some fan inputs can be disabled */
 813         u8 has_fan_min;         /* some fans don't have min register */
 814         bool has_fan_div;
 815
 816         u8 num_temp_alarms;     /* 2, 3, or 6 */
 817         u8 num_temp_beeps;      /* 2, 3, or 6 */
 818         u8 temp_fixed_num;      /* 3 or 6 */
 819         u8 temp_type[NUM_TEMP_FIXED];
 820         s8 temp_offset[NUM_TEMP_FIXED];
 821         s16 temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 822                                 * 3=temp_crit, 4=temp_lcrit */
 823         u64 alarms;
 824         u64 beeps;
 825
 826         u8 pwm_num;     /* number of pwm */
 827         u8 pwm_mode[NUM_FAN];   /* 1->DC variable voltage,
 828                                  * 0->PWM variable duty cycle
 829                                  */
 830         enum pwm_enable pwm_enable[NUM_FAN];
 831                         /* 0->off
 832                          * 1->manual
 833                          * 2->thermal cruise mode (also called SmartFan I)
 834                          * 3->fan speed cruise mode
 835                          * 4->SmartFan III
 836                          * 5->enhanced variable thermal cruise (SmartFan IV)
 837                          */
 838         u8 pwm[7][NUM_FAN];     /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 839                                  * [3]=pwm_max, [4]=pwm_step,
 840                                  * [5]=weight_duty_step, [6]=weight_duty_base
 841                                  */
 842
 843         u8 target_temp[NUM_FAN];
 844         u8 target_temp_mask;
 845         u32 target_speed[NUM_FAN];
 846         u32 target_speed_tolerance[NUM_FAN];
 847         u8 speed_tolerance_limit;
 848
 849         u8 temp_tolerance[2][NUM_FAN];
 850         u8 tolerance_mask;
 851
 852         u8 fan_time[3][NUM_FAN]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
 853
 854         /* Automatic fan speed control registers */
 855         int auto_pwm_num;
 856         u8 auto_pwm[NUM_FAN][7];
 857         u8 auto_temp[NUM_FAN][7];
 858         u8 pwm_temp_sel[NUM_FAN];
 859         u8 pwm_weight_temp_sel[NUM_FAN];
 860         u8 weight_temp[3][NUM_FAN];     /* 0->temp_step, 1->temp_step_tol,
 861                                          * 2->temp_base
 862                                          */
 863
 864         u8 vid;
 865         u8 vrm;
 866
 867         bool have_vid;
 868
 869         u16 have_temp;
 870         u16 have_temp_fixed;
 871         u16 have_in;
 872 #ifdef CONFIG_PM
 873         /* Remember extra register values over suspend/resume */
 874         u8 vbat;
 875         u8 fandiv1;
 876         u8 fandiv2;
 877 #endif
 878 };
 879
 880 struct nct6775_sio_data {
 881         int sioreg;
 882         enum kinds kind;
 883 };
 884
 885 struct sensor_device_template {
 886         struct device_attribute dev_attr;
 887         union {
 888                 struct {
 889                         u8 nr;
 890                         u8 index;
 891                 } s;
 892                 int index;
 893         } u;
 894         bool s2;        /* true if both index and nr are used */
 895 };
 896
 897 struct sensor_device_attr_u {
 898         union {
 899                 struct sensor_device_attribute a1;
 900                 struct sensor_device_attribute_2 a2;
 901         } u;
 902         char name[32];
 903 };
 904
 905 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) {      \
 906         .attr = {.name = _template, .mode = _mode },            \
 907         .show   = _show,                                        \
 908         .store  = _store,                                       \
 909 }
 910
 911 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \
 912         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
 913           .u.index = _index,                                            \
 914           .s2 = false }
 915
 916 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,       \
 917                                  _nr, _index)                           \
 918         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
 919           .u.s.index = _index,                                          \
 920           .u.s.nr = _nr,                                                \
 921           .s2 = true }
 922
 923 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
 924 static struct sensor_device_template sensor_dev_template_##_name        \
 925         = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store,       \
 926                                  _index)
 927
 928 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store,       \
 929                           _nr, _index)                                  \
 930 static struct sensor_device_template sensor_dev_template_##_name        \
 931         = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,     \
 932                                  _nr, _index)
 933
 934 struct sensor_template_group {
 935         struct sensor_device_template **templates;
 936         umode_t (*is_visible)(struct kobject *, struct attribute *, int);
 937         int base;
 938 };
 939
 940 static struct attribute_group *
 941 nct6775_create_attr_group(struct device *dev, struct sensor_template_group *tg,
 942                           int repeat)
 943 {
 944         struct attribute_group *group;
 945         struct sensor_device_attr_u *su;
 946         struct sensor_device_attribute *a;
 947         struct sensor_device_attribute_2 *a2;
 948         struct attribute **attrs;
 949         struct sensor_device_template **t;
 950         int err, i, j, count;
 951
 952         if (repeat <= 0)
 953                 return ERR_PTR(-EINVAL);
 954
 955         t = tg->templates;
 956         for (count = 0; *t; t++, count++)
 957                 ;
 958
 959         if (count == 0)
 960                 return ERR_PTR(-EINVAL);
 961
 962         group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
 963         if (group == NULL)
 964                 return ERR_PTR(-ENOMEM);
 965
 966         attrs = devm_kzalloc(dev, sizeof(*attrs) * (repeat * count + 1),
 967                              GFP_KERNEL);
 968         if (attrs == NULL)
 969                 return ERR_PTR(-ENOMEM);
 970
 971         su = devm_kzalloc(dev, sizeof(*su) * repeat * count,
 972                                GFP_KERNEL);
 973         if (su == NULL)
 974                 return ERR_PTR(-ENOMEM);
 975
 976         group->attrs = attrs;
 977         group->is_visible = tg->is_visible;
 978
 979         for (i = 0; i < repeat; i++) {
 980                 t = tg->templates;
 981                 for (j = 0; *t != NULL; j++) {
 982                         snprintf(su->name, sizeof(su->name),
 983                                  (*t)->dev_attr.attr.name, tg->base + i);
 984                         if ((*t)->s2) {
 985                                 a2 = &su->u.a2;
 986                                 a2->dev_attr.attr.name = su->name;
 987                                 a2->nr = (*t)->u.s.nr + i;
 988                                 a2->index = (*t)->u.s.index;
 989                                 a2->dev_attr.attr.mode =
 990                                   (*t)->dev_attr.attr.mode;
 991                                 a2->dev_attr.show = (*t)->dev_attr.show;
 992                                 a2->dev_attr.store = (*t)->dev_attr.store;
 993                                 *attrs = &a2->dev_attr.attr;
 994                         } else {
 995                                 a = &su->u.a1;
 996                                 a->dev_attr.attr.name = su->name;
 997                                 a->index = (*t)->u.index + i;
 998                                 a->dev_attr.attr.mode =
 999                                   (*t)->dev_attr.attr.mode;
1000                                 a->dev_attr.show = (*t)->dev_attr.show;
1001                                 a->dev_attr.store = (*t)->dev_attr.store;
1002                                 *attrs = &a->dev_attr.attr;
1003                         }
1004                         attrs++;
1005                         su++;
1006                         t++;
1007                 }
1008         }
1009
1010         err = sysfs_create_group(&dev->kobj, group);
1011         if (err)
1012                 return ERR_PTR(-ENOMEM);
1013
1014         return group;
1015 }
1016
1017 static bool is_word_sized(struct nct6775_data *data, u16 reg)
1018 {
1019         switch (data->kind) {
1020         case nct6106:
1021                 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1022                   reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
1023                   reg == 0x111 || reg == 0x121 || reg == 0x131;
1024         case nct6775:
1025                 return (((reg & 0xff00) == 0x100 ||
1026                     (reg & 0xff00) == 0x200) &&
1027                    ((reg & 0x00ff) == 0x50 ||
1028                     (reg & 0x00ff) == 0x53 ||
1029                     (reg & 0x00ff) == 0x55)) ||
1030                   (reg & 0xfff0) == 0x630 ||
1031                   reg == 0x640 || reg == 0x642 ||
1032                   reg == 0x662 ||
1033                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1034                   reg == 0x73 || reg == 0x75 || reg == 0x77;
1035         case nct6776:
1036                 return (((reg & 0xff00) == 0x100 ||
1037                     (reg & 0xff00) == 0x200) &&
1038                    ((reg & 0x00ff) == 0x50 ||
1039                     (reg & 0x00ff) == 0x53 ||
1040                     (reg & 0x00ff) == 0x55)) ||
1041                   (reg & 0xfff0) == 0x630 ||
1042                   reg == 0x402 ||
1043                   reg == 0x640 || reg == 0x642 ||
1044                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1045                   reg == 0x73 || reg == 0x75 || reg == 0x77;
1046         case nct6779:
1047         case nct6791:
1048                 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
1049                   ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x0b) ||
1050                   reg == 0x402 ||
1051                   reg == 0x63a || reg == 0x63c || reg == 0x63e ||
1052                   reg == 0x640 || reg == 0x642 ||
1053                   reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
1054                   reg == 0x7b;
1055         }
1056         return false;
1057 }
1058
1059 /*
1060  * On older chips, only registers 0x50-0x5f are banked.
1061  * On more recent chips, all registers are banked.
1062  * Assume that is the case and set the bank number for each access.
1063  * Cache the bank number so it only needs to be set if it changes.
1064  */
1065 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
1066 {
1067         u8 bank = reg >> 8;
1068         if (data->bank != bank) {
1069                 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
1070                 outb_p(bank, data->addr + DATA_REG_OFFSET);
1071                 data->bank = bank;
1072         }
1073 }
1074
1075 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
1076 {
1077         int res, word_sized = is_word_sized(data, reg);
1078
1079         nct6775_set_bank(data, reg);
1080         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1081         res = inb_p(data->addr + DATA_REG_OFFSET);
1082         if (word_sized) {
1083                 outb_p((reg & 0xff) + 1,
1084                        data->addr + ADDR_REG_OFFSET);
1085                 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
1086         }
1087         return res;
1088 }
1089
1090 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
1091 {
1092         int word_sized = is_word_sized(data, reg);
1093
1094         nct6775_set_bank(data, reg);
1095         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1096         if (word_sized) {
1097                 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
1098                 outb_p((reg & 0xff) + 1,
1099                        data->addr + ADDR_REG_OFFSET);
1100         }
1101         outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
1102         return 0;
1103 }
1104
1105 /* We left-align 8-bit temperature values to make the code simpler */
1106 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
1107 {
1108         u16 res;
1109
1110         res = nct6775_read_value(data, reg);
1111         if (!is_word_sized(data, reg))
1112                 res <<= 8;
1113
1114         return res;
1115 }
1116
1117 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
1118 {
1119         if (!is_word_sized(data, reg))
1120                 value >>= 8;
1121         return nct6775_write_value(data, reg, value);
1122 }
1123
1124 /* This function assumes that the caller holds data->update_lock */
1125 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
1126 {
1127         u8 reg;
1128
1129         switch (nr) {
1130         case 0:
1131                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
1132                     | (data->fan_div[0] & 0x7);
1133                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1134                 break;
1135         case 1:
1136                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
1137                     | ((data->fan_div[1] << 4) & 0x70);
1138                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1139                 break;
1140         case 2:
1141                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
1142                     | (data->fan_div[2] & 0x7);
1143                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1144                 break;
1145         case 3:
1146                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
1147                     | ((data->fan_div[3] << 4) & 0x70);
1148                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1149                 break;
1150         }
1151 }
1152
1153 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
1154 {
1155         if (data->kind == nct6775)
1156                 nct6775_write_fan_div(data, nr);
1157 }
1158
1159 static void nct6775_update_fan_div(struct nct6775_data *data)
1160 {
1161         u8 i;
1162
1163         i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
1164         data->fan_div[0] = i & 0x7;
1165         data->fan_div[1] = (i & 0x70) >> 4;
1166         i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
1167         data->fan_div[2] = i & 0x7;
1168         if (data->has_fan & (1 << 3))
1169                 data->fan_div[3] = (i & 0x70) >> 4;
1170 }
1171
1172 static void nct6775_update_fan_div_common(struct nct6775_data *data)
1173 {
1174         if (data->kind == nct6775)
1175                 nct6775_update_fan_div(data);
1176 }
1177
1178 static void nct6775_init_fan_div(struct nct6775_data *data)
1179 {
1180         int i;
1181
1182         nct6775_update_fan_div_common(data);
1183         /*
1184          * For all fans, start with highest divider value if the divider
1185          * register is not initialized. This ensures that we get a
1186          * reading from the fan count register, even if it is not optimal.
1187          * We'll compute a better divider later on.
1188          */
1189         for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
1190                 if (!(data->has_fan & (1 << i)))
1191                         continue;
1192                 if (data->fan_div[i] == 0) {
1193                         data->fan_div[i] = 7;
1194                         nct6775_write_fan_div_common(data, i);
1195                 }
1196         }
1197 }
1198
1199 static void nct6775_init_fan_common(struct device *dev,
1200                                     struct nct6775_data *data)
1201 {
1202         int i;
1203         u8 reg;
1204
1205         if (data->has_fan_div)
1206                 nct6775_init_fan_div(data);
1207
1208         /*
1209          * If fan_min is not set (0), set it to 0xff to disable it. This
1210          * prevents the unnecessary warning when fanX_min is reported as 0.
1211          */
1212         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1213                 if (data->has_fan_min & (1 << i)) {
1214                         reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
1215                         if (!reg)
1216                                 nct6775_write_value(data, data->REG_FAN_MIN[i],
1217                                                     data->has_fan_div ? 0xff
1218                                                                       : 0xff1f);
1219                 }
1220         }
1221 }
1222
1223 static void nct6775_select_fan_div(struct device *dev,
1224                                    struct nct6775_data *data, int nr, u16 reg)
1225 {
1226         u8 fan_div = data->fan_div[nr];
1227         u16 fan_min;
1228
1229         if (!data->has_fan_div)
1230                 return;
1231
1232         /*
1233          * If we failed to measure the fan speed, or the reported value is not
1234          * in the optimal range, and the clock divider can be modified,
1235          * let's try that for next time.
1236          */
1237         if (reg == 0x00 && fan_div < 0x07)
1238                 fan_div++;
1239         else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1240                 fan_div--;
1241
1242         if (fan_div != data->fan_div[nr]) {
1243                 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1244                         nr + 1, div_from_reg(data->fan_div[nr]),
1245                         div_from_reg(fan_div));
1246
1247                 /* Preserve min limit if possible */
1248                 if (data->has_fan_min & (1 << nr)) {
1249                         fan_min = data->fan_min[nr];
1250                         if (fan_div > data->fan_div[nr]) {
1251                                 if (fan_min != 255 && fan_min > 1)
1252                                         fan_min >>= 1;
1253                         } else {
1254                                 if (fan_min != 255) {
1255                                         fan_min <<= 1;
1256                                         if (fan_min > 254)
1257                                                 fan_min = 254;
1258                                 }
1259                         }
1260                         if (fan_min != data->fan_min[nr]) {
1261                                 data->fan_min[nr] = fan_min;
1262                                 nct6775_write_value(data, data->REG_FAN_MIN[nr],
1263                                                     fan_min);
1264                         }
1265                 }
1266                 data->fan_div[nr] = fan_div;
1267                 nct6775_write_fan_div_common(data, nr);
1268         }
1269 }
1270
1271 static void nct6775_update_pwm(struct device *dev)
1272 {
1273         struct nct6775_data *data = dev_get_drvdata(dev);
1274         int i, j;
1275         int fanmodecfg, reg;
1276         bool duty_is_dc;
1277
1278         for (i = 0; i < data->pwm_num; i++) {
1279                 if (!(data->has_pwm & (1 << i)))
1280                         continue;
1281
1282                 duty_is_dc = data->REG_PWM_MODE[i] &&
1283                   (nct6775_read_value(data, data->REG_PWM_MODE[i])
1284                    & data->PWM_MODE_MASK[i]);
1285                 data->pwm_mode[i] = duty_is_dc;
1286
1287                 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
1288                 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1289                         if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1290                                 data->pwm[j][i]
1291                                   = nct6775_read_value(data,
1292                                                        data->REG_PWM[j][i]);
1293                         }
1294                 }
1295
1296                 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1297                                                         (fanmodecfg >> 4) & 7);
1298
1299                 if (!data->temp_tolerance[0][i] ||
1300                     data->pwm_enable[i] != speed_cruise)
1301                         data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1302                 if (!data->target_speed_tolerance[i] ||
1303                     data->pwm_enable[i] == speed_cruise) {
1304                         u8 t = fanmodecfg & 0x0f;
1305                         if (data->REG_TOLERANCE_H) {
1306                                 t |= (nct6775_read_value(data,
1307                                       data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
1308                         }
1309                         data->target_speed_tolerance[i] = t;
1310                 }
1311
1312                 data->temp_tolerance[1][i] =
1313                         nct6775_read_value(data,
1314                                         data->REG_CRITICAL_TEMP_TOLERANCE[i]);
1315
1316                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
1317                 data->pwm_temp_sel[i] = reg & 0x1f;
1318                 /* If fan can stop, report floor as 0 */
1319                 if (reg & 0x80)
1320                         data->pwm[2][i] = 0;
1321
1322                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
1323                 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1324                 /* If weight is disabled, report weight source as 0 */
1325                 if (j == 1 && !(reg & 0x80))
1326                         data->pwm_weight_temp_sel[i] = 0;
1327
1328                 /* Weight temp data */
1329                 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
1330                         data->weight_temp[j][i]
1331                           = nct6775_read_value(data,
1332                                                data->REG_WEIGHT_TEMP[j][i]);
1333                 }
1334         }
1335 }
1336
1337 static void nct6775_update_pwm_limits(struct device *dev)
1338 {
1339         struct nct6775_data *data = dev_get_drvdata(dev);
1340         int i, j;
1341         u8 reg;
1342         u16 reg_t;
1343
1344         for (i = 0; i < data->pwm_num; i++) {
1345                 if (!(data->has_pwm & (1 << i)))
1346                         continue;
1347
1348                 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1349                         data->fan_time[j][i] =
1350                           nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1351                 }
1352
1353                 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1354                 /* Update only in matching mode or if never updated */
1355                 if (!data->target_temp[i] ||
1356                     data->pwm_enable[i] == thermal_cruise)
1357                         data->target_temp[i] = reg_t & data->target_temp_mask;
1358                 if (!data->target_speed[i] ||
1359                     data->pwm_enable[i] == speed_cruise) {
1360                         if (data->REG_TOLERANCE_H) {
1361                                 reg_t |= (nct6775_read_value(data,
1362                                         data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1363                         }
1364                         data->target_speed[i] = reg_t;
1365                 }
1366
1367                 for (j = 0; j < data->auto_pwm_num; j++) {
1368                         data->auto_pwm[i][j] =
1369                           nct6775_read_value(data,
1370                                              NCT6775_AUTO_PWM(data, i, j));
1371                         data->auto_temp[i][j] =
1372                           nct6775_read_value(data,
1373                                              NCT6775_AUTO_TEMP(data, i, j));
1374                 }
1375
1376                 /* critical auto_pwm temperature data */
1377                 data->auto_temp[i][data->auto_pwm_num] =
1378                         nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1379
1380                 switch (data->kind) {
1381                 case nct6775:
1382                         reg = nct6775_read_value(data,
1383                                                  NCT6775_REG_CRITICAL_ENAB[i]);
1384                         data->auto_pwm[i][data->auto_pwm_num] =
1385                                                 (reg & 0x02) ? 0xff : 0x00;
1386                         break;
1387                 case nct6776:
1388                         data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1389                         break;
1390                 case nct6106:
1391                 case nct6779:
1392                 case nct6791:
1393                         reg = nct6775_read_value(data,
1394                                         data->REG_CRITICAL_PWM_ENABLE[i]);
1395                         if (reg & data->CRITICAL_PWM_ENABLE_MASK)
1396                                 reg = nct6775_read_value(data,
1397                                         data->REG_CRITICAL_PWM[i]);
1398                         else
1399                                 reg = 0xff;
1400                         data->auto_pwm[i][data->auto_pwm_num] = reg;
1401                         break;
1402                 }
1403         }
1404 }
1405
1406 static struct nct6775_data *nct6775_update_device(struct device *dev)
1407 {
1408         struct nct6775_data *data = dev_get_drvdata(dev);
1409         int i, j;
1410
1411         mutex_lock(&data->update_lock);
1412
1413         if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1414             || !data->valid) {
1415                 /* Fan clock dividers */
1416                 nct6775_update_fan_div_common(data);
1417
1418                 /* Measured voltages and limits */
1419                 for (i = 0; i < data->in_num; i++) {
1420                         if (!(data->have_in & (1 << i)))
1421                                 continue;
1422
1423                         data->in[i][0] = nct6775_read_value(data,
1424                                                             data->REG_VIN[i]);
1425                         data->in[i][1] = nct6775_read_value(data,
1426                                           data->REG_IN_MINMAX[0][i]);
1427                         data->in[i][2] = nct6775_read_value(data,
1428                                           data->REG_IN_MINMAX[1][i]);
1429                 }
1430
1431                 /* Measured fan speeds and limits */
1432                 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
1433                         u16 reg;
1434
1435                         if (!(data->has_fan & (1 << i)))
1436                                 continue;
1437
1438                         reg = nct6775_read_value(data, data->REG_FAN[i]);
1439                         data->rpm[i] = data->fan_from_reg(reg,
1440                                                           data->fan_div[i]);
1441
1442                         if (data->has_fan_min & (1 << i))
1443                                 data->fan_min[i] = nct6775_read_value(data,
1444                                            data->REG_FAN_MIN[i]);
1445                         data->fan_pulses[i] =
1446                           (nct6775_read_value(data, data->REG_FAN_PULSES[i])
1447                                 >> data->FAN_PULSE_SHIFT[i]) & 0x03;
1448
1449                         nct6775_select_fan_div(dev, data, i, reg);
1450                 }
1451
1452                 nct6775_update_pwm(dev);
1453                 nct6775_update_pwm_limits(dev);
1454
1455                 /* Measured temperatures and limits */
1456                 for (i = 0; i < NUM_TEMP; i++) {
1457                         if (!(data->have_temp & (1 << i)))
1458                                 continue;
1459                         for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1460                                 if (data->reg_temp[j][i])
1461                                         data->temp[j][i]
1462                                           = nct6775_read_temp(data,
1463                                                 data->reg_temp[j][i]);
1464                         }
1465                         if (!(data->have_temp_fixed & (1 << i)))
1466                                 continue;
1467                         data->temp_offset[i]
1468                           = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1469                 }
1470
1471                 data->alarms = 0;
1472                 for (i = 0; i < NUM_REG_ALARM; i++) {
1473                         u8 alarm;
1474                         if (!data->REG_ALARM[i])
1475                                 continue;
1476                         alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1477                         data->alarms |= ((u64)alarm) << (i << 3);
1478                 }
1479
1480                 data->beeps = 0;
1481                 for (i = 0; i < NUM_REG_BEEP; i++) {
1482                         u8 beep;
1483                         if (!data->REG_BEEP[i])
1484                                 continue;
1485                         beep = nct6775_read_value(data, data->REG_BEEP[i]);
1486                         data->beeps |= ((u64)beep) << (i << 3);
1487                 }
1488
1489                 data->last_updated = jiffies;
1490                 data->valid = true;
1491         }
1492
1493         mutex_unlock(&data->update_lock);
1494         return data;
1495 }
1496
1497 /*
1498  * Sysfs callback functions
1499  */
1500 static ssize_t
1501 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1502 {
1503         struct nct6775_data *data = nct6775_update_device(dev);
1504         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1505         int nr = sattr->nr;
1506         int index = sattr->index;
1507         return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1508 }
1509
1510 static ssize_t
1511 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1512              size_t count)
1513 {
1514         struct nct6775_data *data = dev_get_drvdata(dev);
1515         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1516         int nr = sattr->nr;
1517         int index = sattr->index;
1518         unsigned long val;
1519         int err = kstrtoul(buf, 10, &val);
1520         if (err < 0)
1521                 return err;
1522         mutex_lock(&data->update_lock);
1523         data->in[nr][index] = in_to_reg(val, nr);
1524         nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr],
1525                             data->in[nr][index]);
1526         mutex_unlock(&data->update_lock);
1527         return count;
1528 }
1529
1530 static ssize_t
1531 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1532 {
1533         struct nct6775_data *data = nct6775_update_device(dev);
1534         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1535         int nr = data->ALARM_BITS[sattr->index];
1536         return sprintf(buf, "%u\n",
1537                        (unsigned int)((data->alarms >> nr) & 0x01));
1538 }
1539
1540 static int find_temp_source(struct nct6775_data *data, int index, int count)
1541 {
1542         int source = data->temp_src[index];
1543         int nr;
1544
1545         for (nr = 0; nr < count; nr++) {
1546                 int src;
1547
1548                 src = nct6775_read_value(data,
1549                                          data->REG_TEMP_SOURCE[nr]) & 0x1f;
1550                 if (src == source)
1551                         return nr;
1552         }
1553         return -1;
1554 }
1555
1556 static ssize_t
1557 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1558 {
1559         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1560         struct nct6775_data *data = nct6775_update_device(dev);
1561         unsigned int alarm = 0;
1562         int nr;
1563
1564         /*
1565          * For temperatures, there is no fixed mapping from registers to alarm
1566          * bits. Alarm bits are determined by the temperature source mapping.
1567          */
1568         nr = find_temp_source(data, sattr->index, data->num_temp_alarms);
1569         if (nr >= 0) {
1570                 int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE];
1571                 alarm = (data->alarms >> bit) & 0x01;
1572         }
1573         return sprintf(buf, "%u\n", alarm);
1574 }
1575
1576 static ssize_t
1577 show_beep(struct device *dev, struct device_attribute *attr, char *buf)
1578 {
1579         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1580         struct nct6775_data *data = nct6775_update_device(dev);
1581         int nr = data->BEEP_BITS[sattr->index];
1582
1583         return sprintf(buf, "%u\n",
1584                        (unsigned int)((data->beeps >> nr) & 0x01));
1585 }
1586
1587 static ssize_t
1588 store_beep(struct device *dev, struct device_attribute *attr, const char *buf,
1589            size_t count)
1590 {
1591         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1592         struct nct6775_data *data = dev_get_drvdata(dev);
1593         int nr = data->BEEP_BITS[sattr->index];
1594         int regindex = nr >> 3;
1595         unsigned long val;
1596
1597         int err = kstrtoul(buf, 10, &val);
1598         if (err < 0)
1599                 return err;
1600         if (val > 1)
1601                 return -EINVAL;
1602
1603         mutex_lock(&data->update_lock);
1604         if (val)
1605                 data->beeps |= (1ULL << nr);
1606         else
1607                 data->beeps &= ~(1ULL << nr);
1608         nct6775_write_value(data, data->REG_BEEP[regindex],
1609                             (data->beeps >> (regindex << 3)) & 0xff);
1610         mutex_unlock(&data->update_lock);
1611         return count;
1612 }
1613
1614 static ssize_t
1615 show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf)
1616 {
1617         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1618         struct nct6775_data *data = nct6775_update_device(dev);
1619         unsigned int beep = 0;
1620         int nr;
1621
1622         /*
1623          * For temperatures, there is no fixed mapping from registers to beep
1624          * enable bits. Beep enable bits are determined by the temperature
1625          * source mapping.
1626          */
1627         nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1628         if (nr >= 0) {
1629                 int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1630                 beep = (data->beeps >> bit) & 0x01;
1631         }
1632         return sprintf(buf, "%u\n", beep);
1633 }
1634
1635 static ssize_t
1636 store_temp_beep(struct device *dev, struct device_attribute *attr,
1637                 const char *buf, size_t count)
1638 {
1639         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1640         struct nct6775_data *data = dev_get_drvdata(dev);
1641         int nr, bit, regindex;
1642         unsigned long val;
1643
1644         int err = kstrtoul(buf, 10, &val);
1645         if (err < 0)
1646                 return err;
1647         if (val > 1)
1648                 return -EINVAL;
1649
1650         nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1651         if (nr < 0)
1652                 return -ENODEV;
1653
1654         bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1655         regindex = bit >> 3;
1656
1657         mutex_lock(&data->update_lock);
1658         if (val)
1659                 data->beeps |= (1ULL << bit);
1660         else
1661                 data->beeps &= ~(1ULL << bit);
1662         nct6775_write_value(data, data->REG_BEEP[regindex],
1663                             (data->beeps >> (regindex << 3)) & 0xff);
1664         mutex_unlock(&data->update_lock);
1665
1666         return count;
1667 }
1668
1669 static umode_t nct6775_in_is_visible(struct kobject *kobj,
1670                                      struct attribute *attr, int index)
1671 {
1672         struct device *dev = container_of(kobj, struct device, kobj);
1673         struct nct6775_data *data = dev_get_drvdata(dev);
1674         int in = index / 5;     /* voltage index */
1675
1676         if (!(data->have_in & (1 << in)))
1677                 return 0;
1678
1679         return attr->mode;
1680 }
1681
1682 SENSOR_TEMPLATE_2(in_input, "in%d_input", S_IRUGO, show_in_reg, NULL, 0, 0);
1683 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", S_IRUGO, show_alarm, NULL, 0);
1684 SENSOR_TEMPLATE(in_beep, "in%d_beep", S_IWUSR | S_IRUGO, show_beep, store_beep,
1685                 0);
1686 SENSOR_TEMPLATE_2(in_min, "in%d_min", S_IWUSR | S_IRUGO, show_in_reg,
1687                   store_in_reg, 0, 1);
1688 SENSOR_TEMPLATE_2(in_max, "in%d_max", S_IWUSR | S_IRUGO, show_in_reg,
1689                   store_in_reg, 0, 2);
1690
1691 /*
1692  * nct6775_in_is_visible uses the index into the following array
1693  * to determine if attributes should be created or not.
1694  * Any change in order or content must be matched.
1695  */
1696 static struct sensor_device_template *nct6775_attributes_in_template[] = {
1697         &sensor_dev_template_in_input,
1698         &sensor_dev_template_in_alarm,
1699         &sensor_dev_template_in_beep,
1700         &sensor_dev_template_in_min,
1701         &sensor_dev_template_in_max,
1702         NULL
1703 };
1704
1705 static struct sensor_template_group nct6775_in_template_group = {
1706         .templates = nct6775_attributes_in_template,
1707         .is_visible = nct6775_in_is_visible,
1708 };
1709
1710 static ssize_t
1711 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1712 {
1713         struct nct6775_data *data = nct6775_update_device(dev);
1714         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1715         int nr = sattr->index;
1716         return sprintf(buf, "%d\n", data->rpm[nr]);
1717 }
1718
1719 static ssize_t
1720 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1721 {
1722         struct nct6775_data *data = nct6775_update_device(dev);
1723         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1724         int nr = sattr->index;
1725         return sprintf(buf, "%d\n",
1726                        data->fan_from_reg_min(data->fan_min[nr],
1727                                               data->fan_div[nr]));
1728 }
1729
1730 static ssize_t
1731 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1732 {
1733         struct nct6775_data *data = nct6775_update_device(dev);
1734         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1735         int nr = sattr->index;
1736         return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1737 }
1738
1739 static ssize_t
1740 store_fan_min(struct device *dev, struct device_attribute *attr,
1741               const char *buf, size_t count)
1742 {
1743         struct nct6775_data *data = dev_get_drvdata(dev);
1744         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1745         int nr = sattr->index;
1746         unsigned long val;
1747         int err;
1748         unsigned int reg;
1749         u8 new_div;
1750
1751         err = kstrtoul(buf, 10, &val);
1752         if (err < 0)
1753                 return err;
1754
1755         mutex_lock(&data->update_lock);
1756         if (!data->has_fan_div) {
1757                 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1758                 if (!val) {
1759                         val = 0xff1f;
1760                 } else {
1761                         if (val > 1350000U)
1762                                 val = 135000U;
1763                         val = 1350000U / val;
1764                         val = (val & 0x1f) | ((val << 3) & 0xff00);
1765                 }
1766                 data->fan_min[nr] = val;
1767                 goto write_min; /* Leave fan divider alone */
1768         }
1769         if (!val) {
1770                 /* No min limit, alarm disabled */
1771                 data->fan_min[nr] = 255;
1772                 new_div = data->fan_div[nr]; /* No change */
1773                 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1774                 goto write_div;
1775         }
1776         reg = 1350000U / val;
1777         if (reg >= 128 * 255) {
1778                 /*
1779                  * Speed below this value cannot possibly be represented,
1780                  * even with the highest divider (128)
1781                  */
1782                 data->fan_min[nr] = 254;
1783                 new_div = 7; /* 128 == (1 << 7) */
1784                 dev_warn(dev,
1785                          "fan%u low limit %lu below minimum %u, set to minimum\n",
1786                          nr + 1, val, data->fan_from_reg_min(254, 7));
1787         } else if (!reg) {
1788                 /*
1789                  * Speed above this value cannot possibly be represented,
1790                  * even with the lowest divider (1)
1791                  */
1792                 data->fan_min[nr] = 1;
1793                 new_div = 0; /* 1 == (1 << 0) */
1794                 dev_warn(dev,
1795                          "fan%u low limit %lu above maximum %u, set to maximum\n",
1796                          nr + 1, val, data->fan_from_reg_min(1, 0));
1797         } else {
1798                 /*
1799                  * Automatically pick the best divider, i.e. the one such
1800                  * that the min limit will correspond to a register value
1801                  * in the 96..192 range
1802                  */
1803                 new_div = 0;
1804                 while (reg > 192 && new_div < 7) {
1805                         reg >>= 1;
1806                         new_div++;
1807                 }
1808                 data->fan_min[nr] = reg;
1809         }
1810
1811 write_div:
1812         /*
1813          * Write both the fan clock divider (if it changed) and the new
1814          * fan min (unconditionally)
1815          */
1816         if (new_div != data->fan_div[nr]) {
1817                 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1818                         nr + 1, div_from_reg(data->fan_div[nr]),
1819                         div_from_reg(new_div));
1820                 data->fan_div[nr] = new_div;
1821                 nct6775_write_fan_div_common(data, nr);
1822                 /* Give the chip time to sample a new speed value */
1823                 data->last_updated = jiffies;
1824         }
1825
1826 write_min:
1827         nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1828         mutex_unlock(&data->update_lock);
1829
1830         return count;
1831 }
1832
1833 static ssize_t
1834 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
1835 {
1836         struct nct6775_data *data = nct6775_update_device(dev);
1837         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1838         int p = data->fan_pulses[sattr->index];
1839
1840         return sprintf(buf, "%d\n", p ? : 4);
1841 }
1842
1843 static ssize_t
1844 store_fan_pulses(struct device *dev, struct device_attribute *attr,
1845                  const char *buf, size_t count)
1846 {
1847         struct nct6775_data *data = dev_get_drvdata(dev);
1848         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1849         int nr = sattr->index;
1850         unsigned long val;
1851         int err;
1852         u8 reg;
1853
1854         err = kstrtoul(buf, 10, &val);
1855         if (err < 0)
1856                 return err;
1857
1858         if (val > 4)
1859                 return -EINVAL;
1860
1861         mutex_lock(&data->update_lock);
1862         data->fan_pulses[nr] = val & 3;
1863         reg = nct6775_read_value(data, data->REG_FAN_PULSES[nr]);
1864         reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
1865         reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
1866         nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
1867         mutex_unlock(&data->update_lock);
1868
1869         return count;
1870 }
1871
1872 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
1873                                       struct attribute *attr, int index)
1874 {
1875         struct device *dev = container_of(kobj, struct device, kobj);
1876         struct nct6775_data *data = dev_get_drvdata(dev);
1877         int fan = index / 6;    /* fan index */
1878         int nr = index % 6;     /* attribute index */
1879
1880         if (!(data->has_fan & (1 << fan)))
1881                 return 0;
1882
1883         if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1)
1884                 return 0;
1885         if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1)
1886                 return 0;
1887         if (nr == 4 && !(data->has_fan_min & (1 << fan)))
1888                 return 0;
1889         if (nr == 5 && data->kind != nct6775)
1890                 return 0;
1891
1892         return attr->mode;
1893 }
1894
1895 SENSOR_TEMPLATE(fan_input, "fan%d_input", S_IRUGO, show_fan, NULL, 0);
1896 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", S_IRUGO, show_alarm, NULL,
1897                 FAN_ALARM_BASE);
1898 SENSOR_TEMPLATE(fan_beep, "fan%d_beep", S_IWUSR | S_IRUGO, show_beep,
1899                 store_beep, FAN_ALARM_BASE);
1900 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", S_IWUSR | S_IRUGO, show_fan_pulses,
1901                 store_fan_pulses, 0);
1902 SENSOR_TEMPLATE(fan_min, "fan%d_min", S_IWUSR | S_IRUGO, show_fan_min,
1903                 store_fan_min, 0);
1904 SENSOR_TEMPLATE(fan_div, "fan%d_div", S_IRUGO, show_fan_div, NULL, 0);
1905
1906 /*
1907  * nct6775_fan_is_visible uses the index into the following array
1908  * to determine if attributes should be created or not.
1909  * Any change in order or content must be matched.
1910  */
1911 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
1912         &sensor_dev_template_fan_input,
1913         &sensor_dev_template_fan_alarm, /* 1 */
1914         &sensor_dev_template_fan_beep,  /* 2 */
1915         &sensor_dev_template_fan_pulses,
1916         &sensor_dev_template_fan_min,   /* 4 */
1917         &sensor_dev_template_fan_div,   /* 5 */
1918         NULL
1919 };
1920
1921 static struct sensor_template_group nct6775_fan_template_group = {
1922         .templates = nct6775_attributes_fan_template,
1923         .is_visible = nct6775_fan_is_visible,
1924         .base = 1,
1925 };
1926
1927 static ssize_t
1928 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1929 {
1930         struct nct6775_data *data = nct6775_update_device(dev);
1931         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1932         int nr = sattr->index;
1933         return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1934 }
1935
1936 static ssize_t
1937 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1938 {
1939         struct nct6775_data *data = nct6775_update_device(dev);
1940         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1941         int nr = sattr->nr;
1942         int index = sattr->index;
1943
1944         return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
1945 }
1946
1947 static ssize_t
1948 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
1949            size_t count)
1950 {
1951         struct nct6775_data *data = dev_get_drvdata(dev);
1952         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1953         int nr = sattr->nr;
1954         int index = sattr->index;
1955         int err;
1956         long val;
1957
1958         err = kstrtol(buf, 10, &val);
1959         if (err < 0)
1960                 return err;
1961
1962         mutex_lock(&data->update_lock);
1963         data->temp[index][nr] = LM75_TEMP_TO_REG(val);
1964         nct6775_write_temp(data, data->reg_temp[index][nr],
1965                            data->temp[index][nr]);
1966         mutex_unlock(&data->update_lock);
1967         return count;
1968 }
1969
1970 static ssize_t
1971 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
1972 {
1973         struct nct6775_data *data = nct6775_update_device(dev);
1974         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1975
1976         return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
1977 }
1978
1979 static ssize_t
1980 store_temp_offset(struct device *dev, struct device_attribute *attr,
1981                   const char *buf, size_t count)
1982 {
1983         struct nct6775_data *data = dev_get_drvdata(dev);
1984         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1985         int nr = sattr->index;
1986         long val;
1987         int err;
1988
1989         err = kstrtol(buf, 10, &val);
1990         if (err < 0)
1991                 return err;
1992
1993         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
1994
1995         mutex_lock(&data->update_lock);
1996         data->temp_offset[nr] = val;
1997         nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
1998         mutex_unlock(&data->update_lock);
1999
2000         return count;
2001 }
2002
2003 static ssize_t
2004 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
2005 {
2006         struct nct6775_data *data = nct6775_update_device(dev);
2007         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2008         int nr = sattr->index;
2009         return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
2010 }
2011
2012 static ssize_t
2013 store_temp_type(struct device *dev, struct device_attribute *attr,
2014                 const char *buf, size_t count)
2015 {
2016         struct nct6775_data *data = nct6775_update_device(dev);
2017         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2018         int nr = sattr->index;
2019         unsigned long val;
2020         int err;
2021         u8 vbat, diode, vbit, dbit;
2022
2023         err = kstrtoul(buf, 10, &val);
2024         if (err < 0)
2025                 return err;
2026
2027         if (val != 1 && val != 3 && val != 4)
2028                 return -EINVAL;
2029
2030         mutex_lock(&data->update_lock);
2031
2032         data->temp_type[nr] = val;
2033         vbit = 0x02 << nr;
2034         dbit = data->DIODE_MASK << nr;
2035         vbat = nct6775_read_value(data, data->REG_VBAT) & ~vbit;
2036         diode = nct6775_read_value(data, data->REG_DIODE) & ~dbit;
2037         switch (val) {
2038         case 1: /* CPU diode (diode, current mode) */
2039                 vbat |= vbit;
2040                 diode |= dbit;
2041                 break;
2042         case 3: /* diode, voltage mode */
2043                 vbat |= dbit;
2044                 break;
2045         case 4: /* thermistor */
2046                 break;
2047         }
2048         nct6775_write_value(data, data->REG_VBAT, vbat);
2049         nct6775_write_value(data, data->REG_DIODE, diode);
2050
2051         mutex_unlock(&data->update_lock);
2052         return count;
2053 }
2054
2055 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
2056                                        struct attribute *attr, int index)
2057 {
2058         struct device *dev = container_of(kobj, struct device, kobj);
2059         struct nct6775_data *data = dev_get_drvdata(dev);
2060         int temp = index / 10;  /* temp index */
2061         int nr = index % 10;    /* attribute index */
2062
2063         if (!(data->have_temp & (1 << temp)))
2064                 return 0;
2065
2066         if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0)
2067                 return 0;                               /* alarm */
2068
2069         if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0)
2070                 return 0;                               /* beep */
2071
2072         if (nr == 4 && !data->reg_temp[1][temp])        /* max */
2073                 return 0;
2074
2075         if (nr == 5 && !data->reg_temp[2][temp])        /* max_hyst */
2076                 return 0;
2077
2078         if (nr == 6 && !data->reg_temp[3][temp])        /* crit */
2079                 return 0;
2080
2081         if (nr == 7 && !data->reg_temp[4][temp])        /* lcrit */
2082                 return 0;
2083
2084         /* offset and type only apply to fixed sensors */
2085         if (nr > 7 && !(data->have_temp_fixed & (1 << temp)))
2086                 return 0;
2087
2088         return attr->mode;
2089 }
2090
2091 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", S_IRUGO, show_temp, NULL, 0, 0);
2092 SENSOR_TEMPLATE(temp_label, "temp%d_label", S_IRUGO, show_temp_label, NULL, 0);
2093 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", S_IRUGO | S_IWUSR, show_temp,
2094                   store_temp, 0, 1);
2095 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", S_IRUGO | S_IWUSR,
2096                   show_temp, store_temp, 0, 2);
2097 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", S_IRUGO | S_IWUSR, show_temp,
2098                   store_temp, 0, 3);
2099 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", S_IRUGO | S_IWUSR, show_temp,
2100                   store_temp, 0, 4);
2101 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", S_IRUGO | S_IWUSR,
2102                 show_temp_offset, store_temp_offset, 0);
2103 SENSOR_TEMPLATE(temp_type, "temp%d_type", S_IRUGO | S_IWUSR, show_temp_type,
2104                 store_temp_type, 0);
2105 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", S_IRUGO, show_temp_alarm, NULL, 0);
2106 SENSOR_TEMPLATE(temp_beep, "temp%d_beep", S_IRUGO | S_IWUSR, show_temp_beep,
2107                 store_temp_beep, 0);
2108
2109 /*
2110  * nct6775_temp_is_visible uses the index into the following array
2111  * to determine if attributes should be created or not.
2112  * Any change in order or content must be matched.
2113  */
2114 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
2115         &sensor_dev_template_temp_input,
2116         &sensor_dev_template_temp_label,
2117         &sensor_dev_template_temp_alarm,        /* 2 */
2118         &sensor_dev_template_temp_beep,         /* 3 */
2119         &sensor_dev_template_temp_max,          /* 4 */
2120         &sensor_dev_template_temp_max_hyst,     /* 5 */
2121         &sensor_dev_template_temp_crit,         /* 6 */
2122         &sensor_dev_template_temp_lcrit,        /* 7 */
2123         &sensor_dev_template_temp_offset,       /* 8 */
2124         &sensor_dev_template_temp_type,         /* 9 */
2125         NULL
2126 };
2127
2128 static struct sensor_template_group nct6775_temp_template_group = {
2129         .templates = nct6775_attributes_temp_template,
2130         .is_visible = nct6775_temp_is_visible,
2131         .base = 1,
2132 };
2133
2134 static ssize_t
2135 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
2136 {
2137         struct nct6775_data *data = nct6775_update_device(dev);
2138         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2139
2140         return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
2141 }
2142
2143 static ssize_t
2144 store_pwm_mode(struct device *dev, struct device_attribute *attr,
2145                const char *buf, size_t count)
2146 {
2147         struct nct6775_data *data = dev_get_drvdata(dev);
2148         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2149         int nr = sattr->index;
2150         unsigned long val;
2151         int err;
2152         u8 reg;
2153
2154         err = kstrtoul(buf, 10, &val);
2155         if (err < 0)
2156                 return err;
2157
2158         if (val > 1)
2159                 return -EINVAL;
2160
2161         /* Setting DC mode is not supported for all chips/channels */
2162         if (data->REG_PWM_MODE[nr] == 0) {
2163                 if (val)
2164                         return -EINVAL;
2165                 return count;
2166         }
2167
2168         mutex_lock(&data->update_lock);
2169         data->pwm_mode[nr] = val;
2170         reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
2171         reg &= ~data->PWM_MODE_MASK[nr];
2172         if (val)
2173                 reg |= data->PWM_MODE_MASK[nr];
2174         nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
2175         mutex_unlock(&data->update_lock);
2176         return count;
2177 }
2178
2179 static ssize_t
2180 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2181 {
2182         struct nct6775_data *data = nct6775_update_device(dev);
2183         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2184         int nr = sattr->nr;
2185         int index = sattr->index;
2186         int pwm;
2187
2188         /*
2189          * For automatic fan control modes, show current pwm readings.
2190          * Otherwise, show the configured value.
2191          */
2192         if (index == 0 && data->pwm_enable[nr] > manual)
2193                 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
2194         else
2195                 pwm = data->pwm[index][nr];
2196
2197         return sprintf(buf, "%d\n", pwm);
2198 }
2199
2200 static ssize_t
2201 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
2202           size_t count)
2203 {
2204         struct nct6775_data *data = dev_get_drvdata(dev);
2205         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2206         int nr = sattr->nr;
2207         int index = sattr->index;
2208         unsigned long val;
2209         int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
2210         int maxval[7]
2211           = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
2212         int err;
2213         u8 reg;
2214
2215         err = kstrtoul(buf, 10, &val);
2216         if (err < 0)
2217                 return err;
2218         val = clamp_val(val, minval[index], maxval[index]);
2219
2220         mutex_lock(&data->update_lock);
2221         data->pwm[index][nr] = val;
2222         nct6775_write_value(data, data->REG_PWM[index][nr], val);
2223         if (index == 2) { /* floor: disable if val == 0 */
2224                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2225                 reg &= 0x7f;
2226                 if (val)
2227                         reg |= 0x80;
2228                 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2229         }
2230         mutex_unlock(&data->update_lock);
2231         return count;
2232 }
2233
2234 /* Returns 0 if OK, -EINVAL otherwise */
2235 static int check_trip_points(struct nct6775_data *data, int nr)
2236 {
2237         int i;
2238
2239         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2240                 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
2241                         return -EINVAL;
2242         }
2243         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2244                 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
2245                         return -EINVAL;
2246         }
2247         /* validate critical temperature and pwm if enabled (pwm > 0) */
2248         if (data->auto_pwm[nr][data->auto_pwm_num]) {
2249                 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2250                                 data->auto_temp[nr][data->auto_pwm_num] ||
2251                     data->auto_pwm[nr][data->auto_pwm_num - 1] >
2252                                 data->auto_pwm[nr][data->auto_pwm_num])
2253                         return -EINVAL;
2254         }
2255         return 0;
2256 }
2257
2258 static void pwm_update_registers(struct nct6775_data *data, int nr)
2259 {
2260         u8 reg;
2261
2262         switch (data->pwm_enable[nr]) {
2263         case off:
2264         case manual:
2265                 break;
2266         case speed_cruise:
2267                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2268                 reg = (reg & ~data->tolerance_mask) |
2269                   (data->target_speed_tolerance[nr] & data->tolerance_mask);
2270                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2271                 nct6775_write_value(data, data->REG_TARGET[nr],
2272                                     data->target_speed[nr] & 0xff);
2273                 if (data->REG_TOLERANCE_H) {
2274                         reg = (data->target_speed[nr] >> 8) & 0x0f;
2275                         reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2276                         nct6775_write_value(data,
2277                                             data->REG_TOLERANCE_H[nr],
2278                                             reg);
2279                 }
2280                 break;
2281         case thermal_cruise:
2282                 nct6775_write_value(data, data->REG_TARGET[nr],
2283                                     data->target_temp[nr]);
2284                 /* intentional */
2285         default:
2286                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2287                 reg = (reg & ~data->tolerance_mask) |
2288                   data->temp_tolerance[0][nr];
2289                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2290                 break;
2291         }
2292 }
2293
2294 static ssize_t
2295 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2296 {
2297         struct nct6775_data *data = nct6775_update_device(dev);
2298         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2299
2300         return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2301 }
2302
2303 static ssize_t
2304 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2305                  const char *buf, size_t count)
2306 {
2307         struct nct6775_data *data = dev_get_drvdata(dev);
2308         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2309         int nr = sattr->index;
2310         unsigned long val;
2311         int err;
2312         u16 reg;
2313
2314         err = kstrtoul(buf, 10, &val);
2315         if (err < 0)
2316                 return err;
2317
2318         if (val > sf4)
2319                 return -EINVAL;
2320
2321         if (val == sf3 && data->kind != nct6775)
2322                 return -EINVAL;
2323
2324         if (val == sf4 && check_trip_points(data, nr)) {
2325                 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2326                 dev_err(dev, "Adjust trip points and try again\n");
2327                 return -EINVAL;
2328         }
2329
2330         mutex_lock(&data->update_lock);
2331         data->pwm_enable[nr] = val;
2332         if (val == off) {
2333                 /*
2334                  * turn off pwm control: select manual mode, set pwm to maximum
2335                  */
2336                 data->pwm[0][nr] = 255;
2337                 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2338         }
2339         pwm_update_registers(data, nr);
2340         reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2341         reg &= 0x0f;
2342         reg |= pwm_enable_to_reg(val) << 4;
2343         nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2344         mutex_unlock(&data->update_lock);
2345         return count;
2346 }
2347
2348 static ssize_t
2349 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2350 {
2351         int i, sel = 0;
2352
2353         for (i = 0; i < NUM_TEMP; i++) {
2354                 if (!(data->have_temp & (1 << i)))
2355                         continue;
2356                 if (src == data->temp_src[i]) {
2357                         sel = i + 1;
2358                         break;
2359                 }
2360         }
2361
2362         return sprintf(buf, "%d\n", sel);
2363 }
2364
2365 static ssize_t
2366 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2367 {
2368         struct nct6775_data *data = nct6775_update_device(dev);
2369         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2370         int index = sattr->index;
2371
2372         return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2373 }
2374
2375 static ssize_t
2376 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2377                    const char *buf, size_t count)
2378 {
2379         struct nct6775_data *data = nct6775_update_device(dev);
2380         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2381         int nr = sattr->index;
2382         unsigned long val;
2383         int err, reg, src;
2384
2385         err = kstrtoul(buf, 10, &val);
2386         if (err < 0)
2387                 return err;
2388         if (val == 0 || val > NUM_TEMP)
2389                 return -EINVAL;
2390         if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
2391                 return -EINVAL;
2392
2393         mutex_lock(&data->update_lock);
2394         src = data->temp_src[val - 1];
2395         data->pwm_temp_sel[nr] = src;
2396         reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2397         reg &= 0xe0;
2398         reg |= src;
2399         nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2400         mutex_unlock(&data->update_lock);
2401
2402         return count;
2403 }
2404
2405 static ssize_t
2406 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2407                          char *buf)
2408 {
2409         struct nct6775_data *data = nct6775_update_device(dev);
2410         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2411         int index = sattr->index;
2412
2413         return show_pwm_temp_sel_common(data, buf,
2414                                         data->pwm_weight_temp_sel[index]);
2415 }
2416
2417 static ssize_t
2418 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2419                           const char *buf, size_t count)
2420 {
2421         struct nct6775_data *data = nct6775_update_device(dev);
2422         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2423         int nr = sattr->index;
2424         unsigned long val;
2425         int err, reg, src;
2426
2427         err = kstrtoul(buf, 10, &val);
2428         if (err < 0)
2429                 return err;
2430         if (val > NUM_TEMP)
2431                 return -EINVAL;
2432         if (val && (!(data->have_temp & (1 << (val - 1))) ||
2433                     !data->temp_src[val - 1]))
2434                 return -EINVAL;
2435
2436         mutex_lock(&data->update_lock);
2437         if (val) {
2438                 src = data->temp_src[val - 1];
2439                 data->pwm_weight_temp_sel[nr] = src;
2440                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2441                 reg &= 0xe0;
2442                 reg |= (src | 0x80);
2443                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2444         } else {
2445                 data->pwm_weight_temp_sel[nr] = 0;
2446                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2447                 reg &= 0x7f;
2448                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2449         }
2450         mutex_unlock(&data->update_lock);
2451
2452         return count;
2453 }
2454
2455 static ssize_t
2456 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2457 {
2458         struct nct6775_data *data = nct6775_update_device(dev);
2459         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2460
2461         return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2462 }
2463
2464 static ssize_t
2465 store_target_temp(struct device *dev, struct device_attribute *attr,
2466                   const char *buf, size_t count)
2467 {
2468         struct nct6775_data *data = dev_get_drvdata(dev);
2469         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2470         int nr = sattr->index;
2471         unsigned long val;
2472         int err;
2473
2474         err = kstrtoul(buf, 10, &val);
2475         if (err < 0)
2476                 return err;
2477
2478         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2479                         data->target_temp_mask);
2480
2481         mutex_lock(&data->update_lock);
2482         data->target_temp[nr] = val;
2483         pwm_update_registers(data, nr);
2484         mutex_unlock(&data->update_lock);
2485         return count;
2486 }
2487
2488 static ssize_t
2489 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2490 {
2491         struct nct6775_data *data = nct6775_update_device(dev);
2492         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2493         int nr = sattr->index;
2494
2495         return sprintf(buf, "%d\n",
2496                        fan_from_reg16(data->target_speed[nr],
2497                                       data->fan_div[nr]));
2498 }
2499
2500 static ssize_t
2501 store_target_speed(struct device *dev, struct device_attribute *attr,
2502                    const char *buf, size_t count)
2503 {
2504         struct nct6775_data *data = dev_get_drvdata(dev);
2505         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2506         int nr = sattr->index;
2507         unsigned long val;
2508         int err;
2509         u16 speed;
2510
2511         err = kstrtoul(buf, 10, &val);
2512         if (err < 0)
2513                 return err;
2514
2515         val = clamp_val(val, 0, 1350000U);
2516         speed = fan_to_reg(val, data->fan_div[nr]);
2517
2518         mutex_lock(&data->update_lock);
2519         data->target_speed[nr] = speed;
2520         pwm_update_registers(data, nr);
2521         mutex_unlock(&data->update_lock);
2522         return count;
2523 }
2524
2525 static ssize_t
2526 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2527                     char *buf)
2528 {
2529         struct nct6775_data *data = nct6775_update_device(dev);
2530         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2531         int nr = sattr->nr;
2532         int index = sattr->index;
2533
2534         return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2535 }
2536
2537 static ssize_t
2538 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2539                      const char *buf, size_t count)
2540 {
2541         struct nct6775_data *data = dev_get_drvdata(dev);
2542         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2543         int nr = sattr->nr;
2544         int index = sattr->index;
2545         unsigned long val;
2546         int err;
2547
2548         err = kstrtoul(buf, 10, &val);
2549         if (err < 0)
2550                 return err;
2551
2552         /* Limit tolerance as needed */
2553         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2554
2555         mutex_lock(&data->update_lock);
2556         data->temp_tolerance[index][nr] = val;
2557         if (index)
2558                 pwm_update_registers(data, nr);
2559         else
2560                 nct6775_write_value(data,
2561                                     data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2562                                     val);
2563         mutex_unlock(&data->update_lock);
2564         return count;
2565 }
2566
2567 /*
2568  * Fan speed tolerance is a tricky beast, since the associated register is
2569  * a tick counter, but the value is reported and configured as rpm.
2570  * Compute resulting low and high rpm values and report the difference.
2571  */
2572 static ssize_t
2573 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2574                      char *buf)
2575 {
2576         struct nct6775_data *data = nct6775_update_device(dev);
2577         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2578         int nr = sattr->index;
2579         int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2580         int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2581         int tolerance;
2582
2583         if (low <= 0)
2584                 low = 1;
2585         if (high > 0xffff)
2586                 high = 0xffff;
2587         if (high < low)
2588                 high = low;
2589
2590         tolerance = (fan_from_reg16(low, data->fan_div[nr])
2591                      - fan_from_reg16(high, data->fan_div[nr])) / 2;
2592
2593         return sprintf(buf, "%d\n", tolerance);
2594 }
2595
2596 static ssize_t
2597 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2598                       const char *buf, size_t count)
2599 {
2600         struct nct6775_data *data = dev_get_drvdata(dev);
2601         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2602         int nr = sattr->index;
2603         unsigned long val;
2604         int err;
2605         int low, high;
2606
2607         err = kstrtoul(buf, 10, &val);
2608         if (err < 0)
2609                 return err;
2610
2611         high = fan_from_reg16(data->target_speed[nr],
2612                               data->fan_div[nr]) + val;
2613         low = fan_from_reg16(data->target_speed[nr],
2614                              data->fan_div[nr]) - val;
2615         if (low <= 0)
2616                 low = 1;
2617         if (high < low)
2618                 high = low;
2619
2620         val = (fan_to_reg(low, data->fan_div[nr]) -
2621                fan_to_reg(high, data->fan_div[nr])) / 2;
2622
2623         /* Limit tolerance as needed */
2624         val = clamp_val(val, 0, data->speed_tolerance_limit);
2625
2626         mutex_lock(&data->update_lock);
2627         data->target_speed_tolerance[nr] = val;
2628         pwm_update_registers(data, nr);
2629         mutex_unlock(&data->update_lock);
2630         return count;
2631 }
2632
2633 SENSOR_TEMPLATE_2(pwm, "pwm%d", S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2634 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", S_IWUSR | S_IRUGO, show_pwm_mode,
2635                 store_pwm_mode, 0);
2636 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", S_IWUSR | S_IRUGO, show_pwm_enable,
2637                 store_pwm_enable, 0);
2638 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", S_IWUSR | S_IRUGO,
2639                 show_pwm_temp_sel, store_pwm_temp_sel, 0);
2640 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", S_IWUSR | S_IRUGO,
2641                 show_target_temp, store_target_temp, 0);
2642 SENSOR_TEMPLATE(fan_target, "fan%d_target", S_IWUSR | S_IRUGO,
2643                 show_target_speed, store_target_speed, 0);
2644 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", S_IWUSR | S_IRUGO,
2645                 show_speed_tolerance, store_speed_tolerance, 0);
2646
2647 /* Smart Fan registers */
2648
2649 static ssize_t
2650 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2651 {
2652         struct nct6775_data *data = nct6775_update_device(dev);
2653         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2654         int nr = sattr->nr;
2655         int index = sattr->index;
2656
2657         return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2658 }
2659
2660 static ssize_t
2661 store_weight_temp(struct device *dev, struct device_attribute *attr,
2662                   const char *buf, size_t count)
2663 {
2664         struct nct6775_data *data = dev_get_drvdata(dev);
2665         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2666         int nr = sattr->nr;
2667         int index = sattr->index;
2668         unsigned long val;
2669         int err;
2670
2671         err = kstrtoul(buf, 10, &val);
2672         if (err < 0)
2673                 return err;
2674
2675         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2676
2677         mutex_lock(&data->update_lock);
2678         data->weight_temp[index][nr] = val;
2679         nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2680         mutex_unlock(&data->update_lock);
2681         return count;
2682 }
2683
2684 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", S_IWUSR | S_IRUGO,
2685                   show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
2686 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step",
2687                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 0);
2688 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol",
2689                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 1);
2690 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base",
2691                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 2);
2692 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step",
2693                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 5);
2694 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base",
2695                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 6);
2696
2697 static ssize_t
2698 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2699 {
2700         struct nct6775_data *data = nct6775_update_device(dev);
2701         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2702         int nr = sattr->nr;
2703         int index = sattr->index;
2704
2705         return sprintf(buf, "%d\n",
2706                        step_time_from_reg(data->fan_time[index][nr],
2707                                           data->pwm_mode[nr]));
2708 }
2709
2710 static ssize_t
2711 store_fan_time(struct device *dev, struct device_attribute *attr,
2712                const char *buf, size_t count)
2713 {
2714         struct nct6775_data *data = dev_get_drvdata(dev);
2715         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2716         int nr = sattr->nr;
2717         int index = sattr->index;
2718         unsigned long val;
2719         int err;
2720
2721         err = kstrtoul(buf, 10, &val);
2722         if (err < 0)
2723                 return err;
2724
2725         val = step_time_to_reg(val, data->pwm_mode[nr]);
2726         mutex_lock(&data->update_lock);
2727         data->fan_time[index][nr] = val;
2728         nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2729         mutex_unlock(&data->update_lock);
2730         return count;
2731 }
2732
2733 static ssize_t
2734 show_name(struct device *dev, struct device_attribute *attr, char *buf)
2735 {
2736         struct nct6775_data *data = dev_get_drvdata(dev);
2737
2738         return sprintf(buf, "%s\n", data->name);
2739 }
2740
2741 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
2742
2743 static ssize_t
2744 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2745 {
2746         struct nct6775_data *data = nct6775_update_device(dev);
2747         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2748
2749         return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2750 }
2751
2752 static ssize_t
2753 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2754                const char *buf, size_t count)
2755 {
2756         struct nct6775_data *data = dev_get_drvdata(dev);
2757         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2758         int nr = sattr->nr;
2759         int point = sattr->index;
2760         unsigned long val;
2761         int err;
2762         u8 reg;
2763
2764         err = kstrtoul(buf, 10, &val);
2765         if (err < 0)
2766                 return err;
2767         if (val > 255)
2768                 return -EINVAL;
2769
2770         if (point == data->auto_pwm_num) {
2771                 if (data->kind != nct6775 && !val)
2772                         return -EINVAL;
2773                 if (data->kind != nct6779 && val)
2774                         val = 0xff;
2775         }
2776
2777         mutex_lock(&data->update_lock);
2778         data->auto_pwm[nr][point] = val;
2779         if (point < data->auto_pwm_num) {
2780                 nct6775_write_value(data,
2781                                     NCT6775_AUTO_PWM(data, nr, point),
2782                                     data->auto_pwm[nr][point]);
2783         } else {
2784                 switch (data->kind) {
2785                 case nct6775:
2786                         /* disable if needed (pwm == 0) */
2787                         reg = nct6775_read_value(data,
2788                                                  NCT6775_REG_CRITICAL_ENAB[nr]);
2789                         if (val)
2790                                 reg |= 0x02;
2791                         else
2792                                 reg &= ~0x02;
2793                         nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
2794                                             reg);
2795                         break;
2796                 case nct6776:
2797                         break; /* always enabled, nothing to do */
2798                 case nct6106:
2799                 case nct6779:
2800                 case nct6791:
2801                         nct6775_write_value(data, data->REG_CRITICAL_PWM[nr],
2802                                             val);
2803                         reg = nct6775_read_value(data,
2804                                         data->REG_CRITICAL_PWM_ENABLE[nr]);
2805                         if (val == 255)
2806                                 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
2807                         else
2808                                 reg |= data->CRITICAL_PWM_ENABLE_MASK;
2809                         nct6775_write_value(data,
2810                                             data->REG_CRITICAL_PWM_ENABLE[nr],
2811                                             reg);
2812                         break;
2813                 }
2814         }
2815         mutex_unlock(&data->update_lock);
2816         return count;
2817 }
2818
2819 static ssize_t
2820 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
2821 {
2822         struct nct6775_data *data = nct6775_update_device(dev);
2823         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2824         int nr = sattr->nr;
2825         int point = sattr->index;
2826
2827         /*
2828          * We don't know for sure if the temperature is signed or unsigned.
2829          * Assume it is unsigned.
2830          */
2831         return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
2832 }
2833
2834 static ssize_t
2835 store_auto_temp(struct device *dev, struct device_attribute *attr,
2836                 const char *buf, size_t count)
2837 {
2838         struct nct6775_data *data = dev_get_drvdata(dev);
2839         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2840         int nr = sattr->nr;
2841         int point = sattr->index;
2842         unsigned long val;
2843         int err;
2844
2845         err = kstrtoul(buf, 10, &val);
2846         if (err)
2847                 return err;
2848         if (val > 255000)
2849                 return -EINVAL;
2850
2851         mutex_lock(&data->update_lock);
2852         data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
2853         if (point < data->auto_pwm_num) {
2854                 nct6775_write_value(data,
2855                                     NCT6775_AUTO_TEMP(data, nr, point),
2856                                     data->auto_temp[nr][point]);
2857         } else {
2858                 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
2859                                     data->auto_temp[nr][point]);
2860         }
2861         mutex_unlock(&data->update_lock);
2862         return count;
2863 }
2864
2865 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
2866                                       struct attribute *attr, int index)
2867 {
2868         struct device *dev = container_of(kobj, struct device, kobj);
2869         struct nct6775_data *data = dev_get_drvdata(dev);
2870         int pwm = index / 36;   /* pwm index */
2871         int nr = index % 36;    /* attribute index */
2872
2873         if (!(data->has_pwm & (1 << pwm)))
2874                 return 0;
2875
2876         if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
2877                 return 0;
2878         if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
2879                 return 0;
2880         if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
2881                 return 0;
2882
2883         if (nr >= 22 && nr <= 35) {             /* auto point */
2884                 int api = (nr - 22) / 2;        /* auto point index */
2885
2886                 if (api > data->auto_pwm_num)
2887                         return 0;
2888         }
2889         return attr->mode;
2890 }
2891
2892 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", S_IWUSR | S_IRUGO,
2893                   show_fan_time, store_fan_time, 0, 0);
2894 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", S_IWUSR | S_IRUGO,
2895                   show_fan_time, store_fan_time, 0, 1);
2896 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", S_IWUSR | S_IRUGO,
2897                   show_fan_time, store_fan_time, 0, 2);
2898 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", S_IWUSR | S_IRUGO, show_pwm,
2899                   store_pwm, 0, 1);
2900 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", S_IWUSR | S_IRUGO, show_pwm,
2901                   store_pwm, 0, 2);
2902 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", S_IWUSR | S_IRUGO,
2903                   show_temp_tolerance, store_temp_tolerance, 0, 0);
2904 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance",
2905                   S_IWUSR | S_IRUGO, show_temp_tolerance, store_temp_tolerance,
2906                   0, 1);
2907
2908 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2909                   0, 3);
2910
2911 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", S_IWUSR | S_IRUGO, show_pwm,
2912                   store_pwm, 0, 4);
2913
2914 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm",
2915                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 0);
2916 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp",
2917                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 0);
2918
2919 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm",
2920                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 1);
2921 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp",
2922                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 1);
2923
2924 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm",
2925                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 2);
2926 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp",
2927                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 2);
2928
2929 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm",
2930                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 3);
2931 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp",
2932                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 3);
2933
2934 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm",
2935                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 4);
2936 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp",
2937                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 4);
2938
2939 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm",
2940                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 5);
2941 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp",
2942                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 5);
2943
2944 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm",
2945                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 6);
2946 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp",
2947                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 6);
2948
2949 /*
2950  * nct6775_pwm_is_visible uses the index into the following array
2951  * to determine if attributes should be created or not.
2952  * Any change in order or content must be matched.
2953  */
2954 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
2955         &sensor_dev_template_pwm,
2956         &sensor_dev_template_pwm_mode,
2957         &sensor_dev_template_pwm_enable,
2958         &sensor_dev_template_pwm_temp_sel,
2959         &sensor_dev_template_pwm_temp_tolerance,
2960         &sensor_dev_template_pwm_crit_temp_tolerance,
2961         &sensor_dev_template_pwm_target_temp,
2962         &sensor_dev_template_fan_target,
2963         &sensor_dev_template_fan_tolerance,
2964         &sensor_dev_template_pwm_stop_time,
2965         &sensor_dev_template_pwm_step_up_time,
2966         &sensor_dev_template_pwm_step_down_time,
2967         &sensor_dev_template_pwm_start,
2968         &sensor_dev_template_pwm_floor,
2969         &sensor_dev_template_pwm_weight_temp_sel,
2970         &sensor_dev_template_pwm_weight_temp_step,
2971         &sensor_dev_template_pwm_weight_temp_step_tol,
2972         &sensor_dev_template_pwm_weight_temp_step_base,
2973         &sensor_dev_template_pwm_weight_duty_step,
2974         &sensor_dev_template_pwm_max,                   /* 19 */
2975         &sensor_dev_template_pwm_step,                  /* 20 */
2976         &sensor_dev_template_pwm_weight_duty_base,      /* 21 */
2977         &sensor_dev_template_pwm_auto_point1_pwm,       /* 22 */
2978         &sensor_dev_template_pwm_auto_point1_temp,
2979         &sensor_dev_template_pwm_auto_point2_pwm,
2980         &sensor_dev_template_pwm_auto_point2_temp,
2981         &sensor_dev_template_pwm_auto_point3_pwm,
2982         &sensor_dev_template_pwm_auto_point3_temp,
2983         &sensor_dev_template_pwm_auto_point4_pwm,
2984         &sensor_dev_template_pwm_auto_point4_temp,
2985         &sensor_dev_template_pwm_auto_point5_pwm,
2986         &sensor_dev_template_pwm_auto_point5_temp,
2987         &sensor_dev_template_pwm_auto_point6_pwm,
2988         &sensor_dev_template_pwm_auto_point6_temp,
2989         &sensor_dev_template_pwm_auto_point7_pwm,
2990         &sensor_dev_template_pwm_auto_point7_temp,      /* 35 */
2991
2992         NULL
2993 };
2994
2995 static struct sensor_template_group nct6775_pwm_template_group = {
2996         .templates = nct6775_attributes_pwm_template,
2997         .is_visible = nct6775_pwm_is_visible,
2998         .base = 1,
2999 };
3000
3001 static ssize_t
3002 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
3003 {
3004         struct nct6775_data *data = dev_get_drvdata(dev);
3005         return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
3006 }
3007
3008 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
3009
3010 /* Case open detection */
3011
3012 static ssize_t
3013 clear_caseopen(struct device *dev, struct device_attribute *attr,
3014                const char *buf, size_t count)
3015 {
3016         struct nct6775_data *data = dev_get_drvdata(dev);
3017         int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
3018         unsigned long val;
3019         u8 reg;
3020         int ret;
3021
3022         if (kstrtoul(buf, 10, &val) || val != 0)
3023                 return -EINVAL;
3024
3025         mutex_lock(&data->update_lock);
3026
3027         /*
3028          * Use CR registers to clear caseopen status.
3029          * The CR registers are the same for all chips, and not all chips
3030          * support clearing the caseopen status through "regular" registers.
3031          */
3032         ret = superio_enter(data->sioreg);
3033         if (ret) {
3034                 count = ret;
3035                 goto error;
3036         }
3037
3038         superio_select(data->sioreg, NCT6775_LD_ACPI);
3039         reg = superio_inb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
3040         reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3041         superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3042         reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3043         superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3044         superio_exit(data->sioreg);
3045
3046         data->valid = false;    /* Force cache refresh */
3047 error:
3048         mutex_unlock(&data->update_lock);
3049         return count;
3050 }
3051
3052 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
3053                           clear_caseopen, INTRUSION_ALARM_BASE);
3054 static SENSOR_DEVICE_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
3055                           clear_caseopen, INTRUSION_ALARM_BASE + 1);
3056 static SENSOR_DEVICE_ATTR(intrusion0_beep, S_IWUSR | S_IRUGO, show_beep,
3057                           store_beep, INTRUSION_ALARM_BASE);
3058 static SENSOR_DEVICE_ATTR(intrusion1_beep, S_IWUSR | S_IRUGO, show_beep,
3059                           store_beep, INTRUSION_ALARM_BASE + 1);
3060 static SENSOR_DEVICE_ATTR(beep_enable, S_IWUSR | S_IRUGO, show_beep,
3061                           store_beep, BEEP_ENABLE_BASE);
3062
3063 static umode_t nct6775_other_is_visible(struct kobject *kobj,
3064                                         struct attribute *attr, int index)
3065 {
3066         struct device *dev = container_of(kobj, struct device, kobj);
3067         struct nct6775_data *data = dev_get_drvdata(dev);
3068
3069         if (index == 1 && !data->have_vid)
3070                 return 0;
3071
3072         if (index == 2 || index == 3) {
3073                 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + index - 2] < 0)
3074                         return 0;
3075         }
3076
3077         if (index == 4 || index == 5) {
3078                 if (data->BEEP_BITS[INTRUSION_ALARM_BASE + index - 4] < 0)
3079                         return 0;
3080         }
3081
3082         return attr->mode;
3083 }
3084
3085 /*
3086  * nct6775_other_is_visible uses the index into the following array
3087  * to determine if attributes should be created or not.
3088  * Any change in order or content must be matched.
3089  */
3090 static struct attribute *nct6775_attributes_other[] = {
3091         &dev_attr_name.attr,
3092         &dev_attr_cpu0_vid.attr,                                /* 1 */
3093         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,        /* 2 */
3094         &sensor_dev_attr_intrusion1_alarm.dev_attr.attr,        /* 3 */
3095         &sensor_dev_attr_intrusion0_beep.dev_attr.attr,         /* 4 */
3096         &sensor_dev_attr_intrusion1_beep.dev_attr.attr,         /* 5 */
3097         &sensor_dev_attr_beep_enable.dev_attr.attr,             /* 6 */
3098
3099         NULL
3100 };
3101
3102 static const struct attribute_group nct6775_group_other = {
3103         .attrs = nct6775_attributes_other,
3104         .is_visible = nct6775_other_is_visible,
3105 };
3106
3107 /*
3108  * Driver and device management
3109  */
3110
3111 static void nct6775_device_remove_files(struct device *dev)
3112 {
3113         struct nct6775_data *data = dev_get_drvdata(dev);
3114
3115         if (data->group_pwm)
3116                 sysfs_remove_group(&dev->kobj, data->group_pwm);
3117         if (data->group_in)
3118                 sysfs_remove_group(&dev->kobj, data->group_in);
3119         if (data->group_fan)
3120                 sysfs_remove_group(&dev->kobj, data->group_fan);
3121         if (data->group_temp)
3122                 sysfs_remove_group(&dev->kobj, data->group_temp);
3123
3124         sysfs_remove_group(&dev->kobj, &nct6775_group_other);
3125 }
3126
3127 /* Get the monitoring functions started */
3128 static inline void nct6775_init_device(struct nct6775_data *data)
3129 {
3130         int i;
3131         u8 tmp, diode;
3132
3133         /* Start monitoring if needed */
3134         if (data->REG_CONFIG) {
3135                 tmp = nct6775_read_value(data, data->REG_CONFIG);
3136                 if (!(tmp & 0x01))
3137                         nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
3138         }
3139
3140         /* Enable temperature sensors if needed */
3141         for (i = 0; i < NUM_TEMP; i++) {
3142                 if (!(data->have_temp & (1 << i)))
3143                         continue;
3144                 if (!data->reg_temp_config[i])
3145                         continue;
3146                 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
3147                 if (tmp & 0x01)
3148                         nct6775_write_value(data, data->reg_temp_config[i],
3149                                             tmp & 0xfe);
3150         }
3151
3152         /* Enable VBAT monitoring if needed */
3153         tmp = nct6775_read_value(data, data->REG_VBAT);
3154         if (!(tmp & 0x01))
3155                 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
3156
3157         diode = nct6775_read_value(data, data->REG_DIODE);
3158
3159         for (i = 0; i < data->temp_fixed_num; i++) {
3160                 if (!(data->have_temp_fixed & (1 << i)))
3161                         continue;
3162                 if ((tmp & (data->DIODE_MASK << i)))    /* diode */
3163                         data->temp_type[i]
3164                           = 3 - ((diode >> i) & data->DIODE_MASK);
3165                 else                            /* thermistor */
3166                         data->temp_type[i] = 4;
3167         }
3168 }
3169
3170 static void
3171 nct6775_check_fan_inputs(struct nct6775_data *data)
3172 {
3173         bool fan3pin, fan4pin, fan4min, fan5pin, fan6pin;
3174         bool pwm3pin, pwm4pin, pwm5pin, pwm6pin;
3175         int sioreg = data->sioreg;
3176         int regval;
3177
3178         /* fan4 and fan5 share some pins with the GPIO and serial flash */
3179         if (data->kind == nct6775) {
3180                 regval = superio_inb(sioreg, 0x2c);
3181
3182                 fan3pin = regval & (1 << 6);
3183                 pwm3pin = regval & (1 << 7);
3184
3185                 /* On NCT6775, fan4 shares pins with the fdc interface */
3186                 fan4pin = !(superio_inb(sioreg, 0x2A) & 0x80);
3187                 fan4min = false;
3188                 fan5pin = false;
3189                 fan6pin = false;
3190                 pwm4pin = false;
3191                 pwm5pin = false;
3192                 pwm6pin = false;
3193         } else if (data->kind == nct6776) {
3194                 bool gpok = superio_inb(sioreg, 0x27) & 0x80;
3195
3196                 superio_select(sioreg, NCT6775_LD_HWM);
3197                 regval = superio_inb(sioreg, SIO_REG_ENABLE);
3198
3199                 if (regval & 0x80)
3200                         fan3pin = gpok;
3201                 else
3202                         fan3pin = !(superio_inb(sioreg, 0x24) & 0x40);
3203
3204                 if (regval & 0x40)
3205                         fan4pin = gpok;
3206                 else
3207                         fan4pin = superio_inb(sioreg, 0x1C) & 0x01;
3208
3209                 if (regval & 0x20)
3210                         fan5pin = gpok;
3211                 else
3212                         fan5pin = superio_inb(sioreg, 0x1C) & 0x02;
3213
3214                 fan4min = fan4pin;
3215                 fan6pin = false;
3216                 pwm3pin = fan3pin;
3217                 pwm4pin = false;
3218                 pwm5pin = false;
3219                 pwm6pin = false;
3220         } else if (data->kind == nct6106) {
3221                 regval = superio_inb(sioreg, 0x24);
3222                 fan3pin = !(regval & 0x80);
3223                 pwm3pin = regval & 0x08;
3224
3225                 fan4pin = false;
3226                 fan4min = false;
3227                 fan5pin = false;
3228                 fan6pin = false;
3229                 pwm4pin = false;
3230                 pwm5pin = false;
3231                 pwm6pin = false;
3232         } else {        /* NCT6779D or NCT6791D */
3233                 regval = superio_inb(sioreg, 0x1c);
3234
3235                 fan3pin = !(regval & (1 << 5));
3236                 fan4pin = !(regval & (1 << 6));
3237                 fan5pin = !(regval & (1 << 7));
3238
3239                 pwm3pin = !(regval & (1 << 0));
3240                 pwm4pin = !(regval & (1 << 1));
3241                 pwm5pin = !(regval & (1 << 2));
3242
3243                 fan4min = fan4pin;
3244
3245                 if (data->kind == nct6791) {
3246                         regval = superio_inb(sioreg, 0x2d);
3247                         fan6pin = (regval & (1 << 1));
3248                         pwm6pin = (regval & (1 << 0));
3249                 } else {        /* NCT6779D */
3250                         fan6pin = false;
3251                         pwm6pin = false;
3252                 }
3253         }
3254
3255         /* fan 1 and 2 (0x03) are always present */
3256         data->has_fan = 0x03 | (fan3pin << 2) | (fan4pin << 3) |
3257                 (fan5pin << 4) | (fan6pin << 5);
3258         data->has_fan_min = 0x03 | (fan3pin << 2) | (fan4min << 3) |
3259                 (fan5pin << 4);
3260         data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) |
3261                 (pwm5pin << 4) | (pwm6pin << 5);
3262 }
3263
3264 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
3265                              int *available, int *mask)
3266 {
3267         int i;
3268         u8 src;
3269
3270         for (i = 0; i < data->pwm_num && *available; i++) {
3271                 int index;
3272
3273                 if (!regp[i])
3274                         continue;
3275                 src = nct6775_read_value(data, regp[i]);
3276                 src &= 0x1f;
3277                 if (!src || (*mask & (1 << src)))
3278                         continue;
3279                 if (src >= data->temp_label_num ||
3280                     !strlen(data->temp_label[src]))
3281                         continue;
3282
3283                 index = __ffs(*available);
3284                 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3285                 *available &= ~(1 << index);
3286                 *mask |= 1 << src;
3287         }
3288 }
3289
3290 static int nct6775_probe(struct platform_device *pdev)
3291 {
3292         struct device *dev = &pdev->dev;
3293         struct nct6775_sio_data *sio_data = dev->platform_data;
3294         struct nct6775_data *data;
3295         struct resource *res;
3296         int i, s, err = 0;
3297         int src, mask, available;
3298         const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3299         const u16 *reg_temp_mon, *reg_temp_alternate, *reg_temp_crit;
3300         const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL;
3301         int num_reg_temp, num_reg_temp_mon;
3302         u8 cr2a;
3303         struct attribute_group *group;
3304
3305         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3306         if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3307                                  DRVNAME))
3308                 return -EBUSY;
3309
3310         data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3311                             GFP_KERNEL);
3312         if (!data)
3313                 return -ENOMEM;
3314
3315         data->kind = sio_data->kind;
3316         data->sioreg = sio_data->sioreg;
3317         data->addr = res->start;
3318         mutex_init(&data->update_lock);
3319         data->name = nct6775_device_names[data->kind];
3320         data->bank = 0xff;              /* Force initial bank selection */
3321         platform_set_drvdata(pdev, data);
3322
3323         switch (data->kind) {
3324         case nct6106:
3325                 data->in_num = 9;
3326                 data->pwm_num = 3;
3327                 data->auto_pwm_num = 4;
3328                 data->temp_fixed_num = 3;
3329                 data->num_temp_alarms = 6;
3330                 data->num_temp_beeps = 6;
3331
3332                 data->fan_from_reg = fan_from_reg13;
3333                 data->fan_from_reg_min = fan_from_reg13;
3334
3335                 data->temp_label = nct6776_temp_label;
3336                 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3337
3338                 data->REG_VBAT = NCT6106_REG_VBAT;
3339                 data->REG_DIODE = NCT6106_REG_DIODE;
3340                 data->DIODE_MASK = NCT6106_DIODE_MASK;
3341                 data->REG_VIN = NCT6106_REG_IN;
3342                 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3343                 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3344                 data->REG_TARGET = NCT6106_REG_TARGET;
3345                 data->REG_FAN = NCT6106_REG_FAN;
3346                 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
3347                 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
3348                 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
3349                 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
3350                 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
3351                 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
3352                 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
3353                 data->REG_PWM[0] = NCT6106_REG_PWM;
3354                 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
3355                 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
3356                 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3357                 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3358                 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3359                 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3360                 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3361                 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
3362                 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
3363                 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
3364                 data->REG_CRITICAL_TEMP_TOLERANCE
3365                   = NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
3366                 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
3367                 data->CRITICAL_PWM_ENABLE_MASK
3368                   = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3369                 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
3370                 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3371                 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3372                 data->REG_TEMP_SEL = NCT6106_REG_TEMP_SEL;
3373                 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3374                 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3375                 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3376                 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3377                 data->REG_ALARM = NCT6106_REG_ALARM;
3378                 data->ALARM_BITS = NCT6106_ALARM_BITS;
3379                 data->REG_BEEP = NCT6106_REG_BEEP;
3380                 data->BEEP_BITS = NCT6106_BEEP_BITS;
3381
3382                 reg_temp = NCT6106_REG_TEMP;
3383                 reg_temp_mon = NCT6106_REG_TEMP_MON;
3384                 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3385                 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON);
3386                 reg_temp_over = NCT6106_REG_TEMP_OVER;
3387                 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3388                 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3389                 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3390                 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3391                 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3392                 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3393
3394                 break;
3395         case nct6775:
3396                 data->in_num = 9;
3397                 data->pwm_num = 3;
3398                 data->auto_pwm_num = 6;
3399                 data->has_fan_div = true;
3400                 data->temp_fixed_num = 3;
3401                 data->num_temp_alarms = 3;
3402                 data->num_temp_beeps = 3;
3403
3404                 data->ALARM_BITS = NCT6775_ALARM_BITS;
3405                 data->BEEP_BITS = NCT6775_BEEP_BITS;
3406
3407                 data->fan_from_reg = fan_from_reg16;
3408                 data->fan_from_reg_min = fan_from_reg8;
3409                 data->target_temp_mask = 0x7f;
3410                 data->tolerance_mask = 0x0f;
3411                 data->speed_tolerance_limit = 15;
3412
3413                 data->temp_label = nct6775_temp_label;
3414                 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
3415
3416                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3417                 data->REG_VBAT = NCT6775_REG_VBAT;
3418                 data->REG_DIODE = NCT6775_REG_DIODE;
3419                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3420                 data->REG_VIN = NCT6775_REG_IN;
3421                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3422                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3423                 data->REG_TARGET = NCT6775_REG_TARGET;
3424                 data->REG_FAN = NCT6775_REG_FAN;
3425                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3426                 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3427                 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3428                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3429                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3430                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3431                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3432                 data->REG_PWM[0] = NCT6775_REG_PWM;
3433                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3434                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3435                 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3436                 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3437                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3438                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3439                 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3440                 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3441                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3442                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3443                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3444                 data->REG_CRITICAL_TEMP_TOLERANCE
3445                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3446                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3447                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3448                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3449                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3450                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3451                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3452                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3453                 data->REG_ALARM = NCT6775_REG_ALARM;
3454                 data->REG_BEEP = NCT6775_REG_BEEP;
3455
3456                 reg_temp = NCT6775_REG_TEMP;
3457                 reg_temp_mon = NCT6775_REG_TEMP_MON;
3458                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3459                 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3460                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3461                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3462                 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3463                 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3464                 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3465
3466                 break;
3467         case nct6776:
3468                 data->in_num = 9;
3469                 data->pwm_num = 3;
3470                 data->auto_pwm_num = 4;
3471                 data->has_fan_div = false;
3472                 data->temp_fixed_num = 3;
3473                 data->num_temp_alarms = 3;
3474                 data->num_temp_beeps = 6;
3475
3476                 data->ALARM_BITS = NCT6776_ALARM_BITS;
3477                 data->BEEP_BITS = NCT6776_BEEP_BITS;
3478
3479                 data->fan_from_reg = fan_from_reg13;
3480                 data->fan_from_reg_min = fan_from_reg13;
3481                 data->target_temp_mask = 0xff;
3482                 data->tolerance_mask = 0x07;
3483                 data->speed_tolerance_limit = 63;
3484
3485                 data->temp_label = nct6776_temp_label;
3486                 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3487
3488                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3489                 data->REG_VBAT = NCT6775_REG_VBAT;
3490                 data->REG_DIODE = NCT6775_REG_DIODE;
3491                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3492                 data->REG_VIN = NCT6775_REG_IN;
3493                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3494                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3495                 data->REG_TARGET = NCT6775_REG_TARGET;
3496                 data->REG_FAN = NCT6775_REG_FAN;
3497                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3498                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3499                 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3500                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3501                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3502                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3503                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3504                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3505                 data->REG_PWM[0] = NCT6775_REG_PWM;
3506                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3507                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3508                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3509                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3510                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3511                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3512                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3513                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3514                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3515                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3516                 data->REG_CRITICAL_TEMP_TOLERANCE
3517                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3518                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3519                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3520                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3521                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3522                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3523                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3524                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3525                 data->REG_ALARM = NCT6775_REG_ALARM;
3526                 data->REG_BEEP = NCT6776_REG_BEEP;
3527
3528                 reg_temp = NCT6775_REG_TEMP;
3529                 reg_temp_mon = NCT6775_REG_TEMP_MON;
3530                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3531                 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3532                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3533                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3534                 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3535                 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3536                 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3537
3538                 break;
3539         case nct6779:
3540                 data->in_num = 15;
3541                 data->pwm_num = 5;
3542                 data->auto_pwm_num = 4;
3543                 data->has_fan_div = false;
3544                 data->temp_fixed_num = 6;
3545                 data->num_temp_alarms = 2;
3546                 data->num_temp_beeps = 2;
3547
3548                 data->ALARM_BITS = NCT6779_ALARM_BITS;
3549                 data->BEEP_BITS = NCT6779_BEEP_BITS;
3550
3551                 data->fan_from_reg = fan_from_reg13;
3552                 data->fan_from_reg_min = fan_from_reg13;
3553                 data->target_temp_mask = 0xff;
3554                 data->tolerance_mask = 0x07;
3555                 data->speed_tolerance_limit = 63;
3556
3557                 data->temp_label = nct6779_temp_label;
3558                 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3559
3560                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3561                 data->REG_VBAT = NCT6775_REG_VBAT;
3562                 data->REG_DIODE = NCT6775_REG_DIODE;
3563                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3564                 data->REG_VIN = NCT6779_REG_IN;
3565                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3566                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3567                 data->REG_TARGET = NCT6775_REG_TARGET;
3568                 data->REG_FAN = NCT6779_REG_FAN;
3569                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3570                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3571                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3572                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3573                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3574                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3575                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3576                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3577                 data->REG_PWM[0] = NCT6775_REG_PWM;
3578                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3579                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3580                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3581                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3582                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3583                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3584                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3585                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3586                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3587                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3588                 data->REG_CRITICAL_TEMP_TOLERANCE
3589                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3590                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3591                 data->CRITICAL_PWM_ENABLE_MASK
3592                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3593                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3594                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3595                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3596                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3597                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3598                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3599                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3600                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3601                 data->REG_ALARM = NCT6779_REG_ALARM;
3602                 data->REG_BEEP = NCT6776_REG_BEEP;
3603
3604                 reg_temp = NCT6779_REG_TEMP;
3605                 reg_temp_mon = NCT6779_REG_TEMP_MON;
3606                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3607                 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3608                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3609                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3610                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3611                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3612                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3613
3614                 break;
3615         case nct6791:
3616                 data->in_num = 15;
3617                 data->pwm_num = 6;
3618                 data->auto_pwm_num = 4;
3619                 data->has_fan_div = false;
3620                 data->temp_fixed_num = 6;
3621                 data->num_temp_alarms = 2;
3622                 data->num_temp_beeps = 2;
3623
3624                 data->ALARM_BITS = NCT6791_ALARM_BITS;
3625                 data->BEEP_BITS = NCT6779_BEEP_BITS;
3626
3627                 data->fan_from_reg = fan_from_reg13;
3628                 data->fan_from_reg_min = fan_from_reg13;
3629                 data->target_temp_mask = 0xff;
3630                 data->tolerance_mask = 0x07;
3631                 data->speed_tolerance_limit = 63;
3632
3633                 data->temp_label = nct6779_temp_label;
3634                 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3635
3636                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3637                 data->REG_VBAT = NCT6775_REG_VBAT;
3638                 data->REG_DIODE = NCT6775_REG_DIODE;
3639                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3640                 data->REG_VIN = NCT6779_REG_IN;
3641                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3642                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3643                 data->REG_TARGET = NCT6775_REG_TARGET;
3644                 data->REG_FAN = NCT6779_REG_FAN;
3645                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3646                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3647                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3648                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3649                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3650                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3651                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3652                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3653                 data->REG_PWM[0] = NCT6775_REG_PWM;
3654                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3655                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3656                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3657                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3658                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3659                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3660                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3661                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3662                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3663                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3664                 data->REG_CRITICAL_TEMP_TOLERANCE
3665                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3666                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3667                 data->CRITICAL_PWM_ENABLE_MASK
3668                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3669                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3670                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3671                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3672                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3673                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3674                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3675                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3676                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3677                 data->REG_ALARM = NCT6791_REG_ALARM;
3678                 data->REG_BEEP = NCT6776_REG_BEEP;
3679
3680                 reg_temp = NCT6779_REG_TEMP;
3681                 reg_temp_mon = NCT6779_REG_TEMP_MON;
3682                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3683                 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3684                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3685                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3686                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3687                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3688                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3689
3690                 break;
3691         default:
3692                 return -ENODEV;
3693         }
3694         data->have_in = (1 << data->in_num) - 1;
3695         data->have_temp = 0;
3696
3697         /*
3698          * On some boards, not all available temperature sources are monitored,
3699          * even though some of the monitoring registers are unused.
3700          * Get list of unused monitoring registers, then detect if any fan
3701          * controls are configured to use unmonitored temperature sources.
3702          * If so, assign the unmonitored temperature sources to available
3703          * monitoring registers.
3704          */
3705         mask = 0;
3706         available = 0;
3707         for (i = 0; i < num_reg_temp; i++) {
3708                 if (reg_temp[i] == 0)
3709                         continue;
3710
3711                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3712                 if (!src || (mask & (1 << src)))
3713                         available |= 1 << i;
3714
3715                 mask |= 1 << src;
3716         }
3717
3718         /*
3719          * Now find unmonitored temperature registers and enable monitoring
3720          * if additional monitoring registers are available.
3721          */
3722         add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
3723         add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
3724
3725         mask = 0;
3726         s = NUM_TEMP_FIXED;     /* First dynamic temperature attribute */
3727         for (i = 0; i < num_reg_temp; i++) {
3728                 if (reg_temp[i] == 0)
3729                         continue;
3730
3731                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3732                 if (!src || (mask & (1 << src)))
3733                         continue;
3734
3735                 if (src >= data->temp_label_num ||
3736                     !strlen(data->temp_label[src])) {
3737                         dev_info(dev,
3738                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3739                                  src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
3740                         continue;
3741                 }
3742
3743                 mask |= 1 << src;
3744
3745                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3746                 if (src <= data->temp_fixed_num) {
3747                         data->have_temp |= 1 << (src - 1);
3748                         data->have_temp_fixed |= 1 << (src - 1);
3749                         data->reg_temp[0][src - 1] = reg_temp[i];
3750                         data->reg_temp[1][src - 1] = reg_temp_over[i];
3751                         data->reg_temp[2][src - 1] = reg_temp_hyst[i];
3752                         if (reg_temp_crit_h && reg_temp_crit_h[i])
3753                                 data->reg_temp[3][src - 1] = reg_temp_crit_h[i];
3754                         else if (reg_temp_crit[src - 1])
3755                                 data->reg_temp[3][src - 1]
3756                                   = reg_temp_crit[src - 1];
3757                         if (reg_temp_crit_l && reg_temp_crit_l[i])
3758                                 data->reg_temp[4][src - 1] = reg_temp_crit_l[i];
3759                         data->reg_temp_config[src - 1] = reg_temp_config[i];
3760                         data->temp_src[src - 1] = src;
3761                         continue;
3762                 }
3763
3764                 if (s >= NUM_TEMP)
3765                         continue;
3766
3767                 /* Use dynamic index for other sources */
3768                 data->have_temp |= 1 << s;
3769                 data->reg_temp[0][s] = reg_temp[i];
3770                 data->reg_temp[1][s] = reg_temp_over[i];
3771                 data->reg_temp[2][s] = reg_temp_hyst[i];
3772                 data->reg_temp_config[s] = reg_temp_config[i];
3773                 if (reg_temp_crit_h && reg_temp_crit_h[i])
3774                         data->reg_temp[3][s] = reg_temp_crit_h[i];
3775                 else if (reg_temp_crit[src - 1])
3776                         data->reg_temp[3][s] = reg_temp_crit[src - 1];
3777                 if (reg_temp_crit_l && reg_temp_crit_l[i])
3778                         data->reg_temp[4][s] = reg_temp_crit_l[i];
3779
3780                 data->temp_src[s] = src;
3781                 s++;
3782         }
3783
3784         /*
3785          * Repeat with temperatures used for fan control.
3786          * This set of registers does not support limits.
3787          */
3788         for (i = 0; i < num_reg_temp_mon; i++) {
3789                 if (reg_temp_mon[i] == 0)
3790                         continue;
3791
3792                 src = nct6775_read_value(data, data->REG_TEMP_SEL[i]) & 0x1f;
3793                 if (!src || (mask & (1 << src)))
3794                         continue;
3795
3796                 if (src >= data->temp_label_num ||
3797                     !strlen(data->temp_label[src])) {
3798                         dev_info(dev,
3799                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3800                                  src, i, data->REG_TEMP_SEL[i], reg_temp_mon[i]);
3801                         continue;
3802                 }
3803
3804                 mask |= 1 << src;
3805
3806                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3807                 if (src <= data->temp_fixed_num) {
3808                         if (data->have_temp & (1 << (src - 1)))
3809                                 continue;
3810                         data->have_temp |= 1 << (src - 1);
3811                         data->have_temp_fixed |= 1 << (src - 1);
3812                         data->reg_temp[0][src - 1] = reg_temp_mon[i];
3813                         data->temp_src[src - 1] = src;
3814                         continue;
3815                 }
3816
3817                 if (s >= NUM_TEMP)
3818                         continue;
3819
3820                 /* Use dynamic index for other sources */
3821                 data->have_temp |= 1 << s;
3822                 data->reg_temp[0][s] = reg_temp_mon[i];
3823                 data->temp_src[s] = src;
3824                 s++;
3825         }
3826
3827 #ifdef USE_ALTERNATE
3828         /*
3829          * Go through the list of alternate temp registers and enable
3830          * if possible.
3831          * The temperature is already monitored if the respective bit in <mask>
3832          * is set.
3833          */
3834         for (i = 0; i < data->temp_label_num - 1; i++) {
3835                 if (!reg_temp_alternate[i])
3836                         continue;
3837                 if (mask & (1 << (i + 1)))
3838                         continue;
3839                 if (i < data->temp_fixed_num) {
3840                         if (data->have_temp & (1 << i))
3841                                 continue;
3842                         data->have_temp |= 1 << i;
3843                         data->have_temp_fixed |= 1 << i;
3844                         data->reg_temp[0][i] = reg_temp_alternate[i];
3845                         if (i < num_reg_temp) {
3846                                 data->reg_temp[1][i] = reg_temp_over[i];
3847                                 data->reg_temp[2][i] = reg_temp_hyst[i];
3848                         }
3849                         data->temp_src[i] = i + 1;
3850                         continue;
3851                 }
3852
3853                 if (s >= NUM_TEMP)      /* Abort if no more space */
3854                         break;
3855
3856                 data->have_temp |= 1 << s;
3857                 data->reg_temp[0][s] = reg_temp_alternate[i];
3858                 data->temp_src[s] = i + 1;
3859                 s++;
3860         }
3861 #endif /* USE_ALTERNATE */
3862
3863         /* Initialize the chip */
3864         nct6775_init_device(data);
3865
3866         err = superio_enter(sio_data->sioreg);
3867         if (err)
3868                 return err;
3869
3870         cr2a = superio_inb(sio_data->sioreg, 0x2a);
3871         switch (data->kind) {
3872         case nct6775:
3873                 data->have_vid = (cr2a & 0x40);
3874                 break;
3875         case nct6776:
3876                 data->have_vid = (cr2a & 0x60) == 0x40;
3877                 break;
3878         case nct6106:
3879         case nct6779:
3880         case nct6791:
3881                 break;
3882         }
3883
3884         /*
3885          * Read VID value
3886          * We can get the VID input values directly at logical device D 0xe3.
3887          */
3888         if (data->have_vid) {
3889                 superio_select(sio_data->sioreg, NCT6775_LD_VID);
3890                 data->vid = superio_inb(sio_data->sioreg, 0xe3);
3891                 data->vrm = vid_which_vrm();
3892         }
3893
3894         if (fan_debounce) {
3895                 u8 tmp;
3896
3897                 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3898                 tmp = superio_inb(sio_data->sioreg,
3899                                   NCT6775_REG_CR_FAN_DEBOUNCE);
3900                 switch (data->kind) {
3901                 case nct6106:
3902                         tmp |= 0xe0;
3903                         break;
3904                 case nct6775:
3905                         tmp |= 0x1e;
3906                         break;
3907                 case nct6776:
3908                 case nct6779:
3909                         tmp |= 0x3e;
3910                         break;
3911                 case nct6791:
3912                         tmp |= 0x7e;
3913                         break;
3914                 }
3915                 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
3916                              tmp);
3917                 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
3918                          data->name);
3919         }
3920
3921         nct6775_check_fan_inputs(data);
3922
3923         superio_exit(sio_data->sioreg);
3924
3925         /* Read fan clock dividers immediately */
3926         nct6775_init_fan_common(dev, data);
3927
3928         /* Register sysfs hooks */
3929         group = nct6775_create_attr_group(dev, &nct6775_pwm_template_group,
3930                                           data->pwm_num);
3931         if (IS_ERR(group)) {
3932                 err = PTR_ERR(group);
3933                 goto exit_remove;
3934         }
3935         data->group_pwm = group;
3936
3937         group = nct6775_create_attr_group(dev, &nct6775_in_template_group,
3938                                           fls(data->have_in));
3939         if (IS_ERR(group)) {
3940                 err = PTR_ERR(group);
3941                 goto exit_remove;
3942         }
3943         data->group_in = group;
3944
3945         group = nct6775_create_attr_group(dev, &nct6775_fan_template_group,
3946                                           fls(data->has_fan));
3947         if (IS_ERR(group)) {
3948                 err = PTR_ERR(group);
3949                 goto exit_remove;
3950         }
3951         data->group_fan = group;
3952
3953         group = nct6775_create_attr_group(dev, &nct6775_temp_template_group,
3954                                           fls(data->have_temp));
3955         if (IS_ERR(group)) {
3956                 err = PTR_ERR(group);
3957                 goto exit_remove;
3958         }
3959         data->group_temp = group;
3960
3961         err = sysfs_create_group(&dev->kobj, &nct6775_group_other);
3962         if (err)
3963                 goto exit_remove;
3964
3965         data->hwmon_dev = hwmon_device_register(dev);
3966         if (IS_ERR(data->hwmon_dev)) {
3967                 err = PTR_ERR(data->hwmon_dev);
3968                 goto exit_remove;
3969         }
3970
3971         return 0;
3972
3973 exit_remove:
3974         nct6775_device_remove_files(dev);
3975         return err;
3976 }
3977
3978 static int nct6775_remove(struct platform_device *pdev)
3979 {
3980         struct nct6775_data *data = platform_get_drvdata(pdev);
3981
3982         hwmon_device_unregister(data->hwmon_dev);
3983         nct6775_device_remove_files(&pdev->dev);
3984
3985         return 0;
3986 }
3987
3988 #ifdef CONFIG_PM
3989 static int nct6775_suspend(struct device *dev)
3990 {
3991         struct nct6775_data *data = nct6775_update_device(dev);
3992
3993         mutex_lock(&data->update_lock);
3994         data->vbat = nct6775_read_value(data, data->REG_VBAT);
3995         if (data->kind == nct6775) {
3996                 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
3997                 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
3998         }
3999         mutex_unlock(&data->update_lock);
4000
4001         return 0;
4002 }
4003
4004 static int nct6775_resume(struct device *dev)
4005 {
4006         struct nct6775_data *data = dev_get_drvdata(dev);
4007         int i, j;
4008
4009         mutex_lock(&data->update_lock);
4010         data->bank = 0xff;              /* Force initial bank selection */
4011
4012         /* Restore limits */
4013         for (i = 0; i < data->in_num; i++) {
4014                 if (!(data->have_in & (1 << i)))
4015                         continue;
4016
4017                 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
4018                                     data->in[i][1]);
4019                 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
4020                                     data->in[i][2]);
4021         }
4022
4023         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
4024                 if (!(data->has_fan_min & (1 << i)))
4025                         continue;
4026
4027                 nct6775_write_value(data, data->REG_FAN_MIN[i],
4028                                     data->fan_min[i]);
4029         }
4030
4031         for (i = 0; i < NUM_TEMP; i++) {
4032                 if (!(data->have_temp & (1 << i)))
4033                         continue;
4034
4035                 for (j = 1; j < ARRAY_SIZE(data->reg_temp); j++)
4036                         if (data->reg_temp[j][i])
4037                                 nct6775_write_temp(data, data->reg_temp[j][i],
4038                                                    data->temp[j][i]);
4039         }
4040
4041         /* Restore other settings */
4042         nct6775_write_value(data, data->REG_VBAT, data->vbat);
4043         if (data->kind == nct6775) {
4044                 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
4045                 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
4046         }
4047
4048         /* Force re-reading all values */
4049         data->valid = false;
4050         mutex_unlock(&data->update_lock);
4051
4052         return 0;
4053 }
4054
4055 static const struct dev_pm_ops nct6775_dev_pm_ops = {
4056         .suspend = nct6775_suspend,
4057         .resume = nct6775_resume,
4058 };
4059
4060 #define NCT6775_DEV_PM_OPS      (&nct6775_dev_pm_ops)
4061 #else
4062 #define NCT6775_DEV_PM_OPS      NULL
4063 #endif /* CONFIG_PM */
4064
4065 static struct platform_driver nct6775_driver = {
4066         .driver = {
4067                 .owner  = THIS_MODULE,
4068                 .name   = DRVNAME,
4069                 .pm     = NCT6775_DEV_PM_OPS,
4070         },
4071         .probe          = nct6775_probe,
4072         .remove         = nct6775_remove,
4073 };
4074
4075 static const char * const nct6775_sio_names[] __initconst = {
4076         "NCT6106D",
4077         "NCT6775F",
4078         "NCT6776D/F",
4079         "NCT6779D",
4080         "NCT6791D",
4081 };
4082
4083 /* nct6775_find() looks for a '627 in the Super-I/O config space */
4084 static int __init nct6775_find(int sioaddr, struct nct6775_sio_data *sio_data)
4085 {
4086         u16 val;
4087         int err;
4088         int addr;
4089
4090         err = superio_enter(sioaddr);
4091         if (err)
4092                 return err;
4093
4094         if (force_id)
4095                 val = force_id;
4096         else
4097                 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
4098                     | superio_inb(sioaddr, SIO_REG_DEVID + 1);
4099         switch (val & SIO_ID_MASK) {
4100         case SIO_NCT6106_ID:
4101                 sio_data->kind = nct6106;
4102                 break;
4103         case SIO_NCT6775_ID:
4104                 sio_data->kind = nct6775;
4105                 break;
4106         case SIO_NCT6776_ID:
4107                 sio_data->kind = nct6776;
4108                 break;
4109         case SIO_NCT6779_ID:
4110                 sio_data->kind = nct6779;
4111                 break;
4112         case SIO_NCT6791_ID:
4113                 sio_data->kind = nct6791;
4114                 break;
4115         default:
4116                 if (val != 0xffff)
4117                         pr_debug("unsupported chip ID: 0x%04x\n", val);
4118                 superio_exit(sioaddr);
4119                 return -ENODEV;
4120         }
4121
4122         /* We have a known chip, find the HWM I/O address */
4123         superio_select(sioaddr, NCT6775_LD_HWM);
4124         val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
4125             | superio_inb(sioaddr, SIO_REG_ADDR + 1);
4126         addr = val & IOREGION_ALIGNMENT;
4127         if (addr == 0) {
4128                 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
4129                 superio_exit(sioaddr);
4130                 return -ENODEV;
4131         }
4132
4133         /* Activate logical device if needed */
4134         val = superio_inb(sioaddr, SIO_REG_ENABLE);
4135         if (!(val & 0x01)) {
4136                 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
4137                 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
4138         }
4139         if (sio_data->kind == nct6791) {
4140                 val = superio_inb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE);
4141                 if (val & 0x10) {
4142                         pr_info("Enabling hardware monitor logical device mappings.\n");
4143                         superio_outb(sioaddr,
4144                                      NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE,
4145                                      val & ~0x10);
4146                 }
4147         }
4148
4149         superio_exit(sioaddr);
4150         pr_info("Found %s or compatible chip at %#x:%#x\n",
4151                 nct6775_sio_names[sio_data->kind], sioaddr, addr);
4152         sio_data->sioreg = sioaddr;
4153
4154         return addr;
4155 }
4156
4157 /*
4158  * when Super-I/O functions move to a separate file, the Super-I/O
4159  * bus will manage the lifetime of the device and this module will only keep
4160  * track of the nct6775 driver. But since we platform_device_alloc(), we
4161  * must keep track of the device
4162  */
4163 static struct platform_device *pdev[2];
4164
4165 static int __init sensors_nct6775_init(void)
4166 {
4167         int i, err;
4168         bool found = false;
4169         int address;
4170         struct resource res;
4171         struct nct6775_sio_data sio_data;
4172         int sioaddr[2] = { 0x2e, 0x4e };
4173
4174         err = platform_driver_register(&nct6775_driver);
4175         if (err)
4176                 return err;
4177
4178         /*
4179          * initialize sio_data->kind and sio_data->sioreg.
4180          *
4181          * when Super-I/O functions move to a separate file, the Super-I/O
4182          * driver will probe 0x2e and 0x4e and auto-detect the presence of a
4183          * nct6775 hardware monitor, and call probe()
4184          */
4185         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4186                 address = nct6775_find(sioaddr[i], &sio_data);
4187                 if (address <= 0)
4188                         continue;
4189
4190                 found = true;
4191
4192                 pdev[i] = platform_device_alloc(DRVNAME, address);
4193                 if (!pdev[i]) {
4194                         err = -ENOMEM;
4195                         goto exit_device_put;
4196                 }
4197
4198                 err = platform_device_add_data(pdev[i], &sio_data,
4199                                                sizeof(struct nct6775_sio_data));
4200                 if (err)
4201                         goto exit_device_put;
4202
4203                 memset(&res, 0, sizeof(res));
4204                 res.name = DRVNAME;
4205                 res.start = address + IOREGION_OFFSET;
4206                 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
4207                 res.flags = IORESOURCE_IO;
4208
4209                 err = acpi_check_resource_conflict(&res);
4210                 if (err) {
4211                         platform_device_put(pdev[i]);
4212                         pdev[i] = NULL;
4213                         continue;
4214                 }
4215
4216                 err = platform_device_add_resources(pdev[i], &res, 1);
4217                 if (err)
4218                         goto exit_device_put;
4219
4220                 /* platform_device_add calls probe() */
4221                 err = platform_device_add(pdev[i]);
4222                 if (err)
4223                         goto exit_device_put;
4224         }
4225         if (!found) {
4226                 err = -ENODEV;
4227                 goto exit_unregister;
4228         }
4229
4230         return 0;
4231
4232 exit_device_put:
4233         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4234                 if (pdev[i])
4235                         platform_device_put(pdev[i]);
4236         }
4237 exit_unregister:
4238         platform_driver_unregister(&nct6775_driver);
4239         return err;
4240 }
4241
4242 static void __exit sensors_nct6775_exit(void)
4243 {
4244         int i;
4245
4246         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4247                 if (pdev[i])
4248                         platform_device_unregister(pdev[i]);
4249         }
4250         platform_driver_unregister(&nct6775_driver);
4251 }
4252
4253 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4254 MODULE_DESCRIPTION("NCT6775F/NCT6776F/NCT6779D driver");
4255 MODULE_LICENSE("GPL");
4256
4257 module_init(sensors_nct6775_init);
4258 module_exit(sensors_nct6775_exit);