git.sur5r.net Git - groeck-nct6775/blob - nct6775.c

   1 /*
   2  * nct6775 - Driver for the hardware monitoring functionality of
   3  *             Nuvoton NCT677x Super-I/O chips
   4  *
   5  * Copyright (C) 2012  Guenter Roeck <linux@roeck-us.net>
   6  *
   7  * Derived from w83627ehf driver
   8  * Copyright (C) 2005-2012  Jean Delvare <khali@linux-fr.org>
   9  * Copyright (C) 2006  Yuan Mu (Winbond),
  10  *                     Rudolf Marek <r.marek@assembler.cz>
  11  *                     David Hubbard <david.c.hubbard@gmail.com>
  12  *                     Daniel J Blueman <daniel.blueman@gmail.com>
  13  * Copyright (C) 2010  Sheng-Yuan Huang (Nuvoton) (PS00)
  14  *
  15  * Shamelessly ripped from the w83627hf driver
  16  * Copyright (C) 2003  Mark Studebaker
  17  *
  18  * This program is free software; you can redistribute it and/or modify
  19  * it under the terms of the GNU General Public License as published by
  20  * the Free Software Foundation; either version 2 of the License, or
  21  * (at your option) any later version.
  22  *
  23  * This program is distributed in the hope that it will be useful,
  24  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26  * GNU General Public License for more details.
  27  *
  28  * You should have received a copy of the GNU General Public License
  29  * along with this program; if not, write to the Free Software
  30  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  31  *
  32  *
  33  * Supports the following chips:
  34  *
  35  * Chip        #vin    #fan    #pwm    #temp  chip IDs       man ID
  36  * nct6106d     9      3       3       6+3    0xc450 0xc1    0x5ca3
  37  * nct6775f     9      4       3       6+3    0xb470 0xc1    0x5ca3
  38  * nct6776f     9      5       3       6+3    0xc330 0xc1    0x5ca3
  39  * nct6779d    15      5       5       2+6    0xc560 0xc1    0x5ca3
  40  *
  41  * #temp lists the number of monitored temperature sources (first value) plus
  42  * the number of directly connectable temperature sensors (second value).
  43  */
  44
  45 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  46
  47 #include <linux/module.h>
  48 #include <linux/init.h>
  49 #include <linux/slab.h>
  50 #include <linux/jiffies.h>
  51 #include <linux/platform_device.h>
  52 #include <linux/hwmon.h>
  53 #include <linux/hwmon-sysfs.h>
  54 #include <linux/hwmon-vid.h>
  55 #include <linux/err.h>
  56 #include <linux/mutex.h>
  57 #include <linux/acpi.h>
  58 #include <linux/io.h>
  59 #include "lm75.h"
  60 #include "compat.h"
  61
  62 #define USE_ALTERNATE
  63
  64 enum kinds { nct6106, nct6775, nct6776, nct6779 };
  65
  66 /* used to set data->name = nct6775_device_names[data->sio_kind] */
  67 static const char * const nct6775_device_names[] = {
  68         "nct6106",
  69         "nct6775",
  70         "nct6776",
  71         "nct6779",
  72 };
  73
  74 static unsigned short force_id;
  75 module_param(force_id, ushort, 0);
  76 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  77
  78 static unsigned short fan_debounce;
  79 module_param(fan_debounce, ushort, 0);
  80 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
  81
  82 #define DRVNAME "nct6775"
  83
  84 /*
  85  * Super-I/O constants and functions
  86  */
  87
  88 #define NCT6775_LD_ACPI         0x0a
  89 #define NCT6775_LD_HWM          0x0b
  90 #define NCT6775_LD_VID          0x0d
  91
  92 #define SIO_REG_LDSEL           0x07    /* Logical device select */
  93 #define SIO_REG_DEVID           0x20    /* Device ID (2 bytes) */
  94 #define SIO_REG_ENABLE          0x30    /* Logical device enable */
  95 #define SIO_REG_ADDR            0x60    /* Logical device address (2 bytes) */
  96
  97 #define SIO_NCT6106_ID          0xc450
  98 #define SIO_NCT6775_ID          0xb470
  99 #define SIO_NCT6776_ID          0xc330
 100 #define SIO_NCT6779_ID          0xc560
 101 #define SIO_ID_MASK             0xFFF0
 102
 103 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
 104
 105 static inline void
 106 superio_outb(int ioreg, int reg, int val)
 107 {
 108         outb(reg, ioreg);
 109         outb(val, ioreg + 1);
 110 }
 111
 112 static inline int
 113 superio_inb(int ioreg, int reg)
 114 {
 115         outb(reg, ioreg);
 116         return inb(ioreg + 1);
 117 }
 118
 119 static inline void
 120 superio_select(int ioreg, int ld)
 121 {
 122         outb(SIO_REG_LDSEL, ioreg);
 123         outb(ld, ioreg + 1);
 124 }
 125
 126 static inline int
 127 superio_enter(int ioreg)
 128 {
 129         /*
 130          * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
 131          */
 132         if (!request_muxed_region(ioreg, 2, DRVNAME))
 133                 return -EBUSY;
 134
 135         outb(0x87, ioreg);
 136         outb(0x87, ioreg);
 137
 138         return 0;
 139 }
 140
 141 static inline void
 142 superio_exit(int ioreg)
 143 {
 144         outb(0xaa, ioreg);
 145         outb(0x02, ioreg);
 146         outb(0x02, ioreg + 1);
 147         release_region(ioreg, 2);
 148 }
 149
 150 /*
 151  * ISA constants
 152  */
 153
 154 #define IOREGION_ALIGNMENT      (~7)
 155 #define IOREGION_OFFSET         5
 156 #define IOREGION_LENGTH         2
 157 #define ADDR_REG_OFFSET         0
 158 #define DATA_REG_OFFSET         1
 159
 160 #define NCT6775_REG_BANK        0x4E
 161 #define NCT6775_REG_CONFIG      0x40
 162
 163 /*
 164  * Not currently used:
 165  * REG_MAN_ID has the value 0x5ca3 for all supported chips.
 166  * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
 167  * REG_MAN_ID is at port 0x4f
 168  * REG_CHIP_ID is at port 0x58
 169  */
 170
 171 #define NUM_TEMP        10      /* Max number of temp attribute sets w/ limits*/
 172 #define NUM_TEMP_FIXED  6       /* Max number of fixed temp attribute sets */
 173
 174 #define NUM_REG_ALARM   7       /* Max number of alarm registers */
 175 #define NUM_REG_BEEP    5       /* Max number of beep registers */
 176
 177 /* Common and NCT6775 specific data */
 178
 179 /* Voltage min/max registers for nr=7..14 are in bank 5 */
 180
 181 static const u16 NCT6775_REG_IN_MAX[] = {
 182         0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
 183         0x55c, 0x55e, 0x560, 0x562 };
 184 static const u16 NCT6775_REG_IN_MIN[] = {
 185         0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
 186         0x55d, 0x55f, 0x561, 0x563 };
 187 static const u16 NCT6775_REG_IN[] = {
 188         0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
 189 };
 190
 191 #define NCT6775_REG_VBAT                0x5D
 192 #define NCT6775_REG_DIODE               0x5E
 193 #define NCT6775_DIODE_MASK              0x02
 194
 195 #define NCT6775_REG_FANDIV1             0x506
 196 #define NCT6775_REG_FANDIV2             0x507
 197
 198 #define NCT6775_REG_CR_FAN_DEBOUNCE     0xf0
 199
 200 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
 201
 202 /* 0..15 voltages, 16..23 fans, 24..29 temperatures, 30..31 intrusion */
 203
 204 static const s8 NCT6775_ALARM_BITS[] = {
 205         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 206         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 207         -1,                             /* unused */
 208         6, 7, 11, -1, -1,               /* fan1..fan5 */
 209         -1, -1, -1,                     /* unused */
 210         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 211         12, -1 };                       /* intrusion0, intrusion1 */
 212
 213 #define FAN_ALARM_BASE          16
 214 #define TEMP_ALARM_BASE         24
 215 #define INTRUSION_ALARM_BASE    30
 216
 217 static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e };
 218
 219 /*
 220  * 0..14 voltages, 15 global beep enable, 16..23 fans, 24..29 temperatures,
 221  * 30..31 intrusion
 222  */
 223 static const s8 NCT6775_BEEP_BITS[] = {
 224         0, 1, 2, 3, 8, 9, 10, 16,       /* in0.. in7 */
 225         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 226         21,                             /* global beep enable */
 227         6, 7, 11, 28, -1,               /* fan1..fan5 */
 228         -1, -1, -1,                     /* unused */
 229         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 230         12, -1 };                       /* intrusion0, intrusion1 */
 231
 232 #define BEEP_ENABLE_BASE                15
 233
 234 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
 235 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
 236
 237 /* DC or PWM output fan configuration */
 238 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
 239 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
 240
 241 /* Advanced Fan control, some values are common for all fans */
 242
 243 static const u16 NCT6775_REG_TARGET[] = { 0x101, 0x201, 0x301, 0x801, 0x901 };
 244 static const u16 NCT6775_REG_FAN_MODE[] = { 0x102, 0x202, 0x302, 0x802, 0x902 };
 245 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
 246         0x103, 0x203, 0x303, 0x803, 0x903 };
 247 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
 248         0x104, 0x204, 0x304, 0x804, 0x904 };
 249 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
 250         0x105, 0x205, 0x305, 0x805, 0x905 };
 251 static const u16 NCT6775_REG_FAN_START_OUTPUT[]
 252         = { 0x106, 0x206, 0x306, 0x806, 0x906 };
 253 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
 254 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
 255
 256 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
 257         0x107, 0x207, 0x307, 0x807, 0x907 };
 258 static const u16 NCT6775_REG_PWM[] = { 0x109, 0x209, 0x309, 0x809, 0x909 };
 259 static const u16 NCT6775_REG_PWM_READ[] = { 0x01, 0x03, 0x11, 0x13, 0x15 };
 260
 261 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
 262 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
 263 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
 264 static const u16 NCT6775_FAN_PULSE_SHIFT[] = { 0, 0, 0, 0, 0 };
 265
 266 static const u16 NCT6775_REG_TEMP[] = {
 267         0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
 268
 269 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 270         0, 0x152, 0x252, 0x628, 0x629, 0x62A };
 271 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 272         0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
 273 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 274         0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
 275
 276 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 277         0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
 278
 279 static const u16 NCT6775_REG_TEMP_SEL[] = {
 280         0x100, 0x200, 0x300, 0x800, 0x900 };
 281
 282 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
 283         0x139, 0x239, 0x339, 0x839, 0x939 };
 284 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
 285         0x13a, 0x23a, 0x33a, 0x83a, 0x93a };
 286 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
 287         0x13b, 0x23b, 0x33b, 0x83b, 0x93b };
 288 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
 289         0x13c, 0x23c, 0x33c, 0x83c, 0x93c };
 290 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
 291         0x13d, 0x23d, 0x33d, 0x83d, 0x93d };
 292
 293 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
 294
 295 static const u16 NCT6775_REG_AUTO_TEMP[] = {
 296         0x121, 0x221, 0x321, 0x821, 0x921 };
 297 static const u16 NCT6775_REG_AUTO_PWM[] = {
 298         0x127, 0x227, 0x327, 0x827, 0x927 };
 299
 300 #define NCT6775_AUTO_TEMP(data, nr, p)  ((data)->REG_AUTO_TEMP[nr] + (p))
 301 #define NCT6775_AUTO_PWM(data, nr, p)   ((data)->REG_AUTO_PWM[nr] + (p))
 302
 303 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
 304
 305 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
 306         0x135, 0x235, 0x335, 0x835, 0x935 };
 307 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
 308         0x138, 0x238, 0x338, 0x838, 0x938 };
 309
 310 static const char *const nct6775_temp_label[] = {
 311         "",
 312         "SYSTIN",
 313         "CPUTIN",
 314         "AUXTIN",
 315         "AMD SB-TSI",
 316         "PECI Agent 0",
 317         "PECI Agent 1",
 318         "PECI Agent 2",
 319         "PECI Agent 3",
 320         "PECI Agent 4",
 321         "PECI Agent 5",
 322         "PECI Agent 6",
 323         "PECI Agent 7",
 324         "PCH_CHIP_CPU_MAX_TEMP",
 325         "PCH_CHIP_TEMP",
 326         "PCH_CPU_TEMP",
 327         "PCH_MCH_TEMP",
 328         "PCH_DIM0_TEMP",
 329         "PCH_DIM1_TEMP",
 330         "PCH_DIM2_TEMP",
 331         "PCH_DIM3_TEMP"
 332 };
 333
 334 static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
 335         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
 336
 337 static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
 338         = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
 339             0xa07 };
 340
 341 /* NCT6776 specific data */
 342
 343 static const s8 NCT6776_ALARM_BITS[] = {
 344         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 345         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 346         -1,                             /* unused */
 347         6, 7, 11, 10, 23,               /* fan1..fan5 */
 348         -1, -1, -1,                     /* unused */
 349         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 350         12, 9 };                        /* intrusion0, intrusion1 */
 351
 352 static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5 };
 353
 354 static const s8 NCT6776_BEEP_BITS[] = {
 355         0, 1, 2, 3, 4, 5, 6, 7,         /* in0.. in7 */
 356         8, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 357         24,                             /* global beep enable */
 358         25, 26, 27, 28, 29,             /* fan1..fan5 */
 359         -1, -1, -1,                     /* unused */
 360         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 361         30, 31 };                       /* intrusion0, intrusion1 */
 362
 363 static const u16 NCT6776_REG_TOLERANCE_H[] = {
 364         0x10c, 0x20c, 0x30c, 0x80c, 0x90c };
 365
 366 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0 };
 367 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0 };
 368
 369 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
 370 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
 371
 372 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
 373         0x13e, 0x23e, 0x33e, 0x83e, 0x93e };
 374
 375 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 376         0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
 377
 378 static const char *const nct6776_temp_label[] = {
 379         "",
 380         "SYSTIN",
 381         "CPUTIN",
 382         "AUXTIN",
 383         "SMBUSMASTER 0",
 384         "SMBUSMASTER 1",
 385         "SMBUSMASTER 2",
 386         "SMBUSMASTER 3",
 387         "SMBUSMASTER 4",
 388         "SMBUSMASTER 5",
 389         "SMBUSMASTER 6",
 390         "SMBUSMASTER 7",
 391         "PECI Agent 0",
 392         "PECI Agent 1",
 393         "PCH_CHIP_CPU_MAX_TEMP",
 394         "PCH_CHIP_TEMP",
 395         "PCH_CPU_TEMP",
 396         "PCH_MCH_TEMP",
 397         "PCH_DIM0_TEMP",
 398         "PCH_DIM1_TEMP",
 399         "PCH_DIM2_TEMP",
 400         "PCH_DIM3_TEMP",
 401         "BYTE_TEMP"
 402 };
 403
 404 static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
 405         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
 406
 407 static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
 408         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
 409
 410 /* NCT6779 specific data */
 411
 412 static const u16 NCT6779_REG_IN[] = {
 413         0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
 414         0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
 415
 416 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
 417         0x459, 0x45A, 0x45B, 0x568 };
 418
 419 static const s8 NCT6779_ALARM_BITS[] = {
 420         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 421         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 422         -1,                             /* unused */
 423         6, 7, 11, 10, 23,               /* fan1..fan5 */
 424         -1, -1, -1,                     /* unused */
 425         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 426         12, 9 };                        /* intrusion0, intrusion1 */
 427
 428 static const s8 NCT6779_BEEP_BITS[] = {
 429         0, 1, 2, 3, 4, 5, 6, 7,         /* in0.. in7 */
 430         8, 9, 10, 11, 12, 13, 14,       /* in8..in14 */
 431         24,                             /* global beep enable */
 432         25, 26, 27, 28, 29,             /* fan1..fan5 */
 433         -1, -1, -1,                     /* unused */
 434         16, 17, -1, -1, -1, -1,         /* temp1..temp6 */
 435         30, 31 };                       /* intrusion0, intrusion1 */
 436
 437 static const u16 NCT6779_REG_FAN[] = { 0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8 };
 438 static const u16 NCT6779_REG_FAN_PULSES[] = {
 439         0x644, 0x645, 0x646, 0x647, 0x648 };
 440
 441 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
 442         0x136, 0x236, 0x336, 0x836, 0x936 };
 443 #define NCT6779_CRITICAL_PWM_ENABLE_MASK        0x01
 444 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
 445         0x137, 0x237, 0x337, 0x837, 0x937 };
 446
 447 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
 448 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 449         0x18, 0x152 };
 450 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 451         0x3a, 0x153 };
 452 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 453         0x39, 0x155 };
 454
 455 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
 456         0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
 457
 458 static const char *const nct6779_temp_label[] = {
 459         "",
 460         "SYSTIN",
 461         "CPUTIN",
 462         "AUXTIN0",
 463         "AUXTIN1",
 464         "AUXTIN2",
 465         "AUXTIN3",
 466         "",
 467         "SMBUSMASTER 0",
 468         "SMBUSMASTER 1",
 469         "SMBUSMASTER 2",
 470         "SMBUSMASTER 3",
 471         "SMBUSMASTER 4",
 472         "SMBUSMASTER 5",
 473         "SMBUSMASTER 6",
 474         "SMBUSMASTER 7",
 475         "PECI Agent 0",
 476         "PECI Agent 1",
 477         "PCH_CHIP_CPU_MAX_TEMP",
 478         "PCH_CHIP_TEMP",
 479         "PCH_CPU_TEMP",
 480         "PCH_MCH_TEMP",
 481         "PCH_DIM0_TEMP",
 482         "PCH_DIM1_TEMP",
 483         "PCH_DIM2_TEMP",
 484         "PCH_DIM3_TEMP",
 485         "BYTE_TEMP"
 486 };
 487
 488 static const u16 NCT6779_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6779_temp_label) - 1]
 489         = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
 490             0, 0, 0, 0, 0, 0, 0, 0,
 491             0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
 492             0x408, 0 };
 493
 494 static const u16 NCT6779_REG_TEMP_CRIT[ARRAY_SIZE(nct6779_temp_label) - 1]
 495         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
 496
 497 /* NCT6102D/NCT6106D specific data */
 498
 499 #define NCT6106_REG_VBAT        0x318
 500 #define NCT6106_REG_DIODE       0x319
 501 #define NCT6106_DIODE_MASK      0x01
 502
 503 static const u16 NCT6106_REG_IN_MAX[] = {
 504         0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
 505 static const u16 NCT6106_REG_IN_MIN[] = {
 506         0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
 507 static const u16 NCT6106_REG_IN[] = {
 508         0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
 509
 510 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
 511 static const u16 NCT6106_REG_TEMP_HYST[] = {
 512         0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
 513 static const u16 NCT6106_REG_TEMP_OVER[] = {
 514         0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
 515 static const u16 NCT6106_REG_TEMP_CRIT_L[] = {
 516         0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
 517 static const u16 NCT6106_REG_TEMP_CRIT_H[] = {
 518         0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
 519 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
 520 static const u16 NCT6106_REG_TEMP_CONFIG[] = {
 521         0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
 522
 523 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
 524 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
 525 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0, 0 };
 526 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4, 0, 0 };
 527
 528 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
 529 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
 530 static const u16 NCT6106_REG_PWM[] = { 0x119, 0x129, 0x139 };
 531 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c };
 532 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
 533 static const u16 NCT6106_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130 };
 534 static const u16 NCT6106_REG_TEMP_SOURCE[] = {
 535         0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
 536
 537 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
 538 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = {
 539         0x11b, 0x12b, 0x13b };
 540
 541 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
 542 #define NCT6106_CRITICAL_PWM_ENABLE_MASK        0x10
 543 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
 544
 545 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
 546 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
 547 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
 548 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
 549 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
 550 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
 551
 552 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
 553
 554 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
 555 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
 556 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
 557 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x17c };
 558 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
 559 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
 560
 561 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
 562 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
 563
 564 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = {
 565         0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
 566
 567 static const s8 NCT6106_ALARM_BITS[] = {
 568         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 569         9, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 570         -1,                             /* unused */
 571         32, 33, 34, -1, -1,             /* fan1..fan5 */
 572         -1, -1, -1,                     /* unused */
 573         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 574         48, -1                          /* intrusion0, intrusion1 */
 575 };
 576
 577 static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = {
 578         0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 };
 579
 580 static const s8 NCT6106_BEEP_BITS[] = {
 581         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 582         9, 10, 11, 12, -1, -1, -1,      /* in8..in14 */
 583         32,                             /* global beep enable */
 584         24, 25, 26, 27, 28,             /* fan1..fan5 */
 585         -1, -1, -1,                     /* unused */
 586         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 587         34, -1                          /* intrusion0, intrusion1 */
 588 };
 589
 590 static const u16 NCT6106_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
 591         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x51, 0x52, 0x54 };
 592
 593 static const u16 NCT6106_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
 594         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x204, 0x205 };
 595
 596 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
 597 {
 598         if (mode == 0 && pwm == 255)
 599                 return off;
 600         return mode + 1;
 601 }
 602
 603 static int pwm_enable_to_reg(enum pwm_enable mode)
 604 {
 605         if (mode == off)
 606                 return 0;
 607         return mode - 1;
 608 }
 609
 610 /*
 611  * Conversions
 612  */
 613
 614 /* 1 is DC mode, output in ms */
 615 static unsigned int step_time_from_reg(u8 reg, u8 mode)
 616 {
 617         return mode ? 400 * reg : 100 * reg;
 618 }
 619
 620 static u8 step_time_to_reg(unsigned int msec, u8 mode)
 621 {
 622         return clamp_val((mode ? (msec + 200) / 400 :
 623                                         (msec + 50) / 100), 1, 255);
 624 }
 625
 626 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
 627 {
 628         if (reg == 0 || reg == 255)
 629                 return 0;
 630         return 1350000U / (reg << divreg);
 631 }
 632
 633 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
 634 {
 635         if ((reg & 0xff1f) == 0xff1f)
 636                 return 0;
 637
 638         reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
 639
 640         if (reg == 0)
 641                 return 0;
 642
 643         return 1350000U / reg;
 644 }
 645
 646 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
 647 {
 648         if (reg == 0 || reg == 0xffff)
 649                 return 0;
 650
 651         /*
 652          * Even though the registers are 16 bit wide, the fan divisor
 653          * still applies.
 654          */
 655         return 1350000U / (reg << divreg);
 656 }
 657
 658 static u16 fan_to_reg(u32 fan, unsigned int divreg)
 659 {
 660         if (!fan)
 661                 return 0;
 662
 663         return (1350000U / fan) >> divreg;
 664 }
 665
 666 static inline unsigned int
 667 div_from_reg(u8 reg)
 668 {
 669         return 1 << reg;
 670 }
 671
 672 /*
 673  * Some of the voltage inputs have internal scaling, the tables below
 674  * contain 8 (the ADC LSB in mV) * scaling factor * 100
 675  */
 676 static const u16 scale_in[15] = {
 677         800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
 678         800, 800
 679 };
 680
 681 static inline long in_from_reg(u8 reg, u8 nr)
 682 {
 683         return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
 684 }
 685
 686 static inline u8 in_to_reg(u32 val, u8 nr)
 687 {
 688         return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
 689 }
 690
 691 /*
 692  * Data structures and manipulation thereof
 693  */
 694
 695 struct nct6775_data {
 696         int addr;       /* IO base of hw monitor block */
 697         enum kinds kind;
 698         const char *name;
 699
 700         struct device *hwmon_dev;
 701         struct attribute_group *group_in;
 702         struct attribute_group *group_fan;
 703         struct attribute_group *group_temp;
 704         struct attribute_group *group_pwm;
 705
 706         u16 reg_temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 707                                     * 3=temp_crit, 4=temp_lcrit
 708                                     */
 709         u8 temp_src[NUM_TEMP];
 710         u16 reg_temp_config[NUM_TEMP];
 711         const char * const *temp_label;
 712         int temp_label_num;
 713
 714         u16 REG_CONFIG;
 715         u16 REG_VBAT;
 716         u16 REG_DIODE;
 717         u8 DIODE_MASK;
 718
 719         const s8 *ALARM_BITS;
 720         const s8 *BEEP_BITS;
 721
 722         const u16 *REG_VIN;
 723         const u16 *REG_IN_MINMAX[2];
 724
 725         const u16 *REG_TARGET;
 726         const u16 *REG_FAN;
 727         const u16 *REG_FAN_MODE;
 728         const u16 *REG_FAN_MIN;
 729         const u16 *REG_FAN_PULSES;
 730         const u16 *FAN_PULSE_SHIFT;
 731         const u16 *REG_FAN_TIME[3];
 732
 733         const u16 *REG_TOLERANCE_H;
 734
 735         const u8 *REG_PWM_MODE;
 736         const u8 *PWM_MODE_MASK;
 737
 738         const u16 *REG_PWM[7];  /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 739                                  * [3]=pwm_max, [4]=pwm_step,
 740                                  * [5]=weight_duty_step, [6]=weight_duty_base
 741                                  */
 742         const u16 *REG_PWM_READ;
 743
 744         const u16 *REG_CRITICAL_PWM_ENABLE;
 745         u8 CRITICAL_PWM_ENABLE_MASK;
 746         const u16 *REG_CRITICAL_PWM;
 747
 748         const u16 *REG_AUTO_TEMP;
 749         const u16 *REG_AUTO_PWM;
 750
 751         const u16 *REG_CRITICAL_TEMP;
 752         const u16 *REG_CRITICAL_TEMP_TOLERANCE;
 753
 754         const u16 *REG_TEMP_SOURCE;     /* temp register sources */
 755         const u16 *REG_TEMP_SEL;
 756         const u16 *REG_WEIGHT_TEMP_SEL;
 757         const u16 *REG_WEIGHT_TEMP[3];  /* 0=base, 1=tolerance, 2=step */
 758
 759         const u16 *REG_TEMP_OFFSET;
 760
 761         const u16 *REG_ALARM;
 762         const u16 *REG_BEEP;
 763
 764         unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
 765         unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
 766
 767         struct mutex update_lock;
 768         bool valid;             /* true if following fields are valid */
 769         unsigned long last_updated;     /* In jiffies */
 770
 771         /* Register values */
 772         u8 bank;                /* current register bank */
 773         u8 in_num;              /* number of in inputs we have */
 774         u8 in[15][3];           /* [0]=in, [1]=in_max, [2]=in_min */
 775         unsigned int rpm[5];
 776         u16 fan_min[5];
 777         u8 fan_pulses[5];
 778         u8 fan_div[5];
 779         u8 has_pwm;
 780         u8 has_fan;             /* some fan inputs can be disabled */
 781         u8 has_fan_min;         /* some fans don't have min register */
 782         bool has_fan_div;
 783
 784         u8 num_temp_alarms;     /* 2, 3, or 6 */
 785         u8 num_temp_beeps;      /* 2, 3, or 6 */
 786         u8 temp_fixed_num;      /* 3 or 6 */
 787         u8 temp_type[NUM_TEMP_FIXED];
 788         s8 temp_offset[NUM_TEMP_FIXED];
 789         s16 temp[4][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 790                                 * 3=temp_crit */
 791         u64 alarms;
 792         u64 beeps;
 793
 794         u8 pwm_num;     /* number of pwm */
 795         u8 pwm_mode[5]; /* 1->DC variable voltage, 0->PWM variable duty cycle */
 796         enum pwm_enable pwm_enable[5];
 797                         /* 0->off
 798                          * 1->manual
 799                          * 2->thermal cruise mode (also called SmartFan I)
 800                          * 3->fan speed cruise mode
 801                          * 4->SmartFan III
 802                          * 5->enhanced variable thermal cruise (SmartFan IV)
 803                          */
 804         u8 pwm[7][5];   /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 805                          * [3]=pwm_max, [4]=pwm_step,
 806                          * [5]=weight_duty_step, [6]=weight_duty_base
 807                          */
 808
 809         u8 target_temp[5];
 810         u8 target_temp_mask;
 811         u32 target_speed[5];
 812         u32 target_speed_tolerance[5];
 813         u8 speed_tolerance_limit;
 814
 815         u8 temp_tolerance[2][5];
 816         u8 tolerance_mask;
 817
 818         u8 fan_time[3][5]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
 819
 820         /* Automatic fan speed control registers */
 821         int auto_pwm_num;
 822         u8 auto_pwm[5][7];
 823         u8 auto_temp[5][7];
 824         u8 pwm_temp_sel[5];
 825         u8 pwm_weight_temp_sel[5];
 826         u8 weight_temp[3][5];   /* 0->temp_step, 1->temp_step_tol,
 827                                  * 2->temp_base
 828                                  */
 829
 830         u8 vid;
 831         u8 vrm;
 832
 833         bool have_vid;
 834
 835         u16 have_temp;
 836         u16 have_temp_fixed;
 837         u16 have_in;
 838 #ifdef CONFIG_PM
 839         /* Remember extra register values over suspend/resume */
 840         u8 vbat;
 841         u8 fandiv1;
 842         u8 fandiv2;
 843 #endif
 844 };
 845
 846 struct nct6775_sio_data {
 847         int sioreg;
 848         enum kinds kind;
 849 };
 850
 851 struct sensor_device_template {
 852         struct device_attribute dev_attr;
 853         union {
 854                 struct {
 855                         u8 nr;
 856                         u8 index;
 857                 } s;
 858                 int index;
 859         } u;
 860         bool s2;        /* true if both index and nr are used */
 861 };
 862
 863 struct sensor_device_attr_u {
 864         union {
 865                 struct sensor_device_attribute a1;
 866                 struct sensor_device_attribute_2 a2;
 867         } u;
 868         char name[32];
 869 };
 870
 871 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) {      \
 872         .attr = {.name = _template, .mode = _mode },            \
 873         .show   = _show,                                        \
 874         .store  = _store,                                       \
 875 }
 876
 877 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \
 878         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
 879           .u.index = _index,                                            \
 880           .s2 = false }
 881
 882 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,       \
 883                                  _nr, _index)                           \
 884         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
 885           .u.s.index = _index,                                          \
 886           .u.s.nr = _nr,                                                \
 887           .s2 = true }
 888
 889 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
 890 static struct sensor_device_template sensor_dev_template_##_name        \
 891         = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store,       \
 892                                  _index)
 893
 894 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store,       \
 895                           _nr, _index)                                  \
 896 static struct sensor_device_template sensor_dev_template_##_name        \
 897         = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,     \
 898                                  _nr, _index)
 899
 900 struct sensor_template_group {
 901         struct sensor_device_template **templates;
 902         umode_t (*is_visible)(struct kobject *, struct attribute *, int);
 903         int base;
 904 };
 905
 906 static struct attribute_group *
 907 nct6775_create_attr_group(struct device *dev, struct sensor_template_group *tg,
 908                           int repeat)
 909 {
 910         struct attribute_group *group;
 911         struct sensor_device_attr_u *su;
 912         struct sensor_device_attribute *a;
 913         struct sensor_device_attribute_2 *a2;
 914         struct attribute **attrs;
 915         struct sensor_device_template **t;
 916         int err, i, j, count;
 917
 918         if (repeat <= 0)
 919                 return ERR_PTR(-EINVAL);
 920
 921         t = tg->templates;
 922         for (count = 0; *t; t++, count++)
 923                 ;
 924
 925         if (count == 0)
 926                 return ERR_PTR(-EINVAL);
 927
 928         group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
 929         if (group == NULL)
 930                 return ERR_PTR(-ENOMEM);
 931
 932         attrs = devm_kzalloc(dev, sizeof(*attrs) * (repeat * count + 1),
 933                              GFP_KERNEL);
 934         if (attrs == NULL)
 935                 return ERR_PTR(-ENOMEM);
 936
 937         su = devm_kzalloc(dev, sizeof(*su) * repeat * count,
 938                                GFP_KERNEL);
 939         if (su == NULL)
 940                 return ERR_PTR(-ENOMEM);
 941
 942         group->attrs = attrs;
 943         group->is_visible = tg->is_visible;
 944
 945         for (i = 0; i < repeat; i++) {
 946                 t = tg->templates;
 947                 for (j = 0; *t != NULL; j++) {
 948                         snprintf(su->name, sizeof(su->name),
 949                                  (*t)->dev_attr.attr.name, tg->base + i);
 950                         if ((*t)->s2) {
 951                                 a2 = &su->u.a2;
 952                                 a2->dev_attr.attr.name = su->name;
 953                                 a2->nr = (*t)->u.s.nr + i;
 954                                 a2->index = (*t)->u.s.index;
 955                                 a2->dev_attr.attr.mode =
 956                                   (*t)->dev_attr.attr.mode;
 957                                 a2->dev_attr.show = (*t)->dev_attr.show;
 958                                 a2->dev_attr.store = (*t)->dev_attr.store;
 959                                 *attrs = &a2->dev_attr.attr;
 960                         } else {
 961                                 a = &su->u.a1;
 962                                 a->dev_attr.attr.name = su->name;
 963                                 a->index = (*t)->u.index + i;
 964                                 a->dev_attr.attr.mode =
 965                                   (*t)->dev_attr.attr.mode;
 966                                 a->dev_attr.show = (*t)->dev_attr.show;
 967                                 a->dev_attr.store = (*t)->dev_attr.store;
 968                                 *attrs = &a->dev_attr.attr;
 969                         }
 970                         attrs++;
 971                         su++;
 972                         t++;
 973                 }
 974         }
 975
 976         err = sysfs_create_group(&dev->kobj, group);
 977         if (err)
 978                 return ERR_PTR(-ENOMEM);
 979
 980         return group;
 981 }
 982
 983 static bool is_word_sized(struct nct6775_data *data, u16 reg)
 984 {
 985         switch (data->kind) {
 986         case nct6106:
 987                 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
 988                   reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
 989                   reg == 0x111 || reg == 0x121 || reg == 0x131;
 990         case nct6775:
 991                 return (((reg & 0xff00) == 0x100 ||
 992                     (reg & 0xff00) == 0x200) &&
 993                    ((reg & 0x00ff) == 0x50 ||
 994                     (reg & 0x00ff) == 0x53 ||
 995                     (reg & 0x00ff) == 0x55)) ||
 996                   (reg & 0xfff0) == 0x630 ||
 997                   reg == 0x640 || reg == 0x642 ||
 998                   reg == 0x662 ||
 999                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1000                   reg == 0x73 || reg == 0x75 || reg == 0x77;
1001         case nct6776:
1002                 return (((reg & 0xff00) == 0x100 ||
1003                     (reg & 0xff00) == 0x200) &&
1004                    ((reg & 0x00ff) == 0x50 ||
1005                     (reg & 0x00ff) == 0x53 ||
1006                     (reg & 0x00ff) == 0x55)) ||
1007                   (reg & 0xfff0) == 0x630 ||
1008                   reg == 0x402 ||
1009                   reg == 0x640 || reg == 0x642 ||
1010                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1011                   reg == 0x73 || reg == 0x75 || reg == 0x77;
1012         case nct6779:
1013                 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
1014                   ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x09) ||
1015                   reg == 0x402 ||
1016                   reg == 0x63a || reg == 0x63c || reg == 0x63e ||
1017                   reg == 0x640 || reg == 0x642 ||
1018                   reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
1019                   reg == 0x7b;
1020         }
1021         return false;
1022 }
1023
1024 /*
1025  * On older chips, only registers 0x50-0x5f are banked.
1026  * On more recent chips, all registers are banked.
1027  * Assume that is the case and set the bank number for each access.
1028  * Cache the bank number so it only needs to be set if it changes.
1029  */
1030 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
1031 {
1032         u8 bank = reg >> 8;
1033         if (data->bank != bank) {
1034                 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
1035                 outb_p(bank, data->addr + DATA_REG_OFFSET);
1036                 data->bank = bank;
1037         }
1038 }
1039
1040 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
1041 {
1042         int res, word_sized = is_word_sized(data, reg);
1043
1044         nct6775_set_bank(data, reg);
1045         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1046         res = inb_p(data->addr + DATA_REG_OFFSET);
1047         if (word_sized) {
1048                 outb_p((reg & 0xff) + 1,
1049                        data->addr + ADDR_REG_OFFSET);
1050                 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
1051         }
1052         return res;
1053 }
1054
1055 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
1056 {
1057         int word_sized = is_word_sized(data, reg);
1058
1059         nct6775_set_bank(data, reg);
1060         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1061         if (word_sized) {
1062                 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
1063                 outb_p((reg & 0xff) + 1,
1064                        data->addr + ADDR_REG_OFFSET);
1065         }
1066         outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
1067         return 0;
1068 }
1069
1070 /* We left-align 8-bit temperature values to make the code simpler */
1071 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
1072 {
1073         u16 res;
1074
1075         res = nct6775_read_value(data, reg);
1076         if (!is_word_sized(data, reg))
1077                 res <<= 8;
1078
1079         return res;
1080 }
1081
1082 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
1083 {
1084         if (!is_word_sized(data, reg))
1085                 value >>= 8;
1086         return nct6775_write_value(data, reg, value);
1087 }
1088
1089 /* This function assumes that the caller holds data->update_lock */
1090 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
1091 {
1092         u8 reg;
1093
1094         switch (nr) {
1095         case 0:
1096                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
1097                     | (data->fan_div[0] & 0x7);
1098                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1099                 break;
1100         case 1:
1101                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
1102                     | ((data->fan_div[1] << 4) & 0x70);
1103                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1104                 break;
1105         case 2:
1106                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
1107                     | (data->fan_div[2] & 0x7);
1108                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1109                 break;
1110         case 3:
1111                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
1112                     | ((data->fan_div[3] << 4) & 0x70);
1113                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1114                 break;
1115         }
1116 }
1117
1118 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
1119 {
1120         if (data->kind == nct6775)
1121                 nct6775_write_fan_div(data, nr);
1122 }
1123
1124 static void nct6775_update_fan_div(struct nct6775_data *data)
1125 {
1126         u8 i;
1127
1128         i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
1129         data->fan_div[0] = i & 0x7;
1130         data->fan_div[1] = (i & 0x70) >> 4;
1131         i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
1132         data->fan_div[2] = i & 0x7;
1133         if (data->has_fan & (1 << 3))
1134                 data->fan_div[3] = (i & 0x70) >> 4;
1135 }
1136
1137 static void nct6775_update_fan_div_common(struct nct6775_data *data)
1138 {
1139         if (data->kind == nct6775)
1140                 nct6775_update_fan_div(data);
1141 }
1142
1143 static void nct6775_init_fan_div(struct nct6775_data *data)
1144 {
1145         int i;
1146
1147         nct6775_update_fan_div_common(data);
1148         /*
1149          * For all fans, start with highest divider value if the divider
1150          * register is not initialized. This ensures that we get a
1151          * reading from the fan count register, even if it is not optimal.
1152          * We'll compute a better divider later on.
1153          */
1154         for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
1155                 if (!(data->has_fan & (1 << i)))
1156                         continue;
1157                 if (data->fan_div[i] == 0) {
1158                         data->fan_div[i] = 7;
1159                         nct6775_write_fan_div_common(data, i);
1160                 }
1161         }
1162 }
1163
1164 static void nct6775_init_fan_common(struct device *dev,
1165                                     struct nct6775_data *data)
1166 {
1167         int i;
1168         u8 reg;
1169
1170         if (data->has_fan_div)
1171                 nct6775_init_fan_div(data);
1172
1173         /*
1174          * If fan_min is not set (0), set it to 0xff to disable it. This
1175          * prevents the unnecessary warning when fanX_min is reported as 0.
1176          */
1177         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1178                 if (data->has_fan_min & (1 << i)) {
1179                         reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
1180                         if (!reg)
1181                                 nct6775_write_value(data, data->REG_FAN_MIN[i],
1182                                                     data->has_fan_div ? 0xff
1183                                                                       : 0xff1f);
1184                 }
1185         }
1186 }
1187
1188 static void nct6775_select_fan_div(struct device *dev,
1189                                    struct nct6775_data *data, int nr, u16 reg)
1190 {
1191         u8 fan_div = data->fan_div[nr];
1192         u16 fan_min;
1193
1194         if (!data->has_fan_div)
1195                 return;
1196
1197         /*
1198          * If we failed to measure the fan speed, or the reported value is not
1199          * in the optimal range, and the clock divider can be modified,
1200          * let's try that for next time.
1201          */
1202         if (reg == 0x00 && fan_div < 0x07)
1203                 fan_div++;
1204         else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1205                 fan_div--;
1206
1207         if (fan_div != data->fan_div[nr]) {
1208                 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1209                         nr + 1, div_from_reg(data->fan_div[nr]),
1210                         div_from_reg(fan_div));
1211
1212                 /* Preserve min limit if possible */
1213                 if (data->has_fan_min & (1 << nr)) {
1214                         fan_min = data->fan_min[nr];
1215                         if (fan_div > data->fan_div[nr]) {
1216                                 if (fan_min != 255 && fan_min > 1)
1217                                         fan_min >>= 1;
1218                         } else {
1219                                 if (fan_min != 255) {
1220                                         fan_min <<= 1;
1221                                         if (fan_min > 254)
1222                                                 fan_min = 254;
1223                                 }
1224                         }
1225                         if (fan_min != data->fan_min[nr]) {
1226                                 data->fan_min[nr] = fan_min;
1227                                 nct6775_write_value(data, data->REG_FAN_MIN[nr],
1228                                                     fan_min);
1229                         }
1230                 }
1231                 data->fan_div[nr] = fan_div;
1232                 nct6775_write_fan_div_common(data, nr);
1233         }
1234 }
1235
1236 static void nct6775_update_pwm(struct device *dev)
1237 {
1238         struct nct6775_data *data = dev_get_drvdata(dev);
1239         int i, j;
1240         int fanmodecfg, reg;
1241         bool duty_is_dc;
1242
1243         for (i = 0; i < data->pwm_num; i++) {
1244                 if (!(data->has_pwm & (1 << i)))
1245                         continue;
1246
1247                 duty_is_dc = data->REG_PWM_MODE[i] &&
1248                   (nct6775_read_value(data, data->REG_PWM_MODE[i])
1249                    & data->PWM_MODE_MASK[i]);
1250                 data->pwm_mode[i] = duty_is_dc;
1251
1252                 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
1253                 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1254                         if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1255                                 data->pwm[j][i]
1256                                   = nct6775_read_value(data,
1257                                                        data->REG_PWM[j][i]);
1258                         }
1259                 }
1260
1261                 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1262                                                         (fanmodecfg >> 4) & 7);
1263
1264                 if (!data->temp_tolerance[0][i] ||
1265                     data->pwm_enable[i] != speed_cruise)
1266                         data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1267                 if (!data->target_speed_tolerance[i] ||
1268                     data->pwm_enable[i] == speed_cruise) {
1269                         u8 t = fanmodecfg & 0x0f;
1270                         if (data->REG_TOLERANCE_H) {
1271                                 t |= (nct6775_read_value(data,
1272                                       data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
1273                         }
1274                         data->target_speed_tolerance[i] = t;
1275                 }
1276
1277                 data->temp_tolerance[1][i] =
1278                         nct6775_read_value(data,
1279                                         data->REG_CRITICAL_TEMP_TOLERANCE[i]);
1280
1281                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
1282                 data->pwm_temp_sel[i] = reg & 0x1f;
1283                 /* If fan can stop, report floor as 0 */
1284                 if (reg & 0x80)
1285                         data->pwm[2][i] = 0;
1286
1287                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
1288                 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1289                 /* If weight is disabled, report weight source as 0 */
1290                 if (j == 1 && !(reg & 0x80))
1291                         data->pwm_weight_temp_sel[i] = 0;
1292
1293                 /* Weight temp data */
1294                 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
1295                         data->weight_temp[j][i]
1296                           = nct6775_read_value(data,
1297                                                data->REG_WEIGHT_TEMP[j][i]);
1298                 }
1299         }
1300 }
1301
1302 static void nct6775_update_pwm_limits(struct device *dev)
1303 {
1304         struct nct6775_data *data = dev_get_drvdata(dev);
1305         int i, j;
1306         u8 reg;
1307         u16 reg_t;
1308
1309         for (i = 0; i < data->pwm_num; i++) {
1310                 if (!(data->has_pwm & (1 << i)))
1311                         continue;
1312
1313                 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1314                         data->fan_time[j][i] =
1315                           nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1316                 }
1317
1318                 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1319                 /* Update only in matching mode or if never updated */
1320                 if (!data->target_temp[i] ||
1321                     data->pwm_enable[i] == thermal_cruise)
1322                         data->target_temp[i] = reg_t & data->target_temp_mask;
1323                 if (!data->target_speed[i] ||
1324                     data->pwm_enable[i] == speed_cruise) {
1325                         if (data->REG_TOLERANCE_H) {
1326                                 reg_t |= (nct6775_read_value(data,
1327                                         data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1328                         }
1329                         data->target_speed[i] = reg_t;
1330                 }
1331
1332                 for (j = 0; j < data->auto_pwm_num; j++) {
1333                         data->auto_pwm[i][j] =
1334                           nct6775_read_value(data,
1335                                              NCT6775_AUTO_PWM(data, i, j));
1336                         data->auto_temp[i][j] =
1337                           nct6775_read_value(data,
1338                                              NCT6775_AUTO_TEMP(data, i, j));
1339                 }
1340
1341                 /* critical auto_pwm temperature data */
1342                 data->auto_temp[i][data->auto_pwm_num] =
1343                         nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1344
1345                 switch (data->kind) {
1346                 case nct6775:
1347                         reg = nct6775_read_value(data,
1348                                                  NCT6775_REG_CRITICAL_ENAB[i]);
1349                         data->auto_pwm[i][data->auto_pwm_num] =
1350                                                 (reg & 0x02) ? 0xff : 0x00;
1351                         break;
1352                 case nct6776:
1353                         data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1354                         break;
1355                 case nct6106:
1356                 case nct6779:
1357                         reg = nct6775_read_value(data,
1358                                         data->REG_CRITICAL_PWM_ENABLE[i]);
1359                         if (reg & data->CRITICAL_PWM_ENABLE_MASK)
1360                                 reg = nct6775_read_value(data,
1361                                         data->REG_CRITICAL_PWM[i]);
1362                         else
1363                                 reg = 0xff;
1364                         data->auto_pwm[i][data->auto_pwm_num] = reg;
1365                         break;
1366                 }
1367         }
1368 }
1369
1370 static struct nct6775_data *nct6775_update_device(struct device *dev)
1371 {
1372         struct nct6775_data *data = dev_get_drvdata(dev);
1373         int i, j;
1374
1375         mutex_lock(&data->update_lock);
1376
1377         if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1378             || !data->valid) {
1379                 /* Fan clock dividers */
1380                 nct6775_update_fan_div_common(data);
1381
1382                 /* Measured voltages and limits */
1383                 for (i = 0; i < data->in_num; i++) {
1384                         if (!(data->have_in & (1 << i)))
1385                                 continue;
1386
1387                         data->in[i][0] = nct6775_read_value(data,
1388                                                             data->REG_VIN[i]);
1389                         data->in[i][1] = nct6775_read_value(data,
1390                                           data->REG_IN_MINMAX[0][i]);
1391                         data->in[i][2] = nct6775_read_value(data,
1392                                           data->REG_IN_MINMAX[1][i]);
1393                 }
1394
1395                 /* Measured fan speeds and limits */
1396                 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
1397                         u16 reg;
1398
1399                         if (!(data->has_fan & (1 << i)))
1400                                 continue;
1401
1402                         reg = nct6775_read_value(data, data->REG_FAN[i]);
1403                         data->rpm[i] = data->fan_from_reg(reg,
1404                                                           data->fan_div[i]);
1405
1406                         if (data->has_fan_min & (1 << i))
1407                                 data->fan_min[i] = nct6775_read_value(data,
1408                                            data->REG_FAN_MIN[i]);
1409                         data->fan_pulses[i] =
1410                           (nct6775_read_value(data, data->REG_FAN_PULSES[i])
1411                                 >> data->FAN_PULSE_SHIFT[i]) & 0x03;
1412
1413                         nct6775_select_fan_div(dev, data, i, reg);
1414                 }
1415
1416                 nct6775_update_pwm(dev);
1417                 nct6775_update_pwm_limits(dev);
1418
1419                 /* Measured temperatures and limits */
1420                 for (i = 0; i < NUM_TEMP; i++) {
1421                         if (!(data->have_temp & (1 << i)))
1422                                 continue;
1423                         for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1424                                 if (data->reg_temp[j][i])
1425                                         data->temp[j][i]
1426                                           = nct6775_read_temp(data,
1427                                                 data->reg_temp[j][i]);
1428                         }
1429                         if (!(data->have_temp_fixed & (1 << i)))
1430                                 continue;
1431                         data->temp_offset[i]
1432                           = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1433                 }
1434
1435                 data->alarms = 0;
1436                 for (i = 0; i < NUM_REG_ALARM; i++) {
1437                         u8 alarm;
1438                         if (!data->REG_ALARM[i])
1439                                 continue;
1440                         alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1441                         data->alarms |= ((u64)alarm) << (i << 3);
1442                 }
1443
1444                 data->beeps = 0;
1445                 for (i = 0; i < NUM_REG_BEEP; i++) {
1446                         u8 beep;
1447                         if (!data->REG_BEEP[i])
1448                                 continue;
1449                         beep = nct6775_read_value(data, data->REG_BEEP[i]);
1450                         data->beeps |= ((u64)beep) << (i << 3);
1451                 }
1452
1453                 data->last_updated = jiffies;
1454                 data->valid = true;
1455         }
1456
1457         mutex_unlock(&data->update_lock);
1458         return data;
1459 }
1460
1461 /*
1462  * Sysfs callback functions
1463  */
1464 static ssize_t
1465 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1466 {
1467         struct nct6775_data *data = nct6775_update_device(dev);
1468         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1469         int nr = sattr->nr;
1470         int index = sattr->index;
1471         return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1472 }
1473
1474 static ssize_t
1475 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1476              size_t count)
1477 {
1478         struct nct6775_data *data = dev_get_drvdata(dev);
1479         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1480         int nr = sattr->nr;
1481         int index = sattr->index;
1482         unsigned long val;
1483         int err = kstrtoul(buf, 10, &val);
1484         if (err < 0)
1485                 return err;
1486         mutex_lock(&data->update_lock);
1487         data->in[nr][index] = in_to_reg(val, nr);
1488         nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr],
1489                             data->in[nr][index]);
1490         mutex_unlock(&data->update_lock);
1491         return count;
1492 }
1493
1494 static ssize_t
1495 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1496 {
1497         struct nct6775_data *data = nct6775_update_device(dev);
1498         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1499         int nr = data->ALARM_BITS[sattr->index];
1500         return sprintf(buf, "%u\n",
1501                        (unsigned int)((data->alarms >> nr) & 0x01));
1502 }
1503
1504 static int find_temp_source(struct nct6775_data *data, int index, int count)
1505 {
1506         int source = data->temp_src[index];
1507         int nr;
1508
1509         for (nr = 0; nr < count; nr++) {
1510                 int src;
1511
1512                 src = nct6775_read_value(data,
1513                                          data->REG_TEMP_SOURCE[nr]) & 0x1f;
1514                 if (src == source)
1515                         return nr;
1516         }
1517         return -1;
1518 }
1519
1520 static ssize_t
1521 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1522 {
1523         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1524         struct nct6775_data *data = nct6775_update_device(dev);
1525         unsigned int alarm = 0;
1526         int nr;
1527
1528         /*
1529          * For temperatures, there is no fixed mapping from registers to alarm
1530          * bits. Alarm bits are determined by the temperature source mapping.
1531          */
1532         nr = find_temp_source(data, sattr->index, data->num_temp_alarms);
1533         if (nr >= 0) {
1534                 int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE];
1535                 alarm = (data->alarms >> bit) & 0x01;
1536         }
1537         return sprintf(buf, "%u\n", alarm);
1538 }
1539
1540 static ssize_t
1541 show_beep(struct device *dev, struct device_attribute *attr, char *buf)
1542 {
1543         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1544         struct nct6775_data *data = nct6775_update_device(dev);
1545         int nr = data->BEEP_BITS[sattr->index];
1546
1547         return sprintf(buf, "%u\n",
1548                        (unsigned int)((data->beeps >> nr) & 0x01));
1549 }
1550
1551 static ssize_t
1552 store_beep(struct device *dev, struct device_attribute *attr, const char *buf,
1553            size_t count)
1554 {
1555         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1556         struct nct6775_data *data = dev_get_drvdata(dev);
1557         int nr = data->BEEP_BITS[sattr->index];
1558         int regindex = nr >> 3;
1559         unsigned long val;
1560
1561         int err = kstrtoul(buf, 10, &val);
1562         if (err < 0)
1563                 return err;
1564         if (val > 1)
1565                 return -EINVAL;
1566
1567         mutex_lock(&data->update_lock);
1568         if (val)
1569                 data->beeps |= (1ULL << nr);
1570         else
1571                 data->beeps &= ~(1ULL << nr);
1572         nct6775_write_value(data, data->REG_BEEP[regindex],
1573                             (data->beeps >> (regindex << 3)) & 0xff);
1574         mutex_unlock(&data->update_lock);
1575         return count;
1576 }
1577
1578 static ssize_t
1579 show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf)
1580 {
1581         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1582         struct nct6775_data *data = nct6775_update_device(dev);
1583         unsigned int beep = 0;
1584         int nr;
1585
1586         /*
1587          * For temperatures, there is no fixed mapping from registers to beep
1588          * enable bits. Beep enable bits are determined by the temperature
1589          * source mapping.
1590          */
1591         nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1592         if (nr >= 0) {
1593                 int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1594                 beep = (data->beeps >> bit) & 0x01;
1595         }
1596         return sprintf(buf, "%u\n", beep);
1597 }
1598
1599 static ssize_t
1600 store_temp_beep(struct device *dev, struct device_attribute *attr,
1601                 const char *buf, size_t count)
1602 {
1603         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1604         struct nct6775_data *data = dev_get_drvdata(dev);
1605         int nr, bit, regindex;
1606         unsigned long val;
1607
1608         int err = kstrtoul(buf, 10, &val);
1609         if (err < 0)
1610                 return err;
1611         if (val > 1)
1612                 return -EINVAL;
1613
1614         nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1615         if (nr < 0)
1616                 return -ENODEV;
1617
1618         bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1619         regindex = bit >> 3;
1620
1621         mutex_lock(&data->update_lock);
1622         if (val)
1623                 data->beeps |= (1ULL << bit);
1624         else
1625                 data->beeps &= ~(1ULL << bit);
1626         nct6775_write_value(data, data->REG_BEEP[regindex],
1627                             (data->beeps >> (regindex << 3)) & 0xff);
1628         mutex_unlock(&data->update_lock);
1629
1630         return count;
1631 }
1632
1633 static umode_t nct6775_in_is_visible(struct kobject *kobj,
1634                                      struct attribute *attr, int index)
1635 {
1636         struct device *dev = container_of(kobj, struct device, kobj);
1637         struct nct6775_data *data = dev_get_drvdata(dev);
1638         int in = index / 5;     /* voltage index */
1639
1640         if (!(data->have_in & (1 << in)))
1641                 return 0;
1642
1643         return attr->mode;
1644 }
1645
1646 SENSOR_TEMPLATE_2(in_input, "in%d_input", S_IRUGO, show_in_reg, NULL, 0, 0);
1647 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", S_IRUGO, show_alarm, NULL, 0);
1648 SENSOR_TEMPLATE(in_beep, "in%d_beep", S_IWUSR | S_IRUGO, show_beep, store_beep,
1649                 0);
1650 SENSOR_TEMPLATE_2(in_min, "in%d_min", S_IWUSR | S_IRUGO, show_in_reg,
1651                   store_in_reg, 0, 1);
1652 SENSOR_TEMPLATE_2(in_max, "in%d_max", S_IWUSR | S_IRUGO, show_in_reg,
1653                   store_in_reg, 0, 2);
1654
1655 /*
1656  * nct6775_in_is_visible uses the index into the following array
1657  * to determine if attributes should be created or not.
1658  * Any change in order or content must be matched.
1659  */
1660 static struct sensor_device_template *nct6775_attributes_in_template[] = {
1661         &sensor_dev_template_in_input,
1662         &sensor_dev_template_in_alarm,
1663         &sensor_dev_template_in_beep,
1664         &sensor_dev_template_in_min,
1665         &sensor_dev_template_in_max,
1666         NULL
1667 };
1668
1669 static struct sensor_template_group nct6775_in_template_group = {
1670         .templates = nct6775_attributes_in_template,
1671         .is_visible = nct6775_in_is_visible,
1672 };
1673
1674 static ssize_t
1675 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1676 {
1677         struct nct6775_data *data = nct6775_update_device(dev);
1678         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1679         int nr = sattr->index;
1680         return sprintf(buf, "%d\n", data->rpm[nr]);
1681 }
1682
1683 static ssize_t
1684 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1685 {
1686         struct nct6775_data *data = nct6775_update_device(dev);
1687         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1688         int nr = sattr->index;
1689         return sprintf(buf, "%d\n",
1690                        data->fan_from_reg_min(data->fan_min[nr],
1691                                               data->fan_div[nr]));
1692 }
1693
1694 static ssize_t
1695 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1696 {
1697         struct nct6775_data *data = nct6775_update_device(dev);
1698         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1699         int nr = sattr->index;
1700         return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1701 }
1702
1703 static ssize_t
1704 store_fan_min(struct device *dev, struct device_attribute *attr,
1705               const char *buf, size_t count)
1706 {
1707         struct nct6775_data *data = dev_get_drvdata(dev);
1708         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1709         int nr = sattr->index;
1710         unsigned long val;
1711         int err;
1712         unsigned int reg;
1713         u8 new_div;
1714
1715         err = kstrtoul(buf, 10, &val);
1716         if (err < 0)
1717                 return err;
1718
1719         mutex_lock(&data->update_lock);
1720         if (!data->has_fan_div) {
1721                 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1722                 if (!val) {
1723                         val = 0xff1f;
1724                 } else {
1725                         if (val > 1350000U)
1726                                 val = 135000U;
1727                         val = 1350000U / val;
1728                         val = (val & 0x1f) | ((val << 3) & 0xff00);
1729                 }
1730                 data->fan_min[nr] = val;
1731                 goto write_min; /* Leave fan divider alone */
1732         }
1733         if (!val) {
1734                 /* No min limit, alarm disabled */
1735                 data->fan_min[nr] = 255;
1736                 new_div = data->fan_div[nr]; /* No change */
1737                 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1738                 goto write_div;
1739         }
1740         reg = 1350000U / val;
1741         if (reg >= 128 * 255) {
1742                 /*
1743                  * Speed below this value cannot possibly be represented,
1744                  * even with the highest divider (128)
1745                  */
1746                 data->fan_min[nr] = 254;
1747                 new_div = 7; /* 128 == (1 << 7) */
1748                 dev_warn(dev,
1749                          "fan%u low limit %lu below minimum %u, set to minimum\n",
1750                          nr + 1, val, data->fan_from_reg_min(254, 7));
1751         } else if (!reg) {
1752                 /*
1753                  * Speed above this value cannot possibly be represented,
1754                  * even with the lowest divider (1)
1755                  */
1756                 data->fan_min[nr] = 1;
1757                 new_div = 0; /* 1 == (1 << 0) */
1758                 dev_warn(dev,
1759                          "fan%u low limit %lu above maximum %u, set to maximum\n",
1760                          nr + 1, val, data->fan_from_reg_min(1, 0));
1761         } else {
1762                 /*
1763                  * Automatically pick the best divider, i.e. the one such
1764                  * that the min limit will correspond to a register value
1765                  * in the 96..192 range
1766                  */
1767                 new_div = 0;
1768                 while (reg > 192 && new_div < 7) {
1769                         reg >>= 1;
1770                         new_div++;
1771                 }
1772                 data->fan_min[nr] = reg;
1773         }
1774
1775 write_div:
1776         /*
1777          * Write both the fan clock divider (if it changed) and the new
1778          * fan min (unconditionally)
1779          */
1780         if (new_div != data->fan_div[nr]) {
1781                 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1782                         nr + 1, div_from_reg(data->fan_div[nr]),
1783                         div_from_reg(new_div));
1784                 data->fan_div[nr] = new_div;
1785                 nct6775_write_fan_div_common(data, nr);
1786                 /* Give the chip time to sample a new speed value */
1787                 data->last_updated = jiffies;
1788         }
1789
1790 write_min:
1791         nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1792         mutex_unlock(&data->update_lock);
1793
1794         return count;
1795 }
1796
1797 static ssize_t
1798 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
1799 {
1800         struct nct6775_data *data = nct6775_update_device(dev);
1801         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1802         int p = data->fan_pulses[sattr->index];
1803
1804         return sprintf(buf, "%d\n", p ? : 4);
1805 }
1806
1807 static ssize_t
1808 store_fan_pulses(struct device *dev, struct device_attribute *attr,
1809                  const char *buf, size_t count)
1810 {
1811         struct nct6775_data *data = dev_get_drvdata(dev);
1812         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1813         int nr = sattr->index;
1814         unsigned long val;
1815         int err;
1816         u8 reg;
1817
1818         err = kstrtoul(buf, 10, &val);
1819         if (err < 0)
1820                 return err;
1821
1822         if (val > 4)
1823                 return -EINVAL;
1824
1825         mutex_lock(&data->update_lock);
1826         data->fan_pulses[nr] = val & 3;
1827         reg = nct6775_read_value(data, data->REG_FAN_PULSES[nr]);
1828         reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
1829         reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
1830         nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
1831         mutex_unlock(&data->update_lock);
1832
1833         return count;
1834 }
1835
1836 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
1837                                       struct attribute *attr, int index)
1838 {
1839         struct device *dev = container_of(kobj, struct device, kobj);
1840         struct nct6775_data *data = dev_get_drvdata(dev);
1841         int fan = index / 6;    /* fan index */
1842         int nr = index % 6;     /* attribute index */
1843
1844         if (!(data->has_fan & (1 << fan)))
1845                 return 0;
1846
1847         if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1)
1848                 return 0;
1849         if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1)
1850                 return 0;
1851         if (nr == 4 && !(data->has_fan_min & (1 << fan)))
1852                 return 0;
1853         if (nr == 5 && data->kind != nct6775)
1854                 return 0;
1855
1856         return attr->mode;
1857 }
1858
1859 SENSOR_TEMPLATE(fan_input, "fan%d_input", S_IRUGO, show_fan, NULL, 0);
1860 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", S_IRUGO, show_alarm, NULL,
1861                 FAN_ALARM_BASE);
1862 SENSOR_TEMPLATE(fan_beep, "fan%d_beep", S_IWUSR | S_IRUGO, show_beep,
1863                 store_beep, FAN_ALARM_BASE);
1864 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", S_IWUSR | S_IRUGO, show_fan_pulses,
1865                 store_fan_pulses, 0);
1866 SENSOR_TEMPLATE(fan_min, "fan%d_min", S_IWUSR | S_IRUGO, show_fan_min,
1867                 store_fan_min, 0);
1868 SENSOR_TEMPLATE(fan_div, "fan%d_div", S_IRUGO, show_fan_div, NULL, 0);
1869
1870 /*
1871  * nct6775_fan_is_visible uses the index into the following array
1872  * to determine if attributes should be created or not.
1873  * Any change in order or content must be matched.
1874  */
1875 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
1876         &sensor_dev_template_fan_input,
1877         &sensor_dev_template_fan_alarm, /* 1 */
1878         &sensor_dev_template_fan_beep,  /* 2 */
1879         &sensor_dev_template_fan_pulses,
1880         &sensor_dev_template_fan_min,   /* 4 */
1881         &sensor_dev_template_fan_div,   /* 5 */
1882         NULL
1883 };
1884
1885 static struct sensor_template_group nct6775_fan_template_group = {
1886         .templates = nct6775_attributes_fan_template,
1887         .is_visible = nct6775_fan_is_visible,
1888         .base = 1,
1889 };
1890
1891 static ssize_t
1892 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1893 {
1894         struct nct6775_data *data = nct6775_update_device(dev);
1895         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1896         int nr = sattr->index;
1897         return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1898 }
1899
1900 static ssize_t
1901 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1902 {
1903         struct nct6775_data *data = nct6775_update_device(dev);
1904         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1905         int nr = sattr->nr;
1906         int index = sattr->index;
1907
1908         return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
1909 }
1910
1911 static ssize_t
1912 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
1913            size_t count)
1914 {
1915         struct nct6775_data *data = dev_get_drvdata(dev);
1916         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1917         int nr = sattr->nr;
1918         int index = sattr->index;
1919         int err;
1920         long val;
1921
1922         err = kstrtol(buf, 10, &val);
1923         if (err < 0)
1924                 return err;
1925
1926         mutex_lock(&data->update_lock);
1927         data->temp[index][nr] = LM75_TEMP_TO_REG(val);
1928         nct6775_write_temp(data, data->reg_temp[index][nr],
1929                            data->temp[index][nr]);
1930         mutex_unlock(&data->update_lock);
1931         return count;
1932 }
1933
1934 static ssize_t
1935 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
1936 {
1937         struct nct6775_data *data = nct6775_update_device(dev);
1938         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1939
1940         return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
1941 }
1942
1943 static ssize_t
1944 store_temp_offset(struct device *dev, struct device_attribute *attr,
1945                   const char *buf, size_t count)
1946 {
1947         struct nct6775_data *data = dev_get_drvdata(dev);
1948         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1949         int nr = sattr->index;
1950         long val;
1951         int err;
1952
1953         err = kstrtol(buf, 10, &val);
1954         if (err < 0)
1955                 return err;
1956
1957         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
1958
1959         mutex_lock(&data->update_lock);
1960         data->temp_offset[nr] = val;
1961         nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
1962         mutex_unlock(&data->update_lock);
1963
1964         return count;
1965 }
1966
1967 static ssize_t
1968 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
1969 {
1970         struct nct6775_data *data = nct6775_update_device(dev);
1971         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1972         int nr = sattr->index;
1973         return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
1974 }
1975
1976 static ssize_t
1977 store_temp_type(struct device *dev, struct device_attribute *attr,
1978                 const char *buf, size_t count)
1979 {
1980         struct nct6775_data *data = nct6775_update_device(dev);
1981         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1982         int nr = sattr->index;
1983         unsigned long val;
1984         int err;
1985         u8 vbat, diode, vbit, dbit;
1986
1987         err = kstrtoul(buf, 10, &val);
1988         if (err < 0)
1989                 return err;
1990
1991         if (val != 1 && val != 3 && val != 4)
1992                 return -EINVAL;
1993
1994         mutex_lock(&data->update_lock);
1995
1996         data->temp_type[nr] = val;
1997         vbit = 0x02 << nr;
1998         dbit = data->DIODE_MASK << nr;
1999         vbat = nct6775_read_value(data, data->REG_VBAT) & ~vbit;
2000         diode = nct6775_read_value(data, data->REG_DIODE) & ~dbit;
2001         switch (val) {
2002         case 1: /* CPU diode (diode, current mode) */
2003                 vbat |= vbit;
2004                 diode |= dbit;
2005                 break;
2006         case 3: /* diode, voltage mode */
2007                 vbat |= dbit;
2008                 break;
2009         case 4: /* thermistor */
2010                 break;
2011         }
2012         nct6775_write_value(data, data->REG_VBAT, vbat);
2013         nct6775_write_value(data, data->REG_DIODE, diode);
2014
2015         mutex_unlock(&data->update_lock);
2016         return count;
2017 }
2018
2019 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
2020                                        struct attribute *attr, int index)
2021 {
2022         struct device *dev = container_of(kobj, struct device, kobj);
2023         struct nct6775_data *data = dev_get_drvdata(dev);
2024         int temp = index / 10;  /* temp index */
2025         int nr = index % 10;    /* attribute index */
2026
2027         if (!(data->have_temp & (1 << temp)))
2028                 return 0;
2029
2030         if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0)
2031                 return 0;                               /* alarm */
2032
2033         if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0)
2034                 return 0;                               /* beep */
2035
2036         if (nr == 4 && !data->reg_temp[1][temp])        /* max */
2037                 return 0;
2038
2039         if (nr == 5 && !data->reg_temp[2][temp])        /* max_hyst */
2040                 return 0;
2041
2042         if (nr == 6 && !data->reg_temp[3][temp])        /* crit */
2043                 return 0;
2044
2045         if (nr == 7 && !data->reg_temp[4][temp])        /* lcrit */
2046                 return 0;
2047
2048         /* offset and type only apply to fixed sensors */
2049         if (nr > 7 && !(data->have_temp_fixed & (1 << temp)))
2050                 return 0;
2051
2052         return attr->mode;
2053 }
2054
2055 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", S_IRUGO, show_temp, NULL, 0, 0);
2056 SENSOR_TEMPLATE(temp_label, "temp%d_label", S_IRUGO, show_temp_label, NULL, 0);
2057 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", S_IRUGO | S_IWUSR, show_temp,
2058                   store_temp, 0, 1);
2059 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", S_IRUGO | S_IWUSR,
2060                   show_temp, store_temp, 0, 2);
2061 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", S_IRUGO | S_IWUSR, show_temp,
2062                   store_temp, 0, 3);
2063 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", S_IRUGO | S_IWUSR, show_temp,
2064                   store_temp, 0, 4);
2065 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", S_IRUGO | S_IWUSR,
2066                 show_temp_offset, store_temp_offset, 0);
2067 SENSOR_TEMPLATE(temp_type, "temp%d_type", S_IRUGO | S_IWUSR, show_temp_type,
2068                 store_temp_type, 0);
2069 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", S_IRUGO, show_temp_alarm, NULL, 0);
2070 SENSOR_TEMPLATE(temp_beep, "temp%d_beep", S_IRUGO | S_IWUSR, show_temp_beep,
2071                 store_temp_beep, 0);
2072
2073 /*
2074  * nct6775_temp_is_visible uses the index into the following array
2075  * to determine if attributes should be created or not.
2076  * Any change in order or content must be matched.
2077  */
2078 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
2079         &sensor_dev_template_temp_input,
2080         &sensor_dev_template_temp_label,
2081         &sensor_dev_template_temp_alarm,        /* 2 */
2082         &sensor_dev_template_temp_beep,         /* 3 */
2083         &sensor_dev_template_temp_max,          /* 4 */
2084         &sensor_dev_template_temp_max_hyst,     /* 5 */
2085         &sensor_dev_template_temp_crit,         /* 6 */
2086         &sensor_dev_template_temp_lcrit,        /* 7 */
2087         &sensor_dev_template_temp_offset,       /* 8 */
2088         &sensor_dev_template_temp_type,         /* 9 */
2089         NULL
2090 };
2091
2092 static struct sensor_template_group nct6775_temp_template_group = {
2093         .templates = nct6775_attributes_temp_template,
2094         .is_visible = nct6775_temp_is_visible,
2095         .base = 1,
2096 };
2097
2098 static ssize_t
2099 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
2100 {
2101         struct nct6775_data *data = nct6775_update_device(dev);
2102         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2103
2104         return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
2105 }
2106
2107 static ssize_t
2108 store_pwm_mode(struct device *dev, struct device_attribute *attr,
2109                const char *buf, size_t count)
2110 {
2111         struct nct6775_data *data = dev_get_drvdata(dev);
2112         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2113         int nr = sattr->index;
2114         unsigned long val;
2115         int err;
2116         u8 reg;
2117
2118         err = kstrtoul(buf, 10, &val);
2119         if (err < 0)
2120                 return err;
2121
2122         if (val > 1)
2123                 return -EINVAL;
2124
2125         /* Setting DC mode is not supported for all chips/channels */
2126         if (data->REG_PWM_MODE[nr] == 0) {
2127                 if (val)
2128                         return -EINVAL;
2129                 return count;
2130         }
2131
2132         mutex_lock(&data->update_lock);
2133         data->pwm_mode[nr] = val;
2134         reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
2135         reg &= ~data->PWM_MODE_MASK[nr];
2136         if (val)
2137                 reg |= data->PWM_MODE_MASK[nr];
2138         nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
2139         mutex_unlock(&data->update_lock);
2140         return count;
2141 }
2142
2143 static ssize_t
2144 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2145 {
2146         struct nct6775_data *data = nct6775_update_device(dev);
2147         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2148         int nr = sattr->nr;
2149         int index = sattr->index;
2150         int pwm;
2151
2152         /*
2153          * For automatic fan control modes, show current pwm readings.
2154          * Otherwise, show the configured value.
2155          */
2156         if (index == 0 && data->pwm_enable[nr] > manual)
2157                 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
2158         else
2159                 pwm = data->pwm[index][nr];
2160
2161         return sprintf(buf, "%d\n", pwm);
2162 }
2163
2164 static ssize_t
2165 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
2166           size_t count)
2167 {
2168         struct nct6775_data *data = dev_get_drvdata(dev);
2169         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2170         int nr = sattr->nr;
2171         int index = sattr->index;
2172         unsigned long val;
2173         int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
2174         int maxval[7]
2175           = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
2176         int err;
2177         u8 reg;
2178
2179         err = kstrtoul(buf, 10, &val);
2180         if (err < 0)
2181                 return err;
2182         val = clamp_val(val, minval[index], maxval[index]);
2183
2184         mutex_lock(&data->update_lock);
2185         data->pwm[index][nr] = val;
2186         nct6775_write_value(data, data->REG_PWM[index][nr], val);
2187         if (index == 2) { /* floor: disable if val == 0 */
2188                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2189                 reg &= 0x7f;
2190                 if (val)
2191                         reg |= 0x80;
2192                 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2193         }
2194         mutex_unlock(&data->update_lock);
2195         return count;
2196 }
2197
2198 /* Returns 0 if OK, -EINVAL otherwise */
2199 static int check_trip_points(struct nct6775_data *data, int nr)
2200 {
2201         int i;
2202
2203         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2204                 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
2205                         return -EINVAL;
2206         }
2207         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2208                 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
2209                         return -EINVAL;
2210         }
2211         /* validate critical temperature and pwm if enabled (pwm > 0) */
2212         if (data->auto_pwm[nr][data->auto_pwm_num]) {
2213                 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2214                                 data->auto_temp[nr][data->auto_pwm_num] ||
2215                     data->auto_pwm[nr][data->auto_pwm_num - 1] >
2216                                 data->auto_pwm[nr][data->auto_pwm_num])
2217                         return -EINVAL;
2218         }
2219         return 0;
2220 }
2221
2222 static void pwm_update_registers(struct nct6775_data *data, int nr)
2223 {
2224         u8 reg;
2225
2226         switch (data->pwm_enable[nr]) {
2227         case off:
2228         case manual:
2229                 break;
2230         case speed_cruise:
2231                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2232                 reg = (reg & ~data->tolerance_mask) |
2233                   (data->target_speed_tolerance[nr] & data->tolerance_mask);
2234                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2235                 nct6775_write_value(data, data->REG_TARGET[nr],
2236                                     data->target_speed[nr] & 0xff);
2237                 if (data->REG_TOLERANCE_H) {
2238                         reg = (data->target_speed[nr] >> 8) & 0x0f;
2239                         reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2240                         nct6775_write_value(data,
2241                                             data->REG_TOLERANCE_H[nr],
2242                                             reg);
2243                 }
2244                 break;
2245         case thermal_cruise:
2246                 nct6775_write_value(data, data->REG_TARGET[nr],
2247                                     data->target_temp[nr]);
2248                 /* intentional */
2249         default:
2250                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2251                 reg = (reg & ~data->tolerance_mask) |
2252                   data->temp_tolerance[0][nr];
2253                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2254                 break;
2255         }
2256 }
2257
2258 static ssize_t
2259 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2260 {
2261         struct nct6775_data *data = nct6775_update_device(dev);
2262         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2263
2264         return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2265 }
2266
2267 static ssize_t
2268 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2269                  const char *buf, size_t count)
2270 {
2271         struct nct6775_data *data = dev_get_drvdata(dev);
2272         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2273         int nr = sattr->index;
2274         unsigned long val;
2275         int err;
2276         u16 reg;
2277
2278         err = kstrtoul(buf, 10, &val);
2279         if (err < 0)
2280                 return err;
2281
2282         if (val > sf4)
2283                 return -EINVAL;
2284
2285         if (val == sf3 && data->kind != nct6775)
2286                 return -EINVAL;
2287
2288         if (val == sf4 && check_trip_points(data, nr)) {
2289                 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2290                 dev_err(dev, "Adjust trip points and try again\n");
2291                 return -EINVAL;
2292         }
2293
2294         mutex_lock(&data->update_lock);
2295         data->pwm_enable[nr] = val;
2296         if (val == off) {
2297                 /*
2298                  * turn off pwm control: select manual mode, set pwm to maximum
2299                  */
2300                 data->pwm[0][nr] = 255;
2301                 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2302         }
2303         pwm_update_registers(data, nr);
2304         reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2305         reg &= 0x0f;
2306         reg |= pwm_enable_to_reg(val) << 4;
2307         nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2308         mutex_unlock(&data->update_lock);
2309         return count;
2310 }
2311
2312 static ssize_t
2313 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2314 {
2315         int i, sel = 0;
2316
2317         for (i = 0; i < NUM_TEMP; i++) {
2318                 if (!(data->have_temp & (1 << i)))
2319                         continue;
2320                 if (src == data->temp_src[i]) {
2321                         sel = i + 1;
2322                         break;
2323                 }
2324         }
2325
2326         return sprintf(buf, "%d\n", sel);
2327 }
2328
2329 static ssize_t
2330 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2331 {
2332         struct nct6775_data *data = nct6775_update_device(dev);
2333         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2334         int index = sattr->index;
2335
2336         return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2337 }
2338
2339 static ssize_t
2340 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2341                    const char *buf, size_t count)
2342 {
2343         struct nct6775_data *data = nct6775_update_device(dev);
2344         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2345         int nr = sattr->index;
2346         unsigned long val;
2347         int err, reg, src;
2348
2349         err = kstrtoul(buf, 10, &val);
2350         if (err < 0)
2351                 return err;
2352         if (val == 0 || val > NUM_TEMP)
2353                 return -EINVAL;
2354         if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
2355                 return -EINVAL;
2356
2357         mutex_lock(&data->update_lock);
2358         src = data->temp_src[val - 1];
2359         data->pwm_temp_sel[nr] = src;
2360         reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2361         reg &= 0xe0;
2362         reg |= src;
2363         nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2364         mutex_unlock(&data->update_lock);
2365
2366         return count;
2367 }
2368
2369 static ssize_t
2370 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2371                          char *buf)
2372 {
2373         struct nct6775_data *data = nct6775_update_device(dev);
2374         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2375         int index = sattr->index;
2376
2377         return show_pwm_temp_sel_common(data, buf,
2378                                         data->pwm_weight_temp_sel[index]);
2379 }
2380
2381 static ssize_t
2382 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2383                           const char *buf, size_t count)
2384 {
2385         struct nct6775_data *data = nct6775_update_device(dev);
2386         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2387         int nr = sattr->index;
2388         unsigned long val;
2389         int err, reg, src;
2390
2391         err = kstrtoul(buf, 10, &val);
2392         if (err < 0)
2393                 return err;
2394         if (val > NUM_TEMP)
2395                 return -EINVAL;
2396         if (val && (!(data->have_temp & (1 << (val - 1))) ||
2397                     !data->temp_src[val - 1]))
2398                 return -EINVAL;
2399
2400         mutex_lock(&data->update_lock);
2401         if (val) {
2402                 src = data->temp_src[val - 1];
2403                 data->pwm_weight_temp_sel[nr] = src;
2404                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2405                 reg &= 0xe0;
2406                 reg |= (src | 0x80);
2407                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2408         } else {
2409                 data->pwm_weight_temp_sel[nr] = 0;
2410                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2411                 reg &= 0x7f;
2412                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2413         }
2414         mutex_unlock(&data->update_lock);
2415
2416         return count;
2417 }
2418
2419 static ssize_t
2420 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2421 {
2422         struct nct6775_data *data = nct6775_update_device(dev);
2423         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2424
2425         return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2426 }
2427
2428 static ssize_t
2429 store_target_temp(struct device *dev, struct device_attribute *attr,
2430                   const char *buf, size_t count)
2431 {
2432         struct nct6775_data *data = dev_get_drvdata(dev);
2433         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2434         int nr = sattr->index;
2435         unsigned long val;
2436         int err;
2437
2438         err = kstrtoul(buf, 10, &val);
2439         if (err < 0)
2440                 return err;
2441
2442         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2443                         data->target_temp_mask);
2444
2445         mutex_lock(&data->update_lock);
2446         data->target_temp[nr] = val;
2447         pwm_update_registers(data, nr);
2448         mutex_unlock(&data->update_lock);
2449         return count;
2450 }
2451
2452 static ssize_t
2453 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2454 {
2455         struct nct6775_data *data = nct6775_update_device(dev);
2456         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2457         int nr = sattr->index;
2458
2459         return sprintf(buf, "%d\n",
2460                        fan_from_reg16(data->target_speed[nr],
2461                                       data->fan_div[nr]));
2462 }
2463
2464 static ssize_t
2465 store_target_speed(struct device *dev, struct device_attribute *attr,
2466                    const char *buf, size_t count)
2467 {
2468         struct nct6775_data *data = dev_get_drvdata(dev);
2469         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2470         int nr = sattr->index;
2471         unsigned long val;
2472         int err;
2473         u16 speed;
2474
2475         err = kstrtoul(buf, 10, &val);
2476         if (err < 0)
2477                 return err;
2478
2479         val = clamp_val(val, 0, 1350000U);
2480         speed = fan_to_reg(val, data->fan_div[nr]);
2481
2482         mutex_lock(&data->update_lock);
2483         data->target_speed[nr] = speed;
2484         pwm_update_registers(data, nr);
2485         mutex_unlock(&data->update_lock);
2486         return count;
2487 }
2488
2489 static ssize_t
2490 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2491                     char *buf)
2492 {
2493         struct nct6775_data *data = nct6775_update_device(dev);
2494         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2495         int nr = sattr->nr;
2496         int index = sattr->index;
2497
2498         return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2499 }
2500
2501 static ssize_t
2502 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2503                      const char *buf, size_t count)
2504 {
2505         struct nct6775_data *data = dev_get_drvdata(dev);
2506         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2507         int nr = sattr->nr;
2508         int index = sattr->index;
2509         unsigned long val;
2510         int err;
2511
2512         err = kstrtoul(buf, 10, &val);
2513         if (err < 0)
2514                 return err;
2515
2516         /* Limit tolerance as needed */
2517         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2518
2519         mutex_lock(&data->update_lock);
2520         data->temp_tolerance[index][nr] = val;
2521         if (index)
2522                 pwm_update_registers(data, nr);
2523         else
2524                 nct6775_write_value(data,
2525                                     data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2526                                     val);
2527         mutex_unlock(&data->update_lock);
2528         return count;
2529 }
2530
2531 /*
2532  * Fan speed tolerance is a tricky beast, since the associated register is
2533  * a tick counter, but the value is reported and configured as rpm.
2534  * Compute resulting low and high rpm values and report the difference.
2535  */
2536 static ssize_t
2537 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2538                      char *buf)
2539 {
2540         struct nct6775_data *data = nct6775_update_device(dev);
2541         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2542         int nr = sattr->index;
2543         int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2544         int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2545         int tolerance;
2546
2547         if (low <= 0)
2548                 low = 1;
2549         if (high > 0xffff)
2550                 high = 0xffff;
2551         if (high < low)
2552                 high = low;
2553
2554         tolerance = (fan_from_reg16(low, data->fan_div[nr])
2555                      - fan_from_reg16(high, data->fan_div[nr])) / 2;
2556
2557         return sprintf(buf, "%d\n", tolerance);
2558 }
2559
2560 static ssize_t
2561 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2562                       const char *buf, size_t count)
2563 {
2564         struct nct6775_data *data = dev_get_drvdata(dev);
2565         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2566         int nr = sattr->index;
2567         unsigned long val;
2568         int err;
2569         int low, high;
2570
2571         err = kstrtoul(buf, 10, &val);
2572         if (err < 0)
2573                 return err;
2574
2575         high = fan_from_reg16(data->target_speed[nr],
2576                               data->fan_div[nr]) + val;
2577         low = fan_from_reg16(data->target_speed[nr],
2578                              data->fan_div[nr]) - val;
2579         if (low <= 0)
2580                 low = 1;
2581         if (high < low)
2582                 high = low;
2583
2584         val = (fan_to_reg(low, data->fan_div[nr]) -
2585                fan_to_reg(high, data->fan_div[nr])) / 2;
2586
2587         /* Limit tolerance as needed */
2588         val = clamp_val(val, 0, data->speed_tolerance_limit);
2589
2590         mutex_lock(&data->update_lock);
2591         data->target_speed_tolerance[nr] = val;
2592         pwm_update_registers(data, nr);
2593         mutex_unlock(&data->update_lock);
2594         return count;
2595 }
2596
2597 SENSOR_TEMPLATE_2(pwm, "pwm%d", S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2598 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", S_IWUSR | S_IRUGO, show_pwm_mode,
2599                 store_pwm_mode, 0);
2600 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", S_IWUSR | S_IRUGO, show_pwm_enable,
2601                 store_pwm_enable, 0);
2602 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", S_IWUSR | S_IRUGO,
2603                 show_pwm_temp_sel, store_pwm_temp_sel, 0);
2604 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", S_IWUSR | S_IRUGO,
2605                 show_target_temp, store_target_temp, 0);
2606 SENSOR_TEMPLATE(fan_target, "fan%d_target", S_IWUSR | S_IRUGO,
2607                 show_target_speed, store_target_speed, 0);
2608 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", S_IWUSR | S_IRUGO,
2609                 show_speed_tolerance, store_speed_tolerance, 0);
2610
2611 /* Smart Fan registers */
2612
2613 static ssize_t
2614 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2615 {
2616         struct nct6775_data *data = nct6775_update_device(dev);
2617         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2618         int nr = sattr->nr;
2619         int index = sattr->index;
2620
2621         return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2622 }
2623
2624 static ssize_t
2625 store_weight_temp(struct device *dev, struct device_attribute *attr,
2626                   const char *buf, size_t count)
2627 {
2628         struct nct6775_data *data = dev_get_drvdata(dev);
2629         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2630         int nr = sattr->nr;
2631         int index = sattr->index;
2632         unsigned long val;
2633         int err;
2634
2635         err = kstrtoul(buf, 10, &val);
2636         if (err < 0)
2637                 return err;
2638
2639         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2640
2641         mutex_lock(&data->update_lock);
2642         data->weight_temp[index][nr] = val;
2643         nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2644         mutex_unlock(&data->update_lock);
2645         return count;
2646 }
2647
2648 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", S_IWUSR | S_IRUGO,
2649                   show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
2650 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step",
2651                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 0);
2652 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol",
2653                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 1);
2654 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base",
2655                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 2);
2656 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step",
2657                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 5);
2658 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base",
2659                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 6);
2660
2661 static ssize_t
2662 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2663 {
2664         struct nct6775_data *data = nct6775_update_device(dev);
2665         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2666         int nr = sattr->nr;
2667         int index = sattr->index;
2668
2669         return sprintf(buf, "%d\n",
2670                        step_time_from_reg(data->fan_time[index][nr],
2671                                           data->pwm_mode[nr]));
2672 }
2673
2674 static ssize_t
2675 store_fan_time(struct device *dev, struct device_attribute *attr,
2676                const char *buf, size_t count)
2677 {
2678         struct nct6775_data *data = dev_get_drvdata(dev);
2679         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2680         int nr = sattr->nr;
2681         int index = sattr->index;
2682         unsigned long val;
2683         int err;
2684
2685         err = kstrtoul(buf, 10, &val);
2686         if (err < 0)
2687                 return err;
2688
2689         val = step_time_to_reg(val, data->pwm_mode[nr]);
2690         mutex_lock(&data->update_lock);
2691         data->fan_time[index][nr] = val;
2692         nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2693         mutex_unlock(&data->update_lock);
2694         return count;
2695 }
2696
2697 static ssize_t
2698 show_name(struct device *dev, struct device_attribute *attr, char *buf)
2699 {
2700         struct nct6775_data *data = dev_get_drvdata(dev);
2701
2702         return sprintf(buf, "%s\n", data->name);
2703 }
2704
2705 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
2706
2707 static ssize_t
2708 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2709 {
2710         struct nct6775_data *data = nct6775_update_device(dev);
2711         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2712
2713         return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2714 }
2715
2716 static ssize_t
2717 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2718                const char *buf, size_t count)
2719 {
2720         struct nct6775_data *data = dev_get_drvdata(dev);
2721         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2722         int nr = sattr->nr;
2723         int point = sattr->index;
2724         unsigned long val;
2725         int err;
2726         u8 reg;
2727
2728         err = kstrtoul(buf, 10, &val);
2729         if (err < 0)
2730                 return err;
2731         if (val > 255)
2732                 return -EINVAL;
2733
2734         if (point == data->auto_pwm_num) {
2735                 if (data->kind != nct6775 && !val)
2736                         return -EINVAL;
2737                 if (data->kind != nct6779 && val)
2738                         val = 0xff;
2739         }
2740
2741         mutex_lock(&data->update_lock);
2742         data->auto_pwm[nr][point] = val;
2743         if (point < data->auto_pwm_num) {
2744                 nct6775_write_value(data,
2745                                     NCT6775_AUTO_PWM(data, nr, point),
2746                                     data->auto_pwm[nr][point]);
2747         } else {
2748                 switch (data->kind) {
2749                 case nct6775:
2750                         /* disable if needed (pwm == 0) */
2751                         reg = nct6775_read_value(data,
2752                                                  NCT6775_REG_CRITICAL_ENAB[nr]);
2753                         if (val)
2754                                 reg |= 0x02;
2755                         else
2756                                 reg &= ~0x02;
2757                         nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
2758                                             reg);
2759                         break;
2760                 case nct6776:
2761                         break; /* always enabled, nothing to do */
2762                 case nct6106:
2763                 case nct6779:
2764                         nct6775_write_value(data, data->REG_CRITICAL_PWM[nr],
2765                                             val);
2766                         reg = nct6775_read_value(data,
2767                                         data->REG_CRITICAL_PWM_ENABLE[nr]);
2768                         if (val == 255)
2769                                 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
2770                         else
2771                                 reg |= data->CRITICAL_PWM_ENABLE_MASK;
2772                         nct6775_write_value(data,
2773                                             data->REG_CRITICAL_PWM_ENABLE[nr],
2774                                             reg);
2775                         break;
2776                 }
2777         }
2778         mutex_unlock(&data->update_lock);
2779         return count;
2780 }
2781
2782 static ssize_t
2783 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
2784 {
2785         struct nct6775_data *data = nct6775_update_device(dev);
2786         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2787         int nr = sattr->nr;
2788         int point = sattr->index;
2789
2790         /*
2791          * We don't know for sure if the temperature is signed or unsigned.
2792          * Assume it is unsigned.
2793          */
2794         return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
2795 }
2796
2797 static ssize_t
2798 store_auto_temp(struct device *dev, struct device_attribute *attr,
2799                 const char *buf, size_t count)
2800 {
2801         struct nct6775_data *data = dev_get_drvdata(dev);
2802         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2803         int nr = sattr->nr;
2804         int point = sattr->index;
2805         unsigned long val;
2806         int err;
2807
2808         err = kstrtoul(buf, 10, &val);
2809         if (err)
2810                 return err;
2811         if (val > 255000)
2812                 return -EINVAL;
2813
2814         mutex_lock(&data->update_lock);
2815         data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
2816         if (point < data->auto_pwm_num) {
2817                 nct6775_write_value(data,
2818                                     NCT6775_AUTO_TEMP(data, nr, point),
2819                                     data->auto_temp[nr][point]);
2820         } else {
2821                 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
2822                                     data->auto_temp[nr][point]);
2823         }
2824         mutex_unlock(&data->update_lock);
2825         return count;
2826 }
2827
2828 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
2829                                       struct attribute *attr, int index)
2830 {
2831         struct device *dev = container_of(kobj, struct device, kobj);
2832         struct nct6775_data *data = dev_get_drvdata(dev);
2833         int pwm = index / 36;   /* pwm index */
2834         int nr = index % 36;    /* attribute index */
2835
2836         if (!(data->has_pwm & (1 << pwm)))
2837                 return 0;
2838
2839         if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
2840                 return 0;
2841         if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
2842                 return 0;
2843         if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
2844                 return 0;
2845
2846         if (nr >= 22 && nr <= 35) {             /* auto point */
2847                 int api = (nr - 22) / 2;        /* auto point index */
2848
2849                 if (api > data->auto_pwm_num)
2850                         return 0;
2851         }
2852         return attr->mode;
2853 }
2854
2855 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", S_IWUSR | S_IRUGO,
2856                   show_fan_time, store_fan_time, 0, 0);
2857 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", S_IWUSR | S_IRUGO,
2858                   show_fan_time, store_fan_time, 0, 1);
2859 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", S_IWUSR | S_IRUGO,
2860                   show_fan_time, store_fan_time, 0, 2);
2861 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", S_IWUSR | S_IRUGO, show_pwm,
2862                   store_pwm, 0, 1);
2863 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", S_IWUSR | S_IRUGO, show_pwm,
2864                   store_pwm, 0, 2);
2865 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", S_IWUSR | S_IRUGO,
2866                   show_temp_tolerance, store_temp_tolerance, 0, 0);
2867 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance",
2868                   S_IWUSR | S_IRUGO, show_temp_tolerance, store_temp_tolerance,
2869                   0, 1);
2870
2871 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2872                   0, 3);
2873
2874 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", S_IWUSR | S_IRUGO, show_pwm,
2875                   store_pwm, 0, 4);
2876
2877 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm",
2878                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 0);
2879 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp",
2880                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 0);
2881
2882 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm",
2883                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 1);
2884 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp",
2885                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 1);
2886
2887 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm",
2888                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 2);
2889 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp",
2890                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 2);
2891
2892 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm",
2893                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 3);
2894 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp",
2895                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 3);
2896
2897 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm",
2898                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 4);
2899 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp",
2900                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 4);
2901
2902 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm",
2903                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 5);
2904 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp",
2905                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 5);
2906
2907 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm",
2908                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 6);
2909 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp",
2910                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 6);
2911
2912 /*
2913  * nct6775_pwm_is_visible uses the index into the following array
2914  * to determine if attributes should be created or not.
2915  * Any change in order or content must be matched.
2916  */
2917 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
2918         &sensor_dev_template_pwm,
2919         &sensor_dev_template_pwm_mode,
2920         &sensor_dev_template_pwm_enable,
2921         &sensor_dev_template_pwm_temp_sel,
2922         &sensor_dev_template_pwm_temp_tolerance,
2923         &sensor_dev_template_pwm_crit_temp_tolerance,
2924         &sensor_dev_template_pwm_target_temp,
2925         &sensor_dev_template_fan_target,
2926         &sensor_dev_template_fan_tolerance,
2927         &sensor_dev_template_pwm_stop_time,
2928         &sensor_dev_template_pwm_step_up_time,
2929         &sensor_dev_template_pwm_step_down_time,
2930         &sensor_dev_template_pwm_start,
2931         &sensor_dev_template_pwm_floor,
2932         &sensor_dev_template_pwm_weight_temp_sel,
2933         &sensor_dev_template_pwm_weight_temp_step,
2934         &sensor_dev_template_pwm_weight_temp_step_tol,
2935         &sensor_dev_template_pwm_weight_temp_step_base,
2936         &sensor_dev_template_pwm_weight_duty_step,
2937         &sensor_dev_template_pwm_max,                   /* 19 */
2938         &sensor_dev_template_pwm_step,                  /* 20 */
2939         &sensor_dev_template_pwm_weight_duty_base,      /* 21 */
2940         &sensor_dev_template_pwm_auto_point1_pwm,       /* 22 */
2941         &sensor_dev_template_pwm_auto_point1_temp,
2942         &sensor_dev_template_pwm_auto_point2_pwm,
2943         &sensor_dev_template_pwm_auto_point2_temp,
2944         &sensor_dev_template_pwm_auto_point3_pwm,
2945         &sensor_dev_template_pwm_auto_point3_temp,
2946         &sensor_dev_template_pwm_auto_point4_pwm,
2947         &sensor_dev_template_pwm_auto_point4_temp,
2948         &sensor_dev_template_pwm_auto_point5_pwm,
2949         &sensor_dev_template_pwm_auto_point5_temp,
2950         &sensor_dev_template_pwm_auto_point6_pwm,
2951         &sensor_dev_template_pwm_auto_point6_temp,
2952         &sensor_dev_template_pwm_auto_point7_pwm,
2953         &sensor_dev_template_pwm_auto_point7_temp,      /* 35 */
2954
2955         NULL
2956 };
2957
2958 static struct sensor_template_group nct6775_pwm_template_group = {
2959         .templates = nct6775_attributes_pwm_template,
2960         .is_visible = nct6775_pwm_is_visible,
2961         .base = 1,
2962 };
2963
2964 static ssize_t
2965 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
2966 {
2967         struct nct6775_data *data = dev_get_drvdata(dev);
2968         return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
2969 }
2970
2971 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
2972
2973 /* Case open detection */
2974
2975 static ssize_t
2976 clear_caseopen(struct device *dev, struct device_attribute *attr,
2977                const char *buf, size_t count)
2978 {
2979         struct nct6775_data *data = dev_get_drvdata(dev);
2980         struct nct6775_sio_data *sio_data = dev->platform_data;
2981         int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
2982         unsigned long val;
2983         u8 reg;
2984         int ret;
2985
2986         if (kstrtoul(buf, 10, &val) || val != 0)
2987                 return -EINVAL;
2988
2989         mutex_lock(&data->update_lock);
2990
2991         /*
2992          * Use CR registers to clear caseopen status.
2993          * The CR registers are the same for all chips, and not all chips
2994          * support clearing the caseopen status through "regular" registers.
2995          */
2996         ret = superio_enter(sio_data->sioreg);
2997         if (ret) {
2998                 count = ret;
2999                 goto error;
3000         }
3001
3002         superio_select(sio_data->sioreg, NCT6775_LD_ACPI);
3003         reg = superio_inb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
3004         reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3005         superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3006         reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3007         superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3008         superio_exit(sio_data->sioreg);
3009
3010         data->valid = false;    /* Force cache refresh */
3011 error:
3012         mutex_unlock(&data->update_lock);
3013         return count;
3014 }
3015
3016 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
3017                           clear_caseopen, INTRUSION_ALARM_BASE);
3018 static SENSOR_DEVICE_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
3019                           clear_caseopen, INTRUSION_ALARM_BASE + 1);
3020 static SENSOR_DEVICE_ATTR(intrusion0_beep, S_IWUSR | S_IRUGO, show_beep,
3021                           store_beep, INTRUSION_ALARM_BASE);
3022 static SENSOR_DEVICE_ATTR(intrusion1_beep, S_IWUSR | S_IRUGO, show_beep,
3023                           store_beep, INTRUSION_ALARM_BASE + 1);
3024 static SENSOR_DEVICE_ATTR(beep_enable, S_IWUSR | S_IRUGO, show_beep,
3025                           store_beep, BEEP_ENABLE_BASE);
3026
3027 static umode_t nct6775_other_is_visible(struct kobject *kobj,
3028                                         struct attribute *attr, int index)
3029 {
3030         struct device *dev = container_of(kobj, struct device, kobj);
3031         struct nct6775_data *data = dev_get_drvdata(dev);
3032
3033         if (index == 1 && !data->have_vid)
3034                 return 0;
3035
3036         if (index == 2 || index == 3) {
3037                 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + index - 2] < 0)
3038                         return 0;
3039         }
3040
3041         if (index == 4 || index == 5) {
3042                 if (data->BEEP_BITS[INTRUSION_ALARM_BASE + index - 4] < 0)
3043                         return 0;
3044         }
3045
3046         return attr->mode;
3047 }
3048
3049 /*
3050  * nct6775_other_is_visible uses the index into the following array
3051  * to determine if attributes should be created or not.
3052  * Any change in order or content must be matched.
3053  */
3054 static struct attribute *nct6775_attributes_other[] = {
3055         &dev_attr_name.attr,
3056         &dev_attr_cpu0_vid.attr,                                /* 1 */
3057         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,        /* 2 */
3058         &sensor_dev_attr_intrusion1_alarm.dev_attr.attr,        /* 3 */
3059         &sensor_dev_attr_intrusion0_beep.dev_attr.attr,         /* 4 */
3060         &sensor_dev_attr_intrusion1_beep.dev_attr.attr,         /* 5 */
3061         &sensor_dev_attr_beep_enable.dev_attr.attr,             /* 6 */
3062
3063         NULL
3064 };
3065
3066 static const struct attribute_group nct6775_group_other = {
3067         .attrs = nct6775_attributes_other,
3068         .is_visible = nct6775_other_is_visible,
3069 };
3070
3071 /*
3072  * Driver and device management
3073  */
3074
3075 static void nct6775_device_remove_files(struct device *dev)
3076 {
3077         struct nct6775_data *data = dev_get_drvdata(dev);
3078
3079         if (data->group_pwm)
3080                 sysfs_remove_group(&dev->kobj, data->group_pwm);
3081         if (data->group_in)
3082                 sysfs_remove_group(&dev->kobj, data->group_in);
3083         if (data->group_fan)
3084                 sysfs_remove_group(&dev->kobj, data->group_fan);
3085         if (data->group_temp)
3086                 sysfs_remove_group(&dev->kobj, data->group_temp);
3087
3088         sysfs_remove_group(&dev->kobj, &nct6775_group_other);
3089 }
3090
3091 /* Get the monitoring functions started */
3092 static inline void nct6775_init_device(struct nct6775_data *data)
3093 {
3094         int i;
3095         u8 tmp, diode;
3096
3097         /* Start monitoring if needed */
3098         if (data->REG_CONFIG) {
3099                 tmp = nct6775_read_value(data, data->REG_CONFIG);
3100                 if (!(tmp & 0x01))
3101                         nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
3102         }
3103
3104         /* Enable temperature sensors if needed */
3105         for (i = 0; i < NUM_TEMP; i++) {
3106                 if (!(data->have_temp & (1 << i)))
3107                         continue;
3108                 if (!data->reg_temp_config[i])
3109                         continue;
3110                 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
3111                 if (tmp & 0x01)
3112                         nct6775_write_value(data, data->reg_temp_config[i],
3113                                             tmp & 0xfe);
3114         }
3115
3116         /* Enable VBAT monitoring if needed */
3117         tmp = nct6775_read_value(data, data->REG_VBAT);
3118         if (!(tmp & 0x01))
3119                 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
3120
3121         diode = nct6775_read_value(data, data->REG_DIODE);
3122
3123         for (i = 0; i < data->temp_fixed_num; i++) {
3124                 if (!(data->have_temp_fixed & (1 << i)))
3125                         continue;
3126                 if ((tmp & (data->DIODE_MASK << i)))    /* diode */
3127                         data->temp_type[i]
3128                           = 3 - ((diode >> i) & data->DIODE_MASK);
3129                 else                            /* thermistor */
3130                         data->temp_type[i] = 4;
3131         }
3132 }
3133
3134 static void
3135 nct6775_check_fan_inputs(const struct nct6775_sio_data *sio_data,
3136                          struct nct6775_data *data)
3137 {
3138         int regval;
3139         bool fan3pin, fan3min, fan4pin, fan4min, fan5pin;
3140         bool pwm3pin, pwm4pin, pwm5pin;
3141
3142         /* fan4 and fan5 share some pins with the GPIO and serial flash */
3143         if (data->kind == nct6775) {
3144                 regval = superio_inb(sio_data->sioreg, 0x2c);
3145
3146                 fan3pin = regval & (1 << 6);
3147                 fan3min = fan3pin;
3148                 pwm3pin = regval & (1 << 7);
3149
3150                 /* On NCT6775, fan4 shares pins with the fdc interface */
3151                 fan4pin = !(superio_inb(sio_data->sioreg, 0x2A) & 0x80);
3152                 fan4min = 0;
3153                 fan5pin = 0;
3154                 pwm4pin = 0;
3155                 pwm5pin = 0;
3156         } else if (data->kind == nct6776) {
3157                 bool gpok = superio_inb(sio_data->sioreg, 0x27) & 0x80;
3158
3159                 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3160                 regval = superio_inb(sio_data->sioreg, SIO_REG_ENABLE);
3161
3162                 if (regval & 0x80)
3163                         fan3pin = gpok;
3164                 else
3165                         fan3pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x40);
3166
3167                 if (regval & 0x40)
3168                         fan4pin = gpok;
3169                 else
3170                         fan4pin = superio_inb(sio_data->sioreg, 0x1C) & 0x01;
3171
3172                 if (regval & 0x20)
3173                         fan5pin = gpok;
3174                 else
3175                         fan5pin = superio_inb(sio_data->sioreg, 0x1C) & 0x02;
3176
3177                 fan4min = fan4pin;
3178                 fan3min = fan3pin;
3179                 pwm3pin = fan3pin;
3180                 pwm4pin = 0;
3181                 pwm5pin = 0;
3182         } else if (data->kind == nct6106) {
3183                 regval = superio_inb(sio_data->sioreg, 0x24);
3184                 fan3pin = !(regval & 0x80);
3185                 pwm3pin = regval & 0x08;
3186                 fan3min = fan3pin;
3187
3188                 fan4pin = false;
3189                 fan4min = false;
3190                 fan5pin = false;
3191                 pwm4pin = false;
3192                 pwm5pin = false;
3193         } else {        /* NCT6779D */
3194                 regval = superio_inb(sio_data->sioreg, 0x1c);
3195
3196                 fan3pin = !(regval & (1 << 5));
3197                 fan4pin = !(regval & (1 << 6));
3198                 fan5pin = !(regval & (1 << 7));
3199
3200                 pwm3pin = !(regval & (1 << 0));
3201                 pwm4pin = !(regval & (1 << 1));
3202                 pwm5pin = !(regval & (1 << 2));
3203
3204                 fan3min = fan3pin;
3205                 fan4min = fan4pin;
3206         }
3207
3208         data->has_fan = data->has_fan_min = 0x03; /* fan1 and fan2 */
3209         data->has_fan |= fan3pin << 2;
3210         data->has_fan_min |= fan3min << 2;
3211
3212         data->has_fan |= (fan4pin << 3) | (fan5pin << 4);
3213         data->has_fan_min |= (fan4min << 3) | (fan5pin << 4);
3214
3215         data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) | (pwm5pin << 4);
3216 }
3217
3218 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
3219                              int *available, int *mask)
3220 {
3221         int i;
3222         u8 src;
3223
3224         for (i = 0; i < data->pwm_num && *available; i++) {
3225                 int index;
3226
3227                 if (!regp[i])
3228                         continue;
3229                 src = nct6775_read_value(data, regp[i]);
3230                 src &= 0x1f;
3231                 if (!src || (*mask & (1 << src)))
3232                         continue;
3233                 if (src >= data->temp_label_num ||
3234                     !strlen(data->temp_label[src]))
3235                         continue;
3236
3237                 index = __ffs(*available);
3238                 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3239                 *available &= ~(1 << index);
3240                 *mask |= 1 << src;
3241         }
3242 }
3243
3244 static int nct6775_probe(struct platform_device *pdev)
3245 {
3246         struct device *dev = &pdev->dev;
3247         struct nct6775_sio_data *sio_data = dev->platform_data;
3248         struct nct6775_data *data;
3249         struct resource *res;
3250         int i, s, err = 0;
3251         int src, mask, available;
3252         const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3253         const u16 *reg_temp_alternate, *reg_temp_crit;
3254         const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL;
3255         int num_reg_temp;
3256         u8 cr2a;
3257         struct attribute_group *group;
3258
3259         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3260         if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3261                                  DRVNAME))
3262                 return -EBUSY;
3263
3264         data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3265                             GFP_KERNEL);
3266         if (!data)
3267                 return -ENOMEM;
3268
3269         data->kind = sio_data->kind;
3270         data->addr = res->start;
3271         mutex_init(&data->update_lock);
3272         data->name = nct6775_device_names[data->kind];
3273         data->bank = 0xff;              /* Force initial bank selection */
3274         platform_set_drvdata(pdev, data);
3275
3276         switch (data->kind) {
3277         case nct6106:
3278                 data->in_num = 9;
3279                 data->pwm_num = 3;
3280                 data->auto_pwm_num = 4;
3281                 data->temp_fixed_num = 3;
3282                 data->num_temp_alarms = 6;
3283                 data->num_temp_beeps = 6;
3284
3285                 data->fan_from_reg = fan_from_reg13;
3286                 data->fan_from_reg_min = fan_from_reg13;
3287
3288                 data->temp_label = nct6776_temp_label;
3289                 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3290
3291                 data->REG_VBAT = NCT6106_REG_VBAT;
3292                 data->REG_DIODE = NCT6106_REG_DIODE;
3293                 data->DIODE_MASK = NCT6106_DIODE_MASK;
3294                 data->REG_VIN = NCT6106_REG_IN;
3295                 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3296                 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3297                 data->REG_TARGET = NCT6106_REG_TARGET;
3298                 data->REG_FAN = NCT6106_REG_FAN;
3299                 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
3300                 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
3301                 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
3302                 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
3303                 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
3304                 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
3305                 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
3306                 data->REG_PWM[0] = NCT6106_REG_PWM;
3307                 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
3308                 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
3309                 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3310                 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3311                 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3312                 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3313                 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3314                 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
3315                 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
3316                 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
3317                 data->REG_CRITICAL_TEMP_TOLERANCE
3318                   = NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
3319                 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
3320                 data->CRITICAL_PWM_ENABLE_MASK
3321                   = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3322                 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
3323                 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3324                 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3325                 data->REG_TEMP_SEL = NCT6106_REG_TEMP_SEL;
3326                 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3327                 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3328                 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3329                 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3330                 data->REG_ALARM = NCT6106_REG_ALARM;
3331                 data->ALARM_BITS = NCT6106_ALARM_BITS;
3332                 data->REG_BEEP = NCT6106_REG_BEEP;
3333                 data->BEEP_BITS = NCT6106_BEEP_BITS;
3334
3335                 reg_temp = NCT6106_REG_TEMP;
3336                 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3337                 reg_temp_over = NCT6106_REG_TEMP_OVER;
3338                 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3339                 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3340                 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3341                 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3342                 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3343                 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3344
3345                 break;
3346         case nct6775:
3347                 data->in_num = 9;
3348                 data->pwm_num = 3;
3349                 data->auto_pwm_num = 6;
3350                 data->has_fan_div = true;
3351                 data->temp_fixed_num = 3;
3352                 data->num_temp_alarms = 3;
3353                 data->num_temp_beeps = 3;
3354
3355                 data->ALARM_BITS = NCT6775_ALARM_BITS;
3356                 data->BEEP_BITS = NCT6775_BEEP_BITS;
3357
3358                 data->fan_from_reg = fan_from_reg16;
3359                 data->fan_from_reg_min = fan_from_reg8;
3360                 data->target_temp_mask = 0x7f;
3361                 data->tolerance_mask = 0x0f;
3362                 data->speed_tolerance_limit = 15;
3363
3364                 data->temp_label = nct6775_temp_label;
3365                 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
3366
3367                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3368                 data->REG_VBAT = NCT6775_REG_VBAT;
3369                 data->REG_DIODE = NCT6775_REG_DIODE;
3370                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3371                 data->REG_VIN = NCT6775_REG_IN;
3372                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3373                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3374                 data->REG_TARGET = NCT6775_REG_TARGET;
3375                 data->REG_FAN = NCT6775_REG_FAN;
3376                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3377                 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3378                 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3379                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3380                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3381                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3382                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3383                 data->REG_PWM[0] = NCT6775_REG_PWM;
3384                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3385                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3386                 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3387                 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3388                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3389                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3390                 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3391                 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3392                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3393                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3394                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3395                 data->REG_CRITICAL_TEMP_TOLERANCE
3396                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3397                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3398                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3399                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3400                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3401                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3402                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3403                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3404                 data->REG_ALARM = NCT6775_REG_ALARM;
3405                 data->REG_BEEP = NCT6775_REG_BEEP;
3406
3407                 reg_temp = NCT6775_REG_TEMP;
3408                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3409                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3410                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3411                 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3412                 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3413                 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3414
3415                 break;
3416         case nct6776:
3417                 data->in_num = 9;
3418                 data->pwm_num = 3;
3419                 data->auto_pwm_num = 4;
3420                 data->has_fan_div = false;
3421                 data->temp_fixed_num = 3;
3422                 data->num_temp_alarms = 3;
3423                 data->num_temp_beeps = 6;
3424
3425                 data->ALARM_BITS = NCT6776_ALARM_BITS;
3426                 data->BEEP_BITS = NCT6776_BEEP_BITS;
3427
3428                 data->fan_from_reg = fan_from_reg13;
3429                 data->fan_from_reg_min = fan_from_reg13;
3430                 data->target_temp_mask = 0xff;
3431                 data->tolerance_mask = 0x07;
3432                 data->speed_tolerance_limit = 63;
3433
3434                 data->temp_label = nct6776_temp_label;
3435                 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3436
3437                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3438                 data->REG_VBAT = NCT6775_REG_VBAT;
3439                 data->REG_DIODE = NCT6775_REG_DIODE;
3440                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3441                 data->REG_VIN = NCT6775_REG_IN;
3442                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3443                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3444                 data->REG_TARGET = NCT6775_REG_TARGET;
3445                 data->REG_FAN = NCT6775_REG_FAN;
3446                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3447                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3448                 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3449                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3450                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3451                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3452                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3453                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3454                 data->REG_PWM[0] = NCT6775_REG_PWM;
3455                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3456                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3457                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3458                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3459                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3460                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3461                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3462                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3463                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3464                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3465                 data->REG_CRITICAL_TEMP_TOLERANCE
3466                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3467                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3468                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3469                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3470                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3471                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3472                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3473                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3474                 data->REG_ALARM = NCT6775_REG_ALARM;
3475                 data->REG_BEEP = NCT6776_REG_BEEP;
3476
3477                 reg_temp = NCT6775_REG_TEMP;
3478                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3479                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3480                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3481                 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3482                 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3483                 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3484
3485                 break;
3486         case nct6779:
3487                 data->in_num = 15;
3488                 data->pwm_num = 5;
3489                 data->auto_pwm_num = 4;
3490                 data->has_fan_div = false;
3491                 data->temp_fixed_num = 6;
3492                 data->num_temp_alarms = 2;
3493                 data->num_temp_beeps = 2;
3494
3495                 data->ALARM_BITS = NCT6779_ALARM_BITS;
3496                 data->BEEP_BITS = NCT6779_BEEP_BITS;
3497
3498                 data->fan_from_reg = fan_from_reg13;
3499                 data->fan_from_reg_min = fan_from_reg13;
3500                 data->target_temp_mask = 0xff;
3501                 data->tolerance_mask = 0x07;
3502                 data->speed_tolerance_limit = 63;
3503
3504                 data->temp_label = nct6779_temp_label;
3505                 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3506
3507                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3508                 data->REG_VBAT = NCT6775_REG_VBAT;
3509                 data->REG_DIODE = NCT6775_REG_DIODE;
3510                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3511                 data->REG_VIN = NCT6779_REG_IN;
3512                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3513                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3514                 data->REG_TARGET = NCT6775_REG_TARGET;
3515                 data->REG_FAN = NCT6779_REG_FAN;
3516                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3517                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3518                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3519                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3520                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3521                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3522                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3523                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3524                 data->REG_PWM[0] = NCT6775_REG_PWM;
3525                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3526                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3527                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3528                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3529                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3530                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3531                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3532                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3533                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3534                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3535                 data->REG_CRITICAL_TEMP_TOLERANCE
3536                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3537                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3538                 data->CRITICAL_PWM_ENABLE_MASK
3539                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3540                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3541                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3542                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3543                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3544                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3545                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3546                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3547                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3548                 data->REG_ALARM = NCT6779_REG_ALARM;
3549                 data->REG_BEEP = NCT6776_REG_BEEP;
3550
3551                 reg_temp = NCT6779_REG_TEMP;
3552                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3553                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3554                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3555                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3556                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3557                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3558
3559                 break;
3560         default:
3561                 return -ENODEV;
3562         }
3563         data->have_in = (1 << data->in_num) - 1;
3564         data->have_temp = 0;
3565
3566         /*
3567          * On some boards, not all available temperature sources are monitored,
3568          * even though some of the monitoring registers are unused.
3569          * Get list of unused monitoring registers, then detect if any fan
3570          * controls are configured to use unmonitored temperature sources.
3571          * If so, assign the unmonitored temperature sources to available
3572          * monitoring registers.
3573          */
3574         mask = 0;
3575         available = 0;
3576         for (i = 0; i < num_reg_temp; i++) {
3577                 if (reg_temp[i] == 0)
3578                         continue;
3579
3580                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3581                 if (!src || (mask & (1 << src)))
3582                         available |= 1 << i;
3583
3584                 mask |= 1 << src;
3585         }
3586
3587         /*
3588          * Now find unmonitored temperature registers and enable monitoring
3589          * if additional monitoring registers are available.
3590          */
3591         add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
3592         add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
3593
3594         mask = 0;
3595         s = NUM_TEMP_FIXED;     /* First dynamic temperature attribute */
3596         for (i = 0; i < num_reg_temp; i++) {
3597                 if (reg_temp[i] == 0)
3598                         continue;
3599
3600                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3601                 if (!src || (mask & (1 << src)))
3602                         continue;
3603
3604                 if (src >= data->temp_label_num ||
3605                     !strlen(data->temp_label[src])) {
3606                         dev_info(dev,
3607                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3608                                  src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
3609                         continue;
3610                 }
3611
3612                 mask |= 1 << src;
3613
3614                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3615                 if (src <= data->temp_fixed_num) {
3616                         data->have_temp |= 1 << (src - 1);
3617                         data->have_temp_fixed |= 1 << (src - 1);
3618                         data->reg_temp[0][src - 1] = reg_temp[i];
3619                         data->reg_temp[1][src - 1] = reg_temp_over[i];
3620                         data->reg_temp[2][src - 1] = reg_temp_hyst[i];
3621                         if (reg_temp_crit_h && reg_temp_crit_h[i])
3622                                 data->reg_temp[3][src - 1] = reg_temp_crit_h[i];
3623                         else if (reg_temp_crit[src - 1])
3624                                 data->reg_temp[3][src - 1]
3625                                   = reg_temp_crit[src - 1];
3626                         if (reg_temp_crit_l && reg_temp_crit_l[i])
3627                                 data->reg_temp[4][src - 1] = reg_temp_crit_l[i];
3628                         data->reg_temp_config[src - 1] = reg_temp_config[i];
3629                         data->temp_src[src - 1] = src;
3630                         continue;
3631                 }
3632
3633                 if (s >= NUM_TEMP)
3634                         continue;
3635
3636                 /* Use dynamic index for other sources */
3637                 data->have_temp |= 1 << s;
3638                 data->reg_temp[0][s] = reg_temp[i];
3639                 data->reg_temp[1][s] = reg_temp_over[i];
3640                 data->reg_temp[2][s] = reg_temp_hyst[i];
3641                 data->reg_temp_config[s] = reg_temp_config[i];
3642                 if (reg_temp_crit_h && reg_temp_crit_h[i])
3643                         data->reg_temp[3][s] = reg_temp_crit_h[i];
3644                 else if (reg_temp_crit[src - 1])
3645                         data->reg_temp[3][s] = reg_temp_crit[src - 1];
3646                 if (reg_temp_crit_l && reg_temp_crit_l[i])
3647                         data->reg_temp[4][s] = reg_temp_crit_l[i];
3648
3649                 data->temp_src[s] = src;
3650                 s++;
3651         }
3652
3653 #ifdef USE_ALTERNATE
3654         /*
3655          * Go through the list of alternate temp registers and enable
3656          * if possible.
3657          * The temperature is already monitored if the respective bit in <mask>
3658          * is set.
3659          */
3660         for (i = 0; i < data->temp_label_num - 1; i++) {
3661                 if (!reg_temp_alternate[i])
3662                         continue;
3663                 if (mask & (1 << (i + 1)))
3664                         continue;
3665                 if (i < data->temp_fixed_num) {
3666                         if (data->have_temp & (1 << i))
3667                                 continue;
3668                         data->have_temp |= 1 << i;
3669                         data->have_temp_fixed |= 1 << i;
3670                         data->reg_temp[0][i] = reg_temp_alternate[i];
3671                         if (i < num_reg_temp) {
3672                                 data->reg_temp[1][i] = reg_temp_over[i];
3673                                 data->reg_temp[2][i] = reg_temp_hyst[i];
3674                         }
3675                         data->temp_src[i] = i + 1;
3676                         continue;
3677                 }
3678
3679                 if (s >= NUM_TEMP)      /* Abort if no more space */
3680                         break;
3681
3682                 data->have_temp |= 1 << s;
3683                 data->reg_temp[0][s] = reg_temp_alternate[i];
3684                 data->temp_src[s] = i + 1;
3685                 s++;
3686         }
3687 #endif /* USE_ALTERNATE */
3688
3689         /* Initialize the chip */
3690         nct6775_init_device(data);
3691
3692         err = superio_enter(sio_data->sioreg);
3693         if (err)
3694                 return err;
3695
3696         cr2a = superio_inb(sio_data->sioreg, 0x2a);
3697         switch (data->kind) {
3698         case nct6775:
3699                 data->have_vid = (cr2a & 0x40);
3700                 break;
3701         case nct6776:
3702                 data->have_vid = (cr2a & 0x60) == 0x40;
3703                 break;
3704         case nct6106:
3705         case nct6779:
3706                 break;
3707         }
3708
3709         /*
3710          * Read VID value
3711          * We can get the VID input values directly at logical device D 0xe3.
3712          */
3713         if (data->have_vid) {
3714                 superio_select(sio_data->sioreg, NCT6775_LD_VID);
3715                 data->vid = superio_inb(sio_data->sioreg, 0xe3);
3716                 data->vrm = vid_which_vrm();
3717         }
3718
3719         if (fan_debounce) {
3720                 u8 tmp;
3721
3722                 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3723                 tmp = superio_inb(sio_data->sioreg,
3724                                   NCT6775_REG_CR_FAN_DEBOUNCE);
3725                 switch (data->kind) {
3726                 case nct6106:
3727                         tmp |= 0xe0;
3728                         break;
3729                 case nct6775:
3730                         tmp |= 0x1e;
3731                         break;
3732                 case nct6776:
3733                 case nct6779:
3734                         tmp |= 0x3e;
3735                         break;
3736                 }
3737                 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
3738                              tmp);
3739                 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
3740                          data->name);
3741         }
3742
3743         nct6775_check_fan_inputs(sio_data, data);
3744
3745         superio_exit(sio_data->sioreg);
3746
3747         /* Read fan clock dividers immediately */
3748         nct6775_init_fan_common(dev, data);
3749
3750         /* Register sysfs hooks */
3751         group = nct6775_create_attr_group(dev, &nct6775_pwm_template_group,
3752                                           data->pwm_num);
3753         if (IS_ERR(group)) {
3754                 err = PTR_ERR(group);
3755                 goto exit_remove;
3756         }
3757         data->group_pwm = group;
3758
3759         group = nct6775_create_attr_group(dev, &nct6775_in_template_group,
3760                                           fls(data->have_in));
3761         if (IS_ERR(group)) {
3762                 err = PTR_ERR(group);
3763                 goto exit_remove;
3764         }
3765         data->group_in = group;
3766
3767         group = nct6775_create_attr_group(dev, &nct6775_fan_template_group,
3768                                           fls(data->has_fan));
3769         if (IS_ERR(group)) {
3770                 err = PTR_ERR(group);
3771                 goto exit_remove;
3772         }
3773         data->group_fan = group;
3774
3775         group = nct6775_create_attr_group(dev, &nct6775_temp_template_group,
3776                                           fls(data->have_temp));
3777         if (IS_ERR(group)) {
3778                 err = PTR_ERR(group);
3779                 goto exit_remove;
3780         }
3781         data->group_temp = group;
3782
3783         err = sysfs_create_group(&dev->kobj, &nct6775_group_other);
3784         if (err)
3785                 goto exit_remove;
3786
3787         data->hwmon_dev = hwmon_device_register(dev);
3788         if (IS_ERR(data->hwmon_dev)) {
3789                 err = PTR_ERR(data->hwmon_dev);
3790                 goto exit_remove;
3791         }
3792
3793         return 0;
3794
3795 exit_remove:
3796         nct6775_device_remove_files(dev);
3797         return err;
3798 }
3799
3800 static int nct6775_remove(struct platform_device *pdev)
3801 {
3802         struct nct6775_data *data = platform_get_drvdata(pdev);
3803
3804         hwmon_device_unregister(data->hwmon_dev);
3805         nct6775_device_remove_files(&pdev->dev);
3806
3807         return 0;
3808 }
3809
3810 #ifdef CONFIG_PM
3811 static int nct6775_suspend(struct device *dev)
3812 {
3813         struct nct6775_data *data = nct6775_update_device(dev);
3814         struct nct6775_sio_data *sio_data = dev->platform_data;
3815
3816         mutex_lock(&data->update_lock);
3817         data->vbat = nct6775_read_value(data, data->REG_VBAT);
3818         if (sio_data->kind == nct6775) {
3819                 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
3820                 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
3821         }
3822         mutex_unlock(&data->update_lock);
3823
3824         return 0;
3825 }
3826
3827 static int nct6775_resume(struct device *dev)
3828 {
3829         struct nct6775_data *data = dev_get_drvdata(dev);
3830         struct nct6775_sio_data *sio_data = dev->platform_data;
3831         int i, j;
3832
3833         mutex_lock(&data->update_lock);
3834         data->bank = 0xff;              /* Force initial bank selection */
3835
3836         /* Restore limits */
3837         for (i = 0; i < data->in_num; i++) {
3838                 if (!(data->have_in & (1 << i)))
3839                         continue;
3840
3841                 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
3842                                     data->in[i][1]);
3843                 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
3844                                     data->in[i][2]);
3845         }
3846
3847         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
3848                 if (!(data->has_fan_min & (1 << i)))
3849                         continue;
3850
3851                 nct6775_write_value(data, data->REG_FAN_MIN[i],
3852                                     data->fan_min[i]);
3853         }
3854
3855         for (i = 0; i < NUM_TEMP; i++) {
3856                 if (!(data->have_temp & (1 << i)))
3857                         continue;
3858
3859                 for (j = 1; j < ARRAY_SIZE(data->reg_temp); j++)
3860                         if (data->reg_temp[j][i])
3861                                 nct6775_write_temp(data, data->reg_temp[j][i],
3862                                                    data->temp[j][i]);
3863         }
3864
3865         /* Restore other settings */
3866         nct6775_write_value(data, data->REG_VBAT, data->vbat);
3867         if (sio_data->kind == nct6775) {
3868                 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
3869                 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
3870         }
3871
3872         /* Force re-reading all values */
3873         data->valid = false;
3874         mutex_unlock(&data->update_lock);
3875
3876         return 0;
3877 }
3878
3879 static const struct dev_pm_ops nct6775_dev_pm_ops = {
3880         .suspend = nct6775_suspend,
3881         .resume = nct6775_resume,
3882 };
3883
3884 #define NCT6775_DEV_PM_OPS      (&nct6775_dev_pm_ops)
3885 #else
3886 #define NCT6775_DEV_PM_OPS      NULL
3887 #endif /* CONFIG_PM */
3888
3889 static struct platform_driver nct6775_driver = {
3890         .driver = {
3891                 .owner  = THIS_MODULE,
3892                 .name   = DRVNAME,
3893                 .pm     = NCT6775_DEV_PM_OPS,
3894         },
3895         .probe          = nct6775_probe,
3896         .remove         = nct6775_remove,
3897 };
3898
3899 static const char * const nct6775_sio_names[] __initconst = {
3900         "NCT6106D",
3901         "NCT6775F",
3902         "NCT6776D/F",
3903         "NCT6779D",
3904 };
3905
3906 /* nct6775_find() looks for a '627 in the Super-I/O config space */
3907 static int __init nct6775_find(int sioaddr, struct nct6775_sio_data *sio_data)
3908 {
3909         u16 val;
3910         int err;
3911         int addr;
3912
3913         err = superio_enter(sioaddr);
3914         if (err)
3915                 return err;
3916
3917         if (force_id)
3918                 val = force_id;
3919         else
3920                 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
3921                     | superio_inb(sioaddr, SIO_REG_DEVID + 1);
3922         switch (val & SIO_ID_MASK) {
3923         case SIO_NCT6106_ID:
3924                 sio_data->kind = nct6106;
3925                 break;
3926         case SIO_NCT6775_ID:
3927                 sio_data->kind = nct6775;
3928                 break;
3929         case SIO_NCT6776_ID:
3930                 sio_data->kind = nct6776;
3931                 break;
3932         case SIO_NCT6779_ID:
3933                 sio_data->kind = nct6779;
3934                 break;
3935         default:
3936                 if (val != 0xffff)
3937                         pr_debug("unsupported chip ID: 0x%04x\n", val);
3938                 superio_exit(sioaddr);
3939                 return -ENODEV;
3940         }
3941
3942         /* We have a known chip, find the HWM I/O address */
3943         superio_select(sioaddr, NCT6775_LD_HWM);
3944         val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
3945             | superio_inb(sioaddr, SIO_REG_ADDR + 1);
3946         addr = val & IOREGION_ALIGNMENT;
3947         if (addr == 0) {
3948                 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
3949                 superio_exit(sioaddr);
3950                 return -ENODEV;
3951         }
3952
3953         /* Activate logical device if needed */
3954         val = superio_inb(sioaddr, SIO_REG_ENABLE);
3955         if (!(val & 0x01)) {
3956                 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
3957                 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
3958         }
3959
3960         superio_exit(sioaddr);
3961         pr_info("Found %s or compatible chip at %#x:%#x\n",
3962                 nct6775_sio_names[sio_data->kind], sioaddr, addr);
3963         sio_data->sioreg = sioaddr;
3964
3965         return addr;
3966 }
3967
3968 /*
3969  * when Super-I/O functions move to a separate file, the Super-I/O
3970  * bus will manage the lifetime of the device and this module will only keep
3971  * track of the nct6775 driver. But since we platform_device_alloc(), we
3972  * must keep track of the device
3973  */
3974 static struct platform_device *pdev[2];
3975
3976 static int __init sensors_nct6775_init(void)
3977 {
3978         int i, err;
3979         bool found = false;
3980         int address;
3981         struct resource res;
3982         struct nct6775_sio_data sio_data;
3983         int sioaddr[2] = { 0x2e, 0x4e };
3984
3985         err = platform_driver_register(&nct6775_driver);
3986         if (err)
3987                 return err;
3988
3989         /*
3990          * initialize sio_data->kind and sio_data->sioreg.
3991          *
3992          * when Super-I/O functions move to a separate file, the Super-I/O
3993          * driver will probe 0x2e and 0x4e and auto-detect the presence of a
3994          * nct6775 hardware monitor, and call probe()
3995          */
3996         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
3997                 address = nct6775_find(sioaddr[i], &sio_data);
3998                 if (address <= 0)
3999                         continue;
4000
4001                 found = true;
4002
4003                 pdev[i] = platform_device_alloc(DRVNAME, address);
4004                 if (!pdev[i]) {
4005                         err = -ENOMEM;
4006                         goto exit_device_put;
4007                 }
4008
4009                 err = platform_device_add_data(pdev[i], &sio_data,
4010                                                sizeof(struct nct6775_sio_data));
4011                 if (err)
4012                         goto exit_device_put;
4013
4014                 memset(&res, 0, sizeof(res));
4015                 res.name = DRVNAME;
4016                 res.start = address + IOREGION_OFFSET;
4017                 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
4018                 res.flags = IORESOURCE_IO;
4019
4020                 err = acpi_check_resource_conflict(&res);
4021                 if (err) {
4022                         platform_device_put(pdev[i]);
4023                         pdev[i] = NULL;
4024                         continue;
4025                 }
4026
4027                 err = platform_device_add_resources(pdev[i], &res, 1);
4028                 if (err)
4029                         goto exit_device_put;
4030
4031                 /* platform_device_add calls probe() */
4032                 err = platform_device_add(pdev[i]);
4033                 if (err)
4034                         goto exit_device_put;
4035         }
4036         if (!found) {
4037                 err = -ENODEV;
4038                 goto exit_unregister;
4039         }
4040
4041         return 0;
4042
4043 exit_device_put:
4044         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4045                 if (pdev[i])
4046                         platform_device_put(pdev[i]);
4047         }
4048 exit_unregister:
4049         platform_driver_unregister(&nct6775_driver);
4050         return err;
4051 }
4052
4053 static void __exit sensors_nct6775_exit(void)
4054 {
4055         int i;
4056
4057         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4058                 if (pdev[i])
4059                         platform_device_unregister(pdev[i]);
4060         }
4061         platform_driver_unregister(&nct6775_driver);
4062 }
4063
4064 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4065 MODULE_DESCRIPTION("NCT6775F/NCT6776F/NCT6779D driver");
4066 MODULE_LICENSE("GPL");
4067
4068 module_init(sensors_nct6775_init);
4069 module_exit(sensors_nct6775_exit);