git.sur5r.net Git - groeck-nct6775/blob - nct6775.c

   1 /*
   2  * nct6775 - Driver for the hardware monitoring functionality of
   3  *             Nuvoton NCT677x Super-I/O chips
   4  *
   5  * Copyright (C) 2012  Guenter Roeck <linux@roeck-us.net>
   6  *
   7  * Derived from w83627ehf driver
   8  * Copyright (C) 2005-2012  Jean Delvare <khali@linux-fr.org>
   9  * Copyright (C) 2006  Yuan Mu (Winbond),
  10  *                     Rudolf Marek <r.marek@assembler.cz>
  11  *                     David Hubbard <david.c.hubbard@gmail.com>
  12  *                     Daniel J Blueman <daniel.blueman@gmail.com>
  13  * Copyright (C) 2010  Sheng-Yuan Huang (Nuvoton) (PS00)
  14  *
  15  * Shamelessly ripped from the w83627hf driver
  16  * Copyright (C) 2003  Mark Studebaker
  17  *
  18  * This program is free software; you can redistribute it and/or modify
  19  * it under the terms of the GNU General Public License as published by
  20  * the Free Software Foundation; either version 2 of the License, or
  21  * (at your option) any later version.
  22  *
  23  * This program is distributed in the hope that it will be useful,
  24  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26  * GNU General Public License for more details.
  27  *
  28  * You should have received a copy of the GNU General Public License
  29  * along with this program; if not, write to the Free Software
  30  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  31  *
  32  *
  33  * Supports the following chips:
  34  *
  35  * Chip        #vin    #fan    #pwm    #temp  chip IDs       man ID
  36  * nct6775f     9      4       3       6+3    0xb470 0xc1    0x5ca3
  37  * nct6776f     9      5       3       6+3    0xc330 0xc1    0x5ca3
  38  * nct6779d    15      5       5       2+6    0xc560 0xc1    0x5ca3
  39  *
  40  * #temp lists the number of monitored temperature sources (first value) plus
  41  * the number of directly connectable temperature sensors (second value).
  42  */
  43
  44 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  45
  46 #include <linux/module.h>
  47 #include <linux/init.h>
  48 #include <linux/slab.h>
  49 #include <linux/jiffies.h>
  50 #include <linux/platform_device.h>
  51 #include <linux/hwmon.h>
  52 #include <linux/hwmon-sysfs.h>
  53 #include <linux/hwmon-vid.h>
  54 #include <linux/err.h>
  55 #include <linux/mutex.h>
  56 #include <linux/acpi.h>
  57 #include <linux/io.h>
  58 #include "lm75.h"
  59 #include "compat.h"
  60
  61 #define USE_ALTERNATE
  62
  63 enum kinds { nct6775, nct6776, nct6779 };
  64
  65 /* used to set data->name = nct6775_device_names[data->sio_kind] */
  66 static const char * const nct6775_device_names[] = {
  67         "nct6775",
  68         "nct6776",
  69         "nct6779",
  70 };
  71
  72 static unsigned short force_id;
  73 module_param(force_id, ushort, 0);
  74 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  75
  76 static unsigned short fan_debounce;
  77 module_param(fan_debounce, ushort, 0);
  78 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
  79
  80 #define DRVNAME "nct6775"
  81
  82 /*
  83  * Super-I/O constants and functions
  84  */
  85
  86 #define NCT6775_LD_ACPI         0x0a
  87 #define NCT6775_LD_HWM          0x0b
  88 #define NCT6775_LD_VID          0x0d
  89
  90 #define SIO_REG_LDSEL           0x07    /* Logical device select */
  91 #define SIO_REG_DEVID           0x20    /* Device ID (2 bytes) */
  92 #define SIO_REG_ENABLE          0x30    /* Logical device enable */
  93 #define SIO_REG_ADDR            0x60    /* Logical device address (2 bytes) */
  94
  95 #define SIO_NCT6775_ID          0xb470
  96 #define SIO_NCT6776_ID          0xc330
  97 #define SIO_NCT6779_ID          0xc560
  98 #define SIO_ID_MASK             0xFFF0
  99
 100 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
 101
 102 static inline void
 103 superio_outb(int ioreg, int reg, int val)
 104 {
 105         outb(reg, ioreg);
 106         outb(val, ioreg + 1);
 107 }
 108
 109 static inline int
 110 superio_inb(int ioreg, int reg)
 111 {
 112         outb(reg, ioreg);
 113         return inb(ioreg + 1);
 114 }
 115
 116 static inline void
 117 superio_select(int ioreg, int ld)
 118 {
 119         outb(SIO_REG_LDSEL, ioreg);
 120         outb(ld, ioreg + 1);
 121 }
 122
 123 static inline int
 124 superio_enter(int ioreg)
 125 {
 126         /*
 127          * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
 128          */
 129         if (!request_muxed_region(ioreg, 2, DRVNAME))
 130                 return -EBUSY;
 131
 132         outb(0x87, ioreg);
 133         outb(0x87, ioreg);
 134
 135         return 0;
 136 }
 137
 138 static inline void
 139 superio_exit(int ioreg)
 140 {
 141         outb(0xaa, ioreg);
 142         outb(0x02, ioreg);
 143         outb(0x02, ioreg + 1);
 144         release_region(ioreg, 2);
 145 }
 146
 147 /*
 148  * ISA constants
 149  */
 150
 151 #define IOREGION_ALIGNMENT      (~7)
 152 #define IOREGION_OFFSET         5
 153 #define IOREGION_LENGTH         2
 154 #define ADDR_REG_OFFSET         0
 155 #define DATA_REG_OFFSET         1
 156
 157 #define NCT6775_REG_BANK        0x4E
 158 #define NCT6775_REG_CONFIG      0x40
 159
 160 /*
 161  * Not currently used:
 162  * REG_MAN_ID has the value 0x5ca3 for all supported chips.
 163  * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
 164  * REG_MAN_ID is at port 0x4f
 165  * REG_CHIP_ID is at port 0x58
 166  */
 167
 168 #define NUM_TEMP        10      /* Max number of temp attribute sets w/ limits*/
 169 #define NUM_TEMP_FIXED  6       /* Max number of fixed temp attribute sets */
 170
 171 #define NUM_REG_ALARM   4       /* Max number of alarm registers */
 172
 173 /* Common and NCT6775 specific data */
 174
 175 /* Voltage min/max registers for nr=7..14 are in bank 5 */
 176
 177 static const u16 NCT6775_REG_IN_MAX[] = {
 178         0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
 179         0x55c, 0x55e, 0x560, 0x562 };
 180 static const u16 NCT6775_REG_IN_MIN[] = {
 181         0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
 182         0x55d, 0x55f, 0x561, 0x563 };
 183 static const u16 NCT6775_REG_IN[] = {
 184         0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
 185 };
 186
 187 #define NCT6775_REG_VBAT                0x5D
 188 #define NCT6775_REG_DIODE               0x5E
 189
 190 #define NCT6775_REG_FANDIV1             0x506
 191 #define NCT6775_REG_FANDIV2             0x507
 192
 193 #define NCT6775_REG_CR_FAN_DEBOUNCE     0xf0
 194
 195 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
 196
 197 /* 0..15 voltages, 16..23 fans, 24..31 temperatures */
 198
 199 static const s8 NCT6775_ALARM_BITS[] = {
 200         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 201         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 202         -1,                             /* unused */
 203         6, 7, 11, 10, 23,               /* fan1..fan5 */
 204         -1, -1, -1,                     /* unused */
 205         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 206         12, -1 };                       /* intrusion0, intrusion1 */
 207
 208 #define FAN_ALARM_BASE          16
 209 #define TEMP_ALARM_BASE         24
 210 #define INTRUSION_ALARM_BASE    30
 211
 212 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
 213 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
 214
 215 /* DC or PWM output fan configuration */
 216 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
 217 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
 218
 219 /* Advanced Fan control, some values are common for all fans */
 220
 221 static const u16 NCT6775_REG_TARGET[] = { 0x101, 0x201, 0x301, 0x801, 0x901 };
 222 static const u16 NCT6775_REG_FAN_MODE[] = { 0x102, 0x202, 0x302, 0x802, 0x902 };
 223 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
 224         0x103, 0x203, 0x303, 0x803, 0x903 };
 225 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
 226         0x104, 0x204, 0x304, 0x804, 0x904 };
 227 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
 228         0x105, 0x205, 0x305, 0x805, 0x905 };
 229 static const u16 NCT6775_REG_FAN_START_OUTPUT[]
 230         = { 0x106, 0x206, 0x306, 0x806, 0x906 };
 231 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
 232 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
 233
 234 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
 235         0x107, 0x207, 0x307, 0x807, 0x907 };
 236 static const u16 NCT6775_REG_PWM[] = { 0x109, 0x209, 0x309, 0x809, 0x909 };
 237 static const u16 NCT6775_REG_PWM_READ[] = { 0x01, 0x03, 0x11, 0x13, 0x15 };
 238
 239 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
 240 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
 241 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
 242
 243 static const u16 NCT6775_REG_TEMP[] = {
 244         0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
 245
 246 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 247         0, 0x152, 0x252, 0x628, 0x629, 0x62A };
 248 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 249         0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
 250 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 251         0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
 252
 253 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 254         0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
 255
 256 static const u16 NCT6775_REG_TEMP_SEL[] = {
 257         0x100, 0x200, 0x300, 0x800, 0x900 };
 258
 259 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
 260         0x139, 0x239, 0x339, 0x839, 0x939 };
 261 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
 262         0x13a, 0x23a, 0x33a, 0x83a, 0x93a };
 263 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
 264         0x13b, 0x23b, 0x33b, 0x83b, 0x93b };
 265 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
 266         0x13c, 0x23c, 0x33c, 0x83c, 0x93c };
 267 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
 268         0x13d, 0x23d, 0x33d, 0x83d, 0x93d };
 269
 270 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
 271
 272 static const u16 NCT6775_REG_AUTO_TEMP[] = {
 273         0x121, 0x221, 0x321, 0x821, 0x921 };
 274 static const u16 NCT6775_REG_AUTO_PWM[] = {
 275         0x127, 0x227, 0x327, 0x827, 0x927 };
 276
 277 #define NCT6775_AUTO_TEMP(data, nr, p)  ((data)->REG_AUTO_TEMP[nr] + (p))
 278 #define NCT6775_AUTO_PWM(data, nr, p)   ((data)->REG_AUTO_PWM[nr] + (p))
 279
 280 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
 281
 282 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
 283         0x135, 0x235, 0x335, 0x835, 0x935 };
 284 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
 285         0x138, 0x238, 0x338, 0x838, 0x938 };
 286
 287 static const char *const nct6775_temp_label[] = {
 288         "",
 289         "SYSTIN",
 290         "CPUTIN",
 291         "AUXTIN",
 292         "AMD SB-TSI",
 293         "PECI Agent 0",
 294         "PECI Agent 1",
 295         "PECI Agent 2",
 296         "PECI Agent 3",
 297         "PECI Agent 4",
 298         "PECI Agent 5",
 299         "PECI Agent 6",
 300         "PECI Agent 7",
 301         "PCH_CHIP_CPU_MAX_TEMP",
 302         "PCH_CHIP_TEMP",
 303         "PCH_CPU_TEMP",
 304         "PCH_MCH_TEMP",
 305         "PCH_DIM0_TEMP",
 306         "PCH_DIM1_TEMP",
 307         "PCH_DIM2_TEMP",
 308         "PCH_DIM3_TEMP"
 309 };
 310
 311 static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
 312         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
 313
 314 static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
 315         = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
 316             0xa07 };
 317
 318 /* NCT6776 specific data */
 319
 320 static const s8 NCT6776_ALARM_BITS[] = {
 321         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 322         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 323         -1,                             /* unused */
 324         6, 7, 11, 10, 23,               /* fan1..fan5 */
 325         -1, -1, -1,                     /* unused */
 326         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 327         12, 9 };                        /* intrusion0, intrusion1 */
 328
 329 static const u16 NCT6776_REG_TOLERANCE_H[] = {
 330         0x10c, 0x20c, 0x30c, 0x80c, 0x90c };
 331
 332 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0 };
 333 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0 };
 334
 335 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
 336 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
 337
 338 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
 339         0x13e, 0x23e, 0x33e, 0x83e, 0x93e };
 340
 341 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 342         0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
 343
 344 static const char *const nct6776_temp_label[] = {
 345         "",
 346         "SYSTIN",
 347         "CPUTIN",
 348         "AUXTIN",
 349         "SMBUSMASTER 0",
 350         "SMBUSMASTER 1",
 351         "SMBUSMASTER 2",
 352         "SMBUSMASTER 3",
 353         "SMBUSMASTER 4",
 354         "SMBUSMASTER 5",
 355         "SMBUSMASTER 6",
 356         "SMBUSMASTER 7",
 357         "PECI Agent 0",
 358         "PECI Agent 1",
 359         "PCH_CHIP_CPU_MAX_TEMP",
 360         "PCH_CHIP_TEMP",
 361         "PCH_CPU_TEMP",
 362         "PCH_MCH_TEMP",
 363         "PCH_DIM0_TEMP",
 364         "PCH_DIM1_TEMP",
 365         "PCH_DIM2_TEMP",
 366         "PCH_DIM3_TEMP",
 367         "BYTE_TEMP"
 368 };
 369
 370 static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
 371         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
 372
 373 static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
 374         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
 375
 376 /* NCT6779 specific data */
 377
 378 static const u16 NCT6779_REG_IN[] = {
 379         0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
 380         0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
 381
 382 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
 383         0x459, 0x45A, 0x45B, 0x568 };
 384
 385 static const s8 NCT6779_ALARM_BITS[] = {
 386         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 387         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 388         -1,                             /* unused */
 389         6, 7, 11, 10, 23,               /* fan1..fan5 */
 390         -1, -1, -1,                     /* unused */
 391         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 392         12, 9 };                        /* intrusion0, intrusion1 */
 393
 394 static const u16 NCT6779_REG_FAN[] = { 0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8 };
 395 static const u16 NCT6779_REG_FAN_PULSES[] = {
 396         0x644, 0x645, 0x646, 0x647, 0x648 };
 397
 398 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
 399         0x136, 0x236, 0x336, 0x836, 0x936 };
 400 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
 401         0x137, 0x237, 0x337, 0x837, 0x937 };
 402
 403 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
 404 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 405         0x18, 0x152 };
 406 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 407         0x3a, 0x153 };
 408 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 409         0x39, 0x155 };
 410
 411 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
 412         0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
 413
 414 static const char *const nct6779_temp_label[] = {
 415         "",
 416         "SYSTIN",
 417         "CPUTIN",
 418         "AUXTIN0",
 419         "AUXTIN1",
 420         "AUXTIN2",
 421         "AUXTIN3",
 422         "",
 423         "SMBUSMASTER 0",
 424         "SMBUSMASTER 1",
 425         "SMBUSMASTER 2",
 426         "SMBUSMASTER 3",
 427         "SMBUSMASTER 4",
 428         "SMBUSMASTER 5",
 429         "SMBUSMASTER 6",
 430         "SMBUSMASTER 7",
 431         "PECI Agent 0",
 432         "PECI Agent 1",
 433         "PCH_CHIP_CPU_MAX_TEMP",
 434         "PCH_CHIP_TEMP",
 435         "PCH_CPU_TEMP",
 436         "PCH_MCH_TEMP",
 437         "PCH_DIM0_TEMP",
 438         "PCH_DIM1_TEMP",
 439         "PCH_DIM2_TEMP",
 440         "PCH_DIM3_TEMP",
 441         "BYTE_TEMP"
 442 };
 443
 444 static const u16 NCT6779_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6779_temp_label) - 1]
 445         = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
 446             0, 0, 0, 0, 0, 0, 0, 0,
 447             0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
 448             0x408, 0 };
 449
 450 static const u16 NCT6779_REG_TEMP_CRIT[ARRAY_SIZE(nct6779_temp_label) - 1]
 451         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
 452
 453 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
 454 {
 455         if (mode == 0 && pwm == 255)
 456                 return off;
 457         return mode + 1;
 458 }
 459
 460 static int pwm_enable_to_reg(enum pwm_enable mode)
 461 {
 462         if (mode == off)
 463                 return 0;
 464         return mode - 1;
 465 }
 466
 467 /*
 468  * Conversions
 469  */
 470
 471 /* 1 is DC mode, output in ms */
 472 static unsigned int step_time_from_reg(u8 reg, u8 mode)
 473 {
 474         return mode ? 400 * reg : 100 * reg;
 475 }
 476
 477 static u8 step_time_to_reg(unsigned int msec, u8 mode)
 478 {
 479         return clamp_val((mode ? (msec + 200) / 400 :
 480                                         (msec + 50) / 100), 1, 255);
 481 }
 482
 483 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
 484 {
 485         if (reg == 0 || reg == 255)
 486                 return 0;
 487         return 1350000U / (reg << divreg);
 488 }
 489
 490 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
 491 {
 492         if ((reg & 0xff1f) == 0xff1f)
 493                 return 0;
 494
 495         reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
 496
 497         if (reg == 0)
 498                 return 0;
 499
 500         return 1350000U / reg;
 501 }
 502
 503 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
 504 {
 505         if (reg == 0 || reg == 0xffff)
 506                 return 0;
 507
 508         /*
 509          * Even though the registers are 16 bit wide, the fan divisor
 510          * still applies.
 511          */
 512         return 1350000U / (reg << divreg);
 513 }
 514
 515 static u16 fan_to_reg(u32 fan, unsigned int divreg)
 516 {
 517         if (!fan)
 518                 return 0;
 519
 520         return (1350000U / fan) >> divreg;
 521 }
 522
 523 static inline unsigned int
 524 div_from_reg(u8 reg)
 525 {
 526         return 1 << reg;
 527 }
 528
 529 /*
 530  * Some of the voltage inputs have internal scaling, the tables below
 531  * contain 8 (the ADC LSB in mV) * scaling factor * 100
 532  */
 533 static const u16 scale_in[15] = {
 534         800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
 535         800, 800
 536 };
 537
 538 static inline long in_from_reg(u8 reg, u8 nr)
 539 {
 540         return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
 541 }
 542
 543 static inline u8 in_to_reg(u32 val, u8 nr)
 544 {
 545         return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
 546 }
 547
 548 /*
 549  * Data structures and manipulation thereof
 550  */
 551
 552 struct nct6775_data {
 553         int addr;       /* IO base of hw monitor block */
 554         enum kinds kind;
 555         const char *name;
 556
 557         struct device *hwmon_dev;
 558         struct attribute_group *group_in;
 559         struct attribute_group *group_fan;
 560         struct attribute_group *group_temp;
 561         struct attribute_group *group_pwm;
 562
 563         u16 reg_temp[4][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 564                                     * 3=temp_crit
 565                                     */
 566         u8 temp_src[NUM_TEMP];
 567         u16 reg_temp_config[NUM_TEMP];
 568         const char * const *temp_label;
 569         int temp_label_num;
 570
 571         u16 REG_CONFIG;
 572         u16 REG_VBAT;
 573         u16 REG_DIODE;
 574
 575         const s8 *ALARM_BITS;
 576
 577         const u16 *REG_VIN;
 578         const u16 *REG_IN_MINMAX[2];
 579
 580         const u16 *REG_TARGET;
 581         const u16 *REG_FAN;
 582         const u16 *REG_FAN_MODE;
 583         const u16 *REG_FAN_MIN;
 584         const u16 *REG_FAN_PULSES;
 585         const u16 *REG_FAN_TIME[3];
 586
 587         const u16 *REG_TOLERANCE_H;
 588
 589         const u8 *REG_PWM_MODE;
 590         const u8 *PWM_MODE_MASK;
 591
 592         const u16 *REG_PWM[7];  /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 593                                  * [3]=pwm_max, [4]=pwm_step,
 594                                  * [5]=weight_duty_step, [6]=weight_duty_base
 595                                  */
 596         const u16 *REG_PWM_READ;
 597
 598         const u16 *REG_AUTO_TEMP;
 599         const u16 *REG_AUTO_PWM;
 600
 601         const u16 *REG_CRITICAL_TEMP;
 602         const u16 *REG_CRITICAL_TEMP_TOLERANCE;
 603
 604         const u16 *REG_TEMP_SOURCE;     /* temp register sources */
 605         const u16 *REG_TEMP_SEL;
 606         const u16 *REG_WEIGHT_TEMP_SEL;
 607         const u16 *REG_WEIGHT_TEMP[3];  /* 0=base, 1=tolerance, 2=step */
 608
 609         const u16 *REG_TEMP_OFFSET;
 610
 611         const u16 *REG_ALARM;
 612
 613         unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
 614         unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
 615
 616         struct mutex update_lock;
 617         bool valid;             /* true if following fields are valid */
 618         unsigned long last_updated;     /* In jiffies */
 619
 620         /* Register values */
 621         u8 bank;                /* current register bank */
 622         u8 in_num;              /* number of in inputs we have */
 623         u8 in[15][3];           /* [0]=in, [1]=in_max, [2]=in_min */
 624         unsigned int rpm[5];
 625         u16 fan_min[5];
 626         u8 fan_pulses[5];
 627         u8 fan_div[5];
 628         u8 has_pwm;
 629         u8 has_fan;             /* some fan inputs can be disabled */
 630         u8 has_fan_min;         /* some fans don't have min register */
 631         bool has_fan_div;
 632
 633         u8 temp_fixed_num;      /* 3 or 6 */
 634         u8 temp_type[NUM_TEMP_FIXED];
 635         s8 temp_offset[NUM_TEMP_FIXED];
 636         s16 temp[4][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 637                                 * 3=temp_crit */
 638         u64 alarms;
 639
 640         u8 pwm_num;     /* number of pwm */
 641         u8 pwm_mode[5]; /* 1->DC variable voltage, 0->PWM variable duty cycle */
 642         enum pwm_enable pwm_enable[5];
 643                         /* 0->off
 644                          * 1->manual
 645                          * 2->thermal cruise mode (also called SmartFan I)
 646                          * 3->fan speed cruise mode
 647                          * 4->SmartFan III
 648                          * 5->enhanced variable thermal cruise (SmartFan IV)
 649                          */
 650         u8 pwm[7][5];   /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 651                          * [3]=pwm_max, [4]=pwm_step,
 652                          * [5]=weight_duty_step, [6]=weight_duty_base
 653                          */
 654
 655         u8 target_temp[5];
 656         u8 target_temp_mask;
 657         u32 target_speed[5];
 658         u32 target_speed_tolerance[5];
 659         u8 speed_tolerance_limit;
 660
 661         u8 temp_tolerance[2][5];
 662         u8 tolerance_mask;
 663
 664         u8 fan_time[3][5]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
 665
 666         /* Automatic fan speed control registers */
 667         int auto_pwm_num;
 668         u8 auto_pwm[5][7];
 669         u8 auto_temp[5][7];
 670         u8 pwm_temp_sel[5];
 671         u8 pwm_weight_temp_sel[5];
 672         u8 weight_temp[3][5];   /* 0->temp_step, 1->temp_step_tol,
 673                                  * 2->temp_base
 674                                  */
 675
 676         u8 vid;
 677         u8 vrm;
 678
 679         bool have_vid;
 680
 681         u16 have_temp;
 682         u16 have_temp_fixed;
 683         u16 have_in;
 684 #ifdef CONFIG_PM
 685         /* Remember extra register values over suspend/resume */
 686         u8 vbat;
 687         u8 fandiv1;
 688         u8 fandiv2;
 689 #endif
 690 };
 691
 692 struct nct6775_sio_data {
 693         int sioreg;
 694         enum kinds kind;
 695 };
 696
 697 struct sensor_device_template {
 698         struct device_attribute dev_attr;
 699         union {
 700                 struct {
 701                         u8 nr;
 702                         u8 index;
 703                 } s;
 704                 int index;
 705         } u;
 706         bool s2;        /* true if both index and nr are used */
 707 };
 708
 709 struct sensor_device_attr_u {
 710         union {
 711                 struct sensor_device_attribute a1;
 712                 struct sensor_device_attribute_2 a2;
 713         } u;
 714         char name[32];
 715 };
 716
 717 #define SENSOR_DEVICE_TEMPLATE(_name, _mode, _show, _store, _index)     \
 718         { .dev_attr = __ATTR(_name, _mode, _show, _store),              \
 719           .u.index = _index,                                            \
 720           .s2 = false }
 721
 722 #define SENSOR_DEVICE_TEMPLATE_2(_name, _mode, _show, _store,           \
 723                                  _nr, _index)                           \
 724         { .dev_attr = __ATTR(_name, _mode, _show, _store),              \
 725           .u.s.index = _index,                                          \
 726           .u.s.nr = _nr,                                                \
 727           .s2 = true }
 728
 729 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
 730 static struct sensor_device_template sensor_dev_template_##_name        \
 731         = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store,       \
 732                                  _index)
 733
 734 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store,       \
 735                           _nr, _index)                                  \
 736 static struct sensor_device_template sensor_dev_template_##_name        \
 737         = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,     \
 738                                  _nr, _index)
 739
 740 struct sensor_template_group {
 741         struct sensor_device_template **templates;
 742         umode_t (*is_visible)(struct kobject *, struct attribute *, int);
 743         int base;
 744 };
 745
 746 static struct attribute_group *
 747 nct6775_create_attr_group(struct device *dev, struct sensor_template_group *tg,
 748                           int repeat)
 749 {
 750         struct attribute_group *group;
 751         struct sensor_device_attr_u *su;
 752         struct sensor_device_attribute *a;
 753         struct sensor_device_attribute_2 *a2;
 754         struct attribute **attrs;
 755         struct sensor_device_template **t;
 756         int err, i, j, count;
 757
 758         if (repeat <= 0)
 759                 return ERR_PTR(-EINVAL);
 760
 761         t = tg->templates;
 762         for (count = 0; *t; t++, count++)
 763                 ;
 764
 765         if (count == 0)
 766                 return ERR_PTR(-EINVAL);
 767
 768         group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
 769         if (group == NULL)
 770                 return ERR_PTR(-ENOMEM);
 771
 772         attrs = devm_kzalloc(dev, sizeof(*attrs) * (repeat * count + 1),
 773                              GFP_KERNEL);
 774         if (attrs == NULL)
 775                 return ERR_PTR(-ENOMEM);
 776
 777         su = devm_kzalloc(dev, sizeof(*su) * repeat * count,
 778                                GFP_KERNEL);
 779         if (su == NULL)
 780                 return ERR_PTR(-ENOMEM);
 781
 782         group->attrs = attrs;
 783         group->is_visible = tg->is_visible;
 784
 785         for (i = 0; i < repeat; i++) {
 786                 t = tg->templates;
 787                 for (j = 0; *t != NULL; j++) {
 788                         snprintf(su->name, sizeof(su->name),
 789                                  (*t)->dev_attr.attr.name, tg->base + i);
 790                         if ((*t)->s2) {
 791                                 a2 = &su->u.a2;
 792                                 a2->dev_attr.attr.name = su->name;
 793                                 a2->nr = (*t)->u.s.nr + i;
 794                                 a2->index = (*t)->u.s.index;
 795                                 a2->dev_attr.attr.mode =
 796                                   (*t)->dev_attr.attr.mode;
 797                                 a2->dev_attr.show = (*t)->dev_attr.show;
 798                                 a2->dev_attr.store = (*t)->dev_attr.store;
 799                                 *attrs = &a2->dev_attr.attr;
 800                         } else {
 801                                 a = &su->u.a1;
 802                                 a->dev_attr.attr.name = su->name;
 803                                 a->index = (*t)->u.index + i;
 804                                 a->dev_attr.attr.mode =
 805                                   (*t)->dev_attr.attr.mode;
 806                                 a->dev_attr.show = (*t)->dev_attr.show;
 807                                 a->dev_attr.store = (*t)->dev_attr.store;
 808                                 *attrs = &a->dev_attr.attr;
 809                         }
 810                         attrs++;
 811                         su++;
 812                         t++;
 813                 }
 814         }
 815
 816         err = sysfs_create_group(&dev->kobj, group);
 817         if (err)
 818                 return ERR_PTR(-ENOMEM);
 819
 820         return group;
 821 }
 822
 823 static bool is_word_sized(struct nct6775_data *data, u16 reg)
 824 {
 825         switch (data->kind) {
 826         case nct6775:
 827                 return (((reg & 0xff00) == 0x100 ||
 828                     (reg & 0xff00) == 0x200) &&
 829                    ((reg & 0x00ff) == 0x50 ||
 830                     (reg & 0x00ff) == 0x53 ||
 831                     (reg & 0x00ff) == 0x55)) ||
 832                   (reg & 0xfff0) == 0x630 ||
 833                   reg == 0x640 || reg == 0x642 ||
 834                   reg == 0x662 ||
 835                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
 836                   reg == 0x73 || reg == 0x75 || reg == 0x77;
 837         case nct6776:
 838                 return (((reg & 0xff00) == 0x100 ||
 839                     (reg & 0xff00) == 0x200) &&
 840                    ((reg & 0x00ff) == 0x50 ||
 841                     (reg & 0x00ff) == 0x53 ||
 842                     (reg & 0x00ff) == 0x55)) ||
 843                   (reg & 0xfff0) == 0x630 ||
 844                   reg == 0x402 ||
 845                   reg == 0x640 || reg == 0x642 ||
 846                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
 847                   reg == 0x73 || reg == 0x75 || reg == 0x77;
 848         case nct6779:
 849                 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
 850                   ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x09) ||
 851                   reg == 0x402 ||
 852                   reg == 0x63a || reg == 0x63c || reg == 0x63e ||
 853                   reg == 0x640 || reg == 0x642 ||
 854                   reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
 855                   reg == 0x7b;
 856         }
 857         return false;
 858 }
 859
 860 /*
 861  * On older chips, only registers 0x50-0x5f are banked.
 862  * On more recent chips, all registers are banked.
 863  * Assume that is the case and set the bank number for each access.
 864  * Cache the bank number so it only needs to be set if it changes.
 865  */
 866 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
 867 {
 868         u8 bank = reg >> 8;
 869         if (data->bank != bank) {
 870                 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
 871                 outb_p(bank, data->addr + DATA_REG_OFFSET);
 872                 data->bank = bank;
 873         }
 874 }
 875
 876 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
 877 {
 878         int res, word_sized = is_word_sized(data, reg);
 879
 880         nct6775_set_bank(data, reg);
 881         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
 882         res = inb_p(data->addr + DATA_REG_OFFSET);
 883         if (word_sized) {
 884                 outb_p((reg & 0xff) + 1,
 885                        data->addr + ADDR_REG_OFFSET);
 886                 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
 887         }
 888         return res;
 889 }
 890
 891 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
 892 {
 893         int word_sized = is_word_sized(data, reg);
 894
 895         nct6775_set_bank(data, reg);
 896         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
 897         if (word_sized) {
 898                 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
 899                 outb_p((reg & 0xff) + 1,
 900                        data->addr + ADDR_REG_OFFSET);
 901         }
 902         outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
 903         return 0;
 904 }
 905
 906 /* We left-align 8-bit temperature values to make the code simpler */
 907 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
 908 {
 909         u16 res;
 910
 911         res = nct6775_read_value(data, reg);
 912         if (!is_word_sized(data, reg))
 913                 res <<= 8;
 914
 915         return res;
 916 }
 917
 918 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
 919 {
 920         if (!is_word_sized(data, reg))
 921                 value >>= 8;
 922         return nct6775_write_value(data, reg, value);
 923 }
 924
 925 /* This function assumes that the caller holds data->update_lock */
 926 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
 927 {
 928         u8 reg;
 929
 930         switch (nr) {
 931         case 0:
 932                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
 933                     | (data->fan_div[0] & 0x7);
 934                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
 935                 break;
 936         case 1:
 937                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
 938                     | ((data->fan_div[1] << 4) & 0x70);
 939                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
 940                 break;
 941         case 2:
 942                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
 943                     | (data->fan_div[2] & 0x7);
 944                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
 945                 break;
 946         case 3:
 947                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
 948                     | ((data->fan_div[3] << 4) & 0x70);
 949                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
 950                 break;
 951         }
 952 }
 953
 954 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
 955 {
 956         if (data->kind == nct6775)
 957                 nct6775_write_fan_div(data, nr);
 958 }
 959
 960 static void nct6775_update_fan_div(struct nct6775_data *data)
 961 {
 962         u8 i;
 963
 964         i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
 965         data->fan_div[0] = i & 0x7;
 966         data->fan_div[1] = (i & 0x70) >> 4;
 967         i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
 968         data->fan_div[2] = i & 0x7;
 969         if (data->has_fan & (1<<3))
 970                 data->fan_div[3] = (i & 0x70) >> 4;
 971 }
 972
 973 static void nct6775_update_fan_div_common(struct nct6775_data *data)
 974 {
 975         if (data->kind == nct6775)
 976                 nct6775_update_fan_div(data);
 977 }
 978
 979 static void nct6775_init_fan_div(struct nct6775_data *data)
 980 {
 981         int i;
 982
 983         nct6775_update_fan_div_common(data);
 984         /*
 985          * For all fans, start with highest divider value if the divider
 986          * register is not initialized. This ensures that we get a
 987          * reading from the fan count register, even if it is not optimal.
 988          * We'll compute a better divider later on.
 989          */
 990         for (i = 0; i < 3; i++) {
 991                 if (!(data->has_fan & (1 << i)))
 992                         continue;
 993                 if (data->fan_div[i] == 0) {
 994                         data->fan_div[i] = 7;
 995                         nct6775_write_fan_div_common(data, i);
 996                 }
 997         }
 998 }
 999
1000 static void nct6775_init_fan_common(struct device *dev,
1001                                     struct nct6775_data *data)
1002 {
1003         int i;
1004         u8 reg;
1005
1006         if (data->has_fan_div)
1007                 nct6775_init_fan_div(data);
1008
1009         /*
1010          * If fan_min is not set (0), set it to 0xff to disable it. This
1011          * prevents the unnecessary warning when fanX_min is reported as 0.
1012          */
1013         for (i = 0; i < 5; i++) {
1014                 if (data->has_fan_min & (1 << i)) {
1015                         reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
1016                         if (!reg)
1017                                 nct6775_write_value(data, data->REG_FAN_MIN[i],
1018                                                     data->has_fan_div ? 0xff
1019                                                                       : 0xff1f);
1020                 }
1021         }
1022 }
1023
1024 static void nct6775_select_fan_div(struct device *dev,
1025                                    struct nct6775_data *data, int nr, u16 reg)
1026 {
1027         u8 fan_div = data->fan_div[nr];
1028         u16 fan_min;
1029
1030         if (!data->has_fan_div)
1031                 return;
1032
1033         /*
1034          * If we failed to measure the fan speed, or the reported value is not
1035          * in the optimal range, and the clock divider can be modified,
1036          * let's try that for next time.
1037          */
1038         if (reg == 0x00 && fan_div < 0x07)
1039                 fan_div++;
1040         else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1041                 fan_div--;
1042
1043         if (fan_div != data->fan_div[nr]) {
1044                 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1045                         nr + 1, div_from_reg(data->fan_div[nr]),
1046                         div_from_reg(fan_div));
1047
1048                 /* Preserve min limit if possible */
1049                 if (data->has_fan_min & (1 << nr)) {
1050                         fan_min = data->fan_min[nr];
1051                         if (fan_div > data->fan_div[nr]) {
1052                                 if (fan_min != 255 && fan_min > 1)
1053                                         fan_min >>= 1;
1054                         } else {
1055                                 if (fan_min != 255) {
1056                                         fan_min <<= 1;
1057                                         if (fan_min > 254)
1058                                                 fan_min = 254;
1059                                 }
1060                         }
1061                         if (fan_min != data->fan_min[nr]) {
1062                                 data->fan_min[nr] = fan_min;
1063                                 nct6775_write_value(data, data->REG_FAN_MIN[nr],
1064                                                     fan_min);
1065                         }
1066                 }
1067                 data->fan_div[nr] = fan_div;
1068                 nct6775_write_fan_div_common(data, nr);
1069         }
1070 }
1071
1072 static void nct6775_update_pwm(struct device *dev)
1073 {
1074         struct nct6775_data *data = dev_get_drvdata(dev);
1075         int i, j;
1076         int fanmodecfg, reg;
1077         bool duty_is_dc;
1078
1079         for (i = 0; i < data->pwm_num; i++) {
1080                 if (!(data->has_pwm & (1 << i)))
1081                         continue;
1082
1083                 duty_is_dc = data->REG_PWM_MODE[i] &&
1084                   (nct6775_read_value(data, data->REG_PWM_MODE[i])
1085                    & data->PWM_MODE_MASK[i]);
1086                 data->pwm_mode[i] = duty_is_dc;
1087
1088                 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
1089                 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1090                         if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1091                                 data->pwm[j][i]
1092                                   = nct6775_read_value(data,
1093                                                        data->REG_PWM[j][i]);
1094                         }
1095                 }
1096
1097                 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1098                                                         (fanmodecfg >> 4) & 7);
1099
1100                 if (!data->temp_tolerance[0][i] ||
1101                     data->pwm_enable[i] != speed_cruise)
1102                         data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1103                 if (!data->target_speed_tolerance[i] ||
1104                     data->pwm_enable[i] == speed_cruise) {
1105                         u8 t = fanmodecfg & 0x0f;
1106                         if (data->REG_TOLERANCE_H) {
1107                                 t |= (nct6775_read_value(data,
1108                                       data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
1109                         }
1110                         data->target_speed_tolerance[i] = t;
1111                 }
1112
1113                 data->temp_tolerance[1][i] =
1114                         nct6775_read_value(data,
1115                                         data->REG_CRITICAL_TEMP_TOLERANCE[i]);
1116
1117                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
1118                 data->pwm_temp_sel[i] = reg & 0x1f;
1119                 /* If fan can stop, report floor as 0 */
1120                 if (reg & 0x80)
1121                         data->pwm[2][i] = 0;
1122
1123                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
1124                 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1125                 /* If weight is disabled, report weight source as 0 */
1126                 if (j == 1 && !(reg & 0x80))
1127                         data->pwm_weight_temp_sel[i] = 0;
1128
1129                 /* Weight temp data */
1130                 for (j = 0; j < 3; j++) {
1131                         data->weight_temp[j][i]
1132                           = nct6775_read_value(data,
1133                                                data->REG_WEIGHT_TEMP[j][i]);
1134                 }
1135         }
1136 }
1137
1138 static void nct6775_update_pwm_limits(struct device *dev)
1139 {
1140         struct nct6775_data *data = dev_get_drvdata(dev);
1141         int i, j;
1142         u8 reg;
1143         u16 reg_t;
1144
1145         for (i = 0; i < data->pwm_num; i++) {
1146                 if (!(data->has_pwm & (1 << i)))
1147                         continue;
1148
1149                 for (j = 0; j < 3; j++) {
1150                         data->fan_time[j][i] =
1151                           nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1152                 }
1153
1154                 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1155                 /* Update only in matching mode or if never updated */
1156                 if (!data->target_temp[i] ||
1157                     data->pwm_enable[i] == thermal_cruise)
1158                         data->target_temp[i] = reg_t & data->target_temp_mask;
1159                 if (!data->target_speed[i] ||
1160                     data->pwm_enable[i] == speed_cruise) {
1161                         if (data->REG_TOLERANCE_H) {
1162                                 reg_t |= (nct6775_read_value(data,
1163                                         data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1164                         }
1165                         data->target_speed[i] = reg_t;
1166                 }
1167
1168                 for (j = 0; j < data->auto_pwm_num; j++) {
1169                         data->auto_pwm[i][j] =
1170                           nct6775_read_value(data,
1171                                              NCT6775_AUTO_PWM(data, i, j));
1172                         data->auto_temp[i][j] =
1173                           nct6775_read_value(data,
1174                                              NCT6775_AUTO_TEMP(data, i, j));
1175                 }
1176
1177                 /* critical auto_pwm temperature data */
1178                 data->auto_temp[i][data->auto_pwm_num] =
1179                         nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1180
1181                 switch (data->kind) {
1182                 case nct6775:
1183                         reg = nct6775_read_value(data,
1184                                                  NCT6775_REG_CRITICAL_ENAB[i]);
1185                         data->auto_pwm[i][data->auto_pwm_num] =
1186                                                 (reg & 0x02) ? 0xff : 0x00;
1187                         break;
1188                 case nct6776:
1189                         data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1190                         break;
1191                 case nct6779:
1192                         reg = nct6775_read_value(data,
1193                                         NCT6779_REG_CRITICAL_PWM_ENABLE[i]);
1194                         if (reg & 1)
1195                                 data->auto_pwm[i][data->auto_pwm_num] =
1196                                   nct6775_read_value(data,
1197                                         NCT6779_REG_CRITICAL_PWM[i]);
1198                         else
1199                                 data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1200                         break;
1201                 }
1202         }
1203 }
1204
1205 static struct nct6775_data *nct6775_update_device(struct device *dev)
1206 {
1207         struct nct6775_data *data = dev_get_drvdata(dev);
1208         int i, j;
1209
1210         mutex_lock(&data->update_lock);
1211
1212         if (time_after(jiffies, data->last_updated + HZ + HZ/2)
1213             || !data->valid) {
1214                 /* Fan clock dividers */
1215                 nct6775_update_fan_div_common(data);
1216
1217                 /* Measured voltages and limits */
1218                 for (i = 0; i < data->in_num; i++) {
1219                         if (!(data->have_in & (1 << i)))
1220                                 continue;
1221
1222                         data->in[i][0] = nct6775_read_value(data,
1223                                                             data->REG_VIN[i]);
1224                         data->in[i][1] = nct6775_read_value(data,
1225                                           data->REG_IN_MINMAX[0][i]);
1226                         data->in[i][2] = nct6775_read_value(data,
1227                                           data->REG_IN_MINMAX[1][i]);
1228                 }
1229
1230                 /* Measured fan speeds and limits */
1231                 for (i = 0; i < 5; i++) {
1232                         u16 reg;
1233
1234                         if (!(data->has_fan & (1 << i)))
1235                                 continue;
1236
1237                         reg = nct6775_read_value(data, data->REG_FAN[i]);
1238                         data->rpm[i] = data->fan_from_reg(reg,
1239                                                           data->fan_div[i]);
1240
1241                         if (data->has_fan_min & (1 << i))
1242                                 data->fan_min[i] = nct6775_read_value(data,
1243                                            data->REG_FAN_MIN[i]);
1244                         data->fan_pulses[i] =
1245                           nct6775_read_value(data, data->REG_FAN_PULSES[i]);
1246
1247                         nct6775_select_fan_div(dev, data, i, reg);
1248                 }
1249
1250                 nct6775_update_pwm(dev);
1251                 nct6775_update_pwm_limits(dev);
1252
1253                 /* Measured temperatures and limits */
1254                 for (i = 0; i < NUM_TEMP; i++) {
1255                         if (!(data->have_temp & (1 << i)))
1256                                 continue;
1257                         for (j = 0; j < 4; j++) {
1258                                 if (data->reg_temp[j][i])
1259                                         data->temp[j][i]
1260                                           = nct6775_read_temp(data,
1261                                                 data->reg_temp[j][i]);
1262                         }
1263                         if (!(data->have_temp_fixed & (1 << i)))
1264                                 continue;
1265                         data->temp_offset[i]
1266                           = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1267                 }
1268
1269                 data->alarms = 0;
1270                 for (i = 0; i < NUM_REG_ALARM; i++) {
1271                         u8 alarm;
1272                         if (!data->REG_ALARM[i])
1273                                 continue;
1274                         alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1275                         data->alarms |= ((u64)alarm) << (i << 3);
1276                 }
1277
1278                 data->last_updated = jiffies;
1279                 data->valid = true;
1280         }
1281
1282         mutex_unlock(&data->update_lock);
1283         return data;
1284 }
1285
1286 /*
1287  * Sysfs callback functions
1288  */
1289 static ssize_t
1290 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1291 {
1292         struct nct6775_data *data = nct6775_update_device(dev);
1293         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1294         int nr = sattr->nr;
1295         int index = sattr->index;
1296         return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1297 }
1298
1299 static ssize_t
1300 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1301              size_t count)
1302 {
1303         struct nct6775_data *data = dev_get_drvdata(dev);
1304         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1305         int nr = sattr->nr;
1306         int index = sattr->index;
1307         unsigned long val;
1308         int err = kstrtoul(buf, 10, &val);
1309         if (err < 0)
1310                 return err;
1311         mutex_lock(&data->update_lock);
1312         data->in[nr][index] = in_to_reg(val, nr);
1313         nct6775_write_value(data, data->REG_IN_MINMAX[index-1][nr],
1314                             data->in[nr][index]);
1315         mutex_unlock(&data->update_lock);
1316         return count;
1317 }
1318
1319 static ssize_t
1320 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1321 {
1322         struct nct6775_data *data = nct6775_update_device(dev);
1323         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1324         int nr = data->ALARM_BITS[sattr->index];
1325         return sprintf(buf, "%u\n",
1326                        (unsigned int)((data->alarms >> nr) & 0x01));
1327 }
1328
1329 static umode_t nct6775_in_is_visible(struct kobject *kobj,
1330                                      struct attribute *attr, int index)
1331 {
1332         struct device *dev = container_of(kobj, struct device, kobj);
1333         struct nct6775_data *data = dev_get_drvdata(dev);
1334         int in = index / 4;     /* voltage index */
1335
1336         if (!(data->have_in & (1 << in)))
1337                 return 0;
1338
1339         return attr->mode;
1340 }
1341
1342 SENSOR_TEMPLATE_2(in_input, in%d_input, S_IRUGO, show_in_reg, NULL, 0, 0);
1343 SENSOR_TEMPLATE(in_alarm, in%d_alarm, S_IRUGO, show_alarm, NULL, 0);
1344 SENSOR_TEMPLATE_2(in_min, in%d_min, S_IWUSR | S_IRUGO, show_in_reg,
1345                   store_in_reg, 0, 1);
1346 SENSOR_TEMPLATE_2(in_max, in%d_max, S_IWUSR | S_IRUGO, show_in_reg,
1347                   store_in_reg, 0, 2);
1348
1349 /*
1350  * nct6775_in_is_visible uses the index into the following array
1351  * to determine if attributes should be created or not.
1352  * Any change in order or content must be matched.
1353  */
1354 static struct sensor_device_template *nct6775_attributes_in_template[] = {
1355         &sensor_dev_template_in_input,
1356         &sensor_dev_template_in_alarm,
1357         &sensor_dev_template_in_min,
1358         &sensor_dev_template_in_max,
1359         NULL
1360 };
1361
1362 static struct sensor_template_group nct6775_in_template_group = {
1363         .templates = nct6775_attributes_in_template,
1364         .is_visible = nct6775_in_is_visible,
1365 };
1366
1367 static ssize_t
1368 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1369 {
1370         struct nct6775_data *data = nct6775_update_device(dev);
1371         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1372         int nr = sattr->index;
1373         return sprintf(buf, "%d\n", data->rpm[nr]);
1374 }
1375
1376 static ssize_t
1377 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1378 {
1379         struct nct6775_data *data = nct6775_update_device(dev);
1380         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1381         int nr = sattr->index;
1382         return sprintf(buf, "%d\n",
1383                        data->fan_from_reg_min(data->fan_min[nr],
1384                                               data->fan_div[nr]));
1385 }
1386
1387 static ssize_t
1388 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1389 {
1390         struct nct6775_data *data = nct6775_update_device(dev);
1391         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1392         int nr = sattr->index;
1393         return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1394 }
1395
1396 static ssize_t
1397 store_fan_min(struct device *dev, struct device_attribute *attr,
1398               const char *buf, size_t count)
1399 {
1400         struct nct6775_data *data = dev_get_drvdata(dev);
1401         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1402         int nr = sattr->index;
1403         unsigned long val;
1404         int err;
1405         unsigned int reg;
1406         u8 new_div;
1407
1408         err = kstrtoul(buf, 10, &val);
1409         if (err < 0)
1410                 return err;
1411
1412         mutex_lock(&data->update_lock);
1413         if (!data->has_fan_div) {
1414                 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1415                 if (!val) {
1416                         val = 0xff1f;
1417                 } else {
1418                         if (val > 1350000U)
1419                                 val = 135000U;
1420                         val = 1350000U / val;
1421                         val = (val & 0x1f) | ((val << 3) & 0xff00);
1422                 }
1423                 data->fan_min[nr] = val;
1424                 goto write_min; /* Leave fan divider alone */
1425         }
1426         if (!val) {
1427                 /* No min limit, alarm disabled */
1428                 data->fan_min[nr] = 255;
1429                 new_div = data->fan_div[nr]; /* No change */
1430                 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1431                 goto write_div;
1432         }
1433         reg = 1350000U / val;
1434         if (reg >= 128 * 255) {
1435                 /*
1436                  * Speed below this value cannot possibly be represented,
1437                  * even with the highest divider (128)
1438                  */
1439                 data->fan_min[nr] = 254;
1440                 new_div = 7; /* 128 == (1 << 7) */
1441                 dev_warn(dev,
1442                          "fan%u low limit %lu below minimum %u, set to minimum\n",
1443                          nr + 1, val, data->fan_from_reg_min(254, 7));
1444         } else if (!reg) {
1445                 /*
1446                  * Speed above this value cannot possibly be represented,
1447                  * even with the lowest divider (1)
1448                  */
1449                 data->fan_min[nr] = 1;
1450                 new_div = 0; /* 1 == (1 << 0) */
1451                 dev_warn(dev,
1452                          "fan%u low limit %lu above maximum %u, set to maximum\n",
1453                          nr + 1, val, data->fan_from_reg_min(1, 0));
1454         } else {
1455                 /*
1456                  * Automatically pick the best divider, i.e. the one such
1457                  * that the min limit will correspond to a register value
1458                  * in the 96..192 range
1459                  */
1460                 new_div = 0;
1461                 while (reg > 192 && new_div < 7) {
1462                         reg >>= 1;
1463                         new_div++;
1464                 }
1465                 data->fan_min[nr] = reg;
1466         }
1467
1468 write_div:
1469         /*
1470          * Write both the fan clock divider (if it changed) and the new
1471          * fan min (unconditionally)
1472          */
1473         if (new_div != data->fan_div[nr]) {
1474                 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1475                         nr + 1, div_from_reg(data->fan_div[nr]),
1476                         div_from_reg(new_div));
1477                 data->fan_div[nr] = new_div;
1478                 nct6775_write_fan_div_common(data, nr);
1479                 /* Give the chip time to sample a new speed value */
1480                 data->last_updated = jiffies;
1481         }
1482
1483 write_min:
1484         nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1485         mutex_unlock(&data->update_lock);
1486
1487         return count;
1488 }
1489
1490 static ssize_t
1491 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
1492 {
1493         struct nct6775_data *data = nct6775_update_device(dev);
1494         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1495         int p = data->fan_pulses[sattr->index];
1496
1497         return sprintf(buf, "%d\n", p ? : 4);
1498 }
1499
1500 static ssize_t
1501 store_fan_pulses(struct device *dev, struct device_attribute *attr,
1502                  const char *buf, size_t count)
1503 {
1504         struct nct6775_data *data = dev_get_drvdata(dev);
1505         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1506         int nr = sattr->index;
1507         unsigned long val;
1508         int err;
1509
1510         err = kstrtoul(buf, 10, &val);
1511         if (err < 0)
1512                 return err;
1513
1514         if (val > 4)
1515                 return -EINVAL;
1516
1517         mutex_lock(&data->update_lock);
1518         data->fan_pulses[nr] = val & 3;
1519         nct6775_write_value(data, data->REG_FAN_PULSES[nr], val & 3);
1520         mutex_unlock(&data->update_lock);
1521
1522         return count;
1523 }
1524
1525 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
1526                                       struct attribute *attr, int index)
1527 {
1528         struct device *dev = container_of(kobj, struct device, kobj);
1529         struct nct6775_data *data = dev_get_drvdata(dev);
1530         int fan = index / 5;    /* fan index */
1531         int nr = index % 5;     /* attribute index */
1532
1533         if (!(data->has_fan & (1 << fan)))
1534                 return 0;
1535
1536         if (nr == 3 && !(data->has_fan_min & (1 << fan)))
1537                 return 0;
1538         if (nr == 4 && data->kind != nct6775)
1539                 return 0;
1540
1541         return attr->mode;
1542 }
1543
1544 SENSOR_TEMPLATE(fan_input, fan%d_input, S_IRUGO, show_fan, NULL, 0);
1545 SENSOR_TEMPLATE(fan_alarm, fan%d_alarm, S_IRUGO, show_alarm, NULL,
1546                 FAN_ALARM_BASE);
1547 SENSOR_TEMPLATE(fan_pulses, fan%d_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1548                 store_fan_pulses, 0);
1549 SENSOR_TEMPLATE(fan_min, fan%d_min, S_IWUSR | S_IRUGO, show_fan_min,
1550                 store_fan_min, 0);
1551 SENSOR_TEMPLATE(fan_div, fan%d_div, S_IRUGO, show_fan_div, NULL, 0);
1552
1553 /*
1554  * nct6775_fan_is_visible uses the index into the following array
1555  * to determine if attributes should be created or not.
1556  * Any change in order or content must be matched.
1557  */
1558 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
1559         &sensor_dev_template_fan_input,
1560         &sensor_dev_template_fan_alarm,
1561         &sensor_dev_template_fan_pulses,
1562         &sensor_dev_template_fan_min,   /* 3 */
1563         &sensor_dev_template_fan_div,   /* 4 */
1564         NULL
1565 };
1566
1567 static struct sensor_template_group nct6775_fan_template_group = {
1568         .templates = nct6775_attributes_fan_template,
1569         .is_visible = nct6775_fan_is_visible,
1570         .base = 1,
1571 };
1572
1573 static ssize_t
1574 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1575 {
1576         struct nct6775_data *data = nct6775_update_device(dev);
1577         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1578         int nr = sattr->index;
1579         return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1580 }
1581
1582 static ssize_t
1583 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1584 {
1585         struct nct6775_data *data = nct6775_update_device(dev);
1586         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1587         int nr = sattr->nr;
1588         int index = sattr->index;
1589
1590         return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
1591 }
1592
1593 static ssize_t
1594 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
1595            size_t count)
1596 {
1597         struct nct6775_data *data = dev_get_drvdata(dev);
1598         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1599         int nr = sattr->nr;
1600         int index = sattr->index;
1601         int err;
1602         long val;
1603
1604         err = kstrtol(buf, 10, &val);
1605         if (err < 0)
1606                 return err;
1607
1608         mutex_lock(&data->update_lock);
1609         data->temp[index][nr] = LM75_TEMP_TO_REG(val);
1610         nct6775_write_temp(data, data->reg_temp[index][nr],
1611                            data->temp[index][nr]);
1612         mutex_unlock(&data->update_lock);
1613         return count;
1614 }
1615
1616 static ssize_t
1617 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
1618 {
1619         struct nct6775_data *data = nct6775_update_device(dev);
1620         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1621
1622         return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
1623 }
1624
1625 static ssize_t
1626 store_temp_offset(struct device *dev, struct device_attribute *attr,
1627                   const char *buf, size_t count)
1628 {
1629         struct nct6775_data *data = dev_get_drvdata(dev);
1630         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1631         int nr = sattr->index;
1632         long val;
1633         int err;
1634
1635         err = kstrtol(buf, 10, &val);
1636         if (err < 0)
1637                 return err;
1638
1639         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
1640
1641         mutex_lock(&data->update_lock);
1642         data->temp_offset[nr] = val;
1643         nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
1644         mutex_unlock(&data->update_lock);
1645
1646         return count;
1647 }
1648
1649 static ssize_t
1650 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
1651 {
1652         struct nct6775_data *data = nct6775_update_device(dev);
1653         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1654         int nr = sattr->index;
1655         return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
1656 }
1657
1658 static ssize_t
1659 store_temp_type(struct device *dev, struct device_attribute *attr,
1660                 const char *buf, size_t count)
1661 {
1662         struct nct6775_data *data = nct6775_update_device(dev);
1663         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1664         int nr = sattr->index;
1665         unsigned long val;
1666         int err;
1667         u8 vbat, diode, bit;
1668
1669         err = kstrtoul(buf, 10, &val);
1670         if (err < 0)
1671                 return err;
1672
1673         if (val != 1 && val != 3 && val != 4)
1674                 return -EINVAL;
1675
1676         mutex_lock(&data->update_lock);
1677
1678         data->temp_type[nr] = val;
1679         vbat = nct6775_read_value(data, data->REG_VBAT) & ~(0x02 << nr);
1680         diode = nct6775_read_value(data, data->REG_DIODE) & ~(0x02 << nr);
1681         bit = 0x02 << nr;
1682         switch (val) {
1683         case 1: /* CPU diode (diode, current mode) */
1684                 vbat |= bit;
1685                 diode |= bit;
1686                 break;
1687         case 3: /* diode, voltage mode */
1688                 vbat |= bit;
1689                 break;
1690         case 4: /* thermistor */
1691                 break;
1692         }
1693         nct6775_write_value(data, data->REG_VBAT, vbat);
1694         nct6775_write_value(data, data->REG_DIODE, diode);
1695
1696         mutex_unlock(&data->update_lock);
1697         return count;
1698 }
1699
1700 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
1701                                        struct attribute *attr, int index)
1702 {
1703         struct device *dev = container_of(kobj, struct device, kobj);
1704         struct nct6775_data *data = dev_get_drvdata(dev);
1705         int temp = index / 8;   /* temp index */
1706         int nr = index % 8;     /* attribute index */
1707
1708         if (!(data->have_temp & (1 << temp)))
1709                 return 0;
1710
1711         if (nr == 2 && !data->reg_temp[1][temp])        /* max */
1712                 return 0;
1713
1714         if (nr == 3 && !data->reg_temp[2][temp])        /* max_hyst */
1715                 return 0;
1716
1717         if (nr == 4 && !data->reg_temp[3][temp])        /* crit */
1718                 return 0;
1719
1720         if (nr > 4 && !(data->have_temp_fixed & (1 << temp)))
1721                 return 0;
1722
1723         if (nr == 7 && data->ALARM_BITS[TEMP_ALARM_BASE + temp] < 0)
1724                 return 0;
1725
1726         return attr->mode;
1727 }
1728
1729 SENSOR_TEMPLATE_2(temp_input, temp%d_input, S_IRUGO, show_temp, NULL, 0, 0);
1730 SENSOR_TEMPLATE(temp_label, temp%d_label, S_IRUGO, show_temp_label, NULL, 0);
1731 SENSOR_TEMPLATE_2(temp_max, temp%d_max, S_IRUGO | S_IWUSR, show_temp,
1732                   store_temp, 0, 1);
1733 SENSOR_TEMPLATE_2(temp_max_hyst, temp%d_max_hyst, S_IRUGO | S_IWUSR, show_temp,
1734                   store_temp, 0, 2);
1735 SENSOR_TEMPLATE_2(temp_crit, temp%d_crit, S_IRUGO | S_IWUSR, show_temp,
1736                   store_temp, 0, 3);
1737 SENSOR_TEMPLATE(temp_offset, temp%d_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1738                 store_temp_offset, 0);
1739 SENSOR_TEMPLATE(temp_type, temp%d_type, S_IRUGO | S_IWUSR, show_temp_type,
1740                 store_temp_type, 0);
1741 SENSOR_TEMPLATE(temp_alarm, temp%d_alarm, S_IRUGO, show_alarm, NULL,
1742                 TEMP_ALARM_BASE);
1743
1744 /*
1745  * nct6775_temp_is_visible uses the index into the following array
1746  * to determine if attributes should be created or not.
1747  * Any change in order or content must be matched.
1748  */
1749 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
1750         &sensor_dev_template_temp_input,
1751         &sensor_dev_template_temp_label,
1752         &sensor_dev_template_temp_max,          /* 2 */
1753         &sensor_dev_template_temp_max_hyst,     /* 3 */
1754         &sensor_dev_template_temp_crit,         /* 4 */
1755         &sensor_dev_template_temp_offset,       /* 5 */
1756         &sensor_dev_template_temp_type,         /* 6 */
1757         &sensor_dev_template_temp_alarm,        /* 7 */
1758         NULL
1759 };
1760
1761 static struct sensor_template_group nct6775_temp_template_group = {
1762         .templates = nct6775_attributes_temp_template,
1763         .is_visible = nct6775_temp_is_visible,
1764         .base = 1,
1765 };
1766
1767 static ssize_t
1768 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
1769 {
1770         struct nct6775_data *data = nct6775_update_device(dev);
1771         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1772
1773         return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
1774 }
1775
1776 static ssize_t
1777 store_pwm_mode(struct device *dev, struct device_attribute *attr,
1778                const char *buf, size_t count)
1779 {
1780         struct nct6775_data *data = dev_get_drvdata(dev);
1781         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1782         int nr = sattr->index;
1783         unsigned long val;
1784         int err;
1785         u8 reg;
1786
1787         err = kstrtoul(buf, 10, &val);
1788         if (err < 0)
1789                 return err;
1790
1791         if (val > 1)
1792                 return -EINVAL;
1793
1794         /* Setting DC mode is not supported for all chips/channels */
1795         if (data->REG_PWM_MODE[nr] == 0) {
1796                 if (val)
1797                         return -EINVAL;
1798                 return count;
1799         }
1800
1801         mutex_lock(&data->update_lock);
1802         data->pwm_mode[nr] = val;
1803         reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
1804         reg &= ~data->PWM_MODE_MASK[nr];
1805         if (val)
1806                 reg |= data->PWM_MODE_MASK[nr];
1807         nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
1808         mutex_unlock(&data->update_lock);
1809         return count;
1810 }
1811
1812 static ssize_t
1813 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1814 {
1815         struct nct6775_data *data = nct6775_update_device(dev);
1816         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1817         int nr = sattr->nr;
1818         int index = sattr->index;
1819         int pwm;
1820
1821         /*
1822          * For automatic fan control modes, show current pwm readings.
1823          * Otherwise, show the configured value.
1824          */
1825         if (index == 0 && data->pwm_enable[nr] > manual)
1826                 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
1827         else
1828                 pwm = data->pwm[index][nr];
1829
1830         return sprintf(buf, "%d\n", pwm);
1831 }
1832
1833 static ssize_t
1834 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
1835           size_t count)
1836 {
1837         struct nct6775_data *data = dev_get_drvdata(dev);
1838         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1839         int nr = sattr->nr;
1840         int index = sattr->index;
1841         unsigned long val;
1842         int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
1843         int maxval[7]
1844           = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
1845         int err;
1846         u8 reg;
1847
1848         err = kstrtoul(buf, 10, &val);
1849         if (err < 0)
1850                 return err;
1851         val = clamp_val(val, minval[index], maxval[index]);
1852
1853         mutex_lock(&data->update_lock);
1854         data->pwm[index][nr] = val;
1855         nct6775_write_value(data, data->REG_PWM[index][nr], val);
1856         if (index == 2) { /* floor: disable if val == 0 */
1857                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
1858                 reg &= 0x7f;
1859                 if (val)
1860                         reg |= 0x80;
1861                 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
1862         }
1863         mutex_unlock(&data->update_lock);
1864         return count;
1865 }
1866
1867 /* Returns 0 if OK, -EINVAL otherwise */
1868 static int check_trip_points(struct nct6775_data *data, int nr)
1869 {
1870         int i;
1871
1872         for (i = 0; i < data->auto_pwm_num - 1; i++) {
1873                 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1874                         return -EINVAL;
1875         }
1876         for (i = 0; i < data->auto_pwm_num - 1; i++) {
1877                 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1878                         return -EINVAL;
1879         }
1880         /* validate critical temperature and pwm if enabled (pwm > 0) */
1881         if (data->auto_pwm[nr][data->auto_pwm_num]) {
1882                 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
1883                                 data->auto_temp[nr][data->auto_pwm_num] ||
1884                     data->auto_pwm[nr][data->auto_pwm_num - 1] >
1885                                 data->auto_pwm[nr][data->auto_pwm_num])
1886                         return -EINVAL;
1887         }
1888         return 0;
1889 }
1890
1891 static void pwm_update_registers(struct nct6775_data *data, int nr)
1892 {
1893         u8 reg;
1894
1895         switch (data->pwm_enable[nr]) {
1896         case off:
1897         case manual:
1898                 break;
1899         case speed_cruise:
1900                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
1901                 reg = (reg & ~data->tolerance_mask) |
1902                   (data->target_speed_tolerance[nr] & data->tolerance_mask);
1903                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
1904                 nct6775_write_value(data, data->REG_TARGET[nr],
1905                                     data->target_speed[nr] & 0xff);
1906                 if (data->REG_TOLERANCE_H) {
1907                         reg = (data->target_speed[nr] >> 8) & 0x0f;
1908                         reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
1909                         nct6775_write_value(data,
1910                                             data->REG_TOLERANCE_H[nr],
1911                                             reg);
1912                 }
1913                 break;
1914         case thermal_cruise:
1915                 nct6775_write_value(data, data->REG_TARGET[nr],
1916                                     data->target_temp[nr]);
1917                 /* intentional */
1918         default:
1919                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
1920                 reg = (reg & ~data->tolerance_mask) |
1921                   data->temp_tolerance[0][nr];
1922                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
1923                 break;
1924         }
1925 }
1926
1927 static ssize_t
1928 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
1929 {
1930         struct nct6775_data *data = nct6775_update_device(dev);
1931         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1932
1933         return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
1934 }
1935
1936 static ssize_t
1937 store_pwm_enable(struct device *dev, struct device_attribute *attr,
1938                  const char *buf, size_t count)
1939 {
1940         struct nct6775_data *data = dev_get_drvdata(dev);
1941         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1942         int nr = sattr->index;
1943         unsigned long val;
1944         int err;
1945         u16 reg;
1946
1947         err = kstrtoul(buf, 10, &val);
1948         if (err < 0)
1949                 return err;
1950
1951         if (val > sf4)
1952                 return -EINVAL;
1953
1954         if (val == sf3 && data->kind != nct6775)
1955                 return -EINVAL;
1956
1957         if (val == sf4 && check_trip_points(data, nr)) {
1958                 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
1959                 dev_err(dev, "Adjust trip points and try again\n");
1960                 return -EINVAL;
1961         }
1962
1963         mutex_lock(&data->update_lock);
1964         data->pwm_enable[nr] = val;
1965         if (val == off) {
1966                 /*
1967                  * turn off pwm control: select manual mode, set pwm to maximum
1968                  */
1969                 data->pwm[0][nr] = 255;
1970                 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
1971         }
1972         pwm_update_registers(data, nr);
1973         reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
1974         reg &= 0x0f;
1975         reg |= pwm_enable_to_reg(val) << 4;
1976         nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
1977         mutex_unlock(&data->update_lock);
1978         return count;
1979 }
1980
1981 static ssize_t
1982 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
1983 {
1984         int i, sel = 0;
1985
1986         for (i = 0; i < NUM_TEMP; i++) {
1987                 if (!(data->have_temp & (1 << i)))
1988                         continue;
1989                 if (src == data->temp_src[i]) {
1990                         sel = i + 1;
1991                         break;
1992                 }
1993         }
1994
1995         return sprintf(buf, "%d\n", sel);
1996 }
1997
1998 static ssize_t
1999 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2000 {
2001         struct nct6775_data *data = nct6775_update_device(dev);
2002         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2003         int index = sattr->index;
2004
2005         return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2006 }
2007
2008 static ssize_t
2009 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2010                    const char *buf, size_t count)
2011 {
2012         struct nct6775_data *data = nct6775_update_device(dev);
2013         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2014         int nr = sattr->index;
2015         unsigned long val;
2016         int err, reg, src;
2017
2018         err = kstrtoul(buf, 10, &val);
2019         if (err < 0)
2020                 return err;
2021         if (val == 0 || val > NUM_TEMP)
2022                 return -EINVAL;
2023         if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
2024                 return -EINVAL;
2025
2026         mutex_lock(&data->update_lock);
2027         src = data->temp_src[val - 1];
2028         data->pwm_temp_sel[nr] = src;
2029         reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2030         reg &= 0xe0;
2031         reg |= src;
2032         nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2033         mutex_unlock(&data->update_lock);
2034
2035         return count;
2036 }
2037
2038 static ssize_t
2039 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2040                          char *buf)
2041 {
2042         struct nct6775_data *data = nct6775_update_device(dev);
2043         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2044         int index = sattr->index;
2045
2046         return show_pwm_temp_sel_common(data, buf,
2047                                         data->pwm_weight_temp_sel[index]);
2048 }
2049
2050 static ssize_t
2051 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2052                           const char *buf, size_t count)
2053 {
2054         struct nct6775_data *data = nct6775_update_device(dev);
2055         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2056         int nr = sattr->index;
2057         unsigned long val;
2058         int err, reg, src;
2059
2060         err = kstrtoul(buf, 10, &val);
2061         if (err < 0)
2062                 return err;
2063         if (val > NUM_TEMP)
2064                 return -EINVAL;
2065         if (val && (!(data->have_temp & (1 << (val - 1))) ||
2066                     !data->temp_src[val - 1]))
2067                 return -EINVAL;
2068
2069         mutex_lock(&data->update_lock);
2070         if (val) {
2071                 src = data->temp_src[val - 1];
2072                 data->pwm_weight_temp_sel[nr] = src;
2073                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2074                 reg &= 0xe0;
2075                 reg |= (src | 0x80);
2076                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2077         } else {
2078                 data->pwm_weight_temp_sel[nr] = 0;
2079                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2080                 reg &= 0x7f;
2081                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2082         }
2083         mutex_unlock(&data->update_lock);
2084
2085         return count;
2086 }
2087
2088 static ssize_t
2089 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2090 {
2091         struct nct6775_data *data = nct6775_update_device(dev);
2092         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2093
2094         return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2095 }
2096
2097 static ssize_t
2098 store_target_temp(struct device *dev, struct device_attribute *attr,
2099                   const char *buf, size_t count)
2100 {
2101         struct nct6775_data *data = dev_get_drvdata(dev);
2102         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2103         int nr = sattr->index;
2104         unsigned long val;
2105         int err;
2106
2107         err = kstrtoul(buf, 10, &val);
2108         if (err < 0)
2109                 return err;
2110
2111         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2112                         data->target_temp_mask);
2113
2114         mutex_lock(&data->update_lock);
2115         data->target_temp[nr] = val;
2116         pwm_update_registers(data, nr);
2117         mutex_unlock(&data->update_lock);
2118         return count;
2119 }
2120
2121 static ssize_t
2122 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2123 {
2124         struct nct6775_data *data = nct6775_update_device(dev);
2125         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2126         int nr = sattr->index;
2127
2128         return sprintf(buf, "%d\n",
2129                        fan_from_reg16(data->target_speed[nr],
2130                                       data->fan_div[nr]));
2131 }
2132
2133 static ssize_t
2134 store_target_speed(struct device *dev, struct device_attribute *attr,
2135                    const char *buf, size_t count)
2136 {
2137         struct nct6775_data *data = dev_get_drvdata(dev);
2138         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2139         int nr = sattr->index;
2140         unsigned long val;
2141         int err;
2142         u16 speed;
2143
2144         err = kstrtoul(buf, 10, &val);
2145         if (err < 0)
2146                 return err;
2147
2148         val = clamp_val(val, 0, 1350000U);
2149         speed = fan_to_reg(val, data->fan_div[nr]);
2150
2151         mutex_lock(&data->update_lock);
2152         data->target_speed[nr] = speed;
2153         pwm_update_registers(data, nr);
2154         mutex_unlock(&data->update_lock);
2155         return count;
2156 }
2157
2158 static ssize_t
2159 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2160                     char *buf)
2161 {
2162         struct nct6775_data *data = nct6775_update_device(dev);
2163         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2164         int nr = sattr->nr;
2165         int index = sattr->index;
2166
2167         return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2168 }
2169
2170 static ssize_t
2171 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2172                      const char *buf, size_t count)
2173 {
2174         struct nct6775_data *data = dev_get_drvdata(dev);
2175         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2176         int nr = sattr->nr;
2177         int index = sattr->index;
2178         unsigned long val;
2179         int err;
2180
2181         err = kstrtoul(buf, 10, &val);
2182         if (err < 0)
2183                 return err;
2184
2185         /* Limit tolerance as needed */
2186         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2187
2188         mutex_lock(&data->update_lock);
2189         data->temp_tolerance[index][nr] = val;
2190         if (index)
2191                 pwm_update_registers(data, nr);
2192         else
2193                 nct6775_write_value(data,
2194                                     data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2195                                     val);
2196         mutex_unlock(&data->update_lock);
2197         return count;
2198 }
2199
2200 /*
2201  * Fan speed tolerance is a tricky beast, since the associated register is
2202  * a tick counter, but the value is reported and configured as rpm.
2203  * Compute resulting low and high rpm values and report the difference.
2204  */
2205 static ssize_t
2206 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2207                      char *buf)
2208 {
2209         struct nct6775_data *data = nct6775_update_device(dev);
2210         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2211         int nr = sattr->index;
2212         int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2213         int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2214         int tolerance;
2215
2216         if (low <= 0)
2217                 low = 1;
2218         if (high > 0xffff)
2219                 high = 0xffff;
2220         if (high < low)
2221                 high = low;
2222
2223         tolerance = (fan_from_reg16(low, data->fan_div[nr])
2224                      - fan_from_reg16(high, data->fan_div[nr])) / 2;
2225
2226         return sprintf(buf, "%d\n", tolerance);
2227 }
2228
2229 static ssize_t
2230 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2231                       const char *buf, size_t count)
2232 {
2233         struct nct6775_data *data = dev_get_drvdata(dev);
2234         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2235         int nr = sattr->index;
2236         unsigned long val;
2237         int err;
2238         int low, high;
2239
2240         err = kstrtoul(buf, 10, &val);
2241         if (err < 0)
2242                 return err;
2243
2244         high = fan_from_reg16(data->target_speed[nr],
2245                               data->fan_div[nr]) + val;
2246         low = fan_from_reg16(data->target_speed[nr],
2247                              data->fan_div[nr]) - val;
2248         if (low <= 0)
2249                 low = 1;
2250         if (high < low)
2251                 high = low;
2252
2253         val = (fan_to_reg(low, data->fan_div[nr]) -
2254                fan_to_reg(high, data->fan_div[nr])) / 2;
2255
2256         /* Limit tolerance as needed */
2257         val = clamp_val(val, 0, data->speed_tolerance_limit);
2258
2259         mutex_lock(&data->update_lock);
2260         data->target_speed_tolerance[nr] = val;
2261         pwm_update_registers(data, nr);
2262         mutex_unlock(&data->update_lock);
2263         return count;
2264 }
2265
2266 SENSOR_TEMPLATE_2(pwm, pwm%d, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2267 SENSOR_TEMPLATE(pwm_mode, pwm%d_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2268                 store_pwm_mode, 0);
2269 SENSOR_TEMPLATE(pwm_enable, pwm%d_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2270                 store_pwm_enable, 0);
2271 SENSOR_TEMPLATE(pwm_temp_sel, pwm%d_temp_sel, S_IWUSR | S_IRUGO,
2272                 show_pwm_temp_sel, store_pwm_temp_sel, 0);
2273 SENSOR_TEMPLATE(pwm_target_temp, pwm%d_target_temp, S_IWUSR | S_IRUGO,
2274                 show_target_temp, store_target_temp, 0);
2275 SENSOR_TEMPLATE(fan_target, fan%d_target, S_IWUSR | S_IRUGO, show_target_speed,
2276                 store_target_speed, 0);
2277 SENSOR_TEMPLATE(fan_tolerance, fan%d_tolerance, S_IWUSR | S_IRUGO,
2278                 show_speed_tolerance, store_speed_tolerance, 0);
2279
2280 /* Smart Fan registers */
2281
2282 static ssize_t
2283 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2284 {
2285         struct nct6775_data *data = nct6775_update_device(dev);
2286         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2287         int nr = sattr->nr;
2288         int index = sattr->index;
2289
2290         return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2291 }
2292
2293 static ssize_t
2294 store_weight_temp(struct device *dev, struct device_attribute *attr,
2295                   const char *buf, size_t count)
2296 {
2297         struct nct6775_data *data = dev_get_drvdata(dev);
2298         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2299         int nr = sattr->nr;
2300         int index = sattr->index;
2301         unsigned long val;
2302         int err;
2303
2304         err = kstrtoul(buf, 10, &val);
2305         if (err < 0)
2306                 return err;
2307
2308         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2309
2310         mutex_lock(&data->update_lock);
2311         data->weight_temp[index][nr] = val;
2312         nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2313         mutex_unlock(&data->update_lock);
2314         return count;
2315 }
2316
2317 SENSOR_TEMPLATE(pwm_weight_temp_sel, pwm%d_weight_temp_sel, S_IWUSR | S_IRUGO,
2318                   show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
2319 SENSOR_TEMPLATE_2(pwm_weight_temp_step, pwm%d_weight_temp_step,
2320                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 0);
2321 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, pwm%d_weight_temp_step_tol,
2322                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 1);
2323 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, pwm%d_weight_temp_step_base,
2324                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 2);
2325 SENSOR_TEMPLATE_2(pwm_weight_duty_step, pwm%d_weight_duty_step,
2326                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 5);
2327 SENSOR_TEMPLATE_2(pwm_weight_duty_base, pwm%d_weight_duty_base,
2328                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 6);
2329
2330 static ssize_t
2331 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2332 {
2333         struct nct6775_data *data = nct6775_update_device(dev);
2334         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2335         int nr = sattr->nr;
2336         int index = sattr->index;
2337
2338         return sprintf(buf, "%d\n",
2339                        step_time_from_reg(data->fan_time[index][nr],
2340                                           data->pwm_mode[nr]));
2341 }
2342
2343 static ssize_t
2344 store_fan_time(struct device *dev, struct device_attribute *attr,
2345                const char *buf, size_t count)
2346 {
2347         struct nct6775_data *data = dev_get_drvdata(dev);
2348         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2349         int nr = sattr->nr;
2350         int index = sattr->index;
2351         unsigned long val;
2352         int err;
2353
2354         err = kstrtoul(buf, 10, &val);
2355         if (err < 0)
2356                 return err;
2357
2358         val = step_time_to_reg(val, data->pwm_mode[nr]);
2359         mutex_lock(&data->update_lock);
2360         data->fan_time[index][nr] = val;
2361         nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2362         mutex_unlock(&data->update_lock);
2363         return count;
2364 }
2365
2366 static ssize_t
2367 show_name(struct device *dev, struct device_attribute *attr, char *buf)
2368 {
2369         struct nct6775_data *data = dev_get_drvdata(dev);
2370
2371         return sprintf(buf, "%s\n", data->name);
2372 }
2373
2374 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
2375
2376 static ssize_t
2377 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2378 {
2379         struct nct6775_data *data = nct6775_update_device(dev);
2380         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2381
2382         return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2383 }
2384
2385 static ssize_t
2386 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2387                const char *buf, size_t count)
2388 {
2389         struct nct6775_data *data = dev_get_drvdata(dev);
2390         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2391         int nr = sattr->nr;
2392         int point = sattr->index;
2393         unsigned long val;
2394         int err;
2395         u8 reg;
2396
2397         err = kstrtoul(buf, 10, &val);
2398         if (err < 0)
2399                 return err;
2400         if (val > 255)
2401                 return -EINVAL;
2402
2403         if (point == data->auto_pwm_num) {
2404                 if (data->kind != nct6775 && !val)
2405                         return -EINVAL;
2406                 if (data->kind != nct6779 && val)
2407                         val = 0xff;
2408         }
2409
2410         mutex_lock(&data->update_lock);
2411         data->auto_pwm[nr][point] = val;
2412         if (point < data->auto_pwm_num) {
2413                 nct6775_write_value(data,
2414                                     NCT6775_AUTO_PWM(data, nr, point),
2415                                     data->auto_pwm[nr][point]);
2416         } else {
2417                 switch (data->kind) {
2418                 case nct6775:
2419                         /* disable if needed (pwm == 0) */
2420                         reg = nct6775_read_value(data,
2421                                                  NCT6775_REG_CRITICAL_ENAB[nr]);
2422                         if (val)
2423                                 reg |= 0x02;
2424                         else
2425                                 reg &= ~0x02;
2426                         nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
2427                                             reg);
2428                         break;
2429                 case nct6776:
2430                         break; /* always enabled, nothing to do */
2431                 case nct6779:
2432                         nct6775_write_value(data, NCT6779_REG_CRITICAL_PWM[nr],
2433                                             val);
2434                         reg = nct6775_read_value(data,
2435                                         NCT6779_REG_CRITICAL_PWM_ENABLE[nr]);
2436                         if (val == 255)
2437                                 reg &= ~0x01;
2438                         else
2439                                 reg |= 0x01;
2440                         nct6775_write_value(data,
2441                                             NCT6779_REG_CRITICAL_PWM_ENABLE[nr],
2442                                             reg);
2443                         break;
2444                 }
2445         }
2446         mutex_unlock(&data->update_lock);
2447         return count;
2448 }
2449
2450 static ssize_t
2451 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
2452 {
2453         struct nct6775_data *data = nct6775_update_device(dev);
2454         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2455         int nr = sattr->nr;
2456         int point = sattr->index;
2457
2458         /*
2459          * We don't know for sure if the temperature is signed or unsigned.
2460          * Assume it is unsigned.
2461          */
2462         return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
2463 }
2464
2465 static ssize_t
2466 store_auto_temp(struct device *dev, struct device_attribute *attr,
2467                 const char *buf, size_t count)
2468 {
2469         struct nct6775_data *data = dev_get_drvdata(dev);
2470         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2471         int nr = sattr->nr;
2472         int point = sattr->index;
2473         unsigned long val;
2474         int err;
2475
2476         err = kstrtoul(buf, 10, &val);
2477         if (err)
2478                 return err;
2479         if (val > 255000)
2480                 return -EINVAL;
2481
2482         mutex_lock(&data->update_lock);
2483         data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
2484         if (point < data->auto_pwm_num) {
2485                 nct6775_write_value(data,
2486                                     NCT6775_AUTO_TEMP(data, nr, point),
2487                                     data->auto_temp[nr][point]);
2488         } else {
2489                 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
2490                                     data->auto_temp[nr][point]);
2491         }
2492         mutex_unlock(&data->update_lock);
2493         return count;
2494 }
2495
2496 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
2497                                       struct attribute *attr, int index)
2498 {
2499         struct device *dev = container_of(kobj, struct device, kobj);
2500         struct nct6775_data *data = dev_get_drvdata(dev);
2501         int pwm = index / 36;   /* pwm index */
2502         int nr = index % 36;    /* attribute index */
2503
2504         if (!(data->has_pwm & (1 << pwm)))
2505                 return 0;
2506
2507         if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
2508                 return 0;
2509         if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
2510                 return 0;
2511         if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
2512                 return 0;
2513
2514         if (nr >= 22 && nr <= 35) {             /* auto point */
2515                 int api = (nr - 22) / 2;        /* auto point index */
2516
2517                 if (api > data->auto_pwm_num)
2518                         return 0;
2519         }
2520         return attr->mode;
2521 }
2522
2523 SENSOR_TEMPLATE_2(pwm_stop_time, pwm%d_stop_time, S_IWUSR | S_IRUGO,
2524                   show_fan_time, store_fan_time, 0, 0);
2525 SENSOR_TEMPLATE_2(pwm_step_up_time, pwm%d_step_up_time, S_IWUSR | S_IRUGO,
2526                   show_fan_time, store_fan_time, 0, 1);
2527 SENSOR_TEMPLATE_2(pwm_step_down_time, pwm%d_step_down_time, S_IWUSR | S_IRUGO,
2528                   show_fan_time, store_fan_time, 0, 2);
2529 SENSOR_TEMPLATE_2(pwm_start, pwm%d_start, S_IWUSR | S_IRUGO, show_pwm,
2530                   store_pwm, 0, 1);
2531 SENSOR_TEMPLATE_2(pwm_floor, pwm%d_floor, S_IWUSR | S_IRUGO, show_pwm,
2532                   store_pwm, 0, 2);
2533 SENSOR_TEMPLATE_2(pwm_temp_tolerance, pwm%d_temp_tolerance, S_IWUSR | S_IRUGO,
2534                   show_temp_tolerance, store_temp_tolerance, 0, 0);
2535 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, pwm%d_crit_temp_tolerance,
2536                   S_IWUSR | S_IRUGO, show_temp_tolerance, store_temp_tolerance,
2537                   0, 1);
2538
2539 SENSOR_TEMPLATE_2(pwm_max, pwm%d_max, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2540                   0, 3);
2541
2542 SENSOR_TEMPLATE_2(pwm_step, pwm%d_step, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2543                   0, 4);
2544
2545 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, pwm%d_auto_point1_pwm, S_IWUSR | S_IRUGO,
2546                   show_auto_pwm, store_auto_pwm, 0, 0);
2547 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, pwm%d_auto_point1_temp,
2548                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 0);
2549
2550 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, pwm%d_auto_point2_pwm, S_IWUSR | S_IRUGO,
2551                   show_auto_pwm, store_auto_pwm, 0, 1);
2552 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, pwm%d_auto_point2_temp,
2553                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 1);
2554
2555 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, pwm%d_auto_point3_pwm, S_IWUSR | S_IRUGO,
2556                   show_auto_pwm, store_auto_pwm, 0, 2);
2557 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, pwm%d_auto_point3_temp,
2558                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 2);
2559
2560 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, pwm%d_auto_point4_pwm, S_IWUSR | S_IRUGO,
2561                   show_auto_pwm, store_auto_pwm, 0, 3);
2562 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, pwm%d_auto_point4_temp,
2563                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 3);
2564
2565 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, pwm%d_auto_point5_pwm, S_IWUSR | S_IRUGO,
2566                   show_auto_pwm, store_auto_pwm, 0, 4);
2567 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, pwm%d_auto_point5_temp,
2568                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 4);
2569
2570 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, pwm%d_auto_point6_pwm, S_IWUSR | S_IRUGO,
2571                   show_auto_pwm, store_auto_pwm, 0, 5);
2572 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, pwm%d_auto_point6_temp,
2573                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 5);
2574
2575 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, pwm%d_auto_point7_pwm, S_IWUSR | S_IRUGO,
2576                   show_auto_pwm, store_auto_pwm, 0, 6);
2577 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, pwm%d_auto_point7_temp,
2578                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 6);
2579
2580 /*
2581  * nct6775_pwm_is_visible uses the index into the following array
2582  * to determine if attributes should be created or not.
2583  * Any change in order or content must be matched.
2584  */
2585 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
2586         &sensor_dev_template_pwm,
2587         &sensor_dev_template_pwm_mode,
2588         &sensor_dev_template_pwm_enable,
2589         &sensor_dev_template_pwm_temp_sel,
2590         &sensor_dev_template_pwm_temp_tolerance,
2591         &sensor_dev_template_pwm_crit_temp_tolerance,
2592         &sensor_dev_template_pwm_target_temp,
2593         &sensor_dev_template_fan_target,
2594         &sensor_dev_template_fan_tolerance,
2595         &sensor_dev_template_pwm_stop_time,
2596         &sensor_dev_template_pwm_step_up_time,
2597         &sensor_dev_template_pwm_step_down_time,
2598         &sensor_dev_template_pwm_start,
2599         &sensor_dev_template_pwm_floor,
2600         &sensor_dev_template_pwm_weight_temp_sel,
2601         &sensor_dev_template_pwm_weight_temp_step,
2602         &sensor_dev_template_pwm_weight_temp_step_tol,
2603         &sensor_dev_template_pwm_weight_temp_step_base,
2604         &sensor_dev_template_pwm_weight_duty_step,
2605         &sensor_dev_template_pwm_max,                   /* 19 */
2606         &sensor_dev_template_pwm_step,                  /* 20 */
2607         &sensor_dev_template_pwm_weight_duty_base,      /* 21 */
2608         &sensor_dev_template_pwm_auto_point1_pwm,       /* 22 */
2609         &sensor_dev_template_pwm_auto_point1_temp,
2610         &sensor_dev_template_pwm_auto_point2_pwm,
2611         &sensor_dev_template_pwm_auto_point2_temp,
2612         &sensor_dev_template_pwm_auto_point3_pwm,
2613         &sensor_dev_template_pwm_auto_point3_temp,
2614         &sensor_dev_template_pwm_auto_point4_pwm,
2615         &sensor_dev_template_pwm_auto_point4_temp,
2616         &sensor_dev_template_pwm_auto_point5_pwm,
2617         &sensor_dev_template_pwm_auto_point5_temp,
2618         &sensor_dev_template_pwm_auto_point6_pwm,
2619         &sensor_dev_template_pwm_auto_point6_temp,
2620         &sensor_dev_template_pwm_auto_point7_pwm,
2621         &sensor_dev_template_pwm_auto_point7_temp,      /* 35 */
2622
2623         NULL
2624 };
2625
2626 static struct sensor_template_group nct6775_pwm_template_group = {
2627         .templates = nct6775_attributes_pwm_template,
2628         .is_visible = nct6775_pwm_is_visible,
2629         .base = 1,
2630 };
2631
2632 static ssize_t
2633 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
2634 {
2635         struct nct6775_data *data = dev_get_drvdata(dev);
2636         return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
2637 }
2638
2639 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
2640
2641 /* Case open detection */
2642
2643 static ssize_t
2644 clear_caseopen(struct device *dev, struct device_attribute *attr,
2645                const char *buf, size_t count)
2646 {
2647         struct nct6775_data *data = dev_get_drvdata(dev);
2648         struct nct6775_sio_data *sio_data = dev->platform_data;
2649         int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
2650         unsigned long val;
2651         u8 reg;
2652         int ret;
2653
2654         if (kstrtoul(buf, 10, &val) || val != 0)
2655                 return -EINVAL;
2656
2657         mutex_lock(&data->update_lock);
2658
2659         /*
2660          * Use CR registers to clear caseopen status.
2661          * The CR registers are the same for all chips, and not all chips
2662          * support clearing the caseopen status through "regular" registers.
2663          */
2664         ret = superio_enter(sio_data->sioreg);
2665         if (ret) {
2666                 count = ret;
2667                 goto error;
2668         }
2669
2670         superio_select(sio_data->sioreg, NCT6775_LD_ACPI);
2671         reg = superio_inb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
2672         reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
2673         superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
2674         reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
2675         superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
2676         superio_exit(sio_data->sioreg);
2677
2678         data->valid = false;    /* Force cache refresh */
2679 error:
2680         mutex_unlock(&data->update_lock);
2681         return count;
2682 }
2683
2684 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
2685                           clear_caseopen, INTRUSION_ALARM_BASE);
2686 static SENSOR_DEVICE_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
2687                           clear_caseopen, INTRUSION_ALARM_BASE + 1);
2688
2689 static umode_t nct6775_other_is_visible(struct kobject *kobj,
2690                                         struct attribute *attr, int index)
2691 {
2692         struct device *dev = container_of(kobj, struct device, kobj);
2693         struct nct6775_data *data = dev_get_drvdata(dev);
2694
2695         if (index == 1 && !data->have_vid)
2696                 return 0;
2697
2698         if (index == 2 || index == 3) {
2699                 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + index - 2] < 0)
2700                         return 0;
2701         }
2702
2703         return attr->mode;
2704 }
2705
2706 /*
2707  * nct6775_other_is_visible uses the index into the following array
2708  * to determine if attributes should be created or not.
2709  * Any change in order or content must be matched.
2710  */
2711 static struct attribute *nct6775_attributes_other[] = {
2712         &dev_attr_name.attr,
2713         &dev_attr_cpu0_vid.attr,                                /* 1 */
2714         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,        /* 2 */
2715         &sensor_dev_attr_intrusion1_alarm.dev_attr.attr,        /* 3 */
2716
2717         NULL
2718 };
2719
2720 static const struct attribute_group nct6775_group_other = {
2721         .attrs = nct6775_attributes_other,
2722         .is_visible = nct6775_other_is_visible,
2723 };
2724
2725 /*
2726  * Driver and device management
2727  */
2728
2729 static void nct6775_device_remove_files(struct device *dev)
2730 {
2731         struct nct6775_data *data = dev_get_drvdata(dev);
2732
2733         if (data->group_pwm)
2734                 sysfs_remove_group(&dev->kobj, data->group_pwm);
2735         if (data->group_in)
2736                 sysfs_remove_group(&dev->kobj, data->group_in);
2737         if (data->group_fan)
2738                 sysfs_remove_group(&dev->kobj, data->group_fan);
2739         if (data->group_temp)
2740                 sysfs_remove_group(&dev->kobj, data->group_temp);
2741
2742         sysfs_remove_group(&dev->kobj, &nct6775_group_other);
2743 }
2744
2745 /* Get the monitoring functions started */
2746 static inline void nct6775_init_device(struct nct6775_data *data)
2747 {
2748         int i;
2749         u8 tmp, diode;
2750
2751         /* Start monitoring if needed */
2752         if (data->REG_CONFIG) {
2753                 tmp = nct6775_read_value(data, data->REG_CONFIG);
2754                 if (!(tmp & 0x01))
2755                         nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
2756         }
2757
2758         /* Enable temperature sensors if needed */
2759         for (i = 0; i < NUM_TEMP; i++) {
2760                 if (!(data->have_temp & (1 << i)))
2761                         continue;
2762                 if (!data->reg_temp_config[i])
2763                         continue;
2764                 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
2765                 if (tmp & 0x01)
2766                         nct6775_write_value(data, data->reg_temp_config[i],
2767                                             tmp & 0xfe);
2768         }
2769
2770         /* Enable VBAT monitoring if needed */
2771         tmp = nct6775_read_value(data, data->REG_VBAT);
2772         if (!(tmp & 0x01))
2773                 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
2774
2775         diode = nct6775_read_value(data, data->REG_DIODE);
2776
2777         for (i = 0; i < data->temp_fixed_num; i++) {
2778                 if (!(data->have_temp_fixed & (1 << i)))
2779                         continue;
2780                 if ((tmp & (0x02 << i)))        /* diode */
2781                         data->temp_type[i] = 3 - ((diode >> i) & 0x02);
2782                 else                            /* thermistor */
2783                         data->temp_type[i] = 4;
2784         }
2785 }
2786
2787 static void
2788 nct6775_check_fan_inputs(const struct nct6775_sio_data *sio_data,
2789                          struct nct6775_data *data)
2790 {
2791         int regval;
2792         bool fan3pin, fan3min, fan4pin, fan4min, fan5pin;
2793         bool pwm3pin, pwm4pin, pwm5pin;
2794
2795         /* fan4 and fan5 share some pins with the GPIO and serial flash */
2796         if (data->kind == nct6775) {
2797                 regval = superio_inb(sio_data->sioreg, 0x2c);
2798
2799                 fan3pin = regval & (1 << 6);
2800                 fan3min = fan3pin;
2801                 pwm3pin = regval & (1 << 7);
2802
2803                 /* On NCT6775, fan4 shares pins with the fdc interface */
2804                 fan4pin = !(superio_inb(sio_data->sioreg, 0x2A) & 0x80);
2805                 fan4min = 0;
2806                 fan5pin = 0;
2807                 pwm4pin = 0;
2808                 pwm5pin = 0;
2809         } else if (data->kind == nct6776) {
2810                 bool gpok = superio_inb(sio_data->sioreg, 0x27) & 0x80;
2811
2812                 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
2813                 regval = superio_inb(sio_data->sioreg, SIO_REG_ENABLE);
2814
2815                 if (regval & 0x80)
2816                         fan3pin = gpok;
2817                 else
2818                         fan3pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x40);
2819
2820                 if (regval & 0x40)
2821                         fan4pin = gpok;
2822                 else
2823                         fan4pin = superio_inb(sio_data->sioreg, 0x1C) & 0x01;
2824
2825                 if (regval & 0x20)
2826                         fan5pin = gpok;
2827                 else
2828                         fan5pin = superio_inb(sio_data->sioreg, 0x1C) & 0x02;
2829
2830                 fan4min = fan4pin;
2831                 fan3min = fan3pin;
2832                 pwm3pin = fan3pin;
2833                 pwm4pin = 0;
2834                 pwm5pin = 0;
2835         } else {        /* NCT6779D */
2836                 regval = superio_inb(sio_data->sioreg, 0x1c);
2837
2838                 fan3pin = !(regval & (1 << 5));
2839                 fan4pin = !(regval & (1 << 6));
2840                 fan5pin = !(regval & (1 << 7));
2841
2842                 pwm3pin = !(regval & (1 << 0));
2843                 pwm4pin = !(regval & (1 << 1));
2844                 pwm5pin = !(regval & (1 << 2));
2845
2846                 fan3min = fan3pin;
2847                 fan4min = fan4pin;
2848         }
2849
2850         data->has_fan = data->has_fan_min = 0x03; /* fan1 and fan2 */
2851         data->has_fan |= fan3pin << 2;
2852         data->has_fan_min |= fan3min << 2;
2853
2854         data->has_fan |= (fan4pin << 3) | (fan5pin << 4);
2855         data->has_fan_min |= (fan4min << 3) | (fan5pin << 4);
2856
2857         data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) | (pwm5pin << 4);
2858 }
2859
2860 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
2861                              int *available, int *mask)
2862 {
2863         int i;
2864         u8 src;
2865
2866         for (i = 0; i < data->pwm_num && *available; i++) {
2867                 int index;
2868
2869                 if (!regp[i])
2870                         continue;
2871                 src = nct6775_read_value(data, regp[i]);
2872                 src &= 0x1f;
2873                 if (!src || (*mask & (1 << src)))
2874                         continue;
2875                 if (src >= data->temp_label_num ||
2876                     !strlen(data->temp_label[src]))
2877                         continue;
2878
2879                 index = __ffs(*available);
2880                 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
2881                 *available &= ~(1 << index);
2882                 *mask |= 1 << src;
2883         }
2884 }
2885
2886 static int nct6775_probe(struct platform_device *pdev)
2887 {
2888         struct device *dev = &pdev->dev;
2889         struct nct6775_sio_data *sio_data = dev->platform_data;
2890         struct nct6775_data *data;
2891         struct resource *res;
2892         int i, s, err = 0;
2893         int src, mask, available;
2894         const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
2895         const u16 *reg_temp_alternate, *reg_temp_crit;
2896         int num_reg_temp;
2897         u8 cr2a;
2898         struct attribute_group *group;
2899
2900         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
2901         if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
2902                                  DRVNAME))
2903                 return -EBUSY;
2904
2905         data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
2906                             GFP_KERNEL);
2907         if (!data)
2908                 return -ENOMEM;
2909
2910         data->kind = sio_data->kind;
2911         data->addr = res->start;
2912         mutex_init(&data->update_lock);
2913         data->name = nct6775_device_names[data->kind];
2914         data->bank = 0xff;              /* Force initial bank selection */
2915         platform_set_drvdata(pdev, data);
2916
2917         switch (data->kind) {
2918         case nct6775:
2919                 data->in_num = 9;
2920                 data->pwm_num = 3;
2921                 data->auto_pwm_num = 6;
2922                 data->has_fan_div = true;
2923                 data->temp_fixed_num = 3;
2924
2925                 data->ALARM_BITS = NCT6775_ALARM_BITS;
2926
2927                 data->fan_from_reg = fan_from_reg16;
2928                 data->fan_from_reg_min = fan_from_reg8;
2929                 data->target_temp_mask = 0x7f;
2930                 data->tolerance_mask = 0x0f;
2931                 data->speed_tolerance_limit = 15;
2932
2933                 data->temp_label = nct6775_temp_label;
2934                 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
2935
2936                 data->REG_CONFIG = NCT6775_REG_CONFIG;
2937                 data->REG_VBAT = NCT6775_REG_VBAT;
2938                 data->REG_DIODE = NCT6775_REG_DIODE;
2939                 data->REG_VIN = NCT6775_REG_IN;
2940                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
2941                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
2942                 data->REG_TARGET = NCT6775_REG_TARGET;
2943                 data->REG_FAN = NCT6775_REG_FAN;
2944                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
2945                 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
2946                 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
2947                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
2948                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
2949                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
2950                 data->REG_PWM[0] = NCT6775_REG_PWM;
2951                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
2952                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
2953                 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
2954                 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
2955                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
2956                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
2957                 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
2958                 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
2959                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
2960                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
2961                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
2962                 data->REG_CRITICAL_TEMP_TOLERANCE
2963                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
2964                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
2965                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
2966                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
2967                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
2968                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
2969                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
2970                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
2971                 data->REG_ALARM = NCT6775_REG_ALARM;
2972
2973                 reg_temp = NCT6775_REG_TEMP;
2974                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
2975                 reg_temp_over = NCT6775_REG_TEMP_OVER;
2976                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
2977                 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
2978                 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
2979                 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
2980
2981                 break;
2982         case nct6776:
2983                 data->in_num = 9;
2984                 data->pwm_num = 3;
2985                 data->auto_pwm_num = 4;
2986                 data->has_fan_div = false;
2987                 data->temp_fixed_num = 3;
2988
2989                 data->ALARM_BITS = NCT6776_ALARM_BITS;
2990
2991                 data->fan_from_reg = fan_from_reg13;
2992                 data->fan_from_reg_min = fan_from_reg13;
2993                 data->target_temp_mask = 0xff;
2994                 data->tolerance_mask = 0x07;
2995                 data->speed_tolerance_limit = 63;
2996
2997                 data->temp_label = nct6776_temp_label;
2998                 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
2999
3000                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3001                 data->REG_VBAT = NCT6775_REG_VBAT;
3002                 data->REG_DIODE = NCT6775_REG_DIODE;
3003                 data->REG_VIN = NCT6775_REG_IN;
3004                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3005                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3006                 data->REG_TARGET = NCT6775_REG_TARGET;
3007                 data->REG_FAN = NCT6775_REG_FAN;
3008                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3009                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3010                 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3011                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3012                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3013                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3014                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3015                 data->REG_PWM[0] = NCT6775_REG_PWM;
3016                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3017                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3018                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3019                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3020                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3021                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3022                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3023                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3024                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3025                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3026                 data->REG_CRITICAL_TEMP_TOLERANCE
3027                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3028                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3029                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3030                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3031                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3032                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3033                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3034                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3035                 data->REG_ALARM = NCT6775_REG_ALARM;
3036
3037                 reg_temp = NCT6775_REG_TEMP;
3038                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3039                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3040                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3041                 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3042                 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3043                 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3044
3045                 break;
3046         case nct6779:
3047                 data->in_num = 15;
3048                 data->pwm_num = 5;
3049                 data->auto_pwm_num = 4;
3050                 data->has_fan_div = false;
3051                 data->temp_fixed_num = 6;
3052
3053                 data->ALARM_BITS = NCT6779_ALARM_BITS;
3054
3055                 data->fan_from_reg = fan_from_reg13;
3056                 data->fan_from_reg_min = fan_from_reg13;
3057                 data->target_temp_mask = 0xff;
3058                 data->tolerance_mask = 0x07;
3059                 data->speed_tolerance_limit = 63;
3060
3061                 data->temp_label = nct6779_temp_label;
3062                 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3063
3064                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3065                 data->REG_VBAT = NCT6775_REG_VBAT;
3066                 data->REG_DIODE = NCT6775_REG_DIODE;
3067                 data->REG_VIN = NCT6779_REG_IN;
3068                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3069                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3070                 data->REG_TARGET = NCT6775_REG_TARGET;
3071                 data->REG_FAN = NCT6779_REG_FAN;
3072                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3073                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3074                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3075                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3076                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3077                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3078                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3079                 data->REG_PWM[0] = NCT6775_REG_PWM;
3080                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3081                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3082                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3083                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3084                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3085                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3086                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3087                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3088                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3089                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3090                 data->REG_CRITICAL_TEMP_TOLERANCE
3091                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3092                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3093                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3094                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3095                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3096                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3097                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3098                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3099                 data->REG_ALARM = NCT6779_REG_ALARM;
3100
3101                 reg_temp = NCT6779_REG_TEMP;
3102                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3103                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3104                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3105                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3106                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3107                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3108
3109                 break;
3110         default:
3111                 return -ENODEV;
3112         }
3113         data->have_in = (1 << data->in_num) - 1;
3114         data->have_temp = 0;
3115
3116         /*
3117          * On some boards, not all available temperature sources are monitored,
3118          * even though some of the monitoring registers are unused.
3119          * Get list of unused monitoring registers, then detect if any fan
3120          * controls are configured to use unmonitored temperature sources.
3121          * If so, assign the unmonitored temperature sources to available
3122          * monitoring registers.
3123          */
3124         mask = 0;
3125         available = 0;
3126         for (i = 0; i < num_reg_temp; i++) {
3127                 if (reg_temp[i] == 0)
3128                         continue;
3129
3130                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3131                 if (!src || (mask & (1 << src)))
3132                         available |= 1 << i;
3133
3134                 mask |= 1 << src;
3135         }
3136
3137         /*
3138          * Now find unmonitored temperature registers and enable monitoring
3139          * if additional monitoring registers are available.
3140          */
3141         add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
3142         add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
3143
3144         mask = 0;
3145         s = NUM_TEMP_FIXED;     /* First dynamic temperature attribute */
3146         for (i = 0; i < num_reg_temp; i++) {
3147                 if (reg_temp[i] == 0)
3148                         continue;
3149
3150                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3151                 if (!src || (mask & (1 << src)))
3152                         continue;
3153
3154                 if (src >= data->temp_label_num ||
3155                     !strlen(data->temp_label[src])) {
3156                         dev_info(dev,
3157                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3158                                  src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
3159                         continue;
3160                 }
3161
3162                 mask |= 1 << src;
3163
3164                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3165                 if (src <= data->temp_fixed_num) {
3166                         data->have_temp |= 1 << (src - 1);
3167                         data->have_temp_fixed |= 1 << (src - 1);
3168                         data->reg_temp[0][src - 1] = reg_temp[i];
3169                         data->reg_temp[1][src - 1] = reg_temp_over[i];
3170                         data->reg_temp[2][src - 1] = reg_temp_hyst[i];
3171                         data->reg_temp_config[src - 1] = reg_temp_config[i];
3172                         data->temp_src[src - 1] = src;
3173                         continue;
3174                 }
3175
3176                 if (s >= NUM_TEMP)
3177                         continue;
3178
3179                 /* Use dynamic index for other sources */
3180                 data->have_temp |= 1 << s;
3181                 data->reg_temp[0][s] = reg_temp[i];
3182                 data->reg_temp[1][s] = reg_temp_over[i];
3183                 data->reg_temp[2][s] = reg_temp_hyst[i];
3184                 data->reg_temp_config[s] = reg_temp_config[i];
3185                 if (reg_temp_crit[src - 1])
3186                         data->reg_temp[3][s] = reg_temp_crit[src - 1];
3187
3188                 data->temp_src[s] = src;
3189                 s++;
3190         }
3191
3192 #ifdef USE_ALTERNATE
3193         /*
3194          * Go through the list of alternate temp registers and enable
3195          * if possible.
3196          * The temperature is already monitored if the respective bit in <mask>
3197          * is set.
3198          */
3199         for (i = 0; i < data->temp_label_num - 1; i++) {
3200                 if (!reg_temp_alternate[i])
3201                         continue;
3202                 if (mask & (1 << (i + 1)))
3203                         continue;
3204                 if (i < data->temp_fixed_num) {
3205                         if (data->have_temp & (1 << i))
3206                                 continue;
3207                         data->have_temp |= 1 << i;
3208                         data->have_temp_fixed |= 1 << i;
3209                         data->reg_temp[0][i] = reg_temp_alternate[i];
3210                         data->reg_temp[1][i] = reg_temp_over[i];
3211                         data->reg_temp[2][i] = reg_temp_hyst[i];
3212                         data->temp_src[i] = i + 1;
3213                         continue;
3214                 }
3215
3216                 if (s >= NUM_TEMP)      /* Abort if no more space */
3217                         break;
3218
3219                 data->have_temp |= 1 << s;
3220                 data->reg_temp[0][s] = reg_temp_alternate[i];
3221                 data->temp_src[s] = i + 1;
3222                 s++;
3223         }
3224 #endif /* USE_ALTERNATE */
3225
3226         /* Initialize the chip */
3227         nct6775_init_device(data);
3228
3229         err = superio_enter(sio_data->sioreg);
3230         if (err)
3231                 return err;
3232
3233         cr2a = superio_inb(sio_data->sioreg, 0x2a);
3234         switch (data->kind) {
3235         case nct6775:
3236                 data->have_vid = (cr2a & 0x40);
3237                 break;
3238         case nct6776:
3239                 data->have_vid = (cr2a & 0x60) == 0x40;
3240                 break;
3241         case nct6779:
3242                 break;
3243         }
3244
3245         /*
3246          * Read VID value
3247          * We can get the VID input values directly at logical device D 0xe3.
3248          */
3249         if (data->have_vid) {
3250                 superio_select(sio_data->sioreg, NCT6775_LD_VID);
3251                 data->vid = superio_inb(sio_data->sioreg, 0xe3);
3252                 data->vrm = vid_which_vrm();
3253         }
3254
3255         if (fan_debounce) {
3256                 u8 tmp;
3257
3258                 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3259                 tmp = superio_inb(sio_data->sioreg,
3260                                   NCT6775_REG_CR_FAN_DEBOUNCE);
3261                 switch (data->kind) {
3262                 case nct6775:
3263                         tmp |= 0x1e;
3264                         break;
3265                 case nct6776:
3266                 case nct6779:
3267                         tmp |= 0x3e;
3268                         break;
3269                 }
3270                 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
3271                              tmp);
3272                 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
3273                          data->name);
3274         }
3275
3276         nct6775_check_fan_inputs(sio_data, data);
3277
3278         superio_exit(sio_data->sioreg);
3279
3280         /* Read fan clock dividers immediately */
3281         nct6775_init_fan_common(dev, data);
3282
3283         /* Register sysfs hooks */
3284         group = nct6775_create_attr_group(dev, &nct6775_pwm_template_group,
3285                                           data->pwm_num);
3286         if (IS_ERR(group)) {
3287                 err = PTR_ERR(group);
3288                 goto exit_remove;
3289         }
3290         data->group_pwm = group;
3291
3292         group = nct6775_create_attr_group(dev, &nct6775_in_template_group,
3293                                           fls(data->have_in));
3294         if (IS_ERR(group)) {
3295                 err = PTR_ERR(group);
3296                 goto exit_remove;
3297         }
3298         data->group_in = group;
3299
3300         group = nct6775_create_attr_group(dev, &nct6775_fan_template_group,
3301                                           fls(data->has_fan));
3302         if (IS_ERR(group)) {
3303                 err = PTR_ERR(group);
3304                 goto exit_remove;
3305         }
3306         data->group_fan = group;
3307
3308         group = nct6775_create_attr_group(dev, &nct6775_temp_template_group,
3309                                           fls(data->have_temp));
3310         if (IS_ERR(group)) {
3311                 err = PTR_ERR(group);
3312                 goto exit_remove;
3313         }
3314         data->group_temp = group;
3315
3316         err = sysfs_create_group(&dev->kobj, &nct6775_group_other);
3317         if (err)
3318                 goto exit_remove;
3319
3320         data->hwmon_dev = hwmon_device_register(dev);
3321         if (IS_ERR(data->hwmon_dev)) {
3322                 err = PTR_ERR(data->hwmon_dev);
3323                 goto exit_remove;
3324         }
3325
3326         return 0;
3327
3328 exit_remove:
3329         nct6775_device_remove_files(dev);
3330         return err;
3331 }
3332
3333 static int nct6775_remove(struct platform_device *pdev)
3334 {
3335         struct nct6775_data *data = platform_get_drvdata(pdev);
3336
3337         hwmon_device_unregister(data->hwmon_dev);
3338         nct6775_device_remove_files(&pdev->dev);
3339
3340         return 0;
3341 }
3342
3343 #ifdef CONFIG_PM
3344 static int nct6775_suspend(struct device *dev)
3345 {
3346         struct nct6775_data *data = nct6775_update_device(dev);
3347         struct nct6775_sio_data *sio_data = dev->platform_data;
3348
3349         mutex_lock(&data->update_lock);
3350         data->vbat = nct6775_read_value(data, data->REG_VBAT);
3351         if (sio_data->kind == nct6775) {
3352                 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
3353                 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
3354         }
3355         mutex_unlock(&data->update_lock);
3356
3357         return 0;
3358 }
3359
3360 static int nct6775_resume(struct device *dev)
3361 {
3362         struct nct6775_data *data = dev_get_drvdata(dev);
3363         struct nct6775_sio_data *sio_data = dev->platform_data;
3364         int i, j;
3365
3366         mutex_lock(&data->update_lock);
3367         data->bank = 0xff;              /* Force initial bank selection */
3368
3369         /* Restore limits */
3370         for (i = 0; i < data->in_num; i++) {
3371                 if (!(data->have_in & (1 << i)))
3372                         continue;
3373
3374                 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
3375                                     data->in[i][1]);
3376                 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
3377                                     data->in[i][2]);
3378         }
3379
3380         for (i = 0; i < 5; i++) {
3381                 if (!(data->has_fan_min & (1 << i)))
3382                         continue;
3383
3384                 nct6775_write_value(data, data->REG_FAN_MIN[i],
3385                                     data->fan_min[i]);
3386         }
3387
3388         for (i = 0; i < NUM_TEMP; i++) {
3389                 if (!(data->have_temp & (1 << i)))
3390                         continue;
3391
3392                 for (j = 1; j < 4; j++)
3393                         if (data->reg_temp[j][i])
3394                                 nct6775_write_temp(data, data->reg_temp[j][i],
3395                                                    data->temp[j][i]);
3396         }
3397
3398         /* Restore other settings */
3399         nct6775_write_value(data, data->REG_VBAT, data->vbat);
3400         if (sio_data->kind == nct6775) {
3401                 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
3402                 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
3403         }
3404
3405         /* Force re-reading all values */
3406         data->valid = false;
3407         mutex_unlock(&data->update_lock);
3408
3409         return 0;
3410 }
3411
3412 static const struct dev_pm_ops nct6775_dev_pm_ops = {
3413         .suspend = nct6775_suspend,
3414         .resume = nct6775_resume,
3415 };
3416
3417 #define NCT6775_DEV_PM_OPS      (&nct6775_dev_pm_ops)
3418 #else
3419 #define NCT6775_DEV_PM_OPS      NULL
3420 #endif /* CONFIG_PM */
3421
3422 static struct platform_driver nct6775_driver = {
3423         .driver = {
3424                 .owner  = THIS_MODULE,
3425                 .name   = DRVNAME,
3426                 .pm     = NCT6775_DEV_PM_OPS,
3427         },
3428         .probe          = nct6775_probe,
3429         .remove         = nct6775_remove,
3430 };
3431
3432 static const char *nct6775_sio_names[] __initconst = {
3433         "NCT6775F",
3434         "NCT6776D/F",
3435         "NCT6779D",
3436 };
3437
3438 /* nct6775_find() looks for a '627 in the Super-I/O config space */
3439 static int __init nct6775_find(int sioaddr, unsigned short *addr,
3440                                struct nct6775_sio_data *sio_data)
3441 {
3442         u16 val;
3443         int err;
3444
3445         err = superio_enter(sioaddr);
3446         if (err)
3447                 return err;
3448
3449         if (force_id)
3450                 val = force_id;
3451         else
3452                 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
3453                     | superio_inb(sioaddr, SIO_REG_DEVID + 1);
3454         switch (val & SIO_ID_MASK) {
3455         case SIO_NCT6775_ID:
3456                 sio_data->kind = nct6775;
3457                 break;
3458         case SIO_NCT6776_ID:
3459                 sio_data->kind = nct6776;
3460                 break;
3461         case SIO_NCT6779_ID:
3462                 sio_data->kind = nct6779;
3463                 break;
3464         default:
3465                 if (val != 0xffff)
3466                         pr_debug("unsupported chip ID: 0x%04x\n", val);
3467                 superio_exit(sioaddr);
3468                 return -ENODEV;
3469         }
3470
3471         /* We have a known chip, find the HWM I/O address */
3472         superio_select(sioaddr, NCT6775_LD_HWM);
3473         val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
3474             | superio_inb(sioaddr, SIO_REG_ADDR + 1);
3475         *addr = val & IOREGION_ALIGNMENT;
3476         if (*addr == 0) {
3477                 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
3478                 superio_exit(sioaddr);
3479                 return -ENODEV;
3480         }
3481
3482         /* Activate logical device if needed */
3483         val = superio_inb(sioaddr, SIO_REG_ENABLE);
3484         if (!(val & 0x01)) {
3485                 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
3486                 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
3487         }
3488
3489         superio_exit(sioaddr);
3490         pr_info("Found %s or compatible chip at %#x:%#x\n",
3491                 nct6775_sio_names[sio_data->kind], sioaddr, *addr);
3492         sio_data->sioreg = sioaddr;
3493
3494         return 0;
3495 }
3496
3497 /*
3498  * when Super-I/O functions move to a separate file, the Super-I/O
3499  * bus will manage the lifetime of the device and this module will only keep
3500  * track of the nct6775 driver. But since we platform_device_alloc(), we
3501  * must keep track of the device
3502  */
3503 static struct platform_device *pdev[2];
3504
3505 static int __init sensors_nct6775_init(void)
3506 {
3507         int i, err;
3508         bool found = false;
3509         unsigned short address;
3510         struct resource res;
3511         struct nct6775_sio_data sio_data;
3512         int sioaddr[2] = { 0x2e, 0x4e };
3513
3514         err = platform_driver_register(&nct6775_driver);
3515         if (err)
3516                 return err;
3517
3518         /*
3519          * initialize sio_data->kind and sio_data->sioreg.
3520          *
3521          * when Super-I/O functions move to a separate file, the Super-I/O
3522          * driver will probe 0x2e and 0x4e and auto-detect the presence of a
3523          * nct6775 hardware monitor, and call probe()
3524          */
3525         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
3526                 if (nct6775_find(sioaddr[i], &address, &sio_data))
3527                         continue;
3528
3529                 found = true;
3530
3531                 pdev[i] = platform_device_alloc(DRVNAME, address);
3532                 if (!pdev[i]) {
3533                         err = -ENOMEM;
3534                         goto exit_device_put;
3535                 }
3536
3537                 err = platform_device_add_data(pdev[i], &sio_data,
3538                                                sizeof(struct nct6775_sio_data));
3539                 if (err)
3540                         goto exit_device_put;
3541
3542                 memset(&res, 0, sizeof(res));
3543                 res.name = DRVNAME;
3544                 res.start = address + IOREGION_OFFSET;
3545                 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
3546                 res.flags = IORESOURCE_IO;
3547
3548                 err = acpi_check_resource_conflict(&res);
3549                 if (err) {
3550                         platform_device_put(pdev[i]);
3551                         pdev[i] = NULL;
3552                         continue;
3553                 }
3554
3555                 err = platform_device_add_resources(pdev[i], &res, 1);
3556                 if (err)
3557                         goto exit_device_put;
3558
3559                 /* platform_device_add calls probe() */
3560                 err = platform_device_add(pdev[i]);
3561                 if (err)
3562                         goto exit_device_put;
3563         }
3564         if (!found) {
3565                 err = -ENODEV;
3566                 goto exit_unregister;
3567         }
3568
3569         return 0;
3570
3571 exit_device_put:
3572         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
3573                 if (pdev[i])
3574                         platform_device_put(pdev[i]);
3575         }
3576 exit_unregister:
3577         platform_driver_unregister(&nct6775_driver);
3578         return err;
3579 }
3580
3581 static void __exit sensors_nct6775_exit(void)
3582 {
3583         int i;
3584
3585         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
3586                 if (pdev[i])
3587                         platform_device_unregister(pdev[i]);
3588         }
3589         platform_driver_unregister(&nct6775_driver);
3590 }
3591
3592 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
3593 MODULE_DESCRIPTION("NCT6775F/NCT6776F/NCT6779D driver");
3594 MODULE_LICENSE("GPL");
3595
3596 module_init(sensors_nct6775_init);
3597 module_exit(sensors_nct6775_exit);