git.sur5r.net Git - groeck-nct6775/blob - nct6775.c

   1 /*
   2  * nct6775 - Driver for the hardware monitoring functionality of
   3  *             Nuvoton NCT677x Super-I/O chips
   4  *
   5  * Copyright (C) 2012  Guenter Roeck <linux@roeck-us.net>
   6  *
   7  * Derived from w83627ehf driver
   8  * Copyright (C) 2005-2012  Jean Delvare <khali@linux-fr.org>
   9  * Copyright (C) 2006  Yuan Mu (Winbond),
  10  *                     Rudolf Marek <r.marek@assembler.cz>
  11  *                     David Hubbard <david.c.hubbard@gmail.com>
  12  *                     Daniel J Blueman <daniel.blueman@gmail.com>
  13  * Copyright (C) 2010  Sheng-Yuan Huang (Nuvoton) (PS00)
  14  *
  15  * Shamelessly ripped from the w83627hf driver
  16  * Copyright (C) 2003  Mark Studebaker
  17  *
  18  * This program is free software; you can redistribute it and/or modify
  19  * it under the terms of the GNU General Public License as published by
  20  * the Free Software Foundation; either version 2 of the License, or
  21  * (at your option) any later version.
  22  *
  23  * This program is distributed in the hope that it will be useful,
  24  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26  * GNU General Public License for more details.
  27  *
  28  * You should have received a copy of the GNU General Public License
  29  * along with this program; if not, write to the Free Software
  30  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  31  *
  32  *
  33  * Supports the following chips:
  34  *
  35  * Chip        #vin    #fan    #pwm    #temp  chip IDs       man ID
  36  * nct6106d     9      3       3       6+3    0xc450 0xc1    0x5ca3
  37  * nct6775f     9      4       3       6+3    0xb470 0xc1    0x5ca3
  38  * nct6776f     9      5       3       6+3    0xc330 0xc1    0x5ca3
  39  * nct6779d    15      5       5       2+6    0xc560 0xc1    0x5ca3
  40  * nct6791d    15      6       6       2+6    0xc800 0xc1    0x5ca3
  41  * nct6792d    15      6       6       2+6    0xc911 0xc1    0x5ca3
  42  *
  43  * #temp lists the number of monitored temperature sources (first value) plus
  44  * the number of directly connectable temperature sensors (second value).
  45  */
  46
  47 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  48
  49 #include <linux/module.h>
  50 #include <linux/init.h>
  51 #include <linux/slab.h>
  52 #include <linux/jiffies.h>
  53 #include <linux/platform_device.h>
  54 #include <linux/hwmon.h>
  55 #include <linux/hwmon-sysfs.h>
  56 #include <linux/hwmon-vid.h>
  57 #include <linux/err.h>
  58 #include <linux/mutex.h>
  59 #include <linux/acpi.h>
  60 #include <linux/io.h>
  61 #include "lm75.h"
  62 #include "compat.h"
  63
  64 #define USE_ALTERNATE
  65
  66 enum kinds { nct6106, nct6775, nct6776, nct6779, nct6791, nct6792 };
  67
  68 /* used to set data->name = nct6775_device_names[data->sio_kind] */
  69 static const char * const nct6775_device_names[] = {
  70         "nct6106",
  71         "nct6775",
  72         "nct6776",
  73         "nct6779",
  74         "nct6791",
  75         "nct6792",
  76 };
  77
  78 static unsigned short force_id;
  79 module_param(force_id, ushort, 0);
  80 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  81
  82 static unsigned short fan_debounce;
  83 module_param(fan_debounce, ushort, 0);
  84 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
  85
  86 #define DRVNAME "nct6775"
  87
  88 /*
  89  * Super-I/O constants and functions
  90  */
  91
  92 #define NCT6775_LD_ACPI         0x0a
  93 #define NCT6775_LD_HWM          0x0b
  94 #define NCT6775_LD_VID          0x0d
  95
  96 #define SIO_REG_LDSEL           0x07    /* Logical device select */
  97 #define SIO_REG_DEVID           0x20    /* Device ID (2 bytes) */
  98 #define SIO_REG_ENABLE          0x30    /* Logical device enable */
  99 #define SIO_REG_ADDR            0x60    /* Logical device address (2 bytes) */
 100
 101 #define SIO_NCT6106_ID          0xc450
 102 #define SIO_NCT6775_ID          0xb470
 103 #define SIO_NCT6776_ID          0xc330
 104 #define SIO_NCT6779_ID          0xc560
 105 #define SIO_NCT6791_ID          0xc800
 106 #define SIO_NCT6792_ID          0xc910
 107 #define SIO_ID_MASK             0xFFF0
 108
 109 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
 110
 111 static inline void
 112 superio_outb(int ioreg, int reg, int val)
 113 {
 114         outb(reg, ioreg);
 115         outb(val, ioreg + 1);
 116 }
 117
 118 static inline int
 119 superio_inb(int ioreg, int reg)
 120 {
 121         outb(reg, ioreg);
 122         return inb(ioreg + 1);
 123 }
 124
 125 static inline void
 126 superio_select(int ioreg, int ld)
 127 {
 128         outb(SIO_REG_LDSEL, ioreg);
 129         outb(ld, ioreg + 1);
 130 }
 131
 132 static inline int
 133 superio_enter(int ioreg)
 134 {
 135         /*
 136          * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
 137          */
 138         if (!request_muxed_region(ioreg, 2, DRVNAME))
 139                 return -EBUSY;
 140
 141         outb(0x87, ioreg);
 142         outb(0x87, ioreg);
 143
 144         return 0;
 145 }
 146
 147 static inline void
 148 superio_exit(int ioreg)
 149 {
 150         outb(0xaa, ioreg);
 151         outb(0x02, ioreg);
 152         outb(0x02, ioreg + 1);
 153         release_region(ioreg, 2);
 154 }
 155
 156 /*
 157  * ISA constants
 158  */
 159
 160 #define IOREGION_ALIGNMENT      (~7)
 161 #define IOREGION_OFFSET         5
 162 #define IOREGION_LENGTH         2
 163 #define ADDR_REG_OFFSET         0
 164 #define DATA_REG_OFFSET         1
 165
 166 #define NCT6775_REG_BANK        0x4E
 167 #define NCT6775_REG_CONFIG      0x40
 168
 169 /*
 170  * Not currently used:
 171  * REG_MAN_ID has the value 0x5ca3 for all supported chips.
 172  * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
 173  * REG_MAN_ID is at port 0x4f
 174  * REG_CHIP_ID is at port 0x58
 175  */
 176
 177 #define NUM_TEMP        10      /* Max number of temp attribute sets w/ limits*/
 178 #define NUM_TEMP_FIXED  6       /* Max number of fixed temp attribute sets */
 179
 180 #define NUM_REG_ALARM   7       /* Max number of alarm registers */
 181 #define NUM_REG_BEEP    5       /* Max number of beep registers */
 182
 183 #define NUM_FAN         6
 184
 185 /* Common and NCT6775 specific data */
 186
 187 /* Voltage min/max registers for nr=7..14 are in bank 5 */
 188
 189 static const u16 NCT6775_REG_IN_MAX[] = {
 190         0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
 191         0x55c, 0x55e, 0x560, 0x562 };
 192 static const u16 NCT6775_REG_IN_MIN[] = {
 193         0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
 194         0x55d, 0x55f, 0x561, 0x563 };
 195 static const u16 NCT6775_REG_IN[] = {
 196         0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
 197 };
 198
 199 #define NCT6775_REG_VBAT                0x5D
 200 #define NCT6775_REG_DIODE               0x5E
 201 #define NCT6775_DIODE_MASK              0x02
 202
 203 #define NCT6775_REG_FANDIV1             0x506
 204 #define NCT6775_REG_FANDIV2             0x507
 205
 206 #define NCT6775_REG_CR_FAN_DEBOUNCE     0xf0
 207
 208 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
 209
 210 /* 0..15 voltages, 16..23 fans, 24..29 temperatures, 30..31 intrusion */
 211
 212 static const s8 NCT6775_ALARM_BITS[] = {
 213         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 214         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 215         -1,                             /* unused */
 216         6, 7, 11, -1, -1,               /* fan1..fan5 */
 217         -1, -1, -1,                     /* unused */
 218         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 219         12, -1 };                       /* intrusion0, intrusion1 */
 220
 221 #define FAN_ALARM_BASE          16
 222 #define TEMP_ALARM_BASE         24
 223 #define INTRUSION_ALARM_BASE    30
 224
 225 static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e };
 226
 227 /*
 228  * 0..14 voltages, 15 global beep enable, 16..23 fans, 24..29 temperatures,
 229  * 30..31 intrusion
 230  */
 231 static const s8 NCT6775_BEEP_BITS[] = {
 232         0, 1, 2, 3, 8, 9, 10, 16,       /* in0.. in7 */
 233         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 234         21,                             /* global beep enable */
 235         6, 7, 11, 28, -1,               /* fan1..fan5 */
 236         -1, -1, -1,                     /* unused */
 237         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 238         12, -1 };                       /* intrusion0, intrusion1 */
 239
 240 #define BEEP_ENABLE_BASE                15
 241
 242 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
 243 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
 244
 245 /* DC or PWM output fan configuration */
 246 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
 247 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
 248
 249 /* Advanced Fan control, some values are common for all fans */
 250
 251 static const u16 NCT6775_REG_TARGET[] = {
 252         0x101, 0x201, 0x301, 0x801, 0x901, 0xa01 };
 253 static const u16 NCT6775_REG_FAN_MODE[] = {
 254         0x102, 0x202, 0x302, 0x802, 0x902, 0xa02 };
 255 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
 256         0x103, 0x203, 0x303, 0x803, 0x903, 0xa03 };
 257 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
 258         0x104, 0x204, 0x304, 0x804, 0x904, 0xa04 };
 259 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
 260         0x105, 0x205, 0x305, 0x805, 0x905, 0xa05 };
 261 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = {
 262         0x106, 0x206, 0x306, 0x806, 0x906, 0xa06 };
 263 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
 264 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
 265
 266 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
 267         0x107, 0x207, 0x307, 0x807, 0x907, 0xa07 };
 268 static const u16 NCT6775_REG_PWM[] = {
 269         0x109, 0x209, 0x309, 0x809, 0x909, 0xa09 };
 270 static const u16 NCT6775_REG_PWM_READ[] = {
 271         0x01, 0x03, 0x11, 0x13, 0x15, 0xa09 };
 272
 273 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
 274 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
 275 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
 276 static const u16 NCT6775_FAN_PULSE_SHIFT[] = { 0, 0, 0, 0, 0, 0 };
 277
 278 static const u16 NCT6775_REG_TEMP[] = {
 279         0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
 280
 281 static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77 };
 282
 283 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 284         0, 0x152, 0x252, 0x628, 0x629, 0x62A };
 285 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 286         0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
 287 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 288         0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
 289
 290 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 291         0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
 292
 293 static const u16 NCT6775_REG_TEMP_SEL[] = {
 294         0x100, 0x200, 0x300, 0x800, 0x900, 0xa00 };
 295
 296 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
 297         0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 };
 298 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
 299         0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a };
 300 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
 301         0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b };
 302 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
 303         0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c };
 304 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
 305         0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d };
 306
 307 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
 308
 309 static const u16 NCT6775_REG_AUTO_TEMP[] = {
 310         0x121, 0x221, 0x321, 0x821, 0x921, 0xa21 };
 311 static const u16 NCT6775_REG_AUTO_PWM[] = {
 312         0x127, 0x227, 0x327, 0x827, 0x927, 0xa27 };
 313
 314 #define NCT6775_AUTO_TEMP(data, nr, p)  ((data)->REG_AUTO_TEMP[nr] + (p))
 315 #define NCT6775_AUTO_PWM(data, nr, p)   ((data)->REG_AUTO_PWM[nr] + (p))
 316
 317 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
 318
 319 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
 320         0x135, 0x235, 0x335, 0x835, 0x935, 0xa35 };
 321 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
 322         0x138, 0x238, 0x338, 0x838, 0x938, 0xa38 };
 323
 324 static const char *const nct6775_temp_label[] = {
 325         "",
 326         "SYSTIN",
 327         "CPUTIN",
 328         "AUXTIN",
 329         "AMD SB-TSI",
 330         "PECI Agent 0",
 331         "PECI Agent 1",
 332         "PECI Agent 2",
 333         "PECI Agent 3",
 334         "PECI Agent 4",
 335         "PECI Agent 5",
 336         "PECI Agent 6",
 337         "PECI Agent 7",
 338         "PCH_CHIP_CPU_MAX_TEMP",
 339         "PCH_CHIP_TEMP",
 340         "PCH_CPU_TEMP",
 341         "PCH_MCH_TEMP",
 342         "PCH_DIM0_TEMP",
 343         "PCH_DIM1_TEMP",
 344         "PCH_DIM2_TEMP",
 345         "PCH_DIM3_TEMP"
 346 };
 347
 348 static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
 349         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
 350
 351 static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
 352         = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
 353             0xa07 };
 354
 355 /* NCT6776 specific data */
 356
 357 static const s8 NCT6776_ALARM_BITS[] = {
 358         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 359         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 360         -1,                             /* unused */
 361         6, 7, 11, 10, 23,               /* fan1..fan5 */
 362         -1, -1, -1,                     /* unused */
 363         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 364         12, 9 };                        /* intrusion0, intrusion1 */
 365
 366 static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5 };
 367
 368 static const s8 NCT6776_BEEP_BITS[] = {
 369         0, 1, 2, 3, 4, 5, 6, 7,         /* in0.. in7 */
 370         8, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 371         24,                             /* global beep enable */
 372         25, 26, 27, 28, 29,             /* fan1..fan5 */
 373         -1, -1, -1,                     /* unused */
 374         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 375         30, 31 };                       /* intrusion0, intrusion1 */
 376
 377 static const u16 NCT6776_REG_TOLERANCE_H[] = {
 378         0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c };
 379
 380 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0 };
 381 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0 };
 382
 383 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
 384 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
 385
 386 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
 387         0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e };
 388
 389 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 390         0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
 391
 392 static const char *const nct6776_temp_label[] = {
 393         "",
 394         "SYSTIN",
 395         "CPUTIN",
 396         "AUXTIN",
 397         "SMBUSMASTER 0",
 398         "SMBUSMASTER 1",
 399         "SMBUSMASTER 2",
 400         "SMBUSMASTER 3",
 401         "SMBUSMASTER 4",
 402         "SMBUSMASTER 5",
 403         "SMBUSMASTER 6",
 404         "SMBUSMASTER 7",
 405         "PECI Agent 0",
 406         "PECI Agent 1",
 407         "PCH_CHIP_CPU_MAX_TEMP",
 408         "PCH_CHIP_TEMP",
 409         "PCH_CPU_TEMP",
 410         "PCH_MCH_TEMP",
 411         "PCH_DIM0_TEMP",
 412         "PCH_DIM1_TEMP",
 413         "PCH_DIM2_TEMP",
 414         "PCH_DIM3_TEMP",
 415         "BYTE_TEMP"
 416 };
 417
 418 static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
 419         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
 420
 421 static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
 422         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
 423
 424 /* NCT6779 specific data */
 425
 426 static const u16 NCT6779_REG_IN[] = {
 427         0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
 428         0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
 429
 430 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
 431         0x459, 0x45A, 0x45B, 0x568 };
 432
 433 static const s8 NCT6779_ALARM_BITS[] = {
 434         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 435         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 436         -1,                             /* unused */
 437         6, 7, 11, 10, 23,               /* fan1..fan5 */
 438         -1, -1, -1,                     /* unused */
 439         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 440         12, 9 };                        /* intrusion0, intrusion1 */
 441
 442 static const s8 NCT6779_BEEP_BITS[] = {
 443         0, 1, 2, 3, 4, 5, 6, 7,         /* in0.. in7 */
 444         8, 9, 10, 11, 12, 13, 14,       /* in8..in14 */
 445         24,                             /* global beep enable */
 446         25, 26, 27, 28, 29,             /* fan1..fan5 */
 447         -1, -1, -1,                     /* unused */
 448         16, 17, -1, -1, -1, -1,         /* temp1..temp6 */
 449         30, 31 };                       /* intrusion0, intrusion1 */
 450
 451 static const u16 NCT6779_REG_FAN[] = {
 452         0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8, 0x4ba };
 453 static const u16 NCT6779_REG_FAN_PULSES[] = {
 454         0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
 455
 456 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
 457         0x136, 0x236, 0x336, 0x836, 0x936, 0xa36 };
 458 #define NCT6779_CRITICAL_PWM_ENABLE_MASK        0x01
 459 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
 460         0x137, 0x237, 0x337, 0x837, 0x937, 0xa37 };
 461
 462 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
 463 static const u16 NCT6779_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b };
 464 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 465         0x18, 0x152 };
 466 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 467         0x3a, 0x153 };
 468 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 469         0x39, 0x155 };
 470
 471 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
 472         0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
 473
 474 static const char *const nct6779_temp_label[] = {
 475         "",
 476         "SYSTIN",
 477         "CPUTIN",
 478         "AUXTIN0",
 479         "AUXTIN1",
 480         "AUXTIN2",
 481         "AUXTIN3",
 482         "",
 483         "SMBUSMASTER 0",
 484         "SMBUSMASTER 1",
 485         "SMBUSMASTER 2",
 486         "SMBUSMASTER 3",
 487         "SMBUSMASTER 4",
 488         "SMBUSMASTER 5",
 489         "SMBUSMASTER 6",
 490         "SMBUSMASTER 7",
 491         "PECI Agent 0",
 492         "PECI Agent 1",
 493         "PCH_CHIP_CPU_MAX_TEMP",
 494         "PCH_CHIP_TEMP",
 495         "PCH_CPU_TEMP",
 496         "PCH_MCH_TEMP",
 497         "PCH_DIM0_TEMP",
 498         "PCH_DIM1_TEMP",
 499         "PCH_DIM2_TEMP",
 500         "PCH_DIM3_TEMP",
 501         "BYTE_TEMP"
 502 };
 503
 504 static const u16 NCT6779_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6779_temp_label) - 1]
 505         = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
 506             0, 0, 0, 0, 0, 0, 0, 0,
 507             0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
 508             0x408, 0 };
 509
 510 static const u16 NCT6779_REG_TEMP_CRIT[ARRAY_SIZE(nct6779_temp_label) - 1]
 511         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
 512
 513 /* NCT6791 specific data */
 514
 515 #define NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE     0x28
 516
 517 static const u16 NCT6791_REG_WEIGHT_TEMP_SEL[6] = { 0, 0x239 };
 518 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP[6] = { 0, 0x23a };
 519 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP_TOL[6] = { 0, 0x23b };
 520 static const u16 NCT6791_REG_WEIGHT_DUTY_STEP[6] = { 0, 0x23c };
 521 static const u16 NCT6791_REG_WEIGHT_TEMP_BASE[6] = { 0, 0x23d };
 522 static const u16 NCT6791_REG_WEIGHT_DUTY_BASE[6] = { 0, 0x23e };
 523
 524 static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = {
 525         0x459, 0x45A, 0x45B, 0x568, 0x45D };
 526
 527 static const s8 NCT6791_ALARM_BITS[] = {
 528         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 529         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 530         -1,                             /* unused */
 531         6, 7, 11, 10, 23, 33,           /* fan1..fan6 */
 532         -1, -1,                         /* unused */
 533         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 534         12, 9 };                        /* intrusion0, intrusion1 */
 535
 536
 537 /* NCT6102D/NCT6106D specific data */
 538
 539 #define NCT6106_REG_VBAT        0x318
 540 #define NCT6106_REG_DIODE       0x319
 541 #define NCT6106_DIODE_MASK      0x01
 542
 543 static const u16 NCT6106_REG_IN_MAX[] = {
 544         0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
 545 static const u16 NCT6106_REG_IN_MIN[] = {
 546         0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
 547 static const u16 NCT6106_REG_IN[] = {
 548         0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
 549
 550 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
 551 static const u16 NCT6106_REG_TEMP_MON[] = { 0x18, 0x19, 0x1a };
 552 static const u16 NCT6106_REG_TEMP_HYST[] = {
 553         0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
 554 static const u16 NCT6106_REG_TEMP_OVER[] = {
 555         0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
 556 static const u16 NCT6106_REG_TEMP_CRIT_L[] = {
 557         0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
 558 static const u16 NCT6106_REG_TEMP_CRIT_H[] = {
 559         0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
 560 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
 561 static const u16 NCT6106_REG_TEMP_CONFIG[] = {
 562         0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
 563
 564 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
 565 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
 566 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0, 0 };
 567 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4, 0, 0 };
 568
 569 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
 570 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
 571 static const u16 NCT6106_REG_PWM[] = { 0x119, 0x129, 0x139 };
 572 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c };
 573 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
 574 static const u16 NCT6106_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130 };
 575 static const u16 NCT6106_REG_TEMP_SOURCE[] = {
 576         0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
 577
 578 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
 579 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = {
 580         0x11b, 0x12b, 0x13b };
 581
 582 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
 583 #define NCT6106_CRITICAL_PWM_ENABLE_MASK        0x10
 584 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
 585
 586 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
 587 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
 588 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
 589 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
 590 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
 591 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
 592
 593 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
 594
 595 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
 596 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
 597 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
 598 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x17c };
 599 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
 600 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
 601
 602 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
 603 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
 604
 605 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = {
 606         0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
 607
 608 static const s8 NCT6106_ALARM_BITS[] = {
 609         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 610         9, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 611         -1,                             /* unused */
 612         32, 33, 34, -1, -1,             /* fan1..fan5 */
 613         -1, -1, -1,                     /* unused */
 614         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 615         48, -1                          /* intrusion0, intrusion1 */
 616 };
 617
 618 static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = {
 619         0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 };
 620
 621 static const s8 NCT6106_BEEP_BITS[] = {
 622         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 623         9, 10, 11, 12, -1, -1, -1,      /* in8..in14 */
 624         32,                             /* global beep enable */
 625         24, 25, 26, 27, 28,             /* fan1..fan5 */
 626         -1, -1, -1,                     /* unused */
 627         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 628         34, -1                          /* intrusion0, intrusion1 */
 629 };
 630
 631 static const u16 NCT6106_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
 632         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x51, 0x52, 0x54 };
 633
 634 static const u16 NCT6106_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
 635         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x204, 0x205 };
 636
 637 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
 638 {
 639         if (mode == 0 && pwm == 255)
 640                 return off;
 641         return mode + 1;
 642 }
 643
 644 static int pwm_enable_to_reg(enum pwm_enable mode)
 645 {
 646         if (mode == off)
 647                 return 0;
 648         return mode - 1;
 649 }
 650
 651 /*
 652  * Conversions
 653  */
 654
 655 /* 1 is DC mode, output in ms */
 656 static unsigned int step_time_from_reg(u8 reg, u8 mode)
 657 {
 658         return mode ? 400 * reg : 100 * reg;
 659 }
 660
 661 static u8 step_time_to_reg(unsigned int msec, u8 mode)
 662 {
 663         return clamp_val((mode ? (msec + 200) / 400 :
 664                                         (msec + 50) / 100), 1, 255);
 665 }
 666
 667 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
 668 {
 669         if (reg == 0 || reg == 255)
 670                 return 0;
 671         return 1350000U / (reg << divreg);
 672 }
 673
 674 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
 675 {
 676         if ((reg & 0xff1f) == 0xff1f)
 677                 return 0;
 678
 679         reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
 680
 681         if (reg == 0)
 682                 return 0;
 683
 684         return 1350000U / reg;
 685 }
 686
 687 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
 688 {
 689         if (reg == 0 || reg == 0xffff)
 690                 return 0;
 691
 692         /*
 693          * Even though the registers are 16 bit wide, the fan divisor
 694          * still applies.
 695          */
 696         return 1350000U / (reg << divreg);
 697 }
 698
 699 static u16 fan_to_reg(u32 fan, unsigned int divreg)
 700 {
 701         if (!fan)
 702                 return 0;
 703
 704         return (1350000U / fan) >> divreg;
 705 }
 706
 707 static inline unsigned int
 708 div_from_reg(u8 reg)
 709 {
 710         return 1 << reg;
 711 }
 712
 713 /*
 714  * Some of the voltage inputs have internal scaling, the tables below
 715  * contain 8 (the ADC LSB in mV) * scaling factor * 100
 716  */
 717 static const u16 scale_in[15] = {
 718         800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
 719         800, 800
 720 };
 721
 722 static inline long in_from_reg(u8 reg, u8 nr)
 723 {
 724         return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
 725 }
 726
 727 static inline u8 in_to_reg(u32 val, u8 nr)
 728 {
 729         return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
 730 }
 731
 732 /*
 733  * Data structures and manipulation thereof
 734  */
 735
 736 struct nct6775_data {
 737         int addr;       /* IO base of hw monitor block */
 738         int sioreg;     /* SIO register address */
 739         enum kinds kind;
 740         const char *name;
 741
 742 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
 743         struct device *hwmon_dev;
 744 #endif
 745
 746         int num_attr_groups;
 747         const struct attribute_group *groups[6];
 748
 749         u16 reg_temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 750                                     * 3=temp_crit, 4=temp_lcrit
 751                                     */
 752         u8 temp_src[NUM_TEMP];
 753         u16 reg_temp_config[NUM_TEMP];
 754         const char * const *temp_label;
 755         int temp_label_num;
 756
 757         u16 REG_CONFIG;
 758         u16 REG_VBAT;
 759         u16 REG_DIODE;
 760         u8 DIODE_MASK;
 761
 762         const s8 *ALARM_BITS;
 763         const s8 *BEEP_BITS;
 764
 765         const u16 *REG_VIN;
 766         const u16 *REG_IN_MINMAX[2];
 767
 768         const u16 *REG_TARGET;
 769         const u16 *REG_FAN;
 770         const u16 *REG_FAN_MODE;
 771         const u16 *REG_FAN_MIN;
 772         const u16 *REG_FAN_PULSES;
 773         const u16 *FAN_PULSE_SHIFT;
 774         const u16 *REG_FAN_TIME[3];
 775
 776         const u16 *REG_TOLERANCE_H;
 777
 778         const u8 *REG_PWM_MODE;
 779         const u8 *PWM_MODE_MASK;
 780
 781         const u16 *REG_PWM[7];  /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 782                                  * [3]=pwm_max, [4]=pwm_step,
 783                                  * [5]=weight_duty_step, [6]=weight_duty_base
 784                                  */
 785         const u16 *REG_PWM_READ;
 786
 787         const u16 *REG_CRITICAL_PWM_ENABLE;
 788         u8 CRITICAL_PWM_ENABLE_MASK;
 789         const u16 *REG_CRITICAL_PWM;
 790
 791         const u16 *REG_AUTO_TEMP;
 792         const u16 *REG_AUTO_PWM;
 793
 794         const u16 *REG_CRITICAL_TEMP;
 795         const u16 *REG_CRITICAL_TEMP_TOLERANCE;
 796
 797         const u16 *REG_TEMP_SOURCE;     /* temp register sources */
 798         const u16 *REG_TEMP_SEL;
 799         const u16 *REG_WEIGHT_TEMP_SEL;
 800         const u16 *REG_WEIGHT_TEMP[3];  /* 0=base, 1=tolerance, 2=step */
 801
 802         const u16 *REG_TEMP_OFFSET;
 803
 804         const u16 *REG_ALARM;
 805         const u16 *REG_BEEP;
 806
 807         unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
 808         unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
 809
 810         struct mutex update_lock;
 811         bool valid;             /* true if following fields are valid */
 812         unsigned long last_updated;     /* In jiffies */
 813
 814         /* Register values */
 815         u8 bank;                /* current register bank */
 816         u8 in_num;              /* number of in inputs we have */
 817         u8 in[15][3];           /* [0]=in, [1]=in_max, [2]=in_min */
 818         unsigned int rpm[NUM_FAN];
 819         u16 fan_min[NUM_FAN];
 820         u8 fan_pulses[NUM_FAN];
 821         u8 fan_div[NUM_FAN];
 822         u8 has_pwm;
 823         u8 has_fan;             /* some fan inputs can be disabled */
 824         u8 has_fan_min;         /* some fans don't have min register */
 825         bool has_fan_div;
 826
 827         u8 num_temp_alarms;     /* 2, 3, or 6 */
 828         u8 num_temp_beeps;      /* 2, 3, or 6 */
 829         u8 temp_fixed_num;      /* 3 or 6 */
 830         u8 temp_type[NUM_TEMP_FIXED];
 831         s8 temp_offset[NUM_TEMP_FIXED];
 832         s16 temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 833                                 * 3=temp_crit, 4=temp_lcrit */
 834         u64 alarms;
 835         u64 beeps;
 836
 837         u8 pwm_num;     /* number of pwm */
 838         u8 pwm_mode[NUM_FAN];   /* 1->DC variable voltage,
 839                                  * 0->PWM variable duty cycle
 840                                  */
 841         enum pwm_enable pwm_enable[NUM_FAN];
 842                         /* 0->off
 843                          * 1->manual
 844                          * 2->thermal cruise mode (also called SmartFan I)
 845                          * 3->fan speed cruise mode
 846                          * 4->SmartFan III
 847                          * 5->enhanced variable thermal cruise (SmartFan IV)
 848                          */
 849         u8 pwm[7][NUM_FAN];     /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 850                                  * [3]=pwm_max, [4]=pwm_step,
 851                                  * [5]=weight_duty_step, [6]=weight_duty_base
 852                                  */
 853
 854         u8 target_temp[NUM_FAN];
 855         u8 target_temp_mask;
 856         u32 target_speed[NUM_FAN];
 857         u32 target_speed_tolerance[NUM_FAN];
 858         u8 speed_tolerance_limit;
 859
 860         u8 temp_tolerance[2][NUM_FAN];
 861         u8 tolerance_mask;
 862
 863         u8 fan_time[3][NUM_FAN]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
 864
 865         /* Automatic fan speed control registers */
 866         int auto_pwm_num;
 867         u8 auto_pwm[NUM_FAN][7];
 868         u8 auto_temp[NUM_FAN][7];
 869         u8 pwm_temp_sel[NUM_FAN];
 870         u8 pwm_weight_temp_sel[NUM_FAN];
 871         u8 weight_temp[3][NUM_FAN];     /* 0->temp_step, 1->temp_step_tol,
 872                                          * 2->temp_base
 873                                          */
 874
 875         u8 vid;
 876         u8 vrm;
 877
 878         bool have_vid;
 879
 880         u16 have_temp;
 881         u16 have_temp_fixed;
 882         u16 have_in;
 883 #ifdef CONFIG_PM
 884         /* Remember extra register values over suspend/resume */
 885         u8 vbat;
 886         u8 fandiv1;
 887         u8 fandiv2;
 888 #endif
 889 };
 890
 891 struct nct6775_sio_data {
 892         int sioreg;
 893         enum kinds kind;
 894 };
 895
 896 struct sensor_device_template {
 897         struct device_attribute dev_attr;
 898         union {
 899                 struct {
 900                         u8 nr;
 901                         u8 index;
 902                 } s;
 903                 int index;
 904         } u;
 905         bool s2;        /* true if both index and nr are used */
 906 };
 907
 908 struct sensor_device_attr_u {
 909         union {
 910                 struct sensor_device_attribute a1;
 911                 struct sensor_device_attribute_2 a2;
 912         } u;
 913         char name[32];
 914 };
 915
 916 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) {      \
 917         .attr = {.name = _template, .mode = _mode },            \
 918         .show   = _show,                                        \
 919         .store  = _store,                                       \
 920 }
 921
 922 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \
 923         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
 924           .u.index = _index,                                            \
 925           .s2 = false }
 926
 927 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,       \
 928                                  _nr, _index)                           \
 929         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
 930           .u.s.index = _index,                                          \
 931           .u.s.nr = _nr,                                                \
 932           .s2 = true }
 933
 934 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
 935 static struct sensor_device_template sensor_dev_template_##_name        \
 936         = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store,       \
 937                                  _index)
 938
 939 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store,       \
 940                           _nr, _index)                                  \
 941 static struct sensor_device_template sensor_dev_template_##_name        \
 942         = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,     \
 943                                  _nr, _index)
 944
 945 struct sensor_template_group {
 946         struct sensor_device_template **templates;
 947         umode_t (*is_visible)(struct kobject *, struct attribute *, int);
 948         int base;
 949 };
 950
 951 static struct attribute_group *
 952 nct6775_create_attr_group(struct device *dev, struct sensor_template_group *tg,
 953                           int repeat)
 954 {
 955         struct attribute_group *group;
 956         struct sensor_device_attr_u *su;
 957         struct sensor_device_attribute *a;
 958         struct sensor_device_attribute_2 *a2;
 959         struct attribute **attrs;
 960         struct sensor_device_template **t;
 961         int i, count;
 962
 963         if (repeat <= 0)
 964                 return ERR_PTR(-EINVAL);
 965
 966         t = tg->templates;
 967         for (count = 0; *t; t++, count++)
 968                 ;
 969
 970         if (count == 0)
 971                 return ERR_PTR(-EINVAL);
 972
 973         group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
 974         if (group == NULL)
 975                 return ERR_PTR(-ENOMEM);
 976
 977         attrs = devm_kzalloc(dev, sizeof(*attrs) * (repeat * count + 1),
 978                              GFP_KERNEL);
 979         if (attrs == NULL)
 980                 return ERR_PTR(-ENOMEM);
 981
 982         su = devm_kzalloc(dev, sizeof(*su) * repeat * count,
 983                                GFP_KERNEL);
 984         if (su == NULL)
 985                 return ERR_PTR(-ENOMEM);
 986
 987         group->attrs = attrs;
 988         group->is_visible = tg->is_visible;
 989
 990         for (i = 0; i < repeat; i++) {
 991                 t = tg->templates;
 992                 while (*t != NULL) {
 993                         snprintf(su->name, sizeof(su->name),
 994                                  (*t)->dev_attr.attr.name, tg->base + i);
 995                         if ((*t)->s2) {
 996                                 a2 = &su->u.a2;
 997                                 a2->dev_attr.attr.name = su->name;
 998                                 a2->nr = (*t)->u.s.nr + i;
 999                                 a2->index = (*t)->u.s.index;
1000                                 a2->dev_attr.attr.mode =
1001                                   (*t)->dev_attr.attr.mode;
1002                                 a2->dev_attr.show = (*t)->dev_attr.show;
1003                                 a2->dev_attr.store = (*t)->dev_attr.store;
1004                                 *attrs = &a2->dev_attr.attr;
1005                         } else {
1006                                 a = &su->u.a1;
1007                                 a->dev_attr.attr.name = su->name;
1008                                 a->index = (*t)->u.index + i;
1009                                 a->dev_attr.attr.mode =
1010                                   (*t)->dev_attr.attr.mode;
1011                                 a->dev_attr.show = (*t)->dev_attr.show;
1012                                 a->dev_attr.store = (*t)->dev_attr.store;
1013                                 *attrs = &a->dev_attr.attr;
1014                         }
1015                         attrs++;
1016                         su++;
1017                         t++;
1018                 }
1019         }
1020
1021         return group;
1022 }
1023
1024 static bool is_word_sized(struct nct6775_data *data, u16 reg)
1025 {
1026         switch (data->kind) {
1027         case nct6106:
1028                 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1029                   reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
1030                   reg == 0x111 || reg == 0x121 || reg == 0x131;
1031         case nct6775:
1032                 return (((reg & 0xff00) == 0x100 ||
1033                     (reg & 0xff00) == 0x200) &&
1034                    ((reg & 0x00ff) == 0x50 ||
1035                     (reg & 0x00ff) == 0x53 ||
1036                     (reg & 0x00ff) == 0x55)) ||
1037                   (reg & 0xfff0) == 0x630 ||
1038                   reg == 0x640 || reg == 0x642 ||
1039                   reg == 0x662 ||
1040                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1041                   reg == 0x73 || reg == 0x75 || reg == 0x77;
1042         case nct6776:
1043                 return (((reg & 0xff00) == 0x100 ||
1044                     (reg & 0xff00) == 0x200) &&
1045                    ((reg & 0x00ff) == 0x50 ||
1046                     (reg & 0x00ff) == 0x53 ||
1047                     (reg & 0x00ff) == 0x55)) ||
1048                   (reg & 0xfff0) == 0x630 ||
1049                   reg == 0x402 ||
1050                   reg == 0x640 || reg == 0x642 ||
1051                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1052                   reg == 0x73 || reg == 0x75 || reg == 0x77;
1053         case nct6779:
1054         case nct6791:
1055         case nct6792:
1056                 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
1057                   ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x0b) ||
1058                   reg == 0x402 ||
1059                   reg == 0x63a || reg == 0x63c || reg == 0x63e ||
1060                   reg == 0x640 || reg == 0x642 ||
1061                   reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
1062                   reg == 0x7b;
1063         }
1064         return false;
1065 }
1066
1067 /*
1068  * On older chips, only registers 0x50-0x5f are banked.
1069  * On more recent chips, all registers are banked.
1070  * Assume that is the case and set the bank number for each access.
1071  * Cache the bank number so it only needs to be set if it changes.
1072  */
1073 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
1074 {
1075         u8 bank = reg >> 8;
1076         if (data->bank != bank) {
1077                 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
1078                 outb_p(bank, data->addr + DATA_REG_OFFSET);
1079                 data->bank = bank;
1080         }
1081 }
1082
1083 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
1084 {
1085         int res, word_sized = is_word_sized(data, reg);
1086
1087         nct6775_set_bank(data, reg);
1088         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1089         res = inb_p(data->addr + DATA_REG_OFFSET);
1090         if (word_sized) {
1091                 outb_p((reg & 0xff) + 1,
1092                        data->addr + ADDR_REG_OFFSET);
1093                 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
1094         }
1095         return res;
1096 }
1097
1098 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
1099 {
1100         int word_sized = is_word_sized(data, reg);
1101
1102         nct6775_set_bank(data, reg);
1103         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1104         if (word_sized) {
1105                 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
1106                 outb_p((reg & 0xff) + 1,
1107                        data->addr + ADDR_REG_OFFSET);
1108         }
1109         outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
1110         return 0;
1111 }
1112
1113 /* We left-align 8-bit temperature values to make the code simpler */
1114 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
1115 {
1116         u16 res;
1117
1118         res = nct6775_read_value(data, reg);
1119         if (!is_word_sized(data, reg))
1120                 res <<= 8;
1121
1122         return res;
1123 }
1124
1125 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
1126 {
1127         if (!is_word_sized(data, reg))
1128                 value >>= 8;
1129         return nct6775_write_value(data, reg, value);
1130 }
1131
1132 /* This function assumes that the caller holds data->update_lock */
1133 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
1134 {
1135         u8 reg;
1136
1137         switch (nr) {
1138         case 0:
1139                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
1140                     | (data->fan_div[0] & 0x7);
1141                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1142                 break;
1143         case 1:
1144                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
1145                     | ((data->fan_div[1] << 4) & 0x70);
1146                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1147                 break;
1148         case 2:
1149                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
1150                     | (data->fan_div[2] & 0x7);
1151                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1152                 break;
1153         case 3:
1154                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
1155                     | ((data->fan_div[3] << 4) & 0x70);
1156                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1157                 break;
1158         }
1159 }
1160
1161 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
1162 {
1163         if (data->kind == nct6775)
1164                 nct6775_write_fan_div(data, nr);
1165 }
1166
1167 static void nct6775_update_fan_div(struct nct6775_data *data)
1168 {
1169         u8 i;
1170
1171         i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
1172         data->fan_div[0] = i & 0x7;
1173         data->fan_div[1] = (i & 0x70) >> 4;
1174         i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
1175         data->fan_div[2] = i & 0x7;
1176         if (data->has_fan & (1 << 3))
1177                 data->fan_div[3] = (i & 0x70) >> 4;
1178 }
1179
1180 static void nct6775_update_fan_div_common(struct nct6775_data *data)
1181 {
1182         if (data->kind == nct6775)
1183                 nct6775_update_fan_div(data);
1184 }
1185
1186 static void nct6775_init_fan_div(struct nct6775_data *data)
1187 {
1188         int i;
1189
1190         nct6775_update_fan_div_common(data);
1191         /*
1192          * For all fans, start with highest divider value if the divider
1193          * register is not initialized. This ensures that we get a
1194          * reading from the fan count register, even if it is not optimal.
1195          * We'll compute a better divider later on.
1196          */
1197         for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
1198                 if (!(data->has_fan & (1 << i)))
1199                         continue;
1200                 if (data->fan_div[i] == 0) {
1201                         data->fan_div[i] = 7;
1202                         nct6775_write_fan_div_common(data, i);
1203                 }
1204         }
1205 }
1206
1207 static void nct6775_init_fan_common(struct device *dev,
1208                                     struct nct6775_data *data)
1209 {
1210         int i;
1211         u8 reg;
1212
1213         if (data->has_fan_div)
1214                 nct6775_init_fan_div(data);
1215
1216         /*
1217          * If fan_min is not set (0), set it to 0xff to disable it. This
1218          * prevents the unnecessary warning when fanX_min is reported as 0.
1219          */
1220         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1221                 if (data->has_fan_min & (1 << i)) {
1222                         reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
1223                         if (!reg)
1224                                 nct6775_write_value(data, data->REG_FAN_MIN[i],
1225                                                     data->has_fan_div ? 0xff
1226                                                                       : 0xff1f);
1227                 }
1228         }
1229 }
1230
1231 static void nct6775_select_fan_div(struct device *dev,
1232                                    struct nct6775_data *data, int nr, u16 reg)
1233 {
1234         u8 fan_div = data->fan_div[nr];
1235         u16 fan_min;
1236
1237         if (!data->has_fan_div)
1238                 return;
1239
1240         /*
1241          * If we failed to measure the fan speed, or the reported value is not
1242          * in the optimal range, and the clock divider can be modified,
1243          * let's try that for next time.
1244          */
1245         if (reg == 0x00 && fan_div < 0x07)
1246                 fan_div++;
1247         else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1248                 fan_div--;
1249
1250         if (fan_div != data->fan_div[nr]) {
1251                 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1252                         nr + 1, div_from_reg(data->fan_div[nr]),
1253                         div_from_reg(fan_div));
1254
1255                 /* Preserve min limit if possible */
1256                 if (data->has_fan_min & (1 << nr)) {
1257                         fan_min = data->fan_min[nr];
1258                         if (fan_div > data->fan_div[nr]) {
1259                                 if (fan_min != 255 && fan_min > 1)
1260                                         fan_min >>= 1;
1261                         } else {
1262                                 if (fan_min != 255) {
1263                                         fan_min <<= 1;
1264                                         if (fan_min > 254)
1265                                                 fan_min = 254;
1266                                 }
1267                         }
1268                         if (fan_min != data->fan_min[nr]) {
1269                                 data->fan_min[nr] = fan_min;
1270                                 nct6775_write_value(data, data->REG_FAN_MIN[nr],
1271                                                     fan_min);
1272                         }
1273                 }
1274                 data->fan_div[nr] = fan_div;
1275                 nct6775_write_fan_div_common(data, nr);
1276         }
1277 }
1278
1279 static void nct6775_update_pwm(struct device *dev)
1280 {
1281         struct nct6775_data *data = dev_get_drvdata(dev);
1282         int i, j;
1283         int fanmodecfg, reg;
1284         bool duty_is_dc;
1285
1286         for (i = 0; i < data->pwm_num; i++) {
1287                 if (!(data->has_pwm & (1 << i)))
1288                         continue;
1289
1290                 duty_is_dc = data->REG_PWM_MODE[i] &&
1291                   (nct6775_read_value(data, data->REG_PWM_MODE[i])
1292                    & data->PWM_MODE_MASK[i]);
1293                 data->pwm_mode[i] = duty_is_dc;
1294
1295                 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
1296                 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1297                         if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1298                                 data->pwm[j][i]
1299                                   = nct6775_read_value(data,
1300                                                        data->REG_PWM[j][i]);
1301                         }
1302                 }
1303
1304                 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1305                                                         (fanmodecfg >> 4) & 7);
1306
1307                 if (!data->temp_tolerance[0][i] ||
1308                     data->pwm_enable[i] != speed_cruise)
1309                         data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1310                 if (!data->target_speed_tolerance[i] ||
1311                     data->pwm_enable[i] == speed_cruise) {
1312                         u8 t = fanmodecfg & 0x0f;
1313                         if (data->REG_TOLERANCE_H) {
1314                                 t |= (nct6775_read_value(data,
1315                                       data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
1316                         }
1317                         data->target_speed_tolerance[i] = t;
1318                 }
1319
1320                 data->temp_tolerance[1][i] =
1321                         nct6775_read_value(data,
1322                                         data->REG_CRITICAL_TEMP_TOLERANCE[i]);
1323
1324                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
1325                 data->pwm_temp_sel[i] = reg & 0x1f;
1326                 /* If fan can stop, report floor as 0 */
1327                 if (reg & 0x80)
1328                         data->pwm[2][i] = 0;
1329
1330                 if (!data->REG_WEIGHT_TEMP_SEL[i])
1331                         continue;
1332
1333                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
1334                 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1335                 /* If weight is disabled, report weight source as 0 */
1336                 if (j == 1 && !(reg & 0x80))
1337                         data->pwm_weight_temp_sel[i] = 0;
1338
1339                 /* Weight temp data */
1340                 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
1341                         data->weight_temp[j][i]
1342                           = nct6775_read_value(data,
1343                                                data->REG_WEIGHT_TEMP[j][i]);
1344                 }
1345         }
1346 }
1347
1348 static void nct6775_update_pwm_limits(struct device *dev)
1349 {
1350         struct nct6775_data *data = dev_get_drvdata(dev);
1351         int i, j;
1352         u8 reg;
1353         u16 reg_t;
1354
1355         for (i = 0; i < data->pwm_num; i++) {
1356                 if (!(data->has_pwm & (1 << i)))
1357                         continue;
1358
1359                 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1360                         data->fan_time[j][i] =
1361                           nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1362                 }
1363
1364                 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1365                 /* Update only in matching mode or if never updated */
1366                 if (!data->target_temp[i] ||
1367                     data->pwm_enable[i] == thermal_cruise)
1368                         data->target_temp[i] = reg_t & data->target_temp_mask;
1369                 if (!data->target_speed[i] ||
1370                     data->pwm_enable[i] == speed_cruise) {
1371                         if (data->REG_TOLERANCE_H) {
1372                                 reg_t |= (nct6775_read_value(data,
1373                                         data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1374                         }
1375                         data->target_speed[i] = reg_t;
1376                 }
1377
1378                 for (j = 0; j < data->auto_pwm_num; j++) {
1379                         data->auto_pwm[i][j] =
1380                           nct6775_read_value(data,
1381                                              NCT6775_AUTO_PWM(data, i, j));
1382                         data->auto_temp[i][j] =
1383                           nct6775_read_value(data,
1384                                              NCT6775_AUTO_TEMP(data, i, j));
1385                 }
1386
1387                 /* critical auto_pwm temperature data */
1388                 data->auto_temp[i][data->auto_pwm_num] =
1389                         nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1390
1391                 switch (data->kind) {
1392                 case nct6775:
1393                         reg = nct6775_read_value(data,
1394                                                  NCT6775_REG_CRITICAL_ENAB[i]);
1395                         data->auto_pwm[i][data->auto_pwm_num] =
1396                                                 (reg & 0x02) ? 0xff : 0x00;
1397                         break;
1398                 case nct6776:
1399                         data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1400                         break;
1401                 case nct6106:
1402                 case nct6779:
1403                 case nct6791:
1404                 case nct6792:
1405                         reg = nct6775_read_value(data,
1406                                         data->REG_CRITICAL_PWM_ENABLE[i]);
1407                         if (reg & data->CRITICAL_PWM_ENABLE_MASK)
1408                                 reg = nct6775_read_value(data,
1409                                         data->REG_CRITICAL_PWM[i]);
1410                         else
1411                                 reg = 0xff;
1412                         data->auto_pwm[i][data->auto_pwm_num] = reg;
1413                         break;
1414                 }
1415         }
1416 }
1417
1418 static struct nct6775_data *nct6775_update_device(struct device *dev)
1419 {
1420         struct nct6775_data *data = dev_get_drvdata(dev);
1421         int i, j;
1422
1423         mutex_lock(&data->update_lock);
1424
1425         if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1426             || !data->valid) {
1427                 /* Fan clock dividers */
1428                 nct6775_update_fan_div_common(data);
1429
1430                 /* Measured voltages and limits */
1431                 for (i = 0; i < data->in_num; i++) {
1432                         if (!(data->have_in & (1 << i)))
1433                                 continue;
1434
1435                         data->in[i][0] = nct6775_read_value(data,
1436                                                             data->REG_VIN[i]);
1437                         data->in[i][1] = nct6775_read_value(data,
1438                                           data->REG_IN_MINMAX[0][i]);
1439                         data->in[i][2] = nct6775_read_value(data,
1440                                           data->REG_IN_MINMAX[1][i]);
1441                 }
1442
1443                 /* Measured fan speeds and limits */
1444                 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
1445                         u16 reg;
1446
1447                         if (!(data->has_fan & (1 << i)))
1448                                 continue;
1449
1450                         reg = nct6775_read_value(data, data->REG_FAN[i]);
1451                         data->rpm[i] = data->fan_from_reg(reg,
1452                                                           data->fan_div[i]);
1453
1454                         if (data->has_fan_min & (1 << i))
1455                                 data->fan_min[i] = nct6775_read_value(data,
1456                                            data->REG_FAN_MIN[i]);
1457                         data->fan_pulses[i] =
1458                           (nct6775_read_value(data, data->REG_FAN_PULSES[i])
1459                                 >> data->FAN_PULSE_SHIFT[i]) & 0x03;
1460
1461                         nct6775_select_fan_div(dev, data, i, reg);
1462                 }
1463
1464                 nct6775_update_pwm(dev);
1465                 nct6775_update_pwm_limits(dev);
1466
1467                 /* Measured temperatures and limits */
1468                 for (i = 0; i < NUM_TEMP; i++) {
1469                         if (!(data->have_temp & (1 << i)))
1470                                 continue;
1471                         for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1472                                 if (data->reg_temp[j][i])
1473                                         data->temp[j][i]
1474                                           = nct6775_read_temp(data,
1475                                                 data->reg_temp[j][i]);
1476                         }
1477                         if (i >= NUM_TEMP_FIXED ||
1478                             !(data->have_temp_fixed & (1 << i)))
1479                                 continue;
1480                         data->temp_offset[i]
1481                           = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1482                 }
1483
1484                 data->alarms = 0;
1485                 for (i = 0; i < NUM_REG_ALARM; i++) {
1486                         u8 alarm;
1487                         if (!data->REG_ALARM[i])
1488                                 continue;
1489                         alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1490                         data->alarms |= ((u64)alarm) << (i << 3);
1491                 }
1492
1493                 data->beeps = 0;
1494                 for (i = 0; i < NUM_REG_BEEP; i++) {
1495                         u8 beep;
1496                         if (!data->REG_BEEP[i])
1497                                 continue;
1498                         beep = nct6775_read_value(data, data->REG_BEEP[i]);
1499                         data->beeps |= ((u64)beep) << (i << 3);
1500                 }
1501
1502                 data->last_updated = jiffies;
1503                 data->valid = true;
1504         }
1505
1506         mutex_unlock(&data->update_lock);
1507         return data;
1508 }
1509
1510 /*
1511  * Sysfs callback functions
1512  */
1513 static ssize_t
1514 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1515 {
1516         struct nct6775_data *data = nct6775_update_device(dev);
1517         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1518         int nr = sattr->nr;
1519         int index = sattr->index;
1520         return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1521 }
1522
1523 static ssize_t
1524 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1525              size_t count)
1526 {
1527         struct nct6775_data *data = dev_get_drvdata(dev);
1528         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1529         int nr = sattr->nr;
1530         int index = sattr->index;
1531         unsigned long val;
1532         int err = kstrtoul(buf, 10, &val);
1533         if (err < 0)
1534                 return err;
1535         mutex_lock(&data->update_lock);
1536         data->in[nr][index] = in_to_reg(val, nr);
1537         nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr],
1538                             data->in[nr][index]);
1539         mutex_unlock(&data->update_lock);
1540         return count;
1541 }
1542
1543 static ssize_t
1544 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1545 {
1546         struct nct6775_data *data = nct6775_update_device(dev);
1547         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1548         int nr = data->ALARM_BITS[sattr->index];
1549         return sprintf(buf, "%u\n",
1550                        (unsigned int)((data->alarms >> nr) & 0x01));
1551 }
1552
1553 static int find_temp_source(struct nct6775_data *data, int index, int count)
1554 {
1555         int source = data->temp_src[index];
1556         int nr;
1557
1558         for (nr = 0; nr < count; nr++) {
1559                 int src;
1560
1561                 src = nct6775_read_value(data,
1562                                          data->REG_TEMP_SOURCE[nr]) & 0x1f;
1563                 if (src == source)
1564                         return nr;
1565         }
1566         return -ENODEV;
1567 }
1568
1569 static ssize_t
1570 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1571 {
1572         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1573         struct nct6775_data *data = nct6775_update_device(dev);
1574         unsigned int alarm = 0;
1575         int nr;
1576
1577         /*
1578          * For temperatures, there is no fixed mapping from registers to alarm
1579          * bits. Alarm bits are determined by the temperature source mapping.
1580          */
1581         nr = find_temp_source(data, sattr->index, data->num_temp_alarms);
1582         if (nr >= 0) {
1583                 int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE];
1584                 alarm = (data->alarms >> bit) & 0x01;
1585         }
1586         return sprintf(buf, "%u\n", alarm);
1587 }
1588
1589 static ssize_t
1590 show_beep(struct device *dev, struct device_attribute *attr, char *buf)
1591 {
1592         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1593         struct nct6775_data *data = nct6775_update_device(dev);
1594         int nr = data->BEEP_BITS[sattr->index];
1595
1596         return sprintf(buf, "%u\n",
1597                        (unsigned int)((data->beeps >> nr) & 0x01));
1598 }
1599
1600 static ssize_t
1601 store_beep(struct device *dev, struct device_attribute *attr, const char *buf,
1602            size_t count)
1603 {
1604         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1605         struct nct6775_data *data = dev_get_drvdata(dev);
1606         int nr = data->BEEP_BITS[sattr->index];
1607         int regindex = nr >> 3;
1608         unsigned long val;
1609
1610         int err = kstrtoul(buf, 10, &val);
1611         if (err < 0)
1612                 return err;
1613         if (val > 1)
1614                 return -EINVAL;
1615
1616         mutex_lock(&data->update_lock);
1617         if (val)
1618                 data->beeps |= (1ULL << nr);
1619         else
1620                 data->beeps &= ~(1ULL << nr);
1621         nct6775_write_value(data, data->REG_BEEP[regindex],
1622                             (data->beeps >> (regindex << 3)) & 0xff);
1623         mutex_unlock(&data->update_lock);
1624         return count;
1625 }
1626
1627 static ssize_t
1628 show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf)
1629 {
1630         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1631         struct nct6775_data *data = nct6775_update_device(dev);
1632         unsigned int beep = 0;
1633         int nr;
1634
1635         /*
1636          * For temperatures, there is no fixed mapping from registers to beep
1637          * enable bits. Beep enable bits are determined by the temperature
1638          * source mapping.
1639          */
1640         nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1641         if (nr >= 0) {
1642                 int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1643                 beep = (data->beeps >> bit) & 0x01;
1644         }
1645         return sprintf(buf, "%u\n", beep);
1646 }
1647
1648 static ssize_t
1649 store_temp_beep(struct device *dev, struct device_attribute *attr,
1650                 const char *buf, size_t count)
1651 {
1652         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1653         struct nct6775_data *data = dev_get_drvdata(dev);
1654         int nr, bit, regindex;
1655         unsigned long val;
1656
1657         int err = kstrtoul(buf, 10, &val);
1658         if (err < 0)
1659                 return err;
1660         if (val > 1)
1661                 return -EINVAL;
1662
1663         nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1664         if (nr < 0)
1665                 return nr;
1666
1667         bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1668         regindex = bit >> 3;
1669
1670         mutex_lock(&data->update_lock);
1671         if (val)
1672                 data->beeps |= (1ULL << bit);
1673         else
1674                 data->beeps &= ~(1ULL << bit);
1675         nct6775_write_value(data, data->REG_BEEP[regindex],
1676                             (data->beeps >> (regindex << 3)) & 0xff);
1677         mutex_unlock(&data->update_lock);
1678
1679         return count;
1680 }
1681
1682 static umode_t nct6775_in_is_visible(struct kobject *kobj,
1683                                      struct attribute *attr, int index)
1684 {
1685         struct device *dev = container_of(kobj, struct device, kobj);
1686         struct nct6775_data *data = dev_get_drvdata(dev);
1687         int in = index / 5;     /* voltage index */
1688
1689         if (!(data->have_in & (1 << in)))
1690                 return 0;
1691
1692         return attr->mode;
1693 }
1694
1695 SENSOR_TEMPLATE_2(in_input, "in%d_input", S_IRUGO, show_in_reg, NULL, 0, 0);
1696 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", S_IRUGO, show_alarm, NULL, 0);
1697 SENSOR_TEMPLATE(in_beep, "in%d_beep", S_IWUSR | S_IRUGO, show_beep, store_beep,
1698                 0);
1699 SENSOR_TEMPLATE_2(in_min, "in%d_min", S_IWUSR | S_IRUGO, show_in_reg,
1700                   store_in_reg, 0, 1);
1701 SENSOR_TEMPLATE_2(in_max, "in%d_max", S_IWUSR | S_IRUGO, show_in_reg,
1702                   store_in_reg, 0, 2);
1703
1704 /*
1705  * nct6775_in_is_visible uses the index into the following array
1706  * to determine if attributes should be created or not.
1707  * Any change in order or content must be matched.
1708  */
1709 static struct sensor_device_template *nct6775_attributes_in_template[] = {
1710         &sensor_dev_template_in_input,
1711         &sensor_dev_template_in_alarm,
1712         &sensor_dev_template_in_beep,
1713         &sensor_dev_template_in_min,
1714         &sensor_dev_template_in_max,
1715         NULL
1716 };
1717
1718 static struct sensor_template_group nct6775_in_template_group = {
1719         .templates = nct6775_attributes_in_template,
1720         .is_visible = nct6775_in_is_visible,
1721 };
1722
1723 static ssize_t
1724 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1725 {
1726         struct nct6775_data *data = nct6775_update_device(dev);
1727         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1728         int nr = sattr->index;
1729         return sprintf(buf, "%d\n", data->rpm[nr]);
1730 }
1731
1732 static ssize_t
1733 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1734 {
1735         struct nct6775_data *data = nct6775_update_device(dev);
1736         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1737         int nr = sattr->index;
1738         return sprintf(buf, "%d\n",
1739                        data->fan_from_reg_min(data->fan_min[nr],
1740                                               data->fan_div[nr]));
1741 }
1742
1743 static ssize_t
1744 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1745 {
1746         struct nct6775_data *data = nct6775_update_device(dev);
1747         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1748         int nr = sattr->index;
1749         return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1750 }
1751
1752 static ssize_t
1753 store_fan_min(struct device *dev, struct device_attribute *attr,
1754               const char *buf, size_t count)
1755 {
1756         struct nct6775_data *data = dev_get_drvdata(dev);
1757         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1758         int nr = sattr->index;
1759         unsigned long val;
1760         int err;
1761         unsigned int reg;
1762         u8 new_div;
1763
1764         err = kstrtoul(buf, 10, &val);
1765         if (err < 0)
1766                 return err;
1767
1768         mutex_lock(&data->update_lock);
1769         if (!data->has_fan_div) {
1770                 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1771                 if (!val) {
1772                         val = 0xff1f;
1773                 } else {
1774                         if (val > 1350000U)
1775                                 val = 135000U;
1776                         val = 1350000U / val;
1777                         val = (val & 0x1f) | ((val << 3) & 0xff00);
1778                 }
1779                 data->fan_min[nr] = val;
1780                 goto write_min; /* Leave fan divider alone */
1781         }
1782         if (!val) {
1783                 /* No min limit, alarm disabled */
1784                 data->fan_min[nr] = 255;
1785                 new_div = data->fan_div[nr]; /* No change */
1786                 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1787                 goto write_div;
1788         }
1789         reg = 1350000U / val;
1790         if (reg >= 128 * 255) {
1791                 /*
1792                  * Speed below this value cannot possibly be represented,
1793                  * even with the highest divider (128)
1794                  */
1795                 data->fan_min[nr] = 254;
1796                 new_div = 7; /* 128 == (1 << 7) */
1797                 dev_warn(dev,
1798                          "fan%u low limit %lu below minimum %u, set to minimum\n",
1799                          nr + 1, val, data->fan_from_reg_min(254, 7));
1800         } else if (!reg) {
1801                 /*
1802                  * Speed above this value cannot possibly be represented,
1803                  * even with the lowest divider (1)
1804                  */
1805                 data->fan_min[nr] = 1;
1806                 new_div = 0; /* 1 == (1 << 0) */
1807                 dev_warn(dev,
1808                          "fan%u low limit %lu above maximum %u, set to maximum\n",
1809                          nr + 1, val, data->fan_from_reg_min(1, 0));
1810         } else {
1811                 /*
1812                  * Automatically pick the best divider, i.e. the one such
1813                  * that the min limit will correspond to a register value
1814                  * in the 96..192 range
1815                  */
1816                 new_div = 0;
1817                 while (reg > 192 && new_div < 7) {
1818                         reg >>= 1;
1819                         new_div++;
1820                 }
1821                 data->fan_min[nr] = reg;
1822         }
1823
1824 write_div:
1825         /*
1826          * Write both the fan clock divider (if it changed) and the new
1827          * fan min (unconditionally)
1828          */
1829         if (new_div != data->fan_div[nr]) {
1830                 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1831                         nr + 1, div_from_reg(data->fan_div[nr]),
1832                         div_from_reg(new_div));
1833                 data->fan_div[nr] = new_div;
1834                 nct6775_write_fan_div_common(data, nr);
1835                 /* Give the chip time to sample a new speed value */
1836                 data->last_updated = jiffies;
1837         }
1838
1839 write_min:
1840         nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1841         mutex_unlock(&data->update_lock);
1842
1843         return count;
1844 }
1845
1846 static ssize_t
1847 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
1848 {
1849         struct nct6775_data *data = nct6775_update_device(dev);
1850         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1851         int p = data->fan_pulses[sattr->index];
1852
1853         return sprintf(buf, "%d\n", p ? : 4);
1854 }
1855
1856 static ssize_t
1857 store_fan_pulses(struct device *dev, struct device_attribute *attr,
1858                  const char *buf, size_t count)
1859 {
1860         struct nct6775_data *data = dev_get_drvdata(dev);
1861         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1862         int nr = sattr->index;
1863         unsigned long val;
1864         int err;
1865         u8 reg;
1866
1867         err = kstrtoul(buf, 10, &val);
1868         if (err < 0)
1869                 return err;
1870
1871         if (val > 4)
1872                 return -EINVAL;
1873
1874         mutex_lock(&data->update_lock);
1875         data->fan_pulses[nr] = val & 3;
1876         reg = nct6775_read_value(data, data->REG_FAN_PULSES[nr]);
1877         reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
1878         reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
1879         nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
1880         mutex_unlock(&data->update_lock);
1881
1882         return count;
1883 }
1884
1885 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
1886                                       struct attribute *attr, int index)
1887 {
1888         struct device *dev = container_of(kobj, struct device, kobj);
1889         struct nct6775_data *data = dev_get_drvdata(dev);
1890         int fan = index / 6;    /* fan index */
1891         int nr = index % 6;     /* attribute index */
1892
1893         if (!(data->has_fan & (1 << fan)))
1894                 return 0;
1895
1896         if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1)
1897                 return 0;
1898         if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1)
1899                 return 0;
1900         if (nr == 4 && !(data->has_fan_min & (1 << fan)))
1901                 return 0;
1902         if (nr == 5 && data->kind != nct6775)
1903                 return 0;
1904
1905         return attr->mode;
1906 }
1907
1908 SENSOR_TEMPLATE(fan_input, "fan%d_input", S_IRUGO, show_fan, NULL, 0);
1909 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", S_IRUGO, show_alarm, NULL,
1910                 FAN_ALARM_BASE);
1911 SENSOR_TEMPLATE(fan_beep, "fan%d_beep", S_IWUSR | S_IRUGO, show_beep,
1912                 store_beep, FAN_ALARM_BASE);
1913 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", S_IWUSR | S_IRUGO, show_fan_pulses,
1914                 store_fan_pulses, 0);
1915 SENSOR_TEMPLATE(fan_min, "fan%d_min", S_IWUSR | S_IRUGO, show_fan_min,
1916                 store_fan_min, 0);
1917 SENSOR_TEMPLATE(fan_div, "fan%d_div", S_IRUGO, show_fan_div, NULL, 0);
1918
1919 /*
1920  * nct6775_fan_is_visible uses the index into the following array
1921  * to determine if attributes should be created or not.
1922  * Any change in order or content must be matched.
1923  */
1924 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
1925         &sensor_dev_template_fan_input,
1926         &sensor_dev_template_fan_alarm, /* 1 */
1927         &sensor_dev_template_fan_beep,  /* 2 */
1928         &sensor_dev_template_fan_pulses,
1929         &sensor_dev_template_fan_min,   /* 4 */
1930         &sensor_dev_template_fan_div,   /* 5 */
1931         NULL
1932 };
1933
1934 static struct sensor_template_group nct6775_fan_template_group = {
1935         .templates = nct6775_attributes_fan_template,
1936         .is_visible = nct6775_fan_is_visible,
1937         .base = 1,
1938 };
1939
1940 static ssize_t
1941 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1942 {
1943         struct nct6775_data *data = nct6775_update_device(dev);
1944         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1945         int nr = sattr->index;
1946         return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1947 }
1948
1949 static ssize_t
1950 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1951 {
1952         struct nct6775_data *data = nct6775_update_device(dev);
1953         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1954         int nr = sattr->nr;
1955         int index = sattr->index;
1956
1957         return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
1958 }
1959
1960 static ssize_t
1961 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
1962            size_t count)
1963 {
1964         struct nct6775_data *data = dev_get_drvdata(dev);
1965         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1966         int nr = sattr->nr;
1967         int index = sattr->index;
1968         int err;
1969         long val;
1970
1971         err = kstrtol(buf, 10, &val);
1972         if (err < 0)
1973                 return err;
1974
1975         mutex_lock(&data->update_lock);
1976         data->temp[index][nr] = LM75_TEMP_TO_REG(val);
1977         nct6775_write_temp(data, data->reg_temp[index][nr],
1978                            data->temp[index][nr]);
1979         mutex_unlock(&data->update_lock);
1980         return count;
1981 }
1982
1983 static ssize_t
1984 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
1985 {
1986         struct nct6775_data *data = nct6775_update_device(dev);
1987         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1988
1989         return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
1990 }
1991
1992 static ssize_t
1993 store_temp_offset(struct device *dev, struct device_attribute *attr,
1994                   const char *buf, size_t count)
1995 {
1996         struct nct6775_data *data = dev_get_drvdata(dev);
1997         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1998         int nr = sattr->index;
1999         long val;
2000         int err;
2001
2002         err = kstrtol(buf, 10, &val);
2003         if (err < 0)
2004                 return err;
2005
2006         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
2007
2008         mutex_lock(&data->update_lock);
2009         data->temp_offset[nr] = val;
2010         nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
2011         mutex_unlock(&data->update_lock);
2012
2013         return count;
2014 }
2015
2016 static ssize_t
2017 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
2018 {
2019         struct nct6775_data *data = nct6775_update_device(dev);
2020         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2021         int nr = sattr->index;
2022         return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
2023 }
2024
2025 static ssize_t
2026 store_temp_type(struct device *dev, struct device_attribute *attr,
2027                 const char *buf, size_t count)
2028 {
2029         struct nct6775_data *data = nct6775_update_device(dev);
2030         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2031         int nr = sattr->index;
2032         unsigned long val;
2033         int err;
2034         u8 vbat, diode, vbit, dbit;
2035
2036         err = kstrtoul(buf, 10, &val);
2037         if (err < 0)
2038                 return err;
2039
2040         if (val != 1 && val != 3 && val != 4)
2041                 return -EINVAL;
2042
2043         mutex_lock(&data->update_lock);
2044
2045         data->temp_type[nr] = val;
2046         vbit = 0x02 << nr;
2047         dbit = data->DIODE_MASK << nr;
2048         vbat = nct6775_read_value(data, data->REG_VBAT) & ~vbit;
2049         diode = nct6775_read_value(data, data->REG_DIODE) & ~dbit;
2050         switch (val) {
2051         case 1: /* CPU diode (diode, current mode) */
2052                 vbat |= vbit;
2053                 diode |= dbit;
2054                 break;
2055         case 3: /* diode, voltage mode */
2056                 vbat |= dbit;
2057                 break;
2058         case 4: /* thermistor */
2059                 break;
2060         }
2061         nct6775_write_value(data, data->REG_VBAT, vbat);
2062         nct6775_write_value(data, data->REG_DIODE, diode);
2063
2064         mutex_unlock(&data->update_lock);
2065         return count;
2066 }
2067
2068 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
2069                                        struct attribute *attr, int index)
2070 {
2071         struct device *dev = container_of(kobj, struct device, kobj);
2072         struct nct6775_data *data = dev_get_drvdata(dev);
2073         int temp = index / 10;  /* temp index */
2074         int nr = index % 10;    /* attribute index */
2075
2076         if (!(data->have_temp & (1 << temp)))
2077                 return 0;
2078
2079         if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0)
2080                 return 0;                               /* alarm */
2081
2082         if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0)
2083                 return 0;                               /* beep */
2084
2085         if (nr == 4 && !data->reg_temp[1][temp])        /* max */
2086                 return 0;
2087
2088         if (nr == 5 && !data->reg_temp[2][temp])        /* max_hyst */
2089                 return 0;
2090
2091         if (nr == 6 && !data->reg_temp[3][temp])        /* crit */
2092                 return 0;
2093
2094         if (nr == 7 && !data->reg_temp[4][temp])        /* lcrit */
2095                 return 0;
2096
2097         /* offset and type only apply to fixed sensors */
2098         if (nr > 7 && !(data->have_temp_fixed & (1 << temp)))
2099                 return 0;
2100
2101         return attr->mode;
2102 }
2103
2104 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", S_IRUGO, show_temp, NULL, 0, 0);
2105 SENSOR_TEMPLATE(temp_label, "temp%d_label", S_IRUGO, show_temp_label, NULL, 0);
2106 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", S_IRUGO | S_IWUSR, show_temp,
2107                   store_temp, 0, 1);
2108 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", S_IRUGO | S_IWUSR,
2109                   show_temp, store_temp, 0, 2);
2110 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", S_IRUGO | S_IWUSR, show_temp,
2111                   store_temp, 0, 3);
2112 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", S_IRUGO | S_IWUSR, show_temp,
2113                   store_temp, 0, 4);
2114 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", S_IRUGO | S_IWUSR,
2115                 show_temp_offset, store_temp_offset, 0);
2116 SENSOR_TEMPLATE(temp_type, "temp%d_type", S_IRUGO | S_IWUSR, show_temp_type,
2117                 store_temp_type, 0);
2118 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", S_IRUGO, show_temp_alarm, NULL, 0);
2119 SENSOR_TEMPLATE(temp_beep, "temp%d_beep", S_IRUGO | S_IWUSR, show_temp_beep,
2120                 store_temp_beep, 0);
2121
2122 /*
2123  * nct6775_temp_is_visible uses the index into the following array
2124  * to determine if attributes should be created or not.
2125  * Any change in order or content must be matched.
2126  */
2127 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
2128         &sensor_dev_template_temp_input,
2129         &sensor_dev_template_temp_label,
2130         &sensor_dev_template_temp_alarm,        /* 2 */
2131         &sensor_dev_template_temp_beep,         /* 3 */
2132         &sensor_dev_template_temp_max,          /* 4 */
2133         &sensor_dev_template_temp_max_hyst,     /* 5 */
2134         &sensor_dev_template_temp_crit,         /* 6 */
2135         &sensor_dev_template_temp_lcrit,        /* 7 */
2136         &sensor_dev_template_temp_offset,       /* 8 */
2137         &sensor_dev_template_temp_type,         /* 9 */
2138         NULL
2139 };
2140
2141 static struct sensor_template_group nct6775_temp_template_group = {
2142         .templates = nct6775_attributes_temp_template,
2143         .is_visible = nct6775_temp_is_visible,
2144         .base = 1,
2145 };
2146
2147 static ssize_t
2148 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
2149 {
2150         struct nct6775_data *data = nct6775_update_device(dev);
2151         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2152
2153         return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
2154 }
2155
2156 static ssize_t
2157 store_pwm_mode(struct device *dev, struct device_attribute *attr,
2158                const char *buf, size_t count)
2159 {
2160         struct nct6775_data *data = dev_get_drvdata(dev);
2161         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2162         int nr = sattr->index;
2163         unsigned long val;
2164         int err;
2165         u8 reg;
2166
2167         err = kstrtoul(buf, 10, &val);
2168         if (err < 0)
2169                 return err;
2170
2171         if (val > 1)
2172                 return -EINVAL;
2173
2174         /* Setting DC mode is not supported for all chips/channels */
2175         if (data->REG_PWM_MODE[nr] == 0) {
2176                 if (val)
2177                         return -EINVAL;
2178                 return count;
2179         }
2180
2181         mutex_lock(&data->update_lock);
2182         data->pwm_mode[nr] = val;
2183         reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
2184         reg &= ~data->PWM_MODE_MASK[nr];
2185         if (val)
2186                 reg |= data->PWM_MODE_MASK[nr];
2187         nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
2188         mutex_unlock(&data->update_lock);
2189         return count;
2190 }
2191
2192 static ssize_t
2193 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2194 {
2195         struct nct6775_data *data = nct6775_update_device(dev);
2196         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2197         int nr = sattr->nr;
2198         int index = sattr->index;
2199         int pwm;
2200
2201         /*
2202          * For automatic fan control modes, show current pwm readings.
2203          * Otherwise, show the configured value.
2204          */
2205         if (index == 0 && data->pwm_enable[nr] > manual)
2206                 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
2207         else
2208                 pwm = data->pwm[index][nr];
2209
2210         return sprintf(buf, "%d\n", pwm);
2211 }
2212
2213 static ssize_t
2214 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
2215           size_t count)
2216 {
2217         struct nct6775_data *data = dev_get_drvdata(dev);
2218         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2219         int nr = sattr->nr;
2220         int index = sattr->index;
2221         unsigned long val;
2222         int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
2223         int maxval[7]
2224           = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
2225         int err;
2226         u8 reg;
2227
2228         err = kstrtoul(buf, 10, &val);
2229         if (err < 0)
2230                 return err;
2231         val = clamp_val(val, minval[index], maxval[index]);
2232
2233         mutex_lock(&data->update_lock);
2234         data->pwm[index][nr] = val;
2235         nct6775_write_value(data, data->REG_PWM[index][nr], val);
2236         if (index == 2) { /* floor: disable if val == 0 */
2237                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2238                 reg &= 0x7f;
2239                 if (val)
2240                         reg |= 0x80;
2241                 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2242         }
2243         mutex_unlock(&data->update_lock);
2244         return count;
2245 }
2246
2247 /* Returns 0 if OK, -EINVAL otherwise */
2248 static int check_trip_points(struct nct6775_data *data, int nr)
2249 {
2250         int i;
2251
2252         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2253                 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
2254                         return -EINVAL;
2255         }
2256         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2257                 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
2258                         return -EINVAL;
2259         }
2260         /* validate critical temperature and pwm if enabled (pwm > 0) */
2261         if (data->auto_pwm[nr][data->auto_pwm_num]) {
2262                 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2263                                 data->auto_temp[nr][data->auto_pwm_num] ||
2264                     data->auto_pwm[nr][data->auto_pwm_num - 1] >
2265                                 data->auto_pwm[nr][data->auto_pwm_num])
2266                         return -EINVAL;
2267         }
2268         return 0;
2269 }
2270
2271 static void pwm_update_registers(struct nct6775_data *data, int nr)
2272 {
2273         u8 reg;
2274
2275         switch (data->pwm_enable[nr]) {
2276         case off:
2277         case manual:
2278                 break;
2279         case speed_cruise:
2280                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2281                 reg = (reg & ~data->tolerance_mask) |
2282                   (data->target_speed_tolerance[nr] & data->tolerance_mask);
2283                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2284                 nct6775_write_value(data, data->REG_TARGET[nr],
2285                                     data->target_speed[nr] & 0xff);
2286                 if (data->REG_TOLERANCE_H) {
2287                         reg = (data->target_speed[nr] >> 8) & 0x0f;
2288                         reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2289                         nct6775_write_value(data,
2290                                             data->REG_TOLERANCE_H[nr],
2291                                             reg);
2292                 }
2293                 break;
2294         case thermal_cruise:
2295                 nct6775_write_value(data, data->REG_TARGET[nr],
2296                                     data->target_temp[nr]);
2297                 /* intentional */
2298         default:
2299                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2300                 reg = (reg & ~data->tolerance_mask) |
2301                   data->temp_tolerance[0][nr];
2302                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2303                 break;
2304         }
2305 }
2306
2307 static ssize_t
2308 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2309 {
2310         struct nct6775_data *data = nct6775_update_device(dev);
2311         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2312
2313         return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2314 }
2315
2316 static ssize_t
2317 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2318                  const char *buf, size_t count)
2319 {
2320         struct nct6775_data *data = dev_get_drvdata(dev);
2321         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2322         int nr = sattr->index;
2323         unsigned long val;
2324         int err;
2325         u16 reg;
2326
2327         err = kstrtoul(buf, 10, &val);
2328         if (err < 0)
2329                 return err;
2330
2331         if (val > sf4)
2332                 return -EINVAL;
2333
2334         if (val == sf3 && data->kind != nct6775)
2335                 return -EINVAL;
2336
2337         if (val == sf4 && check_trip_points(data, nr)) {
2338                 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2339                 dev_err(dev, "Adjust trip points and try again\n");
2340                 return -EINVAL;
2341         }
2342
2343         mutex_lock(&data->update_lock);
2344         data->pwm_enable[nr] = val;
2345         if (val == off) {
2346                 /*
2347                  * turn off pwm control: select manual mode, set pwm to maximum
2348                  */
2349                 data->pwm[0][nr] = 255;
2350                 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2351         }
2352         pwm_update_registers(data, nr);
2353         reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2354         reg &= 0x0f;
2355         reg |= pwm_enable_to_reg(val) << 4;
2356         nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2357         mutex_unlock(&data->update_lock);
2358         return count;
2359 }
2360
2361 static ssize_t
2362 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2363 {
2364         int i, sel = 0;
2365
2366         for (i = 0; i < NUM_TEMP; i++) {
2367                 if (!(data->have_temp & (1 << i)))
2368                         continue;
2369                 if (src == data->temp_src[i]) {
2370                         sel = i + 1;
2371                         break;
2372                 }
2373         }
2374
2375         return sprintf(buf, "%d\n", sel);
2376 }
2377
2378 static ssize_t
2379 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2380 {
2381         struct nct6775_data *data = nct6775_update_device(dev);
2382         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2383         int index = sattr->index;
2384
2385         return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2386 }
2387
2388 static ssize_t
2389 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2390                    const char *buf, size_t count)
2391 {
2392         struct nct6775_data *data = nct6775_update_device(dev);
2393         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2394         int nr = sattr->index;
2395         unsigned long val;
2396         int err, reg, src;
2397
2398         err = kstrtoul(buf, 10, &val);
2399         if (err < 0)
2400                 return err;
2401         if (val == 0 || val > NUM_TEMP)
2402                 return -EINVAL;
2403         if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
2404                 return -EINVAL;
2405
2406         mutex_lock(&data->update_lock);
2407         src = data->temp_src[val - 1];
2408         data->pwm_temp_sel[nr] = src;
2409         reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2410         reg &= 0xe0;
2411         reg |= src;
2412         nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2413         mutex_unlock(&data->update_lock);
2414
2415         return count;
2416 }
2417
2418 static ssize_t
2419 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2420                          char *buf)
2421 {
2422         struct nct6775_data *data = nct6775_update_device(dev);
2423         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2424         int index = sattr->index;
2425
2426         return show_pwm_temp_sel_common(data, buf,
2427                                         data->pwm_weight_temp_sel[index]);
2428 }
2429
2430 static ssize_t
2431 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2432                           const char *buf, size_t count)
2433 {
2434         struct nct6775_data *data = nct6775_update_device(dev);
2435         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2436         int nr = sattr->index;
2437         unsigned long val;
2438         int err, reg, src;
2439
2440         err = kstrtoul(buf, 10, &val);
2441         if (err < 0)
2442                 return err;
2443         if (val > NUM_TEMP)
2444                 return -EINVAL;
2445         if (val && (!(data->have_temp & (1 << (val - 1))) ||
2446                     !data->temp_src[val - 1]))
2447                 return -EINVAL;
2448
2449         mutex_lock(&data->update_lock);
2450         if (val) {
2451                 src = data->temp_src[val - 1];
2452                 data->pwm_weight_temp_sel[nr] = src;
2453                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2454                 reg &= 0xe0;
2455                 reg |= (src | 0x80);
2456                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2457         } else {
2458                 data->pwm_weight_temp_sel[nr] = 0;
2459                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2460                 reg &= 0x7f;
2461                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2462         }
2463         mutex_unlock(&data->update_lock);
2464
2465         return count;
2466 }
2467
2468 static ssize_t
2469 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2470 {
2471         struct nct6775_data *data = nct6775_update_device(dev);
2472         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2473
2474         return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2475 }
2476
2477 static ssize_t
2478 store_target_temp(struct device *dev, struct device_attribute *attr,
2479                   const char *buf, size_t count)
2480 {
2481         struct nct6775_data *data = dev_get_drvdata(dev);
2482         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2483         int nr = sattr->index;
2484         unsigned long val;
2485         int err;
2486
2487         err = kstrtoul(buf, 10, &val);
2488         if (err < 0)
2489                 return err;
2490
2491         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2492                         data->target_temp_mask);
2493
2494         mutex_lock(&data->update_lock);
2495         data->target_temp[nr] = val;
2496         pwm_update_registers(data, nr);
2497         mutex_unlock(&data->update_lock);
2498         return count;
2499 }
2500
2501 static ssize_t
2502 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2503 {
2504         struct nct6775_data *data = nct6775_update_device(dev);
2505         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2506         int nr = sattr->index;
2507
2508         return sprintf(buf, "%d\n",
2509                        fan_from_reg16(data->target_speed[nr],
2510                                       data->fan_div[nr]));
2511 }
2512
2513 static ssize_t
2514 store_target_speed(struct device *dev, struct device_attribute *attr,
2515                    const char *buf, size_t count)
2516 {
2517         struct nct6775_data *data = dev_get_drvdata(dev);
2518         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2519         int nr = sattr->index;
2520         unsigned long val;
2521         int err;
2522         u16 speed;
2523
2524         err = kstrtoul(buf, 10, &val);
2525         if (err < 0)
2526                 return err;
2527
2528         val = clamp_val(val, 0, 1350000U);
2529         speed = fan_to_reg(val, data->fan_div[nr]);
2530
2531         mutex_lock(&data->update_lock);
2532         data->target_speed[nr] = speed;
2533         pwm_update_registers(data, nr);
2534         mutex_unlock(&data->update_lock);
2535         return count;
2536 }
2537
2538 static ssize_t
2539 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2540                     char *buf)
2541 {
2542         struct nct6775_data *data = nct6775_update_device(dev);
2543         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2544         int nr = sattr->nr;
2545         int index = sattr->index;
2546
2547         return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2548 }
2549
2550 static ssize_t
2551 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2552                      const char *buf, size_t count)
2553 {
2554         struct nct6775_data *data = dev_get_drvdata(dev);
2555         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2556         int nr = sattr->nr;
2557         int index = sattr->index;
2558         unsigned long val;
2559         int err;
2560
2561         err = kstrtoul(buf, 10, &val);
2562         if (err < 0)
2563                 return err;
2564
2565         /* Limit tolerance as needed */
2566         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2567
2568         mutex_lock(&data->update_lock);
2569         data->temp_tolerance[index][nr] = val;
2570         if (index)
2571                 pwm_update_registers(data, nr);
2572         else
2573                 nct6775_write_value(data,
2574                                     data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2575                                     val);
2576         mutex_unlock(&data->update_lock);
2577         return count;
2578 }
2579
2580 /*
2581  * Fan speed tolerance is a tricky beast, since the associated register is
2582  * a tick counter, but the value is reported and configured as rpm.
2583  * Compute resulting low and high rpm values and report the difference.
2584  */
2585 static ssize_t
2586 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2587                      char *buf)
2588 {
2589         struct nct6775_data *data = nct6775_update_device(dev);
2590         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2591         int nr = sattr->index;
2592         int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2593         int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2594         int tolerance;
2595
2596         if (low <= 0)
2597                 low = 1;
2598         if (high > 0xffff)
2599                 high = 0xffff;
2600         if (high < low)
2601                 high = low;
2602
2603         tolerance = (fan_from_reg16(low, data->fan_div[nr])
2604                      - fan_from_reg16(high, data->fan_div[nr])) / 2;
2605
2606         return sprintf(buf, "%d\n", tolerance);
2607 }
2608
2609 static ssize_t
2610 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2611                       const char *buf, size_t count)
2612 {
2613         struct nct6775_data *data = dev_get_drvdata(dev);
2614         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2615         int nr = sattr->index;
2616         unsigned long val;
2617         int err;
2618         int low, high;
2619
2620         err = kstrtoul(buf, 10, &val);
2621         if (err < 0)
2622                 return err;
2623
2624         high = fan_from_reg16(data->target_speed[nr],
2625                               data->fan_div[nr]) + val;
2626         low = fan_from_reg16(data->target_speed[nr],
2627                              data->fan_div[nr]) - val;
2628         if (low <= 0)
2629                 low = 1;
2630         if (high < low)
2631                 high = low;
2632
2633         val = (fan_to_reg(low, data->fan_div[nr]) -
2634                fan_to_reg(high, data->fan_div[nr])) / 2;
2635
2636         /* Limit tolerance as needed */
2637         val = clamp_val(val, 0, data->speed_tolerance_limit);
2638
2639         mutex_lock(&data->update_lock);
2640         data->target_speed_tolerance[nr] = val;
2641         pwm_update_registers(data, nr);
2642         mutex_unlock(&data->update_lock);
2643         return count;
2644 }
2645
2646 SENSOR_TEMPLATE_2(pwm, "pwm%d", S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2647 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", S_IWUSR | S_IRUGO, show_pwm_mode,
2648                 store_pwm_mode, 0);
2649 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", S_IWUSR | S_IRUGO, show_pwm_enable,
2650                 store_pwm_enable, 0);
2651 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", S_IWUSR | S_IRUGO,
2652                 show_pwm_temp_sel, store_pwm_temp_sel, 0);
2653 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", S_IWUSR | S_IRUGO,
2654                 show_target_temp, store_target_temp, 0);
2655 SENSOR_TEMPLATE(fan_target, "fan%d_target", S_IWUSR | S_IRUGO,
2656                 show_target_speed, store_target_speed, 0);
2657 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", S_IWUSR | S_IRUGO,
2658                 show_speed_tolerance, store_speed_tolerance, 0);
2659
2660 /* Smart Fan registers */
2661
2662 static ssize_t
2663 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2664 {
2665         struct nct6775_data *data = nct6775_update_device(dev);
2666         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2667         int nr = sattr->nr;
2668         int index = sattr->index;
2669
2670         return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2671 }
2672
2673 static ssize_t
2674 store_weight_temp(struct device *dev, struct device_attribute *attr,
2675                   const char *buf, size_t count)
2676 {
2677         struct nct6775_data *data = dev_get_drvdata(dev);
2678         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2679         int nr = sattr->nr;
2680         int index = sattr->index;
2681         unsigned long val;
2682         int err;
2683
2684         err = kstrtoul(buf, 10, &val);
2685         if (err < 0)
2686                 return err;
2687
2688         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2689
2690         mutex_lock(&data->update_lock);
2691         data->weight_temp[index][nr] = val;
2692         nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2693         mutex_unlock(&data->update_lock);
2694         return count;
2695 }
2696
2697 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", S_IWUSR | S_IRUGO,
2698                   show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
2699 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step",
2700                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 0);
2701 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol",
2702                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 1);
2703 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base",
2704                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 2);
2705 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step",
2706                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 5);
2707 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base",
2708                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 6);
2709
2710 static ssize_t
2711 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2712 {
2713         struct nct6775_data *data = nct6775_update_device(dev);
2714         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2715         int nr = sattr->nr;
2716         int index = sattr->index;
2717
2718         return sprintf(buf, "%d\n",
2719                        step_time_from_reg(data->fan_time[index][nr],
2720                                           data->pwm_mode[nr]));
2721 }
2722
2723 static ssize_t
2724 store_fan_time(struct device *dev, struct device_attribute *attr,
2725                const char *buf, size_t count)
2726 {
2727         struct nct6775_data *data = dev_get_drvdata(dev);
2728         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2729         int nr = sattr->nr;
2730         int index = sattr->index;
2731         unsigned long val;
2732         int err;
2733
2734         err = kstrtoul(buf, 10, &val);
2735         if (err < 0)
2736                 return err;
2737
2738         val = step_time_to_reg(val, data->pwm_mode[nr]);
2739         mutex_lock(&data->update_lock);
2740         data->fan_time[index][nr] = val;
2741         nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2742         mutex_unlock(&data->update_lock);
2743         return count;
2744 }
2745
2746 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
2747 static ssize_t
2748 show_name(struct device *dev, struct device_attribute *attr, char *buf)
2749 {
2750         struct nct6775_data *data = dev_get_drvdata(dev);
2751
2752         return sprintf(buf, "%s\n", data->name);
2753 }
2754
2755 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
2756 #endif
2757
2758 static ssize_t
2759 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2760 {
2761         struct nct6775_data *data = nct6775_update_device(dev);
2762         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2763
2764         return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2765 }
2766
2767 static ssize_t
2768 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2769                const char *buf, size_t count)
2770 {
2771         struct nct6775_data *data = dev_get_drvdata(dev);
2772         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2773         int nr = sattr->nr;
2774         int point = sattr->index;
2775         unsigned long val;
2776         int err;
2777         u8 reg;
2778
2779         err = kstrtoul(buf, 10, &val);
2780         if (err < 0)
2781                 return err;
2782         if (val > 255)
2783                 return -EINVAL;
2784
2785         if (point == data->auto_pwm_num) {
2786                 if (data->kind != nct6775 && !val)
2787                         return -EINVAL;
2788                 if (data->kind != nct6779 && val)
2789                         val = 0xff;
2790         }
2791
2792         mutex_lock(&data->update_lock);
2793         data->auto_pwm[nr][point] = val;
2794         if (point < data->auto_pwm_num) {
2795                 nct6775_write_value(data,
2796                                     NCT6775_AUTO_PWM(data, nr, point),
2797                                     data->auto_pwm[nr][point]);
2798         } else {
2799                 switch (data->kind) {
2800                 case nct6775:
2801                         /* disable if needed (pwm == 0) */
2802                         reg = nct6775_read_value(data,
2803                                                  NCT6775_REG_CRITICAL_ENAB[nr]);
2804                         if (val)
2805                                 reg |= 0x02;
2806                         else
2807                                 reg &= ~0x02;
2808                         nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
2809                                             reg);
2810                         break;
2811                 case nct6776:
2812                         break; /* always enabled, nothing to do */
2813                 case nct6106:
2814                 case nct6779:
2815                 case nct6791:
2816                 case nct6792:
2817                         nct6775_write_value(data, data->REG_CRITICAL_PWM[nr],
2818                                             val);
2819                         reg = nct6775_read_value(data,
2820                                         data->REG_CRITICAL_PWM_ENABLE[nr]);
2821                         if (val == 255)
2822                                 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
2823                         else
2824                                 reg |= data->CRITICAL_PWM_ENABLE_MASK;
2825                         nct6775_write_value(data,
2826                                             data->REG_CRITICAL_PWM_ENABLE[nr],
2827                                             reg);
2828                         break;
2829                 }
2830         }
2831         mutex_unlock(&data->update_lock);
2832         return count;
2833 }
2834
2835 static ssize_t
2836 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
2837 {
2838         struct nct6775_data *data = nct6775_update_device(dev);
2839         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2840         int nr = sattr->nr;
2841         int point = sattr->index;
2842
2843         /*
2844          * We don't know for sure if the temperature is signed or unsigned.
2845          * Assume it is unsigned.
2846          */
2847         return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
2848 }
2849
2850 static ssize_t
2851 store_auto_temp(struct device *dev, struct device_attribute *attr,
2852                 const char *buf, size_t count)
2853 {
2854         struct nct6775_data *data = dev_get_drvdata(dev);
2855         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2856         int nr = sattr->nr;
2857         int point = sattr->index;
2858         unsigned long val;
2859         int err;
2860
2861         err = kstrtoul(buf, 10, &val);
2862         if (err)
2863                 return err;
2864         if (val > 255000)
2865                 return -EINVAL;
2866
2867         mutex_lock(&data->update_lock);
2868         data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
2869         if (point < data->auto_pwm_num) {
2870                 nct6775_write_value(data,
2871                                     NCT6775_AUTO_TEMP(data, nr, point),
2872                                     data->auto_temp[nr][point]);
2873         } else {
2874                 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
2875                                     data->auto_temp[nr][point]);
2876         }
2877         mutex_unlock(&data->update_lock);
2878         return count;
2879 }
2880
2881 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
2882                                       struct attribute *attr, int index)
2883 {
2884         struct device *dev = container_of(kobj, struct device, kobj);
2885         struct nct6775_data *data = dev_get_drvdata(dev);
2886         int pwm = index / 36;   /* pwm index */
2887         int nr = index % 36;    /* attribute index */
2888
2889         if (!(data->has_pwm & (1 << pwm)))
2890                 return 0;
2891
2892         if ((nr >= 14 && nr <= 18) || nr == 21)   /* weight */
2893                 if (!data->REG_WEIGHT_TEMP_SEL[pwm])
2894                         return 0;
2895         if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
2896                 return 0;
2897         if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
2898                 return 0;
2899         if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
2900                 return 0;
2901
2902         if (nr >= 22 && nr <= 35) {             /* auto point */
2903                 int api = (nr - 22) / 2;        /* auto point index */
2904
2905                 if (api > data->auto_pwm_num)
2906                         return 0;
2907         }
2908         return attr->mode;
2909 }
2910
2911 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", S_IWUSR | S_IRUGO,
2912                   show_fan_time, store_fan_time, 0, 0);
2913 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", S_IWUSR | S_IRUGO,
2914                   show_fan_time, store_fan_time, 0, 1);
2915 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", S_IWUSR | S_IRUGO,
2916                   show_fan_time, store_fan_time, 0, 2);
2917 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", S_IWUSR | S_IRUGO, show_pwm,
2918                   store_pwm, 0, 1);
2919 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", S_IWUSR | S_IRUGO, show_pwm,
2920                   store_pwm, 0, 2);
2921 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", S_IWUSR | S_IRUGO,
2922                   show_temp_tolerance, store_temp_tolerance, 0, 0);
2923 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance",
2924                   S_IWUSR | S_IRUGO, show_temp_tolerance, store_temp_tolerance,
2925                   0, 1);
2926
2927 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2928                   0, 3);
2929
2930 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", S_IWUSR | S_IRUGO, show_pwm,
2931                   store_pwm, 0, 4);
2932
2933 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm",
2934                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 0);
2935 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp",
2936                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 0);
2937
2938 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm",
2939                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 1);
2940 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp",
2941                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 1);
2942
2943 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm",
2944                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 2);
2945 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp",
2946                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 2);
2947
2948 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm",
2949                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 3);
2950 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp",
2951                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 3);
2952
2953 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm",
2954                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 4);
2955 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp",
2956                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 4);
2957
2958 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm",
2959                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 5);
2960 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp",
2961                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 5);
2962
2963 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm",
2964                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 6);
2965 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp",
2966                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 6);
2967
2968 /*
2969  * nct6775_pwm_is_visible uses the index into the following array
2970  * to determine if attributes should be created or not.
2971  * Any change in order or content must be matched.
2972  */
2973 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
2974         &sensor_dev_template_pwm,
2975         &sensor_dev_template_pwm_mode,
2976         &sensor_dev_template_pwm_enable,
2977         &sensor_dev_template_pwm_temp_sel,
2978         &sensor_dev_template_pwm_temp_tolerance,
2979         &sensor_dev_template_pwm_crit_temp_tolerance,
2980         &sensor_dev_template_pwm_target_temp,
2981         &sensor_dev_template_fan_target,
2982         &sensor_dev_template_fan_tolerance,
2983         &sensor_dev_template_pwm_stop_time,
2984         &sensor_dev_template_pwm_step_up_time,
2985         &sensor_dev_template_pwm_step_down_time,
2986         &sensor_dev_template_pwm_start,
2987         &sensor_dev_template_pwm_floor,
2988         &sensor_dev_template_pwm_weight_temp_sel,       /* 14 */
2989         &sensor_dev_template_pwm_weight_temp_step,
2990         &sensor_dev_template_pwm_weight_temp_step_tol,
2991         &sensor_dev_template_pwm_weight_temp_step_base,
2992         &sensor_dev_template_pwm_weight_duty_step,      /* 18 */
2993         &sensor_dev_template_pwm_max,                   /* 19 */
2994         &sensor_dev_template_pwm_step,                  /* 20 */
2995         &sensor_dev_template_pwm_weight_duty_base,      /* 21 */
2996         &sensor_dev_template_pwm_auto_point1_pwm,       /* 22 */
2997         &sensor_dev_template_pwm_auto_point1_temp,
2998         &sensor_dev_template_pwm_auto_point2_pwm,
2999         &sensor_dev_template_pwm_auto_point2_temp,
3000         &sensor_dev_template_pwm_auto_point3_pwm,
3001         &sensor_dev_template_pwm_auto_point3_temp,
3002         &sensor_dev_template_pwm_auto_point4_pwm,
3003         &sensor_dev_template_pwm_auto_point4_temp,
3004         &sensor_dev_template_pwm_auto_point5_pwm,
3005         &sensor_dev_template_pwm_auto_point5_temp,
3006         &sensor_dev_template_pwm_auto_point6_pwm,
3007         &sensor_dev_template_pwm_auto_point6_temp,
3008         &sensor_dev_template_pwm_auto_point7_pwm,
3009         &sensor_dev_template_pwm_auto_point7_temp,      /* 35 */
3010         NULL
3011 };
3012
3013 static struct sensor_template_group nct6775_pwm_template_group = {
3014         .templates = nct6775_attributes_pwm_template,
3015         .is_visible = nct6775_pwm_is_visible,
3016         .base = 1,
3017 };
3018
3019 static ssize_t
3020 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
3021 {
3022         struct nct6775_data *data = dev_get_drvdata(dev);
3023         return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
3024 }
3025
3026 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
3027
3028 /* Case open detection */
3029
3030 static ssize_t
3031 clear_caseopen(struct device *dev, struct device_attribute *attr,
3032                const char *buf, size_t count)
3033 {
3034         struct nct6775_data *data = dev_get_drvdata(dev);
3035         int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
3036         unsigned long val;
3037         u8 reg;
3038         int ret;
3039
3040         if (kstrtoul(buf, 10, &val) || val != 0)
3041                 return -EINVAL;
3042
3043         mutex_lock(&data->update_lock);
3044
3045         /*
3046          * Use CR registers to clear caseopen status.
3047          * The CR registers are the same for all chips, and not all chips
3048          * support clearing the caseopen status through "regular" registers.
3049          */
3050         ret = superio_enter(data->sioreg);
3051         if (ret) {
3052                 count = ret;
3053                 goto error;
3054         }
3055
3056         superio_select(data->sioreg, NCT6775_LD_ACPI);
3057         reg = superio_inb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
3058         reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3059         superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3060         reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3061         superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3062         superio_exit(data->sioreg);
3063
3064         data->valid = false;    /* Force cache refresh */
3065 error:
3066         mutex_unlock(&data->update_lock);
3067         return count;
3068 }
3069
3070 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
3071                           clear_caseopen, INTRUSION_ALARM_BASE);
3072 static SENSOR_DEVICE_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
3073                           clear_caseopen, INTRUSION_ALARM_BASE + 1);
3074 static SENSOR_DEVICE_ATTR(intrusion0_beep, S_IWUSR | S_IRUGO, show_beep,
3075                           store_beep, INTRUSION_ALARM_BASE);
3076 static SENSOR_DEVICE_ATTR(intrusion1_beep, S_IWUSR | S_IRUGO, show_beep,
3077                           store_beep, INTRUSION_ALARM_BASE + 1);
3078 static SENSOR_DEVICE_ATTR(beep_enable, S_IWUSR | S_IRUGO, show_beep,
3079                           store_beep, BEEP_ENABLE_BASE);
3080
3081 static umode_t nct6775_other_is_visible(struct kobject *kobj,
3082                                         struct attribute *attr, int index)
3083 {
3084         struct device *dev = container_of(kobj, struct device, kobj);
3085         struct nct6775_data *data = dev_get_drvdata(dev);
3086
3087         if (index == 0 && !data->have_vid)
3088                 return 0;
3089
3090         if (index == 1 || index == 2) {
3091                 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + index - 1] < 0)
3092                         return 0;
3093         }
3094
3095         if (index == 3 || index == 4) {
3096                 if (data->BEEP_BITS[INTRUSION_ALARM_BASE + index - 3] < 0)
3097                         return 0;
3098         }
3099
3100         return attr->mode;
3101 }
3102
3103 /*
3104  * nct6775_other_is_visible uses the index into the following array
3105  * to determine if attributes should be created or not.
3106  * Any change in order or content must be matched.
3107  */
3108 static struct attribute *nct6775_attributes_other[] = {
3109         &dev_attr_cpu0_vid.attr,                                /* 0 */
3110         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,        /* 1 */
3111         &sensor_dev_attr_intrusion1_alarm.dev_attr.attr,        /* 2 */
3112         &sensor_dev_attr_intrusion0_beep.dev_attr.attr,         /* 3 */
3113         &sensor_dev_attr_intrusion1_beep.dev_attr.attr,         /* 4 */
3114         &sensor_dev_attr_beep_enable.dev_attr.attr,             /* 5 */
3115 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
3116         &dev_attr_name.attr,
3117 #endif
3118         NULL
3119 };
3120
3121 static const struct attribute_group nct6775_group_other = {
3122         .attrs = nct6775_attributes_other,
3123         .is_visible = nct6775_other_is_visible,
3124 };
3125
3126 static inline void nct6775_init_device(struct nct6775_data *data)
3127 {
3128         int i;
3129         u8 tmp, diode;
3130
3131         /* Start monitoring if needed */
3132         if (data->REG_CONFIG) {
3133                 tmp = nct6775_read_value(data, data->REG_CONFIG);
3134                 if (!(tmp & 0x01))
3135                         nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
3136         }
3137
3138         /* Enable temperature sensors if needed */
3139         for (i = 0; i < NUM_TEMP; i++) {
3140                 if (!(data->have_temp & (1 << i)))
3141                         continue;
3142                 if (!data->reg_temp_config[i])
3143                         continue;
3144                 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
3145                 if (tmp & 0x01)
3146                         nct6775_write_value(data, data->reg_temp_config[i],
3147                                             tmp & 0xfe);
3148         }
3149
3150         /* Enable VBAT monitoring if needed */
3151         tmp = nct6775_read_value(data, data->REG_VBAT);
3152         if (!(tmp & 0x01))
3153                 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
3154
3155         diode = nct6775_read_value(data, data->REG_DIODE);
3156
3157         for (i = 0; i < data->temp_fixed_num; i++) {
3158                 if (!(data->have_temp_fixed & (1 << i)))
3159                         continue;
3160                 if ((tmp & (data->DIODE_MASK << i)))    /* diode */
3161                         data->temp_type[i]
3162                           = 3 - ((diode >> i) & data->DIODE_MASK);
3163                 else                            /* thermistor */
3164                         data->temp_type[i] = 4;
3165         }
3166 }
3167
3168 static void
3169 nct6775_check_fan_inputs(struct nct6775_data *data)
3170 {
3171         bool fan3pin, fan4pin, fan4min, fan5pin, fan6pin;
3172         bool pwm3pin, pwm4pin, pwm5pin, pwm6pin;
3173         int sioreg = data->sioreg;
3174         int regval;
3175
3176         /* fan4 and fan5 share some pins with the GPIO and serial flash */
3177         if (data->kind == nct6775) {
3178                 regval = superio_inb(sioreg, 0x2c);
3179
3180                 fan3pin = regval & (1 << 6);
3181                 pwm3pin = regval & (1 << 7);
3182
3183                 /* On NCT6775, fan4 shares pins with the fdc interface */
3184                 fan4pin = !(superio_inb(sioreg, 0x2A) & 0x80);
3185                 fan4min = false;
3186                 fan5pin = false;
3187                 fan6pin = false;
3188                 pwm4pin = false;
3189                 pwm5pin = false;
3190                 pwm6pin = false;
3191         } else if (data->kind == nct6776) {
3192                 bool gpok = superio_inb(sioreg, 0x27) & 0x80;
3193
3194                 superio_select(sioreg, NCT6775_LD_HWM);
3195                 regval = superio_inb(sioreg, SIO_REG_ENABLE);
3196
3197                 if (regval & 0x80)
3198                         fan3pin = gpok;
3199                 else
3200                         fan3pin = !(superio_inb(sioreg, 0x24) & 0x40);
3201
3202                 if (regval & 0x40)
3203                         fan4pin = gpok;
3204                 else
3205                         fan4pin = superio_inb(sioreg, 0x1C) & 0x01;
3206
3207                 if (regval & 0x20)
3208                         fan5pin = gpok;
3209                 else
3210                         fan5pin = superio_inb(sioreg, 0x1C) & 0x02;
3211
3212                 fan4min = fan4pin;
3213                 fan6pin = false;
3214                 pwm3pin = fan3pin;
3215                 pwm4pin = false;
3216                 pwm5pin = false;
3217                 pwm6pin = false;
3218         } else if (data->kind == nct6106) {
3219                 regval = superio_inb(sioreg, 0x24);
3220                 fan3pin = !(regval & 0x80);
3221                 pwm3pin = regval & 0x08;
3222
3223                 fan4pin = false;
3224                 fan4min = false;
3225                 fan5pin = false;
3226                 fan6pin = false;
3227                 pwm4pin = false;
3228                 pwm5pin = false;
3229                 pwm6pin = false;
3230         } else {        /* NCT6779D, NCT6791D, or NCT6792D */
3231                 regval = superio_inb(sioreg, 0x1c);
3232
3233                 fan3pin = !(regval & (1 << 5));
3234                 fan4pin = !(regval & (1 << 6));
3235                 fan5pin = !(regval & (1 << 7));
3236
3237                 pwm3pin = !(regval & (1 << 0));
3238                 pwm4pin = !(regval & (1 << 1));
3239                 pwm5pin = !(regval & (1 << 2));
3240
3241                 fan4min = fan4pin;
3242
3243                 if (data->kind == nct6791 || data->kind == nct6792) {
3244                         regval = superio_inb(sioreg, 0x2d);
3245                         fan6pin = (regval & (1 << 1));
3246                         pwm6pin = (regval & (1 << 0));
3247                 } else {        /* NCT6779D */
3248                         fan6pin = false;
3249                         pwm6pin = false;
3250                 }
3251         }
3252
3253         /* fan 1 and 2 (0x03) are always present */
3254         data->has_fan = 0x03 | (fan3pin << 2) | (fan4pin << 3) |
3255                 (fan5pin << 4) | (fan6pin << 5);
3256         data->has_fan_min = 0x03 | (fan3pin << 2) | (fan4min << 3) |
3257                 (fan5pin << 4);
3258         data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) |
3259                 (pwm5pin << 4) | (pwm6pin << 5);
3260 }
3261
3262 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
3263                              int *available, int *mask)
3264 {
3265         int i;
3266         u8 src;
3267
3268         for (i = 0; i < data->pwm_num && *available; i++) {
3269                 int index;
3270
3271                 if (!regp[i])
3272                         continue;
3273                 src = nct6775_read_value(data, regp[i]);
3274                 src &= 0x1f;
3275                 if (!src || (*mask & (1 << src)))
3276                         continue;
3277                 if (src >= data->temp_label_num ||
3278                     !strlen(data->temp_label[src]))
3279                         continue;
3280
3281                 index = __ffs(*available);
3282                 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3283                 *available &= ~(1 << index);
3284                 *mask |= 1 << src;
3285         }
3286 }
3287
3288 static int nct6775_probe(struct platform_device *pdev)
3289 {
3290         struct device *dev = &pdev->dev;
3291         struct nct6775_sio_data *sio_data = dev_get_platdata(dev);
3292         struct nct6775_data *data;
3293         struct resource *res;
3294         int i, s, err = 0;
3295         int src, mask, available;
3296         const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3297         const u16 *reg_temp_mon, *reg_temp_alternate, *reg_temp_crit;
3298         const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL;
3299         int num_reg_temp, num_reg_temp_mon;
3300         u8 cr2a;
3301         struct attribute_group *group;
3302         struct device *hwmon_dev;
3303
3304         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3305         if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3306                                  DRVNAME))
3307                 return -EBUSY;
3308
3309         data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3310                             GFP_KERNEL);
3311         if (!data)
3312                 return -ENOMEM;
3313
3314         data->kind = sio_data->kind;
3315         data->sioreg = sio_data->sioreg;
3316         data->addr = res->start;
3317         mutex_init(&data->update_lock);
3318         data->name = nct6775_device_names[data->kind];
3319         data->bank = 0xff;              /* Force initial bank selection */
3320         platform_set_drvdata(pdev, data);
3321
3322         switch (data->kind) {
3323         case nct6106:
3324                 data->in_num = 9;
3325                 data->pwm_num = 3;
3326                 data->auto_pwm_num = 4;
3327                 data->temp_fixed_num = 3;
3328                 data->num_temp_alarms = 6;
3329                 data->num_temp_beeps = 6;
3330
3331                 data->fan_from_reg = fan_from_reg13;
3332                 data->fan_from_reg_min = fan_from_reg13;
3333
3334                 data->temp_label = nct6776_temp_label;
3335                 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3336
3337                 data->REG_VBAT = NCT6106_REG_VBAT;
3338                 data->REG_DIODE = NCT6106_REG_DIODE;
3339                 data->DIODE_MASK = NCT6106_DIODE_MASK;
3340                 data->REG_VIN = NCT6106_REG_IN;
3341                 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3342                 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3343                 data->REG_TARGET = NCT6106_REG_TARGET;
3344                 data->REG_FAN = NCT6106_REG_FAN;
3345                 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
3346                 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
3347                 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
3348                 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
3349                 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
3350                 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
3351                 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
3352                 data->REG_PWM[0] = NCT6106_REG_PWM;
3353                 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
3354                 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
3355                 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3356                 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3357                 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3358                 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3359                 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3360                 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
3361                 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
3362                 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
3363                 data->REG_CRITICAL_TEMP_TOLERANCE
3364                   = NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
3365                 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
3366                 data->CRITICAL_PWM_ENABLE_MASK
3367                   = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3368                 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
3369                 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3370                 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3371                 data->REG_TEMP_SEL = NCT6106_REG_TEMP_SEL;
3372                 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3373                 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3374                 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3375                 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3376                 data->REG_ALARM = NCT6106_REG_ALARM;
3377                 data->ALARM_BITS = NCT6106_ALARM_BITS;
3378                 data->REG_BEEP = NCT6106_REG_BEEP;
3379                 data->BEEP_BITS = NCT6106_BEEP_BITS;
3380
3381                 reg_temp = NCT6106_REG_TEMP;
3382                 reg_temp_mon = NCT6106_REG_TEMP_MON;
3383                 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3384                 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON);
3385                 reg_temp_over = NCT6106_REG_TEMP_OVER;
3386                 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3387                 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3388                 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3389                 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3390                 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3391                 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3392
3393                 break;
3394         case nct6775:
3395                 data->in_num = 9;
3396                 data->pwm_num = 3;
3397                 data->auto_pwm_num = 6;
3398                 data->has_fan_div = true;
3399                 data->temp_fixed_num = 3;
3400                 data->num_temp_alarms = 3;
3401                 data->num_temp_beeps = 3;
3402
3403                 data->ALARM_BITS = NCT6775_ALARM_BITS;
3404                 data->BEEP_BITS = NCT6775_BEEP_BITS;
3405
3406                 data->fan_from_reg = fan_from_reg16;
3407                 data->fan_from_reg_min = fan_from_reg8;
3408                 data->target_temp_mask = 0x7f;
3409                 data->tolerance_mask = 0x0f;
3410                 data->speed_tolerance_limit = 15;
3411
3412                 data->temp_label = nct6775_temp_label;
3413                 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
3414
3415                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3416                 data->REG_VBAT = NCT6775_REG_VBAT;
3417                 data->REG_DIODE = NCT6775_REG_DIODE;
3418                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3419                 data->REG_VIN = NCT6775_REG_IN;
3420                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3421                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3422                 data->REG_TARGET = NCT6775_REG_TARGET;
3423                 data->REG_FAN = NCT6775_REG_FAN;
3424                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3425                 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3426                 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3427                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3428                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3429                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3430                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3431                 data->REG_PWM[0] = NCT6775_REG_PWM;
3432                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3433                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3434                 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3435                 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3436                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3437                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3438                 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3439                 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3440                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3441                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3442                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3443                 data->REG_CRITICAL_TEMP_TOLERANCE
3444                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3445                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3446                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3447                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3448                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3449                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3450                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3451                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3452                 data->REG_ALARM = NCT6775_REG_ALARM;
3453                 data->REG_BEEP = NCT6775_REG_BEEP;
3454
3455                 reg_temp = NCT6775_REG_TEMP;
3456                 reg_temp_mon = NCT6775_REG_TEMP_MON;
3457                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3458                 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3459                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3460                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3461                 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3462                 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3463                 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3464
3465                 break;
3466         case nct6776:
3467                 data->in_num = 9;
3468                 data->pwm_num = 3;
3469                 data->auto_pwm_num = 4;
3470                 data->has_fan_div = false;
3471                 data->temp_fixed_num = 3;
3472                 data->num_temp_alarms = 3;
3473                 data->num_temp_beeps = 6;
3474
3475                 data->ALARM_BITS = NCT6776_ALARM_BITS;
3476                 data->BEEP_BITS = NCT6776_BEEP_BITS;
3477
3478                 data->fan_from_reg = fan_from_reg13;
3479                 data->fan_from_reg_min = fan_from_reg13;
3480                 data->target_temp_mask = 0xff;
3481                 data->tolerance_mask = 0x07;
3482                 data->speed_tolerance_limit = 63;
3483
3484                 data->temp_label = nct6776_temp_label;
3485                 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3486
3487                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3488                 data->REG_VBAT = NCT6775_REG_VBAT;
3489                 data->REG_DIODE = NCT6775_REG_DIODE;
3490                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3491                 data->REG_VIN = NCT6775_REG_IN;
3492                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3493                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3494                 data->REG_TARGET = NCT6775_REG_TARGET;
3495                 data->REG_FAN = NCT6775_REG_FAN;
3496                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3497                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3498                 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3499                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3500                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3501                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3502                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3503                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3504                 data->REG_PWM[0] = NCT6775_REG_PWM;
3505                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3506                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3507                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3508                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3509                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3510                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3511                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3512                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3513                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3514                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3515                 data->REG_CRITICAL_TEMP_TOLERANCE
3516                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3517                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3518                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3519                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3520                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3521                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3522                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3523                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3524                 data->REG_ALARM = NCT6775_REG_ALARM;
3525                 data->REG_BEEP = NCT6776_REG_BEEP;
3526
3527                 reg_temp = NCT6775_REG_TEMP;
3528                 reg_temp_mon = NCT6775_REG_TEMP_MON;
3529                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3530                 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3531                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3532                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3533                 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3534                 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3535                 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3536
3537                 break;
3538         case nct6779:
3539                 data->in_num = 15;
3540                 data->pwm_num = 5;
3541                 data->auto_pwm_num = 4;
3542                 data->has_fan_div = false;
3543                 data->temp_fixed_num = 6;
3544                 data->num_temp_alarms = 2;
3545                 data->num_temp_beeps = 2;
3546
3547                 data->ALARM_BITS = NCT6779_ALARM_BITS;
3548                 data->BEEP_BITS = NCT6779_BEEP_BITS;
3549
3550                 data->fan_from_reg = fan_from_reg13;
3551                 data->fan_from_reg_min = fan_from_reg13;
3552                 data->target_temp_mask = 0xff;
3553                 data->tolerance_mask = 0x07;
3554                 data->speed_tolerance_limit = 63;
3555
3556                 data->temp_label = nct6779_temp_label;
3557                 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3558
3559                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3560                 data->REG_VBAT = NCT6775_REG_VBAT;
3561                 data->REG_DIODE = NCT6775_REG_DIODE;
3562                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3563                 data->REG_VIN = NCT6779_REG_IN;
3564                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3565                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3566                 data->REG_TARGET = NCT6775_REG_TARGET;
3567                 data->REG_FAN = NCT6779_REG_FAN;
3568                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3569                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3570                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3571                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3572                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3573                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3574                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3575                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3576                 data->REG_PWM[0] = NCT6775_REG_PWM;
3577                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3578                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3579                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3580                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3581                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3582                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3583                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3584                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3585                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3586                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3587                 data->REG_CRITICAL_TEMP_TOLERANCE
3588                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3589                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3590                 data->CRITICAL_PWM_ENABLE_MASK
3591                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3592                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3593                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3594                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3595                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3596                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3597                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3598                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3599                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3600                 data->REG_ALARM = NCT6779_REG_ALARM;
3601                 data->REG_BEEP = NCT6776_REG_BEEP;
3602
3603                 reg_temp = NCT6779_REG_TEMP;
3604                 reg_temp_mon = NCT6779_REG_TEMP_MON;
3605                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3606                 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3607                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3608                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3609                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3610                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3611                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3612
3613                 break;
3614         case nct6791:
3615         case nct6792:
3616                 data->in_num = 15;
3617                 data->pwm_num = 6;
3618                 data->auto_pwm_num = 4;
3619                 data->has_fan_div = false;
3620                 data->temp_fixed_num = 6;
3621                 data->num_temp_alarms = 2;
3622                 data->num_temp_beeps = 2;
3623
3624                 data->ALARM_BITS = NCT6791_ALARM_BITS;
3625                 data->BEEP_BITS = NCT6779_BEEP_BITS;
3626
3627                 data->fan_from_reg = fan_from_reg13;
3628                 data->fan_from_reg_min = fan_from_reg13;
3629                 data->target_temp_mask = 0xff;
3630                 data->tolerance_mask = 0x07;
3631                 data->speed_tolerance_limit = 63;
3632
3633                 data->temp_label = nct6779_temp_label;
3634                 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3635
3636                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3637                 data->REG_VBAT = NCT6775_REG_VBAT;
3638                 data->REG_DIODE = NCT6775_REG_DIODE;
3639                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3640                 data->REG_VIN = NCT6779_REG_IN;
3641                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3642                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3643                 data->REG_TARGET = NCT6775_REG_TARGET;
3644                 data->REG_FAN = NCT6779_REG_FAN;
3645                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3646                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3647                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3648                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3649                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3650                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3651                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3652                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3653                 data->REG_PWM[0] = NCT6775_REG_PWM;
3654                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3655                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3656                 data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP;
3657                 data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE;
3658                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3659                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3660                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3661                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3662                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3663                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3664                 data->REG_CRITICAL_TEMP_TOLERANCE
3665                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3666                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3667                 data->CRITICAL_PWM_ENABLE_MASK
3668                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3669                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3670                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3671                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3672                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3673                 data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL;
3674                 data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP;
3675                 data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL;
3676                 data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE;
3677                 data->REG_ALARM = NCT6791_REG_ALARM;
3678                 data->REG_BEEP = NCT6776_REG_BEEP;
3679
3680                 reg_temp = NCT6779_REG_TEMP;
3681                 reg_temp_mon = NCT6779_REG_TEMP_MON;
3682                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3683                 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3684                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3685                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3686                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3687                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3688                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3689
3690                 break;
3691         default:
3692                 return -ENODEV;
3693         }
3694         data->have_in = (1 << data->in_num) - 1;
3695         data->have_temp = 0;
3696
3697         /*
3698          * On some boards, not all available temperature sources are monitored,
3699          * even though some of the monitoring registers are unused.
3700          * Get list of unused monitoring registers, then detect if any fan
3701          * controls are configured to use unmonitored temperature sources.
3702          * If so, assign the unmonitored temperature sources to available
3703          * monitoring registers.
3704          */
3705         mask = 0;
3706         available = 0;
3707         for (i = 0; i < num_reg_temp; i++) {
3708                 if (reg_temp[i] == 0)
3709                         continue;
3710
3711                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3712                 if (!src || (mask & (1 << src)))
3713                         available |= 1 << i;
3714
3715                 mask |= 1 << src;
3716         }
3717
3718         /*
3719          * Now find unmonitored temperature registers and enable monitoring
3720          * if additional monitoring registers are available.
3721          */
3722         add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
3723         add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
3724
3725         mask = 0;
3726         s = NUM_TEMP_FIXED;     /* First dynamic temperature attribute */
3727         for (i = 0; i < num_reg_temp; i++) {
3728                 if (reg_temp[i] == 0)
3729                         continue;
3730
3731                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3732                 if (!src || (mask & (1 << src)))
3733                         continue;
3734
3735                 if (src >= data->temp_label_num ||
3736                     !strlen(data->temp_label[src])) {
3737                         dev_info(dev,
3738                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3739                                  src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
3740                         continue;
3741                 }
3742
3743                 mask |= 1 << src;
3744
3745                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3746                 if (src <= data->temp_fixed_num) {
3747                         data->have_temp |= 1 << (src - 1);
3748                         data->have_temp_fixed |= 1 << (src - 1);
3749                         data->reg_temp[0][src - 1] = reg_temp[i];
3750                         data->reg_temp[1][src - 1] = reg_temp_over[i];
3751                         data->reg_temp[2][src - 1] = reg_temp_hyst[i];
3752                         if (reg_temp_crit_h && reg_temp_crit_h[i])
3753                                 data->reg_temp[3][src - 1] = reg_temp_crit_h[i];
3754                         else if (reg_temp_crit[src - 1])
3755                                 data->reg_temp[3][src - 1]
3756                                   = reg_temp_crit[src - 1];
3757                         if (reg_temp_crit_l && reg_temp_crit_l[i])
3758                                 data->reg_temp[4][src - 1] = reg_temp_crit_l[i];
3759                         data->reg_temp_config[src - 1] = reg_temp_config[i];
3760                         data->temp_src[src - 1] = src;
3761                         continue;
3762                 }
3763
3764                 if (s >= NUM_TEMP)
3765                         continue;
3766
3767                 /* Use dynamic index for other sources */
3768                 data->have_temp |= 1 << s;
3769                 data->reg_temp[0][s] = reg_temp[i];
3770                 data->reg_temp[1][s] = reg_temp_over[i];
3771                 data->reg_temp[2][s] = reg_temp_hyst[i];
3772                 data->reg_temp_config[s] = reg_temp_config[i];
3773                 if (reg_temp_crit_h && reg_temp_crit_h[i])
3774                         data->reg_temp[3][s] = reg_temp_crit_h[i];
3775                 else if (reg_temp_crit[src - 1])
3776                         data->reg_temp[3][s] = reg_temp_crit[src - 1];
3777                 if (reg_temp_crit_l && reg_temp_crit_l[i])
3778                         data->reg_temp[4][s] = reg_temp_crit_l[i];
3779
3780                 data->temp_src[s] = src;
3781                 s++;
3782         }
3783
3784         /*
3785          * Repeat with temperatures used for fan control.
3786          * This set of registers does not support limits.
3787          */
3788         for (i = 0; i < num_reg_temp_mon; i++) {
3789                 if (reg_temp_mon[i] == 0)
3790                         continue;
3791
3792                 src = nct6775_read_value(data, data->REG_TEMP_SEL[i]) & 0x1f;
3793                 if (!src || (mask & (1 << src)))
3794                         continue;
3795
3796                 if (src >= data->temp_label_num ||
3797                     !strlen(data->temp_label[src])) {
3798                         dev_info(dev,
3799                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3800                                  src, i, data->REG_TEMP_SEL[i],
3801                                  reg_temp_mon[i]);
3802                         continue;
3803                 }
3804
3805                 mask |= 1 << src;
3806
3807                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3808                 if (src <= data->temp_fixed_num) {
3809                         if (data->have_temp & (1 << (src - 1)))
3810                                 continue;
3811                         data->have_temp |= 1 << (src - 1);
3812                         data->have_temp_fixed |= 1 << (src - 1);
3813                         data->reg_temp[0][src - 1] = reg_temp_mon[i];
3814                         data->temp_src[src - 1] = src;
3815                         continue;
3816                 }
3817
3818                 if (s >= NUM_TEMP)
3819                         continue;
3820
3821                 /* Use dynamic index for other sources */
3822                 data->have_temp |= 1 << s;
3823                 data->reg_temp[0][s] = reg_temp_mon[i];
3824                 data->temp_src[s] = src;
3825                 s++;
3826         }
3827
3828 #ifdef USE_ALTERNATE
3829         /*
3830          * Go through the list of alternate temp registers and enable
3831          * if possible.
3832          * The temperature is already monitored if the respective bit in <mask>
3833          * is set.
3834          */
3835         for (i = 0; i < data->temp_label_num - 1; i++) {
3836                 if (!reg_temp_alternate[i])
3837                         continue;
3838                 if (mask & (1 << (i + 1)))
3839                         continue;
3840                 if (i < data->temp_fixed_num) {
3841                         if (data->have_temp & (1 << i))
3842                                 continue;
3843                         data->have_temp |= 1 << i;
3844                         data->have_temp_fixed |= 1 << i;
3845                         data->reg_temp[0][i] = reg_temp_alternate[i];
3846                         if (i < num_reg_temp) {
3847                                 data->reg_temp[1][i] = reg_temp_over[i];
3848                                 data->reg_temp[2][i] = reg_temp_hyst[i];
3849                         }
3850                         data->temp_src[i] = i + 1;
3851                         continue;
3852                 }
3853
3854                 if (s >= NUM_TEMP)      /* Abort if no more space */
3855                         break;
3856
3857                 data->have_temp |= 1 << s;
3858                 data->reg_temp[0][s] = reg_temp_alternate[i];
3859                 data->temp_src[s] = i + 1;
3860                 s++;
3861         }
3862 #endif /* USE_ALTERNATE */
3863
3864         /* Initialize the chip */
3865         nct6775_init_device(data);
3866
3867         err = superio_enter(sio_data->sioreg);
3868         if (err)
3869                 return err;
3870
3871         cr2a = superio_inb(sio_data->sioreg, 0x2a);
3872         switch (data->kind) {
3873         case nct6775:
3874                 data->have_vid = (cr2a & 0x40);
3875                 break;
3876         case nct6776:
3877                 data->have_vid = (cr2a & 0x60) == 0x40;
3878                 break;
3879         case nct6106:
3880         case nct6779:
3881         case nct6791:
3882         case nct6792:
3883                 break;
3884         }
3885
3886         /*
3887          * Read VID value
3888          * We can get the VID input values directly at logical device D 0xe3.
3889          */
3890         if (data->have_vid) {
3891                 superio_select(sio_data->sioreg, NCT6775_LD_VID);
3892                 data->vid = superio_inb(sio_data->sioreg, 0xe3);
3893                 data->vrm = vid_which_vrm();
3894         }
3895
3896         if (fan_debounce) {
3897                 u8 tmp;
3898
3899                 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3900                 tmp = superio_inb(sio_data->sioreg,
3901                                   NCT6775_REG_CR_FAN_DEBOUNCE);
3902                 switch (data->kind) {
3903                 case nct6106:
3904                         tmp |= 0xe0;
3905                         break;
3906                 case nct6775:
3907                         tmp |= 0x1e;
3908                         break;
3909                 case nct6776:
3910                 case nct6779:
3911                         tmp |= 0x3e;
3912                         break;
3913                 case nct6791:
3914                 case nct6792:
3915                         tmp |= 0x7e;
3916                         break;
3917                 }
3918                 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
3919                              tmp);
3920                 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
3921                          data->name);
3922         }
3923
3924         nct6775_check_fan_inputs(data);
3925
3926         superio_exit(sio_data->sioreg);
3927
3928         /* Read fan clock dividers immediately */
3929         nct6775_init_fan_common(dev, data);
3930
3931         /* Register sysfs hooks */
3932         group = nct6775_create_attr_group(dev, &nct6775_pwm_template_group,
3933                                           data->pwm_num);
3934         if (IS_ERR(group))
3935                 return PTR_ERR(group);
3936
3937         data->groups[data->num_attr_groups++] = group;
3938
3939         group = nct6775_create_attr_group(dev, &nct6775_in_template_group,
3940                                           fls(data->have_in));
3941         if (IS_ERR(group))
3942                 return PTR_ERR(group);
3943
3944         data->groups[data->num_attr_groups++] = group;
3945
3946         group = nct6775_create_attr_group(dev, &nct6775_fan_template_group,
3947                                           fls(data->has_fan));
3948         if (IS_ERR(group))
3949                 return PTR_ERR(group);
3950
3951         data->groups[data->num_attr_groups++] = group;
3952
3953         group = nct6775_create_attr_group(dev, &nct6775_temp_template_group,
3954                                           fls(data->have_temp));
3955         if (IS_ERR(group))
3956                 return PTR_ERR(group);
3957
3958         data->groups[data->num_attr_groups++] = group;
3959         data->groups[data->num_attr_groups++] = &nct6775_group_other;
3960
3961 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
3962         err = sysfs_create_groups(&dev->kobj, data->groups);
3963         if (err < 0)
3964                 return err;
3965         hwmon_dev = hwmon_device_register(dev);
3966         if (IS_ERR(hwmon_dev)) {
3967                 sysfs_remove_groups(&dev->kobj, data->groups);
3968                 return PTR_ERR(hwmon_dev);
3969         }
3970         data->hwmon_dev = hwmon_dev;
3971 #else
3972         hwmon_dev = devm_hwmon_device_register_with_groups(dev, data->name,
3973                                                            data, data->groups);
3974 #endif
3975         return PTR_ERR_OR_ZERO(hwmon_dev);
3976 }
3977
3978 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
3979 static int nct6775_remove(struct platform_device *pdev)
3980 {
3981         struct nct6775_data *data = platform_get_drvdata(pdev);
3982
3983         hwmon_device_unregister(data->hwmon_dev);
3984         sysfs_remove_groups(&pdev->dev.kobj, data->groups);
3985         return 0;
3986 }
3987 #endif
3988
3989 static void nct6791_enable_io_mapping(int sioaddr)
3990 {
3991         int val;
3992
3993         val = superio_inb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE);
3994         if (val & 0x10) {
3995                 pr_info("Enabling hardware monitor logical device mappings.\n");
3996                 superio_outb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE,
3997                              val & ~0x10);
3998         }
3999 }
4000
4001 #ifdef CONFIG_PM
4002 static int nct6775_suspend(struct device *dev)
4003 {
4004         struct nct6775_data *data = nct6775_update_device(dev);
4005
4006         mutex_lock(&data->update_lock);
4007         data->vbat = nct6775_read_value(data, data->REG_VBAT);
4008         if (data->kind == nct6775) {
4009                 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
4010                 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
4011         }
4012         mutex_unlock(&data->update_lock);
4013
4014         return 0;
4015 }
4016
4017 static int nct6775_resume(struct device *dev)
4018 {
4019         struct nct6775_data *data = dev_get_drvdata(dev);
4020         int i, j, err = 0;
4021
4022         mutex_lock(&data->update_lock);
4023         data->bank = 0xff;              /* Force initial bank selection */
4024
4025         if (data->kind == nct6791 || data->kind == nct6792) {
4026                 err = superio_enter(data->sioreg);
4027                 if (err)
4028                         goto abort;
4029
4030                 nct6791_enable_io_mapping(data->sioreg);
4031                 superio_exit(data->sioreg);
4032         }
4033
4034         /* Restore limits */
4035         for (i = 0; i < data->in_num; i++) {
4036                 if (!(data->have_in & (1 << i)))
4037                         continue;
4038
4039                 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
4040                                     data->in[i][1]);
4041                 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
4042                                     data->in[i][2]);
4043         }
4044
4045         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
4046                 if (!(data->has_fan_min & (1 << i)))
4047                         continue;
4048
4049                 nct6775_write_value(data, data->REG_FAN_MIN[i],
4050                                     data->fan_min[i]);
4051         }
4052
4053         for (i = 0; i < NUM_TEMP; i++) {
4054                 if (!(data->have_temp & (1 << i)))
4055                         continue;
4056
4057                 for (j = 1; j < ARRAY_SIZE(data->reg_temp); j++)
4058                         if (data->reg_temp[j][i])
4059                                 nct6775_write_temp(data, data->reg_temp[j][i],
4060                                                    data->temp[j][i]);
4061         }
4062
4063         /* Restore other settings */
4064         nct6775_write_value(data, data->REG_VBAT, data->vbat);
4065         if (data->kind == nct6775) {
4066                 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
4067                 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
4068         }
4069
4070 abort:
4071         /* Force re-reading all values */
4072         data->valid = false;
4073         mutex_unlock(&data->update_lock);
4074
4075         return err;
4076 }
4077
4078 static const struct dev_pm_ops nct6775_dev_pm_ops = {
4079         .suspend = nct6775_suspend,
4080         .resume = nct6775_resume,
4081         .freeze = nct6775_suspend,
4082         .restore = nct6775_resume,
4083 };
4084
4085 #define NCT6775_DEV_PM_OPS      (&nct6775_dev_pm_ops)
4086 #else
4087 #define NCT6775_DEV_PM_OPS      NULL
4088 #endif /* CONFIG_PM */
4089
4090 static struct platform_driver nct6775_driver = {
4091         .driver = {
4092                 .owner  = THIS_MODULE,
4093                 .name   = DRVNAME,
4094                 .pm     = NCT6775_DEV_PM_OPS,
4095         },
4096         .probe          = nct6775_probe,
4097 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4098         .remove         = nct6775_remove,
4099 #endif
4100 };
4101
4102 static const char * const nct6775_sio_names[] __initconst = {
4103         "NCT6106D",
4104         "NCT6775F",
4105         "NCT6776D/F",
4106         "NCT6779D",
4107         "NCT6791D",
4108         "NCT6792D",
4109 };
4110
4111 /* nct6775_find() looks for a '627 in the Super-I/O config space */
4112 static int __init nct6775_find(int sioaddr, struct nct6775_sio_data *sio_data)
4113 {
4114         u16 val;
4115         int err;
4116         int addr;
4117
4118         err = superio_enter(sioaddr);
4119         if (err)
4120                 return err;
4121
4122         if (force_id)
4123                 val = force_id;
4124         else
4125                 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
4126                     | superio_inb(sioaddr, SIO_REG_DEVID + 1);
4127         switch (val & SIO_ID_MASK) {
4128         case SIO_NCT6106_ID:
4129                 sio_data->kind = nct6106;
4130                 break;
4131         case SIO_NCT6775_ID:
4132                 sio_data->kind = nct6775;
4133                 break;
4134         case SIO_NCT6776_ID:
4135                 sio_data->kind = nct6776;
4136                 break;
4137         case SIO_NCT6779_ID:
4138                 sio_data->kind = nct6779;
4139                 break;
4140         case SIO_NCT6791_ID:
4141                 sio_data->kind = nct6791;
4142                 break;
4143         case SIO_NCT6792_ID:
4144                 sio_data->kind = nct6792;
4145                 break;
4146         default:
4147                 if (val != 0xffff)
4148                         pr_debug("unsupported chip ID: 0x%04x\n", val);
4149                 superio_exit(sioaddr);
4150                 return -ENODEV;
4151         }
4152
4153         /* We have a known chip, find the HWM I/O address */
4154         superio_select(sioaddr, NCT6775_LD_HWM);
4155         val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
4156             | superio_inb(sioaddr, SIO_REG_ADDR + 1);
4157         addr = val & IOREGION_ALIGNMENT;
4158         if (addr == 0) {
4159                 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
4160                 superio_exit(sioaddr);
4161                 return -ENODEV;
4162         }
4163
4164         /* Activate logical device if needed */
4165         val = superio_inb(sioaddr, SIO_REG_ENABLE);
4166         if (!(val & 0x01)) {
4167                 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
4168                 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
4169         }
4170
4171         if (sio_data->kind == nct6791 || sio_data->kind == nct6792)
4172                 nct6791_enable_io_mapping(sioaddr);
4173
4174         superio_exit(sioaddr);
4175         pr_info("Found %s or compatible chip at %#x:%#x\n",
4176                 nct6775_sio_names[sio_data->kind], sioaddr, addr);
4177         sio_data->sioreg = sioaddr;
4178
4179         return addr;
4180 }
4181
4182 /*
4183  * when Super-I/O functions move to a separate file, the Super-I/O
4184  * bus will manage the lifetime of the device and this module will only keep
4185  * track of the nct6775 driver. But since we use platform_device_alloc(), we
4186  * must keep track of the device
4187  */
4188 static struct platform_device *pdev[2];
4189
4190 static int __init sensors_nct6775_init(void)
4191 {
4192         int i, err;
4193         bool found = false;
4194         int address;
4195         struct resource res;
4196         struct nct6775_sio_data sio_data;
4197         int sioaddr[2] = { 0x2e, 0x4e };
4198
4199         err = platform_driver_register(&nct6775_driver);
4200         if (err)
4201                 return err;
4202
4203         /*
4204          * initialize sio_data->kind and sio_data->sioreg.
4205          *
4206          * when Super-I/O functions move to a separate file, the Super-I/O
4207          * driver will probe 0x2e and 0x4e and auto-detect the presence of a
4208          * nct6775 hardware monitor, and call probe()
4209          */
4210         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4211                 address = nct6775_find(sioaddr[i], &sio_data);
4212                 if (address <= 0)
4213                         continue;
4214
4215                 found = true;
4216
4217                 pdev[i] = platform_device_alloc(DRVNAME, address);
4218                 if (!pdev[i]) {
4219                         err = -ENOMEM;
4220                         goto exit_device_put;
4221                 }
4222
4223                 err = platform_device_add_data(pdev[i], &sio_data,
4224                                                sizeof(struct nct6775_sio_data));
4225                 if (err)
4226                         goto exit_device_put;
4227
4228                 memset(&res, 0, sizeof(res));
4229                 res.name = DRVNAME;
4230                 res.start = address + IOREGION_OFFSET;
4231                 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
4232                 res.flags = IORESOURCE_IO;
4233
4234                 err = acpi_check_resource_conflict(&res);
4235                 if (err) {
4236                         platform_device_put(pdev[i]);
4237                         pdev[i] = NULL;
4238                         continue;
4239                 }
4240
4241                 err = platform_device_add_resources(pdev[i], &res, 1);
4242                 if (err)
4243                         goto exit_device_put;
4244
4245                 /* platform_device_add calls probe() */
4246                 err = platform_device_add(pdev[i]);
4247                 if (err)
4248                         goto exit_device_put;
4249         }
4250         if (!found) {
4251                 err = -ENODEV;
4252                 goto exit_unregister;
4253         }
4254
4255         return 0;
4256
4257 exit_device_put:
4258         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4259                 if (pdev[i])
4260                         platform_device_put(pdev[i]);
4261         }
4262 exit_unregister:
4263         platform_driver_unregister(&nct6775_driver);
4264         return err;
4265 }
4266
4267 static void __exit sensors_nct6775_exit(void)
4268 {
4269         int i;
4270
4271         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4272                 if (pdev[i])
4273                         platform_device_unregister(pdev[i]);
4274         }
4275         platform_driver_unregister(&nct6775_driver);
4276 }
4277
4278 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4279 MODULE_DESCRIPTION("NCT6775F/NCT6776F/NCT6779D driver");
4280 MODULE_LICENSE("GPL");
4281
4282 module_init(sensors_nct6775_init);
4283 module_exit(sensors_nct6775_exit);