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nct6775: Use clamp_val instead of SENSORS_LIMIT
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1 /*
2  * nct6775 - Driver for the hardware monitoring functionality of
3  *             Nuvoton NCT677x Super-I/O chips
4  *
5  * Copyright (C) 2012  Guenter Roeck <linux@roeck-us.net>
6  *
7  * Derived from w83627ehf driver
8  * Copyright (C) 2005-2012  Jean Delvare <khali@linux-fr.org>
9  * Copyright (C) 2006  Yuan Mu (Winbond),
10  *                     Rudolf Marek <r.marek@assembler.cz>
11  *                     David Hubbard <david.c.hubbard@gmail.com>
12  *                     Daniel J Blueman <daniel.blueman@gmail.com>
13  * Copyright (C) 2010  Sheng-Yuan Huang (Nuvoton) (PS00)
14  *
15  * Shamelessly ripped from the w83627hf driver
16  * Copyright (C) 2003  Mark Studebaker
17  *
18  * This program is free software; you can redistribute it and/or modify
19  * it under the terms of the GNU General Public License as published by
20  * the Free Software Foundation; either version 2 of the License, or
21  * (at your option) any later version.
22  *
23  * This program is distributed in the hope that it will be useful,
24  * but WITHOUT ANY WARRANTY; without even the implied warranty of
25  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
26  * GNU General Public License for more details.
27  *
28  * You should have received a copy of the GNU General Public License
29  * along with this program; if not, write to the Free Software
30  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
31  *
32  *
33  * Supports the following chips:
34  *
35  * Chip        #vin    #fan    #pwm    #temp  chip IDs       man ID
36  * nct6775f     9      4       3       6+3    0xb470 0xc1    0x5ca3
37  * nct6776f     9      5       3       6+3    0xc330 0xc1    0x5ca3
38  * nct6779d    15      5       5       2+6    0xc560 0xc1    0x5ca3
39  *
40  * #temp lists the number of monitored temperature sources (first value) plus
41  * the number of directly connectable temperature sensors (second value).
42  */
43
44 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
45
46 #include <linux/module.h>
47 #include <linux/init.h>
48 #include <linux/slab.h>
49 #include <linux/jiffies.h>
50 #include <linux/platform_device.h>
51 #include <linux/hwmon.h>
52 #include <linux/hwmon-sysfs.h>
53 #include <linux/hwmon-vid.h>
54 #include <linux/err.h>
55 #include <linux/mutex.h>
56 #include <linux/acpi.h>
57 #include <linux/io.h>
58 #include "lm75.h"
59 #include "compat.h"
60
61 #define USE_ALTERNATE
62
63 enum kinds { nct6775, nct6776, nct6779 };
64
65 /* used to set data->name = nct6775_device_names[data->sio_kind] */
66 static const char * const nct6775_device_names[] = {
67         "nct6775",
68         "nct6776",
69         "nct6779",
70 };
71
72 static unsigned short force_id;
73 module_param(force_id, ushort, 0);
74 MODULE_PARM_DESC(force_id, "Override the detected device ID");
75
76 static unsigned short fan_debounce;
77 module_param(fan_debounce, ushort, 0);
78 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
79
80 #define DRVNAME "nct6775"
81
82 /*
83  * Super-I/O constants and functions
84  */
85
86 #define NCT6775_LD_ACPI         0x0a
87 #define NCT6775_LD_HWM          0x0b
88 #define NCT6775_LD_VID          0x0d
89
90 #define SIO_REG_LDSEL           0x07    /* Logical device select */
91 #define SIO_REG_DEVID           0x20    /* Device ID (2 bytes) */
92 #define SIO_REG_ENABLE          0x30    /* Logical device enable */
93 #define SIO_REG_ADDR            0x60    /* Logical device address (2 bytes) */
94
95 #define SIO_NCT6775_ID          0xb470
96 #define SIO_NCT6776_ID          0xc330
97 #define SIO_NCT6779_ID          0xc560
98 #define SIO_ID_MASK             0xFFF0
99
100 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
101
102 static inline void
103 superio_outb(int ioreg, int reg, int val)
104 {
105         outb(reg, ioreg);
106         outb(val, ioreg + 1);
107 }
108
109 static inline int
110 superio_inb(int ioreg, int reg)
111 {
112         outb(reg, ioreg);
113         return inb(ioreg + 1);
114 }
115
116 static inline void
117 superio_select(int ioreg, int ld)
118 {
119         outb(SIO_REG_LDSEL, ioreg);
120         outb(ld, ioreg + 1);
121 }
122
123 static inline int
124 superio_enter(int ioreg)
125 {
126         /*
127          * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
128          */
129         if (!request_muxed_region(ioreg, 2, DRVNAME))
130                 return -EBUSY;
131
132         outb(0x87, ioreg);
133         outb(0x87, ioreg);
134
135         return 0;
136 }
137
138 static inline void
139 superio_exit(int ioreg)
140 {
141         outb(0xaa, ioreg);
142         outb(0x02, ioreg);
143         outb(0x02, ioreg + 1);
144         release_region(ioreg, 2);
145 }
146
147 /*
148  * ISA constants
149  */
150
151 #define IOREGION_ALIGNMENT      (~7)
152 #define IOREGION_OFFSET         5
153 #define IOREGION_LENGTH         2
154 #define ADDR_REG_OFFSET         0
155 #define DATA_REG_OFFSET         1
156
157 #define NCT6775_REG_BANK        0x4E
158 #define NCT6775_REG_CONFIG      0x40
159
160 /*
161  * Not currently used:
162  * REG_MAN_ID has the value 0x5ca3 for all supported chips.
163  * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
164  * REG_MAN_ID is at port 0x4f
165  * REG_CHIP_ID is at port 0x58
166  */
167
168 #define NUM_TEMP        10      /* Max number of temp attribute sets w/ limits*/
169 #define NUM_TEMP_FIXED  6       /* Max number of fixed temp attribute sets */
170
171 #define NUM_REG_ALARM   4       /* Max number of alarm registers */
172
173 /* Common and NCT6775 specific data */
174
175 /* Voltage min/max registers for nr=7..14 are in bank 5 */
176
177 static const u16 NCT6775_REG_IN_MAX[] = {
178         0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
179         0x55c, 0x55e, 0x560, 0x562 };
180 static const u16 NCT6775_REG_IN_MIN[] = {
181         0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
182         0x55d, 0x55f, 0x561, 0x563 };
183 static const u16 NCT6775_REG_IN[] = {
184         0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
185 };
186
187 #define NCT6775_REG_VBAT                0x5D
188 #define NCT6775_REG_DIODE               0x5E
189
190 #define NCT6775_REG_FANDIV1             0x506
191 #define NCT6775_REG_FANDIV2             0x507
192
193 #define NCT6775_REG_CR_FAN_DEBOUNCE     0xf0
194
195 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
196
197 /* 0..15 voltages, 16..23 fans, 24..31 temperatures */
198
199 static const s8 NCT6775_ALARM_BITS[] = {
200         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
201         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
202         -1,                             /* unused */
203         6, 7, 11, 10, 23,               /* fan1..fan5 */
204         -1, -1, -1,                     /* unused */
205         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
206         12, -1 };                       /* intrusion0, intrusion1 */
207
208 #define FAN_ALARM_BASE          16
209 #define TEMP_ALARM_BASE         24
210 #define INTRUSION_ALARM_BASE    30
211
212 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
213 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
214
215 /* DC or PWM output fan configuration */
216 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
217 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
218
219 /* Advanced Fan control, some values are common for all fans */
220
221 static const u16 NCT6775_REG_TARGET[] = { 0x101, 0x201, 0x301, 0x801, 0x901 };
222 static const u16 NCT6775_REG_FAN_MODE[] = { 0x102, 0x202, 0x302, 0x802, 0x902 };
223 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
224         0x103, 0x203, 0x303, 0x803, 0x903 };
225 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
226         0x104, 0x204, 0x304, 0x804, 0x904 };
227 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
228         0x105, 0x205, 0x305, 0x805, 0x905 };
229 static const u16 NCT6775_REG_FAN_START_OUTPUT[]
230         = { 0x106, 0x206, 0x306, 0x806, 0x906 };
231 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
232 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
233
234 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
235         0x107, 0x207, 0x307, 0x807, 0x907 };
236 static const u16 NCT6775_REG_PWM[] = { 0x109, 0x209, 0x309, 0x809, 0x909 };
237 static const u16 NCT6775_REG_PWM_READ[] = { 0x01, 0x03, 0x11, 0x13, 0x15 };
238
239 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
240 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
241 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
242
243 static const u16 NCT6775_REG_TEMP[] = {
244         0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
245
246 static const u16 NCT6775_REG_TEMP_CONFIG[] = {
247         0, 0x152, 0x252, 0x628, 0x629, 0x62A };
248 static const u16 NCT6775_REG_TEMP_HYST[] = {
249         0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
250 static const u16 NCT6775_REG_TEMP_OVER[] = {
251         0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
252
253 static const u16 NCT6775_REG_TEMP_SOURCE[] = {
254         0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
255
256 static const u16 NCT6775_REG_TEMP_SEL[] = {
257         0x100, 0x200, 0x300, 0x800, 0x900 };
258
259 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
260         0x139, 0x239, 0x339, 0x839, 0x939 };
261 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
262         0x13a, 0x23a, 0x33a, 0x83a, 0x93a };
263 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
264         0x13b, 0x23b, 0x33b, 0x83b, 0x93b };
265 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
266         0x13c, 0x23c, 0x33c, 0x83c, 0x93c };
267 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
268         0x13d, 0x23d, 0x33d, 0x83d, 0x93d };
269
270 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
271
272 static const u16 NCT6775_REG_AUTO_TEMP[] = {
273         0x121, 0x221, 0x321, 0x821, 0x921 };
274 static const u16 NCT6775_REG_AUTO_PWM[] = {
275         0x127, 0x227, 0x327, 0x827, 0x927 };
276
277 #define NCT6775_AUTO_TEMP(data, nr, p)  ((data)->REG_AUTO_TEMP[nr] + (p))
278 #define NCT6775_AUTO_PWM(data, nr, p)   ((data)->REG_AUTO_PWM[nr] + (p))
279
280 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
281
282 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
283         0x135, 0x235, 0x335, 0x835, 0x935 };
284 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
285         0x138, 0x238, 0x338, 0x838, 0x938 };
286
287 static const char *const nct6775_temp_label[] = {
288         "",
289         "SYSTIN",
290         "CPUTIN",
291         "AUXTIN",
292         "AMD SB-TSI",
293         "PECI Agent 0",
294         "PECI Agent 1",
295         "PECI Agent 2",
296         "PECI Agent 3",
297         "PECI Agent 4",
298         "PECI Agent 5",
299         "PECI Agent 6",
300         "PECI Agent 7",
301         "PCH_CHIP_CPU_MAX_TEMP",
302         "PCH_CHIP_TEMP",
303         "PCH_CPU_TEMP",
304         "PCH_MCH_TEMP",
305         "PCH_DIM0_TEMP",
306         "PCH_DIM1_TEMP",
307         "PCH_DIM2_TEMP",
308         "PCH_DIM3_TEMP"
309 };
310
311 static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
312         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
313
314 static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
315         = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
316             0xa07 };
317
318 /* NCT6776 specific data */
319
320 static const s8 NCT6776_ALARM_BITS[] = {
321         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
322         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
323         -1,                             /* unused */
324         6, 7, 11, 10, 23,               /* fan1..fan5 */
325         -1, -1, -1,                     /* unused */
326         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
327         12, 9 };                        /* intrusion0, intrusion1 */
328
329 static const u16 NCT6776_REG_TOLERANCE_H[] = {
330         0x10c, 0x20c, 0x30c, 0x80c, 0x90c };
331
332 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0 };
333 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0 };
334
335 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
336 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
337
338 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
339         0x13e, 0x23e, 0x33e, 0x83e, 0x93e };
340
341 static const u16 NCT6776_REG_TEMP_CONFIG[11] = {
342         0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
343
344 static const char *const nct6776_temp_label[] = {
345         "",
346         "SYSTIN",
347         "CPUTIN",
348         "AUXTIN",
349         "SMBUSMASTER 0",
350         "SMBUSMASTER 1",
351         "SMBUSMASTER 2",
352         "SMBUSMASTER 3",
353         "SMBUSMASTER 4",
354         "SMBUSMASTER 5",
355         "SMBUSMASTER 6",
356         "SMBUSMASTER 7",
357         "PECI Agent 0",
358         "PECI Agent 1",
359         "PCH_CHIP_CPU_MAX_TEMP",
360         "PCH_CHIP_TEMP",
361         "PCH_CPU_TEMP",
362         "PCH_MCH_TEMP",
363         "PCH_DIM0_TEMP",
364         "PCH_DIM1_TEMP",
365         "PCH_DIM2_TEMP",
366         "PCH_DIM3_TEMP",
367         "BYTE_TEMP"
368 };
369
370 static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
371         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
372
373 static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
374         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
375
376 /* NCT6779 specific data */
377
378 static const u16 NCT6779_REG_IN[] = {
379         0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
380         0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
381
382 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
383         0x459, 0x45A, 0x45B, 0x568 };
384
385 static const s8 NCT6779_ALARM_BITS[] = {
386         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
387         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
388         -1,                             /* unused */
389         6, 7, 11, 10, 23,               /* fan1..fan5 */
390         -1, -1, -1,                     /* unused */
391         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
392         12, 9 };                        /* intrusion0, intrusion1 */
393
394 static const u16 NCT6779_REG_FAN[] = { 0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8 };
395 static const u16 NCT6779_REG_FAN_PULSES[] = {
396         0x644, 0x645, 0x646, 0x647, 0x648 };
397
398 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
399         0x136, 0x236, 0x336, 0x836, 0x936 };
400 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
401         0x137, 0x237, 0x337, 0x837, 0x937 };
402
403 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
404 static const u16 NCT6779_REG_TEMP_HYST[] = { 0x3a, 0x153, 0, 0, 0, 0 };
405 static const u16 NCT6779_REG_TEMP_OVER[] = { 0x39, 0x155, 0, 0, 0, 0 };
406 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
407         0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
408
409 static const u16 NCT6779_REG_TEMP_CONFIG[11] = { 0x18, 0x152 };
410
411 static const char *const nct6779_temp_label[] = {
412         "",
413         "SYSTIN",
414         "CPUTIN",
415         "AUXTIN0",
416         "AUXTIN1",
417         "AUXTIN2",
418         "AUXTIN3",
419         "",
420         "SMBUSMASTER 0",
421         "SMBUSMASTER 1",
422         "SMBUSMASTER 2",
423         "SMBUSMASTER 3",
424         "SMBUSMASTER 4",
425         "SMBUSMASTER 5",
426         "SMBUSMASTER 6",
427         "SMBUSMASTER 7",
428         "PECI Agent 0",
429         "PECI Agent 1",
430         "PCH_CHIP_CPU_MAX_TEMP",
431         "PCH_CHIP_TEMP",
432         "PCH_CPU_TEMP",
433         "PCH_MCH_TEMP",
434         "PCH_DIM0_TEMP",
435         "PCH_DIM1_TEMP",
436         "PCH_DIM2_TEMP",
437         "PCH_DIM3_TEMP",
438         "BYTE_TEMP"
439 };
440
441 static const u16 NCT6779_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6779_temp_label) - 1]
442         = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
443             0, 0, 0, 0, 0, 0, 0, 0,
444             0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
445             0x408, 0 };
446
447 static const u16 NCT6779_REG_TEMP_CRIT[ARRAY_SIZE(nct6779_temp_label) - 1]
448         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
449
450 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
451 {
452         if (mode == 0 && pwm == 255)
453                 return off;
454         return mode + 1;
455 }
456
457 static int pwm_enable_to_reg(enum pwm_enable mode)
458 {
459         if (mode == off)
460                 return 0;
461         return mode - 1;
462 }
463
464 /*
465  * Conversions
466  */
467
468 /* 1 is DC mode, output in ms */
469 static unsigned int step_time_from_reg(u8 reg, u8 mode)
470 {
471         return mode ? 400 * reg : 100 * reg;
472 }
473
474 static u8 step_time_to_reg(unsigned int msec, u8 mode)
475 {
476         return clamp_val((mode ? (msec + 200) / 400 :
477                                         (msec + 50) / 100), 1, 255);
478 }
479
480 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
481 {
482         if (reg == 0 || reg == 255)
483                 return 0;
484         return 1350000U / (reg << divreg);
485 }
486
487 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
488 {
489         if ((reg & 0xff1f) == 0xff1f)
490                 return 0;
491
492         reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
493
494         if (reg == 0)
495                 return 0;
496
497         return 1350000U / reg;
498 }
499
500 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
501 {
502         if (reg == 0 || reg == 0xffff)
503                 return 0;
504
505         /*
506          * Even though the registers are 16 bit wide, the fan divisor
507          * still applies.
508          */
509         return 1350000U / (reg << divreg);
510 }
511
512 static u16 fan_to_reg(u32 fan, unsigned int divreg)
513 {
514         if (!fan)
515                 return 0;
516
517         return (1350000U / fan) >> divreg;
518 }
519
520 static inline unsigned int
521 div_from_reg(u8 reg)
522 {
523         return 1 << reg;
524 }
525
526 /*
527  * Some of the voltage inputs have internal scaling, the tables below
528  * contain 8 (the ADC LSB in mV) * scaling factor * 100
529  */
530 static const u16 scale_in[15] = {
531         800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
532         800, 800
533 };
534
535 static inline long in_from_reg(u8 reg, u8 nr)
536 {
537         return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
538 }
539
540 static inline u8 in_to_reg(u32 val, u8 nr)
541 {
542         return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
543 }
544
545 /*
546  * Data structures and manipulation thereof
547  */
548
549 struct nct6775_data {
550         int addr;       /* IO base of hw monitor block */
551         enum kinds kind;
552         const char *name;
553
554         struct device *hwmon_dev;
555         struct mutex lock;
556
557         u16 reg_temp[4][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
558                                     * 3=temp_crit
559                                     */
560         u8 temp_src[NUM_TEMP];
561         u16 reg_temp_config[NUM_TEMP];
562         const char * const *temp_label;
563         int temp_label_num;
564
565         u16 REG_CONFIG;
566         u16 REG_VBAT;
567         u16 REG_DIODE;
568
569         const s8 *ALARM_BITS;
570
571         const u16 *REG_VIN;
572         const u16 *REG_IN_MINMAX[2];
573
574         const u16 *REG_TARGET;
575         const u16 *REG_FAN;
576         const u16 *REG_FAN_MODE;
577         const u16 *REG_FAN_MIN;
578         const u16 *REG_FAN_PULSES;
579         const u16 *REG_FAN_TIME[3];
580
581         const u16 *REG_TOLERANCE_H;
582
583         const u8 *REG_PWM_MODE;
584         const u8 *PWM_MODE_MASK;
585
586         const u16 *REG_PWM[7];  /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
587                                  * [3]=pwm_max, [4]=pwm_step,
588                                  * [5]=weight_duty_step, [6]=weight_duty_base
589                                  */
590         const u16 *REG_PWM_READ;
591
592         const u16 *REG_AUTO_TEMP;
593         const u16 *REG_AUTO_PWM;
594
595         const u16 *REG_CRITICAL_TEMP;
596         const u16 *REG_CRITICAL_TEMP_TOLERANCE;
597
598         const u16 *REG_TEMP_SOURCE;     /* temp register sources */
599         const u16 *REG_TEMP_SEL;
600         const u16 *REG_WEIGHT_TEMP_SEL;
601         const u16 *REG_WEIGHT_TEMP[3];  /* 0=base, 1=tolerance, 2=step */
602
603         const u16 *REG_TEMP_OFFSET;
604
605         const u16 *REG_ALARM;
606
607         unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
608         unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
609
610         struct mutex update_lock;
611         bool valid;             /* true if following fields are valid */
612         unsigned long last_updated;     /* In jiffies */
613
614         /* Register values */
615         u8 bank;                /* current register bank */
616         u8 in_num;              /* number of in inputs we have */
617         u8 in[15][3];           /* [0]=in, [1]=in_max, [2]=in_min */
618         unsigned int rpm[5];
619         u16 fan_min[5];
620         u8 fan_pulses[5];
621         u8 fan_div[5];
622         u8 has_pwm;
623         u8 has_fan;             /* some fan inputs can be disabled */
624         u8 has_fan_min;         /* some fans don't have min register */
625         bool has_fan_div;
626
627         u8 temp_fixed_num;      /* 3 or 6 */
628         u8 temp_type[NUM_TEMP_FIXED];
629         s8 temp_offset[NUM_TEMP_FIXED];
630         s16 temp[4][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
631                                 * 3=temp_crit */
632         u64 alarms;
633
634         u8 pwm_num;     /* number of pwm */
635         u8 pwm_mode[5]; /* 1->DC variable voltage, 0->PWM variable duty cycle */
636         enum pwm_enable pwm_enable[5];
637                         /* 0->off
638                          * 1->manual
639                          * 2->thermal cruise mode (also called SmartFan I)
640                          * 3->fan speed cruise mode
641                          * 4->SmartFan III
642                          * 5->enhanced variable thermal cruise (SmartFan IV)
643                          */
644         u8 pwm[7][5];   /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
645                          * [3]=pwm_max, [4]=pwm_step,
646                          * [5]=weight_duty_step, [6]=weight_duty_base
647                          */
648
649         u8 target_temp[5];
650         u8 target_temp_mask;
651         u32 target_speed[5];
652         u32 target_speed_tolerance[5];
653         u8 speed_tolerance_limit;
654
655         u8 temp_tolerance[2][5];
656         u8 tolerance_mask;
657
658         u8 fan_time[3][5]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
659
660         /* Automatic fan speed control registers */
661         int auto_pwm_num;
662         u8 auto_pwm[5][7];
663         u8 auto_temp[5][7];
664         u8 pwm_temp_sel[5];
665         u8 pwm_weight_temp_sel[5];
666         u8 weight_temp[3][5];   /* 0->temp_step, 1->temp_step_tol,
667                                  * 2->temp_base
668                                  */
669
670         u8 vid;
671         u8 vrm;
672
673         u16 have_temp;
674         u16 have_temp_fixed;
675         u16 have_in;
676 #ifdef CONFIG_PM
677         /* Remember extra register values over suspend/resume */
678         u8 vbat;
679         u8 fandiv1;
680         u8 fandiv2;
681 #endif
682 };
683
684 struct nct6775_sio_data {
685         int sioreg;
686         enum kinds kind;
687 };
688
689 static bool is_word_sized(struct nct6775_data *data, u16 reg)
690 {
691         switch (data->kind) {
692         case nct6775:
693                 return (((reg & 0xff00) == 0x100 ||
694                     (reg & 0xff00) == 0x200) &&
695                    ((reg & 0x00ff) == 0x50 ||
696                     (reg & 0x00ff) == 0x53 ||
697                     (reg & 0x00ff) == 0x55)) ||
698                   (reg & 0xfff0) == 0x630 ||
699                   reg == 0x640 || reg == 0x642 ||
700                   reg == 0x662 ||
701                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
702                   reg == 0x73 || reg == 0x75 || reg == 0x77;
703         case nct6776:
704                 return (((reg & 0xff00) == 0x100 ||
705                     (reg & 0xff00) == 0x200) &&
706                    ((reg & 0x00ff) == 0x50 ||
707                     (reg & 0x00ff) == 0x53 ||
708                     (reg & 0x00ff) == 0x55)) ||
709                   (reg & 0xfff0) == 0x630 ||
710                   reg == 0x402 ||
711                   reg == 0x640 || reg == 0x642 ||
712                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
713                   reg == 0x73 || reg == 0x75 || reg == 0x77;
714         case nct6779:
715                 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
716                   ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x09) ||
717                   reg == 0x402 ||
718                   reg == 0x63a || reg == 0x63c || reg == 0x63e ||
719                   reg == 0x640 || reg == 0x642 ||
720                   reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
721                   reg == 0x7b;
722         }
723         return false;
724 }
725
726 /*
727  * On older chips, only registers 0x50-0x5f are banked.
728  * On more recent chips, all registers are banked.
729  * Assume that is the case and set the bank number for each access.
730  * Cache the bank number so it only needs to be set if it changes.
731  */
732 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
733 {
734         u8 bank = reg >> 8;
735         if (data->bank != bank) {
736                 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
737                 outb_p(bank, data->addr + DATA_REG_OFFSET);
738                 data->bank = bank;
739         }
740 }
741
742 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
743 {
744         int res, word_sized = is_word_sized(data, reg);
745
746         mutex_lock(&data->lock);
747
748         nct6775_set_bank(data, reg);
749         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
750         res = inb_p(data->addr + DATA_REG_OFFSET);
751         if (word_sized) {
752                 outb_p((reg & 0xff) + 1,
753                        data->addr + ADDR_REG_OFFSET);
754                 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
755         }
756
757         mutex_unlock(&data->lock);
758         return res;
759 }
760
761 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
762 {
763         int word_sized = is_word_sized(data, reg);
764
765         mutex_lock(&data->lock);
766
767         nct6775_set_bank(data, reg);
768         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
769         if (word_sized) {
770                 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
771                 outb_p((reg & 0xff) + 1,
772                        data->addr + ADDR_REG_OFFSET);
773         }
774         outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
775
776         mutex_unlock(&data->lock);
777         return 0;
778 }
779
780 /* We left-align 8-bit temperature values to make the code simpler */
781 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
782 {
783         u16 res;
784
785         res = nct6775_read_value(data, reg);
786         if (!is_word_sized(data, reg))
787                 res <<= 8;
788
789         return res;
790 }
791
792 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
793 {
794         if (!is_word_sized(data, reg))
795                 value >>= 8;
796         return nct6775_write_value(data, reg, value);
797 }
798
799 /* This function assumes that the caller holds data->update_lock */
800 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
801 {
802         u8 reg;
803
804         switch (nr) {
805         case 0:
806                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
807                     | (data->fan_div[0] & 0x7);
808                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
809                 break;
810         case 1:
811                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
812                     | ((data->fan_div[1] << 4) & 0x70);
813                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
814                 break;
815         case 2:
816                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
817                     | (data->fan_div[2] & 0x7);
818                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
819                 break;
820         case 3:
821                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
822                     | ((data->fan_div[3] << 4) & 0x70);
823                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
824                 break;
825         }
826 }
827
828 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
829 {
830         if (data->kind == nct6775)
831                 nct6775_write_fan_div(data, nr);
832 }
833
834 static void nct6775_update_fan_div(struct nct6775_data *data)
835 {
836         u8 i;
837
838         i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
839         data->fan_div[0] = i & 0x7;
840         data->fan_div[1] = (i & 0x70) >> 4;
841         i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
842         data->fan_div[2] = i & 0x7;
843         if (data->has_fan & (1<<3))
844                 data->fan_div[3] = (i & 0x70) >> 4;
845 }
846
847 static void nct6775_update_fan_div_common(struct nct6775_data *data)
848 {
849         if (data->kind == nct6775)
850                 nct6775_update_fan_div(data);
851 }
852
853 static void nct6775_init_fan_div(struct nct6775_data *data)
854 {
855         int i;
856
857         nct6775_update_fan_div_common(data);
858         /*
859          * For all fans, start with highest divider value if the divider
860          * register is not initialized. This ensures that we get a
861          * reading from the fan count register, even if it is not optimal.
862          * We'll compute a better divider later on.
863          */
864         for (i = 0; i < 3; i++) {
865                 if (!(data->has_fan & (1 << i)))
866                         continue;
867                 if (data->fan_div[i] == 0) {
868                         data->fan_div[i] = 7;
869                         nct6775_write_fan_div_common(data, i);
870                 }
871         }
872 }
873
874 static void nct6775_init_fan_common(struct device *dev,
875                                     struct nct6775_data *data)
876 {
877         int i;
878         u8 reg;
879
880         if (data->has_fan_div)
881                 nct6775_init_fan_div(data);
882
883         /*
884          * If fan_min is not set (0), set it to 0xff to disable it. This
885          * prevents the unnecessary warning when fanX_min is reported as 0.
886          */
887         for (i = 0; i < 5; i++) {
888                 if (data->has_fan_min & (1 << i)) {
889                         reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
890                         if (!reg)
891                                 nct6775_write_value(data, data->REG_FAN_MIN[i],
892                                                     data->has_fan_div ? 0xff
893                                                                       : 0xff1f);
894                 }
895         }
896 }
897
898 static void nct6775_select_fan_div(struct device *dev,
899                                    struct nct6775_data *data, int nr, u16 reg)
900 {
901         u8 fan_div = data->fan_div[nr];
902         u16 fan_min;
903
904         if (!data->has_fan_div)
905                 return;
906
907         /*
908          * If we failed to measure the fan speed, or the reported value is not
909          * in the optimal range, and the clock divider can be modified,
910          * let's try that for next time.
911          */
912         if (reg == 0x00 && fan_div < 0x07)
913                 fan_div++;
914         else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
915                 fan_div--;
916
917         if (fan_div != data->fan_div[nr]) {
918                 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
919                         nr + 1, div_from_reg(data->fan_div[nr]),
920                         div_from_reg(fan_div));
921
922                 /* Preserve min limit if possible */
923                 if (data->has_fan_min & (1 << nr)) {
924                         fan_min = data->fan_min[nr];
925                         if (fan_div > data->fan_div[nr]) {
926                                 if (fan_min != 255 && fan_min > 1)
927                                         fan_min >>= 1;
928                         } else {
929                                 if (fan_min != 255) {
930                                         fan_min <<= 1;
931                                         if (fan_min > 254)
932                                                 fan_min = 254;
933                                 }
934                         }
935                         if (fan_min != data->fan_min[nr]) {
936                                 data->fan_min[nr] = fan_min;
937                                 nct6775_write_value(data, data->REG_FAN_MIN[nr],
938                                                     fan_min);
939                         }
940                 }
941                 data->fan_div[nr] = fan_div;
942                 nct6775_write_fan_div_common(data, nr);
943         }
944 }
945
946 static void nct6775_update_pwm(struct device *dev)
947 {
948         struct nct6775_data *data = dev_get_drvdata(dev);
949         int i, j;
950         int fanmodecfg, reg;
951         bool duty_is_dc;
952
953         for (i = 0; i < data->pwm_num; i++) {
954                 if (!(data->has_pwm & (1 << i)))
955                         continue;
956
957                 duty_is_dc = data->REG_PWM_MODE[i] &&
958                   (nct6775_read_value(data, data->REG_PWM_MODE[i])
959                    & data->PWM_MODE_MASK[i]);
960                 data->pwm_mode[i] = duty_is_dc;
961
962                 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
963                 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
964                         if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
965                                 data->pwm[j][i]
966                                   = nct6775_read_value(data,
967                                                        data->REG_PWM[j][i]);
968                         }
969                 }
970
971                 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
972                                                         (fanmodecfg >> 4) & 7);
973
974                 if (!data->temp_tolerance[0][i] ||
975                     data->pwm_enable[i] != speed_cruise)
976                         data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
977                 if (!data->target_speed_tolerance[i] ||
978                     data->pwm_enable[i] == speed_cruise) {
979                         u8 t = fanmodecfg & 0x0f;
980                         if (data->REG_TOLERANCE_H) {
981                                 t |= (nct6775_read_value(data,
982                                       data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
983                         }
984                         data->target_speed_tolerance[i] = t;
985                 }
986
987                 data->temp_tolerance[1][i] =
988                         nct6775_read_value(data,
989                                         data->REG_CRITICAL_TEMP_TOLERANCE[i]);
990
991                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
992                 data->pwm_temp_sel[i] = reg & 0x1f;
993                 /* If fan can stop, report floor as 0 */
994                 if (reg & 0x80)
995                         data->pwm[2][i] = 0;
996
997                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
998                 data->pwm_weight_temp_sel[i] = reg & 0x1f;
999                 /* If weight is disabled, report weight source as 0 */
1000                 if (j == 1 && !(reg & 0x80))
1001                         data->pwm_weight_temp_sel[i] = 0;
1002
1003                 /* Weight temp data */
1004                 for (j = 0; j < 3; j++) {
1005                         data->weight_temp[j][i]
1006                           = nct6775_read_value(data,
1007                                                data->REG_WEIGHT_TEMP[j][i]);
1008                 }
1009         }
1010 }
1011
1012 static void nct6775_update_pwm_limits(struct device *dev)
1013 {
1014         struct nct6775_data *data = dev_get_drvdata(dev);
1015         int i, j;
1016         u8 reg;
1017         u16 reg_t;
1018
1019         for (i = 0; i < data->pwm_num; i++) {
1020                 if (!(data->has_pwm & (1 << i)))
1021                         continue;
1022
1023                 for (j = 0; j < 3; j++) {
1024                         data->fan_time[j][i] =
1025                           nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1026                 }
1027
1028                 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1029                 /* Update only in matching mode or if never updated */
1030                 if (!data->target_temp[i] ||
1031                     data->pwm_enable[i] == thermal_cruise)
1032                         data->target_temp[i] = reg_t & data->target_temp_mask;
1033                 if (!data->target_speed[i] ||
1034                     data->pwm_enable[i] == speed_cruise) {
1035                         if (data->REG_TOLERANCE_H) {
1036                                 reg_t |= (nct6775_read_value(data,
1037                                         data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1038                         }
1039                         data->target_speed[i] = reg_t;
1040                 }
1041
1042                 for (j = 0; j < data->auto_pwm_num; j++) {
1043                         data->auto_pwm[i][j] =
1044                           nct6775_read_value(data,
1045                                              NCT6775_AUTO_PWM(data, i, j));
1046                         data->auto_temp[i][j] =
1047                           nct6775_read_value(data,
1048                                              NCT6775_AUTO_TEMP(data, i, j));
1049                 }
1050
1051                 /* critical auto_pwm temperature data */
1052                 data->auto_temp[i][data->auto_pwm_num] =
1053                         nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1054
1055                 switch (data->kind) {
1056                 case nct6775:
1057                         reg = nct6775_read_value(data,
1058                                                  NCT6775_REG_CRITICAL_ENAB[i]);
1059                         data->auto_pwm[i][data->auto_pwm_num] =
1060                                                 (reg & 0x02) ? 0xff : 0x00;
1061                         break;
1062                 case nct6776:
1063                         data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1064                         break;
1065                 case nct6779:
1066                         reg = nct6775_read_value(data,
1067                                         NCT6779_REG_CRITICAL_PWM_ENABLE[i]);
1068                         if (reg & 1)
1069                                 data->auto_pwm[i][data->auto_pwm_num] =
1070                                   nct6775_read_value(data,
1071                                         NCT6779_REG_CRITICAL_PWM[i]);
1072                         else
1073                                 data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1074                         break;
1075                 }
1076         }
1077 }
1078
1079 static struct nct6775_data *nct6775_update_device(struct device *dev)
1080 {
1081         struct nct6775_data *data = dev_get_drvdata(dev);
1082         int i, j;
1083
1084         mutex_lock(&data->update_lock);
1085
1086         if (time_after(jiffies, data->last_updated + HZ + HZ/2)
1087             || !data->valid) {
1088                 /* Fan clock dividers */
1089                 nct6775_update_fan_div_common(data);
1090
1091                 /* Measured voltages and limits */
1092                 for (i = 0; i < data->in_num; i++) {
1093                         if (!(data->have_in & (1 << i)))
1094                                 continue;
1095
1096                         data->in[i][0] = nct6775_read_value(data,
1097                                                             data->REG_VIN[i]);
1098                         data->in[i][1] = nct6775_read_value(data,
1099                                           data->REG_IN_MINMAX[0][i]);
1100                         data->in[i][2] = nct6775_read_value(data,
1101                                           data->REG_IN_MINMAX[1][i]);
1102                 }
1103
1104                 /* Measured fan speeds and limits */
1105                 for (i = 0; i < 5; i++) {
1106                         u16 reg;
1107
1108                         if (!(data->has_fan & (1 << i)))
1109                                 continue;
1110
1111                         reg = nct6775_read_value(data, data->REG_FAN[i]);
1112                         data->rpm[i] = data->fan_from_reg(reg,
1113                                                           data->fan_div[i]);
1114
1115                         if (data->has_fan_min & (1 << i))
1116                                 data->fan_min[i] = nct6775_read_value(data,
1117                                            data->REG_FAN_MIN[i]);
1118                         data->fan_pulses[i] =
1119                           nct6775_read_value(data, data->REG_FAN_PULSES[i]);
1120
1121                         nct6775_select_fan_div(dev, data, i, reg);
1122                 }
1123
1124                 nct6775_update_pwm(dev);
1125                 nct6775_update_pwm_limits(dev);
1126
1127                 /* Measured temperatures and limits */
1128                 for (i = 0; i < NUM_TEMP; i++) {
1129                         if (!(data->have_temp & (1 << i)))
1130                                 continue;
1131                         for (j = 0; j < 4; j++) {
1132                                 if (data->reg_temp[j][i])
1133                                         data->temp[j][i]
1134                                           = nct6775_read_temp(data,
1135                                                 data->reg_temp[j][i]);
1136                         }
1137                         if (!(data->have_temp_fixed & (1 << i)))
1138                                 continue;
1139                         data->temp_offset[i]
1140                           = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1141                 }
1142
1143                 data->alarms = 0;
1144                 for (i = 0; i < NUM_REG_ALARM; i++) {
1145                         u8 alarm;
1146                         if (!data->REG_ALARM[i])
1147                                 continue;
1148                         alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1149                         data->alarms |= ((u64)alarm) << (i << 3);
1150                 }
1151
1152                 data->last_updated = jiffies;
1153                 data->valid = true;
1154         }
1155
1156         mutex_unlock(&data->update_lock);
1157         return data;
1158 }
1159
1160 /*
1161  * Sysfs callback functions
1162  */
1163 static ssize_t
1164 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1165 {
1166         struct nct6775_data *data = nct6775_update_device(dev);
1167         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1168         int nr = sattr->nr;
1169         int index = sattr->index;
1170         return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1171 }
1172
1173 static ssize_t
1174 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1175              size_t count)
1176 {
1177         struct nct6775_data *data = dev_get_drvdata(dev);
1178         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1179         int nr = sattr->nr;
1180         int index = sattr->index;
1181         unsigned long val;
1182         int err = kstrtoul(buf, 10, &val);
1183         if (err < 0)
1184                 return err;
1185         mutex_lock(&data->update_lock);
1186         data->in[nr][index] = in_to_reg(val, nr);
1187         nct6775_write_value(data, data->REG_IN_MINMAX[index-1][nr],
1188                             data->in[nr][index]);
1189         mutex_unlock(&data->update_lock);
1190         return count;
1191 }
1192
1193 static ssize_t
1194 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1195 {
1196         struct nct6775_data *data = nct6775_update_device(dev);
1197         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1198         int nr = data->ALARM_BITS[sattr->index];
1199         return sprintf(buf, "%u\n",
1200                        (unsigned int)((data->alarms >> nr) & 0x01));
1201 }
1202
1203 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in_reg, NULL, 0, 0);
1204 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in_reg, NULL, 1, 0);
1205 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in_reg, NULL, 2, 0);
1206 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in_reg, NULL, 3, 0);
1207 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in_reg, NULL, 4, 0);
1208 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in_reg, NULL, 5, 0);
1209 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in_reg, NULL, 6, 0);
1210 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in_reg, NULL, 7, 0);
1211 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in_reg, NULL, 8, 0);
1212 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in_reg, NULL, 9, 0);
1213 static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in_reg, NULL, 10, 0);
1214 static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in_reg, NULL, 11, 0);
1215 static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in_reg, NULL, 12, 0);
1216 static SENSOR_DEVICE_ATTR_2(in13_input, S_IRUGO, show_in_reg, NULL, 13, 0);
1217 static SENSOR_DEVICE_ATTR_2(in14_input, S_IRUGO, show_in_reg, NULL, 14, 0);
1218
1219 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
1220 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
1221 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
1222 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
1223 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 4);
1224 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 5);
1225 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 6);
1226 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 7);
1227 static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 8);
1228 static SENSOR_DEVICE_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 9);
1229 static SENSOR_DEVICE_ATTR(in10_alarm, S_IRUGO, show_alarm, NULL, 10);
1230 static SENSOR_DEVICE_ATTR(in11_alarm, S_IRUGO, show_alarm, NULL, 11);
1231 static SENSOR_DEVICE_ATTR(in12_alarm, S_IRUGO, show_alarm, NULL, 12);
1232 static SENSOR_DEVICE_ATTR(in13_alarm, S_IRUGO, show_alarm, NULL, 13);
1233 static SENSOR_DEVICE_ATTR(in14_alarm, S_IRUGO, show_alarm, NULL, 14);
1234
1235 static SENSOR_DEVICE_ATTR_2(in0_min, S_IWUSR | S_IRUGO, show_in_reg,
1236                             store_in_reg, 0, 1);
1237 static SENSOR_DEVICE_ATTR_2(in1_min, S_IWUSR | S_IRUGO, show_in_reg,
1238                             store_in_reg, 1, 1);
1239 static SENSOR_DEVICE_ATTR_2(in2_min, S_IWUSR | S_IRUGO, show_in_reg,
1240                             store_in_reg, 2, 1);
1241 static SENSOR_DEVICE_ATTR_2(in3_min, S_IWUSR | S_IRUGO, show_in_reg,
1242                             store_in_reg, 3, 1);
1243 static SENSOR_DEVICE_ATTR_2(in4_min, S_IWUSR | S_IRUGO, show_in_reg,
1244                             store_in_reg, 4, 1);
1245 static SENSOR_DEVICE_ATTR_2(in5_min, S_IWUSR | S_IRUGO, show_in_reg,
1246                             store_in_reg, 5, 1);
1247 static SENSOR_DEVICE_ATTR_2(in6_min, S_IWUSR | S_IRUGO, show_in_reg,
1248                             store_in_reg, 6, 1);
1249 static SENSOR_DEVICE_ATTR_2(in7_min, S_IWUSR | S_IRUGO, show_in_reg,
1250                             store_in_reg, 7, 1);
1251 static SENSOR_DEVICE_ATTR_2(in8_min, S_IWUSR | S_IRUGO, show_in_reg,
1252                             store_in_reg, 8, 1);
1253 static SENSOR_DEVICE_ATTR_2(in9_min, S_IWUSR | S_IRUGO, show_in_reg,
1254                             store_in_reg, 9, 1);
1255 static SENSOR_DEVICE_ATTR_2(in10_min, S_IWUSR | S_IRUGO, show_in_reg,
1256                             store_in_reg, 10, 1);
1257 static SENSOR_DEVICE_ATTR_2(in11_min, S_IWUSR | S_IRUGO, show_in_reg,
1258                             store_in_reg, 11, 1);
1259 static SENSOR_DEVICE_ATTR_2(in12_min, S_IWUSR | S_IRUGO, show_in_reg,
1260                             store_in_reg, 12, 1);
1261 static SENSOR_DEVICE_ATTR_2(in13_min, S_IWUSR | S_IRUGO, show_in_reg,
1262                             store_in_reg, 13, 1);
1263 static SENSOR_DEVICE_ATTR_2(in14_min, S_IWUSR | S_IRUGO, show_in_reg,
1264                             store_in_reg, 14, 1);
1265
1266 static SENSOR_DEVICE_ATTR_2(in0_max, S_IWUSR | S_IRUGO, show_in_reg,
1267                             store_in_reg, 0, 2);
1268 static SENSOR_DEVICE_ATTR_2(in1_max, S_IWUSR | S_IRUGO, show_in_reg,
1269                             store_in_reg, 1, 2);
1270 static SENSOR_DEVICE_ATTR_2(in2_max, S_IWUSR | S_IRUGO, show_in_reg,
1271                             store_in_reg, 2, 2);
1272 static SENSOR_DEVICE_ATTR_2(in3_max, S_IWUSR | S_IRUGO, show_in_reg,
1273                             store_in_reg, 3, 2);
1274 static SENSOR_DEVICE_ATTR_2(in4_max, S_IWUSR | S_IRUGO, show_in_reg,
1275                             store_in_reg, 4, 2);
1276 static SENSOR_DEVICE_ATTR_2(in5_max, S_IWUSR | S_IRUGO, show_in_reg,
1277                             store_in_reg, 5, 2);
1278 static SENSOR_DEVICE_ATTR_2(in6_max, S_IWUSR | S_IRUGO, show_in_reg,
1279                             store_in_reg, 6, 2);
1280 static SENSOR_DEVICE_ATTR_2(in7_max, S_IWUSR | S_IRUGO, show_in_reg,
1281                             store_in_reg, 7, 2);
1282 static SENSOR_DEVICE_ATTR_2(in8_max, S_IWUSR | S_IRUGO, show_in_reg,
1283                             store_in_reg, 8, 2);
1284 static SENSOR_DEVICE_ATTR_2(in9_max, S_IWUSR | S_IRUGO, show_in_reg,
1285                             store_in_reg, 9, 2);
1286 static SENSOR_DEVICE_ATTR_2(in10_max, S_IWUSR | S_IRUGO, show_in_reg,
1287                             store_in_reg, 10, 2);
1288 static SENSOR_DEVICE_ATTR_2(in11_max, S_IWUSR | S_IRUGO, show_in_reg,
1289                             store_in_reg, 11, 2);
1290 static SENSOR_DEVICE_ATTR_2(in12_max, S_IWUSR | S_IRUGO, show_in_reg,
1291                             store_in_reg, 12, 2);
1292 static SENSOR_DEVICE_ATTR_2(in13_max, S_IWUSR | S_IRUGO, show_in_reg,
1293                             store_in_reg, 13, 2);
1294 static SENSOR_DEVICE_ATTR_2(in14_max, S_IWUSR | S_IRUGO, show_in_reg,
1295                             store_in_reg, 14, 2);
1296
1297 static struct attribute *nct6775_attributes_in[15][5] = {
1298         {
1299                 &sensor_dev_attr_in0_input.dev_attr.attr,
1300                 &sensor_dev_attr_in0_min.dev_attr.attr,
1301                 &sensor_dev_attr_in0_max.dev_attr.attr,
1302                 &sensor_dev_attr_in0_alarm.dev_attr.attr,
1303                 NULL
1304         },
1305         {
1306                 &sensor_dev_attr_in1_input.dev_attr.attr,
1307                 &sensor_dev_attr_in1_min.dev_attr.attr,
1308                 &sensor_dev_attr_in1_max.dev_attr.attr,
1309                 &sensor_dev_attr_in1_alarm.dev_attr.attr,
1310                 NULL
1311         },
1312         {
1313                 &sensor_dev_attr_in2_input.dev_attr.attr,
1314                 &sensor_dev_attr_in2_min.dev_attr.attr,
1315                 &sensor_dev_attr_in2_max.dev_attr.attr,
1316                 &sensor_dev_attr_in2_alarm.dev_attr.attr,
1317                 NULL
1318         },
1319         {
1320                 &sensor_dev_attr_in3_input.dev_attr.attr,
1321                 &sensor_dev_attr_in3_min.dev_attr.attr,
1322                 &sensor_dev_attr_in3_max.dev_attr.attr,
1323                 &sensor_dev_attr_in3_alarm.dev_attr.attr,
1324                 NULL
1325         },
1326         {
1327                 &sensor_dev_attr_in4_input.dev_attr.attr,
1328                 &sensor_dev_attr_in4_min.dev_attr.attr,
1329                 &sensor_dev_attr_in4_max.dev_attr.attr,
1330                 &sensor_dev_attr_in4_alarm.dev_attr.attr,
1331                 NULL
1332         },
1333         {
1334                 &sensor_dev_attr_in5_input.dev_attr.attr,
1335                 &sensor_dev_attr_in5_min.dev_attr.attr,
1336                 &sensor_dev_attr_in5_max.dev_attr.attr,
1337                 &sensor_dev_attr_in5_alarm.dev_attr.attr,
1338                 NULL
1339         },
1340         {
1341                 &sensor_dev_attr_in6_input.dev_attr.attr,
1342                 &sensor_dev_attr_in6_min.dev_attr.attr,
1343                 &sensor_dev_attr_in6_max.dev_attr.attr,
1344                 &sensor_dev_attr_in6_alarm.dev_attr.attr,
1345                 NULL
1346         },
1347         {
1348                 &sensor_dev_attr_in7_input.dev_attr.attr,
1349                 &sensor_dev_attr_in7_min.dev_attr.attr,
1350                 &sensor_dev_attr_in7_max.dev_attr.attr,
1351                 &sensor_dev_attr_in7_alarm.dev_attr.attr,
1352                 NULL
1353         },
1354         {
1355                 &sensor_dev_attr_in8_input.dev_attr.attr,
1356                 &sensor_dev_attr_in8_min.dev_attr.attr,
1357                 &sensor_dev_attr_in8_max.dev_attr.attr,
1358                 &sensor_dev_attr_in8_alarm.dev_attr.attr,
1359                 NULL
1360         },
1361         {
1362                 &sensor_dev_attr_in9_input.dev_attr.attr,
1363                 &sensor_dev_attr_in9_min.dev_attr.attr,
1364                 &sensor_dev_attr_in9_max.dev_attr.attr,
1365                 &sensor_dev_attr_in9_alarm.dev_attr.attr,
1366                 NULL
1367         },
1368         {
1369                 &sensor_dev_attr_in10_input.dev_attr.attr,
1370                 &sensor_dev_attr_in10_min.dev_attr.attr,
1371                 &sensor_dev_attr_in10_max.dev_attr.attr,
1372                 &sensor_dev_attr_in10_alarm.dev_attr.attr,
1373                 NULL
1374         },
1375         {
1376                 &sensor_dev_attr_in11_input.dev_attr.attr,
1377                 &sensor_dev_attr_in11_min.dev_attr.attr,
1378                 &sensor_dev_attr_in11_max.dev_attr.attr,
1379                 &sensor_dev_attr_in11_alarm.dev_attr.attr,
1380                 NULL
1381         },
1382         {
1383                 &sensor_dev_attr_in12_input.dev_attr.attr,
1384                 &sensor_dev_attr_in12_min.dev_attr.attr,
1385                 &sensor_dev_attr_in12_max.dev_attr.attr,
1386                 &sensor_dev_attr_in12_alarm.dev_attr.attr,
1387                 NULL
1388         },
1389         {
1390                 &sensor_dev_attr_in13_input.dev_attr.attr,
1391                 &sensor_dev_attr_in13_min.dev_attr.attr,
1392                 &sensor_dev_attr_in13_max.dev_attr.attr,
1393                 &sensor_dev_attr_in13_alarm.dev_attr.attr,
1394                 NULL
1395         },
1396         {
1397                 &sensor_dev_attr_in14_input.dev_attr.attr,
1398                 &sensor_dev_attr_in14_min.dev_attr.attr,
1399                 &sensor_dev_attr_in14_max.dev_attr.attr,
1400                 &sensor_dev_attr_in14_alarm.dev_attr.attr,
1401                 NULL
1402         },
1403 };
1404
1405 static const struct attribute_group nct6775_group_in[15] = {
1406         { .attrs = nct6775_attributes_in[0] },
1407         { .attrs = nct6775_attributes_in[1] },
1408         { .attrs = nct6775_attributes_in[2] },
1409         { .attrs = nct6775_attributes_in[3] },
1410         { .attrs = nct6775_attributes_in[4] },
1411         { .attrs = nct6775_attributes_in[5] },
1412         { .attrs = nct6775_attributes_in[6] },
1413         { .attrs = nct6775_attributes_in[7] },
1414         { .attrs = nct6775_attributes_in[8] },
1415         { .attrs = nct6775_attributes_in[9] },
1416         { .attrs = nct6775_attributes_in[10] },
1417         { .attrs = nct6775_attributes_in[11] },
1418         { .attrs = nct6775_attributes_in[12] },
1419         { .attrs = nct6775_attributes_in[13] },
1420         { .attrs = nct6775_attributes_in[14] },
1421 };
1422
1423 static ssize_t
1424 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1425 {
1426         struct nct6775_data *data = nct6775_update_device(dev);
1427         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1428         int nr = sattr->index;
1429         return sprintf(buf, "%d\n", data->rpm[nr]);
1430 }
1431
1432 static ssize_t
1433 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1434 {
1435         struct nct6775_data *data = nct6775_update_device(dev);
1436         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1437         int nr = sattr->index;
1438         return sprintf(buf, "%d\n",
1439                        data->fan_from_reg_min(data->fan_min[nr],
1440                                               data->fan_div[nr]));
1441 }
1442
1443 static ssize_t
1444 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1445 {
1446         struct nct6775_data *data = nct6775_update_device(dev);
1447         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1448         int nr = sattr->index;
1449         return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1450 }
1451
1452 static ssize_t
1453 store_fan_min(struct device *dev, struct device_attribute *attr,
1454               const char *buf, size_t count)
1455 {
1456         struct nct6775_data *data = dev_get_drvdata(dev);
1457         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1458         int nr = sattr->index;
1459         unsigned long val;
1460         int err;
1461         unsigned int reg;
1462         u8 new_div;
1463
1464         err = kstrtoul(buf, 10, &val);
1465         if (err < 0)
1466                 return err;
1467
1468         mutex_lock(&data->update_lock);
1469         if (!data->has_fan_div) {
1470                 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1471                 if (!val) {
1472                         val = 0xff1f;
1473                 } else {
1474                         if (val > 1350000U)
1475                                 val = 135000U;
1476                         val = 1350000U / val;
1477                         val = (val & 0x1f) | ((val << 3) & 0xff00);
1478                 }
1479                 data->fan_min[nr] = val;
1480                 goto write_min; /* Leave fan divider alone */
1481         }
1482         if (!val) {
1483                 /* No min limit, alarm disabled */
1484                 data->fan_min[nr] = 255;
1485                 new_div = data->fan_div[nr]; /* No change */
1486                 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1487                 goto write_div;
1488         }
1489         reg = 1350000U / val;
1490         if (reg >= 128 * 255) {
1491                 /*
1492                  * Speed below this value cannot possibly be represented,
1493                  * even with the highest divider (128)
1494                  */
1495                 data->fan_min[nr] = 254;
1496                 new_div = 7; /* 128 == (1 << 7) */
1497                 dev_warn(dev,
1498                          "fan%u low limit %lu below minimum %u, set to minimum\n",
1499                          nr + 1, val, data->fan_from_reg_min(254, 7));
1500         } else if (!reg) {
1501                 /*
1502                  * Speed above this value cannot possibly be represented,
1503                  * even with the lowest divider (1)
1504                  */
1505                 data->fan_min[nr] = 1;
1506                 new_div = 0; /* 1 == (1 << 0) */
1507                 dev_warn(dev,
1508                          "fan%u low limit %lu above maximum %u, set to maximum\n",
1509                          nr + 1, val, data->fan_from_reg_min(1, 0));
1510         } else {
1511                 /*
1512                  * Automatically pick the best divider, i.e. the one such
1513                  * that the min limit will correspond to a register value
1514                  * in the 96..192 range
1515                  */
1516                 new_div = 0;
1517                 while (reg > 192 && new_div < 7) {
1518                         reg >>= 1;
1519                         new_div++;
1520                 }
1521                 data->fan_min[nr] = reg;
1522         }
1523
1524 write_div:
1525         /*
1526          * Write both the fan clock divider (if it changed) and the new
1527          * fan min (unconditionally)
1528          */
1529         if (new_div != data->fan_div[nr]) {
1530                 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1531                         nr + 1, div_from_reg(data->fan_div[nr]),
1532                         div_from_reg(new_div));
1533                 data->fan_div[nr] = new_div;
1534                 nct6775_write_fan_div_common(data, nr);
1535                 /* Give the chip time to sample a new speed value */
1536                 data->last_updated = jiffies;
1537         }
1538
1539 write_min:
1540         nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1541         mutex_unlock(&data->update_lock);
1542
1543         return count;
1544 }
1545
1546 static ssize_t
1547 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
1548 {
1549         struct nct6775_data *data = nct6775_update_device(dev);
1550         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1551         int p = data->fan_pulses[sattr->index];
1552
1553         return sprintf(buf, "%d\n", p ? : 4);
1554 }
1555
1556 static ssize_t
1557 store_fan_pulses(struct device *dev, struct device_attribute *attr,
1558                  const char *buf, size_t count)
1559 {
1560         struct nct6775_data *data = dev_get_drvdata(dev);
1561         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1562         int nr = sattr->index;
1563         unsigned long val;
1564         int err;
1565
1566         err = kstrtoul(buf, 10, &val);
1567         if (err < 0)
1568                 return err;
1569
1570         if (val > 4)
1571                 return -EINVAL;
1572
1573         mutex_lock(&data->update_lock);
1574         data->fan_pulses[nr] = val & 3;
1575         nct6775_write_value(data, data->REG_FAN_PULSES[nr], val & 3);
1576         mutex_unlock(&data->update_lock);
1577
1578         return count;
1579 }
1580
1581 static struct sensor_device_attribute sda_fan_input[] = {
1582         SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
1583         SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
1584         SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),
1585         SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3),
1586         SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4),
1587 };
1588
1589 static struct sensor_device_attribute sda_fan_alarm[] = {
1590         SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE),
1591         SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 1),
1592         SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 2),
1593         SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 3),
1594         SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 4),
1595 };
1596
1597 static struct sensor_device_attribute sda_fan_min[] = {
1598         SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min,
1599                     store_fan_min, 0),
1600         SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min,
1601                     store_fan_min, 1),
1602         SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, show_fan_min,
1603                     store_fan_min, 2),
1604         SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, show_fan_min,
1605                     store_fan_min, 3),
1606         SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, show_fan_min,
1607                     store_fan_min, 4),
1608 };
1609
1610 static struct sensor_device_attribute sda_fan_pulses[] = {
1611         SENSOR_ATTR(fan1_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1612                     store_fan_pulses, 0),
1613         SENSOR_ATTR(fan2_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1614                     store_fan_pulses, 1),
1615         SENSOR_ATTR(fan3_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1616                     store_fan_pulses, 2),
1617         SENSOR_ATTR(fan4_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1618                     store_fan_pulses, 3),
1619         SENSOR_ATTR(fan5_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1620                     store_fan_pulses, 4),
1621 };
1622
1623 static struct sensor_device_attribute sda_fan_div[] = {
1624         SENSOR_ATTR(fan1_div, S_IRUGO, show_fan_div, NULL, 0),
1625         SENSOR_ATTR(fan2_div, S_IRUGO, show_fan_div, NULL, 1),
1626         SENSOR_ATTR(fan3_div, S_IRUGO, show_fan_div, NULL, 2),
1627         SENSOR_ATTR(fan4_div, S_IRUGO, show_fan_div, NULL, 3),
1628         SENSOR_ATTR(fan5_div, S_IRUGO, show_fan_div, NULL, 4),
1629 };
1630
1631 static ssize_t
1632 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1633 {
1634         struct nct6775_data *data = nct6775_update_device(dev);
1635         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1636         int nr = sattr->index;
1637         return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1638 }
1639
1640 static ssize_t
1641 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1642 {
1643         struct nct6775_data *data = nct6775_update_device(dev);
1644         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1645         int nr = sattr->nr;
1646         int index = sattr->index;
1647
1648         return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
1649 }
1650
1651 static ssize_t
1652 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
1653            size_t count)
1654 {
1655         struct nct6775_data *data = dev_get_drvdata(dev);
1656         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1657         int nr = sattr->nr;
1658         int index = sattr->index;
1659         int err;
1660         long val;
1661
1662         err = kstrtol(buf, 10, &val);
1663         if (err < 0)
1664                 return err;
1665
1666         mutex_lock(&data->update_lock);
1667         data->temp[index][nr] = LM75_TEMP_TO_REG(val);
1668         nct6775_write_temp(data, data->reg_temp[index][nr],
1669                            data->temp[index][nr]);
1670         mutex_unlock(&data->update_lock);
1671         return count;
1672 }
1673
1674 static ssize_t
1675 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
1676 {
1677         struct nct6775_data *data = nct6775_update_device(dev);
1678         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1679
1680         return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
1681 }
1682
1683 static ssize_t
1684 store_temp_offset(struct device *dev, struct device_attribute *attr,
1685                   const char *buf, size_t count)
1686 {
1687         struct nct6775_data *data = dev_get_drvdata(dev);
1688         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1689         int nr = sattr->index;
1690         long val;
1691         int err;
1692
1693         err = kstrtol(buf, 10, &val);
1694         if (err < 0)
1695                 return err;
1696
1697         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
1698
1699         mutex_lock(&data->update_lock);
1700         data->temp_offset[nr] = val;
1701         nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
1702         mutex_unlock(&data->update_lock);
1703
1704         return count;
1705 }
1706
1707 static ssize_t
1708 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
1709 {
1710         struct nct6775_data *data = nct6775_update_device(dev);
1711         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1712         int nr = sattr->index;
1713         return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
1714 }
1715
1716 static ssize_t
1717 store_temp_type(struct device *dev, struct device_attribute *attr,
1718                 const char *buf, size_t count)
1719 {
1720         struct nct6775_data *data = nct6775_update_device(dev);
1721         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1722         int nr = sattr->index;
1723         unsigned long val;
1724         int err;
1725         u8 vbat, diode, bit;
1726
1727         err = kstrtoul(buf, 10, &val);
1728         if (err < 0)
1729                 return err;
1730
1731         if (val != 1 && val != 3 && val != 4)
1732                 return -EINVAL;
1733
1734         mutex_lock(&data->update_lock);
1735
1736         data->temp_type[nr] = val;
1737         vbat = nct6775_read_value(data, data->REG_VBAT) & ~(0x02 << nr);
1738         diode = nct6775_read_value(data, data->REG_DIODE) & ~(0x02 << nr);
1739         bit = 0x02 << nr;
1740         switch (val) {
1741         case 1: /* CPU diode (diode, current mode) */
1742                 vbat |= bit;
1743                 diode |= bit;
1744                 break;
1745         case 3: /* diode, voltage mode */
1746                 vbat |= bit;
1747                 break;
1748         case 4: /* thermistor */
1749                 break;
1750         };
1751         nct6775_write_value(data, data->REG_VBAT, vbat);
1752         nct6775_write_value(data, data->REG_DIODE, diode);
1753
1754         mutex_unlock(&data->update_lock);
1755         return count;
1756 }
1757
1758 static struct sensor_device_attribute_2 sda_temp_input[] = {
1759         SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0),
1760         SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0),
1761         SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0),
1762         SENSOR_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0),
1763         SENSOR_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0),
1764         SENSOR_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0),
1765         SENSOR_ATTR_2(temp7_input, S_IRUGO, show_temp, NULL, 6, 0),
1766         SENSOR_ATTR_2(temp8_input, S_IRUGO, show_temp, NULL, 7, 0),
1767         SENSOR_ATTR_2(temp9_input, S_IRUGO, show_temp, NULL, 8, 0),
1768         SENSOR_ATTR_2(temp10_input, S_IRUGO, show_temp, NULL, 9, 0),
1769 };
1770
1771 static struct sensor_device_attribute sda_temp_label[] = {
1772         SENSOR_ATTR(temp1_label, S_IRUGO, show_temp_label, NULL, 0),
1773         SENSOR_ATTR(temp2_label, S_IRUGO, show_temp_label, NULL, 1),
1774         SENSOR_ATTR(temp3_label, S_IRUGO, show_temp_label, NULL, 2),
1775         SENSOR_ATTR(temp4_label, S_IRUGO, show_temp_label, NULL, 3),
1776         SENSOR_ATTR(temp5_label, S_IRUGO, show_temp_label, NULL, 4),
1777         SENSOR_ATTR(temp6_label, S_IRUGO, show_temp_label, NULL, 5),
1778         SENSOR_ATTR(temp7_label, S_IRUGO, show_temp_label, NULL, 6),
1779         SENSOR_ATTR(temp8_label, S_IRUGO, show_temp_label, NULL, 7),
1780         SENSOR_ATTR(temp9_label, S_IRUGO, show_temp_label, NULL, 8),
1781         SENSOR_ATTR(temp10_label, S_IRUGO, show_temp_label, NULL, 9),
1782 };
1783
1784 static struct sensor_device_attribute_2 sda_temp_max[] = {
1785         SENSOR_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1786                       0, 1),
1787         SENSOR_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1788                       1, 1),
1789         SENSOR_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1790                       2, 1),
1791         SENSOR_ATTR_2(temp4_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1792                       3, 1),
1793         SENSOR_ATTR_2(temp5_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1794                       4, 1),
1795         SENSOR_ATTR_2(temp6_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1796                       5, 1),
1797         SENSOR_ATTR_2(temp7_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1798                       6, 1),
1799         SENSOR_ATTR_2(temp8_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1800                       7, 1),
1801         SENSOR_ATTR_2(temp9_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1802                       8, 1),
1803         SENSOR_ATTR_2(temp10_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1804                       9, 1),
1805 };
1806
1807 static struct sensor_device_attribute_2 sda_temp_max_hyst[] = {
1808         SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1809                       0, 2),
1810         SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1811                       1, 2),
1812         SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1813                       2, 2),
1814         SENSOR_ATTR_2(temp4_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1815                       3, 2),
1816         SENSOR_ATTR_2(temp5_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1817                       4, 2),
1818         SENSOR_ATTR_2(temp6_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1819                       5, 2),
1820         SENSOR_ATTR_2(temp7_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1821                       6, 2),
1822         SENSOR_ATTR_2(temp8_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1823                       7, 2),
1824         SENSOR_ATTR_2(temp9_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1825                       8, 2),
1826         SENSOR_ATTR_2(temp10_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1827                       9, 2),
1828 };
1829
1830 static struct sensor_device_attribute_2 sda_temp_crit[] = {
1831         SENSOR_ATTR_2(temp1_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1832                       0, 3),
1833         SENSOR_ATTR_2(temp2_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1834                       1, 3),
1835         SENSOR_ATTR_2(temp3_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1836                       2, 3),
1837         SENSOR_ATTR_2(temp4_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1838                       3, 3),
1839         SENSOR_ATTR_2(temp5_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1840                       4, 3),
1841         SENSOR_ATTR_2(temp6_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1842                       5, 3),
1843         SENSOR_ATTR_2(temp7_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1844                       6, 3),
1845         SENSOR_ATTR_2(temp8_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1846                       7, 3),
1847         SENSOR_ATTR_2(temp9_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1848                       8, 3),
1849         SENSOR_ATTR_2(temp10_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1850                       9, 3),
1851 };
1852
1853 static struct sensor_device_attribute sda_temp_offset[] = {
1854         SENSOR_ATTR(temp1_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1855                     store_temp_offset, 0),
1856         SENSOR_ATTR(temp2_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1857                     store_temp_offset, 1),
1858         SENSOR_ATTR(temp3_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1859                     store_temp_offset, 2),
1860         SENSOR_ATTR(temp4_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1861                     store_temp_offset, 3),
1862         SENSOR_ATTR(temp5_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1863                     store_temp_offset, 4),
1864         SENSOR_ATTR(temp6_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1865                     store_temp_offset, 5),
1866 };
1867
1868 static struct sensor_device_attribute sda_temp_type[] = {
1869         SENSOR_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1870                     store_temp_type, 0),
1871         SENSOR_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1872                     store_temp_type, 1),
1873         SENSOR_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1874                     store_temp_type, 2),
1875         SENSOR_ATTR(temp4_type, S_IRUGO | S_IWUSR, show_temp_type,
1876                     store_temp_type, 3),
1877         SENSOR_ATTR(temp5_type, S_IRUGO | S_IWUSR, show_temp_type,
1878                     store_temp_type, 4),
1879         SENSOR_ATTR(temp6_type, S_IRUGO | S_IWUSR, show_temp_type,
1880                     store_temp_type, 5),
1881 };
1882
1883 static struct sensor_device_attribute sda_temp_alarm[] = {
1884         SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL,
1885                     TEMP_ALARM_BASE),
1886         SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL,
1887                     TEMP_ALARM_BASE + 1),
1888         SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL,
1889                     TEMP_ALARM_BASE + 2),
1890         SENSOR_ATTR(temp4_alarm, S_IRUGO, show_alarm, NULL,
1891                     TEMP_ALARM_BASE + 3),
1892         SENSOR_ATTR(temp5_alarm, S_IRUGO, show_alarm, NULL,
1893                     TEMP_ALARM_BASE + 4),
1894         SENSOR_ATTR(temp6_alarm, S_IRUGO, show_alarm, NULL,
1895                     TEMP_ALARM_BASE + 5),
1896 };
1897
1898 #define NUM_TEMP_ALARM  ARRAY_SIZE(sda_temp_alarm)
1899
1900 static ssize_t
1901 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
1902 {
1903         struct nct6775_data *data = nct6775_update_device(dev);
1904         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1905
1906         return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
1907 }
1908
1909 static ssize_t
1910 store_pwm_mode(struct device *dev, struct device_attribute *attr,
1911                const char *buf, size_t count)
1912 {
1913         struct nct6775_data *data = dev_get_drvdata(dev);
1914         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1915         int nr = sattr->index;
1916         unsigned long val;
1917         int err;
1918         u8 reg;
1919
1920         err = kstrtoul(buf, 10, &val);
1921         if (err < 0)
1922                 return err;
1923
1924         if (val > 1)
1925                 return -EINVAL;
1926
1927         /* Setting DC mode is not supported for all chips/channels */
1928         if (data->REG_PWM_MODE[nr] == 0) {
1929                 if (val)
1930                         return -EINVAL;
1931                 return count;
1932         }
1933
1934         mutex_lock(&data->update_lock);
1935         data->pwm_mode[nr] = val;
1936         reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
1937         reg &= ~data->PWM_MODE_MASK[nr];
1938         if (val)
1939                 reg |= data->PWM_MODE_MASK[nr];
1940         nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
1941         mutex_unlock(&data->update_lock);
1942         return count;
1943 }
1944
1945 static ssize_t
1946 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1947 {
1948         struct nct6775_data *data = nct6775_update_device(dev);
1949         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1950         int nr = sattr->nr;
1951         int index = sattr->index;
1952         int pwm;
1953
1954         /*
1955          * For automatic fan control modes, show current pwm readings.
1956          * Otherwise, show the configured value.
1957          */
1958         if (index == 0 && data->pwm_enable[nr] > manual)
1959                 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
1960         else
1961                 pwm = data->pwm[index][nr];
1962
1963         return sprintf(buf, "%d\n", pwm);
1964 }
1965
1966 static ssize_t
1967 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
1968           size_t count)
1969 {
1970         struct nct6775_data *data = dev_get_drvdata(dev);
1971         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1972         int nr = sattr->nr;
1973         int index = sattr->index;
1974         unsigned long val;
1975         int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
1976         int maxval[7]
1977           = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
1978         int err;
1979         u8 reg;
1980
1981         err = kstrtoul(buf, 10, &val);
1982         if (err < 0)
1983                 return err;
1984         val = clamp_val(val, minval[index], maxval[index]);
1985
1986         mutex_lock(&data->update_lock);
1987         data->pwm[index][nr] = val;
1988         nct6775_write_value(data, data->REG_PWM[index][nr], val);
1989         if (index == 2) { /* floor: disable if val == 0 */
1990                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
1991                 reg &= 0x7f;
1992                 if (val)
1993                         reg |= 0x80;
1994                 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
1995         }
1996         mutex_unlock(&data->update_lock);
1997         return count;
1998 }
1999
2000 /* Returns 0 if OK, -EINVAL otherwise */
2001 static int check_trip_points(struct nct6775_data *data, int nr)
2002 {
2003         int i;
2004
2005         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2006                 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
2007                         return -EINVAL;
2008         }
2009         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2010                 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
2011                         return -EINVAL;
2012         }
2013         /* validate critical temperature and pwm if enabled (pwm > 0) */
2014         if (data->auto_pwm[nr][data->auto_pwm_num]) {
2015                 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2016                                 data->auto_temp[nr][data->auto_pwm_num] ||
2017                     data->auto_pwm[nr][data->auto_pwm_num - 1] >
2018                                 data->auto_pwm[nr][data->auto_pwm_num])
2019                         return -EINVAL;
2020         }
2021         return 0;
2022 }
2023
2024 static void pwm_update_registers(struct nct6775_data *data, int nr)
2025 {
2026         u8 reg;
2027
2028         switch (data->pwm_enable[nr]) {
2029         case off:
2030         case manual:
2031                 break;
2032         case speed_cruise:
2033                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2034                 reg = (reg & ~data->tolerance_mask) |
2035                   (data->target_speed_tolerance[nr] & data->tolerance_mask);
2036                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2037                 nct6775_write_value(data, data->REG_TARGET[nr],
2038                                     data->target_speed[nr] & 0xff);
2039                 if (data->REG_TOLERANCE_H) {
2040                         reg = (data->target_speed[nr] >> 8) & 0x0f;
2041                         reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2042                         nct6775_write_value(data,
2043                                             data->REG_TOLERANCE_H[nr],
2044                                             reg);
2045                 }
2046                 break;
2047         case thermal_cruise:
2048                 nct6775_write_value(data, data->REG_TARGET[nr],
2049                                     data->target_temp[nr]);
2050                 /* intentional */
2051         default:
2052                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2053                 reg = (reg & ~data->tolerance_mask) |
2054                   data->temp_tolerance[0][nr];
2055                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2056                 break;
2057         }
2058 }
2059
2060 static ssize_t
2061 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2062 {
2063         struct nct6775_data *data = nct6775_update_device(dev);
2064         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2065
2066         return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2067 }
2068
2069 static ssize_t
2070 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2071                  const char *buf, size_t count)
2072 {
2073         struct nct6775_data *data = dev_get_drvdata(dev);
2074         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2075         int nr = sattr->index;
2076         unsigned long val;
2077         int err;
2078         u16 reg;
2079
2080         err = kstrtoul(buf, 10, &val);
2081         if (err < 0)
2082                 return err;
2083
2084         if (val > sf4)
2085                 return -EINVAL;
2086
2087         if (val == sf3 && data->kind != nct6775)
2088                 return -EINVAL;
2089
2090         if (val == sf4 && check_trip_points(data, nr)) {
2091                 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2092                 dev_err(dev, "Adjust trip points and try again\n");
2093                 return -EINVAL;
2094         }
2095
2096         mutex_lock(&data->update_lock);
2097         data->pwm_enable[nr] = val;
2098         if (val == off) {
2099                 /*
2100                  * turn off pwm control: select manual mode, set pwm to maximum
2101                  */
2102                 data->pwm[0][nr] = 255;
2103                 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2104         }
2105         pwm_update_registers(data, nr);
2106         reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2107         reg &= 0x0f;
2108         reg |= pwm_enable_to_reg(val) << 4;
2109         nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2110         mutex_unlock(&data->update_lock);
2111         return count;
2112 }
2113
2114 static ssize_t
2115 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2116 {
2117         int i, sel = 0;
2118
2119         for (i = 0; i < NUM_TEMP; i++) {
2120                 if (!(data->have_temp & (1 << i)))
2121                         continue;
2122                 if (src == data->temp_src[i]) {
2123                         sel = i + 1;
2124                         break;
2125                 }
2126         }
2127
2128         return sprintf(buf, "%d\n", sel);
2129 }
2130
2131 static ssize_t
2132 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2133 {
2134         struct nct6775_data *data = nct6775_update_device(dev);
2135         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2136         int index = sattr->index;
2137
2138         return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2139 }
2140
2141 static ssize_t
2142 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2143                    const char *buf, size_t count)
2144 {
2145         struct nct6775_data *data = nct6775_update_device(dev);
2146         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2147         int nr = sattr->index;
2148         unsigned long val;
2149         int err, reg, src;
2150
2151         err = kstrtoul(buf, 10, &val);
2152         if (err < 0)
2153                 return err;
2154         if (val == 0 || val > NUM_TEMP)
2155                 return -EINVAL;
2156         if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
2157                 return -EINVAL;
2158
2159         mutex_lock(&data->update_lock);
2160         src = data->temp_src[val - 1];
2161         data->pwm_temp_sel[nr] = src;
2162         reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2163         reg &= 0xe0;
2164         reg |= src;
2165         nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2166         mutex_unlock(&data->update_lock);
2167
2168         return count;
2169 }
2170
2171 static ssize_t
2172 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2173                          char *buf)
2174 {
2175         struct nct6775_data *data = nct6775_update_device(dev);
2176         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2177         int index = sattr->index;
2178
2179         return show_pwm_temp_sel_common(data, buf,
2180                                         data->pwm_weight_temp_sel[index]);
2181 }
2182
2183 static ssize_t
2184 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2185                           const char *buf, size_t count)
2186 {
2187         struct nct6775_data *data = nct6775_update_device(dev);
2188         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2189         int nr = sattr->index;
2190         unsigned long val;
2191         int err, reg, src;
2192
2193         err = kstrtoul(buf, 10, &val);
2194         if (err < 0)
2195                 return err;
2196         if (val > NUM_TEMP)
2197                 return -EINVAL;
2198         if (val && (!(data->have_temp & (1 << (val - 1))) ||
2199                     !data->temp_src[val - 1]))
2200                 return -EINVAL;
2201
2202         mutex_lock(&data->update_lock);
2203         if (val) {
2204                 src = data->temp_src[val - 1];
2205                 data->pwm_weight_temp_sel[nr] = src;
2206                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2207                 reg &= 0xe0;
2208                 reg |= (src | 0x80);
2209                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2210         } else {
2211                 data->pwm_weight_temp_sel[nr] = 0;
2212                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2213                 reg &= 0x7f;
2214                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2215         }
2216         mutex_unlock(&data->update_lock);
2217
2218         return count;
2219 }
2220
2221 static ssize_t
2222 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2223 {
2224         struct nct6775_data *data = nct6775_update_device(dev);
2225         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2226
2227         return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2228 }
2229
2230 static ssize_t
2231 store_target_temp(struct device *dev, struct device_attribute *attr,
2232                   const char *buf, size_t count)
2233 {
2234         struct nct6775_data *data = dev_get_drvdata(dev);
2235         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2236         int nr = sattr->index;
2237         unsigned long val;
2238         int err;
2239
2240         err = kstrtoul(buf, 10, &val);
2241         if (err < 0)
2242                 return err;
2243
2244         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2245                         data->target_temp_mask);
2246
2247         mutex_lock(&data->update_lock);
2248         data->target_temp[nr] = val;
2249         pwm_update_registers(data, nr);
2250         mutex_unlock(&data->update_lock);
2251         return count;
2252 }
2253
2254 static ssize_t
2255 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2256 {
2257         struct nct6775_data *data = nct6775_update_device(dev);
2258         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2259         int nr = sattr->index;
2260
2261         return sprintf(buf, "%d\n",
2262                        fan_from_reg16(data->target_speed[nr],
2263                                       data->fan_div[nr]));
2264 }
2265
2266 static ssize_t
2267 store_target_speed(struct device *dev, struct device_attribute *attr,
2268                    const char *buf, size_t count)
2269 {
2270         struct nct6775_data *data = dev_get_drvdata(dev);
2271         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2272         int nr = sattr->index;
2273         unsigned long val;
2274         int err;
2275         u16 speed;
2276
2277         err = kstrtoul(buf, 10, &val);
2278         if (err < 0)
2279                 return err;
2280
2281         val = clamp_val(val, 0, 1350000U);
2282         speed = fan_to_reg(val, data->fan_div[nr]);
2283
2284         mutex_lock(&data->update_lock);
2285         data->target_speed[nr] = speed;
2286         pwm_update_registers(data, nr);
2287         mutex_unlock(&data->update_lock);
2288         return count;
2289 }
2290
2291 static ssize_t
2292 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2293                     char *buf)
2294 {
2295         struct nct6775_data *data = nct6775_update_device(dev);
2296         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2297         int nr = sattr->nr;
2298         int index = sattr->index;
2299
2300         return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2301 }
2302
2303 static ssize_t
2304 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2305                      const char *buf, size_t count)
2306 {
2307         struct nct6775_data *data = dev_get_drvdata(dev);
2308         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2309         int nr = sattr->nr;
2310         int index = sattr->index;
2311         unsigned long val;
2312         int err;
2313
2314         err = kstrtoul(buf, 10, &val);
2315         if (err < 0)
2316                 return err;
2317
2318         /* Limit tolerance as needed */
2319         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2320
2321         mutex_lock(&data->update_lock);
2322         data->temp_tolerance[index][nr] = val;
2323         if (index)
2324                 pwm_update_registers(data, nr);
2325         else
2326                 nct6775_write_value(data,
2327                                     data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2328                                     val);
2329         mutex_unlock(&data->update_lock);
2330         return count;
2331 }
2332
2333 /*
2334  * Fan speed tolerance is a tricky beast, since the associated register is
2335  * a tick counter, but the value is reported and configured as rpm.
2336  * Compute resulting low and high rpm values and report the difference.
2337  */
2338 static ssize_t
2339 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2340                      char *buf)
2341 {
2342         struct nct6775_data *data = nct6775_update_device(dev);
2343         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2344         int nr = sattr->index;
2345         int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2346         int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2347         int tolerance;
2348
2349         if (low <= 0)
2350                 low = 1;
2351         if (high > 0xffff)
2352                 high = 0xffff;
2353         if (high < low)
2354                 high = low;
2355
2356         tolerance = (fan_from_reg16(low, data->fan_div[nr])
2357                      - fan_from_reg16(high, data->fan_div[nr])) / 2;
2358
2359         return sprintf(buf, "%d\n", tolerance);
2360 }
2361
2362 static ssize_t
2363 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2364                       const char *buf, size_t count)
2365 {
2366         struct nct6775_data *data = dev_get_drvdata(dev);
2367         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2368         int nr = sattr->index;
2369         unsigned long val;
2370         int err;
2371         int low, high;
2372
2373         err = kstrtoul(buf, 10, &val);
2374         if (err < 0)
2375                 return err;
2376
2377         high = fan_from_reg16(data->target_speed[nr],
2378                               data->fan_div[nr]) + val;
2379         low = fan_from_reg16(data->target_speed[nr],
2380                              data->fan_div[nr]) - val;
2381         if (low <= 0)
2382                 low = 1;
2383         if (high < low)
2384                 high = low;
2385
2386         val = (fan_to_reg(low, data->fan_div[nr]) -
2387                fan_to_reg(high, data->fan_div[nr])) / 2;
2388
2389         /* Limit tolerance as needed */
2390         val = clamp_val(val, 0, data->speed_tolerance_limit);
2391
2392         mutex_lock(&data->update_lock);
2393         data->target_speed_tolerance[nr] = val;
2394         pwm_update_registers(data, nr);
2395         mutex_unlock(&data->update_lock);
2396         return count;
2397 }
2398
2399 static SENSOR_DEVICE_ATTR_2(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2400 static SENSOR_DEVICE_ATTR_2(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1, 0);
2401 static SENSOR_DEVICE_ATTR_2(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2, 0);
2402 static SENSOR_DEVICE_ATTR_2(pwm4, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3, 0);
2403 static SENSOR_DEVICE_ATTR_2(pwm5, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 4, 0);
2404
2405 static SENSOR_DEVICE_ATTR(pwm1_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2406                           store_pwm_mode, 0);
2407 static SENSOR_DEVICE_ATTR(pwm2_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2408                           store_pwm_mode, 1);
2409 static SENSOR_DEVICE_ATTR(pwm3_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2410                           store_pwm_mode, 2);
2411 static SENSOR_DEVICE_ATTR(pwm4_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2412                           store_pwm_mode, 3);
2413 static SENSOR_DEVICE_ATTR(pwm5_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2414                           store_pwm_mode, 4);
2415
2416 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2417                           store_pwm_enable, 0);
2418 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2419                           store_pwm_enable, 1);
2420 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2421                           store_pwm_enable, 2);
2422 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2423                           store_pwm_enable, 3);
2424 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2425                           store_pwm_enable, 4);
2426
2427 static SENSOR_DEVICE_ATTR(pwm1_temp_sel, S_IWUSR | S_IRUGO,
2428                             show_pwm_temp_sel, store_pwm_temp_sel, 0);
2429 static SENSOR_DEVICE_ATTR(pwm2_temp_sel, S_IWUSR | S_IRUGO,
2430                             show_pwm_temp_sel, store_pwm_temp_sel, 1);
2431 static SENSOR_DEVICE_ATTR(pwm3_temp_sel, S_IWUSR | S_IRUGO,
2432                             show_pwm_temp_sel, store_pwm_temp_sel, 2);
2433 static SENSOR_DEVICE_ATTR(pwm4_temp_sel, S_IWUSR | S_IRUGO,
2434                             show_pwm_temp_sel, store_pwm_temp_sel, 3);
2435 static SENSOR_DEVICE_ATTR(pwm5_temp_sel, S_IWUSR | S_IRUGO,
2436                             show_pwm_temp_sel, store_pwm_temp_sel, 4);
2437
2438 static SENSOR_DEVICE_ATTR(pwm1_target_temp, S_IWUSR | S_IRUGO, show_target_temp,
2439                           store_target_temp, 0);
2440 static SENSOR_DEVICE_ATTR(pwm2_target_temp, S_IWUSR | S_IRUGO, show_target_temp,
2441                           store_target_temp, 1);
2442 static SENSOR_DEVICE_ATTR(pwm3_target_temp, S_IWUSR | S_IRUGO, show_target_temp,
2443                           store_target_temp, 2);
2444 static SENSOR_DEVICE_ATTR(pwm4_target_temp, S_IWUSR | S_IRUGO, show_target_temp,
2445                           store_target_temp, 3);
2446 static SENSOR_DEVICE_ATTR(pwm5_target_temp, S_IWUSR | S_IRUGO, show_target_temp,
2447                           store_target_temp, 4);
2448
2449 static SENSOR_DEVICE_ATTR(fan1_target, S_IWUSR | S_IRUGO, show_target_speed,
2450                           store_target_speed, 0);
2451 static SENSOR_DEVICE_ATTR(fan2_target, S_IWUSR | S_IRUGO, show_target_speed,
2452                           store_target_speed, 1);
2453 static SENSOR_DEVICE_ATTR(fan3_target, S_IWUSR | S_IRUGO, show_target_speed,
2454                           store_target_speed, 2);
2455 static SENSOR_DEVICE_ATTR(fan4_target, S_IWUSR | S_IRUGO, show_target_speed,
2456                           store_target_speed, 3);
2457 static SENSOR_DEVICE_ATTR(fan5_target, S_IWUSR | S_IRUGO, show_target_speed,
2458                           store_target_speed, 4);
2459
2460 static SENSOR_DEVICE_ATTR(fan1_tolerance, S_IWUSR | S_IRUGO,
2461                             show_speed_tolerance, store_speed_tolerance, 0);
2462 static SENSOR_DEVICE_ATTR(fan2_tolerance, S_IWUSR | S_IRUGO,
2463                             show_speed_tolerance, store_speed_tolerance, 1);
2464 static SENSOR_DEVICE_ATTR(fan3_tolerance, S_IWUSR | S_IRUGO,
2465                             show_speed_tolerance, store_speed_tolerance, 2);
2466 static SENSOR_DEVICE_ATTR(fan4_tolerance, S_IWUSR | S_IRUGO,
2467                             show_speed_tolerance, store_speed_tolerance, 3);
2468 static SENSOR_DEVICE_ATTR(fan5_tolerance, S_IWUSR | S_IRUGO,
2469                             show_speed_tolerance, store_speed_tolerance, 4);
2470
2471 /* Smart Fan registers */
2472
2473 static ssize_t
2474 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2475 {
2476         struct nct6775_data *data = nct6775_update_device(dev);
2477         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2478         int nr = sattr->nr;
2479         int index = sattr->index;
2480
2481         return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2482 }
2483
2484 static ssize_t
2485 store_weight_temp(struct device *dev, struct device_attribute *attr,
2486                   const char *buf, size_t count)
2487 {
2488         struct nct6775_data *data = dev_get_drvdata(dev);
2489         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2490         int nr = sattr->nr;
2491         int index = sattr->index;
2492         unsigned long val;
2493         int err;
2494
2495         err = kstrtoul(buf, 10, &val);
2496         if (err < 0)
2497                 return err;
2498
2499         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2500
2501         mutex_lock(&data->update_lock);
2502         data->weight_temp[index][nr] = val;
2503         nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2504         mutex_unlock(&data->update_lock);
2505         return count;
2506 }
2507
2508 static SENSOR_DEVICE_ATTR(pwm1_weight_temp_sel, S_IWUSR | S_IRUGO,
2509                             show_pwm_weight_temp_sel, store_pwm_weight_temp_sel,
2510                             0);
2511 static SENSOR_DEVICE_ATTR(pwm2_weight_temp_sel, S_IWUSR | S_IRUGO,
2512                             show_pwm_weight_temp_sel, store_pwm_weight_temp_sel,
2513                             1);
2514 static SENSOR_DEVICE_ATTR(pwm3_weight_temp_sel, S_IWUSR | S_IRUGO,
2515                             show_pwm_weight_temp_sel, store_pwm_weight_temp_sel,
2516                             2);
2517 static SENSOR_DEVICE_ATTR(pwm4_weight_temp_sel, S_IWUSR | S_IRUGO,
2518                             show_pwm_weight_temp_sel, store_pwm_weight_temp_sel,
2519                             3);
2520 static SENSOR_DEVICE_ATTR(pwm5_weight_temp_sel, S_IWUSR | S_IRUGO,
2521                             show_pwm_weight_temp_sel, store_pwm_weight_temp_sel,
2522                             4);
2523
2524 static SENSOR_DEVICE_ATTR_2(pwm1_weight_temp_step, S_IWUSR | S_IRUGO,
2525                             show_weight_temp, store_weight_temp, 0, 0);
2526 static SENSOR_DEVICE_ATTR_2(pwm2_weight_temp_step, S_IWUSR | S_IRUGO,
2527                             show_weight_temp, store_weight_temp, 1, 0);
2528 static SENSOR_DEVICE_ATTR_2(pwm3_weight_temp_step, S_IWUSR | S_IRUGO,
2529                             show_weight_temp, store_weight_temp, 2, 0);
2530 static SENSOR_DEVICE_ATTR_2(pwm4_weight_temp_step, S_IWUSR | S_IRUGO,
2531                             show_weight_temp, store_weight_temp, 3, 0);
2532 static SENSOR_DEVICE_ATTR_2(pwm5_weight_temp_step, S_IWUSR | S_IRUGO,
2533                             show_weight_temp, store_weight_temp, 4, 0);
2534
2535 static SENSOR_DEVICE_ATTR_2(pwm1_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2536                             show_weight_temp, store_weight_temp, 0, 1);
2537 static SENSOR_DEVICE_ATTR_2(pwm2_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2538                             show_weight_temp, store_weight_temp, 1, 1);
2539 static SENSOR_DEVICE_ATTR_2(pwm3_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2540                             show_weight_temp, store_weight_temp, 2, 1);
2541 static SENSOR_DEVICE_ATTR_2(pwm4_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2542                             show_weight_temp, store_weight_temp, 3, 1);
2543 static SENSOR_DEVICE_ATTR_2(pwm5_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2544                             show_weight_temp, store_weight_temp, 4, 1);
2545
2546 static SENSOR_DEVICE_ATTR_2(pwm1_weight_temp_step_base, S_IWUSR | S_IRUGO,
2547                             show_weight_temp, store_weight_temp, 0, 2);
2548 static SENSOR_DEVICE_ATTR_2(pwm2_weight_temp_step_base, S_IWUSR | S_IRUGO,
2549                             show_weight_temp, store_weight_temp, 1, 2);
2550 static SENSOR_DEVICE_ATTR_2(pwm3_weight_temp_step_base, S_IWUSR | S_IRUGO,
2551                             show_weight_temp, store_weight_temp, 2, 2);
2552 static SENSOR_DEVICE_ATTR_2(pwm4_weight_temp_step_base, S_IWUSR | S_IRUGO,
2553                             show_weight_temp, store_weight_temp, 3, 2);
2554 static SENSOR_DEVICE_ATTR_2(pwm5_weight_temp_step_base, S_IWUSR | S_IRUGO,
2555                             show_weight_temp, store_weight_temp, 4, 2);
2556
2557 static SENSOR_DEVICE_ATTR_2(pwm1_weight_duty_step, S_IWUSR | S_IRUGO,
2558                             show_pwm, store_pwm, 0, 5);
2559 static SENSOR_DEVICE_ATTR_2(pwm2_weight_duty_step, S_IWUSR | S_IRUGO,
2560                             show_pwm, store_pwm, 1, 5);
2561 static SENSOR_DEVICE_ATTR_2(pwm3_weight_duty_step, S_IWUSR | S_IRUGO,
2562                             show_pwm, store_pwm, 2, 5);
2563 static SENSOR_DEVICE_ATTR_2(pwm4_weight_duty_step, S_IWUSR | S_IRUGO,
2564                             show_pwm, store_pwm, 3, 5);
2565 static SENSOR_DEVICE_ATTR_2(pwm5_weight_duty_step, S_IWUSR | S_IRUGO,
2566                             show_pwm, store_pwm, 4, 5);
2567
2568 /* duty_base is not supported on all chips */
2569 static struct sensor_device_attribute_2 sda_weight_duty_base[] = {
2570         SENSOR_ATTR_2(pwm1_weight_duty_base, S_IWUSR | S_IRUGO,
2571                       show_pwm, store_pwm, 0, 6),
2572         SENSOR_ATTR_2(pwm2_weight_duty_base, S_IWUSR | S_IRUGO,
2573                       show_pwm, store_pwm, 1, 6),
2574         SENSOR_ATTR_2(pwm3_weight_duty_base, S_IWUSR | S_IRUGO,
2575                       show_pwm, store_pwm, 2, 6),
2576         SENSOR_ATTR_2(pwm4_weight_duty_base, S_IWUSR | S_IRUGO,
2577                       show_pwm, store_pwm, 3, 6),
2578         SENSOR_ATTR_2(pwm5_weight_duty_base, S_IWUSR | S_IRUGO,
2579                       show_pwm, store_pwm, 4, 6),
2580 };
2581
2582 static ssize_t
2583 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2584 {
2585         struct nct6775_data *data = nct6775_update_device(dev);
2586         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2587         int nr = sattr->nr;
2588         int index = sattr->index;
2589
2590         return sprintf(buf, "%d\n",
2591                        step_time_from_reg(data->fan_time[index][nr],
2592                                           data->pwm_mode[nr]));
2593 }
2594
2595 static ssize_t
2596 store_fan_time(struct device *dev, struct device_attribute *attr,
2597                const char *buf, size_t count)
2598 {
2599         struct nct6775_data *data = dev_get_drvdata(dev);
2600         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2601         int nr = sattr->nr;
2602         int index = sattr->index;
2603         unsigned long val;
2604         int err;
2605
2606         err = kstrtoul(buf, 10, &val);
2607         if (err < 0)
2608                 return err;
2609
2610         val = step_time_to_reg(val, data->pwm_mode[nr]);
2611         mutex_lock(&data->update_lock);
2612         data->fan_time[index][nr] = val;
2613         nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2614         mutex_unlock(&data->update_lock);
2615         return count;
2616 }
2617
2618 static ssize_t
2619 show_name(struct device *dev, struct device_attribute *attr, char *buf)
2620 {
2621         struct nct6775_data *data = dev_get_drvdata(dev);
2622
2623         return sprintf(buf, "%s\n", data->name);
2624 }
2625
2626 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
2627
2628 static SENSOR_DEVICE_ATTR_2(pwm1_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2629                             store_fan_time, 0, 0);
2630 static SENSOR_DEVICE_ATTR_2(pwm2_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2631                             store_fan_time, 1, 0);
2632 static SENSOR_DEVICE_ATTR_2(pwm3_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2633                             store_fan_time, 2, 0);
2634 static SENSOR_DEVICE_ATTR_2(pwm4_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2635                             store_fan_time, 3, 0);
2636 static SENSOR_DEVICE_ATTR_2(pwm5_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2637                             store_fan_time, 4, 0);
2638
2639 static SENSOR_DEVICE_ATTR_2(pwm1_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2640                             store_fan_time, 0, 1);
2641 static SENSOR_DEVICE_ATTR_2(pwm2_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2642                             store_fan_time, 1, 1);
2643 static SENSOR_DEVICE_ATTR_2(pwm3_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2644                             store_fan_time, 2, 1);
2645 static SENSOR_DEVICE_ATTR_2(pwm4_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2646                             store_fan_time, 3, 1);
2647 static SENSOR_DEVICE_ATTR_2(pwm5_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2648                             store_fan_time, 4, 1);
2649
2650 static SENSOR_DEVICE_ATTR_2(pwm1_step_down_time, S_IWUSR | S_IRUGO,
2651                             show_fan_time, store_fan_time, 0, 2);
2652 static SENSOR_DEVICE_ATTR_2(pwm2_step_down_time, S_IWUSR | S_IRUGO,
2653                             show_fan_time, store_fan_time, 1, 2);
2654 static SENSOR_DEVICE_ATTR_2(pwm3_step_down_time, S_IWUSR | S_IRUGO,
2655                             show_fan_time, store_fan_time, 2, 2);
2656 static SENSOR_DEVICE_ATTR_2(pwm4_step_down_time, S_IWUSR | S_IRUGO,
2657                             show_fan_time, store_fan_time, 3, 2);
2658 static SENSOR_DEVICE_ATTR_2(pwm5_step_down_time, S_IWUSR | S_IRUGO,
2659                             show_fan_time, store_fan_time, 4, 2);
2660
2661 static SENSOR_DEVICE_ATTR_2(pwm1_start, S_IWUSR | S_IRUGO, show_pwm,
2662                             store_pwm, 0, 1);
2663 static SENSOR_DEVICE_ATTR_2(pwm2_start, S_IWUSR | S_IRUGO, show_pwm,
2664                             store_pwm, 1, 1);
2665 static SENSOR_DEVICE_ATTR_2(pwm3_start, S_IWUSR | S_IRUGO, show_pwm,
2666                             store_pwm, 2, 1);
2667 static SENSOR_DEVICE_ATTR_2(pwm4_start, S_IWUSR | S_IRUGO, show_pwm,
2668                             store_pwm, 3, 1);
2669 static SENSOR_DEVICE_ATTR_2(pwm5_start, S_IWUSR | S_IRUGO, show_pwm,
2670                             store_pwm, 4, 1);
2671
2672 static SENSOR_DEVICE_ATTR_2(pwm1_floor, S_IWUSR | S_IRUGO, show_pwm,
2673                             store_pwm, 0, 2);
2674 static SENSOR_DEVICE_ATTR_2(pwm2_floor, S_IWUSR | S_IRUGO, show_pwm,
2675                             store_pwm, 1, 2);
2676 static SENSOR_DEVICE_ATTR_2(pwm3_floor, S_IWUSR | S_IRUGO, show_pwm,
2677                             store_pwm, 2, 2);
2678 static SENSOR_DEVICE_ATTR_2(pwm4_floor, S_IWUSR | S_IRUGO, show_pwm,
2679                             store_pwm, 3, 2);
2680 static SENSOR_DEVICE_ATTR_2(pwm5_floor, S_IWUSR | S_IRUGO, show_pwm,
2681                             store_pwm, 4, 2);
2682
2683 static SENSOR_DEVICE_ATTR_2(pwm1_temp_tolerance, S_IWUSR | S_IRUGO,
2684                             show_temp_tolerance, store_temp_tolerance, 0, 0);
2685 static SENSOR_DEVICE_ATTR_2(pwm2_temp_tolerance, S_IWUSR | S_IRUGO,
2686                             show_temp_tolerance, store_temp_tolerance, 1, 0);
2687 static SENSOR_DEVICE_ATTR_2(pwm3_temp_tolerance, S_IWUSR | S_IRUGO,
2688                             show_temp_tolerance, store_temp_tolerance, 2, 0);
2689 static SENSOR_DEVICE_ATTR_2(pwm4_temp_tolerance, S_IWUSR | S_IRUGO,
2690                             show_temp_tolerance, store_temp_tolerance, 3, 0);
2691 static SENSOR_DEVICE_ATTR_2(pwm5_temp_tolerance, S_IWUSR | S_IRUGO,
2692                             show_temp_tolerance, store_temp_tolerance, 4, 0);
2693
2694 static SENSOR_DEVICE_ATTR_2(pwm1_crit_temp_tolerance, S_IWUSR | S_IRUGO,
2695                             show_temp_tolerance, store_temp_tolerance, 0, 1);
2696 static SENSOR_DEVICE_ATTR_2(pwm2_crit_temp_tolerance, S_IWUSR | S_IRUGO,
2697                             show_temp_tolerance, store_temp_tolerance, 1, 1);
2698 static SENSOR_DEVICE_ATTR_2(pwm3_crit_temp_tolerance, S_IWUSR | S_IRUGO,
2699                             show_temp_tolerance, store_temp_tolerance, 2, 1);
2700 static SENSOR_DEVICE_ATTR_2(pwm4_crit_temp_tolerance, S_IWUSR | S_IRUGO,
2701                             show_temp_tolerance, store_temp_tolerance, 3, 1);
2702 static SENSOR_DEVICE_ATTR_2(pwm5_crit_temp_tolerance, S_IWUSR | S_IRUGO,
2703                             show_temp_tolerance, store_temp_tolerance, 4, 1);
2704
2705 /* pwm_max is not supported on all chips */
2706 static struct sensor_device_attribute_2 sda_pwm_max[] = {
2707         SENSOR_ATTR_2(pwm1_max, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2708                       0, 3),
2709         SENSOR_ATTR_2(pwm2_max, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2710                       1, 3),
2711         SENSOR_ATTR_2(pwm3_max, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2712                       2, 3),
2713         SENSOR_ATTR_2(pwm4_max, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2714                       3, 3),
2715         SENSOR_ATTR_2(pwm5_max, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2716                       4, 3),
2717 };
2718
2719 /* pwm_step is not supported on all chips */
2720 static struct sensor_device_attribute_2 sda_pwm_step[] = {
2721         SENSOR_ATTR_2(pwm1_step, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 4),
2722         SENSOR_ATTR_2(pwm2_step, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1, 4),
2723         SENSOR_ATTR_2(pwm3_step, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2, 4),
2724         SENSOR_ATTR_2(pwm4_step, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3, 4),
2725         SENSOR_ATTR_2(pwm5_step, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 4, 4),
2726 };
2727
2728 static struct attribute *nct6775_attributes_pwm[5][20] = {
2729         {
2730                 &sensor_dev_attr_pwm1.dev_attr.attr,
2731                 &sensor_dev_attr_pwm1_mode.dev_attr.attr,
2732                 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2733                 &sensor_dev_attr_pwm1_temp_sel.dev_attr.attr,
2734                 &sensor_dev_attr_pwm1_temp_tolerance.dev_attr.attr,
2735                 &sensor_dev_attr_pwm1_crit_temp_tolerance.dev_attr.attr,
2736                 &sensor_dev_attr_pwm1_target_temp.dev_attr.attr,
2737                 &sensor_dev_attr_fan1_target.dev_attr.attr,
2738                 &sensor_dev_attr_fan1_tolerance.dev_attr.attr,
2739                 &sensor_dev_attr_pwm1_stop_time.dev_attr.attr,
2740                 &sensor_dev_attr_pwm1_step_up_time.dev_attr.attr,
2741                 &sensor_dev_attr_pwm1_step_down_time.dev_attr.attr,
2742                 &sensor_dev_attr_pwm1_start.dev_attr.attr,
2743                 &sensor_dev_attr_pwm1_floor.dev_attr.attr,
2744                 &sensor_dev_attr_pwm1_weight_temp_sel.dev_attr.attr,
2745                 &sensor_dev_attr_pwm1_weight_temp_step.dev_attr.attr,
2746                 &sensor_dev_attr_pwm1_weight_temp_step_tol.dev_attr.attr,
2747                 &sensor_dev_attr_pwm1_weight_temp_step_base.dev_attr.attr,
2748                 &sensor_dev_attr_pwm1_weight_duty_step.dev_attr.attr,
2749                 NULL
2750         },
2751         {
2752                 &sensor_dev_attr_pwm2.dev_attr.attr,
2753                 &sensor_dev_attr_pwm2_mode.dev_attr.attr,
2754                 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2755                 &sensor_dev_attr_pwm2_temp_sel.dev_attr.attr,
2756                 &sensor_dev_attr_pwm2_temp_tolerance.dev_attr.attr,
2757                 &sensor_dev_attr_pwm2_crit_temp_tolerance.dev_attr.attr,
2758                 &sensor_dev_attr_pwm2_target_temp.dev_attr.attr,
2759                 &sensor_dev_attr_fan2_target.dev_attr.attr,
2760                 &sensor_dev_attr_fan2_tolerance.dev_attr.attr,
2761                 &sensor_dev_attr_pwm2_stop_time.dev_attr.attr,
2762                 &sensor_dev_attr_pwm2_step_up_time.dev_attr.attr,
2763                 &sensor_dev_attr_pwm2_step_down_time.dev_attr.attr,
2764                 &sensor_dev_attr_pwm2_start.dev_attr.attr,
2765                 &sensor_dev_attr_pwm2_floor.dev_attr.attr,
2766                 &sensor_dev_attr_pwm2_weight_temp_sel.dev_attr.attr,
2767                 &sensor_dev_attr_pwm2_weight_temp_step.dev_attr.attr,
2768                 &sensor_dev_attr_pwm2_weight_temp_step_tol.dev_attr.attr,
2769                 &sensor_dev_attr_pwm2_weight_temp_step_base.dev_attr.attr,
2770                 &sensor_dev_attr_pwm2_weight_duty_step.dev_attr.attr,
2771                 NULL
2772         },
2773         {
2774                 &sensor_dev_attr_pwm3.dev_attr.attr,
2775                 &sensor_dev_attr_pwm3_mode.dev_attr.attr,
2776                 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2777                 &sensor_dev_attr_pwm3_temp_sel.dev_attr.attr,
2778                 &sensor_dev_attr_pwm3_temp_tolerance.dev_attr.attr,
2779                 &sensor_dev_attr_pwm3_crit_temp_tolerance.dev_attr.attr,
2780                 &sensor_dev_attr_pwm3_target_temp.dev_attr.attr,
2781                 &sensor_dev_attr_fan3_target.dev_attr.attr,
2782                 &sensor_dev_attr_fan3_tolerance.dev_attr.attr,
2783                 &sensor_dev_attr_pwm3_stop_time.dev_attr.attr,
2784                 &sensor_dev_attr_pwm3_step_up_time.dev_attr.attr,
2785                 &sensor_dev_attr_pwm3_step_down_time.dev_attr.attr,
2786                 &sensor_dev_attr_pwm3_start.dev_attr.attr,
2787                 &sensor_dev_attr_pwm3_floor.dev_attr.attr,
2788                 &sensor_dev_attr_pwm3_weight_temp_sel.dev_attr.attr,
2789                 &sensor_dev_attr_pwm3_weight_temp_step.dev_attr.attr,
2790                 &sensor_dev_attr_pwm3_weight_temp_step_tol.dev_attr.attr,
2791                 &sensor_dev_attr_pwm3_weight_temp_step_base.dev_attr.attr,
2792                 &sensor_dev_attr_pwm3_weight_duty_step.dev_attr.attr,
2793                 NULL
2794         },
2795         {
2796                 &sensor_dev_attr_pwm4.dev_attr.attr,
2797                 &sensor_dev_attr_pwm4_mode.dev_attr.attr,
2798                 &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2799                 &sensor_dev_attr_pwm4_temp_sel.dev_attr.attr,
2800                 &sensor_dev_attr_pwm4_temp_tolerance.dev_attr.attr,
2801                 &sensor_dev_attr_pwm4_crit_temp_tolerance.dev_attr.attr,
2802                 &sensor_dev_attr_pwm4_target_temp.dev_attr.attr,
2803                 &sensor_dev_attr_fan4_target.dev_attr.attr,
2804                 &sensor_dev_attr_fan4_tolerance.dev_attr.attr,
2805                 &sensor_dev_attr_pwm4_stop_time.dev_attr.attr,
2806                 &sensor_dev_attr_pwm4_step_up_time.dev_attr.attr,
2807                 &sensor_dev_attr_pwm4_step_down_time.dev_attr.attr,
2808                 &sensor_dev_attr_pwm4_start.dev_attr.attr,
2809                 &sensor_dev_attr_pwm4_floor.dev_attr.attr,
2810                 &sensor_dev_attr_pwm4_weight_temp_sel.dev_attr.attr,
2811                 &sensor_dev_attr_pwm4_weight_temp_step.dev_attr.attr,
2812                 &sensor_dev_attr_pwm4_weight_temp_step_tol.dev_attr.attr,
2813                 &sensor_dev_attr_pwm4_weight_temp_step_base.dev_attr.attr,
2814                 &sensor_dev_attr_pwm4_weight_duty_step.dev_attr.attr,
2815                 NULL
2816         },
2817         {
2818                 &sensor_dev_attr_pwm5.dev_attr.attr,
2819                 &sensor_dev_attr_pwm5_mode.dev_attr.attr,
2820                 &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2821                 &sensor_dev_attr_pwm5_temp_sel.dev_attr.attr,
2822                 &sensor_dev_attr_pwm5_temp_tolerance.dev_attr.attr,
2823                 &sensor_dev_attr_pwm5_crit_temp_tolerance.dev_attr.attr,
2824                 &sensor_dev_attr_pwm5_target_temp.dev_attr.attr,
2825                 &sensor_dev_attr_fan5_target.dev_attr.attr,
2826                 &sensor_dev_attr_fan5_tolerance.dev_attr.attr,
2827                 &sensor_dev_attr_pwm5_stop_time.dev_attr.attr,
2828                 &sensor_dev_attr_pwm5_step_up_time.dev_attr.attr,
2829                 &sensor_dev_attr_pwm5_step_down_time.dev_attr.attr,
2830                 &sensor_dev_attr_pwm5_start.dev_attr.attr,
2831                 &sensor_dev_attr_pwm5_floor.dev_attr.attr,
2832                 &sensor_dev_attr_pwm5_weight_temp_sel.dev_attr.attr,
2833                 &sensor_dev_attr_pwm5_weight_temp_step.dev_attr.attr,
2834                 &sensor_dev_attr_pwm5_weight_temp_step_tol.dev_attr.attr,
2835                 &sensor_dev_attr_pwm5_weight_temp_step_base.dev_attr.attr,
2836                 &sensor_dev_attr_pwm5_weight_duty_step.dev_attr.attr,
2837                 NULL
2838         },
2839 };
2840
2841 static const struct attribute_group nct6775_group_pwm[5] = {
2842         { .attrs = nct6775_attributes_pwm[0] },
2843         { .attrs = nct6775_attributes_pwm[1] },
2844         { .attrs = nct6775_attributes_pwm[2] },
2845         { .attrs = nct6775_attributes_pwm[3] },
2846         { .attrs = nct6775_attributes_pwm[4] },
2847 };
2848
2849 static ssize_t
2850 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2851 {
2852         struct nct6775_data *data = nct6775_update_device(dev);
2853         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2854
2855         return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2856 }
2857
2858 static ssize_t
2859 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2860                const char *buf, size_t count)
2861 {
2862         struct nct6775_data *data = dev_get_drvdata(dev);
2863         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2864         int nr = sattr->nr;
2865         int point = sattr->index;
2866         unsigned long val;
2867         int err;
2868         u8 reg;
2869
2870         err = kstrtoul(buf, 10, &val);
2871         if (err < 0)
2872                 return err;
2873         if (val > 255)
2874                 return -EINVAL;
2875
2876         if (point == data->auto_pwm_num) {
2877                 if (data->kind != nct6775 && !val)
2878                         return -EINVAL;
2879                 if (data->kind != nct6779 && val)
2880                         val = 0xff;
2881         }
2882
2883         mutex_lock(&data->update_lock);
2884         data->auto_pwm[nr][point] = val;
2885         if (point < data->auto_pwm_num) {
2886                 nct6775_write_value(data,
2887                                     NCT6775_AUTO_PWM(data, nr, point),
2888                                     data->auto_pwm[nr][point]);
2889         } else {
2890                 switch (data->kind) {
2891                 case nct6775:
2892                         /* disable if needed (pwm == 0) */
2893                         reg = nct6775_read_value(data,
2894                                                  NCT6775_REG_CRITICAL_ENAB[nr]);
2895                         if (val)
2896                                 reg |= 0x02;
2897                         else
2898                                 reg &= ~0x02;
2899                         nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
2900                                             reg);
2901                         break;
2902                 case nct6776:
2903                         break; /* always enabled, nothing to do */
2904                 case nct6779:
2905                         nct6775_write_value(data, NCT6779_REG_CRITICAL_PWM[nr],
2906                                             val);
2907                         reg = nct6775_read_value(data,
2908                                         NCT6779_REG_CRITICAL_PWM_ENABLE[nr]);
2909                         if (val == 255)
2910                                 reg &= ~0x01;
2911                         else
2912                                 reg |= 0x01;
2913                         nct6775_write_value(data,
2914                                             NCT6779_REG_CRITICAL_PWM_ENABLE[nr],
2915                                             reg);
2916                         break;
2917                 }
2918         }
2919         mutex_unlock(&data->update_lock);
2920         return count;
2921 }
2922
2923 static ssize_t
2924 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
2925 {
2926         struct nct6775_data *data = nct6775_update_device(dev);
2927         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2928         int nr = sattr->nr;
2929         int point = sattr->index;
2930
2931         /*
2932          * We don't know for sure if the temperature is signed or unsigned.
2933          * Assume it is unsigned.
2934          */
2935         return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
2936 }
2937
2938 static ssize_t
2939 store_auto_temp(struct device *dev, struct device_attribute *attr,
2940                 const char *buf, size_t count)
2941 {
2942         struct nct6775_data *data = dev_get_drvdata(dev);
2943         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2944         int nr = sattr->nr;
2945         int point = sattr->index;
2946         unsigned long val;
2947         int err;
2948
2949         err = kstrtoul(buf, 10, &val);
2950         if (err)
2951                 return err;
2952         if (val > 255000)
2953                 return -EINVAL;
2954
2955         mutex_lock(&data->update_lock);
2956         data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
2957         if (point < data->auto_pwm_num) {
2958                 nct6775_write_value(data,
2959                                     NCT6775_AUTO_TEMP(data, nr, point),
2960                                     data->auto_temp[nr][point]);
2961         } else {
2962                 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
2963                                     data->auto_temp[nr][point]);
2964         }
2965         mutex_unlock(&data->update_lock);
2966         return count;
2967 }
2968
2969 /*
2970  * The number of auto-point trip points is chip dependent.
2971  * Need to check support while generating/removing attribute files.
2972  */
2973 static struct sensor_device_attribute_2 sda_auto_pwm_arrays[] = {
2974         SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IWUSR | S_IRUGO,
2975                       show_auto_pwm, store_auto_pwm, 0, 0),
2976         SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IWUSR | S_IRUGO,
2977                       show_auto_temp, store_auto_temp, 0, 0),
2978         SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IWUSR | S_IRUGO,
2979                       show_auto_pwm, store_auto_pwm, 0, 1),
2980         SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IWUSR | S_IRUGO,
2981                       show_auto_temp, store_auto_temp, 0, 1),
2982         SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IWUSR | S_IRUGO,
2983                       show_auto_pwm, store_auto_pwm, 0, 2),
2984         SENSOR_ATTR_2(pwm1_auto_point3_temp, S_IWUSR | S_IRUGO,
2985                       show_auto_temp, store_auto_temp, 0, 2),
2986         SENSOR_ATTR_2(pwm1_auto_point4_pwm, S_IWUSR | S_IRUGO,
2987                       show_auto_pwm, store_auto_pwm, 0, 3),
2988         SENSOR_ATTR_2(pwm1_auto_point4_temp, S_IWUSR | S_IRUGO,
2989                       show_auto_temp, store_auto_temp, 0, 3),
2990         SENSOR_ATTR_2(pwm1_auto_point5_pwm, S_IWUSR | S_IRUGO,
2991                       show_auto_pwm, store_auto_pwm, 0, 4),
2992         SENSOR_ATTR_2(pwm1_auto_point5_temp, S_IWUSR | S_IRUGO,
2993                       show_auto_temp, store_auto_temp, 0, 4),
2994         SENSOR_ATTR_2(pwm1_auto_point6_pwm, S_IWUSR | S_IRUGO,
2995                       show_auto_pwm, store_auto_pwm, 0, 5),
2996         SENSOR_ATTR_2(pwm1_auto_point6_temp, S_IWUSR | S_IRUGO,
2997                       show_auto_temp, store_auto_temp, 0, 5),
2998         SENSOR_ATTR_2(pwm1_auto_point7_pwm, S_IWUSR | S_IRUGO,
2999                       show_auto_pwm, store_auto_pwm, 0, 6),
3000         SENSOR_ATTR_2(pwm1_auto_point7_temp, S_IWUSR | S_IRUGO,
3001                       show_auto_temp, store_auto_temp, 0, 6),
3002
3003         SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IWUSR | S_IRUGO,
3004                       show_auto_pwm, store_auto_pwm, 1, 0),
3005         SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IWUSR | S_IRUGO,
3006                       show_auto_temp, store_auto_temp, 1, 0),
3007         SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IWUSR | S_IRUGO,
3008                       show_auto_pwm, store_auto_pwm, 1, 1),
3009         SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IWUSR | S_IRUGO,
3010                       show_auto_temp, store_auto_temp, 1, 1),
3011         SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IWUSR | S_IRUGO,
3012                       show_auto_pwm, store_auto_pwm, 1, 2),
3013         SENSOR_ATTR_2(pwm2_auto_point3_temp, S_IWUSR | S_IRUGO,
3014                       show_auto_temp, store_auto_temp, 1, 2),
3015         SENSOR_ATTR_2(pwm2_auto_point4_pwm, S_IWUSR | S_IRUGO,
3016                       show_auto_pwm, store_auto_pwm, 1, 3),
3017         SENSOR_ATTR_2(pwm2_auto_point4_temp, S_IWUSR | S_IRUGO,
3018                       show_auto_temp, store_auto_temp, 1, 3),
3019         SENSOR_ATTR_2(pwm2_auto_point5_pwm, S_IWUSR | S_IRUGO,
3020                       show_auto_pwm, store_auto_pwm, 1, 4),
3021         SENSOR_ATTR_2(pwm2_auto_point5_temp, S_IWUSR | S_IRUGO,
3022                       show_auto_temp, store_auto_temp, 1, 4),
3023         SENSOR_ATTR_2(pwm2_auto_point6_pwm, S_IWUSR | S_IRUGO,
3024                       show_auto_pwm, store_auto_pwm, 1, 5),
3025         SENSOR_ATTR_2(pwm2_auto_point6_temp, S_IWUSR | S_IRUGO,
3026                       show_auto_temp, store_auto_temp, 1, 5),
3027         SENSOR_ATTR_2(pwm2_auto_point7_pwm, S_IWUSR | S_IRUGO,
3028                       show_auto_pwm, store_auto_pwm, 1, 6),
3029         SENSOR_ATTR_2(pwm2_auto_point7_temp, S_IWUSR | S_IRUGO,
3030                       show_auto_temp, store_auto_temp, 1, 6),
3031
3032         SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IWUSR | S_IRUGO,
3033                       show_auto_pwm, store_auto_pwm, 2, 0),
3034         SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IWUSR | S_IRUGO,
3035                       show_auto_temp, store_auto_temp, 2, 0),
3036         SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IWUSR | S_IRUGO,
3037                       show_auto_pwm, store_auto_pwm, 2, 1),
3038         SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IWUSR | S_IRUGO,
3039                       show_auto_temp, store_auto_temp, 2, 1),
3040         SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IWUSR | S_IRUGO,
3041                       show_auto_pwm, store_auto_pwm, 2, 2),
3042         SENSOR_ATTR_2(pwm3_auto_point3_temp, S_IWUSR | S_IRUGO,
3043                       show_auto_temp, store_auto_temp, 2, 2),
3044         SENSOR_ATTR_2(pwm3_auto_point4_pwm, S_IWUSR | S_IRUGO,
3045                       show_auto_pwm, store_auto_pwm, 2, 3),
3046         SENSOR_ATTR_2(pwm3_auto_point4_temp, S_IWUSR | S_IRUGO,
3047                       show_auto_temp, store_auto_temp, 2, 3),
3048         SENSOR_ATTR_2(pwm3_auto_point5_pwm, S_IWUSR | S_IRUGO,
3049                       show_auto_pwm, store_auto_pwm, 2, 4),
3050         SENSOR_ATTR_2(pwm3_auto_point5_temp, S_IWUSR | S_IRUGO,
3051                       show_auto_temp, store_auto_temp, 2, 4),
3052         SENSOR_ATTR_2(pwm3_auto_point6_pwm, S_IWUSR | S_IRUGO,
3053                       show_auto_pwm, store_auto_pwm, 2, 5),
3054         SENSOR_ATTR_2(pwm3_auto_point6_temp, S_IWUSR | S_IRUGO,
3055                       show_auto_temp, store_auto_temp, 2, 5),
3056         SENSOR_ATTR_2(pwm3_auto_point7_pwm, S_IWUSR | S_IRUGO,
3057                       show_auto_pwm, store_auto_pwm, 2, 6),
3058         SENSOR_ATTR_2(pwm3_auto_point7_temp, S_IWUSR | S_IRUGO,
3059                       show_auto_temp, store_auto_temp, 2, 6),
3060
3061         SENSOR_ATTR_2(pwm4_auto_point1_pwm, S_IWUSR | S_IRUGO,
3062                       show_auto_pwm, store_auto_pwm, 3, 0),
3063         SENSOR_ATTR_2(pwm4_auto_point1_temp, S_IWUSR | S_IRUGO,
3064                       show_auto_temp, store_auto_temp, 3, 0),
3065         SENSOR_ATTR_2(pwm4_auto_point2_pwm, S_IWUSR | S_IRUGO,
3066                       show_auto_pwm, store_auto_pwm, 3, 1),
3067         SENSOR_ATTR_2(pwm4_auto_point2_temp, S_IWUSR | S_IRUGO,
3068                       show_auto_temp, store_auto_temp, 3, 1),
3069         SENSOR_ATTR_2(pwm4_auto_point3_pwm, S_IWUSR | S_IRUGO,
3070                       show_auto_pwm, store_auto_pwm, 3, 2),
3071         SENSOR_ATTR_2(pwm4_auto_point3_temp, S_IWUSR | S_IRUGO,
3072                       show_auto_temp, store_auto_temp, 3, 2),
3073         SENSOR_ATTR_2(pwm4_auto_point4_pwm, S_IWUSR | S_IRUGO,
3074                       show_auto_pwm, store_auto_pwm, 3, 3),
3075         SENSOR_ATTR_2(pwm4_auto_point4_temp, S_IWUSR | S_IRUGO,
3076                       show_auto_temp, store_auto_temp, 3, 3),
3077         SENSOR_ATTR_2(pwm4_auto_point5_pwm, S_IWUSR | S_IRUGO,
3078                       show_auto_pwm, store_auto_pwm, 3, 4),
3079         SENSOR_ATTR_2(pwm4_auto_point5_temp, S_IWUSR | S_IRUGO,
3080                       show_auto_temp, store_auto_temp, 3, 4),
3081         SENSOR_ATTR_2(pwm4_auto_point6_pwm, S_IWUSR | S_IRUGO,
3082                       show_auto_pwm, store_auto_pwm, 3, 5),
3083         SENSOR_ATTR_2(pwm4_auto_point6_temp, S_IWUSR | S_IRUGO,
3084                       show_auto_temp, store_auto_temp, 3, 5),
3085         SENSOR_ATTR_2(pwm4_auto_point7_pwm, S_IWUSR | S_IRUGO,
3086                       show_auto_pwm, store_auto_pwm, 3, 6),
3087         SENSOR_ATTR_2(pwm4_auto_point7_temp, S_IWUSR | S_IRUGO,
3088                       show_auto_temp, store_auto_temp, 3, 6),
3089
3090         SENSOR_ATTR_2(pwm5_auto_point1_pwm, S_IWUSR | S_IRUGO,
3091                       show_auto_pwm, store_auto_pwm, 4, 0),
3092         SENSOR_ATTR_2(pwm5_auto_point1_temp, S_IWUSR | S_IRUGO,
3093                       show_auto_temp, store_auto_temp, 4, 0),
3094         SENSOR_ATTR_2(pwm5_auto_point2_pwm, S_IWUSR | S_IRUGO,
3095                       show_auto_pwm, store_auto_pwm, 4, 1),
3096         SENSOR_ATTR_2(pwm5_auto_point2_temp, S_IWUSR | S_IRUGO,
3097                       show_auto_temp, store_auto_temp, 4, 1),
3098         SENSOR_ATTR_2(pwm5_auto_point3_pwm, S_IWUSR | S_IRUGO,
3099                       show_auto_pwm, store_auto_pwm, 4, 2),
3100         SENSOR_ATTR_2(pwm5_auto_point3_temp, S_IWUSR | S_IRUGO,
3101                       show_auto_temp, store_auto_temp, 4, 2),
3102         SENSOR_ATTR_2(pwm5_auto_point4_pwm, S_IWUSR | S_IRUGO,
3103                       show_auto_pwm, store_auto_pwm, 4, 3),
3104         SENSOR_ATTR_2(pwm5_auto_point4_temp, S_IWUSR | S_IRUGO,
3105                       show_auto_temp, store_auto_temp, 4, 3),
3106         SENSOR_ATTR_2(pwm5_auto_point5_pwm, S_IWUSR | S_IRUGO,
3107                       show_auto_pwm, store_auto_pwm, 4, 4),
3108         SENSOR_ATTR_2(pwm5_auto_point5_temp, S_IWUSR | S_IRUGO,
3109                       show_auto_temp, store_auto_temp, 4, 4),
3110         SENSOR_ATTR_2(pwm5_auto_point6_pwm, S_IWUSR | S_IRUGO,
3111                       show_auto_pwm, store_auto_pwm, 4, 5),
3112         SENSOR_ATTR_2(pwm5_auto_point6_temp, S_IWUSR | S_IRUGO,
3113                       show_auto_temp, store_auto_temp, 4, 5),
3114         SENSOR_ATTR_2(pwm5_auto_point7_pwm, S_IWUSR | S_IRUGO,
3115                       show_auto_pwm, store_auto_pwm, 4, 6),
3116         SENSOR_ATTR_2(pwm5_auto_point7_temp, S_IWUSR | S_IRUGO,
3117                       show_auto_temp, store_auto_temp, 4, 6),
3118 };
3119
3120 static ssize_t
3121 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
3122 {
3123         struct nct6775_data *data = dev_get_drvdata(dev);
3124         return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
3125 }
3126
3127 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
3128
3129 /* Case open detection */
3130
3131 static ssize_t
3132 clear_caseopen(struct device *dev, struct device_attribute *attr,
3133                const char *buf, size_t count)
3134 {
3135         struct nct6775_data *data = dev_get_drvdata(dev);
3136         struct nct6775_sio_data *sio_data = dev->platform_data;
3137         int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
3138         unsigned long val;
3139         u8 reg;
3140         int ret;
3141
3142         if (kstrtoul(buf, 10, &val) || val != 0)
3143                 return -EINVAL;
3144
3145         mutex_lock(&data->update_lock);
3146
3147         /*
3148          * Use CR registers to clear caseopen status.
3149          * The CR registers are the same for all chips, and not all chips
3150          * support clearing the caseopen status through "regular" registers.
3151          */
3152         ret = superio_enter(sio_data->sioreg);
3153         if (ret) {
3154                 count = ret;
3155                 goto error;
3156         }
3157
3158         superio_select(sio_data->sioreg, NCT6775_LD_ACPI);
3159         reg = superio_inb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
3160         reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3161         superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3162         reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3163         superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3164         superio_exit(sio_data->sioreg);
3165
3166         data->valid = false;    /* Force cache refresh */
3167 error:
3168         mutex_unlock(&data->update_lock);
3169         return count;
3170 }
3171
3172 static struct sensor_device_attribute sda_caseopen[] = {
3173         SENSOR_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
3174                     clear_caseopen, INTRUSION_ALARM_BASE),
3175         SENSOR_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
3176                     clear_caseopen, INTRUSION_ALARM_BASE + 1),
3177 };
3178
3179 /*
3180  * Driver and device management
3181  */
3182
3183 static void nct6775_device_remove_files(struct device *dev)
3184 {
3185         /*
3186          * some entries in the following arrays may not have been used in
3187          * device_create_file(), but device_remove_file() will ignore them
3188          */
3189         int i;
3190         struct nct6775_data *data = dev_get_drvdata(dev);
3191
3192         for (i = 0; i < data->pwm_num; i++)
3193                 sysfs_remove_group(&dev->kobj, &nct6775_group_pwm[i]);
3194
3195         for (i = 0; i < ARRAY_SIZE(sda_pwm_max); i++)
3196                 device_remove_file(dev, &sda_pwm_max[i].dev_attr);
3197
3198         for (i = 0; i < ARRAY_SIZE(sda_pwm_step); i++)
3199                 device_remove_file(dev, &sda_pwm_step[i].dev_attr);
3200
3201         for (i = 0; i < ARRAY_SIZE(sda_weight_duty_base); i++)
3202                 device_remove_file(dev, &sda_weight_duty_base[i].dev_attr);
3203
3204         for (i = 0; i < ARRAY_SIZE(sda_auto_pwm_arrays); i++)
3205                 device_remove_file(dev, &sda_auto_pwm_arrays[i].dev_attr);
3206
3207         for (i = 0; i < data->in_num; i++)
3208                 sysfs_remove_group(&dev->kobj, &nct6775_group_in[i]);
3209
3210         for (i = 0; i < 5; i++) {
3211                 device_remove_file(dev, &sda_fan_input[i].dev_attr);
3212                 device_remove_file(dev, &sda_fan_alarm[i].dev_attr);
3213                 device_remove_file(dev, &sda_fan_div[i].dev_attr);
3214                 device_remove_file(dev, &sda_fan_min[i].dev_attr);
3215                 device_remove_file(dev, &sda_fan_pulses[i].dev_attr);
3216         }
3217         for (i = 0; i < NUM_TEMP; i++) {
3218                 if (!(data->have_temp & (1 << i)))
3219                         continue;
3220                 device_remove_file(dev, &sda_temp_input[i].dev_attr);
3221                 device_remove_file(dev, &sda_temp_label[i].dev_attr);
3222                 device_remove_file(dev, &sda_temp_max[i].dev_attr);
3223                 device_remove_file(dev, &sda_temp_max_hyst[i].dev_attr);
3224                 device_remove_file(dev, &sda_temp_crit[i].dev_attr);
3225                 if (!(data->have_temp_fixed & (1 << i)))
3226                         continue;
3227                 device_remove_file(dev, &sda_temp_type[i].dev_attr);
3228                 device_remove_file(dev, &sda_temp_offset[i].dev_attr);
3229                 if (i >= NUM_TEMP_ALARM)
3230                         continue;
3231                 device_remove_file(dev, &sda_temp_alarm[i].dev_attr);
3232         }
3233
3234         device_remove_file(dev, &sda_caseopen[0].dev_attr);
3235         device_remove_file(dev, &sda_caseopen[1].dev_attr);
3236
3237         device_remove_file(dev, &dev_attr_name);
3238         device_remove_file(dev, &dev_attr_cpu0_vid);
3239 }
3240
3241 /* Get the monitoring functions started */
3242 static inline void nct6775_init_device(struct nct6775_data *data)
3243 {
3244         int i;
3245         u8 tmp, diode;
3246
3247         /* Start monitoring if needed */
3248         if (data->REG_CONFIG) {
3249                 tmp = nct6775_read_value(data, data->REG_CONFIG);
3250                 if (!(tmp & 0x01))
3251                         nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
3252         }
3253
3254         /* Enable temperature sensors if needed */
3255         for (i = 0; i < NUM_TEMP; i++) {
3256                 if (!(data->have_temp & (1 << i)))
3257                         continue;
3258                 if (!data->reg_temp_config[i])
3259                         continue;
3260                 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
3261                 if (tmp & 0x01)
3262                         nct6775_write_value(data, data->reg_temp_config[i],
3263                                             tmp & 0xfe);
3264         }
3265
3266         /* Enable VBAT monitoring if needed */
3267         tmp = nct6775_read_value(data, data->REG_VBAT);
3268         if (!(tmp & 0x01))
3269                 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
3270
3271         diode = nct6775_read_value(data, data->REG_DIODE);
3272
3273         for (i = 0; i < data->temp_fixed_num; i++) {
3274                 if (!(data->have_temp_fixed & (1 << i)))
3275                         continue;
3276                 if ((tmp & (0x02 << i)))        /* diode */
3277                         data->temp_type[i] = 3 - ((diode >> i) & 0x02);
3278                 else                            /* thermistor */
3279                         data->temp_type[i] = 4;
3280         }
3281 }
3282
3283 static int
3284 nct6775_check_fan_inputs(const struct nct6775_sio_data *sio_data,
3285                          struct nct6775_data *data)
3286 {
3287         int regval;
3288         bool fan3pin, fan3min, fan4pin, fan4min, fan5pin;
3289         bool pwm3pin, pwm4pin, pwm5pin;
3290         int ret;
3291
3292         ret = superio_enter(sio_data->sioreg);
3293         if (ret)
3294                 return ret;
3295
3296         /* fan4 and fan5 share some pins with the GPIO and serial flash */
3297         if (data->kind == nct6775) {
3298                 regval = superio_inb(sio_data->sioreg, 0x2c);
3299
3300                 fan3pin = regval & (1 << 6);
3301                 fan3min = fan3pin;
3302                 pwm3pin = regval & (1 << 7);
3303
3304                 /* On NCT6775, fan4 shares pins with the fdc interface */
3305                 fan4pin = !(superio_inb(sio_data->sioreg, 0x2A) & 0x80);
3306                 fan4min = 0;
3307                 fan5pin = 0;
3308                 pwm4pin = 0;
3309                 pwm5pin = 0;
3310         } else if (data->kind == nct6776) {
3311                 bool gpok = superio_inb(sio_data->sioreg, 0x27) & 0x80;
3312
3313                 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3314                 regval = superio_inb(sio_data->sioreg, SIO_REG_ENABLE);
3315
3316                 if (regval & 0x80)
3317                         fan3pin = gpok;
3318                 else
3319                         fan3pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x40);
3320
3321                 if (regval & 0x40)
3322                         fan4pin = gpok;
3323                 else
3324                         fan4pin = superio_inb(sio_data->sioreg, 0x1C) & 0x01;
3325
3326                 if (regval & 0x20)
3327                         fan5pin = gpok;
3328                 else
3329                         fan5pin = superio_inb(sio_data->sioreg, 0x1C) & 0x02;
3330
3331                 fan4min = fan4pin;
3332                 fan3min = fan3pin;
3333                 pwm3pin = fan3pin;
3334                 pwm4pin = 0;
3335                 pwm5pin = 0;
3336         } else {        /* NCT6779D */
3337                 regval = superio_inb(sio_data->sioreg, 0x1c);
3338
3339                 fan3pin = !(regval & (1 << 5));
3340                 fan4pin = !(regval & (1 << 6));
3341                 fan5pin = !(regval & (1 << 7));
3342
3343                 pwm3pin = !(regval & (1 << 0));
3344                 pwm4pin = !(regval & (1 << 1));
3345                 pwm5pin = !(regval & (1 << 2));
3346
3347                 fan3min = fan3pin;
3348                 fan4min = fan4pin;
3349         }
3350
3351         superio_exit(sio_data->sioreg);
3352
3353         data->has_fan = data->has_fan_min = 0x03; /* fan1 and fan2 */
3354         data->has_fan |= fan3pin << 2;
3355         data->has_fan_min |= fan3min << 2;
3356
3357         data->has_fan |= (fan4pin << 3) | (fan5pin << 4);
3358         data->has_fan_min |= (fan4min << 3) | (fan5pin << 4);
3359
3360         data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) | (pwm5pin << 4);
3361
3362         return 0;
3363 }
3364
3365 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
3366                              int *available, int *mask)
3367 {
3368         int i;
3369         u8 src;
3370
3371         for (i = 0; i < data->pwm_num && *available; i++) {
3372                 int index;
3373
3374                 if (!regp[i])
3375                         continue;
3376                 src = nct6775_read_value(data, regp[i]);
3377                 src &= 0x1f;
3378                 if (!src || (*mask & (1 << src)))
3379                         continue;
3380                 if (src >= data->temp_label_num ||
3381                     !strlen(data->temp_label[src]))
3382                         continue;
3383
3384                 index = __ffs(*available);
3385                 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3386                 *available &= ~(1 << index);
3387                 *mask |= 1 << src;
3388         }
3389 }
3390
3391 static int nct6775_probe(struct platform_device *pdev)
3392 {
3393         struct device *dev = &pdev->dev;
3394         struct nct6775_sio_data *sio_data = dev->platform_data;
3395         struct nct6775_data *data;
3396         struct resource *res;
3397         int i, s, err = 0;
3398         int src, mask, available;
3399         const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3400         const u16 *reg_temp_alternate, *reg_temp_crit;
3401         int num_reg_temp;
3402         bool have_vid = false;
3403         u8 cr2a;
3404
3405         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3406         if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3407                                  DRVNAME))
3408                 return -EBUSY;
3409
3410         data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3411                             GFP_KERNEL);
3412         if (!data)
3413                 return -ENOMEM;
3414
3415         data->kind = sio_data->kind;
3416         data->addr = res->start;
3417         mutex_init(&data->lock);
3418         mutex_init(&data->update_lock);
3419         data->name = nct6775_device_names[data->kind];
3420         data->bank = 0xff;              /* Force initial bank selection */
3421         platform_set_drvdata(pdev, data);
3422
3423         switch (data->kind) {
3424         case nct6775:
3425                 data->in_num = 9;
3426                 data->pwm_num = 3;
3427                 data->auto_pwm_num = 6;
3428                 data->has_fan_div = true;
3429                 data->temp_fixed_num = 3;
3430
3431                 data->ALARM_BITS = NCT6775_ALARM_BITS;
3432
3433                 data->fan_from_reg = fan_from_reg16;
3434                 data->fan_from_reg_min = fan_from_reg8;
3435                 data->target_temp_mask = 0x7f;
3436                 data->tolerance_mask = 0x0f;
3437                 data->speed_tolerance_limit = 15;
3438
3439                 data->temp_label = nct6775_temp_label;
3440                 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
3441
3442                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3443                 data->REG_VBAT = NCT6775_REG_VBAT;
3444                 data->REG_DIODE = NCT6775_REG_DIODE;
3445                 data->REG_VIN = NCT6775_REG_IN;
3446                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3447                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3448                 data->REG_TARGET = NCT6775_REG_TARGET;
3449                 data->REG_FAN = NCT6775_REG_FAN;
3450                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3451                 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3452                 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3453                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3454                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3455                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3456                 data->REG_PWM[0] = NCT6775_REG_PWM;
3457                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3458                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3459                 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3460                 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3461                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3462                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3463                 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3464                 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3465                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3466                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3467                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3468                 data->REG_CRITICAL_TEMP_TOLERANCE
3469                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3470                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3471                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3472                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3473                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3474                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3475                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3476                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3477                 data->REG_ALARM = NCT6775_REG_ALARM;
3478
3479                 reg_temp = NCT6775_REG_TEMP;
3480                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3481                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3482                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3483                 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3484                 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3485                 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3486
3487                 break;
3488         case nct6776:
3489                 data->in_num = 9;
3490                 data->pwm_num = 3;
3491                 data->auto_pwm_num = 4;
3492                 data->has_fan_div = false;
3493                 data->temp_fixed_num = 3;
3494
3495                 data->ALARM_BITS = NCT6776_ALARM_BITS;
3496
3497                 data->fan_from_reg = fan_from_reg13;
3498                 data->fan_from_reg_min = fan_from_reg13;
3499                 data->target_temp_mask = 0xff;
3500                 data->tolerance_mask = 0x07;
3501                 data->speed_tolerance_limit = 63;
3502
3503                 data->temp_label = nct6776_temp_label;
3504                 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3505
3506                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3507                 data->REG_VBAT = NCT6775_REG_VBAT;
3508                 data->REG_DIODE = NCT6775_REG_DIODE;
3509                 data->REG_VIN = NCT6775_REG_IN;
3510                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3511                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3512                 data->REG_TARGET = NCT6775_REG_TARGET;
3513                 data->REG_FAN = NCT6775_REG_FAN;
3514                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3515                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3516                 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3517                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3518                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3519                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3520                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3521                 data->REG_PWM[0] = NCT6775_REG_PWM;
3522                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3523                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3524                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3525                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3526                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3527                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3528                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3529                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3530                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3531                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3532                 data->REG_CRITICAL_TEMP_TOLERANCE
3533                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3534                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3535                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3536                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3537                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3538                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3539                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3540                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3541                 data->REG_ALARM = NCT6775_REG_ALARM;
3542
3543                 reg_temp = NCT6775_REG_TEMP;
3544                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3545                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3546                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3547                 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3548                 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3549                 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3550
3551                 break;
3552         case nct6779:
3553                 data->in_num = 15;
3554                 data->pwm_num = 5;
3555                 data->auto_pwm_num = 4;
3556                 data->has_fan_div = false;
3557                 data->temp_fixed_num = 6;
3558
3559                 data->ALARM_BITS = NCT6779_ALARM_BITS;
3560
3561                 data->fan_from_reg = fan_from_reg13;
3562                 data->fan_from_reg_min = fan_from_reg13;
3563                 data->target_temp_mask = 0xff;
3564                 data->tolerance_mask = 0x07;
3565                 data->speed_tolerance_limit = 63;
3566
3567                 data->temp_label = nct6779_temp_label;
3568                 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3569
3570                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3571                 data->REG_VBAT = NCT6775_REG_VBAT;
3572                 data->REG_DIODE = NCT6775_REG_DIODE;
3573                 data->REG_VIN = NCT6779_REG_IN;
3574                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3575                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3576                 data->REG_TARGET = NCT6775_REG_TARGET;
3577                 data->REG_FAN = NCT6779_REG_FAN;
3578                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3579                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3580                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3581                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3582                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3583                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3584                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3585                 data->REG_PWM[0] = NCT6775_REG_PWM;
3586                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3587                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3588                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3589                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3590                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3591                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3592                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3593                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3594                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3595                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3596                 data->REG_CRITICAL_TEMP_TOLERANCE
3597                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3598                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3599                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3600                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3601                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3602                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3603                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3604                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3605                 data->REG_ALARM = NCT6779_REG_ALARM;
3606
3607                 reg_temp = NCT6779_REG_TEMP;
3608                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3609                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3610                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3611                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3612                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3613                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3614
3615                 break;
3616         default:
3617                 return -ENODEV;
3618         }
3619         data->have_in = (1 << data->in_num) - 1;
3620         data->have_temp = 0;
3621
3622         /*
3623          * On some boards, not all available temperature sources are monitored,
3624          * even though some of the monitoring registers are unused.
3625          * Get list of unused monitoring registers, then detect if any fan
3626          * controls are configured to use unmonitored temperature sources.
3627          * If so, assign the unmonitored temperature sources to available
3628          * monitoring registers.
3629          */
3630         mask = 0;
3631         available = 0;
3632         for (i = 0; i < num_reg_temp; i++) {
3633                 if (reg_temp[i] == 0)
3634                         continue;
3635
3636                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3637                 if (!src || (mask & (1 << src)))
3638                         available |= 1 << i;
3639
3640                 mask |= 1 << src;
3641         }
3642
3643         /*
3644          * Now find unmonitored temperature registers and enable monitoring
3645          * if additional monitoring registers are available.
3646          */
3647         add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
3648         add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
3649
3650         mask = 0;
3651         s = NUM_TEMP_FIXED;     /* First dynamic temperature attribute */
3652         for (i = 0; i < num_reg_temp; i++) {
3653                 if (reg_temp[i] == 0)
3654                         continue;
3655
3656                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3657                 if (!src || (mask & (1 << src)))
3658                         continue;
3659
3660                 if (src >= data->temp_label_num ||
3661                     !strlen(data->temp_label[src])) {
3662                         dev_info(dev,
3663                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3664                                  src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
3665                         continue;
3666                 }
3667
3668                 mask |= 1 << src;
3669
3670                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3671                 if (src <= data->temp_fixed_num) {
3672                         data->have_temp |= 1 << (src - 1);
3673                         data->have_temp_fixed |= 1 << (src - 1);
3674                         data->reg_temp[0][src - 1] = reg_temp[i];
3675                         data->reg_temp[1][src - 1] = reg_temp_over[i];
3676                         data->reg_temp[2][src - 1] = reg_temp_hyst[i];
3677                         data->reg_temp_config[src - 1] = reg_temp_config[i];
3678                         data->temp_src[src - 1] = src;
3679                         continue;
3680                 }
3681
3682                 if (s >= NUM_TEMP)
3683                         continue;
3684
3685                 /* Use dynamic index for other sources */
3686                 data->have_temp |= 1 << s;
3687                 data->reg_temp[0][s] = reg_temp[i];
3688                 data->reg_temp[1][s] = reg_temp_over[i];
3689                 data->reg_temp[2][s] = reg_temp_hyst[i];
3690                 data->reg_temp_config[s] = reg_temp_config[i];
3691                 if (reg_temp_crit[src - 1])
3692                         data->reg_temp[3][s] = reg_temp_crit[src - 1];
3693
3694                 data->temp_src[s] = src;
3695                 s++;
3696         }
3697
3698 #ifdef USE_ALTERNATE
3699         /*
3700          * Go through the list of alternate temp registers and enable
3701          * if possible.
3702          * The temperature is already monitored if the respective bit in <mask>
3703          * is set.
3704          */
3705         for (i = 0; i < data->temp_label_num - 1; i++) {
3706                 if (!reg_temp_alternate[i])
3707                         continue;
3708                 if (mask & (1 << (i + 1)))
3709                         continue;
3710                 if (i < data->temp_fixed_num) {
3711                         if (data->have_temp & (1 << i))
3712                                 continue;
3713                         data->have_temp |= 1 << i;
3714                         data->have_temp_fixed |= 1 << i;
3715                         data->reg_temp[0][i] = reg_temp_alternate[i];
3716                         data->reg_temp[1][i] = reg_temp_over[i];
3717                         data->reg_temp[2][i] = reg_temp_hyst[i];
3718                         data->temp_src[i] = i + 1;
3719                         continue;
3720                 }
3721
3722                 if (s >= NUM_TEMP)      /* Abort if no more space */
3723                         break;
3724
3725                 data->have_temp |= 1 << s;
3726                 data->reg_temp[0][s] = reg_temp_alternate[i];
3727                 data->temp_src[s] = i + 1;
3728                 s++;
3729         }
3730 #endif /* USE_ALTERNATE */
3731
3732         switch (data->kind) {
3733         case nct6775:
3734                 break;
3735         case nct6776:
3736                 /*
3737                  * On NCT6776, AUXTIN and VIN3 pins are shared.
3738                  * Only way to detect it is to check if AUXTIN is used
3739                  * as a temperature source, and if that source is
3740                  * enabled.
3741                  *
3742                  * If that is the case, disable in6, which reports VIN3.
3743                  * Otherwise disable temp3.
3744                  */
3745                 if (data->have_temp & (1 << 2)) {
3746                         u8 reg = nct6775_read_value(data,
3747                                                     data->reg_temp_config[2]);
3748                         if (reg & 0x01)
3749                                 data->have_temp &= ~(1 << 2);
3750                         else
3751                                 data->have_in &= ~(1 << 6);
3752                 }
3753                 break;
3754         case nct6779:
3755                 /*
3756                  * Shared pins:
3757                  *      VIN4 / AUXTIN0
3758                  *      VIN5 / AUXTIN1
3759                  *      VIN6 / AUXTIN2
3760                  *      VIN7 / AUXTIN3
3761                  *
3762                  * There does not seem to be a clean way to detect if VINx or
3763                  * AUXTINx is active, so for keep both sensor types enabled
3764                  * for now.
3765                  */
3766                 break;
3767         }
3768
3769         /* Initialize the chip */
3770         nct6775_init_device(data);
3771
3772         err = superio_enter(sio_data->sioreg);
3773         if (err)
3774                 return err;
3775
3776         cr2a = superio_inb(sio_data->sioreg, 0x2a);
3777         switch (data->kind) {
3778         case nct6775:
3779                 have_vid = (cr2a & 0x40);
3780                 break;
3781         case nct6776:
3782                 have_vid = (cr2a & 0x60) == 0x40;
3783                 break;
3784         case nct6779:
3785                 break;
3786         }
3787
3788         /*
3789          * Read VID value
3790          * We can get the VID input values directly at logical device D 0xe3.
3791          */
3792         if (have_vid) {
3793                 superio_select(sio_data->sioreg, NCT6775_LD_VID);
3794                 data->vid = superio_inb(sio_data->sioreg, 0xe3);
3795                 data->vrm = vid_which_vrm();
3796         }
3797
3798         if (fan_debounce) {
3799                 u8 tmp;
3800
3801                 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3802                 tmp = superio_inb(sio_data->sioreg,
3803                                   NCT6775_REG_CR_FAN_DEBOUNCE);
3804                 switch (data->kind) {
3805                 case nct6775:
3806                         tmp |= 0x1e;
3807                         break;
3808                 case nct6776:
3809                 case nct6779:
3810                         tmp |= 0x3e;
3811                         break;
3812                 }
3813                 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
3814                              tmp);
3815                 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
3816                          data->name);
3817         }
3818
3819         superio_exit(sio_data->sioreg);
3820
3821         if (have_vid) {
3822                 err = device_create_file(dev, &dev_attr_cpu0_vid);
3823                 if (err)
3824                         return err;
3825         }
3826
3827         err = nct6775_check_fan_inputs(sio_data, data);
3828         if (err)
3829                 goto exit_remove;
3830
3831         /* Read fan clock dividers immediately */
3832         nct6775_init_fan_common(dev, data);
3833
3834         /* Register sysfs hooks */
3835         for (i = 0; i < data->pwm_num; i++) {
3836                 if (!(data->has_pwm & (1 << i)))
3837                         continue;
3838
3839                 err = sysfs_create_group(&dev->kobj, &nct6775_group_pwm[i]);
3840                 if (err)
3841                         goto exit_remove;
3842
3843                 if (data->REG_PWM[3]) {
3844                         err = device_create_file(dev,
3845                                         &sda_pwm_max[i].dev_attr);
3846                         if (err)
3847                                 goto exit_remove;
3848                 }
3849                 if (data->REG_PWM[4]) {
3850                         err = device_create_file(dev,
3851                                         &sda_pwm_step[i].dev_attr);
3852                         if (err)
3853                                 goto exit_remove;
3854                 }
3855                 if (data->REG_PWM[6]) {
3856                         err = device_create_file(dev,
3857                                         &sda_weight_duty_base[i].dev_attr);
3858                         if (err)
3859                                 goto exit_remove;
3860                 }
3861         }
3862         for (i = 0; i < ARRAY_SIZE(sda_auto_pwm_arrays); i++) {
3863                 struct sensor_device_attribute_2 *attr =
3864                         &sda_auto_pwm_arrays[i];
3865
3866                 if (!(data->has_pwm & (1 << attr->nr)))
3867                         continue;
3868                 if (attr->index > data->auto_pwm_num)
3869                         continue;
3870                 err = device_create_file(dev, &attr->dev_attr);
3871                 if (err)
3872                         goto exit_remove;
3873         }
3874
3875         for (i = 0; i < data->in_num; i++) {
3876                 if (!(data->have_in & (1 << i)))
3877                         continue;
3878                 err = sysfs_create_group(&dev->kobj, &nct6775_group_in[i]);
3879                 if (err)
3880                         goto exit_remove;
3881         }
3882
3883         for (i = 0; i < 5; i++) {
3884                 if (data->has_fan & (1 << i)) {
3885                         err = device_create_file(dev,
3886                                                  &sda_fan_input[i].dev_attr);
3887                         if (err)
3888                                 goto exit_remove;
3889                         err = device_create_file(dev,
3890                                                  &sda_fan_alarm[i].dev_attr);
3891                         if (err)
3892                                 goto exit_remove;
3893                         if (data->kind != nct6776 &&
3894                             data->kind != nct6779) {
3895                                 err = device_create_file(dev,
3896                                                 &sda_fan_div[i].dev_attr);
3897                                 if (err)
3898                                         goto exit_remove;
3899                         }
3900                         if (data->has_fan_min & (1 << i)) {
3901                                 err = device_create_file(dev,
3902                                                 &sda_fan_min[i].dev_attr);
3903                                 if (err)
3904                                         goto exit_remove;
3905                         }
3906                         err = device_create_file(dev,
3907                                                 &sda_fan_pulses[i].dev_attr);
3908                         if (err)
3909                                 goto exit_remove;
3910                 }
3911         }
3912
3913         for (i = 0; i < NUM_TEMP; i++) {
3914                 if (!(data->have_temp & (1 << i)))
3915                         continue;
3916                 err = device_create_file(dev, &sda_temp_input[i].dev_attr);
3917                 if (err)
3918                         goto exit_remove;
3919                 if (data->temp_label) {
3920                         err = device_create_file(dev,
3921                                                  &sda_temp_label[i].dev_attr);
3922                         if (err)
3923                                 goto exit_remove;
3924                 }
3925                 if (data->reg_temp[1][i]) {
3926                         err = device_create_file(dev,
3927                                                  &sda_temp_max[i].dev_attr);
3928                         if (err)
3929                                 goto exit_remove;
3930                 }
3931                 if (data->reg_temp[2][i]) {
3932                         err = device_create_file(dev,
3933                                         &sda_temp_max_hyst[i].dev_attr);
3934                         if (err)
3935                                 goto exit_remove;
3936                 }
3937                 if (data->reg_temp[3][i]) {
3938                         err = device_create_file(dev,
3939                                                  &sda_temp_crit[i].dev_attr);
3940                         if (err)
3941                                 goto exit_remove;
3942                 }
3943                 if (!(data->have_temp_fixed & (1 << i)))
3944                         continue;
3945                 err = device_create_file(dev, &sda_temp_type[i].dev_attr);
3946                 if (err)
3947                         goto exit_remove;
3948                 err = device_create_file(dev, &sda_temp_offset[i].dev_attr);
3949                 if (err)
3950                         goto exit_remove;
3951                 if (i >= NUM_TEMP_ALARM ||
3952                     data->ALARM_BITS[TEMP_ALARM_BASE + i] < 0)
3953                         continue;
3954                 err = device_create_file(dev, &sda_temp_alarm[i].dev_attr);
3955                 if (err)
3956                         goto exit_remove;
3957         }
3958
3959         for (i = 0; i < ARRAY_SIZE(sda_caseopen); i++) {
3960                 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + i] < 0)
3961                         continue;
3962                 err = device_create_file(dev, &sda_caseopen[i].dev_attr);
3963                 if (err)
3964                         goto exit_remove;
3965         }
3966
3967         err = device_create_file(dev, &dev_attr_name);
3968         if (err)
3969                 goto exit_remove;
3970
3971         data->hwmon_dev = hwmon_device_register(dev);
3972         if (IS_ERR(data->hwmon_dev)) {
3973                 err = PTR_ERR(data->hwmon_dev);
3974                 goto exit_remove;
3975         }
3976
3977         return 0;
3978
3979 exit_remove:
3980         nct6775_device_remove_files(dev);
3981         return err;
3982 }
3983
3984 static int nct6775_remove(struct platform_device *pdev)
3985 {
3986         struct nct6775_data *data = platform_get_drvdata(pdev);
3987
3988         hwmon_device_unregister(data->hwmon_dev);
3989         nct6775_device_remove_files(&pdev->dev);
3990
3991         return 0;
3992 }
3993
3994 #ifdef CONFIG_PM
3995 static int nct6775_suspend(struct device *dev)
3996 {
3997         struct nct6775_data *data = nct6775_update_device(dev);
3998         struct nct6775_sio_data *sio_data = dev->platform_data;
3999
4000         mutex_lock(&data->update_lock);
4001         data->vbat = nct6775_read_value(data, data->REG_VBAT);
4002         if (sio_data->kind == nct6775) {
4003                 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
4004                 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
4005         }
4006         mutex_unlock(&data->update_lock);
4007
4008         return 0;
4009 }
4010
4011 static int nct6775_resume(struct device *dev)
4012 {
4013         struct nct6775_data *data = dev_get_drvdata(dev);
4014         struct nct6775_sio_data *sio_data = dev->platform_data;
4015         int i, j;
4016
4017         mutex_lock(&data->update_lock);
4018         data->bank = 0xff;              /* Force initial bank selection */
4019
4020         /* Restore limits */
4021         for (i = 0; i < data->in_num; i++) {
4022                 if (!(data->have_in & (1 << i)))
4023                         continue;
4024
4025                 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
4026                                     data->in[i][1]);
4027                 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
4028                                     data->in[i][2]);
4029         }
4030
4031         for (i = 0; i < 5; i++) {
4032                 if (!(data->has_fan_min & (1 << i)))
4033                         continue;
4034
4035                 nct6775_write_value(data, data->REG_FAN_MIN[i],
4036                                     data->fan_min[i]);
4037         }
4038
4039         for (i = 0; i < NUM_TEMP; i++) {
4040                 if (!(data->have_temp & (1 << i)))
4041                         continue;
4042
4043                 for (j = 1; j < 4; j++)
4044                         if (data->reg_temp[j][i])
4045                                 nct6775_write_temp(data, data->reg_temp[j][i],
4046                                                    data->temp[j][i]);
4047         }
4048
4049         /* Restore other settings */
4050         nct6775_write_value(data, data->REG_VBAT, data->vbat);
4051         if (sio_data->kind == nct6775) {
4052                 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
4053                 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
4054         }
4055
4056         /* Force re-reading all values */
4057         data->valid = false;
4058         mutex_unlock(&data->update_lock);
4059
4060         return 0;
4061 }
4062
4063 static const struct dev_pm_ops nct6775_dev_pm_ops = {
4064         .suspend = nct6775_suspend,
4065         .resume = nct6775_resume,
4066 };
4067
4068 #define NCT6775_DEV_PM_OPS      (&nct6775_dev_pm_ops)
4069 #else
4070 #define NCT6775_DEV_PM_OPS      NULL
4071 #endif /* CONFIG_PM */
4072
4073 static struct platform_driver nct6775_driver = {
4074         .driver = {
4075                 .owner  = THIS_MODULE,
4076                 .name   = DRVNAME,
4077                 .pm     = NCT6775_DEV_PM_OPS,
4078         },
4079         .probe          = nct6775_probe,
4080         .remove         = nct6775_remove,
4081 };
4082
4083 /* nct6775_find() looks for a '627 in the Super-I/O config space */
4084 static int __init nct6775_find(int sioaddr, unsigned short *addr,
4085                                struct nct6775_sio_data *sio_data)
4086 {
4087         static const char sio_name_NCT6775[] __initconst = "NCT6775F";
4088         static const char sio_name_NCT6776[] __initconst = "NCT6776F";
4089         static const char sio_name_NCT6779[] __initconst = "NCT6779D";
4090
4091         u16 val;
4092         const char *sio_name;
4093         int err;
4094
4095         err = superio_enter(sioaddr);
4096         if (err)
4097                 return err;
4098
4099         if (force_id)
4100                 val = force_id;
4101         else
4102                 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
4103                     | superio_inb(sioaddr, SIO_REG_DEVID + 1);
4104         switch (val & SIO_ID_MASK) {
4105         case SIO_NCT6775_ID:
4106                 sio_data->kind = nct6775;
4107                 sio_name = sio_name_NCT6775;
4108                 break;
4109         case SIO_NCT6776_ID:
4110                 sio_data->kind = nct6776;
4111                 sio_name = sio_name_NCT6776;
4112                 break;
4113         case SIO_NCT6779_ID:
4114                 sio_data->kind = nct6779;
4115                 sio_name = sio_name_NCT6779;
4116                 break;
4117         default:
4118                 if (val != 0xffff)
4119                         pr_debug("unsupported chip ID: 0x%04x\n", val);
4120                 superio_exit(sioaddr);
4121                 return -ENODEV;
4122         }
4123
4124         /* We have a known chip, find the HWM I/O address */
4125         superio_select(sioaddr, NCT6775_LD_HWM);
4126         val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
4127             | superio_inb(sioaddr, SIO_REG_ADDR + 1);
4128         *addr = val & IOREGION_ALIGNMENT;
4129         if (*addr == 0) {
4130                 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
4131                 superio_exit(sioaddr);
4132                 return -ENODEV;
4133         }
4134
4135         /* Activate logical device if needed */
4136         val = superio_inb(sioaddr, SIO_REG_ENABLE);
4137         if (!(val & 0x01)) {
4138                 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
4139                 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
4140         }
4141
4142         superio_exit(sioaddr);
4143         pr_info("Found %s chip at %#x\n", sio_name, *addr);
4144         sio_data->sioreg = sioaddr;
4145
4146         return 0;
4147 }
4148
4149 /*
4150  * when Super-I/O functions move to a separate file, the Super-I/O
4151  * bus will manage the lifetime of the device and this module will only keep
4152  * track of the nct6775 driver. But since we platform_device_alloc(), we
4153  * must keep track of the device
4154  */
4155 static struct platform_device *pdev;
4156
4157 static int __init sensors_nct6775_init(void)
4158 {
4159         int err;
4160         unsigned short address;
4161         struct resource res;
4162         struct nct6775_sio_data sio_data;
4163
4164         /*
4165          * initialize sio_data->kind and sio_data->sioreg.
4166          *
4167          * when Super-I/O functions move to a separate file, the Super-I/O
4168          * driver will probe 0x2e and 0x4e and auto-detect the presence of a
4169          * nct6775 hardware monitor, and call probe()
4170          */
4171         if (nct6775_find(0x2e, &address, &sio_data) &&
4172             nct6775_find(0x4e, &address, &sio_data))
4173                 return -ENODEV;
4174
4175         err = platform_driver_register(&nct6775_driver);
4176         if (err)
4177                 goto exit;
4178
4179         pdev = platform_device_alloc(DRVNAME, address);
4180         if (!pdev) {
4181                 err = -ENOMEM;
4182                 pr_err("Device allocation failed\n");
4183                 goto exit_unregister;
4184         }
4185
4186         err = platform_device_add_data(pdev, &sio_data,
4187                                        sizeof(struct nct6775_sio_data));
4188         if (err) {
4189                 pr_err("Platform data allocation failed\n");
4190                 goto exit_device_put;
4191         }
4192
4193         memset(&res, 0, sizeof(res));
4194         res.name = DRVNAME;
4195         res.start = address + IOREGION_OFFSET;
4196         res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
4197         res.flags = IORESOURCE_IO;
4198
4199         err = acpi_check_resource_conflict(&res);
4200         if (err)
4201                 goto exit_device_put;
4202
4203         err = platform_device_add_resources(pdev, &res, 1);
4204         if (err) {
4205                 pr_err("Device resource addition failed (%d)\n", err);
4206                 goto exit_device_put;
4207         }
4208
4209         /* platform_device_add calls probe() */
4210         err = platform_device_add(pdev);
4211         if (err) {
4212                 pr_err("Device addition failed (%d)\n", err);
4213                 goto exit_device_put;
4214         }
4215
4216         return 0;
4217
4218 exit_device_put:
4219         platform_device_put(pdev);
4220 exit_unregister:
4221         platform_driver_unregister(&nct6775_driver);
4222 exit:
4223         return err;
4224 }
4225
4226 static void __exit sensors_nct6775_exit(void)
4227 {
4228         platform_device_unregister(pdev);
4229         platform_driver_unregister(&nct6775_driver);
4230 }
4231
4232 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4233 MODULE_DESCRIPTION("NCT6775F/NCT6776F/NCT6779D driver");
4234 MODULE_LICENSE("GPL");
4235
4236 module_init(sensors_nct6775_init);
4237 module_exit(sensors_nct6775_exit);