2 * nct6775 - Driver for the hardware monitoring functionality of
3 * Nuvoton NCT677x Super-I/O chips
5 * Copyright (C) 2012 Guenter Roeck <linux@roeck-us.net>
7 * Derived from w83627ehf driver
8 * Copyright (C) 2005-2012 Jean Delvare <khali@linux-fr.org>
9 * Copyright (C) 2006 Yuan Mu (Winbond),
10 * Rudolf Marek <r.marek@assembler.cz>
11 * David Hubbard <david.c.hubbard@gmail.com>
12 * Daniel J Blueman <daniel.blueman@gmail.com>
13 * Copyright (C) 2010 Sheng-Yuan Huang (Nuvoton) (PS00)
15 * Shamelessly ripped from the w83627hf driver
16 * Copyright (C) 2003 Mark Studebaker
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
33 * Supports the following chips:
35 * Chip #vin #fan #pwm #temp chip IDs man ID
36 * nct6775f 9 4 3 6+3 0xb470 0xc1 0x5ca3
37 * nct6776f 9 5 3 6+3 0xc330 0xc1 0x5ca3
38 * nct6779d 15 5 5 2+6 0xc560 0xc1 0x5ca3
40 * #temp lists the number of monitored temperature sources (first value) plus
41 * the number of directly connectable temperature sensors (second value).
44 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
46 #include <linux/module.h>
47 #include <linux/init.h>
48 #include <linux/slab.h>
49 #include <linux/jiffies.h>
50 #include <linux/platform_device.h>
51 #include <linux/hwmon.h>
52 #include <linux/hwmon-sysfs.h>
53 #include <linux/hwmon-vid.h>
54 #include <linux/err.h>
55 #include <linux/mutex.h>
56 #include <linux/acpi.h>
63 enum kinds { nct6775, nct6776, nct6779 };
65 /* used to set data->name = nct6775_device_names[data->sio_kind] */
66 static const char * const nct6775_device_names[] = {
72 static unsigned short force_id;
73 module_param(force_id, ushort, 0);
74 MODULE_PARM_DESC(force_id, "Override the detected device ID");
76 static unsigned short fan_debounce;
77 module_param(fan_debounce, ushort, 0);
78 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
80 #define DRVNAME "nct6775"
83 * Super-I/O constants and functions
86 #define NCT6775_LD_ACPI 0x0a
87 #define NCT6775_LD_HWM 0x0b
88 #define NCT6775_LD_VID 0x0d
90 #define SIO_REG_LDSEL 0x07 /* Logical device select */
91 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
92 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
93 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
95 #define SIO_NCT6775_ID 0xb470
96 #define SIO_NCT6776_ID 0xc330
97 #define SIO_NCT6779_ID 0xc560
98 #define SIO_ID_MASK 0xFFF0
100 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
103 superio_outb(int ioreg, int reg, int val)
106 outb(val, ioreg + 1);
110 superio_inb(int ioreg, int reg)
113 return inb(ioreg + 1);
117 superio_select(int ioreg, int ld)
119 outb(SIO_REG_LDSEL, ioreg);
124 superio_enter(int ioreg)
127 * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
129 if (!request_muxed_region(ioreg, 2, DRVNAME))
139 superio_exit(int ioreg)
143 outb(0x02, ioreg + 1);
144 release_region(ioreg, 2);
151 #define IOREGION_ALIGNMENT (~7)
152 #define IOREGION_OFFSET 5
153 #define IOREGION_LENGTH 2
154 #define ADDR_REG_OFFSET 0
155 #define DATA_REG_OFFSET 1
157 #define NCT6775_REG_BANK 0x4E
158 #define NCT6775_REG_CONFIG 0x40
161 * Not currently used:
162 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
163 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
164 * REG_MAN_ID is at port 0x4f
165 * REG_CHIP_ID is at port 0x58
168 #define NUM_TEMP 10 /* Max number of temp attribute sets w/ limits*/
169 #define NUM_TEMP_FIXED 6 /* Max number of fixed temp attribute sets */
171 #define NUM_REG_ALARM 4 /* Max number of alarm registers */
173 /* Common and NCT6775 specific data */
175 /* Voltage min/max registers for nr=7..14 are in bank 5 */
177 static const u16 NCT6775_REG_IN_MAX[] = {
178 0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
179 0x55c, 0x55e, 0x560, 0x562 };
180 static const u16 NCT6775_REG_IN_MIN[] = {
181 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
182 0x55d, 0x55f, 0x561, 0x563 };
183 static const u16 NCT6775_REG_IN[] = {
184 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
187 #define NCT6775_REG_VBAT 0x5D
188 #define NCT6775_REG_DIODE 0x5E
190 #define NCT6775_REG_FANDIV1 0x506
191 #define NCT6775_REG_FANDIV2 0x507
193 #define NCT6775_REG_CR_FAN_DEBOUNCE 0xf0
195 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
197 /* 0..15 voltages, 16..23 fans, 24..31 temperatures */
199 static const s8 NCT6775_ALARM_BITS[] = {
200 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
201 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
203 6, 7, 11, 10, 23, /* fan1..fan5 */
204 -1, -1, -1, /* unused */
205 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
206 12, -1 }; /* intrusion0, intrusion1 */
208 #define FAN_ALARM_BASE 16
209 #define TEMP_ALARM_BASE 24
210 #define INTRUSION_ALARM_BASE 30
212 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
213 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
215 /* DC or PWM output fan configuration */
216 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
217 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
219 /* Advanced Fan control, some values are common for all fans */
221 static const u16 NCT6775_REG_TARGET[] = { 0x101, 0x201, 0x301, 0x801, 0x901 };
222 static const u16 NCT6775_REG_FAN_MODE[] = { 0x102, 0x202, 0x302, 0x802, 0x902 };
223 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
224 0x103, 0x203, 0x303, 0x803, 0x903 };
225 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
226 0x104, 0x204, 0x304, 0x804, 0x904 };
227 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
228 0x105, 0x205, 0x305, 0x805, 0x905 };
229 static const u16 NCT6775_REG_FAN_START_OUTPUT[]
230 = { 0x106, 0x206, 0x306, 0x806, 0x906 };
231 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
232 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
234 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
235 0x107, 0x207, 0x307, 0x807, 0x907 };
236 static const u16 NCT6775_REG_PWM[] = { 0x109, 0x209, 0x309, 0x809, 0x909 };
237 static const u16 NCT6775_REG_PWM_READ[] = { 0x01, 0x03, 0x11, 0x13, 0x15 };
239 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
240 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
241 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
243 static const u16 NCT6775_REG_TEMP[] = {
244 0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
246 static const u16 NCT6775_REG_TEMP_CONFIG[] = {
247 0, 0x152, 0x252, 0x628, 0x629, 0x62A };
248 static const u16 NCT6775_REG_TEMP_HYST[] = {
249 0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
250 static const u16 NCT6775_REG_TEMP_OVER[] = {
251 0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
253 static const u16 NCT6775_REG_TEMP_SOURCE[] = {
254 0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
256 static const u16 NCT6775_REG_TEMP_SEL[] = {
257 0x100, 0x200, 0x300, 0x800, 0x900 };
259 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
260 0x139, 0x239, 0x339, 0x839, 0x939 };
261 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
262 0x13a, 0x23a, 0x33a, 0x83a, 0x93a };
263 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
264 0x13b, 0x23b, 0x33b, 0x83b, 0x93b };
265 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
266 0x13c, 0x23c, 0x33c, 0x83c, 0x93c };
267 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
268 0x13d, 0x23d, 0x33d, 0x83d, 0x93d };
270 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
272 static const u16 NCT6775_REG_AUTO_TEMP[] = {
273 0x121, 0x221, 0x321, 0x821, 0x921 };
274 static const u16 NCT6775_REG_AUTO_PWM[] = {
275 0x127, 0x227, 0x327, 0x827, 0x927 };
277 #define NCT6775_AUTO_TEMP(data, nr, p) ((data)->REG_AUTO_TEMP[nr] + (p))
278 #define NCT6775_AUTO_PWM(data, nr, p) ((data)->REG_AUTO_PWM[nr] + (p))
280 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
282 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
283 0x135, 0x235, 0x335, 0x835, 0x935 };
284 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
285 0x138, 0x238, 0x338, 0x838, 0x938 };
287 static const char *const nct6775_temp_label[] = {
301 "PCH_CHIP_CPU_MAX_TEMP",
311 static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
312 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
314 static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
315 = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
318 /* NCT6776 specific data */
320 static const s8 NCT6776_ALARM_BITS[] = {
321 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
322 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
324 6, 7, 11, 10, 23, /* fan1..fan5 */
325 -1, -1, -1, /* unused */
326 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
327 12, 9 }; /* intrusion0, intrusion1 */
329 static const u16 NCT6776_REG_TOLERANCE_H[] = {
330 0x10c, 0x20c, 0x30c, 0x80c, 0x90c };
332 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0 };
333 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0 };
335 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
336 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
338 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
339 0x13e, 0x23e, 0x33e, 0x83e, 0x93e };
341 static const u16 NCT6776_REG_TEMP_CONFIG[11] = {
342 0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
344 static const char *const nct6776_temp_label[] = {
359 "PCH_CHIP_CPU_MAX_TEMP",
370 static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
371 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
373 static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
374 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
376 /* NCT6779 specific data */
378 static const u16 NCT6779_REG_IN[] = {
379 0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
380 0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
382 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
383 0x459, 0x45A, 0x45B, 0x568 };
385 static const s8 NCT6779_ALARM_BITS[] = {
386 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
387 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */
389 6, 7, 11, 10, 23, /* fan1..fan5 */
390 -1, -1, -1, /* unused */
391 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
392 12, 9 }; /* intrusion0, intrusion1 */
394 static const u16 NCT6779_REG_FAN[] = { 0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8 };
395 static const u16 NCT6779_REG_FAN_PULSES[] = {
396 0x644, 0x645, 0x646, 0x647, 0x648 };
398 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
399 0x136, 0x236, 0x336, 0x836, 0x936 };
400 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
401 0x137, 0x237, 0x337, 0x837, 0x937 };
403 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
404 static const u16 NCT6779_REG_TEMP_HYST[] = { 0x3a, 0x153, 0, 0, 0, 0 };
405 static const u16 NCT6779_REG_TEMP_OVER[] = { 0x39, 0x155, 0, 0, 0, 0 };
406 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
407 0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
409 static const u16 NCT6779_REG_TEMP_CONFIG[11] = { 0x18, 0x152 };
411 static const char *const nct6779_temp_label[] = {
430 "PCH_CHIP_CPU_MAX_TEMP",
441 static const u16 NCT6779_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6779_temp_label) - 1]
442 = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
443 0, 0, 0, 0, 0, 0, 0, 0,
444 0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
447 static const u16 NCT6779_REG_TEMP_CRIT[ARRAY_SIZE(nct6779_temp_label) - 1]
448 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
450 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
452 if (mode == 0 && pwm == 255)
457 static int pwm_enable_to_reg(enum pwm_enable mode)
468 /* 1 is DC mode, output in ms */
469 static unsigned int step_time_from_reg(u8 reg, u8 mode)
471 return mode ? 400 * reg : 100 * reg;
474 static u8 step_time_to_reg(unsigned int msec, u8 mode)
476 return clamp_val((mode ? (msec + 200) / 400 :
477 (msec + 50) / 100), 1, 255);
480 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
482 if (reg == 0 || reg == 255)
484 return 1350000U / (reg << divreg);
487 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
489 if ((reg & 0xff1f) == 0xff1f)
492 reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
497 return 1350000U / reg;
500 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
502 if (reg == 0 || reg == 0xffff)
506 * Even though the registers are 16 bit wide, the fan divisor
509 return 1350000U / (reg << divreg);
512 static u16 fan_to_reg(u32 fan, unsigned int divreg)
517 return (1350000U / fan) >> divreg;
520 static inline unsigned int
527 * Some of the voltage inputs have internal scaling, the tables below
528 * contain 8 (the ADC LSB in mV) * scaling factor * 100
530 static const u16 scale_in[15] = {
531 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
535 static inline long in_from_reg(u8 reg, u8 nr)
537 return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
540 static inline u8 in_to_reg(u32 val, u8 nr)
542 return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
546 * Data structures and manipulation thereof
549 struct nct6775_data {
550 int addr; /* IO base of hw monitor block */
554 struct device *hwmon_dev;
557 u16 reg_temp[4][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
560 u8 temp_src[NUM_TEMP];
561 u16 reg_temp_config[NUM_TEMP];
562 const char * const *temp_label;
569 const s8 *ALARM_BITS;
572 const u16 *REG_IN_MINMAX[2];
574 const u16 *REG_TARGET;
576 const u16 *REG_FAN_MODE;
577 const u16 *REG_FAN_MIN;
578 const u16 *REG_FAN_PULSES;
579 const u16 *REG_FAN_TIME[3];
581 const u16 *REG_TOLERANCE_H;
583 const u8 *REG_PWM_MODE;
584 const u8 *PWM_MODE_MASK;
586 const u16 *REG_PWM[7]; /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
587 * [3]=pwm_max, [4]=pwm_step,
588 * [5]=weight_duty_step, [6]=weight_duty_base
590 const u16 *REG_PWM_READ;
592 const u16 *REG_AUTO_TEMP;
593 const u16 *REG_AUTO_PWM;
595 const u16 *REG_CRITICAL_TEMP;
596 const u16 *REG_CRITICAL_TEMP_TOLERANCE;
598 const u16 *REG_TEMP_SOURCE; /* temp register sources */
599 const u16 *REG_TEMP_SEL;
600 const u16 *REG_WEIGHT_TEMP_SEL;
601 const u16 *REG_WEIGHT_TEMP[3]; /* 0=base, 1=tolerance, 2=step */
603 const u16 *REG_TEMP_OFFSET;
605 const u16 *REG_ALARM;
607 unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
608 unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
610 struct mutex update_lock;
611 bool valid; /* true if following fields are valid */
612 unsigned long last_updated; /* In jiffies */
614 /* Register values */
615 u8 bank; /* current register bank */
616 u8 in_num; /* number of in inputs we have */
617 u8 in[15][3]; /* [0]=in, [1]=in_max, [2]=in_min */
623 u8 has_fan; /* some fan inputs can be disabled */
624 u8 has_fan_min; /* some fans don't have min register */
627 u8 temp_fixed_num; /* 3 or 6 */
628 u8 temp_type[NUM_TEMP_FIXED];
629 s8 temp_offset[NUM_TEMP_FIXED];
630 s16 temp[4][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
634 u8 pwm_num; /* number of pwm */
635 u8 pwm_mode[5]; /* 1->DC variable voltage, 0->PWM variable duty cycle */
636 enum pwm_enable pwm_enable[5];
639 * 2->thermal cruise mode (also called SmartFan I)
640 * 3->fan speed cruise mode
642 * 5->enhanced variable thermal cruise (SmartFan IV)
644 u8 pwm[7][5]; /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
645 * [3]=pwm_max, [4]=pwm_step,
646 * [5]=weight_duty_step, [6]=weight_duty_base
652 u32 target_speed_tolerance[5];
653 u8 speed_tolerance_limit;
655 u8 temp_tolerance[2][5];
658 u8 fan_time[3][5]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
660 /* Automatic fan speed control registers */
665 u8 pwm_weight_temp_sel[5];
666 u8 weight_temp[3][5]; /* 0->temp_step, 1->temp_step_tol,
677 /* Remember extra register values over suspend/resume */
684 struct nct6775_sio_data {
689 static bool is_word_sized(struct nct6775_data *data, u16 reg)
691 switch (data->kind) {
693 return (((reg & 0xff00) == 0x100 ||
694 (reg & 0xff00) == 0x200) &&
695 ((reg & 0x00ff) == 0x50 ||
696 (reg & 0x00ff) == 0x53 ||
697 (reg & 0x00ff) == 0x55)) ||
698 (reg & 0xfff0) == 0x630 ||
699 reg == 0x640 || reg == 0x642 ||
701 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
702 reg == 0x73 || reg == 0x75 || reg == 0x77;
704 return (((reg & 0xff00) == 0x100 ||
705 (reg & 0xff00) == 0x200) &&
706 ((reg & 0x00ff) == 0x50 ||
707 (reg & 0x00ff) == 0x53 ||
708 (reg & 0x00ff) == 0x55)) ||
709 (reg & 0xfff0) == 0x630 ||
711 reg == 0x640 || reg == 0x642 ||
712 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
713 reg == 0x73 || reg == 0x75 || reg == 0x77;
715 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
716 ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x09) ||
718 reg == 0x63a || reg == 0x63c || reg == 0x63e ||
719 reg == 0x640 || reg == 0x642 ||
720 reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
727 * On older chips, only registers 0x50-0x5f are banked.
728 * On more recent chips, all registers are banked.
729 * Assume that is the case and set the bank number for each access.
730 * Cache the bank number so it only needs to be set if it changes.
732 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
735 if (data->bank != bank) {
736 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
737 outb_p(bank, data->addr + DATA_REG_OFFSET);
742 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
744 int res, word_sized = is_word_sized(data, reg);
746 mutex_lock(&data->lock);
748 nct6775_set_bank(data, reg);
749 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
750 res = inb_p(data->addr + DATA_REG_OFFSET);
752 outb_p((reg & 0xff) + 1,
753 data->addr + ADDR_REG_OFFSET);
754 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
757 mutex_unlock(&data->lock);
761 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
763 int word_sized = is_word_sized(data, reg);
765 mutex_lock(&data->lock);
767 nct6775_set_bank(data, reg);
768 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
770 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
771 outb_p((reg & 0xff) + 1,
772 data->addr + ADDR_REG_OFFSET);
774 outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
776 mutex_unlock(&data->lock);
780 /* We left-align 8-bit temperature values to make the code simpler */
781 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
785 res = nct6775_read_value(data, reg);
786 if (!is_word_sized(data, reg))
792 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
794 if (!is_word_sized(data, reg))
796 return nct6775_write_value(data, reg, value);
799 /* This function assumes that the caller holds data->update_lock */
800 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
806 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
807 | (data->fan_div[0] & 0x7);
808 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
811 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
812 | ((data->fan_div[1] << 4) & 0x70);
813 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
816 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
817 | (data->fan_div[2] & 0x7);
818 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
821 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
822 | ((data->fan_div[3] << 4) & 0x70);
823 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
828 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
830 if (data->kind == nct6775)
831 nct6775_write_fan_div(data, nr);
834 static void nct6775_update_fan_div(struct nct6775_data *data)
838 i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
839 data->fan_div[0] = i & 0x7;
840 data->fan_div[1] = (i & 0x70) >> 4;
841 i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
842 data->fan_div[2] = i & 0x7;
843 if (data->has_fan & (1<<3))
844 data->fan_div[3] = (i & 0x70) >> 4;
847 static void nct6775_update_fan_div_common(struct nct6775_data *data)
849 if (data->kind == nct6775)
850 nct6775_update_fan_div(data);
853 static void nct6775_init_fan_div(struct nct6775_data *data)
857 nct6775_update_fan_div_common(data);
859 * For all fans, start with highest divider value if the divider
860 * register is not initialized. This ensures that we get a
861 * reading from the fan count register, even if it is not optimal.
862 * We'll compute a better divider later on.
864 for (i = 0; i < 3; i++) {
865 if (!(data->has_fan & (1 << i)))
867 if (data->fan_div[i] == 0) {
868 data->fan_div[i] = 7;
869 nct6775_write_fan_div_common(data, i);
874 static void nct6775_init_fan_common(struct device *dev,
875 struct nct6775_data *data)
880 if (data->has_fan_div)
881 nct6775_init_fan_div(data);
884 * If fan_min is not set (0), set it to 0xff to disable it. This
885 * prevents the unnecessary warning when fanX_min is reported as 0.
887 for (i = 0; i < 5; i++) {
888 if (data->has_fan_min & (1 << i)) {
889 reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
891 nct6775_write_value(data, data->REG_FAN_MIN[i],
892 data->has_fan_div ? 0xff
898 static void nct6775_select_fan_div(struct device *dev,
899 struct nct6775_data *data, int nr, u16 reg)
901 u8 fan_div = data->fan_div[nr];
904 if (!data->has_fan_div)
908 * If we failed to measure the fan speed, or the reported value is not
909 * in the optimal range, and the clock divider can be modified,
910 * let's try that for next time.
912 if (reg == 0x00 && fan_div < 0x07)
914 else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
917 if (fan_div != data->fan_div[nr]) {
918 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
919 nr + 1, div_from_reg(data->fan_div[nr]),
920 div_from_reg(fan_div));
922 /* Preserve min limit if possible */
923 if (data->has_fan_min & (1 << nr)) {
924 fan_min = data->fan_min[nr];
925 if (fan_div > data->fan_div[nr]) {
926 if (fan_min != 255 && fan_min > 1)
929 if (fan_min != 255) {
935 if (fan_min != data->fan_min[nr]) {
936 data->fan_min[nr] = fan_min;
937 nct6775_write_value(data, data->REG_FAN_MIN[nr],
941 data->fan_div[nr] = fan_div;
942 nct6775_write_fan_div_common(data, nr);
946 static void nct6775_update_pwm(struct device *dev)
948 struct nct6775_data *data = dev_get_drvdata(dev);
953 for (i = 0; i < data->pwm_num; i++) {
954 if (!(data->has_pwm & (1 << i)))
957 duty_is_dc = data->REG_PWM_MODE[i] &&
958 (nct6775_read_value(data, data->REG_PWM_MODE[i])
959 & data->PWM_MODE_MASK[i]);
960 data->pwm_mode[i] = duty_is_dc;
962 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
963 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
964 if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
966 = nct6775_read_value(data,
967 data->REG_PWM[j][i]);
971 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
972 (fanmodecfg >> 4) & 7);
974 if (!data->temp_tolerance[0][i] ||
975 data->pwm_enable[i] != speed_cruise)
976 data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
977 if (!data->target_speed_tolerance[i] ||
978 data->pwm_enable[i] == speed_cruise) {
979 u8 t = fanmodecfg & 0x0f;
980 if (data->REG_TOLERANCE_H) {
981 t |= (nct6775_read_value(data,
982 data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
984 data->target_speed_tolerance[i] = t;
987 data->temp_tolerance[1][i] =
988 nct6775_read_value(data,
989 data->REG_CRITICAL_TEMP_TOLERANCE[i]);
991 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
992 data->pwm_temp_sel[i] = reg & 0x1f;
993 /* If fan can stop, report floor as 0 */
997 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
998 data->pwm_weight_temp_sel[i] = reg & 0x1f;
999 /* If weight is disabled, report weight source as 0 */
1000 if (j == 1 && !(reg & 0x80))
1001 data->pwm_weight_temp_sel[i] = 0;
1003 /* Weight temp data */
1004 for (j = 0; j < 3; j++) {
1005 data->weight_temp[j][i]
1006 = nct6775_read_value(data,
1007 data->REG_WEIGHT_TEMP[j][i]);
1012 static void nct6775_update_pwm_limits(struct device *dev)
1014 struct nct6775_data *data = dev_get_drvdata(dev);
1019 for (i = 0; i < data->pwm_num; i++) {
1020 if (!(data->has_pwm & (1 << i)))
1023 for (j = 0; j < 3; j++) {
1024 data->fan_time[j][i] =
1025 nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1028 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1029 /* Update only in matching mode or if never updated */
1030 if (!data->target_temp[i] ||
1031 data->pwm_enable[i] == thermal_cruise)
1032 data->target_temp[i] = reg_t & data->target_temp_mask;
1033 if (!data->target_speed[i] ||
1034 data->pwm_enable[i] == speed_cruise) {
1035 if (data->REG_TOLERANCE_H) {
1036 reg_t |= (nct6775_read_value(data,
1037 data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1039 data->target_speed[i] = reg_t;
1042 for (j = 0; j < data->auto_pwm_num; j++) {
1043 data->auto_pwm[i][j] =
1044 nct6775_read_value(data,
1045 NCT6775_AUTO_PWM(data, i, j));
1046 data->auto_temp[i][j] =
1047 nct6775_read_value(data,
1048 NCT6775_AUTO_TEMP(data, i, j));
1051 /* critical auto_pwm temperature data */
1052 data->auto_temp[i][data->auto_pwm_num] =
1053 nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1055 switch (data->kind) {
1057 reg = nct6775_read_value(data,
1058 NCT6775_REG_CRITICAL_ENAB[i]);
1059 data->auto_pwm[i][data->auto_pwm_num] =
1060 (reg & 0x02) ? 0xff : 0x00;
1063 data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1066 reg = nct6775_read_value(data,
1067 NCT6779_REG_CRITICAL_PWM_ENABLE[i]);
1069 data->auto_pwm[i][data->auto_pwm_num] =
1070 nct6775_read_value(data,
1071 NCT6779_REG_CRITICAL_PWM[i]);
1073 data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1079 static struct nct6775_data *nct6775_update_device(struct device *dev)
1081 struct nct6775_data *data = dev_get_drvdata(dev);
1084 mutex_lock(&data->update_lock);
1086 if (time_after(jiffies, data->last_updated + HZ + HZ/2)
1088 /* Fan clock dividers */
1089 nct6775_update_fan_div_common(data);
1091 /* Measured voltages and limits */
1092 for (i = 0; i < data->in_num; i++) {
1093 if (!(data->have_in & (1 << i)))
1096 data->in[i][0] = nct6775_read_value(data,
1098 data->in[i][1] = nct6775_read_value(data,
1099 data->REG_IN_MINMAX[0][i]);
1100 data->in[i][2] = nct6775_read_value(data,
1101 data->REG_IN_MINMAX[1][i]);
1104 /* Measured fan speeds and limits */
1105 for (i = 0; i < 5; i++) {
1108 if (!(data->has_fan & (1 << i)))
1111 reg = nct6775_read_value(data, data->REG_FAN[i]);
1112 data->rpm[i] = data->fan_from_reg(reg,
1115 if (data->has_fan_min & (1 << i))
1116 data->fan_min[i] = nct6775_read_value(data,
1117 data->REG_FAN_MIN[i]);
1118 data->fan_pulses[i] =
1119 nct6775_read_value(data, data->REG_FAN_PULSES[i]);
1121 nct6775_select_fan_div(dev, data, i, reg);
1124 nct6775_update_pwm(dev);
1125 nct6775_update_pwm_limits(dev);
1127 /* Measured temperatures and limits */
1128 for (i = 0; i < NUM_TEMP; i++) {
1129 if (!(data->have_temp & (1 << i)))
1131 for (j = 0; j < 4; j++) {
1132 if (data->reg_temp[j][i])
1134 = nct6775_read_temp(data,
1135 data->reg_temp[j][i]);
1137 if (!(data->have_temp_fixed & (1 << i)))
1139 data->temp_offset[i]
1140 = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1144 for (i = 0; i < NUM_REG_ALARM; i++) {
1146 if (!data->REG_ALARM[i])
1148 alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1149 data->alarms |= ((u64)alarm) << (i << 3);
1152 data->last_updated = jiffies;
1156 mutex_unlock(&data->update_lock);
1161 * Sysfs callback functions
1164 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1166 struct nct6775_data *data = nct6775_update_device(dev);
1167 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1169 int index = sattr->index;
1170 return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1174 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1177 struct nct6775_data *data = dev_get_drvdata(dev);
1178 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1180 int index = sattr->index;
1182 int err = kstrtoul(buf, 10, &val);
1185 mutex_lock(&data->update_lock);
1186 data->in[nr][index] = in_to_reg(val, nr);
1187 nct6775_write_value(data, data->REG_IN_MINMAX[index-1][nr],
1188 data->in[nr][index]);
1189 mutex_unlock(&data->update_lock);
1194 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1196 struct nct6775_data *data = nct6775_update_device(dev);
1197 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1198 int nr = data->ALARM_BITS[sattr->index];
1199 return sprintf(buf, "%u\n",
1200 (unsigned int)((data->alarms >> nr) & 0x01));
1203 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in_reg, NULL, 0, 0);
1204 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in_reg, NULL, 1, 0);
1205 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in_reg, NULL, 2, 0);
1206 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in_reg, NULL, 3, 0);
1207 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in_reg, NULL, 4, 0);
1208 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in_reg, NULL, 5, 0);
1209 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in_reg, NULL, 6, 0);
1210 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in_reg, NULL, 7, 0);
1211 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in_reg, NULL, 8, 0);
1212 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in_reg, NULL, 9, 0);
1213 static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in_reg, NULL, 10, 0);
1214 static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in_reg, NULL, 11, 0);
1215 static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in_reg, NULL, 12, 0);
1216 static SENSOR_DEVICE_ATTR_2(in13_input, S_IRUGO, show_in_reg, NULL, 13, 0);
1217 static SENSOR_DEVICE_ATTR_2(in14_input, S_IRUGO, show_in_reg, NULL, 14, 0);
1219 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
1220 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
1221 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
1222 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
1223 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 4);
1224 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 5);
1225 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 6);
1226 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 7);
1227 static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 8);
1228 static SENSOR_DEVICE_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 9);
1229 static SENSOR_DEVICE_ATTR(in10_alarm, S_IRUGO, show_alarm, NULL, 10);
1230 static SENSOR_DEVICE_ATTR(in11_alarm, S_IRUGO, show_alarm, NULL, 11);
1231 static SENSOR_DEVICE_ATTR(in12_alarm, S_IRUGO, show_alarm, NULL, 12);
1232 static SENSOR_DEVICE_ATTR(in13_alarm, S_IRUGO, show_alarm, NULL, 13);
1233 static SENSOR_DEVICE_ATTR(in14_alarm, S_IRUGO, show_alarm, NULL, 14);
1235 static SENSOR_DEVICE_ATTR_2(in0_min, S_IWUSR | S_IRUGO, show_in_reg,
1236 store_in_reg, 0, 1);
1237 static SENSOR_DEVICE_ATTR_2(in1_min, S_IWUSR | S_IRUGO, show_in_reg,
1238 store_in_reg, 1, 1);
1239 static SENSOR_DEVICE_ATTR_2(in2_min, S_IWUSR | S_IRUGO, show_in_reg,
1240 store_in_reg, 2, 1);
1241 static SENSOR_DEVICE_ATTR_2(in3_min, S_IWUSR | S_IRUGO, show_in_reg,
1242 store_in_reg, 3, 1);
1243 static SENSOR_DEVICE_ATTR_2(in4_min, S_IWUSR | S_IRUGO, show_in_reg,
1244 store_in_reg, 4, 1);
1245 static SENSOR_DEVICE_ATTR_2(in5_min, S_IWUSR | S_IRUGO, show_in_reg,
1246 store_in_reg, 5, 1);
1247 static SENSOR_DEVICE_ATTR_2(in6_min, S_IWUSR | S_IRUGO, show_in_reg,
1248 store_in_reg, 6, 1);
1249 static SENSOR_DEVICE_ATTR_2(in7_min, S_IWUSR | S_IRUGO, show_in_reg,
1250 store_in_reg, 7, 1);
1251 static SENSOR_DEVICE_ATTR_2(in8_min, S_IWUSR | S_IRUGO, show_in_reg,
1252 store_in_reg, 8, 1);
1253 static SENSOR_DEVICE_ATTR_2(in9_min, S_IWUSR | S_IRUGO, show_in_reg,
1254 store_in_reg, 9, 1);
1255 static SENSOR_DEVICE_ATTR_2(in10_min, S_IWUSR | S_IRUGO, show_in_reg,
1256 store_in_reg, 10, 1);
1257 static SENSOR_DEVICE_ATTR_2(in11_min, S_IWUSR | S_IRUGO, show_in_reg,
1258 store_in_reg, 11, 1);
1259 static SENSOR_DEVICE_ATTR_2(in12_min, S_IWUSR | S_IRUGO, show_in_reg,
1260 store_in_reg, 12, 1);
1261 static SENSOR_DEVICE_ATTR_2(in13_min, S_IWUSR | S_IRUGO, show_in_reg,
1262 store_in_reg, 13, 1);
1263 static SENSOR_DEVICE_ATTR_2(in14_min, S_IWUSR | S_IRUGO, show_in_reg,
1264 store_in_reg, 14, 1);
1266 static SENSOR_DEVICE_ATTR_2(in0_max, S_IWUSR | S_IRUGO, show_in_reg,
1267 store_in_reg, 0, 2);
1268 static SENSOR_DEVICE_ATTR_2(in1_max, S_IWUSR | S_IRUGO, show_in_reg,
1269 store_in_reg, 1, 2);
1270 static SENSOR_DEVICE_ATTR_2(in2_max, S_IWUSR | S_IRUGO, show_in_reg,
1271 store_in_reg, 2, 2);
1272 static SENSOR_DEVICE_ATTR_2(in3_max, S_IWUSR | S_IRUGO, show_in_reg,
1273 store_in_reg, 3, 2);
1274 static SENSOR_DEVICE_ATTR_2(in4_max, S_IWUSR | S_IRUGO, show_in_reg,
1275 store_in_reg, 4, 2);
1276 static SENSOR_DEVICE_ATTR_2(in5_max, S_IWUSR | S_IRUGO, show_in_reg,
1277 store_in_reg, 5, 2);
1278 static SENSOR_DEVICE_ATTR_2(in6_max, S_IWUSR | S_IRUGO, show_in_reg,
1279 store_in_reg, 6, 2);
1280 static SENSOR_DEVICE_ATTR_2(in7_max, S_IWUSR | S_IRUGO, show_in_reg,
1281 store_in_reg, 7, 2);
1282 static SENSOR_DEVICE_ATTR_2(in8_max, S_IWUSR | S_IRUGO, show_in_reg,
1283 store_in_reg, 8, 2);
1284 static SENSOR_DEVICE_ATTR_2(in9_max, S_IWUSR | S_IRUGO, show_in_reg,
1285 store_in_reg, 9, 2);
1286 static SENSOR_DEVICE_ATTR_2(in10_max, S_IWUSR | S_IRUGO, show_in_reg,
1287 store_in_reg, 10, 2);
1288 static SENSOR_DEVICE_ATTR_2(in11_max, S_IWUSR | S_IRUGO, show_in_reg,
1289 store_in_reg, 11, 2);
1290 static SENSOR_DEVICE_ATTR_2(in12_max, S_IWUSR | S_IRUGO, show_in_reg,
1291 store_in_reg, 12, 2);
1292 static SENSOR_DEVICE_ATTR_2(in13_max, S_IWUSR | S_IRUGO, show_in_reg,
1293 store_in_reg, 13, 2);
1294 static SENSOR_DEVICE_ATTR_2(in14_max, S_IWUSR | S_IRUGO, show_in_reg,
1295 store_in_reg, 14, 2);
1297 static struct attribute *nct6775_attributes_in[15][5] = {
1299 &sensor_dev_attr_in0_input.dev_attr.attr,
1300 &sensor_dev_attr_in0_min.dev_attr.attr,
1301 &sensor_dev_attr_in0_max.dev_attr.attr,
1302 &sensor_dev_attr_in0_alarm.dev_attr.attr,
1306 &sensor_dev_attr_in1_input.dev_attr.attr,
1307 &sensor_dev_attr_in1_min.dev_attr.attr,
1308 &sensor_dev_attr_in1_max.dev_attr.attr,
1309 &sensor_dev_attr_in1_alarm.dev_attr.attr,
1313 &sensor_dev_attr_in2_input.dev_attr.attr,
1314 &sensor_dev_attr_in2_min.dev_attr.attr,
1315 &sensor_dev_attr_in2_max.dev_attr.attr,
1316 &sensor_dev_attr_in2_alarm.dev_attr.attr,
1320 &sensor_dev_attr_in3_input.dev_attr.attr,
1321 &sensor_dev_attr_in3_min.dev_attr.attr,
1322 &sensor_dev_attr_in3_max.dev_attr.attr,
1323 &sensor_dev_attr_in3_alarm.dev_attr.attr,
1327 &sensor_dev_attr_in4_input.dev_attr.attr,
1328 &sensor_dev_attr_in4_min.dev_attr.attr,
1329 &sensor_dev_attr_in4_max.dev_attr.attr,
1330 &sensor_dev_attr_in4_alarm.dev_attr.attr,
1334 &sensor_dev_attr_in5_input.dev_attr.attr,
1335 &sensor_dev_attr_in5_min.dev_attr.attr,
1336 &sensor_dev_attr_in5_max.dev_attr.attr,
1337 &sensor_dev_attr_in5_alarm.dev_attr.attr,
1341 &sensor_dev_attr_in6_input.dev_attr.attr,
1342 &sensor_dev_attr_in6_min.dev_attr.attr,
1343 &sensor_dev_attr_in6_max.dev_attr.attr,
1344 &sensor_dev_attr_in6_alarm.dev_attr.attr,
1348 &sensor_dev_attr_in7_input.dev_attr.attr,
1349 &sensor_dev_attr_in7_min.dev_attr.attr,
1350 &sensor_dev_attr_in7_max.dev_attr.attr,
1351 &sensor_dev_attr_in7_alarm.dev_attr.attr,
1355 &sensor_dev_attr_in8_input.dev_attr.attr,
1356 &sensor_dev_attr_in8_min.dev_attr.attr,
1357 &sensor_dev_attr_in8_max.dev_attr.attr,
1358 &sensor_dev_attr_in8_alarm.dev_attr.attr,
1362 &sensor_dev_attr_in9_input.dev_attr.attr,
1363 &sensor_dev_attr_in9_min.dev_attr.attr,
1364 &sensor_dev_attr_in9_max.dev_attr.attr,
1365 &sensor_dev_attr_in9_alarm.dev_attr.attr,
1369 &sensor_dev_attr_in10_input.dev_attr.attr,
1370 &sensor_dev_attr_in10_min.dev_attr.attr,
1371 &sensor_dev_attr_in10_max.dev_attr.attr,
1372 &sensor_dev_attr_in10_alarm.dev_attr.attr,
1376 &sensor_dev_attr_in11_input.dev_attr.attr,
1377 &sensor_dev_attr_in11_min.dev_attr.attr,
1378 &sensor_dev_attr_in11_max.dev_attr.attr,
1379 &sensor_dev_attr_in11_alarm.dev_attr.attr,
1383 &sensor_dev_attr_in12_input.dev_attr.attr,
1384 &sensor_dev_attr_in12_min.dev_attr.attr,
1385 &sensor_dev_attr_in12_max.dev_attr.attr,
1386 &sensor_dev_attr_in12_alarm.dev_attr.attr,
1390 &sensor_dev_attr_in13_input.dev_attr.attr,
1391 &sensor_dev_attr_in13_min.dev_attr.attr,
1392 &sensor_dev_attr_in13_max.dev_attr.attr,
1393 &sensor_dev_attr_in13_alarm.dev_attr.attr,
1397 &sensor_dev_attr_in14_input.dev_attr.attr,
1398 &sensor_dev_attr_in14_min.dev_attr.attr,
1399 &sensor_dev_attr_in14_max.dev_attr.attr,
1400 &sensor_dev_attr_in14_alarm.dev_attr.attr,
1405 static const struct attribute_group nct6775_group_in[15] = {
1406 { .attrs = nct6775_attributes_in[0] },
1407 { .attrs = nct6775_attributes_in[1] },
1408 { .attrs = nct6775_attributes_in[2] },
1409 { .attrs = nct6775_attributes_in[3] },
1410 { .attrs = nct6775_attributes_in[4] },
1411 { .attrs = nct6775_attributes_in[5] },
1412 { .attrs = nct6775_attributes_in[6] },
1413 { .attrs = nct6775_attributes_in[7] },
1414 { .attrs = nct6775_attributes_in[8] },
1415 { .attrs = nct6775_attributes_in[9] },
1416 { .attrs = nct6775_attributes_in[10] },
1417 { .attrs = nct6775_attributes_in[11] },
1418 { .attrs = nct6775_attributes_in[12] },
1419 { .attrs = nct6775_attributes_in[13] },
1420 { .attrs = nct6775_attributes_in[14] },
1424 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1426 struct nct6775_data *data = nct6775_update_device(dev);
1427 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1428 int nr = sattr->index;
1429 return sprintf(buf, "%d\n", data->rpm[nr]);
1433 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1435 struct nct6775_data *data = nct6775_update_device(dev);
1436 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1437 int nr = sattr->index;
1438 return sprintf(buf, "%d\n",
1439 data->fan_from_reg_min(data->fan_min[nr],
1440 data->fan_div[nr]));
1444 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1446 struct nct6775_data *data = nct6775_update_device(dev);
1447 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1448 int nr = sattr->index;
1449 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1453 store_fan_min(struct device *dev, struct device_attribute *attr,
1454 const char *buf, size_t count)
1456 struct nct6775_data *data = dev_get_drvdata(dev);
1457 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1458 int nr = sattr->index;
1464 err = kstrtoul(buf, 10, &val);
1468 mutex_lock(&data->update_lock);
1469 if (!data->has_fan_div) {
1470 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1476 val = 1350000U / val;
1477 val = (val & 0x1f) | ((val << 3) & 0xff00);
1479 data->fan_min[nr] = val;
1480 goto write_min; /* Leave fan divider alone */
1483 /* No min limit, alarm disabled */
1484 data->fan_min[nr] = 255;
1485 new_div = data->fan_div[nr]; /* No change */
1486 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1489 reg = 1350000U / val;
1490 if (reg >= 128 * 255) {
1492 * Speed below this value cannot possibly be represented,
1493 * even with the highest divider (128)
1495 data->fan_min[nr] = 254;
1496 new_div = 7; /* 128 == (1 << 7) */
1498 "fan%u low limit %lu below minimum %u, set to minimum\n",
1499 nr + 1, val, data->fan_from_reg_min(254, 7));
1502 * Speed above this value cannot possibly be represented,
1503 * even with the lowest divider (1)
1505 data->fan_min[nr] = 1;
1506 new_div = 0; /* 1 == (1 << 0) */
1508 "fan%u low limit %lu above maximum %u, set to maximum\n",
1509 nr + 1, val, data->fan_from_reg_min(1, 0));
1512 * Automatically pick the best divider, i.e. the one such
1513 * that the min limit will correspond to a register value
1514 * in the 96..192 range
1517 while (reg > 192 && new_div < 7) {
1521 data->fan_min[nr] = reg;
1526 * Write both the fan clock divider (if it changed) and the new
1527 * fan min (unconditionally)
1529 if (new_div != data->fan_div[nr]) {
1530 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1531 nr + 1, div_from_reg(data->fan_div[nr]),
1532 div_from_reg(new_div));
1533 data->fan_div[nr] = new_div;
1534 nct6775_write_fan_div_common(data, nr);
1535 /* Give the chip time to sample a new speed value */
1536 data->last_updated = jiffies;
1540 nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1541 mutex_unlock(&data->update_lock);
1547 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
1549 struct nct6775_data *data = nct6775_update_device(dev);
1550 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1551 int p = data->fan_pulses[sattr->index];
1553 return sprintf(buf, "%d\n", p ? : 4);
1557 store_fan_pulses(struct device *dev, struct device_attribute *attr,
1558 const char *buf, size_t count)
1560 struct nct6775_data *data = dev_get_drvdata(dev);
1561 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1562 int nr = sattr->index;
1566 err = kstrtoul(buf, 10, &val);
1573 mutex_lock(&data->update_lock);
1574 data->fan_pulses[nr] = val & 3;
1575 nct6775_write_value(data, data->REG_FAN_PULSES[nr], val & 3);
1576 mutex_unlock(&data->update_lock);
1581 static struct sensor_device_attribute sda_fan_input[] = {
1582 SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
1583 SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
1584 SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),
1585 SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3),
1586 SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4),
1589 static struct sensor_device_attribute sda_fan_alarm[] = {
1590 SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE),
1591 SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 1),
1592 SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 2),
1593 SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 3),
1594 SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 4),
1597 static struct sensor_device_attribute sda_fan_min[] = {
1598 SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min,
1600 SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min,
1602 SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, show_fan_min,
1604 SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, show_fan_min,
1606 SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, show_fan_min,
1610 static struct sensor_device_attribute sda_fan_pulses[] = {
1611 SENSOR_ATTR(fan1_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1612 store_fan_pulses, 0),
1613 SENSOR_ATTR(fan2_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1614 store_fan_pulses, 1),
1615 SENSOR_ATTR(fan3_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1616 store_fan_pulses, 2),
1617 SENSOR_ATTR(fan4_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1618 store_fan_pulses, 3),
1619 SENSOR_ATTR(fan5_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1620 store_fan_pulses, 4),
1623 static struct sensor_device_attribute sda_fan_div[] = {
1624 SENSOR_ATTR(fan1_div, S_IRUGO, show_fan_div, NULL, 0),
1625 SENSOR_ATTR(fan2_div, S_IRUGO, show_fan_div, NULL, 1),
1626 SENSOR_ATTR(fan3_div, S_IRUGO, show_fan_div, NULL, 2),
1627 SENSOR_ATTR(fan4_div, S_IRUGO, show_fan_div, NULL, 3),
1628 SENSOR_ATTR(fan5_div, S_IRUGO, show_fan_div, NULL, 4),
1632 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1634 struct nct6775_data *data = nct6775_update_device(dev);
1635 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1636 int nr = sattr->index;
1637 return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1641 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1643 struct nct6775_data *data = nct6775_update_device(dev);
1644 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1646 int index = sattr->index;
1648 return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
1652 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
1655 struct nct6775_data *data = dev_get_drvdata(dev);
1656 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1658 int index = sattr->index;
1662 err = kstrtol(buf, 10, &val);
1666 mutex_lock(&data->update_lock);
1667 data->temp[index][nr] = LM75_TEMP_TO_REG(val);
1668 nct6775_write_temp(data, data->reg_temp[index][nr],
1669 data->temp[index][nr]);
1670 mutex_unlock(&data->update_lock);
1675 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
1677 struct nct6775_data *data = nct6775_update_device(dev);
1678 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1680 return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
1684 store_temp_offset(struct device *dev, struct device_attribute *attr,
1685 const char *buf, size_t count)
1687 struct nct6775_data *data = dev_get_drvdata(dev);
1688 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1689 int nr = sattr->index;
1693 err = kstrtol(buf, 10, &val);
1697 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
1699 mutex_lock(&data->update_lock);
1700 data->temp_offset[nr] = val;
1701 nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
1702 mutex_unlock(&data->update_lock);
1708 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
1710 struct nct6775_data *data = nct6775_update_device(dev);
1711 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1712 int nr = sattr->index;
1713 return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
1717 store_temp_type(struct device *dev, struct device_attribute *attr,
1718 const char *buf, size_t count)
1720 struct nct6775_data *data = nct6775_update_device(dev);
1721 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1722 int nr = sattr->index;
1725 u8 vbat, diode, bit;
1727 err = kstrtoul(buf, 10, &val);
1731 if (val != 1 && val != 3 && val != 4)
1734 mutex_lock(&data->update_lock);
1736 data->temp_type[nr] = val;
1737 vbat = nct6775_read_value(data, data->REG_VBAT) & ~(0x02 << nr);
1738 diode = nct6775_read_value(data, data->REG_DIODE) & ~(0x02 << nr);
1741 case 1: /* CPU diode (diode, current mode) */
1745 case 3: /* diode, voltage mode */
1748 case 4: /* thermistor */
1751 nct6775_write_value(data, data->REG_VBAT, vbat);
1752 nct6775_write_value(data, data->REG_DIODE, diode);
1754 mutex_unlock(&data->update_lock);
1758 static struct sensor_device_attribute_2 sda_temp_input[] = {
1759 SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0),
1760 SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0),
1761 SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0),
1762 SENSOR_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0),
1763 SENSOR_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0),
1764 SENSOR_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0),
1765 SENSOR_ATTR_2(temp7_input, S_IRUGO, show_temp, NULL, 6, 0),
1766 SENSOR_ATTR_2(temp8_input, S_IRUGO, show_temp, NULL, 7, 0),
1767 SENSOR_ATTR_2(temp9_input, S_IRUGO, show_temp, NULL, 8, 0),
1768 SENSOR_ATTR_2(temp10_input, S_IRUGO, show_temp, NULL, 9, 0),
1771 static struct sensor_device_attribute sda_temp_label[] = {
1772 SENSOR_ATTR(temp1_label, S_IRUGO, show_temp_label, NULL, 0),
1773 SENSOR_ATTR(temp2_label, S_IRUGO, show_temp_label, NULL, 1),
1774 SENSOR_ATTR(temp3_label, S_IRUGO, show_temp_label, NULL, 2),
1775 SENSOR_ATTR(temp4_label, S_IRUGO, show_temp_label, NULL, 3),
1776 SENSOR_ATTR(temp5_label, S_IRUGO, show_temp_label, NULL, 4),
1777 SENSOR_ATTR(temp6_label, S_IRUGO, show_temp_label, NULL, 5),
1778 SENSOR_ATTR(temp7_label, S_IRUGO, show_temp_label, NULL, 6),
1779 SENSOR_ATTR(temp8_label, S_IRUGO, show_temp_label, NULL, 7),
1780 SENSOR_ATTR(temp9_label, S_IRUGO, show_temp_label, NULL, 8),
1781 SENSOR_ATTR(temp10_label, S_IRUGO, show_temp_label, NULL, 9),
1784 static struct sensor_device_attribute_2 sda_temp_max[] = {
1785 SENSOR_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1787 SENSOR_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1789 SENSOR_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1791 SENSOR_ATTR_2(temp4_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1793 SENSOR_ATTR_2(temp5_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1795 SENSOR_ATTR_2(temp6_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1797 SENSOR_ATTR_2(temp7_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1799 SENSOR_ATTR_2(temp8_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1801 SENSOR_ATTR_2(temp9_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1803 SENSOR_ATTR_2(temp10_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1807 static struct sensor_device_attribute_2 sda_temp_max_hyst[] = {
1808 SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1810 SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1812 SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1814 SENSOR_ATTR_2(temp4_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1816 SENSOR_ATTR_2(temp5_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1818 SENSOR_ATTR_2(temp6_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1820 SENSOR_ATTR_2(temp7_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1822 SENSOR_ATTR_2(temp8_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1824 SENSOR_ATTR_2(temp9_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1826 SENSOR_ATTR_2(temp10_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1830 static struct sensor_device_attribute_2 sda_temp_crit[] = {
1831 SENSOR_ATTR_2(temp1_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1833 SENSOR_ATTR_2(temp2_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1835 SENSOR_ATTR_2(temp3_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1837 SENSOR_ATTR_2(temp4_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1839 SENSOR_ATTR_2(temp5_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1841 SENSOR_ATTR_2(temp6_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1843 SENSOR_ATTR_2(temp7_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1845 SENSOR_ATTR_2(temp8_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1847 SENSOR_ATTR_2(temp9_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1849 SENSOR_ATTR_2(temp10_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1853 static struct sensor_device_attribute sda_temp_offset[] = {
1854 SENSOR_ATTR(temp1_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1855 store_temp_offset, 0),
1856 SENSOR_ATTR(temp2_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1857 store_temp_offset, 1),
1858 SENSOR_ATTR(temp3_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1859 store_temp_offset, 2),
1860 SENSOR_ATTR(temp4_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1861 store_temp_offset, 3),
1862 SENSOR_ATTR(temp5_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1863 store_temp_offset, 4),
1864 SENSOR_ATTR(temp6_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1865 store_temp_offset, 5),
1868 static struct sensor_device_attribute sda_temp_type[] = {
1869 SENSOR_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1870 store_temp_type, 0),
1871 SENSOR_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1872 store_temp_type, 1),
1873 SENSOR_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1874 store_temp_type, 2),
1875 SENSOR_ATTR(temp4_type, S_IRUGO | S_IWUSR, show_temp_type,
1876 store_temp_type, 3),
1877 SENSOR_ATTR(temp5_type, S_IRUGO | S_IWUSR, show_temp_type,
1878 store_temp_type, 4),
1879 SENSOR_ATTR(temp6_type, S_IRUGO | S_IWUSR, show_temp_type,
1880 store_temp_type, 5),
1883 static struct sensor_device_attribute sda_temp_alarm[] = {
1884 SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL,
1886 SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL,
1887 TEMP_ALARM_BASE + 1),
1888 SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL,
1889 TEMP_ALARM_BASE + 2),
1890 SENSOR_ATTR(temp4_alarm, S_IRUGO, show_alarm, NULL,
1891 TEMP_ALARM_BASE + 3),
1892 SENSOR_ATTR(temp5_alarm, S_IRUGO, show_alarm, NULL,
1893 TEMP_ALARM_BASE + 4),
1894 SENSOR_ATTR(temp6_alarm, S_IRUGO, show_alarm, NULL,
1895 TEMP_ALARM_BASE + 5),
1898 #define NUM_TEMP_ALARM ARRAY_SIZE(sda_temp_alarm)
1901 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
1903 struct nct6775_data *data = nct6775_update_device(dev);
1904 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1906 return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
1910 store_pwm_mode(struct device *dev, struct device_attribute *attr,
1911 const char *buf, size_t count)
1913 struct nct6775_data *data = dev_get_drvdata(dev);
1914 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1915 int nr = sattr->index;
1920 err = kstrtoul(buf, 10, &val);
1927 /* Setting DC mode is not supported for all chips/channels */
1928 if (data->REG_PWM_MODE[nr] == 0) {
1934 mutex_lock(&data->update_lock);
1935 data->pwm_mode[nr] = val;
1936 reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
1937 reg &= ~data->PWM_MODE_MASK[nr];
1939 reg |= data->PWM_MODE_MASK[nr];
1940 nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
1941 mutex_unlock(&data->update_lock);
1946 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1948 struct nct6775_data *data = nct6775_update_device(dev);
1949 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1951 int index = sattr->index;
1955 * For automatic fan control modes, show current pwm readings.
1956 * Otherwise, show the configured value.
1958 if (index == 0 && data->pwm_enable[nr] > manual)
1959 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
1961 pwm = data->pwm[index][nr];
1963 return sprintf(buf, "%d\n", pwm);
1967 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
1970 struct nct6775_data *data = dev_get_drvdata(dev);
1971 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1973 int index = sattr->index;
1975 int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
1977 = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
1981 err = kstrtoul(buf, 10, &val);
1984 val = clamp_val(val, minval[index], maxval[index]);
1986 mutex_lock(&data->update_lock);
1987 data->pwm[index][nr] = val;
1988 nct6775_write_value(data, data->REG_PWM[index][nr], val);
1989 if (index == 2) { /* floor: disable if val == 0 */
1990 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
1994 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
1996 mutex_unlock(&data->update_lock);
2000 /* Returns 0 if OK, -EINVAL otherwise */
2001 static int check_trip_points(struct nct6775_data *data, int nr)
2005 for (i = 0; i < data->auto_pwm_num - 1; i++) {
2006 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
2009 for (i = 0; i < data->auto_pwm_num - 1; i++) {
2010 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
2013 /* validate critical temperature and pwm if enabled (pwm > 0) */
2014 if (data->auto_pwm[nr][data->auto_pwm_num]) {
2015 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2016 data->auto_temp[nr][data->auto_pwm_num] ||
2017 data->auto_pwm[nr][data->auto_pwm_num - 1] >
2018 data->auto_pwm[nr][data->auto_pwm_num])
2024 static void pwm_update_registers(struct nct6775_data *data, int nr)
2028 switch (data->pwm_enable[nr]) {
2033 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2034 reg = (reg & ~data->tolerance_mask) |
2035 (data->target_speed_tolerance[nr] & data->tolerance_mask);
2036 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2037 nct6775_write_value(data, data->REG_TARGET[nr],
2038 data->target_speed[nr] & 0xff);
2039 if (data->REG_TOLERANCE_H) {
2040 reg = (data->target_speed[nr] >> 8) & 0x0f;
2041 reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2042 nct6775_write_value(data,
2043 data->REG_TOLERANCE_H[nr],
2047 case thermal_cruise:
2048 nct6775_write_value(data, data->REG_TARGET[nr],
2049 data->target_temp[nr]);
2052 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2053 reg = (reg & ~data->tolerance_mask) |
2054 data->temp_tolerance[0][nr];
2055 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2061 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2063 struct nct6775_data *data = nct6775_update_device(dev);
2064 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2066 return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2070 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2071 const char *buf, size_t count)
2073 struct nct6775_data *data = dev_get_drvdata(dev);
2074 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2075 int nr = sattr->index;
2080 err = kstrtoul(buf, 10, &val);
2087 if (val == sf3 && data->kind != nct6775)
2090 if (val == sf4 && check_trip_points(data, nr)) {
2091 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2092 dev_err(dev, "Adjust trip points and try again\n");
2096 mutex_lock(&data->update_lock);
2097 data->pwm_enable[nr] = val;
2100 * turn off pwm control: select manual mode, set pwm to maximum
2102 data->pwm[0][nr] = 255;
2103 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2105 pwm_update_registers(data, nr);
2106 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2108 reg |= pwm_enable_to_reg(val) << 4;
2109 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2110 mutex_unlock(&data->update_lock);
2115 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2119 for (i = 0; i < NUM_TEMP; i++) {
2120 if (!(data->have_temp & (1 << i)))
2122 if (src == data->temp_src[i]) {
2128 return sprintf(buf, "%d\n", sel);
2132 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2134 struct nct6775_data *data = nct6775_update_device(dev);
2135 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2136 int index = sattr->index;
2138 return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2142 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2143 const char *buf, size_t count)
2145 struct nct6775_data *data = nct6775_update_device(dev);
2146 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2147 int nr = sattr->index;
2151 err = kstrtoul(buf, 10, &val);
2154 if (val == 0 || val > NUM_TEMP)
2156 if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
2159 mutex_lock(&data->update_lock);
2160 src = data->temp_src[val - 1];
2161 data->pwm_temp_sel[nr] = src;
2162 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2165 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2166 mutex_unlock(&data->update_lock);
2172 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2175 struct nct6775_data *data = nct6775_update_device(dev);
2176 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2177 int index = sattr->index;
2179 return show_pwm_temp_sel_common(data, buf,
2180 data->pwm_weight_temp_sel[index]);
2184 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2185 const char *buf, size_t count)
2187 struct nct6775_data *data = nct6775_update_device(dev);
2188 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2189 int nr = sattr->index;
2193 err = kstrtoul(buf, 10, &val);
2198 if (val && (!(data->have_temp & (1 << (val - 1))) ||
2199 !data->temp_src[val - 1]))
2202 mutex_lock(&data->update_lock);
2204 src = data->temp_src[val - 1];
2205 data->pwm_weight_temp_sel[nr] = src;
2206 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2208 reg |= (src | 0x80);
2209 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2211 data->pwm_weight_temp_sel[nr] = 0;
2212 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2214 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2216 mutex_unlock(&data->update_lock);
2222 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2224 struct nct6775_data *data = nct6775_update_device(dev);
2225 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2227 return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2231 store_target_temp(struct device *dev, struct device_attribute *attr,
2232 const char *buf, size_t count)
2234 struct nct6775_data *data = dev_get_drvdata(dev);
2235 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2236 int nr = sattr->index;
2240 err = kstrtoul(buf, 10, &val);
2244 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2245 data->target_temp_mask);
2247 mutex_lock(&data->update_lock);
2248 data->target_temp[nr] = val;
2249 pwm_update_registers(data, nr);
2250 mutex_unlock(&data->update_lock);
2255 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2257 struct nct6775_data *data = nct6775_update_device(dev);
2258 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2259 int nr = sattr->index;
2261 return sprintf(buf, "%d\n",
2262 fan_from_reg16(data->target_speed[nr],
2263 data->fan_div[nr]));
2267 store_target_speed(struct device *dev, struct device_attribute *attr,
2268 const char *buf, size_t count)
2270 struct nct6775_data *data = dev_get_drvdata(dev);
2271 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2272 int nr = sattr->index;
2277 err = kstrtoul(buf, 10, &val);
2281 val = clamp_val(val, 0, 1350000U);
2282 speed = fan_to_reg(val, data->fan_div[nr]);
2284 mutex_lock(&data->update_lock);
2285 data->target_speed[nr] = speed;
2286 pwm_update_registers(data, nr);
2287 mutex_unlock(&data->update_lock);
2292 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2295 struct nct6775_data *data = nct6775_update_device(dev);
2296 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2298 int index = sattr->index;
2300 return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2304 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2305 const char *buf, size_t count)
2307 struct nct6775_data *data = dev_get_drvdata(dev);
2308 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2310 int index = sattr->index;
2314 err = kstrtoul(buf, 10, &val);
2318 /* Limit tolerance as needed */
2319 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2321 mutex_lock(&data->update_lock);
2322 data->temp_tolerance[index][nr] = val;
2324 pwm_update_registers(data, nr);
2326 nct6775_write_value(data,
2327 data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2329 mutex_unlock(&data->update_lock);
2334 * Fan speed tolerance is a tricky beast, since the associated register is
2335 * a tick counter, but the value is reported and configured as rpm.
2336 * Compute resulting low and high rpm values and report the difference.
2339 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2342 struct nct6775_data *data = nct6775_update_device(dev);
2343 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2344 int nr = sattr->index;
2345 int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2346 int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2356 tolerance = (fan_from_reg16(low, data->fan_div[nr])
2357 - fan_from_reg16(high, data->fan_div[nr])) / 2;
2359 return sprintf(buf, "%d\n", tolerance);
2363 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2364 const char *buf, size_t count)
2366 struct nct6775_data *data = dev_get_drvdata(dev);
2367 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2368 int nr = sattr->index;
2373 err = kstrtoul(buf, 10, &val);
2377 high = fan_from_reg16(data->target_speed[nr],
2378 data->fan_div[nr]) + val;
2379 low = fan_from_reg16(data->target_speed[nr],
2380 data->fan_div[nr]) - val;
2386 val = (fan_to_reg(low, data->fan_div[nr]) -
2387 fan_to_reg(high, data->fan_div[nr])) / 2;
2389 /* Limit tolerance as needed */
2390 val = clamp_val(val, 0, data->speed_tolerance_limit);
2392 mutex_lock(&data->update_lock);
2393 data->target_speed_tolerance[nr] = val;
2394 pwm_update_registers(data, nr);
2395 mutex_unlock(&data->update_lock);
2399 static SENSOR_DEVICE_ATTR_2(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2400 static SENSOR_DEVICE_ATTR_2(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1, 0);
2401 static SENSOR_DEVICE_ATTR_2(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2, 0);
2402 static SENSOR_DEVICE_ATTR_2(pwm4, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3, 0);
2403 static SENSOR_DEVICE_ATTR_2(pwm5, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 4, 0);
2405 static SENSOR_DEVICE_ATTR(pwm1_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2407 static SENSOR_DEVICE_ATTR(pwm2_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2409 static SENSOR_DEVICE_ATTR(pwm3_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2411 static SENSOR_DEVICE_ATTR(pwm4_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2413 static SENSOR_DEVICE_ATTR(pwm5_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2416 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2417 store_pwm_enable, 0);
2418 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2419 store_pwm_enable, 1);
2420 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2421 store_pwm_enable, 2);
2422 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2423 store_pwm_enable, 3);
2424 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2425 store_pwm_enable, 4);
2427 static SENSOR_DEVICE_ATTR(pwm1_temp_sel, S_IWUSR | S_IRUGO,
2428 show_pwm_temp_sel, store_pwm_temp_sel, 0);
2429 static SENSOR_DEVICE_ATTR(pwm2_temp_sel, S_IWUSR | S_IRUGO,
2430 show_pwm_temp_sel, store_pwm_temp_sel, 1);
2431 static SENSOR_DEVICE_ATTR(pwm3_temp_sel, S_IWUSR | S_IRUGO,
2432 show_pwm_temp_sel, store_pwm_temp_sel, 2);
2433 static SENSOR_DEVICE_ATTR(pwm4_temp_sel, S_IWUSR | S_IRUGO,
2434 show_pwm_temp_sel, store_pwm_temp_sel, 3);
2435 static SENSOR_DEVICE_ATTR(pwm5_temp_sel, S_IWUSR | S_IRUGO,
2436 show_pwm_temp_sel, store_pwm_temp_sel, 4);
2438 static SENSOR_DEVICE_ATTR(pwm1_target_temp, S_IWUSR | S_IRUGO, show_target_temp,
2439 store_target_temp, 0);
2440 static SENSOR_DEVICE_ATTR(pwm2_target_temp, S_IWUSR | S_IRUGO, show_target_temp,
2441 store_target_temp, 1);
2442 static SENSOR_DEVICE_ATTR(pwm3_target_temp, S_IWUSR | S_IRUGO, show_target_temp,
2443 store_target_temp, 2);
2444 static SENSOR_DEVICE_ATTR(pwm4_target_temp, S_IWUSR | S_IRUGO, show_target_temp,
2445 store_target_temp, 3);
2446 static SENSOR_DEVICE_ATTR(pwm5_target_temp, S_IWUSR | S_IRUGO, show_target_temp,
2447 store_target_temp, 4);
2449 static SENSOR_DEVICE_ATTR(fan1_target, S_IWUSR | S_IRUGO, show_target_speed,
2450 store_target_speed, 0);
2451 static SENSOR_DEVICE_ATTR(fan2_target, S_IWUSR | S_IRUGO, show_target_speed,
2452 store_target_speed, 1);
2453 static SENSOR_DEVICE_ATTR(fan3_target, S_IWUSR | S_IRUGO, show_target_speed,
2454 store_target_speed, 2);
2455 static SENSOR_DEVICE_ATTR(fan4_target, S_IWUSR | S_IRUGO, show_target_speed,
2456 store_target_speed, 3);
2457 static SENSOR_DEVICE_ATTR(fan5_target, S_IWUSR | S_IRUGO, show_target_speed,
2458 store_target_speed, 4);
2460 static SENSOR_DEVICE_ATTR(fan1_tolerance, S_IWUSR | S_IRUGO,
2461 show_speed_tolerance, store_speed_tolerance, 0);
2462 static SENSOR_DEVICE_ATTR(fan2_tolerance, S_IWUSR | S_IRUGO,
2463 show_speed_tolerance, store_speed_tolerance, 1);
2464 static SENSOR_DEVICE_ATTR(fan3_tolerance, S_IWUSR | S_IRUGO,
2465 show_speed_tolerance, store_speed_tolerance, 2);
2466 static SENSOR_DEVICE_ATTR(fan4_tolerance, S_IWUSR | S_IRUGO,
2467 show_speed_tolerance, store_speed_tolerance, 3);
2468 static SENSOR_DEVICE_ATTR(fan5_tolerance, S_IWUSR | S_IRUGO,
2469 show_speed_tolerance, store_speed_tolerance, 4);
2471 /* Smart Fan registers */
2474 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2476 struct nct6775_data *data = nct6775_update_device(dev);
2477 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2479 int index = sattr->index;
2481 return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2485 store_weight_temp(struct device *dev, struct device_attribute *attr,
2486 const char *buf, size_t count)
2488 struct nct6775_data *data = dev_get_drvdata(dev);
2489 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2491 int index = sattr->index;
2495 err = kstrtoul(buf, 10, &val);
2499 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2501 mutex_lock(&data->update_lock);
2502 data->weight_temp[index][nr] = val;
2503 nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2504 mutex_unlock(&data->update_lock);
2508 static SENSOR_DEVICE_ATTR(pwm1_weight_temp_sel, S_IWUSR | S_IRUGO,
2509 show_pwm_weight_temp_sel, store_pwm_weight_temp_sel,
2511 static SENSOR_DEVICE_ATTR(pwm2_weight_temp_sel, S_IWUSR | S_IRUGO,
2512 show_pwm_weight_temp_sel, store_pwm_weight_temp_sel,
2514 static SENSOR_DEVICE_ATTR(pwm3_weight_temp_sel, S_IWUSR | S_IRUGO,
2515 show_pwm_weight_temp_sel, store_pwm_weight_temp_sel,
2517 static SENSOR_DEVICE_ATTR(pwm4_weight_temp_sel, S_IWUSR | S_IRUGO,
2518 show_pwm_weight_temp_sel, store_pwm_weight_temp_sel,
2520 static SENSOR_DEVICE_ATTR(pwm5_weight_temp_sel, S_IWUSR | S_IRUGO,
2521 show_pwm_weight_temp_sel, store_pwm_weight_temp_sel,
2524 static SENSOR_DEVICE_ATTR_2(pwm1_weight_temp_step, S_IWUSR | S_IRUGO,
2525 show_weight_temp, store_weight_temp, 0, 0);
2526 static SENSOR_DEVICE_ATTR_2(pwm2_weight_temp_step, S_IWUSR | S_IRUGO,
2527 show_weight_temp, store_weight_temp, 1, 0);
2528 static SENSOR_DEVICE_ATTR_2(pwm3_weight_temp_step, S_IWUSR | S_IRUGO,
2529 show_weight_temp, store_weight_temp, 2, 0);
2530 static SENSOR_DEVICE_ATTR_2(pwm4_weight_temp_step, S_IWUSR | S_IRUGO,
2531 show_weight_temp, store_weight_temp, 3, 0);
2532 static SENSOR_DEVICE_ATTR_2(pwm5_weight_temp_step, S_IWUSR | S_IRUGO,
2533 show_weight_temp, store_weight_temp, 4, 0);
2535 static SENSOR_DEVICE_ATTR_2(pwm1_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2536 show_weight_temp, store_weight_temp, 0, 1);
2537 static SENSOR_DEVICE_ATTR_2(pwm2_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2538 show_weight_temp, store_weight_temp, 1, 1);
2539 static SENSOR_DEVICE_ATTR_2(pwm3_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2540 show_weight_temp, store_weight_temp, 2, 1);
2541 static SENSOR_DEVICE_ATTR_2(pwm4_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2542 show_weight_temp, store_weight_temp, 3, 1);
2543 static SENSOR_DEVICE_ATTR_2(pwm5_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2544 show_weight_temp, store_weight_temp, 4, 1);
2546 static SENSOR_DEVICE_ATTR_2(pwm1_weight_temp_step_base, S_IWUSR | S_IRUGO,
2547 show_weight_temp, store_weight_temp, 0, 2);
2548 static SENSOR_DEVICE_ATTR_2(pwm2_weight_temp_step_base, S_IWUSR | S_IRUGO,
2549 show_weight_temp, store_weight_temp, 1, 2);
2550 static SENSOR_DEVICE_ATTR_2(pwm3_weight_temp_step_base, S_IWUSR | S_IRUGO,
2551 show_weight_temp, store_weight_temp, 2, 2);
2552 static SENSOR_DEVICE_ATTR_2(pwm4_weight_temp_step_base, S_IWUSR | S_IRUGO,
2553 show_weight_temp, store_weight_temp, 3, 2);
2554 static SENSOR_DEVICE_ATTR_2(pwm5_weight_temp_step_base, S_IWUSR | S_IRUGO,
2555 show_weight_temp, store_weight_temp, 4, 2);
2557 static SENSOR_DEVICE_ATTR_2(pwm1_weight_duty_step, S_IWUSR | S_IRUGO,
2558 show_pwm, store_pwm, 0, 5);
2559 static SENSOR_DEVICE_ATTR_2(pwm2_weight_duty_step, S_IWUSR | S_IRUGO,
2560 show_pwm, store_pwm, 1, 5);
2561 static SENSOR_DEVICE_ATTR_2(pwm3_weight_duty_step, S_IWUSR | S_IRUGO,
2562 show_pwm, store_pwm, 2, 5);
2563 static SENSOR_DEVICE_ATTR_2(pwm4_weight_duty_step, S_IWUSR | S_IRUGO,
2564 show_pwm, store_pwm, 3, 5);
2565 static SENSOR_DEVICE_ATTR_2(pwm5_weight_duty_step, S_IWUSR | S_IRUGO,
2566 show_pwm, store_pwm, 4, 5);
2568 /* duty_base is not supported on all chips */
2569 static struct sensor_device_attribute_2 sda_weight_duty_base[] = {
2570 SENSOR_ATTR_2(pwm1_weight_duty_base, S_IWUSR | S_IRUGO,
2571 show_pwm, store_pwm, 0, 6),
2572 SENSOR_ATTR_2(pwm2_weight_duty_base, S_IWUSR | S_IRUGO,
2573 show_pwm, store_pwm, 1, 6),
2574 SENSOR_ATTR_2(pwm3_weight_duty_base, S_IWUSR | S_IRUGO,
2575 show_pwm, store_pwm, 2, 6),
2576 SENSOR_ATTR_2(pwm4_weight_duty_base, S_IWUSR | S_IRUGO,
2577 show_pwm, store_pwm, 3, 6),
2578 SENSOR_ATTR_2(pwm5_weight_duty_base, S_IWUSR | S_IRUGO,
2579 show_pwm, store_pwm, 4, 6),
2583 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2585 struct nct6775_data *data = nct6775_update_device(dev);
2586 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2588 int index = sattr->index;
2590 return sprintf(buf, "%d\n",
2591 step_time_from_reg(data->fan_time[index][nr],
2592 data->pwm_mode[nr]));
2596 store_fan_time(struct device *dev, struct device_attribute *attr,
2597 const char *buf, size_t count)
2599 struct nct6775_data *data = dev_get_drvdata(dev);
2600 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2602 int index = sattr->index;
2606 err = kstrtoul(buf, 10, &val);
2610 val = step_time_to_reg(val, data->pwm_mode[nr]);
2611 mutex_lock(&data->update_lock);
2612 data->fan_time[index][nr] = val;
2613 nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2614 mutex_unlock(&data->update_lock);
2619 show_name(struct device *dev, struct device_attribute *attr, char *buf)
2621 struct nct6775_data *data = dev_get_drvdata(dev);
2623 return sprintf(buf, "%s\n", data->name);
2626 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
2628 static SENSOR_DEVICE_ATTR_2(pwm1_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2629 store_fan_time, 0, 0);
2630 static SENSOR_DEVICE_ATTR_2(pwm2_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2631 store_fan_time, 1, 0);
2632 static SENSOR_DEVICE_ATTR_2(pwm3_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2633 store_fan_time, 2, 0);
2634 static SENSOR_DEVICE_ATTR_2(pwm4_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2635 store_fan_time, 3, 0);
2636 static SENSOR_DEVICE_ATTR_2(pwm5_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2637 store_fan_time, 4, 0);
2639 static SENSOR_DEVICE_ATTR_2(pwm1_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2640 store_fan_time, 0, 1);
2641 static SENSOR_DEVICE_ATTR_2(pwm2_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2642 store_fan_time, 1, 1);
2643 static SENSOR_DEVICE_ATTR_2(pwm3_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2644 store_fan_time, 2, 1);
2645 static SENSOR_DEVICE_ATTR_2(pwm4_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2646 store_fan_time, 3, 1);
2647 static SENSOR_DEVICE_ATTR_2(pwm5_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2648 store_fan_time, 4, 1);
2650 static SENSOR_DEVICE_ATTR_2(pwm1_step_down_time, S_IWUSR | S_IRUGO,
2651 show_fan_time, store_fan_time, 0, 2);
2652 static SENSOR_DEVICE_ATTR_2(pwm2_step_down_time, S_IWUSR | S_IRUGO,
2653 show_fan_time, store_fan_time, 1, 2);
2654 static SENSOR_DEVICE_ATTR_2(pwm3_step_down_time, S_IWUSR | S_IRUGO,
2655 show_fan_time, store_fan_time, 2, 2);
2656 static SENSOR_DEVICE_ATTR_2(pwm4_step_down_time, S_IWUSR | S_IRUGO,
2657 show_fan_time, store_fan_time, 3, 2);
2658 static SENSOR_DEVICE_ATTR_2(pwm5_step_down_time, S_IWUSR | S_IRUGO,
2659 show_fan_time, store_fan_time, 4, 2);
2661 static SENSOR_DEVICE_ATTR_2(pwm1_start, S_IWUSR | S_IRUGO, show_pwm,
2663 static SENSOR_DEVICE_ATTR_2(pwm2_start, S_IWUSR | S_IRUGO, show_pwm,
2665 static SENSOR_DEVICE_ATTR_2(pwm3_start, S_IWUSR | S_IRUGO, show_pwm,
2667 static SENSOR_DEVICE_ATTR_2(pwm4_start, S_IWUSR | S_IRUGO, show_pwm,
2669 static SENSOR_DEVICE_ATTR_2(pwm5_start, S_IWUSR | S_IRUGO, show_pwm,
2672 static SENSOR_DEVICE_ATTR_2(pwm1_floor, S_IWUSR | S_IRUGO, show_pwm,
2674 static SENSOR_DEVICE_ATTR_2(pwm2_floor, S_IWUSR | S_IRUGO, show_pwm,
2676 static SENSOR_DEVICE_ATTR_2(pwm3_floor, S_IWUSR | S_IRUGO, show_pwm,
2678 static SENSOR_DEVICE_ATTR_2(pwm4_floor, S_IWUSR | S_IRUGO, show_pwm,
2680 static SENSOR_DEVICE_ATTR_2(pwm5_floor, S_IWUSR | S_IRUGO, show_pwm,
2683 static SENSOR_DEVICE_ATTR_2(pwm1_temp_tolerance, S_IWUSR | S_IRUGO,
2684 show_temp_tolerance, store_temp_tolerance, 0, 0);
2685 static SENSOR_DEVICE_ATTR_2(pwm2_temp_tolerance, S_IWUSR | S_IRUGO,
2686 show_temp_tolerance, store_temp_tolerance, 1, 0);
2687 static SENSOR_DEVICE_ATTR_2(pwm3_temp_tolerance, S_IWUSR | S_IRUGO,
2688 show_temp_tolerance, store_temp_tolerance, 2, 0);
2689 static SENSOR_DEVICE_ATTR_2(pwm4_temp_tolerance, S_IWUSR | S_IRUGO,
2690 show_temp_tolerance, store_temp_tolerance, 3, 0);
2691 static SENSOR_DEVICE_ATTR_2(pwm5_temp_tolerance, S_IWUSR | S_IRUGO,
2692 show_temp_tolerance, store_temp_tolerance, 4, 0);
2694 static SENSOR_DEVICE_ATTR_2(pwm1_crit_temp_tolerance, S_IWUSR | S_IRUGO,
2695 show_temp_tolerance, store_temp_tolerance, 0, 1);
2696 static SENSOR_DEVICE_ATTR_2(pwm2_crit_temp_tolerance, S_IWUSR | S_IRUGO,
2697 show_temp_tolerance, store_temp_tolerance, 1, 1);
2698 static SENSOR_DEVICE_ATTR_2(pwm3_crit_temp_tolerance, S_IWUSR | S_IRUGO,
2699 show_temp_tolerance, store_temp_tolerance, 2, 1);
2700 static SENSOR_DEVICE_ATTR_2(pwm4_crit_temp_tolerance, S_IWUSR | S_IRUGO,
2701 show_temp_tolerance, store_temp_tolerance, 3, 1);
2702 static SENSOR_DEVICE_ATTR_2(pwm5_crit_temp_tolerance, S_IWUSR | S_IRUGO,
2703 show_temp_tolerance, store_temp_tolerance, 4, 1);
2705 /* pwm_max is not supported on all chips */
2706 static struct sensor_device_attribute_2 sda_pwm_max[] = {
2707 SENSOR_ATTR_2(pwm1_max, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2709 SENSOR_ATTR_2(pwm2_max, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2711 SENSOR_ATTR_2(pwm3_max, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2713 SENSOR_ATTR_2(pwm4_max, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2715 SENSOR_ATTR_2(pwm5_max, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2719 /* pwm_step is not supported on all chips */
2720 static struct sensor_device_attribute_2 sda_pwm_step[] = {
2721 SENSOR_ATTR_2(pwm1_step, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 4),
2722 SENSOR_ATTR_2(pwm2_step, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1, 4),
2723 SENSOR_ATTR_2(pwm3_step, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2, 4),
2724 SENSOR_ATTR_2(pwm4_step, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3, 4),
2725 SENSOR_ATTR_2(pwm5_step, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 4, 4),
2728 static struct attribute *nct6775_attributes_pwm[5][20] = {
2730 &sensor_dev_attr_pwm1.dev_attr.attr,
2731 &sensor_dev_attr_pwm1_mode.dev_attr.attr,
2732 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2733 &sensor_dev_attr_pwm1_temp_sel.dev_attr.attr,
2734 &sensor_dev_attr_pwm1_temp_tolerance.dev_attr.attr,
2735 &sensor_dev_attr_pwm1_crit_temp_tolerance.dev_attr.attr,
2736 &sensor_dev_attr_pwm1_target_temp.dev_attr.attr,
2737 &sensor_dev_attr_fan1_target.dev_attr.attr,
2738 &sensor_dev_attr_fan1_tolerance.dev_attr.attr,
2739 &sensor_dev_attr_pwm1_stop_time.dev_attr.attr,
2740 &sensor_dev_attr_pwm1_step_up_time.dev_attr.attr,
2741 &sensor_dev_attr_pwm1_step_down_time.dev_attr.attr,
2742 &sensor_dev_attr_pwm1_start.dev_attr.attr,
2743 &sensor_dev_attr_pwm1_floor.dev_attr.attr,
2744 &sensor_dev_attr_pwm1_weight_temp_sel.dev_attr.attr,
2745 &sensor_dev_attr_pwm1_weight_temp_step.dev_attr.attr,
2746 &sensor_dev_attr_pwm1_weight_temp_step_tol.dev_attr.attr,
2747 &sensor_dev_attr_pwm1_weight_temp_step_base.dev_attr.attr,
2748 &sensor_dev_attr_pwm1_weight_duty_step.dev_attr.attr,
2752 &sensor_dev_attr_pwm2.dev_attr.attr,
2753 &sensor_dev_attr_pwm2_mode.dev_attr.attr,
2754 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2755 &sensor_dev_attr_pwm2_temp_sel.dev_attr.attr,
2756 &sensor_dev_attr_pwm2_temp_tolerance.dev_attr.attr,
2757 &sensor_dev_attr_pwm2_crit_temp_tolerance.dev_attr.attr,
2758 &sensor_dev_attr_pwm2_target_temp.dev_attr.attr,
2759 &sensor_dev_attr_fan2_target.dev_attr.attr,
2760 &sensor_dev_attr_fan2_tolerance.dev_attr.attr,
2761 &sensor_dev_attr_pwm2_stop_time.dev_attr.attr,
2762 &sensor_dev_attr_pwm2_step_up_time.dev_attr.attr,
2763 &sensor_dev_attr_pwm2_step_down_time.dev_attr.attr,
2764 &sensor_dev_attr_pwm2_start.dev_attr.attr,
2765 &sensor_dev_attr_pwm2_floor.dev_attr.attr,
2766 &sensor_dev_attr_pwm2_weight_temp_sel.dev_attr.attr,
2767 &sensor_dev_attr_pwm2_weight_temp_step.dev_attr.attr,
2768 &sensor_dev_attr_pwm2_weight_temp_step_tol.dev_attr.attr,
2769 &sensor_dev_attr_pwm2_weight_temp_step_base.dev_attr.attr,
2770 &sensor_dev_attr_pwm2_weight_duty_step.dev_attr.attr,
2774 &sensor_dev_attr_pwm3.dev_attr.attr,
2775 &sensor_dev_attr_pwm3_mode.dev_attr.attr,
2776 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2777 &sensor_dev_attr_pwm3_temp_sel.dev_attr.attr,
2778 &sensor_dev_attr_pwm3_temp_tolerance.dev_attr.attr,
2779 &sensor_dev_attr_pwm3_crit_temp_tolerance.dev_attr.attr,
2780 &sensor_dev_attr_pwm3_target_temp.dev_attr.attr,
2781 &sensor_dev_attr_fan3_target.dev_attr.attr,
2782 &sensor_dev_attr_fan3_tolerance.dev_attr.attr,
2783 &sensor_dev_attr_pwm3_stop_time.dev_attr.attr,
2784 &sensor_dev_attr_pwm3_step_up_time.dev_attr.attr,
2785 &sensor_dev_attr_pwm3_step_down_time.dev_attr.attr,
2786 &sensor_dev_attr_pwm3_start.dev_attr.attr,
2787 &sensor_dev_attr_pwm3_floor.dev_attr.attr,
2788 &sensor_dev_attr_pwm3_weight_temp_sel.dev_attr.attr,
2789 &sensor_dev_attr_pwm3_weight_temp_step.dev_attr.attr,
2790 &sensor_dev_attr_pwm3_weight_temp_step_tol.dev_attr.attr,
2791 &sensor_dev_attr_pwm3_weight_temp_step_base.dev_attr.attr,
2792 &sensor_dev_attr_pwm3_weight_duty_step.dev_attr.attr,
2796 &sensor_dev_attr_pwm4.dev_attr.attr,
2797 &sensor_dev_attr_pwm4_mode.dev_attr.attr,
2798 &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2799 &sensor_dev_attr_pwm4_temp_sel.dev_attr.attr,
2800 &sensor_dev_attr_pwm4_temp_tolerance.dev_attr.attr,
2801 &sensor_dev_attr_pwm4_crit_temp_tolerance.dev_attr.attr,
2802 &sensor_dev_attr_pwm4_target_temp.dev_attr.attr,
2803 &sensor_dev_attr_fan4_target.dev_attr.attr,
2804 &sensor_dev_attr_fan4_tolerance.dev_attr.attr,
2805 &sensor_dev_attr_pwm4_stop_time.dev_attr.attr,
2806 &sensor_dev_attr_pwm4_step_up_time.dev_attr.attr,
2807 &sensor_dev_attr_pwm4_step_down_time.dev_attr.attr,
2808 &sensor_dev_attr_pwm4_start.dev_attr.attr,
2809 &sensor_dev_attr_pwm4_floor.dev_attr.attr,
2810 &sensor_dev_attr_pwm4_weight_temp_sel.dev_attr.attr,
2811 &sensor_dev_attr_pwm4_weight_temp_step.dev_attr.attr,
2812 &sensor_dev_attr_pwm4_weight_temp_step_tol.dev_attr.attr,
2813 &sensor_dev_attr_pwm4_weight_temp_step_base.dev_attr.attr,
2814 &sensor_dev_attr_pwm4_weight_duty_step.dev_attr.attr,
2818 &sensor_dev_attr_pwm5.dev_attr.attr,
2819 &sensor_dev_attr_pwm5_mode.dev_attr.attr,
2820 &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2821 &sensor_dev_attr_pwm5_temp_sel.dev_attr.attr,
2822 &sensor_dev_attr_pwm5_temp_tolerance.dev_attr.attr,
2823 &sensor_dev_attr_pwm5_crit_temp_tolerance.dev_attr.attr,
2824 &sensor_dev_attr_pwm5_target_temp.dev_attr.attr,
2825 &sensor_dev_attr_fan5_target.dev_attr.attr,
2826 &sensor_dev_attr_fan5_tolerance.dev_attr.attr,
2827 &sensor_dev_attr_pwm5_stop_time.dev_attr.attr,
2828 &sensor_dev_attr_pwm5_step_up_time.dev_attr.attr,
2829 &sensor_dev_attr_pwm5_step_down_time.dev_attr.attr,
2830 &sensor_dev_attr_pwm5_start.dev_attr.attr,
2831 &sensor_dev_attr_pwm5_floor.dev_attr.attr,
2832 &sensor_dev_attr_pwm5_weight_temp_sel.dev_attr.attr,
2833 &sensor_dev_attr_pwm5_weight_temp_step.dev_attr.attr,
2834 &sensor_dev_attr_pwm5_weight_temp_step_tol.dev_attr.attr,
2835 &sensor_dev_attr_pwm5_weight_temp_step_base.dev_attr.attr,
2836 &sensor_dev_attr_pwm5_weight_duty_step.dev_attr.attr,
2841 static const struct attribute_group nct6775_group_pwm[5] = {
2842 { .attrs = nct6775_attributes_pwm[0] },
2843 { .attrs = nct6775_attributes_pwm[1] },
2844 { .attrs = nct6775_attributes_pwm[2] },
2845 { .attrs = nct6775_attributes_pwm[3] },
2846 { .attrs = nct6775_attributes_pwm[4] },
2850 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2852 struct nct6775_data *data = nct6775_update_device(dev);
2853 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2855 return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2859 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2860 const char *buf, size_t count)
2862 struct nct6775_data *data = dev_get_drvdata(dev);
2863 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2865 int point = sattr->index;
2870 err = kstrtoul(buf, 10, &val);
2876 if (point == data->auto_pwm_num) {
2877 if (data->kind != nct6775 && !val)
2879 if (data->kind != nct6779 && val)
2883 mutex_lock(&data->update_lock);
2884 data->auto_pwm[nr][point] = val;
2885 if (point < data->auto_pwm_num) {
2886 nct6775_write_value(data,
2887 NCT6775_AUTO_PWM(data, nr, point),
2888 data->auto_pwm[nr][point]);
2890 switch (data->kind) {
2892 /* disable if needed (pwm == 0) */
2893 reg = nct6775_read_value(data,
2894 NCT6775_REG_CRITICAL_ENAB[nr]);
2899 nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
2903 break; /* always enabled, nothing to do */
2905 nct6775_write_value(data, NCT6779_REG_CRITICAL_PWM[nr],
2907 reg = nct6775_read_value(data,
2908 NCT6779_REG_CRITICAL_PWM_ENABLE[nr]);
2913 nct6775_write_value(data,
2914 NCT6779_REG_CRITICAL_PWM_ENABLE[nr],
2919 mutex_unlock(&data->update_lock);
2924 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
2926 struct nct6775_data *data = nct6775_update_device(dev);
2927 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2929 int point = sattr->index;
2932 * We don't know for sure if the temperature is signed or unsigned.
2933 * Assume it is unsigned.
2935 return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
2939 store_auto_temp(struct device *dev, struct device_attribute *attr,
2940 const char *buf, size_t count)
2942 struct nct6775_data *data = dev_get_drvdata(dev);
2943 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2945 int point = sattr->index;
2949 err = kstrtoul(buf, 10, &val);
2955 mutex_lock(&data->update_lock);
2956 data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
2957 if (point < data->auto_pwm_num) {
2958 nct6775_write_value(data,
2959 NCT6775_AUTO_TEMP(data, nr, point),
2960 data->auto_temp[nr][point]);
2962 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
2963 data->auto_temp[nr][point]);
2965 mutex_unlock(&data->update_lock);
2970 * The number of auto-point trip points is chip dependent.
2971 * Need to check support while generating/removing attribute files.
2973 static struct sensor_device_attribute_2 sda_auto_pwm_arrays[] = {
2974 SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IWUSR | S_IRUGO,
2975 show_auto_pwm, store_auto_pwm, 0, 0),
2976 SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IWUSR | S_IRUGO,
2977 show_auto_temp, store_auto_temp, 0, 0),
2978 SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IWUSR | S_IRUGO,
2979 show_auto_pwm, store_auto_pwm, 0, 1),
2980 SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IWUSR | S_IRUGO,
2981 show_auto_temp, store_auto_temp, 0, 1),
2982 SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IWUSR | S_IRUGO,
2983 show_auto_pwm, store_auto_pwm, 0, 2),
2984 SENSOR_ATTR_2(pwm1_auto_point3_temp, S_IWUSR | S_IRUGO,
2985 show_auto_temp, store_auto_temp, 0, 2),
2986 SENSOR_ATTR_2(pwm1_auto_point4_pwm, S_IWUSR | S_IRUGO,
2987 show_auto_pwm, store_auto_pwm, 0, 3),
2988 SENSOR_ATTR_2(pwm1_auto_point4_temp, S_IWUSR | S_IRUGO,
2989 show_auto_temp, store_auto_temp, 0, 3),
2990 SENSOR_ATTR_2(pwm1_auto_point5_pwm, S_IWUSR | S_IRUGO,
2991 show_auto_pwm, store_auto_pwm, 0, 4),
2992 SENSOR_ATTR_2(pwm1_auto_point5_temp, S_IWUSR | S_IRUGO,
2993 show_auto_temp, store_auto_temp, 0, 4),
2994 SENSOR_ATTR_2(pwm1_auto_point6_pwm, S_IWUSR | S_IRUGO,
2995 show_auto_pwm, store_auto_pwm, 0, 5),
2996 SENSOR_ATTR_2(pwm1_auto_point6_temp, S_IWUSR | S_IRUGO,
2997 show_auto_temp, store_auto_temp, 0, 5),
2998 SENSOR_ATTR_2(pwm1_auto_point7_pwm, S_IWUSR | S_IRUGO,
2999 show_auto_pwm, store_auto_pwm, 0, 6),
3000 SENSOR_ATTR_2(pwm1_auto_point7_temp, S_IWUSR | S_IRUGO,
3001 show_auto_temp, store_auto_temp, 0, 6),
3003 SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IWUSR | S_IRUGO,
3004 show_auto_pwm, store_auto_pwm, 1, 0),
3005 SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IWUSR | S_IRUGO,
3006 show_auto_temp, store_auto_temp, 1, 0),
3007 SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IWUSR | S_IRUGO,
3008 show_auto_pwm, store_auto_pwm, 1, 1),
3009 SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IWUSR | S_IRUGO,
3010 show_auto_temp, store_auto_temp, 1, 1),
3011 SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IWUSR | S_IRUGO,
3012 show_auto_pwm, store_auto_pwm, 1, 2),
3013 SENSOR_ATTR_2(pwm2_auto_point3_temp, S_IWUSR | S_IRUGO,
3014 show_auto_temp, store_auto_temp, 1, 2),
3015 SENSOR_ATTR_2(pwm2_auto_point4_pwm, S_IWUSR | S_IRUGO,
3016 show_auto_pwm, store_auto_pwm, 1, 3),
3017 SENSOR_ATTR_2(pwm2_auto_point4_temp, S_IWUSR | S_IRUGO,
3018 show_auto_temp, store_auto_temp, 1, 3),
3019 SENSOR_ATTR_2(pwm2_auto_point5_pwm, S_IWUSR | S_IRUGO,
3020 show_auto_pwm, store_auto_pwm, 1, 4),
3021 SENSOR_ATTR_2(pwm2_auto_point5_temp, S_IWUSR | S_IRUGO,
3022 show_auto_temp, store_auto_temp, 1, 4),
3023 SENSOR_ATTR_2(pwm2_auto_point6_pwm, S_IWUSR | S_IRUGO,
3024 show_auto_pwm, store_auto_pwm, 1, 5),
3025 SENSOR_ATTR_2(pwm2_auto_point6_temp, S_IWUSR | S_IRUGO,
3026 show_auto_temp, store_auto_temp, 1, 5),
3027 SENSOR_ATTR_2(pwm2_auto_point7_pwm, S_IWUSR | S_IRUGO,
3028 show_auto_pwm, store_auto_pwm, 1, 6),
3029 SENSOR_ATTR_2(pwm2_auto_point7_temp, S_IWUSR | S_IRUGO,
3030 show_auto_temp, store_auto_temp, 1, 6),
3032 SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IWUSR | S_IRUGO,
3033 show_auto_pwm, store_auto_pwm, 2, 0),
3034 SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IWUSR | S_IRUGO,
3035 show_auto_temp, store_auto_temp, 2, 0),
3036 SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IWUSR | S_IRUGO,
3037 show_auto_pwm, store_auto_pwm, 2, 1),
3038 SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IWUSR | S_IRUGO,
3039 show_auto_temp, store_auto_temp, 2, 1),
3040 SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IWUSR | S_IRUGO,
3041 show_auto_pwm, store_auto_pwm, 2, 2),
3042 SENSOR_ATTR_2(pwm3_auto_point3_temp, S_IWUSR | S_IRUGO,
3043 show_auto_temp, store_auto_temp, 2, 2),
3044 SENSOR_ATTR_2(pwm3_auto_point4_pwm, S_IWUSR | S_IRUGO,
3045 show_auto_pwm, store_auto_pwm, 2, 3),
3046 SENSOR_ATTR_2(pwm3_auto_point4_temp, S_IWUSR | S_IRUGO,
3047 show_auto_temp, store_auto_temp, 2, 3),
3048 SENSOR_ATTR_2(pwm3_auto_point5_pwm, S_IWUSR | S_IRUGO,
3049 show_auto_pwm, store_auto_pwm, 2, 4),
3050 SENSOR_ATTR_2(pwm3_auto_point5_temp, S_IWUSR | S_IRUGO,
3051 show_auto_temp, store_auto_temp, 2, 4),
3052 SENSOR_ATTR_2(pwm3_auto_point6_pwm, S_IWUSR | S_IRUGO,
3053 show_auto_pwm, store_auto_pwm, 2, 5),
3054 SENSOR_ATTR_2(pwm3_auto_point6_temp, S_IWUSR | S_IRUGO,
3055 show_auto_temp, store_auto_temp, 2, 5),
3056 SENSOR_ATTR_2(pwm3_auto_point7_pwm, S_IWUSR | S_IRUGO,
3057 show_auto_pwm, store_auto_pwm, 2, 6),
3058 SENSOR_ATTR_2(pwm3_auto_point7_temp, S_IWUSR | S_IRUGO,
3059 show_auto_temp, store_auto_temp, 2, 6),
3061 SENSOR_ATTR_2(pwm4_auto_point1_pwm, S_IWUSR | S_IRUGO,
3062 show_auto_pwm, store_auto_pwm, 3, 0),
3063 SENSOR_ATTR_2(pwm4_auto_point1_temp, S_IWUSR | S_IRUGO,
3064 show_auto_temp, store_auto_temp, 3, 0),
3065 SENSOR_ATTR_2(pwm4_auto_point2_pwm, S_IWUSR | S_IRUGO,
3066 show_auto_pwm, store_auto_pwm, 3, 1),
3067 SENSOR_ATTR_2(pwm4_auto_point2_temp, S_IWUSR | S_IRUGO,
3068 show_auto_temp, store_auto_temp, 3, 1),
3069 SENSOR_ATTR_2(pwm4_auto_point3_pwm, S_IWUSR | S_IRUGO,
3070 show_auto_pwm, store_auto_pwm, 3, 2),
3071 SENSOR_ATTR_2(pwm4_auto_point3_temp, S_IWUSR | S_IRUGO,
3072 show_auto_temp, store_auto_temp, 3, 2),
3073 SENSOR_ATTR_2(pwm4_auto_point4_pwm, S_IWUSR | S_IRUGO,
3074 show_auto_pwm, store_auto_pwm, 3, 3),
3075 SENSOR_ATTR_2(pwm4_auto_point4_temp, S_IWUSR | S_IRUGO,
3076 show_auto_temp, store_auto_temp, 3, 3),
3077 SENSOR_ATTR_2(pwm4_auto_point5_pwm, S_IWUSR | S_IRUGO,
3078 show_auto_pwm, store_auto_pwm, 3, 4),
3079 SENSOR_ATTR_2(pwm4_auto_point5_temp, S_IWUSR | S_IRUGO,
3080 show_auto_temp, store_auto_temp, 3, 4),
3081 SENSOR_ATTR_2(pwm4_auto_point6_pwm, S_IWUSR | S_IRUGO,
3082 show_auto_pwm, store_auto_pwm, 3, 5),
3083 SENSOR_ATTR_2(pwm4_auto_point6_temp, S_IWUSR | S_IRUGO,
3084 show_auto_temp, store_auto_temp, 3, 5),
3085 SENSOR_ATTR_2(pwm4_auto_point7_pwm, S_IWUSR | S_IRUGO,
3086 show_auto_pwm, store_auto_pwm, 3, 6),
3087 SENSOR_ATTR_2(pwm4_auto_point7_temp, S_IWUSR | S_IRUGO,
3088 show_auto_temp, store_auto_temp, 3, 6),
3090 SENSOR_ATTR_2(pwm5_auto_point1_pwm, S_IWUSR | S_IRUGO,
3091 show_auto_pwm, store_auto_pwm, 4, 0),
3092 SENSOR_ATTR_2(pwm5_auto_point1_temp, S_IWUSR | S_IRUGO,
3093 show_auto_temp, store_auto_temp, 4, 0),
3094 SENSOR_ATTR_2(pwm5_auto_point2_pwm, S_IWUSR | S_IRUGO,
3095 show_auto_pwm, store_auto_pwm, 4, 1),
3096 SENSOR_ATTR_2(pwm5_auto_point2_temp, S_IWUSR | S_IRUGO,
3097 show_auto_temp, store_auto_temp, 4, 1),
3098 SENSOR_ATTR_2(pwm5_auto_point3_pwm, S_IWUSR | S_IRUGO,
3099 show_auto_pwm, store_auto_pwm, 4, 2),
3100 SENSOR_ATTR_2(pwm5_auto_point3_temp, S_IWUSR | S_IRUGO,
3101 show_auto_temp, store_auto_temp, 4, 2),
3102 SENSOR_ATTR_2(pwm5_auto_point4_pwm, S_IWUSR | S_IRUGO,
3103 show_auto_pwm, store_auto_pwm, 4, 3),
3104 SENSOR_ATTR_2(pwm5_auto_point4_temp, S_IWUSR | S_IRUGO,
3105 show_auto_temp, store_auto_temp, 4, 3),
3106 SENSOR_ATTR_2(pwm5_auto_point5_pwm, S_IWUSR | S_IRUGO,
3107 show_auto_pwm, store_auto_pwm, 4, 4),
3108 SENSOR_ATTR_2(pwm5_auto_point5_temp, S_IWUSR | S_IRUGO,
3109 show_auto_temp, store_auto_temp, 4, 4),
3110 SENSOR_ATTR_2(pwm5_auto_point6_pwm, S_IWUSR | S_IRUGO,
3111 show_auto_pwm, store_auto_pwm, 4, 5),
3112 SENSOR_ATTR_2(pwm5_auto_point6_temp, S_IWUSR | S_IRUGO,
3113 show_auto_temp, store_auto_temp, 4, 5),
3114 SENSOR_ATTR_2(pwm5_auto_point7_pwm, S_IWUSR | S_IRUGO,
3115 show_auto_pwm, store_auto_pwm, 4, 6),
3116 SENSOR_ATTR_2(pwm5_auto_point7_temp, S_IWUSR | S_IRUGO,
3117 show_auto_temp, store_auto_temp, 4, 6),
3121 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
3123 struct nct6775_data *data = dev_get_drvdata(dev);
3124 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
3127 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
3129 /* Case open detection */
3132 clear_caseopen(struct device *dev, struct device_attribute *attr,
3133 const char *buf, size_t count)
3135 struct nct6775_data *data = dev_get_drvdata(dev);
3136 struct nct6775_sio_data *sio_data = dev->platform_data;
3137 int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
3142 if (kstrtoul(buf, 10, &val) || val != 0)
3145 mutex_lock(&data->update_lock);
3148 * Use CR registers to clear caseopen status.
3149 * The CR registers are the same for all chips, and not all chips
3150 * support clearing the caseopen status through "regular" registers.
3152 ret = superio_enter(sio_data->sioreg);
3158 superio_select(sio_data->sioreg, NCT6775_LD_ACPI);
3159 reg = superio_inb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
3160 reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3161 superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3162 reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3163 superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3164 superio_exit(sio_data->sioreg);
3166 data->valid = false; /* Force cache refresh */
3168 mutex_unlock(&data->update_lock);
3172 static struct sensor_device_attribute sda_caseopen[] = {
3173 SENSOR_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
3174 clear_caseopen, INTRUSION_ALARM_BASE),
3175 SENSOR_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
3176 clear_caseopen, INTRUSION_ALARM_BASE + 1),
3180 * Driver and device management
3183 static void nct6775_device_remove_files(struct device *dev)
3186 * some entries in the following arrays may not have been used in
3187 * device_create_file(), but device_remove_file() will ignore them
3190 struct nct6775_data *data = dev_get_drvdata(dev);
3192 for (i = 0; i < data->pwm_num; i++)
3193 sysfs_remove_group(&dev->kobj, &nct6775_group_pwm[i]);
3195 for (i = 0; i < ARRAY_SIZE(sda_pwm_max); i++)
3196 device_remove_file(dev, &sda_pwm_max[i].dev_attr);
3198 for (i = 0; i < ARRAY_SIZE(sda_pwm_step); i++)
3199 device_remove_file(dev, &sda_pwm_step[i].dev_attr);
3201 for (i = 0; i < ARRAY_SIZE(sda_weight_duty_base); i++)
3202 device_remove_file(dev, &sda_weight_duty_base[i].dev_attr);
3204 for (i = 0; i < ARRAY_SIZE(sda_auto_pwm_arrays); i++)
3205 device_remove_file(dev, &sda_auto_pwm_arrays[i].dev_attr);
3207 for (i = 0; i < data->in_num; i++)
3208 sysfs_remove_group(&dev->kobj, &nct6775_group_in[i]);
3210 for (i = 0; i < 5; i++) {
3211 device_remove_file(dev, &sda_fan_input[i].dev_attr);
3212 device_remove_file(dev, &sda_fan_alarm[i].dev_attr);
3213 device_remove_file(dev, &sda_fan_div[i].dev_attr);
3214 device_remove_file(dev, &sda_fan_min[i].dev_attr);
3215 device_remove_file(dev, &sda_fan_pulses[i].dev_attr);
3217 for (i = 0; i < NUM_TEMP; i++) {
3218 if (!(data->have_temp & (1 << i)))
3220 device_remove_file(dev, &sda_temp_input[i].dev_attr);
3221 device_remove_file(dev, &sda_temp_label[i].dev_attr);
3222 device_remove_file(dev, &sda_temp_max[i].dev_attr);
3223 device_remove_file(dev, &sda_temp_max_hyst[i].dev_attr);
3224 device_remove_file(dev, &sda_temp_crit[i].dev_attr);
3225 if (!(data->have_temp_fixed & (1 << i)))
3227 device_remove_file(dev, &sda_temp_type[i].dev_attr);
3228 device_remove_file(dev, &sda_temp_offset[i].dev_attr);
3229 if (i >= NUM_TEMP_ALARM)
3231 device_remove_file(dev, &sda_temp_alarm[i].dev_attr);
3234 device_remove_file(dev, &sda_caseopen[0].dev_attr);
3235 device_remove_file(dev, &sda_caseopen[1].dev_attr);
3237 device_remove_file(dev, &dev_attr_name);
3238 device_remove_file(dev, &dev_attr_cpu0_vid);
3241 /* Get the monitoring functions started */
3242 static inline void nct6775_init_device(struct nct6775_data *data)
3247 /* Start monitoring if needed */
3248 if (data->REG_CONFIG) {
3249 tmp = nct6775_read_value(data, data->REG_CONFIG);
3251 nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
3254 /* Enable temperature sensors if needed */
3255 for (i = 0; i < NUM_TEMP; i++) {
3256 if (!(data->have_temp & (1 << i)))
3258 if (!data->reg_temp_config[i])
3260 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
3262 nct6775_write_value(data, data->reg_temp_config[i],
3266 /* Enable VBAT monitoring if needed */
3267 tmp = nct6775_read_value(data, data->REG_VBAT);
3269 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
3271 diode = nct6775_read_value(data, data->REG_DIODE);
3273 for (i = 0; i < data->temp_fixed_num; i++) {
3274 if (!(data->have_temp_fixed & (1 << i)))
3276 if ((tmp & (0x02 << i))) /* diode */
3277 data->temp_type[i] = 3 - ((diode >> i) & 0x02);
3278 else /* thermistor */
3279 data->temp_type[i] = 4;
3284 nct6775_check_fan_inputs(const struct nct6775_sio_data *sio_data,
3285 struct nct6775_data *data)
3288 bool fan3pin, fan3min, fan4pin, fan4min, fan5pin;
3289 bool pwm3pin, pwm4pin, pwm5pin;
3292 ret = superio_enter(sio_data->sioreg);
3296 /* fan4 and fan5 share some pins with the GPIO and serial flash */
3297 if (data->kind == nct6775) {
3298 regval = superio_inb(sio_data->sioreg, 0x2c);
3300 fan3pin = regval & (1 << 6);
3302 pwm3pin = regval & (1 << 7);
3304 /* On NCT6775, fan4 shares pins with the fdc interface */
3305 fan4pin = !(superio_inb(sio_data->sioreg, 0x2A) & 0x80);
3310 } else if (data->kind == nct6776) {
3311 bool gpok = superio_inb(sio_data->sioreg, 0x27) & 0x80;
3313 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3314 regval = superio_inb(sio_data->sioreg, SIO_REG_ENABLE);
3319 fan3pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x40);
3324 fan4pin = superio_inb(sio_data->sioreg, 0x1C) & 0x01;
3329 fan5pin = superio_inb(sio_data->sioreg, 0x1C) & 0x02;
3336 } else { /* NCT6779D */
3337 regval = superio_inb(sio_data->sioreg, 0x1c);
3339 fan3pin = !(regval & (1 << 5));
3340 fan4pin = !(regval & (1 << 6));
3341 fan5pin = !(regval & (1 << 7));
3343 pwm3pin = !(regval & (1 << 0));
3344 pwm4pin = !(regval & (1 << 1));
3345 pwm5pin = !(regval & (1 << 2));
3351 superio_exit(sio_data->sioreg);
3353 data->has_fan = data->has_fan_min = 0x03; /* fan1 and fan2 */
3354 data->has_fan |= fan3pin << 2;
3355 data->has_fan_min |= fan3min << 2;
3357 data->has_fan |= (fan4pin << 3) | (fan5pin << 4);
3358 data->has_fan_min |= (fan4min << 3) | (fan5pin << 4);
3360 data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) | (pwm5pin << 4);
3365 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
3366 int *available, int *mask)
3371 for (i = 0; i < data->pwm_num && *available; i++) {
3376 src = nct6775_read_value(data, regp[i]);
3378 if (!src || (*mask & (1 << src)))
3380 if (src >= data->temp_label_num ||
3381 !strlen(data->temp_label[src]))
3384 index = __ffs(*available);
3385 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3386 *available &= ~(1 << index);
3391 static int nct6775_probe(struct platform_device *pdev)
3393 struct device *dev = &pdev->dev;
3394 struct nct6775_sio_data *sio_data = dev->platform_data;
3395 struct nct6775_data *data;
3396 struct resource *res;
3398 int src, mask, available;
3399 const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3400 const u16 *reg_temp_alternate, *reg_temp_crit;
3402 bool have_vid = false;
3405 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3406 if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3410 data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3415 data->kind = sio_data->kind;
3416 data->addr = res->start;
3417 mutex_init(&data->lock);
3418 mutex_init(&data->update_lock);
3419 data->name = nct6775_device_names[data->kind];
3420 data->bank = 0xff; /* Force initial bank selection */
3421 platform_set_drvdata(pdev, data);
3423 switch (data->kind) {
3427 data->auto_pwm_num = 6;
3428 data->has_fan_div = true;
3429 data->temp_fixed_num = 3;
3431 data->ALARM_BITS = NCT6775_ALARM_BITS;
3433 data->fan_from_reg = fan_from_reg16;
3434 data->fan_from_reg_min = fan_from_reg8;
3435 data->target_temp_mask = 0x7f;
3436 data->tolerance_mask = 0x0f;
3437 data->speed_tolerance_limit = 15;
3439 data->temp_label = nct6775_temp_label;
3440 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
3442 data->REG_CONFIG = NCT6775_REG_CONFIG;
3443 data->REG_VBAT = NCT6775_REG_VBAT;
3444 data->REG_DIODE = NCT6775_REG_DIODE;
3445 data->REG_VIN = NCT6775_REG_IN;
3446 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3447 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3448 data->REG_TARGET = NCT6775_REG_TARGET;
3449 data->REG_FAN = NCT6775_REG_FAN;
3450 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3451 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3452 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3453 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3454 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3455 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3456 data->REG_PWM[0] = NCT6775_REG_PWM;
3457 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3458 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3459 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3460 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3461 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3462 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3463 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3464 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3465 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3466 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3467 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3468 data->REG_CRITICAL_TEMP_TOLERANCE
3469 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3470 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3471 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3472 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3473 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3474 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3475 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3476 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3477 data->REG_ALARM = NCT6775_REG_ALARM;
3479 reg_temp = NCT6775_REG_TEMP;
3480 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3481 reg_temp_over = NCT6775_REG_TEMP_OVER;
3482 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3483 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3484 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3485 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3491 data->auto_pwm_num = 4;
3492 data->has_fan_div = false;
3493 data->temp_fixed_num = 3;
3495 data->ALARM_BITS = NCT6776_ALARM_BITS;
3497 data->fan_from_reg = fan_from_reg13;
3498 data->fan_from_reg_min = fan_from_reg13;
3499 data->target_temp_mask = 0xff;
3500 data->tolerance_mask = 0x07;
3501 data->speed_tolerance_limit = 63;
3503 data->temp_label = nct6776_temp_label;
3504 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3506 data->REG_CONFIG = NCT6775_REG_CONFIG;
3507 data->REG_VBAT = NCT6775_REG_VBAT;
3508 data->REG_DIODE = NCT6775_REG_DIODE;
3509 data->REG_VIN = NCT6775_REG_IN;
3510 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3511 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3512 data->REG_TARGET = NCT6775_REG_TARGET;
3513 data->REG_FAN = NCT6775_REG_FAN;
3514 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3515 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3516 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3517 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3518 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3519 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3520 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3521 data->REG_PWM[0] = NCT6775_REG_PWM;
3522 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3523 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3524 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3525 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3526 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3527 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3528 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3529 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3530 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3531 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3532 data->REG_CRITICAL_TEMP_TOLERANCE
3533 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3534 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3535 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3536 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3537 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3538 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3539 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3540 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3541 data->REG_ALARM = NCT6775_REG_ALARM;
3543 reg_temp = NCT6775_REG_TEMP;
3544 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3545 reg_temp_over = NCT6775_REG_TEMP_OVER;
3546 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3547 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3548 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3549 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3555 data->auto_pwm_num = 4;
3556 data->has_fan_div = false;
3557 data->temp_fixed_num = 6;
3559 data->ALARM_BITS = NCT6779_ALARM_BITS;
3561 data->fan_from_reg = fan_from_reg13;
3562 data->fan_from_reg_min = fan_from_reg13;
3563 data->target_temp_mask = 0xff;
3564 data->tolerance_mask = 0x07;
3565 data->speed_tolerance_limit = 63;
3567 data->temp_label = nct6779_temp_label;
3568 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3570 data->REG_CONFIG = NCT6775_REG_CONFIG;
3571 data->REG_VBAT = NCT6775_REG_VBAT;
3572 data->REG_DIODE = NCT6775_REG_DIODE;
3573 data->REG_VIN = NCT6779_REG_IN;
3574 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3575 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3576 data->REG_TARGET = NCT6775_REG_TARGET;
3577 data->REG_FAN = NCT6779_REG_FAN;
3578 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3579 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3580 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3581 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3582 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3583 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3584 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3585 data->REG_PWM[0] = NCT6775_REG_PWM;
3586 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3587 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3588 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3589 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3590 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3591 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3592 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3593 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3594 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3595 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3596 data->REG_CRITICAL_TEMP_TOLERANCE
3597 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3598 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3599 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3600 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3601 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3602 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3603 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3604 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3605 data->REG_ALARM = NCT6779_REG_ALARM;
3607 reg_temp = NCT6779_REG_TEMP;
3608 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3609 reg_temp_over = NCT6779_REG_TEMP_OVER;
3610 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3611 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3612 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3613 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3619 data->have_in = (1 << data->in_num) - 1;
3620 data->have_temp = 0;
3623 * On some boards, not all available temperature sources are monitored,
3624 * even though some of the monitoring registers are unused.
3625 * Get list of unused monitoring registers, then detect if any fan
3626 * controls are configured to use unmonitored temperature sources.
3627 * If so, assign the unmonitored temperature sources to available
3628 * monitoring registers.
3632 for (i = 0; i < num_reg_temp; i++) {
3633 if (reg_temp[i] == 0)
3636 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3637 if (!src || (mask & (1 << src)))
3638 available |= 1 << i;
3644 * Now find unmonitored temperature registers and enable monitoring
3645 * if additional monitoring registers are available.
3647 add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
3648 add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
3651 s = NUM_TEMP_FIXED; /* First dynamic temperature attribute */
3652 for (i = 0; i < num_reg_temp; i++) {
3653 if (reg_temp[i] == 0)
3656 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3657 if (!src || (mask & (1 << src)))
3660 if (src >= data->temp_label_num ||
3661 !strlen(data->temp_label[src])) {
3663 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3664 src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
3670 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3671 if (src <= data->temp_fixed_num) {
3672 data->have_temp |= 1 << (src - 1);
3673 data->have_temp_fixed |= 1 << (src - 1);
3674 data->reg_temp[0][src - 1] = reg_temp[i];
3675 data->reg_temp[1][src - 1] = reg_temp_over[i];
3676 data->reg_temp[2][src - 1] = reg_temp_hyst[i];
3677 data->reg_temp_config[src - 1] = reg_temp_config[i];
3678 data->temp_src[src - 1] = src;
3685 /* Use dynamic index for other sources */
3686 data->have_temp |= 1 << s;
3687 data->reg_temp[0][s] = reg_temp[i];
3688 data->reg_temp[1][s] = reg_temp_over[i];
3689 data->reg_temp[2][s] = reg_temp_hyst[i];
3690 data->reg_temp_config[s] = reg_temp_config[i];
3691 if (reg_temp_crit[src - 1])
3692 data->reg_temp[3][s] = reg_temp_crit[src - 1];
3694 data->temp_src[s] = src;
3698 #ifdef USE_ALTERNATE
3700 * Go through the list of alternate temp registers and enable
3702 * The temperature is already monitored if the respective bit in <mask>
3705 for (i = 0; i < data->temp_label_num - 1; i++) {
3706 if (!reg_temp_alternate[i])
3708 if (mask & (1 << (i + 1)))
3710 if (i < data->temp_fixed_num) {
3711 if (data->have_temp & (1 << i))
3713 data->have_temp |= 1 << i;
3714 data->have_temp_fixed |= 1 << i;
3715 data->reg_temp[0][i] = reg_temp_alternate[i];
3716 data->reg_temp[1][i] = reg_temp_over[i];
3717 data->reg_temp[2][i] = reg_temp_hyst[i];
3718 data->temp_src[i] = i + 1;
3722 if (s >= NUM_TEMP) /* Abort if no more space */
3725 data->have_temp |= 1 << s;
3726 data->reg_temp[0][s] = reg_temp_alternate[i];
3727 data->temp_src[s] = i + 1;
3730 #endif /* USE_ALTERNATE */
3732 switch (data->kind) {
3737 * On NCT6776, AUXTIN and VIN3 pins are shared.
3738 * Only way to detect it is to check if AUXTIN is used
3739 * as a temperature source, and if that source is
3742 * If that is the case, disable in6, which reports VIN3.
3743 * Otherwise disable temp3.
3745 if (data->have_temp & (1 << 2)) {
3746 u8 reg = nct6775_read_value(data,
3747 data->reg_temp_config[2]);
3749 data->have_temp &= ~(1 << 2);
3751 data->have_in &= ~(1 << 6);
3762 * There does not seem to be a clean way to detect if VINx or
3763 * AUXTINx is active, so for keep both sensor types enabled
3769 /* Initialize the chip */
3770 nct6775_init_device(data);
3772 err = superio_enter(sio_data->sioreg);
3776 cr2a = superio_inb(sio_data->sioreg, 0x2a);
3777 switch (data->kind) {
3779 have_vid = (cr2a & 0x40);
3782 have_vid = (cr2a & 0x60) == 0x40;
3790 * We can get the VID input values directly at logical device D 0xe3.
3793 superio_select(sio_data->sioreg, NCT6775_LD_VID);
3794 data->vid = superio_inb(sio_data->sioreg, 0xe3);
3795 data->vrm = vid_which_vrm();
3801 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3802 tmp = superio_inb(sio_data->sioreg,
3803 NCT6775_REG_CR_FAN_DEBOUNCE);
3804 switch (data->kind) {
3813 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
3815 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
3819 superio_exit(sio_data->sioreg);
3822 err = device_create_file(dev, &dev_attr_cpu0_vid);
3827 err = nct6775_check_fan_inputs(sio_data, data);
3831 /* Read fan clock dividers immediately */
3832 nct6775_init_fan_common(dev, data);
3834 /* Register sysfs hooks */
3835 for (i = 0; i < data->pwm_num; i++) {
3836 if (!(data->has_pwm & (1 << i)))
3839 err = sysfs_create_group(&dev->kobj, &nct6775_group_pwm[i]);
3843 if (data->REG_PWM[3]) {
3844 err = device_create_file(dev,
3845 &sda_pwm_max[i].dev_attr);
3849 if (data->REG_PWM[4]) {
3850 err = device_create_file(dev,
3851 &sda_pwm_step[i].dev_attr);
3855 if (data->REG_PWM[6]) {
3856 err = device_create_file(dev,
3857 &sda_weight_duty_base[i].dev_attr);
3862 for (i = 0; i < ARRAY_SIZE(sda_auto_pwm_arrays); i++) {
3863 struct sensor_device_attribute_2 *attr =
3864 &sda_auto_pwm_arrays[i];
3866 if (!(data->has_pwm & (1 << attr->nr)))
3868 if (attr->index > data->auto_pwm_num)
3870 err = device_create_file(dev, &attr->dev_attr);
3875 for (i = 0; i < data->in_num; i++) {
3876 if (!(data->have_in & (1 << i)))
3878 err = sysfs_create_group(&dev->kobj, &nct6775_group_in[i]);
3883 for (i = 0; i < 5; i++) {
3884 if (data->has_fan & (1 << i)) {
3885 err = device_create_file(dev,
3886 &sda_fan_input[i].dev_attr);
3889 err = device_create_file(dev,
3890 &sda_fan_alarm[i].dev_attr);
3893 if (data->kind != nct6776 &&
3894 data->kind != nct6779) {
3895 err = device_create_file(dev,
3896 &sda_fan_div[i].dev_attr);
3900 if (data->has_fan_min & (1 << i)) {
3901 err = device_create_file(dev,
3902 &sda_fan_min[i].dev_attr);
3906 err = device_create_file(dev,
3907 &sda_fan_pulses[i].dev_attr);
3913 for (i = 0; i < NUM_TEMP; i++) {
3914 if (!(data->have_temp & (1 << i)))
3916 err = device_create_file(dev, &sda_temp_input[i].dev_attr);
3919 if (data->temp_label) {
3920 err = device_create_file(dev,
3921 &sda_temp_label[i].dev_attr);
3925 if (data->reg_temp[1][i]) {
3926 err = device_create_file(dev,
3927 &sda_temp_max[i].dev_attr);
3931 if (data->reg_temp[2][i]) {
3932 err = device_create_file(dev,
3933 &sda_temp_max_hyst[i].dev_attr);
3937 if (data->reg_temp[3][i]) {
3938 err = device_create_file(dev,
3939 &sda_temp_crit[i].dev_attr);
3943 if (!(data->have_temp_fixed & (1 << i)))
3945 err = device_create_file(dev, &sda_temp_type[i].dev_attr);
3948 err = device_create_file(dev, &sda_temp_offset[i].dev_attr);
3951 if (i >= NUM_TEMP_ALARM ||
3952 data->ALARM_BITS[TEMP_ALARM_BASE + i] < 0)
3954 err = device_create_file(dev, &sda_temp_alarm[i].dev_attr);
3959 for (i = 0; i < ARRAY_SIZE(sda_caseopen); i++) {
3960 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + i] < 0)
3962 err = device_create_file(dev, &sda_caseopen[i].dev_attr);
3967 err = device_create_file(dev, &dev_attr_name);
3971 data->hwmon_dev = hwmon_device_register(dev);
3972 if (IS_ERR(data->hwmon_dev)) {
3973 err = PTR_ERR(data->hwmon_dev);
3980 nct6775_device_remove_files(dev);
3984 static int nct6775_remove(struct platform_device *pdev)
3986 struct nct6775_data *data = platform_get_drvdata(pdev);
3988 hwmon_device_unregister(data->hwmon_dev);
3989 nct6775_device_remove_files(&pdev->dev);
3995 static int nct6775_suspend(struct device *dev)
3997 struct nct6775_data *data = nct6775_update_device(dev);
3998 struct nct6775_sio_data *sio_data = dev->platform_data;
4000 mutex_lock(&data->update_lock);
4001 data->vbat = nct6775_read_value(data, data->REG_VBAT);
4002 if (sio_data->kind == nct6775) {
4003 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
4004 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
4006 mutex_unlock(&data->update_lock);
4011 static int nct6775_resume(struct device *dev)
4013 struct nct6775_data *data = dev_get_drvdata(dev);
4014 struct nct6775_sio_data *sio_data = dev->platform_data;
4017 mutex_lock(&data->update_lock);
4018 data->bank = 0xff; /* Force initial bank selection */
4020 /* Restore limits */
4021 for (i = 0; i < data->in_num; i++) {
4022 if (!(data->have_in & (1 << i)))
4025 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
4027 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
4031 for (i = 0; i < 5; i++) {
4032 if (!(data->has_fan_min & (1 << i)))
4035 nct6775_write_value(data, data->REG_FAN_MIN[i],
4039 for (i = 0; i < NUM_TEMP; i++) {
4040 if (!(data->have_temp & (1 << i)))
4043 for (j = 1; j < 4; j++)
4044 if (data->reg_temp[j][i])
4045 nct6775_write_temp(data, data->reg_temp[j][i],
4049 /* Restore other settings */
4050 nct6775_write_value(data, data->REG_VBAT, data->vbat);
4051 if (sio_data->kind == nct6775) {
4052 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
4053 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
4056 /* Force re-reading all values */
4057 data->valid = false;
4058 mutex_unlock(&data->update_lock);
4063 static const struct dev_pm_ops nct6775_dev_pm_ops = {
4064 .suspend = nct6775_suspend,
4065 .resume = nct6775_resume,
4068 #define NCT6775_DEV_PM_OPS (&nct6775_dev_pm_ops)
4070 #define NCT6775_DEV_PM_OPS NULL
4071 #endif /* CONFIG_PM */
4073 static struct platform_driver nct6775_driver = {
4075 .owner = THIS_MODULE,
4077 .pm = NCT6775_DEV_PM_OPS,
4079 .probe = nct6775_probe,
4080 .remove = nct6775_remove,
4083 /* nct6775_find() looks for a '627 in the Super-I/O config space */
4084 static int __init nct6775_find(int sioaddr, unsigned short *addr,
4085 struct nct6775_sio_data *sio_data)
4087 static const char sio_name_NCT6775[] __initconst = "NCT6775F";
4088 static const char sio_name_NCT6776[] __initconst = "NCT6776F";
4089 static const char sio_name_NCT6779[] __initconst = "NCT6779D";
4092 const char *sio_name;
4095 err = superio_enter(sioaddr);
4102 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
4103 | superio_inb(sioaddr, SIO_REG_DEVID + 1);
4104 switch (val & SIO_ID_MASK) {
4105 case SIO_NCT6775_ID:
4106 sio_data->kind = nct6775;
4107 sio_name = sio_name_NCT6775;
4109 case SIO_NCT6776_ID:
4110 sio_data->kind = nct6776;
4111 sio_name = sio_name_NCT6776;
4113 case SIO_NCT6779_ID:
4114 sio_data->kind = nct6779;
4115 sio_name = sio_name_NCT6779;
4119 pr_debug("unsupported chip ID: 0x%04x\n", val);
4120 superio_exit(sioaddr);
4124 /* We have a known chip, find the HWM I/O address */
4125 superio_select(sioaddr, NCT6775_LD_HWM);
4126 val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
4127 | superio_inb(sioaddr, SIO_REG_ADDR + 1);
4128 *addr = val & IOREGION_ALIGNMENT;
4130 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
4131 superio_exit(sioaddr);
4135 /* Activate logical device if needed */
4136 val = superio_inb(sioaddr, SIO_REG_ENABLE);
4137 if (!(val & 0x01)) {
4138 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
4139 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
4142 superio_exit(sioaddr);
4143 pr_info("Found %s chip at %#x\n", sio_name, *addr);
4144 sio_data->sioreg = sioaddr;
4150 * when Super-I/O functions move to a separate file, the Super-I/O
4151 * bus will manage the lifetime of the device and this module will only keep
4152 * track of the nct6775 driver. But since we platform_device_alloc(), we
4153 * must keep track of the device
4155 static struct platform_device *pdev;
4157 static int __init sensors_nct6775_init(void)
4160 unsigned short address;
4161 struct resource res;
4162 struct nct6775_sio_data sio_data;
4165 * initialize sio_data->kind and sio_data->sioreg.
4167 * when Super-I/O functions move to a separate file, the Super-I/O
4168 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
4169 * nct6775 hardware monitor, and call probe()
4171 if (nct6775_find(0x2e, &address, &sio_data) &&
4172 nct6775_find(0x4e, &address, &sio_data))
4175 err = platform_driver_register(&nct6775_driver);
4179 pdev = platform_device_alloc(DRVNAME, address);
4182 pr_err("Device allocation failed\n");
4183 goto exit_unregister;
4186 err = platform_device_add_data(pdev, &sio_data,
4187 sizeof(struct nct6775_sio_data));
4189 pr_err("Platform data allocation failed\n");
4190 goto exit_device_put;
4193 memset(&res, 0, sizeof(res));
4195 res.start = address + IOREGION_OFFSET;
4196 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
4197 res.flags = IORESOURCE_IO;
4199 err = acpi_check_resource_conflict(&res);
4201 goto exit_device_put;
4203 err = platform_device_add_resources(pdev, &res, 1);
4205 pr_err("Device resource addition failed (%d)\n", err);
4206 goto exit_device_put;
4209 /* platform_device_add calls probe() */
4210 err = platform_device_add(pdev);
4212 pr_err("Device addition failed (%d)\n", err);
4213 goto exit_device_put;
4219 platform_device_put(pdev);
4221 platform_driver_unregister(&nct6775_driver);
4226 static void __exit sensors_nct6775_exit(void)
4228 platform_device_unregister(pdev);
4229 platform_driver_unregister(&nct6775_driver);
4232 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4233 MODULE_DESCRIPTION("NCT6775F/NCT6776F/NCT6779D driver");
4234 MODULE_LICENSE("GPL");
4236 module_init(sensors_nct6775_init);
4237 module_exit(sensors_nct6775_exit);