git.sur5r.net Git - groeck-nct6775/blob - nct6775.c

   1 /*
   2  * nct6775 - Driver for the hardware monitoring functionality of
   3  *             Nuvoton NCT677x Super-I/O chips
   4  *
   5  * Copyright (C) 2012  Guenter Roeck <linux@roeck-us.net>
   6  *
   7  * Derived from w83627ehf driver
   8  * Copyright (C) 2005-2012  Jean Delvare <jdelvare@suse.de>
   9  * Copyright (C) 2006  Yuan Mu (Winbond),
  10  *                     Rudolf Marek <r.marek@assembler.cz>
  11  *                     David Hubbard <david.c.hubbard@gmail.com>
  12  *                     Daniel J Blueman <daniel.blueman@gmail.com>
  13  * Copyright (C) 2010  Sheng-Yuan Huang (Nuvoton) (PS00)
  14  *
  15  * Shamelessly ripped from the w83627hf driver
  16  * Copyright (C) 2003  Mark Studebaker
  17  *
  18  * This program is free software; you can redistribute it and/or modify
  19  * it under the terms of the GNU General Public License as published by
  20  * the Free Software Foundation; either version 2 of the License, or
  21  * (at your option) any later version.
  22  *
  23  * This program is distributed in the hope that it will be useful,
  24  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26  * GNU General Public License for more details.
  27  *
  28  * You should have received a copy of the GNU General Public License
  29  * along with this program; if not, write to the Free Software
  30  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  31  *
  32  *
  33  * Supports the following chips:
  34  *
  35  * Chip        #vin    #fan    #pwm    #temp  chip IDs       man ID
  36  * nct6106d     9      3       3       6+3    0xc450 0xc1    0x5ca3
  37  * nct6775f     9      4       3       6+3    0xb470 0xc1    0x5ca3
  38  * nct6776f     9      5       3       6+3    0xc330 0xc1    0x5ca3
  39  * nct6779d    15      5       5       2+6    0xc560 0xc1    0x5ca3
  40  * nct6791d    15      6       6       2+6    0xc800 0xc1    0x5ca3
  41  * nct6792d    15      6       6       2+6    0xc910 0xc1    0x5ca3
  42  * nct6793d    15      6       6       2+6    0xd120 0xc1    0x5ca3
  43  * nct6795d    14      6       6       2+6    0xd350 0xc1    0x5ca3
  44  *
  45  * #temp lists the number of monitored temperature sources (first value) plus
  46  * the number of directly connectable temperature sensors (second value).
  47  */
  48
  49 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  50
  51 #include <linux/module.h>
  52 #include <linux/init.h>
  53 #include <linux/slab.h>
  54 #include <linux/jiffies.h>
  55 #include <linux/platform_device.h>
  56 #include <linux/hwmon.h>
  57 #include <linux/hwmon-sysfs.h>
  58 #include <linux/hwmon-vid.h>
  59 #include <linux/err.h>
  60 #include <linux/mutex.h>
  61 #include <linux/acpi.h>
  62 #include <linux/dmi.h>
  63 #include <linux/io.h>
  64 #include "lm75.h"
  65 #include "compat.h"
  66
  67 #define USE_ALTERNATE
  68
  69 enum kinds { nct6106, nct6775, nct6776, nct6779, nct6791, nct6792, nct6793,
  70              nct6795 };
  71
  72 /* used to set data->name = nct6775_device_names[data->sio_kind] */
  73 static const char * const nct6775_device_names[] = {
  74         "nct6106",
  75         "nct6775",
  76         "nct6776",
  77         "nct6779",
  78         "nct6791",
  79         "nct6792",
  80         "nct6793",
  81         "nct6795",
  82 };
  83
  84 static const char * const nct6775_sio_names[] __initconst = {
  85         "NCT6106D",
  86         "NCT6775F",
  87         "NCT6776D/F",
  88         "NCT6779D",
  89         "NCT6791D",
  90         "NCT6792D",
  91         "NCT6793D",
  92         "NCT6795D",
  93 };
  94
  95 static unsigned short force_id;
  96 module_param(force_id, ushort, 0);
  97 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  98
  99 static unsigned short fan_debounce;
 100 module_param(fan_debounce, ushort, 0);
 101 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
 102
 103 #define DRVNAME "nct6775"
 104
 105 /*
 106  * Super-I/O constants and functions
 107  */
 108
 109 #define NCT6775_LD_ACPI         0x0a
 110 #define NCT6775_LD_HWM          0x0b
 111 #define NCT6775_LD_VID          0x0d
 112 #define NCT6775_LD_12           0x12
 113
 114 #define SIO_REG_LDSEL           0x07    /* Logical device select */
 115 #define SIO_REG_DEVID           0x20    /* Device ID (2 bytes) */
 116 #define SIO_REG_ENABLE          0x30    /* Logical device enable */
 117 #define SIO_REG_ADDR            0x60    /* Logical device address (2 bytes) */
 118
 119 #define SIO_NCT6106_ID          0xc450
 120 #define SIO_NCT6775_ID          0xb470
 121 #define SIO_NCT6776_ID          0xc330
 122 #define SIO_NCT6779_ID          0xc560
 123 #define SIO_NCT6791_ID          0xc800
 124 #define SIO_NCT6792_ID          0xc910
 125 #define SIO_NCT6793_ID          0xd120
 126 #define SIO_NCT6795_ID          0xd350
 127 #define SIO_ID_MASK             0xFFF0
 128
 129 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
 130
 131 static inline void
 132 superio_outb(int ioreg, int reg, int val)
 133 {
 134         outb(reg, ioreg);
 135         outb(val, ioreg + 1);
 136 }
 137
 138 static inline int
 139 superio_inb(int ioreg, int reg)
 140 {
 141         outb(reg, ioreg);
 142         return inb(ioreg + 1);
 143 }
 144
 145 static inline void
 146 superio_select(int ioreg, int ld)
 147 {
 148         outb(SIO_REG_LDSEL, ioreg);
 149         outb(ld, ioreg + 1);
 150 }
 151
 152 static inline int
 153 superio_enter(int ioreg)
 154 {
 155         /*
 156          * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
 157          */
 158         if (!request_muxed_region(ioreg, 2, DRVNAME))
 159                 return -EBUSY;
 160
 161         outb(0x87, ioreg);
 162         outb(0x87, ioreg);
 163
 164         return 0;
 165 }
 166
 167 static inline void
 168 superio_exit(int ioreg)
 169 {
 170         outb(0xaa, ioreg);
 171         outb(0x02, ioreg);
 172         outb(0x02, ioreg + 1);
 173         release_region(ioreg, 2);
 174 }
 175
 176 /*
 177  * ISA constants
 178  */
 179
 180 #define IOREGION_ALIGNMENT      (~7)
 181 #define IOREGION_OFFSET         5
 182 #define IOREGION_LENGTH         2
 183 #define ADDR_REG_OFFSET         0
 184 #define DATA_REG_OFFSET         1
 185
 186 #define NCT6775_REG_BANK        0x4E
 187 #define NCT6775_REG_CONFIG      0x40
 188
 189 /*
 190  * Not currently used:
 191  * REG_MAN_ID has the value 0x5ca3 for all supported chips.
 192  * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
 193  * REG_MAN_ID is at port 0x4f
 194  * REG_CHIP_ID is at port 0x58
 195  */
 196
 197 #define NUM_TEMP        10      /* Max number of temp attribute sets w/ limits*/
 198 #define NUM_TEMP_FIXED  6       /* Max number of fixed temp attribute sets */
 199
 200 #define NUM_REG_ALARM   7       /* Max number of alarm registers */
 201 #define NUM_REG_BEEP    5       /* Max number of beep registers */
 202
 203 #define NUM_FAN         6
 204
 205 #define TEMP_SOURCE_VIRTUAL     0x1f
 206
 207 /* Common and NCT6775 specific data */
 208
 209 /* Voltage min/max registers for nr=7..14 are in bank 5 */
 210
 211 static const u16 NCT6775_REG_IN_MAX[] = {
 212         0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
 213         0x55c, 0x55e, 0x560, 0x562 };
 214 static const u16 NCT6775_REG_IN_MIN[] = {
 215         0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
 216         0x55d, 0x55f, 0x561, 0x563 };
 217 static const u16 NCT6775_REG_IN[] = {
 218         0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
 219 };
 220
 221 #define NCT6775_REG_VBAT                0x5D
 222 #define NCT6775_REG_DIODE               0x5E
 223 #define NCT6775_DIODE_MASK              0x02
 224
 225 #define NCT6775_REG_FANDIV1             0x506
 226 #define NCT6775_REG_FANDIV2             0x507
 227
 228 #define NCT6775_REG_CR_FAN_DEBOUNCE     0xf0
 229
 230 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
 231
 232 /* 0..15 voltages, 16..23 fans, 24..29 temperatures, 30..31 intrusion */
 233
 234 static const s8 NCT6775_ALARM_BITS[] = {
 235         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 236         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 237         -1,                             /* unused */
 238         6, 7, 11, -1, -1,               /* fan1..fan5 */
 239         -1, -1, -1,                     /* unused */
 240         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 241         12, -1 };                       /* intrusion0, intrusion1 */
 242
 243 #define FAN_ALARM_BASE          16
 244 #define TEMP_ALARM_BASE         24
 245 #define INTRUSION_ALARM_BASE    30
 246
 247 static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e };
 248
 249 /*
 250  * 0..14 voltages, 15 global beep enable, 16..23 fans, 24..29 temperatures,
 251  * 30..31 intrusion
 252  */
 253 static const s8 NCT6775_BEEP_BITS[] = {
 254         0, 1, 2, 3, 8, 9, 10, 16,       /* in0.. in7 */
 255         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 256         21,                             /* global beep enable */
 257         6, 7, 11, 28, -1,               /* fan1..fan5 */
 258         -1, -1, -1,                     /* unused */
 259         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 260         12, -1 };                       /* intrusion0, intrusion1 */
 261
 262 #define BEEP_ENABLE_BASE                15
 263
 264 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
 265 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
 266
 267 /* DC or PWM output fan configuration */
 268 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
 269 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
 270
 271 /* Advanced Fan control, some values are common for all fans */
 272
 273 static const u16 NCT6775_REG_TARGET[] = {
 274         0x101, 0x201, 0x301, 0x801, 0x901, 0xa01 };
 275 static const u16 NCT6775_REG_FAN_MODE[] = {
 276         0x102, 0x202, 0x302, 0x802, 0x902, 0xa02 };
 277 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
 278         0x103, 0x203, 0x303, 0x803, 0x903, 0xa03 };
 279 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
 280         0x104, 0x204, 0x304, 0x804, 0x904, 0xa04 };
 281 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
 282         0x105, 0x205, 0x305, 0x805, 0x905, 0xa05 };
 283 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = {
 284         0x106, 0x206, 0x306, 0x806, 0x906, 0xa06 };
 285 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
 286 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
 287
 288 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
 289         0x107, 0x207, 0x307, 0x807, 0x907, 0xa07 };
 290 static const u16 NCT6775_REG_PWM[] = {
 291         0x109, 0x209, 0x309, 0x809, 0x909, 0xa09 };
 292 static const u16 NCT6775_REG_PWM_READ[] = {
 293         0x01, 0x03, 0x11, 0x13, 0x15, 0xa09 };
 294
 295 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
 296 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
 297 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
 298 static const u16 NCT6775_FAN_PULSE_SHIFT[] = { 0, 0, 0, 0, 0, 0 };
 299
 300 static const u16 NCT6775_REG_TEMP[] = {
 301         0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
 302
 303 static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77 };
 304
 305 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 306         0, 0x152, 0x252, 0x628, 0x629, 0x62A };
 307 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 308         0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
 309 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 310         0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
 311
 312 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 313         0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
 314
 315 static const u16 NCT6775_REG_TEMP_SEL[] = {
 316         0x100, 0x200, 0x300, 0x800, 0x900, 0xa00 };
 317
 318 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
 319         0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 };
 320 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
 321         0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a };
 322 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
 323         0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b };
 324 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
 325         0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c };
 326 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
 327         0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d };
 328
 329 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
 330
 331 static const u16 NCT6775_REG_AUTO_TEMP[] = {
 332         0x121, 0x221, 0x321, 0x821, 0x921, 0xa21 };
 333 static const u16 NCT6775_REG_AUTO_PWM[] = {
 334         0x127, 0x227, 0x327, 0x827, 0x927, 0xa27 };
 335
 336 #define NCT6775_AUTO_TEMP(data, nr, p)  ((data)->REG_AUTO_TEMP[nr] + (p))
 337 #define NCT6775_AUTO_PWM(data, nr, p)   ((data)->REG_AUTO_PWM[nr] + (p))
 338
 339 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
 340
 341 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
 342         0x135, 0x235, 0x335, 0x835, 0x935, 0xa35 };
 343 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
 344         0x138, 0x238, 0x338, 0x838, 0x938, 0xa38 };
 345
 346 static const char *const nct6775_temp_label[] = {
 347         "",
 348         "SYSTIN",
 349         "CPUTIN",
 350         "AUXTIN",
 351         "AMD SB-TSI",
 352         "PECI Agent 0",
 353         "PECI Agent 1",
 354         "PECI Agent 2",
 355         "PECI Agent 3",
 356         "PECI Agent 4",
 357         "PECI Agent 5",
 358         "PECI Agent 6",
 359         "PECI Agent 7",
 360         "PCH_CHIP_CPU_MAX_TEMP",
 361         "PCH_CHIP_TEMP",
 362         "PCH_CPU_TEMP",
 363         "PCH_MCH_TEMP",
 364         "PCH_DIM0_TEMP",
 365         "PCH_DIM1_TEMP",
 366         "PCH_DIM2_TEMP",
 367         "PCH_DIM3_TEMP"
 368 };
 369
 370 #define NCT6775_TEMP_MASK       0x001ffffe
 371
 372 static const u16 NCT6775_REG_TEMP_ALTERNATE[32] = {
 373         [13] = 0x661,
 374         [14] = 0x662,
 375         [15] = 0x664,
 376 };
 377
 378 static const u16 NCT6775_REG_TEMP_CRIT[32] = {
 379         [4] = 0xa00,
 380         [5] = 0xa01,
 381         [6] = 0xa02,
 382         [7] = 0xa03,
 383         [8] = 0xa04,
 384         [9] = 0xa05,
 385         [10] = 0xa06,
 386         [11] = 0xa07
 387 };
 388
 389 /* NCT6776 specific data */
 390
 391 /* STEP_UP_TIME and STEP_DOWN_TIME regs are swapped for all chips but NCT6775 */
 392 #define NCT6776_REG_FAN_STEP_UP_TIME NCT6775_REG_FAN_STEP_DOWN_TIME
 393 #define NCT6776_REG_FAN_STEP_DOWN_TIME NCT6775_REG_FAN_STEP_UP_TIME
 394
 395 static const s8 NCT6776_ALARM_BITS[] = {
 396         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 397         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 398         -1,                             /* unused */
 399         6, 7, 11, 10, 23,               /* fan1..fan5 */
 400         -1, -1, -1,                     /* unused */
 401         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 402         12, 9 };                        /* intrusion0, intrusion1 */
 403
 404 static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5 };
 405
 406 static const s8 NCT6776_BEEP_BITS[] = {
 407         0, 1, 2, 3, 4, 5, 6, 7,         /* in0.. in7 */
 408         8, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 409         24,                             /* global beep enable */
 410         25, 26, 27, 28, 29,             /* fan1..fan5 */
 411         -1, -1, -1,                     /* unused */
 412         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 413         30, 31 };                       /* intrusion0, intrusion1 */
 414
 415 static const u16 NCT6776_REG_TOLERANCE_H[] = {
 416         0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c };
 417
 418 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0 };
 419 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0 };
 420
 421 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
 422 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
 423
 424 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
 425         0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e };
 426
 427 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 428         0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
 429
 430 static const char *const nct6776_temp_label[] = {
 431         "",
 432         "SYSTIN",
 433         "CPUTIN",
 434         "AUXTIN",
 435         "SMBUSMASTER 0",
 436         "SMBUSMASTER 1",
 437         "SMBUSMASTER 2",
 438         "SMBUSMASTER 3",
 439         "SMBUSMASTER 4",
 440         "SMBUSMASTER 5",
 441         "SMBUSMASTER 6",
 442         "SMBUSMASTER 7",
 443         "PECI Agent 0",
 444         "PECI Agent 1",
 445         "PCH_CHIP_CPU_MAX_TEMP",
 446         "PCH_CHIP_TEMP",
 447         "PCH_CPU_TEMP",
 448         "PCH_MCH_TEMP",
 449         "PCH_DIM0_TEMP",
 450         "PCH_DIM1_TEMP",
 451         "PCH_DIM2_TEMP",
 452         "PCH_DIM3_TEMP",
 453         "BYTE_TEMP"
 454 };
 455
 456 #define NCT6776_TEMP_MASK       0x007ffffe
 457
 458 static const u16 NCT6776_REG_TEMP_ALTERNATE[32] = {
 459         [14] = 0x401,
 460         [15] = 0x402,
 461         [16] = 0x404,
 462 };
 463
 464 static const u16 NCT6776_REG_TEMP_CRIT[32] = {
 465         [11] = 0x709,
 466         [12] = 0x70a,
 467 };
 468
 469 /* NCT6779 specific data */
 470
 471 static const u16 NCT6779_REG_IN[] = {
 472         0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
 473         0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
 474
 475 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
 476         0x459, 0x45A, 0x45B, 0x568 };
 477
 478 static const s8 NCT6779_ALARM_BITS[] = {
 479         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 480         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 481         -1,                             /* unused */
 482         6, 7, 11, 10, 23,               /* fan1..fan5 */
 483         -1, -1, -1,                     /* unused */
 484         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 485         12, 9 };                        /* intrusion0, intrusion1 */
 486
 487 static const s8 NCT6779_BEEP_BITS[] = {
 488         0, 1, 2, 3, 4, 5, 6, 7,         /* in0.. in7 */
 489         8, 9, 10, 11, 12, 13, 14,       /* in8..in14 */
 490         24,                             /* global beep enable */
 491         25, 26, 27, 28, 29,             /* fan1..fan5 */
 492         -1, -1, -1,                     /* unused */
 493         16, 17, -1, -1, -1, -1,         /* temp1..temp6 */
 494         30, 31 };                       /* intrusion0, intrusion1 */
 495
 496 static const u16 NCT6779_REG_FAN[] = {
 497         0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8, 0x4ba };
 498 static const u16 NCT6779_REG_FAN_PULSES[] = {
 499         0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
 500
 501 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
 502         0x136, 0x236, 0x336, 0x836, 0x936, 0xa36 };
 503 #define NCT6779_CRITICAL_PWM_ENABLE_MASK        0x01
 504 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
 505         0x137, 0x237, 0x337, 0x837, 0x937, 0xa37 };
 506
 507 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
 508 static const u16 NCT6779_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b };
 509 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 510         0x18, 0x152 };
 511 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 512         0x3a, 0x153 };
 513 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 514         0x39, 0x155 };
 515
 516 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
 517         0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
 518
 519 static const char *const nct6779_temp_label[] = {
 520         "",
 521         "SYSTIN",
 522         "CPUTIN",
 523         "AUXTIN0",
 524         "AUXTIN1",
 525         "AUXTIN2",
 526         "AUXTIN3",
 527         "",
 528         "SMBUSMASTER 0",
 529         "SMBUSMASTER 1",
 530         "SMBUSMASTER 2",
 531         "SMBUSMASTER 3",
 532         "SMBUSMASTER 4",
 533         "SMBUSMASTER 5",
 534         "SMBUSMASTER 6",
 535         "SMBUSMASTER 7",
 536         "PECI Agent 0",
 537         "PECI Agent 1",
 538         "PCH_CHIP_CPU_MAX_TEMP",
 539         "PCH_CHIP_TEMP",
 540         "PCH_CPU_TEMP",
 541         "PCH_MCH_TEMP",
 542         "PCH_DIM0_TEMP",
 543         "PCH_DIM1_TEMP",
 544         "PCH_DIM2_TEMP",
 545         "PCH_DIM3_TEMP",
 546         "BYTE_TEMP",
 547         "",
 548         "",
 549         "",
 550         "",
 551         "Virtual_TEMP"
 552 };
 553
 554 #define NCT6779_TEMP_MASK       0x07ffff7e
 555 #define NCT6791_TEMP_MASK       0x87ffff7e
 556
 557 static const u16 NCT6779_REG_TEMP_ALTERNATE[32]
 558         = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
 559             0, 0, 0, 0, 0, 0, 0, 0,
 560             0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
 561             0x408, 0 };
 562
 563 static const u16 NCT6779_REG_TEMP_CRIT[32] = {
 564         [15] = 0x709,
 565         [16] = 0x70a,
 566 };
 567
 568 /* NCT6791 specific data */
 569
 570 #define NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE     0x28
 571
 572 static const u16 NCT6791_REG_WEIGHT_TEMP_SEL[6] = { 0, 0x239 };
 573 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP[6] = { 0, 0x23a };
 574 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP_TOL[6] = { 0, 0x23b };
 575 static const u16 NCT6791_REG_WEIGHT_DUTY_STEP[6] = { 0, 0x23c };
 576 static const u16 NCT6791_REG_WEIGHT_TEMP_BASE[6] = { 0, 0x23d };
 577 static const u16 NCT6791_REG_WEIGHT_DUTY_BASE[6] = { 0, 0x23e };
 578
 579 static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = {
 580         0x459, 0x45A, 0x45B, 0x568, 0x45D };
 581
 582 static const s8 NCT6791_ALARM_BITS[] = {
 583         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 584         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 585         -1,                             /* unused */
 586         6, 7, 11, 10, 23, 33,           /* fan1..fan6 */
 587         -1, -1,                         /* unused */
 588         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 589         12, 9 };                        /* intrusion0, intrusion1 */
 590
 591 /* NCT6792/NCT6793 specific data */
 592
 593 static const u16 NCT6792_REG_TEMP_MON[] = {
 594         0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d };
 595 static const u16 NCT6792_REG_BEEP[NUM_REG_BEEP] = {
 596         0xb2, 0xb3, 0xb4, 0xb5, 0xbf };
 597
 598 static const char *const nct6792_temp_label[] = {
 599         "",
 600         "SYSTIN",
 601         "CPUTIN",
 602         "AUXTIN0",
 603         "AUXTIN1",
 604         "AUXTIN2",
 605         "AUXTIN3",
 606         "",
 607         "SMBUSMASTER 0",
 608         "SMBUSMASTER 1",
 609         "SMBUSMASTER 2",
 610         "SMBUSMASTER 3",
 611         "SMBUSMASTER 4",
 612         "SMBUSMASTER 5",
 613         "SMBUSMASTER 6",
 614         "SMBUSMASTER 7",
 615         "PECI Agent 0",
 616         "PECI Agent 1",
 617         "PCH_CHIP_CPU_MAX_TEMP",
 618         "PCH_CHIP_TEMP",
 619         "PCH_CPU_TEMP",
 620         "PCH_MCH_TEMP",
 621         "PCH_DIM0_TEMP",
 622         "PCH_DIM1_TEMP",
 623         "PCH_DIM2_TEMP",
 624         "PCH_DIM3_TEMP",
 625         "BYTE_TEMP",
 626         "PECI Agent 0 Calibration",
 627         "PECI Agent 1 Calibration",
 628         "",
 629         "",
 630         "Virtual_TEMP"
 631 };
 632
 633 #define NCT6792_TEMP_MASK       0x9fffff7e
 634
 635 static const char *const nct6793_temp_label[] = {
 636         "",
 637         "SYSTIN",
 638         "CPUTIN",
 639         "AUXTIN0",
 640         "AUXTIN1",
 641         "AUXTIN2",
 642         "AUXTIN3",
 643         "",
 644         "SMBUSMASTER 0",
 645         "SMBUSMASTER 1",
 646         "",
 647         "",
 648         "",
 649         "",
 650         "",
 651         "",
 652         "PECI Agent 0",
 653         "PECI Agent 1",
 654         "PCH_CHIP_CPU_MAX_TEMP",
 655         "PCH_CHIP_TEMP",
 656         "PCH_CPU_TEMP",
 657         "PCH_MCH_TEMP",
 658         "Agent0 Dimm0 ",
 659         "Agent0 Dimm1",
 660         "Agent1 Dimm0",
 661         "Agent1 Dimm1",
 662         "BYTE_TEMP0",
 663         "BYTE_TEMP1",
 664         "PECI Agent 0 Calibration",
 665         "PECI Agent 1 Calibration",
 666         "",
 667         "Virtual_TEMP"
 668 };
 669
 670 #define NCT6793_TEMP_MASK       0xbfff037e
 671
 672 static const char *const nct6795_temp_label[] = {
 673         "",
 674         "SYSTIN",
 675         "CPUTIN",
 676         "AUXTIN0",
 677         "AUXTIN1",
 678         "AUXTIN2",
 679         "AUXTIN3",
 680         "",
 681         "SMBUSMASTER 0",
 682         "SMBUSMASTER 1",
 683         "SMBUSMASTER 2",
 684         "SMBUSMASTER 3",
 685         "SMBUSMASTER 4",
 686         "SMBUSMASTER 5",
 687         "SMBUSMASTER 6",
 688         "SMBUSMASTER 7",
 689         "PECI Agent 0",
 690         "PECI Agent 1",
 691         "PCH_CHIP_CPU_MAX_TEMP",
 692         "PCH_CHIP_TEMP",
 693         "PCH_CPU_TEMP",
 694         "PCH_MCH_TEMP",
 695         "PCH_DIM0_TEMP",
 696         "PCH_DIM1_TEMP",
 697         "PCH_DIM2_TEMP",
 698         "PCH_DIM3_TEMP",
 699         "BYTE_TEMP0",
 700         "BYTE_TEMP1",
 701         "PECI Agent 0 Calibration",
 702         "PECI Agent 1 Calibration",
 703         "",
 704         "Virtual_TEMP"
 705 };
 706
 707 #define NCT6795_TEMP_MASK       0xbfffff7e
 708
 709 /* NCT6102D/NCT6106D specific data */
 710
 711 #define NCT6106_REG_VBAT        0x318
 712 #define NCT6106_REG_DIODE       0x319
 713 #define NCT6106_DIODE_MASK      0x01
 714
 715 static const u16 NCT6106_REG_IN_MAX[] = {
 716         0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
 717 static const u16 NCT6106_REG_IN_MIN[] = {
 718         0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
 719 static const u16 NCT6106_REG_IN[] = {
 720         0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
 721
 722 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
 723 static const u16 NCT6106_REG_TEMP_MON[] = { 0x18, 0x19, 0x1a };
 724 static const u16 NCT6106_REG_TEMP_HYST[] = {
 725         0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
 726 static const u16 NCT6106_REG_TEMP_OVER[] = {
 727         0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
 728 static const u16 NCT6106_REG_TEMP_CRIT_L[] = {
 729         0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
 730 static const u16 NCT6106_REG_TEMP_CRIT_H[] = {
 731         0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
 732 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
 733 static const u16 NCT6106_REG_TEMP_CONFIG[] = {
 734         0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
 735
 736 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
 737 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
 738 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0, 0 };
 739 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4, 0, 0 };
 740
 741 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
 742 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
 743 static const u16 NCT6106_REG_PWM[] = { 0x119, 0x129, 0x139 };
 744 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c };
 745 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
 746 static const u16 NCT6106_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130 };
 747 static const u16 NCT6106_REG_TEMP_SOURCE[] = {
 748         0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
 749
 750 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
 751 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = {
 752         0x11b, 0x12b, 0x13b };
 753
 754 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
 755 #define NCT6106_CRITICAL_PWM_ENABLE_MASK        0x10
 756 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
 757
 758 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
 759 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
 760 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
 761 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
 762 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
 763 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
 764
 765 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
 766
 767 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
 768 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
 769 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
 770 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x17c };
 771 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
 772 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
 773
 774 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
 775 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
 776
 777 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = {
 778         0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
 779
 780 static const s8 NCT6106_ALARM_BITS[] = {
 781         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 782         9, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 783         -1,                             /* unused */
 784         32, 33, 34, -1, -1,             /* fan1..fan5 */
 785         -1, -1, -1,                     /* unused */
 786         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 787         48, -1                          /* intrusion0, intrusion1 */
 788 };
 789
 790 static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = {
 791         0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 };
 792
 793 static const s8 NCT6106_BEEP_BITS[] = {
 794         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 795         9, 10, 11, 12, -1, -1, -1,      /* in8..in14 */
 796         32,                             /* global beep enable */
 797         24, 25, 26, 27, 28,             /* fan1..fan5 */
 798         -1, -1, -1,                     /* unused */
 799         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 800         34, -1                          /* intrusion0, intrusion1 */
 801 };
 802
 803 static const u16 NCT6106_REG_TEMP_ALTERNATE[32] = {
 804         [14] = 0x51,
 805         [15] = 0x52,
 806         [16] = 0x54,
 807 };
 808
 809 static const u16 NCT6106_REG_TEMP_CRIT[32] = {
 810         [11] = 0x204,
 811         [12] = 0x205,
 812 };
 813
 814 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
 815 {
 816         if (mode == 0 && pwm == 255)
 817                 return off;
 818         return mode + 1;
 819 }
 820
 821 static int pwm_enable_to_reg(enum pwm_enable mode)
 822 {
 823         if (mode == off)
 824                 return 0;
 825         return mode - 1;
 826 }
 827
 828 /*
 829  * Conversions
 830  */
 831
 832 /* 1 is DC mode, output in ms */
 833 static unsigned int step_time_from_reg(u8 reg, u8 mode)
 834 {
 835         return mode ? 400 * reg : 100 * reg;
 836 }
 837
 838 static u8 step_time_to_reg(unsigned int msec, u8 mode)
 839 {
 840         return clamp_val((mode ? (msec + 200) / 400 :
 841                                         (msec + 50) / 100), 1, 255);
 842 }
 843
 844 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
 845 {
 846         if (reg == 0 || reg == 255)
 847                 return 0;
 848         return 1350000U / (reg << divreg);
 849 }
 850
 851 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
 852 {
 853         if ((reg & 0xff1f) == 0xff1f)
 854                 return 0;
 855
 856         reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
 857
 858         if (reg == 0)
 859                 return 0;
 860
 861         return 1350000U / reg;
 862 }
 863
 864 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
 865 {
 866         if (reg == 0 || reg == 0xffff)
 867                 return 0;
 868
 869         /*
 870          * Even though the registers are 16 bit wide, the fan divisor
 871          * still applies.
 872          */
 873         return 1350000U / (reg << divreg);
 874 }
 875
 876 static u16 fan_to_reg(u32 fan, unsigned int divreg)
 877 {
 878         if (!fan)
 879                 return 0;
 880
 881         return (1350000U / fan) >> divreg;
 882 }
 883
 884 static inline unsigned int
 885 div_from_reg(u8 reg)
 886 {
 887         return 1 << reg;
 888 }
 889
 890 /*
 891  * Some of the voltage inputs have internal scaling, the tables below
 892  * contain 8 (the ADC LSB in mV) * scaling factor * 100
 893  */
 894 static const u16 scale_in[15] = {
 895         800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
 896         800, 800
 897 };
 898
 899 static inline long in_from_reg(u8 reg, u8 nr)
 900 {
 901         return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
 902 }
 903
 904 static inline u8 in_to_reg(u32 val, u8 nr)
 905 {
 906         return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
 907 }
 908
 909 /*
 910  * Data structures and manipulation thereof
 911  */
 912
 913 struct nct6775_data {
 914         int addr;       /* IO base of hw monitor block */
 915         int sioreg;     /* SIO register address */
 916         enum kinds kind;
 917         const char *name;
 918
 919 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
 920         struct device *hwmon_dev;
 921 #endif
 922
 923         const struct attribute_group *groups[6];
 924
 925         u16 reg_temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 926                                     * 3=temp_crit, 4=temp_lcrit
 927                                     */
 928         u8 temp_src[NUM_TEMP];
 929         u16 reg_temp_config[NUM_TEMP];
 930         const char * const *temp_label;
 931         u32 temp_mask;
 932
 933         u16 REG_CONFIG;
 934         u16 REG_VBAT;
 935         u16 REG_DIODE;
 936         u8 DIODE_MASK;
 937
 938         const s8 *ALARM_BITS;
 939         const s8 *BEEP_BITS;
 940
 941         const u16 *REG_VIN;
 942         const u16 *REG_IN_MINMAX[2];
 943
 944         const u16 *REG_TARGET;
 945         const u16 *REG_FAN;
 946         const u16 *REG_FAN_MODE;
 947         const u16 *REG_FAN_MIN;
 948         const u16 *REG_FAN_PULSES;
 949         const u16 *FAN_PULSE_SHIFT;
 950         const u16 *REG_FAN_TIME[3];
 951
 952         const u16 *REG_TOLERANCE_H;
 953
 954         const u8 *REG_PWM_MODE;
 955         const u8 *PWM_MODE_MASK;
 956
 957         const u16 *REG_PWM[7];  /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 958                                  * [3]=pwm_max, [4]=pwm_step,
 959                                  * [5]=weight_duty_step, [6]=weight_duty_base
 960                                  */
 961         const u16 *REG_PWM_READ;
 962
 963         const u16 *REG_CRITICAL_PWM_ENABLE;
 964         u8 CRITICAL_PWM_ENABLE_MASK;
 965         const u16 *REG_CRITICAL_PWM;
 966
 967         const u16 *REG_AUTO_TEMP;
 968         const u16 *REG_AUTO_PWM;
 969
 970         const u16 *REG_CRITICAL_TEMP;
 971         const u16 *REG_CRITICAL_TEMP_TOLERANCE;
 972
 973         const u16 *REG_TEMP_SOURCE;     /* temp register sources */
 974         const u16 *REG_TEMP_SEL;
 975         const u16 *REG_WEIGHT_TEMP_SEL;
 976         const u16 *REG_WEIGHT_TEMP[3];  /* 0=base, 1=tolerance, 2=step */
 977
 978         const u16 *REG_TEMP_OFFSET;
 979
 980         const u16 *REG_ALARM;
 981         const u16 *REG_BEEP;
 982
 983         unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
 984         unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
 985
 986         struct mutex update_lock;
 987         bool valid;             /* true if following fields are valid */
 988         unsigned long last_updated;     /* In jiffies */
 989
 990         /* Register values */
 991         u8 bank;                /* current register bank */
 992         u8 in_num;              /* number of in inputs we have */
 993         u8 in[15][3];           /* [0]=in, [1]=in_max, [2]=in_min */
 994         unsigned int rpm[NUM_FAN];
 995         u16 fan_min[NUM_FAN];
 996         u8 fan_pulses[NUM_FAN];
 997         u8 fan_div[NUM_FAN];
 998         u8 has_pwm;
 999         u8 has_fan;             /* some fan inputs can be disabled */
1000         u8 has_fan_min;         /* some fans don't have min register */
1001         bool has_fan_div;
1002
1003         u8 num_temp_alarms;     /* 2, 3, or 6 */
1004         u8 num_temp_beeps;      /* 2, 3, or 6 */
1005         u8 temp_fixed_num;      /* 3 or 6 */
1006         u8 temp_type[NUM_TEMP_FIXED];
1007         s8 temp_offset[NUM_TEMP_FIXED];
1008         s16 temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
1009                                 * 3=temp_crit, 4=temp_lcrit */
1010         u64 alarms;
1011         u64 beeps;
1012
1013         u8 pwm_num;     /* number of pwm */
1014         u8 pwm_mode[NUM_FAN];   /* 1->DC variable voltage,
1015                                  * 0->PWM variable duty cycle
1016                                  */
1017         enum pwm_enable pwm_enable[NUM_FAN];
1018                         /* 0->off
1019                          * 1->manual
1020                          * 2->thermal cruise mode (also called SmartFan I)
1021                          * 3->fan speed cruise mode
1022                          * 4->SmartFan III
1023                          * 5->enhanced variable thermal cruise (SmartFan IV)
1024                          */
1025         u8 pwm[7][NUM_FAN];     /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
1026                                  * [3]=pwm_max, [4]=pwm_step,
1027                                  * [5]=weight_duty_step, [6]=weight_duty_base
1028                                  */
1029
1030         u8 target_temp[NUM_FAN];
1031         u8 target_temp_mask;
1032         u32 target_speed[NUM_FAN];
1033         u32 target_speed_tolerance[NUM_FAN];
1034         u8 speed_tolerance_limit;
1035
1036         u8 temp_tolerance[2][NUM_FAN];
1037         u8 tolerance_mask;
1038
1039         u8 fan_time[3][NUM_FAN]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
1040
1041         /* Automatic fan speed control registers */
1042         int auto_pwm_num;
1043         u8 auto_pwm[NUM_FAN][7];
1044         u8 auto_temp[NUM_FAN][7];
1045         u8 pwm_temp_sel[NUM_FAN];
1046         u8 pwm_weight_temp_sel[NUM_FAN];
1047         u8 weight_temp[3][NUM_FAN];     /* 0->temp_step, 1->temp_step_tol,
1048                                          * 2->temp_base
1049                                          */
1050
1051         u8 vid;
1052         u8 vrm;
1053
1054         bool have_vid;
1055
1056         u16 have_temp;
1057         u16 have_temp_fixed;
1058         u16 have_in;
1059
1060         /* Remember extra register values over suspend/resume */
1061         u8 vbat;
1062         u8 fandiv1;
1063         u8 fandiv2;
1064         u8 sio_reg_enable;
1065 };
1066
1067 struct nct6775_sio_data {
1068         int sioreg;
1069         enum kinds kind;
1070 };
1071
1072 struct sensor_device_template {
1073         struct device_attribute dev_attr;
1074         union {
1075                 struct {
1076                         u8 nr;
1077                         u8 index;
1078                 } s;
1079                 int index;
1080         } u;
1081         bool s2;        /* true if both index and nr are used */
1082 };
1083
1084 struct sensor_device_attr_u {
1085         union {
1086                 struct sensor_device_attribute a1;
1087                 struct sensor_device_attribute_2 a2;
1088         } u;
1089         char name[32];
1090 };
1091
1092 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) {      \
1093         .attr = {.name = _template, .mode = _mode },            \
1094         .show   = _show,                                        \
1095         .store  = _store,                                       \
1096 }
1097
1098 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \
1099         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
1100           .u.index = _index,                                            \
1101           .s2 = false }
1102
1103 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,       \
1104                                  _nr, _index)                           \
1105         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
1106           .u.s.index = _index,                                          \
1107           .u.s.nr = _nr,                                                \
1108           .s2 = true }
1109
1110 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
1111 static struct sensor_device_template sensor_dev_template_##_name        \
1112         = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store,       \
1113                                  _index)
1114
1115 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store,       \
1116                           _nr, _index)                                  \
1117 static struct sensor_device_template sensor_dev_template_##_name        \
1118         = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,     \
1119                                  _nr, _index)
1120
1121 struct sensor_template_group {
1122         struct sensor_device_template **templates;
1123         umode_t (*is_visible)(struct kobject *, struct attribute *, int);
1124         int base;
1125 };
1126
1127 static struct attribute_group *
1128 nct6775_create_attr_group(struct device *dev,
1129                           const struct sensor_template_group *tg,
1130                           int repeat)
1131 {
1132         struct attribute_group *group;
1133         struct sensor_device_attr_u *su;
1134         struct sensor_device_attribute *a;
1135         struct sensor_device_attribute_2 *a2;
1136         struct attribute **attrs;
1137         struct sensor_device_template **t;
1138         int i, count;
1139
1140         if (repeat <= 0)
1141                 return ERR_PTR(-EINVAL);
1142
1143         t = tg->templates;
1144         for (count = 0; *t; t++, count++)
1145                 ;
1146
1147         if (count == 0)
1148                 return ERR_PTR(-EINVAL);
1149
1150         group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
1151         if (group == NULL)
1152                 return ERR_PTR(-ENOMEM);
1153
1154         attrs = devm_kzalloc(dev, sizeof(*attrs) * (repeat * count + 1),
1155                              GFP_KERNEL);
1156         if (attrs == NULL)
1157                 return ERR_PTR(-ENOMEM);
1158
1159         su = devm_kzalloc(dev, sizeof(*su) * repeat * count,
1160                                GFP_KERNEL);
1161         if (su == NULL)
1162                 return ERR_PTR(-ENOMEM);
1163
1164         group->attrs = attrs;
1165         group->is_visible = tg->is_visible;
1166
1167         for (i = 0; i < repeat; i++) {
1168                 t = tg->templates;
1169                 while (*t != NULL) {
1170                         snprintf(su->name, sizeof(su->name),
1171                                  (*t)->dev_attr.attr.name, tg->base + i);
1172                         if ((*t)->s2) {
1173                                 a2 = &su->u.a2;
1174                                 sysfs_attr_init(&a2->dev_attr.attr);
1175                                 a2->dev_attr.attr.name = su->name;
1176                                 a2->nr = (*t)->u.s.nr + i;
1177                                 a2->index = (*t)->u.s.index;
1178                                 a2->dev_attr.attr.mode =
1179                                   (*t)->dev_attr.attr.mode;
1180                                 a2->dev_attr.show = (*t)->dev_attr.show;
1181                                 a2->dev_attr.store = (*t)->dev_attr.store;
1182                                 *attrs = &a2->dev_attr.attr;
1183                         } else {
1184                                 a = &su->u.a1;
1185                                 sysfs_attr_init(&a->dev_attr.attr);
1186                                 a->dev_attr.attr.name = su->name;
1187                                 a->index = (*t)->u.index + i;
1188                                 a->dev_attr.attr.mode =
1189                                   (*t)->dev_attr.attr.mode;
1190                                 a->dev_attr.show = (*t)->dev_attr.show;
1191                                 a->dev_attr.store = (*t)->dev_attr.store;
1192                                 *attrs = &a->dev_attr.attr;
1193                         }
1194                         attrs++;
1195                         su++;
1196                         t++;
1197                 }
1198         }
1199
1200         return group;
1201 }
1202
1203 static bool is_word_sized(struct nct6775_data *data, u16 reg)
1204 {
1205         switch (data->kind) {
1206         case nct6106:
1207                 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1208                   reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
1209                   reg == 0x111 || reg == 0x121 || reg == 0x131;
1210         case nct6775:
1211                 return (((reg & 0xff00) == 0x100 ||
1212                     (reg & 0xff00) == 0x200) &&
1213                    ((reg & 0x00ff) == 0x50 ||
1214                     (reg & 0x00ff) == 0x53 ||
1215                     (reg & 0x00ff) == 0x55)) ||
1216                   (reg & 0xfff0) == 0x630 ||
1217                   reg == 0x640 || reg == 0x642 ||
1218                   reg == 0x662 ||
1219                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1220                   reg == 0x73 || reg == 0x75 || reg == 0x77;
1221         case nct6776:
1222                 return (((reg & 0xff00) == 0x100 ||
1223                     (reg & 0xff00) == 0x200) &&
1224                    ((reg & 0x00ff) == 0x50 ||
1225                     (reg & 0x00ff) == 0x53 ||
1226                     (reg & 0x00ff) == 0x55)) ||
1227                   (reg & 0xfff0) == 0x630 ||
1228                   reg == 0x402 ||
1229                   reg == 0x640 || reg == 0x642 ||
1230                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1231                   reg == 0x73 || reg == 0x75 || reg == 0x77;
1232         case nct6779:
1233         case nct6791:
1234         case nct6792:
1235         case nct6793:
1236         case nct6795:
1237                 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
1238                   ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x0b) ||
1239                   reg == 0x402 ||
1240                   reg == 0x63a || reg == 0x63c || reg == 0x63e ||
1241                   reg == 0x640 || reg == 0x642 ||
1242                   reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
1243                   reg == 0x7b || reg == 0x7d;
1244         }
1245         return false;
1246 }
1247
1248 /*
1249  * On older chips, only registers 0x50-0x5f are banked.
1250  * On more recent chips, all registers are banked.
1251  * Assume that is the case and set the bank number for each access.
1252  * Cache the bank number so it only needs to be set if it changes.
1253  */
1254 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
1255 {
1256         u8 bank = reg >> 8;
1257
1258         if (data->bank != bank) {
1259                 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
1260                 outb_p(bank, data->addr + DATA_REG_OFFSET);
1261                 data->bank = bank;
1262         }
1263 }
1264
1265 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
1266 {
1267         int res, word_sized = is_word_sized(data, reg);
1268
1269         nct6775_set_bank(data, reg);
1270         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1271         res = inb_p(data->addr + DATA_REG_OFFSET);
1272         if (word_sized) {
1273                 outb_p((reg & 0xff) + 1,
1274                        data->addr + ADDR_REG_OFFSET);
1275                 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
1276         }
1277         return res;
1278 }
1279
1280 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
1281 {
1282         int word_sized = is_word_sized(data, reg);
1283
1284         nct6775_set_bank(data, reg);
1285         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1286         if (word_sized) {
1287                 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
1288                 outb_p((reg & 0xff) + 1,
1289                        data->addr + ADDR_REG_OFFSET);
1290         }
1291         outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
1292         return 0;
1293 }
1294
1295 /* We left-align 8-bit temperature values to make the code simpler */
1296 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
1297 {
1298         u16 res;
1299
1300         res = nct6775_read_value(data, reg);
1301         if (!is_word_sized(data, reg))
1302                 res <<= 8;
1303
1304         return res;
1305 }
1306
1307 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
1308 {
1309         if (!is_word_sized(data, reg))
1310                 value >>= 8;
1311         return nct6775_write_value(data, reg, value);
1312 }
1313
1314 /* This function assumes that the caller holds data->update_lock */
1315 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
1316 {
1317         u8 reg;
1318
1319         switch (nr) {
1320         case 0:
1321                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
1322                     | (data->fan_div[0] & 0x7);
1323                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1324                 break;
1325         case 1:
1326                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
1327                     | ((data->fan_div[1] << 4) & 0x70);
1328                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1329                 break;
1330         case 2:
1331                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
1332                     | (data->fan_div[2] & 0x7);
1333                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1334                 break;
1335         case 3:
1336                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
1337                     | ((data->fan_div[3] << 4) & 0x70);
1338                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1339                 break;
1340         }
1341 }
1342
1343 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
1344 {
1345         if (data->kind == nct6775)
1346                 nct6775_write_fan_div(data, nr);
1347 }
1348
1349 static void nct6775_update_fan_div(struct nct6775_data *data)
1350 {
1351         u8 i;
1352
1353         i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
1354         data->fan_div[0] = i & 0x7;
1355         data->fan_div[1] = (i & 0x70) >> 4;
1356         i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
1357         data->fan_div[2] = i & 0x7;
1358         if (data->has_fan & (1 << 3))
1359                 data->fan_div[3] = (i & 0x70) >> 4;
1360 }
1361
1362 static void nct6775_update_fan_div_common(struct nct6775_data *data)
1363 {
1364         if (data->kind == nct6775)
1365                 nct6775_update_fan_div(data);
1366 }
1367
1368 static void nct6775_init_fan_div(struct nct6775_data *data)
1369 {
1370         int i;
1371
1372         nct6775_update_fan_div_common(data);
1373         /*
1374          * For all fans, start with highest divider value if the divider
1375          * register is not initialized. This ensures that we get a
1376          * reading from the fan count register, even if it is not optimal.
1377          * We'll compute a better divider later on.
1378          */
1379         for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
1380                 if (!(data->has_fan & (1 << i)))
1381                         continue;
1382                 if (data->fan_div[i] == 0) {
1383                         data->fan_div[i] = 7;
1384                         nct6775_write_fan_div_common(data, i);
1385                 }
1386         }
1387 }
1388
1389 static void nct6775_init_fan_common(struct device *dev,
1390                                     struct nct6775_data *data)
1391 {
1392         int i;
1393         u8 reg;
1394
1395         if (data->has_fan_div)
1396                 nct6775_init_fan_div(data);
1397
1398         /*
1399          * If fan_min is not set (0), set it to 0xff to disable it. This
1400          * prevents the unnecessary warning when fanX_min is reported as 0.
1401          */
1402         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1403                 if (data->has_fan_min & (1 << i)) {
1404                         reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
1405                         if (!reg)
1406                                 nct6775_write_value(data, data->REG_FAN_MIN[i],
1407                                                     data->has_fan_div ? 0xff
1408                                                                       : 0xff1f);
1409                 }
1410         }
1411 }
1412
1413 static void nct6775_select_fan_div(struct device *dev,
1414                                    struct nct6775_data *data, int nr, u16 reg)
1415 {
1416         u8 fan_div = data->fan_div[nr];
1417         u16 fan_min;
1418
1419         if (!data->has_fan_div)
1420                 return;
1421
1422         /*
1423          * If we failed to measure the fan speed, or the reported value is not
1424          * in the optimal range, and the clock divider can be modified,
1425          * let's try that for next time.
1426          */
1427         if (reg == 0x00 && fan_div < 0x07)
1428                 fan_div++;
1429         else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1430                 fan_div--;
1431
1432         if (fan_div != data->fan_div[nr]) {
1433                 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1434                         nr + 1, div_from_reg(data->fan_div[nr]),
1435                         div_from_reg(fan_div));
1436
1437                 /* Preserve min limit if possible */
1438                 if (data->has_fan_min & (1 << nr)) {
1439                         fan_min = data->fan_min[nr];
1440                         if (fan_div > data->fan_div[nr]) {
1441                                 if (fan_min != 255 && fan_min > 1)
1442                                         fan_min >>= 1;
1443                         } else {
1444                                 if (fan_min != 255) {
1445                                         fan_min <<= 1;
1446                                         if (fan_min > 254)
1447                                                 fan_min = 254;
1448                                 }
1449                         }
1450                         if (fan_min != data->fan_min[nr]) {
1451                                 data->fan_min[nr] = fan_min;
1452                                 nct6775_write_value(data, data->REG_FAN_MIN[nr],
1453                                                     fan_min);
1454                         }
1455                 }
1456                 data->fan_div[nr] = fan_div;
1457                 nct6775_write_fan_div_common(data, nr);
1458         }
1459 }
1460
1461 static void nct6775_update_pwm(struct device *dev)
1462 {
1463         struct nct6775_data *data = dev_get_drvdata(dev);
1464         int i, j;
1465         int fanmodecfg, reg;
1466         bool duty_is_dc;
1467
1468         for (i = 0; i < data->pwm_num; i++) {
1469                 if (!(data->has_pwm & (1 << i)))
1470                         continue;
1471
1472                 duty_is_dc = data->REG_PWM_MODE[i] &&
1473                   (nct6775_read_value(data, data->REG_PWM_MODE[i])
1474                    & data->PWM_MODE_MASK[i]);
1475                 data->pwm_mode[i] = duty_is_dc;
1476
1477                 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
1478                 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1479                         if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1480                                 data->pwm[j][i]
1481                                   = nct6775_read_value(data,
1482                                                        data->REG_PWM[j][i]);
1483                         }
1484                 }
1485
1486                 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1487                                                         (fanmodecfg >> 4) & 7);
1488
1489                 if (!data->temp_tolerance[0][i] ||
1490                     data->pwm_enable[i] != speed_cruise)
1491                         data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1492                 if (!data->target_speed_tolerance[i] ||
1493                     data->pwm_enable[i] == speed_cruise) {
1494                         u8 t = fanmodecfg & 0x0f;
1495
1496                         if (data->REG_TOLERANCE_H) {
1497                                 t |= (nct6775_read_value(data,
1498                                       data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
1499                         }
1500                         data->target_speed_tolerance[i] = t;
1501                 }
1502
1503                 data->temp_tolerance[1][i] =
1504                         nct6775_read_value(data,
1505                                         data->REG_CRITICAL_TEMP_TOLERANCE[i]);
1506
1507                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
1508                 data->pwm_temp_sel[i] = reg & 0x1f;
1509                 /* If fan can stop, report floor as 0 */
1510                 if (reg & 0x80)
1511                         data->pwm[2][i] = 0;
1512
1513                 if (!data->REG_WEIGHT_TEMP_SEL[i])
1514                         continue;
1515
1516                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
1517                 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1518                 /* If weight is disabled, report weight source as 0 */
1519                 if (j == 1 && !(reg & 0x80))
1520                         data->pwm_weight_temp_sel[i] = 0;
1521
1522                 /* Weight temp data */
1523                 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
1524                         data->weight_temp[j][i]
1525                           = nct6775_read_value(data,
1526                                                data->REG_WEIGHT_TEMP[j][i]);
1527                 }
1528         }
1529 }
1530
1531 static void nct6775_update_pwm_limits(struct device *dev)
1532 {
1533         struct nct6775_data *data = dev_get_drvdata(dev);
1534         int i, j;
1535         u8 reg;
1536         u16 reg_t;
1537
1538         for (i = 0; i < data->pwm_num; i++) {
1539                 if (!(data->has_pwm & (1 << i)))
1540                         continue;
1541
1542                 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1543                         data->fan_time[j][i] =
1544                           nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1545                 }
1546
1547                 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1548                 /* Update only in matching mode or if never updated */
1549                 if (!data->target_temp[i] ||
1550                     data->pwm_enable[i] == thermal_cruise)
1551                         data->target_temp[i] = reg_t & data->target_temp_mask;
1552                 if (!data->target_speed[i] ||
1553                     data->pwm_enable[i] == speed_cruise) {
1554                         if (data->REG_TOLERANCE_H) {
1555                                 reg_t |= (nct6775_read_value(data,
1556                                         data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1557                         }
1558                         data->target_speed[i] = reg_t;
1559                 }
1560
1561                 for (j = 0; j < data->auto_pwm_num; j++) {
1562                         data->auto_pwm[i][j] =
1563                           nct6775_read_value(data,
1564                                              NCT6775_AUTO_PWM(data, i, j));
1565                         data->auto_temp[i][j] =
1566                           nct6775_read_value(data,
1567                                              NCT6775_AUTO_TEMP(data, i, j));
1568                 }
1569
1570                 /* critical auto_pwm temperature data */
1571                 data->auto_temp[i][data->auto_pwm_num] =
1572                         nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1573
1574                 switch (data->kind) {
1575                 case nct6775:
1576                         reg = nct6775_read_value(data,
1577                                                  NCT6775_REG_CRITICAL_ENAB[i]);
1578                         data->auto_pwm[i][data->auto_pwm_num] =
1579                                                 (reg & 0x02) ? 0xff : 0x00;
1580                         break;
1581                 case nct6776:
1582                         data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1583                         break;
1584                 case nct6106:
1585                 case nct6779:
1586                 case nct6791:
1587                 case nct6792:
1588                 case nct6793:
1589                 case nct6795:
1590                         reg = nct6775_read_value(data,
1591                                         data->REG_CRITICAL_PWM_ENABLE[i]);
1592                         if (reg & data->CRITICAL_PWM_ENABLE_MASK)
1593                                 reg = nct6775_read_value(data,
1594                                         data->REG_CRITICAL_PWM[i]);
1595                         else
1596                                 reg = 0xff;
1597                         data->auto_pwm[i][data->auto_pwm_num] = reg;
1598                         break;
1599                 }
1600         }
1601 }
1602
1603 static struct nct6775_data *nct6775_update_device(struct device *dev)
1604 {
1605         struct nct6775_data *data = dev_get_drvdata(dev);
1606         int i, j;
1607
1608         mutex_lock(&data->update_lock);
1609
1610         if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1611             || !data->valid) {
1612                 /* Fan clock dividers */
1613                 nct6775_update_fan_div_common(data);
1614
1615                 /* Measured voltages and limits */
1616                 for (i = 0; i < data->in_num; i++) {
1617                         if (!(data->have_in & (1 << i)))
1618                                 continue;
1619
1620                         data->in[i][0] = nct6775_read_value(data,
1621                                                             data->REG_VIN[i]);
1622                         data->in[i][1] = nct6775_read_value(data,
1623                                           data->REG_IN_MINMAX[0][i]);
1624                         data->in[i][2] = nct6775_read_value(data,
1625                                           data->REG_IN_MINMAX[1][i]);
1626                 }
1627
1628                 /* Measured fan speeds and limits */
1629                 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
1630                         u16 reg;
1631
1632                         if (!(data->has_fan & (1 << i)))
1633                                 continue;
1634
1635                         reg = nct6775_read_value(data, data->REG_FAN[i]);
1636                         data->rpm[i] = data->fan_from_reg(reg,
1637                                                           data->fan_div[i]);
1638
1639                         if (data->has_fan_min & (1 << i))
1640                                 data->fan_min[i] = nct6775_read_value(data,
1641                                            data->REG_FAN_MIN[i]);
1642                         data->fan_pulses[i] =
1643                           (nct6775_read_value(data, data->REG_FAN_PULSES[i])
1644                                 >> data->FAN_PULSE_SHIFT[i]) & 0x03;
1645
1646                         nct6775_select_fan_div(dev, data, i, reg);
1647                 }
1648
1649                 nct6775_update_pwm(dev);
1650                 nct6775_update_pwm_limits(dev);
1651
1652                 /* Measured temperatures and limits */
1653                 for (i = 0; i < NUM_TEMP; i++) {
1654                         if (!(data->have_temp & (1 << i)))
1655                                 continue;
1656                         for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1657                                 if (data->reg_temp[j][i])
1658                                         data->temp[j][i]
1659                                           = nct6775_read_temp(data,
1660                                                 data->reg_temp[j][i]);
1661                         }
1662                         if (i >= NUM_TEMP_FIXED ||
1663                             !(data->have_temp_fixed & (1 << i)))
1664                                 continue;
1665                         data->temp_offset[i]
1666                           = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1667                 }
1668
1669                 data->alarms = 0;
1670                 for (i = 0; i < NUM_REG_ALARM; i++) {
1671                         u8 alarm;
1672
1673                         if (!data->REG_ALARM[i])
1674                                 continue;
1675                         alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1676                         data->alarms |= ((u64)alarm) << (i << 3);
1677                 }
1678
1679                 data->beeps = 0;
1680                 for (i = 0; i < NUM_REG_BEEP; i++) {
1681                         u8 beep;
1682
1683                         if (!data->REG_BEEP[i])
1684                                 continue;
1685                         beep = nct6775_read_value(data, data->REG_BEEP[i]);
1686                         data->beeps |= ((u64)beep) << (i << 3);
1687                 }
1688
1689                 data->last_updated = jiffies;
1690                 data->valid = true;
1691         }
1692
1693         mutex_unlock(&data->update_lock);
1694         return data;
1695 }
1696
1697 /*
1698  * Sysfs callback functions
1699  */
1700 static ssize_t
1701 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1702 {
1703         struct nct6775_data *data = nct6775_update_device(dev);
1704         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1705         int index = sattr->index;
1706         int nr = sattr->nr;
1707
1708         return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1709 }
1710
1711 static ssize_t
1712 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1713              size_t count)
1714 {
1715         struct nct6775_data *data = dev_get_drvdata(dev);
1716         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1717         int index = sattr->index;
1718         int nr = sattr->nr;
1719         unsigned long val;
1720         int err;
1721
1722         err = kstrtoul(buf, 10, &val);
1723         if (err < 0)
1724                 return err;
1725         mutex_lock(&data->update_lock);
1726         data->in[nr][index] = in_to_reg(val, nr);
1727         nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr],
1728                             data->in[nr][index]);
1729         mutex_unlock(&data->update_lock);
1730         return count;
1731 }
1732
1733 static ssize_t
1734 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1735 {
1736         struct nct6775_data *data = nct6775_update_device(dev);
1737         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1738         int nr = data->ALARM_BITS[sattr->index];
1739
1740         return sprintf(buf, "%u\n",
1741                        (unsigned int)((data->alarms >> nr) & 0x01));
1742 }
1743
1744 static int find_temp_source(struct nct6775_data *data, int index, int count)
1745 {
1746         int source = data->temp_src[index];
1747         int nr;
1748
1749         for (nr = 0; nr < count; nr++) {
1750                 int src;
1751
1752                 src = nct6775_read_value(data,
1753                                          data->REG_TEMP_SOURCE[nr]) & 0x1f;
1754                 if (src == source)
1755                         return nr;
1756         }
1757         return -ENODEV;
1758 }
1759
1760 static ssize_t
1761 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1762 {
1763         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1764         struct nct6775_data *data = nct6775_update_device(dev);
1765         unsigned int alarm = 0;
1766         int nr;
1767
1768         /*
1769          * For temperatures, there is no fixed mapping from registers to alarm
1770          * bits. Alarm bits are determined by the temperature source mapping.
1771          */
1772         nr = find_temp_source(data, sattr->index, data->num_temp_alarms);
1773         if (nr >= 0) {
1774                 int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE];
1775
1776                 alarm = (data->alarms >> bit) & 0x01;
1777         }
1778         return sprintf(buf, "%u\n", alarm);
1779 }
1780
1781 static ssize_t
1782 show_beep(struct device *dev, struct device_attribute *attr, char *buf)
1783 {
1784         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1785         struct nct6775_data *data = nct6775_update_device(dev);
1786         int nr = data->BEEP_BITS[sattr->index];
1787
1788         return sprintf(buf, "%u\n",
1789                        (unsigned int)((data->beeps >> nr) & 0x01));
1790 }
1791
1792 static ssize_t
1793 store_beep(struct device *dev, struct device_attribute *attr, const char *buf,
1794            size_t count)
1795 {
1796         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1797         struct nct6775_data *data = dev_get_drvdata(dev);
1798         int nr = data->BEEP_BITS[sattr->index];
1799         int regindex = nr >> 3;
1800         unsigned long val;
1801         int err;
1802
1803         err = kstrtoul(buf, 10, &val);
1804         if (err < 0)
1805                 return err;
1806         if (val > 1)
1807                 return -EINVAL;
1808
1809         mutex_lock(&data->update_lock);
1810         if (val)
1811                 data->beeps |= (1ULL << nr);
1812         else
1813                 data->beeps &= ~(1ULL << nr);
1814         nct6775_write_value(data, data->REG_BEEP[regindex],
1815                             (data->beeps >> (regindex << 3)) & 0xff);
1816         mutex_unlock(&data->update_lock);
1817         return count;
1818 }
1819
1820 static ssize_t
1821 show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf)
1822 {
1823         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1824         struct nct6775_data *data = nct6775_update_device(dev);
1825         unsigned int beep = 0;
1826         int nr;
1827
1828         /*
1829          * For temperatures, there is no fixed mapping from registers to beep
1830          * enable bits. Beep enable bits are determined by the temperature
1831          * source mapping.
1832          */
1833         nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1834         if (nr >= 0) {
1835                 int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1836
1837                 beep = (data->beeps >> bit) & 0x01;
1838         }
1839         return sprintf(buf, "%u\n", beep);
1840 }
1841
1842 static ssize_t
1843 store_temp_beep(struct device *dev, struct device_attribute *attr,
1844                 const char *buf, size_t count)
1845 {
1846         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1847         struct nct6775_data *data = dev_get_drvdata(dev);
1848         int nr, bit, regindex;
1849         unsigned long val;
1850         int err;
1851
1852         err = kstrtoul(buf, 10, &val);
1853         if (err < 0)
1854                 return err;
1855         if (val > 1)
1856                 return -EINVAL;
1857
1858         nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1859         if (nr < 0)
1860                 return nr;
1861
1862         bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1863         regindex = bit >> 3;
1864
1865         mutex_lock(&data->update_lock);
1866         if (val)
1867                 data->beeps |= (1ULL << bit);
1868         else
1869                 data->beeps &= ~(1ULL << bit);
1870         nct6775_write_value(data, data->REG_BEEP[regindex],
1871                             (data->beeps >> (regindex << 3)) & 0xff);
1872         mutex_unlock(&data->update_lock);
1873
1874         return count;
1875 }
1876
1877 static umode_t nct6775_in_is_visible(struct kobject *kobj,
1878                                      struct attribute *attr, int index)
1879 {
1880         struct device *dev = container_of(kobj, struct device, kobj);
1881         struct nct6775_data *data = dev_get_drvdata(dev);
1882         int in = index / 5;     /* voltage index */
1883
1884         if (!(data->have_in & (1 << in)))
1885                 return 0;
1886
1887         return attr->mode;
1888 }
1889
1890 SENSOR_TEMPLATE_2(in_input, "in%d_input", S_IRUGO, show_in_reg, NULL, 0, 0);
1891 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", S_IRUGO, show_alarm, NULL, 0);
1892 SENSOR_TEMPLATE(in_beep, "in%d_beep", S_IWUSR | S_IRUGO, show_beep, store_beep,
1893                 0);
1894 SENSOR_TEMPLATE_2(in_min, "in%d_min", S_IWUSR | S_IRUGO, show_in_reg,
1895                   store_in_reg, 0, 1);
1896 SENSOR_TEMPLATE_2(in_max, "in%d_max", S_IWUSR | S_IRUGO, show_in_reg,
1897                   store_in_reg, 0, 2);
1898
1899 /*
1900  * nct6775_in_is_visible uses the index into the following array
1901  * to determine if attributes should be created or not.
1902  * Any change in order or content must be matched.
1903  */
1904 static struct sensor_device_template *nct6775_attributes_in_template[] = {
1905         &sensor_dev_template_in_input,
1906         &sensor_dev_template_in_alarm,
1907         &sensor_dev_template_in_beep,
1908         &sensor_dev_template_in_min,
1909         &sensor_dev_template_in_max,
1910         NULL
1911 };
1912
1913 static const struct sensor_template_group nct6775_in_template_group = {
1914         .templates = nct6775_attributes_in_template,
1915         .is_visible = nct6775_in_is_visible,
1916 };
1917
1918 static ssize_t
1919 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1920 {
1921         struct nct6775_data *data = nct6775_update_device(dev);
1922         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1923         int nr = sattr->index;
1924
1925         return sprintf(buf, "%d\n", data->rpm[nr]);
1926 }
1927
1928 static ssize_t
1929 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1930 {
1931         struct nct6775_data *data = nct6775_update_device(dev);
1932         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1933         int nr = sattr->index;
1934
1935         return sprintf(buf, "%d\n",
1936                        data->fan_from_reg_min(data->fan_min[nr],
1937                                               data->fan_div[nr]));
1938 }
1939
1940 static ssize_t
1941 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1942 {
1943         struct nct6775_data *data = nct6775_update_device(dev);
1944         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1945         int nr = sattr->index;
1946
1947         return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1948 }
1949
1950 static ssize_t
1951 store_fan_min(struct device *dev, struct device_attribute *attr,
1952               const char *buf, size_t count)
1953 {
1954         struct nct6775_data *data = dev_get_drvdata(dev);
1955         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1956         int nr = sattr->index;
1957         unsigned long val;
1958         unsigned int reg;
1959         u8 new_div;
1960         int err;
1961
1962         err = kstrtoul(buf, 10, &val);
1963         if (err < 0)
1964                 return err;
1965
1966         mutex_lock(&data->update_lock);
1967         if (!data->has_fan_div) {
1968                 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1969                 if (!val) {
1970                         val = 0xff1f;
1971                 } else {
1972                         if (val > 1350000U)
1973                                 val = 135000U;
1974                         val = 1350000U / val;
1975                         val = (val & 0x1f) | ((val << 3) & 0xff00);
1976                 }
1977                 data->fan_min[nr] = val;
1978                 goto write_min; /* Leave fan divider alone */
1979         }
1980         if (!val) {
1981                 /* No min limit, alarm disabled */
1982                 data->fan_min[nr] = 255;
1983                 new_div = data->fan_div[nr]; /* No change */
1984                 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1985                 goto write_div;
1986         }
1987         reg = 1350000U / val;
1988         if (reg >= 128 * 255) {
1989                 /*
1990                  * Speed below this value cannot possibly be represented,
1991                  * even with the highest divider (128)
1992                  */
1993                 data->fan_min[nr] = 254;
1994                 new_div = 7; /* 128 == (1 << 7) */
1995                 dev_warn(dev,
1996                          "fan%u low limit %lu below minimum %u, set to minimum\n",
1997                          nr + 1, val, data->fan_from_reg_min(254, 7));
1998         } else if (!reg) {
1999                 /*
2000                  * Speed above this value cannot possibly be represented,
2001                  * even with the lowest divider (1)
2002                  */
2003                 data->fan_min[nr] = 1;
2004                 new_div = 0; /* 1 == (1 << 0) */
2005                 dev_warn(dev,
2006                          "fan%u low limit %lu above maximum %u, set to maximum\n",
2007                          nr + 1, val, data->fan_from_reg_min(1, 0));
2008         } else {
2009                 /*
2010                  * Automatically pick the best divider, i.e. the one such
2011                  * that the min limit will correspond to a register value
2012                  * in the 96..192 range
2013                  */
2014                 new_div = 0;
2015                 while (reg > 192 && new_div < 7) {
2016                         reg >>= 1;
2017                         new_div++;
2018                 }
2019                 data->fan_min[nr] = reg;
2020         }
2021
2022 write_div:
2023         /*
2024          * Write both the fan clock divider (if it changed) and the new
2025          * fan min (unconditionally)
2026          */
2027         if (new_div != data->fan_div[nr]) {
2028                 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
2029                         nr + 1, div_from_reg(data->fan_div[nr]),
2030                         div_from_reg(new_div));
2031                 data->fan_div[nr] = new_div;
2032                 nct6775_write_fan_div_common(data, nr);
2033                 /* Give the chip time to sample a new speed value */
2034                 data->last_updated = jiffies;
2035         }
2036
2037 write_min:
2038         nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
2039         mutex_unlock(&data->update_lock);
2040
2041         return count;
2042 }
2043
2044 static ssize_t
2045 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
2046 {
2047         struct nct6775_data *data = nct6775_update_device(dev);
2048         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2049         int p = data->fan_pulses[sattr->index];
2050
2051         return sprintf(buf, "%d\n", p ? : 4);
2052 }
2053
2054 static ssize_t
2055 store_fan_pulses(struct device *dev, struct device_attribute *attr,
2056                  const char *buf, size_t count)
2057 {
2058         struct nct6775_data *data = dev_get_drvdata(dev);
2059         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2060         int nr = sattr->index;
2061         unsigned long val;
2062         int err;
2063         u8 reg;
2064
2065         err = kstrtoul(buf, 10, &val);
2066         if (err < 0)
2067                 return err;
2068
2069         if (val > 4)
2070                 return -EINVAL;
2071
2072         mutex_lock(&data->update_lock);
2073         data->fan_pulses[nr] = val & 3;
2074         reg = nct6775_read_value(data, data->REG_FAN_PULSES[nr]);
2075         reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
2076         reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
2077         nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
2078         mutex_unlock(&data->update_lock);
2079
2080         return count;
2081 }
2082
2083 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
2084                                       struct attribute *attr, int index)
2085 {
2086         struct device *dev = container_of(kobj, struct device, kobj);
2087         struct nct6775_data *data = dev_get_drvdata(dev);
2088         int fan = index / 6;    /* fan index */
2089         int nr = index % 6;     /* attribute index */
2090
2091         if (!(data->has_fan & (1 << fan)))
2092                 return 0;
2093
2094         if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1)
2095                 return 0;
2096         if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1)
2097                 return 0;
2098         if (nr == 4 && !(data->has_fan_min & (1 << fan)))
2099                 return 0;
2100         if (nr == 5 && data->kind != nct6775)
2101                 return 0;
2102
2103         return attr->mode;
2104 }
2105
2106 SENSOR_TEMPLATE(fan_input, "fan%d_input", S_IRUGO, show_fan, NULL, 0);
2107 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", S_IRUGO, show_alarm, NULL,
2108                 FAN_ALARM_BASE);
2109 SENSOR_TEMPLATE(fan_beep, "fan%d_beep", S_IWUSR | S_IRUGO, show_beep,
2110                 store_beep, FAN_ALARM_BASE);
2111 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", S_IWUSR | S_IRUGO, show_fan_pulses,
2112                 store_fan_pulses, 0);
2113 SENSOR_TEMPLATE(fan_min, "fan%d_min", S_IWUSR | S_IRUGO, show_fan_min,
2114                 store_fan_min, 0);
2115 SENSOR_TEMPLATE(fan_div, "fan%d_div", S_IRUGO, show_fan_div, NULL, 0);
2116
2117 /*
2118  * nct6775_fan_is_visible uses the index into the following array
2119  * to determine if attributes should be created or not.
2120  * Any change in order or content must be matched.
2121  */
2122 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
2123         &sensor_dev_template_fan_input,
2124         &sensor_dev_template_fan_alarm, /* 1 */
2125         &sensor_dev_template_fan_beep,  /* 2 */
2126         &sensor_dev_template_fan_pulses,
2127         &sensor_dev_template_fan_min,   /* 4 */
2128         &sensor_dev_template_fan_div,   /* 5 */
2129         NULL
2130 };
2131
2132 static const struct sensor_template_group nct6775_fan_template_group = {
2133         .templates = nct6775_attributes_fan_template,
2134         .is_visible = nct6775_fan_is_visible,
2135         .base = 1,
2136 };
2137
2138 static ssize_t
2139 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
2140 {
2141         struct nct6775_data *data = nct6775_update_device(dev);
2142         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2143         int nr = sattr->index;
2144
2145         return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
2146 }
2147
2148 static ssize_t
2149 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
2150 {
2151         struct nct6775_data *data = nct6775_update_device(dev);
2152         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2153         int nr = sattr->nr;
2154         int index = sattr->index;
2155
2156         return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
2157 }
2158
2159 static ssize_t
2160 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
2161            size_t count)
2162 {
2163         struct nct6775_data *data = dev_get_drvdata(dev);
2164         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2165         int nr = sattr->nr;
2166         int index = sattr->index;
2167         int err;
2168         long val;
2169
2170         err = kstrtol(buf, 10, &val);
2171         if (err < 0)
2172                 return err;
2173
2174         mutex_lock(&data->update_lock);
2175         data->temp[index][nr] = LM75_TEMP_TO_REG(val);
2176         nct6775_write_temp(data, data->reg_temp[index][nr],
2177                            data->temp[index][nr]);
2178         mutex_unlock(&data->update_lock);
2179         return count;
2180 }
2181
2182 static ssize_t
2183 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
2184 {
2185         struct nct6775_data *data = nct6775_update_device(dev);
2186         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2187
2188         return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
2189 }
2190
2191 static ssize_t
2192 store_temp_offset(struct device *dev, struct device_attribute *attr,
2193                   const char *buf, size_t count)
2194 {
2195         struct nct6775_data *data = dev_get_drvdata(dev);
2196         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2197         int nr = sattr->index;
2198         long val;
2199         int err;
2200
2201         err = kstrtol(buf, 10, &val);
2202         if (err < 0)
2203                 return err;
2204
2205         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
2206
2207         mutex_lock(&data->update_lock);
2208         data->temp_offset[nr] = val;
2209         nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
2210         mutex_unlock(&data->update_lock);
2211
2212         return count;
2213 }
2214
2215 static ssize_t
2216 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
2217 {
2218         struct nct6775_data *data = nct6775_update_device(dev);
2219         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2220         int nr = sattr->index;
2221
2222         return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
2223 }
2224
2225 static ssize_t
2226 store_temp_type(struct device *dev, struct device_attribute *attr,
2227                 const char *buf, size_t count)
2228 {
2229         struct nct6775_data *data = nct6775_update_device(dev);
2230         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2231         int nr = sattr->index;
2232         unsigned long val;
2233         int err;
2234         u8 vbat, diode, vbit, dbit;
2235
2236         err = kstrtoul(buf, 10, &val);
2237         if (err < 0)
2238                 return err;
2239
2240         if (val != 1 && val != 3 && val != 4)
2241                 return -EINVAL;
2242
2243         mutex_lock(&data->update_lock);
2244
2245         data->temp_type[nr] = val;
2246         vbit = 0x02 << nr;
2247         dbit = data->DIODE_MASK << nr;
2248         vbat = nct6775_read_value(data, data->REG_VBAT) & ~vbit;
2249         diode = nct6775_read_value(data, data->REG_DIODE) & ~dbit;
2250         switch (val) {
2251         case 1: /* CPU diode (diode, current mode) */
2252                 vbat |= vbit;
2253                 diode |= dbit;
2254                 break;
2255         case 3: /* diode, voltage mode */
2256                 vbat |= dbit;
2257                 break;
2258         case 4: /* thermistor */
2259                 break;
2260         }
2261         nct6775_write_value(data, data->REG_VBAT, vbat);
2262         nct6775_write_value(data, data->REG_DIODE, diode);
2263
2264         mutex_unlock(&data->update_lock);
2265         return count;
2266 }
2267
2268 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
2269                                        struct attribute *attr, int index)
2270 {
2271         struct device *dev = container_of(kobj, struct device, kobj);
2272         struct nct6775_data *data = dev_get_drvdata(dev);
2273         int temp = index / 10;  /* temp index */
2274         int nr = index % 10;    /* attribute index */
2275
2276         if (!(data->have_temp & (1 << temp)))
2277                 return 0;
2278
2279         if (nr == 1 && !data->temp_label)
2280                 return 0;
2281
2282         if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0)
2283                 return 0;                               /* alarm */
2284
2285         if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0)
2286                 return 0;                               /* beep */
2287
2288         if (nr == 4 && !data->reg_temp[1][temp])        /* max */
2289                 return 0;
2290
2291         if (nr == 5 && !data->reg_temp[2][temp])        /* max_hyst */
2292                 return 0;
2293
2294         if (nr == 6 && !data->reg_temp[3][temp])        /* crit */
2295                 return 0;
2296
2297         if (nr == 7 && !data->reg_temp[4][temp])        /* lcrit */
2298                 return 0;
2299
2300         /* offset and type only apply to fixed sensors */
2301         if (nr > 7 && !(data->have_temp_fixed & (1 << temp)))
2302                 return 0;
2303
2304         return attr->mode;
2305 }
2306
2307 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", S_IRUGO, show_temp, NULL, 0, 0);
2308 SENSOR_TEMPLATE(temp_label, "temp%d_label", S_IRUGO, show_temp_label, NULL, 0);
2309 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", S_IRUGO | S_IWUSR, show_temp,
2310                   store_temp, 0, 1);
2311 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", S_IRUGO | S_IWUSR,
2312                   show_temp, store_temp, 0, 2);
2313 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", S_IRUGO | S_IWUSR, show_temp,
2314                   store_temp, 0, 3);
2315 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", S_IRUGO | S_IWUSR, show_temp,
2316                   store_temp, 0, 4);
2317 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", S_IRUGO | S_IWUSR,
2318                 show_temp_offset, store_temp_offset, 0);
2319 SENSOR_TEMPLATE(temp_type, "temp%d_type", S_IRUGO | S_IWUSR, show_temp_type,
2320                 store_temp_type, 0);
2321 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", S_IRUGO, show_temp_alarm, NULL, 0);
2322 SENSOR_TEMPLATE(temp_beep, "temp%d_beep", S_IRUGO | S_IWUSR, show_temp_beep,
2323                 store_temp_beep, 0);
2324
2325 /*
2326  * nct6775_temp_is_visible uses the index into the following array
2327  * to determine if attributes should be created or not.
2328  * Any change in order or content must be matched.
2329  */
2330 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
2331         &sensor_dev_template_temp_input,
2332         &sensor_dev_template_temp_label,
2333         &sensor_dev_template_temp_alarm,        /* 2 */
2334         &sensor_dev_template_temp_beep,         /* 3 */
2335         &sensor_dev_template_temp_max,          /* 4 */
2336         &sensor_dev_template_temp_max_hyst,     /* 5 */
2337         &sensor_dev_template_temp_crit,         /* 6 */
2338         &sensor_dev_template_temp_lcrit,        /* 7 */
2339         &sensor_dev_template_temp_offset,       /* 8 */
2340         &sensor_dev_template_temp_type,         /* 9 */
2341         NULL
2342 };
2343
2344 static const struct sensor_template_group nct6775_temp_template_group = {
2345         .templates = nct6775_attributes_temp_template,
2346         .is_visible = nct6775_temp_is_visible,
2347         .base = 1,
2348 };
2349
2350 static ssize_t
2351 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
2352 {
2353         struct nct6775_data *data = nct6775_update_device(dev);
2354         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2355
2356         return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
2357 }
2358
2359 static ssize_t
2360 store_pwm_mode(struct device *dev, struct device_attribute *attr,
2361                const char *buf, size_t count)
2362 {
2363         struct nct6775_data *data = dev_get_drvdata(dev);
2364         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2365         int nr = sattr->index;
2366         unsigned long val;
2367         int err;
2368         u8 reg;
2369
2370         err = kstrtoul(buf, 10, &val);
2371         if (err < 0)
2372                 return err;
2373
2374         if (val > 1)
2375                 return -EINVAL;
2376
2377         /* Setting DC mode is not supported for all chips/channels */
2378         if (data->REG_PWM_MODE[nr] == 0) {
2379                 if (val)
2380                         return -EINVAL;
2381                 return count;
2382         }
2383
2384         mutex_lock(&data->update_lock);
2385         data->pwm_mode[nr] = val;
2386         reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
2387         reg &= ~data->PWM_MODE_MASK[nr];
2388         if (val)
2389                 reg |= data->PWM_MODE_MASK[nr];
2390         nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
2391         mutex_unlock(&data->update_lock);
2392         return count;
2393 }
2394
2395 static ssize_t
2396 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2397 {
2398         struct nct6775_data *data = nct6775_update_device(dev);
2399         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2400         int nr = sattr->nr;
2401         int index = sattr->index;
2402         int pwm;
2403
2404         /*
2405          * For automatic fan control modes, show current pwm readings.
2406          * Otherwise, show the configured value.
2407          */
2408         if (index == 0 && data->pwm_enable[nr] > manual)
2409                 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
2410         else
2411                 pwm = data->pwm[index][nr];
2412
2413         return sprintf(buf, "%d\n", pwm);
2414 }
2415
2416 static ssize_t
2417 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
2418           size_t count)
2419 {
2420         struct nct6775_data *data = dev_get_drvdata(dev);
2421         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2422         int nr = sattr->nr;
2423         int index = sattr->index;
2424         unsigned long val;
2425         int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
2426         int maxval[7]
2427           = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
2428         int err;
2429         u8 reg;
2430
2431         err = kstrtoul(buf, 10, &val);
2432         if (err < 0)
2433                 return err;
2434         val = clamp_val(val, minval[index], maxval[index]);
2435
2436         mutex_lock(&data->update_lock);
2437         data->pwm[index][nr] = val;
2438         nct6775_write_value(data, data->REG_PWM[index][nr], val);
2439         if (index == 2) { /* floor: disable if val == 0 */
2440                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2441                 reg &= 0x7f;
2442                 if (val)
2443                         reg |= 0x80;
2444                 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2445         }
2446         mutex_unlock(&data->update_lock);
2447         return count;
2448 }
2449
2450 /* Returns 0 if OK, -EINVAL otherwise */
2451 static int check_trip_points(struct nct6775_data *data, int nr)
2452 {
2453         int i;
2454
2455         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2456                 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
2457                         return -EINVAL;
2458         }
2459         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2460                 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
2461                         return -EINVAL;
2462         }
2463         /* validate critical temperature and pwm if enabled (pwm > 0) */
2464         if (data->auto_pwm[nr][data->auto_pwm_num]) {
2465                 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2466                                 data->auto_temp[nr][data->auto_pwm_num] ||
2467                     data->auto_pwm[nr][data->auto_pwm_num - 1] >
2468                                 data->auto_pwm[nr][data->auto_pwm_num])
2469                         return -EINVAL;
2470         }
2471         return 0;
2472 }
2473
2474 static void pwm_update_registers(struct nct6775_data *data, int nr)
2475 {
2476         u8 reg;
2477
2478         switch (data->pwm_enable[nr]) {
2479         case off:
2480         case manual:
2481                 break;
2482         case speed_cruise:
2483                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2484                 reg = (reg & ~data->tolerance_mask) |
2485                   (data->target_speed_tolerance[nr] & data->tolerance_mask);
2486                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2487                 nct6775_write_value(data, data->REG_TARGET[nr],
2488                                     data->target_speed[nr] & 0xff);
2489                 if (data->REG_TOLERANCE_H) {
2490                         reg = (data->target_speed[nr] >> 8) & 0x0f;
2491                         reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2492                         nct6775_write_value(data,
2493                                             data->REG_TOLERANCE_H[nr],
2494                                             reg);
2495                 }
2496                 break;
2497         case thermal_cruise:
2498                 nct6775_write_value(data, data->REG_TARGET[nr],
2499                                     data->target_temp[nr]);
2500                 /* intentional */
2501         default:
2502                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2503                 reg = (reg & ~data->tolerance_mask) |
2504                   data->temp_tolerance[0][nr];
2505                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2506                 break;
2507         }
2508 }
2509
2510 static ssize_t
2511 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2512 {
2513         struct nct6775_data *data = nct6775_update_device(dev);
2514         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2515
2516         return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2517 }
2518
2519 static ssize_t
2520 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2521                  const char *buf, size_t count)
2522 {
2523         struct nct6775_data *data = dev_get_drvdata(dev);
2524         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2525         int nr = sattr->index;
2526         unsigned long val;
2527         int err;
2528         u16 reg;
2529
2530         err = kstrtoul(buf, 10, &val);
2531         if (err < 0)
2532                 return err;
2533
2534         if (val > sf4)
2535                 return -EINVAL;
2536
2537         if (val == sf3 && data->kind != nct6775)
2538                 return -EINVAL;
2539
2540         if (val == sf4 && check_trip_points(data, nr)) {
2541                 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2542                 dev_err(dev, "Adjust trip points and try again\n");
2543                 return -EINVAL;
2544         }
2545
2546         mutex_lock(&data->update_lock);
2547         data->pwm_enable[nr] = val;
2548         if (val == off) {
2549                 /*
2550                  * turn off pwm control: select manual mode, set pwm to maximum
2551                  */
2552                 data->pwm[0][nr] = 255;
2553                 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2554         }
2555         pwm_update_registers(data, nr);
2556         reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2557         reg &= 0x0f;
2558         reg |= pwm_enable_to_reg(val) << 4;
2559         nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2560         mutex_unlock(&data->update_lock);
2561         return count;
2562 }
2563
2564 static ssize_t
2565 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2566 {
2567         int i, sel = 0;
2568
2569         for (i = 0; i < NUM_TEMP; i++) {
2570                 if (!(data->have_temp & (1 << i)))
2571                         continue;
2572                 if (src == data->temp_src[i]) {
2573                         sel = i + 1;
2574                         break;
2575                 }
2576         }
2577
2578         return sprintf(buf, "%d\n", sel);
2579 }
2580
2581 static ssize_t
2582 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2583 {
2584         struct nct6775_data *data = nct6775_update_device(dev);
2585         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2586         int index = sattr->index;
2587
2588         return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2589 }
2590
2591 static ssize_t
2592 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2593                    const char *buf, size_t count)
2594 {
2595         struct nct6775_data *data = nct6775_update_device(dev);
2596         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2597         int nr = sattr->index;
2598         unsigned long val;
2599         int err, reg, src;
2600
2601         err = kstrtoul(buf, 10, &val);
2602         if (err < 0)
2603                 return err;
2604         if (val == 0 || val > NUM_TEMP)
2605                 return -EINVAL;
2606         if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
2607                 return -EINVAL;
2608
2609         mutex_lock(&data->update_lock);
2610         src = data->temp_src[val - 1];
2611         data->pwm_temp_sel[nr] = src;
2612         reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2613         reg &= 0xe0;
2614         reg |= src;
2615         nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2616         mutex_unlock(&data->update_lock);
2617
2618         return count;
2619 }
2620
2621 static ssize_t
2622 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2623                          char *buf)
2624 {
2625         struct nct6775_data *data = nct6775_update_device(dev);
2626         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2627         int index = sattr->index;
2628
2629         return show_pwm_temp_sel_common(data, buf,
2630                                         data->pwm_weight_temp_sel[index]);
2631 }
2632
2633 static ssize_t
2634 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2635                           const char *buf, size_t count)
2636 {
2637         struct nct6775_data *data = nct6775_update_device(dev);
2638         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2639         int nr = sattr->index;
2640         unsigned long val;
2641         int err, reg, src;
2642
2643         err = kstrtoul(buf, 10, &val);
2644         if (err < 0)
2645                 return err;
2646         if (val > NUM_TEMP)
2647                 return -EINVAL;
2648         if (val && (!(data->have_temp & (1 << (val - 1))) ||
2649                     !data->temp_src[val - 1]))
2650                 return -EINVAL;
2651
2652         mutex_lock(&data->update_lock);
2653         if (val) {
2654                 src = data->temp_src[val - 1];
2655                 data->pwm_weight_temp_sel[nr] = src;
2656                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2657                 reg &= 0xe0;
2658                 reg |= (src | 0x80);
2659                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2660         } else {
2661                 data->pwm_weight_temp_sel[nr] = 0;
2662                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2663                 reg &= 0x7f;
2664                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2665         }
2666         mutex_unlock(&data->update_lock);
2667
2668         return count;
2669 }
2670
2671 static ssize_t
2672 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2673 {
2674         struct nct6775_data *data = nct6775_update_device(dev);
2675         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2676
2677         return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2678 }
2679
2680 static ssize_t
2681 store_target_temp(struct device *dev, struct device_attribute *attr,
2682                   const char *buf, size_t count)
2683 {
2684         struct nct6775_data *data = dev_get_drvdata(dev);
2685         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2686         int nr = sattr->index;
2687         unsigned long val;
2688         int err;
2689
2690         err = kstrtoul(buf, 10, &val);
2691         if (err < 0)
2692                 return err;
2693
2694         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2695                         data->target_temp_mask);
2696
2697         mutex_lock(&data->update_lock);
2698         data->target_temp[nr] = val;
2699         pwm_update_registers(data, nr);
2700         mutex_unlock(&data->update_lock);
2701         return count;
2702 }
2703
2704 static ssize_t
2705 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2706 {
2707         struct nct6775_data *data = nct6775_update_device(dev);
2708         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2709         int nr = sattr->index;
2710
2711         return sprintf(buf, "%d\n",
2712                        fan_from_reg16(data->target_speed[nr],
2713                                       data->fan_div[nr]));
2714 }
2715
2716 static ssize_t
2717 store_target_speed(struct device *dev, struct device_attribute *attr,
2718                    const char *buf, size_t count)
2719 {
2720         struct nct6775_data *data = dev_get_drvdata(dev);
2721         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2722         int nr = sattr->index;
2723         unsigned long val;
2724         int err;
2725         u16 speed;
2726
2727         err = kstrtoul(buf, 10, &val);
2728         if (err < 0)
2729                 return err;
2730
2731         val = clamp_val(val, 0, 1350000U);
2732         speed = fan_to_reg(val, data->fan_div[nr]);
2733
2734         mutex_lock(&data->update_lock);
2735         data->target_speed[nr] = speed;
2736         pwm_update_registers(data, nr);
2737         mutex_unlock(&data->update_lock);
2738         return count;
2739 }
2740
2741 static ssize_t
2742 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2743                     char *buf)
2744 {
2745         struct nct6775_data *data = nct6775_update_device(dev);
2746         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2747         int nr = sattr->nr;
2748         int index = sattr->index;
2749
2750         return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2751 }
2752
2753 static ssize_t
2754 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2755                      const char *buf, size_t count)
2756 {
2757         struct nct6775_data *data = dev_get_drvdata(dev);
2758         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2759         int nr = sattr->nr;
2760         int index = sattr->index;
2761         unsigned long val;
2762         int err;
2763
2764         err = kstrtoul(buf, 10, &val);
2765         if (err < 0)
2766                 return err;
2767
2768         /* Limit tolerance as needed */
2769         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2770
2771         mutex_lock(&data->update_lock);
2772         data->temp_tolerance[index][nr] = val;
2773         if (index)
2774                 pwm_update_registers(data, nr);
2775         else
2776                 nct6775_write_value(data,
2777                                     data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2778                                     val);
2779         mutex_unlock(&data->update_lock);
2780         return count;
2781 }
2782
2783 /*
2784  * Fan speed tolerance is a tricky beast, since the associated register is
2785  * a tick counter, but the value is reported and configured as rpm.
2786  * Compute resulting low and high rpm values and report the difference.
2787  */
2788 static ssize_t
2789 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2790                      char *buf)
2791 {
2792         struct nct6775_data *data = nct6775_update_device(dev);
2793         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2794         int nr = sattr->index;
2795         int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2796         int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2797         int tolerance;
2798
2799         if (low <= 0)
2800                 low = 1;
2801         if (high > 0xffff)
2802                 high = 0xffff;
2803         if (high < low)
2804                 high = low;
2805
2806         tolerance = (fan_from_reg16(low, data->fan_div[nr])
2807                      - fan_from_reg16(high, data->fan_div[nr])) / 2;
2808
2809         return sprintf(buf, "%d\n", tolerance);
2810 }
2811
2812 static ssize_t
2813 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2814                       const char *buf, size_t count)
2815 {
2816         struct nct6775_data *data = dev_get_drvdata(dev);
2817         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2818         int nr = sattr->index;
2819         unsigned long val;
2820         int err;
2821         int low, high;
2822
2823         err = kstrtoul(buf, 10, &val);
2824         if (err < 0)
2825                 return err;
2826
2827         high = fan_from_reg16(data->target_speed[nr],
2828                               data->fan_div[nr]) + val;
2829         low = fan_from_reg16(data->target_speed[nr],
2830                              data->fan_div[nr]) - val;
2831         if (low <= 0)
2832                 low = 1;
2833         if (high < low)
2834                 high = low;
2835
2836         val = (fan_to_reg(low, data->fan_div[nr]) -
2837                fan_to_reg(high, data->fan_div[nr])) / 2;
2838
2839         /* Limit tolerance as needed */
2840         val = clamp_val(val, 0, data->speed_tolerance_limit);
2841
2842         mutex_lock(&data->update_lock);
2843         data->target_speed_tolerance[nr] = val;
2844         pwm_update_registers(data, nr);
2845         mutex_unlock(&data->update_lock);
2846         return count;
2847 }
2848
2849 SENSOR_TEMPLATE_2(pwm, "pwm%d", S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2850 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", S_IWUSR | S_IRUGO, show_pwm_mode,
2851                 store_pwm_mode, 0);
2852 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", S_IWUSR | S_IRUGO, show_pwm_enable,
2853                 store_pwm_enable, 0);
2854 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", S_IWUSR | S_IRUGO,
2855                 show_pwm_temp_sel, store_pwm_temp_sel, 0);
2856 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", S_IWUSR | S_IRUGO,
2857                 show_target_temp, store_target_temp, 0);
2858 SENSOR_TEMPLATE(fan_target, "fan%d_target", S_IWUSR | S_IRUGO,
2859                 show_target_speed, store_target_speed, 0);
2860 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", S_IWUSR | S_IRUGO,
2861                 show_speed_tolerance, store_speed_tolerance, 0);
2862
2863 /* Smart Fan registers */
2864
2865 static ssize_t
2866 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2867 {
2868         struct nct6775_data *data = nct6775_update_device(dev);
2869         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2870         int nr = sattr->nr;
2871         int index = sattr->index;
2872
2873         return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2874 }
2875
2876 static ssize_t
2877 store_weight_temp(struct device *dev, struct device_attribute *attr,
2878                   const char *buf, size_t count)
2879 {
2880         struct nct6775_data *data = dev_get_drvdata(dev);
2881         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2882         int nr = sattr->nr;
2883         int index = sattr->index;
2884         unsigned long val;
2885         int err;
2886
2887         err = kstrtoul(buf, 10, &val);
2888         if (err < 0)
2889                 return err;
2890
2891         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2892
2893         mutex_lock(&data->update_lock);
2894         data->weight_temp[index][nr] = val;
2895         nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2896         mutex_unlock(&data->update_lock);
2897         return count;
2898 }
2899
2900 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", S_IWUSR | S_IRUGO,
2901                   show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
2902 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step",
2903                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 0);
2904 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol",
2905                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 1);
2906 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base",
2907                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 2);
2908 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step",
2909                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 5);
2910 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base",
2911                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 6);
2912
2913 static ssize_t
2914 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2915 {
2916         struct nct6775_data *data = nct6775_update_device(dev);
2917         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2918         int nr = sattr->nr;
2919         int index = sattr->index;
2920
2921         return sprintf(buf, "%d\n",
2922                        step_time_from_reg(data->fan_time[index][nr],
2923                                           data->pwm_mode[nr]));
2924 }
2925
2926 static ssize_t
2927 store_fan_time(struct device *dev, struct device_attribute *attr,
2928                const char *buf, size_t count)
2929 {
2930         struct nct6775_data *data = dev_get_drvdata(dev);
2931         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2932         int nr = sattr->nr;
2933         int index = sattr->index;
2934         unsigned long val;
2935         int err;
2936
2937         err = kstrtoul(buf, 10, &val);
2938         if (err < 0)
2939                 return err;
2940
2941         val = step_time_to_reg(val, data->pwm_mode[nr]);
2942         mutex_lock(&data->update_lock);
2943         data->fan_time[index][nr] = val;
2944         nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2945         mutex_unlock(&data->update_lock);
2946         return count;
2947 }
2948
2949 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
2950 static ssize_t
2951 show_name(struct device *dev, struct device_attribute *attr, char *buf)
2952 {
2953         struct nct6775_data *data = dev_get_drvdata(dev);
2954
2955         return sprintf(buf, "%s\n", data->name);
2956 }
2957
2958 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
2959 #endif
2960
2961 static ssize_t
2962 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2963 {
2964         struct nct6775_data *data = nct6775_update_device(dev);
2965         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2966
2967         return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2968 }
2969
2970 static ssize_t
2971 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2972                const char *buf, size_t count)
2973 {
2974         struct nct6775_data *data = dev_get_drvdata(dev);
2975         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2976         int nr = sattr->nr;
2977         int point = sattr->index;
2978         unsigned long val;
2979         int err;
2980         u8 reg;
2981
2982         err = kstrtoul(buf, 10, &val);
2983         if (err < 0)
2984                 return err;
2985         if (val > 255)
2986                 return -EINVAL;
2987
2988         if (point == data->auto_pwm_num) {
2989                 if (data->kind != nct6775 && !val)
2990                         return -EINVAL;
2991                 if (data->kind != nct6779 && val)
2992                         val = 0xff;
2993         }
2994
2995         mutex_lock(&data->update_lock);
2996         data->auto_pwm[nr][point] = val;
2997         if (point < data->auto_pwm_num) {
2998                 nct6775_write_value(data,
2999                                     NCT6775_AUTO_PWM(data, nr, point),
3000                                     data->auto_pwm[nr][point]);
3001         } else {
3002                 switch (data->kind) {
3003                 case nct6775:
3004                         /* disable if needed (pwm == 0) */
3005                         reg = nct6775_read_value(data,
3006                                                  NCT6775_REG_CRITICAL_ENAB[nr]);
3007                         if (val)
3008                                 reg |= 0x02;
3009                         else
3010                                 reg &= ~0x02;
3011                         nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
3012                                             reg);
3013                         break;
3014                 case nct6776:
3015                         break; /* always enabled, nothing to do */
3016                 case nct6106:
3017                 case nct6779:
3018                 case nct6791:
3019                 case nct6792:
3020                 case nct6793:
3021                 case nct6795:
3022                         nct6775_write_value(data, data->REG_CRITICAL_PWM[nr],
3023                                             val);
3024                         reg = nct6775_read_value(data,
3025                                         data->REG_CRITICAL_PWM_ENABLE[nr]);
3026                         if (val == 255)
3027                                 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
3028                         else
3029                                 reg |= data->CRITICAL_PWM_ENABLE_MASK;
3030                         nct6775_write_value(data,
3031                                             data->REG_CRITICAL_PWM_ENABLE[nr],
3032                                             reg);
3033                         break;
3034                 }
3035         }
3036         mutex_unlock(&data->update_lock);
3037         return count;
3038 }
3039
3040 static ssize_t
3041 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
3042 {
3043         struct nct6775_data *data = nct6775_update_device(dev);
3044         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3045         int nr = sattr->nr;
3046         int point = sattr->index;
3047
3048         /*
3049          * We don't know for sure if the temperature is signed or unsigned.
3050          * Assume it is unsigned.
3051          */
3052         return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
3053 }
3054
3055 static ssize_t
3056 store_auto_temp(struct device *dev, struct device_attribute *attr,
3057                 const char *buf, size_t count)
3058 {
3059         struct nct6775_data *data = dev_get_drvdata(dev);
3060         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3061         int nr = sattr->nr;
3062         int point = sattr->index;
3063         unsigned long val;
3064         int err;
3065
3066         err = kstrtoul(buf, 10, &val);
3067         if (err)
3068                 return err;
3069         if (val > 255000)
3070                 return -EINVAL;
3071
3072         mutex_lock(&data->update_lock);
3073         data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
3074         if (point < data->auto_pwm_num) {
3075                 nct6775_write_value(data,
3076                                     NCT6775_AUTO_TEMP(data, nr, point),
3077                                     data->auto_temp[nr][point]);
3078         } else {
3079                 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
3080                                     data->auto_temp[nr][point]);
3081         }
3082         mutex_unlock(&data->update_lock);
3083         return count;
3084 }
3085
3086 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
3087                                       struct attribute *attr, int index)
3088 {
3089         struct device *dev = container_of(kobj, struct device, kobj);
3090         struct nct6775_data *data = dev_get_drvdata(dev);
3091         int pwm = index / 36;   /* pwm index */
3092         int nr = index % 36;    /* attribute index */
3093
3094         if (!(data->has_pwm & (1 << pwm)))
3095                 return 0;
3096
3097         if ((nr >= 14 && nr <= 18) || nr == 21)   /* weight */
3098                 if (!data->REG_WEIGHT_TEMP_SEL[pwm])
3099                         return 0;
3100         if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
3101                 return 0;
3102         if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
3103                 return 0;
3104         if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
3105                 return 0;
3106
3107         if (nr >= 22 && nr <= 35) {             /* auto point */
3108                 int api = (nr - 22) / 2;        /* auto point index */
3109
3110                 if (api > data->auto_pwm_num)
3111                         return 0;
3112         }
3113         return attr->mode;
3114 }
3115
3116 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", S_IWUSR | S_IRUGO,
3117                   show_fan_time, store_fan_time, 0, 0);
3118 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", S_IWUSR | S_IRUGO,
3119                   show_fan_time, store_fan_time, 0, 1);
3120 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", S_IWUSR | S_IRUGO,
3121                   show_fan_time, store_fan_time, 0, 2);
3122 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", S_IWUSR | S_IRUGO, show_pwm,
3123                   store_pwm, 0, 1);
3124 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", S_IWUSR | S_IRUGO, show_pwm,
3125                   store_pwm, 0, 2);
3126 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", S_IWUSR | S_IRUGO,
3127                   show_temp_tolerance, store_temp_tolerance, 0, 0);
3128 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance",
3129                   S_IWUSR | S_IRUGO, show_temp_tolerance, store_temp_tolerance,
3130                   0, 1);
3131
3132 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", S_IWUSR | S_IRUGO, show_pwm, store_pwm,
3133                   0, 3);
3134
3135 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", S_IWUSR | S_IRUGO, show_pwm,
3136                   store_pwm, 0, 4);
3137
3138 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm",
3139                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 0);
3140 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp",
3141                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 0);
3142
3143 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm",
3144                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 1);
3145 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp",
3146                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 1);
3147
3148 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm",
3149                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 2);
3150 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp",
3151                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 2);
3152
3153 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm",
3154                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 3);
3155 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp",
3156                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 3);
3157
3158 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm",
3159                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 4);
3160 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp",
3161                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 4);
3162
3163 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm",
3164                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 5);
3165 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp",
3166                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 5);
3167
3168 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm",
3169                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 6);
3170 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp",
3171                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 6);
3172
3173 /*
3174  * nct6775_pwm_is_visible uses the index into the following array
3175  * to determine if attributes should be created or not.
3176  * Any change in order or content must be matched.
3177  */
3178 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
3179         &sensor_dev_template_pwm,
3180         &sensor_dev_template_pwm_mode,
3181         &sensor_dev_template_pwm_enable,
3182         &sensor_dev_template_pwm_temp_sel,
3183         &sensor_dev_template_pwm_temp_tolerance,
3184         &sensor_dev_template_pwm_crit_temp_tolerance,
3185         &sensor_dev_template_pwm_target_temp,
3186         &sensor_dev_template_fan_target,
3187         &sensor_dev_template_fan_tolerance,
3188         &sensor_dev_template_pwm_stop_time,
3189         &sensor_dev_template_pwm_step_up_time,
3190         &sensor_dev_template_pwm_step_down_time,
3191         &sensor_dev_template_pwm_start,
3192         &sensor_dev_template_pwm_floor,
3193         &sensor_dev_template_pwm_weight_temp_sel,       /* 14 */
3194         &sensor_dev_template_pwm_weight_temp_step,
3195         &sensor_dev_template_pwm_weight_temp_step_tol,
3196         &sensor_dev_template_pwm_weight_temp_step_base,
3197         &sensor_dev_template_pwm_weight_duty_step,      /* 18 */
3198         &sensor_dev_template_pwm_max,                   /* 19 */
3199         &sensor_dev_template_pwm_step,                  /* 20 */
3200         &sensor_dev_template_pwm_weight_duty_base,      /* 21 */
3201         &sensor_dev_template_pwm_auto_point1_pwm,       /* 22 */
3202         &sensor_dev_template_pwm_auto_point1_temp,
3203         &sensor_dev_template_pwm_auto_point2_pwm,
3204         &sensor_dev_template_pwm_auto_point2_temp,
3205         &sensor_dev_template_pwm_auto_point3_pwm,
3206         &sensor_dev_template_pwm_auto_point3_temp,
3207         &sensor_dev_template_pwm_auto_point4_pwm,
3208         &sensor_dev_template_pwm_auto_point4_temp,
3209         &sensor_dev_template_pwm_auto_point5_pwm,
3210         &sensor_dev_template_pwm_auto_point5_temp,
3211         &sensor_dev_template_pwm_auto_point6_pwm,
3212         &sensor_dev_template_pwm_auto_point6_temp,
3213         &sensor_dev_template_pwm_auto_point7_pwm,
3214         &sensor_dev_template_pwm_auto_point7_temp,      /* 35 */
3215
3216         NULL
3217 };
3218
3219 static const struct sensor_template_group nct6775_pwm_template_group = {
3220         .templates = nct6775_attributes_pwm_template,
3221         .is_visible = nct6775_pwm_is_visible,
3222         .base = 1,
3223 };
3224
3225 static ssize_t
3226 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
3227 {
3228         struct nct6775_data *data = dev_get_drvdata(dev);
3229
3230         return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
3231 }
3232
3233 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
3234
3235 /* Case open detection */
3236
3237 static ssize_t
3238 clear_caseopen(struct device *dev, struct device_attribute *attr,
3239                const char *buf, size_t count)
3240 {
3241         struct nct6775_data *data = dev_get_drvdata(dev);
3242         int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
3243         unsigned long val;
3244         u8 reg;
3245         int ret;
3246
3247         if (kstrtoul(buf, 10, &val) || val != 0)
3248                 return -EINVAL;
3249
3250         mutex_lock(&data->update_lock);
3251
3252         /*
3253          * Use CR registers to clear caseopen status.
3254          * The CR registers are the same for all chips, and not all chips
3255          * support clearing the caseopen status through "regular" registers.
3256          */
3257         ret = superio_enter(data->sioreg);
3258         if (ret) {
3259                 count = ret;
3260                 goto error;
3261         }
3262
3263         superio_select(data->sioreg, NCT6775_LD_ACPI);
3264         reg = superio_inb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
3265         reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3266         superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3267         reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3268         superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3269         superio_exit(data->sioreg);
3270
3271         data->valid = false;    /* Force cache refresh */
3272 error:
3273         mutex_unlock(&data->update_lock);
3274         return count;
3275 }
3276
3277 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
3278                           clear_caseopen, INTRUSION_ALARM_BASE);
3279 static SENSOR_DEVICE_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
3280                           clear_caseopen, INTRUSION_ALARM_BASE + 1);
3281 static SENSOR_DEVICE_ATTR(intrusion0_beep, S_IWUSR | S_IRUGO, show_beep,
3282                           store_beep, INTRUSION_ALARM_BASE);
3283 static SENSOR_DEVICE_ATTR(intrusion1_beep, S_IWUSR | S_IRUGO, show_beep,
3284                           store_beep, INTRUSION_ALARM_BASE + 1);
3285 static SENSOR_DEVICE_ATTR(beep_enable, S_IWUSR | S_IRUGO, show_beep,
3286                           store_beep, BEEP_ENABLE_BASE);
3287
3288 static umode_t nct6775_other_is_visible(struct kobject *kobj,
3289                                         struct attribute *attr, int index)
3290 {
3291         struct device *dev = container_of(kobj, struct device, kobj);
3292         struct nct6775_data *data = dev_get_drvdata(dev);
3293
3294         if (index == 0 && !data->have_vid)
3295                 return 0;
3296
3297         if (index == 1 || index == 2) {
3298                 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + index - 1] < 0)
3299                         return 0;
3300         }
3301
3302         if (index == 3 || index == 4) {
3303                 if (data->BEEP_BITS[INTRUSION_ALARM_BASE + index - 3] < 0)
3304                         return 0;
3305         }
3306
3307         return attr->mode;
3308 }
3309
3310 /*
3311  * nct6775_other_is_visible uses the index into the following array
3312  * to determine if attributes should be created or not.
3313  * Any change in order or content must be matched.
3314  */
3315 static struct attribute *nct6775_attributes_other[] = {
3316         &dev_attr_cpu0_vid.attr,                                /* 0 */
3317         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,        /* 1 */
3318         &sensor_dev_attr_intrusion1_alarm.dev_attr.attr,        /* 2 */
3319         &sensor_dev_attr_intrusion0_beep.dev_attr.attr,         /* 3 */
3320         &sensor_dev_attr_intrusion1_beep.dev_attr.attr,         /* 4 */
3321         &sensor_dev_attr_beep_enable.dev_attr.attr,             /* 5 */
3322 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
3323         &dev_attr_name.attr,
3324 #endif
3325         NULL
3326 };
3327
3328 static const struct attribute_group nct6775_group_other = {
3329         .attrs = nct6775_attributes_other,
3330         .is_visible = nct6775_other_is_visible,
3331 };
3332
3333 static inline void nct6775_init_device(struct nct6775_data *data)
3334 {
3335         int i;
3336         u8 tmp, diode;
3337
3338         /* Start monitoring if needed */
3339         if (data->REG_CONFIG) {
3340                 tmp = nct6775_read_value(data, data->REG_CONFIG);
3341                 if (!(tmp & 0x01))
3342                         nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
3343         }
3344
3345         /* Enable temperature sensors if needed */
3346         for (i = 0; i < NUM_TEMP; i++) {
3347                 if (!(data->have_temp & (1 << i)))
3348                         continue;
3349                 if (!data->reg_temp_config[i])
3350                         continue;
3351                 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
3352                 if (tmp & 0x01)
3353                         nct6775_write_value(data, data->reg_temp_config[i],
3354                                             tmp & 0xfe);
3355         }
3356
3357         /* Enable VBAT monitoring if needed */
3358         tmp = nct6775_read_value(data, data->REG_VBAT);
3359         if (!(tmp & 0x01))
3360                 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
3361
3362         diode = nct6775_read_value(data, data->REG_DIODE);
3363
3364         for (i = 0; i < data->temp_fixed_num; i++) {
3365                 if (!(data->have_temp_fixed & (1 << i)))
3366                         continue;
3367                 if ((tmp & (data->DIODE_MASK << i)))    /* diode */
3368                         data->temp_type[i]
3369                           = 3 - ((diode >> i) & data->DIODE_MASK);
3370                 else                            /* thermistor */
3371                         data->temp_type[i] = 4;
3372         }
3373 }
3374
3375 static void
3376 nct6775_check_fan_inputs(struct nct6775_data *data)
3377 {
3378         bool fan3pin, fan4pin, fan4min, fan5pin, fan6pin;
3379         bool pwm3pin, pwm4pin, pwm5pin, pwm6pin;
3380         int sioreg = data->sioreg;
3381         int regval;
3382
3383         /* Store SIO_REG_ENABLE for use during resume */
3384         superio_select(sioreg, NCT6775_LD_HWM);
3385         data->sio_reg_enable = superio_inb(sioreg, SIO_REG_ENABLE);
3386
3387         /* fan4 and fan5 share some pins with the GPIO and serial flash */
3388         if (data->kind == nct6775) {
3389                 regval = superio_inb(sioreg, 0x2c);
3390
3391                 fan3pin = regval & (1 << 6);
3392                 pwm3pin = regval & (1 << 7);
3393
3394                 /* On NCT6775, fan4 shares pins with the fdc interface */
3395                 fan4pin = !(superio_inb(sioreg, 0x2A) & 0x80);
3396                 fan4min = false;
3397                 fan5pin = false;
3398                 fan6pin = false;
3399                 pwm4pin = false;
3400                 pwm5pin = false;
3401                 pwm6pin = false;
3402         } else if (data->kind == nct6776) {
3403                 bool gpok = superio_inb(sioreg, 0x27) & 0x80;
3404                 const char *board_vendor, *board_name;
3405
3406                 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
3407                 board_name = dmi_get_system_info(DMI_BOARD_NAME);
3408
3409                 if (board_name && board_vendor &&
3410                     !strcmp(board_vendor, "ASRock")) {
3411                         /*
3412                          * Auxiliary fan monitoring is not enabled on ASRock
3413                          * Z77 Pro4-M if booted in UEFI Ultra-FastBoot mode.
3414                          * Observed with BIOS version 2.00.
3415                          */
3416                         if (!strcmp(board_name, "Z77 Pro4-M")) {
3417                                 if ((data->sio_reg_enable & 0xe0) != 0xe0) {
3418                                         data->sio_reg_enable |= 0xe0;
3419                                         superio_outb(sioreg, SIO_REG_ENABLE,
3420                                                      data->sio_reg_enable);
3421                                 }
3422                         }
3423                 }
3424
3425                 if (data->sio_reg_enable & 0x80)
3426                         fan3pin = gpok;
3427                 else
3428                         fan3pin = !(superio_inb(sioreg, 0x24) & 0x40);
3429
3430                 if (data->sio_reg_enable & 0x40)
3431                         fan4pin = gpok;
3432                 else
3433                         fan4pin = superio_inb(sioreg, 0x1C) & 0x01;
3434
3435                 if (data->sio_reg_enable & 0x20)
3436                         fan5pin = gpok;
3437                 else
3438                         fan5pin = superio_inb(sioreg, 0x1C) & 0x02;
3439
3440                 fan4min = fan4pin;
3441                 fan6pin = false;
3442                 pwm3pin = fan3pin;
3443                 pwm4pin = false;
3444                 pwm5pin = false;
3445                 pwm6pin = false;
3446         } else if (data->kind == nct6106) {
3447                 regval = superio_inb(sioreg, 0x24);
3448                 fan3pin = !(regval & 0x80);
3449                 pwm3pin = regval & 0x08;
3450
3451                 fan4pin = false;
3452                 fan4min = false;
3453                 fan5pin = false;
3454                 fan6pin = false;
3455                 pwm4pin = false;
3456                 pwm5pin = false;
3457                 pwm6pin = false;
3458         } else {        /* NCT6779D, NCT6791D, NCT6792D, NCT6793D, NCT6795D */
3459                 int regval_1b, regval_2a, regval_eb;
3460
3461                 regval = superio_inb(sioreg, 0x1c);
3462
3463                 fan3pin = !(regval & (1 << 5));
3464                 fan4pin = !(regval & (1 << 6));
3465                 fan5pin = !(regval & (1 << 7));
3466
3467                 pwm3pin = !(regval & (1 << 0));
3468                 pwm4pin = !(regval & (1 << 1));
3469                 pwm5pin = !(regval & (1 << 2));
3470
3471                 regval = superio_inb(sioreg, 0x2d);
3472                 switch (data->kind) {
3473                 case nct6791:
3474                 case nct6792:
3475                         fan6pin = regval & (1 << 1);
3476                         pwm6pin = regval & (1 << 0);
3477                         break;
3478                 case nct6793:
3479                 case nct6795:
3480                         regval_1b = superio_inb(sioreg, 0x1b);
3481                         regval_2a = superio_inb(sioreg, 0x2a);
3482
3483                         if (!pwm5pin)
3484                                 pwm5pin = regval & (1 << 7);
3485                         fan6pin = regval & (1 << 1);
3486                         pwm6pin = regval & (1 << 0);
3487                         if (!fan5pin)
3488                                 fan5pin = regval_1b & (1 << 5);
3489
3490                         superio_select(sioreg, NCT6775_LD_12);
3491                         regval_eb = superio_inb(sioreg, 0xeb);
3492                         if (!fan5pin)
3493                                 fan5pin = regval_eb & (1 << 5);
3494                         if (!pwm5pin)
3495                                 pwm5pin = (regval_eb & (1 << 4)) &&
3496                                            !(regval_2a & (1 << 0));
3497                         if (!fan6pin)
3498                                 fan6pin = regval_eb & (1 << 3);
3499                         if (!pwm6pin)
3500                                 pwm6pin = regval_eb & (1 << 2);
3501                         break;
3502                 default:        /* NCT6779D */
3503                         fan6pin = false;
3504                         pwm6pin = false;
3505                         break;
3506                 }
3507
3508                 fan4min = fan4pin;
3509         }
3510
3511         /* fan 1 and 2 (0x03) are always present */
3512         data->has_fan = 0x03 | (fan3pin << 2) | (fan4pin << 3) |
3513                 (fan5pin << 4) | (fan6pin << 5);
3514         data->has_fan_min = 0x03 | (fan3pin << 2) | (fan4min << 3) |
3515                 (fan5pin << 4);
3516         data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) |
3517                 (pwm5pin << 4) | (pwm6pin << 5);
3518 }
3519
3520 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
3521                              int *available, int *mask)
3522 {
3523         int i;
3524         u8 src;
3525
3526         for (i = 0; i < data->pwm_num && *available; i++) {
3527                 int index;
3528
3529                 if (!regp[i])
3530                         continue;
3531                 src = nct6775_read_value(data, regp[i]);
3532                 src &= 0x1f;
3533                 if (!src || (*mask & (1 << src)))
3534                         continue;
3535                 if (!(data->temp_mask & BIT(src)))
3536                         continue;
3537
3538                 index = __ffs(*available);
3539                 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3540                 *available &= ~(1 << index);
3541                 *mask |= 1 << src;
3542         }
3543 }
3544
3545 static int nct6775_probe(struct platform_device *pdev)
3546 {
3547         struct device *dev = &pdev->dev;
3548         struct nct6775_sio_data *sio_data = dev_get_platdata(dev);
3549         struct nct6775_data *data;
3550         struct resource *res;
3551         int i, s, err = 0;
3552         int src, mask, available;
3553         const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3554         const u16 *reg_temp_mon, *reg_temp_alternate, *reg_temp_crit;
3555         const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL;
3556         int num_reg_temp, num_reg_temp_mon;
3557         u8 cr2a;
3558         struct attribute_group *group;
3559         struct device *hwmon_dev;
3560         int num_attr_groups = 0;
3561
3562         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3563         if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3564                                  DRVNAME))
3565                 return -EBUSY;
3566
3567         data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3568                             GFP_KERNEL);
3569         if (!data)
3570                 return -ENOMEM;
3571
3572         data->kind = sio_data->kind;
3573         data->sioreg = sio_data->sioreg;
3574         data->addr = res->start;
3575         mutex_init(&data->update_lock);
3576         data->name = nct6775_device_names[data->kind];
3577         data->bank = 0xff;              /* Force initial bank selection */
3578         platform_set_drvdata(pdev, data);
3579
3580         switch (data->kind) {
3581         case nct6106:
3582                 data->in_num = 9;
3583                 data->pwm_num = 3;
3584                 data->auto_pwm_num = 4;
3585                 data->temp_fixed_num = 3;
3586                 data->num_temp_alarms = 6;
3587                 data->num_temp_beeps = 6;
3588
3589                 data->fan_from_reg = fan_from_reg13;
3590                 data->fan_from_reg_min = fan_from_reg13;
3591
3592                 data->temp_label = nct6776_temp_label;
3593                 data->temp_mask = NCT6776_TEMP_MASK;
3594
3595                 data->REG_VBAT = NCT6106_REG_VBAT;
3596                 data->REG_DIODE = NCT6106_REG_DIODE;
3597                 data->DIODE_MASK = NCT6106_DIODE_MASK;
3598                 data->REG_VIN = NCT6106_REG_IN;
3599                 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3600                 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3601                 data->REG_TARGET = NCT6106_REG_TARGET;
3602                 data->REG_FAN = NCT6106_REG_FAN;
3603                 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
3604                 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
3605                 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
3606                 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
3607                 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
3608                 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
3609                 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
3610                 data->REG_PWM[0] = NCT6106_REG_PWM;
3611                 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
3612                 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
3613                 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3614                 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3615                 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3616                 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3617                 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3618                 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
3619                 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
3620                 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
3621                 data->REG_CRITICAL_TEMP_TOLERANCE
3622                   = NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
3623                 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
3624                 data->CRITICAL_PWM_ENABLE_MASK
3625                   = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3626                 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
3627                 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3628                 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3629                 data->REG_TEMP_SEL = NCT6106_REG_TEMP_SEL;
3630                 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3631                 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3632                 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3633                 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3634                 data->REG_ALARM = NCT6106_REG_ALARM;
3635                 data->ALARM_BITS = NCT6106_ALARM_BITS;
3636                 data->REG_BEEP = NCT6106_REG_BEEP;
3637                 data->BEEP_BITS = NCT6106_BEEP_BITS;
3638
3639                 reg_temp = NCT6106_REG_TEMP;
3640                 reg_temp_mon = NCT6106_REG_TEMP_MON;
3641                 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3642                 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON);
3643                 reg_temp_over = NCT6106_REG_TEMP_OVER;
3644                 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3645                 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3646                 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3647                 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3648                 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3649                 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3650
3651                 break;
3652         case nct6775:
3653                 data->in_num = 9;
3654                 data->pwm_num = 3;
3655                 data->auto_pwm_num = 6;
3656                 data->has_fan_div = true;
3657                 data->temp_fixed_num = 3;
3658                 data->num_temp_alarms = 3;
3659                 data->num_temp_beeps = 3;
3660
3661                 data->ALARM_BITS = NCT6775_ALARM_BITS;
3662                 data->BEEP_BITS = NCT6775_BEEP_BITS;
3663
3664                 data->fan_from_reg = fan_from_reg16;
3665                 data->fan_from_reg_min = fan_from_reg8;
3666                 data->target_temp_mask = 0x7f;
3667                 data->tolerance_mask = 0x0f;
3668                 data->speed_tolerance_limit = 15;
3669
3670                 data->temp_label = nct6775_temp_label;
3671                 data->temp_mask = NCT6775_TEMP_MASK;
3672
3673                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3674                 data->REG_VBAT = NCT6775_REG_VBAT;
3675                 data->REG_DIODE = NCT6775_REG_DIODE;
3676                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3677                 data->REG_VIN = NCT6775_REG_IN;
3678                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3679                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3680                 data->REG_TARGET = NCT6775_REG_TARGET;
3681                 data->REG_FAN = NCT6775_REG_FAN;
3682                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3683                 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3684                 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3685                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3686                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3687                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3688                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3689                 data->REG_PWM[0] = NCT6775_REG_PWM;
3690                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3691                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3692                 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3693                 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3694                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3695                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3696                 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3697                 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3698                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3699                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3700                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3701                 data->REG_CRITICAL_TEMP_TOLERANCE
3702                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3703                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3704                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3705                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3706                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3707                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3708                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3709                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3710                 data->REG_ALARM = NCT6775_REG_ALARM;
3711                 data->REG_BEEP = NCT6775_REG_BEEP;
3712
3713                 reg_temp = NCT6775_REG_TEMP;
3714                 reg_temp_mon = NCT6775_REG_TEMP_MON;
3715                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3716                 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3717                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3718                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3719                 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3720                 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3721                 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3722
3723                 break;
3724         case nct6776:
3725                 data->in_num = 9;
3726                 data->pwm_num = 3;
3727                 data->auto_pwm_num = 4;
3728                 data->has_fan_div = false;
3729                 data->temp_fixed_num = 3;
3730                 data->num_temp_alarms = 3;
3731                 data->num_temp_beeps = 6;
3732
3733                 data->ALARM_BITS = NCT6776_ALARM_BITS;
3734                 data->BEEP_BITS = NCT6776_BEEP_BITS;
3735
3736                 data->fan_from_reg = fan_from_reg13;
3737                 data->fan_from_reg_min = fan_from_reg13;
3738                 data->target_temp_mask = 0xff;
3739                 data->tolerance_mask = 0x07;
3740                 data->speed_tolerance_limit = 63;
3741
3742                 data->temp_label = nct6776_temp_label;
3743                 data->temp_mask = NCT6776_TEMP_MASK;
3744
3745                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3746                 data->REG_VBAT = NCT6775_REG_VBAT;
3747                 data->REG_DIODE = NCT6775_REG_DIODE;
3748                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3749                 data->REG_VIN = NCT6775_REG_IN;
3750                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3751                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3752                 data->REG_TARGET = NCT6775_REG_TARGET;
3753                 data->REG_FAN = NCT6775_REG_FAN;
3754                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3755                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3756                 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3757                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3758                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3759                 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3760                 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3761                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3762                 data->REG_PWM[0] = NCT6775_REG_PWM;
3763                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3764                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3765                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3766                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3767                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3768                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3769                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3770                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3771                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3772                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3773                 data->REG_CRITICAL_TEMP_TOLERANCE
3774                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3775                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3776                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3777                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3778                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3779                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3780                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3781                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3782                 data->REG_ALARM = NCT6775_REG_ALARM;
3783                 data->REG_BEEP = NCT6776_REG_BEEP;
3784
3785                 reg_temp = NCT6775_REG_TEMP;
3786                 reg_temp_mon = NCT6775_REG_TEMP_MON;
3787                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3788                 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3789                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3790                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3791                 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3792                 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3793                 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3794
3795                 break;
3796         case nct6779:
3797                 data->in_num = 15;
3798                 data->pwm_num = 5;
3799                 data->auto_pwm_num = 4;
3800                 data->has_fan_div = false;
3801                 data->temp_fixed_num = 6;
3802                 data->num_temp_alarms = 2;
3803                 data->num_temp_beeps = 2;
3804
3805                 data->ALARM_BITS = NCT6779_ALARM_BITS;
3806                 data->BEEP_BITS = NCT6779_BEEP_BITS;
3807
3808                 data->fan_from_reg = fan_from_reg13;
3809                 data->fan_from_reg_min = fan_from_reg13;
3810                 data->target_temp_mask = 0xff;
3811                 data->tolerance_mask = 0x07;
3812                 data->speed_tolerance_limit = 63;
3813
3814                 data->temp_label = nct6779_temp_label;
3815                 data->temp_mask = NCT6779_TEMP_MASK;
3816
3817                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3818                 data->REG_VBAT = NCT6775_REG_VBAT;
3819                 data->REG_DIODE = NCT6775_REG_DIODE;
3820                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3821                 data->REG_VIN = NCT6779_REG_IN;
3822                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3823                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3824                 data->REG_TARGET = NCT6775_REG_TARGET;
3825                 data->REG_FAN = NCT6779_REG_FAN;
3826                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3827                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3828                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3829                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3830                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3831                 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3832                 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3833                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3834                 data->REG_PWM[0] = NCT6775_REG_PWM;
3835                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3836                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3837                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3838                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3839                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3840                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3841                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3842                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3843                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3844                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3845                 data->REG_CRITICAL_TEMP_TOLERANCE
3846                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3847                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3848                 data->CRITICAL_PWM_ENABLE_MASK
3849                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3850                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3851                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3852                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3853                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3854                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3855                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3856                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3857                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3858                 data->REG_ALARM = NCT6779_REG_ALARM;
3859                 data->REG_BEEP = NCT6776_REG_BEEP;
3860
3861                 reg_temp = NCT6779_REG_TEMP;
3862                 reg_temp_mon = NCT6779_REG_TEMP_MON;
3863                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3864                 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3865                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3866                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3867                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3868                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3869                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3870
3871                 break;
3872         case nct6791:
3873         case nct6792:
3874         case nct6793:
3875         case nct6795:
3876                 data->in_num = 15;
3877                 data->pwm_num = 6;
3878                 data->auto_pwm_num = 4;
3879                 data->has_fan_div = false;
3880                 data->temp_fixed_num = 6;
3881                 data->num_temp_alarms = 2;
3882                 data->num_temp_beeps = 2;
3883
3884                 data->ALARM_BITS = NCT6791_ALARM_BITS;
3885                 data->BEEP_BITS = NCT6779_BEEP_BITS;
3886
3887                 data->fan_from_reg = fan_from_reg13;
3888                 data->fan_from_reg_min = fan_from_reg13;
3889                 data->target_temp_mask = 0xff;
3890                 data->tolerance_mask = 0x07;
3891                 data->speed_tolerance_limit = 63;
3892
3893                 switch (data->kind) {
3894                 default:
3895                 case nct6791:
3896                         data->temp_label = nct6779_temp_label;
3897                         data->temp_mask = NCT6791_TEMP_MASK;
3898                         break;
3899                 case nct6792:
3900                         data->temp_label = nct6792_temp_label;
3901                         data->temp_mask = NCT6792_TEMP_MASK;
3902                         break;
3903                 case nct6793:
3904                         data->temp_label = nct6793_temp_label;
3905                         data->temp_mask = NCT6793_TEMP_MASK;
3906                         break;
3907                 case nct6795:
3908                         data->temp_label = nct6795_temp_label;
3909                         data->temp_mask = NCT6795_TEMP_MASK;
3910                         break;
3911                 }
3912
3913                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3914                 data->REG_VBAT = NCT6775_REG_VBAT;
3915                 data->REG_DIODE = NCT6775_REG_DIODE;
3916                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3917                 data->REG_VIN = NCT6779_REG_IN;
3918                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3919                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3920                 data->REG_TARGET = NCT6775_REG_TARGET;
3921                 data->REG_FAN = NCT6779_REG_FAN;
3922                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3923                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3924                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3925                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3926                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3927                 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3928                 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3929                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3930                 data->REG_PWM[0] = NCT6775_REG_PWM;
3931                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3932                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3933                 data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP;
3934                 data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE;
3935                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3936                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3937                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3938                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3939                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3940                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3941                 data->REG_CRITICAL_TEMP_TOLERANCE
3942                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3943                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3944                 data->CRITICAL_PWM_ENABLE_MASK
3945                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3946                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3947                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3948                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3949                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3950                 data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL;
3951                 data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP;
3952                 data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL;
3953                 data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE;
3954                 data->REG_ALARM = NCT6791_REG_ALARM;
3955                 if (data->kind == nct6791)
3956                         data->REG_BEEP = NCT6776_REG_BEEP;
3957                 else
3958                         data->REG_BEEP = NCT6792_REG_BEEP;
3959
3960                 reg_temp = NCT6779_REG_TEMP;
3961                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3962                 if (data->kind == nct6791) {
3963                         reg_temp_mon = NCT6779_REG_TEMP_MON;
3964                         num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3965                 } else {
3966                         reg_temp_mon = NCT6792_REG_TEMP_MON;
3967                         num_reg_temp_mon = ARRAY_SIZE(NCT6792_REG_TEMP_MON);
3968                 }
3969                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3970                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3971                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3972                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3973                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3974
3975                 break;
3976         default:
3977                 return -ENODEV;
3978         }
3979         data->have_in = (1 << data->in_num) - 1;
3980         data->have_temp = 0;
3981
3982         /*
3983          * On some boards, not all available temperature sources are monitored,
3984          * even though some of the monitoring registers are unused.
3985          * Get list of unused monitoring registers, then detect if any fan
3986          * controls are configured to use unmonitored temperature sources.
3987          * If so, assign the unmonitored temperature sources to available
3988          * monitoring registers.
3989          */
3990         mask = 0;
3991         available = 0;
3992         for (i = 0; i < num_reg_temp; i++) {
3993                 if (reg_temp[i] == 0)
3994                         continue;
3995
3996                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3997                 if (!src || (mask & (1 << src)))
3998                         available |= 1 << i;
3999
4000                 mask |= 1 << src;
4001         }
4002
4003         /*
4004          * Now find unmonitored temperature registers and enable monitoring
4005          * if additional monitoring registers are available.
4006          */
4007         add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
4008         add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
4009
4010         mask = 0;
4011         s = NUM_TEMP_FIXED;     /* First dynamic temperature attribute */
4012         for (i = 0; i < num_reg_temp; i++) {
4013                 if (reg_temp[i] == 0)
4014                         continue;
4015
4016                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
4017                 if (!src || (mask & (1 << src)))
4018                         continue;
4019
4020                 if (!(data->temp_mask & BIT(src))) {
4021                         dev_info(dev,
4022                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
4023                                  src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
4024                         continue;
4025                 }
4026
4027                 mask |= 1 << src;
4028
4029                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
4030                 if (src <= data->temp_fixed_num) {
4031                         data->have_temp |= 1 << (src - 1);
4032                         data->have_temp_fixed |= 1 << (src - 1);
4033                         data->reg_temp[0][src - 1] = reg_temp[i];
4034                         data->reg_temp[1][src - 1] = reg_temp_over[i];
4035                         data->reg_temp[2][src - 1] = reg_temp_hyst[i];
4036                         if (reg_temp_crit_h && reg_temp_crit_h[i])
4037                                 data->reg_temp[3][src - 1] = reg_temp_crit_h[i];
4038                         else if (reg_temp_crit[src - 1])
4039                                 data->reg_temp[3][src - 1]
4040                                   = reg_temp_crit[src - 1];
4041                         if (reg_temp_crit_l && reg_temp_crit_l[i])
4042                                 data->reg_temp[4][src - 1] = reg_temp_crit_l[i];
4043                         data->reg_temp_config[src - 1] = reg_temp_config[i];
4044                         data->temp_src[src - 1] = src;
4045                         continue;
4046                 }
4047
4048                 if (s >= NUM_TEMP)
4049                         continue;
4050
4051                 /* Use dynamic index for other sources */
4052                 data->have_temp |= 1 << s;
4053                 data->reg_temp[0][s] = reg_temp[i];
4054                 data->reg_temp[1][s] = reg_temp_over[i];
4055                 data->reg_temp[2][s] = reg_temp_hyst[i];
4056                 data->reg_temp_config[s] = reg_temp_config[i];
4057                 if (reg_temp_crit_h && reg_temp_crit_h[i])
4058                         data->reg_temp[3][s] = reg_temp_crit_h[i];
4059                 else if (reg_temp_crit[src - 1])
4060                         data->reg_temp[3][s] = reg_temp_crit[src - 1];
4061                 if (reg_temp_crit_l && reg_temp_crit_l[i])
4062                         data->reg_temp[4][s] = reg_temp_crit_l[i];
4063
4064                 data->temp_src[s] = src;
4065                 s++;
4066         }
4067
4068         /*
4069          * Repeat with temperatures used for fan control.
4070          * This set of registers does not support limits.
4071          */
4072         for (i = 0; i < num_reg_temp_mon; i++) {
4073                 if (reg_temp_mon[i] == 0)
4074                         continue;
4075
4076                 src = nct6775_read_value(data, data->REG_TEMP_SEL[i]) & 0x1f;
4077                 if (!src)
4078                         continue;
4079
4080                 if (!(data->temp_mask & BIT(src))) {
4081                         dev_info(dev,
4082                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
4083                                  src, i, data->REG_TEMP_SEL[i],
4084                                  reg_temp_mon[i]);
4085                         continue;
4086                 }
4087
4088                 /*
4089                  * For virtual temperature sources, the 'virtual' temperature
4090                  * for each fan reflects a different temperature, and there
4091                  * are no duplicates.
4092                  */
4093                 if (src != TEMP_SOURCE_VIRTUAL) {
4094                         if (mask & (1 << src))
4095                                 continue;
4096                         mask |= 1 << src;
4097                 }
4098
4099                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
4100                 if (src <= data->temp_fixed_num) {
4101                         if (data->have_temp & (1 << (src - 1)))
4102                                 continue;
4103                         data->have_temp |= 1 << (src - 1);
4104                         data->have_temp_fixed |= 1 << (src - 1);
4105                         data->reg_temp[0][src - 1] = reg_temp_mon[i];
4106                         data->temp_src[src - 1] = src;
4107                         continue;
4108                 }
4109
4110                 if (s >= NUM_TEMP)
4111                         continue;
4112
4113                 /* Use dynamic index for other sources */
4114                 data->have_temp |= 1 << s;
4115                 data->reg_temp[0][s] = reg_temp_mon[i];
4116                 data->temp_src[s] = src;
4117                 s++;
4118         }
4119
4120 #ifdef USE_ALTERNATE
4121         /*
4122          * Go through the list of alternate temp registers and enable
4123          * if possible.
4124          * The temperature is already monitored if the respective bit in <mask>
4125          * is set.
4126          */
4127         for (i = 0; i < 32; i++) {
4128                 if (!(data->temp_mask & BIT(i)))
4129                         continue;
4130                 if (!reg_temp_alternate[i])
4131                         continue;
4132                 if (mask & (1 << (i + 1)))
4133                         continue;
4134                 if (i < data->temp_fixed_num) {
4135                         if (data->have_temp & (1 << i))
4136                                 continue;
4137                         data->have_temp |= 1 << i;
4138                         data->have_temp_fixed |= 1 << i;
4139                         data->reg_temp[0][i] = reg_temp_alternate[i];
4140                         if (i < num_reg_temp) {
4141                                 data->reg_temp[1][i] = reg_temp_over[i];
4142                                 data->reg_temp[2][i] = reg_temp_hyst[i];
4143                         }
4144                         data->temp_src[i] = i + 1;
4145                         continue;
4146                 }
4147
4148                 if (s >= NUM_TEMP)      /* Abort if no more space */
4149                         break;
4150
4151                 data->have_temp |= 1 << s;
4152                 data->reg_temp[0][s] = reg_temp_alternate[i];
4153                 data->temp_src[s] = i + 1;
4154                 s++;
4155         }
4156 #endif /* USE_ALTERNATE */
4157
4158         /* Initialize the chip */
4159         nct6775_init_device(data);
4160
4161         err = superio_enter(sio_data->sioreg);
4162         if (err)
4163                 return err;
4164
4165         cr2a = superio_inb(sio_data->sioreg, 0x2a);
4166         switch (data->kind) {
4167         case nct6775:
4168                 data->have_vid = (cr2a & 0x40);
4169                 break;
4170         case nct6776:
4171                 data->have_vid = (cr2a & 0x60) == 0x40;
4172                 break;
4173         case nct6106:
4174         case nct6779:
4175         case nct6791:
4176         case nct6792:
4177         case nct6793:
4178         case nct6795:
4179                 break;
4180         }
4181
4182         /*
4183          * Read VID value
4184          * We can get the VID input values directly at logical device D 0xe3.
4185          */
4186         if (data->have_vid) {
4187                 superio_select(sio_data->sioreg, NCT6775_LD_VID);
4188                 data->vid = superio_inb(sio_data->sioreg, 0xe3);
4189                 data->vrm = vid_which_vrm();
4190         }
4191
4192         if (fan_debounce) {
4193                 u8 tmp;
4194
4195                 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
4196                 tmp = superio_inb(sio_data->sioreg,
4197                                   NCT6775_REG_CR_FAN_DEBOUNCE);
4198                 switch (data->kind) {
4199                 case nct6106:
4200                         tmp |= 0xe0;
4201                         break;
4202                 case nct6775:
4203                         tmp |= 0x1e;
4204                         break;
4205                 case nct6776:
4206                 case nct6779:
4207                         tmp |= 0x3e;
4208                         break;
4209                 case nct6791:
4210                 case nct6792:
4211                 case nct6793:
4212                 case nct6795:
4213                         tmp |= 0x7e;
4214                         break;
4215                 }
4216                 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
4217                              tmp);
4218                 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
4219                          data->name);
4220         }
4221
4222         nct6775_check_fan_inputs(data);
4223
4224         superio_exit(sio_data->sioreg);
4225
4226         /* Read fan clock dividers immediately */
4227         nct6775_init_fan_common(dev, data);
4228
4229         /* Register sysfs hooks */
4230         group = nct6775_create_attr_group(dev, &nct6775_pwm_template_group,
4231                                           data->pwm_num);
4232         if (IS_ERR(group))
4233                 return PTR_ERR(group);
4234
4235         data->groups[num_attr_groups++] = group;
4236
4237         group = nct6775_create_attr_group(dev, &nct6775_in_template_group,
4238                                           fls(data->have_in));
4239         if (IS_ERR(group))
4240                 return PTR_ERR(group);
4241
4242         data->groups[num_attr_groups++] = group;
4243
4244         group = nct6775_create_attr_group(dev, &nct6775_fan_template_group,
4245                                           fls(data->has_fan));
4246         if (IS_ERR(group))
4247                 return PTR_ERR(group);
4248
4249         data->groups[num_attr_groups++] = group;
4250
4251         group = nct6775_create_attr_group(dev, &nct6775_temp_template_group,
4252                                           fls(data->have_temp));
4253         if (IS_ERR(group))
4254                 return PTR_ERR(group);
4255
4256         data->groups[num_attr_groups++] = group;
4257         data->groups[num_attr_groups++] = &nct6775_group_other;
4258
4259 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4260         err = sysfs_create_groups(&dev->kobj, data->groups);
4261         if (err < 0)
4262                 return err;
4263         hwmon_dev = hwmon_device_register(dev);
4264         if (IS_ERR(hwmon_dev)) {
4265                 sysfs_remove_groups(&dev->kobj, data->groups);
4266                 return PTR_ERR(hwmon_dev);
4267         }
4268         data->hwmon_dev = hwmon_dev;
4269 #else
4270         hwmon_dev = devm_hwmon_device_register_with_groups(dev, data->name,
4271                                                            data, data->groups);
4272 #endif
4273         return PTR_ERR_OR_ZERO(hwmon_dev);
4274 }
4275
4276 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4277 static int nct6775_remove(struct platform_device *pdev)
4278 {
4279         struct nct6775_data *data = platform_get_drvdata(pdev);
4280
4281         hwmon_device_unregister(data->hwmon_dev);
4282         sysfs_remove_groups(&pdev->dev.kobj, data->groups);
4283         return 0;
4284 }
4285 #endif
4286
4287 static void nct6791_enable_io_mapping(int sioaddr)
4288 {
4289         int val;
4290
4291         val = superio_inb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE);
4292         if (val & 0x10) {
4293                 pr_info("Enabling hardware monitor logical device mappings.\n");
4294                 superio_outb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE,
4295                              val & ~0x10);
4296         }
4297 }
4298
4299 static int __maybe_unused nct6775_suspend(struct device *dev)
4300 {
4301         struct nct6775_data *data = nct6775_update_device(dev);
4302
4303         mutex_lock(&data->update_lock);
4304         data->vbat = nct6775_read_value(data, data->REG_VBAT);
4305         if (data->kind == nct6775) {
4306                 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
4307                 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
4308         }
4309         mutex_unlock(&data->update_lock);
4310
4311         return 0;
4312 }
4313
4314 static int __maybe_unused nct6775_resume(struct device *dev)
4315 {
4316         struct nct6775_data *data = dev_get_drvdata(dev);
4317         int sioreg = data->sioreg;
4318         int i, j, err = 0;
4319         u8 reg;
4320
4321         mutex_lock(&data->update_lock);
4322         data->bank = 0xff;              /* Force initial bank selection */
4323
4324         err = superio_enter(sioreg);
4325         if (err)
4326                 goto abort;
4327
4328         superio_select(sioreg, NCT6775_LD_HWM);
4329         reg = superio_inb(sioreg, SIO_REG_ENABLE);
4330         if (reg != data->sio_reg_enable)
4331                 superio_outb(sioreg, SIO_REG_ENABLE, data->sio_reg_enable);
4332
4333         if (data->kind == nct6791 || data->kind == nct6792 ||
4334             data->kind == nct6793 || data->kind == nct6795)
4335                 nct6791_enable_io_mapping(sioreg);
4336
4337         superio_exit(sioreg);
4338
4339         /* Restore limits */
4340         for (i = 0; i < data->in_num; i++) {
4341                 if (!(data->have_in & (1 << i)))
4342                         continue;
4343
4344                 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
4345                                     data->in[i][1]);
4346                 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
4347                                     data->in[i][2]);
4348         }
4349
4350         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
4351                 if (!(data->has_fan_min & (1 << i)))
4352                         continue;
4353
4354                 nct6775_write_value(data, data->REG_FAN_MIN[i],
4355                                     data->fan_min[i]);
4356         }
4357
4358         for (i = 0; i < NUM_TEMP; i++) {
4359                 if (!(data->have_temp & (1 << i)))
4360                         continue;
4361
4362                 for (j = 1; j < ARRAY_SIZE(data->reg_temp); j++)
4363                         if (data->reg_temp[j][i])
4364                                 nct6775_write_temp(data, data->reg_temp[j][i],
4365                                                    data->temp[j][i]);
4366         }
4367
4368         /* Restore other settings */
4369         nct6775_write_value(data, data->REG_VBAT, data->vbat);
4370         if (data->kind == nct6775) {
4371                 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
4372                 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
4373         }
4374
4375 abort:
4376         /* Force re-reading all values */
4377         data->valid = false;
4378         mutex_unlock(&data->update_lock);
4379
4380         return err;
4381 }
4382
4383 static SIMPLE_DEV_PM_OPS(nct6775_dev_pm_ops, nct6775_suspend, nct6775_resume);
4384
4385 static struct platform_driver nct6775_driver = {
4386         .driver = {
4387                 .owner  = THIS_MODULE,
4388                 .name   = DRVNAME,
4389                 .pm     = &nct6775_dev_pm_ops,
4390         },
4391         .probe          = nct6775_probe,
4392 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4393         .remove         = nct6775_remove,
4394 #endif
4395 };
4396
4397 /* nct6775_find() looks for a '627 in the Super-I/O config space */
4398 static int __init nct6775_find(int sioaddr, struct nct6775_sio_data *sio_data)
4399 {
4400         u16 val;
4401         int err;
4402         int addr;
4403
4404         err = superio_enter(sioaddr);
4405         if (err)
4406                 return err;
4407
4408         val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8) |
4409                 superio_inb(sioaddr, SIO_REG_DEVID + 1);
4410         if (force_id && val != 0xffff)
4411                 val = force_id;
4412
4413         switch (val & SIO_ID_MASK) {
4414         case SIO_NCT6106_ID:
4415                 sio_data->kind = nct6106;
4416                 break;
4417         case SIO_NCT6775_ID:
4418                 sio_data->kind = nct6775;
4419                 break;
4420         case SIO_NCT6776_ID:
4421                 sio_data->kind = nct6776;
4422                 break;
4423         case SIO_NCT6779_ID:
4424                 sio_data->kind = nct6779;
4425                 break;
4426         case SIO_NCT6791_ID:
4427                 sio_data->kind = nct6791;
4428                 break;
4429         case SIO_NCT6792_ID:
4430                 sio_data->kind = nct6792;
4431                 break;
4432         case SIO_NCT6793_ID:
4433                 sio_data->kind = nct6793;
4434                 break;
4435         case SIO_NCT6795_ID:
4436                 sio_data->kind = nct6795;
4437                 break;
4438         default:
4439                 if (val != 0xffff)
4440                         pr_debug("unsupported chip ID: 0x%04x\n", val);
4441                 superio_exit(sioaddr);
4442                 return -ENODEV;
4443         }
4444
4445         /* We have a known chip, find the HWM I/O address */
4446         superio_select(sioaddr, NCT6775_LD_HWM);
4447         val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
4448             | superio_inb(sioaddr, SIO_REG_ADDR + 1);
4449         addr = val & IOREGION_ALIGNMENT;
4450         if (addr == 0) {
4451                 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
4452                 superio_exit(sioaddr);
4453                 return -ENODEV;
4454         }
4455
4456         /* Activate logical device if needed */
4457         val = superio_inb(sioaddr, SIO_REG_ENABLE);
4458         if (!(val & 0x01)) {
4459                 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
4460                 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
4461         }
4462
4463         if (sio_data->kind == nct6791 || sio_data->kind == nct6792 ||
4464             sio_data->kind == nct6793 || sio_data->kind == nct6795)
4465                 nct6791_enable_io_mapping(sioaddr);
4466
4467         superio_exit(sioaddr);
4468         pr_info("Found %s or compatible chip at %#x:%#x\n",
4469                 nct6775_sio_names[sio_data->kind], sioaddr, addr);
4470         sio_data->sioreg = sioaddr;
4471
4472         return addr;
4473 }
4474
4475 /*
4476  * when Super-I/O functions move to a separate file, the Super-I/O
4477  * bus will manage the lifetime of the device and this module will only keep
4478  * track of the nct6775 driver. But since we use platform_device_alloc(), we
4479  * must keep track of the device
4480  */
4481 static struct platform_device *pdev[2];
4482
4483 static int __init sensors_nct6775_init(void)
4484 {
4485         int i, err;
4486         bool found = false;
4487         int address;
4488         struct resource res;
4489         struct nct6775_sio_data sio_data;
4490         int sioaddr[2] = { 0x2e, 0x4e };
4491
4492         err = platform_driver_register(&nct6775_driver);
4493         if (err)
4494                 return err;
4495
4496         /*
4497          * initialize sio_data->kind and sio_data->sioreg.
4498          *
4499          * when Super-I/O functions move to a separate file, the Super-I/O
4500          * driver will probe 0x2e and 0x4e and auto-detect the presence of a
4501          * nct6775 hardware monitor, and call probe()
4502          */
4503         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4504                 address = nct6775_find(sioaddr[i], &sio_data);
4505                 if (address <= 0)
4506                         continue;
4507
4508                 found = true;
4509
4510                 pdev[i] = platform_device_alloc(DRVNAME, address);
4511                 if (!pdev[i]) {
4512                         err = -ENOMEM;
4513                         goto exit_device_unregister;
4514                 }
4515
4516                 err = platform_device_add_data(pdev[i], &sio_data,
4517                                                sizeof(struct nct6775_sio_data));
4518                 if (err)
4519                         goto exit_device_put;
4520
4521                 memset(&res, 0, sizeof(res));
4522                 res.name = DRVNAME;
4523                 res.start = address + IOREGION_OFFSET;
4524                 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
4525                 res.flags = IORESOURCE_IO;
4526
4527                 err = acpi_check_resource_conflict(&res);
4528                 if (err) {
4529                         platform_device_put(pdev[i]);
4530                         pdev[i] = NULL;
4531                         continue;
4532                 }
4533
4534                 err = platform_device_add_resources(pdev[i], &res, 1);
4535                 if (err)
4536                         goto exit_device_put;
4537
4538                 /* platform_device_add calls probe() */
4539                 err = platform_device_add(pdev[i]);
4540                 if (err)
4541                         goto exit_device_put;
4542         }
4543         if (!found) {
4544                 err = -ENODEV;
4545                 goto exit_unregister;
4546         }
4547
4548         return 0;
4549
4550 exit_device_put:
4551         platform_device_put(pdev[i]);
4552 exit_device_unregister:
4553         while (--i >= 0) {
4554                 if (pdev[i])
4555                         platform_device_unregister(pdev[i]);
4556         }
4557 exit_unregister:
4558         platform_driver_unregister(&nct6775_driver);
4559         return err;
4560 }
4561
4562 static void __exit sensors_nct6775_exit(void)
4563 {
4564         int i;
4565
4566         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4567                 if (pdev[i])
4568                         platform_device_unregister(pdev[i]);
4569         }
4570         platform_driver_unregister(&nct6775_driver);
4571 }
4572
4573 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4574 MODULE_DESCRIPTION("Driver for NCT6775F and compatible chips");
4575 MODULE_LICENSE("GPL");
4576
4577 module_init(sensors_nct6775_init);
4578 module_exit(sensors_nct6775_exit);