git.sur5r.net Git - groeck-nct6775/blob - nct6775.c

   1 /*
   2  * nct6775 - Driver for the hardware monitoring functionality of
   3  *             Nuvoton NCT677x Super-I/O chips
   4  *
   5  * Copyright (C) 2012  Guenter Roeck <linux@roeck-us.net>
   6  *
   7  * Derived from w83627ehf driver
   8  * Copyright (C) 2005-2012  Jean Delvare <jdelvare@suse.de>
   9  * Copyright (C) 2006  Yuan Mu (Winbond),
  10  *                     Rudolf Marek <r.marek@assembler.cz>
  11  *                     David Hubbard <david.c.hubbard@gmail.com>
  12  *                     Daniel J Blueman <daniel.blueman@gmail.com>
  13  * Copyright (C) 2010  Sheng-Yuan Huang (Nuvoton) (PS00)
  14  *
  15  * Shamelessly ripped from the w83627hf driver
  16  * Copyright (C) 2003  Mark Studebaker
  17  *
  18  * This program is free software; you can redistribute it and/or modify
  19  * it under the terms of the GNU General Public License as published by
  20  * the Free Software Foundation; either version 2 of the License, or
  21  * (at your option) any later version.
  22  *
  23  * This program is distributed in the hope that it will be useful,
  24  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26  * GNU General Public License for more details.
  27  *
  28  * You should have received a copy of the GNU General Public License
  29  * along with this program; if not, write to the Free Software
  30  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  31  *
  32  *
  33  * Supports the following chips:
  34  *
  35  * Chip        #vin    #fan    #pwm    #temp  chip IDs       man ID
  36  * nct6106d     9      3       3       6+3    0xc450 0xc1    0x5ca3
  37  * nct6775f     9      4       3       6+3    0xb470 0xc1    0x5ca3
  38  * nct6776f     9      5       3       6+3    0xc330 0xc1    0x5ca3
  39  * nct6779d    15      5       5       2+6    0xc560 0xc1    0x5ca3
  40  * nct6791d    15      6       6       2+6    0xc800 0xc1    0x5ca3
  41  * nct6792d    15      6       6       2+6    0xc910 0xc1    0x5ca3
  42  * nct6793d    15      6       6       2+6    0xd120 0xc1    0x5ca3
  43  * nct6795d    14      6       6       2+6    0xd350 0xc1    0x5ca3
  44  *
  45  * #temp lists the number of monitored temperature sources (first value) plus
  46  * the number of directly connectable temperature sensors (second value).
  47  */
  48
  49 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  50
  51 #include <linux/module.h>
  52 #include <linux/init.h>
  53 #include <linux/slab.h>
  54 #include <linux/jiffies.h>
  55 #include <linux/platform_device.h>
  56 #include <linux/hwmon.h>
  57 #include <linux/hwmon-sysfs.h>
  58 #include <linux/hwmon-vid.h>
  59 #include <linux/err.h>
  60 #include <linux/mutex.h>
  61 #include <linux/acpi.h>
  62 #include <linux/bitops.h>
  63 #include <linux/dmi.h>
  64 #include <linux/io.h>
  65 #include "lm75.h"
  66 #include "compat.h"
  67
  68 #define USE_ALTERNATE
  69
  70 enum kinds { nct6106, nct6775, nct6776, nct6779, nct6791, nct6792, nct6793,
  71              nct6795 };
  72
  73 /* used to set data->name = nct6775_device_names[data->sio_kind] */
  74 static const char * const nct6775_device_names[] = {
  75         "nct6106",
  76         "nct6775",
  77         "nct6776",
  78         "nct6779",
  79         "nct6791",
  80         "nct6792",
  81         "nct6793",
  82         "nct6795",
  83 };
  84
  85 static const char * const nct6775_sio_names[] __initconst = {
  86         "NCT6106D",
  87         "NCT6775F",
  88         "NCT6776D/F",
  89         "NCT6779D",
  90         "NCT6791D",
  91         "NCT6792D",
  92         "NCT6793D",
  93         "NCT6795D",
  94 };
  95
  96 static unsigned short force_id;
  97 module_param(force_id, ushort, 0);
  98 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  99
 100 static unsigned short fan_debounce;
 101 module_param(fan_debounce, ushort, 0);
 102 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
 103
 104 #define DRVNAME "nct6775"
 105
 106 /*
 107  * Super-I/O constants and functions
 108  */
 109
 110 #define NCT6775_LD_ACPI         0x0a
 111 #define NCT6775_LD_HWM          0x0b
 112 #define NCT6775_LD_VID          0x0d
 113 #define NCT6775_LD_12           0x12
 114
 115 #define SIO_REG_LDSEL           0x07    /* Logical device select */
 116 #define SIO_REG_DEVID           0x20    /* Device ID (2 bytes) */
 117 #define SIO_REG_ENABLE          0x30    /* Logical device enable */
 118 #define SIO_REG_ADDR            0x60    /* Logical device address (2 bytes) */
 119
 120 #define SIO_NCT6106_ID          0xc450
 121 #define SIO_NCT6775_ID          0xb470
 122 #define SIO_NCT6776_ID          0xc330
 123 #define SIO_NCT6779_ID          0xc560
 124 #define SIO_NCT6791_ID          0xc800
 125 #define SIO_NCT6792_ID          0xc910
 126 #define SIO_NCT6793_ID          0xd120
 127 #define SIO_NCT6795_ID          0xd350
 128 #define SIO_ID_MASK             0xFFF0
 129
 130 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
 131
 132 static inline void
 133 superio_outb(int ioreg, int reg, int val)
 134 {
 135         outb(reg, ioreg);
 136         outb(val, ioreg + 1);
 137 }
 138
 139 static inline int
 140 superio_inb(int ioreg, int reg)
 141 {
 142         outb(reg, ioreg);
 143         return inb(ioreg + 1);
 144 }
 145
 146 static inline void
 147 superio_select(int ioreg, int ld)
 148 {
 149         outb(SIO_REG_LDSEL, ioreg);
 150         outb(ld, ioreg + 1);
 151 }
 152
 153 static inline int
 154 superio_enter(int ioreg)
 155 {
 156         /*
 157          * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
 158          */
 159         if (!request_muxed_region(ioreg, 2, DRVNAME))
 160                 return -EBUSY;
 161
 162         outb(0x87, ioreg);
 163         outb(0x87, ioreg);
 164
 165         return 0;
 166 }
 167
 168 static inline void
 169 superio_exit(int ioreg)
 170 {
 171         outb(0xaa, ioreg);
 172         outb(0x02, ioreg);
 173         outb(0x02, ioreg + 1);
 174         release_region(ioreg, 2);
 175 }
 176
 177 /*
 178  * ISA constants
 179  */
 180
 181 #define IOREGION_ALIGNMENT      (~7)
 182 #define IOREGION_OFFSET         5
 183 #define IOREGION_LENGTH         2
 184 #define ADDR_REG_OFFSET         0
 185 #define DATA_REG_OFFSET         1
 186
 187 #define NCT6775_REG_BANK        0x4E
 188 #define NCT6775_REG_CONFIG      0x40
 189
 190 /*
 191  * Not currently used:
 192  * REG_MAN_ID has the value 0x5ca3 for all supported chips.
 193  * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
 194  * REG_MAN_ID is at port 0x4f
 195  * REG_CHIP_ID is at port 0x58
 196  */
 197
 198 #define NUM_TEMP        10      /* Max number of temp attribute sets w/ limits*/
 199 #define NUM_TEMP_FIXED  6       /* Max number of fixed temp attribute sets */
 200
 201 #define NUM_REG_ALARM   7       /* Max number of alarm registers */
 202 #define NUM_REG_BEEP    5       /* Max number of beep registers */
 203
 204 #define NUM_FAN         6
 205
 206 #define TEMP_SOURCE_VIRTUAL     0x1f
 207
 208 /* Common and NCT6775 specific data */
 209
 210 /* Voltage min/max registers for nr=7..14 are in bank 5 */
 211
 212 static const u16 NCT6775_REG_IN_MAX[] = {
 213         0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
 214         0x55c, 0x55e, 0x560, 0x562 };
 215 static const u16 NCT6775_REG_IN_MIN[] = {
 216         0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
 217         0x55d, 0x55f, 0x561, 0x563 };
 218 static const u16 NCT6775_REG_IN[] = {
 219         0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
 220 };
 221
 222 #define NCT6775_REG_VBAT                0x5D
 223 #define NCT6775_REG_DIODE               0x5E
 224 #define NCT6775_DIODE_MASK              0x02
 225
 226 #define NCT6775_REG_FANDIV1             0x506
 227 #define NCT6775_REG_FANDIV2             0x507
 228
 229 #define NCT6775_REG_CR_FAN_DEBOUNCE     0xf0
 230
 231 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
 232
 233 /* 0..15 voltages, 16..23 fans, 24..29 temperatures, 30..31 intrusion */
 234
 235 static const s8 NCT6775_ALARM_BITS[] = {
 236         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 237         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 238         -1,                             /* unused */
 239         6, 7, 11, -1, -1,               /* fan1..fan5 */
 240         -1, -1, -1,                     /* unused */
 241         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 242         12, -1 };                       /* intrusion0, intrusion1 */
 243
 244 #define FAN_ALARM_BASE          16
 245 #define TEMP_ALARM_BASE         24
 246 #define INTRUSION_ALARM_BASE    30
 247
 248 static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e };
 249
 250 /*
 251  * 0..14 voltages, 15 global beep enable, 16..23 fans, 24..29 temperatures,
 252  * 30..31 intrusion
 253  */
 254 static const s8 NCT6775_BEEP_BITS[] = {
 255         0, 1, 2, 3, 8, 9, 10, 16,       /* in0.. in7 */
 256         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 257         21,                             /* global beep enable */
 258         6, 7, 11, 28, -1,               /* fan1..fan5 */
 259         -1, -1, -1,                     /* unused */
 260         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 261         12, -1 };                       /* intrusion0, intrusion1 */
 262
 263 #define BEEP_ENABLE_BASE                15
 264
 265 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
 266 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
 267
 268 /* DC or PWM output fan configuration */
 269 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
 270 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
 271
 272 /* Advanced Fan control, some values are common for all fans */
 273
 274 static const u16 NCT6775_REG_TARGET[] = {
 275         0x101, 0x201, 0x301, 0x801, 0x901, 0xa01 };
 276 static const u16 NCT6775_REG_FAN_MODE[] = {
 277         0x102, 0x202, 0x302, 0x802, 0x902, 0xa02 };
 278 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
 279         0x103, 0x203, 0x303, 0x803, 0x903, 0xa03 };
 280 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
 281         0x104, 0x204, 0x304, 0x804, 0x904, 0xa04 };
 282 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
 283         0x105, 0x205, 0x305, 0x805, 0x905, 0xa05 };
 284 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = {
 285         0x106, 0x206, 0x306, 0x806, 0x906, 0xa06 };
 286 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
 287 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
 288
 289 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
 290         0x107, 0x207, 0x307, 0x807, 0x907, 0xa07 };
 291 static const u16 NCT6775_REG_PWM[] = {
 292         0x109, 0x209, 0x309, 0x809, 0x909, 0xa09 };
 293 static const u16 NCT6775_REG_PWM_READ[] = {
 294         0x01, 0x03, 0x11, 0x13, 0x15, 0xa09 };
 295
 296 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
 297 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
 298 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
 299 static const u16 NCT6775_FAN_PULSE_SHIFT[] = { 0, 0, 0, 0, 0, 0 };
 300
 301 static const u16 NCT6775_REG_TEMP[] = {
 302         0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
 303
 304 static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77 };
 305
 306 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 307         0, 0x152, 0x252, 0x628, 0x629, 0x62A };
 308 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 309         0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
 310 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 311         0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
 312
 313 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 314         0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
 315
 316 static const u16 NCT6775_REG_TEMP_SEL[] = {
 317         0x100, 0x200, 0x300, 0x800, 0x900, 0xa00 };
 318
 319 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
 320         0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 };
 321 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
 322         0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a };
 323 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
 324         0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b };
 325 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
 326         0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c };
 327 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
 328         0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d };
 329
 330 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
 331
 332 static const u16 NCT6775_REG_AUTO_TEMP[] = {
 333         0x121, 0x221, 0x321, 0x821, 0x921, 0xa21 };
 334 static const u16 NCT6775_REG_AUTO_PWM[] = {
 335         0x127, 0x227, 0x327, 0x827, 0x927, 0xa27 };
 336
 337 #define NCT6775_AUTO_TEMP(data, nr, p)  ((data)->REG_AUTO_TEMP[nr] + (p))
 338 #define NCT6775_AUTO_PWM(data, nr, p)   ((data)->REG_AUTO_PWM[nr] + (p))
 339
 340 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
 341
 342 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
 343         0x135, 0x235, 0x335, 0x835, 0x935, 0xa35 };
 344 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
 345         0x138, 0x238, 0x338, 0x838, 0x938, 0xa38 };
 346
 347 static const char *const nct6775_temp_label[] = {
 348         "",
 349         "SYSTIN",
 350         "CPUTIN",
 351         "AUXTIN",
 352         "AMD SB-TSI",
 353         "PECI Agent 0",
 354         "PECI Agent 1",
 355         "PECI Agent 2",
 356         "PECI Agent 3",
 357         "PECI Agent 4",
 358         "PECI Agent 5",
 359         "PECI Agent 6",
 360         "PECI Agent 7",
 361         "PCH_CHIP_CPU_MAX_TEMP",
 362         "PCH_CHIP_TEMP",
 363         "PCH_CPU_TEMP",
 364         "PCH_MCH_TEMP",
 365         "PCH_DIM0_TEMP",
 366         "PCH_DIM1_TEMP",
 367         "PCH_DIM2_TEMP",
 368         "PCH_DIM3_TEMP"
 369 };
 370
 371 #define NCT6775_TEMP_MASK       0x001ffffe
 372
 373 static const u16 NCT6775_REG_TEMP_ALTERNATE[32] = {
 374         [13] = 0x661,
 375         [14] = 0x662,
 376         [15] = 0x664,
 377 };
 378
 379 static const u16 NCT6775_REG_TEMP_CRIT[32] = {
 380         [4] = 0xa00,
 381         [5] = 0xa01,
 382         [6] = 0xa02,
 383         [7] = 0xa03,
 384         [8] = 0xa04,
 385         [9] = 0xa05,
 386         [10] = 0xa06,
 387         [11] = 0xa07
 388 };
 389
 390 /* NCT6776 specific data */
 391
 392 /* STEP_UP_TIME and STEP_DOWN_TIME regs are swapped for all chips but NCT6775 */
 393 #define NCT6776_REG_FAN_STEP_UP_TIME NCT6775_REG_FAN_STEP_DOWN_TIME
 394 #define NCT6776_REG_FAN_STEP_DOWN_TIME NCT6775_REG_FAN_STEP_UP_TIME
 395
 396 static const s8 NCT6776_ALARM_BITS[] = {
 397         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 398         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 399         -1,                             /* unused */
 400         6, 7, 11, 10, 23,               /* fan1..fan5 */
 401         -1, -1, -1,                     /* unused */
 402         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 403         12, 9 };                        /* intrusion0, intrusion1 */
 404
 405 static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5 };
 406
 407 static const s8 NCT6776_BEEP_BITS[] = {
 408         0, 1, 2, 3, 4, 5, 6, 7,         /* in0.. in7 */
 409         8, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 410         24,                             /* global beep enable */
 411         25, 26, 27, 28, 29,             /* fan1..fan5 */
 412         -1, -1, -1,                     /* unused */
 413         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 414         30, 31 };                       /* intrusion0, intrusion1 */
 415
 416 static const u16 NCT6776_REG_TOLERANCE_H[] = {
 417         0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c };
 418
 419 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0 };
 420 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0 };
 421
 422 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
 423 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
 424
 425 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
 426         0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e };
 427
 428 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 429         0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
 430
 431 static const char *const nct6776_temp_label[] = {
 432         "",
 433         "SYSTIN",
 434         "CPUTIN",
 435         "AUXTIN",
 436         "SMBUSMASTER 0",
 437         "SMBUSMASTER 1",
 438         "SMBUSMASTER 2",
 439         "SMBUSMASTER 3",
 440         "SMBUSMASTER 4",
 441         "SMBUSMASTER 5",
 442         "SMBUSMASTER 6",
 443         "SMBUSMASTER 7",
 444         "PECI Agent 0",
 445         "PECI Agent 1",
 446         "PCH_CHIP_CPU_MAX_TEMP",
 447         "PCH_CHIP_TEMP",
 448         "PCH_CPU_TEMP",
 449         "PCH_MCH_TEMP",
 450         "PCH_DIM0_TEMP",
 451         "PCH_DIM1_TEMP",
 452         "PCH_DIM2_TEMP",
 453         "PCH_DIM3_TEMP",
 454         "BYTE_TEMP"
 455 };
 456
 457 #define NCT6776_TEMP_MASK       0x007ffffe
 458
 459 static const u16 NCT6776_REG_TEMP_ALTERNATE[32] = {
 460         [14] = 0x401,
 461         [15] = 0x402,
 462         [16] = 0x404,
 463 };
 464
 465 static const u16 NCT6776_REG_TEMP_CRIT[32] = {
 466         [11] = 0x709,
 467         [12] = 0x70a,
 468 };
 469
 470 /* NCT6779 specific data */
 471
 472 static const u16 NCT6779_REG_IN[] = {
 473         0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
 474         0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
 475
 476 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
 477         0x459, 0x45A, 0x45B, 0x568 };
 478
 479 static const s8 NCT6779_ALARM_BITS[] = {
 480         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 481         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 482         -1,                             /* unused */
 483         6, 7, 11, 10, 23,               /* fan1..fan5 */
 484         -1, -1, -1,                     /* unused */
 485         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 486         12, 9 };                        /* intrusion0, intrusion1 */
 487
 488 static const s8 NCT6779_BEEP_BITS[] = {
 489         0, 1, 2, 3, 4, 5, 6, 7,         /* in0.. in7 */
 490         8, 9, 10, 11, 12, 13, 14,       /* in8..in14 */
 491         24,                             /* global beep enable */
 492         25, 26, 27, 28, 29,             /* fan1..fan5 */
 493         -1, -1, -1,                     /* unused */
 494         16, 17, -1, -1, -1, -1,         /* temp1..temp6 */
 495         30, 31 };                       /* intrusion0, intrusion1 */
 496
 497 static const u16 NCT6779_REG_FAN[] = {
 498         0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8, 0x4ba };
 499 static const u16 NCT6779_REG_FAN_PULSES[] = {
 500         0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
 501
 502 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
 503         0x136, 0x236, 0x336, 0x836, 0x936, 0xa36 };
 504 #define NCT6779_CRITICAL_PWM_ENABLE_MASK        0x01
 505 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
 506         0x137, 0x237, 0x337, 0x837, 0x937, 0xa37 };
 507
 508 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
 509 static const u16 NCT6779_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b };
 510 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 511         0x18, 0x152 };
 512 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 513         0x3a, 0x153 };
 514 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 515         0x39, 0x155 };
 516
 517 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
 518         0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
 519
 520 static const char *const nct6779_temp_label[] = {
 521         "",
 522         "SYSTIN",
 523         "CPUTIN",
 524         "AUXTIN0",
 525         "AUXTIN1",
 526         "AUXTIN2",
 527         "AUXTIN3",
 528         "",
 529         "SMBUSMASTER 0",
 530         "SMBUSMASTER 1",
 531         "SMBUSMASTER 2",
 532         "SMBUSMASTER 3",
 533         "SMBUSMASTER 4",
 534         "SMBUSMASTER 5",
 535         "SMBUSMASTER 6",
 536         "SMBUSMASTER 7",
 537         "PECI Agent 0",
 538         "PECI Agent 1",
 539         "PCH_CHIP_CPU_MAX_TEMP",
 540         "PCH_CHIP_TEMP",
 541         "PCH_CPU_TEMP",
 542         "PCH_MCH_TEMP",
 543         "PCH_DIM0_TEMP",
 544         "PCH_DIM1_TEMP",
 545         "PCH_DIM2_TEMP",
 546         "PCH_DIM3_TEMP",
 547         "BYTE_TEMP",
 548         "",
 549         "",
 550         "",
 551         "",
 552         "Virtual_TEMP"
 553 };
 554
 555 #define NCT6779_TEMP_MASK       0x07ffff7e
 556 #define NCT6791_TEMP_MASK       0x87ffff7e
 557
 558 static const u16 NCT6779_REG_TEMP_ALTERNATE[32]
 559         = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
 560             0, 0, 0, 0, 0, 0, 0, 0,
 561             0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
 562             0x408, 0 };
 563
 564 static const u16 NCT6779_REG_TEMP_CRIT[32] = {
 565         [15] = 0x709,
 566         [16] = 0x70a,
 567 };
 568
 569 /* NCT6791 specific data */
 570
 571 #define NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE     0x28
 572
 573 static const u16 NCT6791_REG_WEIGHT_TEMP_SEL[6] = { 0, 0x239 };
 574 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP[6] = { 0, 0x23a };
 575 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP_TOL[6] = { 0, 0x23b };
 576 static const u16 NCT6791_REG_WEIGHT_DUTY_STEP[6] = { 0, 0x23c };
 577 static const u16 NCT6791_REG_WEIGHT_TEMP_BASE[6] = { 0, 0x23d };
 578 static const u16 NCT6791_REG_WEIGHT_DUTY_BASE[6] = { 0, 0x23e };
 579
 580 static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = {
 581         0x459, 0x45A, 0x45B, 0x568, 0x45D };
 582
 583 static const s8 NCT6791_ALARM_BITS[] = {
 584         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 585         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 586         -1,                             /* unused */
 587         6, 7, 11, 10, 23, 33,           /* fan1..fan6 */
 588         -1, -1,                         /* unused */
 589         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 590         12, 9 };                        /* intrusion0, intrusion1 */
 591
 592 /* NCT6792/NCT6793 specific data */
 593
 594 static const u16 NCT6792_REG_TEMP_MON[] = {
 595         0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d };
 596 static const u16 NCT6792_REG_BEEP[NUM_REG_BEEP] = {
 597         0xb2, 0xb3, 0xb4, 0xb5, 0xbf };
 598
 599 static const char *const nct6792_temp_label[] = {
 600         "",
 601         "SYSTIN",
 602         "CPUTIN",
 603         "AUXTIN0",
 604         "AUXTIN1",
 605         "AUXTIN2",
 606         "AUXTIN3",
 607         "",
 608         "SMBUSMASTER 0",
 609         "SMBUSMASTER 1",
 610         "SMBUSMASTER 2",
 611         "SMBUSMASTER 3",
 612         "SMBUSMASTER 4",
 613         "SMBUSMASTER 5",
 614         "SMBUSMASTER 6",
 615         "SMBUSMASTER 7",
 616         "PECI Agent 0",
 617         "PECI Agent 1",
 618         "PCH_CHIP_CPU_MAX_TEMP",
 619         "PCH_CHIP_TEMP",
 620         "PCH_CPU_TEMP",
 621         "PCH_MCH_TEMP",
 622         "PCH_DIM0_TEMP",
 623         "PCH_DIM1_TEMP",
 624         "PCH_DIM2_TEMP",
 625         "PCH_DIM3_TEMP",
 626         "BYTE_TEMP",
 627         "PECI Agent 0 Calibration",
 628         "PECI Agent 1 Calibration",
 629         "",
 630         "",
 631         "Virtual_TEMP"
 632 };
 633
 634 #define NCT6792_TEMP_MASK       0x9fffff7e
 635
 636 static const char *const nct6793_temp_label[] = {
 637         "",
 638         "SYSTIN",
 639         "CPUTIN",
 640         "AUXTIN0",
 641         "AUXTIN1",
 642         "AUXTIN2",
 643         "AUXTIN3",
 644         "",
 645         "SMBUSMASTER 0",
 646         "SMBUSMASTER 1",
 647         "",
 648         "",
 649         "",
 650         "",
 651         "",
 652         "",
 653         "PECI Agent 0",
 654         "PECI Agent 1",
 655         "PCH_CHIP_CPU_MAX_TEMP",
 656         "PCH_CHIP_TEMP",
 657         "PCH_CPU_TEMP",
 658         "PCH_MCH_TEMP",
 659         "Agent0 Dimm0 ",
 660         "Agent0 Dimm1",
 661         "Agent1 Dimm0",
 662         "Agent1 Dimm1",
 663         "BYTE_TEMP0",
 664         "BYTE_TEMP1",
 665         "PECI Agent 0 Calibration",
 666         "PECI Agent 1 Calibration",
 667         "",
 668         "Virtual_TEMP"
 669 };
 670
 671 #define NCT6793_TEMP_MASK       0xbfff037e
 672
 673 static const char *const nct6795_temp_label[] = {
 674         "",
 675         "SYSTIN",
 676         "CPUTIN",
 677         "AUXTIN0",
 678         "AUXTIN1",
 679         "AUXTIN2",
 680         "AUXTIN3",
 681         "",
 682         "SMBUSMASTER 0",
 683         "SMBUSMASTER 1",
 684         "SMBUSMASTER 2",
 685         "SMBUSMASTER 3",
 686         "SMBUSMASTER 4",
 687         "SMBUSMASTER 5",
 688         "SMBUSMASTER 6",
 689         "SMBUSMASTER 7",
 690         "PECI Agent 0",
 691         "PECI Agent 1",
 692         "PCH_CHIP_CPU_MAX_TEMP",
 693         "PCH_CHIP_TEMP",
 694         "PCH_CPU_TEMP",
 695         "PCH_MCH_TEMP",
 696         "PCH_DIM0_TEMP",
 697         "PCH_DIM1_TEMP",
 698         "PCH_DIM2_TEMP",
 699         "PCH_DIM3_TEMP",
 700         "BYTE_TEMP0",
 701         "BYTE_TEMP1",
 702         "PECI Agent 0 Calibration",
 703         "PECI Agent 1 Calibration",
 704         "",
 705         "Virtual_TEMP"
 706 };
 707
 708 #define NCT6795_TEMP_MASK       0xbfffff7e
 709
 710 /* NCT6102D/NCT6106D specific data */
 711
 712 #define NCT6106_REG_VBAT        0x318
 713 #define NCT6106_REG_DIODE       0x319
 714 #define NCT6106_DIODE_MASK      0x01
 715
 716 static const u16 NCT6106_REG_IN_MAX[] = {
 717         0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
 718 static const u16 NCT6106_REG_IN_MIN[] = {
 719         0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
 720 static const u16 NCT6106_REG_IN[] = {
 721         0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
 722
 723 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
 724 static const u16 NCT6106_REG_TEMP_MON[] = { 0x18, 0x19, 0x1a };
 725 static const u16 NCT6106_REG_TEMP_HYST[] = {
 726         0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
 727 static const u16 NCT6106_REG_TEMP_OVER[] = {
 728         0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
 729 static const u16 NCT6106_REG_TEMP_CRIT_L[] = {
 730         0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
 731 static const u16 NCT6106_REG_TEMP_CRIT_H[] = {
 732         0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
 733 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
 734 static const u16 NCT6106_REG_TEMP_CONFIG[] = {
 735         0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
 736
 737 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
 738 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
 739 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0, 0 };
 740 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4, 0, 0 };
 741
 742 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
 743 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
 744 static const u16 NCT6106_REG_PWM[] = { 0x119, 0x129, 0x139 };
 745 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c };
 746 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
 747 static const u16 NCT6106_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130 };
 748 static const u16 NCT6106_REG_TEMP_SOURCE[] = {
 749         0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
 750
 751 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
 752 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = {
 753         0x11b, 0x12b, 0x13b };
 754
 755 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
 756 #define NCT6106_CRITICAL_PWM_ENABLE_MASK        0x10
 757 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
 758
 759 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
 760 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
 761 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
 762 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
 763 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
 764 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
 765
 766 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
 767
 768 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
 769 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
 770 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
 771 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x17c };
 772 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
 773 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
 774
 775 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
 776 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
 777
 778 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = {
 779         0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
 780
 781 static const s8 NCT6106_ALARM_BITS[] = {
 782         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 783         9, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 784         -1,                             /* unused */
 785         32, 33, 34, -1, -1,             /* fan1..fan5 */
 786         -1, -1, -1,                     /* unused */
 787         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 788         48, -1                          /* intrusion0, intrusion1 */
 789 };
 790
 791 static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = {
 792         0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 };
 793
 794 static const s8 NCT6106_BEEP_BITS[] = {
 795         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 796         9, 10, 11, 12, -1, -1, -1,      /* in8..in14 */
 797         32,                             /* global beep enable */
 798         24, 25, 26, 27, 28,             /* fan1..fan5 */
 799         -1, -1, -1,                     /* unused */
 800         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 801         34, -1                          /* intrusion0, intrusion1 */
 802 };
 803
 804 static const u16 NCT6106_REG_TEMP_ALTERNATE[32] = {
 805         [14] = 0x51,
 806         [15] = 0x52,
 807         [16] = 0x54,
 808 };
 809
 810 static const u16 NCT6106_REG_TEMP_CRIT[32] = {
 811         [11] = 0x204,
 812         [12] = 0x205,
 813 };
 814
 815 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
 816 {
 817         if (mode == 0 && pwm == 255)
 818                 return off;
 819         return mode + 1;
 820 }
 821
 822 static int pwm_enable_to_reg(enum pwm_enable mode)
 823 {
 824         if (mode == off)
 825                 return 0;
 826         return mode - 1;
 827 }
 828
 829 /*
 830  * Conversions
 831  */
 832
 833 /* 1 is DC mode, output in ms */
 834 static unsigned int step_time_from_reg(u8 reg, u8 mode)
 835 {
 836         return mode ? 400 * reg : 100 * reg;
 837 }
 838
 839 static u8 step_time_to_reg(unsigned int msec, u8 mode)
 840 {
 841         return clamp_val((mode ? (msec + 200) / 400 :
 842                                         (msec + 50) / 100), 1, 255);
 843 }
 844
 845 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
 846 {
 847         if (reg == 0 || reg == 255)
 848                 return 0;
 849         return 1350000U / (reg << divreg);
 850 }
 851
 852 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
 853 {
 854         if ((reg & 0xff1f) == 0xff1f)
 855                 return 0;
 856
 857         reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
 858
 859         if (reg == 0)
 860                 return 0;
 861
 862         return 1350000U / reg;
 863 }
 864
 865 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
 866 {
 867         if (reg == 0 || reg == 0xffff)
 868                 return 0;
 869
 870         /*
 871          * Even though the registers are 16 bit wide, the fan divisor
 872          * still applies.
 873          */
 874         return 1350000U / (reg << divreg);
 875 }
 876
 877 static u16 fan_to_reg(u32 fan, unsigned int divreg)
 878 {
 879         if (!fan)
 880                 return 0;
 881
 882         return (1350000U / fan) >> divreg;
 883 }
 884
 885 static inline unsigned int
 886 div_from_reg(u8 reg)
 887 {
 888         return BIT(reg);
 889 }
 890
 891 /*
 892  * Some of the voltage inputs have internal scaling, the tables below
 893  * contain 8 (the ADC LSB in mV) * scaling factor * 100
 894  */
 895 static const u16 scale_in[15] = {
 896         800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
 897         800, 800
 898 };
 899
 900 static inline long in_from_reg(u8 reg, u8 nr)
 901 {
 902         return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
 903 }
 904
 905 static inline u8 in_to_reg(u32 val, u8 nr)
 906 {
 907         return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
 908 }
 909
 910 /*
 911  * Data structures and manipulation thereof
 912  */
 913
 914 struct nct6775_data {
 915         int addr;       /* IO base of hw monitor block */
 916         int sioreg;     /* SIO register address */
 917         enum kinds kind;
 918         const char *name;
 919
 920 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
 921         struct device *hwmon_dev;
 922 #endif
 923
 924         const struct attribute_group *groups[6];
 925
 926         u16 reg_temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 927                                     * 3=temp_crit, 4=temp_lcrit
 928                                     */
 929         u8 temp_src[NUM_TEMP];
 930         u16 reg_temp_config[NUM_TEMP];
 931         const char * const *temp_label;
 932         u32 temp_mask;
 933
 934         u16 REG_CONFIG;
 935         u16 REG_VBAT;
 936         u16 REG_DIODE;
 937         u8 DIODE_MASK;
 938
 939         const s8 *ALARM_BITS;
 940         const s8 *BEEP_BITS;
 941
 942         const u16 *REG_VIN;
 943         const u16 *REG_IN_MINMAX[2];
 944
 945         const u16 *REG_TARGET;
 946         const u16 *REG_FAN;
 947         const u16 *REG_FAN_MODE;
 948         const u16 *REG_FAN_MIN;
 949         const u16 *REG_FAN_PULSES;
 950         const u16 *FAN_PULSE_SHIFT;
 951         const u16 *REG_FAN_TIME[3];
 952
 953         const u16 *REG_TOLERANCE_H;
 954
 955         const u8 *REG_PWM_MODE;
 956         const u8 *PWM_MODE_MASK;
 957
 958         const u16 *REG_PWM[7];  /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 959                                  * [3]=pwm_max, [4]=pwm_step,
 960                                  * [5]=weight_duty_step, [6]=weight_duty_base
 961                                  */
 962         const u16 *REG_PWM_READ;
 963
 964         const u16 *REG_CRITICAL_PWM_ENABLE;
 965         u8 CRITICAL_PWM_ENABLE_MASK;
 966         const u16 *REG_CRITICAL_PWM;
 967
 968         const u16 *REG_AUTO_TEMP;
 969         const u16 *REG_AUTO_PWM;
 970
 971         const u16 *REG_CRITICAL_TEMP;
 972         const u16 *REG_CRITICAL_TEMP_TOLERANCE;
 973
 974         const u16 *REG_TEMP_SOURCE;     /* temp register sources */
 975         const u16 *REG_TEMP_SEL;
 976         const u16 *REG_WEIGHT_TEMP_SEL;
 977         const u16 *REG_WEIGHT_TEMP[3];  /* 0=base, 1=tolerance, 2=step */
 978
 979         const u16 *REG_TEMP_OFFSET;
 980
 981         const u16 *REG_ALARM;
 982         const u16 *REG_BEEP;
 983
 984         unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
 985         unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
 986
 987         struct mutex update_lock;
 988         bool valid;             /* true if following fields are valid */
 989         unsigned long last_updated;     /* In jiffies */
 990
 991         /* Register values */
 992         u8 bank;                /* current register bank */
 993         u8 in_num;              /* number of in inputs we have */
 994         u8 in[15][3];           /* [0]=in, [1]=in_max, [2]=in_min */
 995         unsigned int rpm[NUM_FAN];
 996         u16 fan_min[NUM_FAN];
 997         u8 fan_pulses[NUM_FAN];
 998         u8 fan_div[NUM_FAN];
 999         u8 has_pwm;
1000         u8 has_fan;             /* some fan inputs can be disabled */
1001         u8 has_fan_min;         /* some fans don't have min register */
1002         bool has_fan_div;
1003
1004         u8 num_temp_alarms;     /* 2, 3, or 6 */
1005         u8 num_temp_beeps;      /* 2, 3, or 6 */
1006         u8 temp_fixed_num;      /* 3 or 6 */
1007         u8 temp_type[NUM_TEMP_FIXED];
1008         s8 temp_offset[NUM_TEMP_FIXED];
1009         s16 temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
1010                                 * 3=temp_crit, 4=temp_lcrit */
1011         u64 alarms;
1012         u64 beeps;
1013
1014         u8 pwm_num;     /* number of pwm */
1015         u8 pwm_mode[NUM_FAN];   /* 1->DC variable voltage,
1016                                  * 0->PWM variable duty cycle
1017                                  */
1018         enum pwm_enable pwm_enable[NUM_FAN];
1019                         /* 0->off
1020                          * 1->manual
1021                          * 2->thermal cruise mode (also called SmartFan I)
1022                          * 3->fan speed cruise mode
1023                          * 4->SmartFan III
1024                          * 5->enhanced variable thermal cruise (SmartFan IV)
1025                          */
1026         u8 pwm[7][NUM_FAN];     /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
1027                                  * [3]=pwm_max, [4]=pwm_step,
1028                                  * [5]=weight_duty_step, [6]=weight_duty_base
1029                                  */
1030
1031         u8 target_temp[NUM_FAN];
1032         u8 target_temp_mask;
1033         u32 target_speed[NUM_FAN];
1034         u32 target_speed_tolerance[NUM_FAN];
1035         u8 speed_tolerance_limit;
1036
1037         u8 temp_tolerance[2][NUM_FAN];
1038         u8 tolerance_mask;
1039
1040         u8 fan_time[3][NUM_FAN]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
1041
1042         /* Automatic fan speed control registers */
1043         int auto_pwm_num;
1044         u8 auto_pwm[NUM_FAN][7];
1045         u8 auto_temp[NUM_FAN][7];
1046         u8 pwm_temp_sel[NUM_FAN];
1047         u8 pwm_weight_temp_sel[NUM_FAN];
1048         u8 weight_temp[3][NUM_FAN];     /* 0->temp_step, 1->temp_step_tol,
1049                                          * 2->temp_base
1050                                          */
1051
1052         u8 vid;
1053         u8 vrm;
1054
1055         bool have_vid;
1056
1057         u16 have_temp;
1058         u16 have_temp_fixed;
1059         u16 have_in;
1060
1061         /* Remember extra register values over suspend/resume */
1062         u8 vbat;
1063         u8 fandiv1;
1064         u8 fandiv2;
1065         u8 sio_reg_enable;
1066 };
1067
1068 struct nct6775_sio_data {
1069         int sioreg;
1070         enum kinds kind;
1071 };
1072
1073 struct sensor_device_template {
1074         struct device_attribute dev_attr;
1075         union {
1076                 struct {
1077                         u8 nr;
1078                         u8 index;
1079                 } s;
1080                 int index;
1081         } u;
1082         bool s2;        /* true if both index and nr are used */
1083 };
1084
1085 struct sensor_device_attr_u {
1086         union {
1087                 struct sensor_device_attribute a1;
1088                 struct sensor_device_attribute_2 a2;
1089         } u;
1090         char name[32];
1091 };
1092
1093 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) {      \
1094         .attr = {.name = _template, .mode = _mode },            \
1095         .show   = _show,                                        \
1096         .store  = _store,                                       \
1097 }
1098
1099 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \
1100         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
1101           .u.index = _index,                                            \
1102           .s2 = false }
1103
1104 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,       \
1105                                  _nr, _index)                           \
1106         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
1107           .u.s.index = _index,                                          \
1108           .u.s.nr = _nr,                                                \
1109           .s2 = true }
1110
1111 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
1112 static struct sensor_device_template sensor_dev_template_##_name        \
1113         = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store,       \
1114                                  _index)
1115
1116 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store,       \
1117                           _nr, _index)                                  \
1118 static struct sensor_device_template sensor_dev_template_##_name        \
1119         = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,     \
1120                                  _nr, _index)
1121
1122 struct sensor_template_group {
1123         struct sensor_device_template **templates;
1124         umode_t (*is_visible)(struct kobject *, struct attribute *, int);
1125         int base;
1126 };
1127
1128 static struct attribute_group *
1129 nct6775_create_attr_group(struct device *dev,
1130                           const struct sensor_template_group *tg,
1131                           int repeat)
1132 {
1133         struct attribute_group *group;
1134         struct sensor_device_attr_u *su;
1135         struct sensor_device_attribute *a;
1136         struct sensor_device_attribute_2 *a2;
1137         struct attribute **attrs;
1138         struct sensor_device_template **t;
1139         int i, count;
1140
1141         if (repeat <= 0)
1142                 return ERR_PTR(-EINVAL);
1143
1144         t = tg->templates;
1145         for (count = 0; *t; t++, count++)
1146                 ;
1147
1148         if (count == 0)
1149                 return ERR_PTR(-EINVAL);
1150
1151         group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
1152         if (group == NULL)
1153                 return ERR_PTR(-ENOMEM);
1154
1155         attrs = devm_kzalloc(dev, sizeof(*attrs) * (repeat * count + 1),
1156                              GFP_KERNEL);
1157         if (attrs == NULL)
1158                 return ERR_PTR(-ENOMEM);
1159
1160         su = devm_kzalloc(dev, sizeof(*su) * repeat * count,
1161                                GFP_KERNEL);
1162         if (su == NULL)
1163                 return ERR_PTR(-ENOMEM);
1164
1165         group->attrs = attrs;
1166         group->is_visible = tg->is_visible;
1167
1168         for (i = 0; i < repeat; i++) {
1169                 t = tg->templates;
1170                 while (*t != NULL) {
1171                         snprintf(su->name, sizeof(su->name),
1172                                  (*t)->dev_attr.attr.name, tg->base + i);
1173                         if ((*t)->s2) {
1174                                 a2 = &su->u.a2;
1175                                 sysfs_attr_init(&a2->dev_attr.attr);
1176                                 a2->dev_attr.attr.name = su->name;
1177                                 a2->nr = (*t)->u.s.nr + i;
1178                                 a2->index = (*t)->u.s.index;
1179                                 a2->dev_attr.attr.mode =
1180                                   (*t)->dev_attr.attr.mode;
1181                                 a2->dev_attr.show = (*t)->dev_attr.show;
1182                                 a2->dev_attr.store = (*t)->dev_attr.store;
1183                                 *attrs = &a2->dev_attr.attr;
1184                         } else {
1185                                 a = &su->u.a1;
1186                                 sysfs_attr_init(&a->dev_attr.attr);
1187                                 a->dev_attr.attr.name = su->name;
1188                                 a->index = (*t)->u.index + i;
1189                                 a->dev_attr.attr.mode =
1190                                   (*t)->dev_attr.attr.mode;
1191                                 a->dev_attr.show = (*t)->dev_attr.show;
1192                                 a->dev_attr.store = (*t)->dev_attr.store;
1193                                 *attrs = &a->dev_attr.attr;
1194                         }
1195                         attrs++;
1196                         su++;
1197                         t++;
1198                 }
1199         }
1200
1201         return group;
1202 }
1203
1204 static bool is_word_sized(struct nct6775_data *data, u16 reg)
1205 {
1206         switch (data->kind) {
1207         case nct6106:
1208                 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1209                   reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
1210                   reg == 0x111 || reg == 0x121 || reg == 0x131;
1211         case nct6775:
1212                 return (((reg & 0xff00) == 0x100 ||
1213                     (reg & 0xff00) == 0x200) &&
1214                    ((reg & 0x00ff) == 0x50 ||
1215                     (reg & 0x00ff) == 0x53 ||
1216                     (reg & 0x00ff) == 0x55)) ||
1217                   (reg & 0xfff0) == 0x630 ||
1218                   reg == 0x640 || reg == 0x642 ||
1219                   reg == 0x662 ||
1220                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1221                   reg == 0x73 || reg == 0x75 || reg == 0x77;
1222         case nct6776:
1223                 return (((reg & 0xff00) == 0x100 ||
1224                     (reg & 0xff00) == 0x200) &&
1225                    ((reg & 0x00ff) == 0x50 ||
1226                     (reg & 0x00ff) == 0x53 ||
1227                     (reg & 0x00ff) == 0x55)) ||
1228                   (reg & 0xfff0) == 0x630 ||
1229                   reg == 0x402 ||
1230                   reg == 0x640 || reg == 0x642 ||
1231                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1232                   reg == 0x73 || reg == 0x75 || reg == 0x77;
1233         case nct6779:
1234         case nct6791:
1235         case nct6792:
1236         case nct6793:
1237         case nct6795:
1238                 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
1239                   ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x0b) ||
1240                   reg == 0x402 ||
1241                   reg == 0x63a || reg == 0x63c || reg == 0x63e ||
1242                   reg == 0x640 || reg == 0x642 ||
1243                   reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
1244                   reg == 0x7b || reg == 0x7d;
1245         }
1246         return false;
1247 }
1248
1249 /*
1250  * On older chips, only registers 0x50-0x5f are banked.
1251  * On more recent chips, all registers are banked.
1252  * Assume that is the case and set the bank number for each access.
1253  * Cache the bank number so it only needs to be set if it changes.
1254  */
1255 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
1256 {
1257         u8 bank = reg >> 8;
1258
1259         if (data->bank != bank) {
1260                 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
1261                 outb_p(bank, data->addr + DATA_REG_OFFSET);
1262                 data->bank = bank;
1263         }
1264 }
1265
1266 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
1267 {
1268         int res, word_sized = is_word_sized(data, reg);
1269
1270         nct6775_set_bank(data, reg);
1271         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1272         res = inb_p(data->addr + DATA_REG_OFFSET);
1273         if (word_sized) {
1274                 outb_p((reg & 0xff) + 1,
1275                        data->addr + ADDR_REG_OFFSET);
1276                 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
1277         }
1278         return res;
1279 }
1280
1281 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
1282 {
1283         int word_sized = is_word_sized(data, reg);
1284
1285         nct6775_set_bank(data, reg);
1286         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1287         if (word_sized) {
1288                 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
1289                 outb_p((reg & 0xff) + 1,
1290                        data->addr + ADDR_REG_OFFSET);
1291         }
1292         outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
1293         return 0;
1294 }
1295
1296 /* We left-align 8-bit temperature values to make the code simpler */
1297 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
1298 {
1299         u16 res;
1300
1301         res = nct6775_read_value(data, reg);
1302         if (!is_word_sized(data, reg))
1303                 res <<= 8;
1304
1305         return res;
1306 }
1307
1308 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
1309 {
1310         if (!is_word_sized(data, reg))
1311                 value >>= 8;
1312         return nct6775_write_value(data, reg, value);
1313 }
1314
1315 /* This function assumes that the caller holds data->update_lock */
1316 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
1317 {
1318         u8 reg;
1319
1320         switch (nr) {
1321         case 0:
1322                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
1323                     | (data->fan_div[0] & 0x7);
1324                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1325                 break;
1326         case 1:
1327                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
1328                     | ((data->fan_div[1] << 4) & 0x70);
1329                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1330                 break;
1331         case 2:
1332                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
1333                     | (data->fan_div[2] & 0x7);
1334                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1335                 break;
1336         case 3:
1337                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
1338                     | ((data->fan_div[3] << 4) & 0x70);
1339                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1340                 break;
1341         }
1342 }
1343
1344 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
1345 {
1346         if (data->kind == nct6775)
1347                 nct6775_write_fan_div(data, nr);
1348 }
1349
1350 static void nct6775_update_fan_div(struct nct6775_data *data)
1351 {
1352         u8 i;
1353
1354         i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
1355         data->fan_div[0] = i & 0x7;
1356         data->fan_div[1] = (i & 0x70) >> 4;
1357         i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
1358         data->fan_div[2] = i & 0x7;
1359         if (data->has_fan & BIT(3))
1360                 data->fan_div[3] = (i & 0x70) >> 4;
1361 }
1362
1363 static void nct6775_update_fan_div_common(struct nct6775_data *data)
1364 {
1365         if (data->kind == nct6775)
1366                 nct6775_update_fan_div(data);
1367 }
1368
1369 static void nct6775_init_fan_div(struct nct6775_data *data)
1370 {
1371         int i;
1372
1373         nct6775_update_fan_div_common(data);
1374         /*
1375          * For all fans, start with highest divider value if the divider
1376          * register is not initialized. This ensures that we get a
1377          * reading from the fan count register, even if it is not optimal.
1378          * We'll compute a better divider later on.
1379          */
1380         for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
1381                 if (!(data->has_fan & BIT(i)))
1382                         continue;
1383                 if (data->fan_div[i] == 0) {
1384                         data->fan_div[i] = 7;
1385                         nct6775_write_fan_div_common(data, i);
1386                 }
1387         }
1388 }
1389
1390 static void nct6775_init_fan_common(struct device *dev,
1391                                     struct nct6775_data *data)
1392 {
1393         int i;
1394         u8 reg;
1395
1396         if (data->has_fan_div)
1397                 nct6775_init_fan_div(data);
1398
1399         /*
1400          * If fan_min is not set (0), set it to 0xff to disable it. This
1401          * prevents the unnecessary warning when fanX_min is reported as 0.
1402          */
1403         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1404                 if (data->has_fan_min & BIT(i)) {
1405                         reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
1406                         if (!reg)
1407                                 nct6775_write_value(data, data->REG_FAN_MIN[i],
1408                                                     data->has_fan_div ? 0xff
1409                                                                       : 0xff1f);
1410                 }
1411         }
1412 }
1413
1414 static void nct6775_select_fan_div(struct device *dev,
1415                                    struct nct6775_data *data, int nr, u16 reg)
1416 {
1417         u8 fan_div = data->fan_div[nr];
1418         u16 fan_min;
1419
1420         if (!data->has_fan_div)
1421                 return;
1422
1423         /*
1424          * If we failed to measure the fan speed, or the reported value is not
1425          * in the optimal range, and the clock divider can be modified,
1426          * let's try that for next time.
1427          */
1428         if (reg == 0x00 && fan_div < 0x07)
1429                 fan_div++;
1430         else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1431                 fan_div--;
1432
1433         if (fan_div != data->fan_div[nr]) {
1434                 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1435                         nr + 1, div_from_reg(data->fan_div[nr]),
1436                         div_from_reg(fan_div));
1437
1438                 /* Preserve min limit if possible */
1439                 if (data->has_fan_min & BIT(nr)) {
1440                         fan_min = data->fan_min[nr];
1441                         if (fan_div > data->fan_div[nr]) {
1442                                 if (fan_min != 255 && fan_min > 1)
1443                                         fan_min >>= 1;
1444                         } else {
1445                                 if (fan_min != 255) {
1446                                         fan_min <<= 1;
1447                                         if (fan_min > 254)
1448                                                 fan_min = 254;
1449                                 }
1450                         }
1451                         if (fan_min != data->fan_min[nr]) {
1452                                 data->fan_min[nr] = fan_min;
1453                                 nct6775_write_value(data, data->REG_FAN_MIN[nr],
1454                                                     fan_min);
1455                         }
1456                 }
1457                 data->fan_div[nr] = fan_div;
1458                 nct6775_write_fan_div_common(data, nr);
1459         }
1460 }
1461
1462 static void nct6775_update_pwm(struct device *dev)
1463 {
1464         struct nct6775_data *data = dev_get_drvdata(dev);
1465         int i, j;
1466         int fanmodecfg, reg;
1467         bool duty_is_dc;
1468
1469         for (i = 0; i < data->pwm_num; i++) {
1470                 if (!(data->has_pwm & BIT(i)))
1471                         continue;
1472
1473                 duty_is_dc = data->REG_PWM_MODE[i] &&
1474                   (nct6775_read_value(data, data->REG_PWM_MODE[i])
1475                    & data->PWM_MODE_MASK[i]);
1476                 data->pwm_mode[i] = duty_is_dc;
1477
1478                 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
1479                 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1480                         if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1481                                 data->pwm[j][i]
1482                                   = nct6775_read_value(data,
1483                                                        data->REG_PWM[j][i]);
1484                         }
1485                 }
1486
1487                 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1488                                                         (fanmodecfg >> 4) & 7);
1489
1490                 if (!data->temp_tolerance[0][i] ||
1491                     data->pwm_enable[i] != speed_cruise)
1492                         data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1493                 if (!data->target_speed_tolerance[i] ||
1494                     data->pwm_enable[i] == speed_cruise) {
1495                         u8 t = fanmodecfg & 0x0f;
1496
1497                         if (data->REG_TOLERANCE_H) {
1498                                 t |= (nct6775_read_value(data,
1499                                       data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
1500                         }
1501                         data->target_speed_tolerance[i] = t;
1502                 }
1503
1504                 data->temp_tolerance[1][i] =
1505                         nct6775_read_value(data,
1506                                         data->REG_CRITICAL_TEMP_TOLERANCE[i]);
1507
1508                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
1509                 data->pwm_temp_sel[i] = reg & 0x1f;
1510                 /* If fan can stop, report floor as 0 */
1511                 if (reg & 0x80)
1512                         data->pwm[2][i] = 0;
1513
1514                 if (!data->REG_WEIGHT_TEMP_SEL[i])
1515                         continue;
1516
1517                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
1518                 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1519                 /* If weight is disabled, report weight source as 0 */
1520                 if (j == 1 && !(reg & 0x80))
1521                         data->pwm_weight_temp_sel[i] = 0;
1522
1523                 /* Weight temp data */
1524                 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
1525                         data->weight_temp[j][i]
1526                           = nct6775_read_value(data,
1527                                                data->REG_WEIGHT_TEMP[j][i]);
1528                 }
1529         }
1530 }
1531
1532 static void nct6775_update_pwm_limits(struct device *dev)
1533 {
1534         struct nct6775_data *data = dev_get_drvdata(dev);
1535         int i, j;
1536         u8 reg;
1537         u16 reg_t;
1538
1539         for (i = 0; i < data->pwm_num; i++) {
1540                 if (!(data->has_pwm & BIT(i)))
1541                         continue;
1542
1543                 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1544                         data->fan_time[j][i] =
1545                           nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1546                 }
1547
1548                 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1549                 /* Update only in matching mode or if never updated */
1550                 if (!data->target_temp[i] ||
1551                     data->pwm_enable[i] == thermal_cruise)
1552                         data->target_temp[i] = reg_t & data->target_temp_mask;
1553                 if (!data->target_speed[i] ||
1554                     data->pwm_enable[i] == speed_cruise) {
1555                         if (data->REG_TOLERANCE_H) {
1556                                 reg_t |= (nct6775_read_value(data,
1557                                         data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1558                         }
1559                         data->target_speed[i] = reg_t;
1560                 }
1561
1562                 for (j = 0; j < data->auto_pwm_num; j++) {
1563                         data->auto_pwm[i][j] =
1564                           nct6775_read_value(data,
1565                                              NCT6775_AUTO_PWM(data, i, j));
1566                         data->auto_temp[i][j] =
1567                           nct6775_read_value(data,
1568                                              NCT6775_AUTO_TEMP(data, i, j));
1569                 }
1570
1571                 /* critical auto_pwm temperature data */
1572                 data->auto_temp[i][data->auto_pwm_num] =
1573                         nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1574
1575                 switch (data->kind) {
1576                 case nct6775:
1577                         reg = nct6775_read_value(data,
1578                                                  NCT6775_REG_CRITICAL_ENAB[i]);
1579                         data->auto_pwm[i][data->auto_pwm_num] =
1580                                                 (reg & 0x02) ? 0xff : 0x00;
1581                         break;
1582                 case nct6776:
1583                         data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1584                         break;
1585                 case nct6106:
1586                 case nct6779:
1587                 case nct6791:
1588                 case nct6792:
1589                 case nct6793:
1590                 case nct6795:
1591                         reg = nct6775_read_value(data,
1592                                         data->REG_CRITICAL_PWM_ENABLE[i]);
1593                         if (reg & data->CRITICAL_PWM_ENABLE_MASK)
1594                                 reg = nct6775_read_value(data,
1595                                         data->REG_CRITICAL_PWM[i]);
1596                         else
1597                                 reg = 0xff;
1598                         data->auto_pwm[i][data->auto_pwm_num] = reg;
1599                         break;
1600                 }
1601         }
1602 }
1603
1604 static struct nct6775_data *nct6775_update_device(struct device *dev)
1605 {
1606         struct nct6775_data *data = dev_get_drvdata(dev);
1607         int i, j;
1608
1609         mutex_lock(&data->update_lock);
1610
1611         if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1612             || !data->valid) {
1613                 /* Fan clock dividers */
1614                 nct6775_update_fan_div_common(data);
1615
1616                 /* Measured voltages and limits */
1617                 for (i = 0; i < data->in_num; i++) {
1618                         if (!(data->have_in & BIT(i)))
1619                                 continue;
1620
1621                         data->in[i][0] = nct6775_read_value(data,
1622                                                             data->REG_VIN[i]);
1623                         data->in[i][1] = nct6775_read_value(data,
1624                                           data->REG_IN_MINMAX[0][i]);
1625                         data->in[i][2] = nct6775_read_value(data,
1626                                           data->REG_IN_MINMAX[1][i]);
1627                 }
1628
1629                 /* Measured fan speeds and limits */
1630                 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
1631                         u16 reg;
1632
1633                         if (!(data->has_fan & BIT(i)))
1634                                 continue;
1635
1636                         reg = nct6775_read_value(data, data->REG_FAN[i]);
1637                         data->rpm[i] = data->fan_from_reg(reg,
1638                                                           data->fan_div[i]);
1639
1640                         if (data->has_fan_min & BIT(i))
1641                                 data->fan_min[i] = nct6775_read_value(data,
1642                                            data->REG_FAN_MIN[i]);
1643                         data->fan_pulses[i] =
1644                           (nct6775_read_value(data, data->REG_FAN_PULSES[i])
1645                                 >> data->FAN_PULSE_SHIFT[i]) & 0x03;
1646
1647                         nct6775_select_fan_div(dev, data, i, reg);
1648                 }
1649
1650                 nct6775_update_pwm(dev);
1651                 nct6775_update_pwm_limits(dev);
1652
1653                 /* Measured temperatures and limits */
1654                 for (i = 0; i < NUM_TEMP; i++) {
1655                         if (!(data->have_temp & BIT(i)))
1656                                 continue;
1657                         for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1658                                 if (data->reg_temp[j][i])
1659                                         data->temp[j][i]
1660                                           = nct6775_read_temp(data,
1661                                                 data->reg_temp[j][i]);
1662                         }
1663                         if (i >= NUM_TEMP_FIXED ||
1664                             !(data->have_temp_fixed & BIT(i)))
1665                                 continue;
1666                         data->temp_offset[i]
1667                           = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1668                 }
1669
1670                 data->alarms = 0;
1671                 for (i = 0; i < NUM_REG_ALARM; i++) {
1672                         u8 alarm;
1673
1674                         if (!data->REG_ALARM[i])
1675                                 continue;
1676                         alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1677                         data->alarms |= ((u64)alarm) << (i << 3);
1678                 }
1679
1680                 data->beeps = 0;
1681                 for (i = 0; i < NUM_REG_BEEP; i++) {
1682                         u8 beep;
1683
1684                         if (!data->REG_BEEP[i])
1685                                 continue;
1686                         beep = nct6775_read_value(data, data->REG_BEEP[i]);
1687                         data->beeps |= ((u64)beep) << (i << 3);
1688                 }
1689
1690                 data->last_updated = jiffies;
1691                 data->valid = true;
1692         }
1693
1694         mutex_unlock(&data->update_lock);
1695         return data;
1696 }
1697
1698 /*
1699  * Sysfs callback functions
1700  */
1701 static ssize_t
1702 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1703 {
1704         struct nct6775_data *data = nct6775_update_device(dev);
1705         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1706         int index = sattr->index;
1707         int nr = sattr->nr;
1708
1709         return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1710 }
1711
1712 static ssize_t
1713 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1714              size_t count)
1715 {
1716         struct nct6775_data *data = dev_get_drvdata(dev);
1717         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1718         int index = sattr->index;
1719         int nr = sattr->nr;
1720         unsigned long val;
1721         int err;
1722
1723         err = kstrtoul(buf, 10, &val);
1724         if (err < 0)
1725                 return err;
1726         mutex_lock(&data->update_lock);
1727         data->in[nr][index] = in_to_reg(val, nr);
1728         nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr],
1729                             data->in[nr][index]);
1730         mutex_unlock(&data->update_lock);
1731         return count;
1732 }
1733
1734 static ssize_t
1735 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1736 {
1737         struct nct6775_data *data = nct6775_update_device(dev);
1738         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1739         int nr = data->ALARM_BITS[sattr->index];
1740
1741         return sprintf(buf, "%u\n",
1742                        (unsigned int)((data->alarms >> nr) & 0x01));
1743 }
1744
1745 static int find_temp_source(struct nct6775_data *data, int index, int count)
1746 {
1747         int source = data->temp_src[index];
1748         int nr;
1749
1750         for (nr = 0; nr < count; nr++) {
1751                 int src;
1752
1753                 src = nct6775_read_value(data,
1754                                          data->REG_TEMP_SOURCE[nr]) & 0x1f;
1755                 if (src == source)
1756                         return nr;
1757         }
1758         return -ENODEV;
1759 }
1760
1761 static ssize_t
1762 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1763 {
1764         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1765         struct nct6775_data *data = nct6775_update_device(dev);
1766         unsigned int alarm = 0;
1767         int nr;
1768
1769         /*
1770          * For temperatures, there is no fixed mapping from registers to alarm
1771          * bits. Alarm bits are determined by the temperature source mapping.
1772          */
1773         nr = find_temp_source(data, sattr->index, data->num_temp_alarms);
1774         if (nr >= 0) {
1775                 int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE];
1776
1777                 alarm = (data->alarms >> bit) & 0x01;
1778         }
1779         return sprintf(buf, "%u\n", alarm);
1780 }
1781
1782 static ssize_t
1783 show_beep(struct device *dev, struct device_attribute *attr, char *buf)
1784 {
1785         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1786         struct nct6775_data *data = nct6775_update_device(dev);
1787         int nr = data->BEEP_BITS[sattr->index];
1788
1789         return sprintf(buf, "%u\n",
1790                        (unsigned int)((data->beeps >> nr) & 0x01));
1791 }
1792
1793 static ssize_t
1794 store_beep(struct device *dev, struct device_attribute *attr, const char *buf,
1795            size_t count)
1796 {
1797         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1798         struct nct6775_data *data = dev_get_drvdata(dev);
1799         int nr = data->BEEP_BITS[sattr->index];
1800         int regindex = nr >> 3;
1801         unsigned long val;
1802         int err;
1803
1804         err = kstrtoul(buf, 10, &val);
1805         if (err < 0)
1806                 return err;
1807         if (val > 1)
1808                 return -EINVAL;
1809
1810         mutex_lock(&data->update_lock);
1811         if (val)
1812                 data->beeps |= (1ULL << nr);
1813         else
1814                 data->beeps &= ~(1ULL << nr);
1815         nct6775_write_value(data, data->REG_BEEP[regindex],
1816                             (data->beeps >> (regindex << 3)) & 0xff);
1817         mutex_unlock(&data->update_lock);
1818         return count;
1819 }
1820
1821 static ssize_t
1822 show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf)
1823 {
1824         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1825         struct nct6775_data *data = nct6775_update_device(dev);
1826         unsigned int beep = 0;
1827         int nr;
1828
1829         /*
1830          * For temperatures, there is no fixed mapping from registers to beep
1831          * enable bits. Beep enable bits are determined by the temperature
1832          * source mapping.
1833          */
1834         nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1835         if (nr >= 0) {
1836                 int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1837
1838                 beep = (data->beeps >> bit) & 0x01;
1839         }
1840         return sprintf(buf, "%u\n", beep);
1841 }
1842
1843 static ssize_t
1844 store_temp_beep(struct device *dev, struct device_attribute *attr,
1845                 const char *buf, size_t count)
1846 {
1847         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1848         struct nct6775_data *data = dev_get_drvdata(dev);
1849         int nr, bit, regindex;
1850         unsigned long val;
1851         int err;
1852
1853         err = kstrtoul(buf, 10, &val);
1854         if (err < 0)
1855                 return err;
1856         if (val > 1)
1857                 return -EINVAL;
1858
1859         nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1860         if (nr < 0)
1861                 return nr;
1862
1863         bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1864         regindex = bit >> 3;
1865
1866         mutex_lock(&data->update_lock);
1867         if (val)
1868                 data->beeps |= (1ULL << bit);
1869         else
1870                 data->beeps &= ~(1ULL << bit);
1871         nct6775_write_value(data, data->REG_BEEP[regindex],
1872                             (data->beeps >> (regindex << 3)) & 0xff);
1873         mutex_unlock(&data->update_lock);
1874
1875         return count;
1876 }
1877
1878 static umode_t nct6775_in_is_visible(struct kobject *kobj,
1879                                      struct attribute *attr, int index)
1880 {
1881         struct device *dev = container_of(kobj, struct device, kobj);
1882         struct nct6775_data *data = dev_get_drvdata(dev);
1883         int in = index / 5;     /* voltage index */
1884
1885         if (!(data->have_in & BIT(in)))
1886                 return 0;
1887
1888         return attr->mode;
1889 }
1890
1891 SENSOR_TEMPLATE_2(in_input, "in%d_input", S_IRUGO, show_in_reg, NULL, 0, 0);
1892 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", S_IRUGO, show_alarm, NULL, 0);
1893 SENSOR_TEMPLATE(in_beep, "in%d_beep", S_IWUSR | S_IRUGO, show_beep, store_beep,
1894                 0);
1895 SENSOR_TEMPLATE_2(in_min, "in%d_min", S_IWUSR | S_IRUGO, show_in_reg,
1896                   store_in_reg, 0, 1);
1897 SENSOR_TEMPLATE_2(in_max, "in%d_max", S_IWUSR | S_IRUGO, show_in_reg,
1898                   store_in_reg, 0, 2);
1899
1900 /*
1901  * nct6775_in_is_visible uses the index into the following array
1902  * to determine if attributes should be created or not.
1903  * Any change in order or content must be matched.
1904  */
1905 static struct sensor_device_template *nct6775_attributes_in_template[] = {
1906         &sensor_dev_template_in_input,
1907         &sensor_dev_template_in_alarm,
1908         &sensor_dev_template_in_beep,
1909         &sensor_dev_template_in_min,
1910         &sensor_dev_template_in_max,
1911         NULL
1912 };
1913
1914 static const struct sensor_template_group nct6775_in_template_group = {
1915         .templates = nct6775_attributes_in_template,
1916         .is_visible = nct6775_in_is_visible,
1917 };
1918
1919 static ssize_t
1920 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1921 {
1922         struct nct6775_data *data = nct6775_update_device(dev);
1923         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1924         int nr = sattr->index;
1925
1926         return sprintf(buf, "%d\n", data->rpm[nr]);
1927 }
1928
1929 static ssize_t
1930 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1931 {
1932         struct nct6775_data *data = nct6775_update_device(dev);
1933         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1934         int nr = sattr->index;
1935
1936         return sprintf(buf, "%d\n",
1937                        data->fan_from_reg_min(data->fan_min[nr],
1938                                               data->fan_div[nr]));
1939 }
1940
1941 static ssize_t
1942 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1943 {
1944         struct nct6775_data *data = nct6775_update_device(dev);
1945         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1946         int nr = sattr->index;
1947
1948         return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1949 }
1950
1951 static ssize_t
1952 store_fan_min(struct device *dev, struct device_attribute *attr,
1953               const char *buf, size_t count)
1954 {
1955         struct nct6775_data *data = dev_get_drvdata(dev);
1956         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1957         int nr = sattr->index;
1958         unsigned long val;
1959         unsigned int reg;
1960         u8 new_div;
1961         int err;
1962
1963         err = kstrtoul(buf, 10, &val);
1964         if (err < 0)
1965                 return err;
1966
1967         mutex_lock(&data->update_lock);
1968         if (!data->has_fan_div) {
1969                 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1970                 if (!val) {
1971                         val = 0xff1f;
1972                 } else {
1973                         if (val > 1350000U)
1974                                 val = 135000U;
1975                         val = 1350000U / val;
1976                         val = (val & 0x1f) | ((val << 3) & 0xff00);
1977                 }
1978                 data->fan_min[nr] = val;
1979                 goto write_min; /* Leave fan divider alone */
1980         }
1981         if (!val) {
1982                 /* No min limit, alarm disabled */
1983                 data->fan_min[nr] = 255;
1984                 new_div = data->fan_div[nr]; /* No change */
1985                 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1986                 goto write_div;
1987         }
1988         reg = 1350000U / val;
1989         if (reg >= 128 * 255) {
1990                 /*
1991                  * Speed below this value cannot possibly be represented,
1992                  * even with the highest divider (128)
1993                  */
1994                 data->fan_min[nr] = 254;
1995                 new_div = 7; /* 128 == BIT(7) */
1996                 dev_warn(dev,
1997                          "fan%u low limit %lu below minimum %u, set to minimum\n",
1998                          nr + 1, val, data->fan_from_reg_min(254, 7));
1999         } else if (!reg) {
2000                 /*
2001                  * Speed above this value cannot possibly be represented,
2002                  * even with the lowest divider (1)
2003                  */
2004                 data->fan_min[nr] = 1;
2005                 new_div = 0; /* 1 == BIT(0) */
2006                 dev_warn(dev,
2007                          "fan%u low limit %lu above maximum %u, set to maximum\n",
2008                          nr + 1, val, data->fan_from_reg_min(1, 0));
2009         } else {
2010                 /*
2011                  * Automatically pick the best divider, i.e. the one such
2012                  * that the min limit will correspond to a register value
2013                  * in the 96..192 range
2014                  */
2015                 new_div = 0;
2016                 while (reg > 192 && new_div < 7) {
2017                         reg >>= 1;
2018                         new_div++;
2019                 }
2020                 data->fan_min[nr] = reg;
2021         }
2022
2023 write_div:
2024         /*
2025          * Write both the fan clock divider (if it changed) and the new
2026          * fan min (unconditionally)
2027          */
2028         if (new_div != data->fan_div[nr]) {
2029                 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
2030                         nr + 1, div_from_reg(data->fan_div[nr]),
2031                         div_from_reg(new_div));
2032                 data->fan_div[nr] = new_div;
2033                 nct6775_write_fan_div_common(data, nr);
2034                 /* Give the chip time to sample a new speed value */
2035                 data->last_updated = jiffies;
2036         }
2037
2038 write_min:
2039         nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
2040         mutex_unlock(&data->update_lock);
2041
2042         return count;
2043 }
2044
2045 static ssize_t
2046 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
2047 {
2048         struct nct6775_data *data = nct6775_update_device(dev);
2049         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2050         int p = data->fan_pulses[sattr->index];
2051
2052         return sprintf(buf, "%d\n", p ? : 4);
2053 }
2054
2055 static ssize_t
2056 store_fan_pulses(struct device *dev, struct device_attribute *attr,
2057                  const char *buf, size_t count)
2058 {
2059         struct nct6775_data *data = dev_get_drvdata(dev);
2060         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2061         int nr = sattr->index;
2062         unsigned long val;
2063         int err;
2064         u8 reg;
2065
2066         err = kstrtoul(buf, 10, &val);
2067         if (err < 0)
2068                 return err;
2069
2070         if (val > 4)
2071                 return -EINVAL;
2072
2073         mutex_lock(&data->update_lock);
2074         data->fan_pulses[nr] = val & 3;
2075         reg = nct6775_read_value(data, data->REG_FAN_PULSES[nr]);
2076         reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
2077         reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
2078         nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
2079         mutex_unlock(&data->update_lock);
2080
2081         return count;
2082 }
2083
2084 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
2085                                       struct attribute *attr, int index)
2086 {
2087         struct device *dev = container_of(kobj, struct device, kobj);
2088         struct nct6775_data *data = dev_get_drvdata(dev);
2089         int fan = index / 6;    /* fan index */
2090         int nr = index % 6;     /* attribute index */
2091
2092         if (!(data->has_fan & BIT(fan)))
2093                 return 0;
2094
2095         if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1)
2096                 return 0;
2097         if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1)
2098                 return 0;
2099         if (nr == 4 && !(data->has_fan_min & BIT(fan)))
2100                 return 0;
2101         if (nr == 5 && data->kind != nct6775)
2102                 return 0;
2103
2104         return attr->mode;
2105 }
2106
2107 SENSOR_TEMPLATE(fan_input, "fan%d_input", S_IRUGO, show_fan, NULL, 0);
2108 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", S_IRUGO, show_alarm, NULL,
2109                 FAN_ALARM_BASE);
2110 SENSOR_TEMPLATE(fan_beep, "fan%d_beep", S_IWUSR | S_IRUGO, show_beep,
2111                 store_beep, FAN_ALARM_BASE);
2112 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", S_IWUSR | S_IRUGO, show_fan_pulses,
2113                 store_fan_pulses, 0);
2114 SENSOR_TEMPLATE(fan_min, "fan%d_min", S_IWUSR | S_IRUGO, show_fan_min,
2115                 store_fan_min, 0);
2116 SENSOR_TEMPLATE(fan_div, "fan%d_div", S_IRUGO, show_fan_div, NULL, 0);
2117
2118 /*
2119  * nct6775_fan_is_visible uses the index into the following array
2120  * to determine if attributes should be created or not.
2121  * Any change in order or content must be matched.
2122  */
2123 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
2124         &sensor_dev_template_fan_input,
2125         &sensor_dev_template_fan_alarm, /* 1 */
2126         &sensor_dev_template_fan_beep,  /* 2 */
2127         &sensor_dev_template_fan_pulses,
2128         &sensor_dev_template_fan_min,   /* 4 */
2129         &sensor_dev_template_fan_div,   /* 5 */
2130         NULL
2131 };
2132
2133 static const struct sensor_template_group nct6775_fan_template_group = {
2134         .templates = nct6775_attributes_fan_template,
2135         .is_visible = nct6775_fan_is_visible,
2136         .base = 1,
2137 };
2138
2139 static ssize_t
2140 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
2141 {
2142         struct nct6775_data *data = nct6775_update_device(dev);
2143         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2144         int nr = sattr->index;
2145
2146         return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
2147 }
2148
2149 static ssize_t
2150 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
2151 {
2152         struct nct6775_data *data = nct6775_update_device(dev);
2153         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2154         int nr = sattr->nr;
2155         int index = sattr->index;
2156
2157         return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
2158 }
2159
2160 static ssize_t
2161 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
2162            size_t count)
2163 {
2164         struct nct6775_data *data = dev_get_drvdata(dev);
2165         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2166         int nr = sattr->nr;
2167         int index = sattr->index;
2168         int err;
2169         long val;
2170
2171         err = kstrtol(buf, 10, &val);
2172         if (err < 0)
2173                 return err;
2174
2175         mutex_lock(&data->update_lock);
2176         data->temp[index][nr] = LM75_TEMP_TO_REG(val);
2177         nct6775_write_temp(data, data->reg_temp[index][nr],
2178                            data->temp[index][nr]);
2179         mutex_unlock(&data->update_lock);
2180         return count;
2181 }
2182
2183 static ssize_t
2184 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
2185 {
2186         struct nct6775_data *data = nct6775_update_device(dev);
2187         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2188
2189         return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
2190 }
2191
2192 static ssize_t
2193 store_temp_offset(struct device *dev, struct device_attribute *attr,
2194                   const char *buf, size_t count)
2195 {
2196         struct nct6775_data *data = dev_get_drvdata(dev);
2197         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2198         int nr = sattr->index;
2199         long val;
2200         int err;
2201
2202         err = kstrtol(buf, 10, &val);
2203         if (err < 0)
2204                 return err;
2205
2206         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
2207
2208         mutex_lock(&data->update_lock);
2209         data->temp_offset[nr] = val;
2210         nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
2211         mutex_unlock(&data->update_lock);
2212
2213         return count;
2214 }
2215
2216 static ssize_t
2217 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
2218 {
2219         struct nct6775_data *data = nct6775_update_device(dev);
2220         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2221         int nr = sattr->index;
2222
2223         return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
2224 }
2225
2226 static ssize_t
2227 store_temp_type(struct device *dev, struct device_attribute *attr,
2228                 const char *buf, size_t count)
2229 {
2230         struct nct6775_data *data = nct6775_update_device(dev);
2231         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2232         int nr = sattr->index;
2233         unsigned long val;
2234         int err;
2235         u8 vbat, diode, vbit, dbit;
2236
2237         err = kstrtoul(buf, 10, &val);
2238         if (err < 0)
2239                 return err;
2240
2241         if (val != 1 && val != 3 && val != 4)
2242                 return -EINVAL;
2243
2244         mutex_lock(&data->update_lock);
2245
2246         data->temp_type[nr] = val;
2247         vbit = 0x02 << nr;
2248         dbit = data->DIODE_MASK << nr;
2249         vbat = nct6775_read_value(data, data->REG_VBAT) & ~vbit;
2250         diode = nct6775_read_value(data, data->REG_DIODE) & ~dbit;
2251         switch (val) {
2252         case 1: /* CPU diode (diode, current mode) */
2253                 vbat |= vbit;
2254                 diode |= dbit;
2255                 break;
2256         case 3: /* diode, voltage mode */
2257                 vbat |= dbit;
2258                 break;
2259         case 4: /* thermistor */
2260                 break;
2261         }
2262         nct6775_write_value(data, data->REG_VBAT, vbat);
2263         nct6775_write_value(data, data->REG_DIODE, diode);
2264
2265         mutex_unlock(&data->update_lock);
2266         return count;
2267 }
2268
2269 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
2270                                        struct attribute *attr, int index)
2271 {
2272         struct device *dev = container_of(kobj, struct device, kobj);
2273         struct nct6775_data *data = dev_get_drvdata(dev);
2274         int temp = index / 10;  /* temp index */
2275         int nr = index % 10;    /* attribute index */
2276
2277         if (!(data->have_temp & BIT(temp)))
2278                 return 0;
2279
2280         if (nr == 1 && !data->temp_label)
2281                 return 0;
2282
2283         if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0)
2284                 return 0;                               /* alarm */
2285
2286         if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0)
2287                 return 0;                               /* beep */
2288
2289         if (nr == 4 && !data->reg_temp[1][temp])        /* max */
2290                 return 0;
2291
2292         if (nr == 5 && !data->reg_temp[2][temp])        /* max_hyst */
2293                 return 0;
2294
2295         if (nr == 6 && !data->reg_temp[3][temp])        /* crit */
2296                 return 0;
2297
2298         if (nr == 7 && !data->reg_temp[4][temp])        /* lcrit */
2299                 return 0;
2300
2301         /* offset and type only apply to fixed sensors */
2302         if (nr > 7 && !(data->have_temp_fixed & BIT(temp)))
2303                 return 0;
2304
2305         return attr->mode;
2306 }
2307
2308 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", S_IRUGO, show_temp, NULL, 0, 0);
2309 SENSOR_TEMPLATE(temp_label, "temp%d_label", S_IRUGO, show_temp_label, NULL, 0);
2310 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", S_IRUGO | S_IWUSR, show_temp,
2311                   store_temp, 0, 1);
2312 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", S_IRUGO | S_IWUSR,
2313                   show_temp, store_temp, 0, 2);
2314 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", S_IRUGO | S_IWUSR, show_temp,
2315                   store_temp, 0, 3);
2316 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", S_IRUGO | S_IWUSR, show_temp,
2317                   store_temp, 0, 4);
2318 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", S_IRUGO | S_IWUSR,
2319                 show_temp_offset, store_temp_offset, 0);
2320 SENSOR_TEMPLATE(temp_type, "temp%d_type", S_IRUGO | S_IWUSR, show_temp_type,
2321                 store_temp_type, 0);
2322 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", S_IRUGO, show_temp_alarm, NULL, 0);
2323 SENSOR_TEMPLATE(temp_beep, "temp%d_beep", S_IRUGO | S_IWUSR, show_temp_beep,
2324                 store_temp_beep, 0);
2325
2326 /*
2327  * nct6775_temp_is_visible uses the index into the following array
2328  * to determine if attributes should be created or not.
2329  * Any change in order or content must be matched.
2330  */
2331 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
2332         &sensor_dev_template_temp_input,
2333         &sensor_dev_template_temp_label,
2334         &sensor_dev_template_temp_alarm,        /* 2 */
2335         &sensor_dev_template_temp_beep,         /* 3 */
2336         &sensor_dev_template_temp_max,          /* 4 */
2337         &sensor_dev_template_temp_max_hyst,     /* 5 */
2338         &sensor_dev_template_temp_crit,         /* 6 */
2339         &sensor_dev_template_temp_lcrit,        /* 7 */
2340         &sensor_dev_template_temp_offset,       /* 8 */
2341         &sensor_dev_template_temp_type,         /* 9 */
2342         NULL
2343 };
2344
2345 static const struct sensor_template_group nct6775_temp_template_group = {
2346         .templates = nct6775_attributes_temp_template,
2347         .is_visible = nct6775_temp_is_visible,
2348         .base = 1,
2349 };
2350
2351 static ssize_t
2352 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
2353 {
2354         struct nct6775_data *data = nct6775_update_device(dev);
2355         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2356
2357         return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
2358 }
2359
2360 static ssize_t
2361 store_pwm_mode(struct device *dev, struct device_attribute *attr,
2362                const char *buf, size_t count)
2363 {
2364         struct nct6775_data *data = dev_get_drvdata(dev);
2365         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2366         int nr = sattr->index;
2367         unsigned long val;
2368         int err;
2369         u8 reg;
2370
2371         err = kstrtoul(buf, 10, &val);
2372         if (err < 0)
2373                 return err;
2374
2375         if (val > 1)
2376                 return -EINVAL;
2377
2378         /* Setting DC mode is not supported for all chips/channels */
2379         if (data->REG_PWM_MODE[nr] == 0) {
2380                 if (val)
2381                         return -EINVAL;
2382                 return count;
2383         }
2384
2385         mutex_lock(&data->update_lock);
2386         data->pwm_mode[nr] = val;
2387         reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
2388         reg &= ~data->PWM_MODE_MASK[nr];
2389         if (val)
2390                 reg |= data->PWM_MODE_MASK[nr];
2391         nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
2392         mutex_unlock(&data->update_lock);
2393         return count;
2394 }
2395
2396 static ssize_t
2397 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2398 {
2399         struct nct6775_data *data = nct6775_update_device(dev);
2400         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2401         int nr = sattr->nr;
2402         int index = sattr->index;
2403         int pwm;
2404
2405         /*
2406          * For automatic fan control modes, show current pwm readings.
2407          * Otherwise, show the configured value.
2408          */
2409         if (index == 0 && data->pwm_enable[nr] > manual)
2410                 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
2411         else
2412                 pwm = data->pwm[index][nr];
2413
2414         return sprintf(buf, "%d\n", pwm);
2415 }
2416
2417 static ssize_t
2418 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
2419           size_t count)
2420 {
2421         struct nct6775_data *data = dev_get_drvdata(dev);
2422         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2423         int nr = sattr->nr;
2424         int index = sattr->index;
2425         unsigned long val;
2426         int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
2427         int maxval[7]
2428           = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
2429         int err;
2430         u8 reg;
2431
2432         err = kstrtoul(buf, 10, &val);
2433         if (err < 0)
2434                 return err;
2435         val = clamp_val(val, minval[index], maxval[index]);
2436
2437         mutex_lock(&data->update_lock);
2438         data->pwm[index][nr] = val;
2439         nct6775_write_value(data, data->REG_PWM[index][nr], val);
2440         if (index == 2) { /* floor: disable if val == 0 */
2441                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2442                 reg &= 0x7f;
2443                 if (val)
2444                         reg |= 0x80;
2445                 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2446         }
2447         mutex_unlock(&data->update_lock);
2448         return count;
2449 }
2450
2451 /* Returns 0 if OK, -EINVAL otherwise */
2452 static int check_trip_points(struct nct6775_data *data, int nr)
2453 {
2454         int i;
2455
2456         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2457                 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
2458                         return -EINVAL;
2459         }
2460         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2461                 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
2462                         return -EINVAL;
2463         }
2464         /* validate critical temperature and pwm if enabled (pwm > 0) */
2465         if (data->auto_pwm[nr][data->auto_pwm_num]) {
2466                 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2467                                 data->auto_temp[nr][data->auto_pwm_num] ||
2468                     data->auto_pwm[nr][data->auto_pwm_num - 1] >
2469                                 data->auto_pwm[nr][data->auto_pwm_num])
2470                         return -EINVAL;
2471         }
2472         return 0;
2473 }
2474
2475 static void pwm_update_registers(struct nct6775_data *data, int nr)
2476 {
2477         u8 reg;
2478
2479         switch (data->pwm_enable[nr]) {
2480         case off:
2481         case manual:
2482                 break;
2483         case speed_cruise:
2484                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2485                 reg = (reg & ~data->tolerance_mask) |
2486                   (data->target_speed_tolerance[nr] & data->tolerance_mask);
2487                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2488                 nct6775_write_value(data, data->REG_TARGET[nr],
2489                                     data->target_speed[nr] & 0xff);
2490                 if (data->REG_TOLERANCE_H) {
2491                         reg = (data->target_speed[nr] >> 8) & 0x0f;
2492                         reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2493                         nct6775_write_value(data,
2494                                             data->REG_TOLERANCE_H[nr],
2495                                             reg);
2496                 }
2497                 break;
2498         case thermal_cruise:
2499                 nct6775_write_value(data, data->REG_TARGET[nr],
2500                                     data->target_temp[nr]);
2501                 /* intentional */
2502         default:
2503                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2504                 reg = (reg & ~data->tolerance_mask) |
2505                   data->temp_tolerance[0][nr];
2506                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2507                 break;
2508         }
2509 }
2510
2511 static ssize_t
2512 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2513 {
2514         struct nct6775_data *data = nct6775_update_device(dev);
2515         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2516
2517         return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2518 }
2519
2520 static ssize_t
2521 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2522                  const char *buf, size_t count)
2523 {
2524         struct nct6775_data *data = dev_get_drvdata(dev);
2525         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2526         int nr = sattr->index;
2527         unsigned long val;
2528         int err;
2529         u16 reg;
2530
2531         err = kstrtoul(buf, 10, &val);
2532         if (err < 0)
2533                 return err;
2534
2535         if (val > sf4)
2536                 return -EINVAL;
2537
2538         if (val == sf3 && data->kind != nct6775)
2539                 return -EINVAL;
2540
2541         if (val == sf4 && check_trip_points(data, nr)) {
2542                 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2543                 dev_err(dev, "Adjust trip points and try again\n");
2544                 return -EINVAL;
2545         }
2546
2547         mutex_lock(&data->update_lock);
2548         data->pwm_enable[nr] = val;
2549         if (val == off) {
2550                 /*
2551                  * turn off pwm control: select manual mode, set pwm to maximum
2552                  */
2553                 data->pwm[0][nr] = 255;
2554                 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2555         }
2556         pwm_update_registers(data, nr);
2557         reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2558         reg &= 0x0f;
2559         reg |= pwm_enable_to_reg(val) << 4;
2560         nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2561         mutex_unlock(&data->update_lock);
2562         return count;
2563 }
2564
2565 static ssize_t
2566 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2567 {
2568         int i, sel = 0;
2569
2570         for (i = 0; i < NUM_TEMP; i++) {
2571                 if (!(data->have_temp & BIT(i)))
2572                         continue;
2573                 if (src == data->temp_src[i]) {
2574                         sel = i + 1;
2575                         break;
2576                 }
2577         }
2578
2579         return sprintf(buf, "%d\n", sel);
2580 }
2581
2582 static ssize_t
2583 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2584 {
2585         struct nct6775_data *data = nct6775_update_device(dev);
2586         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2587         int index = sattr->index;
2588
2589         return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2590 }
2591
2592 static ssize_t
2593 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2594                    const char *buf, size_t count)
2595 {
2596         struct nct6775_data *data = nct6775_update_device(dev);
2597         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2598         int nr = sattr->index;
2599         unsigned long val;
2600         int err, reg, src;
2601
2602         err = kstrtoul(buf, 10, &val);
2603         if (err < 0)
2604                 return err;
2605         if (val == 0 || val > NUM_TEMP)
2606                 return -EINVAL;
2607         if (!(data->have_temp & BIT(val - 1)) || !data->temp_src[val - 1])
2608                 return -EINVAL;
2609
2610         mutex_lock(&data->update_lock);
2611         src = data->temp_src[val - 1];
2612         data->pwm_temp_sel[nr] = src;
2613         reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2614         reg &= 0xe0;
2615         reg |= src;
2616         nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2617         mutex_unlock(&data->update_lock);
2618
2619         return count;
2620 }
2621
2622 static ssize_t
2623 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2624                          char *buf)
2625 {
2626         struct nct6775_data *data = nct6775_update_device(dev);
2627         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2628         int index = sattr->index;
2629
2630         return show_pwm_temp_sel_common(data, buf,
2631                                         data->pwm_weight_temp_sel[index]);
2632 }
2633
2634 static ssize_t
2635 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2636                           const char *buf, size_t count)
2637 {
2638         struct nct6775_data *data = nct6775_update_device(dev);
2639         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2640         int nr = sattr->index;
2641         unsigned long val;
2642         int err, reg, src;
2643
2644         err = kstrtoul(buf, 10, &val);
2645         if (err < 0)
2646                 return err;
2647         if (val > NUM_TEMP)
2648                 return -EINVAL;
2649         if (val && (!(data->have_temp & BIT(val - 1)) ||
2650                     !data->temp_src[val - 1]))
2651                 return -EINVAL;
2652
2653         mutex_lock(&data->update_lock);
2654         if (val) {
2655                 src = data->temp_src[val - 1];
2656                 data->pwm_weight_temp_sel[nr] = src;
2657                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2658                 reg &= 0xe0;
2659                 reg |= (src | 0x80);
2660                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2661         } else {
2662                 data->pwm_weight_temp_sel[nr] = 0;
2663                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2664                 reg &= 0x7f;
2665                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2666         }
2667         mutex_unlock(&data->update_lock);
2668
2669         return count;
2670 }
2671
2672 static ssize_t
2673 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2674 {
2675         struct nct6775_data *data = nct6775_update_device(dev);
2676         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2677
2678         return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2679 }
2680
2681 static ssize_t
2682 store_target_temp(struct device *dev, struct device_attribute *attr,
2683                   const char *buf, size_t count)
2684 {
2685         struct nct6775_data *data = dev_get_drvdata(dev);
2686         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2687         int nr = sattr->index;
2688         unsigned long val;
2689         int err;
2690
2691         err = kstrtoul(buf, 10, &val);
2692         if (err < 0)
2693                 return err;
2694
2695         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2696                         data->target_temp_mask);
2697
2698         mutex_lock(&data->update_lock);
2699         data->target_temp[nr] = val;
2700         pwm_update_registers(data, nr);
2701         mutex_unlock(&data->update_lock);
2702         return count;
2703 }
2704
2705 static ssize_t
2706 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2707 {
2708         struct nct6775_data *data = nct6775_update_device(dev);
2709         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2710         int nr = sattr->index;
2711
2712         return sprintf(buf, "%d\n",
2713                        fan_from_reg16(data->target_speed[nr],
2714                                       data->fan_div[nr]));
2715 }
2716
2717 static ssize_t
2718 store_target_speed(struct device *dev, struct device_attribute *attr,
2719                    const char *buf, size_t count)
2720 {
2721         struct nct6775_data *data = dev_get_drvdata(dev);
2722         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2723         int nr = sattr->index;
2724         unsigned long val;
2725         int err;
2726         u16 speed;
2727
2728         err = kstrtoul(buf, 10, &val);
2729         if (err < 0)
2730                 return err;
2731
2732         val = clamp_val(val, 0, 1350000U);
2733         speed = fan_to_reg(val, data->fan_div[nr]);
2734
2735         mutex_lock(&data->update_lock);
2736         data->target_speed[nr] = speed;
2737         pwm_update_registers(data, nr);
2738         mutex_unlock(&data->update_lock);
2739         return count;
2740 }
2741
2742 static ssize_t
2743 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2744                     char *buf)
2745 {
2746         struct nct6775_data *data = nct6775_update_device(dev);
2747         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2748         int nr = sattr->nr;
2749         int index = sattr->index;
2750
2751         return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2752 }
2753
2754 static ssize_t
2755 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2756                      const char *buf, size_t count)
2757 {
2758         struct nct6775_data *data = dev_get_drvdata(dev);
2759         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2760         int nr = sattr->nr;
2761         int index = sattr->index;
2762         unsigned long val;
2763         int err;
2764
2765         err = kstrtoul(buf, 10, &val);
2766         if (err < 0)
2767                 return err;
2768
2769         /* Limit tolerance as needed */
2770         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2771
2772         mutex_lock(&data->update_lock);
2773         data->temp_tolerance[index][nr] = val;
2774         if (index)
2775                 pwm_update_registers(data, nr);
2776         else
2777                 nct6775_write_value(data,
2778                                     data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2779                                     val);
2780         mutex_unlock(&data->update_lock);
2781         return count;
2782 }
2783
2784 /*
2785  * Fan speed tolerance is a tricky beast, since the associated register is
2786  * a tick counter, but the value is reported and configured as rpm.
2787  * Compute resulting low and high rpm values and report the difference.
2788  */
2789 static ssize_t
2790 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2791                      char *buf)
2792 {
2793         struct nct6775_data *data = nct6775_update_device(dev);
2794         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2795         int nr = sattr->index;
2796         int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2797         int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2798         int tolerance;
2799
2800         if (low <= 0)
2801                 low = 1;
2802         if (high > 0xffff)
2803                 high = 0xffff;
2804         if (high < low)
2805                 high = low;
2806
2807         tolerance = (fan_from_reg16(low, data->fan_div[nr])
2808                      - fan_from_reg16(high, data->fan_div[nr])) / 2;
2809
2810         return sprintf(buf, "%d\n", tolerance);
2811 }
2812
2813 static ssize_t
2814 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2815                       const char *buf, size_t count)
2816 {
2817         struct nct6775_data *data = dev_get_drvdata(dev);
2818         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2819         int nr = sattr->index;
2820         unsigned long val;
2821         int err;
2822         int low, high;
2823
2824         err = kstrtoul(buf, 10, &val);
2825         if (err < 0)
2826                 return err;
2827
2828         high = fan_from_reg16(data->target_speed[nr],
2829                               data->fan_div[nr]) + val;
2830         low = fan_from_reg16(data->target_speed[nr],
2831                              data->fan_div[nr]) - val;
2832         if (low <= 0)
2833                 low = 1;
2834         if (high < low)
2835                 high = low;
2836
2837         val = (fan_to_reg(low, data->fan_div[nr]) -
2838                fan_to_reg(high, data->fan_div[nr])) / 2;
2839
2840         /* Limit tolerance as needed */
2841         val = clamp_val(val, 0, data->speed_tolerance_limit);
2842
2843         mutex_lock(&data->update_lock);
2844         data->target_speed_tolerance[nr] = val;
2845         pwm_update_registers(data, nr);
2846         mutex_unlock(&data->update_lock);
2847         return count;
2848 }
2849
2850 SENSOR_TEMPLATE_2(pwm, "pwm%d", S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2851 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", S_IWUSR | S_IRUGO, show_pwm_mode,
2852                 store_pwm_mode, 0);
2853 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", S_IWUSR | S_IRUGO, show_pwm_enable,
2854                 store_pwm_enable, 0);
2855 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", S_IWUSR | S_IRUGO,
2856                 show_pwm_temp_sel, store_pwm_temp_sel, 0);
2857 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", S_IWUSR | S_IRUGO,
2858                 show_target_temp, store_target_temp, 0);
2859 SENSOR_TEMPLATE(fan_target, "fan%d_target", S_IWUSR | S_IRUGO,
2860                 show_target_speed, store_target_speed, 0);
2861 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", S_IWUSR | S_IRUGO,
2862                 show_speed_tolerance, store_speed_tolerance, 0);
2863
2864 /* Smart Fan registers */
2865
2866 static ssize_t
2867 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2868 {
2869         struct nct6775_data *data = nct6775_update_device(dev);
2870         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2871         int nr = sattr->nr;
2872         int index = sattr->index;
2873
2874         return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2875 }
2876
2877 static ssize_t
2878 store_weight_temp(struct device *dev, struct device_attribute *attr,
2879                   const char *buf, size_t count)
2880 {
2881         struct nct6775_data *data = dev_get_drvdata(dev);
2882         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2883         int nr = sattr->nr;
2884         int index = sattr->index;
2885         unsigned long val;
2886         int err;
2887
2888         err = kstrtoul(buf, 10, &val);
2889         if (err < 0)
2890                 return err;
2891
2892         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2893
2894         mutex_lock(&data->update_lock);
2895         data->weight_temp[index][nr] = val;
2896         nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2897         mutex_unlock(&data->update_lock);
2898         return count;
2899 }
2900
2901 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", S_IWUSR | S_IRUGO,
2902                   show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
2903 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step",
2904                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 0);
2905 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol",
2906                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 1);
2907 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base",
2908                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 2);
2909 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step",
2910                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 5);
2911 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base",
2912                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 6);
2913
2914 static ssize_t
2915 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2916 {
2917         struct nct6775_data *data = nct6775_update_device(dev);
2918         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2919         int nr = sattr->nr;
2920         int index = sattr->index;
2921
2922         return sprintf(buf, "%d\n",
2923                        step_time_from_reg(data->fan_time[index][nr],
2924                                           data->pwm_mode[nr]));
2925 }
2926
2927 static ssize_t
2928 store_fan_time(struct device *dev, struct device_attribute *attr,
2929                const char *buf, size_t count)
2930 {
2931         struct nct6775_data *data = dev_get_drvdata(dev);
2932         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2933         int nr = sattr->nr;
2934         int index = sattr->index;
2935         unsigned long val;
2936         int err;
2937
2938         err = kstrtoul(buf, 10, &val);
2939         if (err < 0)
2940                 return err;
2941
2942         val = step_time_to_reg(val, data->pwm_mode[nr]);
2943         mutex_lock(&data->update_lock);
2944         data->fan_time[index][nr] = val;
2945         nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2946         mutex_unlock(&data->update_lock);
2947         return count;
2948 }
2949
2950 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
2951 static ssize_t
2952 show_name(struct device *dev, struct device_attribute *attr, char *buf)
2953 {
2954         struct nct6775_data *data = dev_get_drvdata(dev);
2955
2956         return sprintf(buf, "%s\n", data->name);
2957 }
2958
2959 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
2960 #endif
2961
2962 static ssize_t
2963 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2964 {
2965         struct nct6775_data *data = nct6775_update_device(dev);
2966         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2967
2968         return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2969 }
2970
2971 static ssize_t
2972 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2973                const char *buf, size_t count)
2974 {
2975         struct nct6775_data *data = dev_get_drvdata(dev);
2976         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2977         int nr = sattr->nr;
2978         int point = sattr->index;
2979         unsigned long val;
2980         int err;
2981         u8 reg;
2982
2983         err = kstrtoul(buf, 10, &val);
2984         if (err < 0)
2985                 return err;
2986         if (val > 255)
2987                 return -EINVAL;
2988
2989         if (point == data->auto_pwm_num) {
2990                 if (data->kind != nct6775 && !val)
2991                         return -EINVAL;
2992                 if (data->kind != nct6779 && val)
2993                         val = 0xff;
2994         }
2995
2996         mutex_lock(&data->update_lock);
2997         data->auto_pwm[nr][point] = val;
2998         if (point < data->auto_pwm_num) {
2999                 nct6775_write_value(data,
3000                                     NCT6775_AUTO_PWM(data, nr, point),
3001                                     data->auto_pwm[nr][point]);
3002         } else {
3003                 switch (data->kind) {
3004                 case nct6775:
3005                         /* disable if needed (pwm == 0) */
3006                         reg = nct6775_read_value(data,
3007                                                  NCT6775_REG_CRITICAL_ENAB[nr]);
3008                         if (val)
3009                                 reg |= 0x02;
3010                         else
3011                                 reg &= ~0x02;
3012                         nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
3013                                             reg);
3014                         break;
3015                 case nct6776:
3016                         break; /* always enabled, nothing to do */
3017                 case nct6106:
3018                 case nct6779:
3019                 case nct6791:
3020                 case nct6792:
3021                 case nct6793:
3022                 case nct6795:
3023                         nct6775_write_value(data, data->REG_CRITICAL_PWM[nr],
3024                                             val);
3025                         reg = nct6775_read_value(data,
3026                                         data->REG_CRITICAL_PWM_ENABLE[nr]);
3027                         if (val == 255)
3028                                 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
3029                         else
3030                                 reg |= data->CRITICAL_PWM_ENABLE_MASK;
3031                         nct6775_write_value(data,
3032                                             data->REG_CRITICAL_PWM_ENABLE[nr],
3033                                             reg);
3034                         break;
3035                 }
3036         }
3037         mutex_unlock(&data->update_lock);
3038         return count;
3039 }
3040
3041 static ssize_t
3042 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
3043 {
3044         struct nct6775_data *data = nct6775_update_device(dev);
3045         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3046         int nr = sattr->nr;
3047         int point = sattr->index;
3048
3049         /*
3050          * We don't know for sure if the temperature is signed or unsigned.
3051          * Assume it is unsigned.
3052          */
3053         return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
3054 }
3055
3056 static ssize_t
3057 store_auto_temp(struct device *dev, struct device_attribute *attr,
3058                 const char *buf, size_t count)
3059 {
3060         struct nct6775_data *data = dev_get_drvdata(dev);
3061         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3062         int nr = sattr->nr;
3063         int point = sattr->index;
3064         unsigned long val;
3065         int err;
3066
3067         err = kstrtoul(buf, 10, &val);
3068         if (err)
3069                 return err;
3070         if (val > 255000)
3071                 return -EINVAL;
3072
3073         mutex_lock(&data->update_lock);
3074         data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
3075         if (point < data->auto_pwm_num) {
3076                 nct6775_write_value(data,
3077                                     NCT6775_AUTO_TEMP(data, nr, point),
3078                                     data->auto_temp[nr][point]);
3079         } else {
3080                 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
3081                                     data->auto_temp[nr][point]);
3082         }
3083         mutex_unlock(&data->update_lock);
3084         return count;
3085 }
3086
3087 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
3088                                       struct attribute *attr, int index)
3089 {
3090         struct device *dev = container_of(kobj, struct device, kobj);
3091         struct nct6775_data *data = dev_get_drvdata(dev);
3092         int pwm = index / 36;   /* pwm index */
3093         int nr = index % 36;    /* attribute index */
3094
3095         if (!(data->has_pwm & BIT(pwm)))
3096                 return 0;
3097
3098         if ((nr >= 14 && nr <= 18) || nr == 21)   /* weight */
3099                 if (!data->REG_WEIGHT_TEMP_SEL[pwm])
3100                         return 0;
3101         if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
3102                 return 0;
3103         if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
3104                 return 0;
3105         if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
3106                 return 0;
3107
3108         if (nr >= 22 && nr <= 35) {             /* auto point */
3109                 int api = (nr - 22) / 2;        /* auto point index */
3110
3111                 if (api > data->auto_pwm_num)
3112                         return 0;
3113         }
3114         return attr->mode;
3115 }
3116
3117 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", S_IWUSR | S_IRUGO,
3118                   show_fan_time, store_fan_time, 0, 0);
3119 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", S_IWUSR | S_IRUGO,
3120                   show_fan_time, store_fan_time, 0, 1);
3121 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", S_IWUSR | S_IRUGO,
3122                   show_fan_time, store_fan_time, 0, 2);
3123 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", S_IWUSR | S_IRUGO, show_pwm,
3124                   store_pwm, 0, 1);
3125 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", S_IWUSR | S_IRUGO, show_pwm,
3126                   store_pwm, 0, 2);
3127 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", S_IWUSR | S_IRUGO,
3128                   show_temp_tolerance, store_temp_tolerance, 0, 0);
3129 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance",
3130                   S_IWUSR | S_IRUGO, show_temp_tolerance, store_temp_tolerance,
3131                   0, 1);
3132
3133 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", S_IWUSR | S_IRUGO, show_pwm, store_pwm,
3134                   0, 3);
3135
3136 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", S_IWUSR | S_IRUGO, show_pwm,
3137                   store_pwm, 0, 4);
3138
3139 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm",
3140                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 0);
3141 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp",
3142                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 0);
3143
3144 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm",
3145                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 1);
3146 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp",
3147                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 1);
3148
3149 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm",
3150                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 2);
3151 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp",
3152                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 2);
3153
3154 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm",
3155                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 3);
3156 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp",
3157                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 3);
3158
3159 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm",
3160                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 4);
3161 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp",
3162                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 4);
3163
3164 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm",
3165                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 5);
3166 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp",
3167                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 5);
3168
3169 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm",
3170                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 6);
3171 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp",
3172                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 6);
3173
3174 /*
3175  * nct6775_pwm_is_visible uses the index into the following array
3176  * to determine if attributes should be created or not.
3177  * Any change in order or content must be matched.
3178  */
3179 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
3180         &sensor_dev_template_pwm,
3181         &sensor_dev_template_pwm_mode,
3182         &sensor_dev_template_pwm_enable,
3183         &sensor_dev_template_pwm_temp_sel,
3184         &sensor_dev_template_pwm_temp_tolerance,
3185         &sensor_dev_template_pwm_crit_temp_tolerance,
3186         &sensor_dev_template_pwm_target_temp,
3187         &sensor_dev_template_fan_target,
3188         &sensor_dev_template_fan_tolerance,
3189         &sensor_dev_template_pwm_stop_time,
3190         &sensor_dev_template_pwm_step_up_time,
3191         &sensor_dev_template_pwm_step_down_time,
3192         &sensor_dev_template_pwm_start,
3193         &sensor_dev_template_pwm_floor,
3194         &sensor_dev_template_pwm_weight_temp_sel,       /* 14 */
3195         &sensor_dev_template_pwm_weight_temp_step,
3196         &sensor_dev_template_pwm_weight_temp_step_tol,
3197         &sensor_dev_template_pwm_weight_temp_step_base,
3198         &sensor_dev_template_pwm_weight_duty_step,      /* 18 */
3199         &sensor_dev_template_pwm_max,                   /* 19 */
3200         &sensor_dev_template_pwm_step,                  /* 20 */
3201         &sensor_dev_template_pwm_weight_duty_base,      /* 21 */
3202         &sensor_dev_template_pwm_auto_point1_pwm,       /* 22 */
3203         &sensor_dev_template_pwm_auto_point1_temp,
3204         &sensor_dev_template_pwm_auto_point2_pwm,
3205         &sensor_dev_template_pwm_auto_point2_temp,
3206         &sensor_dev_template_pwm_auto_point3_pwm,
3207         &sensor_dev_template_pwm_auto_point3_temp,
3208         &sensor_dev_template_pwm_auto_point4_pwm,
3209         &sensor_dev_template_pwm_auto_point4_temp,
3210         &sensor_dev_template_pwm_auto_point5_pwm,
3211         &sensor_dev_template_pwm_auto_point5_temp,
3212         &sensor_dev_template_pwm_auto_point6_pwm,
3213         &sensor_dev_template_pwm_auto_point6_temp,
3214         &sensor_dev_template_pwm_auto_point7_pwm,
3215         &sensor_dev_template_pwm_auto_point7_temp,      /* 35 */
3216
3217         NULL
3218 };
3219
3220 static const struct sensor_template_group nct6775_pwm_template_group = {
3221         .templates = nct6775_attributes_pwm_template,
3222         .is_visible = nct6775_pwm_is_visible,
3223         .base = 1,
3224 };
3225
3226 static ssize_t
3227 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
3228 {
3229         struct nct6775_data *data = dev_get_drvdata(dev);
3230
3231         return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
3232 }
3233
3234 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
3235
3236 /* Case open detection */
3237
3238 static ssize_t
3239 clear_caseopen(struct device *dev, struct device_attribute *attr,
3240                const char *buf, size_t count)
3241 {
3242         struct nct6775_data *data = dev_get_drvdata(dev);
3243         int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
3244         unsigned long val;
3245         u8 reg;
3246         int ret;
3247
3248         if (kstrtoul(buf, 10, &val) || val != 0)
3249                 return -EINVAL;
3250
3251         mutex_lock(&data->update_lock);
3252
3253         /*
3254          * Use CR registers to clear caseopen status.
3255          * The CR registers are the same for all chips, and not all chips
3256          * support clearing the caseopen status through "regular" registers.
3257          */
3258         ret = superio_enter(data->sioreg);
3259         if (ret) {
3260                 count = ret;
3261                 goto error;
3262         }
3263
3264         superio_select(data->sioreg, NCT6775_LD_ACPI);
3265         reg = superio_inb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
3266         reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3267         superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3268         reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3269         superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3270         superio_exit(data->sioreg);
3271
3272         data->valid = false;    /* Force cache refresh */
3273 error:
3274         mutex_unlock(&data->update_lock);
3275         return count;
3276 }
3277
3278 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
3279                           clear_caseopen, INTRUSION_ALARM_BASE);
3280 static SENSOR_DEVICE_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
3281                           clear_caseopen, INTRUSION_ALARM_BASE + 1);
3282 static SENSOR_DEVICE_ATTR(intrusion0_beep, S_IWUSR | S_IRUGO, show_beep,
3283                           store_beep, INTRUSION_ALARM_BASE);
3284 static SENSOR_DEVICE_ATTR(intrusion1_beep, S_IWUSR | S_IRUGO, show_beep,
3285                           store_beep, INTRUSION_ALARM_BASE + 1);
3286 static SENSOR_DEVICE_ATTR(beep_enable, S_IWUSR | S_IRUGO, show_beep,
3287                           store_beep, BEEP_ENABLE_BASE);
3288
3289 static umode_t nct6775_other_is_visible(struct kobject *kobj,
3290                                         struct attribute *attr, int index)
3291 {
3292         struct device *dev = container_of(kobj, struct device, kobj);
3293         struct nct6775_data *data = dev_get_drvdata(dev);
3294
3295         if (index == 0 && !data->have_vid)
3296                 return 0;
3297
3298         if (index == 1 || index == 2) {
3299                 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + index - 1] < 0)
3300                         return 0;
3301         }
3302
3303         if (index == 3 || index == 4) {
3304                 if (data->BEEP_BITS[INTRUSION_ALARM_BASE + index - 3] < 0)
3305                         return 0;
3306         }
3307
3308         return attr->mode;
3309 }
3310
3311 /*
3312  * nct6775_other_is_visible uses the index into the following array
3313  * to determine if attributes should be created or not.
3314  * Any change in order or content must be matched.
3315  */
3316 static struct attribute *nct6775_attributes_other[] = {
3317         &dev_attr_cpu0_vid.attr,                                /* 0 */
3318         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,        /* 1 */
3319         &sensor_dev_attr_intrusion1_alarm.dev_attr.attr,        /* 2 */
3320         &sensor_dev_attr_intrusion0_beep.dev_attr.attr,         /* 3 */
3321         &sensor_dev_attr_intrusion1_beep.dev_attr.attr,         /* 4 */
3322         &sensor_dev_attr_beep_enable.dev_attr.attr,             /* 5 */
3323 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
3324         &dev_attr_name.attr,
3325 #endif
3326         NULL
3327 };
3328
3329 static const struct attribute_group nct6775_group_other = {
3330         .attrs = nct6775_attributes_other,
3331         .is_visible = nct6775_other_is_visible,
3332 };
3333
3334 static inline void nct6775_init_device(struct nct6775_data *data)
3335 {
3336         int i;
3337         u8 tmp, diode;
3338
3339         /* Start monitoring if needed */
3340         if (data->REG_CONFIG) {
3341                 tmp = nct6775_read_value(data, data->REG_CONFIG);
3342                 if (!(tmp & 0x01))
3343                         nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
3344         }
3345
3346         /* Enable temperature sensors if needed */
3347         for (i = 0; i < NUM_TEMP; i++) {
3348                 if (!(data->have_temp & BIT(i)))
3349                         continue;
3350                 if (!data->reg_temp_config[i])
3351                         continue;
3352                 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
3353                 if (tmp & 0x01)
3354                         nct6775_write_value(data, data->reg_temp_config[i],
3355                                             tmp & 0xfe);
3356         }
3357
3358         /* Enable VBAT monitoring if needed */
3359         tmp = nct6775_read_value(data, data->REG_VBAT);
3360         if (!(tmp & 0x01))
3361                 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
3362
3363         diode = nct6775_read_value(data, data->REG_DIODE);
3364
3365         for (i = 0; i < data->temp_fixed_num; i++) {
3366                 if (!(data->have_temp_fixed & BIT(i)))
3367                         continue;
3368                 if ((tmp & (data->DIODE_MASK << i)))    /* diode */
3369                         data->temp_type[i]
3370                           = 3 - ((diode >> i) & data->DIODE_MASK);
3371                 else                            /* thermistor */
3372                         data->temp_type[i] = 4;
3373         }
3374 }
3375
3376 static void
3377 nct6775_check_fan_inputs(struct nct6775_data *data)
3378 {
3379         bool fan3pin, fan4pin, fan4min, fan5pin, fan6pin;
3380         bool pwm3pin, pwm4pin, pwm5pin, pwm6pin;
3381         int sioreg = data->sioreg;
3382         int regval;
3383
3384         /* Store SIO_REG_ENABLE for use during resume */
3385         superio_select(sioreg, NCT6775_LD_HWM);
3386         data->sio_reg_enable = superio_inb(sioreg, SIO_REG_ENABLE);
3387
3388         /* fan4 and fan5 share some pins with the GPIO and serial flash */
3389         if (data->kind == nct6775) {
3390                 regval = superio_inb(sioreg, 0x2c);
3391
3392                 fan3pin = regval & BIT(6);
3393                 pwm3pin = regval & BIT(7);
3394
3395                 /* On NCT6775, fan4 shares pins with the fdc interface */
3396                 fan4pin = !(superio_inb(sioreg, 0x2A) & 0x80);
3397                 fan4min = false;
3398                 fan5pin = false;
3399                 fan6pin = false;
3400                 pwm4pin = false;
3401                 pwm5pin = false;
3402                 pwm6pin = false;
3403         } else if (data->kind == nct6776) {
3404                 bool gpok = superio_inb(sioreg, 0x27) & 0x80;
3405                 const char *board_vendor, *board_name;
3406
3407                 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
3408                 board_name = dmi_get_system_info(DMI_BOARD_NAME);
3409
3410                 if (board_name && board_vendor &&
3411                     !strcmp(board_vendor, "ASRock")) {
3412                         /*
3413                          * Auxiliary fan monitoring is not enabled on ASRock
3414                          * Z77 Pro4-M if booted in UEFI Ultra-FastBoot mode.
3415                          * Observed with BIOS version 2.00.
3416                          */
3417                         if (!strcmp(board_name, "Z77 Pro4-M")) {
3418                                 if ((data->sio_reg_enable & 0xe0) != 0xe0) {
3419                                         data->sio_reg_enable |= 0xe0;
3420                                         superio_outb(sioreg, SIO_REG_ENABLE,
3421                                                      data->sio_reg_enable);
3422                                 }
3423                         }
3424                 }
3425
3426                 if (data->sio_reg_enable & 0x80)
3427                         fan3pin = gpok;
3428                 else
3429                         fan3pin = !(superio_inb(sioreg, 0x24) & 0x40);
3430
3431                 if (data->sio_reg_enable & 0x40)
3432                         fan4pin = gpok;
3433                 else
3434                         fan4pin = superio_inb(sioreg, 0x1C) & 0x01;
3435
3436                 if (data->sio_reg_enable & 0x20)
3437                         fan5pin = gpok;
3438                 else
3439                         fan5pin = superio_inb(sioreg, 0x1C) & 0x02;
3440
3441                 fan4min = fan4pin;
3442                 fan6pin = false;
3443                 pwm3pin = fan3pin;
3444                 pwm4pin = false;
3445                 pwm5pin = false;
3446                 pwm6pin = false;
3447         } else if (data->kind == nct6106) {
3448                 regval = superio_inb(sioreg, 0x24);
3449                 fan3pin = !(regval & 0x80);
3450                 pwm3pin = regval & 0x08;
3451
3452                 fan4pin = false;
3453                 fan4min = false;
3454                 fan5pin = false;
3455                 fan6pin = false;
3456                 pwm4pin = false;
3457                 pwm5pin = false;
3458                 pwm6pin = false;
3459         } else { /* NCT6779D, NCT6791D, NCT6792D, NCT6793D, NCT6795D */
3460                 int regval_1b, regval_2a, regval_eb;
3461
3462                 regval = superio_inb(sioreg, 0x1c);
3463
3464                 fan3pin = !(regval & BIT(5));
3465                 fan4pin = !(regval & BIT(6));
3466                 fan5pin = !(regval & BIT(7));
3467
3468                 pwm3pin = !(regval & BIT(0));
3469                 pwm4pin = !(regval & BIT(1));
3470                 pwm5pin = !(regval & BIT(2));
3471
3472                 regval = superio_inb(sioreg, 0x2d);
3473                 switch (data->kind) {
3474                 case nct6791:
3475                 case nct6792:
3476                         fan6pin = regval & BIT(1);
3477                         pwm6pin = regval & BIT(0);
3478                         break;
3479                 case nct6793:
3480                 case nct6795:
3481                         regval_1b = superio_inb(sioreg, 0x1b);
3482                         regval_2a = superio_inb(sioreg, 0x2a);
3483
3484                         if (!pwm5pin)
3485                                 pwm5pin = regval & BIT(7);
3486                         fan6pin = regval & BIT(1);
3487                         pwm6pin = regval & BIT(0);
3488                         if (!fan5pin)
3489                                 fan5pin = regval_1b & BIT(5);
3490
3491                         superio_select(sioreg, NCT6775_LD_12);
3492                         regval_eb = superio_inb(sioreg, 0xeb);
3493                         if (!fan5pin)
3494                                 fan5pin = regval_eb & BIT(5);
3495                         if (!pwm5pin)
3496                                 pwm5pin = (regval_eb & BIT(4)) &&
3497                                            !(regval_2a & BIT(0));
3498                         if (!fan6pin)
3499                                 fan6pin = regval_eb & BIT(3);
3500                         if (!pwm6pin)
3501                                 pwm6pin = regval_eb & BIT(2);
3502                         break;
3503                 default:        /* NCT6779D */
3504                         fan6pin = false;
3505                         pwm6pin = false;
3506                         break;
3507                 }
3508
3509                 fan4min = fan4pin;
3510         }
3511
3512         /* fan 1 and 2 (0x03) are always present */
3513         data->has_fan = 0x03 | (fan3pin << 2) | (fan4pin << 3) |
3514                 (fan5pin << 4) | (fan6pin << 5);
3515         data->has_fan_min = 0x03 | (fan3pin << 2) | (fan4min << 3) |
3516                 (fan5pin << 4);
3517         data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) |
3518                 (pwm5pin << 4) | (pwm6pin << 5);
3519 }
3520
3521 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
3522                              int *available, int *mask)
3523 {
3524         int i;
3525         u8 src;
3526
3527         for (i = 0; i < data->pwm_num && *available; i++) {
3528                 int index;
3529
3530                 if (!regp[i])
3531                         continue;
3532                 src = nct6775_read_value(data, regp[i]);
3533                 src &= 0x1f;
3534                 if (!src || (*mask & BIT(src)))
3535                         continue;
3536                 if (!(data->temp_mask & BIT(src)))
3537                         continue;
3538
3539                 index = __ffs(*available);
3540                 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3541                 *available &= ~BIT(index);
3542                 *mask |= BIT(src);
3543         }
3544 }
3545
3546 static int nct6775_probe(struct platform_device *pdev)
3547 {
3548         struct device *dev = &pdev->dev;
3549         struct nct6775_sio_data *sio_data = dev_get_platdata(dev);
3550         struct nct6775_data *data;
3551         struct resource *res;
3552         int i, s, err = 0;
3553         int src, mask, available;
3554         const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3555         const u16 *reg_temp_mon, *reg_temp_alternate, *reg_temp_crit;
3556         const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL;
3557         int num_reg_temp, num_reg_temp_mon;
3558         u8 cr2a;
3559         struct attribute_group *group;
3560         struct device *hwmon_dev;
3561         int num_attr_groups = 0;
3562
3563         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3564         if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3565                                  DRVNAME))
3566                 return -EBUSY;
3567
3568         data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3569                             GFP_KERNEL);
3570         if (!data)
3571                 return -ENOMEM;
3572
3573         data->kind = sio_data->kind;
3574         data->sioreg = sio_data->sioreg;
3575         data->addr = res->start;
3576         mutex_init(&data->update_lock);
3577         data->name = nct6775_device_names[data->kind];
3578         data->bank = 0xff;              /* Force initial bank selection */
3579         platform_set_drvdata(pdev, data);
3580
3581         switch (data->kind) {
3582         case nct6106:
3583                 data->in_num = 9;
3584                 data->pwm_num = 3;
3585                 data->auto_pwm_num = 4;
3586                 data->temp_fixed_num = 3;
3587                 data->num_temp_alarms = 6;
3588                 data->num_temp_beeps = 6;
3589
3590                 data->fan_from_reg = fan_from_reg13;
3591                 data->fan_from_reg_min = fan_from_reg13;
3592
3593                 data->temp_label = nct6776_temp_label;
3594                 data->temp_mask = NCT6776_TEMP_MASK;
3595
3596                 data->REG_VBAT = NCT6106_REG_VBAT;
3597                 data->REG_DIODE = NCT6106_REG_DIODE;
3598                 data->DIODE_MASK = NCT6106_DIODE_MASK;
3599                 data->REG_VIN = NCT6106_REG_IN;
3600                 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3601                 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3602                 data->REG_TARGET = NCT6106_REG_TARGET;
3603                 data->REG_FAN = NCT6106_REG_FAN;
3604                 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
3605                 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
3606                 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
3607                 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
3608                 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
3609                 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
3610                 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
3611                 data->REG_PWM[0] = NCT6106_REG_PWM;
3612                 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
3613                 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
3614                 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3615                 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3616                 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3617                 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3618                 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3619                 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
3620                 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
3621                 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
3622                 data->REG_CRITICAL_TEMP_TOLERANCE
3623                   = NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
3624                 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
3625                 data->CRITICAL_PWM_ENABLE_MASK
3626                   = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3627                 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
3628                 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3629                 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3630                 data->REG_TEMP_SEL = NCT6106_REG_TEMP_SEL;
3631                 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3632                 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3633                 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3634                 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3635                 data->REG_ALARM = NCT6106_REG_ALARM;
3636                 data->ALARM_BITS = NCT6106_ALARM_BITS;
3637                 data->REG_BEEP = NCT6106_REG_BEEP;
3638                 data->BEEP_BITS = NCT6106_BEEP_BITS;
3639
3640                 reg_temp = NCT6106_REG_TEMP;
3641                 reg_temp_mon = NCT6106_REG_TEMP_MON;
3642                 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3643                 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON);
3644                 reg_temp_over = NCT6106_REG_TEMP_OVER;
3645                 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3646                 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3647                 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3648                 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3649                 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3650                 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3651
3652                 break;
3653         case nct6775:
3654                 data->in_num = 9;
3655                 data->pwm_num = 3;
3656                 data->auto_pwm_num = 6;
3657                 data->has_fan_div = true;
3658                 data->temp_fixed_num = 3;
3659                 data->num_temp_alarms = 3;
3660                 data->num_temp_beeps = 3;
3661
3662                 data->ALARM_BITS = NCT6775_ALARM_BITS;
3663                 data->BEEP_BITS = NCT6775_BEEP_BITS;
3664
3665                 data->fan_from_reg = fan_from_reg16;
3666                 data->fan_from_reg_min = fan_from_reg8;
3667                 data->target_temp_mask = 0x7f;
3668                 data->tolerance_mask = 0x0f;
3669                 data->speed_tolerance_limit = 15;
3670
3671                 data->temp_label = nct6775_temp_label;
3672                 data->temp_mask = NCT6775_TEMP_MASK;
3673
3674                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3675                 data->REG_VBAT = NCT6775_REG_VBAT;
3676                 data->REG_DIODE = NCT6775_REG_DIODE;
3677                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3678                 data->REG_VIN = NCT6775_REG_IN;
3679                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3680                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3681                 data->REG_TARGET = NCT6775_REG_TARGET;
3682                 data->REG_FAN = NCT6775_REG_FAN;
3683                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3684                 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3685                 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3686                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3687                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3688                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3689                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3690                 data->REG_PWM[0] = NCT6775_REG_PWM;
3691                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3692                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3693                 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3694                 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3695                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3696                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3697                 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3698                 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3699                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3700                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3701                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3702                 data->REG_CRITICAL_TEMP_TOLERANCE
3703                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3704                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3705                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3706                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3707                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3708                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3709                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3710                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3711                 data->REG_ALARM = NCT6775_REG_ALARM;
3712                 data->REG_BEEP = NCT6775_REG_BEEP;
3713
3714                 reg_temp = NCT6775_REG_TEMP;
3715                 reg_temp_mon = NCT6775_REG_TEMP_MON;
3716                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3717                 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3718                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3719                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3720                 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3721                 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3722                 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3723
3724                 break;
3725         case nct6776:
3726                 data->in_num = 9;
3727                 data->pwm_num = 3;
3728                 data->auto_pwm_num = 4;
3729                 data->has_fan_div = false;
3730                 data->temp_fixed_num = 3;
3731                 data->num_temp_alarms = 3;
3732                 data->num_temp_beeps = 6;
3733
3734                 data->ALARM_BITS = NCT6776_ALARM_BITS;
3735                 data->BEEP_BITS = NCT6776_BEEP_BITS;
3736
3737                 data->fan_from_reg = fan_from_reg13;
3738                 data->fan_from_reg_min = fan_from_reg13;
3739                 data->target_temp_mask = 0xff;
3740                 data->tolerance_mask = 0x07;
3741                 data->speed_tolerance_limit = 63;
3742
3743                 data->temp_label = nct6776_temp_label;
3744                 data->temp_mask = NCT6776_TEMP_MASK;
3745
3746                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3747                 data->REG_VBAT = NCT6775_REG_VBAT;
3748                 data->REG_DIODE = NCT6775_REG_DIODE;
3749                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3750                 data->REG_VIN = NCT6775_REG_IN;
3751                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3752                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3753                 data->REG_TARGET = NCT6775_REG_TARGET;
3754                 data->REG_FAN = NCT6775_REG_FAN;
3755                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3756                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3757                 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3758                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3759                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3760                 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3761                 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3762                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3763                 data->REG_PWM[0] = NCT6775_REG_PWM;
3764                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3765                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3766                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3767                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3768                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3769                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3770                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3771                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3772                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3773                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3774                 data->REG_CRITICAL_TEMP_TOLERANCE
3775                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3776                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3777                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3778                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3779                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3780                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3781                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3782                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3783                 data->REG_ALARM = NCT6775_REG_ALARM;
3784                 data->REG_BEEP = NCT6776_REG_BEEP;
3785
3786                 reg_temp = NCT6775_REG_TEMP;
3787                 reg_temp_mon = NCT6775_REG_TEMP_MON;
3788                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3789                 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3790                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3791                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3792                 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3793                 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3794                 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3795
3796                 break;
3797         case nct6779:
3798                 data->in_num = 15;
3799                 data->pwm_num = 5;
3800                 data->auto_pwm_num = 4;
3801                 data->has_fan_div = false;
3802                 data->temp_fixed_num = 6;
3803                 data->num_temp_alarms = 2;
3804                 data->num_temp_beeps = 2;
3805
3806                 data->ALARM_BITS = NCT6779_ALARM_BITS;
3807                 data->BEEP_BITS = NCT6779_BEEP_BITS;
3808
3809                 data->fan_from_reg = fan_from_reg13;
3810                 data->fan_from_reg_min = fan_from_reg13;
3811                 data->target_temp_mask = 0xff;
3812                 data->tolerance_mask = 0x07;
3813                 data->speed_tolerance_limit = 63;
3814
3815                 data->temp_label = nct6779_temp_label;
3816                 data->temp_mask = NCT6779_TEMP_MASK;
3817
3818                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3819                 data->REG_VBAT = NCT6775_REG_VBAT;
3820                 data->REG_DIODE = NCT6775_REG_DIODE;
3821                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3822                 data->REG_VIN = NCT6779_REG_IN;
3823                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3824                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3825                 data->REG_TARGET = NCT6775_REG_TARGET;
3826                 data->REG_FAN = NCT6779_REG_FAN;
3827                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3828                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3829                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3830                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3831                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3832                 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3833                 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3834                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3835                 data->REG_PWM[0] = NCT6775_REG_PWM;
3836                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3837                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3838                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3839                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3840                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3841                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3842                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3843                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3844                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3845                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3846                 data->REG_CRITICAL_TEMP_TOLERANCE
3847                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3848                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3849                 data->CRITICAL_PWM_ENABLE_MASK
3850                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3851                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3852                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3853                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3854                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3855                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3856                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3857                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3858                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3859                 data->REG_ALARM = NCT6779_REG_ALARM;
3860                 data->REG_BEEP = NCT6776_REG_BEEP;
3861
3862                 reg_temp = NCT6779_REG_TEMP;
3863                 reg_temp_mon = NCT6779_REG_TEMP_MON;
3864                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3865                 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3866                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3867                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3868                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3869                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3870                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3871
3872                 break;
3873         case nct6791:
3874         case nct6792:
3875         case nct6793:
3876         case nct6795:
3877                 data->in_num = 15;
3878                 data->pwm_num = 6;
3879                 data->auto_pwm_num = 4;
3880                 data->has_fan_div = false;
3881                 data->temp_fixed_num = 6;
3882                 data->num_temp_alarms = 2;
3883                 data->num_temp_beeps = 2;
3884
3885                 data->ALARM_BITS = NCT6791_ALARM_BITS;
3886                 data->BEEP_BITS = NCT6779_BEEP_BITS;
3887
3888                 data->fan_from_reg = fan_from_reg13;
3889                 data->fan_from_reg_min = fan_from_reg13;
3890                 data->target_temp_mask = 0xff;
3891                 data->tolerance_mask = 0x07;
3892                 data->speed_tolerance_limit = 63;
3893
3894                 switch (data->kind) {
3895                 default:
3896                 case nct6791:
3897                         data->temp_label = nct6779_temp_label;
3898                         data->temp_mask = NCT6791_TEMP_MASK;
3899                         break;
3900                 case nct6792:
3901                         data->temp_label = nct6792_temp_label;
3902                         data->temp_mask = NCT6792_TEMP_MASK;
3903                         break;
3904                 case nct6793:
3905                         data->temp_label = nct6793_temp_label;
3906                         data->temp_mask = NCT6793_TEMP_MASK;
3907                         break;
3908                 case nct6795:
3909                         data->temp_label = nct6795_temp_label;
3910                         data->temp_mask = NCT6795_TEMP_MASK;
3911                         break;
3912                 }
3913
3914                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3915                 data->REG_VBAT = NCT6775_REG_VBAT;
3916                 data->REG_DIODE = NCT6775_REG_DIODE;
3917                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3918                 data->REG_VIN = NCT6779_REG_IN;
3919                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3920                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3921                 data->REG_TARGET = NCT6775_REG_TARGET;
3922                 data->REG_FAN = NCT6779_REG_FAN;
3923                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3924                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3925                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3926                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3927                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3928                 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3929                 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3930                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3931                 data->REG_PWM[0] = NCT6775_REG_PWM;
3932                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3933                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3934                 data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP;
3935                 data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE;
3936                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3937                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3938                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3939                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3940                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3941                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3942                 data->REG_CRITICAL_TEMP_TOLERANCE
3943                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3944                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3945                 data->CRITICAL_PWM_ENABLE_MASK
3946                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3947                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3948                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3949                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3950                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3951                 data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL;
3952                 data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP;
3953                 data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL;
3954                 data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE;
3955                 data->REG_ALARM = NCT6791_REG_ALARM;
3956                 if (data->kind == nct6791)
3957                         data->REG_BEEP = NCT6776_REG_BEEP;
3958                 else
3959                         data->REG_BEEP = NCT6792_REG_BEEP;
3960
3961                 reg_temp = NCT6779_REG_TEMP;
3962                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3963                 if (data->kind == nct6791) {
3964                         reg_temp_mon = NCT6779_REG_TEMP_MON;
3965                         num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3966                 } else {
3967                         reg_temp_mon = NCT6792_REG_TEMP_MON;
3968                         num_reg_temp_mon = ARRAY_SIZE(NCT6792_REG_TEMP_MON);
3969                 }
3970                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3971                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3972                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3973                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3974                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3975
3976                 break;
3977         default:
3978                 return -ENODEV;
3979         }
3980         data->have_in = BIT(data->in_num) - 1;
3981         data->have_temp = 0;
3982
3983         /*
3984          * On some boards, not all available temperature sources are monitored,
3985          * even though some of the monitoring registers are unused.
3986          * Get list of unused monitoring registers, then detect if any fan
3987          * controls are configured to use unmonitored temperature sources.
3988          * If so, assign the unmonitored temperature sources to available
3989          * monitoring registers.
3990          */
3991         mask = 0;
3992         available = 0;
3993         for (i = 0; i < num_reg_temp; i++) {
3994                 if (reg_temp[i] == 0)
3995                         continue;
3996
3997                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3998                 if (!src || (mask & BIT(src)))
3999                         available |= BIT(i);
4000
4001                 mask |= BIT(src);
4002         }
4003
4004         /*
4005          * Now find unmonitored temperature registers and enable monitoring
4006          * if additional monitoring registers are available.
4007          */
4008         add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
4009         add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
4010
4011         mask = 0;
4012         s = NUM_TEMP_FIXED;     /* First dynamic temperature attribute */
4013         for (i = 0; i < num_reg_temp; i++) {
4014                 if (reg_temp[i] == 0)
4015                         continue;
4016
4017                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
4018                 if (!src || (mask & BIT(src)))
4019                         continue;
4020
4021                 if (!(data->temp_mask & BIT(src))) {
4022                         dev_info(dev,
4023                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
4024                                  src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
4025                         continue;
4026                 }
4027
4028                 mask |= BIT(src);
4029
4030                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
4031                 if (src <= data->temp_fixed_num) {
4032                         data->have_temp |= BIT(src - 1);
4033                         data->have_temp_fixed |= BIT(src - 1);
4034                         data->reg_temp[0][src - 1] = reg_temp[i];
4035                         data->reg_temp[1][src - 1] = reg_temp_over[i];
4036                         data->reg_temp[2][src - 1] = reg_temp_hyst[i];
4037                         if (reg_temp_crit_h && reg_temp_crit_h[i])
4038                                 data->reg_temp[3][src - 1] = reg_temp_crit_h[i];
4039                         else if (reg_temp_crit[src - 1])
4040                                 data->reg_temp[3][src - 1]
4041                                   = reg_temp_crit[src - 1];
4042                         if (reg_temp_crit_l && reg_temp_crit_l[i])
4043                                 data->reg_temp[4][src - 1] = reg_temp_crit_l[i];
4044                         data->reg_temp_config[src - 1] = reg_temp_config[i];
4045                         data->temp_src[src - 1] = src;
4046                         continue;
4047                 }
4048
4049                 if (s >= NUM_TEMP)
4050                         continue;
4051
4052                 /* Use dynamic index for other sources */
4053                 data->have_temp |= BIT(s);
4054                 data->reg_temp[0][s] = reg_temp[i];
4055                 data->reg_temp[1][s] = reg_temp_over[i];
4056                 data->reg_temp[2][s] = reg_temp_hyst[i];
4057                 data->reg_temp_config[s] = reg_temp_config[i];
4058                 if (reg_temp_crit_h && reg_temp_crit_h[i])
4059                         data->reg_temp[3][s] = reg_temp_crit_h[i];
4060                 else if (reg_temp_crit[src - 1])
4061                         data->reg_temp[3][s] = reg_temp_crit[src - 1];
4062                 if (reg_temp_crit_l && reg_temp_crit_l[i])
4063                         data->reg_temp[4][s] = reg_temp_crit_l[i];
4064
4065                 data->temp_src[s] = src;
4066                 s++;
4067         }
4068
4069         /*
4070          * Repeat with temperatures used for fan control.
4071          * This set of registers does not support limits.
4072          */
4073         for (i = 0; i < num_reg_temp_mon; i++) {
4074                 if (reg_temp_mon[i] == 0)
4075                         continue;
4076
4077                 src = nct6775_read_value(data, data->REG_TEMP_SEL[i]) & 0x1f;
4078                 if (!src)
4079                         continue;
4080
4081                 if (!(data->temp_mask & BIT(src))) {
4082                         dev_info(dev,
4083                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
4084                                  src, i, data->REG_TEMP_SEL[i],
4085                                  reg_temp_mon[i]);
4086                         continue;
4087                 }
4088
4089                 /*
4090                  * For virtual temperature sources, the 'virtual' temperature
4091                  * for each fan reflects a different temperature, and there
4092                  * are no duplicates.
4093                  */
4094                 if (src != TEMP_SOURCE_VIRTUAL) {
4095                         if (mask & BIT(src))
4096                                 continue;
4097                         mask |= BIT(src);
4098                 }
4099
4100                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
4101                 if (src <= data->temp_fixed_num) {
4102                         if (data->have_temp & BIT(src - 1))
4103                                 continue;
4104                         data->have_temp |= BIT(src - 1);
4105                         data->have_temp_fixed |= BIT(src - 1);
4106                         data->reg_temp[0][src - 1] = reg_temp_mon[i];
4107                         data->temp_src[src - 1] = src;
4108                         continue;
4109                 }
4110
4111                 if (s >= NUM_TEMP)
4112                         continue;
4113
4114                 /* Use dynamic index for other sources */
4115                 data->have_temp |= BIT(s);
4116                 data->reg_temp[0][s] = reg_temp_mon[i];
4117                 data->temp_src[s] = src;
4118                 s++;
4119         }
4120
4121 #ifdef USE_ALTERNATE
4122         /*
4123          * Go through the list of alternate temp registers and enable
4124          * if possible.
4125          * The temperature is already monitored if the respective bit in <mask>
4126          * is set.
4127          */
4128         for (i = 0; i < 32; i++) {
4129                 if (!(data->temp_mask & BIT(i)))
4130                         continue;
4131                 if (!reg_temp_alternate[i])
4132                         continue;
4133                 if (mask & BIT(i + 1))
4134                         continue;
4135                 if (i < data->temp_fixed_num) {
4136                         if (data->have_temp & BIT(i))
4137                                 continue;
4138                         data->have_temp |= BIT(i);
4139                         data->have_temp_fixed |= BIT(i);
4140                         data->reg_temp[0][i] = reg_temp_alternate[i];
4141                         if (i < num_reg_temp) {
4142                                 data->reg_temp[1][i] = reg_temp_over[i];
4143                                 data->reg_temp[2][i] = reg_temp_hyst[i];
4144                         }
4145                         data->temp_src[i] = i + 1;
4146                         continue;
4147                 }
4148
4149                 if (s >= NUM_TEMP)      /* Abort if no more space */
4150                         break;
4151
4152                 data->have_temp |= BIT(s);
4153                 data->reg_temp[0][s] = reg_temp_alternate[i];
4154                 data->temp_src[s] = i + 1;
4155                 s++;
4156         }
4157 #endif /* USE_ALTERNATE */
4158
4159         /* Initialize the chip */
4160         nct6775_init_device(data);
4161
4162         err = superio_enter(sio_data->sioreg);
4163         if (err)
4164                 return err;
4165
4166         cr2a = superio_inb(sio_data->sioreg, 0x2a);
4167         switch (data->kind) {
4168         case nct6775:
4169                 data->have_vid = (cr2a & 0x40);
4170                 break;
4171         case nct6776:
4172                 data->have_vid = (cr2a & 0x60) == 0x40;
4173                 break;
4174         case nct6106:
4175         case nct6779:
4176         case nct6791:
4177         case nct6792:
4178         case nct6793:
4179         case nct6795:
4180                 break;
4181         }
4182
4183         /*
4184          * Read VID value
4185          * We can get the VID input values directly at logical device D 0xe3.
4186          */
4187         if (data->have_vid) {
4188                 superio_select(sio_data->sioreg, NCT6775_LD_VID);
4189                 data->vid = superio_inb(sio_data->sioreg, 0xe3);
4190                 data->vrm = vid_which_vrm();
4191         }
4192
4193         if (fan_debounce) {
4194                 u8 tmp;
4195
4196                 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
4197                 tmp = superio_inb(sio_data->sioreg,
4198                                   NCT6775_REG_CR_FAN_DEBOUNCE);
4199                 switch (data->kind) {
4200                 case nct6106:
4201                         tmp |= 0xe0;
4202                         break;
4203                 case nct6775:
4204                         tmp |= 0x1e;
4205                         break;
4206                 case nct6776:
4207                 case nct6779:
4208                         tmp |= 0x3e;
4209                         break;
4210                 case nct6791:
4211                 case nct6792:
4212                 case nct6793:
4213                 case nct6795:
4214                         tmp |= 0x7e;
4215                         break;
4216                 }
4217                 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
4218                              tmp);
4219                 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
4220                          data->name);
4221         }
4222
4223         nct6775_check_fan_inputs(data);
4224
4225         superio_exit(sio_data->sioreg);
4226
4227         /* Read fan clock dividers immediately */
4228         nct6775_init_fan_common(dev, data);
4229
4230         /* Register sysfs hooks */
4231         group = nct6775_create_attr_group(dev, &nct6775_pwm_template_group,
4232                                           data->pwm_num);
4233         if (IS_ERR(group))
4234                 return PTR_ERR(group);
4235
4236         data->groups[num_attr_groups++] = group;
4237
4238         group = nct6775_create_attr_group(dev, &nct6775_in_template_group,
4239                                           fls(data->have_in));
4240         if (IS_ERR(group))
4241                 return PTR_ERR(group);
4242
4243         data->groups[num_attr_groups++] = group;
4244
4245         group = nct6775_create_attr_group(dev, &nct6775_fan_template_group,
4246                                           fls(data->has_fan));
4247         if (IS_ERR(group))
4248                 return PTR_ERR(group);
4249
4250         data->groups[num_attr_groups++] = group;
4251
4252         group = nct6775_create_attr_group(dev, &nct6775_temp_template_group,
4253                                           fls(data->have_temp));
4254         if (IS_ERR(group))
4255                 return PTR_ERR(group);
4256
4257         data->groups[num_attr_groups++] = group;
4258         data->groups[num_attr_groups++] = &nct6775_group_other;
4259
4260 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4261         err = sysfs_create_groups(&dev->kobj, data->groups);
4262         if (err < 0)
4263                 return err;
4264         hwmon_dev = hwmon_device_register(dev);
4265         if (IS_ERR(hwmon_dev)) {
4266                 sysfs_remove_groups(&dev->kobj, data->groups);
4267                 return PTR_ERR(hwmon_dev);
4268         }
4269         data->hwmon_dev = hwmon_dev;
4270 #else
4271         hwmon_dev = devm_hwmon_device_register_with_groups(dev, data->name,
4272                                                            data, data->groups);
4273 #endif
4274         return PTR_ERR_OR_ZERO(hwmon_dev);
4275 }
4276
4277 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4278 static int nct6775_remove(struct platform_device *pdev)
4279 {
4280         struct nct6775_data *data = platform_get_drvdata(pdev);
4281
4282         hwmon_device_unregister(data->hwmon_dev);
4283         sysfs_remove_groups(&pdev->dev.kobj, data->groups);
4284         return 0;
4285 }
4286 #endif
4287
4288 static void nct6791_enable_io_mapping(int sioaddr)
4289 {
4290         int val;
4291
4292         val = superio_inb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE);
4293         if (val & 0x10) {
4294                 pr_info("Enabling hardware monitor logical device mappings.\n");
4295                 superio_outb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE,
4296                              val & ~0x10);
4297         }
4298 }
4299
4300 static int __maybe_unused nct6775_suspend(struct device *dev)
4301 {
4302         struct nct6775_data *data = nct6775_update_device(dev);
4303
4304         mutex_lock(&data->update_lock);
4305         data->vbat = nct6775_read_value(data, data->REG_VBAT);
4306         if (data->kind == nct6775) {
4307                 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
4308                 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
4309         }
4310         mutex_unlock(&data->update_lock);
4311
4312         return 0;
4313 }
4314
4315 static int __maybe_unused nct6775_resume(struct device *dev)
4316 {
4317         struct nct6775_data *data = dev_get_drvdata(dev);
4318         int sioreg = data->sioreg;
4319         int i, j, err = 0;
4320         u8 reg;
4321
4322         mutex_lock(&data->update_lock);
4323         data->bank = 0xff;              /* Force initial bank selection */
4324
4325         err = superio_enter(sioreg);
4326         if (err)
4327                 goto abort;
4328
4329         superio_select(sioreg, NCT6775_LD_HWM);
4330         reg = superio_inb(sioreg, SIO_REG_ENABLE);
4331         if (reg != data->sio_reg_enable)
4332                 superio_outb(sioreg, SIO_REG_ENABLE, data->sio_reg_enable);
4333
4334         if (data->kind == nct6791 || data->kind == nct6792 ||
4335             data->kind == nct6793 || data->kind == nct6795)
4336                 nct6791_enable_io_mapping(sioreg);
4337
4338         superio_exit(sioreg);
4339
4340         /* Restore limits */
4341         for (i = 0; i < data->in_num; i++) {
4342                 if (!(data->have_in & BIT(i)))
4343                         continue;
4344
4345                 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
4346                                     data->in[i][1]);
4347                 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
4348                                     data->in[i][2]);
4349         }
4350
4351         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
4352                 if (!(data->has_fan_min & BIT(i)))
4353                         continue;
4354
4355                 nct6775_write_value(data, data->REG_FAN_MIN[i],
4356                                     data->fan_min[i]);
4357         }
4358
4359         for (i = 0; i < NUM_TEMP; i++) {
4360                 if (!(data->have_temp & BIT(i)))
4361                         continue;
4362
4363                 for (j = 1; j < ARRAY_SIZE(data->reg_temp); j++)
4364                         if (data->reg_temp[j][i])
4365                                 nct6775_write_temp(data, data->reg_temp[j][i],
4366                                                    data->temp[j][i]);
4367         }
4368
4369         /* Restore other settings */
4370         nct6775_write_value(data, data->REG_VBAT, data->vbat);
4371         if (data->kind == nct6775) {
4372                 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
4373                 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
4374         }
4375
4376 abort:
4377         /* Force re-reading all values */
4378         data->valid = false;
4379         mutex_unlock(&data->update_lock);
4380
4381         return err;
4382 }
4383
4384 static SIMPLE_DEV_PM_OPS(nct6775_dev_pm_ops, nct6775_suspend, nct6775_resume);
4385
4386 static struct platform_driver nct6775_driver = {
4387         .driver = {
4388                 .owner  = THIS_MODULE,
4389                 .name   = DRVNAME,
4390                 .pm     = &nct6775_dev_pm_ops,
4391         },
4392         .probe          = nct6775_probe,
4393 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4394         .remove         = nct6775_remove,
4395 #endif
4396 };
4397
4398 /* nct6775_find() looks for a '627 in the Super-I/O config space */
4399 static int __init nct6775_find(int sioaddr, struct nct6775_sio_data *sio_data)
4400 {
4401         u16 val;
4402         int err;
4403         int addr;
4404
4405         err = superio_enter(sioaddr);
4406         if (err)
4407                 return err;
4408
4409         val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8) |
4410                 superio_inb(sioaddr, SIO_REG_DEVID + 1);
4411         if (force_id && val != 0xffff)
4412                 val = force_id;
4413
4414         switch (val & SIO_ID_MASK) {
4415         case SIO_NCT6106_ID:
4416                 sio_data->kind = nct6106;
4417                 break;
4418         case SIO_NCT6775_ID:
4419                 sio_data->kind = nct6775;
4420                 break;
4421         case SIO_NCT6776_ID:
4422                 sio_data->kind = nct6776;
4423                 break;
4424         case SIO_NCT6779_ID:
4425                 sio_data->kind = nct6779;
4426                 break;
4427         case SIO_NCT6791_ID:
4428                 sio_data->kind = nct6791;
4429                 break;
4430         case SIO_NCT6792_ID:
4431                 sio_data->kind = nct6792;
4432                 break;
4433         case SIO_NCT6793_ID:
4434                 sio_data->kind = nct6793;
4435                 break;
4436         case SIO_NCT6795_ID:
4437                 sio_data->kind = nct6795;
4438                 break;
4439         default:
4440                 if (val != 0xffff)
4441                         pr_debug("unsupported chip ID: 0x%04x\n", val);
4442                 superio_exit(sioaddr);
4443                 return -ENODEV;
4444         }
4445
4446         /* We have a known chip, find the HWM I/O address */
4447         superio_select(sioaddr, NCT6775_LD_HWM);
4448         val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
4449             | superio_inb(sioaddr, SIO_REG_ADDR + 1);
4450         addr = val & IOREGION_ALIGNMENT;
4451         if (addr == 0) {
4452                 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
4453                 superio_exit(sioaddr);
4454                 return -ENODEV;
4455         }
4456
4457         /* Activate logical device if needed */
4458         val = superio_inb(sioaddr, SIO_REG_ENABLE);
4459         if (!(val & 0x01)) {
4460                 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
4461                 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
4462         }
4463
4464         if (sio_data->kind == nct6791 || sio_data->kind == nct6792 ||
4465             sio_data->kind == nct6793 || sio_data->kind == nct6795)
4466                 nct6791_enable_io_mapping(sioaddr);
4467
4468         superio_exit(sioaddr);
4469         pr_info("Found %s or compatible chip at %#x:%#x\n",
4470                 nct6775_sio_names[sio_data->kind], sioaddr, addr);
4471         sio_data->sioreg = sioaddr;
4472
4473         return addr;
4474 }
4475
4476 /*
4477  * when Super-I/O functions move to a separate file, the Super-I/O
4478  * bus will manage the lifetime of the device and this module will only keep
4479  * track of the nct6775 driver. But since we use platform_device_alloc(), we
4480  * must keep track of the device
4481  */
4482 static struct platform_device *pdev[2];
4483
4484 static int __init sensors_nct6775_init(void)
4485 {
4486         int i, err;
4487         bool found = false;
4488         int address;
4489         struct resource res;
4490         struct nct6775_sio_data sio_data;
4491         int sioaddr[2] = { 0x2e, 0x4e };
4492
4493         err = platform_driver_register(&nct6775_driver);
4494         if (err)
4495                 return err;
4496
4497         /*
4498          * initialize sio_data->kind and sio_data->sioreg.
4499          *
4500          * when Super-I/O functions move to a separate file, the Super-I/O
4501          * driver will probe 0x2e and 0x4e and auto-detect the presence of a
4502          * nct6775 hardware monitor, and call probe()
4503          */
4504         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4505                 address = nct6775_find(sioaddr[i], &sio_data);
4506                 if (address <= 0)
4507                         continue;
4508
4509                 found = true;
4510
4511                 pdev[i] = platform_device_alloc(DRVNAME, address);
4512                 if (!pdev[i]) {
4513                         err = -ENOMEM;
4514                         goto exit_device_unregister;
4515                 }
4516
4517                 err = platform_device_add_data(pdev[i], &sio_data,
4518                                                sizeof(struct nct6775_sio_data));
4519                 if (err)
4520                         goto exit_device_put;
4521
4522                 memset(&res, 0, sizeof(res));
4523                 res.name = DRVNAME;
4524                 res.start = address + IOREGION_OFFSET;
4525                 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
4526                 res.flags = IORESOURCE_IO;
4527
4528                 err = acpi_check_resource_conflict(&res);
4529                 if (err) {
4530                         platform_device_put(pdev[i]);
4531                         pdev[i] = NULL;
4532                         continue;
4533                 }
4534
4535                 err = platform_device_add_resources(pdev[i], &res, 1);
4536                 if (err)
4537                         goto exit_device_put;
4538
4539                 /* platform_device_add calls probe() */
4540                 err = platform_device_add(pdev[i]);
4541                 if (err)
4542                         goto exit_device_put;
4543         }
4544         if (!found) {
4545                 err = -ENODEV;
4546                 goto exit_unregister;
4547         }
4548
4549         return 0;
4550
4551 exit_device_put:
4552         platform_device_put(pdev[i]);
4553 exit_device_unregister:
4554         while (--i >= 0) {
4555                 if (pdev[i])
4556                         platform_device_unregister(pdev[i]);
4557         }
4558 exit_unregister:
4559         platform_driver_unregister(&nct6775_driver);
4560         return err;
4561 }
4562
4563 static void __exit sensors_nct6775_exit(void)
4564 {
4565         int i;
4566
4567         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4568                 if (pdev[i])
4569                         platform_device_unregister(pdev[i]);
4570         }
4571         platform_driver_unregister(&nct6775_driver);
4572 }
4573
4574 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4575 MODULE_DESCRIPTION("Driver for NCT6775F and compatible chips");
4576 MODULE_LICENSE("GPL");
4577
4578 module_init(sensors_nct6775_init);
4579 module_exit(sensors_nct6775_exit);