git.sur5r.net Git - groeck-nct6775/blob - nct6775.c

   1 /*
   2  * nct6775 - Driver for the hardware monitoring functionality of
   3  *             Nuvoton NCT677x Super-I/O chips
   4  *
   5  * Copyright (C) 2012  Guenter Roeck <linux@roeck-us.net>
   6  *
   7  * Derived from w83627ehf driver
   8  * Copyright (C) 2005-2012  Jean Delvare <khali@linux-fr.org>
   9  * Copyright (C) 2006  Yuan Mu (Winbond),
  10  *                     Rudolf Marek <r.marek@assembler.cz>
  11  *                     David Hubbard <david.c.hubbard@gmail.com>
  12  *                     Daniel J Blueman <daniel.blueman@gmail.com>
  13  * Copyright (C) 2010  Sheng-Yuan Huang (Nuvoton) (PS00)
  14  *
  15  * Shamelessly ripped from the w83627hf driver
  16  * Copyright (C) 2003  Mark Studebaker
  17  *
  18  * This program is free software; you can redistribute it and/or modify
  19  * it under the terms of the GNU General Public License as published by
  20  * the Free Software Foundation; either version 2 of the License, or
  21  * (at your option) any later version.
  22  *
  23  * This program is distributed in the hope that it will be useful,
  24  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26  * GNU General Public License for more details.
  27  *
  28  * You should have received a copy of the GNU General Public License
  29  * along with this program; if not, write to the Free Software
  30  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  31  *
  32  *
  33  * Supports the following chips:
  34  *
  35  * Chip        #vin    #fan    #pwm    #temp  chip IDs       man ID
  36  * nct6106d     9      3       3       6+3    0xc450 0xc1    0x5ca3
  37  * nct6775f     9      4       3       6+3    0xb470 0xc1    0x5ca3
  38  * nct6776f     9      5       3       6+3    0xc330 0xc1    0x5ca3
  39  * nct6779d    15      5       5       2+6    0xc560 0xc1    0x5ca3
  40  * nct6791d    15      6       6       2+6    0xc800 0xc1    0x5ca3
  41  *
  42  * #temp lists the number of monitored temperature sources (first value) plus
  43  * the number of directly connectable temperature sensors (second value).
  44  */
  45
  46 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  47
  48 #include <linux/module.h>
  49 #include <linux/init.h>
  50 #include <linux/slab.h>
  51 #include <linux/jiffies.h>
  52 #include <linux/platform_device.h>
  53 #include <linux/hwmon.h>
  54 #include <linux/hwmon-sysfs.h>
  55 #include <linux/hwmon-vid.h>
  56 #include <linux/err.h>
  57 #include <linux/mutex.h>
  58 #include <linux/acpi.h>
  59 #include <linux/io.h>
  60 #include "lm75.h"
  61 #include "compat.h"
  62
  63 #define USE_ALTERNATE
  64
  65 enum kinds { nct6106, nct6775, nct6776, nct6779, nct6791 };
  66
  67 /* used to set data->name = nct6775_device_names[data->sio_kind] */
  68 static const char * const nct6775_device_names[] = {
  69         "nct6106",
  70         "nct6775",
  71         "nct6776",
  72         "nct6779",
  73         "nct6791",
  74 };
  75
  76 static unsigned short force_id;
  77 module_param(force_id, ushort, 0);
  78 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  79
  80 static unsigned short fan_debounce;
  81 module_param(fan_debounce, ushort, 0);
  82 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
  83
  84 #define DRVNAME "nct6775"
  85
  86 /*
  87  * Super-I/O constants and functions
  88  */
  89
  90 #define NCT6775_LD_ACPI         0x0a
  91 #define NCT6775_LD_HWM          0x0b
  92 #define NCT6775_LD_VID          0x0d
  93
  94 #define SIO_REG_LDSEL           0x07    /* Logical device select */
  95 #define SIO_REG_DEVID           0x20    /* Device ID (2 bytes) */
  96 #define SIO_REG_ENABLE          0x30    /* Logical device enable */
  97 #define SIO_REG_ADDR            0x60    /* Logical device address (2 bytes) */
  98
  99 #define SIO_NCT6106_ID          0xc450
 100 #define SIO_NCT6775_ID          0xb470
 101 #define SIO_NCT6776_ID          0xc330
 102 #define SIO_NCT6779_ID          0xc560
 103 #define SIO_NCT6791_ID          0xc800
 104 #define SIO_ID_MASK             0xFFF0
 105
 106 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
 107
 108 static inline void
 109 superio_outb(int ioreg, int reg, int val)
 110 {
 111         outb(reg, ioreg);
 112         outb(val, ioreg + 1);
 113 }
 114
 115 static inline int
 116 superio_inb(int ioreg, int reg)
 117 {
 118         outb(reg, ioreg);
 119         return inb(ioreg + 1);
 120 }
 121
 122 static inline void
 123 superio_select(int ioreg, int ld)
 124 {
 125         outb(SIO_REG_LDSEL, ioreg);
 126         outb(ld, ioreg + 1);
 127 }
 128
 129 static inline int
 130 superio_enter(int ioreg)
 131 {
 132         /*
 133          * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
 134          */
 135         if (!request_muxed_region(ioreg, 2, DRVNAME))
 136                 return -EBUSY;
 137
 138         outb(0x87, ioreg);
 139         outb(0x87, ioreg);
 140
 141         return 0;
 142 }
 143
 144 static inline void
 145 superio_exit(int ioreg)
 146 {
 147         outb(0xaa, ioreg);
 148         outb(0x02, ioreg);
 149         outb(0x02, ioreg + 1);
 150         release_region(ioreg, 2);
 151 }
 152
 153 /*
 154  * ISA constants
 155  */
 156
 157 #define IOREGION_ALIGNMENT      (~7)
 158 #define IOREGION_OFFSET         5
 159 #define IOREGION_LENGTH         2
 160 #define ADDR_REG_OFFSET         0
 161 #define DATA_REG_OFFSET         1
 162
 163 #define NCT6775_REG_BANK        0x4E
 164 #define NCT6775_REG_CONFIG      0x40
 165
 166 /*
 167  * Not currently used:
 168  * REG_MAN_ID has the value 0x5ca3 for all supported chips.
 169  * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
 170  * REG_MAN_ID is at port 0x4f
 171  * REG_CHIP_ID is at port 0x58
 172  */
 173
 174 #define NUM_TEMP        10      /* Max number of temp attribute sets w/ limits*/
 175 #define NUM_TEMP_FIXED  6       /* Max number of fixed temp attribute sets */
 176
 177 #define NUM_REG_ALARM   7       /* Max number of alarm registers */
 178 #define NUM_REG_BEEP    5       /* Max number of beep registers */
 179
 180 #define NUM_FAN         6
 181
 182 /* Common and NCT6775 specific data */
 183
 184 /* Voltage min/max registers for nr=7..14 are in bank 5 */
 185
 186 static const u16 NCT6775_REG_IN_MAX[] = {
 187         0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
 188         0x55c, 0x55e, 0x560, 0x562 };
 189 static const u16 NCT6775_REG_IN_MIN[] = {
 190         0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
 191         0x55d, 0x55f, 0x561, 0x563 };
 192 static const u16 NCT6775_REG_IN[] = {
 193         0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
 194 };
 195
 196 #define NCT6775_REG_VBAT                0x5D
 197 #define NCT6775_REG_DIODE               0x5E
 198 #define NCT6775_DIODE_MASK              0x02
 199
 200 #define NCT6775_REG_FANDIV1             0x506
 201 #define NCT6775_REG_FANDIV2             0x507
 202
 203 #define NCT6775_REG_CR_FAN_DEBOUNCE     0xf0
 204
 205 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
 206
 207 /* 0..15 voltages, 16..23 fans, 24..29 temperatures, 30..31 intrusion */
 208
 209 static const s8 NCT6775_ALARM_BITS[] = {
 210         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 211         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 212         -1,                             /* unused */
 213         6, 7, 11, -1, -1,               /* fan1..fan5 */
 214         -1, -1, -1,                     /* unused */
 215         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 216         12, -1 };                       /* intrusion0, intrusion1 */
 217
 218 #define FAN_ALARM_BASE          16
 219 #define TEMP_ALARM_BASE         24
 220 #define INTRUSION_ALARM_BASE    30
 221
 222 static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e };
 223
 224 /*
 225  * 0..14 voltages, 15 global beep enable, 16..23 fans, 24..29 temperatures,
 226  * 30..31 intrusion
 227  */
 228 static const s8 NCT6775_BEEP_BITS[] = {
 229         0, 1, 2, 3, 8, 9, 10, 16,       /* in0.. in7 */
 230         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 231         21,                             /* global beep enable */
 232         6, 7, 11, 28, -1,               /* fan1..fan5 */
 233         -1, -1, -1,                     /* unused */
 234         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 235         12, -1 };                       /* intrusion0, intrusion1 */
 236
 237 #define BEEP_ENABLE_BASE                15
 238
 239 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
 240 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
 241
 242 /* DC or PWM output fan configuration */
 243 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
 244 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
 245
 246 /* Advanced Fan control, some values are common for all fans */
 247
 248 static const u16 NCT6775_REG_TARGET[] = {
 249         0x101, 0x201, 0x301, 0x801, 0x901, 0xa01 };
 250 static const u16 NCT6775_REG_FAN_MODE[] = {
 251         0x102, 0x202, 0x302, 0x802, 0x902, 0xa02 };
 252 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
 253         0x103, 0x203, 0x303, 0x803, 0x903, 0xa03 };
 254 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
 255         0x104, 0x204, 0x304, 0x804, 0x904, 0xa04 };
 256 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
 257         0x105, 0x205, 0x305, 0x805, 0x905, 0xa05 };
 258 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = {
 259         0x106, 0x206, 0x306, 0x806, 0x906, 0xa06 };
 260 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
 261 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
 262
 263 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
 264         0x107, 0x207, 0x307, 0x807, 0x907, 0xa07 };
 265 static const u16 NCT6775_REG_PWM[] = {
 266         0x109, 0x209, 0x309, 0x809, 0x909, 0xa09 };
 267 static const u16 NCT6775_REG_PWM_READ[] = {
 268         0x01, 0x03, 0x11, 0x13, 0x15, 0xa09 };
 269
 270 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
 271 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
 272 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
 273 static const u16 NCT6775_FAN_PULSE_SHIFT[] = { 0, 0, 0, 0, 0, 0 };
 274
 275 static const u16 NCT6775_REG_TEMP[] = {
 276         0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
 277
 278 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 279         0, 0x152, 0x252, 0x628, 0x629, 0x62A };
 280 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 281         0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
 282 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 283         0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
 284
 285 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 286         0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
 287
 288 static const u16 NCT6775_REG_TEMP_SEL[] = {
 289         0x100, 0x200, 0x300, 0x800, 0x900, 0xa00 };
 290
 291 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
 292         0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 };
 293 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
 294         0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a };
 295 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
 296         0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b };
 297 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
 298         0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c };
 299 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
 300         0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d };
 301
 302 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
 303
 304 static const u16 NCT6775_REG_AUTO_TEMP[] = {
 305         0x121, 0x221, 0x321, 0x821, 0x921, 0xa21 };
 306 static const u16 NCT6775_REG_AUTO_PWM[] = {
 307         0x127, 0x227, 0x327, 0x827, 0x927, 0xa27 };
 308
 309 #define NCT6775_AUTO_TEMP(data, nr, p)  ((data)->REG_AUTO_TEMP[nr] + (p))
 310 #define NCT6775_AUTO_PWM(data, nr, p)   ((data)->REG_AUTO_PWM[nr] + (p))
 311
 312 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
 313
 314 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
 315         0x135, 0x235, 0x335, 0x835, 0x935, 0xa35 };
 316 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
 317         0x138, 0x238, 0x338, 0x838, 0x938, 0xa38 };
 318
 319 static const char *const nct6775_temp_label[] = {
 320         "",
 321         "SYSTIN",
 322         "CPUTIN",
 323         "AUXTIN",
 324         "AMD SB-TSI",
 325         "PECI Agent 0",
 326         "PECI Agent 1",
 327         "PECI Agent 2",
 328         "PECI Agent 3",
 329         "PECI Agent 4",
 330         "PECI Agent 5",
 331         "PECI Agent 6",
 332         "PECI Agent 7",
 333         "PCH_CHIP_CPU_MAX_TEMP",
 334         "PCH_CHIP_TEMP",
 335         "PCH_CPU_TEMP",
 336         "PCH_MCH_TEMP",
 337         "PCH_DIM0_TEMP",
 338         "PCH_DIM1_TEMP",
 339         "PCH_DIM2_TEMP",
 340         "PCH_DIM3_TEMP"
 341 };
 342
 343 static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
 344         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
 345
 346 static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
 347         = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
 348             0xa07 };
 349
 350 /* NCT6776 specific data */
 351
 352 static const s8 NCT6776_ALARM_BITS[] = {
 353         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 354         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 355         -1,                             /* unused */
 356         6, 7, 11, 10, 23,               /* fan1..fan5 */
 357         -1, -1, -1,                     /* unused */
 358         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 359         12, 9 };                        /* intrusion0, intrusion1 */
 360
 361 static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5 };
 362
 363 static const s8 NCT6776_BEEP_BITS[] = {
 364         0, 1, 2, 3, 4, 5, 6, 7,         /* in0.. in7 */
 365         8, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 366         24,                             /* global beep enable */
 367         25, 26, 27, 28, 29,             /* fan1..fan5 */
 368         -1, -1, -1,                     /* unused */
 369         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 370         30, 31 };                       /* intrusion0, intrusion1 */
 371
 372 static const u16 NCT6776_REG_TOLERANCE_H[] = {
 373         0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c };
 374
 375 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0 };
 376 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0 };
 377
 378 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
 379 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
 380
 381 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
 382         0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e };
 383
 384 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 385         0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
 386
 387 static const char *const nct6776_temp_label[] = {
 388         "",
 389         "SYSTIN",
 390         "CPUTIN",
 391         "AUXTIN",
 392         "SMBUSMASTER 0",
 393         "SMBUSMASTER 1",
 394         "SMBUSMASTER 2",
 395         "SMBUSMASTER 3",
 396         "SMBUSMASTER 4",
 397         "SMBUSMASTER 5",
 398         "SMBUSMASTER 6",
 399         "SMBUSMASTER 7",
 400         "PECI Agent 0",
 401         "PECI Agent 1",
 402         "PCH_CHIP_CPU_MAX_TEMP",
 403         "PCH_CHIP_TEMP",
 404         "PCH_CPU_TEMP",
 405         "PCH_MCH_TEMP",
 406         "PCH_DIM0_TEMP",
 407         "PCH_DIM1_TEMP",
 408         "PCH_DIM2_TEMP",
 409         "PCH_DIM3_TEMP",
 410         "BYTE_TEMP"
 411 };
 412
 413 static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
 414         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
 415
 416 static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
 417         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
 418
 419 /* NCT6779 specific data */
 420
 421 static const u16 NCT6779_REG_IN[] = {
 422         0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
 423         0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
 424
 425 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
 426         0x459, 0x45A, 0x45B, 0x568 };
 427
 428 static const s8 NCT6779_ALARM_BITS[] = {
 429         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 430         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 431         -1,                             /* unused */
 432         6, 7, 11, 10, 23,               /* fan1..fan5 */
 433         -1, -1, -1,                     /* unused */
 434         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 435         12, 9 };                        /* intrusion0, intrusion1 */
 436
 437 static const s8 NCT6779_BEEP_BITS[] = {
 438         0, 1, 2, 3, 4, 5, 6, 7,         /* in0.. in7 */
 439         8, 9, 10, 11, 12, 13, 14,       /* in8..in14 */
 440         24,                             /* global beep enable */
 441         25, 26, 27, 28, 29,             /* fan1..fan5 */
 442         -1, -1, -1,                     /* unused */
 443         16, 17, -1, -1, -1, -1,         /* temp1..temp6 */
 444         30, 31 };                       /* intrusion0, intrusion1 */
 445
 446 static const u16 NCT6779_REG_FAN[] = {
 447         0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8, 0x4ba };
 448 static const u16 NCT6779_REG_FAN_PULSES[] = {
 449         0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
 450
 451 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
 452         0x136, 0x236, 0x336, 0x836, 0x936, 0xa36 };
 453 #define NCT6779_CRITICAL_PWM_ENABLE_MASK        0x01
 454 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
 455         0x137, 0x237, 0x337, 0x837, 0x937, 0xa37 };
 456
 457 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
 458 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 459         0x18, 0x152 };
 460 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 461         0x3a, 0x153 };
 462 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 463         0x39, 0x155 };
 464
 465 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
 466         0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
 467
 468 static const char *const nct6779_temp_label[] = {
 469         "",
 470         "SYSTIN",
 471         "CPUTIN",
 472         "AUXTIN0",
 473         "AUXTIN1",
 474         "AUXTIN2",
 475         "AUXTIN3",
 476         "",
 477         "SMBUSMASTER 0",
 478         "SMBUSMASTER 1",
 479         "SMBUSMASTER 2",
 480         "SMBUSMASTER 3",
 481         "SMBUSMASTER 4",
 482         "SMBUSMASTER 5",
 483         "SMBUSMASTER 6",
 484         "SMBUSMASTER 7",
 485         "PECI Agent 0",
 486         "PECI Agent 1",
 487         "PCH_CHIP_CPU_MAX_TEMP",
 488         "PCH_CHIP_TEMP",
 489         "PCH_CPU_TEMP",
 490         "PCH_MCH_TEMP",
 491         "PCH_DIM0_TEMP",
 492         "PCH_DIM1_TEMP",
 493         "PCH_DIM2_TEMP",
 494         "PCH_DIM3_TEMP",
 495         "BYTE_TEMP"
 496 };
 497
 498 static const u16 NCT6779_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6779_temp_label) - 1]
 499         = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
 500             0, 0, 0, 0, 0, 0, 0, 0,
 501             0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
 502             0x408, 0 };
 503
 504 static const u16 NCT6779_REG_TEMP_CRIT[ARRAY_SIZE(nct6779_temp_label) - 1]
 505         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
 506
 507 /* NCT6791 specific data */
 508
 509 #define NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE     0x28
 510
 511 static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = {
 512         0x459, 0x45A, 0x45B, 0x568, 0x45D };
 513
 514 static const s8 NCT6791_ALARM_BITS[] = {
 515         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 516         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 517         -1,                             /* unused */
 518         6, 7, 11, 10, 23, 33,           /* fan1..fan6 */
 519         -1, -1,                         /* unused */
 520         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 521         12, 9 };                        /* intrusion0, intrusion1 */
 522
 523
 524 /* NCT6102D/NCT6106D specific data */
 525
 526 #define NCT6106_REG_VBAT        0x318
 527 #define NCT6106_REG_DIODE       0x319
 528 #define NCT6106_DIODE_MASK      0x01
 529
 530 static const u16 NCT6106_REG_IN_MAX[] = {
 531         0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
 532 static const u16 NCT6106_REG_IN_MIN[] = {
 533         0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
 534 static const u16 NCT6106_REG_IN[] = {
 535         0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
 536
 537 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
 538 static const u16 NCT6106_REG_TEMP_HYST[] = {
 539         0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
 540 static const u16 NCT6106_REG_TEMP_OVER[] = {
 541         0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
 542 static const u16 NCT6106_REG_TEMP_CRIT_L[] = {
 543         0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
 544 static const u16 NCT6106_REG_TEMP_CRIT_H[] = {
 545         0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
 546 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
 547 static const u16 NCT6106_REG_TEMP_CONFIG[] = {
 548         0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
 549
 550 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
 551 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
 552 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0, 0 };
 553 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4, 0, 0 };
 554
 555 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
 556 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
 557 static const u16 NCT6106_REG_PWM[] = { 0x119, 0x129, 0x139 };
 558 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c };
 559 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
 560 static const u16 NCT6106_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130 };
 561 static const u16 NCT6106_REG_TEMP_SOURCE[] = {
 562         0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
 563
 564 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
 565 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = {
 566         0x11b, 0x12b, 0x13b };
 567
 568 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
 569 #define NCT6106_CRITICAL_PWM_ENABLE_MASK        0x10
 570 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
 571
 572 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
 573 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
 574 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
 575 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
 576 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
 577 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
 578
 579 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
 580
 581 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
 582 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
 583 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
 584 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x17c };
 585 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
 586 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
 587
 588 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
 589 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
 590
 591 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = {
 592         0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
 593
 594 static const s8 NCT6106_ALARM_BITS[] = {
 595         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 596         9, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 597         -1,                             /* unused */
 598         32, 33, 34, -1, -1,             /* fan1..fan5 */
 599         -1, -1, -1,                     /* unused */
 600         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 601         48, -1                          /* intrusion0, intrusion1 */
 602 };
 603
 604 static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = {
 605         0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 };
 606
 607 static const s8 NCT6106_BEEP_BITS[] = {
 608         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 609         9, 10, 11, 12, -1, -1, -1,      /* in8..in14 */
 610         32,                             /* global beep enable */
 611         24, 25, 26, 27, 28,             /* fan1..fan5 */
 612         -1, -1, -1,                     /* unused */
 613         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 614         34, -1                          /* intrusion0, intrusion1 */
 615 };
 616
 617 static const u16 NCT6106_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
 618         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x51, 0x52, 0x54 };
 619
 620 static const u16 NCT6106_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
 621         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x204, 0x205 };
 622
 623 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
 624 {
 625         if (mode == 0 && pwm == 255)
 626                 return off;
 627         return mode + 1;
 628 }
 629
 630 static int pwm_enable_to_reg(enum pwm_enable mode)
 631 {
 632         if (mode == off)
 633                 return 0;
 634         return mode - 1;
 635 }
 636
 637 /*
 638  * Conversions
 639  */
 640
 641 /* 1 is DC mode, output in ms */
 642 static unsigned int step_time_from_reg(u8 reg, u8 mode)
 643 {
 644         return mode ? 400 * reg : 100 * reg;
 645 }
 646
 647 static u8 step_time_to_reg(unsigned int msec, u8 mode)
 648 {
 649         return clamp_val((mode ? (msec + 200) / 400 :
 650                                         (msec + 50) / 100), 1, 255);
 651 }
 652
 653 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
 654 {
 655         if (reg == 0 || reg == 255)
 656                 return 0;
 657         return 1350000U / (reg << divreg);
 658 }
 659
 660 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
 661 {
 662         if ((reg & 0xff1f) == 0xff1f)
 663                 return 0;
 664
 665         reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
 666
 667         if (reg == 0)
 668                 return 0;
 669
 670         return 1350000U / reg;
 671 }
 672
 673 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
 674 {
 675         if (reg == 0 || reg == 0xffff)
 676                 return 0;
 677
 678         /*
 679          * Even though the registers are 16 bit wide, the fan divisor
 680          * still applies.
 681          */
 682         return 1350000U / (reg << divreg);
 683 }
 684
 685 static u16 fan_to_reg(u32 fan, unsigned int divreg)
 686 {
 687         if (!fan)
 688                 return 0;
 689
 690         return (1350000U / fan) >> divreg;
 691 }
 692
 693 static inline unsigned int
 694 div_from_reg(u8 reg)
 695 {
 696         return 1 << reg;
 697 }
 698
 699 /*
 700  * Some of the voltage inputs have internal scaling, the tables below
 701  * contain 8 (the ADC LSB in mV) * scaling factor * 100
 702  */
 703 static const u16 scale_in[15] = {
 704         800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
 705         800, 800
 706 };
 707
 708 static inline long in_from_reg(u8 reg, u8 nr)
 709 {
 710         return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
 711 }
 712
 713 static inline u8 in_to_reg(u32 val, u8 nr)
 714 {
 715         return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
 716 }
 717
 718 /*
 719  * Data structures and manipulation thereof
 720  */
 721
 722 struct nct6775_data {
 723         int addr;       /* IO base of hw monitor block */
 724         enum kinds kind;
 725         const char *name;
 726
 727         struct device *hwmon_dev;
 728         struct attribute_group *group_in;
 729         struct attribute_group *group_fan;
 730         struct attribute_group *group_temp;
 731         struct attribute_group *group_pwm;
 732
 733         u16 reg_temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 734                                     * 3=temp_crit, 4=temp_lcrit
 735                                     */
 736         u8 temp_src[NUM_TEMP];
 737         u16 reg_temp_config[NUM_TEMP];
 738         const char * const *temp_label;
 739         int temp_label_num;
 740
 741         u16 REG_CONFIG;
 742         u16 REG_VBAT;
 743         u16 REG_DIODE;
 744         u8 DIODE_MASK;
 745
 746         const s8 *ALARM_BITS;
 747         const s8 *BEEP_BITS;
 748
 749         const u16 *REG_VIN;
 750         const u16 *REG_IN_MINMAX[2];
 751
 752         const u16 *REG_TARGET;
 753         const u16 *REG_FAN;
 754         const u16 *REG_FAN_MODE;
 755         const u16 *REG_FAN_MIN;
 756         const u16 *REG_FAN_PULSES;
 757         const u16 *FAN_PULSE_SHIFT;
 758         const u16 *REG_FAN_TIME[3];
 759
 760         const u16 *REG_TOLERANCE_H;
 761
 762         const u8 *REG_PWM_MODE;
 763         const u8 *PWM_MODE_MASK;
 764
 765         const u16 *REG_PWM[7];  /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 766                                  * [3]=pwm_max, [4]=pwm_step,
 767                                  * [5]=weight_duty_step, [6]=weight_duty_base
 768                                  */
 769         const u16 *REG_PWM_READ;
 770
 771         const u16 *REG_CRITICAL_PWM_ENABLE;
 772         u8 CRITICAL_PWM_ENABLE_MASK;
 773         const u16 *REG_CRITICAL_PWM;
 774
 775         const u16 *REG_AUTO_TEMP;
 776         const u16 *REG_AUTO_PWM;
 777
 778         const u16 *REG_CRITICAL_TEMP;
 779         const u16 *REG_CRITICAL_TEMP_TOLERANCE;
 780
 781         const u16 *REG_TEMP_SOURCE;     /* temp register sources */
 782         const u16 *REG_TEMP_SEL;
 783         const u16 *REG_WEIGHT_TEMP_SEL;
 784         const u16 *REG_WEIGHT_TEMP[3];  /* 0=base, 1=tolerance, 2=step */
 785
 786         const u16 *REG_TEMP_OFFSET;
 787
 788         const u16 *REG_ALARM;
 789         const u16 *REG_BEEP;
 790
 791         unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
 792         unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
 793
 794         struct mutex update_lock;
 795         bool valid;             /* true if following fields are valid */
 796         unsigned long last_updated;     /* In jiffies */
 797
 798         /* Register values */
 799         u8 bank;                /* current register bank */
 800         u8 in_num;              /* number of in inputs we have */
 801         u8 in[15][3];           /* [0]=in, [1]=in_max, [2]=in_min */
 802         unsigned int rpm[NUM_FAN];
 803         u16 fan_min[NUM_FAN];
 804         u8 fan_pulses[NUM_FAN];
 805         u8 fan_div[NUM_FAN];
 806         u8 has_pwm;
 807         u8 has_fan;             /* some fan inputs can be disabled */
 808         u8 has_fan_min;         /* some fans don't have min register */
 809         bool has_fan_div;
 810
 811         u8 num_temp_alarms;     /* 2, 3, or 6 */
 812         u8 num_temp_beeps;      /* 2, 3, or 6 */
 813         u8 temp_fixed_num;      /* 3 or 6 */
 814         u8 temp_type[NUM_TEMP_FIXED];
 815         s8 temp_offset[NUM_TEMP_FIXED];
 816         s16 temp[4][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 817                                 * 3=temp_crit */
 818         u64 alarms;
 819         u64 beeps;
 820
 821         u8 pwm_num;     /* number of pwm */
 822         u8 pwm_mode[NUM_FAN];   /* 1->DC variable voltage,
 823                                  * 0->PWM variable duty cycle
 824                                  */
 825         enum pwm_enable pwm_enable[NUM_FAN];
 826                         /* 0->off
 827                          * 1->manual
 828                          * 2->thermal cruise mode (also called SmartFan I)
 829                          * 3->fan speed cruise mode
 830                          * 4->SmartFan III
 831                          * 5->enhanced variable thermal cruise (SmartFan IV)
 832                          */
 833         u8 pwm[7][NUM_FAN];     /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 834                                  * [3]=pwm_max, [4]=pwm_step,
 835                                  * [5]=weight_duty_step, [6]=weight_duty_base
 836                                  */
 837
 838         u8 target_temp[NUM_FAN];
 839         u8 target_temp_mask;
 840         u32 target_speed[NUM_FAN];
 841         u32 target_speed_tolerance[NUM_FAN];
 842         u8 speed_tolerance_limit;
 843
 844         u8 temp_tolerance[2][NUM_FAN];
 845         u8 tolerance_mask;
 846
 847         u8 fan_time[3][NUM_FAN]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
 848
 849         /* Automatic fan speed control registers */
 850         int auto_pwm_num;
 851         u8 auto_pwm[NUM_FAN][7];
 852         u8 auto_temp[NUM_FAN][7];
 853         u8 pwm_temp_sel[NUM_FAN];
 854         u8 pwm_weight_temp_sel[NUM_FAN];
 855         u8 weight_temp[3][NUM_FAN];     /* 0->temp_step, 1->temp_step_tol,
 856                                          * 2->temp_base
 857                                          */
 858
 859         u8 vid;
 860         u8 vrm;
 861
 862         bool have_vid;
 863
 864         u16 have_temp;
 865         u16 have_temp_fixed;
 866         u16 have_in;
 867 #ifdef CONFIG_PM
 868         /* Remember extra register values over suspend/resume */
 869         u8 vbat;
 870         u8 fandiv1;
 871         u8 fandiv2;
 872 #endif
 873 };
 874
 875 struct nct6775_sio_data {
 876         int sioreg;
 877         enum kinds kind;
 878 };
 879
 880 struct sensor_device_template {
 881         struct device_attribute dev_attr;
 882         union {
 883                 struct {
 884                         u8 nr;
 885                         u8 index;
 886                 } s;
 887                 int index;
 888         } u;
 889         bool s2;        /* true if both index and nr are used */
 890 };
 891
 892 struct sensor_device_attr_u {
 893         union {
 894                 struct sensor_device_attribute a1;
 895                 struct sensor_device_attribute_2 a2;
 896         } u;
 897         char name[32];
 898 };
 899
 900 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) {      \
 901         .attr = {.name = _template, .mode = _mode },            \
 902         .show   = _show,                                        \
 903         .store  = _store,                                       \
 904 }
 905
 906 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \
 907         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
 908           .u.index = _index,                                            \
 909           .s2 = false }
 910
 911 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,       \
 912                                  _nr, _index)                           \
 913         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
 914           .u.s.index = _index,                                          \
 915           .u.s.nr = _nr,                                                \
 916           .s2 = true }
 917
 918 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
 919 static struct sensor_device_template sensor_dev_template_##_name        \
 920         = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store,       \
 921                                  _index)
 922
 923 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store,       \
 924                           _nr, _index)                                  \
 925 static struct sensor_device_template sensor_dev_template_##_name        \
 926         = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,     \
 927                                  _nr, _index)
 928
 929 struct sensor_template_group {
 930         struct sensor_device_template **templates;
 931         umode_t (*is_visible)(struct kobject *, struct attribute *, int);
 932         int base;
 933 };
 934
 935 static struct attribute_group *
 936 nct6775_create_attr_group(struct device *dev, struct sensor_template_group *tg,
 937                           int repeat)
 938 {
 939         struct attribute_group *group;
 940         struct sensor_device_attr_u *su;
 941         struct sensor_device_attribute *a;
 942         struct sensor_device_attribute_2 *a2;
 943         struct attribute **attrs;
 944         struct sensor_device_template **t;
 945         int err, i, j, count;
 946
 947         if (repeat <= 0)
 948                 return ERR_PTR(-EINVAL);
 949
 950         t = tg->templates;
 951         for (count = 0; *t; t++, count++)
 952                 ;
 953
 954         if (count == 0)
 955                 return ERR_PTR(-EINVAL);
 956
 957         group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
 958         if (group == NULL)
 959                 return ERR_PTR(-ENOMEM);
 960
 961         attrs = devm_kzalloc(dev, sizeof(*attrs) * (repeat * count + 1),
 962                              GFP_KERNEL);
 963         if (attrs == NULL)
 964                 return ERR_PTR(-ENOMEM);
 965
 966         su = devm_kzalloc(dev, sizeof(*su) * repeat * count,
 967                                GFP_KERNEL);
 968         if (su == NULL)
 969                 return ERR_PTR(-ENOMEM);
 970
 971         group->attrs = attrs;
 972         group->is_visible = tg->is_visible;
 973
 974         for (i = 0; i < repeat; i++) {
 975                 t = tg->templates;
 976                 for (j = 0; *t != NULL; j++) {
 977                         snprintf(su->name, sizeof(su->name),
 978                                  (*t)->dev_attr.attr.name, tg->base + i);
 979                         if ((*t)->s2) {
 980                                 a2 = &su->u.a2;
 981                                 a2->dev_attr.attr.name = su->name;
 982                                 a2->nr = (*t)->u.s.nr + i;
 983                                 a2->index = (*t)->u.s.index;
 984                                 a2->dev_attr.attr.mode =
 985                                   (*t)->dev_attr.attr.mode;
 986                                 a2->dev_attr.show = (*t)->dev_attr.show;
 987                                 a2->dev_attr.store = (*t)->dev_attr.store;
 988                                 *attrs = &a2->dev_attr.attr;
 989                         } else {
 990                                 a = &su->u.a1;
 991                                 a->dev_attr.attr.name = su->name;
 992                                 a->index = (*t)->u.index + i;
 993                                 a->dev_attr.attr.mode =
 994                                   (*t)->dev_attr.attr.mode;
 995                                 a->dev_attr.show = (*t)->dev_attr.show;
 996                                 a->dev_attr.store = (*t)->dev_attr.store;
 997                                 *attrs = &a->dev_attr.attr;
 998                         }
 999                         attrs++;
1000                         su++;
1001                         t++;
1002                 }
1003         }
1004
1005         err = sysfs_create_group(&dev->kobj, group);
1006         if (err)
1007                 return ERR_PTR(-ENOMEM);
1008
1009         return group;
1010 }
1011
1012 static bool is_word_sized(struct nct6775_data *data, u16 reg)
1013 {
1014         switch (data->kind) {
1015         case nct6106:
1016                 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1017                   reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
1018                   reg == 0x111 || reg == 0x121 || reg == 0x131;
1019         case nct6775:
1020                 return (((reg & 0xff00) == 0x100 ||
1021                     (reg & 0xff00) == 0x200) &&
1022                    ((reg & 0x00ff) == 0x50 ||
1023                     (reg & 0x00ff) == 0x53 ||
1024                     (reg & 0x00ff) == 0x55)) ||
1025                   (reg & 0xfff0) == 0x630 ||
1026                   reg == 0x640 || reg == 0x642 ||
1027                   reg == 0x662 ||
1028                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1029                   reg == 0x73 || reg == 0x75 || reg == 0x77;
1030         case nct6776:
1031                 return (((reg & 0xff00) == 0x100 ||
1032                     (reg & 0xff00) == 0x200) &&
1033                    ((reg & 0x00ff) == 0x50 ||
1034                     (reg & 0x00ff) == 0x53 ||
1035                     (reg & 0x00ff) == 0x55)) ||
1036                   (reg & 0xfff0) == 0x630 ||
1037                   reg == 0x402 ||
1038                   reg == 0x640 || reg == 0x642 ||
1039                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1040                   reg == 0x73 || reg == 0x75 || reg == 0x77;
1041         case nct6779:
1042         case nct6791:
1043                 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
1044                   ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x0b) ||
1045                   reg == 0x402 ||
1046                   reg == 0x63a || reg == 0x63c || reg == 0x63e ||
1047                   reg == 0x640 || reg == 0x642 ||
1048                   reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
1049                   reg == 0x7b;
1050         }
1051         return false;
1052 }
1053
1054 /*
1055  * On older chips, only registers 0x50-0x5f are banked.
1056  * On more recent chips, all registers are banked.
1057  * Assume that is the case and set the bank number for each access.
1058  * Cache the bank number so it only needs to be set if it changes.
1059  */
1060 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
1061 {
1062         u8 bank = reg >> 8;
1063         if (data->bank != bank) {
1064                 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
1065                 outb_p(bank, data->addr + DATA_REG_OFFSET);
1066                 data->bank = bank;
1067         }
1068 }
1069
1070 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
1071 {
1072         int res, word_sized = is_word_sized(data, reg);
1073
1074         nct6775_set_bank(data, reg);
1075         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1076         res = inb_p(data->addr + DATA_REG_OFFSET);
1077         if (word_sized) {
1078                 outb_p((reg & 0xff) + 1,
1079                        data->addr + ADDR_REG_OFFSET);
1080                 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
1081         }
1082         return res;
1083 }
1084
1085 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
1086 {
1087         int word_sized = is_word_sized(data, reg);
1088
1089         nct6775_set_bank(data, reg);
1090         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1091         if (word_sized) {
1092                 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
1093                 outb_p((reg & 0xff) + 1,
1094                        data->addr + ADDR_REG_OFFSET);
1095         }
1096         outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
1097         return 0;
1098 }
1099
1100 /* We left-align 8-bit temperature values to make the code simpler */
1101 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
1102 {
1103         u16 res;
1104
1105         res = nct6775_read_value(data, reg);
1106         if (!is_word_sized(data, reg))
1107                 res <<= 8;
1108
1109         return res;
1110 }
1111
1112 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
1113 {
1114         if (!is_word_sized(data, reg))
1115                 value >>= 8;
1116         return nct6775_write_value(data, reg, value);
1117 }
1118
1119 /* This function assumes that the caller holds data->update_lock */
1120 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
1121 {
1122         u8 reg;
1123
1124         switch (nr) {
1125         case 0:
1126                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
1127                     | (data->fan_div[0] & 0x7);
1128                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1129                 break;
1130         case 1:
1131                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
1132                     | ((data->fan_div[1] << 4) & 0x70);
1133                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1134                 break;
1135         case 2:
1136                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
1137                     | (data->fan_div[2] & 0x7);
1138                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1139                 break;
1140         case 3:
1141                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
1142                     | ((data->fan_div[3] << 4) & 0x70);
1143                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1144                 break;
1145         }
1146 }
1147
1148 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
1149 {
1150         if (data->kind == nct6775)
1151                 nct6775_write_fan_div(data, nr);
1152 }
1153
1154 static void nct6775_update_fan_div(struct nct6775_data *data)
1155 {
1156         u8 i;
1157
1158         i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
1159         data->fan_div[0] = i & 0x7;
1160         data->fan_div[1] = (i & 0x70) >> 4;
1161         i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
1162         data->fan_div[2] = i & 0x7;
1163         if (data->has_fan & (1 << 3))
1164                 data->fan_div[3] = (i & 0x70) >> 4;
1165 }
1166
1167 static void nct6775_update_fan_div_common(struct nct6775_data *data)
1168 {
1169         if (data->kind == nct6775)
1170                 nct6775_update_fan_div(data);
1171 }
1172
1173 static void nct6775_init_fan_div(struct nct6775_data *data)
1174 {
1175         int i;
1176
1177         nct6775_update_fan_div_common(data);
1178         /*
1179          * For all fans, start with highest divider value if the divider
1180          * register is not initialized. This ensures that we get a
1181          * reading from the fan count register, even if it is not optimal.
1182          * We'll compute a better divider later on.
1183          */
1184         for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
1185                 if (!(data->has_fan & (1 << i)))
1186                         continue;
1187                 if (data->fan_div[i] == 0) {
1188                         data->fan_div[i] = 7;
1189                         nct6775_write_fan_div_common(data, i);
1190                 }
1191         }
1192 }
1193
1194 static void nct6775_init_fan_common(struct device *dev,
1195                                     struct nct6775_data *data)
1196 {
1197         int i;
1198         u8 reg;
1199
1200         if (data->has_fan_div)
1201                 nct6775_init_fan_div(data);
1202
1203         /*
1204          * If fan_min is not set (0), set it to 0xff to disable it. This
1205          * prevents the unnecessary warning when fanX_min is reported as 0.
1206          */
1207         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1208                 if (data->has_fan_min & (1 << i)) {
1209                         reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
1210                         if (!reg)
1211                                 nct6775_write_value(data, data->REG_FAN_MIN[i],
1212                                                     data->has_fan_div ? 0xff
1213                                                                       : 0xff1f);
1214                 }
1215         }
1216 }
1217
1218 static void nct6775_select_fan_div(struct device *dev,
1219                                    struct nct6775_data *data, int nr, u16 reg)
1220 {
1221         u8 fan_div = data->fan_div[nr];
1222         u16 fan_min;
1223
1224         if (!data->has_fan_div)
1225                 return;
1226
1227         /*
1228          * If we failed to measure the fan speed, or the reported value is not
1229          * in the optimal range, and the clock divider can be modified,
1230          * let's try that for next time.
1231          */
1232         if (reg == 0x00 && fan_div < 0x07)
1233                 fan_div++;
1234         else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1235                 fan_div--;
1236
1237         if (fan_div != data->fan_div[nr]) {
1238                 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1239                         nr + 1, div_from_reg(data->fan_div[nr]),
1240                         div_from_reg(fan_div));
1241
1242                 /* Preserve min limit if possible */
1243                 if (data->has_fan_min & (1 << nr)) {
1244                         fan_min = data->fan_min[nr];
1245                         if (fan_div > data->fan_div[nr]) {
1246                                 if (fan_min != 255 && fan_min > 1)
1247                                         fan_min >>= 1;
1248                         } else {
1249                                 if (fan_min != 255) {
1250                                         fan_min <<= 1;
1251                                         if (fan_min > 254)
1252                                                 fan_min = 254;
1253                                 }
1254                         }
1255                         if (fan_min != data->fan_min[nr]) {
1256                                 data->fan_min[nr] = fan_min;
1257                                 nct6775_write_value(data, data->REG_FAN_MIN[nr],
1258                                                     fan_min);
1259                         }
1260                 }
1261                 data->fan_div[nr] = fan_div;
1262                 nct6775_write_fan_div_common(data, nr);
1263         }
1264 }
1265
1266 static void nct6775_update_pwm(struct device *dev)
1267 {
1268         struct nct6775_data *data = dev_get_drvdata(dev);
1269         int i, j;
1270         int fanmodecfg, reg;
1271         bool duty_is_dc;
1272
1273         for (i = 0; i < data->pwm_num; i++) {
1274                 if (!(data->has_pwm & (1 << i)))
1275                         continue;
1276
1277                 duty_is_dc = data->REG_PWM_MODE[i] &&
1278                   (nct6775_read_value(data, data->REG_PWM_MODE[i])
1279                    & data->PWM_MODE_MASK[i]);
1280                 data->pwm_mode[i] = duty_is_dc;
1281
1282                 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
1283                 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1284                         if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1285                                 data->pwm[j][i]
1286                                   = nct6775_read_value(data,
1287                                                        data->REG_PWM[j][i]);
1288                         }
1289                 }
1290
1291                 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1292                                                         (fanmodecfg >> 4) & 7);
1293
1294                 if (!data->temp_tolerance[0][i] ||
1295                     data->pwm_enable[i] != speed_cruise)
1296                         data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1297                 if (!data->target_speed_tolerance[i] ||
1298                     data->pwm_enable[i] == speed_cruise) {
1299                         u8 t = fanmodecfg & 0x0f;
1300                         if (data->REG_TOLERANCE_H) {
1301                                 t |= (nct6775_read_value(data,
1302                                       data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
1303                         }
1304                         data->target_speed_tolerance[i] = t;
1305                 }
1306
1307                 data->temp_tolerance[1][i] =
1308                         nct6775_read_value(data,
1309                                         data->REG_CRITICAL_TEMP_TOLERANCE[i]);
1310
1311                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
1312                 data->pwm_temp_sel[i] = reg & 0x1f;
1313                 /* If fan can stop, report floor as 0 */
1314                 if (reg & 0x80)
1315                         data->pwm[2][i] = 0;
1316
1317                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
1318                 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1319                 /* If weight is disabled, report weight source as 0 */
1320                 if (j == 1 && !(reg & 0x80))
1321                         data->pwm_weight_temp_sel[i] = 0;
1322
1323                 /* Weight temp data */
1324                 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
1325                         data->weight_temp[j][i]
1326                           = nct6775_read_value(data,
1327                                                data->REG_WEIGHT_TEMP[j][i]);
1328                 }
1329         }
1330 }
1331
1332 static void nct6775_update_pwm_limits(struct device *dev)
1333 {
1334         struct nct6775_data *data = dev_get_drvdata(dev);
1335         int i, j;
1336         u8 reg;
1337         u16 reg_t;
1338
1339         for (i = 0; i < data->pwm_num; i++) {
1340                 if (!(data->has_pwm & (1 << i)))
1341                         continue;
1342
1343                 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1344                         data->fan_time[j][i] =
1345                           nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1346                 }
1347
1348                 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1349                 /* Update only in matching mode or if never updated */
1350                 if (!data->target_temp[i] ||
1351                     data->pwm_enable[i] == thermal_cruise)
1352                         data->target_temp[i] = reg_t & data->target_temp_mask;
1353                 if (!data->target_speed[i] ||
1354                     data->pwm_enable[i] == speed_cruise) {
1355                         if (data->REG_TOLERANCE_H) {
1356                                 reg_t |= (nct6775_read_value(data,
1357                                         data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1358                         }
1359                         data->target_speed[i] = reg_t;
1360                 }
1361
1362                 for (j = 0; j < data->auto_pwm_num; j++) {
1363                         data->auto_pwm[i][j] =
1364                           nct6775_read_value(data,
1365                                              NCT6775_AUTO_PWM(data, i, j));
1366                         data->auto_temp[i][j] =
1367                           nct6775_read_value(data,
1368                                              NCT6775_AUTO_TEMP(data, i, j));
1369                 }
1370
1371                 /* critical auto_pwm temperature data */
1372                 data->auto_temp[i][data->auto_pwm_num] =
1373                         nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1374
1375                 switch (data->kind) {
1376                 case nct6775:
1377                         reg = nct6775_read_value(data,
1378                                                  NCT6775_REG_CRITICAL_ENAB[i]);
1379                         data->auto_pwm[i][data->auto_pwm_num] =
1380                                                 (reg & 0x02) ? 0xff : 0x00;
1381                         break;
1382                 case nct6776:
1383                         data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1384                         break;
1385                 case nct6106:
1386                 case nct6779:
1387                 case nct6791:
1388                         reg = nct6775_read_value(data,
1389                                         data->REG_CRITICAL_PWM_ENABLE[i]);
1390                         if (reg & data->CRITICAL_PWM_ENABLE_MASK)
1391                                 reg = nct6775_read_value(data,
1392                                         data->REG_CRITICAL_PWM[i]);
1393                         else
1394                                 reg = 0xff;
1395                         data->auto_pwm[i][data->auto_pwm_num] = reg;
1396                         break;
1397                 }
1398         }
1399 }
1400
1401 static struct nct6775_data *nct6775_update_device(struct device *dev)
1402 {
1403         struct nct6775_data *data = dev_get_drvdata(dev);
1404         int i, j;
1405
1406         mutex_lock(&data->update_lock);
1407
1408         if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1409             || !data->valid) {
1410                 /* Fan clock dividers */
1411                 nct6775_update_fan_div_common(data);
1412
1413                 /* Measured voltages and limits */
1414                 for (i = 0; i < data->in_num; i++) {
1415                         if (!(data->have_in & (1 << i)))
1416                                 continue;
1417
1418                         data->in[i][0] = nct6775_read_value(data,
1419                                                             data->REG_VIN[i]);
1420                         data->in[i][1] = nct6775_read_value(data,
1421                                           data->REG_IN_MINMAX[0][i]);
1422                         data->in[i][2] = nct6775_read_value(data,
1423                                           data->REG_IN_MINMAX[1][i]);
1424                 }
1425
1426                 /* Measured fan speeds and limits */
1427                 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
1428                         u16 reg;
1429
1430                         if (!(data->has_fan & (1 << i)))
1431                                 continue;
1432
1433                         reg = nct6775_read_value(data, data->REG_FAN[i]);
1434                         data->rpm[i] = data->fan_from_reg(reg,
1435                                                           data->fan_div[i]);
1436
1437                         if (data->has_fan_min & (1 << i))
1438                                 data->fan_min[i] = nct6775_read_value(data,
1439                                            data->REG_FAN_MIN[i]);
1440                         data->fan_pulses[i] =
1441                           (nct6775_read_value(data, data->REG_FAN_PULSES[i])
1442                                 >> data->FAN_PULSE_SHIFT[i]) & 0x03;
1443
1444                         nct6775_select_fan_div(dev, data, i, reg);
1445                 }
1446
1447                 nct6775_update_pwm(dev);
1448                 nct6775_update_pwm_limits(dev);
1449
1450                 /* Measured temperatures and limits */
1451                 for (i = 0; i < NUM_TEMP; i++) {
1452                         if (!(data->have_temp & (1 << i)))
1453                                 continue;
1454                         for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1455                                 if (data->reg_temp[j][i])
1456                                         data->temp[j][i]
1457                                           = nct6775_read_temp(data,
1458                                                 data->reg_temp[j][i]);
1459                         }
1460                         if (!(data->have_temp_fixed & (1 << i)))
1461                                 continue;
1462                         data->temp_offset[i]
1463                           = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1464                 }
1465
1466                 data->alarms = 0;
1467                 for (i = 0; i < NUM_REG_ALARM; i++) {
1468                         u8 alarm;
1469                         if (!data->REG_ALARM[i])
1470                                 continue;
1471                         alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1472                         data->alarms |= ((u64)alarm) << (i << 3);
1473                 }
1474
1475                 data->beeps = 0;
1476                 for (i = 0; i < NUM_REG_BEEP; i++) {
1477                         u8 beep;
1478                         if (!data->REG_BEEP[i])
1479                                 continue;
1480                         beep = nct6775_read_value(data, data->REG_BEEP[i]);
1481                         data->beeps |= ((u64)beep) << (i << 3);
1482                 }
1483
1484                 data->last_updated = jiffies;
1485                 data->valid = true;
1486         }
1487
1488         mutex_unlock(&data->update_lock);
1489         return data;
1490 }
1491
1492 /*
1493  * Sysfs callback functions
1494  */
1495 static ssize_t
1496 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1497 {
1498         struct nct6775_data *data = nct6775_update_device(dev);
1499         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1500         int nr = sattr->nr;
1501         int index = sattr->index;
1502         return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1503 }
1504
1505 static ssize_t
1506 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1507              size_t count)
1508 {
1509         struct nct6775_data *data = dev_get_drvdata(dev);
1510         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1511         int nr = sattr->nr;
1512         int index = sattr->index;
1513         unsigned long val;
1514         int err = kstrtoul(buf, 10, &val);
1515         if (err < 0)
1516                 return err;
1517         mutex_lock(&data->update_lock);
1518         data->in[nr][index] = in_to_reg(val, nr);
1519         nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr],
1520                             data->in[nr][index]);
1521         mutex_unlock(&data->update_lock);
1522         return count;
1523 }
1524
1525 static ssize_t
1526 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1527 {
1528         struct nct6775_data *data = nct6775_update_device(dev);
1529         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1530         int nr = data->ALARM_BITS[sattr->index];
1531         return sprintf(buf, "%u\n",
1532                        (unsigned int)((data->alarms >> nr) & 0x01));
1533 }
1534
1535 static int find_temp_source(struct nct6775_data *data, int index, int count)
1536 {
1537         int source = data->temp_src[index];
1538         int nr;
1539
1540         for (nr = 0; nr < count; nr++) {
1541                 int src;
1542
1543                 src = nct6775_read_value(data,
1544                                          data->REG_TEMP_SOURCE[nr]) & 0x1f;
1545                 if (src == source)
1546                         return nr;
1547         }
1548         return -1;
1549 }
1550
1551 static ssize_t
1552 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1553 {
1554         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1555         struct nct6775_data *data = nct6775_update_device(dev);
1556         unsigned int alarm = 0;
1557         int nr;
1558
1559         /*
1560          * For temperatures, there is no fixed mapping from registers to alarm
1561          * bits. Alarm bits are determined by the temperature source mapping.
1562          */
1563         nr = find_temp_source(data, sattr->index, data->num_temp_alarms);
1564         if (nr >= 0) {
1565                 int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE];
1566                 alarm = (data->alarms >> bit) & 0x01;
1567         }
1568         return sprintf(buf, "%u\n", alarm);
1569 }
1570
1571 static ssize_t
1572 show_beep(struct device *dev, struct device_attribute *attr, char *buf)
1573 {
1574         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1575         struct nct6775_data *data = nct6775_update_device(dev);
1576         int nr = data->BEEP_BITS[sattr->index];
1577
1578         return sprintf(buf, "%u\n",
1579                        (unsigned int)((data->beeps >> nr) & 0x01));
1580 }
1581
1582 static ssize_t
1583 store_beep(struct device *dev, struct device_attribute *attr, const char *buf,
1584            size_t count)
1585 {
1586         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1587         struct nct6775_data *data = dev_get_drvdata(dev);
1588         int nr = data->BEEP_BITS[sattr->index];
1589         int regindex = nr >> 3;
1590         unsigned long val;
1591
1592         int err = kstrtoul(buf, 10, &val);
1593         if (err < 0)
1594                 return err;
1595         if (val > 1)
1596                 return -EINVAL;
1597
1598         mutex_lock(&data->update_lock);
1599         if (val)
1600                 data->beeps |= (1ULL << nr);
1601         else
1602                 data->beeps &= ~(1ULL << nr);
1603         nct6775_write_value(data, data->REG_BEEP[regindex],
1604                             (data->beeps >> (regindex << 3)) & 0xff);
1605         mutex_unlock(&data->update_lock);
1606         return count;
1607 }
1608
1609 static ssize_t
1610 show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf)
1611 {
1612         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1613         struct nct6775_data *data = nct6775_update_device(dev);
1614         unsigned int beep = 0;
1615         int nr;
1616
1617         /*
1618          * For temperatures, there is no fixed mapping from registers to beep
1619          * enable bits. Beep enable bits are determined by the temperature
1620          * source mapping.
1621          */
1622         nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1623         if (nr >= 0) {
1624                 int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1625                 beep = (data->beeps >> bit) & 0x01;
1626         }
1627         return sprintf(buf, "%u\n", beep);
1628 }
1629
1630 static ssize_t
1631 store_temp_beep(struct device *dev, struct device_attribute *attr,
1632                 const char *buf, size_t count)
1633 {
1634         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1635         struct nct6775_data *data = dev_get_drvdata(dev);
1636         int nr, bit, regindex;
1637         unsigned long val;
1638
1639         int err = kstrtoul(buf, 10, &val);
1640         if (err < 0)
1641                 return err;
1642         if (val > 1)
1643                 return -EINVAL;
1644
1645         nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1646         if (nr < 0)
1647                 return -ENODEV;
1648
1649         bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1650         regindex = bit >> 3;
1651
1652         mutex_lock(&data->update_lock);
1653         if (val)
1654                 data->beeps |= (1ULL << bit);
1655         else
1656                 data->beeps &= ~(1ULL << bit);
1657         nct6775_write_value(data, data->REG_BEEP[regindex],
1658                             (data->beeps >> (regindex << 3)) & 0xff);
1659         mutex_unlock(&data->update_lock);
1660
1661         return count;
1662 }
1663
1664 static umode_t nct6775_in_is_visible(struct kobject *kobj,
1665                                      struct attribute *attr, int index)
1666 {
1667         struct device *dev = container_of(kobj, struct device, kobj);
1668         struct nct6775_data *data = dev_get_drvdata(dev);
1669         int in = index / 5;     /* voltage index */
1670
1671         if (!(data->have_in & (1 << in)))
1672                 return 0;
1673
1674         return attr->mode;
1675 }
1676
1677 SENSOR_TEMPLATE_2(in_input, "in%d_input", S_IRUGO, show_in_reg, NULL, 0, 0);
1678 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", S_IRUGO, show_alarm, NULL, 0);
1679 SENSOR_TEMPLATE(in_beep, "in%d_beep", S_IWUSR | S_IRUGO, show_beep, store_beep,
1680                 0);
1681 SENSOR_TEMPLATE_2(in_min, "in%d_min", S_IWUSR | S_IRUGO, show_in_reg,
1682                   store_in_reg, 0, 1);
1683 SENSOR_TEMPLATE_2(in_max, "in%d_max", S_IWUSR | S_IRUGO, show_in_reg,
1684                   store_in_reg, 0, 2);
1685
1686 /*
1687  * nct6775_in_is_visible uses the index into the following array
1688  * to determine if attributes should be created or not.
1689  * Any change in order or content must be matched.
1690  */
1691 static struct sensor_device_template *nct6775_attributes_in_template[] = {
1692         &sensor_dev_template_in_input,
1693         &sensor_dev_template_in_alarm,
1694         &sensor_dev_template_in_beep,
1695         &sensor_dev_template_in_min,
1696         &sensor_dev_template_in_max,
1697         NULL
1698 };
1699
1700 static struct sensor_template_group nct6775_in_template_group = {
1701         .templates = nct6775_attributes_in_template,
1702         .is_visible = nct6775_in_is_visible,
1703 };
1704
1705 static ssize_t
1706 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1707 {
1708         struct nct6775_data *data = nct6775_update_device(dev);
1709         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1710         int nr = sattr->index;
1711         return sprintf(buf, "%d\n", data->rpm[nr]);
1712 }
1713
1714 static ssize_t
1715 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1716 {
1717         struct nct6775_data *data = nct6775_update_device(dev);
1718         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1719         int nr = sattr->index;
1720         return sprintf(buf, "%d\n",
1721                        data->fan_from_reg_min(data->fan_min[nr],
1722                                               data->fan_div[nr]));
1723 }
1724
1725 static ssize_t
1726 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1727 {
1728         struct nct6775_data *data = nct6775_update_device(dev);
1729         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1730         int nr = sattr->index;
1731         return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1732 }
1733
1734 static ssize_t
1735 store_fan_min(struct device *dev, struct device_attribute *attr,
1736               const char *buf, size_t count)
1737 {
1738         struct nct6775_data *data = dev_get_drvdata(dev);
1739         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1740         int nr = sattr->index;
1741         unsigned long val;
1742         int err;
1743         unsigned int reg;
1744         u8 new_div;
1745
1746         err = kstrtoul(buf, 10, &val);
1747         if (err < 0)
1748                 return err;
1749
1750         mutex_lock(&data->update_lock);
1751         if (!data->has_fan_div) {
1752                 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1753                 if (!val) {
1754                         val = 0xff1f;
1755                 } else {
1756                         if (val > 1350000U)
1757                                 val = 135000U;
1758                         val = 1350000U / val;
1759                         val = (val & 0x1f) | ((val << 3) & 0xff00);
1760                 }
1761                 data->fan_min[nr] = val;
1762                 goto write_min; /* Leave fan divider alone */
1763         }
1764         if (!val) {
1765                 /* No min limit, alarm disabled */
1766                 data->fan_min[nr] = 255;
1767                 new_div = data->fan_div[nr]; /* No change */
1768                 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1769                 goto write_div;
1770         }
1771         reg = 1350000U / val;
1772         if (reg >= 128 * 255) {
1773                 /*
1774                  * Speed below this value cannot possibly be represented,
1775                  * even with the highest divider (128)
1776                  */
1777                 data->fan_min[nr] = 254;
1778                 new_div = 7; /* 128 == (1 << 7) */
1779                 dev_warn(dev,
1780                          "fan%u low limit %lu below minimum %u, set to minimum\n",
1781                          nr + 1, val, data->fan_from_reg_min(254, 7));
1782         } else if (!reg) {
1783                 /*
1784                  * Speed above this value cannot possibly be represented,
1785                  * even with the lowest divider (1)
1786                  */
1787                 data->fan_min[nr] = 1;
1788                 new_div = 0; /* 1 == (1 << 0) */
1789                 dev_warn(dev,
1790                          "fan%u low limit %lu above maximum %u, set to maximum\n",
1791                          nr + 1, val, data->fan_from_reg_min(1, 0));
1792         } else {
1793                 /*
1794                  * Automatically pick the best divider, i.e. the one such
1795                  * that the min limit will correspond to a register value
1796                  * in the 96..192 range
1797                  */
1798                 new_div = 0;
1799                 while (reg > 192 && new_div < 7) {
1800                         reg >>= 1;
1801                         new_div++;
1802                 }
1803                 data->fan_min[nr] = reg;
1804         }
1805
1806 write_div:
1807         /*
1808          * Write both the fan clock divider (if it changed) and the new
1809          * fan min (unconditionally)
1810          */
1811         if (new_div != data->fan_div[nr]) {
1812                 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1813                         nr + 1, div_from_reg(data->fan_div[nr]),
1814                         div_from_reg(new_div));
1815                 data->fan_div[nr] = new_div;
1816                 nct6775_write_fan_div_common(data, nr);
1817                 /* Give the chip time to sample a new speed value */
1818                 data->last_updated = jiffies;
1819         }
1820
1821 write_min:
1822         nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1823         mutex_unlock(&data->update_lock);
1824
1825         return count;
1826 }
1827
1828 static ssize_t
1829 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
1830 {
1831         struct nct6775_data *data = nct6775_update_device(dev);
1832         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1833         int p = data->fan_pulses[sattr->index];
1834
1835         return sprintf(buf, "%d\n", p ? : 4);
1836 }
1837
1838 static ssize_t
1839 store_fan_pulses(struct device *dev, struct device_attribute *attr,
1840                  const char *buf, size_t count)
1841 {
1842         struct nct6775_data *data = dev_get_drvdata(dev);
1843         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1844         int nr = sattr->index;
1845         unsigned long val;
1846         int err;
1847         u8 reg;
1848
1849         err = kstrtoul(buf, 10, &val);
1850         if (err < 0)
1851                 return err;
1852
1853         if (val > 4)
1854                 return -EINVAL;
1855
1856         mutex_lock(&data->update_lock);
1857         data->fan_pulses[nr] = val & 3;
1858         reg = nct6775_read_value(data, data->REG_FAN_PULSES[nr]);
1859         reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
1860         reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
1861         nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
1862         mutex_unlock(&data->update_lock);
1863
1864         return count;
1865 }
1866
1867 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
1868                                       struct attribute *attr, int index)
1869 {
1870         struct device *dev = container_of(kobj, struct device, kobj);
1871         struct nct6775_data *data = dev_get_drvdata(dev);
1872         int fan = index / 6;    /* fan index */
1873         int nr = index % 6;     /* attribute index */
1874
1875         if (!(data->has_fan & (1 << fan)))
1876                 return 0;
1877
1878         if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1)
1879                 return 0;
1880         if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1)
1881                 return 0;
1882         if (nr == 4 && !(data->has_fan_min & (1 << fan)))
1883                 return 0;
1884         if (nr == 5 && data->kind != nct6775)
1885                 return 0;
1886
1887         return attr->mode;
1888 }
1889
1890 SENSOR_TEMPLATE(fan_input, "fan%d_input", S_IRUGO, show_fan, NULL, 0);
1891 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", S_IRUGO, show_alarm, NULL,
1892                 FAN_ALARM_BASE);
1893 SENSOR_TEMPLATE(fan_beep, "fan%d_beep", S_IWUSR | S_IRUGO, show_beep,
1894                 store_beep, FAN_ALARM_BASE);
1895 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", S_IWUSR | S_IRUGO, show_fan_pulses,
1896                 store_fan_pulses, 0);
1897 SENSOR_TEMPLATE(fan_min, "fan%d_min", S_IWUSR | S_IRUGO, show_fan_min,
1898                 store_fan_min, 0);
1899 SENSOR_TEMPLATE(fan_div, "fan%d_div", S_IRUGO, show_fan_div, NULL, 0);
1900
1901 /*
1902  * nct6775_fan_is_visible uses the index into the following array
1903  * to determine if attributes should be created or not.
1904  * Any change in order or content must be matched.
1905  */
1906 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
1907         &sensor_dev_template_fan_input,
1908         &sensor_dev_template_fan_alarm, /* 1 */
1909         &sensor_dev_template_fan_beep,  /* 2 */
1910         &sensor_dev_template_fan_pulses,
1911         &sensor_dev_template_fan_min,   /* 4 */
1912         &sensor_dev_template_fan_div,   /* 5 */
1913         NULL
1914 };
1915
1916 static struct sensor_template_group nct6775_fan_template_group = {
1917         .templates = nct6775_attributes_fan_template,
1918         .is_visible = nct6775_fan_is_visible,
1919         .base = 1,
1920 };
1921
1922 static ssize_t
1923 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1924 {
1925         struct nct6775_data *data = nct6775_update_device(dev);
1926         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1927         int nr = sattr->index;
1928         return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1929 }
1930
1931 static ssize_t
1932 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1933 {
1934         struct nct6775_data *data = nct6775_update_device(dev);
1935         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1936         int nr = sattr->nr;
1937         int index = sattr->index;
1938
1939         return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
1940 }
1941
1942 static ssize_t
1943 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
1944            size_t count)
1945 {
1946         struct nct6775_data *data = dev_get_drvdata(dev);
1947         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1948         int nr = sattr->nr;
1949         int index = sattr->index;
1950         int err;
1951         long val;
1952
1953         err = kstrtol(buf, 10, &val);
1954         if (err < 0)
1955                 return err;
1956
1957         mutex_lock(&data->update_lock);
1958         data->temp[index][nr] = LM75_TEMP_TO_REG(val);
1959         nct6775_write_temp(data, data->reg_temp[index][nr],
1960                            data->temp[index][nr]);
1961         mutex_unlock(&data->update_lock);
1962         return count;
1963 }
1964
1965 static ssize_t
1966 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
1967 {
1968         struct nct6775_data *data = nct6775_update_device(dev);
1969         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1970
1971         return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
1972 }
1973
1974 static ssize_t
1975 store_temp_offset(struct device *dev, struct device_attribute *attr,
1976                   const char *buf, size_t count)
1977 {
1978         struct nct6775_data *data = dev_get_drvdata(dev);
1979         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1980         int nr = sattr->index;
1981         long val;
1982         int err;
1983
1984         err = kstrtol(buf, 10, &val);
1985         if (err < 0)
1986                 return err;
1987
1988         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
1989
1990         mutex_lock(&data->update_lock);
1991         data->temp_offset[nr] = val;
1992         nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
1993         mutex_unlock(&data->update_lock);
1994
1995         return count;
1996 }
1997
1998 static ssize_t
1999 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
2000 {
2001         struct nct6775_data *data = nct6775_update_device(dev);
2002         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2003         int nr = sattr->index;
2004         return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
2005 }
2006
2007 static ssize_t
2008 store_temp_type(struct device *dev, struct device_attribute *attr,
2009                 const char *buf, size_t count)
2010 {
2011         struct nct6775_data *data = nct6775_update_device(dev);
2012         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2013         int nr = sattr->index;
2014         unsigned long val;
2015         int err;
2016         u8 vbat, diode, vbit, dbit;
2017
2018         err = kstrtoul(buf, 10, &val);
2019         if (err < 0)
2020                 return err;
2021
2022         if (val != 1 && val != 3 && val != 4)
2023                 return -EINVAL;
2024
2025         mutex_lock(&data->update_lock);
2026
2027         data->temp_type[nr] = val;
2028         vbit = 0x02 << nr;
2029         dbit = data->DIODE_MASK << nr;
2030         vbat = nct6775_read_value(data, data->REG_VBAT) & ~vbit;
2031         diode = nct6775_read_value(data, data->REG_DIODE) & ~dbit;
2032         switch (val) {
2033         case 1: /* CPU diode (diode, current mode) */
2034                 vbat |= vbit;
2035                 diode |= dbit;
2036                 break;
2037         case 3: /* diode, voltage mode */
2038                 vbat |= dbit;
2039                 break;
2040         case 4: /* thermistor */
2041                 break;
2042         }
2043         nct6775_write_value(data, data->REG_VBAT, vbat);
2044         nct6775_write_value(data, data->REG_DIODE, diode);
2045
2046         mutex_unlock(&data->update_lock);
2047         return count;
2048 }
2049
2050 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
2051                                        struct attribute *attr, int index)
2052 {
2053         struct device *dev = container_of(kobj, struct device, kobj);
2054         struct nct6775_data *data = dev_get_drvdata(dev);
2055         int temp = index / 10;  /* temp index */
2056         int nr = index % 10;    /* attribute index */
2057
2058         if (!(data->have_temp & (1 << temp)))
2059                 return 0;
2060
2061         if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0)
2062                 return 0;                               /* alarm */
2063
2064         if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0)
2065                 return 0;                               /* beep */
2066
2067         if (nr == 4 && !data->reg_temp[1][temp])        /* max */
2068                 return 0;
2069
2070         if (nr == 5 && !data->reg_temp[2][temp])        /* max_hyst */
2071                 return 0;
2072
2073         if (nr == 6 && !data->reg_temp[3][temp])        /* crit */
2074                 return 0;
2075
2076         if (nr == 7 && !data->reg_temp[4][temp])        /* lcrit */
2077                 return 0;
2078
2079         /* offset and type only apply to fixed sensors */
2080         if (nr > 7 && !(data->have_temp_fixed & (1 << temp)))
2081                 return 0;
2082
2083         return attr->mode;
2084 }
2085
2086 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", S_IRUGO, show_temp, NULL, 0, 0);
2087 SENSOR_TEMPLATE(temp_label, "temp%d_label", S_IRUGO, show_temp_label, NULL, 0);
2088 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", S_IRUGO | S_IWUSR, show_temp,
2089                   store_temp, 0, 1);
2090 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", S_IRUGO | S_IWUSR,
2091                   show_temp, store_temp, 0, 2);
2092 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", S_IRUGO | S_IWUSR, show_temp,
2093                   store_temp, 0, 3);
2094 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", S_IRUGO | S_IWUSR, show_temp,
2095                   store_temp, 0, 4);
2096 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", S_IRUGO | S_IWUSR,
2097                 show_temp_offset, store_temp_offset, 0);
2098 SENSOR_TEMPLATE(temp_type, "temp%d_type", S_IRUGO | S_IWUSR, show_temp_type,
2099                 store_temp_type, 0);
2100 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", S_IRUGO, show_temp_alarm, NULL, 0);
2101 SENSOR_TEMPLATE(temp_beep, "temp%d_beep", S_IRUGO | S_IWUSR, show_temp_beep,
2102                 store_temp_beep, 0);
2103
2104 /*
2105  * nct6775_temp_is_visible uses the index into the following array
2106  * to determine if attributes should be created or not.
2107  * Any change in order or content must be matched.
2108  */
2109 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
2110         &sensor_dev_template_temp_input,
2111         &sensor_dev_template_temp_label,
2112         &sensor_dev_template_temp_alarm,        /* 2 */
2113         &sensor_dev_template_temp_beep,         /* 3 */
2114         &sensor_dev_template_temp_max,          /* 4 */
2115         &sensor_dev_template_temp_max_hyst,     /* 5 */
2116         &sensor_dev_template_temp_crit,         /* 6 */
2117         &sensor_dev_template_temp_lcrit,        /* 7 */
2118         &sensor_dev_template_temp_offset,       /* 8 */
2119         &sensor_dev_template_temp_type,         /* 9 */
2120         NULL
2121 };
2122
2123 static struct sensor_template_group nct6775_temp_template_group = {
2124         .templates = nct6775_attributes_temp_template,
2125         .is_visible = nct6775_temp_is_visible,
2126         .base = 1,
2127 };
2128
2129 static ssize_t
2130 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
2131 {
2132         struct nct6775_data *data = nct6775_update_device(dev);
2133         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2134
2135         return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
2136 }
2137
2138 static ssize_t
2139 store_pwm_mode(struct device *dev, struct device_attribute *attr,
2140                const char *buf, size_t count)
2141 {
2142         struct nct6775_data *data = dev_get_drvdata(dev);
2143         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2144         int nr = sattr->index;
2145         unsigned long val;
2146         int err;
2147         u8 reg;
2148
2149         err = kstrtoul(buf, 10, &val);
2150         if (err < 0)
2151                 return err;
2152
2153         if (val > 1)
2154                 return -EINVAL;
2155
2156         /* Setting DC mode is not supported for all chips/channels */
2157         if (data->REG_PWM_MODE[nr] == 0) {
2158                 if (val)
2159                         return -EINVAL;
2160                 return count;
2161         }
2162
2163         mutex_lock(&data->update_lock);
2164         data->pwm_mode[nr] = val;
2165         reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
2166         reg &= ~data->PWM_MODE_MASK[nr];
2167         if (val)
2168                 reg |= data->PWM_MODE_MASK[nr];
2169         nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
2170         mutex_unlock(&data->update_lock);
2171         return count;
2172 }
2173
2174 static ssize_t
2175 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2176 {
2177         struct nct6775_data *data = nct6775_update_device(dev);
2178         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2179         int nr = sattr->nr;
2180         int index = sattr->index;
2181         int pwm;
2182
2183         /*
2184          * For automatic fan control modes, show current pwm readings.
2185          * Otherwise, show the configured value.
2186          */
2187         if (index == 0 && data->pwm_enable[nr] > manual)
2188                 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
2189         else
2190                 pwm = data->pwm[index][nr];
2191
2192         return sprintf(buf, "%d\n", pwm);
2193 }
2194
2195 static ssize_t
2196 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
2197           size_t count)
2198 {
2199         struct nct6775_data *data = dev_get_drvdata(dev);
2200         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2201         int nr = sattr->nr;
2202         int index = sattr->index;
2203         unsigned long val;
2204         int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
2205         int maxval[7]
2206           = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
2207         int err;
2208         u8 reg;
2209
2210         err = kstrtoul(buf, 10, &val);
2211         if (err < 0)
2212                 return err;
2213         val = clamp_val(val, minval[index], maxval[index]);
2214
2215         mutex_lock(&data->update_lock);
2216         data->pwm[index][nr] = val;
2217         nct6775_write_value(data, data->REG_PWM[index][nr], val);
2218         if (index == 2) { /* floor: disable if val == 0 */
2219                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2220                 reg &= 0x7f;
2221                 if (val)
2222                         reg |= 0x80;
2223                 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2224         }
2225         mutex_unlock(&data->update_lock);
2226         return count;
2227 }
2228
2229 /* Returns 0 if OK, -EINVAL otherwise */
2230 static int check_trip_points(struct nct6775_data *data, int nr)
2231 {
2232         int i;
2233
2234         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2235                 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
2236                         return -EINVAL;
2237         }
2238         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2239                 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
2240                         return -EINVAL;
2241         }
2242         /* validate critical temperature and pwm if enabled (pwm > 0) */
2243         if (data->auto_pwm[nr][data->auto_pwm_num]) {
2244                 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2245                                 data->auto_temp[nr][data->auto_pwm_num] ||
2246                     data->auto_pwm[nr][data->auto_pwm_num - 1] >
2247                                 data->auto_pwm[nr][data->auto_pwm_num])
2248                         return -EINVAL;
2249         }
2250         return 0;
2251 }
2252
2253 static void pwm_update_registers(struct nct6775_data *data, int nr)
2254 {
2255         u8 reg;
2256
2257         switch (data->pwm_enable[nr]) {
2258         case off:
2259         case manual:
2260                 break;
2261         case speed_cruise:
2262                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2263                 reg = (reg & ~data->tolerance_mask) |
2264                   (data->target_speed_tolerance[nr] & data->tolerance_mask);
2265                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2266                 nct6775_write_value(data, data->REG_TARGET[nr],
2267                                     data->target_speed[nr] & 0xff);
2268                 if (data->REG_TOLERANCE_H) {
2269                         reg = (data->target_speed[nr] >> 8) & 0x0f;
2270                         reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2271                         nct6775_write_value(data,
2272                                             data->REG_TOLERANCE_H[nr],
2273                                             reg);
2274                 }
2275                 break;
2276         case thermal_cruise:
2277                 nct6775_write_value(data, data->REG_TARGET[nr],
2278                                     data->target_temp[nr]);
2279                 /* intentional */
2280         default:
2281                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2282                 reg = (reg & ~data->tolerance_mask) |
2283                   data->temp_tolerance[0][nr];
2284                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2285                 break;
2286         }
2287 }
2288
2289 static ssize_t
2290 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2291 {
2292         struct nct6775_data *data = nct6775_update_device(dev);
2293         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2294
2295         return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2296 }
2297
2298 static ssize_t
2299 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2300                  const char *buf, size_t count)
2301 {
2302         struct nct6775_data *data = dev_get_drvdata(dev);
2303         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2304         int nr = sattr->index;
2305         unsigned long val;
2306         int err;
2307         u16 reg;
2308
2309         err = kstrtoul(buf, 10, &val);
2310         if (err < 0)
2311                 return err;
2312
2313         if (val > sf4)
2314                 return -EINVAL;
2315
2316         if (val == sf3 && data->kind != nct6775)
2317                 return -EINVAL;
2318
2319         if (val == sf4 && check_trip_points(data, nr)) {
2320                 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2321                 dev_err(dev, "Adjust trip points and try again\n");
2322                 return -EINVAL;
2323         }
2324
2325         mutex_lock(&data->update_lock);
2326         data->pwm_enable[nr] = val;
2327         if (val == off) {
2328                 /*
2329                  * turn off pwm control: select manual mode, set pwm to maximum
2330                  */
2331                 data->pwm[0][nr] = 255;
2332                 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2333         }
2334         pwm_update_registers(data, nr);
2335         reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2336         reg &= 0x0f;
2337         reg |= pwm_enable_to_reg(val) << 4;
2338         nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2339         mutex_unlock(&data->update_lock);
2340         return count;
2341 }
2342
2343 static ssize_t
2344 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2345 {
2346         int i, sel = 0;
2347
2348         for (i = 0; i < NUM_TEMP; i++) {
2349                 if (!(data->have_temp & (1 << i)))
2350                         continue;
2351                 if (src == data->temp_src[i]) {
2352                         sel = i + 1;
2353                         break;
2354                 }
2355         }
2356
2357         return sprintf(buf, "%d\n", sel);
2358 }
2359
2360 static ssize_t
2361 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2362 {
2363         struct nct6775_data *data = nct6775_update_device(dev);
2364         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2365         int index = sattr->index;
2366
2367         return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2368 }
2369
2370 static ssize_t
2371 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2372                    const char *buf, size_t count)
2373 {
2374         struct nct6775_data *data = nct6775_update_device(dev);
2375         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2376         int nr = sattr->index;
2377         unsigned long val;
2378         int err, reg, src;
2379
2380         err = kstrtoul(buf, 10, &val);
2381         if (err < 0)
2382                 return err;
2383         if (val == 0 || val > NUM_TEMP)
2384                 return -EINVAL;
2385         if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
2386                 return -EINVAL;
2387
2388         mutex_lock(&data->update_lock);
2389         src = data->temp_src[val - 1];
2390         data->pwm_temp_sel[nr] = src;
2391         reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2392         reg &= 0xe0;
2393         reg |= src;
2394         nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2395         mutex_unlock(&data->update_lock);
2396
2397         return count;
2398 }
2399
2400 static ssize_t
2401 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2402                          char *buf)
2403 {
2404         struct nct6775_data *data = nct6775_update_device(dev);
2405         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2406         int index = sattr->index;
2407
2408         return show_pwm_temp_sel_common(data, buf,
2409                                         data->pwm_weight_temp_sel[index]);
2410 }
2411
2412 static ssize_t
2413 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2414                           const char *buf, size_t count)
2415 {
2416         struct nct6775_data *data = nct6775_update_device(dev);
2417         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2418         int nr = sattr->index;
2419         unsigned long val;
2420         int err, reg, src;
2421
2422         err = kstrtoul(buf, 10, &val);
2423         if (err < 0)
2424                 return err;
2425         if (val > NUM_TEMP)
2426                 return -EINVAL;
2427         if (val && (!(data->have_temp & (1 << (val - 1))) ||
2428                     !data->temp_src[val - 1]))
2429                 return -EINVAL;
2430
2431         mutex_lock(&data->update_lock);
2432         if (val) {
2433                 src = data->temp_src[val - 1];
2434                 data->pwm_weight_temp_sel[nr] = src;
2435                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2436                 reg &= 0xe0;
2437                 reg |= (src | 0x80);
2438                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2439         } else {
2440                 data->pwm_weight_temp_sel[nr] = 0;
2441                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2442                 reg &= 0x7f;
2443                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2444         }
2445         mutex_unlock(&data->update_lock);
2446
2447         return count;
2448 }
2449
2450 static ssize_t
2451 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2452 {
2453         struct nct6775_data *data = nct6775_update_device(dev);
2454         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2455
2456         return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2457 }
2458
2459 static ssize_t
2460 store_target_temp(struct device *dev, struct device_attribute *attr,
2461                   const char *buf, size_t count)
2462 {
2463         struct nct6775_data *data = dev_get_drvdata(dev);
2464         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2465         int nr = sattr->index;
2466         unsigned long val;
2467         int err;
2468
2469         err = kstrtoul(buf, 10, &val);
2470         if (err < 0)
2471                 return err;
2472
2473         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2474                         data->target_temp_mask);
2475
2476         mutex_lock(&data->update_lock);
2477         data->target_temp[nr] = val;
2478         pwm_update_registers(data, nr);
2479         mutex_unlock(&data->update_lock);
2480         return count;
2481 }
2482
2483 static ssize_t
2484 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2485 {
2486         struct nct6775_data *data = nct6775_update_device(dev);
2487         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2488         int nr = sattr->index;
2489
2490         return sprintf(buf, "%d\n",
2491                        fan_from_reg16(data->target_speed[nr],
2492                                       data->fan_div[nr]));
2493 }
2494
2495 static ssize_t
2496 store_target_speed(struct device *dev, struct device_attribute *attr,
2497                    const char *buf, size_t count)
2498 {
2499         struct nct6775_data *data = dev_get_drvdata(dev);
2500         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2501         int nr = sattr->index;
2502         unsigned long val;
2503         int err;
2504         u16 speed;
2505
2506         err = kstrtoul(buf, 10, &val);
2507         if (err < 0)
2508                 return err;
2509
2510         val = clamp_val(val, 0, 1350000U);
2511         speed = fan_to_reg(val, data->fan_div[nr]);
2512
2513         mutex_lock(&data->update_lock);
2514         data->target_speed[nr] = speed;
2515         pwm_update_registers(data, nr);
2516         mutex_unlock(&data->update_lock);
2517         return count;
2518 }
2519
2520 static ssize_t
2521 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2522                     char *buf)
2523 {
2524         struct nct6775_data *data = nct6775_update_device(dev);
2525         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2526         int nr = sattr->nr;
2527         int index = sattr->index;
2528
2529         return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2530 }
2531
2532 static ssize_t
2533 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2534                      const char *buf, size_t count)
2535 {
2536         struct nct6775_data *data = dev_get_drvdata(dev);
2537         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2538         int nr = sattr->nr;
2539         int index = sattr->index;
2540         unsigned long val;
2541         int err;
2542
2543         err = kstrtoul(buf, 10, &val);
2544         if (err < 0)
2545                 return err;
2546
2547         /* Limit tolerance as needed */
2548         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2549
2550         mutex_lock(&data->update_lock);
2551         data->temp_tolerance[index][nr] = val;
2552         if (index)
2553                 pwm_update_registers(data, nr);
2554         else
2555                 nct6775_write_value(data,
2556                                     data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2557                                     val);
2558         mutex_unlock(&data->update_lock);
2559         return count;
2560 }
2561
2562 /*
2563  * Fan speed tolerance is a tricky beast, since the associated register is
2564  * a tick counter, but the value is reported and configured as rpm.
2565  * Compute resulting low and high rpm values and report the difference.
2566  */
2567 static ssize_t
2568 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2569                      char *buf)
2570 {
2571         struct nct6775_data *data = nct6775_update_device(dev);
2572         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2573         int nr = sattr->index;
2574         int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2575         int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2576         int tolerance;
2577
2578         if (low <= 0)
2579                 low = 1;
2580         if (high > 0xffff)
2581                 high = 0xffff;
2582         if (high < low)
2583                 high = low;
2584
2585         tolerance = (fan_from_reg16(low, data->fan_div[nr])
2586                      - fan_from_reg16(high, data->fan_div[nr])) / 2;
2587
2588         return sprintf(buf, "%d\n", tolerance);
2589 }
2590
2591 static ssize_t
2592 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2593                       const char *buf, size_t count)
2594 {
2595         struct nct6775_data *data = dev_get_drvdata(dev);
2596         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2597         int nr = sattr->index;
2598         unsigned long val;
2599         int err;
2600         int low, high;
2601
2602         err = kstrtoul(buf, 10, &val);
2603         if (err < 0)
2604                 return err;
2605
2606         high = fan_from_reg16(data->target_speed[nr],
2607                               data->fan_div[nr]) + val;
2608         low = fan_from_reg16(data->target_speed[nr],
2609                              data->fan_div[nr]) - val;
2610         if (low <= 0)
2611                 low = 1;
2612         if (high < low)
2613                 high = low;
2614
2615         val = (fan_to_reg(low, data->fan_div[nr]) -
2616                fan_to_reg(high, data->fan_div[nr])) / 2;
2617
2618         /* Limit tolerance as needed */
2619         val = clamp_val(val, 0, data->speed_tolerance_limit);
2620
2621         mutex_lock(&data->update_lock);
2622         data->target_speed_tolerance[nr] = val;
2623         pwm_update_registers(data, nr);
2624         mutex_unlock(&data->update_lock);
2625         return count;
2626 }
2627
2628 SENSOR_TEMPLATE_2(pwm, "pwm%d", S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2629 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", S_IWUSR | S_IRUGO, show_pwm_mode,
2630                 store_pwm_mode, 0);
2631 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", S_IWUSR | S_IRUGO, show_pwm_enable,
2632                 store_pwm_enable, 0);
2633 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", S_IWUSR | S_IRUGO,
2634                 show_pwm_temp_sel, store_pwm_temp_sel, 0);
2635 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", S_IWUSR | S_IRUGO,
2636                 show_target_temp, store_target_temp, 0);
2637 SENSOR_TEMPLATE(fan_target, "fan%d_target", S_IWUSR | S_IRUGO,
2638                 show_target_speed, store_target_speed, 0);
2639 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", S_IWUSR | S_IRUGO,
2640                 show_speed_tolerance, store_speed_tolerance, 0);
2641
2642 /* Smart Fan registers */
2643
2644 static ssize_t
2645 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2646 {
2647         struct nct6775_data *data = nct6775_update_device(dev);
2648         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2649         int nr = sattr->nr;
2650         int index = sattr->index;
2651
2652         return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2653 }
2654
2655 static ssize_t
2656 store_weight_temp(struct device *dev, struct device_attribute *attr,
2657                   const char *buf, size_t count)
2658 {
2659         struct nct6775_data *data = dev_get_drvdata(dev);
2660         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2661         int nr = sattr->nr;
2662         int index = sattr->index;
2663         unsigned long val;
2664         int err;
2665
2666         err = kstrtoul(buf, 10, &val);
2667         if (err < 0)
2668                 return err;
2669
2670         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2671
2672         mutex_lock(&data->update_lock);
2673         data->weight_temp[index][nr] = val;
2674         nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2675         mutex_unlock(&data->update_lock);
2676         return count;
2677 }
2678
2679 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", S_IWUSR | S_IRUGO,
2680                   show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
2681 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step",
2682                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 0);
2683 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol",
2684                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 1);
2685 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base",
2686                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 2);
2687 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step",
2688                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 5);
2689 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base",
2690                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 6);
2691
2692 static ssize_t
2693 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2694 {
2695         struct nct6775_data *data = nct6775_update_device(dev);
2696         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2697         int nr = sattr->nr;
2698         int index = sattr->index;
2699
2700         return sprintf(buf, "%d\n",
2701                        step_time_from_reg(data->fan_time[index][nr],
2702                                           data->pwm_mode[nr]));
2703 }
2704
2705 static ssize_t
2706 store_fan_time(struct device *dev, struct device_attribute *attr,
2707                const char *buf, size_t count)
2708 {
2709         struct nct6775_data *data = dev_get_drvdata(dev);
2710         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2711         int nr = sattr->nr;
2712         int index = sattr->index;
2713         unsigned long val;
2714         int err;
2715
2716         err = kstrtoul(buf, 10, &val);
2717         if (err < 0)
2718                 return err;
2719
2720         val = step_time_to_reg(val, data->pwm_mode[nr]);
2721         mutex_lock(&data->update_lock);
2722         data->fan_time[index][nr] = val;
2723         nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2724         mutex_unlock(&data->update_lock);
2725         return count;
2726 }
2727
2728 static ssize_t
2729 show_name(struct device *dev, struct device_attribute *attr, char *buf)
2730 {
2731         struct nct6775_data *data = dev_get_drvdata(dev);
2732
2733         return sprintf(buf, "%s\n", data->name);
2734 }
2735
2736 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
2737
2738 static ssize_t
2739 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2740 {
2741         struct nct6775_data *data = nct6775_update_device(dev);
2742         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2743
2744         return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2745 }
2746
2747 static ssize_t
2748 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2749                const char *buf, size_t count)
2750 {
2751         struct nct6775_data *data = dev_get_drvdata(dev);
2752         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2753         int nr = sattr->nr;
2754         int point = sattr->index;
2755         unsigned long val;
2756         int err;
2757         u8 reg;
2758
2759         err = kstrtoul(buf, 10, &val);
2760         if (err < 0)
2761                 return err;
2762         if (val > 255)
2763                 return -EINVAL;
2764
2765         if (point == data->auto_pwm_num) {
2766                 if (data->kind != nct6775 && !val)
2767                         return -EINVAL;
2768                 if (data->kind != nct6779 && val)
2769                         val = 0xff;
2770         }
2771
2772         mutex_lock(&data->update_lock);
2773         data->auto_pwm[nr][point] = val;
2774         if (point < data->auto_pwm_num) {
2775                 nct6775_write_value(data,
2776                                     NCT6775_AUTO_PWM(data, nr, point),
2777                                     data->auto_pwm[nr][point]);
2778         } else {
2779                 switch (data->kind) {
2780                 case nct6775:
2781                         /* disable if needed (pwm == 0) */
2782                         reg = nct6775_read_value(data,
2783                                                  NCT6775_REG_CRITICAL_ENAB[nr]);
2784                         if (val)
2785                                 reg |= 0x02;
2786                         else
2787                                 reg &= ~0x02;
2788                         nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
2789                                             reg);
2790                         break;
2791                 case nct6776:
2792                         break; /* always enabled, nothing to do */
2793                 case nct6106:
2794                 case nct6779:
2795                 case nct6791:
2796                         nct6775_write_value(data, data->REG_CRITICAL_PWM[nr],
2797                                             val);
2798                         reg = nct6775_read_value(data,
2799                                         data->REG_CRITICAL_PWM_ENABLE[nr]);
2800                         if (val == 255)
2801                                 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
2802                         else
2803                                 reg |= data->CRITICAL_PWM_ENABLE_MASK;
2804                         nct6775_write_value(data,
2805                                             data->REG_CRITICAL_PWM_ENABLE[nr],
2806                                             reg);
2807                         break;
2808                 }
2809         }
2810         mutex_unlock(&data->update_lock);
2811         return count;
2812 }
2813
2814 static ssize_t
2815 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
2816 {
2817         struct nct6775_data *data = nct6775_update_device(dev);
2818         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2819         int nr = sattr->nr;
2820         int point = sattr->index;
2821
2822         /*
2823          * We don't know for sure if the temperature is signed or unsigned.
2824          * Assume it is unsigned.
2825          */
2826         return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
2827 }
2828
2829 static ssize_t
2830 store_auto_temp(struct device *dev, struct device_attribute *attr,
2831                 const char *buf, size_t count)
2832 {
2833         struct nct6775_data *data = dev_get_drvdata(dev);
2834         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2835         int nr = sattr->nr;
2836         int point = sattr->index;
2837         unsigned long val;
2838         int err;
2839
2840         err = kstrtoul(buf, 10, &val);
2841         if (err)
2842                 return err;
2843         if (val > 255000)
2844                 return -EINVAL;
2845
2846         mutex_lock(&data->update_lock);
2847         data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
2848         if (point < data->auto_pwm_num) {
2849                 nct6775_write_value(data,
2850                                     NCT6775_AUTO_TEMP(data, nr, point),
2851                                     data->auto_temp[nr][point]);
2852         } else {
2853                 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
2854                                     data->auto_temp[nr][point]);
2855         }
2856         mutex_unlock(&data->update_lock);
2857         return count;
2858 }
2859
2860 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
2861                                       struct attribute *attr, int index)
2862 {
2863         struct device *dev = container_of(kobj, struct device, kobj);
2864         struct nct6775_data *data = dev_get_drvdata(dev);
2865         int pwm = index / 36;   /* pwm index */
2866         int nr = index % 36;    /* attribute index */
2867
2868         if (!(data->has_pwm & (1 << pwm)))
2869                 return 0;
2870
2871         if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
2872                 return 0;
2873         if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
2874                 return 0;
2875         if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
2876                 return 0;
2877
2878         if (nr >= 22 && nr <= 35) {             /* auto point */
2879                 int api = (nr - 22) / 2;        /* auto point index */
2880
2881                 if (api > data->auto_pwm_num)
2882                         return 0;
2883         }
2884         return attr->mode;
2885 }
2886
2887 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", S_IWUSR | S_IRUGO,
2888                   show_fan_time, store_fan_time, 0, 0);
2889 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", S_IWUSR | S_IRUGO,
2890                   show_fan_time, store_fan_time, 0, 1);
2891 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", S_IWUSR | S_IRUGO,
2892                   show_fan_time, store_fan_time, 0, 2);
2893 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", S_IWUSR | S_IRUGO, show_pwm,
2894                   store_pwm, 0, 1);
2895 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", S_IWUSR | S_IRUGO, show_pwm,
2896                   store_pwm, 0, 2);
2897 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", S_IWUSR | S_IRUGO,
2898                   show_temp_tolerance, store_temp_tolerance, 0, 0);
2899 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance",
2900                   S_IWUSR | S_IRUGO, show_temp_tolerance, store_temp_tolerance,
2901                   0, 1);
2902
2903 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2904                   0, 3);
2905
2906 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", S_IWUSR | S_IRUGO, show_pwm,
2907                   store_pwm, 0, 4);
2908
2909 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm",
2910                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 0);
2911 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp",
2912                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 0);
2913
2914 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm",
2915                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 1);
2916 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp",
2917                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 1);
2918
2919 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm",
2920                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 2);
2921 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp",
2922                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 2);
2923
2924 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm",
2925                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 3);
2926 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp",
2927                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 3);
2928
2929 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm",
2930                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 4);
2931 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp",
2932                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 4);
2933
2934 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm",
2935                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 5);
2936 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp",
2937                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 5);
2938
2939 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm",
2940                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 6);
2941 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp",
2942                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 6);
2943
2944 /*
2945  * nct6775_pwm_is_visible uses the index into the following array
2946  * to determine if attributes should be created or not.
2947  * Any change in order or content must be matched.
2948  */
2949 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
2950         &sensor_dev_template_pwm,
2951         &sensor_dev_template_pwm_mode,
2952         &sensor_dev_template_pwm_enable,
2953         &sensor_dev_template_pwm_temp_sel,
2954         &sensor_dev_template_pwm_temp_tolerance,
2955         &sensor_dev_template_pwm_crit_temp_tolerance,
2956         &sensor_dev_template_pwm_target_temp,
2957         &sensor_dev_template_fan_target,
2958         &sensor_dev_template_fan_tolerance,
2959         &sensor_dev_template_pwm_stop_time,
2960         &sensor_dev_template_pwm_step_up_time,
2961         &sensor_dev_template_pwm_step_down_time,
2962         &sensor_dev_template_pwm_start,
2963         &sensor_dev_template_pwm_floor,
2964         &sensor_dev_template_pwm_weight_temp_sel,
2965         &sensor_dev_template_pwm_weight_temp_step,
2966         &sensor_dev_template_pwm_weight_temp_step_tol,
2967         &sensor_dev_template_pwm_weight_temp_step_base,
2968         &sensor_dev_template_pwm_weight_duty_step,
2969         &sensor_dev_template_pwm_max,                   /* 19 */
2970         &sensor_dev_template_pwm_step,                  /* 20 */
2971         &sensor_dev_template_pwm_weight_duty_base,      /* 21 */
2972         &sensor_dev_template_pwm_auto_point1_pwm,       /* 22 */
2973         &sensor_dev_template_pwm_auto_point1_temp,
2974         &sensor_dev_template_pwm_auto_point2_pwm,
2975         &sensor_dev_template_pwm_auto_point2_temp,
2976         &sensor_dev_template_pwm_auto_point3_pwm,
2977         &sensor_dev_template_pwm_auto_point3_temp,
2978         &sensor_dev_template_pwm_auto_point4_pwm,
2979         &sensor_dev_template_pwm_auto_point4_temp,
2980         &sensor_dev_template_pwm_auto_point5_pwm,
2981         &sensor_dev_template_pwm_auto_point5_temp,
2982         &sensor_dev_template_pwm_auto_point6_pwm,
2983         &sensor_dev_template_pwm_auto_point6_temp,
2984         &sensor_dev_template_pwm_auto_point7_pwm,
2985         &sensor_dev_template_pwm_auto_point7_temp,      /* 35 */
2986
2987         NULL
2988 };
2989
2990 static struct sensor_template_group nct6775_pwm_template_group = {
2991         .templates = nct6775_attributes_pwm_template,
2992         .is_visible = nct6775_pwm_is_visible,
2993         .base = 1,
2994 };
2995
2996 static ssize_t
2997 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
2998 {
2999         struct nct6775_data *data = dev_get_drvdata(dev);
3000         return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
3001 }
3002
3003 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
3004
3005 /* Case open detection */
3006
3007 static ssize_t
3008 clear_caseopen(struct device *dev, struct device_attribute *attr,
3009                const char *buf, size_t count)
3010 {
3011         struct nct6775_data *data = dev_get_drvdata(dev);
3012         struct nct6775_sio_data *sio_data = dev->platform_data;
3013         int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
3014         unsigned long val;
3015         u8 reg;
3016         int ret;
3017
3018         if (kstrtoul(buf, 10, &val) || val != 0)
3019                 return -EINVAL;
3020
3021         mutex_lock(&data->update_lock);
3022
3023         /*
3024          * Use CR registers to clear caseopen status.
3025          * The CR registers are the same for all chips, and not all chips
3026          * support clearing the caseopen status through "regular" registers.
3027          */
3028         ret = superio_enter(sio_data->sioreg);
3029         if (ret) {
3030                 count = ret;
3031                 goto error;
3032         }
3033
3034         superio_select(sio_data->sioreg, NCT6775_LD_ACPI);
3035         reg = superio_inb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
3036         reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3037         superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3038         reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3039         superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3040         superio_exit(sio_data->sioreg);
3041
3042         data->valid = false;    /* Force cache refresh */
3043 error:
3044         mutex_unlock(&data->update_lock);
3045         return count;
3046 }
3047
3048 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
3049                           clear_caseopen, INTRUSION_ALARM_BASE);
3050 static SENSOR_DEVICE_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
3051                           clear_caseopen, INTRUSION_ALARM_BASE + 1);
3052 static SENSOR_DEVICE_ATTR(intrusion0_beep, S_IWUSR | S_IRUGO, show_beep,
3053                           store_beep, INTRUSION_ALARM_BASE);
3054 static SENSOR_DEVICE_ATTR(intrusion1_beep, S_IWUSR | S_IRUGO, show_beep,
3055                           store_beep, INTRUSION_ALARM_BASE + 1);
3056 static SENSOR_DEVICE_ATTR(beep_enable, S_IWUSR | S_IRUGO, show_beep,
3057                           store_beep, BEEP_ENABLE_BASE);
3058
3059 static umode_t nct6775_other_is_visible(struct kobject *kobj,
3060                                         struct attribute *attr, int index)
3061 {
3062         struct device *dev = container_of(kobj, struct device, kobj);
3063         struct nct6775_data *data = dev_get_drvdata(dev);
3064
3065         if (index == 1 && !data->have_vid)
3066                 return 0;
3067
3068         if (index == 2 || index == 3) {
3069                 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + index - 2] < 0)
3070                         return 0;
3071         }
3072
3073         if (index == 4 || index == 5) {
3074                 if (data->BEEP_BITS[INTRUSION_ALARM_BASE + index - 4] < 0)
3075                         return 0;
3076         }
3077
3078         return attr->mode;
3079 }
3080
3081 /*
3082  * nct6775_other_is_visible uses the index into the following array
3083  * to determine if attributes should be created or not.
3084  * Any change in order or content must be matched.
3085  */
3086 static struct attribute *nct6775_attributes_other[] = {
3087         &dev_attr_name.attr,
3088         &dev_attr_cpu0_vid.attr,                                /* 1 */
3089         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,        /* 2 */
3090         &sensor_dev_attr_intrusion1_alarm.dev_attr.attr,        /* 3 */
3091         &sensor_dev_attr_intrusion0_beep.dev_attr.attr,         /* 4 */
3092         &sensor_dev_attr_intrusion1_beep.dev_attr.attr,         /* 5 */
3093         &sensor_dev_attr_beep_enable.dev_attr.attr,             /* 6 */
3094
3095         NULL
3096 };
3097
3098 static const struct attribute_group nct6775_group_other = {
3099         .attrs = nct6775_attributes_other,
3100         .is_visible = nct6775_other_is_visible,
3101 };
3102
3103 /*
3104  * Driver and device management
3105  */
3106
3107 static void nct6775_device_remove_files(struct device *dev)
3108 {
3109         struct nct6775_data *data = dev_get_drvdata(dev);
3110
3111         if (data->group_pwm)
3112                 sysfs_remove_group(&dev->kobj, data->group_pwm);
3113         if (data->group_in)
3114                 sysfs_remove_group(&dev->kobj, data->group_in);
3115         if (data->group_fan)
3116                 sysfs_remove_group(&dev->kobj, data->group_fan);
3117         if (data->group_temp)
3118                 sysfs_remove_group(&dev->kobj, data->group_temp);
3119
3120         sysfs_remove_group(&dev->kobj, &nct6775_group_other);
3121 }
3122
3123 /* Get the monitoring functions started */
3124 static inline void nct6775_init_device(struct nct6775_data *data)
3125 {
3126         int i;
3127         u8 tmp, diode;
3128
3129         /* Start monitoring if needed */
3130         if (data->REG_CONFIG) {
3131                 tmp = nct6775_read_value(data, data->REG_CONFIG);
3132                 if (!(tmp & 0x01))
3133                         nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
3134         }
3135
3136         /* Enable temperature sensors if needed */
3137         for (i = 0; i < NUM_TEMP; i++) {
3138                 if (!(data->have_temp & (1 << i)))
3139                         continue;
3140                 if (!data->reg_temp_config[i])
3141                         continue;
3142                 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
3143                 if (tmp & 0x01)
3144                         nct6775_write_value(data, data->reg_temp_config[i],
3145                                             tmp & 0xfe);
3146         }
3147
3148         /* Enable VBAT monitoring if needed */
3149         tmp = nct6775_read_value(data, data->REG_VBAT);
3150         if (!(tmp & 0x01))
3151                 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
3152
3153         diode = nct6775_read_value(data, data->REG_DIODE);
3154
3155         for (i = 0; i < data->temp_fixed_num; i++) {
3156                 if (!(data->have_temp_fixed & (1 << i)))
3157                         continue;
3158                 if ((tmp & (data->DIODE_MASK << i)))    /* diode */
3159                         data->temp_type[i]
3160                           = 3 - ((diode >> i) & data->DIODE_MASK);
3161                 else                            /* thermistor */
3162                         data->temp_type[i] = 4;
3163         }
3164 }
3165
3166 static void
3167 nct6775_check_fan_inputs(const struct nct6775_sio_data *sio_data,
3168                          struct nct6775_data *data)
3169 {
3170         int regval;
3171         bool fan3pin, fan4pin, fan4min, fan5pin, fan6pin;
3172         bool pwm3pin, pwm4pin, pwm5pin, pwm6pin;
3173
3174         /* fan4 and fan5 share some pins with the GPIO and serial flash */
3175         if (data->kind == nct6775) {
3176                 regval = superio_inb(sio_data->sioreg, 0x2c);
3177
3178                 fan3pin = regval & (1 << 6);
3179                 pwm3pin = regval & (1 << 7);
3180
3181                 /* On NCT6775, fan4 shares pins with the fdc interface */
3182                 fan4pin = !(superio_inb(sio_data->sioreg, 0x2A) & 0x80);
3183                 fan4min = false;
3184                 fan5pin = false;
3185                 fan6pin = false;
3186                 pwm4pin = false;
3187                 pwm5pin = false;
3188                 pwm6pin = false;
3189         } else if (data->kind == nct6776) {
3190                 bool gpok = superio_inb(sio_data->sioreg, 0x27) & 0x80;
3191
3192                 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3193                 regval = superio_inb(sio_data->sioreg, SIO_REG_ENABLE);
3194
3195                 if (regval & 0x80)
3196                         fan3pin = gpok;
3197                 else
3198                         fan3pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x40);
3199
3200                 if (regval & 0x40)
3201                         fan4pin = gpok;
3202                 else
3203                         fan4pin = superio_inb(sio_data->sioreg, 0x1C) & 0x01;
3204
3205                 if (regval & 0x20)
3206                         fan5pin = gpok;
3207                 else
3208                         fan5pin = superio_inb(sio_data->sioreg, 0x1C) & 0x02;
3209
3210                 fan4min = fan4pin;
3211                 fan6pin = false;
3212                 pwm3pin = fan3pin;
3213                 pwm4pin = false;
3214                 pwm5pin = false;
3215                 pwm6pin = false;
3216         } else if (data->kind == nct6106) {
3217                 regval = superio_inb(sio_data->sioreg, 0x24);
3218                 fan3pin = !(regval & 0x80);
3219                 pwm3pin = regval & 0x08;
3220
3221                 fan4pin = false;
3222                 fan4min = false;
3223                 fan5pin = false;
3224                 fan6pin = false;
3225                 pwm4pin = false;
3226                 pwm5pin = false;
3227                 pwm6pin = false;
3228         } else {        /* NCT6779D or NCT6791D */
3229                 regval = superio_inb(sio_data->sioreg, 0x1c);
3230
3231                 fan3pin = !(regval & (1 << 5));
3232                 fan4pin = !(regval & (1 << 6));
3233                 fan5pin = !(regval & (1 << 7));
3234
3235                 pwm3pin = !(regval & (1 << 0));
3236                 pwm4pin = !(regval & (1 << 1));
3237                 pwm5pin = !(regval & (1 << 2));
3238
3239                 fan4min = fan4pin;
3240
3241                 if (data->kind == nct6791) {
3242                         regval = superio_inb(sio_data->sioreg, 0x2d);
3243                         fan6pin = (regval & (1 << 1));
3244                         pwm6pin = (regval & (1 << 0));
3245                 } else {        /* NCT6779D */
3246                         fan6pin = false;
3247                         pwm6pin = false;
3248                 }
3249         }
3250
3251         /* fan 1 and 2 (0x03) are always present */
3252         data->has_fan = 0x03 | (fan3pin << 2) | (fan4pin << 3) |
3253                 (fan5pin << 4) | (fan6pin << 5);
3254         data->has_fan_min = 0x03 | (fan3pin << 2) | (fan4min << 3) |
3255                 (fan5pin << 4);
3256         data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) |
3257                 (pwm5pin << 4) | (pwm6pin << 5);
3258 }
3259
3260 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
3261                              int *available, int *mask)
3262 {
3263         int i;
3264         u8 src;
3265
3266         for (i = 0; i < data->pwm_num && *available; i++) {
3267                 int index;
3268
3269                 if (!regp[i])
3270                         continue;
3271                 src = nct6775_read_value(data, regp[i]);
3272                 src &= 0x1f;
3273                 if (!src || (*mask & (1 << src)))
3274                         continue;
3275                 if (src >= data->temp_label_num ||
3276                     !strlen(data->temp_label[src]))
3277                         continue;
3278
3279                 index = __ffs(*available);
3280                 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3281                 *available &= ~(1 << index);
3282                 *mask |= 1 << src;
3283         }
3284 }
3285
3286 static int nct6775_probe(struct platform_device *pdev)
3287 {
3288         struct device *dev = &pdev->dev;
3289         struct nct6775_sio_data *sio_data = dev->platform_data;
3290         struct nct6775_data *data;
3291         struct resource *res;
3292         int i, s, err = 0;
3293         int src, mask, available;
3294         const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3295         const u16 *reg_temp_alternate, *reg_temp_crit;
3296         const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL;
3297         int num_reg_temp;
3298         u8 cr2a;
3299         struct attribute_group *group;
3300
3301         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3302         if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3303                                  DRVNAME))
3304                 return -EBUSY;
3305
3306         data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3307                             GFP_KERNEL);
3308         if (!data)
3309                 return -ENOMEM;
3310
3311         data->kind = sio_data->kind;
3312         data->addr = res->start;
3313         mutex_init(&data->update_lock);
3314         data->name = nct6775_device_names[data->kind];
3315         data->bank = 0xff;              /* Force initial bank selection */
3316         platform_set_drvdata(pdev, data);
3317
3318         switch (data->kind) {
3319         case nct6106:
3320                 data->in_num = 9;
3321                 data->pwm_num = 3;
3322                 data->auto_pwm_num = 4;
3323                 data->temp_fixed_num = 3;
3324                 data->num_temp_alarms = 6;
3325                 data->num_temp_beeps = 6;
3326
3327                 data->fan_from_reg = fan_from_reg13;
3328                 data->fan_from_reg_min = fan_from_reg13;
3329
3330                 data->temp_label = nct6776_temp_label;
3331                 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3332
3333                 data->REG_VBAT = NCT6106_REG_VBAT;
3334                 data->REG_DIODE = NCT6106_REG_DIODE;
3335                 data->DIODE_MASK = NCT6106_DIODE_MASK;
3336                 data->REG_VIN = NCT6106_REG_IN;
3337                 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3338                 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3339                 data->REG_TARGET = NCT6106_REG_TARGET;
3340                 data->REG_FAN = NCT6106_REG_FAN;
3341                 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
3342                 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
3343                 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
3344                 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
3345                 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
3346                 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
3347                 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
3348                 data->REG_PWM[0] = NCT6106_REG_PWM;
3349                 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
3350                 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
3351                 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3352                 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3353                 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3354                 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3355                 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3356                 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
3357                 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
3358                 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
3359                 data->REG_CRITICAL_TEMP_TOLERANCE
3360                   = NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
3361                 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
3362                 data->CRITICAL_PWM_ENABLE_MASK
3363                   = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3364                 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
3365                 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3366                 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3367                 data->REG_TEMP_SEL = NCT6106_REG_TEMP_SEL;
3368                 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3369                 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3370                 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3371                 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3372                 data->REG_ALARM = NCT6106_REG_ALARM;
3373                 data->ALARM_BITS = NCT6106_ALARM_BITS;
3374                 data->REG_BEEP = NCT6106_REG_BEEP;
3375                 data->BEEP_BITS = NCT6106_BEEP_BITS;
3376
3377                 reg_temp = NCT6106_REG_TEMP;
3378                 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3379                 reg_temp_over = NCT6106_REG_TEMP_OVER;
3380                 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3381                 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3382                 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3383                 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3384                 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3385                 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3386
3387                 break;
3388         case nct6775:
3389                 data->in_num = 9;
3390                 data->pwm_num = 3;
3391                 data->auto_pwm_num = 6;
3392                 data->has_fan_div = true;
3393                 data->temp_fixed_num = 3;
3394                 data->num_temp_alarms = 3;
3395                 data->num_temp_beeps = 3;
3396
3397                 data->ALARM_BITS = NCT6775_ALARM_BITS;
3398                 data->BEEP_BITS = NCT6775_BEEP_BITS;
3399
3400                 data->fan_from_reg = fan_from_reg16;
3401                 data->fan_from_reg_min = fan_from_reg8;
3402                 data->target_temp_mask = 0x7f;
3403                 data->tolerance_mask = 0x0f;
3404                 data->speed_tolerance_limit = 15;
3405
3406                 data->temp_label = nct6775_temp_label;
3407                 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
3408
3409                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3410                 data->REG_VBAT = NCT6775_REG_VBAT;
3411                 data->REG_DIODE = NCT6775_REG_DIODE;
3412                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3413                 data->REG_VIN = NCT6775_REG_IN;
3414                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3415                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3416                 data->REG_TARGET = NCT6775_REG_TARGET;
3417                 data->REG_FAN = NCT6775_REG_FAN;
3418                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3419                 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3420                 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3421                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3422                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3423                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3424                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3425                 data->REG_PWM[0] = NCT6775_REG_PWM;
3426                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3427                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3428                 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3429                 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3430                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3431                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3432                 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3433                 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3434                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3435                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3436                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3437                 data->REG_CRITICAL_TEMP_TOLERANCE
3438                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3439                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3440                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3441                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3442                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3443                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3444                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3445                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3446                 data->REG_ALARM = NCT6775_REG_ALARM;
3447                 data->REG_BEEP = NCT6775_REG_BEEP;
3448
3449                 reg_temp = NCT6775_REG_TEMP;
3450                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3451                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3452                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3453                 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3454                 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3455                 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3456
3457                 break;
3458         case nct6776:
3459                 data->in_num = 9;
3460                 data->pwm_num = 3;
3461                 data->auto_pwm_num = 4;
3462                 data->has_fan_div = false;
3463                 data->temp_fixed_num = 3;
3464                 data->num_temp_alarms = 3;
3465                 data->num_temp_beeps = 6;
3466
3467                 data->ALARM_BITS = NCT6776_ALARM_BITS;
3468                 data->BEEP_BITS = NCT6776_BEEP_BITS;
3469
3470                 data->fan_from_reg = fan_from_reg13;
3471                 data->fan_from_reg_min = fan_from_reg13;
3472                 data->target_temp_mask = 0xff;
3473                 data->tolerance_mask = 0x07;
3474                 data->speed_tolerance_limit = 63;
3475
3476                 data->temp_label = nct6776_temp_label;
3477                 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3478
3479                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3480                 data->REG_VBAT = NCT6775_REG_VBAT;
3481                 data->REG_DIODE = NCT6775_REG_DIODE;
3482                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3483                 data->REG_VIN = NCT6775_REG_IN;
3484                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3485                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3486                 data->REG_TARGET = NCT6775_REG_TARGET;
3487                 data->REG_FAN = NCT6775_REG_FAN;
3488                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3489                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3490                 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3491                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3492                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3493                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3494                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3495                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3496                 data->REG_PWM[0] = NCT6775_REG_PWM;
3497                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3498                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3499                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3500                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3501                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3502                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3503                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3504                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3505                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3506                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3507                 data->REG_CRITICAL_TEMP_TOLERANCE
3508                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3509                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3510                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3511                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3512                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3513                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3514                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3515                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3516                 data->REG_ALARM = NCT6775_REG_ALARM;
3517                 data->REG_BEEP = NCT6776_REG_BEEP;
3518
3519                 reg_temp = NCT6775_REG_TEMP;
3520                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3521                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3522                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3523                 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3524                 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3525                 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3526
3527                 break;
3528         case nct6779:
3529                 data->in_num = 15;
3530                 data->pwm_num = 5;
3531                 data->auto_pwm_num = 4;
3532                 data->has_fan_div = false;
3533                 data->temp_fixed_num = 6;
3534                 data->num_temp_alarms = 2;
3535                 data->num_temp_beeps = 2;
3536
3537                 data->ALARM_BITS = NCT6779_ALARM_BITS;
3538                 data->BEEP_BITS = NCT6779_BEEP_BITS;
3539
3540                 data->fan_from_reg = fan_from_reg13;
3541                 data->fan_from_reg_min = fan_from_reg13;
3542                 data->target_temp_mask = 0xff;
3543                 data->tolerance_mask = 0x07;
3544                 data->speed_tolerance_limit = 63;
3545
3546                 data->temp_label = nct6779_temp_label;
3547                 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3548
3549                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3550                 data->REG_VBAT = NCT6775_REG_VBAT;
3551                 data->REG_DIODE = NCT6775_REG_DIODE;
3552                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3553                 data->REG_VIN = NCT6779_REG_IN;
3554                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3555                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3556                 data->REG_TARGET = NCT6775_REG_TARGET;
3557                 data->REG_FAN = NCT6779_REG_FAN;
3558                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3559                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3560                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3561                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3562                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3563                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3564                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3565                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3566                 data->REG_PWM[0] = NCT6775_REG_PWM;
3567                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3568                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3569                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3570                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3571                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3572                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3573                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3574                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3575                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3576                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3577                 data->REG_CRITICAL_TEMP_TOLERANCE
3578                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3579                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3580                 data->CRITICAL_PWM_ENABLE_MASK
3581                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3582                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3583                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3584                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3585                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3586                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3587                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3588                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3589                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3590                 data->REG_ALARM = NCT6779_REG_ALARM;
3591                 data->REG_BEEP = NCT6776_REG_BEEP;
3592
3593                 reg_temp = NCT6779_REG_TEMP;
3594                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3595                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3596                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3597                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3598                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3599                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3600
3601                 break;
3602         case nct6791:
3603                 data->in_num = 15;
3604                 data->pwm_num = 6;
3605                 data->auto_pwm_num = 4;
3606                 data->has_fan_div = false;
3607                 data->temp_fixed_num = 6;
3608                 data->num_temp_alarms = 2;
3609                 data->num_temp_beeps = 2;
3610
3611                 data->ALARM_BITS = NCT6791_ALARM_BITS;
3612                 data->BEEP_BITS = NCT6779_BEEP_BITS;
3613
3614                 data->fan_from_reg = fan_from_reg13;
3615                 data->fan_from_reg_min = fan_from_reg13;
3616                 data->target_temp_mask = 0xff;
3617                 data->tolerance_mask = 0x07;
3618                 data->speed_tolerance_limit = 63;
3619
3620                 data->temp_label = nct6779_temp_label;
3621                 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3622
3623                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3624                 data->REG_VBAT = NCT6775_REG_VBAT;
3625                 data->REG_DIODE = NCT6775_REG_DIODE;
3626                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3627                 data->REG_VIN = NCT6779_REG_IN;
3628                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3629                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3630                 data->REG_TARGET = NCT6775_REG_TARGET;
3631                 data->REG_FAN = NCT6779_REG_FAN;
3632                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3633                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3634                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3635                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3636                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3637                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3638                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3639                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3640                 data->REG_PWM[0] = NCT6775_REG_PWM;
3641                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3642                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3643                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3644                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3645                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3646                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3647                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3648                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3649                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3650                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3651                 data->REG_CRITICAL_TEMP_TOLERANCE
3652                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3653                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3654                 data->CRITICAL_PWM_ENABLE_MASK
3655                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3656                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3657                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3658                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3659                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3660                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3661                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3662                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3663                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3664                 data->REG_ALARM = NCT6791_REG_ALARM;
3665                 data->REG_BEEP = NCT6776_REG_BEEP;
3666
3667                 reg_temp = NCT6779_REG_TEMP;
3668                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3669                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3670                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3671                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3672                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3673                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3674
3675                 break;
3676         default:
3677                 return -ENODEV;
3678         }
3679         data->have_in = (1 << data->in_num) - 1;
3680         data->have_temp = 0;
3681
3682         /*
3683          * On some boards, not all available temperature sources are monitored,
3684          * even though some of the monitoring registers are unused.
3685          * Get list of unused monitoring registers, then detect if any fan
3686          * controls are configured to use unmonitored temperature sources.
3687          * If so, assign the unmonitored temperature sources to available
3688          * monitoring registers.
3689          */
3690         mask = 0;
3691         available = 0;
3692         for (i = 0; i < num_reg_temp; i++) {
3693                 if (reg_temp[i] == 0)
3694                         continue;
3695
3696                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3697                 if (!src || (mask & (1 << src)))
3698                         available |= 1 << i;
3699
3700                 mask |= 1 << src;
3701         }
3702
3703         /*
3704          * Now find unmonitored temperature registers and enable monitoring
3705          * if additional monitoring registers are available.
3706          */
3707         add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
3708         add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
3709
3710         mask = 0;
3711         s = NUM_TEMP_FIXED;     /* First dynamic temperature attribute */
3712         for (i = 0; i < num_reg_temp; i++) {
3713                 if (reg_temp[i] == 0)
3714                         continue;
3715
3716                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3717                 if (!src || (mask & (1 << src)))
3718                         continue;
3719
3720                 if (src >= data->temp_label_num ||
3721                     !strlen(data->temp_label[src])) {
3722                         dev_info(dev,
3723                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3724                                  src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
3725                         continue;
3726                 }
3727
3728                 mask |= 1 << src;
3729
3730                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3731                 if (src <= data->temp_fixed_num) {
3732                         data->have_temp |= 1 << (src - 1);
3733                         data->have_temp_fixed |= 1 << (src - 1);
3734                         data->reg_temp[0][src - 1] = reg_temp[i];
3735                         data->reg_temp[1][src - 1] = reg_temp_over[i];
3736                         data->reg_temp[2][src - 1] = reg_temp_hyst[i];
3737                         if (reg_temp_crit_h && reg_temp_crit_h[i])
3738                                 data->reg_temp[3][src - 1] = reg_temp_crit_h[i];
3739                         else if (reg_temp_crit[src - 1])
3740                                 data->reg_temp[3][src - 1]
3741                                   = reg_temp_crit[src - 1];
3742                         if (reg_temp_crit_l && reg_temp_crit_l[i])
3743                                 data->reg_temp[4][src - 1] = reg_temp_crit_l[i];
3744                         data->reg_temp_config[src - 1] = reg_temp_config[i];
3745                         data->temp_src[src - 1] = src;
3746                         continue;
3747                 }
3748
3749                 if (s >= NUM_TEMP)
3750                         continue;
3751
3752                 /* Use dynamic index for other sources */
3753                 data->have_temp |= 1 << s;
3754                 data->reg_temp[0][s] = reg_temp[i];
3755                 data->reg_temp[1][s] = reg_temp_over[i];
3756                 data->reg_temp[2][s] = reg_temp_hyst[i];
3757                 data->reg_temp_config[s] = reg_temp_config[i];
3758                 if (reg_temp_crit_h && reg_temp_crit_h[i])
3759                         data->reg_temp[3][s] = reg_temp_crit_h[i];
3760                 else if (reg_temp_crit[src - 1])
3761                         data->reg_temp[3][s] = reg_temp_crit[src - 1];
3762                 if (reg_temp_crit_l && reg_temp_crit_l[i])
3763                         data->reg_temp[4][s] = reg_temp_crit_l[i];
3764
3765                 data->temp_src[s] = src;
3766                 s++;
3767         }
3768
3769 #ifdef USE_ALTERNATE
3770         /*
3771          * Go through the list of alternate temp registers and enable
3772          * if possible.
3773          * The temperature is already monitored if the respective bit in <mask>
3774          * is set.
3775          */
3776         for (i = 0; i < data->temp_label_num - 1; i++) {
3777                 if (!reg_temp_alternate[i])
3778                         continue;
3779                 if (mask & (1 << (i + 1)))
3780                         continue;
3781                 if (i < data->temp_fixed_num) {
3782                         if (data->have_temp & (1 << i))
3783                                 continue;
3784                         data->have_temp |= 1 << i;
3785                         data->have_temp_fixed |= 1 << i;
3786                         data->reg_temp[0][i] = reg_temp_alternate[i];
3787                         if (i < num_reg_temp) {
3788                                 data->reg_temp[1][i] = reg_temp_over[i];
3789                                 data->reg_temp[2][i] = reg_temp_hyst[i];
3790                         }
3791                         data->temp_src[i] = i + 1;
3792                         continue;
3793                 }
3794
3795                 if (s >= NUM_TEMP)      /* Abort if no more space */
3796                         break;
3797
3798                 data->have_temp |= 1 << s;
3799                 data->reg_temp[0][s] = reg_temp_alternate[i];
3800                 data->temp_src[s] = i + 1;
3801                 s++;
3802         }
3803 #endif /* USE_ALTERNATE */
3804
3805         /* Initialize the chip */
3806         nct6775_init_device(data);
3807
3808         err = superio_enter(sio_data->sioreg);
3809         if (err)
3810                 return err;
3811
3812         cr2a = superio_inb(sio_data->sioreg, 0x2a);
3813         switch (data->kind) {
3814         case nct6775:
3815                 data->have_vid = (cr2a & 0x40);
3816                 break;
3817         case nct6776:
3818                 data->have_vid = (cr2a & 0x60) == 0x40;
3819                 break;
3820         case nct6106:
3821         case nct6779:
3822         case nct6791:
3823                 break;
3824         }
3825
3826         /*
3827          * Read VID value
3828          * We can get the VID input values directly at logical device D 0xe3.
3829          */
3830         if (data->have_vid) {
3831                 superio_select(sio_data->sioreg, NCT6775_LD_VID);
3832                 data->vid = superio_inb(sio_data->sioreg, 0xe3);
3833                 data->vrm = vid_which_vrm();
3834         }
3835
3836         if (fan_debounce) {
3837                 u8 tmp;
3838
3839                 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3840                 tmp = superio_inb(sio_data->sioreg,
3841                                   NCT6775_REG_CR_FAN_DEBOUNCE);
3842                 switch (data->kind) {
3843                 case nct6106:
3844                         tmp |= 0xe0;
3845                         break;
3846                 case nct6775:
3847                         tmp |= 0x1e;
3848                         break;
3849                 case nct6776:
3850                 case nct6779:
3851                         tmp |= 0x3e;
3852                         break;
3853                 case nct6791:
3854                         tmp |= 0x7e;
3855                         break;
3856                 }
3857                 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
3858                              tmp);
3859                 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
3860                          data->name);
3861         }
3862
3863         nct6775_check_fan_inputs(sio_data, data);
3864
3865         superio_exit(sio_data->sioreg);
3866
3867         /* Read fan clock dividers immediately */
3868         nct6775_init_fan_common(dev, data);
3869
3870         /* Register sysfs hooks */
3871         group = nct6775_create_attr_group(dev, &nct6775_pwm_template_group,
3872                                           data->pwm_num);
3873         if (IS_ERR(group)) {
3874                 err = PTR_ERR(group);
3875                 goto exit_remove;
3876         }
3877         data->group_pwm = group;
3878
3879         group = nct6775_create_attr_group(dev, &nct6775_in_template_group,
3880                                           fls(data->have_in));
3881         if (IS_ERR(group)) {
3882                 err = PTR_ERR(group);
3883                 goto exit_remove;
3884         }
3885         data->group_in = group;
3886
3887         group = nct6775_create_attr_group(dev, &nct6775_fan_template_group,
3888                                           fls(data->has_fan));
3889         if (IS_ERR(group)) {
3890                 err = PTR_ERR(group);
3891                 goto exit_remove;
3892         }
3893         data->group_fan = group;
3894
3895         group = nct6775_create_attr_group(dev, &nct6775_temp_template_group,
3896                                           fls(data->have_temp));
3897         if (IS_ERR(group)) {
3898                 err = PTR_ERR(group);
3899                 goto exit_remove;
3900         }
3901         data->group_temp = group;
3902
3903         err = sysfs_create_group(&dev->kobj, &nct6775_group_other);
3904         if (err)
3905                 goto exit_remove;
3906
3907         data->hwmon_dev = hwmon_device_register(dev);
3908         if (IS_ERR(data->hwmon_dev)) {
3909                 err = PTR_ERR(data->hwmon_dev);
3910                 goto exit_remove;
3911         }
3912
3913         return 0;
3914
3915 exit_remove:
3916         nct6775_device_remove_files(dev);
3917         return err;
3918 }
3919
3920 static int nct6775_remove(struct platform_device *pdev)
3921 {
3922         struct nct6775_data *data = platform_get_drvdata(pdev);
3923
3924         hwmon_device_unregister(data->hwmon_dev);
3925         nct6775_device_remove_files(&pdev->dev);
3926
3927         return 0;
3928 }
3929
3930 #ifdef CONFIG_PM
3931 static int nct6775_suspend(struct device *dev)
3932 {
3933         struct nct6775_data *data = nct6775_update_device(dev);
3934         struct nct6775_sio_data *sio_data = dev->platform_data;
3935
3936         mutex_lock(&data->update_lock);
3937         data->vbat = nct6775_read_value(data, data->REG_VBAT);
3938         if (sio_data->kind == nct6775) {
3939                 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
3940                 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
3941         }
3942         mutex_unlock(&data->update_lock);
3943
3944         return 0;
3945 }
3946
3947 static int nct6775_resume(struct device *dev)
3948 {
3949         struct nct6775_data *data = dev_get_drvdata(dev);
3950         struct nct6775_sio_data *sio_data = dev->platform_data;
3951         int i, j;
3952
3953         mutex_lock(&data->update_lock);
3954         data->bank = 0xff;              /* Force initial bank selection */
3955
3956         /* Restore limits */
3957         for (i = 0; i < data->in_num; i++) {
3958                 if (!(data->have_in & (1 << i)))
3959                         continue;
3960
3961                 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
3962                                     data->in[i][1]);
3963                 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
3964                                     data->in[i][2]);
3965         }
3966
3967         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
3968                 if (!(data->has_fan_min & (1 << i)))
3969                         continue;
3970
3971                 nct6775_write_value(data, data->REG_FAN_MIN[i],
3972                                     data->fan_min[i]);
3973         }
3974
3975         for (i = 0; i < NUM_TEMP; i++) {
3976                 if (!(data->have_temp & (1 << i)))
3977                         continue;
3978
3979                 for (j = 1; j < ARRAY_SIZE(data->reg_temp); j++)
3980                         if (data->reg_temp[j][i])
3981                                 nct6775_write_temp(data, data->reg_temp[j][i],
3982                                                    data->temp[j][i]);
3983         }
3984
3985         /* Restore other settings */
3986         nct6775_write_value(data, data->REG_VBAT, data->vbat);
3987         if (sio_data->kind == nct6775) {
3988                 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
3989                 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
3990         }
3991
3992         /* Force re-reading all values */
3993         data->valid = false;
3994         mutex_unlock(&data->update_lock);
3995
3996         return 0;
3997 }
3998
3999 static const struct dev_pm_ops nct6775_dev_pm_ops = {
4000         .suspend = nct6775_suspend,
4001         .resume = nct6775_resume,
4002 };
4003
4004 #define NCT6775_DEV_PM_OPS      (&nct6775_dev_pm_ops)
4005 #else
4006 #define NCT6775_DEV_PM_OPS      NULL
4007 #endif /* CONFIG_PM */
4008
4009 static struct platform_driver nct6775_driver = {
4010         .driver = {
4011                 .owner  = THIS_MODULE,
4012                 .name   = DRVNAME,
4013                 .pm     = NCT6775_DEV_PM_OPS,
4014         },
4015         .probe          = nct6775_probe,
4016         .remove         = nct6775_remove,
4017 };
4018
4019 static const char * const nct6775_sio_names[] __initconst = {
4020         "NCT6106D",
4021         "NCT6775F",
4022         "NCT6776D/F",
4023         "NCT6779D",
4024         "NCT6791D",
4025 };
4026
4027 /* nct6775_find() looks for a '627 in the Super-I/O config space */
4028 static int __init nct6775_find(int sioaddr, struct nct6775_sio_data *sio_data)
4029 {
4030         u16 val;
4031         int err;
4032         int addr;
4033
4034         err = superio_enter(sioaddr);
4035         if (err)
4036                 return err;
4037
4038         if (force_id)
4039                 val = force_id;
4040         else
4041                 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
4042                     | superio_inb(sioaddr, SIO_REG_DEVID + 1);
4043         switch (val & SIO_ID_MASK) {
4044         case SIO_NCT6106_ID:
4045                 sio_data->kind = nct6106;
4046                 break;
4047         case SIO_NCT6775_ID:
4048                 sio_data->kind = nct6775;
4049                 break;
4050         case SIO_NCT6776_ID:
4051                 sio_data->kind = nct6776;
4052                 break;
4053         case SIO_NCT6779_ID:
4054                 sio_data->kind = nct6779;
4055                 break;
4056         case SIO_NCT6791_ID:
4057                 sio_data->kind = nct6791;
4058                 break;
4059         default:
4060                 if (val != 0xffff)
4061                         pr_debug("unsupported chip ID: 0x%04x\n", val);
4062                 superio_exit(sioaddr);
4063                 return -ENODEV;
4064         }
4065
4066         /* We have a known chip, find the HWM I/O address */
4067         superio_select(sioaddr, NCT6775_LD_HWM);
4068         val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
4069             | superio_inb(sioaddr, SIO_REG_ADDR + 1);
4070         addr = val & IOREGION_ALIGNMENT;
4071         if (addr == 0) {
4072                 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
4073                 superio_exit(sioaddr);
4074                 return -ENODEV;
4075         }
4076
4077         /* Activate logical device if needed */
4078         val = superio_inb(sioaddr, SIO_REG_ENABLE);
4079         if (!(val & 0x01)) {
4080                 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
4081                 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
4082         }
4083         if (sio_data->kind == nct6791) {
4084                 val = superio_inb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE);
4085                 if (val & 0x10) {
4086                         pr_info("Enabling hardware monitor logical device mappings.\n");
4087                         superio_outb(sioaddr,
4088                                      NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE,
4089                                      val & ~0x10);
4090                 }
4091         }
4092
4093         superio_exit(sioaddr);
4094         pr_info("Found %s or compatible chip at %#x:%#x\n",
4095                 nct6775_sio_names[sio_data->kind], sioaddr, addr);
4096         sio_data->sioreg = sioaddr;
4097
4098         return addr;
4099 }
4100
4101 /*
4102  * when Super-I/O functions move to a separate file, the Super-I/O
4103  * bus will manage the lifetime of the device and this module will only keep
4104  * track of the nct6775 driver. But since we platform_device_alloc(), we
4105  * must keep track of the device
4106  */
4107 static struct platform_device *pdev[2];
4108
4109 static int __init sensors_nct6775_init(void)
4110 {
4111         int i, err;
4112         bool found = false;
4113         int address;
4114         struct resource res;
4115         struct nct6775_sio_data sio_data;
4116         int sioaddr[2] = { 0x2e, 0x4e };
4117
4118         err = platform_driver_register(&nct6775_driver);
4119         if (err)
4120                 return err;
4121
4122         /*
4123          * initialize sio_data->kind and sio_data->sioreg.
4124          *
4125          * when Super-I/O functions move to a separate file, the Super-I/O
4126          * driver will probe 0x2e and 0x4e and auto-detect the presence of a
4127          * nct6775 hardware monitor, and call probe()
4128          */
4129         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4130                 address = nct6775_find(sioaddr[i], &sio_data);
4131                 if (address <= 0)
4132                         continue;
4133
4134                 found = true;
4135
4136                 pdev[i] = platform_device_alloc(DRVNAME, address);
4137                 if (!pdev[i]) {
4138                         err = -ENOMEM;
4139                         goto exit_device_put;
4140                 }
4141
4142                 err = platform_device_add_data(pdev[i], &sio_data,
4143                                                sizeof(struct nct6775_sio_data));
4144                 if (err)
4145                         goto exit_device_put;
4146
4147                 memset(&res, 0, sizeof(res));
4148                 res.name = DRVNAME;
4149                 res.start = address + IOREGION_OFFSET;
4150                 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
4151                 res.flags = IORESOURCE_IO;
4152
4153                 err = acpi_check_resource_conflict(&res);
4154                 if (err) {
4155                         platform_device_put(pdev[i]);
4156                         pdev[i] = NULL;
4157                         continue;
4158                 }
4159
4160                 err = platform_device_add_resources(pdev[i], &res, 1);
4161                 if (err)
4162                         goto exit_device_put;
4163
4164                 /* platform_device_add calls probe() */
4165                 err = platform_device_add(pdev[i]);
4166                 if (err)
4167                         goto exit_device_put;
4168         }
4169         if (!found) {
4170                 err = -ENODEV;
4171                 goto exit_unregister;
4172         }
4173
4174         return 0;
4175
4176 exit_device_put:
4177         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4178                 if (pdev[i])
4179                         platform_device_put(pdev[i]);
4180         }
4181 exit_unregister:
4182         platform_driver_unregister(&nct6775_driver);
4183         return err;
4184 }
4185
4186 static void __exit sensors_nct6775_exit(void)
4187 {
4188         int i;
4189
4190         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4191                 if (pdev[i])
4192                         platform_device_unregister(pdev[i]);
4193         }
4194         platform_driver_unregister(&nct6775_driver);
4195 }
4196
4197 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4198 MODULE_DESCRIPTION("NCT6775F/NCT6776F/NCT6779D driver");
4199 MODULE_LICENSE("GPL");
4200
4201 module_init(sensors_nct6775_init);
4202 module_exit(sensors_nct6775_exit);