git.sur5r.net Git - groeck-nct6775/blob - nct6775.c

   1 /*
   2  * nct6775 - Driver for the hardware monitoring functionality of
   3  *             Nuvoton NCT677x Super-I/O chips
   4  *
   5  * Copyright (C) 2012  Guenter Roeck <linux@roeck-us.net>
   6  *
   7  * Derived from w83627ehf driver
   8  * Copyright (C) 2005-2012  Jean Delvare <khali@linux-fr.org>
   9  * Copyright (C) 2006  Yuan Mu (Winbond),
  10  *                     Rudolf Marek <r.marek@assembler.cz>
  11  *                     David Hubbard <david.c.hubbard@gmail.com>
  12  *                     Daniel J Blueman <daniel.blueman@gmail.com>
  13  * Copyright (C) 2010  Sheng-Yuan Huang (Nuvoton) (PS00)
  14  *
  15  * Shamelessly ripped from the w83627hf driver
  16  * Copyright (C) 2003  Mark Studebaker
  17  *
  18  * This program is free software; you can redistribute it and/or modify
  19  * it under the terms of the GNU General Public License as published by
  20  * the Free Software Foundation; either version 2 of the License, or
  21  * (at your option) any later version.
  22  *
  23  * This program is distributed in the hope that it will be useful,
  24  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26  * GNU General Public License for more details.
  27  *
  28  * You should have received a copy of the GNU General Public License
  29  * along with this program; if not, write to the Free Software
  30  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  31  *
  32  *
  33  * Supports the following chips:
  34  *
  35  * Chip        #vin    #fan    #pwm    #temp  chip IDs       man ID
  36  * nct6106d     9      3       3       6+3    0xc450 0xc1    0x5ca3
  37  * nct6775f     9      4       3       6+3    0xb470 0xc1    0x5ca3
  38  * nct6776f     9      5       3       6+3    0xc330 0xc1    0x5ca3
  39  * nct6779d    15      5       5       2+6    0xc560 0xc1    0x5ca3
  40  * nct6791d    15      6       6       2+6    0xc800 0xc1    0x5ca3
  41  *
  42  * #temp lists the number of monitored temperature sources (first value) plus
  43  * the number of directly connectable temperature sensors (second value).
  44  */
  45
  46 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  47
  48 #include <linux/module.h>
  49 #include <linux/init.h>
  50 #include <linux/slab.h>
  51 #include <linux/jiffies.h>
  52 #include <linux/platform_device.h>
  53 #include <linux/hwmon.h>
  54 #include <linux/hwmon-sysfs.h>
  55 #include <linux/hwmon-vid.h>
  56 #include <linux/err.h>
  57 #include <linux/mutex.h>
  58 #include <linux/acpi.h>
  59 #include <linux/io.h>
  60 #include "lm75.h"
  61 #include "compat.h"
  62
  63 #define USE_ALTERNATE
  64
  65 enum kinds { nct6106, nct6775, nct6776, nct6779, nct6791 };
  66
  67 /* used to set data->name = nct6775_device_names[data->sio_kind] */
  68 static const char * const nct6775_device_names[] = {
  69         "nct6106",
  70         "nct6775",
  71         "nct6776",
  72         "nct6779",
  73         "nct6791",
  74 };
  75
  76 static unsigned short force_id;
  77 module_param(force_id, ushort, 0);
  78 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  79
  80 static unsigned short fan_debounce;
  81 module_param(fan_debounce, ushort, 0);
  82 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
  83
  84 #define DRVNAME "nct6775"
  85
  86 /*
  87  * Super-I/O constants and functions
  88  */
  89
  90 #define NCT6775_LD_ACPI         0x0a
  91 #define NCT6775_LD_HWM          0x0b
  92 #define NCT6775_LD_VID          0x0d
  93
  94 #define SIO_REG_LDSEL           0x07    /* Logical device select */
  95 #define SIO_REG_DEVID           0x20    /* Device ID (2 bytes) */
  96 #define SIO_REG_ENABLE          0x30    /* Logical device enable */
  97 #define SIO_REG_ADDR            0x60    /* Logical device address (2 bytes) */
  98
  99 #define SIO_NCT6106_ID          0xc450
 100 #define SIO_NCT6775_ID          0xb470
 101 #define SIO_NCT6776_ID          0xc330
 102 #define SIO_NCT6779_ID          0xc560
 103 #define SIO_NCT6791_ID          0xc800
 104 #define SIO_ID_MASK             0xFFF0
 105
 106 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
 107
 108 static inline void
 109 superio_outb(int ioreg, int reg, int val)
 110 {
 111         outb(reg, ioreg);
 112         outb(val, ioreg + 1);
 113 }
 114
 115 static inline int
 116 superio_inb(int ioreg, int reg)
 117 {
 118         outb(reg, ioreg);
 119         return inb(ioreg + 1);
 120 }
 121
 122 static inline void
 123 superio_select(int ioreg, int ld)
 124 {
 125         outb(SIO_REG_LDSEL, ioreg);
 126         outb(ld, ioreg + 1);
 127 }
 128
 129 static inline int
 130 superio_enter(int ioreg)
 131 {
 132         /*
 133          * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
 134          */
 135         if (!request_muxed_region(ioreg, 2, DRVNAME))
 136                 return -EBUSY;
 137
 138         outb(0x87, ioreg);
 139         outb(0x87, ioreg);
 140
 141         return 0;
 142 }
 143
 144 static inline void
 145 superio_exit(int ioreg)
 146 {
 147         outb(0xaa, ioreg);
 148         outb(0x02, ioreg);
 149         outb(0x02, ioreg + 1);
 150         release_region(ioreg, 2);
 151 }
 152
 153 /*
 154  * ISA constants
 155  */
 156
 157 #define IOREGION_ALIGNMENT      (~7)
 158 #define IOREGION_OFFSET         5
 159 #define IOREGION_LENGTH         2
 160 #define ADDR_REG_OFFSET         0
 161 #define DATA_REG_OFFSET         1
 162
 163 #define NCT6775_REG_BANK        0x4E
 164 #define NCT6775_REG_CONFIG      0x40
 165
 166 /*
 167  * Not currently used:
 168  * REG_MAN_ID has the value 0x5ca3 for all supported chips.
 169  * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
 170  * REG_MAN_ID is at port 0x4f
 171  * REG_CHIP_ID is at port 0x58
 172  */
 173
 174 #define NUM_TEMP        10      /* Max number of temp attribute sets w/ limits*/
 175 #define NUM_TEMP_FIXED  6       /* Max number of fixed temp attribute sets */
 176
 177 #define NUM_REG_ALARM   7       /* Max number of alarm registers */
 178 #define NUM_REG_BEEP    5       /* Max number of beep registers */
 179
 180 #define NUM_FAN         6
 181
 182 /* Common and NCT6775 specific data */
 183
 184 /* Voltage min/max registers for nr=7..14 are in bank 5 */
 185
 186 static const u16 NCT6775_REG_IN_MAX[] = {
 187         0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
 188         0x55c, 0x55e, 0x560, 0x562 };
 189 static const u16 NCT6775_REG_IN_MIN[] = {
 190         0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
 191         0x55d, 0x55f, 0x561, 0x563 };
 192 static const u16 NCT6775_REG_IN[] = {
 193         0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
 194 };
 195
 196 #define NCT6775_REG_VBAT                0x5D
 197 #define NCT6775_REG_DIODE               0x5E
 198 #define NCT6775_DIODE_MASK              0x02
 199
 200 #define NCT6775_REG_FANDIV1             0x506
 201 #define NCT6775_REG_FANDIV2             0x507
 202
 203 #define NCT6775_REG_CR_FAN_DEBOUNCE     0xf0
 204
 205 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
 206
 207 /* 0..15 voltages, 16..23 fans, 24..29 temperatures, 30..31 intrusion */
 208
 209 static const s8 NCT6775_ALARM_BITS[] = {
 210         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 211         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 212         -1,                             /* unused */
 213         6, 7, 11, -1, -1,               /* fan1..fan5 */
 214         -1, -1, -1,                     /* unused */
 215         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 216         12, -1 };                       /* intrusion0, intrusion1 */
 217
 218 #define FAN_ALARM_BASE          16
 219 #define TEMP_ALARM_BASE         24
 220 #define INTRUSION_ALARM_BASE    30
 221
 222 static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e };
 223
 224 /*
 225  * 0..14 voltages, 15 global beep enable, 16..23 fans, 24..29 temperatures,
 226  * 30..31 intrusion
 227  */
 228 static const s8 NCT6775_BEEP_BITS[] = {
 229         0, 1, 2, 3, 8, 9, 10, 16,       /* in0.. in7 */
 230         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 231         21,                             /* global beep enable */
 232         6, 7, 11, 28, -1,               /* fan1..fan5 */
 233         -1, -1, -1,                     /* unused */
 234         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 235         12, -1 };                       /* intrusion0, intrusion1 */
 236
 237 #define BEEP_ENABLE_BASE                15
 238
 239 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
 240 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
 241
 242 /* DC or PWM output fan configuration */
 243 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
 244 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
 245
 246 /* Advanced Fan control, some values are common for all fans */
 247
 248 static const u16 NCT6775_REG_TARGET[] = {
 249         0x101, 0x201, 0x301, 0x801, 0x901, 0xa01 };
 250 static const u16 NCT6775_REG_FAN_MODE[] = {
 251         0x102, 0x202, 0x302, 0x802, 0x902, 0xa02 };
 252 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
 253         0x103, 0x203, 0x303, 0x803, 0x903, 0xa03 };
 254 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
 255         0x104, 0x204, 0x304, 0x804, 0x904, 0xa04 };
 256 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
 257         0x105, 0x205, 0x305, 0x805, 0x905, 0xa05 };
 258 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = {
 259         0x106, 0x206, 0x306, 0x806, 0x906, 0xa06 };
 260 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
 261 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
 262
 263 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
 264         0x107, 0x207, 0x307, 0x807, 0x907, 0xa07 };
 265 static const u16 NCT6775_REG_PWM[] = {
 266         0x109, 0x209, 0x309, 0x809, 0x909, 0xa09 };
 267 static const u16 NCT6775_REG_PWM_READ[] = {
 268         0x01, 0x03, 0x11, 0x13, 0x15, 0xa09 };
 269
 270 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
 271 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
 272 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
 273 static const u16 NCT6775_FAN_PULSE_SHIFT[] = { 0, 0, 0, 0, 0, 0 };
 274
 275 static const u16 NCT6775_REG_TEMP[] = {
 276         0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
 277
 278 static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77 };
 279
 280 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 281         0, 0x152, 0x252, 0x628, 0x629, 0x62A };
 282 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 283         0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
 284 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 285         0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
 286
 287 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 288         0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
 289
 290 static const u16 NCT6775_REG_TEMP_SEL[] = {
 291         0x100, 0x200, 0x300, 0x800, 0x900, 0xa00 };
 292
 293 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
 294         0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 };
 295 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
 296         0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a };
 297 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
 298         0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b };
 299 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
 300         0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c };
 301 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
 302         0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d };
 303
 304 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
 305
 306 static const u16 NCT6775_REG_AUTO_TEMP[] = {
 307         0x121, 0x221, 0x321, 0x821, 0x921, 0xa21 };
 308 static const u16 NCT6775_REG_AUTO_PWM[] = {
 309         0x127, 0x227, 0x327, 0x827, 0x927, 0xa27 };
 310
 311 #define NCT6775_AUTO_TEMP(data, nr, p)  ((data)->REG_AUTO_TEMP[nr] + (p))
 312 #define NCT6775_AUTO_PWM(data, nr, p)   ((data)->REG_AUTO_PWM[nr] + (p))
 313
 314 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
 315
 316 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
 317         0x135, 0x235, 0x335, 0x835, 0x935, 0xa35 };
 318 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
 319         0x138, 0x238, 0x338, 0x838, 0x938, 0xa38 };
 320
 321 static const char *const nct6775_temp_label[] = {
 322         "",
 323         "SYSTIN",
 324         "CPUTIN",
 325         "AUXTIN",
 326         "AMD SB-TSI",
 327         "PECI Agent 0",
 328         "PECI Agent 1",
 329         "PECI Agent 2",
 330         "PECI Agent 3",
 331         "PECI Agent 4",
 332         "PECI Agent 5",
 333         "PECI Agent 6",
 334         "PECI Agent 7",
 335         "PCH_CHIP_CPU_MAX_TEMP",
 336         "PCH_CHIP_TEMP",
 337         "PCH_CPU_TEMP",
 338         "PCH_MCH_TEMP",
 339         "PCH_DIM0_TEMP",
 340         "PCH_DIM1_TEMP",
 341         "PCH_DIM2_TEMP",
 342         "PCH_DIM3_TEMP"
 343 };
 344
 345 static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
 346         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
 347
 348 static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
 349         = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
 350             0xa07 };
 351
 352 /* NCT6776 specific data */
 353
 354 static const s8 NCT6776_ALARM_BITS[] = {
 355         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 356         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 357         -1,                             /* unused */
 358         6, 7, 11, 10, 23,               /* fan1..fan5 */
 359         -1, -1, -1,                     /* unused */
 360         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 361         12, 9 };                        /* intrusion0, intrusion1 */
 362
 363 static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5 };
 364
 365 static const s8 NCT6776_BEEP_BITS[] = {
 366         0, 1, 2, 3, 4, 5, 6, 7,         /* in0.. in7 */
 367         8, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 368         24,                             /* global beep enable */
 369         25, 26, 27, 28, 29,             /* fan1..fan5 */
 370         -1, -1, -1,                     /* unused */
 371         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 372         30, 31 };                       /* intrusion0, intrusion1 */
 373
 374 static const u16 NCT6776_REG_TOLERANCE_H[] = {
 375         0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c };
 376
 377 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0 };
 378 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0 };
 379
 380 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
 381 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
 382
 383 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
 384         0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e };
 385
 386 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 387         0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
 388
 389 static const char *const nct6776_temp_label[] = {
 390         "",
 391         "SYSTIN",
 392         "CPUTIN",
 393         "AUXTIN",
 394         "SMBUSMASTER 0",
 395         "SMBUSMASTER 1",
 396         "SMBUSMASTER 2",
 397         "SMBUSMASTER 3",
 398         "SMBUSMASTER 4",
 399         "SMBUSMASTER 5",
 400         "SMBUSMASTER 6",
 401         "SMBUSMASTER 7",
 402         "PECI Agent 0",
 403         "PECI Agent 1",
 404         "PCH_CHIP_CPU_MAX_TEMP",
 405         "PCH_CHIP_TEMP",
 406         "PCH_CPU_TEMP",
 407         "PCH_MCH_TEMP",
 408         "PCH_DIM0_TEMP",
 409         "PCH_DIM1_TEMP",
 410         "PCH_DIM2_TEMP",
 411         "PCH_DIM3_TEMP",
 412         "BYTE_TEMP"
 413 };
 414
 415 static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
 416         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
 417
 418 static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
 419         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
 420
 421 /* NCT6779 specific data */
 422
 423 static const u16 NCT6779_REG_IN[] = {
 424         0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
 425         0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
 426
 427 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
 428         0x459, 0x45A, 0x45B, 0x568 };
 429
 430 static const s8 NCT6779_ALARM_BITS[] = {
 431         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 432         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 433         -1,                             /* unused */
 434         6, 7, 11, 10, 23,               /* fan1..fan5 */
 435         -1, -1, -1,                     /* unused */
 436         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 437         12, 9 };                        /* intrusion0, intrusion1 */
 438
 439 static const s8 NCT6779_BEEP_BITS[] = {
 440         0, 1, 2, 3, 4, 5, 6, 7,         /* in0.. in7 */
 441         8, 9, 10, 11, 12, 13, 14,       /* in8..in14 */
 442         24,                             /* global beep enable */
 443         25, 26, 27, 28, 29,             /* fan1..fan5 */
 444         -1, -1, -1,                     /* unused */
 445         16, 17, -1, -1, -1, -1,         /* temp1..temp6 */
 446         30, 31 };                       /* intrusion0, intrusion1 */
 447
 448 static const u16 NCT6779_REG_FAN[] = {
 449         0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8, 0x4ba };
 450 static const u16 NCT6779_REG_FAN_PULSES[] = {
 451         0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
 452
 453 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
 454         0x136, 0x236, 0x336, 0x836, 0x936, 0xa36 };
 455 #define NCT6779_CRITICAL_PWM_ENABLE_MASK        0x01
 456 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
 457         0x137, 0x237, 0x337, 0x837, 0x937, 0xa37 };
 458
 459 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
 460 static const u16 NCT6779_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b };
 461 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 462         0x18, 0x152 };
 463 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 464         0x3a, 0x153 };
 465 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 466         0x39, 0x155 };
 467
 468 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
 469         0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
 470
 471 static const char *const nct6779_temp_label[] = {
 472         "",
 473         "SYSTIN",
 474         "CPUTIN",
 475         "AUXTIN0",
 476         "AUXTIN1",
 477         "AUXTIN2",
 478         "AUXTIN3",
 479         "",
 480         "SMBUSMASTER 0",
 481         "SMBUSMASTER 1",
 482         "SMBUSMASTER 2",
 483         "SMBUSMASTER 3",
 484         "SMBUSMASTER 4",
 485         "SMBUSMASTER 5",
 486         "SMBUSMASTER 6",
 487         "SMBUSMASTER 7",
 488         "PECI Agent 0",
 489         "PECI Agent 1",
 490         "PCH_CHIP_CPU_MAX_TEMP",
 491         "PCH_CHIP_TEMP",
 492         "PCH_CPU_TEMP",
 493         "PCH_MCH_TEMP",
 494         "PCH_DIM0_TEMP",
 495         "PCH_DIM1_TEMP",
 496         "PCH_DIM2_TEMP",
 497         "PCH_DIM3_TEMP",
 498         "BYTE_TEMP"
 499 };
 500
 501 static const u16 NCT6779_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6779_temp_label) - 1]
 502         = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
 503             0, 0, 0, 0, 0, 0, 0, 0,
 504             0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
 505             0x408, 0 };
 506
 507 static const u16 NCT6779_REG_TEMP_CRIT[ARRAY_SIZE(nct6779_temp_label) - 1]
 508         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
 509
 510 /* NCT6791 specific data */
 511
 512 #define NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE     0x28
 513
 514 static const u16 NCT6791_REG_WEIGHT_TEMP_SEL[6] = { 0, 0x239 };
 515 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP[6] = { 0, 0x23a };
 516 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP_TOL[6] = { 0, 0x23b };
 517 static const u16 NCT6791_REG_WEIGHT_DUTY_STEP[6] = { 0, 0x23c };
 518 static const u16 NCT6791_REG_WEIGHT_TEMP_BASE[6] = { 0, 0x23d };
 519 static const u16 NCT6791_REG_WEIGHT_DUTY_BASE[6] = { 0, 0x23e };
 520
 521 static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = {
 522         0x459, 0x45A, 0x45B, 0x568, 0x45D };
 523
 524 static const s8 NCT6791_ALARM_BITS[] = {
 525         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 526         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 527         -1,                             /* unused */
 528         6, 7, 11, 10, 23, 33,           /* fan1..fan6 */
 529         -1, -1,                         /* unused */
 530         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 531         12, 9 };                        /* intrusion0, intrusion1 */
 532
 533
 534 /* NCT6102D/NCT6106D specific data */
 535
 536 #define NCT6106_REG_VBAT        0x318
 537 #define NCT6106_REG_DIODE       0x319
 538 #define NCT6106_DIODE_MASK      0x01
 539
 540 static const u16 NCT6106_REG_IN_MAX[] = {
 541         0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
 542 static const u16 NCT6106_REG_IN_MIN[] = {
 543         0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
 544 static const u16 NCT6106_REG_IN[] = {
 545         0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
 546
 547 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
 548 static const u16 NCT6106_REG_TEMP_MON[] = { 0x18, 0x19, 0x1a };
 549 static const u16 NCT6106_REG_TEMP_HYST[] = {
 550         0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
 551 static const u16 NCT6106_REG_TEMP_OVER[] = {
 552         0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
 553 static const u16 NCT6106_REG_TEMP_CRIT_L[] = {
 554         0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
 555 static const u16 NCT6106_REG_TEMP_CRIT_H[] = {
 556         0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
 557 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
 558 static const u16 NCT6106_REG_TEMP_CONFIG[] = {
 559         0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
 560
 561 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
 562 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
 563 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0, 0 };
 564 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4, 0, 0 };
 565
 566 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
 567 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
 568 static const u16 NCT6106_REG_PWM[] = { 0x119, 0x129, 0x139 };
 569 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c };
 570 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
 571 static const u16 NCT6106_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130 };
 572 static const u16 NCT6106_REG_TEMP_SOURCE[] = {
 573         0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
 574
 575 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
 576 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = {
 577         0x11b, 0x12b, 0x13b };
 578
 579 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
 580 #define NCT6106_CRITICAL_PWM_ENABLE_MASK        0x10
 581 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
 582
 583 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
 584 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
 585 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
 586 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
 587 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
 588 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
 589
 590 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
 591
 592 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
 593 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
 594 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
 595 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x17c };
 596 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
 597 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
 598
 599 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
 600 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
 601
 602 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = {
 603         0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
 604
 605 static const s8 NCT6106_ALARM_BITS[] = {
 606         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 607         9, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 608         -1,                             /* unused */
 609         32, 33, 34, -1, -1,             /* fan1..fan5 */
 610         -1, -1, -1,                     /* unused */
 611         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 612         48, -1                          /* intrusion0, intrusion1 */
 613 };
 614
 615 static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = {
 616         0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 };
 617
 618 static const s8 NCT6106_BEEP_BITS[] = {
 619         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 620         9, 10, 11, 12, -1, -1, -1,      /* in8..in14 */
 621         32,                             /* global beep enable */
 622         24, 25, 26, 27, 28,             /* fan1..fan5 */
 623         -1, -1, -1,                     /* unused */
 624         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 625         34, -1                          /* intrusion0, intrusion1 */
 626 };
 627
 628 static const u16 NCT6106_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
 629         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x51, 0x52, 0x54 };
 630
 631 static const u16 NCT6106_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
 632         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x204, 0x205 };
 633
 634 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
 635 {
 636         if (mode == 0 && pwm == 255)
 637                 return off;
 638         return mode + 1;
 639 }
 640
 641 static int pwm_enable_to_reg(enum pwm_enable mode)
 642 {
 643         if (mode == off)
 644                 return 0;
 645         return mode - 1;
 646 }
 647
 648 /*
 649  * Conversions
 650  */
 651
 652 /* 1 is DC mode, output in ms */
 653 static unsigned int step_time_from_reg(u8 reg, u8 mode)
 654 {
 655         return mode ? 400 * reg : 100 * reg;
 656 }
 657
 658 static u8 step_time_to_reg(unsigned int msec, u8 mode)
 659 {
 660         return clamp_val((mode ? (msec + 200) / 400 :
 661                                         (msec + 50) / 100), 1, 255);
 662 }
 663
 664 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
 665 {
 666         if (reg == 0 || reg == 255)
 667                 return 0;
 668         return 1350000U / (reg << divreg);
 669 }
 670
 671 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
 672 {
 673         if ((reg & 0xff1f) == 0xff1f)
 674                 return 0;
 675
 676         reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
 677
 678         if (reg == 0)
 679                 return 0;
 680
 681         return 1350000U / reg;
 682 }
 683
 684 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
 685 {
 686         if (reg == 0 || reg == 0xffff)
 687                 return 0;
 688
 689         /*
 690          * Even though the registers are 16 bit wide, the fan divisor
 691          * still applies.
 692          */
 693         return 1350000U / (reg << divreg);
 694 }
 695
 696 static u16 fan_to_reg(u32 fan, unsigned int divreg)
 697 {
 698         if (!fan)
 699                 return 0;
 700
 701         return (1350000U / fan) >> divreg;
 702 }
 703
 704 static inline unsigned int
 705 div_from_reg(u8 reg)
 706 {
 707         return 1 << reg;
 708 }
 709
 710 /*
 711  * Some of the voltage inputs have internal scaling, the tables below
 712  * contain 8 (the ADC LSB in mV) * scaling factor * 100
 713  */
 714 static const u16 scale_in[15] = {
 715         800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
 716         800, 800
 717 };
 718
 719 static inline long in_from_reg(u8 reg, u8 nr)
 720 {
 721         return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
 722 }
 723
 724 static inline u8 in_to_reg(u32 val, u8 nr)
 725 {
 726         return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
 727 }
 728
 729 /*
 730  * Data structures and manipulation thereof
 731  */
 732
 733 struct nct6775_data {
 734         int addr;       /* IO base of hw monitor block */
 735         int sioreg;     /* SIO register address */
 736         enum kinds kind;
 737         const char *name;
 738
 739         struct device *hwmon_dev;
 740         struct attribute_group *group_in;
 741         struct attribute_group *group_fan;
 742         struct attribute_group *group_temp;
 743         struct attribute_group *group_pwm;
 744
 745         u16 reg_temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 746                                     * 3=temp_crit, 4=temp_lcrit
 747                                     */
 748         u8 temp_src[NUM_TEMP];
 749         u16 reg_temp_config[NUM_TEMP];
 750         const char * const *temp_label;
 751         int temp_label_num;
 752
 753         u16 REG_CONFIG;
 754         u16 REG_VBAT;
 755         u16 REG_DIODE;
 756         u8 DIODE_MASK;
 757
 758         const s8 *ALARM_BITS;
 759         const s8 *BEEP_BITS;
 760
 761         const u16 *REG_VIN;
 762         const u16 *REG_IN_MINMAX[2];
 763
 764         const u16 *REG_TARGET;
 765         const u16 *REG_FAN;
 766         const u16 *REG_FAN_MODE;
 767         const u16 *REG_FAN_MIN;
 768         const u16 *REG_FAN_PULSES;
 769         const u16 *FAN_PULSE_SHIFT;
 770         const u16 *REG_FAN_TIME[3];
 771
 772         const u16 *REG_TOLERANCE_H;
 773
 774         const u8 *REG_PWM_MODE;
 775         const u8 *PWM_MODE_MASK;
 776
 777         const u16 *REG_PWM[7];  /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 778                                  * [3]=pwm_max, [4]=pwm_step,
 779                                  * [5]=weight_duty_step, [6]=weight_duty_base
 780                                  */
 781         const u16 *REG_PWM_READ;
 782
 783         const u16 *REG_CRITICAL_PWM_ENABLE;
 784         u8 CRITICAL_PWM_ENABLE_MASK;
 785         const u16 *REG_CRITICAL_PWM;
 786
 787         const u16 *REG_AUTO_TEMP;
 788         const u16 *REG_AUTO_PWM;
 789
 790         const u16 *REG_CRITICAL_TEMP;
 791         const u16 *REG_CRITICAL_TEMP_TOLERANCE;
 792
 793         const u16 *REG_TEMP_SOURCE;     /* temp register sources */
 794         const u16 *REG_TEMP_SEL;
 795         const u16 *REG_WEIGHT_TEMP_SEL;
 796         const u16 *REG_WEIGHT_TEMP[3];  /* 0=base, 1=tolerance, 2=step */
 797
 798         const u16 *REG_TEMP_OFFSET;
 799
 800         const u16 *REG_ALARM;
 801         const u16 *REG_BEEP;
 802
 803         unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
 804         unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
 805
 806         struct mutex update_lock;
 807         bool valid;             /* true if following fields are valid */
 808         unsigned long last_updated;     /* In jiffies */
 809
 810         /* Register values */
 811         u8 bank;                /* current register bank */
 812         u8 in_num;              /* number of in inputs we have */
 813         u8 in[15][3];           /* [0]=in, [1]=in_max, [2]=in_min */
 814         unsigned int rpm[NUM_FAN];
 815         u16 fan_min[NUM_FAN];
 816         u8 fan_pulses[NUM_FAN];
 817         u8 fan_div[NUM_FAN];
 818         u8 has_pwm;
 819         u8 has_fan;             /* some fan inputs can be disabled */
 820         u8 has_fan_min;         /* some fans don't have min register */
 821         bool has_fan_div;
 822
 823         u8 num_temp_alarms;     /* 2, 3, or 6 */
 824         u8 num_temp_beeps;      /* 2, 3, or 6 */
 825         u8 temp_fixed_num;      /* 3 or 6 */
 826         u8 temp_type[NUM_TEMP_FIXED];
 827         s8 temp_offset[NUM_TEMP_FIXED];
 828         s16 temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 829                                 * 3=temp_crit, 4=temp_lcrit */
 830         u64 alarms;
 831         u64 beeps;
 832
 833         u8 pwm_num;     /* number of pwm */
 834         u8 pwm_mode[NUM_FAN];   /* 1->DC variable voltage,
 835                                  * 0->PWM variable duty cycle
 836                                  */
 837         enum pwm_enable pwm_enable[NUM_FAN];
 838                         /* 0->off
 839                          * 1->manual
 840                          * 2->thermal cruise mode (also called SmartFan I)
 841                          * 3->fan speed cruise mode
 842                          * 4->SmartFan III
 843                          * 5->enhanced variable thermal cruise (SmartFan IV)
 844                          */
 845         u8 pwm[7][NUM_FAN];     /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 846                                  * [3]=pwm_max, [4]=pwm_step,
 847                                  * [5]=weight_duty_step, [6]=weight_duty_base
 848                                  */
 849
 850         u8 target_temp[NUM_FAN];
 851         u8 target_temp_mask;
 852         u32 target_speed[NUM_FAN];
 853         u32 target_speed_tolerance[NUM_FAN];
 854         u8 speed_tolerance_limit;
 855
 856         u8 temp_tolerance[2][NUM_FAN];
 857         u8 tolerance_mask;
 858
 859         u8 fan_time[3][NUM_FAN]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
 860
 861         /* Automatic fan speed control registers */
 862         int auto_pwm_num;
 863         u8 auto_pwm[NUM_FAN][7];
 864         u8 auto_temp[NUM_FAN][7];
 865         u8 pwm_temp_sel[NUM_FAN];
 866         u8 pwm_weight_temp_sel[NUM_FAN];
 867         u8 weight_temp[3][NUM_FAN];     /* 0->temp_step, 1->temp_step_tol,
 868                                          * 2->temp_base
 869                                          */
 870
 871         u8 vid;
 872         u8 vrm;
 873
 874         bool have_vid;
 875
 876         u16 have_temp;
 877         u16 have_temp_fixed;
 878         u16 have_in;
 879 #ifdef CONFIG_PM
 880         /* Remember extra register values over suspend/resume */
 881         u8 vbat;
 882         u8 fandiv1;
 883         u8 fandiv2;
 884 #endif
 885 };
 886
 887 struct nct6775_sio_data {
 888         int sioreg;
 889         enum kinds kind;
 890 };
 891
 892 struct sensor_device_template {
 893         struct device_attribute dev_attr;
 894         union {
 895                 struct {
 896                         u8 nr;
 897                         u8 index;
 898                 } s;
 899                 int index;
 900         } u;
 901         bool s2;        /* true if both index and nr are used */
 902 };
 903
 904 struct sensor_device_attr_u {
 905         union {
 906                 struct sensor_device_attribute a1;
 907                 struct sensor_device_attribute_2 a2;
 908         } u;
 909         char name[32];
 910 };
 911
 912 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) {      \
 913         .attr = {.name = _template, .mode = _mode },            \
 914         .show   = _show,                                        \
 915         .store  = _store,                                       \
 916 }
 917
 918 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \
 919         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
 920           .u.index = _index,                                            \
 921           .s2 = false }
 922
 923 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,       \
 924                                  _nr, _index)                           \
 925         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
 926           .u.s.index = _index,                                          \
 927           .u.s.nr = _nr,                                                \
 928           .s2 = true }
 929
 930 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
 931 static struct sensor_device_template sensor_dev_template_##_name        \
 932         = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store,       \
 933                                  _index)
 934
 935 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store,       \
 936                           _nr, _index)                                  \
 937 static struct sensor_device_template sensor_dev_template_##_name        \
 938         = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,     \
 939                                  _nr, _index)
 940
 941 struct sensor_template_group {
 942         struct sensor_device_template **templates;
 943         umode_t (*is_visible)(struct kobject *, struct attribute *, int);
 944         int base;
 945 };
 946
 947 static struct attribute_group *
 948 nct6775_create_attr_group(struct device *dev, struct sensor_template_group *tg,
 949                           int repeat)
 950 {
 951         struct attribute_group *group;
 952         struct sensor_device_attr_u *su;
 953         struct sensor_device_attribute *a;
 954         struct sensor_device_attribute_2 *a2;
 955         struct attribute **attrs;
 956         struct sensor_device_template **t;
 957         int err, i, j, count;
 958
 959         if (repeat <= 0)
 960                 return ERR_PTR(-EINVAL);
 961
 962         t = tg->templates;
 963         for (count = 0; *t; t++, count++)
 964                 ;
 965
 966         if (count == 0)
 967                 return ERR_PTR(-EINVAL);
 968
 969         group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
 970         if (group == NULL)
 971                 return ERR_PTR(-ENOMEM);
 972
 973         attrs = devm_kzalloc(dev, sizeof(*attrs) * (repeat * count + 1),
 974                              GFP_KERNEL);
 975         if (attrs == NULL)
 976                 return ERR_PTR(-ENOMEM);
 977
 978         su = devm_kzalloc(dev, sizeof(*su) * repeat * count,
 979                                GFP_KERNEL);
 980         if (su == NULL)
 981                 return ERR_PTR(-ENOMEM);
 982
 983         group->attrs = attrs;
 984         group->is_visible = tg->is_visible;
 985
 986         for (i = 0; i < repeat; i++) {
 987                 t = tg->templates;
 988                 for (j = 0; *t != NULL; j++) {
 989                         snprintf(su->name, sizeof(su->name),
 990                                  (*t)->dev_attr.attr.name, tg->base + i);
 991                         if ((*t)->s2) {
 992                                 a2 = &su->u.a2;
 993                                 a2->dev_attr.attr.name = su->name;
 994                                 a2->nr = (*t)->u.s.nr + i;
 995                                 a2->index = (*t)->u.s.index;
 996                                 a2->dev_attr.attr.mode =
 997                                   (*t)->dev_attr.attr.mode;
 998                                 a2->dev_attr.show = (*t)->dev_attr.show;
 999                                 a2->dev_attr.store = (*t)->dev_attr.store;
1000                                 *attrs = &a2->dev_attr.attr;
1001                         } else {
1002                                 a = &su->u.a1;
1003                                 a->dev_attr.attr.name = su->name;
1004                                 a->index = (*t)->u.index + i;
1005                                 a->dev_attr.attr.mode =
1006                                   (*t)->dev_attr.attr.mode;
1007                                 a->dev_attr.show = (*t)->dev_attr.show;
1008                                 a->dev_attr.store = (*t)->dev_attr.store;
1009                                 *attrs = &a->dev_attr.attr;
1010                         }
1011                         attrs++;
1012                         su++;
1013                         t++;
1014                 }
1015         }
1016
1017         err = sysfs_create_group(&dev->kobj, group);
1018         if (err)
1019                 return ERR_PTR(-ENOMEM);
1020
1021         return group;
1022 }
1023
1024 static bool is_word_sized(struct nct6775_data *data, u16 reg)
1025 {
1026         switch (data->kind) {
1027         case nct6106:
1028                 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1029                   reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
1030                   reg == 0x111 || reg == 0x121 || reg == 0x131;
1031         case nct6775:
1032                 return (((reg & 0xff00) == 0x100 ||
1033                     (reg & 0xff00) == 0x200) &&
1034                    ((reg & 0x00ff) == 0x50 ||
1035                     (reg & 0x00ff) == 0x53 ||
1036                     (reg & 0x00ff) == 0x55)) ||
1037                   (reg & 0xfff0) == 0x630 ||
1038                   reg == 0x640 || reg == 0x642 ||
1039                   reg == 0x662 ||
1040                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1041                   reg == 0x73 || reg == 0x75 || reg == 0x77;
1042         case nct6776:
1043                 return (((reg & 0xff00) == 0x100 ||
1044                     (reg & 0xff00) == 0x200) &&
1045                    ((reg & 0x00ff) == 0x50 ||
1046                     (reg & 0x00ff) == 0x53 ||
1047                     (reg & 0x00ff) == 0x55)) ||
1048                   (reg & 0xfff0) == 0x630 ||
1049                   reg == 0x402 ||
1050                   reg == 0x640 || reg == 0x642 ||
1051                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1052                   reg == 0x73 || reg == 0x75 || reg == 0x77;
1053         case nct6779:
1054         case nct6791:
1055                 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
1056                   ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x0b) ||
1057                   reg == 0x402 ||
1058                   reg == 0x63a || reg == 0x63c || reg == 0x63e ||
1059                   reg == 0x640 || reg == 0x642 ||
1060                   reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
1061                   reg == 0x7b;
1062         }
1063         return false;
1064 }
1065
1066 /*
1067  * On older chips, only registers 0x50-0x5f are banked.
1068  * On more recent chips, all registers are banked.
1069  * Assume that is the case and set the bank number for each access.
1070  * Cache the bank number so it only needs to be set if it changes.
1071  */
1072 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
1073 {
1074         u8 bank = reg >> 8;
1075         if (data->bank != bank) {
1076                 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
1077                 outb_p(bank, data->addr + DATA_REG_OFFSET);
1078                 data->bank = bank;
1079         }
1080 }
1081
1082 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
1083 {
1084         int res, word_sized = is_word_sized(data, reg);
1085
1086         nct6775_set_bank(data, reg);
1087         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1088         res = inb_p(data->addr + DATA_REG_OFFSET);
1089         if (word_sized) {
1090                 outb_p((reg & 0xff) + 1,
1091                        data->addr + ADDR_REG_OFFSET);
1092                 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
1093         }
1094         return res;
1095 }
1096
1097 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
1098 {
1099         int word_sized = is_word_sized(data, reg);
1100
1101         nct6775_set_bank(data, reg);
1102         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1103         if (word_sized) {
1104                 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
1105                 outb_p((reg & 0xff) + 1,
1106                        data->addr + ADDR_REG_OFFSET);
1107         }
1108         outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
1109         return 0;
1110 }
1111
1112 /* We left-align 8-bit temperature values to make the code simpler */
1113 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
1114 {
1115         u16 res;
1116
1117         res = nct6775_read_value(data, reg);
1118         if (!is_word_sized(data, reg))
1119                 res <<= 8;
1120
1121         return res;
1122 }
1123
1124 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
1125 {
1126         if (!is_word_sized(data, reg))
1127                 value >>= 8;
1128         return nct6775_write_value(data, reg, value);
1129 }
1130
1131 /* This function assumes that the caller holds data->update_lock */
1132 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
1133 {
1134         u8 reg;
1135
1136         switch (nr) {
1137         case 0:
1138                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
1139                     | (data->fan_div[0] & 0x7);
1140                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1141                 break;
1142         case 1:
1143                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
1144                     | ((data->fan_div[1] << 4) & 0x70);
1145                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1146                 break;
1147         case 2:
1148                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
1149                     | (data->fan_div[2] & 0x7);
1150                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1151                 break;
1152         case 3:
1153                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
1154                     | ((data->fan_div[3] << 4) & 0x70);
1155                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1156                 break;
1157         }
1158 }
1159
1160 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
1161 {
1162         if (data->kind == nct6775)
1163                 nct6775_write_fan_div(data, nr);
1164 }
1165
1166 static void nct6775_update_fan_div(struct nct6775_data *data)
1167 {
1168         u8 i;
1169
1170         i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
1171         data->fan_div[0] = i & 0x7;
1172         data->fan_div[1] = (i & 0x70) >> 4;
1173         i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
1174         data->fan_div[2] = i & 0x7;
1175         if (data->has_fan & (1 << 3))
1176                 data->fan_div[3] = (i & 0x70) >> 4;
1177 }
1178
1179 static void nct6775_update_fan_div_common(struct nct6775_data *data)
1180 {
1181         if (data->kind == nct6775)
1182                 nct6775_update_fan_div(data);
1183 }
1184
1185 static void nct6775_init_fan_div(struct nct6775_data *data)
1186 {
1187         int i;
1188
1189         nct6775_update_fan_div_common(data);
1190         /*
1191          * For all fans, start with highest divider value if the divider
1192          * register is not initialized. This ensures that we get a
1193          * reading from the fan count register, even if it is not optimal.
1194          * We'll compute a better divider later on.
1195          */
1196         for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
1197                 if (!(data->has_fan & (1 << i)))
1198                         continue;
1199                 if (data->fan_div[i] == 0) {
1200                         data->fan_div[i] = 7;
1201                         nct6775_write_fan_div_common(data, i);
1202                 }
1203         }
1204 }
1205
1206 static void nct6775_init_fan_common(struct device *dev,
1207                                     struct nct6775_data *data)
1208 {
1209         int i;
1210         u8 reg;
1211
1212         if (data->has_fan_div)
1213                 nct6775_init_fan_div(data);
1214
1215         /*
1216          * If fan_min is not set (0), set it to 0xff to disable it. This
1217          * prevents the unnecessary warning when fanX_min is reported as 0.
1218          */
1219         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1220                 if (data->has_fan_min & (1 << i)) {
1221                         reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
1222                         if (!reg)
1223                                 nct6775_write_value(data, data->REG_FAN_MIN[i],
1224                                                     data->has_fan_div ? 0xff
1225                                                                       : 0xff1f);
1226                 }
1227         }
1228 }
1229
1230 static void nct6775_select_fan_div(struct device *dev,
1231                                    struct nct6775_data *data, int nr, u16 reg)
1232 {
1233         u8 fan_div = data->fan_div[nr];
1234         u16 fan_min;
1235
1236         if (!data->has_fan_div)
1237                 return;
1238
1239         /*
1240          * If we failed to measure the fan speed, or the reported value is not
1241          * in the optimal range, and the clock divider can be modified,
1242          * let's try that for next time.
1243          */
1244         if (reg == 0x00 && fan_div < 0x07)
1245                 fan_div++;
1246         else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1247                 fan_div--;
1248
1249         if (fan_div != data->fan_div[nr]) {
1250                 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1251                         nr + 1, div_from_reg(data->fan_div[nr]),
1252                         div_from_reg(fan_div));
1253
1254                 /* Preserve min limit if possible */
1255                 if (data->has_fan_min & (1 << nr)) {
1256                         fan_min = data->fan_min[nr];
1257                         if (fan_div > data->fan_div[nr]) {
1258                                 if (fan_min != 255 && fan_min > 1)
1259                                         fan_min >>= 1;
1260                         } else {
1261                                 if (fan_min != 255) {
1262                                         fan_min <<= 1;
1263                                         if (fan_min > 254)
1264                                                 fan_min = 254;
1265                                 }
1266                         }
1267                         if (fan_min != data->fan_min[nr]) {
1268                                 data->fan_min[nr] = fan_min;
1269                                 nct6775_write_value(data, data->REG_FAN_MIN[nr],
1270                                                     fan_min);
1271                         }
1272                 }
1273                 data->fan_div[nr] = fan_div;
1274                 nct6775_write_fan_div_common(data, nr);
1275         }
1276 }
1277
1278 static void nct6775_update_pwm(struct device *dev)
1279 {
1280         struct nct6775_data *data = dev_get_drvdata(dev);
1281         int i, j;
1282         int fanmodecfg, reg;
1283         bool duty_is_dc;
1284
1285         for (i = 0; i < data->pwm_num; i++) {
1286                 if (!(data->has_pwm & (1 << i)))
1287                         continue;
1288
1289                 duty_is_dc = data->REG_PWM_MODE[i] &&
1290                   (nct6775_read_value(data, data->REG_PWM_MODE[i])
1291                    & data->PWM_MODE_MASK[i]);
1292                 data->pwm_mode[i] = duty_is_dc;
1293
1294                 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
1295                 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1296                         if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1297                                 data->pwm[j][i]
1298                                   = nct6775_read_value(data,
1299                                                        data->REG_PWM[j][i]);
1300                         }
1301                 }
1302
1303                 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1304                                                         (fanmodecfg >> 4) & 7);
1305
1306                 if (!data->temp_tolerance[0][i] ||
1307                     data->pwm_enable[i] != speed_cruise)
1308                         data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1309                 if (!data->target_speed_tolerance[i] ||
1310                     data->pwm_enable[i] == speed_cruise) {
1311                         u8 t = fanmodecfg & 0x0f;
1312                         if (data->REG_TOLERANCE_H) {
1313                                 t |= (nct6775_read_value(data,
1314                                       data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
1315                         }
1316                         data->target_speed_tolerance[i] = t;
1317                 }
1318
1319                 data->temp_tolerance[1][i] =
1320                         nct6775_read_value(data,
1321                                         data->REG_CRITICAL_TEMP_TOLERANCE[i]);
1322
1323                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
1324                 data->pwm_temp_sel[i] = reg & 0x1f;
1325                 /* If fan can stop, report floor as 0 */
1326                 if (reg & 0x80)
1327                         data->pwm[2][i] = 0;
1328
1329                 if (data->REG_WEIGHT_TEMP_SEL[i]) {
1330                         reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
1331                         data->pwm_weight_temp_sel[i] = reg & 0x1f;
1332                         /* If weight is disabled, report weight source as 0 */
1333                         if (j == 1 && !(reg & 0x80))
1334                                 data->pwm_weight_temp_sel[i] = 0;
1335
1336                         /* Weight temp data */
1337                         for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
1338                                 data->weight_temp[j][i]
1339                                   = nct6775_read_value(data,
1340                                                 data->REG_WEIGHT_TEMP[j][i]);
1341                         }
1342                 }
1343         }
1344 }
1345
1346 static void nct6775_update_pwm_limits(struct device *dev)
1347 {
1348         struct nct6775_data *data = dev_get_drvdata(dev);
1349         int i, j;
1350         u8 reg;
1351         u16 reg_t;
1352
1353         for (i = 0; i < data->pwm_num; i++) {
1354                 if (!(data->has_pwm & (1 << i)))
1355                         continue;
1356
1357                 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1358                         data->fan_time[j][i] =
1359                           nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1360                 }
1361
1362                 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1363                 /* Update only in matching mode or if never updated */
1364                 if (!data->target_temp[i] ||
1365                     data->pwm_enable[i] == thermal_cruise)
1366                         data->target_temp[i] = reg_t & data->target_temp_mask;
1367                 if (!data->target_speed[i] ||
1368                     data->pwm_enable[i] == speed_cruise) {
1369                         if (data->REG_TOLERANCE_H) {
1370                                 reg_t |= (nct6775_read_value(data,
1371                                         data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1372                         }
1373                         data->target_speed[i] = reg_t;
1374                 }
1375
1376                 for (j = 0; j < data->auto_pwm_num; j++) {
1377                         data->auto_pwm[i][j] =
1378                           nct6775_read_value(data,
1379                                              NCT6775_AUTO_PWM(data, i, j));
1380                         data->auto_temp[i][j] =
1381                           nct6775_read_value(data,
1382                                              NCT6775_AUTO_TEMP(data, i, j));
1383                 }
1384
1385                 /* critical auto_pwm temperature data */
1386                 data->auto_temp[i][data->auto_pwm_num] =
1387                         nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1388
1389                 switch (data->kind) {
1390                 case nct6775:
1391                         reg = nct6775_read_value(data,
1392                                                  NCT6775_REG_CRITICAL_ENAB[i]);
1393                         data->auto_pwm[i][data->auto_pwm_num] =
1394                                                 (reg & 0x02) ? 0xff : 0x00;
1395                         break;
1396                 case nct6776:
1397                         data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1398                         break;
1399                 case nct6106:
1400                 case nct6779:
1401                 case nct6791:
1402                         reg = nct6775_read_value(data,
1403                                         data->REG_CRITICAL_PWM_ENABLE[i]);
1404                         if (reg & data->CRITICAL_PWM_ENABLE_MASK)
1405                                 reg = nct6775_read_value(data,
1406                                         data->REG_CRITICAL_PWM[i]);
1407                         else
1408                                 reg = 0xff;
1409                         data->auto_pwm[i][data->auto_pwm_num] = reg;
1410                         break;
1411                 }
1412         }
1413 }
1414
1415 static struct nct6775_data *nct6775_update_device(struct device *dev)
1416 {
1417         struct nct6775_data *data = dev_get_drvdata(dev);
1418         int i, j;
1419
1420         mutex_lock(&data->update_lock);
1421
1422         if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1423             || !data->valid) {
1424                 /* Fan clock dividers */
1425                 nct6775_update_fan_div_common(data);
1426
1427                 /* Measured voltages and limits */
1428                 for (i = 0; i < data->in_num; i++) {
1429                         if (!(data->have_in & (1 << i)))
1430                                 continue;
1431
1432                         data->in[i][0] = nct6775_read_value(data,
1433                                                             data->REG_VIN[i]);
1434                         data->in[i][1] = nct6775_read_value(data,
1435                                           data->REG_IN_MINMAX[0][i]);
1436                         data->in[i][2] = nct6775_read_value(data,
1437                                           data->REG_IN_MINMAX[1][i]);
1438                 }
1439
1440                 /* Measured fan speeds and limits */
1441                 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
1442                         u16 reg;
1443
1444                         if (!(data->has_fan & (1 << i)))
1445                                 continue;
1446
1447                         reg = nct6775_read_value(data, data->REG_FAN[i]);
1448                         data->rpm[i] = data->fan_from_reg(reg,
1449                                                           data->fan_div[i]);
1450
1451                         if (data->has_fan_min & (1 << i))
1452                                 data->fan_min[i] = nct6775_read_value(data,
1453                                            data->REG_FAN_MIN[i]);
1454                         data->fan_pulses[i] =
1455                           (nct6775_read_value(data, data->REG_FAN_PULSES[i])
1456                                 >> data->FAN_PULSE_SHIFT[i]) & 0x03;
1457
1458                         nct6775_select_fan_div(dev, data, i, reg);
1459                 }
1460
1461                 nct6775_update_pwm(dev);
1462                 nct6775_update_pwm_limits(dev);
1463
1464                 /* Measured temperatures and limits */
1465                 for (i = 0; i < NUM_TEMP; i++) {
1466                         if (!(data->have_temp & (1 << i)))
1467                                 continue;
1468                         for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1469                                 if (data->reg_temp[j][i])
1470                                         data->temp[j][i]
1471                                           = nct6775_read_temp(data,
1472                                                 data->reg_temp[j][i]);
1473                         }
1474                         if (!(data->have_temp_fixed & (1 << i)))
1475                                 continue;
1476                         data->temp_offset[i]
1477                           = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1478                 }
1479
1480                 data->alarms = 0;
1481                 for (i = 0; i < NUM_REG_ALARM; i++) {
1482                         u8 alarm;
1483                         if (!data->REG_ALARM[i])
1484                                 continue;
1485                         alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1486                         data->alarms |= ((u64)alarm) << (i << 3);
1487                 }
1488
1489                 data->beeps = 0;
1490                 for (i = 0; i < NUM_REG_BEEP; i++) {
1491                         u8 beep;
1492                         if (!data->REG_BEEP[i])
1493                                 continue;
1494                         beep = nct6775_read_value(data, data->REG_BEEP[i]);
1495                         data->beeps |= ((u64)beep) << (i << 3);
1496                 }
1497
1498                 data->last_updated = jiffies;
1499                 data->valid = true;
1500         }
1501
1502         mutex_unlock(&data->update_lock);
1503         return data;
1504 }
1505
1506 /*
1507  * Sysfs callback functions
1508  */
1509 static ssize_t
1510 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1511 {
1512         struct nct6775_data *data = nct6775_update_device(dev);
1513         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1514         int nr = sattr->nr;
1515         int index = sattr->index;
1516         return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1517 }
1518
1519 static ssize_t
1520 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1521              size_t count)
1522 {
1523         struct nct6775_data *data = dev_get_drvdata(dev);
1524         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1525         int nr = sattr->nr;
1526         int index = sattr->index;
1527         unsigned long val;
1528         int err = kstrtoul(buf, 10, &val);
1529         if (err < 0)
1530                 return err;
1531         mutex_lock(&data->update_lock);
1532         data->in[nr][index] = in_to_reg(val, nr);
1533         nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr],
1534                             data->in[nr][index]);
1535         mutex_unlock(&data->update_lock);
1536         return count;
1537 }
1538
1539 static ssize_t
1540 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1541 {
1542         struct nct6775_data *data = nct6775_update_device(dev);
1543         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1544         int nr = data->ALARM_BITS[sattr->index];
1545         return sprintf(buf, "%u\n",
1546                        (unsigned int)((data->alarms >> nr) & 0x01));
1547 }
1548
1549 static int find_temp_source(struct nct6775_data *data, int index, int count)
1550 {
1551         int source = data->temp_src[index];
1552         int nr;
1553
1554         for (nr = 0; nr < count; nr++) {
1555                 int src;
1556
1557                 src = nct6775_read_value(data,
1558                                          data->REG_TEMP_SOURCE[nr]) & 0x1f;
1559                 if (src == source)
1560                         return nr;
1561         }
1562         return -1;
1563 }
1564
1565 static ssize_t
1566 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1567 {
1568         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1569         struct nct6775_data *data = nct6775_update_device(dev);
1570         unsigned int alarm = 0;
1571         int nr;
1572
1573         /*
1574          * For temperatures, there is no fixed mapping from registers to alarm
1575          * bits. Alarm bits are determined by the temperature source mapping.
1576          */
1577         nr = find_temp_source(data, sattr->index, data->num_temp_alarms);
1578         if (nr >= 0) {
1579                 int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE];
1580                 alarm = (data->alarms >> bit) & 0x01;
1581         }
1582         return sprintf(buf, "%u\n", alarm);
1583 }
1584
1585 static ssize_t
1586 show_beep(struct device *dev, struct device_attribute *attr, char *buf)
1587 {
1588         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1589         struct nct6775_data *data = nct6775_update_device(dev);
1590         int nr = data->BEEP_BITS[sattr->index];
1591
1592         return sprintf(buf, "%u\n",
1593                        (unsigned int)((data->beeps >> nr) & 0x01));
1594 }
1595
1596 static ssize_t
1597 store_beep(struct device *dev, struct device_attribute *attr, const char *buf,
1598            size_t count)
1599 {
1600         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1601         struct nct6775_data *data = dev_get_drvdata(dev);
1602         int nr = data->BEEP_BITS[sattr->index];
1603         int regindex = nr >> 3;
1604         unsigned long val;
1605
1606         int err = kstrtoul(buf, 10, &val);
1607         if (err < 0)
1608                 return err;
1609         if (val > 1)
1610                 return -EINVAL;
1611
1612         mutex_lock(&data->update_lock);
1613         if (val)
1614                 data->beeps |= (1ULL << nr);
1615         else
1616                 data->beeps &= ~(1ULL << nr);
1617         nct6775_write_value(data, data->REG_BEEP[regindex],
1618                             (data->beeps >> (regindex << 3)) & 0xff);
1619         mutex_unlock(&data->update_lock);
1620         return count;
1621 }
1622
1623 static ssize_t
1624 show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf)
1625 {
1626         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1627         struct nct6775_data *data = nct6775_update_device(dev);
1628         unsigned int beep = 0;
1629         int nr;
1630
1631         /*
1632          * For temperatures, there is no fixed mapping from registers to beep
1633          * enable bits. Beep enable bits are determined by the temperature
1634          * source mapping.
1635          */
1636         nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1637         if (nr >= 0) {
1638                 int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1639                 beep = (data->beeps >> bit) & 0x01;
1640         }
1641         return sprintf(buf, "%u\n", beep);
1642 }
1643
1644 static ssize_t
1645 store_temp_beep(struct device *dev, struct device_attribute *attr,
1646                 const char *buf, size_t count)
1647 {
1648         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1649         struct nct6775_data *data = dev_get_drvdata(dev);
1650         int nr, bit, regindex;
1651         unsigned long val;
1652
1653         int err = kstrtoul(buf, 10, &val);
1654         if (err < 0)
1655                 return err;
1656         if (val > 1)
1657                 return -EINVAL;
1658
1659         nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1660         if (nr < 0)
1661                 return -ENODEV;
1662
1663         bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1664         regindex = bit >> 3;
1665
1666         mutex_lock(&data->update_lock);
1667         if (val)
1668                 data->beeps |= (1ULL << bit);
1669         else
1670                 data->beeps &= ~(1ULL << bit);
1671         nct6775_write_value(data, data->REG_BEEP[regindex],
1672                             (data->beeps >> (regindex << 3)) & 0xff);
1673         mutex_unlock(&data->update_lock);
1674
1675         return count;
1676 }
1677
1678 static umode_t nct6775_in_is_visible(struct kobject *kobj,
1679                                      struct attribute *attr, int index)
1680 {
1681         struct device *dev = container_of(kobj, struct device, kobj);
1682         struct nct6775_data *data = dev_get_drvdata(dev);
1683         int in = index / 5;     /* voltage index */
1684
1685         if (!(data->have_in & (1 << in)))
1686                 return 0;
1687
1688         return attr->mode;
1689 }
1690
1691 SENSOR_TEMPLATE_2(in_input, "in%d_input", S_IRUGO, show_in_reg, NULL, 0, 0);
1692 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", S_IRUGO, show_alarm, NULL, 0);
1693 SENSOR_TEMPLATE(in_beep, "in%d_beep", S_IWUSR | S_IRUGO, show_beep, store_beep,
1694                 0);
1695 SENSOR_TEMPLATE_2(in_min, "in%d_min", S_IWUSR | S_IRUGO, show_in_reg,
1696                   store_in_reg, 0, 1);
1697 SENSOR_TEMPLATE_2(in_max, "in%d_max", S_IWUSR | S_IRUGO, show_in_reg,
1698                   store_in_reg, 0, 2);
1699
1700 /*
1701  * nct6775_in_is_visible uses the index into the following array
1702  * to determine if attributes should be created or not.
1703  * Any change in order or content must be matched.
1704  */
1705 static struct sensor_device_template *nct6775_attributes_in_template[] = {
1706         &sensor_dev_template_in_input,
1707         &sensor_dev_template_in_alarm,
1708         &sensor_dev_template_in_beep,
1709         &sensor_dev_template_in_min,
1710         &sensor_dev_template_in_max,
1711         NULL
1712 };
1713
1714 static struct sensor_template_group nct6775_in_template_group = {
1715         .templates = nct6775_attributes_in_template,
1716         .is_visible = nct6775_in_is_visible,
1717 };
1718
1719 static ssize_t
1720 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1721 {
1722         struct nct6775_data *data = nct6775_update_device(dev);
1723         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1724         int nr = sattr->index;
1725         return sprintf(buf, "%d\n", data->rpm[nr]);
1726 }
1727
1728 static ssize_t
1729 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1730 {
1731         struct nct6775_data *data = nct6775_update_device(dev);
1732         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1733         int nr = sattr->index;
1734         return sprintf(buf, "%d\n",
1735                        data->fan_from_reg_min(data->fan_min[nr],
1736                                               data->fan_div[nr]));
1737 }
1738
1739 static ssize_t
1740 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1741 {
1742         struct nct6775_data *data = nct6775_update_device(dev);
1743         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1744         int nr = sattr->index;
1745         return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1746 }
1747
1748 static ssize_t
1749 store_fan_min(struct device *dev, struct device_attribute *attr,
1750               const char *buf, size_t count)
1751 {
1752         struct nct6775_data *data = dev_get_drvdata(dev);
1753         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1754         int nr = sattr->index;
1755         unsigned long val;
1756         int err;
1757         unsigned int reg;
1758         u8 new_div;
1759
1760         err = kstrtoul(buf, 10, &val);
1761         if (err < 0)
1762                 return err;
1763
1764         mutex_lock(&data->update_lock);
1765         if (!data->has_fan_div) {
1766                 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1767                 if (!val) {
1768                         val = 0xff1f;
1769                 } else {
1770                         if (val > 1350000U)
1771                                 val = 135000U;
1772                         val = 1350000U / val;
1773                         val = (val & 0x1f) | ((val << 3) & 0xff00);
1774                 }
1775                 data->fan_min[nr] = val;
1776                 goto write_min; /* Leave fan divider alone */
1777         }
1778         if (!val) {
1779                 /* No min limit, alarm disabled */
1780                 data->fan_min[nr] = 255;
1781                 new_div = data->fan_div[nr]; /* No change */
1782                 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1783                 goto write_div;
1784         }
1785         reg = 1350000U / val;
1786         if (reg >= 128 * 255) {
1787                 /*
1788                  * Speed below this value cannot possibly be represented,
1789                  * even with the highest divider (128)
1790                  */
1791                 data->fan_min[nr] = 254;
1792                 new_div = 7; /* 128 == (1 << 7) */
1793                 dev_warn(dev,
1794                          "fan%u low limit %lu below minimum %u, set to minimum\n",
1795                          nr + 1, val, data->fan_from_reg_min(254, 7));
1796         } else if (!reg) {
1797                 /*
1798                  * Speed above this value cannot possibly be represented,
1799                  * even with the lowest divider (1)
1800                  */
1801                 data->fan_min[nr] = 1;
1802                 new_div = 0; /* 1 == (1 << 0) */
1803                 dev_warn(dev,
1804                          "fan%u low limit %lu above maximum %u, set to maximum\n",
1805                          nr + 1, val, data->fan_from_reg_min(1, 0));
1806         } else {
1807                 /*
1808                  * Automatically pick the best divider, i.e. the one such
1809                  * that the min limit will correspond to a register value
1810                  * in the 96..192 range
1811                  */
1812                 new_div = 0;
1813                 while (reg > 192 && new_div < 7) {
1814                         reg >>= 1;
1815                         new_div++;
1816                 }
1817                 data->fan_min[nr] = reg;
1818         }
1819
1820 write_div:
1821         /*
1822          * Write both the fan clock divider (if it changed) and the new
1823          * fan min (unconditionally)
1824          */
1825         if (new_div != data->fan_div[nr]) {
1826                 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1827                         nr + 1, div_from_reg(data->fan_div[nr]),
1828                         div_from_reg(new_div));
1829                 data->fan_div[nr] = new_div;
1830                 nct6775_write_fan_div_common(data, nr);
1831                 /* Give the chip time to sample a new speed value */
1832                 data->last_updated = jiffies;
1833         }
1834
1835 write_min:
1836         nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1837         mutex_unlock(&data->update_lock);
1838
1839         return count;
1840 }
1841
1842 static ssize_t
1843 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
1844 {
1845         struct nct6775_data *data = nct6775_update_device(dev);
1846         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1847         int p = data->fan_pulses[sattr->index];
1848
1849         return sprintf(buf, "%d\n", p ? : 4);
1850 }
1851
1852 static ssize_t
1853 store_fan_pulses(struct device *dev, struct device_attribute *attr,
1854                  const char *buf, size_t count)
1855 {
1856         struct nct6775_data *data = dev_get_drvdata(dev);
1857         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1858         int nr = sattr->index;
1859         unsigned long val;
1860         int err;
1861         u8 reg;
1862
1863         err = kstrtoul(buf, 10, &val);
1864         if (err < 0)
1865                 return err;
1866
1867         if (val > 4)
1868                 return -EINVAL;
1869
1870         mutex_lock(&data->update_lock);
1871         data->fan_pulses[nr] = val & 3;
1872         reg = nct6775_read_value(data, data->REG_FAN_PULSES[nr]);
1873         reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
1874         reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
1875         nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
1876         mutex_unlock(&data->update_lock);
1877
1878         return count;
1879 }
1880
1881 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
1882                                       struct attribute *attr, int index)
1883 {
1884         struct device *dev = container_of(kobj, struct device, kobj);
1885         struct nct6775_data *data = dev_get_drvdata(dev);
1886         int fan = index / 6;    /* fan index */
1887         int nr = index % 6;     /* attribute index */
1888
1889         if (!(data->has_fan & (1 << fan)))
1890                 return 0;
1891
1892         if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1)
1893                 return 0;
1894         if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1)
1895                 return 0;
1896         if (nr == 4 && !(data->has_fan_min & (1 << fan)))
1897                 return 0;
1898         if (nr == 5 && data->kind != nct6775)
1899                 return 0;
1900
1901         return attr->mode;
1902 }
1903
1904 SENSOR_TEMPLATE(fan_input, "fan%d_input", S_IRUGO, show_fan, NULL, 0);
1905 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", S_IRUGO, show_alarm, NULL,
1906                 FAN_ALARM_BASE);
1907 SENSOR_TEMPLATE(fan_beep, "fan%d_beep", S_IWUSR | S_IRUGO, show_beep,
1908                 store_beep, FAN_ALARM_BASE);
1909 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", S_IWUSR | S_IRUGO, show_fan_pulses,
1910                 store_fan_pulses, 0);
1911 SENSOR_TEMPLATE(fan_min, "fan%d_min", S_IWUSR | S_IRUGO, show_fan_min,
1912                 store_fan_min, 0);
1913 SENSOR_TEMPLATE(fan_div, "fan%d_div", S_IRUGO, show_fan_div, NULL, 0);
1914
1915 /*
1916  * nct6775_fan_is_visible uses the index into the following array
1917  * to determine if attributes should be created or not.
1918  * Any change in order or content must be matched.
1919  */
1920 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
1921         &sensor_dev_template_fan_input,
1922         &sensor_dev_template_fan_alarm, /* 1 */
1923         &sensor_dev_template_fan_beep,  /* 2 */
1924         &sensor_dev_template_fan_pulses,
1925         &sensor_dev_template_fan_min,   /* 4 */
1926         &sensor_dev_template_fan_div,   /* 5 */
1927         NULL
1928 };
1929
1930 static struct sensor_template_group nct6775_fan_template_group = {
1931         .templates = nct6775_attributes_fan_template,
1932         .is_visible = nct6775_fan_is_visible,
1933         .base = 1,
1934 };
1935
1936 static ssize_t
1937 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1938 {
1939         struct nct6775_data *data = nct6775_update_device(dev);
1940         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1941         int nr = sattr->index;
1942         return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1943 }
1944
1945 static ssize_t
1946 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1947 {
1948         struct nct6775_data *data = nct6775_update_device(dev);
1949         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1950         int nr = sattr->nr;
1951         int index = sattr->index;
1952
1953         return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
1954 }
1955
1956 static ssize_t
1957 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
1958            size_t count)
1959 {
1960         struct nct6775_data *data = dev_get_drvdata(dev);
1961         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1962         int nr = sattr->nr;
1963         int index = sattr->index;
1964         int err;
1965         long val;
1966
1967         err = kstrtol(buf, 10, &val);
1968         if (err < 0)
1969                 return err;
1970
1971         mutex_lock(&data->update_lock);
1972         data->temp[index][nr] = LM75_TEMP_TO_REG(val);
1973         nct6775_write_temp(data, data->reg_temp[index][nr],
1974                            data->temp[index][nr]);
1975         mutex_unlock(&data->update_lock);
1976         return count;
1977 }
1978
1979 static ssize_t
1980 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
1981 {
1982         struct nct6775_data *data = nct6775_update_device(dev);
1983         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1984
1985         return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
1986 }
1987
1988 static ssize_t
1989 store_temp_offset(struct device *dev, struct device_attribute *attr,
1990                   const char *buf, size_t count)
1991 {
1992         struct nct6775_data *data = dev_get_drvdata(dev);
1993         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1994         int nr = sattr->index;
1995         long val;
1996         int err;
1997
1998         err = kstrtol(buf, 10, &val);
1999         if (err < 0)
2000                 return err;
2001
2002         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
2003
2004         mutex_lock(&data->update_lock);
2005         data->temp_offset[nr] = val;
2006         nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
2007         mutex_unlock(&data->update_lock);
2008
2009         return count;
2010 }
2011
2012 static ssize_t
2013 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
2014 {
2015         struct nct6775_data *data = nct6775_update_device(dev);
2016         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2017         int nr = sattr->index;
2018         return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
2019 }
2020
2021 static ssize_t
2022 store_temp_type(struct device *dev, struct device_attribute *attr,
2023                 const char *buf, size_t count)
2024 {
2025         struct nct6775_data *data = nct6775_update_device(dev);
2026         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2027         int nr = sattr->index;
2028         unsigned long val;
2029         int err;
2030         u8 vbat, diode, vbit, dbit;
2031
2032         err = kstrtoul(buf, 10, &val);
2033         if (err < 0)
2034                 return err;
2035
2036         if (val != 1 && val != 3 && val != 4)
2037                 return -EINVAL;
2038
2039         mutex_lock(&data->update_lock);
2040
2041         data->temp_type[nr] = val;
2042         vbit = 0x02 << nr;
2043         dbit = data->DIODE_MASK << nr;
2044         vbat = nct6775_read_value(data, data->REG_VBAT) & ~vbit;
2045         diode = nct6775_read_value(data, data->REG_DIODE) & ~dbit;
2046         switch (val) {
2047         case 1: /* CPU diode (diode, current mode) */
2048                 vbat |= vbit;
2049                 diode |= dbit;
2050                 break;
2051         case 3: /* diode, voltage mode */
2052                 vbat |= dbit;
2053                 break;
2054         case 4: /* thermistor */
2055                 break;
2056         }
2057         nct6775_write_value(data, data->REG_VBAT, vbat);
2058         nct6775_write_value(data, data->REG_DIODE, diode);
2059
2060         mutex_unlock(&data->update_lock);
2061         return count;
2062 }
2063
2064 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
2065                                        struct attribute *attr, int index)
2066 {
2067         struct device *dev = container_of(kobj, struct device, kobj);
2068         struct nct6775_data *data = dev_get_drvdata(dev);
2069         int temp = index / 10;  /* temp index */
2070         int nr = index % 10;    /* attribute index */
2071
2072         if (!(data->have_temp & (1 << temp)))
2073                 return 0;
2074
2075         if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0)
2076                 return 0;                               /* alarm */
2077
2078         if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0)
2079                 return 0;                               /* beep */
2080
2081         if (nr == 4 && !data->reg_temp[1][temp])        /* max */
2082                 return 0;
2083
2084         if (nr == 5 && !data->reg_temp[2][temp])        /* max_hyst */
2085                 return 0;
2086
2087         if (nr == 6 && !data->reg_temp[3][temp])        /* crit */
2088                 return 0;
2089
2090         if (nr == 7 && !data->reg_temp[4][temp])        /* lcrit */
2091                 return 0;
2092
2093         /* offset and type only apply to fixed sensors */
2094         if (nr > 7 && !(data->have_temp_fixed & (1 << temp)))
2095                 return 0;
2096
2097         return attr->mode;
2098 }
2099
2100 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", S_IRUGO, show_temp, NULL, 0, 0);
2101 SENSOR_TEMPLATE(temp_label, "temp%d_label", S_IRUGO, show_temp_label, NULL, 0);
2102 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", S_IRUGO | S_IWUSR, show_temp,
2103                   store_temp, 0, 1);
2104 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", S_IRUGO | S_IWUSR,
2105                   show_temp, store_temp, 0, 2);
2106 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", S_IRUGO | S_IWUSR, show_temp,
2107                   store_temp, 0, 3);
2108 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", S_IRUGO | S_IWUSR, show_temp,
2109                   store_temp, 0, 4);
2110 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", S_IRUGO | S_IWUSR,
2111                 show_temp_offset, store_temp_offset, 0);
2112 SENSOR_TEMPLATE(temp_type, "temp%d_type", S_IRUGO | S_IWUSR, show_temp_type,
2113                 store_temp_type, 0);
2114 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", S_IRUGO, show_temp_alarm, NULL, 0);
2115 SENSOR_TEMPLATE(temp_beep, "temp%d_beep", S_IRUGO | S_IWUSR, show_temp_beep,
2116                 store_temp_beep, 0);
2117
2118 /*
2119  * nct6775_temp_is_visible uses the index into the following array
2120  * to determine if attributes should be created or not.
2121  * Any change in order or content must be matched.
2122  */
2123 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
2124         &sensor_dev_template_temp_input,
2125         &sensor_dev_template_temp_label,
2126         &sensor_dev_template_temp_alarm,        /* 2 */
2127         &sensor_dev_template_temp_beep,         /* 3 */
2128         &sensor_dev_template_temp_max,          /* 4 */
2129         &sensor_dev_template_temp_max_hyst,     /* 5 */
2130         &sensor_dev_template_temp_crit,         /* 6 */
2131         &sensor_dev_template_temp_lcrit,        /* 7 */
2132         &sensor_dev_template_temp_offset,       /* 8 */
2133         &sensor_dev_template_temp_type,         /* 9 */
2134         NULL
2135 };
2136
2137 static struct sensor_template_group nct6775_temp_template_group = {
2138         .templates = nct6775_attributes_temp_template,
2139         .is_visible = nct6775_temp_is_visible,
2140         .base = 1,
2141 };
2142
2143 static ssize_t
2144 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
2145 {
2146         struct nct6775_data *data = nct6775_update_device(dev);
2147         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2148
2149         return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
2150 }
2151
2152 static ssize_t
2153 store_pwm_mode(struct device *dev, struct device_attribute *attr,
2154                const char *buf, size_t count)
2155 {
2156         struct nct6775_data *data = dev_get_drvdata(dev);
2157         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2158         int nr = sattr->index;
2159         unsigned long val;
2160         int err;
2161         u8 reg;
2162
2163         err = kstrtoul(buf, 10, &val);
2164         if (err < 0)
2165                 return err;
2166
2167         if (val > 1)
2168                 return -EINVAL;
2169
2170         /* Setting DC mode is not supported for all chips/channels */
2171         if (data->REG_PWM_MODE[nr] == 0) {
2172                 if (val)
2173                         return -EINVAL;
2174                 return count;
2175         }
2176
2177         mutex_lock(&data->update_lock);
2178         data->pwm_mode[nr] = val;
2179         reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
2180         reg &= ~data->PWM_MODE_MASK[nr];
2181         if (val)
2182                 reg |= data->PWM_MODE_MASK[nr];
2183         nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
2184         mutex_unlock(&data->update_lock);
2185         return count;
2186 }
2187
2188 static ssize_t
2189 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2190 {
2191         struct nct6775_data *data = nct6775_update_device(dev);
2192         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2193         int nr = sattr->nr;
2194         int index = sattr->index;
2195         int pwm;
2196
2197         /*
2198          * For automatic fan control modes, show current pwm readings.
2199          * Otherwise, show the configured value.
2200          */
2201         if (index == 0 && data->pwm_enable[nr] > manual)
2202                 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
2203         else
2204                 pwm = data->pwm[index][nr];
2205
2206         return sprintf(buf, "%d\n", pwm);
2207 }
2208
2209 static ssize_t
2210 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
2211           size_t count)
2212 {
2213         struct nct6775_data *data = dev_get_drvdata(dev);
2214         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2215         int nr = sattr->nr;
2216         int index = sattr->index;
2217         unsigned long val;
2218         int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
2219         int maxval[7]
2220           = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
2221         int err;
2222         u8 reg;
2223
2224         err = kstrtoul(buf, 10, &val);
2225         if (err < 0)
2226                 return err;
2227         val = clamp_val(val, minval[index], maxval[index]);
2228
2229         mutex_lock(&data->update_lock);
2230         data->pwm[index][nr] = val;
2231         nct6775_write_value(data, data->REG_PWM[index][nr], val);
2232         if (index == 2) { /* floor: disable if val == 0 */
2233                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2234                 reg &= 0x7f;
2235                 if (val)
2236                         reg |= 0x80;
2237                 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2238         }
2239         mutex_unlock(&data->update_lock);
2240         return count;
2241 }
2242
2243 /* Returns 0 if OK, -EINVAL otherwise */
2244 static int check_trip_points(struct nct6775_data *data, int nr)
2245 {
2246         int i;
2247
2248         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2249                 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
2250                         return -EINVAL;
2251         }
2252         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2253                 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
2254                         return -EINVAL;
2255         }
2256         /* validate critical temperature and pwm if enabled (pwm > 0) */
2257         if (data->auto_pwm[nr][data->auto_pwm_num]) {
2258                 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2259                                 data->auto_temp[nr][data->auto_pwm_num] ||
2260                     data->auto_pwm[nr][data->auto_pwm_num - 1] >
2261                                 data->auto_pwm[nr][data->auto_pwm_num])
2262                         return -EINVAL;
2263         }
2264         return 0;
2265 }
2266
2267 static void pwm_update_registers(struct nct6775_data *data, int nr)
2268 {
2269         u8 reg;
2270
2271         switch (data->pwm_enable[nr]) {
2272         case off:
2273         case manual:
2274                 break;
2275         case speed_cruise:
2276                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2277                 reg = (reg & ~data->tolerance_mask) |
2278                   (data->target_speed_tolerance[nr] & data->tolerance_mask);
2279                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2280                 nct6775_write_value(data, data->REG_TARGET[nr],
2281                                     data->target_speed[nr] & 0xff);
2282                 if (data->REG_TOLERANCE_H) {
2283                         reg = (data->target_speed[nr] >> 8) & 0x0f;
2284                         reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2285                         nct6775_write_value(data,
2286                                             data->REG_TOLERANCE_H[nr],
2287                                             reg);
2288                 }
2289                 break;
2290         case thermal_cruise:
2291                 nct6775_write_value(data, data->REG_TARGET[nr],
2292                                     data->target_temp[nr]);
2293                 /* intentional */
2294         default:
2295                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2296                 reg = (reg & ~data->tolerance_mask) |
2297                   data->temp_tolerance[0][nr];
2298                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2299                 break;
2300         }
2301 }
2302
2303 static ssize_t
2304 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2305 {
2306         struct nct6775_data *data = nct6775_update_device(dev);
2307         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2308
2309         return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2310 }
2311
2312 static ssize_t
2313 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2314                  const char *buf, size_t count)
2315 {
2316         struct nct6775_data *data = dev_get_drvdata(dev);
2317         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2318         int nr = sattr->index;
2319         unsigned long val;
2320         int err;
2321         u16 reg;
2322
2323         err = kstrtoul(buf, 10, &val);
2324         if (err < 0)
2325                 return err;
2326
2327         if (val > sf4)
2328                 return -EINVAL;
2329
2330         if (val == sf3 && data->kind != nct6775)
2331                 return -EINVAL;
2332
2333         if (val == sf4 && check_trip_points(data, nr)) {
2334                 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2335                 dev_err(dev, "Adjust trip points and try again\n");
2336                 return -EINVAL;
2337         }
2338
2339         mutex_lock(&data->update_lock);
2340         data->pwm_enable[nr] = val;
2341         if (val == off) {
2342                 /*
2343                  * turn off pwm control: select manual mode, set pwm to maximum
2344                  */
2345                 data->pwm[0][nr] = 255;
2346                 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2347         }
2348         pwm_update_registers(data, nr);
2349         reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2350         reg &= 0x0f;
2351         reg |= pwm_enable_to_reg(val) << 4;
2352         nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2353         mutex_unlock(&data->update_lock);
2354         return count;
2355 }
2356
2357 static ssize_t
2358 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2359 {
2360         int i, sel = 0;
2361
2362         for (i = 0; i < NUM_TEMP; i++) {
2363                 if (!(data->have_temp & (1 << i)))
2364                         continue;
2365                 if (src == data->temp_src[i]) {
2366                         sel = i + 1;
2367                         break;
2368                 }
2369         }
2370
2371         return sprintf(buf, "%d\n", sel);
2372 }
2373
2374 static ssize_t
2375 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2376 {
2377         struct nct6775_data *data = nct6775_update_device(dev);
2378         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2379         int index = sattr->index;
2380
2381         return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2382 }
2383
2384 static ssize_t
2385 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2386                    const char *buf, size_t count)
2387 {
2388         struct nct6775_data *data = nct6775_update_device(dev);
2389         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2390         int nr = sattr->index;
2391         unsigned long val;
2392         int err, reg, src;
2393
2394         err = kstrtoul(buf, 10, &val);
2395         if (err < 0)
2396                 return err;
2397         if (val == 0 || val > NUM_TEMP)
2398                 return -EINVAL;
2399         if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
2400                 return -EINVAL;
2401
2402         mutex_lock(&data->update_lock);
2403         src = data->temp_src[val - 1];
2404         data->pwm_temp_sel[nr] = src;
2405         reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2406         reg &= 0xe0;
2407         reg |= src;
2408         nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2409         mutex_unlock(&data->update_lock);
2410
2411         return count;
2412 }
2413
2414 static ssize_t
2415 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2416                          char *buf)
2417 {
2418         struct nct6775_data *data = nct6775_update_device(dev);
2419         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2420         int index = sattr->index;
2421
2422         return show_pwm_temp_sel_common(data, buf,
2423                                         data->pwm_weight_temp_sel[index]);
2424 }
2425
2426 static ssize_t
2427 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2428                           const char *buf, size_t count)
2429 {
2430         struct nct6775_data *data = nct6775_update_device(dev);
2431         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2432         int nr = sattr->index;
2433         unsigned long val;
2434         int err, reg, src;
2435
2436         err = kstrtoul(buf, 10, &val);
2437         if (err < 0)
2438                 return err;
2439         if (val > NUM_TEMP)
2440                 return -EINVAL;
2441         if (val && (!(data->have_temp & (1 << (val - 1))) ||
2442                     !data->temp_src[val - 1]))
2443                 return -EINVAL;
2444
2445         mutex_lock(&data->update_lock);
2446         if (val) {
2447                 src = data->temp_src[val - 1];
2448                 data->pwm_weight_temp_sel[nr] = src;
2449                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2450                 reg &= 0xe0;
2451                 reg |= (src | 0x80);
2452                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2453         } else {
2454                 data->pwm_weight_temp_sel[nr] = 0;
2455                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2456                 reg &= 0x7f;
2457                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2458         }
2459         mutex_unlock(&data->update_lock);
2460
2461         return count;
2462 }
2463
2464 static ssize_t
2465 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2466 {
2467         struct nct6775_data *data = nct6775_update_device(dev);
2468         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2469
2470         return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2471 }
2472
2473 static ssize_t
2474 store_target_temp(struct device *dev, struct device_attribute *attr,
2475                   const char *buf, size_t count)
2476 {
2477         struct nct6775_data *data = dev_get_drvdata(dev);
2478         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2479         int nr = sattr->index;
2480         unsigned long val;
2481         int err;
2482
2483         err = kstrtoul(buf, 10, &val);
2484         if (err < 0)
2485                 return err;
2486
2487         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2488                         data->target_temp_mask);
2489
2490         mutex_lock(&data->update_lock);
2491         data->target_temp[nr] = val;
2492         pwm_update_registers(data, nr);
2493         mutex_unlock(&data->update_lock);
2494         return count;
2495 }
2496
2497 static ssize_t
2498 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2499 {
2500         struct nct6775_data *data = nct6775_update_device(dev);
2501         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2502         int nr = sattr->index;
2503
2504         return sprintf(buf, "%d\n",
2505                        fan_from_reg16(data->target_speed[nr],
2506                                       data->fan_div[nr]));
2507 }
2508
2509 static ssize_t
2510 store_target_speed(struct device *dev, struct device_attribute *attr,
2511                    const char *buf, size_t count)
2512 {
2513         struct nct6775_data *data = dev_get_drvdata(dev);
2514         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2515         int nr = sattr->index;
2516         unsigned long val;
2517         int err;
2518         u16 speed;
2519
2520         err = kstrtoul(buf, 10, &val);
2521         if (err < 0)
2522                 return err;
2523
2524         val = clamp_val(val, 0, 1350000U);
2525         speed = fan_to_reg(val, data->fan_div[nr]);
2526
2527         mutex_lock(&data->update_lock);
2528         data->target_speed[nr] = speed;
2529         pwm_update_registers(data, nr);
2530         mutex_unlock(&data->update_lock);
2531         return count;
2532 }
2533
2534 static ssize_t
2535 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2536                     char *buf)
2537 {
2538         struct nct6775_data *data = nct6775_update_device(dev);
2539         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2540         int nr = sattr->nr;
2541         int index = sattr->index;
2542
2543         return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2544 }
2545
2546 static ssize_t
2547 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2548                      const char *buf, size_t count)
2549 {
2550         struct nct6775_data *data = dev_get_drvdata(dev);
2551         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2552         int nr = sattr->nr;
2553         int index = sattr->index;
2554         unsigned long val;
2555         int err;
2556
2557         err = kstrtoul(buf, 10, &val);
2558         if (err < 0)
2559                 return err;
2560
2561         /* Limit tolerance as needed */
2562         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2563
2564         mutex_lock(&data->update_lock);
2565         data->temp_tolerance[index][nr] = val;
2566         if (index)
2567                 pwm_update_registers(data, nr);
2568         else
2569                 nct6775_write_value(data,
2570                                     data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2571                                     val);
2572         mutex_unlock(&data->update_lock);
2573         return count;
2574 }
2575
2576 /*
2577  * Fan speed tolerance is a tricky beast, since the associated register is
2578  * a tick counter, but the value is reported and configured as rpm.
2579  * Compute resulting low and high rpm values and report the difference.
2580  */
2581 static ssize_t
2582 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2583                      char *buf)
2584 {
2585         struct nct6775_data *data = nct6775_update_device(dev);
2586         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2587         int nr = sattr->index;
2588         int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2589         int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2590         int tolerance;
2591
2592         if (low <= 0)
2593                 low = 1;
2594         if (high > 0xffff)
2595                 high = 0xffff;
2596         if (high < low)
2597                 high = low;
2598
2599         tolerance = (fan_from_reg16(low, data->fan_div[nr])
2600                      - fan_from_reg16(high, data->fan_div[nr])) / 2;
2601
2602         return sprintf(buf, "%d\n", tolerance);
2603 }
2604
2605 static ssize_t
2606 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2607                       const char *buf, size_t count)
2608 {
2609         struct nct6775_data *data = dev_get_drvdata(dev);
2610         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2611         int nr = sattr->index;
2612         unsigned long val;
2613         int err;
2614         int low, high;
2615
2616         err = kstrtoul(buf, 10, &val);
2617         if (err < 0)
2618                 return err;
2619
2620         high = fan_from_reg16(data->target_speed[nr],
2621                               data->fan_div[nr]) + val;
2622         low = fan_from_reg16(data->target_speed[nr],
2623                              data->fan_div[nr]) - val;
2624         if (low <= 0)
2625                 low = 1;
2626         if (high < low)
2627                 high = low;
2628
2629         val = (fan_to_reg(low, data->fan_div[nr]) -
2630                fan_to_reg(high, data->fan_div[nr])) / 2;
2631
2632         /* Limit tolerance as needed */
2633         val = clamp_val(val, 0, data->speed_tolerance_limit);
2634
2635         mutex_lock(&data->update_lock);
2636         data->target_speed_tolerance[nr] = val;
2637         pwm_update_registers(data, nr);
2638         mutex_unlock(&data->update_lock);
2639         return count;
2640 }
2641
2642 SENSOR_TEMPLATE_2(pwm, "pwm%d", S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2643 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", S_IWUSR | S_IRUGO, show_pwm_mode,
2644                 store_pwm_mode, 0);
2645 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", S_IWUSR | S_IRUGO, show_pwm_enable,
2646                 store_pwm_enable, 0);
2647 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", S_IWUSR | S_IRUGO,
2648                 show_pwm_temp_sel, store_pwm_temp_sel, 0);
2649 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", S_IWUSR | S_IRUGO,
2650                 show_target_temp, store_target_temp, 0);
2651 SENSOR_TEMPLATE(fan_target, "fan%d_target", S_IWUSR | S_IRUGO,
2652                 show_target_speed, store_target_speed, 0);
2653 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", S_IWUSR | S_IRUGO,
2654                 show_speed_tolerance, store_speed_tolerance, 0);
2655
2656 /* Smart Fan registers */
2657
2658 static ssize_t
2659 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2660 {
2661         struct nct6775_data *data = nct6775_update_device(dev);
2662         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2663         int nr = sattr->nr;
2664         int index = sattr->index;
2665
2666         return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2667 }
2668
2669 static ssize_t
2670 store_weight_temp(struct device *dev, struct device_attribute *attr,
2671                   const char *buf, size_t count)
2672 {
2673         struct nct6775_data *data = dev_get_drvdata(dev);
2674         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2675         int nr = sattr->nr;
2676         int index = sattr->index;
2677         unsigned long val;
2678         int err;
2679
2680         err = kstrtoul(buf, 10, &val);
2681         if (err < 0)
2682                 return err;
2683
2684         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2685
2686         mutex_lock(&data->update_lock);
2687         data->weight_temp[index][nr] = val;
2688         nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2689         mutex_unlock(&data->update_lock);
2690         return count;
2691 }
2692
2693 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", S_IWUSR | S_IRUGO,
2694                   show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
2695 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step",
2696                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 0);
2697 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol",
2698                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 1);
2699 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base",
2700                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 2);
2701 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step",
2702                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 5);
2703 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base",
2704                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 6);
2705
2706 static ssize_t
2707 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2708 {
2709         struct nct6775_data *data = nct6775_update_device(dev);
2710         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2711         int nr = sattr->nr;
2712         int index = sattr->index;
2713
2714         return sprintf(buf, "%d\n",
2715                        step_time_from_reg(data->fan_time[index][nr],
2716                                           data->pwm_mode[nr]));
2717 }
2718
2719 static ssize_t
2720 store_fan_time(struct device *dev, struct device_attribute *attr,
2721                const char *buf, size_t count)
2722 {
2723         struct nct6775_data *data = dev_get_drvdata(dev);
2724         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2725         int nr = sattr->nr;
2726         int index = sattr->index;
2727         unsigned long val;
2728         int err;
2729
2730         err = kstrtoul(buf, 10, &val);
2731         if (err < 0)
2732                 return err;
2733
2734         val = step_time_to_reg(val, data->pwm_mode[nr]);
2735         mutex_lock(&data->update_lock);
2736         data->fan_time[index][nr] = val;
2737         nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2738         mutex_unlock(&data->update_lock);
2739         return count;
2740 }
2741
2742 static ssize_t
2743 show_name(struct device *dev, struct device_attribute *attr, char *buf)
2744 {
2745         struct nct6775_data *data = dev_get_drvdata(dev);
2746
2747         return sprintf(buf, "%s\n", data->name);
2748 }
2749
2750 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
2751
2752 static ssize_t
2753 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2754 {
2755         struct nct6775_data *data = nct6775_update_device(dev);
2756         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2757
2758         return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2759 }
2760
2761 static ssize_t
2762 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2763                const char *buf, size_t count)
2764 {
2765         struct nct6775_data *data = dev_get_drvdata(dev);
2766         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2767         int nr = sattr->nr;
2768         int point = sattr->index;
2769         unsigned long val;
2770         int err;
2771         u8 reg;
2772
2773         err = kstrtoul(buf, 10, &val);
2774         if (err < 0)
2775                 return err;
2776         if (val > 255)
2777                 return -EINVAL;
2778
2779         if (point == data->auto_pwm_num) {
2780                 if (data->kind != nct6775 && !val)
2781                         return -EINVAL;
2782                 if (data->kind != nct6779 && val)
2783                         val = 0xff;
2784         }
2785
2786         mutex_lock(&data->update_lock);
2787         data->auto_pwm[nr][point] = val;
2788         if (point < data->auto_pwm_num) {
2789                 nct6775_write_value(data,
2790                                     NCT6775_AUTO_PWM(data, nr, point),
2791                                     data->auto_pwm[nr][point]);
2792         } else {
2793                 switch (data->kind) {
2794                 case nct6775:
2795                         /* disable if needed (pwm == 0) */
2796                         reg = nct6775_read_value(data,
2797                                                  NCT6775_REG_CRITICAL_ENAB[nr]);
2798                         if (val)
2799                                 reg |= 0x02;
2800                         else
2801                                 reg &= ~0x02;
2802                         nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
2803                                             reg);
2804                         break;
2805                 case nct6776:
2806                         break; /* always enabled, nothing to do */
2807                 case nct6106:
2808                 case nct6779:
2809                 case nct6791:
2810                         nct6775_write_value(data, data->REG_CRITICAL_PWM[nr],
2811                                             val);
2812                         reg = nct6775_read_value(data,
2813                                         data->REG_CRITICAL_PWM_ENABLE[nr]);
2814                         if (val == 255)
2815                                 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
2816                         else
2817                                 reg |= data->CRITICAL_PWM_ENABLE_MASK;
2818                         nct6775_write_value(data,
2819                                             data->REG_CRITICAL_PWM_ENABLE[nr],
2820                                             reg);
2821                         break;
2822                 }
2823         }
2824         mutex_unlock(&data->update_lock);
2825         return count;
2826 }
2827
2828 static ssize_t
2829 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
2830 {
2831         struct nct6775_data *data = nct6775_update_device(dev);
2832         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2833         int nr = sattr->nr;
2834         int point = sattr->index;
2835
2836         /*
2837          * We don't know for sure if the temperature is signed or unsigned.
2838          * Assume it is unsigned.
2839          */
2840         return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
2841 }
2842
2843 static ssize_t
2844 store_auto_temp(struct device *dev, struct device_attribute *attr,
2845                 const char *buf, size_t count)
2846 {
2847         struct nct6775_data *data = dev_get_drvdata(dev);
2848         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2849         int nr = sattr->nr;
2850         int point = sattr->index;
2851         unsigned long val;
2852         int err;
2853
2854         err = kstrtoul(buf, 10, &val);
2855         if (err)
2856                 return err;
2857         if (val > 255000)
2858                 return -EINVAL;
2859
2860         mutex_lock(&data->update_lock);
2861         data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
2862         if (point < data->auto_pwm_num) {
2863                 nct6775_write_value(data,
2864                                     NCT6775_AUTO_TEMP(data, nr, point),
2865                                     data->auto_temp[nr][point]);
2866         } else {
2867                 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
2868                                     data->auto_temp[nr][point]);
2869         }
2870         mutex_unlock(&data->update_lock);
2871         return count;
2872 }
2873
2874 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
2875                                       struct attribute *attr, int index)
2876 {
2877         struct device *dev = container_of(kobj, struct device, kobj);
2878         struct nct6775_data *data = dev_get_drvdata(dev);
2879         int pwm = index / 36;   /* pwm index */
2880         int nr = index % 36;    /* attribute index */
2881
2882         if (!(data->has_pwm & (1 << pwm)))
2883                 return 0;
2884
2885         if ((nr >= 14 && nr <= 18) || nr == 21)   /* weight */
2886                 if (!data->REG_WEIGHT_TEMP_SEL[pwm])
2887                         return 0;
2888         if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
2889                 return 0;
2890         if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
2891                 return 0;
2892         if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
2893                 return 0;
2894
2895         if (nr >= 22 && nr <= 35) {             /* auto point */
2896                 int api = (nr - 22) / 2;        /* auto point index */
2897
2898                 if (api > data->auto_pwm_num)
2899                         return 0;
2900         }
2901         return attr->mode;
2902 }
2903
2904 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", S_IWUSR | S_IRUGO,
2905                   show_fan_time, store_fan_time, 0, 0);
2906 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", S_IWUSR | S_IRUGO,
2907                   show_fan_time, store_fan_time, 0, 1);
2908 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", S_IWUSR | S_IRUGO,
2909                   show_fan_time, store_fan_time, 0, 2);
2910 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", S_IWUSR | S_IRUGO, show_pwm,
2911                   store_pwm, 0, 1);
2912 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", S_IWUSR | S_IRUGO, show_pwm,
2913                   store_pwm, 0, 2);
2914 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", S_IWUSR | S_IRUGO,
2915                   show_temp_tolerance, store_temp_tolerance, 0, 0);
2916 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance",
2917                   S_IWUSR | S_IRUGO, show_temp_tolerance, store_temp_tolerance,
2918                   0, 1);
2919
2920 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2921                   0, 3);
2922
2923 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", S_IWUSR | S_IRUGO, show_pwm,
2924                   store_pwm, 0, 4);
2925
2926 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm",
2927                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 0);
2928 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp",
2929                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 0);
2930
2931 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm",
2932                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 1);
2933 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp",
2934                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 1);
2935
2936 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm",
2937                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 2);
2938 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp",
2939                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 2);
2940
2941 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm",
2942                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 3);
2943 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp",
2944                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 3);
2945
2946 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm",
2947                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 4);
2948 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp",
2949                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 4);
2950
2951 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm",
2952                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 5);
2953 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp",
2954                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 5);
2955
2956 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm",
2957                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 6);
2958 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp",
2959                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 6);
2960
2961 /*
2962  * nct6775_pwm_is_visible uses the index into the following array
2963  * to determine if attributes should be created or not.
2964  * Any change in order or content must be matched.
2965  */
2966 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
2967         &sensor_dev_template_pwm,
2968         &sensor_dev_template_pwm_mode,
2969         &sensor_dev_template_pwm_enable,
2970         &sensor_dev_template_pwm_temp_sel,
2971         &sensor_dev_template_pwm_temp_tolerance,
2972         &sensor_dev_template_pwm_crit_temp_tolerance,
2973         &sensor_dev_template_pwm_target_temp,
2974         &sensor_dev_template_fan_target,
2975         &sensor_dev_template_fan_tolerance,
2976         &sensor_dev_template_pwm_stop_time,
2977         &sensor_dev_template_pwm_step_up_time,
2978         &sensor_dev_template_pwm_step_down_time,
2979         &sensor_dev_template_pwm_start,
2980         &sensor_dev_template_pwm_floor,
2981         &sensor_dev_template_pwm_weight_temp_sel,       /* 14 */
2982         &sensor_dev_template_pwm_weight_temp_step,
2983         &sensor_dev_template_pwm_weight_temp_step_tol,
2984         &sensor_dev_template_pwm_weight_temp_step_base,
2985         &sensor_dev_template_pwm_weight_duty_step,      /* 18 */
2986         &sensor_dev_template_pwm_max,                   /* 19 */
2987         &sensor_dev_template_pwm_step,                  /* 20 */
2988         &sensor_dev_template_pwm_weight_duty_base,      /* 21 */
2989         &sensor_dev_template_pwm_auto_point1_pwm,       /* 22 */
2990         &sensor_dev_template_pwm_auto_point1_temp,
2991         &sensor_dev_template_pwm_auto_point2_pwm,
2992         &sensor_dev_template_pwm_auto_point2_temp,
2993         &sensor_dev_template_pwm_auto_point3_pwm,
2994         &sensor_dev_template_pwm_auto_point3_temp,
2995         &sensor_dev_template_pwm_auto_point4_pwm,
2996         &sensor_dev_template_pwm_auto_point4_temp,
2997         &sensor_dev_template_pwm_auto_point5_pwm,
2998         &sensor_dev_template_pwm_auto_point5_temp,
2999         &sensor_dev_template_pwm_auto_point6_pwm,
3000         &sensor_dev_template_pwm_auto_point6_temp,
3001         &sensor_dev_template_pwm_auto_point7_pwm,
3002         &sensor_dev_template_pwm_auto_point7_temp,      /* 35 */
3003
3004         NULL
3005 };
3006
3007 static struct sensor_template_group nct6775_pwm_template_group = {
3008         .templates = nct6775_attributes_pwm_template,
3009         .is_visible = nct6775_pwm_is_visible,
3010         .base = 1,
3011 };
3012
3013 static ssize_t
3014 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
3015 {
3016         struct nct6775_data *data = dev_get_drvdata(dev);
3017         return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
3018 }
3019
3020 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
3021
3022 /* Case open detection */
3023
3024 static ssize_t
3025 clear_caseopen(struct device *dev, struct device_attribute *attr,
3026                const char *buf, size_t count)
3027 {
3028         struct nct6775_data *data = dev_get_drvdata(dev);
3029         int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
3030         unsigned long val;
3031         u8 reg;
3032         int ret;
3033
3034         if (kstrtoul(buf, 10, &val) || val != 0)
3035                 return -EINVAL;
3036
3037         mutex_lock(&data->update_lock);
3038
3039         /*
3040          * Use CR registers to clear caseopen status.
3041          * The CR registers are the same for all chips, and not all chips
3042          * support clearing the caseopen status through "regular" registers.
3043          */
3044         ret = superio_enter(data->sioreg);
3045         if (ret) {
3046                 count = ret;
3047                 goto error;
3048         }
3049
3050         superio_select(data->sioreg, NCT6775_LD_ACPI);
3051         reg = superio_inb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
3052         reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3053         superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3054         reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3055         superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3056         superio_exit(data->sioreg);
3057
3058         data->valid = false;    /* Force cache refresh */
3059 error:
3060         mutex_unlock(&data->update_lock);
3061         return count;
3062 }
3063
3064 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
3065                           clear_caseopen, INTRUSION_ALARM_BASE);
3066 static SENSOR_DEVICE_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
3067                           clear_caseopen, INTRUSION_ALARM_BASE + 1);
3068 static SENSOR_DEVICE_ATTR(intrusion0_beep, S_IWUSR | S_IRUGO, show_beep,
3069                           store_beep, INTRUSION_ALARM_BASE);
3070 static SENSOR_DEVICE_ATTR(intrusion1_beep, S_IWUSR | S_IRUGO, show_beep,
3071                           store_beep, INTRUSION_ALARM_BASE + 1);
3072 static SENSOR_DEVICE_ATTR(beep_enable, S_IWUSR | S_IRUGO, show_beep,
3073                           store_beep, BEEP_ENABLE_BASE);
3074
3075 static umode_t nct6775_other_is_visible(struct kobject *kobj,
3076                                         struct attribute *attr, int index)
3077 {
3078         struct device *dev = container_of(kobj, struct device, kobj);
3079         struct nct6775_data *data = dev_get_drvdata(dev);
3080
3081         if (index == 1 && !data->have_vid)
3082                 return 0;
3083
3084         if (index == 2 || index == 3) {
3085                 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + index - 2] < 0)
3086                         return 0;
3087         }
3088
3089         if (index == 4 || index == 5) {
3090                 if (data->BEEP_BITS[INTRUSION_ALARM_BASE + index - 4] < 0)
3091                         return 0;
3092         }
3093
3094         return attr->mode;
3095 }
3096
3097 /*
3098  * nct6775_other_is_visible uses the index into the following array
3099  * to determine if attributes should be created or not.
3100  * Any change in order or content must be matched.
3101  */
3102 static struct attribute *nct6775_attributes_other[] = {
3103         &dev_attr_name.attr,
3104         &dev_attr_cpu0_vid.attr,                                /* 1 */
3105         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,        /* 2 */
3106         &sensor_dev_attr_intrusion1_alarm.dev_attr.attr,        /* 3 */
3107         &sensor_dev_attr_intrusion0_beep.dev_attr.attr,         /* 4 */
3108         &sensor_dev_attr_intrusion1_beep.dev_attr.attr,         /* 5 */
3109         &sensor_dev_attr_beep_enable.dev_attr.attr,             /* 6 */
3110
3111         NULL
3112 };
3113
3114 static const struct attribute_group nct6775_group_other = {
3115         .attrs = nct6775_attributes_other,
3116         .is_visible = nct6775_other_is_visible,
3117 };
3118
3119 /*
3120  * Driver and device management
3121  */
3122
3123 static void nct6775_device_remove_files(struct device *dev)
3124 {
3125         struct nct6775_data *data = dev_get_drvdata(dev);
3126
3127         if (data->group_pwm)
3128                 sysfs_remove_group(&dev->kobj, data->group_pwm);
3129         if (data->group_in)
3130                 sysfs_remove_group(&dev->kobj, data->group_in);
3131         if (data->group_fan)
3132                 sysfs_remove_group(&dev->kobj, data->group_fan);
3133         if (data->group_temp)
3134                 sysfs_remove_group(&dev->kobj, data->group_temp);
3135
3136         sysfs_remove_group(&dev->kobj, &nct6775_group_other);
3137 }
3138
3139 /* Get the monitoring functions started */
3140 static inline void nct6775_init_device(struct nct6775_data *data)
3141 {
3142         int i;
3143         u8 tmp, diode;
3144
3145         /* Start monitoring if needed */
3146         if (data->REG_CONFIG) {
3147                 tmp = nct6775_read_value(data, data->REG_CONFIG);
3148                 if (!(tmp & 0x01))
3149                         nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
3150         }
3151
3152         /* Enable temperature sensors if needed */
3153         for (i = 0; i < NUM_TEMP; i++) {
3154                 if (!(data->have_temp & (1 << i)))
3155                         continue;
3156                 if (!data->reg_temp_config[i])
3157                         continue;
3158                 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
3159                 if (tmp & 0x01)
3160                         nct6775_write_value(data, data->reg_temp_config[i],
3161                                             tmp & 0xfe);
3162         }
3163
3164         /* Enable VBAT monitoring if needed */
3165         tmp = nct6775_read_value(data, data->REG_VBAT);
3166         if (!(tmp & 0x01))
3167                 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
3168
3169         diode = nct6775_read_value(data, data->REG_DIODE);
3170
3171         for (i = 0; i < data->temp_fixed_num; i++) {
3172                 if (!(data->have_temp_fixed & (1 << i)))
3173                         continue;
3174                 if ((tmp & (data->DIODE_MASK << i)))    /* diode */
3175                         data->temp_type[i]
3176                           = 3 - ((diode >> i) & data->DIODE_MASK);
3177                 else                            /* thermistor */
3178                         data->temp_type[i] = 4;
3179         }
3180 }
3181
3182 static void
3183 nct6775_check_fan_inputs(struct nct6775_data *data)
3184 {
3185         bool fan3pin, fan4pin, fan4min, fan5pin, fan6pin;
3186         bool pwm3pin, pwm4pin, pwm5pin, pwm6pin;
3187         int sioreg = data->sioreg;
3188         int regval;
3189
3190         /* fan4 and fan5 share some pins with the GPIO and serial flash */
3191         if (data->kind == nct6775) {
3192                 regval = superio_inb(sioreg, 0x2c);
3193
3194                 fan3pin = regval & (1 << 6);
3195                 pwm3pin = regval & (1 << 7);
3196
3197                 /* On NCT6775, fan4 shares pins with the fdc interface */
3198                 fan4pin = !(superio_inb(sioreg, 0x2A) & 0x80);
3199                 fan4min = false;
3200                 fan5pin = false;
3201                 fan6pin = false;
3202                 pwm4pin = false;
3203                 pwm5pin = false;
3204                 pwm6pin = false;
3205         } else if (data->kind == nct6776) {
3206                 bool gpok = superio_inb(sioreg, 0x27) & 0x80;
3207
3208                 superio_select(sioreg, NCT6775_LD_HWM);
3209                 regval = superio_inb(sioreg, SIO_REG_ENABLE);
3210
3211                 if (regval & 0x80)
3212                         fan3pin = gpok;
3213                 else
3214                         fan3pin = !(superio_inb(sioreg, 0x24) & 0x40);
3215
3216                 if (regval & 0x40)
3217                         fan4pin = gpok;
3218                 else
3219                         fan4pin = superio_inb(sioreg, 0x1C) & 0x01;
3220
3221                 if (regval & 0x20)
3222                         fan5pin = gpok;
3223                 else
3224                         fan5pin = superio_inb(sioreg, 0x1C) & 0x02;
3225
3226                 fan4min = fan4pin;
3227                 fan6pin = false;
3228                 pwm3pin = fan3pin;
3229                 pwm4pin = false;
3230                 pwm5pin = false;
3231                 pwm6pin = false;
3232         } else if (data->kind == nct6106) {
3233                 regval = superio_inb(sioreg, 0x24);
3234                 fan3pin = !(regval & 0x80);
3235                 pwm3pin = regval & 0x08;
3236
3237                 fan4pin = false;
3238                 fan4min = false;
3239                 fan5pin = false;
3240                 fan6pin = false;
3241                 pwm4pin = false;
3242                 pwm5pin = false;
3243                 pwm6pin = false;
3244         } else {        /* NCT6779D or NCT6791D */
3245                 regval = superio_inb(sioreg, 0x1c);
3246
3247                 fan3pin = !(regval & (1 << 5));
3248                 fan4pin = !(regval & (1 << 6));
3249                 fan5pin = !(regval & (1 << 7));
3250
3251                 pwm3pin = !(regval & (1 << 0));
3252                 pwm4pin = !(regval & (1 << 1));
3253                 pwm5pin = !(regval & (1 << 2));
3254
3255                 fan4min = fan4pin;
3256
3257                 if (data->kind == nct6791) {
3258                         regval = superio_inb(sioreg, 0x2d);
3259                         fan6pin = (regval & (1 << 1));
3260                         pwm6pin = (regval & (1 << 0));
3261                 } else {        /* NCT6779D */
3262                         fan6pin = false;
3263                         pwm6pin = false;
3264                 }
3265         }
3266
3267         /* fan 1 and 2 (0x03) are always present */
3268         data->has_fan = 0x03 | (fan3pin << 2) | (fan4pin << 3) |
3269                 (fan5pin << 4) | (fan6pin << 5);
3270         data->has_fan_min = 0x03 | (fan3pin << 2) | (fan4min << 3) |
3271                 (fan5pin << 4);
3272         data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) |
3273                 (pwm5pin << 4) | (pwm6pin << 5);
3274 }
3275
3276 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
3277                              int *available, int *mask)
3278 {
3279         int i;
3280         u8 src;
3281
3282         for (i = 0; i < data->pwm_num && *available; i++) {
3283                 int index;
3284
3285                 if (!regp[i])
3286                         continue;
3287                 src = nct6775_read_value(data, regp[i]);
3288                 src &= 0x1f;
3289                 if (!src || (*mask & (1 << src)))
3290                         continue;
3291                 if (src >= data->temp_label_num ||
3292                     !strlen(data->temp_label[src]))
3293                         continue;
3294
3295                 index = __ffs(*available);
3296                 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3297                 *available &= ~(1 << index);
3298                 *mask |= 1 << src;
3299         }
3300 }
3301
3302 static int nct6775_probe(struct platform_device *pdev)
3303 {
3304         struct device *dev = &pdev->dev;
3305         struct nct6775_sio_data *sio_data = dev->platform_data;
3306         struct nct6775_data *data;
3307         struct resource *res;
3308         int i, s, err = 0;
3309         int src, mask, available;
3310         const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3311         const u16 *reg_temp_mon, *reg_temp_alternate, *reg_temp_crit;
3312         const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL;
3313         int num_reg_temp, num_reg_temp_mon;
3314         u8 cr2a;
3315         struct attribute_group *group;
3316
3317         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3318         if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3319                                  DRVNAME))
3320                 return -EBUSY;
3321
3322         data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3323                             GFP_KERNEL);
3324         if (!data)
3325                 return -ENOMEM;
3326
3327         data->kind = sio_data->kind;
3328         data->sioreg = sio_data->sioreg;
3329         data->addr = res->start;
3330         mutex_init(&data->update_lock);
3331         data->name = nct6775_device_names[data->kind];
3332         data->bank = 0xff;              /* Force initial bank selection */
3333         platform_set_drvdata(pdev, data);
3334
3335         switch (data->kind) {
3336         case nct6106:
3337                 data->in_num = 9;
3338                 data->pwm_num = 3;
3339                 data->auto_pwm_num = 4;
3340                 data->temp_fixed_num = 3;
3341                 data->num_temp_alarms = 6;
3342                 data->num_temp_beeps = 6;
3343
3344                 data->fan_from_reg = fan_from_reg13;
3345                 data->fan_from_reg_min = fan_from_reg13;
3346
3347                 data->temp_label = nct6776_temp_label;
3348                 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3349
3350                 data->REG_VBAT = NCT6106_REG_VBAT;
3351                 data->REG_DIODE = NCT6106_REG_DIODE;
3352                 data->DIODE_MASK = NCT6106_DIODE_MASK;
3353                 data->REG_VIN = NCT6106_REG_IN;
3354                 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3355                 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3356                 data->REG_TARGET = NCT6106_REG_TARGET;
3357                 data->REG_FAN = NCT6106_REG_FAN;
3358                 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
3359                 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
3360                 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
3361                 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
3362                 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
3363                 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
3364                 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
3365                 data->REG_PWM[0] = NCT6106_REG_PWM;
3366                 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
3367                 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
3368                 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3369                 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3370                 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3371                 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3372                 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3373                 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
3374                 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
3375                 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
3376                 data->REG_CRITICAL_TEMP_TOLERANCE
3377                   = NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
3378                 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
3379                 data->CRITICAL_PWM_ENABLE_MASK
3380                   = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3381                 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
3382                 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3383                 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3384                 data->REG_TEMP_SEL = NCT6106_REG_TEMP_SEL;
3385                 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3386                 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3387                 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3388                 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3389                 data->REG_ALARM = NCT6106_REG_ALARM;
3390                 data->ALARM_BITS = NCT6106_ALARM_BITS;
3391                 data->REG_BEEP = NCT6106_REG_BEEP;
3392                 data->BEEP_BITS = NCT6106_BEEP_BITS;
3393
3394                 reg_temp = NCT6106_REG_TEMP;
3395                 reg_temp_mon = NCT6106_REG_TEMP_MON;
3396                 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3397                 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON);
3398                 reg_temp_over = NCT6106_REG_TEMP_OVER;
3399                 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3400                 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3401                 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3402                 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3403                 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3404                 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3405
3406                 break;
3407         case nct6775:
3408                 data->in_num = 9;
3409                 data->pwm_num = 3;
3410                 data->auto_pwm_num = 6;
3411                 data->has_fan_div = true;
3412                 data->temp_fixed_num = 3;
3413                 data->num_temp_alarms = 3;
3414                 data->num_temp_beeps = 3;
3415
3416                 data->ALARM_BITS = NCT6775_ALARM_BITS;
3417                 data->BEEP_BITS = NCT6775_BEEP_BITS;
3418
3419                 data->fan_from_reg = fan_from_reg16;
3420                 data->fan_from_reg_min = fan_from_reg8;
3421                 data->target_temp_mask = 0x7f;
3422                 data->tolerance_mask = 0x0f;
3423                 data->speed_tolerance_limit = 15;
3424
3425                 data->temp_label = nct6775_temp_label;
3426                 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
3427
3428                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3429                 data->REG_VBAT = NCT6775_REG_VBAT;
3430                 data->REG_DIODE = NCT6775_REG_DIODE;
3431                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3432                 data->REG_VIN = NCT6775_REG_IN;
3433                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3434                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3435                 data->REG_TARGET = NCT6775_REG_TARGET;
3436                 data->REG_FAN = NCT6775_REG_FAN;
3437                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3438                 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3439                 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3440                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3441                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3442                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3443                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3444                 data->REG_PWM[0] = NCT6775_REG_PWM;
3445                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3446                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3447                 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3448                 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3449                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3450                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3451                 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3452                 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3453                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3454                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3455                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3456                 data->REG_CRITICAL_TEMP_TOLERANCE
3457                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3458                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3459                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3460                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3461                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3462                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3463                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3464                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3465                 data->REG_ALARM = NCT6775_REG_ALARM;
3466                 data->REG_BEEP = NCT6775_REG_BEEP;
3467
3468                 reg_temp = NCT6775_REG_TEMP;
3469                 reg_temp_mon = NCT6775_REG_TEMP_MON;
3470                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3471                 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3472                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3473                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3474                 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3475                 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3476                 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3477
3478                 break;
3479         case nct6776:
3480                 data->in_num = 9;
3481                 data->pwm_num = 3;
3482                 data->auto_pwm_num = 4;
3483                 data->has_fan_div = false;
3484                 data->temp_fixed_num = 3;
3485                 data->num_temp_alarms = 3;
3486                 data->num_temp_beeps = 6;
3487
3488                 data->ALARM_BITS = NCT6776_ALARM_BITS;
3489                 data->BEEP_BITS = NCT6776_BEEP_BITS;
3490
3491                 data->fan_from_reg = fan_from_reg13;
3492                 data->fan_from_reg_min = fan_from_reg13;
3493                 data->target_temp_mask = 0xff;
3494                 data->tolerance_mask = 0x07;
3495                 data->speed_tolerance_limit = 63;
3496
3497                 data->temp_label = nct6776_temp_label;
3498                 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3499
3500                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3501                 data->REG_VBAT = NCT6775_REG_VBAT;
3502                 data->REG_DIODE = NCT6775_REG_DIODE;
3503                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3504                 data->REG_VIN = NCT6775_REG_IN;
3505                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3506                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3507                 data->REG_TARGET = NCT6775_REG_TARGET;
3508                 data->REG_FAN = NCT6775_REG_FAN;
3509                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3510                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3511                 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3512                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3513                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3514                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3515                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3516                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3517                 data->REG_PWM[0] = NCT6775_REG_PWM;
3518                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3519                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3520                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3521                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3522                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3523                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3524                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3525                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3526                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3527                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3528                 data->REG_CRITICAL_TEMP_TOLERANCE
3529                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3530                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3531                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3532                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3533                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3534                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3535                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3536                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3537                 data->REG_ALARM = NCT6775_REG_ALARM;
3538                 data->REG_BEEP = NCT6776_REG_BEEP;
3539
3540                 reg_temp = NCT6775_REG_TEMP;
3541                 reg_temp_mon = NCT6775_REG_TEMP_MON;
3542                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3543                 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3544                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3545                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3546                 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3547                 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3548                 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3549
3550                 break;
3551         case nct6779:
3552                 data->in_num = 15;
3553                 data->pwm_num = 5;
3554                 data->auto_pwm_num = 4;
3555                 data->has_fan_div = false;
3556                 data->temp_fixed_num = 6;
3557                 data->num_temp_alarms = 2;
3558                 data->num_temp_beeps = 2;
3559
3560                 data->ALARM_BITS = NCT6779_ALARM_BITS;
3561                 data->BEEP_BITS = NCT6779_BEEP_BITS;
3562
3563                 data->fan_from_reg = fan_from_reg13;
3564                 data->fan_from_reg_min = fan_from_reg13;
3565                 data->target_temp_mask = 0xff;
3566                 data->tolerance_mask = 0x07;
3567                 data->speed_tolerance_limit = 63;
3568
3569                 data->temp_label = nct6779_temp_label;
3570                 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3571
3572                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3573                 data->REG_VBAT = NCT6775_REG_VBAT;
3574                 data->REG_DIODE = NCT6775_REG_DIODE;
3575                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3576                 data->REG_VIN = NCT6779_REG_IN;
3577                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3578                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3579                 data->REG_TARGET = NCT6775_REG_TARGET;
3580                 data->REG_FAN = NCT6779_REG_FAN;
3581                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3582                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3583                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3584                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3585                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3586                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3587                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3588                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3589                 data->REG_PWM[0] = NCT6775_REG_PWM;
3590                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3591                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3592                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3593                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3594                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3595                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3596                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3597                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3598                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3599                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3600                 data->REG_CRITICAL_TEMP_TOLERANCE
3601                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3602                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3603                 data->CRITICAL_PWM_ENABLE_MASK
3604                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3605                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3606                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3607                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3608                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3609                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3610                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3611                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3612                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3613                 data->REG_ALARM = NCT6779_REG_ALARM;
3614                 data->REG_BEEP = NCT6776_REG_BEEP;
3615
3616                 reg_temp = NCT6779_REG_TEMP;
3617                 reg_temp_mon = NCT6779_REG_TEMP_MON;
3618                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3619                 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3620                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3621                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3622                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3623                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3624                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3625
3626                 break;
3627         case nct6791:
3628                 data->in_num = 15;
3629                 data->pwm_num = 6;
3630                 data->auto_pwm_num = 4;
3631                 data->has_fan_div = false;
3632                 data->temp_fixed_num = 6;
3633                 data->num_temp_alarms = 2;
3634                 data->num_temp_beeps = 2;
3635
3636                 data->ALARM_BITS = NCT6791_ALARM_BITS;
3637                 data->BEEP_BITS = NCT6779_BEEP_BITS;
3638
3639                 data->fan_from_reg = fan_from_reg13;
3640                 data->fan_from_reg_min = fan_from_reg13;
3641                 data->target_temp_mask = 0xff;
3642                 data->tolerance_mask = 0x07;
3643                 data->speed_tolerance_limit = 63;
3644
3645                 data->temp_label = nct6779_temp_label;
3646                 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3647
3648                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3649                 data->REG_VBAT = NCT6775_REG_VBAT;
3650                 data->REG_DIODE = NCT6775_REG_DIODE;
3651                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3652                 data->REG_VIN = NCT6779_REG_IN;
3653                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3654                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3655                 data->REG_TARGET = NCT6775_REG_TARGET;
3656                 data->REG_FAN = NCT6779_REG_FAN;
3657                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3658                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3659                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3660                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3661                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3662                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3663                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3664                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3665                 data->REG_PWM[0] = NCT6775_REG_PWM;
3666                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3667                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3668                 data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP;
3669                 data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE;
3670                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3671                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3672                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3673                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3674                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3675                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3676                 data->REG_CRITICAL_TEMP_TOLERANCE
3677                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3678                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3679                 data->CRITICAL_PWM_ENABLE_MASK
3680                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3681                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3682                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3683                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3684                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3685                 data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL;
3686                 data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP;
3687                 data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL;
3688                 data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE;
3689                 data->REG_ALARM = NCT6791_REG_ALARM;
3690                 data->REG_BEEP = NCT6776_REG_BEEP;
3691
3692                 reg_temp = NCT6779_REG_TEMP;
3693                 reg_temp_mon = NCT6779_REG_TEMP_MON;
3694                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3695                 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3696                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3697                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3698                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3699                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3700                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3701
3702                 break;
3703         default:
3704                 return -ENODEV;
3705         }
3706         data->have_in = (1 << data->in_num) - 1;
3707         data->have_temp = 0;
3708
3709         /*
3710          * On some boards, not all available temperature sources are monitored,
3711          * even though some of the monitoring registers are unused.
3712          * Get list of unused monitoring registers, then detect if any fan
3713          * controls are configured to use unmonitored temperature sources.
3714          * If so, assign the unmonitored temperature sources to available
3715          * monitoring registers.
3716          */
3717         mask = 0;
3718         available = 0;
3719         for (i = 0; i < num_reg_temp; i++) {
3720                 if (reg_temp[i] == 0)
3721                         continue;
3722
3723                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3724                 if (!src || (mask & (1 << src)))
3725                         available |= 1 << i;
3726
3727                 mask |= 1 << src;
3728         }
3729
3730         /*
3731          * Now find unmonitored temperature registers and enable monitoring
3732          * if additional monitoring registers are available.
3733          */
3734         add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
3735         add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
3736
3737         mask = 0;
3738         s = NUM_TEMP_FIXED;     /* First dynamic temperature attribute */
3739         for (i = 0; i < num_reg_temp; i++) {
3740                 if (reg_temp[i] == 0)
3741                         continue;
3742
3743                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3744                 if (!src || (mask & (1 << src)))
3745                         continue;
3746
3747                 if (src >= data->temp_label_num ||
3748                     !strlen(data->temp_label[src])) {
3749                         dev_info(dev,
3750                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3751                                  src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
3752                         continue;
3753                 }
3754
3755                 mask |= 1 << src;
3756
3757                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3758                 if (src <= data->temp_fixed_num) {
3759                         data->have_temp |= 1 << (src - 1);
3760                         data->have_temp_fixed |= 1 << (src - 1);
3761                         data->reg_temp[0][src - 1] = reg_temp[i];
3762                         data->reg_temp[1][src - 1] = reg_temp_over[i];
3763                         data->reg_temp[2][src - 1] = reg_temp_hyst[i];
3764                         if (reg_temp_crit_h && reg_temp_crit_h[i])
3765                                 data->reg_temp[3][src - 1] = reg_temp_crit_h[i];
3766                         else if (reg_temp_crit[src - 1])
3767                                 data->reg_temp[3][src - 1]
3768                                   = reg_temp_crit[src - 1];
3769                         if (reg_temp_crit_l && reg_temp_crit_l[i])
3770                                 data->reg_temp[4][src - 1] = reg_temp_crit_l[i];
3771                         data->reg_temp_config[src - 1] = reg_temp_config[i];
3772                         data->temp_src[src - 1] = src;
3773                         continue;
3774                 }
3775
3776                 if (s >= NUM_TEMP)
3777                         continue;
3778
3779                 /* Use dynamic index for other sources */
3780                 data->have_temp |= 1 << s;
3781                 data->reg_temp[0][s] = reg_temp[i];
3782                 data->reg_temp[1][s] = reg_temp_over[i];
3783                 data->reg_temp[2][s] = reg_temp_hyst[i];
3784                 data->reg_temp_config[s] = reg_temp_config[i];
3785                 if (reg_temp_crit_h && reg_temp_crit_h[i])
3786                         data->reg_temp[3][s] = reg_temp_crit_h[i];
3787                 else if (reg_temp_crit[src - 1])
3788                         data->reg_temp[3][s] = reg_temp_crit[src - 1];
3789                 if (reg_temp_crit_l && reg_temp_crit_l[i])
3790                         data->reg_temp[4][s] = reg_temp_crit_l[i];
3791
3792                 data->temp_src[s] = src;
3793                 s++;
3794         }
3795
3796         /*
3797          * Repeat with temperatures used for fan control.
3798          * This set of registers does not support limits.
3799          */
3800         for (i = 0; i < num_reg_temp_mon; i++) {
3801                 if (reg_temp_mon[i] == 0)
3802                         continue;
3803
3804                 src = nct6775_read_value(data, data->REG_TEMP_SEL[i]) & 0x1f;
3805                 if (!src || (mask & (1 << src)))
3806                         continue;
3807
3808                 if (src >= data->temp_label_num ||
3809                     !strlen(data->temp_label[src])) {
3810                         dev_info(dev,
3811                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3812                                  src, i, data->REG_TEMP_SEL[i], reg_temp_mon[i]);
3813                         continue;
3814                 }
3815
3816                 mask |= 1 << src;
3817
3818                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3819                 if (src <= data->temp_fixed_num) {
3820                         if (data->have_temp & (1 << (src - 1)))
3821                                 continue;
3822                         data->have_temp |= 1 << (src - 1);
3823                         data->have_temp_fixed |= 1 << (src - 1);
3824                         data->reg_temp[0][src - 1] = reg_temp_mon[i];
3825                         data->temp_src[src - 1] = src;
3826                         continue;
3827                 }
3828
3829                 if (s >= NUM_TEMP)
3830                         continue;
3831
3832                 /* Use dynamic index for other sources */
3833                 data->have_temp |= 1 << s;
3834                 data->reg_temp[0][s] = reg_temp_mon[i];
3835                 data->temp_src[s] = src;
3836                 s++;
3837         }
3838
3839 #ifdef USE_ALTERNATE
3840         /*
3841          * Go through the list of alternate temp registers and enable
3842          * if possible.
3843          * The temperature is already monitored if the respective bit in <mask>
3844          * is set.
3845          */
3846         for (i = 0; i < data->temp_label_num - 1; i++) {
3847                 if (!reg_temp_alternate[i])
3848                         continue;
3849                 if (mask & (1 << (i + 1)))
3850                         continue;
3851                 if (i < data->temp_fixed_num) {
3852                         if (data->have_temp & (1 << i))
3853                                 continue;
3854                         data->have_temp |= 1 << i;
3855                         data->have_temp_fixed |= 1 << i;
3856                         data->reg_temp[0][i] = reg_temp_alternate[i];
3857                         if (i < num_reg_temp) {
3858                                 data->reg_temp[1][i] = reg_temp_over[i];
3859                                 data->reg_temp[2][i] = reg_temp_hyst[i];
3860                         }
3861                         data->temp_src[i] = i + 1;
3862                         continue;
3863                 }
3864
3865                 if (s >= NUM_TEMP)      /* Abort if no more space */
3866                         break;
3867
3868                 data->have_temp |= 1 << s;
3869                 data->reg_temp[0][s] = reg_temp_alternate[i];
3870                 data->temp_src[s] = i + 1;
3871                 s++;
3872         }
3873 #endif /* USE_ALTERNATE */
3874
3875         /* Initialize the chip */
3876         nct6775_init_device(data);
3877
3878         err = superio_enter(sio_data->sioreg);
3879         if (err)
3880                 return err;
3881
3882         cr2a = superio_inb(sio_data->sioreg, 0x2a);
3883         switch (data->kind) {
3884         case nct6775:
3885                 data->have_vid = (cr2a & 0x40);
3886                 break;
3887         case nct6776:
3888                 data->have_vid = (cr2a & 0x60) == 0x40;
3889                 break;
3890         case nct6106:
3891         case nct6779:
3892         case nct6791:
3893                 break;
3894         }
3895
3896         /*
3897          * Read VID value
3898          * We can get the VID input values directly at logical device D 0xe3.
3899          */
3900         if (data->have_vid) {
3901                 superio_select(sio_data->sioreg, NCT6775_LD_VID);
3902                 data->vid = superio_inb(sio_data->sioreg, 0xe3);
3903                 data->vrm = vid_which_vrm();
3904         }
3905
3906         if (fan_debounce) {
3907                 u8 tmp;
3908
3909                 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3910                 tmp = superio_inb(sio_data->sioreg,
3911                                   NCT6775_REG_CR_FAN_DEBOUNCE);
3912                 switch (data->kind) {
3913                 case nct6106:
3914                         tmp |= 0xe0;
3915                         break;
3916                 case nct6775:
3917                         tmp |= 0x1e;
3918                         break;
3919                 case nct6776:
3920                 case nct6779:
3921                         tmp |= 0x3e;
3922                         break;
3923                 case nct6791:
3924                         tmp |= 0x7e;
3925                         break;
3926                 }
3927                 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
3928                              tmp);
3929                 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
3930                          data->name);
3931         }
3932
3933         nct6775_check_fan_inputs(data);
3934
3935         superio_exit(sio_data->sioreg);
3936
3937         /* Read fan clock dividers immediately */
3938         nct6775_init_fan_common(dev, data);
3939
3940         /* Register sysfs hooks */
3941         group = nct6775_create_attr_group(dev, &nct6775_pwm_template_group,
3942                                           data->pwm_num);
3943         if (IS_ERR(group)) {
3944                 err = PTR_ERR(group);
3945                 goto exit_remove;
3946         }
3947         data->group_pwm = group;
3948
3949         group = nct6775_create_attr_group(dev, &nct6775_in_template_group,
3950                                           fls(data->have_in));
3951         if (IS_ERR(group)) {
3952                 err = PTR_ERR(group);
3953                 goto exit_remove;
3954         }
3955         data->group_in = group;
3956
3957         group = nct6775_create_attr_group(dev, &nct6775_fan_template_group,
3958                                           fls(data->has_fan));
3959         if (IS_ERR(group)) {
3960                 err = PTR_ERR(group);
3961                 goto exit_remove;
3962         }
3963         data->group_fan = group;
3964
3965         group = nct6775_create_attr_group(dev, &nct6775_temp_template_group,
3966                                           fls(data->have_temp));
3967         if (IS_ERR(group)) {
3968                 err = PTR_ERR(group);
3969                 goto exit_remove;
3970         }
3971         data->group_temp = group;
3972
3973         err = sysfs_create_group(&dev->kobj, &nct6775_group_other);
3974         if (err)
3975                 goto exit_remove;
3976
3977         data->hwmon_dev = hwmon_device_register(dev);
3978         if (IS_ERR(data->hwmon_dev)) {
3979                 err = PTR_ERR(data->hwmon_dev);
3980                 goto exit_remove;
3981         }
3982
3983         return 0;
3984
3985 exit_remove:
3986         nct6775_device_remove_files(dev);
3987         return err;
3988 }
3989
3990 static int nct6775_remove(struct platform_device *pdev)
3991 {
3992         struct nct6775_data *data = platform_get_drvdata(pdev);
3993
3994         hwmon_device_unregister(data->hwmon_dev);
3995         nct6775_device_remove_files(&pdev->dev);
3996
3997         return 0;
3998 }
3999
4000 #ifdef CONFIG_PM
4001 static int nct6775_suspend(struct device *dev)
4002 {
4003         struct nct6775_data *data = nct6775_update_device(dev);
4004
4005         mutex_lock(&data->update_lock);
4006         data->vbat = nct6775_read_value(data, data->REG_VBAT);
4007         if (data->kind == nct6775) {
4008                 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
4009                 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
4010         }
4011         mutex_unlock(&data->update_lock);
4012
4013         return 0;
4014 }
4015
4016 static int nct6775_resume(struct device *dev)
4017 {
4018         struct nct6775_data *data = dev_get_drvdata(dev);
4019         int i, j, err = 0;
4020
4021         mutex_lock(&data->update_lock);
4022         data->bank = 0xff;              /* Force initial bank selection */
4023
4024         if (data->kind == nct6791) {
4025                 int val;
4026
4027                 err = superio_enter(data->sioreg);
4028                 if (err)
4029                         goto abort;
4030
4031                 val = superio_inb(data->sioreg,
4032                                   NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE);
4033                 if (val & 0x10) {
4034                         pr_info("Re-enabling hardware monitor logical device mappings.\n");
4035                         superio_outb(data->sioreg,
4036                                      NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE,
4037                                      val & ~0x10);
4038                 }
4039                 superio_exit(data->sioreg);
4040         }
4041
4042         /* Restore limits */
4043         for (i = 0; i < data->in_num; i++) {
4044                 if (!(data->have_in & (1 << i)))
4045                         continue;
4046
4047                 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
4048                                     data->in[i][1]);
4049                 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
4050                                     data->in[i][2]);
4051         }
4052
4053         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
4054                 if (!(data->has_fan_min & (1 << i)))
4055                         continue;
4056
4057                 nct6775_write_value(data, data->REG_FAN_MIN[i],
4058                                     data->fan_min[i]);
4059         }
4060
4061         for (i = 0; i < NUM_TEMP; i++) {
4062                 if (!(data->have_temp & (1 << i)))
4063                         continue;
4064
4065                 for (j = 1; j < ARRAY_SIZE(data->reg_temp); j++)
4066                         if (data->reg_temp[j][i])
4067                                 nct6775_write_temp(data, data->reg_temp[j][i],
4068                                                    data->temp[j][i]);
4069         }
4070
4071         /* Restore other settings */
4072         nct6775_write_value(data, data->REG_VBAT, data->vbat);
4073         if (data->kind == nct6775) {
4074                 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
4075                 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
4076         }
4077
4078 abort:
4079         /* Force re-reading all values */
4080         data->valid = false;
4081         mutex_unlock(&data->update_lock);
4082
4083         return 0;
4084 }
4085
4086 static const struct dev_pm_ops nct6775_dev_pm_ops = {
4087         .suspend = nct6775_suspend,
4088         .resume = nct6775_resume,
4089 };
4090
4091 #define NCT6775_DEV_PM_OPS      (&nct6775_dev_pm_ops)
4092 #else
4093 #define NCT6775_DEV_PM_OPS      NULL
4094 #endif /* CONFIG_PM */
4095
4096 static struct platform_driver nct6775_driver = {
4097         .driver = {
4098                 .owner  = THIS_MODULE,
4099                 .name   = DRVNAME,
4100                 .pm     = NCT6775_DEV_PM_OPS,
4101         },
4102         .probe          = nct6775_probe,
4103         .remove         = nct6775_remove,
4104 };
4105
4106 static const char * const nct6775_sio_names[] __initconst = {
4107         "NCT6106D",
4108         "NCT6775F",
4109         "NCT6776D/F",
4110         "NCT6779D",
4111         "NCT6791D",
4112 };
4113
4114 /* nct6775_find() looks for a '627 in the Super-I/O config space */
4115 static int __init nct6775_find(int sioaddr, struct nct6775_sio_data *sio_data)
4116 {
4117         u16 val;
4118         int err;
4119         int addr;
4120
4121         err = superio_enter(sioaddr);
4122         if (err)
4123                 return err;
4124
4125         if (force_id)
4126                 val = force_id;
4127         else
4128                 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
4129                     | superio_inb(sioaddr, SIO_REG_DEVID + 1);
4130         switch (val & SIO_ID_MASK) {
4131         case SIO_NCT6106_ID:
4132                 sio_data->kind = nct6106;
4133                 break;
4134         case SIO_NCT6775_ID:
4135                 sio_data->kind = nct6775;
4136                 break;
4137         case SIO_NCT6776_ID:
4138                 sio_data->kind = nct6776;
4139                 break;
4140         case SIO_NCT6779_ID:
4141                 sio_data->kind = nct6779;
4142                 break;
4143         case SIO_NCT6791_ID:
4144                 sio_data->kind = nct6791;
4145                 break;
4146         default:
4147                 if (val != 0xffff)
4148                         pr_debug("unsupported chip ID: 0x%04x\n", val);
4149                 superio_exit(sioaddr);
4150                 return -ENODEV;
4151         }
4152
4153         /* We have a known chip, find the HWM I/O address */
4154         superio_select(sioaddr, NCT6775_LD_HWM);
4155         val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
4156             | superio_inb(sioaddr, SIO_REG_ADDR + 1);
4157         addr = val & IOREGION_ALIGNMENT;
4158         if (addr == 0) {
4159                 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
4160                 superio_exit(sioaddr);
4161                 return -ENODEV;
4162         }
4163
4164         /* Activate logical device if needed */
4165         val = superio_inb(sioaddr, SIO_REG_ENABLE);
4166         if (!(val & 0x01)) {
4167                 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
4168                 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
4169         }
4170         if (sio_data->kind == nct6791) {
4171                 val = superio_inb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE);
4172                 if (val & 0x10) {
4173                         pr_info("Enabling hardware monitor logical device mappings.\n");
4174                         superio_outb(sioaddr,
4175                                      NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE,
4176                                      val & ~0x10);
4177                 }
4178         }
4179
4180         superio_exit(sioaddr);
4181         pr_info("Found %s or compatible chip at %#x:%#x\n",
4182                 nct6775_sio_names[sio_data->kind], sioaddr, addr);
4183         sio_data->sioreg = sioaddr;
4184
4185         return addr;
4186 }
4187
4188 /*
4189  * when Super-I/O functions move to a separate file, the Super-I/O
4190  * bus will manage the lifetime of the device and this module will only keep
4191  * track of the nct6775 driver. But since we platform_device_alloc(), we
4192  * must keep track of the device
4193  */
4194 static struct platform_device *pdev[2];
4195
4196 static int __init sensors_nct6775_init(void)
4197 {
4198         int i, err;
4199         bool found = false;
4200         int address;
4201         struct resource res;
4202         struct nct6775_sio_data sio_data;
4203         int sioaddr[2] = { 0x2e, 0x4e };
4204
4205         err = platform_driver_register(&nct6775_driver);
4206         if (err)
4207                 return err;
4208
4209         /*
4210          * initialize sio_data->kind and sio_data->sioreg.
4211          *
4212          * when Super-I/O functions move to a separate file, the Super-I/O
4213          * driver will probe 0x2e and 0x4e and auto-detect the presence of a
4214          * nct6775 hardware monitor, and call probe()
4215          */
4216         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4217                 address = nct6775_find(sioaddr[i], &sio_data);
4218                 if (address <= 0)
4219                         continue;
4220
4221                 found = true;
4222
4223                 pdev[i] = platform_device_alloc(DRVNAME, address);
4224                 if (!pdev[i]) {
4225                         err = -ENOMEM;
4226                         goto exit_device_put;
4227                 }
4228
4229                 err = platform_device_add_data(pdev[i], &sio_data,
4230                                                sizeof(struct nct6775_sio_data));
4231                 if (err)
4232                         goto exit_device_put;
4233
4234                 memset(&res, 0, sizeof(res));
4235                 res.name = DRVNAME;
4236                 res.start = address + IOREGION_OFFSET;
4237                 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
4238                 res.flags = IORESOURCE_IO;
4239
4240                 err = acpi_check_resource_conflict(&res);
4241                 if (err) {
4242                         platform_device_put(pdev[i]);
4243                         pdev[i] = NULL;
4244                         continue;
4245                 }
4246
4247                 err = platform_device_add_resources(pdev[i], &res, 1);
4248                 if (err)
4249                         goto exit_device_put;
4250
4251                 /* platform_device_add calls probe() */
4252                 err = platform_device_add(pdev[i]);
4253                 if (err)
4254                         goto exit_device_put;
4255         }
4256         if (!found) {
4257                 err = -ENODEV;
4258                 goto exit_unregister;
4259         }
4260
4261         return 0;
4262
4263 exit_device_put:
4264         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4265                 if (pdev[i])
4266                         platform_device_put(pdev[i]);
4267         }
4268 exit_unregister:
4269         platform_driver_unregister(&nct6775_driver);
4270         return err;
4271 }
4272
4273 static void __exit sensors_nct6775_exit(void)
4274 {
4275         int i;
4276
4277         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4278                 if (pdev[i])
4279                         platform_device_unregister(pdev[i]);
4280         }
4281         platform_driver_unregister(&nct6775_driver);
4282 }
4283
4284 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4285 MODULE_DESCRIPTION("NCT6775F/NCT6776F/NCT6779D driver");
4286 MODULE_LICENSE("GPL");
4287
4288 module_init(sensors_nct6775_init);
4289 module_exit(sensors_nct6775_exit);