git.sur5r.net Git - groeck-nct6775/blob - nct6775.c

   1 /*
   2  * nct6775 - Driver for the hardware monitoring functionality of
   3  *             Nuvoton NCT677x Super-I/O chips
   4  *
   5  * Copyright (C) 2012  Guenter Roeck <linux@roeck-us.net>
   6  *
   7  * Derived from w83627ehf driver
   8  * Copyright (C) 2005-2012  Jean Delvare <jdelvare@suse.de>
   9  * Copyright (C) 2006  Yuan Mu (Winbond),
  10  *                     Rudolf Marek <r.marek@assembler.cz>
  11  *                     David Hubbard <david.c.hubbard@gmail.com>
  12  *                     Daniel J Blueman <daniel.blueman@gmail.com>
  13  * Copyright (C) 2010  Sheng-Yuan Huang (Nuvoton) (PS00)
  14  *
  15  * Shamelessly ripped from the w83627hf driver
  16  * Copyright (C) 2003  Mark Studebaker
  17  *
  18  * This program is free software; you can redistribute it and/or modify
  19  * it under the terms of the GNU General Public License as published by
  20  * the Free Software Foundation; either version 2 of the License, or
  21  * (at your option) any later version.
  22  *
  23  * This program is distributed in the hope that it will be useful,
  24  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26  * GNU General Public License for more details.
  27  *
  28  * You should have received a copy of the GNU General Public License
  29  * along with this program; if not, write to the Free Software
  30  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  31  *
  32  *
  33  * Supports the following chips:
  34  *
  35  * Chip        #vin    #fan    #pwm    #temp  chip IDs       man ID
  36  * nct6106d     9      3       3       6+3    0xc450 0xc1    0x5ca3
  37  * nct6775f     9      4       3       6+3    0xb470 0xc1    0x5ca3
  38  * nct6776f     9      5       3       6+3    0xc330 0xc1    0x5ca3
  39  * nct6779d    15      5       5       2+6    0xc560 0xc1    0x5ca3
  40  * nct6791d    15      6       6       2+6    0xc800 0xc1    0x5ca3
  41  * nct6792d    15      6       6       2+6    0xc911 0xc1    0x5ca3
  42  *
  43  * #temp lists the number of monitored temperature sources (first value) plus
  44  * the number of directly connectable temperature sensors (second value).
  45  */
  46
  47 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  48
  49 #include <linux/module.h>
  50 #include <linux/init.h>
  51 #include <linux/slab.h>
  52 #include <linux/jiffies.h>
  53 #include <linux/platform_device.h>
  54 #include <linux/hwmon.h>
  55 #include <linux/hwmon-sysfs.h>
  56 #include <linux/hwmon-vid.h>
  57 #include <linux/err.h>
  58 #include <linux/mutex.h>
  59 #include <linux/acpi.h>
  60 #include <linux/dmi.h>
  61 #include <linux/io.h>
  62 #include "lm75.h"
  63 #include "compat.h"
  64
  65 #define USE_ALTERNATE
  66
  67 enum kinds { nct6106, nct6775, nct6776, nct6779, nct6791, nct6792 };
  68
  69 /* used to set data->name = nct6775_device_names[data->sio_kind] */
  70 static const char * const nct6775_device_names[] = {
  71         "nct6106",
  72         "nct6775",
  73         "nct6776",
  74         "nct6779",
  75         "nct6791",
  76         "nct6792",
  77 };
  78
  79 static unsigned short force_id;
  80 module_param(force_id, ushort, 0);
  81 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  82
  83 static unsigned short fan_debounce;
  84 module_param(fan_debounce, ushort, 0);
  85 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
  86
  87 #define DRVNAME "nct6775"
  88
  89 /*
  90  * Super-I/O constants and functions
  91  */
  92
  93 #define NCT6775_LD_ACPI         0x0a
  94 #define NCT6775_LD_HWM          0x0b
  95 #define NCT6775_LD_VID          0x0d
  96
  97 #define SIO_REG_LDSEL           0x07    /* Logical device select */
  98 #define SIO_REG_DEVID           0x20    /* Device ID (2 bytes) */
  99 #define SIO_REG_ENABLE          0x30    /* Logical device enable */
 100 #define SIO_REG_ADDR            0x60    /* Logical device address (2 bytes) */
 101
 102 #define SIO_NCT6106_ID          0xc450
 103 #define SIO_NCT6775_ID          0xb470
 104 #define SIO_NCT6776_ID          0xc330
 105 #define SIO_NCT6779_ID          0xc560
 106 #define SIO_NCT6791_ID          0xc800
 107 #define SIO_NCT6792_ID          0xc910
 108 #define SIO_ID_MASK             0xFFF0
 109
 110 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
 111
 112 static inline void
 113 superio_outb(int ioreg, int reg, int val)
 114 {
 115         outb(reg, ioreg);
 116         outb(val, ioreg + 1);
 117 }
 118
 119 static inline int
 120 superio_inb(int ioreg, int reg)
 121 {
 122         outb(reg, ioreg);
 123         return inb(ioreg + 1);
 124 }
 125
 126 static inline void
 127 superio_select(int ioreg, int ld)
 128 {
 129         outb(SIO_REG_LDSEL, ioreg);
 130         outb(ld, ioreg + 1);
 131 }
 132
 133 static inline int
 134 superio_enter(int ioreg)
 135 {
 136         /*
 137          * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
 138          */
 139         if (!request_muxed_region(ioreg, 2, DRVNAME))
 140                 return -EBUSY;
 141
 142         outb(0x87, ioreg);
 143         outb(0x87, ioreg);
 144
 145         return 0;
 146 }
 147
 148 static inline void
 149 superio_exit(int ioreg)
 150 {
 151         outb(0xaa, ioreg);
 152         outb(0x02, ioreg);
 153         outb(0x02, ioreg + 1);
 154         release_region(ioreg, 2);
 155 }
 156
 157 /*
 158  * ISA constants
 159  */
 160
 161 #define IOREGION_ALIGNMENT      (~7)
 162 #define IOREGION_OFFSET         5
 163 #define IOREGION_LENGTH         2
 164 #define ADDR_REG_OFFSET         0
 165 #define DATA_REG_OFFSET         1
 166
 167 #define NCT6775_REG_BANK        0x4E
 168 #define NCT6775_REG_CONFIG      0x40
 169
 170 /*
 171  * Not currently used:
 172  * REG_MAN_ID has the value 0x5ca3 for all supported chips.
 173  * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
 174  * REG_MAN_ID is at port 0x4f
 175  * REG_CHIP_ID is at port 0x58
 176  */
 177
 178 #define NUM_TEMP        10      /* Max number of temp attribute sets w/ limits*/
 179 #define NUM_TEMP_FIXED  6       /* Max number of fixed temp attribute sets */
 180
 181 #define NUM_REG_ALARM   7       /* Max number of alarm registers */
 182 #define NUM_REG_BEEP    5       /* Max number of beep registers */
 183
 184 #define NUM_FAN         6
 185
 186 /* Common and NCT6775 specific data */
 187
 188 /* Voltage min/max registers for nr=7..14 are in bank 5 */
 189
 190 static const u16 NCT6775_REG_IN_MAX[] = {
 191         0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
 192         0x55c, 0x55e, 0x560, 0x562 };
 193 static const u16 NCT6775_REG_IN_MIN[] = {
 194         0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
 195         0x55d, 0x55f, 0x561, 0x563 };
 196 static const u16 NCT6775_REG_IN[] = {
 197         0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
 198 };
 199
 200 #define NCT6775_REG_VBAT                0x5D
 201 #define NCT6775_REG_DIODE               0x5E
 202 #define NCT6775_DIODE_MASK              0x02
 203
 204 #define NCT6775_REG_FANDIV1             0x506
 205 #define NCT6775_REG_FANDIV2             0x507
 206
 207 #define NCT6775_REG_CR_FAN_DEBOUNCE     0xf0
 208
 209 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
 210
 211 /* 0..15 voltages, 16..23 fans, 24..29 temperatures, 30..31 intrusion */
 212
 213 static const s8 NCT6775_ALARM_BITS[] = {
 214         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 215         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 216         -1,                             /* unused */
 217         6, 7, 11, -1, -1,               /* fan1..fan5 */
 218         -1, -1, -1,                     /* unused */
 219         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 220         12, -1 };                       /* intrusion0, intrusion1 */
 221
 222 #define FAN_ALARM_BASE          16
 223 #define TEMP_ALARM_BASE         24
 224 #define INTRUSION_ALARM_BASE    30
 225
 226 static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e };
 227
 228 /*
 229  * 0..14 voltages, 15 global beep enable, 16..23 fans, 24..29 temperatures,
 230  * 30..31 intrusion
 231  */
 232 static const s8 NCT6775_BEEP_BITS[] = {
 233         0, 1, 2, 3, 8, 9, 10, 16,       /* in0.. in7 */
 234         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 235         21,                             /* global beep enable */
 236         6, 7, 11, 28, -1,               /* fan1..fan5 */
 237         -1, -1, -1,                     /* unused */
 238         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 239         12, -1 };                       /* intrusion0, intrusion1 */
 240
 241 #define BEEP_ENABLE_BASE                15
 242
 243 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
 244 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
 245
 246 /* DC or PWM output fan configuration */
 247 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
 248 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
 249
 250 /* Advanced Fan control, some values are common for all fans */
 251
 252 static const u16 NCT6775_REG_TARGET[] = {
 253         0x101, 0x201, 0x301, 0x801, 0x901, 0xa01 };
 254 static const u16 NCT6775_REG_FAN_MODE[] = {
 255         0x102, 0x202, 0x302, 0x802, 0x902, 0xa02 };
 256 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
 257         0x103, 0x203, 0x303, 0x803, 0x903, 0xa03 };
 258 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
 259         0x104, 0x204, 0x304, 0x804, 0x904, 0xa04 };
 260 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
 261         0x105, 0x205, 0x305, 0x805, 0x905, 0xa05 };
 262 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = {
 263         0x106, 0x206, 0x306, 0x806, 0x906, 0xa06 };
 264 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
 265 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
 266
 267 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
 268         0x107, 0x207, 0x307, 0x807, 0x907, 0xa07 };
 269 static const u16 NCT6775_REG_PWM[] = {
 270         0x109, 0x209, 0x309, 0x809, 0x909, 0xa09 };
 271 static const u16 NCT6775_REG_PWM_READ[] = {
 272         0x01, 0x03, 0x11, 0x13, 0x15, 0xa09 };
 273
 274 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
 275 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
 276 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
 277 static const u16 NCT6775_FAN_PULSE_SHIFT[] = { 0, 0, 0, 0, 0, 0 };
 278
 279 static const u16 NCT6775_REG_TEMP[] = {
 280         0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
 281
 282 static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77 };
 283
 284 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 285         0, 0x152, 0x252, 0x628, 0x629, 0x62A };
 286 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 287         0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
 288 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 289         0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
 290
 291 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 292         0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
 293
 294 static const u16 NCT6775_REG_TEMP_SEL[] = {
 295         0x100, 0x200, 0x300, 0x800, 0x900, 0xa00 };
 296
 297 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
 298         0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 };
 299 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
 300         0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a };
 301 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
 302         0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b };
 303 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
 304         0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c };
 305 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
 306         0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d };
 307
 308 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
 309
 310 static const u16 NCT6775_REG_AUTO_TEMP[] = {
 311         0x121, 0x221, 0x321, 0x821, 0x921, 0xa21 };
 312 static const u16 NCT6775_REG_AUTO_PWM[] = {
 313         0x127, 0x227, 0x327, 0x827, 0x927, 0xa27 };
 314
 315 #define NCT6775_AUTO_TEMP(data, nr, p)  ((data)->REG_AUTO_TEMP[nr] + (p))
 316 #define NCT6775_AUTO_PWM(data, nr, p)   ((data)->REG_AUTO_PWM[nr] + (p))
 317
 318 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
 319
 320 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
 321         0x135, 0x235, 0x335, 0x835, 0x935, 0xa35 };
 322 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
 323         0x138, 0x238, 0x338, 0x838, 0x938, 0xa38 };
 324
 325 static const char *const nct6775_temp_label[] = {
 326         "",
 327         "SYSTIN",
 328         "CPUTIN",
 329         "AUXTIN",
 330         "AMD SB-TSI",
 331         "PECI Agent 0",
 332         "PECI Agent 1",
 333         "PECI Agent 2",
 334         "PECI Agent 3",
 335         "PECI Agent 4",
 336         "PECI Agent 5",
 337         "PECI Agent 6",
 338         "PECI Agent 7",
 339         "PCH_CHIP_CPU_MAX_TEMP",
 340         "PCH_CHIP_TEMP",
 341         "PCH_CPU_TEMP",
 342         "PCH_MCH_TEMP",
 343         "PCH_DIM0_TEMP",
 344         "PCH_DIM1_TEMP",
 345         "PCH_DIM2_TEMP",
 346         "PCH_DIM3_TEMP"
 347 };
 348
 349 static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
 350         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
 351
 352 static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
 353         = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
 354             0xa07 };
 355
 356 /* NCT6776 specific data */
 357
 358 static const s8 NCT6776_ALARM_BITS[] = {
 359         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 360         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 361         -1,                             /* unused */
 362         6, 7, 11, 10, 23,               /* fan1..fan5 */
 363         -1, -1, -1,                     /* unused */
 364         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 365         12, 9 };                        /* intrusion0, intrusion1 */
 366
 367 static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5 };
 368
 369 static const s8 NCT6776_BEEP_BITS[] = {
 370         0, 1, 2, 3, 4, 5, 6, 7,         /* in0.. in7 */
 371         8, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 372         24,                             /* global beep enable */
 373         25, 26, 27, 28, 29,             /* fan1..fan5 */
 374         -1, -1, -1,                     /* unused */
 375         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 376         30, 31 };                       /* intrusion0, intrusion1 */
 377
 378 static const u16 NCT6776_REG_TOLERANCE_H[] = {
 379         0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c };
 380
 381 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0 };
 382 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0 };
 383
 384 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
 385 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
 386
 387 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
 388         0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e };
 389
 390 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 391         0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
 392
 393 static const char *const nct6776_temp_label[] = {
 394         "",
 395         "SYSTIN",
 396         "CPUTIN",
 397         "AUXTIN",
 398         "SMBUSMASTER 0",
 399         "SMBUSMASTER 1",
 400         "SMBUSMASTER 2",
 401         "SMBUSMASTER 3",
 402         "SMBUSMASTER 4",
 403         "SMBUSMASTER 5",
 404         "SMBUSMASTER 6",
 405         "SMBUSMASTER 7",
 406         "PECI Agent 0",
 407         "PECI Agent 1",
 408         "PCH_CHIP_CPU_MAX_TEMP",
 409         "PCH_CHIP_TEMP",
 410         "PCH_CPU_TEMP",
 411         "PCH_MCH_TEMP",
 412         "PCH_DIM0_TEMP",
 413         "PCH_DIM1_TEMP",
 414         "PCH_DIM2_TEMP",
 415         "PCH_DIM3_TEMP",
 416         "BYTE_TEMP"
 417 };
 418
 419 static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
 420         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
 421
 422 static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
 423         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
 424
 425 /* NCT6779 specific data */
 426
 427 static const u16 NCT6779_REG_IN[] = {
 428         0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
 429         0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
 430
 431 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
 432         0x459, 0x45A, 0x45B, 0x568 };
 433
 434 static const s8 NCT6779_ALARM_BITS[] = {
 435         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 436         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 437         -1,                             /* unused */
 438         6, 7, 11, 10, 23,               /* fan1..fan5 */
 439         -1, -1, -1,                     /* unused */
 440         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 441         12, 9 };                        /* intrusion0, intrusion1 */
 442
 443 static const s8 NCT6779_BEEP_BITS[] = {
 444         0, 1, 2, 3, 4, 5, 6, 7,         /* in0.. in7 */
 445         8, 9, 10, 11, 12, 13, 14,       /* in8..in14 */
 446         24,                             /* global beep enable */
 447         25, 26, 27, 28, 29,             /* fan1..fan5 */
 448         -1, -1, -1,                     /* unused */
 449         16, 17, -1, -1, -1, -1,         /* temp1..temp6 */
 450         30, 31 };                       /* intrusion0, intrusion1 */
 451
 452 static const u16 NCT6779_REG_FAN[] = {
 453         0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8, 0x4ba };
 454 static const u16 NCT6779_REG_FAN_PULSES[] = {
 455         0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
 456
 457 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
 458         0x136, 0x236, 0x336, 0x836, 0x936, 0xa36 };
 459 #define NCT6779_CRITICAL_PWM_ENABLE_MASK        0x01
 460 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
 461         0x137, 0x237, 0x337, 0x837, 0x937, 0xa37 };
 462
 463 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
 464 static const u16 NCT6779_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b };
 465 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 466         0x18, 0x152 };
 467 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 468         0x3a, 0x153 };
 469 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 470         0x39, 0x155 };
 471
 472 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
 473         0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
 474
 475 static const char *const nct6779_temp_label[] = {
 476         "",
 477         "SYSTIN",
 478         "CPUTIN",
 479         "AUXTIN0",
 480         "AUXTIN1",
 481         "AUXTIN2",
 482         "AUXTIN3",
 483         "",
 484         "SMBUSMASTER 0",
 485         "SMBUSMASTER 1",
 486         "SMBUSMASTER 2",
 487         "SMBUSMASTER 3",
 488         "SMBUSMASTER 4",
 489         "SMBUSMASTER 5",
 490         "SMBUSMASTER 6",
 491         "SMBUSMASTER 7",
 492         "PECI Agent 0",
 493         "PECI Agent 1",
 494         "PCH_CHIP_CPU_MAX_TEMP",
 495         "PCH_CHIP_TEMP",
 496         "PCH_CPU_TEMP",
 497         "PCH_MCH_TEMP",
 498         "PCH_DIM0_TEMP",
 499         "PCH_DIM1_TEMP",
 500         "PCH_DIM2_TEMP",
 501         "PCH_DIM3_TEMP",
 502         "BYTE_TEMP",
 503         "",
 504         "",
 505         "",
 506         "",
 507         "Virtual_TEMP"
 508 };
 509
 510 #define NCT6779_NUM_LABELS      (ARRAY_SIZE(nct6779_temp_label) - 5)
 511 #define NCT6791_NUM_LABELS      ARRAY_SIZE(nct6779_temp_label)
 512
 513 static const u16 NCT6779_REG_TEMP_ALTERNATE[NCT6791_NUM_LABELS - 1]
 514         = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
 515             0, 0, 0, 0, 0, 0, 0, 0,
 516             0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
 517             0x408, 0 };
 518
 519 static const u16 NCT6779_REG_TEMP_CRIT[NCT6791_NUM_LABELS - 1]
 520         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
 521
 522 /* NCT6791 specific data */
 523
 524 #define NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE     0x28
 525
 526 static const u16 NCT6791_REG_WEIGHT_TEMP_SEL[6] = { 0, 0x239 };
 527 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP[6] = { 0, 0x23a };
 528 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP_TOL[6] = { 0, 0x23b };
 529 static const u16 NCT6791_REG_WEIGHT_DUTY_STEP[6] = { 0, 0x23c };
 530 static const u16 NCT6791_REG_WEIGHT_TEMP_BASE[6] = { 0, 0x23d };
 531 static const u16 NCT6791_REG_WEIGHT_DUTY_BASE[6] = { 0, 0x23e };
 532
 533 static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = {
 534         0x459, 0x45A, 0x45B, 0x568, 0x45D };
 535
 536 static const s8 NCT6791_ALARM_BITS[] = {
 537         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 538         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 539         -1,                             /* unused */
 540         6, 7, 11, 10, 23, 33,           /* fan1..fan6 */
 541         -1, -1,                         /* unused */
 542         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 543         12, 9 };                        /* intrusion0, intrusion1 */
 544
 545 /* NCT6792 specific data */
 546
 547 static const u16 NCT6792_REG_TEMP_MON[] = {
 548         0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d };
 549 static const u16 NCT6792_REG_BEEP[NUM_REG_BEEP] = {
 550         0xb2, 0xb3, 0xb4, 0xb5, 0xbf };
 551
 552 /* NCT6102D/NCT6106D specific data */
 553
 554 #define NCT6106_REG_VBAT        0x318
 555 #define NCT6106_REG_DIODE       0x319
 556 #define NCT6106_DIODE_MASK      0x01
 557
 558 static const u16 NCT6106_REG_IN_MAX[] = {
 559         0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
 560 static const u16 NCT6106_REG_IN_MIN[] = {
 561         0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
 562 static const u16 NCT6106_REG_IN[] = {
 563         0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
 564
 565 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
 566 static const u16 NCT6106_REG_TEMP_MON[] = { 0x18, 0x19, 0x1a };
 567 static const u16 NCT6106_REG_TEMP_HYST[] = {
 568         0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
 569 static const u16 NCT6106_REG_TEMP_OVER[] = {
 570         0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
 571 static const u16 NCT6106_REG_TEMP_CRIT_L[] = {
 572         0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
 573 static const u16 NCT6106_REG_TEMP_CRIT_H[] = {
 574         0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
 575 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
 576 static const u16 NCT6106_REG_TEMP_CONFIG[] = {
 577         0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
 578
 579 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
 580 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
 581 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0, 0 };
 582 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4, 0, 0 };
 583
 584 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
 585 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
 586 static const u16 NCT6106_REG_PWM[] = { 0x119, 0x129, 0x139 };
 587 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c };
 588 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
 589 static const u16 NCT6106_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130 };
 590 static const u16 NCT6106_REG_TEMP_SOURCE[] = {
 591         0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
 592
 593 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
 594 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = {
 595         0x11b, 0x12b, 0x13b };
 596
 597 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
 598 #define NCT6106_CRITICAL_PWM_ENABLE_MASK        0x10
 599 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
 600
 601 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
 602 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
 603 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
 604 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
 605 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
 606 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
 607
 608 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
 609
 610 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
 611 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
 612 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
 613 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x17c };
 614 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
 615 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
 616
 617 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
 618 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
 619
 620 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = {
 621         0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
 622
 623 static const s8 NCT6106_ALARM_BITS[] = {
 624         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 625         9, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 626         -1,                             /* unused */
 627         32, 33, 34, -1, -1,             /* fan1..fan5 */
 628         -1, -1, -1,                     /* unused */
 629         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 630         48, -1                          /* intrusion0, intrusion1 */
 631 };
 632
 633 static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = {
 634         0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 };
 635
 636 static const s8 NCT6106_BEEP_BITS[] = {
 637         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 638         9, 10, 11, 12, -1, -1, -1,      /* in8..in14 */
 639         32,                             /* global beep enable */
 640         24, 25, 26, 27, 28,             /* fan1..fan5 */
 641         -1, -1, -1,                     /* unused */
 642         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 643         34, -1                          /* intrusion0, intrusion1 */
 644 };
 645
 646 static const u16 NCT6106_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
 647         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x51, 0x52, 0x54 };
 648
 649 static const u16 NCT6106_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
 650         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x204, 0x205 };
 651
 652 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
 653 {
 654         if (mode == 0 && pwm == 255)
 655                 return off;
 656         return mode + 1;
 657 }
 658
 659 static int pwm_enable_to_reg(enum pwm_enable mode)
 660 {
 661         if (mode == off)
 662                 return 0;
 663         return mode - 1;
 664 }
 665
 666 /*
 667  * Conversions
 668  */
 669
 670 /* 1 is DC mode, output in ms */
 671 static unsigned int step_time_from_reg(u8 reg, u8 mode)
 672 {
 673         return mode ? 400 * reg : 100 * reg;
 674 }
 675
 676 static u8 step_time_to_reg(unsigned int msec, u8 mode)
 677 {
 678         return clamp_val((mode ? (msec + 200) / 400 :
 679                                         (msec + 50) / 100), 1, 255);
 680 }
 681
 682 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
 683 {
 684         if (reg == 0 || reg == 255)
 685                 return 0;
 686         return 1350000U / (reg << divreg);
 687 }
 688
 689 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
 690 {
 691         if ((reg & 0xff1f) == 0xff1f)
 692                 return 0;
 693
 694         reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
 695
 696         if (reg == 0)
 697                 return 0;
 698
 699         return 1350000U / reg;
 700 }
 701
 702 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
 703 {
 704         if (reg == 0 || reg == 0xffff)
 705                 return 0;
 706
 707         /*
 708          * Even though the registers are 16 bit wide, the fan divisor
 709          * still applies.
 710          */
 711         return 1350000U / (reg << divreg);
 712 }
 713
 714 static u16 fan_to_reg(u32 fan, unsigned int divreg)
 715 {
 716         if (!fan)
 717                 return 0;
 718
 719         return (1350000U / fan) >> divreg;
 720 }
 721
 722 static inline unsigned int
 723 div_from_reg(u8 reg)
 724 {
 725         return 1 << reg;
 726 }
 727
 728 /*
 729  * Some of the voltage inputs have internal scaling, the tables below
 730  * contain 8 (the ADC LSB in mV) * scaling factor * 100
 731  */
 732 static const u16 scale_in[15] = {
 733         800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
 734         800, 800
 735 };
 736
 737 static inline long in_from_reg(u8 reg, u8 nr)
 738 {
 739         return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
 740 }
 741
 742 static inline u8 in_to_reg(u32 val, u8 nr)
 743 {
 744         return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
 745 }
 746
 747 /*
 748  * Data structures and manipulation thereof
 749  */
 750
 751 struct nct6775_data {
 752         int addr;       /* IO base of hw monitor block */
 753         int sioreg;     /* SIO register address */
 754         enum kinds kind;
 755         const char *name;
 756
 757 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
 758         struct device *hwmon_dev;
 759 #endif
 760
 761         const struct attribute_group *groups[6];
 762
 763         u16 reg_temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 764                                     * 3=temp_crit, 4=temp_lcrit
 765                                     */
 766         u8 temp_src[NUM_TEMP];
 767         u16 reg_temp_config[NUM_TEMP];
 768         const char * const *temp_label;
 769         int temp_label_num;
 770
 771         u16 REG_CONFIG;
 772         u16 REG_VBAT;
 773         u16 REG_DIODE;
 774         u8 DIODE_MASK;
 775
 776         const s8 *ALARM_BITS;
 777         const s8 *BEEP_BITS;
 778
 779         const u16 *REG_VIN;
 780         const u16 *REG_IN_MINMAX[2];
 781
 782         const u16 *REG_TARGET;
 783         const u16 *REG_FAN;
 784         const u16 *REG_FAN_MODE;
 785         const u16 *REG_FAN_MIN;
 786         const u16 *REG_FAN_PULSES;
 787         const u16 *FAN_PULSE_SHIFT;
 788         const u16 *REG_FAN_TIME[3];
 789
 790         const u16 *REG_TOLERANCE_H;
 791
 792         const u8 *REG_PWM_MODE;
 793         const u8 *PWM_MODE_MASK;
 794
 795         const u16 *REG_PWM[7];  /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 796                                  * [3]=pwm_max, [4]=pwm_step,
 797                                  * [5]=weight_duty_step, [6]=weight_duty_base
 798                                  */
 799         const u16 *REG_PWM_READ;
 800
 801         const u16 *REG_CRITICAL_PWM_ENABLE;
 802         u8 CRITICAL_PWM_ENABLE_MASK;
 803         const u16 *REG_CRITICAL_PWM;
 804
 805         const u16 *REG_AUTO_TEMP;
 806         const u16 *REG_AUTO_PWM;
 807
 808         const u16 *REG_CRITICAL_TEMP;
 809         const u16 *REG_CRITICAL_TEMP_TOLERANCE;
 810
 811         const u16 *REG_TEMP_SOURCE;     /* temp register sources */
 812         const u16 *REG_TEMP_SEL;
 813         const u16 *REG_WEIGHT_TEMP_SEL;
 814         const u16 *REG_WEIGHT_TEMP[3];  /* 0=base, 1=tolerance, 2=step */
 815
 816         const u16 *REG_TEMP_OFFSET;
 817
 818         const u16 *REG_ALARM;
 819         const u16 *REG_BEEP;
 820
 821         unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
 822         unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
 823
 824         struct mutex update_lock;
 825         bool valid;             /* true if following fields are valid */
 826         unsigned long last_updated;     /* In jiffies */
 827
 828         /* Register values */
 829         u8 bank;                /* current register bank */
 830         u8 in_num;              /* number of in inputs we have */
 831         u8 in[15][3];           /* [0]=in, [1]=in_max, [2]=in_min */
 832         unsigned int rpm[NUM_FAN];
 833         u16 fan_min[NUM_FAN];
 834         u8 fan_pulses[NUM_FAN];
 835         u8 fan_div[NUM_FAN];
 836         u8 has_pwm;
 837         u8 has_fan;             /* some fan inputs can be disabled */
 838         u8 has_fan_min;         /* some fans don't have min register */
 839         bool has_fan_div;
 840
 841         u8 num_temp_alarms;     /* 2, 3, or 6 */
 842         u8 num_temp_beeps;      /* 2, 3, or 6 */
 843         u8 temp_fixed_num;      /* 3 or 6 */
 844         u8 temp_type[NUM_TEMP_FIXED];
 845         s8 temp_offset[NUM_TEMP_FIXED];
 846         s16 temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 847                                 * 3=temp_crit, 4=temp_lcrit */
 848         u64 alarms;
 849         u64 beeps;
 850
 851         u8 pwm_num;     /* number of pwm */
 852         u8 pwm_mode[NUM_FAN];   /* 1->DC variable voltage,
 853                                  * 0->PWM variable duty cycle
 854                                  */
 855         enum pwm_enable pwm_enable[NUM_FAN];
 856                         /* 0->off
 857                          * 1->manual
 858                          * 2->thermal cruise mode (also called SmartFan I)
 859                          * 3->fan speed cruise mode
 860                          * 4->SmartFan III
 861                          * 5->enhanced variable thermal cruise (SmartFan IV)
 862                          */
 863         u8 pwm[7][NUM_FAN];     /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 864                                  * [3]=pwm_max, [4]=pwm_step,
 865                                  * [5]=weight_duty_step, [6]=weight_duty_base
 866                                  */
 867
 868         u8 target_temp[NUM_FAN];
 869         u8 target_temp_mask;
 870         u32 target_speed[NUM_FAN];
 871         u32 target_speed_tolerance[NUM_FAN];
 872         u8 speed_tolerance_limit;
 873
 874         u8 temp_tolerance[2][NUM_FAN];
 875         u8 tolerance_mask;
 876
 877         u8 fan_time[3][NUM_FAN]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
 878
 879         /* Automatic fan speed control registers */
 880         int auto_pwm_num;
 881         u8 auto_pwm[NUM_FAN][7];
 882         u8 auto_temp[NUM_FAN][7];
 883         u8 pwm_temp_sel[NUM_FAN];
 884         u8 pwm_weight_temp_sel[NUM_FAN];
 885         u8 weight_temp[3][NUM_FAN];     /* 0->temp_step, 1->temp_step_tol,
 886                                          * 2->temp_base
 887                                          */
 888
 889         u8 vid;
 890         u8 vrm;
 891
 892         bool have_vid;
 893
 894         u16 have_temp;
 895         u16 have_temp_fixed;
 896         u16 have_in;
 897
 898         /* Remember extra register values over suspend/resume */
 899         u8 vbat;
 900         u8 fandiv1;
 901         u8 fandiv2;
 902         u8 sio_reg_enable;
 903 };
 904
 905 struct nct6775_sio_data {
 906         int sioreg;
 907         enum kinds kind;
 908 };
 909
 910 struct sensor_device_template {
 911         struct device_attribute dev_attr;
 912         union {
 913                 struct {
 914                         u8 nr;
 915                         u8 index;
 916                 } s;
 917                 int index;
 918         } u;
 919         bool s2;        /* true if both index and nr are used */
 920 };
 921
 922 struct sensor_device_attr_u {
 923         union {
 924                 struct sensor_device_attribute a1;
 925                 struct sensor_device_attribute_2 a2;
 926         } u;
 927         char name[32];
 928 };
 929
 930 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) {      \
 931         .attr = {.name = _template, .mode = _mode },            \
 932         .show   = _show,                                        \
 933         .store  = _store,                                       \
 934 }
 935
 936 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \
 937         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
 938           .u.index = _index,                                            \
 939           .s2 = false }
 940
 941 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,       \
 942                                  _nr, _index)                           \
 943         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
 944           .u.s.index = _index,                                          \
 945           .u.s.nr = _nr,                                                \
 946           .s2 = true }
 947
 948 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
 949 static struct sensor_device_template sensor_dev_template_##_name        \
 950         = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store,       \
 951                                  _index)
 952
 953 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store,       \
 954                           _nr, _index)                                  \
 955 static struct sensor_device_template sensor_dev_template_##_name        \
 956         = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,     \
 957                                  _nr, _index)
 958
 959 struct sensor_template_group {
 960         struct sensor_device_template **templates;
 961         umode_t (*is_visible)(struct kobject *, struct attribute *, int);
 962         int base;
 963 };
 964
 965 static struct attribute_group *
 966 nct6775_create_attr_group(struct device *dev, struct sensor_template_group *tg,
 967                           int repeat)
 968 {
 969         struct attribute_group *group;
 970         struct sensor_device_attr_u *su;
 971         struct sensor_device_attribute *a;
 972         struct sensor_device_attribute_2 *a2;
 973         struct attribute **attrs;
 974         struct sensor_device_template **t;
 975         int i, count;
 976
 977         if (repeat <= 0)
 978                 return ERR_PTR(-EINVAL);
 979
 980         t = tg->templates;
 981         for (count = 0; *t; t++, count++)
 982                 ;
 983
 984         if (count == 0)
 985                 return ERR_PTR(-EINVAL);
 986
 987         group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
 988         if (group == NULL)
 989                 return ERR_PTR(-ENOMEM);
 990
 991         attrs = devm_kzalloc(dev, sizeof(*attrs) * (repeat * count + 1),
 992                              GFP_KERNEL);
 993         if (attrs == NULL)
 994                 return ERR_PTR(-ENOMEM);
 995
 996         su = devm_kzalloc(dev, sizeof(*su) * repeat * count,
 997                                GFP_KERNEL);
 998         if (su == NULL)
 999                 return ERR_PTR(-ENOMEM);
1000
1001         group->attrs = attrs;
1002         group->is_visible = tg->is_visible;
1003
1004         for (i = 0; i < repeat; i++) {
1005                 t = tg->templates;
1006                 while (*t != NULL) {
1007                         snprintf(su->name, sizeof(su->name),
1008                                  (*t)->dev_attr.attr.name, tg->base + i);
1009                         if ((*t)->s2) {
1010                                 a2 = &su->u.a2;
1011                                 a2->dev_attr.attr.name = su->name;
1012                                 a2->nr = (*t)->u.s.nr + i;
1013                                 a2->index = (*t)->u.s.index;
1014                                 a2->dev_attr.attr.mode =
1015                                   (*t)->dev_attr.attr.mode;
1016                                 a2->dev_attr.show = (*t)->dev_attr.show;
1017                                 a2->dev_attr.store = (*t)->dev_attr.store;
1018                                 *attrs = &a2->dev_attr.attr;
1019                         } else {
1020                                 a = &su->u.a1;
1021                                 a->dev_attr.attr.name = su->name;
1022                                 a->index = (*t)->u.index + i;
1023                                 a->dev_attr.attr.mode =
1024                                   (*t)->dev_attr.attr.mode;
1025                                 a->dev_attr.show = (*t)->dev_attr.show;
1026                                 a->dev_attr.store = (*t)->dev_attr.store;
1027                                 *attrs = &a->dev_attr.attr;
1028                         }
1029                         attrs++;
1030                         su++;
1031                         t++;
1032                 }
1033         }
1034
1035         return group;
1036 }
1037
1038 static bool is_word_sized(struct nct6775_data *data, u16 reg)
1039 {
1040         switch (data->kind) {
1041         case nct6106:
1042                 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1043                   reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
1044                   reg == 0x111 || reg == 0x121 || reg == 0x131;
1045         case nct6775:
1046                 return (((reg & 0xff00) == 0x100 ||
1047                     (reg & 0xff00) == 0x200) &&
1048                    ((reg & 0x00ff) == 0x50 ||
1049                     (reg & 0x00ff) == 0x53 ||
1050                     (reg & 0x00ff) == 0x55)) ||
1051                   (reg & 0xfff0) == 0x630 ||
1052                   reg == 0x640 || reg == 0x642 ||
1053                   reg == 0x662 ||
1054                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1055                   reg == 0x73 || reg == 0x75 || reg == 0x77;
1056         case nct6776:
1057                 return (((reg & 0xff00) == 0x100 ||
1058                     (reg & 0xff00) == 0x200) &&
1059                    ((reg & 0x00ff) == 0x50 ||
1060                     (reg & 0x00ff) == 0x53 ||
1061                     (reg & 0x00ff) == 0x55)) ||
1062                   (reg & 0xfff0) == 0x630 ||
1063                   reg == 0x402 ||
1064                   reg == 0x640 || reg == 0x642 ||
1065                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1066                   reg == 0x73 || reg == 0x75 || reg == 0x77;
1067         case nct6779:
1068         case nct6791:
1069         case nct6792:
1070                 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
1071                   ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x0b) ||
1072                   reg == 0x402 ||
1073                   reg == 0x63a || reg == 0x63c || reg == 0x63e ||
1074                   reg == 0x640 || reg == 0x642 ||
1075                   reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
1076                   reg == 0x7b || reg == 0x7d;
1077         }
1078         return false;
1079 }
1080
1081 /*
1082  * On older chips, only registers 0x50-0x5f are banked.
1083  * On more recent chips, all registers are banked.
1084  * Assume that is the case and set the bank number for each access.
1085  * Cache the bank number so it only needs to be set if it changes.
1086  */
1087 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
1088 {
1089         u8 bank = reg >> 8;
1090
1091         if (data->bank != bank) {
1092                 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
1093                 outb_p(bank, data->addr + DATA_REG_OFFSET);
1094                 data->bank = bank;
1095         }
1096 }
1097
1098 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
1099 {
1100         int res, word_sized = is_word_sized(data, reg);
1101
1102         nct6775_set_bank(data, reg);
1103         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1104         res = inb_p(data->addr + DATA_REG_OFFSET);
1105         if (word_sized) {
1106                 outb_p((reg & 0xff) + 1,
1107                        data->addr + ADDR_REG_OFFSET);
1108                 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
1109         }
1110         return res;
1111 }
1112
1113 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
1114 {
1115         int word_sized = is_word_sized(data, reg);
1116
1117         nct6775_set_bank(data, reg);
1118         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1119         if (word_sized) {
1120                 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
1121                 outb_p((reg & 0xff) + 1,
1122                        data->addr + ADDR_REG_OFFSET);
1123         }
1124         outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
1125         return 0;
1126 }
1127
1128 /* We left-align 8-bit temperature values to make the code simpler */
1129 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
1130 {
1131         u16 res;
1132
1133         res = nct6775_read_value(data, reg);
1134         if (!is_word_sized(data, reg))
1135                 res <<= 8;
1136
1137         return res;
1138 }
1139
1140 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
1141 {
1142         if (!is_word_sized(data, reg))
1143                 value >>= 8;
1144         return nct6775_write_value(data, reg, value);
1145 }
1146
1147 /* This function assumes that the caller holds data->update_lock */
1148 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
1149 {
1150         u8 reg;
1151
1152         switch (nr) {
1153         case 0:
1154                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
1155                     | (data->fan_div[0] & 0x7);
1156                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1157                 break;
1158         case 1:
1159                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
1160                     | ((data->fan_div[1] << 4) & 0x70);
1161                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1162                 break;
1163         case 2:
1164                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
1165                     | (data->fan_div[2] & 0x7);
1166                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1167                 break;
1168         case 3:
1169                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
1170                     | ((data->fan_div[3] << 4) & 0x70);
1171                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1172                 break;
1173         }
1174 }
1175
1176 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
1177 {
1178         if (data->kind == nct6775)
1179                 nct6775_write_fan_div(data, nr);
1180 }
1181
1182 static void nct6775_update_fan_div(struct nct6775_data *data)
1183 {
1184         u8 i;
1185
1186         i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
1187         data->fan_div[0] = i & 0x7;
1188         data->fan_div[1] = (i & 0x70) >> 4;
1189         i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
1190         data->fan_div[2] = i & 0x7;
1191         if (data->has_fan & (1 << 3))
1192                 data->fan_div[3] = (i & 0x70) >> 4;
1193 }
1194
1195 static void nct6775_update_fan_div_common(struct nct6775_data *data)
1196 {
1197         if (data->kind == nct6775)
1198                 nct6775_update_fan_div(data);
1199 }
1200
1201 static void nct6775_init_fan_div(struct nct6775_data *data)
1202 {
1203         int i;
1204
1205         nct6775_update_fan_div_common(data);
1206         /*
1207          * For all fans, start with highest divider value if the divider
1208          * register is not initialized. This ensures that we get a
1209          * reading from the fan count register, even if it is not optimal.
1210          * We'll compute a better divider later on.
1211          */
1212         for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
1213                 if (!(data->has_fan & (1 << i)))
1214                         continue;
1215                 if (data->fan_div[i] == 0) {
1216                         data->fan_div[i] = 7;
1217                         nct6775_write_fan_div_common(data, i);
1218                 }
1219         }
1220 }
1221
1222 static void nct6775_init_fan_common(struct device *dev,
1223                                     struct nct6775_data *data)
1224 {
1225         int i;
1226         u8 reg;
1227
1228         if (data->has_fan_div)
1229                 nct6775_init_fan_div(data);
1230
1231         /*
1232          * If fan_min is not set (0), set it to 0xff to disable it. This
1233          * prevents the unnecessary warning when fanX_min is reported as 0.
1234          */
1235         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1236                 if (data->has_fan_min & (1 << i)) {
1237                         reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
1238                         if (!reg)
1239                                 nct6775_write_value(data, data->REG_FAN_MIN[i],
1240                                                     data->has_fan_div ? 0xff
1241                                                                       : 0xff1f);
1242                 }
1243         }
1244 }
1245
1246 static void nct6775_select_fan_div(struct device *dev,
1247                                    struct nct6775_data *data, int nr, u16 reg)
1248 {
1249         u8 fan_div = data->fan_div[nr];
1250         u16 fan_min;
1251
1252         if (!data->has_fan_div)
1253                 return;
1254
1255         /*
1256          * If we failed to measure the fan speed, or the reported value is not
1257          * in the optimal range, and the clock divider can be modified,
1258          * let's try that for next time.
1259          */
1260         if (reg == 0x00 && fan_div < 0x07)
1261                 fan_div++;
1262         else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1263                 fan_div--;
1264
1265         if (fan_div != data->fan_div[nr]) {
1266                 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1267                         nr + 1, div_from_reg(data->fan_div[nr]),
1268                         div_from_reg(fan_div));
1269
1270                 /* Preserve min limit if possible */
1271                 if (data->has_fan_min & (1 << nr)) {
1272                         fan_min = data->fan_min[nr];
1273                         if (fan_div > data->fan_div[nr]) {
1274                                 if (fan_min != 255 && fan_min > 1)
1275                                         fan_min >>= 1;
1276                         } else {
1277                                 if (fan_min != 255) {
1278                                         fan_min <<= 1;
1279                                         if (fan_min > 254)
1280                                                 fan_min = 254;
1281                                 }
1282                         }
1283                         if (fan_min != data->fan_min[nr]) {
1284                                 data->fan_min[nr] = fan_min;
1285                                 nct6775_write_value(data, data->REG_FAN_MIN[nr],
1286                                                     fan_min);
1287                         }
1288                 }
1289                 data->fan_div[nr] = fan_div;
1290                 nct6775_write_fan_div_common(data, nr);
1291         }
1292 }
1293
1294 static void nct6775_update_pwm(struct device *dev)
1295 {
1296         struct nct6775_data *data = dev_get_drvdata(dev);
1297         int i, j;
1298         int fanmodecfg, reg;
1299         bool duty_is_dc;
1300
1301         for (i = 0; i < data->pwm_num; i++) {
1302                 if (!(data->has_pwm & (1 << i)))
1303                         continue;
1304
1305                 duty_is_dc = data->REG_PWM_MODE[i] &&
1306                   (nct6775_read_value(data, data->REG_PWM_MODE[i])
1307                    & data->PWM_MODE_MASK[i]);
1308                 data->pwm_mode[i] = duty_is_dc;
1309
1310                 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
1311                 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1312                         if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1313                                 data->pwm[j][i]
1314                                   = nct6775_read_value(data,
1315                                                        data->REG_PWM[j][i]);
1316                         }
1317                 }
1318
1319                 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1320                                                         (fanmodecfg >> 4) & 7);
1321
1322                 if (!data->temp_tolerance[0][i] ||
1323                     data->pwm_enable[i] != speed_cruise)
1324                         data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1325                 if (!data->target_speed_tolerance[i] ||
1326                     data->pwm_enable[i] == speed_cruise) {
1327                         u8 t = fanmodecfg & 0x0f;
1328
1329                         if (data->REG_TOLERANCE_H) {
1330                                 t |= (nct6775_read_value(data,
1331                                       data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
1332                         }
1333                         data->target_speed_tolerance[i] = t;
1334                 }
1335
1336                 data->temp_tolerance[1][i] =
1337                         nct6775_read_value(data,
1338                                         data->REG_CRITICAL_TEMP_TOLERANCE[i]);
1339
1340                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
1341                 data->pwm_temp_sel[i] = reg & 0x1f;
1342                 /* If fan can stop, report floor as 0 */
1343                 if (reg & 0x80)
1344                         data->pwm[2][i] = 0;
1345
1346                 if (!data->REG_WEIGHT_TEMP_SEL[i])
1347                         continue;
1348
1349                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
1350                 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1351                 /* If weight is disabled, report weight source as 0 */
1352                 if (j == 1 && !(reg & 0x80))
1353                         data->pwm_weight_temp_sel[i] = 0;
1354
1355                 /* Weight temp data */
1356                 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
1357                         data->weight_temp[j][i]
1358                           = nct6775_read_value(data,
1359                                                data->REG_WEIGHT_TEMP[j][i]);
1360                 }
1361         }
1362 }
1363
1364 static void nct6775_update_pwm_limits(struct device *dev)
1365 {
1366         struct nct6775_data *data = dev_get_drvdata(dev);
1367         int i, j;
1368         u8 reg;
1369         u16 reg_t;
1370
1371         for (i = 0; i < data->pwm_num; i++) {
1372                 if (!(data->has_pwm & (1 << i)))
1373                         continue;
1374
1375                 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1376                         data->fan_time[j][i] =
1377                           nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1378                 }
1379
1380                 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1381                 /* Update only in matching mode or if never updated */
1382                 if (!data->target_temp[i] ||
1383                     data->pwm_enable[i] == thermal_cruise)
1384                         data->target_temp[i] = reg_t & data->target_temp_mask;
1385                 if (!data->target_speed[i] ||
1386                     data->pwm_enable[i] == speed_cruise) {
1387                         if (data->REG_TOLERANCE_H) {
1388                                 reg_t |= (nct6775_read_value(data,
1389                                         data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1390                         }
1391                         data->target_speed[i] = reg_t;
1392                 }
1393
1394                 for (j = 0; j < data->auto_pwm_num; j++) {
1395                         data->auto_pwm[i][j] =
1396                           nct6775_read_value(data,
1397                                              NCT6775_AUTO_PWM(data, i, j));
1398                         data->auto_temp[i][j] =
1399                           nct6775_read_value(data,
1400                                              NCT6775_AUTO_TEMP(data, i, j));
1401                 }
1402
1403                 /* critical auto_pwm temperature data */
1404                 data->auto_temp[i][data->auto_pwm_num] =
1405                         nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1406
1407                 switch (data->kind) {
1408                 case nct6775:
1409                         reg = nct6775_read_value(data,
1410                                                  NCT6775_REG_CRITICAL_ENAB[i]);
1411                         data->auto_pwm[i][data->auto_pwm_num] =
1412                                                 (reg & 0x02) ? 0xff : 0x00;
1413                         break;
1414                 case nct6776:
1415                         data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1416                         break;
1417                 case nct6106:
1418                 case nct6779:
1419                 case nct6791:
1420                 case nct6792:
1421                         reg = nct6775_read_value(data,
1422                                         data->REG_CRITICAL_PWM_ENABLE[i]);
1423                         if (reg & data->CRITICAL_PWM_ENABLE_MASK)
1424                                 reg = nct6775_read_value(data,
1425                                         data->REG_CRITICAL_PWM[i]);
1426                         else
1427                                 reg = 0xff;
1428                         data->auto_pwm[i][data->auto_pwm_num] = reg;
1429                         break;
1430                 }
1431         }
1432 }
1433
1434 static struct nct6775_data *nct6775_update_device(struct device *dev)
1435 {
1436         struct nct6775_data *data = dev_get_drvdata(dev);
1437         int i, j;
1438
1439         mutex_lock(&data->update_lock);
1440
1441         if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1442             || !data->valid) {
1443                 /* Fan clock dividers */
1444                 nct6775_update_fan_div_common(data);
1445
1446                 /* Measured voltages and limits */
1447                 for (i = 0; i < data->in_num; i++) {
1448                         if (!(data->have_in & (1 << i)))
1449                                 continue;
1450
1451                         data->in[i][0] = nct6775_read_value(data,
1452                                                             data->REG_VIN[i]);
1453                         data->in[i][1] = nct6775_read_value(data,
1454                                           data->REG_IN_MINMAX[0][i]);
1455                         data->in[i][2] = nct6775_read_value(data,
1456                                           data->REG_IN_MINMAX[1][i]);
1457                 }
1458
1459                 /* Measured fan speeds and limits */
1460                 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
1461                         u16 reg;
1462
1463                         if (!(data->has_fan & (1 << i)))
1464                                 continue;
1465
1466                         reg = nct6775_read_value(data, data->REG_FAN[i]);
1467                         data->rpm[i] = data->fan_from_reg(reg,
1468                                                           data->fan_div[i]);
1469
1470                         if (data->has_fan_min & (1 << i))
1471                                 data->fan_min[i] = nct6775_read_value(data,
1472                                            data->REG_FAN_MIN[i]);
1473                         data->fan_pulses[i] =
1474                           (nct6775_read_value(data, data->REG_FAN_PULSES[i])
1475                                 >> data->FAN_PULSE_SHIFT[i]) & 0x03;
1476
1477                         nct6775_select_fan_div(dev, data, i, reg);
1478                 }
1479
1480                 nct6775_update_pwm(dev);
1481                 nct6775_update_pwm_limits(dev);
1482
1483                 /* Measured temperatures and limits */
1484                 for (i = 0; i < NUM_TEMP; i++) {
1485                         if (!(data->have_temp & (1 << i)))
1486                                 continue;
1487                         for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1488                                 if (data->reg_temp[j][i])
1489                                         data->temp[j][i]
1490                                           = nct6775_read_temp(data,
1491                                                 data->reg_temp[j][i]);
1492                         }
1493                         if (i >= NUM_TEMP_FIXED ||
1494                             !(data->have_temp_fixed & (1 << i)))
1495                                 continue;
1496                         data->temp_offset[i]
1497                           = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1498                 }
1499
1500                 data->alarms = 0;
1501                 for (i = 0; i < NUM_REG_ALARM; i++) {
1502                         u8 alarm;
1503
1504                         if (!data->REG_ALARM[i])
1505                                 continue;
1506                         alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1507                         data->alarms |= ((u64)alarm) << (i << 3);
1508                 }
1509
1510                 data->beeps = 0;
1511                 for (i = 0; i < NUM_REG_BEEP; i++) {
1512                         u8 beep;
1513
1514                         if (!data->REG_BEEP[i])
1515                                 continue;
1516                         beep = nct6775_read_value(data, data->REG_BEEP[i]);
1517                         data->beeps |= ((u64)beep) << (i << 3);
1518                 }
1519
1520                 data->last_updated = jiffies;
1521                 data->valid = true;
1522         }
1523
1524         mutex_unlock(&data->update_lock);
1525         return data;
1526 }
1527
1528 /*
1529  * Sysfs callback functions
1530  */
1531 static ssize_t
1532 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1533 {
1534         struct nct6775_data *data = nct6775_update_device(dev);
1535         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1536         int index = sattr->index;
1537         int nr = sattr->nr;
1538
1539         return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1540 }
1541
1542 static ssize_t
1543 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1544              size_t count)
1545 {
1546         struct nct6775_data *data = dev_get_drvdata(dev);
1547         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1548         int index = sattr->index;
1549         int nr = sattr->nr;
1550         unsigned long val;
1551         int err;
1552
1553         err = kstrtoul(buf, 10, &val);
1554         if (err < 0)
1555                 return err;
1556         mutex_lock(&data->update_lock);
1557         data->in[nr][index] = in_to_reg(val, nr);
1558         nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr],
1559                             data->in[nr][index]);
1560         mutex_unlock(&data->update_lock);
1561         return count;
1562 }
1563
1564 static ssize_t
1565 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1566 {
1567         struct nct6775_data *data = nct6775_update_device(dev);
1568         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1569         int nr = data->ALARM_BITS[sattr->index];
1570
1571         return sprintf(buf, "%u\n",
1572                        (unsigned int)((data->alarms >> nr) & 0x01));
1573 }
1574
1575 static int find_temp_source(struct nct6775_data *data, int index, int count)
1576 {
1577         int source = data->temp_src[index];
1578         int nr;
1579
1580         for (nr = 0; nr < count; nr++) {
1581                 int src;
1582
1583                 src = nct6775_read_value(data,
1584                                          data->REG_TEMP_SOURCE[nr]) & 0x1f;
1585                 if (src == source)
1586                         return nr;
1587         }
1588         return -ENODEV;
1589 }
1590
1591 static ssize_t
1592 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1593 {
1594         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1595         struct nct6775_data *data = nct6775_update_device(dev);
1596         unsigned int alarm = 0;
1597         int nr;
1598
1599         /*
1600          * For temperatures, there is no fixed mapping from registers to alarm
1601          * bits. Alarm bits are determined by the temperature source mapping.
1602          */
1603         nr = find_temp_source(data, sattr->index, data->num_temp_alarms);
1604         if (nr >= 0) {
1605                 int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE];
1606
1607                 alarm = (data->alarms >> bit) & 0x01;
1608         }
1609         return sprintf(buf, "%u\n", alarm);
1610 }
1611
1612 static ssize_t
1613 show_beep(struct device *dev, struct device_attribute *attr, char *buf)
1614 {
1615         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1616         struct nct6775_data *data = nct6775_update_device(dev);
1617         int nr = data->BEEP_BITS[sattr->index];
1618
1619         return sprintf(buf, "%u\n",
1620                        (unsigned int)((data->beeps >> nr) & 0x01));
1621 }
1622
1623 static ssize_t
1624 store_beep(struct device *dev, struct device_attribute *attr, const char *buf,
1625            size_t count)
1626 {
1627         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1628         struct nct6775_data *data = dev_get_drvdata(dev);
1629         int nr = data->BEEP_BITS[sattr->index];
1630         int regindex = nr >> 3;
1631         unsigned long val;
1632         int err;
1633
1634         err = kstrtoul(buf, 10, &val);
1635         if (err < 0)
1636                 return err;
1637         if (val > 1)
1638                 return -EINVAL;
1639
1640         mutex_lock(&data->update_lock);
1641         if (val)
1642                 data->beeps |= (1ULL << nr);
1643         else
1644                 data->beeps &= ~(1ULL << nr);
1645         nct6775_write_value(data, data->REG_BEEP[regindex],
1646                             (data->beeps >> (regindex << 3)) & 0xff);
1647         mutex_unlock(&data->update_lock);
1648         return count;
1649 }
1650
1651 static ssize_t
1652 show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf)
1653 {
1654         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1655         struct nct6775_data *data = nct6775_update_device(dev);
1656         unsigned int beep = 0;
1657         int nr;
1658
1659         /*
1660          * For temperatures, there is no fixed mapping from registers to beep
1661          * enable bits. Beep enable bits are determined by the temperature
1662          * source mapping.
1663          */
1664         nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1665         if (nr >= 0) {
1666                 int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1667
1668                 beep = (data->beeps >> bit) & 0x01;
1669         }
1670         return sprintf(buf, "%u\n", beep);
1671 }
1672
1673 static ssize_t
1674 store_temp_beep(struct device *dev, struct device_attribute *attr,
1675                 const char *buf, size_t count)
1676 {
1677         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1678         struct nct6775_data *data = dev_get_drvdata(dev);
1679         int nr, bit, regindex;
1680         unsigned long val;
1681         int err;
1682
1683         err = kstrtoul(buf, 10, &val);
1684         if (err < 0)
1685                 return err;
1686         if (val > 1)
1687                 return -EINVAL;
1688
1689         nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1690         if (nr < 0)
1691                 return nr;
1692
1693         bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1694         regindex = bit >> 3;
1695
1696         mutex_lock(&data->update_lock);
1697         if (val)
1698                 data->beeps |= (1ULL << bit);
1699         else
1700                 data->beeps &= ~(1ULL << bit);
1701         nct6775_write_value(data, data->REG_BEEP[regindex],
1702                             (data->beeps >> (regindex << 3)) & 0xff);
1703         mutex_unlock(&data->update_lock);
1704
1705         return count;
1706 }
1707
1708 static umode_t nct6775_in_is_visible(struct kobject *kobj,
1709                                      struct attribute *attr, int index)
1710 {
1711         struct device *dev = container_of(kobj, struct device, kobj);
1712         struct nct6775_data *data = dev_get_drvdata(dev);
1713         int in = index / 5;     /* voltage index */
1714
1715         if (!(data->have_in & (1 << in)))
1716                 return 0;
1717
1718         return attr->mode;
1719 }
1720
1721 SENSOR_TEMPLATE_2(in_input, "in%d_input", S_IRUGO, show_in_reg, NULL, 0, 0);
1722 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", S_IRUGO, show_alarm, NULL, 0);
1723 SENSOR_TEMPLATE(in_beep, "in%d_beep", S_IWUSR | S_IRUGO, show_beep, store_beep,
1724                 0);
1725 SENSOR_TEMPLATE_2(in_min, "in%d_min", S_IWUSR | S_IRUGO, show_in_reg,
1726                   store_in_reg, 0, 1);
1727 SENSOR_TEMPLATE_2(in_max, "in%d_max", S_IWUSR | S_IRUGO, show_in_reg,
1728                   store_in_reg, 0, 2);
1729
1730 /*
1731  * nct6775_in_is_visible uses the index into the following array
1732  * to determine if attributes should be created or not.
1733  * Any change in order or content must be matched.
1734  */
1735 static struct sensor_device_template *nct6775_attributes_in_template[] = {
1736         &sensor_dev_template_in_input,
1737         &sensor_dev_template_in_alarm,
1738         &sensor_dev_template_in_beep,
1739         &sensor_dev_template_in_min,
1740         &sensor_dev_template_in_max,
1741         NULL
1742 };
1743
1744 static struct sensor_template_group nct6775_in_template_group = {
1745         .templates = nct6775_attributes_in_template,
1746         .is_visible = nct6775_in_is_visible,
1747 };
1748
1749 static ssize_t
1750 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1751 {
1752         struct nct6775_data *data = nct6775_update_device(dev);
1753         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1754         int nr = sattr->index;
1755
1756         return sprintf(buf, "%d\n", data->rpm[nr]);
1757 }
1758
1759 static ssize_t
1760 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1761 {
1762         struct nct6775_data *data = nct6775_update_device(dev);
1763         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1764         int nr = sattr->index;
1765
1766         return sprintf(buf, "%d\n",
1767                        data->fan_from_reg_min(data->fan_min[nr],
1768                                               data->fan_div[nr]));
1769 }
1770
1771 static ssize_t
1772 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1773 {
1774         struct nct6775_data *data = nct6775_update_device(dev);
1775         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1776         int nr = sattr->index;
1777
1778         return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1779 }
1780
1781 static ssize_t
1782 store_fan_min(struct device *dev, struct device_attribute *attr,
1783               const char *buf, size_t count)
1784 {
1785         struct nct6775_data *data = dev_get_drvdata(dev);
1786         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1787         int nr = sattr->index;
1788         unsigned long val;
1789         unsigned int reg;
1790         u8 new_div;
1791         int err;
1792
1793         err = kstrtoul(buf, 10, &val);
1794         if (err < 0)
1795                 return err;
1796
1797         mutex_lock(&data->update_lock);
1798         if (!data->has_fan_div) {
1799                 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1800                 if (!val) {
1801                         val = 0xff1f;
1802                 } else {
1803                         if (val > 1350000U)
1804                                 val = 135000U;
1805                         val = 1350000U / val;
1806                         val = (val & 0x1f) | ((val << 3) & 0xff00);
1807                 }
1808                 data->fan_min[nr] = val;
1809                 goto write_min; /* Leave fan divider alone */
1810         }
1811         if (!val) {
1812                 /* No min limit, alarm disabled */
1813                 data->fan_min[nr] = 255;
1814                 new_div = data->fan_div[nr]; /* No change */
1815                 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1816                 goto write_div;
1817         }
1818         reg = 1350000U / val;
1819         if (reg >= 128 * 255) {
1820                 /*
1821                  * Speed below this value cannot possibly be represented,
1822                  * even with the highest divider (128)
1823                  */
1824                 data->fan_min[nr] = 254;
1825                 new_div = 7; /* 128 == (1 << 7) */
1826                 dev_warn(dev,
1827                          "fan%u low limit %lu below minimum %u, set to minimum\n",
1828                          nr + 1, val, data->fan_from_reg_min(254, 7));
1829         } else if (!reg) {
1830                 /*
1831                  * Speed above this value cannot possibly be represented,
1832                  * even with the lowest divider (1)
1833                  */
1834                 data->fan_min[nr] = 1;
1835                 new_div = 0; /* 1 == (1 << 0) */
1836                 dev_warn(dev,
1837                          "fan%u low limit %lu above maximum %u, set to maximum\n",
1838                          nr + 1, val, data->fan_from_reg_min(1, 0));
1839         } else {
1840                 /*
1841                  * Automatically pick the best divider, i.e. the one such
1842                  * that the min limit will correspond to a register value
1843                  * in the 96..192 range
1844                  */
1845                 new_div = 0;
1846                 while (reg > 192 && new_div < 7) {
1847                         reg >>= 1;
1848                         new_div++;
1849                 }
1850                 data->fan_min[nr] = reg;
1851         }
1852
1853 write_div:
1854         /*
1855          * Write both the fan clock divider (if it changed) and the new
1856          * fan min (unconditionally)
1857          */
1858         if (new_div != data->fan_div[nr]) {
1859                 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1860                         nr + 1, div_from_reg(data->fan_div[nr]),
1861                         div_from_reg(new_div));
1862                 data->fan_div[nr] = new_div;
1863                 nct6775_write_fan_div_common(data, nr);
1864                 /* Give the chip time to sample a new speed value */
1865                 data->last_updated = jiffies;
1866         }
1867
1868 write_min:
1869         nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1870         mutex_unlock(&data->update_lock);
1871
1872         return count;
1873 }
1874
1875 static ssize_t
1876 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
1877 {
1878         struct nct6775_data *data = nct6775_update_device(dev);
1879         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1880         int p = data->fan_pulses[sattr->index];
1881
1882         return sprintf(buf, "%d\n", p ? : 4);
1883 }
1884
1885 static ssize_t
1886 store_fan_pulses(struct device *dev, struct device_attribute *attr,
1887                  const char *buf, size_t count)
1888 {
1889         struct nct6775_data *data = dev_get_drvdata(dev);
1890         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1891         int nr = sattr->index;
1892         unsigned long val;
1893         int err;
1894         u8 reg;
1895
1896         err = kstrtoul(buf, 10, &val);
1897         if (err < 0)
1898                 return err;
1899
1900         if (val > 4)
1901                 return -EINVAL;
1902
1903         mutex_lock(&data->update_lock);
1904         data->fan_pulses[nr] = val & 3;
1905         reg = nct6775_read_value(data, data->REG_FAN_PULSES[nr]);
1906         reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
1907         reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
1908         nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
1909         mutex_unlock(&data->update_lock);
1910
1911         return count;
1912 }
1913
1914 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
1915                                       struct attribute *attr, int index)
1916 {
1917         struct device *dev = container_of(kobj, struct device, kobj);
1918         struct nct6775_data *data = dev_get_drvdata(dev);
1919         int fan = index / 6;    /* fan index */
1920         int nr = index % 6;     /* attribute index */
1921
1922         if (!(data->has_fan & (1 << fan)))
1923                 return 0;
1924
1925         if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1)
1926                 return 0;
1927         if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1)
1928                 return 0;
1929         if (nr == 4 && !(data->has_fan_min & (1 << fan)))
1930                 return 0;
1931         if (nr == 5 && data->kind != nct6775)
1932                 return 0;
1933
1934         return attr->mode;
1935 }
1936
1937 SENSOR_TEMPLATE(fan_input, "fan%d_input", S_IRUGO, show_fan, NULL, 0);
1938 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", S_IRUGO, show_alarm, NULL,
1939                 FAN_ALARM_BASE);
1940 SENSOR_TEMPLATE(fan_beep, "fan%d_beep", S_IWUSR | S_IRUGO, show_beep,
1941                 store_beep, FAN_ALARM_BASE);
1942 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", S_IWUSR | S_IRUGO, show_fan_pulses,
1943                 store_fan_pulses, 0);
1944 SENSOR_TEMPLATE(fan_min, "fan%d_min", S_IWUSR | S_IRUGO, show_fan_min,
1945                 store_fan_min, 0);
1946 SENSOR_TEMPLATE(fan_div, "fan%d_div", S_IRUGO, show_fan_div, NULL, 0);
1947
1948 /*
1949  * nct6775_fan_is_visible uses the index into the following array
1950  * to determine if attributes should be created or not.
1951  * Any change in order or content must be matched.
1952  */
1953 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
1954         &sensor_dev_template_fan_input,
1955         &sensor_dev_template_fan_alarm, /* 1 */
1956         &sensor_dev_template_fan_beep,  /* 2 */
1957         &sensor_dev_template_fan_pulses,
1958         &sensor_dev_template_fan_min,   /* 4 */
1959         &sensor_dev_template_fan_div,   /* 5 */
1960         NULL
1961 };
1962
1963 static struct sensor_template_group nct6775_fan_template_group = {
1964         .templates = nct6775_attributes_fan_template,
1965         .is_visible = nct6775_fan_is_visible,
1966         .base = 1,
1967 };
1968
1969 static ssize_t
1970 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1971 {
1972         struct nct6775_data *data = nct6775_update_device(dev);
1973         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1974         int nr = sattr->index;
1975
1976         return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1977 }
1978
1979 static ssize_t
1980 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1981 {
1982         struct nct6775_data *data = nct6775_update_device(dev);
1983         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1984         int nr = sattr->nr;
1985         int index = sattr->index;
1986
1987         return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
1988 }
1989
1990 static ssize_t
1991 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
1992            size_t count)
1993 {
1994         struct nct6775_data *data = dev_get_drvdata(dev);
1995         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1996         int nr = sattr->nr;
1997         int index = sattr->index;
1998         int err;
1999         long val;
2000
2001         err = kstrtol(buf, 10, &val);
2002         if (err < 0)
2003                 return err;
2004
2005         mutex_lock(&data->update_lock);
2006         data->temp[index][nr] = LM75_TEMP_TO_REG(val);
2007         nct6775_write_temp(data, data->reg_temp[index][nr],
2008                            data->temp[index][nr]);
2009         mutex_unlock(&data->update_lock);
2010         return count;
2011 }
2012
2013 static ssize_t
2014 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
2015 {
2016         struct nct6775_data *data = nct6775_update_device(dev);
2017         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2018
2019         return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
2020 }
2021
2022 static ssize_t
2023 store_temp_offset(struct device *dev, struct device_attribute *attr,
2024                   const char *buf, size_t count)
2025 {
2026         struct nct6775_data *data = dev_get_drvdata(dev);
2027         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2028         int nr = sattr->index;
2029         long val;
2030         int err;
2031
2032         err = kstrtol(buf, 10, &val);
2033         if (err < 0)
2034                 return err;
2035
2036         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
2037
2038         mutex_lock(&data->update_lock);
2039         data->temp_offset[nr] = val;
2040         nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
2041         mutex_unlock(&data->update_lock);
2042
2043         return count;
2044 }
2045
2046 static ssize_t
2047 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
2048 {
2049         struct nct6775_data *data = nct6775_update_device(dev);
2050         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2051         int nr = sattr->index;
2052
2053         return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
2054 }
2055
2056 static ssize_t
2057 store_temp_type(struct device *dev, struct device_attribute *attr,
2058                 const char *buf, size_t count)
2059 {
2060         struct nct6775_data *data = nct6775_update_device(dev);
2061         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2062         int nr = sattr->index;
2063         unsigned long val;
2064         int err;
2065         u8 vbat, diode, vbit, dbit;
2066
2067         err = kstrtoul(buf, 10, &val);
2068         if (err < 0)
2069                 return err;
2070
2071         if (val != 1 && val != 3 && val != 4)
2072                 return -EINVAL;
2073
2074         mutex_lock(&data->update_lock);
2075
2076         data->temp_type[nr] = val;
2077         vbit = 0x02 << nr;
2078         dbit = data->DIODE_MASK << nr;
2079         vbat = nct6775_read_value(data, data->REG_VBAT) & ~vbit;
2080         diode = nct6775_read_value(data, data->REG_DIODE) & ~dbit;
2081         switch (val) {
2082         case 1: /* CPU diode (diode, current mode) */
2083                 vbat |= vbit;
2084                 diode |= dbit;
2085                 break;
2086         case 3: /* diode, voltage mode */
2087                 vbat |= dbit;
2088                 break;
2089         case 4: /* thermistor */
2090                 break;
2091         }
2092         nct6775_write_value(data, data->REG_VBAT, vbat);
2093         nct6775_write_value(data, data->REG_DIODE, diode);
2094
2095         mutex_unlock(&data->update_lock);
2096         return count;
2097 }
2098
2099 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
2100                                        struct attribute *attr, int index)
2101 {
2102         struct device *dev = container_of(kobj, struct device, kobj);
2103         struct nct6775_data *data = dev_get_drvdata(dev);
2104         int temp = index / 10;  /* temp index */
2105         int nr = index % 10;    /* attribute index */
2106
2107         if (!(data->have_temp & (1 << temp)))
2108                 return 0;
2109
2110         if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0)
2111                 return 0;                               /* alarm */
2112
2113         if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0)
2114                 return 0;                               /* beep */
2115
2116         if (nr == 4 && !data->reg_temp[1][temp])        /* max */
2117                 return 0;
2118
2119         if (nr == 5 && !data->reg_temp[2][temp])        /* max_hyst */
2120                 return 0;
2121
2122         if (nr == 6 && !data->reg_temp[3][temp])        /* crit */
2123                 return 0;
2124
2125         if (nr == 7 && !data->reg_temp[4][temp])        /* lcrit */
2126                 return 0;
2127
2128         /* offset and type only apply to fixed sensors */
2129         if (nr > 7 && !(data->have_temp_fixed & (1 << temp)))
2130                 return 0;
2131
2132         return attr->mode;
2133 }
2134
2135 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", S_IRUGO, show_temp, NULL, 0, 0);
2136 SENSOR_TEMPLATE(temp_label, "temp%d_label", S_IRUGO, show_temp_label, NULL, 0);
2137 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", S_IRUGO | S_IWUSR, show_temp,
2138                   store_temp, 0, 1);
2139 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", S_IRUGO | S_IWUSR,
2140                   show_temp, store_temp, 0, 2);
2141 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", S_IRUGO | S_IWUSR, show_temp,
2142                   store_temp, 0, 3);
2143 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", S_IRUGO | S_IWUSR, show_temp,
2144                   store_temp, 0, 4);
2145 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", S_IRUGO | S_IWUSR,
2146                 show_temp_offset, store_temp_offset, 0);
2147 SENSOR_TEMPLATE(temp_type, "temp%d_type", S_IRUGO | S_IWUSR, show_temp_type,
2148                 store_temp_type, 0);
2149 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", S_IRUGO, show_temp_alarm, NULL, 0);
2150 SENSOR_TEMPLATE(temp_beep, "temp%d_beep", S_IRUGO | S_IWUSR, show_temp_beep,
2151                 store_temp_beep, 0);
2152
2153 /*
2154  * nct6775_temp_is_visible uses the index into the following array
2155  * to determine if attributes should be created or not.
2156  * Any change in order or content must be matched.
2157  */
2158 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
2159         &sensor_dev_template_temp_input,
2160         &sensor_dev_template_temp_label,
2161         &sensor_dev_template_temp_alarm,        /* 2 */
2162         &sensor_dev_template_temp_beep,         /* 3 */
2163         &sensor_dev_template_temp_max,          /* 4 */
2164         &sensor_dev_template_temp_max_hyst,     /* 5 */
2165         &sensor_dev_template_temp_crit,         /* 6 */
2166         &sensor_dev_template_temp_lcrit,        /* 7 */
2167         &sensor_dev_template_temp_offset,       /* 8 */
2168         &sensor_dev_template_temp_type,         /* 9 */
2169         NULL
2170 };
2171
2172 static struct sensor_template_group nct6775_temp_template_group = {
2173         .templates = nct6775_attributes_temp_template,
2174         .is_visible = nct6775_temp_is_visible,
2175         .base = 1,
2176 };
2177
2178 static ssize_t
2179 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
2180 {
2181         struct nct6775_data *data = nct6775_update_device(dev);
2182         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2183
2184         return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
2185 }
2186
2187 static ssize_t
2188 store_pwm_mode(struct device *dev, struct device_attribute *attr,
2189                const char *buf, size_t count)
2190 {
2191         struct nct6775_data *data = dev_get_drvdata(dev);
2192         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2193         int nr = sattr->index;
2194         unsigned long val;
2195         int err;
2196         u8 reg;
2197
2198         err = kstrtoul(buf, 10, &val);
2199         if (err < 0)
2200                 return err;
2201
2202         if (val > 1)
2203                 return -EINVAL;
2204
2205         /* Setting DC mode is not supported for all chips/channels */
2206         if (data->REG_PWM_MODE[nr] == 0) {
2207                 if (val)
2208                         return -EINVAL;
2209                 return count;
2210         }
2211
2212         mutex_lock(&data->update_lock);
2213         data->pwm_mode[nr] = val;
2214         reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
2215         reg &= ~data->PWM_MODE_MASK[nr];
2216         if (val)
2217                 reg |= data->PWM_MODE_MASK[nr];
2218         nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
2219         mutex_unlock(&data->update_lock);
2220         return count;
2221 }
2222
2223 static ssize_t
2224 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2225 {
2226         struct nct6775_data *data = nct6775_update_device(dev);
2227         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2228         int nr = sattr->nr;
2229         int index = sattr->index;
2230         int pwm;
2231
2232         /*
2233          * For automatic fan control modes, show current pwm readings.
2234          * Otherwise, show the configured value.
2235          */
2236         if (index == 0 && data->pwm_enable[nr] > manual)
2237                 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
2238         else
2239                 pwm = data->pwm[index][nr];
2240
2241         return sprintf(buf, "%d\n", pwm);
2242 }
2243
2244 static ssize_t
2245 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
2246           size_t count)
2247 {
2248         struct nct6775_data *data = dev_get_drvdata(dev);
2249         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2250         int nr = sattr->nr;
2251         int index = sattr->index;
2252         unsigned long val;
2253         int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
2254         int maxval[7]
2255           = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
2256         int err;
2257         u8 reg;
2258
2259         err = kstrtoul(buf, 10, &val);
2260         if (err < 0)
2261                 return err;
2262         val = clamp_val(val, minval[index], maxval[index]);
2263
2264         mutex_lock(&data->update_lock);
2265         data->pwm[index][nr] = val;
2266         nct6775_write_value(data, data->REG_PWM[index][nr], val);
2267         if (index == 2) { /* floor: disable if val == 0 */
2268                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2269                 reg &= 0x7f;
2270                 if (val)
2271                         reg |= 0x80;
2272                 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2273         }
2274         mutex_unlock(&data->update_lock);
2275         return count;
2276 }
2277
2278 /* Returns 0 if OK, -EINVAL otherwise */
2279 static int check_trip_points(struct nct6775_data *data, int nr)
2280 {
2281         int i;
2282
2283         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2284                 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
2285                         return -EINVAL;
2286         }
2287         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2288                 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
2289                         return -EINVAL;
2290         }
2291         /* validate critical temperature and pwm if enabled (pwm > 0) */
2292         if (data->auto_pwm[nr][data->auto_pwm_num]) {
2293                 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2294                                 data->auto_temp[nr][data->auto_pwm_num] ||
2295                     data->auto_pwm[nr][data->auto_pwm_num - 1] >
2296                                 data->auto_pwm[nr][data->auto_pwm_num])
2297                         return -EINVAL;
2298         }
2299         return 0;
2300 }
2301
2302 static void pwm_update_registers(struct nct6775_data *data, int nr)
2303 {
2304         u8 reg;
2305
2306         switch (data->pwm_enable[nr]) {
2307         case off:
2308         case manual:
2309                 break;
2310         case speed_cruise:
2311                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2312                 reg = (reg & ~data->tolerance_mask) |
2313                   (data->target_speed_tolerance[nr] & data->tolerance_mask);
2314                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2315                 nct6775_write_value(data, data->REG_TARGET[nr],
2316                                     data->target_speed[nr] & 0xff);
2317                 if (data->REG_TOLERANCE_H) {
2318                         reg = (data->target_speed[nr] >> 8) & 0x0f;
2319                         reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2320                         nct6775_write_value(data,
2321                                             data->REG_TOLERANCE_H[nr],
2322                                             reg);
2323                 }
2324                 break;
2325         case thermal_cruise:
2326                 nct6775_write_value(data, data->REG_TARGET[nr],
2327                                     data->target_temp[nr]);
2328                 /* intentional */
2329         default:
2330                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2331                 reg = (reg & ~data->tolerance_mask) |
2332                   data->temp_tolerance[0][nr];
2333                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2334                 break;
2335         }
2336 }
2337
2338 static ssize_t
2339 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2340 {
2341         struct nct6775_data *data = nct6775_update_device(dev);
2342         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2343
2344         return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2345 }
2346
2347 static ssize_t
2348 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2349                  const char *buf, size_t count)
2350 {
2351         struct nct6775_data *data = dev_get_drvdata(dev);
2352         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2353         int nr = sattr->index;
2354         unsigned long val;
2355         int err;
2356         u16 reg;
2357
2358         err = kstrtoul(buf, 10, &val);
2359         if (err < 0)
2360                 return err;
2361
2362         if (val > sf4)
2363                 return -EINVAL;
2364
2365         if (val == sf3 && data->kind != nct6775)
2366                 return -EINVAL;
2367
2368         if (val == sf4 && check_trip_points(data, nr)) {
2369                 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2370                 dev_err(dev, "Adjust trip points and try again\n");
2371                 return -EINVAL;
2372         }
2373
2374         mutex_lock(&data->update_lock);
2375         data->pwm_enable[nr] = val;
2376         if (val == off) {
2377                 /*
2378                  * turn off pwm control: select manual mode, set pwm to maximum
2379                  */
2380                 data->pwm[0][nr] = 255;
2381                 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2382         }
2383         pwm_update_registers(data, nr);
2384         reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2385         reg &= 0x0f;
2386         reg |= pwm_enable_to_reg(val) << 4;
2387         nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2388         mutex_unlock(&data->update_lock);
2389         return count;
2390 }
2391
2392 static ssize_t
2393 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2394 {
2395         int i, sel = 0;
2396
2397         for (i = 0; i < NUM_TEMP; i++) {
2398                 if (!(data->have_temp & (1 << i)))
2399                         continue;
2400                 if (src == data->temp_src[i]) {
2401                         sel = i + 1;
2402                         break;
2403                 }
2404         }
2405
2406         return sprintf(buf, "%d\n", sel);
2407 }
2408
2409 static ssize_t
2410 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2411 {
2412         struct nct6775_data *data = nct6775_update_device(dev);
2413         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2414         int index = sattr->index;
2415
2416         return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2417 }
2418
2419 static ssize_t
2420 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2421                    const char *buf, size_t count)
2422 {
2423         struct nct6775_data *data = nct6775_update_device(dev);
2424         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2425         int nr = sattr->index;
2426         unsigned long val;
2427         int err, reg, src;
2428
2429         err = kstrtoul(buf, 10, &val);
2430         if (err < 0)
2431                 return err;
2432         if (val == 0 || val > NUM_TEMP)
2433                 return -EINVAL;
2434         if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
2435                 return -EINVAL;
2436
2437         mutex_lock(&data->update_lock);
2438         src = data->temp_src[val - 1];
2439         data->pwm_temp_sel[nr] = src;
2440         reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2441         reg &= 0xe0;
2442         reg |= src;
2443         nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2444         mutex_unlock(&data->update_lock);
2445
2446         return count;
2447 }
2448
2449 static ssize_t
2450 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2451                          char *buf)
2452 {
2453         struct nct6775_data *data = nct6775_update_device(dev);
2454         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2455         int index = sattr->index;
2456
2457         return show_pwm_temp_sel_common(data, buf,
2458                                         data->pwm_weight_temp_sel[index]);
2459 }
2460
2461 static ssize_t
2462 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2463                           const char *buf, size_t count)
2464 {
2465         struct nct6775_data *data = nct6775_update_device(dev);
2466         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2467         int nr = sattr->index;
2468         unsigned long val;
2469         int err, reg, src;
2470
2471         err = kstrtoul(buf, 10, &val);
2472         if (err < 0)
2473                 return err;
2474         if (val > NUM_TEMP)
2475                 return -EINVAL;
2476         if (val && (!(data->have_temp & (1 << (val - 1))) ||
2477                     !data->temp_src[val - 1]))
2478                 return -EINVAL;
2479
2480         mutex_lock(&data->update_lock);
2481         if (val) {
2482                 src = data->temp_src[val - 1];
2483                 data->pwm_weight_temp_sel[nr] = src;
2484                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2485                 reg &= 0xe0;
2486                 reg |= (src | 0x80);
2487                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2488         } else {
2489                 data->pwm_weight_temp_sel[nr] = 0;
2490                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2491                 reg &= 0x7f;
2492                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2493         }
2494         mutex_unlock(&data->update_lock);
2495
2496         return count;
2497 }
2498
2499 static ssize_t
2500 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2501 {
2502         struct nct6775_data *data = nct6775_update_device(dev);
2503         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2504
2505         return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2506 }
2507
2508 static ssize_t
2509 store_target_temp(struct device *dev, struct device_attribute *attr,
2510                   const char *buf, size_t count)
2511 {
2512         struct nct6775_data *data = dev_get_drvdata(dev);
2513         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2514         int nr = sattr->index;
2515         unsigned long val;
2516         int err;
2517
2518         err = kstrtoul(buf, 10, &val);
2519         if (err < 0)
2520                 return err;
2521
2522         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2523                         data->target_temp_mask);
2524
2525         mutex_lock(&data->update_lock);
2526         data->target_temp[nr] = val;
2527         pwm_update_registers(data, nr);
2528         mutex_unlock(&data->update_lock);
2529         return count;
2530 }
2531
2532 static ssize_t
2533 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2534 {
2535         struct nct6775_data *data = nct6775_update_device(dev);
2536         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2537         int nr = sattr->index;
2538
2539         return sprintf(buf, "%d\n",
2540                        fan_from_reg16(data->target_speed[nr],
2541                                       data->fan_div[nr]));
2542 }
2543
2544 static ssize_t
2545 store_target_speed(struct device *dev, struct device_attribute *attr,
2546                    const char *buf, size_t count)
2547 {
2548         struct nct6775_data *data = dev_get_drvdata(dev);
2549         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2550         int nr = sattr->index;
2551         unsigned long val;
2552         int err;
2553         u16 speed;
2554
2555         err = kstrtoul(buf, 10, &val);
2556         if (err < 0)
2557                 return err;
2558
2559         val = clamp_val(val, 0, 1350000U);
2560         speed = fan_to_reg(val, data->fan_div[nr]);
2561
2562         mutex_lock(&data->update_lock);
2563         data->target_speed[nr] = speed;
2564         pwm_update_registers(data, nr);
2565         mutex_unlock(&data->update_lock);
2566         return count;
2567 }
2568
2569 static ssize_t
2570 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2571                     char *buf)
2572 {
2573         struct nct6775_data *data = nct6775_update_device(dev);
2574         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2575         int nr = sattr->nr;
2576         int index = sattr->index;
2577
2578         return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2579 }
2580
2581 static ssize_t
2582 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2583                      const char *buf, size_t count)
2584 {
2585         struct nct6775_data *data = dev_get_drvdata(dev);
2586         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2587         int nr = sattr->nr;
2588         int index = sattr->index;
2589         unsigned long val;
2590         int err;
2591
2592         err = kstrtoul(buf, 10, &val);
2593         if (err < 0)
2594                 return err;
2595
2596         /* Limit tolerance as needed */
2597         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2598
2599         mutex_lock(&data->update_lock);
2600         data->temp_tolerance[index][nr] = val;
2601         if (index)
2602                 pwm_update_registers(data, nr);
2603         else
2604                 nct6775_write_value(data,
2605                                     data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2606                                     val);
2607         mutex_unlock(&data->update_lock);
2608         return count;
2609 }
2610
2611 /*
2612  * Fan speed tolerance is a tricky beast, since the associated register is
2613  * a tick counter, but the value is reported and configured as rpm.
2614  * Compute resulting low and high rpm values and report the difference.
2615  */
2616 static ssize_t
2617 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2618                      char *buf)
2619 {
2620         struct nct6775_data *data = nct6775_update_device(dev);
2621         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2622         int nr = sattr->index;
2623         int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2624         int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2625         int tolerance;
2626
2627         if (low <= 0)
2628                 low = 1;
2629         if (high > 0xffff)
2630                 high = 0xffff;
2631         if (high < low)
2632                 high = low;
2633
2634         tolerance = (fan_from_reg16(low, data->fan_div[nr])
2635                      - fan_from_reg16(high, data->fan_div[nr])) / 2;
2636
2637         return sprintf(buf, "%d\n", tolerance);
2638 }
2639
2640 static ssize_t
2641 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2642                       const char *buf, size_t count)
2643 {
2644         struct nct6775_data *data = dev_get_drvdata(dev);
2645         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2646         int nr = sattr->index;
2647         unsigned long val;
2648         int err;
2649         int low, high;
2650
2651         err = kstrtoul(buf, 10, &val);
2652         if (err < 0)
2653                 return err;
2654
2655         high = fan_from_reg16(data->target_speed[nr],
2656                               data->fan_div[nr]) + val;
2657         low = fan_from_reg16(data->target_speed[nr],
2658                              data->fan_div[nr]) - val;
2659         if (low <= 0)
2660                 low = 1;
2661         if (high < low)
2662                 high = low;
2663
2664         val = (fan_to_reg(low, data->fan_div[nr]) -
2665                fan_to_reg(high, data->fan_div[nr])) / 2;
2666
2667         /* Limit tolerance as needed */
2668         val = clamp_val(val, 0, data->speed_tolerance_limit);
2669
2670         mutex_lock(&data->update_lock);
2671         data->target_speed_tolerance[nr] = val;
2672         pwm_update_registers(data, nr);
2673         mutex_unlock(&data->update_lock);
2674         return count;
2675 }
2676
2677 SENSOR_TEMPLATE_2(pwm, "pwm%d", S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2678 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", S_IWUSR | S_IRUGO, show_pwm_mode,
2679                 store_pwm_mode, 0);
2680 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", S_IWUSR | S_IRUGO, show_pwm_enable,
2681                 store_pwm_enable, 0);
2682 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", S_IWUSR | S_IRUGO,
2683                 show_pwm_temp_sel, store_pwm_temp_sel, 0);
2684 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", S_IWUSR | S_IRUGO,
2685                 show_target_temp, store_target_temp, 0);
2686 SENSOR_TEMPLATE(fan_target, "fan%d_target", S_IWUSR | S_IRUGO,
2687                 show_target_speed, store_target_speed, 0);
2688 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", S_IWUSR | S_IRUGO,
2689                 show_speed_tolerance, store_speed_tolerance, 0);
2690
2691 /* Smart Fan registers */
2692
2693 static ssize_t
2694 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2695 {
2696         struct nct6775_data *data = nct6775_update_device(dev);
2697         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2698         int nr = sattr->nr;
2699         int index = sattr->index;
2700
2701         return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2702 }
2703
2704 static ssize_t
2705 store_weight_temp(struct device *dev, struct device_attribute *attr,
2706                   const char *buf, size_t count)
2707 {
2708         struct nct6775_data *data = dev_get_drvdata(dev);
2709         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2710         int nr = sattr->nr;
2711         int index = sattr->index;
2712         unsigned long val;
2713         int err;
2714
2715         err = kstrtoul(buf, 10, &val);
2716         if (err < 0)
2717                 return err;
2718
2719         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2720
2721         mutex_lock(&data->update_lock);
2722         data->weight_temp[index][nr] = val;
2723         nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2724         mutex_unlock(&data->update_lock);
2725         return count;
2726 }
2727
2728 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", S_IWUSR | S_IRUGO,
2729                   show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
2730 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step",
2731                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 0);
2732 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol",
2733                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 1);
2734 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base",
2735                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 2);
2736 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step",
2737                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 5);
2738 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base",
2739                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 6);
2740
2741 static ssize_t
2742 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2743 {
2744         struct nct6775_data *data = nct6775_update_device(dev);
2745         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2746         int nr = sattr->nr;
2747         int index = sattr->index;
2748
2749         return sprintf(buf, "%d\n",
2750                        step_time_from_reg(data->fan_time[index][nr],
2751                                           data->pwm_mode[nr]));
2752 }
2753
2754 static ssize_t
2755 store_fan_time(struct device *dev, struct device_attribute *attr,
2756                const char *buf, size_t count)
2757 {
2758         struct nct6775_data *data = dev_get_drvdata(dev);
2759         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2760         int nr = sattr->nr;
2761         int index = sattr->index;
2762         unsigned long val;
2763         int err;
2764
2765         err = kstrtoul(buf, 10, &val);
2766         if (err < 0)
2767                 return err;
2768
2769         val = step_time_to_reg(val, data->pwm_mode[nr]);
2770         mutex_lock(&data->update_lock);
2771         data->fan_time[index][nr] = val;
2772         nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2773         mutex_unlock(&data->update_lock);
2774         return count;
2775 }
2776
2777 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
2778 static ssize_t
2779 show_name(struct device *dev, struct device_attribute *attr, char *buf)
2780 {
2781         struct nct6775_data *data = dev_get_drvdata(dev);
2782
2783         return sprintf(buf, "%s\n", data->name);
2784 }
2785
2786 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
2787 #endif
2788
2789 static ssize_t
2790 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2791 {
2792         struct nct6775_data *data = nct6775_update_device(dev);
2793         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2794
2795         return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2796 }
2797
2798 static ssize_t
2799 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2800                const char *buf, size_t count)
2801 {
2802         struct nct6775_data *data = dev_get_drvdata(dev);
2803         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2804         int nr = sattr->nr;
2805         int point = sattr->index;
2806         unsigned long val;
2807         int err;
2808         u8 reg;
2809
2810         err = kstrtoul(buf, 10, &val);
2811         if (err < 0)
2812                 return err;
2813         if (val > 255)
2814                 return -EINVAL;
2815
2816         if (point == data->auto_pwm_num) {
2817                 if (data->kind != nct6775 && !val)
2818                         return -EINVAL;
2819                 if (data->kind != nct6779 && val)
2820                         val = 0xff;
2821         }
2822
2823         mutex_lock(&data->update_lock);
2824         data->auto_pwm[nr][point] = val;
2825         if (point < data->auto_pwm_num) {
2826                 nct6775_write_value(data,
2827                                     NCT6775_AUTO_PWM(data, nr, point),
2828                                     data->auto_pwm[nr][point]);
2829         } else {
2830                 switch (data->kind) {
2831                 case nct6775:
2832                         /* disable if needed (pwm == 0) */
2833                         reg = nct6775_read_value(data,
2834                                                  NCT6775_REG_CRITICAL_ENAB[nr]);
2835                         if (val)
2836                                 reg |= 0x02;
2837                         else
2838                                 reg &= ~0x02;
2839                         nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
2840                                             reg);
2841                         break;
2842                 case nct6776:
2843                         break; /* always enabled, nothing to do */
2844                 case nct6106:
2845                 case nct6779:
2846                 case nct6791:
2847                 case nct6792:
2848                         nct6775_write_value(data, data->REG_CRITICAL_PWM[nr],
2849                                             val);
2850                         reg = nct6775_read_value(data,
2851                                         data->REG_CRITICAL_PWM_ENABLE[nr]);
2852                         if (val == 255)
2853                                 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
2854                         else
2855                                 reg |= data->CRITICAL_PWM_ENABLE_MASK;
2856                         nct6775_write_value(data,
2857                                             data->REG_CRITICAL_PWM_ENABLE[nr],
2858                                             reg);
2859                         break;
2860                 }
2861         }
2862         mutex_unlock(&data->update_lock);
2863         return count;
2864 }
2865
2866 static ssize_t
2867 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
2868 {
2869         struct nct6775_data *data = nct6775_update_device(dev);
2870         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2871         int nr = sattr->nr;
2872         int point = sattr->index;
2873
2874         /*
2875          * We don't know for sure if the temperature is signed or unsigned.
2876          * Assume it is unsigned.
2877          */
2878         return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
2879 }
2880
2881 static ssize_t
2882 store_auto_temp(struct device *dev, struct device_attribute *attr,
2883                 const char *buf, size_t count)
2884 {
2885         struct nct6775_data *data = dev_get_drvdata(dev);
2886         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2887         int nr = sattr->nr;
2888         int point = sattr->index;
2889         unsigned long val;
2890         int err;
2891
2892         err = kstrtoul(buf, 10, &val);
2893         if (err)
2894                 return err;
2895         if (val > 255000)
2896                 return -EINVAL;
2897
2898         mutex_lock(&data->update_lock);
2899         data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
2900         if (point < data->auto_pwm_num) {
2901                 nct6775_write_value(data,
2902                                     NCT6775_AUTO_TEMP(data, nr, point),
2903                                     data->auto_temp[nr][point]);
2904         } else {
2905                 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
2906                                     data->auto_temp[nr][point]);
2907         }
2908         mutex_unlock(&data->update_lock);
2909         return count;
2910 }
2911
2912 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
2913                                       struct attribute *attr, int index)
2914 {
2915         struct device *dev = container_of(kobj, struct device, kobj);
2916         struct nct6775_data *data = dev_get_drvdata(dev);
2917         int pwm = index / 36;   /* pwm index */
2918         int nr = index % 36;    /* attribute index */
2919
2920         if (!(data->has_pwm & (1 << pwm)))
2921                 return 0;
2922
2923         if ((nr >= 14 && nr <= 18) || nr == 21)   /* weight */
2924                 if (!data->REG_WEIGHT_TEMP_SEL[pwm])
2925                         return 0;
2926         if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
2927                 return 0;
2928         if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
2929                 return 0;
2930         if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
2931                 return 0;
2932
2933         if (nr >= 22 && nr <= 35) {             /* auto point */
2934                 int api = (nr - 22) / 2;        /* auto point index */
2935
2936                 if (api > data->auto_pwm_num)
2937                         return 0;
2938         }
2939         return attr->mode;
2940 }
2941
2942 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", S_IWUSR | S_IRUGO,
2943                   show_fan_time, store_fan_time, 0, 0);
2944 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", S_IWUSR | S_IRUGO,
2945                   show_fan_time, store_fan_time, 0, 1);
2946 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", S_IWUSR | S_IRUGO,
2947                   show_fan_time, store_fan_time, 0, 2);
2948 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", S_IWUSR | S_IRUGO, show_pwm,
2949                   store_pwm, 0, 1);
2950 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", S_IWUSR | S_IRUGO, show_pwm,
2951                   store_pwm, 0, 2);
2952 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", S_IWUSR | S_IRUGO,
2953                   show_temp_tolerance, store_temp_tolerance, 0, 0);
2954 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance",
2955                   S_IWUSR | S_IRUGO, show_temp_tolerance, store_temp_tolerance,
2956                   0, 1);
2957
2958 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2959                   0, 3);
2960
2961 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", S_IWUSR | S_IRUGO, show_pwm,
2962                   store_pwm, 0, 4);
2963
2964 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm",
2965                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 0);
2966 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp",
2967                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 0);
2968
2969 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm",
2970                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 1);
2971 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp",
2972                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 1);
2973
2974 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm",
2975                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 2);
2976 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp",
2977                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 2);
2978
2979 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm",
2980                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 3);
2981 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp",
2982                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 3);
2983
2984 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm",
2985                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 4);
2986 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp",
2987                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 4);
2988
2989 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm",
2990                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 5);
2991 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp",
2992                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 5);
2993
2994 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm",
2995                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 6);
2996 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp",
2997                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 6);
2998
2999 /*
3000  * nct6775_pwm_is_visible uses the index into the following array
3001  * to determine if attributes should be created or not.
3002  * Any change in order or content must be matched.
3003  */
3004 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
3005         &sensor_dev_template_pwm,
3006         &sensor_dev_template_pwm_mode,
3007         &sensor_dev_template_pwm_enable,
3008         &sensor_dev_template_pwm_temp_sel,
3009         &sensor_dev_template_pwm_temp_tolerance,
3010         &sensor_dev_template_pwm_crit_temp_tolerance,
3011         &sensor_dev_template_pwm_target_temp,
3012         &sensor_dev_template_fan_target,
3013         &sensor_dev_template_fan_tolerance,
3014         &sensor_dev_template_pwm_stop_time,
3015         &sensor_dev_template_pwm_step_up_time,
3016         &sensor_dev_template_pwm_step_down_time,
3017         &sensor_dev_template_pwm_start,
3018         &sensor_dev_template_pwm_floor,
3019         &sensor_dev_template_pwm_weight_temp_sel,       /* 14 */
3020         &sensor_dev_template_pwm_weight_temp_step,
3021         &sensor_dev_template_pwm_weight_temp_step_tol,
3022         &sensor_dev_template_pwm_weight_temp_step_base,
3023         &sensor_dev_template_pwm_weight_duty_step,      /* 18 */
3024         &sensor_dev_template_pwm_max,                   /* 19 */
3025         &sensor_dev_template_pwm_step,                  /* 20 */
3026         &sensor_dev_template_pwm_weight_duty_base,      /* 21 */
3027         &sensor_dev_template_pwm_auto_point1_pwm,       /* 22 */
3028         &sensor_dev_template_pwm_auto_point1_temp,
3029         &sensor_dev_template_pwm_auto_point2_pwm,
3030         &sensor_dev_template_pwm_auto_point2_temp,
3031         &sensor_dev_template_pwm_auto_point3_pwm,
3032         &sensor_dev_template_pwm_auto_point3_temp,
3033         &sensor_dev_template_pwm_auto_point4_pwm,
3034         &sensor_dev_template_pwm_auto_point4_temp,
3035         &sensor_dev_template_pwm_auto_point5_pwm,
3036         &sensor_dev_template_pwm_auto_point5_temp,
3037         &sensor_dev_template_pwm_auto_point6_pwm,
3038         &sensor_dev_template_pwm_auto_point6_temp,
3039         &sensor_dev_template_pwm_auto_point7_pwm,
3040         &sensor_dev_template_pwm_auto_point7_temp,      /* 35 */
3041
3042         NULL
3043 };
3044
3045 static struct sensor_template_group nct6775_pwm_template_group = {
3046         .templates = nct6775_attributes_pwm_template,
3047         .is_visible = nct6775_pwm_is_visible,
3048         .base = 1,
3049 };
3050
3051 static ssize_t
3052 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
3053 {
3054         struct nct6775_data *data = dev_get_drvdata(dev);
3055
3056         return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
3057 }
3058
3059 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
3060
3061 /* Case open detection */
3062
3063 static ssize_t
3064 clear_caseopen(struct device *dev, struct device_attribute *attr,
3065                const char *buf, size_t count)
3066 {
3067         struct nct6775_data *data = dev_get_drvdata(dev);
3068         int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
3069         unsigned long val;
3070         u8 reg;
3071         int ret;
3072
3073         if (kstrtoul(buf, 10, &val) || val != 0)
3074                 return -EINVAL;
3075
3076         mutex_lock(&data->update_lock);
3077
3078         /*
3079          * Use CR registers to clear caseopen status.
3080          * The CR registers are the same for all chips, and not all chips
3081          * support clearing the caseopen status through "regular" registers.
3082          */
3083         ret = superio_enter(data->sioreg);
3084         if (ret) {
3085                 count = ret;
3086                 goto error;
3087         }
3088
3089         superio_select(data->sioreg, NCT6775_LD_ACPI);
3090         reg = superio_inb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
3091         reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3092         superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3093         reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3094         superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3095         superio_exit(data->sioreg);
3096
3097         data->valid = false;    /* Force cache refresh */
3098 error:
3099         mutex_unlock(&data->update_lock);
3100         return count;
3101 }
3102
3103 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
3104                           clear_caseopen, INTRUSION_ALARM_BASE);
3105 static SENSOR_DEVICE_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
3106                           clear_caseopen, INTRUSION_ALARM_BASE + 1);
3107 static SENSOR_DEVICE_ATTR(intrusion0_beep, S_IWUSR | S_IRUGO, show_beep,
3108                           store_beep, INTRUSION_ALARM_BASE);
3109 static SENSOR_DEVICE_ATTR(intrusion1_beep, S_IWUSR | S_IRUGO, show_beep,
3110                           store_beep, INTRUSION_ALARM_BASE + 1);
3111 static SENSOR_DEVICE_ATTR(beep_enable, S_IWUSR | S_IRUGO, show_beep,
3112                           store_beep, BEEP_ENABLE_BASE);
3113
3114 static umode_t nct6775_other_is_visible(struct kobject *kobj,
3115                                         struct attribute *attr, int index)
3116 {
3117         struct device *dev = container_of(kobj, struct device, kobj);
3118         struct nct6775_data *data = dev_get_drvdata(dev);
3119
3120         if (index == 0 && !data->have_vid)
3121                 return 0;
3122
3123         if (index == 1 || index == 2) {
3124                 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + index - 1] < 0)
3125                         return 0;
3126         }
3127
3128         if (index == 3 || index == 4) {
3129                 if (data->BEEP_BITS[INTRUSION_ALARM_BASE + index - 3] < 0)
3130                         return 0;
3131         }
3132
3133         return attr->mode;
3134 }
3135
3136 /*
3137  * nct6775_other_is_visible uses the index into the following array
3138  * to determine if attributes should be created or not.
3139  * Any change in order or content must be matched.
3140  */
3141 static struct attribute *nct6775_attributes_other[] = {
3142         &dev_attr_cpu0_vid.attr,                                /* 0 */
3143         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,        /* 1 */
3144         &sensor_dev_attr_intrusion1_alarm.dev_attr.attr,        /* 2 */
3145         &sensor_dev_attr_intrusion0_beep.dev_attr.attr,         /* 3 */
3146         &sensor_dev_attr_intrusion1_beep.dev_attr.attr,         /* 4 */
3147         &sensor_dev_attr_beep_enable.dev_attr.attr,             /* 5 */
3148 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
3149         &dev_attr_name.attr,
3150 #endif
3151         NULL
3152 };
3153
3154 static const struct attribute_group nct6775_group_other = {
3155         .attrs = nct6775_attributes_other,
3156         .is_visible = nct6775_other_is_visible,
3157 };
3158
3159 static inline void nct6775_init_device(struct nct6775_data *data)
3160 {
3161         int i;
3162         u8 tmp, diode;
3163
3164         /* Start monitoring if needed */
3165         if (data->REG_CONFIG) {
3166                 tmp = nct6775_read_value(data, data->REG_CONFIG);
3167                 if (!(tmp & 0x01))
3168                         nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
3169         }
3170
3171         /* Enable temperature sensors if needed */
3172         for (i = 0; i < NUM_TEMP; i++) {
3173                 if (!(data->have_temp & (1 << i)))
3174                         continue;
3175                 if (!data->reg_temp_config[i])
3176                         continue;
3177                 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
3178                 if (tmp & 0x01)
3179                         nct6775_write_value(data, data->reg_temp_config[i],
3180                                             tmp & 0xfe);
3181         }
3182
3183         /* Enable VBAT monitoring if needed */
3184         tmp = nct6775_read_value(data, data->REG_VBAT);
3185         if (!(tmp & 0x01))
3186                 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
3187
3188         diode = nct6775_read_value(data, data->REG_DIODE);
3189
3190         for (i = 0; i < data->temp_fixed_num; i++) {
3191                 if (!(data->have_temp_fixed & (1 << i)))
3192                         continue;
3193                 if ((tmp & (data->DIODE_MASK << i)))    /* diode */
3194                         data->temp_type[i]
3195                           = 3 - ((diode >> i) & data->DIODE_MASK);
3196                 else                            /* thermistor */
3197                         data->temp_type[i] = 4;
3198         }
3199 }
3200
3201 static void
3202 nct6775_check_fan_inputs(struct nct6775_data *data)
3203 {
3204         bool fan3pin, fan4pin, fan4min, fan5pin, fan6pin;
3205         bool pwm3pin, pwm4pin, pwm5pin, pwm6pin;
3206         int sioreg = data->sioreg;
3207         int regval;
3208
3209         /* Store SIO_REG_ENABLE for use during resume */
3210         superio_select(sioreg, NCT6775_LD_HWM);
3211         data->sio_reg_enable = superio_inb(sioreg, SIO_REG_ENABLE);
3212
3213         /* fan4 and fan5 share some pins with the GPIO and serial flash */
3214         if (data->kind == nct6775) {
3215                 regval = superio_inb(sioreg, 0x2c);
3216
3217                 fan3pin = regval & (1 << 6);
3218                 pwm3pin = regval & (1 << 7);
3219
3220                 /* On NCT6775, fan4 shares pins with the fdc interface */
3221                 fan4pin = !(superio_inb(sioreg, 0x2A) & 0x80);
3222                 fan4min = false;
3223                 fan5pin = false;
3224                 fan6pin = false;
3225                 pwm4pin = false;
3226                 pwm5pin = false;
3227                 pwm6pin = false;
3228         } else if (data->kind == nct6776) {
3229                 bool gpok = superio_inb(sioreg, 0x27) & 0x80;
3230                 const char *board_vendor, *board_name;
3231
3232                 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
3233                 board_name = dmi_get_system_info(DMI_BOARD_NAME);
3234
3235                 if (board_name && board_vendor &&
3236                     !strcmp(board_vendor, "ASRock")) {
3237                         /*
3238                          * Auxiliary fan monitoring is not enabled on ASRock
3239                          * Z77 Pro4-M if booted in UEFI Ultra-FastBoot mode.
3240                          * Observed with BIOS version 2.00.
3241                          */
3242                         if (!strcmp(board_name, "Z77 Pro4-M")) {
3243                                 if ((data->sio_reg_enable & 0xe0) != 0xe0) {
3244                                         data->sio_reg_enable |= 0xe0;
3245                                         superio_outb(sioreg, SIO_REG_ENABLE,
3246                                                      data->sio_reg_enable);
3247                                 }
3248                         }
3249                 }
3250
3251                 if (data->sio_reg_enable & 0x80)
3252                         fan3pin = gpok;
3253                 else
3254                         fan3pin = !(superio_inb(sioreg, 0x24) & 0x40);
3255
3256                 if (data->sio_reg_enable & 0x40)
3257                         fan4pin = gpok;
3258                 else
3259                         fan4pin = superio_inb(sioreg, 0x1C) & 0x01;
3260
3261                 if (data->sio_reg_enable & 0x20)
3262                         fan5pin = gpok;
3263                 else
3264                         fan5pin = superio_inb(sioreg, 0x1C) & 0x02;
3265
3266                 fan4min = fan4pin;
3267                 fan6pin = false;
3268                 pwm3pin = fan3pin;
3269                 pwm4pin = false;
3270                 pwm5pin = false;
3271                 pwm6pin = false;
3272         } else if (data->kind == nct6106) {
3273                 regval = superio_inb(sioreg, 0x24);
3274                 fan3pin = !(regval & 0x80);
3275                 pwm3pin = regval & 0x08;
3276
3277                 fan4pin = false;
3278                 fan4min = false;
3279                 fan5pin = false;
3280                 fan6pin = false;
3281                 pwm4pin = false;
3282                 pwm5pin = false;
3283                 pwm6pin = false;
3284         } else {        /* NCT6779D, NCT6791D, or NCT6792D */
3285                 regval = superio_inb(sioreg, 0x1c);
3286
3287                 fan3pin = !(regval & (1 << 5));
3288                 fan4pin = !(regval & (1 << 6));
3289                 fan5pin = !(regval & (1 << 7));
3290
3291                 pwm3pin = !(regval & (1 << 0));
3292                 pwm4pin = !(regval & (1 << 1));
3293                 pwm5pin = !(regval & (1 << 2));
3294
3295                 fan4min = fan4pin;
3296
3297                 if (data->kind == nct6791 || data->kind == nct6792) {
3298                         regval = superio_inb(sioreg, 0x2d);
3299                         fan6pin = (regval & (1 << 1));
3300                         pwm6pin = (regval & (1 << 0));
3301                 } else {        /* NCT6779D */
3302                         fan6pin = false;
3303                         pwm6pin = false;
3304                 }
3305         }
3306
3307         /* fan 1 and 2 (0x03) are always present */
3308         data->has_fan = 0x03 | (fan3pin << 2) | (fan4pin << 3) |
3309                 (fan5pin << 4) | (fan6pin << 5);
3310         data->has_fan_min = 0x03 | (fan3pin << 2) | (fan4min << 3) |
3311                 (fan5pin << 4);
3312         data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) |
3313                 (pwm5pin << 4) | (pwm6pin << 5);
3314 }
3315
3316 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
3317                              int *available, int *mask)
3318 {
3319         int i;
3320         u8 src;
3321
3322         for (i = 0; i < data->pwm_num && *available; i++) {
3323                 int index;
3324
3325                 if (!regp[i])
3326                         continue;
3327                 src = nct6775_read_value(data, regp[i]);
3328                 src &= 0x1f;
3329                 if (!src || (*mask & (1 << src)))
3330                         continue;
3331                 if (src >= data->temp_label_num ||
3332                     !strlen(data->temp_label[src]))
3333                         continue;
3334
3335                 index = __ffs(*available);
3336                 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3337                 *available &= ~(1 << index);
3338                 *mask |= 1 << src;
3339         }
3340 }
3341
3342 static int nct6775_probe(struct platform_device *pdev)
3343 {
3344         struct device *dev = &pdev->dev;
3345         struct nct6775_sio_data *sio_data = dev_get_platdata(dev);
3346         struct nct6775_data *data;
3347         struct resource *res;
3348         int i, s, err = 0;
3349         int src, mask, available;
3350         const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3351         const u16 *reg_temp_mon, *reg_temp_alternate, *reg_temp_crit;
3352         const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL;
3353         int num_reg_temp, num_reg_temp_mon;
3354         u8 cr2a;
3355         struct attribute_group *group;
3356         struct device *hwmon_dev;
3357         int num_attr_groups = 0;
3358
3359         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3360         if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3361                                  DRVNAME))
3362                 return -EBUSY;
3363
3364         data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3365                             GFP_KERNEL);
3366         if (!data)
3367                 return -ENOMEM;
3368
3369         data->kind = sio_data->kind;
3370         data->sioreg = sio_data->sioreg;
3371         data->addr = res->start;
3372         mutex_init(&data->update_lock);
3373         data->name = nct6775_device_names[data->kind];
3374         data->bank = 0xff;              /* Force initial bank selection */
3375         platform_set_drvdata(pdev, data);
3376
3377         switch (data->kind) {
3378         case nct6106:
3379                 data->in_num = 9;
3380                 data->pwm_num = 3;
3381                 data->auto_pwm_num = 4;
3382                 data->temp_fixed_num = 3;
3383                 data->num_temp_alarms = 6;
3384                 data->num_temp_beeps = 6;
3385
3386                 data->fan_from_reg = fan_from_reg13;
3387                 data->fan_from_reg_min = fan_from_reg13;
3388
3389                 data->temp_label = nct6776_temp_label;
3390                 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3391
3392                 data->REG_VBAT = NCT6106_REG_VBAT;
3393                 data->REG_DIODE = NCT6106_REG_DIODE;
3394                 data->DIODE_MASK = NCT6106_DIODE_MASK;
3395                 data->REG_VIN = NCT6106_REG_IN;
3396                 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3397                 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3398                 data->REG_TARGET = NCT6106_REG_TARGET;
3399                 data->REG_FAN = NCT6106_REG_FAN;
3400                 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
3401                 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
3402                 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
3403                 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
3404                 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
3405                 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
3406                 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
3407                 data->REG_PWM[0] = NCT6106_REG_PWM;
3408                 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
3409                 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
3410                 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3411                 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3412                 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3413                 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3414                 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3415                 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
3416                 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
3417                 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
3418                 data->REG_CRITICAL_TEMP_TOLERANCE
3419                   = NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
3420                 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
3421                 data->CRITICAL_PWM_ENABLE_MASK
3422                   = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3423                 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
3424                 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3425                 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3426                 data->REG_TEMP_SEL = NCT6106_REG_TEMP_SEL;
3427                 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3428                 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3429                 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3430                 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3431                 data->REG_ALARM = NCT6106_REG_ALARM;
3432                 data->ALARM_BITS = NCT6106_ALARM_BITS;
3433                 data->REG_BEEP = NCT6106_REG_BEEP;
3434                 data->BEEP_BITS = NCT6106_BEEP_BITS;
3435
3436                 reg_temp = NCT6106_REG_TEMP;
3437                 reg_temp_mon = NCT6106_REG_TEMP_MON;
3438                 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3439                 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON);
3440                 reg_temp_over = NCT6106_REG_TEMP_OVER;
3441                 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3442                 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3443                 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3444                 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3445                 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3446                 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3447
3448                 break;
3449         case nct6775:
3450                 data->in_num = 9;
3451                 data->pwm_num = 3;
3452                 data->auto_pwm_num = 6;
3453                 data->has_fan_div = true;
3454                 data->temp_fixed_num = 3;
3455                 data->num_temp_alarms = 3;
3456                 data->num_temp_beeps = 3;
3457
3458                 data->ALARM_BITS = NCT6775_ALARM_BITS;
3459                 data->BEEP_BITS = NCT6775_BEEP_BITS;
3460
3461                 data->fan_from_reg = fan_from_reg16;
3462                 data->fan_from_reg_min = fan_from_reg8;
3463                 data->target_temp_mask = 0x7f;
3464                 data->tolerance_mask = 0x0f;
3465                 data->speed_tolerance_limit = 15;
3466
3467                 data->temp_label = nct6775_temp_label;
3468                 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
3469
3470                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3471                 data->REG_VBAT = NCT6775_REG_VBAT;
3472                 data->REG_DIODE = NCT6775_REG_DIODE;
3473                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3474                 data->REG_VIN = NCT6775_REG_IN;
3475                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3476                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3477                 data->REG_TARGET = NCT6775_REG_TARGET;
3478                 data->REG_FAN = NCT6775_REG_FAN;
3479                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3480                 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3481                 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3482                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3483                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3484                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3485                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3486                 data->REG_PWM[0] = NCT6775_REG_PWM;
3487                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3488                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3489                 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3490                 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3491                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3492                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3493                 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3494                 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3495                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3496                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3497                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3498                 data->REG_CRITICAL_TEMP_TOLERANCE
3499                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3500                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3501                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3502                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3503                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3504                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3505                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3506                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3507                 data->REG_ALARM = NCT6775_REG_ALARM;
3508                 data->REG_BEEP = NCT6775_REG_BEEP;
3509
3510                 reg_temp = NCT6775_REG_TEMP;
3511                 reg_temp_mon = NCT6775_REG_TEMP_MON;
3512                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3513                 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3514                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3515                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3516                 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3517                 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3518                 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3519
3520                 break;
3521         case nct6776:
3522                 data->in_num = 9;
3523                 data->pwm_num = 3;
3524                 data->auto_pwm_num = 4;
3525                 data->has_fan_div = false;
3526                 data->temp_fixed_num = 3;
3527                 data->num_temp_alarms = 3;
3528                 data->num_temp_beeps = 6;
3529
3530                 data->ALARM_BITS = NCT6776_ALARM_BITS;
3531                 data->BEEP_BITS = NCT6776_BEEP_BITS;
3532
3533                 data->fan_from_reg = fan_from_reg13;
3534                 data->fan_from_reg_min = fan_from_reg13;
3535                 data->target_temp_mask = 0xff;
3536                 data->tolerance_mask = 0x07;
3537                 data->speed_tolerance_limit = 63;
3538
3539                 data->temp_label = nct6776_temp_label;
3540                 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3541
3542                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3543                 data->REG_VBAT = NCT6775_REG_VBAT;
3544                 data->REG_DIODE = NCT6775_REG_DIODE;
3545                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3546                 data->REG_VIN = NCT6775_REG_IN;
3547                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3548                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3549                 data->REG_TARGET = NCT6775_REG_TARGET;
3550                 data->REG_FAN = NCT6775_REG_FAN;
3551                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3552                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3553                 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3554                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3555                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3556                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3557                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3558                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3559                 data->REG_PWM[0] = NCT6775_REG_PWM;
3560                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3561                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3562                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3563                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3564                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3565                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3566                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3567                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3568                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3569                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3570                 data->REG_CRITICAL_TEMP_TOLERANCE
3571                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3572                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3573                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3574                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3575                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3576                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3577                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3578                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3579                 data->REG_ALARM = NCT6775_REG_ALARM;
3580                 data->REG_BEEP = NCT6776_REG_BEEP;
3581
3582                 reg_temp = NCT6775_REG_TEMP;
3583                 reg_temp_mon = NCT6775_REG_TEMP_MON;
3584                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3585                 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3586                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3587                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3588                 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3589                 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3590                 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3591
3592                 break;
3593         case nct6779:
3594                 data->in_num = 15;
3595                 data->pwm_num = 5;
3596                 data->auto_pwm_num = 4;
3597                 data->has_fan_div = false;
3598                 data->temp_fixed_num = 6;
3599                 data->num_temp_alarms = 2;
3600                 data->num_temp_beeps = 2;
3601
3602                 data->ALARM_BITS = NCT6779_ALARM_BITS;
3603                 data->BEEP_BITS = NCT6779_BEEP_BITS;
3604
3605                 data->fan_from_reg = fan_from_reg13;
3606                 data->fan_from_reg_min = fan_from_reg13;
3607                 data->target_temp_mask = 0xff;
3608                 data->tolerance_mask = 0x07;
3609                 data->speed_tolerance_limit = 63;
3610
3611                 data->temp_label = nct6779_temp_label;
3612                 data->temp_label_num = NCT6779_NUM_LABELS;
3613
3614                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3615                 data->REG_VBAT = NCT6775_REG_VBAT;
3616                 data->REG_DIODE = NCT6775_REG_DIODE;
3617                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3618                 data->REG_VIN = NCT6779_REG_IN;
3619                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3620                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3621                 data->REG_TARGET = NCT6775_REG_TARGET;
3622                 data->REG_FAN = NCT6779_REG_FAN;
3623                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3624                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3625                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3626                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3627                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3628                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3629                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3630                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3631                 data->REG_PWM[0] = NCT6775_REG_PWM;
3632                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3633                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3634                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3635                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3636                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3637                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3638                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3639                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3640                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3641                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3642                 data->REG_CRITICAL_TEMP_TOLERANCE
3643                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3644                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3645                 data->CRITICAL_PWM_ENABLE_MASK
3646                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3647                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3648                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3649                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3650                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3651                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3652                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3653                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3654                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3655                 data->REG_ALARM = NCT6779_REG_ALARM;
3656                 data->REG_BEEP = NCT6776_REG_BEEP;
3657
3658                 reg_temp = NCT6779_REG_TEMP;
3659                 reg_temp_mon = NCT6779_REG_TEMP_MON;
3660                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3661                 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3662                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3663                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3664                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3665                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3666                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3667
3668                 break;
3669         case nct6791:
3670         case nct6792:
3671                 data->in_num = 15;
3672                 data->pwm_num = 6;
3673                 data->auto_pwm_num = 4;
3674                 data->has_fan_div = false;
3675                 data->temp_fixed_num = 6;
3676                 data->num_temp_alarms = 2;
3677                 data->num_temp_beeps = 2;
3678
3679                 data->ALARM_BITS = NCT6791_ALARM_BITS;
3680                 data->BEEP_BITS = NCT6779_BEEP_BITS;
3681
3682                 data->fan_from_reg = fan_from_reg13;
3683                 data->fan_from_reg_min = fan_from_reg13;
3684                 data->target_temp_mask = 0xff;
3685                 data->tolerance_mask = 0x07;
3686                 data->speed_tolerance_limit = 63;
3687
3688                 data->temp_label = nct6779_temp_label;
3689                 data->temp_label_num = NCT6791_NUM_LABELS;
3690
3691                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3692                 data->REG_VBAT = NCT6775_REG_VBAT;
3693                 data->REG_DIODE = NCT6775_REG_DIODE;
3694                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3695                 data->REG_VIN = NCT6779_REG_IN;
3696                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3697                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3698                 data->REG_TARGET = NCT6775_REG_TARGET;
3699                 data->REG_FAN = NCT6779_REG_FAN;
3700                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3701                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3702                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3703                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3704                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3705                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3706                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3707                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3708                 data->REG_PWM[0] = NCT6775_REG_PWM;
3709                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3710                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3711                 data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP;
3712                 data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE;
3713                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3714                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3715                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3716                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3717                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3718                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3719                 data->REG_CRITICAL_TEMP_TOLERANCE
3720                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3721                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3722                 data->CRITICAL_PWM_ENABLE_MASK
3723                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3724                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3725                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3726                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3727                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3728                 data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL;
3729                 data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP;
3730                 data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL;
3731                 data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE;
3732                 data->REG_ALARM = NCT6791_REG_ALARM;
3733                 if (data->kind == nct6791)
3734                         data->REG_BEEP = NCT6776_REG_BEEP;
3735                 else
3736                         data->REG_BEEP = NCT6792_REG_BEEP;
3737
3738                 reg_temp = NCT6779_REG_TEMP;
3739                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3740                 if (data->kind == nct6791) {
3741                         reg_temp_mon = NCT6779_REG_TEMP_MON;
3742                         num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3743                 } else {
3744                         reg_temp_mon = NCT6792_REG_TEMP_MON;
3745                         num_reg_temp_mon = ARRAY_SIZE(NCT6792_REG_TEMP_MON);
3746                 }
3747                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3748                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3749                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3750                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3751                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3752
3753                 break;
3754         default:
3755                 return -ENODEV;
3756         }
3757         data->have_in = (1 << data->in_num) - 1;
3758         data->have_temp = 0;
3759
3760         /*
3761          * On some boards, not all available temperature sources are monitored,
3762          * even though some of the monitoring registers are unused.
3763          * Get list of unused monitoring registers, then detect if any fan
3764          * controls are configured to use unmonitored temperature sources.
3765          * If so, assign the unmonitored temperature sources to available
3766          * monitoring registers.
3767          */
3768         mask = 0;
3769         available = 0;
3770         for (i = 0; i < num_reg_temp; i++) {
3771                 if (reg_temp[i] == 0)
3772                         continue;
3773
3774                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3775                 if (!src || (mask & (1 << src)))
3776                         available |= 1 << i;
3777
3778                 mask |= 1 << src;
3779         }
3780
3781         /*
3782          * Now find unmonitored temperature registers and enable monitoring
3783          * if additional monitoring registers are available.
3784          */
3785         add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
3786         add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
3787
3788         mask = 0;
3789         s = NUM_TEMP_FIXED;     /* First dynamic temperature attribute */
3790         for (i = 0; i < num_reg_temp; i++) {
3791                 if (reg_temp[i] == 0)
3792                         continue;
3793
3794                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3795                 if (!src || (mask & (1 << src)))
3796                         continue;
3797
3798                 if (src >= data->temp_label_num ||
3799                     !strlen(data->temp_label[src])) {
3800                         dev_info(dev,
3801                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3802                                  src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
3803                         continue;
3804                 }
3805
3806                 mask |= 1 << src;
3807
3808                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3809                 if (src <= data->temp_fixed_num) {
3810                         data->have_temp |= 1 << (src - 1);
3811                         data->have_temp_fixed |= 1 << (src - 1);
3812                         data->reg_temp[0][src - 1] = reg_temp[i];
3813                         data->reg_temp[1][src - 1] = reg_temp_over[i];
3814                         data->reg_temp[2][src - 1] = reg_temp_hyst[i];
3815                         if (reg_temp_crit_h && reg_temp_crit_h[i])
3816                                 data->reg_temp[3][src - 1] = reg_temp_crit_h[i];
3817                         else if (reg_temp_crit[src - 1])
3818                                 data->reg_temp[3][src - 1]
3819                                   = reg_temp_crit[src - 1];
3820                         if (reg_temp_crit_l && reg_temp_crit_l[i])
3821                                 data->reg_temp[4][src - 1] = reg_temp_crit_l[i];
3822                         data->reg_temp_config[src - 1] = reg_temp_config[i];
3823                         data->temp_src[src - 1] = src;
3824                         continue;
3825                 }
3826
3827                 if (s >= NUM_TEMP)
3828                         continue;
3829
3830                 /* Use dynamic index for other sources */
3831                 data->have_temp |= 1 << s;
3832                 data->reg_temp[0][s] = reg_temp[i];
3833                 data->reg_temp[1][s] = reg_temp_over[i];
3834                 data->reg_temp[2][s] = reg_temp_hyst[i];
3835                 data->reg_temp_config[s] = reg_temp_config[i];
3836                 if (reg_temp_crit_h && reg_temp_crit_h[i])
3837                         data->reg_temp[3][s] = reg_temp_crit_h[i];
3838                 else if (reg_temp_crit[src - 1])
3839                         data->reg_temp[3][s] = reg_temp_crit[src - 1];
3840                 if (reg_temp_crit_l && reg_temp_crit_l[i])
3841                         data->reg_temp[4][s] = reg_temp_crit_l[i];
3842
3843                 data->temp_src[s] = src;
3844                 s++;
3845         }
3846
3847         /*
3848          * Repeat with temperatures used for fan control.
3849          * This set of registers does not support limits.
3850          */
3851         for (i = 0; i < num_reg_temp_mon; i++) {
3852                 if (reg_temp_mon[i] == 0)
3853                         continue;
3854
3855                 src = nct6775_read_value(data, data->REG_TEMP_SEL[i]) & 0x1f;
3856                 if (!src || (mask & (1 << src)))
3857                         continue;
3858
3859                 if (src >= data->temp_label_num ||
3860                     !strlen(data->temp_label[src])) {
3861                         dev_info(dev,
3862                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3863                                  src, i, data->REG_TEMP_SEL[i],
3864                                  reg_temp_mon[i]);
3865                         continue;
3866                 }
3867
3868                 mask |= 1 << src;
3869
3870                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3871                 if (src <= data->temp_fixed_num) {
3872                         if (data->have_temp & (1 << (src - 1)))
3873                                 continue;
3874                         data->have_temp |= 1 << (src - 1);
3875                         data->have_temp_fixed |= 1 << (src - 1);
3876                         data->reg_temp[0][src - 1] = reg_temp_mon[i];
3877                         data->temp_src[src - 1] = src;
3878                         continue;
3879                 }
3880
3881                 if (s >= NUM_TEMP)
3882                         continue;
3883
3884                 /* Use dynamic index for other sources */
3885                 data->have_temp |= 1 << s;
3886                 data->reg_temp[0][s] = reg_temp_mon[i];
3887                 data->temp_src[s] = src;
3888                 s++;
3889         }
3890
3891 #ifdef USE_ALTERNATE
3892         /*
3893          * Go through the list of alternate temp registers and enable
3894          * if possible.
3895          * The temperature is already monitored if the respective bit in <mask>
3896          * is set.
3897          */
3898         for (i = 0; i < data->temp_label_num - 1; i++) {
3899                 if (!reg_temp_alternate[i])
3900                         continue;
3901                 if (mask & (1 << (i + 1)))
3902                         continue;
3903                 if (i < data->temp_fixed_num) {
3904                         if (data->have_temp & (1 << i))
3905                                 continue;
3906                         data->have_temp |= 1 << i;
3907                         data->have_temp_fixed |= 1 << i;
3908                         data->reg_temp[0][i] = reg_temp_alternate[i];
3909                         if (i < num_reg_temp) {
3910                                 data->reg_temp[1][i] = reg_temp_over[i];
3911                                 data->reg_temp[2][i] = reg_temp_hyst[i];
3912                         }
3913                         data->temp_src[i] = i + 1;
3914                         continue;
3915                 }
3916
3917                 if (s >= NUM_TEMP)      /* Abort if no more space */
3918                         break;
3919
3920                 data->have_temp |= 1 << s;
3921                 data->reg_temp[0][s] = reg_temp_alternate[i];
3922                 data->temp_src[s] = i + 1;
3923                 s++;
3924         }
3925 #endif /* USE_ALTERNATE */
3926
3927         /* Initialize the chip */
3928         nct6775_init_device(data);
3929
3930         err = superio_enter(sio_data->sioreg);
3931         if (err)
3932                 return err;
3933
3934         cr2a = superio_inb(sio_data->sioreg, 0x2a);
3935         switch (data->kind) {
3936         case nct6775:
3937                 data->have_vid = (cr2a & 0x40);
3938                 break;
3939         case nct6776:
3940                 data->have_vid = (cr2a & 0x60) == 0x40;
3941                 break;
3942         case nct6106:
3943         case nct6779:
3944         case nct6791:
3945         case nct6792:
3946                 break;
3947         }
3948
3949         /*
3950          * Read VID value
3951          * We can get the VID input values directly at logical device D 0xe3.
3952          */
3953         if (data->have_vid) {
3954                 superio_select(sio_data->sioreg, NCT6775_LD_VID);
3955                 data->vid = superio_inb(sio_data->sioreg, 0xe3);
3956                 data->vrm = vid_which_vrm();
3957         }
3958
3959         if (fan_debounce) {
3960                 u8 tmp;
3961
3962                 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3963                 tmp = superio_inb(sio_data->sioreg,
3964                                   NCT6775_REG_CR_FAN_DEBOUNCE);
3965                 switch (data->kind) {
3966                 case nct6106:
3967                         tmp |= 0xe0;
3968                         break;
3969                 case nct6775:
3970                         tmp |= 0x1e;
3971                         break;
3972                 case nct6776:
3973                 case nct6779:
3974                         tmp |= 0x3e;
3975                         break;
3976                 case nct6791:
3977                 case nct6792:
3978                         tmp |= 0x7e;
3979                         break;
3980                 }
3981                 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
3982                              tmp);
3983                 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
3984                          data->name);
3985         }
3986
3987         nct6775_check_fan_inputs(data);
3988
3989         superio_exit(sio_data->sioreg);
3990
3991         /* Read fan clock dividers immediately */
3992         nct6775_init_fan_common(dev, data);
3993
3994         /* Register sysfs hooks */
3995         group = nct6775_create_attr_group(dev, &nct6775_pwm_template_group,
3996                                           data->pwm_num);
3997         if (IS_ERR(group))
3998                 return PTR_ERR(group);
3999
4000         data->groups[num_attr_groups++] = group;
4001
4002         group = nct6775_create_attr_group(dev, &nct6775_in_template_group,
4003                                           fls(data->have_in));
4004         if (IS_ERR(group))
4005                 return PTR_ERR(group);
4006
4007         data->groups[num_attr_groups++] = group;
4008
4009         group = nct6775_create_attr_group(dev, &nct6775_fan_template_group,
4010                                           fls(data->has_fan));
4011         if (IS_ERR(group))
4012                 return PTR_ERR(group);
4013
4014         data->groups[num_attr_groups++] = group;
4015
4016         group = nct6775_create_attr_group(dev, &nct6775_temp_template_group,
4017                                           fls(data->have_temp));
4018         if (IS_ERR(group))
4019                 return PTR_ERR(group);
4020
4021         data->groups[num_attr_groups++] = group;
4022         data->groups[num_attr_groups++] = &nct6775_group_other;
4023
4024 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4025         err = sysfs_create_groups(&dev->kobj, data->groups);
4026         if (err < 0)
4027                 return err;
4028         hwmon_dev = hwmon_device_register(dev);
4029         if (IS_ERR(hwmon_dev)) {
4030                 sysfs_remove_groups(&dev->kobj, data->groups);
4031                 return PTR_ERR(hwmon_dev);
4032         }
4033         data->hwmon_dev = hwmon_dev;
4034 #else
4035         hwmon_dev = devm_hwmon_device_register_with_groups(dev, data->name,
4036                                                            data, data->groups);
4037 #endif
4038         return PTR_ERR_OR_ZERO(hwmon_dev);
4039 }
4040
4041 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4042 static int nct6775_remove(struct platform_device *pdev)
4043 {
4044         struct nct6775_data *data = platform_get_drvdata(pdev);
4045
4046         hwmon_device_unregister(data->hwmon_dev);
4047         sysfs_remove_groups(&pdev->dev.kobj, data->groups);
4048         return 0;
4049 }
4050 #endif
4051
4052 static void nct6791_enable_io_mapping(int sioaddr)
4053 {
4054         int val;
4055
4056         val = superio_inb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE);
4057         if (val & 0x10) {
4058                 pr_info("Enabling hardware monitor logical device mappings.\n");
4059                 superio_outb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE,
4060                              val & ~0x10);
4061         }
4062 }
4063
4064 static int __maybe_unused nct6775_suspend(struct device *dev)
4065 {
4066         struct nct6775_data *data = nct6775_update_device(dev);
4067
4068         mutex_lock(&data->update_lock);
4069         data->vbat = nct6775_read_value(data, data->REG_VBAT);
4070         if (data->kind == nct6775) {
4071                 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
4072                 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
4073         }
4074         mutex_unlock(&data->update_lock);
4075
4076         return 0;
4077 }
4078
4079 static int __maybe_unused nct6775_resume(struct device *dev)
4080 {
4081         struct nct6775_data *data = dev_get_drvdata(dev);
4082         int sioreg = data->sioreg;
4083         int i, j, err = 0;
4084         u8 reg;
4085
4086         mutex_lock(&data->update_lock);
4087         data->bank = 0xff;              /* Force initial bank selection */
4088
4089         err = superio_enter(sioreg);
4090         if (err)
4091                 goto abort;
4092
4093         superio_select(sioreg, NCT6775_LD_HWM);
4094         reg = superio_inb(sioreg, SIO_REG_ENABLE);
4095         if (reg != data->sio_reg_enable)
4096                 superio_outb(sioreg, SIO_REG_ENABLE, data->sio_reg_enable);
4097
4098         if (data->kind == nct6791 || data->kind == nct6792)
4099                 nct6791_enable_io_mapping(sioreg);
4100
4101         superio_exit(sioreg);
4102
4103         /* Restore limits */
4104         for (i = 0; i < data->in_num; i++) {
4105                 if (!(data->have_in & (1 << i)))
4106                         continue;
4107
4108                 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
4109                                     data->in[i][1]);
4110                 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
4111                                     data->in[i][2]);
4112         }
4113
4114         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
4115                 if (!(data->has_fan_min & (1 << i)))
4116                         continue;
4117
4118                 nct6775_write_value(data, data->REG_FAN_MIN[i],
4119                                     data->fan_min[i]);
4120         }
4121
4122         for (i = 0; i < NUM_TEMP; i++) {
4123                 if (!(data->have_temp & (1 << i)))
4124                         continue;
4125
4126                 for (j = 1; j < ARRAY_SIZE(data->reg_temp); j++)
4127                         if (data->reg_temp[j][i])
4128                                 nct6775_write_temp(data, data->reg_temp[j][i],
4129                                                    data->temp[j][i]);
4130         }
4131
4132         /* Restore other settings */
4133         nct6775_write_value(data, data->REG_VBAT, data->vbat);
4134         if (data->kind == nct6775) {
4135                 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
4136                 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
4137         }
4138
4139 abort:
4140         /* Force re-reading all values */
4141         data->valid = false;
4142         mutex_unlock(&data->update_lock);
4143
4144         return err;
4145 }
4146
4147 static SIMPLE_DEV_PM_OPS(nct6775_dev_pm_ops, nct6775_suspend, nct6775_resume);
4148
4149 static struct platform_driver nct6775_driver = {
4150         .driver = {
4151                 .owner  = THIS_MODULE,
4152                 .name   = DRVNAME,
4153                 .pm     = &nct6775_dev_pm_ops,
4154         },
4155         .probe          = nct6775_probe,
4156 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4157         .remove         = nct6775_remove,
4158 #endif
4159 };
4160
4161 static const char * const nct6775_sio_names[] __initconst = {
4162         "NCT6106D",
4163         "NCT6775F",
4164         "NCT6776D/F",
4165         "NCT6779D",
4166         "NCT6791D",
4167         "NCT6792D",
4168 };
4169
4170 /* nct6775_find() looks for a '627 in the Super-I/O config space */
4171 static int __init nct6775_find(int sioaddr, struct nct6775_sio_data *sio_data)
4172 {
4173         u16 val;
4174         int err;
4175         int addr;
4176
4177         err = superio_enter(sioaddr);
4178         if (err)
4179                 return err;
4180
4181         if (force_id)
4182                 val = force_id;
4183         else
4184                 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
4185                     | superio_inb(sioaddr, SIO_REG_DEVID + 1);
4186         switch (val & SIO_ID_MASK) {
4187         case SIO_NCT6106_ID:
4188                 sio_data->kind = nct6106;
4189                 break;
4190         case SIO_NCT6775_ID:
4191                 sio_data->kind = nct6775;
4192                 break;
4193         case SIO_NCT6776_ID:
4194                 sio_data->kind = nct6776;
4195                 break;
4196         case SIO_NCT6779_ID:
4197                 sio_data->kind = nct6779;
4198                 break;
4199         case SIO_NCT6791_ID:
4200                 sio_data->kind = nct6791;
4201                 break;
4202         case SIO_NCT6792_ID:
4203                 sio_data->kind = nct6792;
4204                 break;
4205         default:
4206                 if (val != 0xffff)
4207                         pr_debug("unsupported chip ID: 0x%04x\n", val);
4208                 superio_exit(sioaddr);
4209                 return -ENODEV;
4210         }
4211
4212         /* We have a known chip, find the HWM I/O address */
4213         superio_select(sioaddr, NCT6775_LD_HWM);
4214         val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
4215             | superio_inb(sioaddr, SIO_REG_ADDR + 1);
4216         addr = val & IOREGION_ALIGNMENT;
4217         if (addr == 0) {
4218                 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
4219                 superio_exit(sioaddr);
4220                 return -ENODEV;
4221         }
4222
4223         /* Activate logical device if needed */
4224         val = superio_inb(sioaddr, SIO_REG_ENABLE);
4225         if (!(val & 0x01)) {
4226                 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
4227                 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
4228         }
4229
4230         if (sio_data->kind == nct6791 || sio_data->kind == nct6792)
4231                 nct6791_enable_io_mapping(sioaddr);
4232
4233         superio_exit(sioaddr);
4234         pr_info("Found %s or compatible chip at %#x:%#x\n",
4235                 nct6775_sio_names[sio_data->kind], sioaddr, addr);
4236         sio_data->sioreg = sioaddr;
4237
4238         return addr;
4239 }
4240
4241 /*
4242  * when Super-I/O functions move to a separate file, the Super-I/O
4243  * bus will manage the lifetime of the device and this module will only keep
4244  * track of the nct6775 driver. But since we use platform_device_alloc(), we
4245  * must keep track of the device
4246  */
4247 static struct platform_device *pdev[2];
4248
4249 static int __init sensors_nct6775_init(void)
4250 {
4251         int i, err;
4252         bool found = false;
4253         int address;
4254         struct resource res;
4255         struct nct6775_sio_data sio_data;
4256         int sioaddr[2] = { 0x2e, 0x4e };
4257
4258         err = platform_driver_register(&nct6775_driver);
4259         if (err)
4260                 return err;
4261
4262         /*
4263          * initialize sio_data->kind and sio_data->sioreg.
4264          *
4265          * when Super-I/O functions move to a separate file, the Super-I/O
4266          * driver will probe 0x2e and 0x4e and auto-detect the presence of a
4267          * nct6775 hardware monitor, and call probe()
4268          */
4269         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4270                 address = nct6775_find(sioaddr[i], &sio_data);
4271                 if (address <= 0)
4272                         continue;
4273
4274                 found = true;
4275
4276                 pdev[i] = platform_device_alloc(DRVNAME, address);
4277                 if (!pdev[i]) {
4278                         err = -ENOMEM;
4279                         goto exit_device_unregister;
4280                 }
4281
4282                 err = platform_device_add_data(pdev[i], &sio_data,
4283                                                sizeof(struct nct6775_sio_data));
4284                 if (err)
4285                         goto exit_device_put;
4286
4287                 memset(&res, 0, sizeof(res));
4288                 res.name = DRVNAME;
4289                 res.start = address + IOREGION_OFFSET;
4290                 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
4291                 res.flags = IORESOURCE_IO;
4292
4293                 err = acpi_check_resource_conflict(&res);
4294                 if (err) {
4295                         platform_device_put(pdev[i]);
4296                         pdev[i] = NULL;
4297                         continue;
4298                 }
4299
4300                 err = platform_device_add_resources(pdev[i], &res, 1);
4301                 if (err)
4302                         goto exit_device_put;
4303
4304                 /* platform_device_add calls probe() */
4305                 err = platform_device_add(pdev[i]);
4306                 if (err)
4307                         goto exit_device_put;
4308         }
4309         if (!found) {
4310                 err = -ENODEV;
4311                 goto exit_unregister;
4312         }
4313
4314         return 0;
4315
4316 exit_device_put:
4317         platform_device_put(pdev[i]);
4318 exit_device_unregister:
4319         while (--i >= 0) {
4320                 if (pdev[i])
4321                         platform_device_unregister(pdev[i]);
4322         }
4323 exit_unregister:
4324         platform_driver_unregister(&nct6775_driver);
4325         return err;
4326 }
4327
4328 static void __exit sensors_nct6775_exit(void)
4329 {
4330         int i;
4331
4332         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4333                 if (pdev[i])
4334                         platform_device_unregister(pdev[i]);
4335         }
4336         platform_driver_unregister(&nct6775_driver);
4337 }
4338
4339 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4340 MODULE_DESCRIPTION("NCT6106D/NCT6775F/NCT6776F/NCT6779D/NCT6791D/NCT6792D driver");
4341 MODULE_LICENSE("GPL");
4342
4343 module_init(sensors_nct6775_init);
4344 module_exit(sensors_nct6775_exit);