2 * nct6775 - Driver for the hardware monitoring functionality of
3 * Nuvoton NCT677x Super-I/O chips
5 * Copyright (C) 2012 Guenter Roeck <linux@roeck-us.net>
7 * Derived from w83627ehf driver
8 * Copyright (C) 2005-2012 Jean Delvare <khali@linux-fr.org>
9 * Copyright (C) 2006 Yuan Mu (Winbond),
10 * Rudolf Marek <r.marek@assembler.cz>
11 * David Hubbard <david.c.hubbard@gmail.com>
12 * Daniel J Blueman <daniel.blueman@gmail.com>
13 * Copyright (C) 2010 Sheng-Yuan Huang (Nuvoton) (PS00)
15 * Shamelessly ripped from the w83627hf driver
16 * Copyright (C) 2003 Mark Studebaker
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
33 * Supports the following chips:
35 * Chip #vin #fan #pwm #temp chip IDs man ID
36 * nct6106d 9 3 3 6+3 0xc450 0xc1 0x5ca3
37 * nct6775f 9 4 3 6+3 0xb470 0xc1 0x5ca3
38 * nct6776f 9 5 3 6+3 0xc330 0xc1 0x5ca3
39 * nct6779d 15 5 5 2+6 0xc560 0xc1 0x5ca3
40 * nct6791d 15 6 6 2+6 0xc800 0xc1 0x5ca3
42 * #temp lists the number of monitored temperature sources (first value) plus
43 * the number of directly connectable temperature sensors (second value).
46 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
48 #include <linux/module.h>
49 #include <linux/init.h>
50 #include <linux/slab.h>
51 #include <linux/jiffies.h>
52 #include <linux/platform_device.h>
53 #include <linux/hwmon.h>
54 #include <linux/hwmon-sysfs.h>
55 #include <linux/hwmon-vid.h>
56 #include <linux/err.h>
57 #include <linux/mutex.h>
58 #include <linux/acpi.h>
65 enum kinds { nct6106, nct6775, nct6776, nct6779, nct6791 };
67 /* used to set data->name = nct6775_device_names[data->sio_kind] */
68 static const char * const nct6775_device_names[] = {
76 static unsigned short force_id;
77 module_param(force_id, ushort, 0);
78 MODULE_PARM_DESC(force_id, "Override the detected device ID");
80 static unsigned short fan_debounce;
81 module_param(fan_debounce, ushort, 0);
82 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
84 #define DRVNAME "nct6775"
87 * Super-I/O constants and functions
90 #define NCT6775_LD_ACPI 0x0a
91 #define NCT6775_LD_HWM 0x0b
92 #define NCT6775_LD_VID 0x0d
94 #define SIO_REG_LDSEL 0x07 /* Logical device select */
95 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
96 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
97 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
99 #define SIO_NCT6106_ID 0xc450
100 #define SIO_NCT6775_ID 0xb470
101 #define SIO_NCT6776_ID 0xc330
102 #define SIO_NCT6779_ID 0xc560
103 #define SIO_NCT6791_ID 0xc800
104 #define SIO_ID_MASK 0xFFF0
106 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
109 superio_outb(int ioreg, int reg, int val)
112 outb(val, ioreg + 1);
116 superio_inb(int ioreg, int reg)
119 return inb(ioreg + 1);
123 superio_select(int ioreg, int ld)
125 outb(SIO_REG_LDSEL, ioreg);
130 superio_enter(int ioreg)
133 * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
135 if (!request_muxed_region(ioreg, 2, DRVNAME))
145 superio_exit(int ioreg)
149 outb(0x02, ioreg + 1);
150 release_region(ioreg, 2);
157 #define IOREGION_ALIGNMENT (~7)
158 #define IOREGION_OFFSET 5
159 #define IOREGION_LENGTH 2
160 #define ADDR_REG_OFFSET 0
161 #define DATA_REG_OFFSET 1
163 #define NCT6775_REG_BANK 0x4E
164 #define NCT6775_REG_CONFIG 0x40
167 * Not currently used:
168 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
169 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
170 * REG_MAN_ID is at port 0x4f
171 * REG_CHIP_ID is at port 0x58
174 #define NUM_TEMP 10 /* Max number of temp attribute sets w/ limits*/
175 #define NUM_TEMP_FIXED 6 /* Max number of fixed temp attribute sets */
177 #define NUM_REG_ALARM 7 /* Max number of alarm registers */
178 #define NUM_REG_BEEP 5 /* Max number of beep registers */
182 /* Common and NCT6775 specific data */
184 /* Voltage min/max registers for nr=7..14 are in bank 5 */
186 static const u16 NCT6775_REG_IN_MAX[] = {
187 0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
188 0x55c, 0x55e, 0x560, 0x562 };
189 static const u16 NCT6775_REG_IN_MIN[] = {
190 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
191 0x55d, 0x55f, 0x561, 0x563 };
192 static const u16 NCT6775_REG_IN[] = {
193 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
196 #define NCT6775_REG_VBAT 0x5D
197 #define NCT6775_REG_DIODE 0x5E
198 #define NCT6775_DIODE_MASK 0x02
200 #define NCT6775_REG_FANDIV1 0x506
201 #define NCT6775_REG_FANDIV2 0x507
203 #define NCT6775_REG_CR_FAN_DEBOUNCE 0xf0
205 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
207 /* 0..15 voltages, 16..23 fans, 24..29 temperatures, 30..31 intrusion */
209 static const s8 NCT6775_ALARM_BITS[] = {
210 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
211 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
213 6, 7, 11, -1, -1, /* fan1..fan5 */
214 -1, -1, -1, /* unused */
215 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
216 12, -1 }; /* intrusion0, intrusion1 */
218 #define FAN_ALARM_BASE 16
219 #define TEMP_ALARM_BASE 24
220 #define INTRUSION_ALARM_BASE 30
222 static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e };
225 * 0..14 voltages, 15 global beep enable, 16..23 fans, 24..29 temperatures,
228 static const s8 NCT6775_BEEP_BITS[] = {
229 0, 1, 2, 3, 8, 9, 10, 16, /* in0.. in7 */
230 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
231 21, /* global beep enable */
232 6, 7, 11, 28, -1, /* fan1..fan5 */
233 -1, -1, -1, /* unused */
234 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
235 12, -1 }; /* intrusion0, intrusion1 */
237 #define BEEP_ENABLE_BASE 15
239 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
240 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
242 /* DC or PWM output fan configuration */
243 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
244 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
246 /* Advanced Fan control, some values are common for all fans */
248 static const u16 NCT6775_REG_TARGET[] = {
249 0x101, 0x201, 0x301, 0x801, 0x901, 0xa01 };
250 static const u16 NCT6775_REG_FAN_MODE[] = {
251 0x102, 0x202, 0x302, 0x802, 0x902, 0xa02 };
252 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
253 0x103, 0x203, 0x303, 0x803, 0x903, 0xa03 };
254 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
255 0x104, 0x204, 0x304, 0x804, 0x904, 0xa04 };
256 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
257 0x105, 0x205, 0x305, 0x805, 0x905, 0xa05 };
258 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = {
259 0x106, 0x206, 0x306, 0x806, 0x906, 0xa06 };
260 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
261 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
263 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
264 0x107, 0x207, 0x307, 0x807, 0x907, 0xa07 };
265 static const u16 NCT6775_REG_PWM[] = {
266 0x109, 0x209, 0x309, 0x809, 0x909, 0xa09 };
267 static const u16 NCT6775_REG_PWM_READ[] = {
268 0x01, 0x03, 0x11, 0x13, 0x15, 0xa09 };
270 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
271 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
272 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
273 static const u16 NCT6775_FAN_PULSE_SHIFT[] = { 0, 0, 0, 0, 0, 0 };
275 static const u16 NCT6775_REG_TEMP[] = {
276 0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
278 static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77 };
280 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
281 0, 0x152, 0x252, 0x628, 0x629, 0x62A };
282 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
283 0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
284 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
285 0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
287 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
288 0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
290 static const u16 NCT6775_REG_TEMP_SEL[] = {
291 0x100, 0x200, 0x300, 0x800, 0x900, 0xa00 };
293 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
294 0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 };
295 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
296 0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a };
297 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
298 0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b };
299 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
300 0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c };
301 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
302 0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d };
304 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
306 static const u16 NCT6775_REG_AUTO_TEMP[] = {
307 0x121, 0x221, 0x321, 0x821, 0x921, 0xa21 };
308 static const u16 NCT6775_REG_AUTO_PWM[] = {
309 0x127, 0x227, 0x327, 0x827, 0x927, 0xa27 };
311 #define NCT6775_AUTO_TEMP(data, nr, p) ((data)->REG_AUTO_TEMP[nr] + (p))
312 #define NCT6775_AUTO_PWM(data, nr, p) ((data)->REG_AUTO_PWM[nr] + (p))
314 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
316 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
317 0x135, 0x235, 0x335, 0x835, 0x935, 0xa35 };
318 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
319 0x138, 0x238, 0x338, 0x838, 0x938, 0xa38 };
321 static const char *const nct6775_temp_label[] = {
335 "PCH_CHIP_CPU_MAX_TEMP",
345 static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
346 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
348 static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
349 = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
352 /* NCT6776 specific data */
354 static const s8 NCT6776_ALARM_BITS[] = {
355 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
356 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
358 6, 7, 11, 10, 23, /* fan1..fan5 */
359 -1, -1, -1, /* unused */
360 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
361 12, 9 }; /* intrusion0, intrusion1 */
363 static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5 };
365 static const s8 NCT6776_BEEP_BITS[] = {
366 0, 1, 2, 3, 4, 5, 6, 7, /* in0.. in7 */
367 8, -1, -1, -1, -1, -1, -1, /* in8..in14 */
368 24, /* global beep enable */
369 25, 26, 27, 28, 29, /* fan1..fan5 */
370 -1, -1, -1, /* unused */
371 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
372 30, 31 }; /* intrusion0, intrusion1 */
374 static const u16 NCT6776_REG_TOLERANCE_H[] = {
375 0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c };
377 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0 };
378 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0 };
380 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
381 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
383 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
384 0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e };
386 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
387 0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
389 static const char *const nct6776_temp_label[] = {
404 "PCH_CHIP_CPU_MAX_TEMP",
415 static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
416 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
418 static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
419 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
421 /* NCT6779 specific data */
423 static const u16 NCT6779_REG_IN[] = {
424 0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
425 0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
427 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
428 0x459, 0x45A, 0x45B, 0x568 };
430 static const s8 NCT6779_ALARM_BITS[] = {
431 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
432 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */
434 6, 7, 11, 10, 23, /* fan1..fan5 */
435 -1, -1, -1, /* unused */
436 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
437 12, 9 }; /* intrusion0, intrusion1 */
439 static const s8 NCT6779_BEEP_BITS[] = {
440 0, 1, 2, 3, 4, 5, 6, 7, /* in0.. in7 */
441 8, 9, 10, 11, 12, 13, 14, /* in8..in14 */
442 24, /* global beep enable */
443 25, 26, 27, 28, 29, /* fan1..fan5 */
444 -1, -1, -1, /* unused */
445 16, 17, -1, -1, -1, -1, /* temp1..temp6 */
446 30, 31 }; /* intrusion0, intrusion1 */
448 static const u16 NCT6779_REG_FAN[] = {
449 0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8, 0x4ba };
450 static const u16 NCT6779_REG_FAN_PULSES[] = {
451 0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
453 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
454 0x136, 0x236, 0x336, 0x836, 0x936, 0xa36 };
455 #define NCT6779_CRITICAL_PWM_ENABLE_MASK 0x01
456 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
457 0x137, 0x237, 0x337, 0x837, 0x937, 0xa37 };
459 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
460 static const u16 NCT6779_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b };
461 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
463 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
465 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
468 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
469 0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
471 static const char *const nct6779_temp_label[] = {
490 "PCH_CHIP_CPU_MAX_TEMP",
501 static const u16 NCT6779_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6779_temp_label) - 1]
502 = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
503 0, 0, 0, 0, 0, 0, 0, 0,
504 0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
507 static const u16 NCT6779_REG_TEMP_CRIT[ARRAY_SIZE(nct6779_temp_label) - 1]
508 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
510 /* NCT6791 specific data */
512 #define NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE 0x28
514 static const u16 NCT6791_REG_WEIGHT_TEMP_SEL[6] = { 0, 0x239 };
515 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP[6] = { 0, 0x23a };
516 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP_TOL[6] = { 0, 0x23b };
517 static const u16 NCT6791_REG_WEIGHT_DUTY_STEP[6] = { 0, 0x23c };
518 static const u16 NCT6791_REG_WEIGHT_TEMP_BASE[6] = { 0, 0x23d };
519 static const u16 NCT6791_REG_WEIGHT_DUTY_BASE[6] = { 0, 0x23e };
521 static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = {
522 0x459, 0x45A, 0x45B, 0x568, 0x45D };
524 static const s8 NCT6791_ALARM_BITS[] = {
525 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
526 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */
528 6, 7, 11, 10, 23, 33, /* fan1..fan6 */
530 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
531 12, 9 }; /* intrusion0, intrusion1 */
534 /* NCT6102D/NCT6106D specific data */
536 #define NCT6106_REG_VBAT 0x318
537 #define NCT6106_REG_DIODE 0x319
538 #define NCT6106_DIODE_MASK 0x01
540 static const u16 NCT6106_REG_IN_MAX[] = {
541 0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
542 static const u16 NCT6106_REG_IN_MIN[] = {
543 0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
544 static const u16 NCT6106_REG_IN[] = {
545 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
547 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
548 static const u16 NCT6106_REG_TEMP_MON[] = { 0x18, 0x19, 0x1a };
549 static const u16 NCT6106_REG_TEMP_HYST[] = {
550 0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
551 static const u16 NCT6106_REG_TEMP_OVER[] = {
552 0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
553 static const u16 NCT6106_REG_TEMP_CRIT_L[] = {
554 0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
555 static const u16 NCT6106_REG_TEMP_CRIT_H[] = {
556 0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
557 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
558 static const u16 NCT6106_REG_TEMP_CONFIG[] = {
559 0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
561 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
562 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
563 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0, 0 };
564 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4, 0, 0 };
566 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
567 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
568 static const u16 NCT6106_REG_PWM[] = { 0x119, 0x129, 0x139 };
569 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c };
570 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
571 static const u16 NCT6106_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130 };
572 static const u16 NCT6106_REG_TEMP_SOURCE[] = {
573 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
575 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
576 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = {
577 0x11b, 0x12b, 0x13b };
579 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
580 #define NCT6106_CRITICAL_PWM_ENABLE_MASK 0x10
581 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
583 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
584 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
585 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
586 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
587 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
588 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
590 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
592 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
593 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
594 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
595 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x17c };
596 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
597 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
599 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
600 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
602 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = {
603 0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
605 static const s8 NCT6106_ALARM_BITS[] = {
606 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */
607 9, -1, -1, -1, -1, -1, -1, /* in8..in14 */
609 32, 33, 34, -1, -1, /* fan1..fan5 */
610 -1, -1, -1, /* unused */
611 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
612 48, -1 /* intrusion0, intrusion1 */
615 static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = {
616 0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 };
618 static const s8 NCT6106_BEEP_BITS[] = {
619 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */
620 9, 10, 11, 12, -1, -1, -1, /* in8..in14 */
621 32, /* global beep enable */
622 24, 25, 26, 27, 28, /* fan1..fan5 */
623 -1, -1, -1, /* unused */
624 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
625 34, -1 /* intrusion0, intrusion1 */
628 static const u16 NCT6106_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
629 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x51, 0x52, 0x54 };
631 static const u16 NCT6106_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
632 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x204, 0x205 };
634 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
636 if (mode == 0 && pwm == 255)
641 static int pwm_enable_to_reg(enum pwm_enable mode)
652 /* 1 is DC mode, output in ms */
653 static unsigned int step_time_from_reg(u8 reg, u8 mode)
655 return mode ? 400 * reg : 100 * reg;
658 static u8 step_time_to_reg(unsigned int msec, u8 mode)
660 return clamp_val((mode ? (msec + 200) / 400 :
661 (msec + 50) / 100), 1, 255);
664 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
666 if (reg == 0 || reg == 255)
668 return 1350000U / (reg << divreg);
671 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
673 if ((reg & 0xff1f) == 0xff1f)
676 reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
681 return 1350000U / reg;
684 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
686 if (reg == 0 || reg == 0xffff)
690 * Even though the registers are 16 bit wide, the fan divisor
693 return 1350000U / (reg << divreg);
696 static u16 fan_to_reg(u32 fan, unsigned int divreg)
701 return (1350000U / fan) >> divreg;
704 static inline unsigned int
711 * Some of the voltage inputs have internal scaling, the tables below
712 * contain 8 (the ADC LSB in mV) * scaling factor * 100
714 static const u16 scale_in[15] = {
715 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
719 static inline long in_from_reg(u8 reg, u8 nr)
721 return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
724 static inline u8 in_to_reg(u32 val, u8 nr)
726 return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
730 * Data structures and manipulation thereof
733 struct nct6775_data {
734 int addr; /* IO base of hw monitor block */
735 int sioreg; /* SIO register address */
739 struct device *hwmon_dev;
740 struct attribute_group *group_in;
741 struct attribute_group *group_fan;
742 struct attribute_group *group_temp;
743 struct attribute_group *group_pwm;
745 u16 reg_temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
746 * 3=temp_crit, 4=temp_lcrit
748 u8 temp_src[NUM_TEMP];
749 u16 reg_temp_config[NUM_TEMP];
750 const char * const *temp_label;
758 const s8 *ALARM_BITS;
762 const u16 *REG_IN_MINMAX[2];
764 const u16 *REG_TARGET;
766 const u16 *REG_FAN_MODE;
767 const u16 *REG_FAN_MIN;
768 const u16 *REG_FAN_PULSES;
769 const u16 *FAN_PULSE_SHIFT;
770 const u16 *REG_FAN_TIME[3];
772 const u16 *REG_TOLERANCE_H;
774 const u8 *REG_PWM_MODE;
775 const u8 *PWM_MODE_MASK;
777 const u16 *REG_PWM[7]; /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
778 * [3]=pwm_max, [4]=pwm_step,
779 * [5]=weight_duty_step, [6]=weight_duty_base
781 const u16 *REG_PWM_READ;
783 const u16 *REG_CRITICAL_PWM_ENABLE;
784 u8 CRITICAL_PWM_ENABLE_MASK;
785 const u16 *REG_CRITICAL_PWM;
787 const u16 *REG_AUTO_TEMP;
788 const u16 *REG_AUTO_PWM;
790 const u16 *REG_CRITICAL_TEMP;
791 const u16 *REG_CRITICAL_TEMP_TOLERANCE;
793 const u16 *REG_TEMP_SOURCE; /* temp register sources */
794 const u16 *REG_TEMP_SEL;
795 const u16 *REG_WEIGHT_TEMP_SEL;
796 const u16 *REG_WEIGHT_TEMP[3]; /* 0=base, 1=tolerance, 2=step */
798 const u16 *REG_TEMP_OFFSET;
800 const u16 *REG_ALARM;
803 unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
804 unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
806 struct mutex update_lock;
807 bool valid; /* true if following fields are valid */
808 unsigned long last_updated; /* In jiffies */
810 /* Register values */
811 u8 bank; /* current register bank */
812 u8 in_num; /* number of in inputs we have */
813 u8 in[15][3]; /* [0]=in, [1]=in_max, [2]=in_min */
814 unsigned int rpm[NUM_FAN];
815 u16 fan_min[NUM_FAN];
816 u8 fan_pulses[NUM_FAN];
819 u8 has_fan; /* some fan inputs can be disabled */
820 u8 has_fan_min; /* some fans don't have min register */
823 u8 num_temp_alarms; /* 2, 3, or 6 */
824 u8 num_temp_beeps; /* 2, 3, or 6 */
825 u8 temp_fixed_num; /* 3 or 6 */
826 u8 temp_type[NUM_TEMP_FIXED];
827 s8 temp_offset[NUM_TEMP_FIXED];
828 s16 temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
829 * 3=temp_crit, 4=temp_lcrit */
833 u8 pwm_num; /* number of pwm */
834 u8 pwm_mode[NUM_FAN]; /* 1->DC variable voltage,
835 * 0->PWM variable duty cycle
837 enum pwm_enable pwm_enable[NUM_FAN];
840 * 2->thermal cruise mode (also called SmartFan I)
841 * 3->fan speed cruise mode
843 * 5->enhanced variable thermal cruise (SmartFan IV)
845 u8 pwm[7][NUM_FAN]; /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
846 * [3]=pwm_max, [4]=pwm_step,
847 * [5]=weight_duty_step, [6]=weight_duty_base
850 u8 target_temp[NUM_FAN];
852 u32 target_speed[NUM_FAN];
853 u32 target_speed_tolerance[NUM_FAN];
854 u8 speed_tolerance_limit;
856 u8 temp_tolerance[2][NUM_FAN];
859 u8 fan_time[3][NUM_FAN]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
861 /* Automatic fan speed control registers */
863 u8 auto_pwm[NUM_FAN][7];
864 u8 auto_temp[NUM_FAN][7];
865 u8 pwm_temp_sel[NUM_FAN];
866 u8 pwm_weight_temp_sel[NUM_FAN];
867 u8 weight_temp[3][NUM_FAN]; /* 0->temp_step, 1->temp_step_tol,
880 /* Remember extra register values over suspend/resume */
887 struct nct6775_sio_data {
892 struct sensor_device_template {
893 struct device_attribute dev_attr;
901 bool s2; /* true if both index and nr are used */
904 struct sensor_device_attr_u {
906 struct sensor_device_attribute a1;
907 struct sensor_device_attribute_2 a2;
912 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) { \
913 .attr = {.name = _template, .mode = _mode }, \
918 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \
919 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
923 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \
925 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
926 .u.s.index = _index, \
930 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
931 static struct sensor_device_template sensor_dev_template_##_name \
932 = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, \
935 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store, \
937 static struct sensor_device_template sensor_dev_template_##_name \
938 = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \
941 struct sensor_template_group {
942 struct sensor_device_template **templates;
943 umode_t (*is_visible)(struct kobject *, struct attribute *, int);
947 static struct attribute_group *
948 nct6775_create_attr_group(struct device *dev, struct sensor_template_group *tg,
951 struct attribute_group *group;
952 struct sensor_device_attr_u *su;
953 struct sensor_device_attribute *a;
954 struct sensor_device_attribute_2 *a2;
955 struct attribute **attrs;
956 struct sensor_device_template **t;
957 int err, i, j, count;
960 return ERR_PTR(-EINVAL);
963 for (count = 0; *t; t++, count++)
967 return ERR_PTR(-EINVAL);
969 group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
971 return ERR_PTR(-ENOMEM);
973 attrs = devm_kzalloc(dev, sizeof(*attrs) * (repeat * count + 1),
976 return ERR_PTR(-ENOMEM);
978 su = devm_kzalloc(dev, sizeof(*su) * repeat * count,
981 return ERR_PTR(-ENOMEM);
983 group->attrs = attrs;
984 group->is_visible = tg->is_visible;
986 for (i = 0; i < repeat; i++) {
988 for (j = 0; *t != NULL; j++) {
989 snprintf(su->name, sizeof(su->name),
990 (*t)->dev_attr.attr.name, tg->base + i);
993 a2->dev_attr.attr.name = su->name;
994 a2->nr = (*t)->u.s.nr + i;
995 a2->index = (*t)->u.s.index;
996 a2->dev_attr.attr.mode =
997 (*t)->dev_attr.attr.mode;
998 a2->dev_attr.show = (*t)->dev_attr.show;
999 a2->dev_attr.store = (*t)->dev_attr.store;
1000 *attrs = &a2->dev_attr.attr;
1003 a->dev_attr.attr.name = su->name;
1004 a->index = (*t)->u.index + i;
1005 a->dev_attr.attr.mode =
1006 (*t)->dev_attr.attr.mode;
1007 a->dev_attr.show = (*t)->dev_attr.show;
1008 a->dev_attr.store = (*t)->dev_attr.store;
1009 *attrs = &a->dev_attr.attr;
1017 err = sysfs_create_group(&dev->kobj, group);
1019 return ERR_PTR(-ENOMEM);
1024 static bool is_word_sized(struct nct6775_data *data, u16 reg)
1026 switch (data->kind) {
1028 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1029 reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
1030 reg == 0x111 || reg == 0x121 || reg == 0x131;
1032 return (((reg & 0xff00) == 0x100 ||
1033 (reg & 0xff00) == 0x200) &&
1034 ((reg & 0x00ff) == 0x50 ||
1035 (reg & 0x00ff) == 0x53 ||
1036 (reg & 0x00ff) == 0x55)) ||
1037 (reg & 0xfff0) == 0x630 ||
1038 reg == 0x640 || reg == 0x642 ||
1040 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1041 reg == 0x73 || reg == 0x75 || reg == 0x77;
1043 return (((reg & 0xff00) == 0x100 ||
1044 (reg & 0xff00) == 0x200) &&
1045 ((reg & 0x00ff) == 0x50 ||
1046 (reg & 0x00ff) == 0x53 ||
1047 (reg & 0x00ff) == 0x55)) ||
1048 (reg & 0xfff0) == 0x630 ||
1050 reg == 0x640 || reg == 0x642 ||
1051 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1052 reg == 0x73 || reg == 0x75 || reg == 0x77;
1055 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
1056 ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x0b) ||
1058 reg == 0x63a || reg == 0x63c || reg == 0x63e ||
1059 reg == 0x640 || reg == 0x642 ||
1060 reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
1067 * On older chips, only registers 0x50-0x5f are banked.
1068 * On more recent chips, all registers are banked.
1069 * Assume that is the case and set the bank number for each access.
1070 * Cache the bank number so it only needs to be set if it changes.
1072 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
1075 if (data->bank != bank) {
1076 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
1077 outb_p(bank, data->addr + DATA_REG_OFFSET);
1082 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
1084 int res, word_sized = is_word_sized(data, reg);
1086 nct6775_set_bank(data, reg);
1087 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1088 res = inb_p(data->addr + DATA_REG_OFFSET);
1090 outb_p((reg & 0xff) + 1,
1091 data->addr + ADDR_REG_OFFSET);
1092 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
1097 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
1099 int word_sized = is_word_sized(data, reg);
1101 nct6775_set_bank(data, reg);
1102 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1104 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
1105 outb_p((reg & 0xff) + 1,
1106 data->addr + ADDR_REG_OFFSET);
1108 outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
1112 /* We left-align 8-bit temperature values to make the code simpler */
1113 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
1117 res = nct6775_read_value(data, reg);
1118 if (!is_word_sized(data, reg))
1124 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
1126 if (!is_word_sized(data, reg))
1128 return nct6775_write_value(data, reg, value);
1131 /* This function assumes that the caller holds data->update_lock */
1132 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
1138 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
1139 | (data->fan_div[0] & 0x7);
1140 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1143 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
1144 | ((data->fan_div[1] << 4) & 0x70);
1145 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1148 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
1149 | (data->fan_div[2] & 0x7);
1150 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1153 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
1154 | ((data->fan_div[3] << 4) & 0x70);
1155 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1160 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
1162 if (data->kind == nct6775)
1163 nct6775_write_fan_div(data, nr);
1166 static void nct6775_update_fan_div(struct nct6775_data *data)
1170 i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
1171 data->fan_div[0] = i & 0x7;
1172 data->fan_div[1] = (i & 0x70) >> 4;
1173 i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
1174 data->fan_div[2] = i & 0x7;
1175 if (data->has_fan & (1 << 3))
1176 data->fan_div[3] = (i & 0x70) >> 4;
1179 static void nct6775_update_fan_div_common(struct nct6775_data *data)
1181 if (data->kind == nct6775)
1182 nct6775_update_fan_div(data);
1185 static void nct6775_init_fan_div(struct nct6775_data *data)
1189 nct6775_update_fan_div_common(data);
1191 * For all fans, start with highest divider value if the divider
1192 * register is not initialized. This ensures that we get a
1193 * reading from the fan count register, even if it is not optimal.
1194 * We'll compute a better divider later on.
1196 for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
1197 if (!(data->has_fan & (1 << i)))
1199 if (data->fan_div[i] == 0) {
1200 data->fan_div[i] = 7;
1201 nct6775_write_fan_div_common(data, i);
1206 static void nct6775_init_fan_common(struct device *dev,
1207 struct nct6775_data *data)
1212 if (data->has_fan_div)
1213 nct6775_init_fan_div(data);
1216 * If fan_min is not set (0), set it to 0xff to disable it. This
1217 * prevents the unnecessary warning when fanX_min is reported as 0.
1219 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1220 if (data->has_fan_min & (1 << i)) {
1221 reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
1223 nct6775_write_value(data, data->REG_FAN_MIN[i],
1224 data->has_fan_div ? 0xff
1230 static void nct6775_select_fan_div(struct device *dev,
1231 struct nct6775_data *data, int nr, u16 reg)
1233 u8 fan_div = data->fan_div[nr];
1236 if (!data->has_fan_div)
1240 * If we failed to measure the fan speed, or the reported value is not
1241 * in the optimal range, and the clock divider can be modified,
1242 * let's try that for next time.
1244 if (reg == 0x00 && fan_div < 0x07)
1246 else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1249 if (fan_div != data->fan_div[nr]) {
1250 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1251 nr + 1, div_from_reg(data->fan_div[nr]),
1252 div_from_reg(fan_div));
1254 /* Preserve min limit if possible */
1255 if (data->has_fan_min & (1 << nr)) {
1256 fan_min = data->fan_min[nr];
1257 if (fan_div > data->fan_div[nr]) {
1258 if (fan_min != 255 && fan_min > 1)
1261 if (fan_min != 255) {
1267 if (fan_min != data->fan_min[nr]) {
1268 data->fan_min[nr] = fan_min;
1269 nct6775_write_value(data, data->REG_FAN_MIN[nr],
1273 data->fan_div[nr] = fan_div;
1274 nct6775_write_fan_div_common(data, nr);
1278 static void nct6775_update_pwm(struct device *dev)
1280 struct nct6775_data *data = dev_get_drvdata(dev);
1282 int fanmodecfg, reg;
1285 for (i = 0; i < data->pwm_num; i++) {
1286 if (!(data->has_pwm & (1 << i)))
1289 duty_is_dc = data->REG_PWM_MODE[i] &&
1290 (nct6775_read_value(data, data->REG_PWM_MODE[i])
1291 & data->PWM_MODE_MASK[i]);
1292 data->pwm_mode[i] = duty_is_dc;
1294 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
1295 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1296 if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1298 = nct6775_read_value(data,
1299 data->REG_PWM[j][i]);
1303 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1304 (fanmodecfg >> 4) & 7);
1306 if (!data->temp_tolerance[0][i] ||
1307 data->pwm_enable[i] != speed_cruise)
1308 data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1309 if (!data->target_speed_tolerance[i] ||
1310 data->pwm_enable[i] == speed_cruise) {
1311 u8 t = fanmodecfg & 0x0f;
1312 if (data->REG_TOLERANCE_H) {
1313 t |= (nct6775_read_value(data,
1314 data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
1316 data->target_speed_tolerance[i] = t;
1319 data->temp_tolerance[1][i] =
1320 nct6775_read_value(data,
1321 data->REG_CRITICAL_TEMP_TOLERANCE[i]);
1323 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
1324 data->pwm_temp_sel[i] = reg & 0x1f;
1325 /* If fan can stop, report floor as 0 */
1327 data->pwm[2][i] = 0;
1329 if (data->REG_WEIGHT_TEMP_SEL[i]) {
1330 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
1331 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1332 /* If weight is disabled, report weight source as 0 */
1333 if (j == 1 && !(reg & 0x80))
1334 data->pwm_weight_temp_sel[i] = 0;
1336 /* Weight temp data */
1337 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
1338 data->weight_temp[j][i]
1339 = nct6775_read_value(data,
1340 data->REG_WEIGHT_TEMP[j][i]);
1346 static void nct6775_update_pwm_limits(struct device *dev)
1348 struct nct6775_data *data = dev_get_drvdata(dev);
1353 for (i = 0; i < data->pwm_num; i++) {
1354 if (!(data->has_pwm & (1 << i)))
1357 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1358 data->fan_time[j][i] =
1359 nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1362 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1363 /* Update only in matching mode or if never updated */
1364 if (!data->target_temp[i] ||
1365 data->pwm_enable[i] == thermal_cruise)
1366 data->target_temp[i] = reg_t & data->target_temp_mask;
1367 if (!data->target_speed[i] ||
1368 data->pwm_enable[i] == speed_cruise) {
1369 if (data->REG_TOLERANCE_H) {
1370 reg_t |= (nct6775_read_value(data,
1371 data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1373 data->target_speed[i] = reg_t;
1376 for (j = 0; j < data->auto_pwm_num; j++) {
1377 data->auto_pwm[i][j] =
1378 nct6775_read_value(data,
1379 NCT6775_AUTO_PWM(data, i, j));
1380 data->auto_temp[i][j] =
1381 nct6775_read_value(data,
1382 NCT6775_AUTO_TEMP(data, i, j));
1385 /* critical auto_pwm temperature data */
1386 data->auto_temp[i][data->auto_pwm_num] =
1387 nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1389 switch (data->kind) {
1391 reg = nct6775_read_value(data,
1392 NCT6775_REG_CRITICAL_ENAB[i]);
1393 data->auto_pwm[i][data->auto_pwm_num] =
1394 (reg & 0x02) ? 0xff : 0x00;
1397 data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1402 reg = nct6775_read_value(data,
1403 data->REG_CRITICAL_PWM_ENABLE[i]);
1404 if (reg & data->CRITICAL_PWM_ENABLE_MASK)
1405 reg = nct6775_read_value(data,
1406 data->REG_CRITICAL_PWM[i]);
1409 data->auto_pwm[i][data->auto_pwm_num] = reg;
1415 static struct nct6775_data *nct6775_update_device(struct device *dev)
1417 struct nct6775_data *data = dev_get_drvdata(dev);
1420 mutex_lock(&data->update_lock);
1422 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1424 /* Fan clock dividers */
1425 nct6775_update_fan_div_common(data);
1427 /* Measured voltages and limits */
1428 for (i = 0; i < data->in_num; i++) {
1429 if (!(data->have_in & (1 << i)))
1432 data->in[i][0] = nct6775_read_value(data,
1434 data->in[i][1] = nct6775_read_value(data,
1435 data->REG_IN_MINMAX[0][i]);
1436 data->in[i][2] = nct6775_read_value(data,
1437 data->REG_IN_MINMAX[1][i]);
1440 /* Measured fan speeds and limits */
1441 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
1444 if (!(data->has_fan & (1 << i)))
1447 reg = nct6775_read_value(data, data->REG_FAN[i]);
1448 data->rpm[i] = data->fan_from_reg(reg,
1451 if (data->has_fan_min & (1 << i))
1452 data->fan_min[i] = nct6775_read_value(data,
1453 data->REG_FAN_MIN[i]);
1454 data->fan_pulses[i] =
1455 (nct6775_read_value(data, data->REG_FAN_PULSES[i])
1456 >> data->FAN_PULSE_SHIFT[i]) & 0x03;
1458 nct6775_select_fan_div(dev, data, i, reg);
1461 nct6775_update_pwm(dev);
1462 nct6775_update_pwm_limits(dev);
1464 /* Measured temperatures and limits */
1465 for (i = 0; i < NUM_TEMP; i++) {
1466 if (!(data->have_temp & (1 << i)))
1468 for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1469 if (data->reg_temp[j][i])
1471 = nct6775_read_temp(data,
1472 data->reg_temp[j][i]);
1474 if (!(data->have_temp_fixed & (1 << i)))
1476 data->temp_offset[i]
1477 = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1481 for (i = 0; i < NUM_REG_ALARM; i++) {
1483 if (!data->REG_ALARM[i])
1485 alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1486 data->alarms |= ((u64)alarm) << (i << 3);
1490 for (i = 0; i < NUM_REG_BEEP; i++) {
1492 if (!data->REG_BEEP[i])
1494 beep = nct6775_read_value(data, data->REG_BEEP[i]);
1495 data->beeps |= ((u64)beep) << (i << 3);
1498 data->last_updated = jiffies;
1502 mutex_unlock(&data->update_lock);
1507 * Sysfs callback functions
1510 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1512 struct nct6775_data *data = nct6775_update_device(dev);
1513 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1515 int index = sattr->index;
1516 return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1520 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1523 struct nct6775_data *data = dev_get_drvdata(dev);
1524 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1526 int index = sattr->index;
1528 int err = kstrtoul(buf, 10, &val);
1531 mutex_lock(&data->update_lock);
1532 data->in[nr][index] = in_to_reg(val, nr);
1533 nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr],
1534 data->in[nr][index]);
1535 mutex_unlock(&data->update_lock);
1540 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1542 struct nct6775_data *data = nct6775_update_device(dev);
1543 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1544 int nr = data->ALARM_BITS[sattr->index];
1545 return sprintf(buf, "%u\n",
1546 (unsigned int)((data->alarms >> nr) & 0x01));
1549 static int find_temp_source(struct nct6775_data *data, int index, int count)
1551 int source = data->temp_src[index];
1554 for (nr = 0; nr < count; nr++) {
1557 src = nct6775_read_value(data,
1558 data->REG_TEMP_SOURCE[nr]) & 0x1f;
1566 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1568 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1569 struct nct6775_data *data = nct6775_update_device(dev);
1570 unsigned int alarm = 0;
1574 * For temperatures, there is no fixed mapping from registers to alarm
1575 * bits. Alarm bits are determined by the temperature source mapping.
1577 nr = find_temp_source(data, sattr->index, data->num_temp_alarms);
1579 int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE];
1580 alarm = (data->alarms >> bit) & 0x01;
1582 return sprintf(buf, "%u\n", alarm);
1586 show_beep(struct device *dev, struct device_attribute *attr, char *buf)
1588 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1589 struct nct6775_data *data = nct6775_update_device(dev);
1590 int nr = data->BEEP_BITS[sattr->index];
1592 return sprintf(buf, "%u\n",
1593 (unsigned int)((data->beeps >> nr) & 0x01));
1597 store_beep(struct device *dev, struct device_attribute *attr, const char *buf,
1600 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1601 struct nct6775_data *data = dev_get_drvdata(dev);
1602 int nr = data->BEEP_BITS[sattr->index];
1603 int regindex = nr >> 3;
1606 int err = kstrtoul(buf, 10, &val);
1612 mutex_lock(&data->update_lock);
1614 data->beeps |= (1ULL << nr);
1616 data->beeps &= ~(1ULL << nr);
1617 nct6775_write_value(data, data->REG_BEEP[regindex],
1618 (data->beeps >> (regindex << 3)) & 0xff);
1619 mutex_unlock(&data->update_lock);
1624 show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf)
1626 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1627 struct nct6775_data *data = nct6775_update_device(dev);
1628 unsigned int beep = 0;
1632 * For temperatures, there is no fixed mapping from registers to beep
1633 * enable bits. Beep enable bits are determined by the temperature
1636 nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1638 int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1639 beep = (data->beeps >> bit) & 0x01;
1641 return sprintf(buf, "%u\n", beep);
1645 store_temp_beep(struct device *dev, struct device_attribute *attr,
1646 const char *buf, size_t count)
1648 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1649 struct nct6775_data *data = dev_get_drvdata(dev);
1650 int nr, bit, regindex;
1653 int err = kstrtoul(buf, 10, &val);
1659 nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1663 bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1664 regindex = bit >> 3;
1666 mutex_lock(&data->update_lock);
1668 data->beeps |= (1ULL << bit);
1670 data->beeps &= ~(1ULL << bit);
1671 nct6775_write_value(data, data->REG_BEEP[regindex],
1672 (data->beeps >> (regindex << 3)) & 0xff);
1673 mutex_unlock(&data->update_lock);
1678 static umode_t nct6775_in_is_visible(struct kobject *kobj,
1679 struct attribute *attr, int index)
1681 struct device *dev = container_of(kobj, struct device, kobj);
1682 struct nct6775_data *data = dev_get_drvdata(dev);
1683 int in = index / 5; /* voltage index */
1685 if (!(data->have_in & (1 << in)))
1691 SENSOR_TEMPLATE_2(in_input, "in%d_input", S_IRUGO, show_in_reg, NULL, 0, 0);
1692 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", S_IRUGO, show_alarm, NULL, 0);
1693 SENSOR_TEMPLATE(in_beep, "in%d_beep", S_IWUSR | S_IRUGO, show_beep, store_beep,
1695 SENSOR_TEMPLATE_2(in_min, "in%d_min", S_IWUSR | S_IRUGO, show_in_reg,
1696 store_in_reg, 0, 1);
1697 SENSOR_TEMPLATE_2(in_max, "in%d_max", S_IWUSR | S_IRUGO, show_in_reg,
1698 store_in_reg, 0, 2);
1701 * nct6775_in_is_visible uses the index into the following array
1702 * to determine if attributes should be created or not.
1703 * Any change in order or content must be matched.
1705 static struct sensor_device_template *nct6775_attributes_in_template[] = {
1706 &sensor_dev_template_in_input,
1707 &sensor_dev_template_in_alarm,
1708 &sensor_dev_template_in_beep,
1709 &sensor_dev_template_in_min,
1710 &sensor_dev_template_in_max,
1714 static struct sensor_template_group nct6775_in_template_group = {
1715 .templates = nct6775_attributes_in_template,
1716 .is_visible = nct6775_in_is_visible,
1720 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1722 struct nct6775_data *data = nct6775_update_device(dev);
1723 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1724 int nr = sattr->index;
1725 return sprintf(buf, "%d\n", data->rpm[nr]);
1729 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1731 struct nct6775_data *data = nct6775_update_device(dev);
1732 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1733 int nr = sattr->index;
1734 return sprintf(buf, "%d\n",
1735 data->fan_from_reg_min(data->fan_min[nr],
1736 data->fan_div[nr]));
1740 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1742 struct nct6775_data *data = nct6775_update_device(dev);
1743 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1744 int nr = sattr->index;
1745 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1749 store_fan_min(struct device *dev, struct device_attribute *attr,
1750 const char *buf, size_t count)
1752 struct nct6775_data *data = dev_get_drvdata(dev);
1753 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1754 int nr = sattr->index;
1760 err = kstrtoul(buf, 10, &val);
1764 mutex_lock(&data->update_lock);
1765 if (!data->has_fan_div) {
1766 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1772 val = 1350000U / val;
1773 val = (val & 0x1f) | ((val << 3) & 0xff00);
1775 data->fan_min[nr] = val;
1776 goto write_min; /* Leave fan divider alone */
1779 /* No min limit, alarm disabled */
1780 data->fan_min[nr] = 255;
1781 new_div = data->fan_div[nr]; /* No change */
1782 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1785 reg = 1350000U / val;
1786 if (reg >= 128 * 255) {
1788 * Speed below this value cannot possibly be represented,
1789 * even with the highest divider (128)
1791 data->fan_min[nr] = 254;
1792 new_div = 7; /* 128 == (1 << 7) */
1794 "fan%u low limit %lu below minimum %u, set to minimum\n",
1795 nr + 1, val, data->fan_from_reg_min(254, 7));
1798 * Speed above this value cannot possibly be represented,
1799 * even with the lowest divider (1)
1801 data->fan_min[nr] = 1;
1802 new_div = 0; /* 1 == (1 << 0) */
1804 "fan%u low limit %lu above maximum %u, set to maximum\n",
1805 nr + 1, val, data->fan_from_reg_min(1, 0));
1808 * Automatically pick the best divider, i.e. the one such
1809 * that the min limit will correspond to a register value
1810 * in the 96..192 range
1813 while (reg > 192 && new_div < 7) {
1817 data->fan_min[nr] = reg;
1822 * Write both the fan clock divider (if it changed) and the new
1823 * fan min (unconditionally)
1825 if (new_div != data->fan_div[nr]) {
1826 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1827 nr + 1, div_from_reg(data->fan_div[nr]),
1828 div_from_reg(new_div));
1829 data->fan_div[nr] = new_div;
1830 nct6775_write_fan_div_common(data, nr);
1831 /* Give the chip time to sample a new speed value */
1832 data->last_updated = jiffies;
1836 nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1837 mutex_unlock(&data->update_lock);
1843 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
1845 struct nct6775_data *data = nct6775_update_device(dev);
1846 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1847 int p = data->fan_pulses[sattr->index];
1849 return sprintf(buf, "%d\n", p ? : 4);
1853 store_fan_pulses(struct device *dev, struct device_attribute *attr,
1854 const char *buf, size_t count)
1856 struct nct6775_data *data = dev_get_drvdata(dev);
1857 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1858 int nr = sattr->index;
1863 err = kstrtoul(buf, 10, &val);
1870 mutex_lock(&data->update_lock);
1871 data->fan_pulses[nr] = val & 3;
1872 reg = nct6775_read_value(data, data->REG_FAN_PULSES[nr]);
1873 reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
1874 reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
1875 nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
1876 mutex_unlock(&data->update_lock);
1881 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
1882 struct attribute *attr, int index)
1884 struct device *dev = container_of(kobj, struct device, kobj);
1885 struct nct6775_data *data = dev_get_drvdata(dev);
1886 int fan = index / 6; /* fan index */
1887 int nr = index % 6; /* attribute index */
1889 if (!(data->has_fan & (1 << fan)))
1892 if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1)
1894 if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1)
1896 if (nr == 4 && !(data->has_fan_min & (1 << fan)))
1898 if (nr == 5 && data->kind != nct6775)
1904 SENSOR_TEMPLATE(fan_input, "fan%d_input", S_IRUGO, show_fan, NULL, 0);
1905 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", S_IRUGO, show_alarm, NULL,
1907 SENSOR_TEMPLATE(fan_beep, "fan%d_beep", S_IWUSR | S_IRUGO, show_beep,
1908 store_beep, FAN_ALARM_BASE);
1909 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", S_IWUSR | S_IRUGO, show_fan_pulses,
1910 store_fan_pulses, 0);
1911 SENSOR_TEMPLATE(fan_min, "fan%d_min", S_IWUSR | S_IRUGO, show_fan_min,
1913 SENSOR_TEMPLATE(fan_div, "fan%d_div", S_IRUGO, show_fan_div, NULL, 0);
1916 * nct6775_fan_is_visible uses the index into the following array
1917 * to determine if attributes should be created or not.
1918 * Any change in order or content must be matched.
1920 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
1921 &sensor_dev_template_fan_input,
1922 &sensor_dev_template_fan_alarm, /* 1 */
1923 &sensor_dev_template_fan_beep, /* 2 */
1924 &sensor_dev_template_fan_pulses,
1925 &sensor_dev_template_fan_min, /* 4 */
1926 &sensor_dev_template_fan_div, /* 5 */
1930 static struct sensor_template_group nct6775_fan_template_group = {
1931 .templates = nct6775_attributes_fan_template,
1932 .is_visible = nct6775_fan_is_visible,
1937 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1939 struct nct6775_data *data = nct6775_update_device(dev);
1940 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1941 int nr = sattr->index;
1942 return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1946 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1948 struct nct6775_data *data = nct6775_update_device(dev);
1949 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1951 int index = sattr->index;
1953 return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
1957 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
1960 struct nct6775_data *data = dev_get_drvdata(dev);
1961 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1963 int index = sattr->index;
1967 err = kstrtol(buf, 10, &val);
1971 mutex_lock(&data->update_lock);
1972 data->temp[index][nr] = LM75_TEMP_TO_REG(val);
1973 nct6775_write_temp(data, data->reg_temp[index][nr],
1974 data->temp[index][nr]);
1975 mutex_unlock(&data->update_lock);
1980 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
1982 struct nct6775_data *data = nct6775_update_device(dev);
1983 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1985 return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
1989 store_temp_offset(struct device *dev, struct device_attribute *attr,
1990 const char *buf, size_t count)
1992 struct nct6775_data *data = dev_get_drvdata(dev);
1993 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1994 int nr = sattr->index;
1998 err = kstrtol(buf, 10, &val);
2002 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
2004 mutex_lock(&data->update_lock);
2005 data->temp_offset[nr] = val;
2006 nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
2007 mutex_unlock(&data->update_lock);
2013 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
2015 struct nct6775_data *data = nct6775_update_device(dev);
2016 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2017 int nr = sattr->index;
2018 return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
2022 store_temp_type(struct device *dev, struct device_attribute *attr,
2023 const char *buf, size_t count)
2025 struct nct6775_data *data = nct6775_update_device(dev);
2026 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2027 int nr = sattr->index;
2030 u8 vbat, diode, vbit, dbit;
2032 err = kstrtoul(buf, 10, &val);
2036 if (val != 1 && val != 3 && val != 4)
2039 mutex_lock(&data->update_lock);
2041 data->temp_type[nr] = val;
2043 dbit = data->DIODE_MASK << nr;
2044 vbat = nct6775_read_value(data, data->REG_VBAT) & ~vbit;
2045 diode = nct6775_read_value(data, data->REG_DIODE) & ~dbit;
2047 case 1: /* CPU diode (diode, current mode) */
2051 case 3: /* diode, voltage mode */
2054 case 4: /* thermistor */
2057 nct6775_write_value(data, data->REG_VBAT, vbat);
2058 nct6775_write_value(data, data->REG_DIODE, diode);
2060 mutex_unlock(&data->update_lock);
2064 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
2065 struct attribute *attr, int index)
2067 struct device *dev = container_of(kobj, struct device, kobj);
2068 struct nct6775_data *data = dev_get_drvdata(dev);
2069 int temp = index / 10; /* temp index */
2070 int nr = index % 10; /* attribute index */
2072 if (!(data->have_temp & (1 << temp)))
2075 if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0)
2076 return 0; /* alarm */
2078 if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0)
2079 return 0; /* beep */
2081 if (nr == 4 && !data->reg_temp[1][temp]) /* max */
2084 if (nr == 5 && !data->reg_temp[2][temp]) /* max_hyst */
2087 if (nr == 6 && !data->reg_temp[3][temp]) /* crit */
2090 if (nr == 7 && !data->reg_temp[4][temp]) /* lcrit */
2093 /* offset and type only apply to fixed sensors */
2094 if (nr > 7 && !(data->have_temp_fixed & (1 << temp)))
2100 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", S_IRUGO, show_temp, NULL, 0, 0);
2101 SENSOR_TEMPLATE(temp_label, "temp%d_label", S_IRUGO, show_temp_label, NULL, 0);
2102 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", S_IRUGO | S_IWUSR, show_temp,
2104 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", S_IRUGO | S_IWUSR,
2105 show_temp, store_temp, 0, 2);
2106 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", S_IRUGO | S_IWUSR, show_temp,
2108 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", S_IRUGO | S_IWUSR, show_temp,
2110 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", S_IRUGO | S_IWUSR,
2111 show_temp_offset, store_temp_offset, 0);
2112 SENSOR_TEMPLATE(temp_type, "temp%d_type", S_IRUGO | S_IWUSR, show_temp_type,
2113 store_temp_type, 0);
2114 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", S_IRUGO, show_temp_alarm, NULL, 0);
2115 SENSOR_TEMPLATE(temp_beep, "temp%d_beep", S_IRUGO | S_IWUSR, show_temp_beep,
2116 store_temp_beep, 0);
2119 * nct6775_temp_is_visible uses the index into the following array
2120 * to determine if attributes should be created or not.
2121 * Any change in order or content must be matched.
2123 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
2124 &sensor_dev_template_temp_input,
2125 &sensor_dev_template_temp_label,
2126 &sensor_dev_template_temp_alarm, /* 2 */
2127 &sensor_dev_template_temp_beep, /* 3 */
2128 &sensor_dev_template_temp_max, /* 4 */
2129 &sensor_dev_template_temp_max_hyst, /* 5 */
2130 &sensor_dev_template_temp_crit, /* 6 */
2131 &sensor_dev_template_temp_lcrit, /* 7 */
2132 &sensor_dev_template_temp_offset, /* 8 */
2133 &sensor_dev_template_temp_type, /* 9 */
2137 static struct sensor_template_group nct6775_temp_template_group = {
2138 .templates = nct6775_attributes_temp_template,
2139 .is_visible = nct6775_temp_is_visible,
2144 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
2146 struct nct6775_data *data = nct6775_update_device(dev);
2147 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2149 return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
2153 store_pwm_mode(struct device *dev, struct device_attribute *attr,
2154 const char *buf, size_t count)
2156 struct nct6775_data *data = dev_get_drvdata(dev);
2157 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2158 int nr = sattr->index;
2163 err = kstrtoul(buf, 10, &val);
2170 /* Setting DC mode is not supported for all chips/channels */
2171 if (data->REG_PWM_MODE[nr] == 0) {
2177 mutex_lock(&data->update_lock);
2178 data->pwm_mode[nr] = val;
2179 reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
2180 reg &= ~data->PWM_MODE_MASK[nr];
2182 reg |= data->PWM_MODE_MASK[nr];
2183 nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
2184 mutex_unlock(&data->update_lock);
2189 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2191 struct nct6775_data *data = nct6775_update_device(dev);
2192 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2194 int index = sattr->index;
2198 * For automatic fan control modes, show current pwm readings.
2199 * Otherwise, show the configured value.
2201 if (index == 0 && data->pwm_enable[nr] > manual)
2202 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
2204 pwm = data->pwm[index][nr];
2206 return sprintf(buf, "%d\n", pwm);
2210 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
2213 struct nct6775_data *data = dev_get_drvdata(dev);
2214 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2216 int index = sattr->index;
2218 int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
2220 = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
2224 err = kstrtoul(buf, 10, &val);
2227 val = clamp_val(val, minval[index], maxval[index]);
2229 mutex_lock(&data->update_lock);
2230 data->pwm[index][nr] = val;
2231 nct6775_write_value(data, data->REG_PWM[index][nr], val);
2232 if (index == 2) { /* floor: disable if val == 0 */
2233 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2237 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2239 mutex_unlock(&data->update_lock);
2243 /* Returns 0 if OK, -EINVAL otherwise */
2244 static int check_trip_points(struct nct6775_data *data, int nr)
2248 for (i = 0; i < data->auto_pwm_num - 1; i++) {
2249 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
2252 for (i = 0; i < data->auto_pwm_num - 1; i++) {
2253 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
2256 /* validate critical temperature and pwm if enabled (pwm > 0) */
2257 if (data->auto_pwm[nr][data->auto_pwm_num]) {
2258 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2259 data->auto_temp[nr][data->auto_pwm_num] ||
2260 data->auto_pwm[nr][data->auto_pwm_num - 1] >
2261 data->auto_pwm[nr][data->auto_pwm_num])
2267 static void pwm_update_registers(struct nct6775_data *data, int nr)
2271 switch (data->pwm_enable[nr]) {
2276 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2277 reg = (reg & ~data->tolerance_mask) |
2278 (data->target_speed_tolerance[nr] & data->tolerance_mask);
2279 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2280 nct6775_write_value(data, data->REG_TARGET[nr],
2281 data->target_speed[nr] & 0xff);
2282 if (data->REG_TOLERANCE_H) {
2283 reg = (data->target_speed[nr] >> 8) & 0x0f;
2284 reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2285 nct6775_write_value(data,
2286 data->REG_TOLERANCE_H[nr],
2290 case thermal_cruise:
2291 nct6775_write_value(data, data->REG_TARGET[nr],
2292 data->target_temp[nr]);
2295 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2296 reg = (reg & ~data->tolerance_mask) |
2297 data->temp_tolerance[0][nr];
2298 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2304 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2306 struct nct6775_data *data = nct6775_update_device(dev);
2307 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2309 return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2313 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2314 const char *buf, size_t count)
2316 struct nct6775_data *data = dev_get_drvdata(dev);
2317 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2318 int nr = sattr->index;
2323 err = kstrtoul(buf, 10, &val);
2330 if (val == sf3 && data->kind != nct6775)
2333 if (val == sf4 && check_trip_points(data, nr)) {
2334 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2335 dev_err(dev, "Adjust trip points and try again\n");
2339 mutex_lock(&data->update_lock);
2340 data->pwm_enable[nr] = val;
2343 * turn off pwm control: select manual mode, set pwm to maximum
2345 data->pwm[0][nr] = 255;
2346 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2348 pwm_update_registers(data, nr);
2349 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2351 reg |= pwm_enable_to_reg(val) << 4;
2352 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2353 mutex_unlock(&data->update_lock);
2358 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2362 for (i = 0; i < NUM_TEMP; i++) {
2363 if (!(data->have_temp & (1 << i)))
2365 if (src == data->temp_src[i]) {
2371 return sprintf(buf, "%d\n", sel);
2375 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2377 struct nct6775_data *data = nct6775_update_device(dev);
2378 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2379 int index = sattr->index;
2381 return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2385 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2386 const char *buf, size_t count)
2388 struct nct6775_data *data = nct6775_update_device(dev);
2389 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2390 int nr = sattr->index;
2394 err = kstrtoul(buf, 10, &val);
2397 if (val == 0 || val > NUM_TEMP)
2399 if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
2402 mutex_lock(&data->update_lock);
2403 src = data->temp_src[val - 1];
2404 data->pwm_temp_sel[nr] = src;
2405 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2408 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2409 mutex_unlock(&data->update_lock);
2415 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2418 struct nct6775_data *data = nct6775_update_device(dev);
2419 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2420 int index = sattr->index;
2422 return show_pwm_temp_sel_common(data, buf,
2423 data->pwm_weight_temp_sel[index]);
2427 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2428 const char *buf, size_t count)
2430 struct nct6775_data *data = nct6775_update_device(dev);
2431 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2432 int nr = sattr->index;
2436 err = kstrtoul(buf, 10, &val);
2441 if (val && (!(data->have_temp & (1 << (val - 1))) ||
2442 !data->temp_src[val - 1]))
2445 mutex_lock(&data->update_lock);
2447 src = data->temp_src[val - 1];
2448 data->pwm_weight_temp_sel[nr] = src;
2449 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2451 reg |= (src | 0x80);
2452 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2454 data->pwm_weight_temp_sel[nr] = 0;
2455 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2457 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2459 mutex_unlock(&data->update_lock);
2465 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2467 struct nct6775_data *data = nct6775_update_device(dev);
2468 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2470 return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2474 store_target_temp(struct device *dev, struct device_attribute *attr,
2475 const char *buf, size_t count)
2477 struct nct6775_data *data = dev_get_drvdata(dev);
2478 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2479 int nr = sattr->index;
2483 err = kstrtoul(buf, 10, &val);
2487 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2488 data->target_temp_mask);
2490 mutex_lock(&data->update_lock);
2491 data->target_temp[nr] = val;
2492 pwm_update_registers(data, nr);
2493 mutex_unlock(&data->update_lock);
2498 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2500 struct nct6775_data *data = nct6775_update_device(dev);
2501 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2502 int nr = sattr->index;
2504 return sprintf(buf, "%d\n",
2505 fan_from_reg16(data->target_speed[nr],
2506 data->fan_div[nr]));
2510 store_target_speed(struct device *dev, struct device_attribute *attr,
2511 const char *buf, size_t count)
2513 struct nct6775_data *data = dev_get_drvdata(dev);
2514 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2515 int nr = sattr->index;
2520 err = kstrtoul(buf, 10, &val);
2524 val = clamp_val(val, 0, 1350000U);
2525 speed = fan_to_reg(val, data->fan_div[nr]);
2527 mutex_lock(&data->update_lock);
2528 data->target_speed[nr] = speed;
2529 pwm_update_registers(data, nr);
2530 mutex_unlock(&data->update_lock);
2535 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2538 struct nct6775_data *data = nct6775_update_device(dev);
2539 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2541 int index = sattr->index;
2543 return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2547 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2548 const char *buf, size_t count)
2550 struct nct6775_data *data = dev_get_drvdata(dev);
2551 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2553 int index = sattr->index;
2557 err = kstrtoul(buf, 10, &val);
2561 /* Limit tolerance as needed */
2562 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2564 mutex_lock(&data->update_lock);
2565 data->temp_tolerance[index][nr] = val;
2567 pwm_update_registers(data, nr);
2569 nct6775_write_value(data,
2570 data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2572 mutex_unlock(&data->update_lock);
2577 * Fan speed tolerance is a tricky beast, since the associated register is
2578 * a tick counter, but the value is reported and configured as rpm.
2579 * Compute resulting low and high rpm values and report the difference.
2582 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2585 struct nct6775_data *data = nct6775_update_device(dev);
2586 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2587 int nr = sattr->index;
2588 int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2589 int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2599 tolerance = (fan_from_reg16(low, data->fan_div[nr])
2600 - fan_from_reg16(high, data->fan_div[nr])) / 2;
2602 return sprintf(buf, "%d\n", tolerance);
2606 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2607 const char *buf, size_t count)
2609 struct nct6775_data *data = dev_get_drvdata(dev);
2610 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2611 int nr = sattr->index;
2616 err = kstrtoul(buf, 10, &val);
2620 high = fan_from_reg16(data->target_speed[nr],
2621 data->fan_div[nr]) + val;
2622 low = fan_from_reg16(data->target_speed[nr],
2623 data->fan_div[nr]) - val;
2629 val = (fan_to_reg(low, data->fan_div[nr]) -
2630 fan_to_reg(high, data->fan_div[nr])) / 2;
2632 /* Limit tolerance as needed */
2633 val = clamp_val(val, 0, data->speed_tolerance_limit);
2635 mutex_lock(&data->update_lock);
2636 data->target_speed_tolerance[nr] = val;
2637 pwm_update_registers(data, nr);
2638 mutex_unlock(&data->update_lock);
2642 SENSOR_TEMPLATE_2(pwm, "pwm%d", S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2643 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", S_IWUSR | S_IRUGO, show_pwm_mode,
2645 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", S_IWUSR | S_IRUGO, show_pwm_enable,
2646 store_pwm_enable, 0);
2647 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", S_IWUSR | S_IRUGO,
2648 show_pwm_temp_sel, store_pwm_temp_sel, 0);
2649 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", S_IWUSR | S_IRUGO,
2650 show_target_temp, store_target_temp, 0);
2651 SENSOR_TEMPLATE(fan_target, "fan%d_target", S_IWUSR | S_IRUGO,
2652 show_target_speed, store_target_speed, 0);
2653 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", S_IWUSR | S_IRUGO,
2654 show_speed_tolerance, store_speed_tolerance, 0);
2656 /* Smart Fan registers */
2659 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2661 struct nct6775_data *data = nct6775_update_device(dev);
2662 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2664 int index = sattr->index;
2666 return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2670 store_weight_temp(struct device *dev, struct device_attribute *attr,
2671 const char *buf, size_t count)
2673 struct nct6775_data *data = dev_get_drvdata(dev);
2674 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2676 int index = sattr->index;
2680 err = kstrtoul(buf, 10, &val);
2684 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2686 mutex_lock(&data->update_lock);
2687 data->weight_temp[index][nr] = val;
2688 nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2689 mutex_unlock(&data->update_lock);
2693 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", S_IWUSR | S_IRUGO,
2694 show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
2695 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step",
2696 S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 0);
2697 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol",
2698 S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 1);
2699 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base",
2700 S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 2);
2701 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step",
2702 S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 5);
2703 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base",
2704 S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 6);
2707 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2709 struct nct6775_data *data = nct6775_update_device(dev);
2710 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2712 int index = sattr->index;
2714 return sprintf(buf, "%d\n",
2715 step_time_from_reg(data->fan_time[index][nr],
2716 data->pwm_mode[nr]));
2720 store_fan_time(struct device *dev, struct device_attribute *attr,
2721 const char *buf, size_t count)
2723 struct nct6775_data *data = dev_get_drvdata(dev);
2724 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2726 int index = sattr->index;
2730 err = kstrtoul(buf, 10, &val);
2734 val = step_time_to_reg(val, data->pwm_mode[nr]);
2735 mutex_lock(&data->update_lock);
2736 data->fan_time[index][nr] = val;
2737 nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2738 mutex_unlock(&data->update_lock);
2743 show_name(struct device *dev, struct device_attribute *attr, char *buf)
2745 struct nct6775_data *data = dev_get_drvdata(dev);
2747 return sprintf(buf, "%s\n", data->name);
2750 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
2753 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2755 struct nct6775_data *data = nct6775_update_device(dev);
2756 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2758 return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2762 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2763 const char *buf, size_t count)
2765 struct nct6775_data *data = dev_get_drvdata(dev);
2766 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2768 int point = sattr->index;
2773 err = kstrtoul(buf, 10, &val);
2779 if (point == data->auto_pwm_num) {
2780 if (data->kind != nct6775 && !val)
2782 if (data->kind != nct6779 && val)
2786 mutex_lock(&data->update_lock);
2787 data->auto_pwm[nr][point] = val;
2788 if (point < data->auto_pwm_num) {
2789 nct6775_write_value(data,
2790 NCT6775_AUTO_PWM(data, nr, point),
2791 data->auto_pwm[nr][point]);
2793 switch (data->kind) {
2795 /* disable if needed (pwm == 0) */
2796 reg = nct6775_read_value(data,
2797 NCT6775_REG_CRITICAL_ENAB[nr]);
2802 nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
2806 break; /* always enabled, nothing to do */
2810 nct6775_write_value(data, data->REG_CRITICAL_PWM[nr],
2812 reg = nct6775_read_value(data,
2813 data->REG_CRITICAL_PWM_ENABLE[nr]);
2815 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
2817 reg |= data->CRITICAL_PWM_ENABLE_MASK;
2818 nct6775_write_value(data,
2819 data->REG_CRITICAL_PWM_ENABLE[nr],
2824 mutex_unlock(&data->update_lock);
2829 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
2831 struct nct6775_data *data = nct6775_update_device(dev);
2832 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2834 int point = sattr->index;
2837 * We don't know for sure if the temperature is signed or unsigned.
2838 * Assume it is unsigned.
2840 return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
2844 store_auto_temp(struct device *dev, struct device_attribute *attr,
2845 const char *buf, size_t count)
2847 struct nct6775_data *data = dev_get_drvdata(dev);
2848 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2850 int point = sattr->index;
2854 err = kstrtoul(buf, 10, &val);
2860 mutex_lock(&data->update_lock);
2861 data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
2862 if (point < data->auto_pwm_num) {
2863 nct6775_write_value(data,
2864 NCT6775_AUTO_TEMP(data, nr, point),
2865 data->auto_temp[nr][point]);
2867 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
2868 data->auto_temp[nr][point]);
2870 mutex_unlock(&data->update_lock);
2874 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
2875 struct attribute *attr, int index)
2877 struct device *dev = container_of(kobj, struct device, kobj);
2878 struct nct6775_data *data = dev_get_drvdata(dev);
2879 int pwm = index / 36; /* pwm index */
2880 int nr = index % 36; /* attribute index */
2882 if (!(data->has_pwm & (1 << pwm)))
2885 if ((nr >= 14 && nr <= 18) || nr == 21) /* weight */
2886 if (!data->REG_WEIGHT_TEMP_SEL[pwm])
2888 if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
2890 if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
2892 if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
2895 if (nr >= 22 && nr <= 35) { /* auto point */
2896 int api = (nr - 22) / 2; /* auto point index */
2898 if (api > data->auto_pwm_num)
2904 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", S_IWUSR | S_IRUGO,
2905 show_fan_time, store_fan_time, 0, 0);
2906 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", S_IWUSR | S_IRUGO,
2907 show_fan_time, store_fan_time, 0, 1);
2908 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", S_IWUSR | S_IRUGO,
2909 show_fan_time, store_fan_time, 0, 2);
2910 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", S_IWUSR | S_IRUGO, show_pwm,
2912 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", S_IWUSR | S_IRUGO, show_pwm,
2914 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", S_IWUSR | S_IRUGO,
2915 show_temp_tolerance, store_temp_tolerance, 0, 0);
2916 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance",
2917 S_IWUSR | S_IRUGO, show_temp_tolerance, store_temp_tolerance,
2920 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2923 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", S_IWUSR | S_IRUGO, show_pwm,
2926 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm",
2927 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 0);
2928 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp",
2929 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 0);
2931 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm",
2932 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 1);
2933 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp",
2934 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 1);
2936 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm",
2937 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 2);
2938 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp",
2939 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 2);
2941 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm",
2942 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 3);
2943 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp",
2944 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 3);
2946 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm",
2947 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 4);
2948 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp",
2949 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 4);
2951 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm",
2952 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 5);
2953 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp",
2954 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 5);
2956 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm",
2957 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 6);
2958 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp",
2959 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 6);
2962 * nct6775_pwm_is_visible uses the index into the following array
2963 * to determine if attributes should be created or not.
2964 * Any change in order or content must be matched.
2966 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
2967 &sensor_dev_template_pwm,
2968 &sensor_dev_template_pwm_mode,
2969 &sensor_dev_template_pwm_enable,
2970 &sensor_dev_template_pwm_temp_sel,
2971 &sensor_dev_template_pwm_temp_tolerance,
2972 &sensor_dev_template_pwm_crit_temp_tolerance,
2973 &sensor_dev_template_pwm_target_temp,
2974 &sensor_dev_template_fan_target,
2975 &sensor_dev_template_fan_tolerance,
2976 &sensor_dev_template_pwm_stop_time,
2977 &sensor_dev_template_pwm_step_up_time,
2978 &sensor_dev_template_pwm_step_down_time,
2979 &sensor_dev_template_pwm_start,
2980 &sensor_dev_template_pwm_floor,
2981 &sensor_dev_template_pwm_weight_temp_sel, /* 14 */
2982 &sensor_dev_template_pwm_weight_temp_step,
2983 &sensor_dev_template_pwm_weight_temp_step_tol,
2984 &sensor_dev_template_pwm_weight_temp_step_base,
2985 &sensor_dev_template_pwm_weight_duty_step, /* 18 */
2986 &sensor_dev_template_pwm_max, /* 19 */
2987 &sensor_dev_template_pwm_step, /* 20 */
2988 &sensor_dev_template_pwm_weight_duty_base, /* 21 */
2989 &sensor_dev_template_pwm_auto_point1_pwm, /* 22 */
2990 &sensor_dev_template_pwm_auto_point1_temp,
2991 &sensor_dev_template_pwm_auto_point2_pwm,
2992 &sensor_dev_template_pwm_auto_point2_temp,
2993 &sensor_dev_template_pwm_auto_point3_pwm,
2994 &sensor_dev_template_pwm_auto_point3_temp,
2995 &sensor_dev_template_pwm_auto_point4_pwm,
2996 &sensor_dev_template_pwm_auto_point4_temp,
2997 &sensor_dev_template_pwm_auto_point5_pwm,
2998 &sensor_dev_template_pwm_auto_point5_temp,
2999 &sensor_dev_template_pwm_auto_point6_pwm,
3000 &sensor_dev_template_pwm_auto_point6_temp,
3001 &sensor_dev_template_pwm_auto_point7_pwm,
3002 &sensor_dev_template_pwm_auto_point7_temp, /* 35 */
3007 static struct sensor_template_group nct6775_pwm_template_group = {
3008 .templates = nct6775_attributes_pwm_template,
3009 .is_visible = nct6775_pwm_is_visible,
3014 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
3016 struct nct6775_data *data = dev_get_drvdata(dev);
3017 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
3020 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
3022 /* Case open detection */
3025 clear_caseopen(struct device *dev, struct device_attribute *attr,
3026 const char *buf, size_t count)
3028 struct nct6775_data *data = dev_get_drvdata(dev);
3029 int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
3034 if (kstrtoul(buf, 10, &val) || val != 0)
3037 mutex_lock(&data->update_lock);
3040 * Use CR registers to clear caseopen status.
3041 * The CR registers are the same for all chips, and not all chips
3042 * support clearing the caseopen status through "regular" registers.
3044 ret = superio_enter(data->sioreg);
3050 superio_select(data->sioreg, NCT6775_LD_ACPI);
3051 reg = superio_inb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
3052 reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3053 superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3054 reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3055 superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3056 superio_exit(data->sioreg);
3058 data->valid = false; /* Force cache refresh */
3060 mutex_unlock(&data->update_lock);
3064 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
3065 clear_caseopen, INTRUSION_ALARM_BASE);
3066 static SENSOR_DEVICE_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
3067 clear_caseopen, INTRUSION_ALARM_BASE + 1);
3068 static SENSOR_DEVICE_ATTR(intrusion0_beep, S_IWUSR | S_IRUGO, show_beep,
3069 store_beep, INTRUSION_ALARM_BASE);
3070 static SENSOR_DEVICE_ATTR(intrusion1_beep, S_IWUSR | S_IRUGO, show_beep,
3071 store_beep, INTRUSION_ALARM_BASE + 1);
3072 static SENSOR_DEVICE_ATTR(beep_enable, S_IWUSR | S_IRUGO, show_beep,
3073 store_beep, BEEP_ENABLE_BASE);
3075 static umode_t nct6775_other_is_visible(struct kobject *kobj,
3076 struct attribute *attr, int index)
3078 struct device *dev = container_of(kobj, struct device, kobj);
3079 struct nct6775_data *data = dev_get_drvdata(dev);
3081 if (index == 1 && !data->have_vid)
3084 if (index == 2 || index == 3) {
3085 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + index - 2] < 0)
3089 if (index == 4 || index == 5) {
3090 if (data->BEEP_BITS[INTRUSION_ALARM_BASE + index - 4] < 0)
3098 * nct6775_other_is_visible uses the index into the following array
3099 * to determine if attributes should be created or not.
3100 * Any change in order or content must be matched.
3102 static struct attribute *nct6775_attributes_other[] = {
3103 &dev_attr_name.attr,
3104 &dev_attr_cpu0_vid.attr, /* 1 */
3105 &sensor_dev_attr_intrusion0_alarm.dev_attr.attr, /* 2 */
3106 &sensor_dev_attr_intrusion1_alarm.dev_attr.attr, /* 3 */
3107 &sensor_dev_attr_intrusion0_beep.dev_attr.attr, /* 4 */
3108 &sensor_dev_attr_intrusion1_beep.dev_attr.attr, /* 5 */
3109 &sensor_dev_attr_beep_enable.dev_attr.attr, /* 6 */
3114 static const struct attribute_group nct6775_group_other = {
3115 .attrs = nct6775_attributes_other,
3116 .is_visible = nct6775_other_is_visible,
3120 * Driver and device management
3123 static void nct6775_device_remove_files(struct device *dev)
3125 struct nct6775_data *data = dev_get_drvdata(dev);
3127 if (data->group_pwm)
3128 sysfs_remove_group(&dev->kobj, data->group_pwm);
3130 sysfs_remove_group(&dev->kobj, data->group_in);
3131 if (data->group_fan)
3132 sysfs_remove_group(&dev->kobj, data->group_fan);
3133 if (data->group_temp)
3134 sysfs_remove_group(&dev->kobj, data->group_temp);
3136 sysfs_remove_group(&dev->kobj, &nct6775_group_other);
3139 /* Get the monitoring functions started */
3140 static inline void nct6775_init_device(struct nct6775_data *data)
3145 /* Start monitoring if needed */
3146 if (data->REG_CONFIG) {
3147 tmp = nct6775_read_value(data, data->REG_CONFIG);
3149 nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
3152 /* Enable temperature sensors if needed */
3153 for (i = 0; i < NUM_TEMP; i++) {
3154 if (!(data->have_temp & (1 << i)))
3156 if (!data->reg_temp_config[i])
3158 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
3160 nct6775_write_value(data, data->reg_temp_config[i],
3164 /* Enable VBAT monitoring if needed */
3165 tmp = nct6775_read_value(data, data->REG_VBAT);
3167 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
3169 diode = nct6775_read_value(data, data->REG_DIODE);
3171 for (i = 0; i < data->temp_fixed_num; i++) {
3172 if (!(data->have_temp_fixed & (1 << i)))
3174 if ((tmp & (data->DIODE_MASK << i))) /* diode */
3176 = 3 - ((diode >> i) & data->DIODE_MASK);
3177 else /* thermistor */
3178 data->temp_type[i] = 4;
3183 nct6775_check_fan_inputs(struct nct6775_data *data)
3185 bool fan3pin, fan4pin, fan4min, fan5pin, fan6pin;
3186 bool pwm3pin, pwm4pin, pwm5pin, pwm6pin;
3187 int sioreg = data->sioreg;
3190 /* fan4 and fan5 share some pins with the GPIO and serial flash */
3191 if (data->kind == nct6775) {
3192 regval = superio_inb(sioreg, 0x2c);
3194 fan3pin = regval & (1 << 6);
3195 pwm3pin = regval & (1 << 7);
3197 /* On NCT6775, fan4 shares pins with the fdc interface */
3198 fan4pin = !(superio_inb(sioreg, 0x2A) & 0x80);
3205 } else if (data->kind == nct6776) {
3206 bool gpok = superio_inb(sioreg, 0x27) & 0x80;
3208 superio_select(sioreg, NCT6775_LD_HWM);
3209 regval = superio_inb(sioreg, SIO_REG_ENABLE);
3214 fan3pin = !(superio_inb(sioreg, 0x24) & 0x40);
3219 fan4pin = superio_inb(sioreg, 0x1C) & 0x01;
3224 fan5pin = superio_inb(sioreg, 0x1C) & 0x02;
3232 } else if (data->kind == nct6106) {
3233 regval = superio_inb(sioreg, 0x24);
3234 fan3pin = !(regval & 0x80);
3235 pwm3pin = regval & 0x08;
3244 } else { /* NCT6779D or NCT6791D */
3245 regval = superio_inb(sioreg, 0x1c);
3247 fan3pin = !(regval & (1 << 5));
3248 fan4pin = !(regval & (1 << 6));
3249 fan5pin = !(regval & (1 << 7));
3251 pwm3pin = !(regval & (1 << 0));
3252 pwm4pin = !(regval & (1 << 1));
3253 pwm5pin = !(regval & (1 << 2));
3257 if (data->kind == nct6791) {
3258 regval = superio_inb(sioreg, 0x2d);
3259 fan6pin = (regval & (1 << 1));
3260 pwm6pin = (regval & (1 << 0));
3261 } else { /* NCT6779D */
3267 /* fan 1 and 2 (0x03) are always present */
3268 data->has_fan = 0x03 | (fan3pin << 2) | (fan4pin << 3) |
3269 (fan5pin << 4) | (fan6pin << 5);
3270 data->has_fan_min = 0x03 | (fan3pin << 2) | (fan4min << 3) |
3272 data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) |
3273 (pwm5pin << 4) | (pwm6pin << 5);
3276 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
3277 int *available, int *mask)
3282 for (i = 0; i < data->pwm_num && *available; i++) {
3287 src = nct6775_read_value(data, regp[i]);
3289 if (!src || (*mask & (1 << src)))
3291 if (src >= data->temp_label_num ||
3292 !strlen(data->temp_label[src]))
3295 index = __ffs(*available);
3296 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3297 *available &= ~(1 << index);
3302 static int nct6775_probe(struct platform_device *pdev)
3304 struct device *dev = &pdev->dev;
3305 struct nct6775_sio_data *sio_data = dev->platform_data;
3306 struct nct6775_data *data;
3307 struct resource *res;
3309 int src, mask, available;
3310 const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3311 const u16 *reg_temp_mon, *reg_temp_alternate, *reg_temp_crit;
3312 const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL;
3313 int num_reg_temp, num_reg_temp_mon;
3315 struct attribute_group *group;
3317 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3318 if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3322 data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3327 data->kind = sio_data->kind;
3328 data->sioreg = sio_data->sioreg;
3329 data->addr = res->start;
3330 mutex_init(&data->update_lock);
3331 data->name = nct6775_device_names[data->kind];
3332 data->bank = 0xff; /* Force initial bank selection */
3333 platform_set_drvdata(pdev, data);
3335 switch (data->kind) {
3339 data->auto_pwm_num = 4;
3340 data->temp_fixed_num = 3;
3341 data->num_temp_alarms = 6;
3342 data->num_temp_beeps = 6;
3344 data->fan_from_reg = fan_from_reg13;
3345 data->fan_from_reg_min = fan_from_reg13;
3347 data->temp_label = nct6776_temp_label;
3348 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3350 data->REG_VBAT = NCT6106_REG_VBAT;
3351 data->REG_DIODE = NCT6106_REG_DIODE;
3352 data->DIODE_MASK = NCT6106_DIODE_MASK;
3353 data->REG_VIN = NCT6106_REG_IN;
3354 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3355 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3356 data->REG_TARGET = NCT6106_REG_TARGET;
3357 data->REG_FAN = NCT6106_REG_FAN;
3358 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
3359 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
3360 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
3361 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
3362 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
3363 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
3364 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
3365 data->REG_PWM[0] = NCT6106_REG_PWM;
3366 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
3367 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
3368 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3369 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3370 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3371 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3372 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3373 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
3374 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
3375 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
3376 data->REG_CRITICAL_TEMP_TOLERANCE
3377 = NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
3378 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
3379 data->CRITICAL_PWM_ENABLE_MASK
3380 = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3381 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
3382 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3383 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3384 data->REG_TEMP_SEL = NCT6106_REG_TEMP_SEL;
3385 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3386 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3387 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3388 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3389 data->REG_ALARM = NCT6106_REG_ALARM;
3390 data->ALARM_BITS = NCT6106_ALARM_BITS;
3391 data->REG_BEEP = NCT6106_REG_BEEP;
3392 data->BEEP_BITS = NCT6106_BEEP_BITS;
3394 reg_temp = NCT6106_REG_TEMP;
3395 reg_temp_mon = NCT6106_REG_TEMP_MON;
3396 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3397 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON);
3398 reg_temp_over = NCT6106_REG_TEMP_OVER;
3399 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3400 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3401 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3402 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3403 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3404 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3410 data->auto_pwm_num = 6;
3411 data->has_fan_div = true;
3412 data->temp_fixed_num = 3;
3413 data->num_temp_alarms = 3;
3414 data->num_temp_beeps = 3;
3416 data->ALARM_BITS = NCT6775_ALARM_BITS;
3417 data->BEEP_BITS = NCT6775_BEEP_BITS;
3419 data->fan_from_reg = fan_from_reg16;
3420 data->fan_from_reg_min = fan_from_reg8;
3421 data->target_temp_mask = 0x7f;
3422 data->tolerance_mask = 0x0f;
3423 data->speed_tolerance_limit = 15;
3425 data->temp_label = nct6775_temp_label;
3426 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
3428 data->REG_CONFIG = NCT6775_REG_CONFIG;
3429 data->REG_VBAT = NCT6775_REG_VBAT;
3430 data->REG_DIODE = NCT6775_REG_DIODE;
3431 data->DIODE_MASK = NCT6775_DIODE_MASK;
3432 data->REG_VIN = NCT6775_REG_IN;
3433 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3434 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3435 data->REG_TARGET = NCT6775_REG_TARGET;
3436 data->REG_FAN = NCT6775_REG_FAN;
3437 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3438 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3439 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3440 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3441 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3442 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3443 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3444 data->REG_PWM[0] = NCT6775_REG_PWM;
3445 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3446 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3447 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3448 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3449 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3450 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3451 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3452 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3453 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3454 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3455 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3456 data->REG_CRITICAL_TEMP_TOLERANCE
3457 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3458 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3459 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3460 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3461 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3462 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3463 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3464 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3465 data->REG_ALARM = NCT6775_REG_ALARM;
3466 data->REG_BEEP = NCT6775_REG_BEEP;
3468 reg_temp = NCT6775_REG_TEMP;
3469 reg_temp_mon = NCT6775_REG_TEMP_MON;
3470 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3471 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3472 reg_temp_over = NCT6775_REG_TEMP_OVER;
3473 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3474 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3475 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3476 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3482 data->auto_pwm_num = 4;
3483 data->has_fan_div = false;
3484 data->temp_fixed_num = 3;
3485 data->num_temp_alarms = 3;
3486 data->num_temp_beeps = 6;
3488 data->ALARM_BITS = NCT6776_ALARM_BITS;
3489 data->BEEP_BITS = NCT6776_BEEP_BITS;
3491 data->fan_from_reg = fan_from_reg13;
3492 data->fan_from_reg_min = fan_from_reg13;
3493 data->target_temp_mask = 0xff;
3494 data->tolerance_mask = 0x07;
3495 data->speed_tolerance_limit = 63;
3497 data->temp_label = nct6776_temp_label;
3498 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3500 data->REG_CONFIG = NCT6775_REG_CONFIG;
3501 data->REG_VBAT = NCT6775_REG_VBAT;
3502 data->REG_DIODE = NCT6775_REG_DIODE;
3503 data->DIODE_MASK = NCT6775_DIODE_MASK;
3504 data->REG_VIN = NCT6775_REG_IN;
3505 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3506 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3507 data->REG_TARGET = NCT6775_REG_TARGET;
3508 data->REG_FAN = NCT6775_REG_FAN;
3509 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3510 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3511 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3512 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3513 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3514 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3515 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3516 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3517 data->REG_PWM[0] = NCT6775_REG_PWM;
3518 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3519 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3520 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3521 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3522 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3523 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3524 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3525 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3526 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3527 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3528 data->REG_CRITICAL_TEMP_TOLERANCE
3529 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3530 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3531 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3532 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3533 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3534 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3535 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3536 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3537 data->REG_ALARM = NCT6775_REG_ALARM;
3538 data->REG_BEEP = NCT6776_REG_BEEP;
3540 reg_temp = NCT6775_REG_TEMP;
3541 reg_temp_mon = NCT6775_REG_TEMP_MON;
3542 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3543 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3544 reg_temp_over = NCT6775_REG_TEMP_OVER;
3545 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3546 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3547 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3548 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3554 data->auto_pwm_num = 4;
3555 data->has_fan_div = false;
3556 data->temp_fixed_num = 6;
3557 data->num_temp_alarms = 2;
3558 data->num_temp_beeps = 2;
3560 data->ALARM_BITS = NCT6779_ALARM_BITS;
3561 data->BEEP_BITS = NCT6779_BEEP_BITS;
3563 data->fan_from_reg = fan_from_reg13;
3564 data->fan_from_reg_min = fan_from_reg13;
3565 data->target_temp_mask = 0xff;
3566 data->tolerance_mask = 0x07;
3567 data->speed_tolerance_limit = 63;
3569 data->temp_label = nct6779_temp_label;
3570 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3572 data->REG_CONFIG = NCT6775_REG_CONFIG;
3573 data->REG_VBAT = NCT6775_REG_VBAT;
3574 data->REG_DIODE = NCT6775_REG_DIODE;
3575 data->DIODE_MASK = NCT6775_DIODE_MASK;
3576 data->REG_VIN = NCT6779_REG_IN;
3577 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3578 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3579 data->REG_TARGET = NCT6775_REG_TARGET;
3580 data->REG_FAN = NCT6779_REG_FAN;
3581 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3582 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3583 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3584 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3585 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3586 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3587 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3588 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3589 data->REG_PWM[0] = NCT6775_REG_PWM;
3590 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3591 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3592 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3593 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3594 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3595 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3596 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3597 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3598 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3599 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3600 data->REG_CRITICAL_TEMP_TOLERANCE
3601 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3602 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3603 data->CRITICAL_PWM_ENABLE_MASK
3604 = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3605 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3606 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3607 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3608 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3609 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3610 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3611 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3612 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3613 data->REG_ALARM = NCT6779_REG_ALARM;
3614 data->REG_BEEP = NCT6776_REG_BEEP;
3616 reg_temp = NCT6779_REG_TEMP;
3617 reg_temp_mon = NCT6779_REG_TEMP_MON;
3618 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3619 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3620 reg_temp_over = NCT6779_REG_TEMP_OVER;
3621 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3622 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3623 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3624 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3630 data->auto_pwm_num = 4;
3631 data->has_fan_div = false;
3632 data->temp_fixed_num = 6;
3633 data->num_temp_alarms = 2;
3634 data->num_temp_beeps = 2;
3636 data->ALARM_BITS = NCT6791_ALARM_BITS;
3637 data->BEEP_BITS = NCT6779_BEEP_BITS;
3639 data->fan_from_reg = fan_from_reg13;
3640 data->fan_from_reg_min = fan_from_reg13;
3641 data->target_temp_mask = 0xff;
3642 data->tolerance_mask = 0x07;
3643 data->speed_tolerance_limit = 63;
3645 data->temp_label = nct6779_temp_label;
3646 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3648 data->REG_CONFIG = NCT6775_REG_CONFIG;
3649 data->REG_VBAT = NCT6775_REG_VBAT;
3650 data->REG_DIODE = NCT6775_REG_DIODE;
3651 data->DIODE_MASK = NCT6775_DIODE_MASK;
3652 data->REG_VIN = NCT6779_REG_IN;
3653 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3654 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3655 data->REG_TARGET = NCT6775_REG_TARGET;
3656 data->REG_FAN = NCT6779_REG_FAN;
3657 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3658 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3659 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3660 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3661 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3662 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3663 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3664 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3665 data->REG_PWM[0] = NCT6775_REG_PWM;
3666 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3667 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3668 data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP;
3669 data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE;
3670 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3671 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3672 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3673 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3674 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3675 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3676 data->REG_CRITICAL_TEMP_TOLERANCE
3677 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3678 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3679 data->CRITICAL_PWM_ENABLE_MASK
3680 = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3681 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3682 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3683 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3684 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3685 data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL;
3686 data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP;
3687 data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL;
3688 data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE;
3689 data->REG_ALARM = NCT6791_REG_ALARM;
3690 data->REG_BEEP = NCT6776_REG_BEEP;
3692 reg_temp = NCT6779_REG_TEMP;
3693 reg_temp_mon = NCT6779_REG_TEMP_MON;
3694 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3695 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3696 reg_temp_over = NCT6779_REG_TEMP_OVER;
3697 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3698 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3699 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3700 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3706 data->have_in = (1 << data->in_num) - 1;
3707 data->have_temp = 0;
3710 * On some boards, not all available temperature sources are monitored,
3711 * even though some of the monitoring registers are unused.
3712 * Get list of unused monitoring registers, then detect if any fan
3713 * controls are configured to use unmonitored temperature sources.
3714 * If so, assign the unmonitored temperature sources to available
3715 * monitoring registers.
3719 for (i = 0; i < num_reg_temp; i++) {
3720 if (reg_temp[i] == 0)
3723 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3724 if (!src || (mask & (1 << src)))
3725 available |= 1 << i;
3731 * Now find unmonitored temperature registers and enable monitoring
3732 * if additional monitoring registers are available.
3734 add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
3735 add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
3738 s = NUM_TEMP_FIXED; /* First dynamic temperature attribute */
3739 for (i = 0; i < num_reg_temp; i++) {
3740 if (reg_temp[i] == 0)
3743 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3744 if (!src || (mask & (1 << src)))
3747 if (src >= data->temp_label_num ||
3748 !strlen(data->temp_label[src])) {
3750 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3751 src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
3757 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3758 if (src <= data->temp_fixed_num) {
3759 data->have_temp |= 1 << (src - 1);
3760 data->have_temp_fixed |= 1 << (src - 1);
3761 data->reg_temp[0][src - 1] = reg_temp[i];
3762 data->reg_temp[1][src - 1] = reg_temp_over[i];
3763 data->reg_temp[2][src - 1] = reg_temp_hyst[i];
3764 if (reg_temp_crit_h && reg_temp_crit_h[i])
3765 data->reg_temp[3][src - 1] = reg_temp_crit_h[i];
3766 else if (reg_temp_crit[src - 1])
3767 data->reg_temp[3][src - 1]
3768 = reg_temp_crit[src - 1];
3769 if (reg_temp_crit_l && reg_temp_crit_l[i])
3770 data->reg_temp[4][src - 1] = reg_temp_crit_l[i];
3771 data->reg_temp_config[src - 1] = reg_temp_config[i];
3772 data->temp_src[src - 1] = src;
3779 /* Use dynamic index for other sources */
3780 data->have_temp |= 1 << s;
3781 data->reg_temp[0][s] = reg_temp[i];
3782 data->reg_temp[1][s] = reg_temp_over[i];
3783 data->reg_temp[2][s] = reg_temp_hyst[i];
3784 data->reg_temp_config[s] = reg_temp_config[i];
3785 if (reg_temp_crit_h && reg_temp_crit_h[i])
3786 data->reg_temp[3][s] = reg_temp_crit_h[i];
3787 else if (reg_temp_crit[src - 1])
3788 data->reg_temp[3][s] = reg_temp_crit[src - 1];
3789 if (reg_temp_crit_l && reg_temp_crit_l[i])
3790 data->reg_temp[4][s] = reg_temp_crit_l[i];
3792 data->temp_src[s] = src;
3797 * Repeat with temperatures used for fan control.
3798 * This set of registers does not support limits.
3800 for (i = 0; i < num_reg_temp_mon; i++) {
3801 if (reg_temp_mon[i] == 0)
3804 src = nct6775_read_value(data, data->REG_TEMP_SEL[i]) & 0x1f;
3805 if (!src || (mask & (1 << src)))
3808 if (src >= data->temp_label_num ||
3809 !strlen(data->temp_label[src])) {
3811 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3812 src, i, data->REG_TEMP_SEL[i], reg_temp_mon[i]);
3818 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3819 if (src <= data->temp_fixed_num) {
3820 if (data->have_temp & (1 << (src - 1)))
3822 data->have_temp |= 1 << (src - 1);
3823 data->have_temp_fixed |= 1 << (src - 1);
3824 data->reg_temp[0][src - 1] = reg_temp_mon[i];
3825 data->temp_src[src - 1] = src;
3832 /* Use dynamic index for other sources */
3833 data->have_temp |= 1 << s;
3834 data->reg_temp[0][s] = reg_temp_mon[i];
3835 data->temp_src[s] = src;
3839 #ifdef USE_ALTERNATE
3841 * Go through the list of alternate temp registers and enable
3843 * The temperature is already monitored if the respective bit in <mask>
3846 for (i = 0; i < data->temp_label_num - 1; i++) {
3847 if (!reg_temp_alternate[i])
3849 if (mask & (1 << (i + 1)))
3851 if (i < data->temp_fixed_num) {
3852 if (data->have_temp & (1 << i))
3854 data->have_temp |= 1 << i;
3855 data->have_temp_fixed |= 1 << i;
3856 data->reg_temp[0][i] = reg_temp_alternate[i];
3857 if (i < num_reg_temp) {
3858 data->reg_temp[1][i] = reg_temp_over[i];
3859 data->reg_temp[2][i] = reg_temp_hyst[i];
3861 data->temp_src[i] = i + 1;
3865 if (s >= NUM_TEMP) /* Abort if no more space */
3868 data->have_temp |= 1 << s;
3869 data->reg_temp[0][s] = reg_temp_alternate[i];
3870 data->temp_src[s] = i + 1;
3873 #endif /* USE_ALTERNATE */
3875 /* Initialize the chip */
3876 nct6775_init_device(data);
3878 err = superio_enter(sio_data->sioreg);
3882 cr2a = superio_inb(sio_data->sioreg, 0x2a);
3883 switch (data->kind) {
3885 data->have_vid = (cr2a & 0x40);
3888 data->have_vid = (cr2a & 0x60) == 0x40;
3898 * We can get the VID input values directly at logical device D 0xe3.
3900 if (data->have_vid) {
3901 superio_select(sio_data->sioreg, NCT6775_LD_VID);
3902 data->vid = superio_inb(sio_data->sioreg, 0xe3);
3903 data->vrm = vid_which_vrm();
3909 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3910 tmp = superio_inb(sio_data->sioreg,
3911 NCT6775_REG_CR_FAN_DEBOUNCE);
3912 switch (data->kind) {
3927 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
3929 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
3933 nct6775_check_fan_inputs(data);
3935 superio_exit(sio_data->sioreg);
3937 /* Read fan clock dividers immediately */
3938 nct6775_init_fan_common(dev, data);
3940 /* Register sysfs hooks */
3941 group = nct6775_create_attr_group(dev, &nct6775_pwm_template_group,
3943 if (IS_ERR(group)) {
3944 err = PTR_ERR(group);
3947 data->group_pwm = group;
3949 group = nct6775_create_attr_group(dev, &nct6775_in_template_group,
3950 fls(data->have_in));
3951 if (IS_ERR(group)) {
3952 err = PTR_ERR(group);
3955 data->group_in = group;
3957 group = nct6775_create_attr_group(dev, &nct6775_fan_template_group,
3958 fls(data->has_fan));
3959 if (IS_ERR(group)) {
3960 err = PTR_ERR(group);
3963 data->group_fan = group;
3965 group = nct6775_create_attr_group(dev, &nct6775_temp_template_group,
3966 fls(data->have_temp));
3967 if (IS_ERR(group)) {
3968 err = PTR_ERR(group);
3971 data->group_temp = group;
3973 err = sysfs_create_group(&dev->kobj, &nct6775_group_other);
3977 data->hwmon_dev = hwmon_device_register(dev);
3978 if (IS_ERR(data->hwmon_dev)) {
3979 err = PTR_ERR(data->hwmon_dev);
3986 nct6775_device_remove_files(dev);
3990 static int nct6775_remove(struct platform_device *pdev)
3992 struct nct6775_data *data = platform_get_drvdata(pdev);
3994 hwmon_device_unregister(data->hwmon_dev);
3995 nct6775_device_remove_files(&pdev->dev);
4001 static int nct6775_suspend(struct device *dev)
4003 struct nct6775_data *data = nct6775_update_device(dev);
4005 mutex_lock(&data->update_lock);
4006 data->vbat = nct6775_read_value(data, data->REG_VBAT);
4007 if (data->kind == nct6775) {
4008 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
4009 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
4011 mutex_unlock(&data->update_lock);
4016 static int nct6775_resume(struct device *dev)
4018 struct nct6775_data *data = dev_get_drvdata(dev);
4021 mutex_lock(&data->update_lock);
4022 data->bank = 0xff; /* Force initial bank selection */
4024 /* Restore limits */
4025 for (i = 0; i < data->in_num; i++) {
4026 if (!(data->have_in & (1 << i)))
4029 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
4031 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
4035 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
4036 if (!(data->has_fan_min & (1 << i)))
4039 nct6775_write_value(data, data->REG_FAN_MIN[i],
4043 for (i = 0; i < NUM_TEMP; i++) {
4044 if (!(data->have_temp & (1 << i)))
4047 for (j = 1; j < ARRAY_SIZE(data->reg_temp); j++)
4048 if (data->reg_temp[j][i])
4049 nct6775_write_temp(data, data->reg_temp[j][i],
4053 /* Restore other settings */
4054 nct6775_write_value(data, data->REG_VBAT, data->vbat);
4055 if (data->kind == nct6775) {
4056 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
4057 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
4060 /* Force re-reading all values */
4061 data->valid = false;
4062 mutex_unlock(&data->update_lock);
4067 static const struct dev_pm_ops nct6775_dev_pm_ops = {
4068 .suspend = nct6775_suspend,
4069 .resume = nct6775_resume,
4072 #define NCT6775_DEV_PM_OPS (&nct6775_dev_pm_ops)
4074 #define NCT6775_DEV_PM_OPS NULL
4075 #endif /* CONFIG_PM */
4077 static struct platform_driver nct6775_driver = {
4079 .owner = THIS_MODULE,
4081 .pm = NCT6775_DEV_PM_OPS,
4083 .probe = nct6775_probe,
4084 .remove = nct6775_remove,
4087 static const char * const nct6775_sio_names[] __initconst = {
4095 /* nct6775_find() looks for a '627 in the Super-I/O config space */
4096 static int __init nct6775_find(int sioaddr, struct nct6775_sio_data *sio_data)
4102 err = superio_enter(sioaddr);
4109 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
4110 | superio_inb(sioaddr, SIO_REG_DEVID + 1);
4111 switch (val & SIO_ID_MASK) {
4112 case SIO_NCT6106_ID:
4113 sio_data->kind = nct6106;
4115 case SIO_NCT6775_ID:
4116 sio_data->kind = nct6775;
4118 case SIO_NCT6776_ID:
4119 sio_data->kind = nct6776;
4121 case SIO_NCT6779_ID:
4122 sio_data->kind = nct6779;
4124 case SIO_NCT6791_ID:
4125 sio_data->kind = nct6791;
4129 pr_debug("unsupported chip ID: 0x%04x\n", val);
4130 superio_exit(sioaddr);
4134 /* We have a known chip, find the HWM I/O address */
4135 superio_select(sioaddr, NCT6775_LD_HWM);
4136 val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
4137 | superio_inb(sioaddr, SIO_REG_ADDR + 1);
4138 addr = val & IOREGION_ALIGNMENT;
4140 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
4141 superio_exit(sioaddr);
4145 /* Activate logical device if needed */
4146 val = superio_inb(sioaddr, SIO_REG_ENABLE);
4147 if (!(val & 0x01)) {
4148 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
4149 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
4151 if (sio_data->kind == nct6791) {
4152 val = superio_inb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE);
4154 pr_info("Enabling hardware monitor logical device mappings.\n");
4155 superio_outb(sioaddr,
4156 NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE,
4161 superio_exit(sioaddr);
4162 pr_info("Found %s or compatible chip at %#x:%#x\n",
4163 nct6775_sio_names[sio_data->kind], sioaddr, addr);
4164 sio_data->sioreg = sioaddr;
4170 * when Super-I/O functions move to a separate file, the Super-I/O
4171 * bus will manage the lifetime of the device and this module will only keep
4172 * track of the nct6775 driver. But since we platform_device_alloc(), we
4173 * must keep track of the device
4175 static struct platform_device *pdev[2];
4177 static int __init sensors_nct6775_init(void)
4182 struct resource res;
4183 struct nct6775_sio_data sio_data;
4184 int sioaddr[2] = { 0x2e, 0x4e };
4186 err = platform_driver_register(&nct6775_driver);
4191 * initialize sio_data->kind and sio_data->sioreg.
4193 * when Super-I/O functions move to a separate file, the Super-I/O
4194 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
4195 * nct6775 hardware monitor, and call probe()
4197 for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4198 address = nct6775_find(sioaddr[i], &sio_data);
4204 pdev[i] = platform_device_alloc(DRVNAME, address);
4207 goto exit_device_put;
4210 err = platform_device_add_data(pdev[i], &sio_data,
4211 sizeof(struct nct6775_sio_data));
4213 goto exit_device_put;
4215 memset(&res, 0, sizeof(res));
4217 res.start = address + IOREGION_OFFSET;
4218 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
4219 res.flags = IORESOURCE_IO;
4221 err = acpi_check_resource_conflict(&res);
4223 platform_device_put(pdev[i]);
4228 err = platform_device_add_resources(pdev[i], &res, 1);
4230 goto exit_device_put;
4232 /* platform_device_add calls probe() */
4233 err = platform_device_add(pdev[i]);
4235 goto exit_device_put;
4239 goto exit_unregister;
4245 for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4247 platform_device_put(pdev[i]);
4250 platform_driver_unregister(&nct6775_driver);
4254 static void __exit sensors_nct6775_exit(void)
4258 for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4260 platform_device_unregister(pdev[i]);
4262 platform_driver_unregister(&nct6775_driver);
4265 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4266 MODULE_DESCRIPTION("NCT6775F/NCT6776F/NCT6779D driver");
4267 MODULE_LICENSE("GPL");
4269 module_init(sensors_nct6775_init);
4270 module_exit(sensors_nct6775_exit);