2 * nct6775 - Driver for the hardware monitoring functionality of
3 * Nuvoton NCT677x Super-I/O chips
5 * Copyright (C) 2012 Guenter Roeck <linux@roeck-us.net>
7 * Derived from w83627ehf driver
8 * Copyright (C) 2005-2012 Jean Delvare <jdelvare@suse.de>
9 * Copyright (C) 2006 Yuan Mu (Winbond),
10 * Rudolf Marek <r.marek@assembler.cz>
11 * David Hubbard <david.c.hubbard@gmail.com>
12 * Daniel J Blueman <daniel.blueman@gmail.com>
13 * Copyright (C) 2010 Sheng-Yuan Huang (Nuvoton) (PS00)
15 * Shamelessly ripped from the w83627hf driver
16 * Copyright (C) 2003 Mark Studebaker
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
33 * Supports the following chips:
35 * Chip #vin #fan #pwm #temp chip IDs man ID
36 * nct6106d 9 3 3 6+3 0xc450 0xc1 0x5ca3
37 * nct6775f 9 4 3 6+3 0xb470 0xc1 0x5ca3
38 * nct6776f 9 5 3 6+3 0xc330 0xc1 0x5ca3
39 * nct6779d 15 5 5 2+6 0xc560 0xc1 0x5ca3
40 * nct6791d 15 6 6 2+6 0xc800 0xc1 0x5ca3
41 * nct6792d 15 6 6 2+6 0xc911 0xc1 0x5ca3
42 * nct6793d 15 6 6 2+6 0xd120 0xc1 0x5ca3
44 * #temp lists the number of monitored temperature sources (first value) plus
45 * the number of directly connectable temperature sensors (second value).
48 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
50 #include <linux/module.h>
51 #include <linux/init.h>
52 #include <linux/slab.h>
53 #include <linux/jiffies.h>
54 #include <linux/platform_device.h>
55 #include <linux/hwmon.h>
56 #include <linux/hwmon-sysfs.h>
57 #include <linux/hwmon-vid.h>
58 #include <linux/err.h>
59 #include <linux/mutex.h>
60 #include <linux/acpi.h>
61 #include <linux/dmi.h>
68 enum kinds { nct6106, nct6775, nct6776, nct6779, nct6791, nct6792, nct6793 };
70 /* used to set data->name = nct6775_device_names[data->sio_kind] */
71 static const char * const nct6775_device_names[] = {
81 static unsigned short force_id;
82 module_param(force_id, ushort, 0);
83 MODULE_PARM_DESC(force_id, "Override the detected device ID");
85 static unsigned short fan_debounce;
86 module_param(fan_debounce, ushort, 0);
87 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
89 #define DRVNAME "nct6775"
92 * Super-I/O constants and functions
95 #define NCT6775_LD_ACPI 0x0a
96 #define NCT6775_LD_HWM 0x0b
97 #define NCT6775_LD_VID 0x0d
99 #define SIO_REG_LDSEL 0x07 /* Logical device select */
100 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
101 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
102 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
104 #define SIO_NCT6106_ID 0xc450
105 #define SIO_NCT6775_ID 0xb470
106 #define SIO_NCT6776_ID 0xc330
107 #define SIO_NCT6779_ID 0xc560
108 #define SIO_NCT6791_ID 0xc800
109 #define SIO_NCT6792_ID 0xc910
110 #define SIO_NCT6793_ID 0xd120
111 #define SIO_ID_MASK 0xFFF0
113 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
116 superio_outb(int ioreg, int reg, int val)
119 outb(val, ioreg + 1);
123 superio_inb(int ioreg, int reg)
126 return inb(ioreg + 1);
130 superio_select(int ioreg, int ld)
132 outb(SIO_REG_LDSEL, ioreg);
137 superio_enter(int ioreg)
140 * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
142 if (!request_muxed_region(ioreg, 2, DRVNAME))
152 superio_exit(int ioreg)
156 outb(0x02, ioreg + 1);
157 release_region(ioreg, 2);
164 #define IOREGION_ALIGNMENT (~7)
165 #define IOREGION_OFFSET 5
166 #define IOREGION_LENGTH 2
167 #define ADDR_REG_OFFSET 0
168 #define DATA_REG_OFFSET 1
170 #define NCT6775_REG_BANK 0x4E
171 #define NCT6775_REG_CONFIG 0x40
174 * Not currently used:
175 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
176 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
177 * REG_MAN_ID is at port 0x4f
178 * REG_CHIP_ID is at port 0x58
181 #define NUM_TEMP 10 /* Max number of temp attribute sets w/ limits*/
182 #define NUM_TEMP_FIXED 6 /* Max number of fixed temp attribute sets */
184 #define NUM_REG_ALARM 7 /* Max number of alarm registers */
185 #define NUM_REG_BEEP 5 /* Max number of beep registers */
189 /* Common and NCT6775 specific data */
191 /* Voltage min/max registers for nr=7..14 are in bank 5 */
193 static const u16 NCT6775_REG_IN_MAX[] = {
194 0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
195 0x55c, 0x55e, 0x560, 0x562 };
196 static const u16 NCT6775_REG_IN_MIN[] = {
197 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
198 0x55d, 0x55f, 0x561, 0x563 };
199 static const u16 NCT6775_REG_IN[] = {
200 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
203 #define NCT6775_REG_VBAT 0x5D
204 #define NCT6775_REG_DIODE 0x5E
205 #define NCT6775_DIODE_MASK 0x02
207 #define NCT6775_REG_FANDIV1 0x506
208 #define NCT6775_REG_FANDIV2 0x507
210 #define NCT6775_REG_CR_FAN_DEBOUNCE 0xf0
212 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
214 /* 0..15 voltages, 16..23 fans, 24..29 temperatures, 30..31 intrusion */
216 static const s8 NCT6775_ALARM_BITS[] = {
217 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
218 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
220 6, 7, 11, -1, -1, /* fan1..fan5 */
221 -1, -1, -1, /* unused */
222 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
223 12, -1 }; /* intrusion0, intrusion1 */
225 #define FAN_ALARM_BASE 16
226 #define TEMP_ALARM_BASE 24
227 #define INTRUSION_ALARM_BASE 30
229 static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e };
232 * 0..14 voltages, 15 global beep enable, 16..23 fans, 24..29 temperatures,
235 static const s8 NCT6775_BEEP_BITS[] = {
236 0, 1, 2, 3, 8, 9, 10, 16, /* in0.. in7 */
237 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
238 21, /* global beep enable */
239 6, 7, 11, 28, -1, /* fan1..fan5 */
240 -1, -1, -1, /* unused */
241 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
242 12, -1 }; /* intrusion0, intrusion1 */
244 #define BEEP_ENABLE_BASE 15
246 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
247 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
249 /* DC or PWM output fan configuration */
250 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
251 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
253 /* Advanced Fan control, some values are common for all fans */
255 static const u16 NCT6775_REG_TARGET[] = {
256 0x101, 0x201, 0x301, 0x801, 0x901, 0xa01 };
257 static const u16 NCT6775_REG_FAN_MODE[] = {
258 0x102, 0x202, 0x302, 0x802, 0x902, 0xa02 };
259 /* STEP_DOWN_TIME and STEP_UP_TIME regs are swapped for all chips but NCT6775 */
260 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
261 0x103, 0x203, 0x303, 0x803, 0x903, 0xa03 };
262 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
263 0x104, 0x204, 0x304, 0x804, 0x904, 0xa04 };
264 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
265 0x105, 0x205, 0x305, 0x805, 0x905, 0xa05 };
266 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = {
267 0x106, 0x206, 0x306, 0x806, 0x906, 0xa06 };
268 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
269 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
271 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
272 0x107, 0x207, 0x307, 0x807, 0x907, 0xa07 };
273 static const u16 NCT6775_REG_PWM[] = {
274 0x109, 0x209, 0x309, 0x809, 0x909, 0xa09 };
275 static const u16 NCT6775_REG_PWM_READ[] = {
276 0x01, 0x03, 0x11, 0x13, 0x15, 0xa09 };
278 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
279 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
280 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
281 static const u16 NCT6775_FAN_PULSE_SHIFT[] = { 0, 0, 0, 0, 0, 0 };
283 static const u16 NCT6775_REG_TEMP[] = {
284 0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
286 static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77 };
288 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
289 0, 0x152, 0x252, 0x628, 0x629, 0x62A };
290 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
291 0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
292 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
293 0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
295 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
296 0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
298 static const u16 NCT6775_REG_TEMP_SEL[] = {
299 0x100, 0x200, 0x300, 0x800, 0x900, 0xa00 };
301 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
302 0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 };
303 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
304 0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a };
305 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
306 0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b };
307 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
308 0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c };
309 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
310 0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d };
312 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
314 static const u16 NCT6775_REG_AUTO_TEMP[] = {
315 0x121, 0x221, 0x321, 0x821, 0x921, 0xa21 };
316 static const u16 NCT6775_REG_AUTO_PWM[] = {
317 0x127, 0x227, 0x327, 0x827, 0x927, 0xa27 };
319 #define NCT6775_AUTO_TEMP(data, nr, p) ((data)->REG_AUTO_TEMP[nr] + (p))
320 #define NCT6775_AUTO_PWM(data, nr, p) ((data)->REG_AUTO_PWM[nr] + (p))
322 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
324 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
325 0x135, 0x235, 0x335, 0x835, 0x935, 0xa35 };
326 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
327 0x138, 0x238, 0x338, 0x838, 0x938, 0xa38 };
329 static const char *const nct6775_temp_label[] = {
343 "PCH_CHIP_CPU_MAX_TEMP",
353 static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
354 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
356 static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
357 = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
360 /* NCT6776 specific data */
362 static const s8 NCT6776_ALARM_BITS[] = {
363 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
364 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
366 6, 7, 11, 10, 23, /* fan1..fan5 */
367 -1, -1, -1, /* unused */
368 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
369 12, 9 }; /* intrusion0, intrusion1 */
371 static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5 };
373 static const s8 NCT6776_BEEP_BITS[] = {
374 0, 1, 2, 3, 4, 5, 6, 7, /* in0.. in7 */
375 8, -1, -1, -1, -1, -1, -1, /* in8..in14 */
376 24, /* global beep enable */
377 25, 26, 27, 28, 29, /* fan1..fan5 */
378 -1, -1, -1, /* unused */
379 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
380 30, 31 }; /* intrusion0, intrusion1 */
382 static const u16 NCT6776_REG_TOLERANCE_H[] = {
383 0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c };
385 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0 };
386 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0 };
388 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
389 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
391 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
392 0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e };
394 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
395 0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
397 static const char *const nct6776_temp_label[] = {
412 "PCH_CHIP_CPU_MAX_TEMP",
423 static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
424 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
426 static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
427 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
429 /* NCT6779 specific data */
431 static const u16 NCT6779_REG_IN[] = {
432 0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
433 0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
435 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
436 0x459, 0x45A, 0x45B, 0x568 };
438 static const s8 NCT6779_ALARM_BITS[] = {
439 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
440 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */
442 6, 7, 11, 10, 23, /* fan1..fan5 */
443 -1, -1, -1, /* unused */
444 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
445 12, 9 }; /* intrusion0, intrusion1 */
447 static const s8 NCT6779_BEEP_BITS[] = {
448 0, 1, 2, 3, 4, 5, 6, 7, /* in0.. in7 */
449 8, 9, 10, 11, 12, 13, 14, /* in8..in14 */
450 24, /* global beep enable */
451 25, 26, 27, 28, 29, /* fan1..fan5 */
452 -1, -1, -1, /* unused */
453 16, 17, -1, -1, -1, -1, /* temp1..temp6 */
454 30, 31 }; /* intrusion0, intrusion1 */
456 static const u16 NCT6779_REG_FAN[] = {
457 0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8, 0x4ba };
458 static const u16 NCT6779_REG_FAN_PULSES[] = {
459 0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
461 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
462 0x136, 0x236, 0x336, 0x836, 0x936, 0xa36 };
463 #define NCT6779_CRITICAL_PWM_ENABLE_MASK 0x01
464 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
465 0x137, 0x237, 0x337, 0x837, 0x937, 0xa37 };
467 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
468 static const u16 NCT6779_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b };
469 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
471 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
473 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
476 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
477 0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
479 static const char *const nct6779_temp_label[] = {
498 "PCH_CHIP_CPU_MAX_TEMP",
514 #define NCT6779_NUM_LABELS (ARRAY_SIZE(nct6779_temp_label) - 5)
515 #define NCT6791_NUM_LABELS ARRAY_SIZE(nct6779_temp_label)
517 static const u16 NCT6779_REG_TEMP_ALTERNATE[NCT6791_NUM_LABELS - 1]
518 = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
519 0, 0, 0, 0, 0, 0, 0, 0,
520 0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
523 static const u16 NCT6779_REG_TEMP_CRIT[NCT6791_NUM_LABELS - 1]
524 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
526 /* NCT6791 specific data */
528 #define NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE 0x28
530 static const u16 NCT6791_REG_WEIGHT_TEMP_SEL[6] = { 0, 0x239 };
531 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP[6] = { 0, 0x23a };
532 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP_TOL[6] = { 0, 0x23b };
533 static const u16 NCT6791_REG_WEIGHT_DUTY_STEP[6] = { 0, 0x23c };
534 static const u16 NCT6791_REG_WEIGHT_TEMP_BASE[6] = { 0, 0x23d };
535 static const u16 NCT6791_REG_WEIGHT_DUTY_BASE[6] = { 0, 0x23e };
537 static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = {
538 0x459, 0x45A, 0x45B, 0x568, 0x45D };
540 static const s8 NCT6791_ALARM_BITS[] = {
541 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
542 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */
544 6, 7, 11, 10, 23, 33, /* fan1..fan6 */
546 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
547 12, 9 }; /* intrusion0, intrusion1 */
549 /* NCT6792/NCT6793 specific data */
551 static const u16 NCT6792_REG_TEMP_MON[] = {
552 0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d };
553 static const u16 NCT6792_REG_BEEP[NUM_REG_BEEP] = {
554 0xb2, 0xb3, 0xb4, 0xb5, 0xbf };
556 /* NCT6102D/NCT6106D specific data */
558 #define NCT6106_REG_VBAT 0x318
559 #define NCT6106_REG_DIODE 0x319
560 #define NCT6106_DIODE_MASK 0x01
562 static const u16 NCT6106_REG_IN_MAX[] = {
563 0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
564 static const u16 NCT6106_REG_IN_MIN[] = {
565 0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
566 static const u16 NCT6106_REG_IN[] = {
567 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
569 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
570 static const u16 NCT6106_REG_TEMP_MON[] = { 0x18, 0x19, 0x1a };
571 static const u16 NCT6106_REG_TEMP_HYST[] = {
572 0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
573 static const u16 NCT6106_REG_TEMP_OVER[] = {
574 0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
575 static const u16 NCT6106_REG_TEMP_CRIT_L[] = {
576 0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
577 static const u16 NCT6106_REG_TEMP_CRIT_H[] = {
578 0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
579 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
580 static const u16 NCT6106_REG_TEMP_CONFIG[] = {
581 0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
583 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
584 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
585 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0, 0 };
586 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4, 0, 0 };
588 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
589 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
590 static const u16 NCT6106_REG_PWM[] = { 0x119, 0x129, 0x139 };
591 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c };
592 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
593 static const u16 NCT6106_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130 };
594 static const u16 NCT6106_REG_TEMP_SOURCE[] = {
595 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
597 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
598 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = {
599 0x11b, 0x12b, 0x13b };
601 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
602 #define NCT6106_CRITICAL_PWM_ENABLE_MASK 0x10
603 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
605 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
606 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
607 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
608 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
609 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
610 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
612 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
614 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
615 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
616 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
617 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x17c };
618 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
619 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
621 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
622 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
624 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = {
625 0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
627 static const s8 NCT6106_ALARM_BITS[] = {
628 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */
629 9, -1, -1, -1, -1, -1, -1, /* in8..in14 */
631 32, 33, 34, -1, -1, /* fan1..fan5 */
632 -1, -1, -1, /* unused */
633 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
634 48, -1 /* intrusion0, intrusion1 */
637 static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = {
638 0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 };
640 static const s8 NCT6106_BEEP_BITS[] = {
641 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */
642 9, 10, 11, 12, -1, -1, -1, /* in8..in14 */
643 32, /* global beep enable */
644 24, 25, 26, 27, 28, /* fan1..fan5 */
645 -1, -1, -1, /* unused */
646 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
647 34, -1 /* intrusion0, intrusion1 */
650 static const u16 NCT6106_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
651 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x51, 0x52, 0x54 };
653 static const u16 NCT6106_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
654 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x204, 0x205 };
656 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
658 if (mode == 0 && pwm == 255)
663 static int pwm_enable_to_reg(enum pwm_enable mode)
674 /* 1 is DC mode, output in ms */
675 static unsigned int step_time_from_reg(u8 reg, u8 mode)
677 return mode ? 400 * reg : 100 * reg;
680 static u8 step_time_to_reg(unsigned int msec, u8 mode)
682 return clamp_val((mode ? (msec + 200) / 400 :
683 (msec + 50) / 100), 1, 255);
686 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
688 if (reg == 0 || reg == 255)
690 return 1350000U / (reg << divreg);
693 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
695 if ((reg & 0xff1f) == 0xff1f)
698 reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
703 return 1350000U / reg;
706 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
708 if (reg == 0 || reg == 0xffff)
712 * Even though the registers are 16 bit wide, the fan divisor
715 return 1350000U / (reg << divreg);
718 static u16 fan_to_reg(u32 fan, unsigned int divreg)
723 return (1350000U / fan) >> divreg;
726 static inline unsigned int
733 * Some of the voltage inputs have internal scaling, the tables below
734 * contain 8 (the ADC LSB in mV) * scaling factor * 100
736 static const u16 scale_in[15] = {
737 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
741 static inline long in_from_reg(u8 reg, u8 nr)
743 return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
746 static inline u8 in_to_reg(u32 val, u8 nr)
748 return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
752 * Data structures and manipulation thereof
755 struct nct6775_data {
756 int addr; /* IO base of hw monitor block */
757 int sioreg; /* SIO register address */
761 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
762 struct device *hwmon_dev;
765 const struct attribute_group *groups[6];
767 u16 reg_temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
768 * 3=temp_crit, 4=temp_lcrit
770 u8 temp_src[NUM_TEMP];
771 u16 reg_temp_config[NUM_TEMP];
772 const char * const *temp_label;
780 const s8 *ALARM_BITS;
784 const u16 *REG_IN_MINMAX[2];
786 const u16 *REG_TARGET;
788 const u16 *REG_FAN_MODE;
789 const u16 *REG_FAN_MIN;
790 const u16 *REG_FAN_PULSES;
791 const u16 *FAN_PULSE_SHIFT;
792 const u16 *REG_FAN_TIME[3];
794 const u16 *REG_TOLERANCE_H;
796 const u8 *REG_PWM_MODE;
797 const u8 *PWM_MODE_MASK;
799 const u16 *REG_PWM[7]; /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
800 * [3]=pwm_max, [4]=pwm_step,
801 * [5]=weight_duty_step, [6]=weight_duty_base
803 const u16 *REG_PWM_READ;
805 const u16 *REG_CRITICAL_PWM_ENABLE;
806 u8 CRITICAL_PWM_ENABLE_MASK;
807 const u16 *REG_CRITICAL_PWM;
809 const u16 *REG_AUTO_TEMP;
810 const u16 *REG_AUTO_PWM;
812 const u16 *REG_CRITICAL_TEMP;
813 const u16 *REG_CRITICAL_TEMP_TOLERANCE;
815 const u16 *REG_TEMP_SOURCE; /* temp register sources */
816 const u16 *REG_TEMP_SEL;
817 const u16 *REG_WEIGHT_TEMP_SEL;
818 const u16 *REG_WEIGHT_TEMP[3]; /* 0=base, 1=tolerance, 2=step */
820 const u16 *REG_TEMP_OFFSET;
822 const u16 *REG_ALARM;
825 unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
826 unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
828 struct mutex update_lock;
829 bool valid; /* true if following fields are valid */
830 unsigned long last_updated; /* In jiffies */
832 /* Register values */
833 u8 bank; /* current register bank */
834 u8 in_num; /* number of in inputs we have */
835 u8 in[15][3]; /* [0]=in, [1]=in_max, [2]=in_min */
836 unsigned int rpm[NUM_FAN];
837 u16 fan_min[NUM_FAN];
838 u8 fan_pulses[NUM_FAN];
841 u8 has_fan; /* some fan inputs can be disabled */
842 u8 has_fan_min; /* some fans don't have min register */
845 u8 num_temp_alarms; /* 2, 3, or 6 */
846 u8 num_temp_beeps; /* 2, 3, or 6 */
847 u8 temp_fixed_num; /* 3 or 6 */
848 u8 temp_type[NUM_TEMP_FIXED];
849 s8 temp_offset[NUM_TEMP_FIXED];
850 s16 temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
851 * 3=temp_crit, 4=temp_lcrit */
855 u8 pwm_num; /* number of pwm */
856 u8 pwm_mode[NUM_FAN]; /* 1->DC variable voltage,
857 * 0->PWM variable duty cycle
859 enum pwm_enable pwm_enable[NUM_FAN];
862 * 2->thermal cruise mode (also called SmartFan I)
863 * 3->fan speed cruise mode
865 * 5->enhanced variable thermal cruise (SmartFan IV)
867 u8 pwm[7][NUM_FAN]; /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
868 * [3]=pwm_max, [4]=pwm_step,
869 * [5]=weight_duty_step, [6]=weight_duty_base
872 u8 target_temp[NUM_FAN];
874 u32 target_speed[NUM_FAN];
875 u32 target_speed_tolerance[NUM_FAN];
876 u8 speed_tolerance_limit;
878 u8 temp_tolerance[2][NUM_FAN];
881 u8 fan_time[3][NUM_FAN]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
883 /* Automatic fan speed control registers */
885 u8 auto_pwm[NUM_FAN][7];
886 u8 auto_temp[NUM_FAN][7];
887 u8 pwm_temp_sel[NUM_FAN];
888 u8 pwm_weight_temp_sel[NUM_FAN];
889 u8 weight_temp[3][NUM_FAN]; /* 0->temp_step, 1->temp_step_tol,
902 /* Remember extra register values over suspend/resume */
909 struct nct6775_sio_data {
914 struct sensor_device_template {
915 struct device_attribute dev_attr;
923 bool s2; /* true if both index and nr are used */
926 struct sensor_device_attr_u {
928 struct sensor_device_attribute a1;
929 struct sensor_device_attribute_2 a2;
934 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) { \
935 .attr = {.name = _template, .mode = _mode }, \
940 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \
941 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
945 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \
947 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
948 .u.s.index = _index, \
952 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
953 static struct sensor_device_template sensor_dev_template_##_name \
954 = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, \
957 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store, \
959 static struct sensor_device_template sensor_dev_template_##_name \
960 = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \
963 struct sensor_template_group {
964 struct sensor_device_template **templates;
965 umode_t (*is_visible)(struct kobject *, struct attribute *, int);
969 static struct attribute_group *
970 nct6775_create_attr_group(struct device *dev, struct sensor_template_group *tg,
973 struct attribute_group *group;
974 struct sensor_device_attr_u *su;
975 struct sensor_device_attribute *a;
976 struct sensor_device_attribute_2 *a2;
977 struct attribute **attrs;
978 struct sensor_device_template **t;
982 return ERR_PTR(-EINVAL);
985 for (count = 0; *t; t++, count++)
989 return ERR_PTR(-EINVAL);
991 group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
993 return ERR_PTR(-ENOMEM);
995 attrs = devm_kzalloc(dev, sizeof(*attrs) * (repeat * count + 1),
998 return ERR_PTR(-ENOMEM);
1000 su = devm_kzalloc(dev, sizeof(*su) * repeat * count,
1003 return ERR_PTR(-ENOMEM);
1005 group->attrs = attrs;
1006 group->is_visible = tg->is_visible;
1008 for (i = 0; i < repeat; i++) {
1010 while (*t != NULL) {
1011 snprintf(su->name, sizeof(su->name),
1012 (*t)->dev_attr.attr.name, tg->base + i);
1015 a2->dev_attr.attr.name = su->name;
1016 a2->nr = (*t)->u.s.nr + i;
1017 a2->index = (*t)->u.s.index;
1018 a2->dev_attr.attr.mode =
1019 (*t)->dev_attr.attr.mode;
1020 a2->dev_attr.show = (*t)->dev_attr.show;
1021 a2->dev_attr.store = (*t)->dev_attr.store;
1022 *attrs = &a2->dev_attr.attr;
1025 a->dev_attr.attr.name = su->name;
1026 a->index = (*t)->u.index + i;
1027 a->dev_attr.attr.mode =
1028 (*t)->dev_attr.attr.mode;
1029 a->dev_attr.show = (*t)->dev_attr.show;
1030 a->dev_attr.store = (*t)->dev_attr.store;
1031 *attrs = &a->dev_attr.attr;
1042 static bool is_word_sized(struct nct6775_data *data, u16 reg)
1044 switch (data->kind) {
1046 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1047 reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
1048 reg == 0x111 || reg == 0x121 || reg == 0x131;
1050 return (((reg & 0xff00) == 0x100 ||
1051 (reg & 0xff00) == 0x200) &&
1052 ((reg & 0x00ff) == 0x50 ||
1053 (reg & 0x00ff) == 0x53 ||
1054 (reg & 0x00ff) == 0x55)) ||
1055 (reg & 0xfff0) == 0x630 ||
1056 reg == 0x640 || reg == 0x642 ||
1058 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1059 reg == 0x73 || reg == 0x75 || reg == 0x77;
1061 return (((reg & 0xff00) == 0x100 ||
1062 (reg & 0xff00) == 0x200) &&
1063 ((reg & 0x00ff) == 0x50 ||
1064 (reg & 0x00ff) == 0x53 ||
1065 (reg & 0x00ff) == 0x55)) ||
1066 (reg & 0xfff0) == 0x630 ||
1068 reg == 0x640 || reg == 0x642 ||
1069 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1070 reg == 0x73 || reg == 0x75 || reg == 0x77;
1075 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
1076 ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x0b) ||
1078 reg == 0x63a || reg == 0x63c || reg == 0x63e ||
1079 reg == 0x640 || reg == 0x642 ||
1080 reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
1081 reg == 0x7b || reg == 0x7d;
1087 * On older chips, only registers 0x50-0x5f are banked.
1088 * On more recent chips, all registers are banked.
1089 * Assume that is the case and set the bank number for each access.
1090 * Cache the bank number so it only needs to be set if it changes.
1092 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
1096 if (data->bank != bank) {
1097 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
1098 outb_p(bank, data->addr + DATA_REG_OFFSET);
1103 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
1105 int res, word_sized = is_word_sized(data, reg);
1107 nct6775_set_bank(data, reg);
1108 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1109 res = inb_p(data->addr + DATA_REG_OFFSET);
1111 outb_p((reg & 0xff) + 1,
1112 data->addr + ADDR_REG_OFFSET);
1113 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
1118 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
1120 int word_sized = is_word_sized(data, reg);
1122 nct6775_set_bank(data, reg);
1123 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1125 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
1126 outb_p((reg & 0xff) + 1,
1127 data->addr + ADDR_REG_OFFSET);
1129 outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
1133 /* We left-align 8-bit temperature values to make the code simpler */
1134 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
1138 res = nct6775_read_value(data, reg);
1139 if (!is_word_sized(data, reg))
1145 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
1147 if (!is_word_sized(data, reg))
1149 return nct6775_write_value(data, reg, value);
1152 /* This function assumes that the caller holds data->update_lock */
1153 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
1159 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
1160 | (data->fan_div[0] & 0x7);
1161 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1164 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
1165 | ((data->fan_div[1] << 4) & 0x70);
1166 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1169 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
1170 | (data->fan_div[2] & 0x7);
1171 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1174 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
1175 | ((data->fan_div[3] << 4) & 0x70);
1176 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1181 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
1183 if (data->kind == nct6775)
1184 nct6775_write_fan_div(data, nr);
1187 static void nct6775_update_fan_div(struct nct6775_data *data)
1191 i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
1192 data->fan_div[0] = i & 0x7;
1193 data->fan_div[1] = (i & 0x70) >> 4;
1194 i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
1195 data->fan_div[2] = i & 0x7;
1196 if (data->has_fan & (1 << 3))
1197 data->fan_div[3] = (i & 0x70) >> 4;
1200 static void nct6775_update_fan_div_common(struct nct6775_data *data)
1202 if (data->kind == nct6775)
1203 nct6775_update_fan_div(data);
1206 static void nct6775_init_fan_div(struct nct6775_data *data)
1210 nct6775_update_fan_div_common(data);
1212 * For all fans, start with highest divider value if the divider
1213 * register is not initialized. This ensures that we get a
1214 * reading from the fan count register, even if it is not optimal.
1215 * We'll compute a better divider later on.
1217 for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
1218 if (!(data->has_fan & (1 << i)))
1220 if (data->fan_div[i] == 0) {
1221 data->fan_div[i] = 7;
1222 nct6775_write_fan_div_common(data, i);
1227 static void nct6775_init_fan_common(struct device *dev,
1228 struct nct6775_data *data)
1233 if (data->has_fan_div)
1234 nct6775_init_fan_div(data);
1237 * If fan_min is not set (0), set it to 0xff to disable it. This
1238 * prevents the unnecessary warning when fanX_min is reported as 0.
1240 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1241 if (data->has_fan_min & (1 << i)) {
1242 reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
1244 nct6775_write_value(data, data->REG_FAN_MIN[i],
1245 data->has_fan_div ? 0xff
1251 static void nct6775_select_fan_div(struct device *dev,
1252 struct nct6775_data *data, int nr, u16 reg)
1254 u8 fan_div = data->fan_div[nr];
1257 if (!data->has_fan_div)
1261 * If we failed to measure the fan speed, or the reported value is not
1262 * in the optimal range, and the clock divider can be modified,
1263 * let's try that for next time.
1265 if (reg == 0x00 && fan_div < 0x07)
1267 else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1270 if (fan_div != data->fan_div[nr]) {
1271 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1272 nr + 1, div_from_reg(data->fan_div[nr]),
1273 div_from_reg(fan_div));
1275 /* Preserve min limit if possible */
1276 if (data->has_fan_min & (1 << nr)) {
1277 fan_min = data->fan_min[nr];
1278 if (fan_div > data->fan_div[nr]) {
1279 if (fan_min != 255 && fan_min > 1)
1282 if (fan_min != 255) {
1288 if (fan_min != data->fan_min[nr]) {
1289 data->fan_min[nr] = fan_min;
1290 nct6775_write_value(data, data->REG_FAN_MIN[nr],
1294 data->fan_div[nr] = fan_div;
1295 nct6775_write_fan_div_common(data, nr);
1299 static void nct6775_update_pwm(struct device *dev)
1301 struct nct6775_data *data = dev_get_drvdata(dev);
1303 int fanmodecfg, reg;
1306 for (i = 0; i < data->pwm_num; i++) {
1307 if (!(data->has_pwm & (1 << i)))
1310 duty_is_dc = data->REG_PWM_MODE[i] &&
1311 (nct6775_read_value(data, data->REG_PWM_MODE[i])
1312 & data->PWM_MODE_MASK[i]);
1313 data->pwm_mode[i] = duty_is_dc;
1315 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
1316 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1317 if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1319 = nct6775_read_value(data,
1320 data->REG_PWM[j][i]);
1324 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1325 (fanmodecfg >> 4) & 7);
1327 if (!data->temp_tolerance[0][i] ||
1328 data->pwm_enable[i] != speed_cruise)
1329 data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1330 if (!data->target_speed_tolerance[i] ||
1331 data->pwm_enable[i] == speed_cruise) {
1332 u8 t = fanmodecfg & 0x0f;
1334 if (data->REG_TOLERANCE_H) {
1335 t |= (nct6775_read_value(data,
1336 data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
1338 data->target_speed_tolerance[i] = t;
1341 data->temp_tolerance[1][i] =
1342 nct6775_read_value(data,
1343 data->REG_CRITICAL_TEMP_TOLERANCE[i]);
1345 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
1346 data->pwm_temp_sel[i] = reg & 0x1f;
1347 /* If fan can stop, report floor as 0 */
1349 data->pwm[2][i] = 0;
1351 if (!data->REG_WEIGHT_TEMP_SEL[i])
1354 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
1355 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1356 /* If weight is disabled, report weight source as 0 */
1357 if (j == 1 && !(reg & 0x80))
1358 data->pwm_weight_temp_sel[i] = 0;
1360 /* Weight temp data */
1361 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
1362 data->weight_temp[j][i]
1363 = nct6775_read_value(data,
1364 data->REG_WEIGHT_TEMP[j][i]);
1369 static void nct6775_update_pwm_limits(struct device *dev)
1371 struct nct6775_data *data = dev_get_drvdata(dev);
1376 for (i = 0; i < data->pwm_num; i++) {
1377 if (!(data->has_pwm & (1 << i)))
1380 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1381 data->fan_time[j][i] =
1382 nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1385 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1386 /* Update only in matching mode or if never updated */
1387 if (!data->target_temp[i] ||
1388 data->pwm_enable[i] == thermal_cruise)
1389 data->target_temp[i] = reg_t & data->target_temp_mask;
1390 if (!data->target_speed[i] ||
1391 data->pwm_enable[i] == speed_cruise) {
1392 if (data->REG_TOLERANCE_H) {
1393 reg_t |= (nct6775_read_value(data,
1394 data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1396 data->target_speed[i] = reg_t;
1399 for (j = 0; j < data->auto_pwm_num; j++) {
1400 data->auto_pwm[i][j] =
1401 nct6775_read_value(data,
1402 NCT6775_AUTO_PWM(data, i, j));
1403 data->auto_temp[i][j] =
1404 nct6775_read_value(data,
1405 NCT6775_AUTO_TEMP(data, i, j));
1408 /* critical auto_pwm temperature data */
1409 data->auto_temp[i][data->auto_pwm_num] =
1410 nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1412 switch (data->kind) {
1414 reg = nct6775_read_value(data,
1415 NCT6775_REG_CRITICAL_ENAB[i]);
1416 data->auto_pwm[i][data->auto_pwm_num] =
1417 (reg & 0x02) ? 0xff : 0x00;
1420 data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1427 reg = nct6775_read_value(data,
1428 data->REG_CRITICAL_PWM_ENABLE[i]);
1429 if (reg & data->CRITICAL_PWM_ENABLE_MASK)
1430 reg = nct6775_read_value(data,
1431 data->REG_CRITICAL_PWM[i]);
1434 data->auto_pwm[i][data->auto_pwm_num] = reg;
1440 static struct nct6775_data *nct6775_update_device(struct device *dev)
1442 struct nct6775_data *data = dev_get_drvdata(dev);
1445 mutex_lock(&data->update_lock);
1447 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1449 /* Fan clock dividers */
1450 nct6775_update_fan_div_common(data);
1452 /* Measured voltages and limits */
1453 for (i = 0; i < data->in_num; i++) {
1454 if (!(data->have_in & (1 << i)))
1457 data->in[i][0] = nct6775_read_value(data,
1459 data->in[i][1] = nct6775_read_value(data,
1460 data->REG_IN_MINMAX[0][i]);
1461 data->in[i][2] = nct6775_read_value(data,
1462 data->REG_IN_MINMAX[1][i]);
1465 /* Measured fan speeds and limits */
1466 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
1469 if (!(data->has_fan & (1 << i)))
1472 reg = nct6775_read_value(data, data->REG_FAN[i]);
1473 data->rpm[i] = data->fan_from_reg(reg,
1476 if (data->has_fan_min & (1 << i))
1477 data->fan_min[i] = nct6775_read_value(data,
1478 data->REG_FAN_MIN[i]);
1479 data->fan_pulses[i] =
1480 (nct6775_read_value(data, data->REG_FAN_PULSES[i])
1481 >> data->FAN_PULSE_SHIFT[i]) & 0x03;
1483 nct6775_select_fan_div(dev, data, i, reg);
1486 nct6775_update_pwm(dev);
1487 nct6775_update_pwm_limits(dev);
1489 /* Measured temperatures and limits */
1490 for (i = 0; i < NUM_TEMP; i++) {
1491 if (!(data->have_temp & (1 << i)))
1493 for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1494 if (data->reg_temp[j][i])
1496 = nct6775_read_temp(data,
1497 data->reg_temp[j][i]);
1499 if (i >= NUM_TEMP_FIXED ||
1500 !(data->have_temp_fixed & (1 << i)))
1502 data->temp_offset[i]
1503 = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1507 for (i = 0; i < NUM_REG_ALARM; i++) {
1510 if (!data->REG_ALARM[i])
1512 alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1513 data->alarms |= ((u64)alarm) << (i << 3);
1517 for (i = 0; i < NUM_REG_BEEP; i++) {
1520 if (!data->REG_BEEP[i])
1522 beep = nct6775_read_value(data, data->REG_BEEP[i]);
1523 data->beeps |= ((u64)beep) << (i << 3);
1526 data->last_updated = jiffies;
1530 mutex_unlock(&data->update_lock);
1535 * Sysfs callback functions
1538 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1540 struct nct6775_data *data = nct6775_update_device(dev);
1541 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1542 int index = sattr->index;
1545 return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1549 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1552 struct nct6775_data *data = dev_get_drvdata(dev);
1553 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1554 int index = sattr->index;
1559 err = kstrtoul(buf, 10, &val);
1562 mutex_lock(&data->update_lock);
1563 data->in[nr][index] = in_to_reg(val, nr);
1564 nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr],
1565 data->in[nr][index]);
1566 mutex_unlock(&data->update_lock);
1571 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1573 struct nct6775_data *data = nct6775_update_device(dev);
1574 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1575 int nr = data->ALARM_BITS[sattr->index];
1577 return sprintf(buf, "%u\n",
1578 (unsigned int)((data->alarms >> nr) & 0x01));
1581 static int find_temp_source(struct nct6775_data *data, int index, int count)
1583 int source = data->temp_src[index];
1586 for (nr = 0; nr < count; nr++) {
1589 src = nct6775_read_value(data,
1590 data->REG_TEMP_SOURCE[nr]) & 0x1f;
1598 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1600 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1601 struct nct6775_data *data = nct6775_update_device(dev);
1602 unsigned int alarm = 0;
1606 * For temperatures, there is no fixed mapping from registers to alarm
1607 * bits. Alarm bits are determined by the temperature source mapping.
1609 nr = find_temp_source(data, sattr->index, data->num_temp_alarms);
1611 int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE];
1613 alarm = (data->alarms >> bit) & 0x01;
1615 return sprintf(buf, "%u\n", alarm);
1619 show_beep(struct device *dev, struct device_attribute *attr, char *buf)
1621 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1622 struct nct6775_data *data = nct6775_update_device(dev);
1623 int nr = data->BEEP_BITS[sattr->index];
1625 return sprintf(buf, "%u\n",
1626 (unsigned int)((data->beeps >> nr) & 0x01));
1630 store_beep(struct device *dev, struct device_attribute *attr, const char *buf,
1633 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1634 struct nct6775_data *data = dev_get_drvdata(dev);
1635 int nr = data->BEEP_BITS[sattr->index];
1636 int regindex = nr >> 3;
1640 err = kstrtoul(buf, 10, &val);
1646 mutex_lock(&data->update_lock);
1648 data->beeps |= (1ULL << nr);
1650 data->beeps &= ~(1ULL << nr);
1651 nct6775_write_value(data, data->REG_BEEP[regindex],
1652 (data->beeps >> (regindex << 3)) & 0xff);
1653 mutex_unlock(&data->update_lock);
1658 show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf)
1660 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1661 struct nct6775_data *data = nct6775_update_device(dev);
1662 unsigned int beep = 0;
1666 * For temperatures, there is no fixed mapping from registers to beep
1667 * enable bits. Beep enable bits are determined by the temperature
1670 nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1672 int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1674 beep = (data->beeps >> bit) & 0x01;
1676 return sprintf(buf, "%u\n", beep);
1680 store_temp_beep(struct device *dev, struct device_attribute *attr,
1681 const char *buf, size_t count)
1683 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1684 struct nct6775_data *data = dev_get_drvdata(dev);
1685 int nr, bit, regindex;
1689 err = kstrtoul(buf, 10, &val);
1695 nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1699 bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1700 regindex = bit >> 3;
1702 mutex_lock(&data->update_lock);
1704 data->beeps |= (1ULL << bit);
1706 data->beeps &= ~(1ULL << bit);
1707 nct6775_write_value(data, data->REG_BEEP[regindex],
1708 (data->beeps >> (regindex << 3)) & 0xff);
1709 mutex_unlock(&data->update_lock);
1714 static umode_t nct6775_in_is_visible(struct kobject *kobj,
1715 struct attribute *attr, int index)
1717 struct device *dev = container_of(kobj, struct device, kobj);
1718 struct nct6775_data *data = dev_get_drvdata(dev);
1719 int in = index / 5; /* voltage index */
1721 if (!(data->have_in & (1 << in)))
1727 SENSOR_TEMPLATE_2(in_input, "in%d_input", S_IRUGO, show_in_reg, NULL, 0, 0);
1728 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", S_IRUGO, show_alarm, NULL, 0);
1729 SENSOR_TEMPLATE(in_beep, "in%d_beep", S_IWUSR | S_IRUGO, show_beep, store_beep,
1731 SENSOR_TEMPLATE_2(in_min, "in%d_min", S_IWUSR | S_IRUGO, show_in_reg,
1732 store_in_reg, 0, 1);
1733 SENSOR_TEMPLATE_2(in_max, "in%d_max", S_IWUSR | S_IRUGO, show_in_reg,
1734 store_in_reg, 0, 2);
1737 * nct6775_in_is_visible uses the index into the following array
1738 * to determine if attributes should be created or not.
1739 * Any change in order or content must be matched.
1741 static struct sensor_device_template *nct6775_attributes_in_template[] = {
1742 &sensor_dev_template_in_input,
1743 &sensor_dev_template_in_alarm,
1744 &sensor_dev_template_in_beep,
1745 &sensor_dev_template_in_min,
1746 &sensor_dev_template_in_max,
1750 static struct sensor_template_group nct6775_in_template_group = {
1751 .templates = nct6775_attributes_in_template,
1752 .is_visible = nct6775_in_is_visible,
1756 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1758 struct nct6775_data *data = nct6775_update_device(dev);
1759 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1760 int nr = sattr->index;
1762 return sprintf(buf, "%d\n", data->rpm[nr]);
1766 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1768 struct nct6775_data *data = nct6775_update_device(dev);
1769 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1770 int nr = sattr->index;
1772 return sprintf(buf, "%d\n",
1773 data->fan_from_reg_min(data->fan_min[nr],
1774 data->fan_div[nr]));
1778 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1780 struct nct6775_data *data = nct6775_update_device(dev);
1781 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1782 int nr = sattr->index;
1784 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1788 store_fan_min(struct device *dev, struct device_attribute *attr,
1789 const char *buf, size_t count)
1791 struct nct6775_data *data = dev_get_drvdata(dev);
1792 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1793 int nr = sattr->index;
1799 err = kstrtoul(buf, 10, &val);
1803 mutex_lock(&data->update_lock);
1804 if (!data->has_fan_div) {
1805 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1811 val = 1350000U / val;
1812 val = (val & 0x1f) | ((val << 3) & 0xff00);
1814 data->fan_min[nr] = val;
1815 goto write_min; /* Leave fan divider alone */
1818 /* No min limit, alarm disabled */
1819 data->fan_min[nr] = 255;
1820 new_div = data->fan_div[nr]; /* No change */
1821 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1824 reg = 1350000U / val;
1825 if (reg >= 128 * 255) {
1827 * Speed below this value cannot possibly be represented,
1828 * even with the highest divider (128)
1830 data->fan_min[nr] = 254;
1831 new_div = 7; /* 128 == (1 << 7) */
1833 "fan%u low limit %lu below minimum %u, set to minimum\n",
1834 nr + 1, val, data->fan_from_reg_min(254, 7));
1837 * Speed above this value cannot possibly be represented,
1838 * even with the lowest divider (1)
1840 data->fan_min[nr] = 1;
1841 new_div = 0; /* 1 == (1 << 0) */
1843 "fan%u low limit %lu above maximum %u, set to maximum\n",
1844 nr + 1, val, data->fan_from_reg_min(1, 0));
1847 * Automatically pick the best divider, i.e. the one such
1848 * that the min limit will correspond to a register value
1849 * in the 96..192 range
1852 while (reg > 192 && new_div < 7) {
1856 data->fan_min[nr] = reg;
1861 * Write both the fan clock divider (if it changed) and the new
1862 * fan min (unconditionally)
1864 if (new_div != data->fan_div[nr]) {
1865 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1866 nr + 1, div_from_reg(data->fan_div[nr]),
1867 div_from_reg(new_div));
1868 data->fan_div[nr] = new_div;
1869 nct6775_write_fan_div_common(data, nr);
1870 /* Give the chip time to sample a new speed value */
1871 data->last_updated = jiffies;
1875 nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1876 mutex_unlock(&data->update_lock);
1882 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
1884 struct nct6775_data *data = nct6775_update_device(dev);
1885 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1886 int p = data->fan_pulses[sattr->index];
1888 return sprintf(buf, "%d\n", p ? : 4);
1892 store_fan_pulses(struct device *dev, struct device_attribute *attr,
1893 const char *buf, size_t count)
1895 struct nct6775_data *data = dev_get_drvdata(dev);
1896 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1897 int nr = sattr->index;
1902 err = kstrtoul(buf, 10, &val);
1909 mutex_lock(&data->update_lock);
1910 data->fan_pulses[nr] = val & 3;
1911 reg = nct6775_read_value(data, data->REG_FAN_PULSES[nr]);
1912 reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
1913 reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
1914 nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
1915 mutex_unlock(&data->update_lock);
1920 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
1921 struct attribute *attr, int index)
1923 struct device *dev = container_of(kobj, struct device, kobj);
1924 struct nct6775_data *data = dev_get_drvdata(dev);
1925 int fan = index / 6; /* fan index */
1926 int nr = index % 6; /* attribute index */
1928 if (!(data->has_fan & (1 << fan)))
1931 if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1)
1933 if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1)
1935 if (nr == 4 && !(data->has_fan_min & (1 << fan)))
1937 if (nr == 5 && data->kind != nct6775)
1943 SENSOR_TEMPLATE(fan_input, "fan%d_input", S_IRUGO, show_fan, NULL, 0);
1944 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", S_IRUGO, show_alarm, NULL,
1946 SENSOR_TEMPLATE(fan_beep, "fan%d_beep", S_IWUSR | S_IRUGO, show_beep,
1947 store_beep, FAN_ALARM_BASE);
1948 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", S_IWUSR | S_IRUGO, show_fan_pulses,
1949 store_fan_pulses, 0);
1950 SENSOR_TEMPLATE(fan_min, "fan%d_min", S_IWUSR | S_IRUGO, show_fan_min,
1952 SENSOR_TEMPLATE(fan_div, "fan%d_div", S_IRUGO, show_fan_div, NULL, 0);
1955 * nct6775_fan_is_visible uses the index into the following array
1956 * to determine if attributes should be created or not.
1957 * Any change in order or content must be matched.
1959 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
1960 &sensor_dev_template_fan_input,
1961 &sensor_dev_template_fan_alarm, /* 1 */
1962 &sensor_dev_template_fan_beep, /* 2 */
1963 &sensor_dev_template_fan_pulses,
1964 &sensor_dev_template_fan_min, /* 4 */
1965 &sensor_dev_template_fan_div, /* 5 */
1969 static struct sensor_template_group nct6775_fan_template_group = {
1970 .templates = nct6775_attributes_fan_template,
1971 .is_visible = nct6775_fan_is_visible,
1976 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1978 struct nct6775_data *data = nct6775_update_device(dev);
1979 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1980 int nr = sattr->index;
1982 return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1986 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1988 struct nct6775_data *data = nct6775_update_device(dev);
1989 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1991 int index = sattr->index;
1993 return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
1997 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
2000 struct nct6775_data *data = dev_get_drvdata(dev);
2001 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2003 int index = sattr->index;
2007 err = kstrtol(buf, 10, &val);
2011 mutex_lock(&data->update_lock);
2012 data->temp[index][nr] = LM75_TEMP_TO_REG(val);
2013 nct6775_write_temp(data, data->reg_temp[index][nr],
2014 data->temp[index][nr]);
2015 mutex_unlock(&data->update_lock);
2020 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
2022 struct nct6775_data *data = nct6775_update_device(dev);
2023 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2025 return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
2029 store_temp_offset(struct device *dev, struct device_attribute *attr,
2030 const char *buf, size_t count)
2032 struct nct6775_data *data = dev_get_drvdata(dev);
2033 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2034 int nr = sattr->index;
2038 err = kstrtol(buf, 10, &val);
2042 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
2044 mutex_lock(&data->update_lock);
2045 data->temp_offset[nr] = val;
2046 nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
2047 mutex_unlock(&data->update_lock);
2053 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
2055 struct nct6775_data *data = nct6775_update_device(dev);
2056 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2057 int nr = sattr->index;
2059 return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
2063 store_temp_type(struct device *dev, struct device_attribute *attr,
2064 const char *buf, size_t count)
2066 struct nct6775_data *data = nct6775_update_device(dev);
2067 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2068 int nr = sattr->index;
2071 u8 vbat, diode, vbit, dbit;
2073 err = kstrtoul(buf, 10, &val);
2077 if (val != 1 && val != 3 && val != 4)
2080 mutex_lock(&data->update_lock);
2082 data->temp_type[nr] = val;
2084 dbit = data->DIODE_MASK << nr;
2085 vbat = nct6775_read_value(data, data->REG_VBAT) & ~vbit;
2086 diode = nct6775_read_value(data, data->REG_DIODE) & ~dbit;
2088 case 1: /* CPU diode (diode, current mode) */
2092 case 3: /* diode, voltage mode */
2095 case 4: /* thermistor */
2098 nct6775_write_value(data, data->REG_VBAT, vbat);
2099 nct6775_write_value(data, data->REG_DIODE, diode);
2101 mutex_unlock(&data->update_lock);
2105 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
2106 struct attribute *attr, int index)
2108 struct device *dev = container_of(kobj, struct device, kobj);
2109 struct nct6775_data *data = dev_get_drvdata(dev);
2110 int temp = index / 10; /* temp index */
2111 int nr = index % 10; /* attribute index */
2113 if (!(data->have_temp & (1 << temp)))
2116 if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0)
2117 return 0; /* alarm */
2119 if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0)
2120 return 0; /* beep */
2122 if (nr == 4 && !data->reg_temp[1][temp]) /* max */
2125 if (nr == 5 && !data->reg_temp[2][temp]) /* max_hyst */
2128 if (nr == 6 && !data->reg_temp[3][temp]) /* crit */
2131 if (nr == 7 && !data->reg_temp[4][temp]) /* lcrit */
2134 /* offset and type only apply to fixed sensors */
2135 if (nr > 7 && !(data->have_temp_fixed & (1 << temp)))
2141 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", S_IRUGO, show_temp, NULL, 0, 0);
2142 SENSOR_TEMPLATE(temp_label, "temp%d_label", S_IRUGO, show_temp_label, NULL, 0);
2143 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", S_IRUGO | S_IWUSR, show_temp,
2145 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", S_IRUGO | S_IWUSR,
2146 show_temp, store_temp, 0, 2);
2147 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", S_IRUGO | S_IWUSR, show_temp,
2149 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", S_IRUGO | S_IWUSR, show_temp,
2151 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", S_IRUGO | S_IWUSR,
2152 show_temp_offset, store_temp_offset, 0);
2153 SENSOR_TEMPLATE(temp_type, "temp%d_type", S_IRUGO | S_IWUSR, show_temp_type,
2154 store_temp_type, 0);
2155 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", S_IRUGO, show_temp_alarm, NULL, 0);
2156 SENSOR_TEMPLATE(temp_beep, "temp%d_beep", S_IRUGO | S_IWUSR, show_temp_beep,
2157 store_temp_beep, 0);
2160 * nct6775_temp_is_visible uses the index into the following array
2161 * to determine if attributes should be created or not.
2162 * Any change in order or content must be matched.
2164 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
2165 &sensor_dev_template_temp_input,
2166 &sensor_dev_template_temp_label,
2167 &sensor_dev_template_temp_alarm, /* 2 */
2168 &sensor_dev_template_temp_beep, /* 3 */
2169 &sensor_dev_template_temp_max, /* 4 */
2170 &sensor_dev_template_temp_max_hyst, /* 5 */
2171 &sensor_dev_template_temp_crit, /* 6 */
2172 &sensor_dev_template_temp_lcrit, /* 7 */
2173 &sensor_dev_template_temp_offset, /* 8 */
2174 &sensor_dev_template_temp_type, /* 9 */
2178 static struct sensor_template_group nct6775_temp_template_group = {
2179 .templates = nct6775_attributes_temp_template,
2180 .is_visible = nct6775_temp_is_visible,
2185 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
2187 struct nct6775_data *data = nct6775_update_device(dev);
2188 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2190 return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
2194 store_pwm_mode(struct device *dev, struct device_attribute *attr,
2195 const char *buf, size_t count)
2197 struct nct6775_data *data = dev_get_drvdata(dev);
2198 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2199 int nr = sattr->index;
2204 err = kstrtoul(buf, 10, &val);
2211 /* Setting DC mode is not supported for all chips/channels */
2212 if (data->REG_PWM_MODE[nr] == 0) {
2218 mutex_lock(&data->update_lock);
2219 data->pwm_mode[nr] = val;
2220 reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
2221 reg &= ~data->PWM_MODE_MASK[nr];
2223 reg |= data->PWM_MODE_MASK[nr];
2224 nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
2225 mutex_unlock(&data->update_lock);
2230 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2232 struct nct6775_data *data = nct6775_update_device(dev);
2233 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2235 int index = sattr->index;
2239 * For automatic fan control modes, show current pwm readings.
2240 * Otherwise, show the configured value.
2242 if (index == 0 && data->pwm_enable[nr] > manual)
2243 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
2245 pwm = data->pwm[index][nr];
2247 return sprintf(buf, "%d\n", pwm);
2251 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
2254 struct nct6775_data *data = dev_get_drvdata(dev);
2255 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2257 int index = sattr->index;
2259 int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
2261 = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
2265 err = kstrtoul(buf, 10, &val);
2268 val = clamp_val(val, minval[index], maxval[index]);
2270 mutex_lock(&data->update_lock);
2271 data->pwm[index][nr] = val;
2272 nct6775_write_value(data, data->REG_PWM[index][nr], val);
2273 if (index == 2) { /* floor: disable if val == 0 */
2274 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2278 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2280 mutex_unlock(&data->update_lock);
2284 /* Returns 0 if OK, -EINVAL otherwise */
2285 static int check_trip_points(struct nct6775_data *data, int nr)
2289 for (i = 0; i < data->auto_pwm_num - 1; i++) {
2290 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
2293 for (i = 0; i < data->auto_pwm_num - 1; i++) {
2294 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
2297 /* validate critical temperature and pwm if enabled (pwm > 0) */
2298 if (data->auto_pwm[nr][data->auto_pwm_num]) {
2299 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2300 data->auto_temp[nr][data->auto_pwm_num] ||
2301 data->auto_pwm[nr][data->auto_pwm_num - 1] >
2302 data->auto_pwm[nr][data->auto_pwm_num])
2308 static void pwm_update_registers(struct nct6775_data *data, int nr)
2312 switch (data->pwm_enable[nr]) {
2317 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2318 reg = (reg & ~data->tolerance_mask) |
2319 (data->target_speed_tolerance[nr] & data->tolerance_mask);
2320 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2321 nct6775_write_value(data, data->REG_TARGET[nr],
2322 data->target_speed[nr] & 0xff);
2323 if (data->REG_TOLERANCE_H) {
2324 reg = (data->target_speed[nr] >> 8) & 0x0f;
2325 reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2326 nct6775_write_value(data,
2327 data->REG_TOLERANCE_H[nr],
2331 case thermal_cruise:
2332 nct6775_write_value(data, data->REG_TARGET[nr],
2333 data->target_temp[nr]);
2336 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2337 reg = (reg & ~data->tolerance_mask) |
2338 data->temp_tolerance[0][nr];
2339 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2345 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2347 struct nct6775_data *data = nct6775_update_device(dev);
2348 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2350 return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2354 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2355 const char *buf, size_t count)
2357 struct nct6775_data *data = dev_get_drvdata(dev);
2358 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2359 int nr = sattr->index;
2364 err = kstrtoul(buf, 10, &val);
2371 if (val == sf3 && data->kind != nct6775)
2374 if (val == sf4 && check_trip_points(data, nr)) {
2375 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2376 dev_err(dev, "Adjust trip points and try again\n");
2380 mutex_lock(&data->update_lock);
2381 data->pwm_enable[nr] = val;
2384 * turn off pwm control: select manual mode, set pwm to maximum
2386 data->pwm[0][nr] = 255;
2387 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2389 pwm_update_registers(data, nr);
2390 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2392 reg |= pwm_enable_to_reg(val) << 4;
2393 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2394 mutex_unlock(&data->update_lock);
2399 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2403 for (i = 0; i < NUM_TEMP; i++) {
2404 if (!(data->have_temp & (1 << i)))
2406 if (src == data->temp_src[i]) {
2412 return sprintf(buf, "%d\n", sel);
2416 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2418 struct nct6775_data *data = nct6775_update_device(dev);
2419 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2420 int index = sattr->index;
2422 return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2426 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2427 const char *buf, size_t count)
2429 struct nct6775_data *data = nct6775_update_device(dev);
2430 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2431 int nr = sattr->index;
2435 err = kstrtoul(buf, 10, &val);
2438 if (val == 0 || val > NUM_TEMP)
2440 if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
2443 mutex_lock(&data->update_lock);
2444 src = data->temp_src[val - 1];
2445 data->pwm_temp_sel[nr] = src;
2446 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2449 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2450 mutex_unlock(&data->update_lock);
2456 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2459 struct nct6775_data *data = nct6775_update_device(dev);
2460 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2461 int index = sattr->index;
2463 return show_pwm_temp_sel_common(data, buf,
2464 data->pwm_weight_temp_sel[index]);
2468 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2469 const char *buf, size_t count)
2471 struct nct6775_data *data = nct6775_update_device(dev);
2472 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2473 int nr = sattr->index;
2477 err = kstrtoul(buf, 10, &val);
2482 if (val && (!(data->have_temp & (1 << (val - 1))) ||
2483 !data->temp_src[val - 1]))
2486 mutex_lock(&data->update_lock);
2488 src = data->temp_src[val - 1];
2489 data->pwm_weight_temp_sel[nr] = src;
2490 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2492 reg |= (src | 0x80);
2493 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2495 data->pwm_weight_temp_sel[nr] = 0;
2496 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2498 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2500 mutex_unlock(&data->update_lock);
2506 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2508 struct nct6775_data *data = nct6775_update_device(dev);
2509 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2511 return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2515 store_target_temp(struct device *dev, struct device_attribute *attr,
2516 const char *buf, size_t count)
2518 struct nct6775_data *data = dev_get_drvdata(dev);
2519 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2520 int nr = sattr->index;
2524 err = kstrtoul(buf, 10, &val);
2528 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2529 data->target_temp_mask);
2531 mutex_lock(&data->update_lock);
2532 data->target_temp[nr] = val;
2533 pwm_update_registers(data, nr);
2534 mutex_unlock(&data->update_lock);
2539 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2541 struct nct6775_data *data = nct6775_update_device(dev);
2542 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2543 int nr = sattr->index;
2545 return sprintf(buf, "%d\n",
2546 fan_from_reg16(data->target_speed[nr],
2547 data->fan_div[nr]));
2551 store_target_speed(struct device *dev, struct device_attribute *attr,
2552 const char *buf, size_t count)
2554 struct nct6775_data *data = dev_get_drvdata(dev);
2555 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2556 int nr = sattr->index;
2561 err = kstrtoul(buf, 10, &val);
2565 val = clamp_val(val, 0, 1350000U);
2566 speed = fan_to_reg(val, data->fan_div[nr]);
2568 mutex_lock(&data->update_lock);
2569 data->target_speed[nr] = speed;
2570 pwm_update_registers(data, nr);
2571 mutex_unlock(&data->update_lock);
2576 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2579 struct nct6775_data *data = nct6775_update_device(dev);
2580 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2582 int index = sattr->index;
2584 return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2588 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2589 const char *buf, size_t count)
2591 struct nct6775_data *data = dev_get_drvdata(dev);
2592 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2594 int index = sattr->index;
2598 err = kstrtoul(buf, 10, &val);
2602 /* Limit tolerance as needed */
2603 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2605 mutex_lock(&data->update_lock);
2606 data->temp_tolerance[index][nr] = val;
2608 pwm_update_registers(data, nr);
2610 nct6775_write_value(data,
2611 data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2613 mutex_unlock(&data->update_lock);
2618 * Fan speed tolerance is a tricky beast, since the associated register is
2619 * a tick counter, but the value is reported and configured as rpm.
2620 * Compute resulting low and high rpm values and report the difference.
2623 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2626 struct nct6775_data *data = nct6775_update_device(dev);
2627 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2628 int nr = sattr->index;
2629 int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2630 int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2640 tolerance = (fan_from_reg16(low, data->fan_div[nr])
2641 - fan_from_reg16(high, data->fan_div[nr])) / 2;
2643 return sprintf(buf, "%d\n", tolerance);
2647 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2648 const char *buf, size_t count)
2650 struct nct6775_data *data = dev_get_drvdata(dev);
2651 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2652 int nr = sattr->index;
2657 err = kstrtoul(buf, 10, &val);
2661 high = fan_from_reg16(data->target_speed[nr],
2662 data->fan_div[nr]) + val;
2663 low = fan_from_reg16(data->target_speed[nr],
2664 data->fan_div[nr]) - val;
2670 val = (fan_to_reg(low, data->fan_div[nr]) -
2671 fan_to_reg(high, data->fan_div[nr])) / 2;
2673 /* Limit tolerance as needed */
2674 val = clamp_val(val, 0, data->speed_tolerance_limit);
2676 mutex_lock(&data->update_lock);
2677 data->target_speed_tolerance[nr] = val;
2678 pwm_update_registers(data, nr);
2679 mutex_unlock(&data->update_lock);
2683 SENSOR_TEMPLATE_2(pwm, "pwm%d", S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2684 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", S_IWUSR | S_IRUGO, show_pwm_mode,
2686 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", S_IWUSR | S_IRUGO, show_pwm_enable,
2687 store_pwm_enable, 0);
2688 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", S_IWUSR | S_IRUGO,
2689 show_pwm_temp_sel, store_pwm_temp_sel, 0);
2690 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", S_IWUSR | S_IRUGO,
2691 show_target_temp, store_target_temp, 0);
2692 SENSOR_TEMPLATE(fan_target, "fan%d_target", S_IWUSR | S_IRUGO,
2693 show_target_speed, store_target_speed, 0);
2694 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", S_IWUSR | S_IRUGO,
2695 show_speed_tolerance, store_speed_tolerance, 0);
2697 /* Smart Fan registers */
2700 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2702 struct nct6775_data *data = nct6775_update_device(dev);
2703 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2705 int index = sattr->index;
2707 return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2711 store_weight_temp(struct device *dev, struct device_attribute *attr,
2712 const char *buf, size_t count)
2714 struct nct6775_data *data = dev_get_drvdata(dev);
2715 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2717 int index = sattr->index;
2721 err = kstrtoul(buf, 10, &val);
2725 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2727 mutex_lock(&data->update_lock);
2728 data->weight_temp[index][nr] = val;
2729 nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2730 mutex_unlock(&data->update_lock);
2734 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", S_IWUSR | S_IRUGO,
2735 show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
2736 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step",
2737 S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 0);
2738 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol",
2739 S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 1);
2740 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base",
2741 S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 2);
2742 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step",
2743 S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 5);
2744 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base",
2745 S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 6);
2748 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2750 struct nct6775_data *data = nct6775_update_device(dev);
2751 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2753 int index = sattr->index;
2755 return sprintf(buf, "%d\n",
2756 step_time_from_reg(data->fan_time[index][nr],
2757 data->pwm_mode[nr]));
2761 store_fan_time(struct device *dev, struct device_attribute *attr,
2762 const char *buf, size_t count)
2764 struct nct6775_data *data = dev_get_drvdata(dev);
2765 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2767 int index = sattr->index;
2771 err = kstrtoul(buf, 10, &val);
2775 val = step_time_to_reg(val, data->pwm_mode[nr]);
2776 mutex_lock(&data->update_lock);
2777 data->fan_time[index][nr] = val;
2778 nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2779 mutex_unlock(&data->update_lock);
2783 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
2785 show_name(struct device *dev, struct device_attribute *attr, char *buf)
2787 struct nct6775_data *data = dev_get_drvdata(dev);
2789 return sprintf(buf, "%s\n", data->name);
2792 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
2796 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2798 struct nct6775_data *data = nct6775_update_device(dev);
2799 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2801 return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2805 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2806 const char *buf, size_t count)
2808 struct nct6775_data *data = dev_get_drvdata(dev);
2809 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2811 int point = sattr->index;
2816 err = kstrtoul(buf, 10, &val);
2822 if (point == data->auto_pwm_num) {
2823 if (data->kind != nct6775 && !val)
2825 if (data->kind != nct6779 && val)
2829 mutex_lock(&data->update_lock);
2830 data->auto_pwm[nr][point] = val;
2831 if (point < data->auto_pwm_num) {
2832 nct6775_write_value(data,
2833 NCT6775_AUTO_PWM(data, nr, point),
2834 data->auto_pwm[nr][point]);
2836 switch (data->kind) {
2838 /* disable if needed (pwm == 0) */
2839 reg = nct6775_read_value(data,
2840 NCT6775_REG_CRITICAL_ENAB[nr]);
2845 nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
2849 break; /* always enabled, nothing to do */
2855 nct6775_write_value(data, data->REG_CRITICAL_PWM[nr],
2857 reg = nct6775_read_value(data,
2858 data->REG_CRITICAL_PWM_ENABLE[nr]);
2860 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
2862 reg |= data->CRITICAL_PWM_ENABLE_MASK;
2863 nct6775_write_value(data,
2864 data->REG_CRITICAL_PWM_ENABLE[nr],
2869 mutex_unlock(&data->update_lock);
2874 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
2876 struct nct6775_data *data = nct6775_update_device(dev);
2877 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2879 int point = sattr->index;
2882 * We don't know for sure if the temperature is signed or unsigned.
2883 * Assume it is unsigned.
2885 return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
2889 store_auto_temp(struct device *dev, struct device_attribute *attr,
2890 const char *buf, size_t count)
2892 struct nct6775_data *data = dev_get_drvdata(dev);
2893 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2895 int point = sattr->index;
2899 err = kstrtoul(buf, 10, &val);
2905 mutex_lock(&data->update_lock);
2906 data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
2907 if (point < data->auto_pwm_num) {
2908 nct6775_write_value(data,
2909 NCT6775_AUTO_TEMP(data, nr, point),
2910 data->auto_temp[nr][point]);
2912 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
2913 data->auto_temp[nr][point]);
2915 mutex_unlock(&data->update_lock);
2919 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
2920 struct attribute *attr, int index)
2922 struct device *dev = container_of(kobj, struct device, kobj);
2923 struct nct6775_data *data = dev_get_drvdata(dev);
2924 int pwm = index / 36; /* pwm index */
2925 int nr = index % 36; /* attribute index */
2927 if (!(data->has_pwm & (1 << pwm)))
2930 if ((nr >= 14 && nr <= 18) || nr == 21) /* weight */
2931 if (!data->REG_WEIGHT_TEMP_SEL[pwm])
2933 if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
2935 if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
2937 if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
2940 if (nr >= 22 && nr <= 35) { /* auto point */
2941 int api = (nr - 22) / 2; /* auto point index */
2943 if (api > data->auto_pwm_num)
2949 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", S_IWUSR | S_IRUGO,
2950 show_fan_time, store_fan_time, 0, 0);
2951 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", S_IWUSR | S_IRUGO,
2952 show_fan_time, store_fan_time, 0, 1);
2953 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", S_IWUSR | S_IRUGO,
2954 show_fan_time, store_fan_time, 0, 2);
2955 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", S_IWUSR | S_IRUGO, show_pwm,
2957 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", S_IWUSR | S_IRUGO, show_pwm,
2959 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", S_IWUSR | S_IRUGO,
2960 show_temp_tolerance, store_temp_tolerance, 0, 0);
2961 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance",
2962 S_IWUSR | S_IRUGO, show_temp_tolerance, store_temp_tolerance,
2965 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2968 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", S_IWUSR | S_IRUGO, show_pwm,
2971 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm",
2972 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 0);
2973 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp",
2974 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 0);
2976 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm",
2977 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 1);
2978 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp",
2979 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 1);
2981 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm",
2982 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 2);
2983 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp",
2984 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 2);
2986 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm",
2987 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 3);
2988 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp",
2989 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 3);
2991 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm",
2992 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 4);
2993 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp",
2994 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 4);
2996 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm",
2997 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 5);
2998 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp",
2999 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 5);
3001 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm",
3002 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 6);
3003 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp",
3004 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 6);
3007 * nct6775_pwm_is_visible uses the index into the following array
3008 * to determine if attributes should be created or not.
3009 * Any change in order or content must be matched.
3011 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
3012 &sensor_dev_template_pwm,
3013 &sensor_dev_template_pwm_mode,
3014 &sensor_dev_template_pwm_enable,
3015 &sensor_dev_template_pwm_temp_sel,
3016 &sensor_dev_template_pwm_temp_tolerance,
3017 &sensor_dev_template_pwm_crit_temp_tolerance,
3018 &sensor_dev_template_pwm_target_temp,
3019 &sensor_dev_template_fan_target,
3020 &sensor_dev_template_fan_tolerance,
3021 &sensor_dev_template_pwm_stop_time,
3022 &sensor_dev_template_pwm_step_up_time,
3023 &sensor_dev_template_pwm_step_down_time,
3024 &sensor_dev_template_pwm_start,
3025 &sensor_dev_template_pwm_floor,
3026 &sensor_dev_template_pwm_weight_temp_sel, /* 14 */
3027 &sensor_dev_template_pwm_weight_temp_step,
3028 &sensor_dev_template_pwm_weight_temp_step_tol,
3029 &sensor_dev_template_pwm_weight_temp_step_base,
3030 &sensor_dev_template_pwm_weight_duty_step, /* 18 */
3031 &sensor_dev_template_pwm_max, /* 19 */
3032 &sensor_dev_template_pwm_step, /* 20 */
3033 &sensor_dev_template_pwm_weight_duty_base, /* 21 */
3034 &sensor_dev_template_pwm_auto_point1_pwm, /* 22 */
3035 &sensor_dev_template_pwm_auto_point1_temp,
3036 &sensor_dev_template_pwm_auto_point2_pwm,
3037 &sensor_dev_template_pwm_auto_point2_temp,
3038 &sensor_dev_template_pwm_auto_point3_pwm,
3039 &sensor_dev_template_pwm_auto_point3_temp,
3040 &sensor_dev_template_pwm_auto_point4_pwm,
3041 &sensor_dev_template_pwm_auto_point4_temp,
3042 &sensor_dev_template_pwm_auto_point5_pwm,
3043 &sensor_dev_template_pwm_auto_point5_temp,
3044 &sensor_dev_template_pwm_auto_point6_pwm,
3045 &sensor_dev_template_pwm_auto_point6_temp,
3046 &sensor_dev_template_pwm_auto_point7_pwm,
3047 &sensor_dev_template_pwm_auto_point7_temp, /* 35 */
3052 static struct sensor_template_group nct6775_pwm_template_group = {
3053 .templates = nct6775_attributes_pwm_template,
3054 .is_visible = nct6775_pwm_is_visible,
3059 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
3061 struct nct6775_data *data = dev_get_drvdata(dev);
3063 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
3066 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
3068 /* Case open detection */
3071 clear_caseopen(struct device *dev, struct device_attribute *attr,
3072 const char *buf, size_t count)
3074 struct nct6775_data *data = dev_get_drvdata(dev);
3075 int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
3080 if (kstrtoul(buf, 10, &val) || val != 0)
3083 mutex_lock(&data->update_lock);
3086 * Use CR registers to clear caseopen status.
3087 * The CR registers are the same for all chips, and not all chips
3088 * support clearing the caseopen status through "regular" registers.
3090 ret = superio_enter(data->sioreg);
3096 superio_select(data->sioreg, NCT6775_LD_ACPI);
3097 reg = superio_inb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
3098 reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3099 superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3100 reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3101 superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3102 superio_exit(data->sioreg);
3104 data->valid = false; /* Force cache refresh */
3106 mutex_unlock(&data->update_lock);
3110 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
3111 clear_caseopen, INTRUSION_ALARM_BASE);
3112 static SENSOR_DEVICE_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
3113 clear_caseopen, INTRUSION_ALARM_BASE + 1);
3114 static SENSOR_DEVICE_ATTR(intrusion0_beep, S_IWUSR | S_IRUGO, show_beep,
3115 store_beep, INTRUSION_ALARM_BASE);
3116 static SENSOR_DEVICE_ATTR(intrusion1_beep, S_IWUSR | S_IRUGO, show_beep,
3117 store_beep, INTRUSION_ALARM_BASE + 1);
3118 static SENSOR_DEVICE_ATTR(beep_enable, S_IWUSR | S_IRUGO, show_beep,
3119 store_beep, BEEP_ENABLE_BASE);
3121 static umode_t nct6775_other_is_visible(struct kobject *kobj,
3122 struct attribute *attr, int index)
3124 struct device *dev = container_of(kobj, struct device, kobj);
3125 struct nct6775_data *data = dev_get_drvdata(dev);
3127 if (index == 0 && !data->have_vid)
3130 if (index == 1 || index == 2) {
3131 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + index - 1] < 0)
3135 if (index == 3 || index == 4) {
3136 if (data->BEEP_BITS[INTRUSION_ALARM_BASE + index - 3] < 0)
3144 * nct6775_other_is_visible uses the index into the following array
3145 * to determine if attributes should be created or not.
3146 * Any change in order or content must be matched.
3148 static struct attribute *nct6775_attributes_other[] = {
3149 &dev_attr_cpu0_vid.attr, /* 0 */
3150 &sensor_dev_attr_intrusion0_alarm.dev_attr.attr, /* 1 */
3151 &sensor_dev_attr_intrusion1_alarm.dev_attr.attr, /* 2 */
3152 &sensor_dev_attr_intrusion0_beep.dev_attr.attr, /* 3 */
3153 &sensor_dev_attr_intrusion1_beep.dev_attr.attr, /* 4 */
3154 &sensor_dev_attr_beep_enable.dev_attr.attr, /* 5 */
3155 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
3156 &dev_attr_name.attr,
3161 static const struct attribute_group nct6775_group_other = {
3162 .attrs = nct6775_attributes_other,
3163 .is_visible = nct6775_other_is_visible,
3166 static inline void nct6775_init_device(struct nct6775_data *data)
3171 /* Start monitoring if needed */
3172 if (data->REG_CONFIG) {
3173 tmp = nct6775_read_value(data, data->REG_CONFIG);
3175 nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
3178 /* Enable temperature sensors if needed */
3179 for (i = 0; i < NUM_TEMP; i++) {
3180 if (!(data->have_temp & (1 << i)))
3182 if (!data->reg_temp_config[i])
3184 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
3186 nct6775_write_value(data, data->reg_temp_config[i],
3190 /* Enable VBAT monitoring if needed */
3191 tmp = nct6775_read_value(data, data->REG_VBAT);
3193 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
3195 diode = nct6775_read_value(data, data->REG_DIODE);
3197 for (i = 0; i < data->temp_fixed_num; i++) {
3198 if (!(data->have_temp_fixed & (1 << i)))
3200 if ((tmp & (data->DIODE_MASK << i))) /* diode */
3202 = 3 - ((diode >> i) & data->DIODE_MASK);
3203 else /* thermistor */
3204 data->temp_type[i] = 4;
3209 nct6775_check_fan_inputs(struct nct6775_data *data)
3211 bool fan3pin, fan4pin, fan4min, fan5pin, fan6pin;
3212 bool pwm3pin, pwm4pin, pwm5pin, pwm6pin;
3213 int sioreg = data->sioreg;
3216 /* Store SIO_REG_ENABLE for use during resume */
3217 superio_select(sioreg, NCT6775_LD_HWM);
3218 data->sio_reg_enable = superio_inb(sioreg, SIO_REG_ENABLE);
3220 /* fan4 and fan5 share some pins with the GPIO and serial flash */
3221 if (data->kind == nct6775) {
3222 regval = superio_inb(sioreg, 0x2c);
3224 fan3pin = regval & (1 << 6);
3225 pwm3pin = regval & (1 << 7);
3227 /* On NCT6775, fan4 shares pins with the fdc interface */
3228 fan4pin = !(superio_inb(sioreg, 0x2A) & 0x80);
3235 } else if (data->kind == nct6776) {
3236 bool gpok = superio_inb(sioreg, 0x27) & 0x80;
3237 const char *board_vendor, *board_name;
3239 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
3240 board_name = dmi_get_system_info(DMI_BOARD_NAME);
3242 if (board_name && board_vendor &&
3243 !strcmp(board_vendor, "ASRock")) {
3245 * Auxiliary fan monitoring is not enabled on ASRock
3246 * Z77 Pro4-M if booted in UEFI Ultra-FastBoot mode.
3247 * Observed with BIOS version 2.00.
3249 if (!strcmp(board_name, "Z77 Pro4-M")) {
3250 if ((data->sio_reg_enable & 0xe0) != 0xe0) {
3251 data->sio_reg_enable |= 0xe0;
3252 superio_outb(sioreg, SIO_REG_ENABLE,
3253 data->sio_reg_enable);
3258 if (data->sio_reg_enable & 0x80)
3261 fan3pin = !(superio_inb(sioreg, 0x24) & 0x40);
3263 if (data->sio_reg_enable & 0x40)
3266 fan4pin = superio_inb(sioreg, 0x1C) & 0x01;
3268 if (data->sio_reg_enable & 0x20)
3271 fan5pin = superio_inb(sioreg, 0x1C) & 0x02;
3279 } else if (data->kind == nct6106) {
3280 regval = superio_inb(sioreg, 0x24);
3281 fan3pin = !(regval & 0x80);
3282 pwm3pin = regval & 0x08;
3291 } else { /* NCT6779D, NCT6791D, NCT6792D, or NCT6793D */
3292 regval = superio_inb(sioreg, 0x1c);
3294 fan3pin = !(regval & (1 << 5));
3295 fan4pin = !(regval & (1 << 6));
3296 fan5pin = !(regval & (1 << 7));
3298 pwm3pin = !(regval & (1 << 0));
3299 pwm4pin = !(regval & (1 << 1));
3300 pwm5pin = !(regval & (1 << 2));
3304 if (data->kind == nct6791 || data->kind == nct6792 ||
3305 data->kind == nct6793) {
3306 regval = superio_inb(sioreg, 0x2d);
3307 fan6pin = (regval & (1 << 1));
3308 pwm6pin = (regval & (1 << 0));
3309 } else { /* NCT6779D */
3315 /* fan 1 and 2 (0x03) are always present */
3316 data->has_fan = 0x03 | (fan3pin << 2) | (fan4pin << 3) |
3317 (fan5pin << 4) | (fan6pin << 5);
3318 data->has_fan_min = 0x03 | (fan3pin << 2) | (fan4min << 3) |
3320 data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) |
3321 (pwm5pin << 4) | (pwm6pin << 5);
3324 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
3325 int *available, int *mask)
3330 for (i = 0; i < data->pwm_num && *available; i++) {
3335 src = nct6775_read_value(data, regp[i]);
3337 if (!src || (*mask & (1 << src)))
3339 if (src >= data->temp_label_num ||
3340 !strlen(data->temp_label[src]))
3343 index = __ffs(*available);
3344 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3345 *available &= ~(1 << index);
3350 static int nct6775_probe(struct platform_device *pdev)
3352 struct device *dev = &pdev->dev;
3353 struct nct6775_sio_data *sio_data = dev_get_platdata(dev);
3354 struct nct6775_data *data;
3355 struct resource *res;
3357 int src, mask, available;
3358 const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3359 const u16 *reg_temp_mon, *reg_temp_alternate, *reg_temp_crit;
3360 const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL;
3361 int num_reg_temp, num_reg_temp_mon;
3363 struct attribute_group *group;
3364 struct device *hwmon_dev;
3365 int num_attr_groups = 0;
3367 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3368 if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3372 data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3377 data->kind = sio_data->kind;
3378 data->sioreg = sio_data->sioreg;
3379 data->addr = res->start;
3380 mutex_init(&data->update_lock);
3381 data->name = nct6775_device_names[data->kind];
3382 data->bank = 0xff; /* Force initial bank selection */
3383 platform_set_drvdata(pdev, data);
3385 switch (data->kind) {
3389 data->auto_pwm_num = 4;
3390 data->temp_fixed_num = 3;
3391 data->num_temp_alarms = 6;
3392 data->num_temp_beeps = 6;
3394 data->fan_from_reg = fan_from_reg13;
3395 data->fan_from_reg_min = fan_from_reg13;
3397 data->temp_label = nct6776_temp_label;
3398 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3400 data->REG_VBAT = NCT6106_REG_VBAT;
3401 data->REG_DIODE = NCT6106_REG_DIODE;
3402 data->DIODE_MASK = NCT6106_DIODE_MASK;
3403 data->REG_VIN = NCT6106_REG_IN;
3404 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3405 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3406 data->REG_TARGET = NCT6106_REG_TARGET;
3407 data->REG_FAN = NCT6106_REG_FAN;
3408 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
3409 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
3410 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
3411 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
3412 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
3413 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
3414 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
3415 data->REG_PWM[0] = NCT6106_REG_PWM;
3416 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
3417 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
3418 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3419 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3420 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3421 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3422 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3423 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
3424 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
3425 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
3426 data->REG_CRITICAL_TEMP_TOLERANCE
3427 = NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
3428 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
3429 data->CRITICAL_PWM_ENABLE_MASK
3430 = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3431 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
3432 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3433 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3434 data->REG_TEMP_SEL = NCT6106_REG_TEMP_SEL;
3435 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3436 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3437 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3438 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3439 data->REG_ALARM = NCT6106_REG_ALARM;
3440 data->ALARM_BITS = NCT6106_ALARM_BITS;
3441 data->REG_BEEP = NCT6106_REG_BEEP;
3442 data->BEEP_BITS = NCT6106_BEEP_BITS;
3444 reg_temp = NCT6106_REG_TEMP;
3445 reg_temp_mon = NCT6106_REG_TEMP_MON;
3446 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3447 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON);
3448 reg_temp_over = NCT6106_REG_TEMP_OVER;
3449 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3450 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3451 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3452 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3453 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3454 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3460 data->auto_pwm_num = 6;
3461 data->has_fan_div = true;
3462 data->temp_fixed_num = 3;
3463 data->num_temp_alarms = 3;
3464 data->num_temp_beeps = 3;
3466 data->ALARM_BITS = NCT6775_ALARM_BITS;
3467 data->BEEP_BITS = NCT6775_BEEP_BITS;
3469 data->fan_from_reg = fan_from_reg16;
3470 data->fan_from_reg_min = fan_from_reg8;
3471 data->target_temp_mask = 0x7f;
3472 data->tolerance_mask = 0x0f;
3473 data->speed_tolerance_limit = 15;
3475 data->temp_label = nct6775_temp_label;
3476 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
3478 data->REG_CONFIG = NCT6775_REG_CONFIG;
3479 data->REG_VBAT = NCT6775_REG_VBAT;
3480 data->REG_DIODE = NCT6775_REG_DIODE;
3481 data->DIODE_MASK = NCT6775_DIODE_MASK;
3482 data->REG_VIN = NCT6775_REG_IN;
3483 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3484 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3485 data->REG_TARGET = NCT6775_REG_TARGET;
3486 data->REG_FAN = NCT6775_REG_FAN;
3487 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3488 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3489 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3490 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3491 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3492 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3493 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3494 data->REG_PWM[0] = NCT6775_REG_PWM;
3495 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3496 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3497 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3498 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3499 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3500 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3501 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3502 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3503 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3504 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3505 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3506 data->REG_CRITICAL_TEMP_TOLERANCE
3507 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3508 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3509 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3510 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3511 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3512 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3513 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3514 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3515 data->REG_ALARM = NCT6775_REG_ALARM;
3516 data->REG_BEEP = NCT6775_REG_BEEP;
3518 reg_temp = NCT6775_REG_TEMP;
3519 reg_temp_mon = NCT6775_REG_TEMP_MON;
3520 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3521 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3522 reg_temp_over = NCT6775_REG_TEMP_OVER;
3523 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3524 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3525 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3526 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3532 data->auto_pwm_num = 4;
3533 data->has_fan_div = false;
3534 data->temp_fixed_num = 3;
3535 data->num_temp_alarms = 3;
3536 data->num_temp_beeps = 6;
3538 data->ALARM_BITS = NCT6776_ALARM_BITS;
3539 data->BEEP_BITS = NCT6776_BEEP_BITS;
3541 data->fan_from_reg = fan_from_reg13;
3542 data->fan_from_reg_min = fan_from_reg13;
3543 data->target_temp_mask = 0xff;
3544 data->tolerance_mask = 0x07;
3545 data->speed_tolerance_limit = 63;
3547 data->temp_label = nct6776_temp_label;
3548 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3550 data->REG_CONFIG = NCT6775_REG_CONFIG;
3551 data->REG_VBAT = NCT6775_REG_VBAT;
3552 data->REG_DIODE = NCT6775_REG_DIODE;
3553 data->DIODE_MASK = NCT6775_DIODE_MASK;
3554 data->REG_VIN = NCT6775_REG_IN;
3555 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3556 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3557 data->REG_TARGET = NCT6775_REG_TARGET;
3558 data->REG_FAN = NCT6775_REG_FAN;
3559 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3560 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3561 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3562 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3563 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3564 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3565 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_UP_TIME;
3566 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3567 data->REG_PWM[0] = NCT6775_REG_PWM;
3568 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3569 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3570 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3571 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3572 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3573 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3574 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3575 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3576 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3577 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3578 data->REG_CRITICAL_TEMP_TOLERANCE
3579 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3580 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3581 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3582 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3583 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3584 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3585 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3586 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3587 data->REG_ALARM = NCT6775_REG_ALARM;
3588 data->REG_BEEP = NCT6776_REG_BEEP;
3590 reg_temp = NCT6775_REG_TEMP;
3591 reg_temp_mon = NCT6775_REG_TEMP_MON;
3592 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3593 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3594 reg_temp_over = NCT6775_REG_TEMP_OVER;
3595 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3596 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3597 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3598 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3604 data->auto_pwm_num = 4;
3605 data->has_fan_div = false;
3606 data->temp_fixed_num = 6;
3607 data->num_temp_alarms = 2;
3608 data->num_temp_beeps = 2;
3610 data->ALARM_BITS = NCT6779_ALARM_BITS;
3611 data->BEEP_BITS = NCT6779_BEEP_BITS;
3613 data->fan_from_reg = fan_from_reg13;
3614 data->fan_from_reg_min = fan_from_reg13;
3615 data->target_temp_mask = 0xff;
3616 data->tolerance_mask = 0x07;
3617 data->speed_tolerance_limit = 63;
3619 data->temp_label = nct6779_temp_label;
3620 data->temp_label_num = NCT6779_NUM_LABELS;
3622 data->REG_CONFIG = NCT6775_REG_CONFIG;
3623 data->REG_VBAT = NCT6775_REG_VBAT;
3624 data->REG_DIODE = NCT6775_REG_DIODE;
3625 data->DIODE_MASK = NCT6775_DIODE_MASK;
3626 data->REG_VIN = NCT6779_REG_IN;
3627 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3628 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3629 data->REG_TARGET = NCT6775_REG_TARGET;
3630 data->REG_FAN = NCT6779_REG_FAN;
3631 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3632 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3633 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3634 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3635 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3636 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3637 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_UP_TIME;
3638 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3639 data->REG_PWM[0] = NCT6775_REG_PWM;
3640 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3641 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3642 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3643 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3644 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3645 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3646 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3647 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3648 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3649 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3650 data->REG_CRITICAL_TEMP_TOLERANCE
3651 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3652 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3653 data->CRITICAL_PWM_ENABLE_MASK
3654 = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3655 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3656 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3657 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3658 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3659 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3660 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3661 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3662 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3663 data->REG_ALARM = NCT6779_REG_ALARM;
3664 data->REG_BEEP = NCT6776_REG_BEEP;
3666 reg_temp = NCT6779_REG_TEMP;
3667 reg_temp_mon = NCT6779_REG_TEMP_MON;
3668 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3669 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3670 reg_temp_over = NCT6779_REG_TEMP_OVER;
3671 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3672 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3673 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3674 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3682 data->auto_pwm_num = 4;
3683 data->has_fan_div = false;
3684 data->temp_fixed_num = 6;
3685 data->num_temp_alarms = 2;
3686 data->num_temp_beeps = 2;
3688 data->ALARM_BITS = NCT6791_ALARM_BITS;
3689 data->BEEP_BITS = NCT6779_BEEP_BITS;
3691 data->fan_from_reg = fan_from_reg13;
3692 data->fan_from_reg_min = fan_from_reg13;
3693 data->target_temp_mask = 0xff;
3694 data->tolerance_mask = 0x07;
3695 data->speed_tolerance_limit = 63;
3697 data->temp_label = nct6779_temp_label;
3698 data->temp_label_num = NCT6791_NUM_LABELS;
3700 data->REG_CONFIG = NCT6775_REG_CONFIG;
3701 data->REG_VBAT = NCT6775_REG_VBAT;
3702 data->REG_DIODE = NCT6775_REG_DIODE;
3703 data->DIODE_MASK = NCT6775_DIODE_MASK;
3704 data->REG_VIN = NCT6779_REG_IN;
3705 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3706 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3707 data->REG_TARGET = NCT6775_REG_TARGET;
3708 data->REG_FAN = NCT6779_REG_FAN;
3709 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3710 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3711 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3712 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3713 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3714 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3715 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_UP_TIME;
3716 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3717 data->REG_PWM[0] = NCT6775_REG_PWM;
3718 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3719 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3720 data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP;
3721 data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE;
3722 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3723 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3724 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3725 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3726 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3727 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3728 data->REG_CRITICAL_TEMP_TOLERANCE
3729 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3730 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3731 data->CRITICAL_PWM_ENABLE_MASK
3732 = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3733 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3734 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3735 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3736 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3737 data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL;
3738 data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP;
3739 data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL;
3740 data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE;
3741 data->REG_ALARM = NCT6791_REG_ALARM;
3742 if (data->kind == nct6791)
3743 data->REG_BEEP = NCT6776_REG_BEEP;
3745 data->REG_BEEP = NCT6792_REG_BEEP;
3747 reg_temp = NCT6779_REG_TEMP;
3748 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3749 if (data->kind == nct6791) {
3750 reg_temp_mon = NCT6779_REG_TEMP_MON;
3751 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3753 reg_temp_mon = NCT6792_REG_TEMP_MON;
3754 num_reg_temp_mon = ARRAY_SIZE(NCT6792_REG_TEMP_MON);
3756 reg_temp_over = NCT6779_REG_TEMP_OVER;
3757 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3758 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3759 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3760 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3766 data->have_in = (1 << data->in_num) - 1;
3767 data->have_temp = 0;
3770 * On some boards, not all available temperature sources are monitored,
3771 * even though some of the monitoring registers are unused.
3772 * Get list of unused monitoring registers, then detect if any fan
3773 * controls are configured to use unmonitored temperature sources.
3774 * If so, assign the unmonitored temperature sources to available
3775 * monitoring registers.
3779 for (i = 0; i < num_reg_temp; i++) {
3780 if (reg_temp[i] == 0)
3783 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3784 if (!src || (mask & (1 << src)))
3785 available |= 1 << i;
3791 * Now find unmonitored temperature registers and enable monitoring
3792 * if additional monitoring registers are available.
3794 add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
3795 add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
3798 s = NUM_TEMP_FIXED; /* First dynamic temperature attribute */
3799 for (i = 0; i < num_reg_temp; i++) {
3800 if (reg_temp[i] == 0)
3803 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3804 if (!src || (mask & (1 << src)))
3807 if (src >= data->temp_label_num ||
3808 !strlen(data->temp_label[src])) {
3810 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3811 src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
3817 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3818 if (src <= data->temp_fixed_num) {
3819 data->have_temp |= 1 << (src - 1);
3820 data->have_temp_fixed |= 1 << (src - 1);
3821 data->reg_temp[0][src - 1] = reg_temp[i];
3822 data->reg_temp[1][src - 1] = reg_temp_over[i];
3823 data->reg_temp[2][src - 1] = reg_temp_hyst[i];
3824 if (reg_temp_crit_h && reg_temp_crit_h[i])
3825 data->reg_temp[3][src - 1] = reg_temp_crit_h[i];
3826 else if (reg_temp_crit[src - 1])
3827 data->reg_temp[3][src - 1]
3828 = reg_temp_crit[src - 1];
3829 if (reg_temp_crit_l && reg_temp_crit_l[i])
3830 data->reg_temp[4][src - 1] = reg_temp_crit_l[i];
3831 data->reg_temp_config[src - 1] = reg_temp_config[i];
3832 data->temp_src[src - 1] = src;
3839 /* Use dynamic index for other sources */
3840 data->have_temp |= 1 << s;
3841 data->reg_temp[0][s] = reg_temp[i];
3842 data->reg_temp[1][s] = reg_temp_over[i];
3843 data->reg_temp[2][s] = reg_temp_hyst[i];
3844 data->reg_temp_config[s] = reg_temp_config[i];
3845 if (reg_temp_crit_h && reg_temp_crit_h[i])
3846 data->reg_temp[3][s] = reg_temp_crit_h[i];
3847 else if (reg_temp_crit[src - 1])
3848 data->reg_temp[3][s] = reg_temp_crit[src - 1];
3849 if (reg_temp_crit_l && reg_temp_crit_l[i])
3850 data->reg_temp[4][s] = reg_temp_crit_l[i];
3852 data->temp_src[s] = src;
3857 * Repeat with temperatures used for fan control.
3858 * This set of registers does not support limits.
3860 for (i = 0; i < num_reg_temp_mon; i++) {
3861 if (reg_temp_mon[i] == 0)
3864 src = nct6775_read_value(data, data->REG_TEMP_SEL[i]) & 0x1f;
3865 if (!src || (mask & (1 << src)))
3868 if (src >= data->temp_label_num ||
3869 !strlen(data->temp_label[src])) {
3871 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3872 src, i, data->REG_TEMP_SEL[i],
3879 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3880 if (src <= data->temp_fixed_num) {
3881 if (data->have_temp & (1 << (src - 1)))
3883 data->have_temp |= 1 << (src - 1);
3884 data->have_temp_fixed |= 1 << (src - 1);
3885 data->reg_temp[0][src - 1] = reg_temp_mon[i];
3886 data->temp_src[src - 1] = src;
3893 /* Use dynamic index for other sources */
3894 data->have_temp |= 1 << s;
3895 data->reg_temp[0][s] = reg_temp_mon[i];
3896 data->temp_src[s] = src;
3900 #ifdef USE_ALTERNATE
3902 * Go through the list of alternate temp registers and enable
3904 * The temperature is already monitored if the respective bit in <mask>
3907 for (i = 0; i < data->temp_label_num - 1; i++) {
3908 if (!reg_temp_alternate[i])
3910 if (mask & (1 << (i + 1)))
3912 if (i < data->temp_fixed_num) {
3913 if (data->have_temp & (1 << i))
3915 data->have_temp |= 1 << i;
3916 data->have_temp_fixed |= 1 << i;
3917 data->reg_temp[0][i] = reg_temp_alternate[i];
3918 if (i < num_reg_temp) {
3919 data->reg_temp[1][i] = reg_temp_over[i];
3920 data->reg_temp[2][i] = reg_temp_hyst[i];
3922 data->temp_src[i] = i + 1;
3926 if (s >= NUM_TEMP) /* Abort if no more space */
3929 data->have_temp |= 1 << s;
3930 data->reg_temp[0][s] = reg_temp_alternate[i];
3931 data->temp_src[s] = i + 1;
3934 #endif /* USE_ALTERNATE */
3936 /* Initialize the chip */
3937 nct6775_init_device(data);
3939 err = superio_enter(sio_data->sioreg);
3943 cr2a = superio_inb(sio_data->sioreg, 0x2a);
3944 switch (data->kind) {
3946 data->have_vid = (cr2a & 0x40);
3949 data->have_vid = (cr2a & 0x60) == 0x40;
3961 * We can get the VID input values directly at logical device D 0xe3.
3963 if (data->have_vid) {
3964 superio_select(sio_data->sioreg, NCT6775_LD_VID);
3965 data->vid = superio_inb(sio_data->sioreg, 0xe3);
3966 data->vrm = vid_which_vrm();
3972 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3973 tmp = superio_inb(sio_data->sioreg,
3974 NCT6775_REG_CR_FAN_DEBOUNCE);
3975 switch (data->kind) {
3992 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
3994 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
3998 nct6775_check_fan_inputs(data);
4000 superio_exit(sio_data->sioreg);
4002 /* Read fan clock dividers immediately */
4003 nct6775_init_fan_common(dev, data);
4005 /* Register sysfs hooks */
4006 group = nct6775_create_attr_group(dev, &nct6775_pwm_template_group,
4009 return PTR_ERR(group);
4011 data->groups[num_attr_groups++] = group;
4013 group = nct6775_create_attr_group(dev, &nct6775_in_template_group,
4014 fls(data->have_in));
4016 return PTR_ERR(group);
4018 data->groups[num_attr_groups++] = group;
4020 group = nct6775_create_attr_group(dev, &nct6775_fan_template_group,
4021 fls(data->has_fan));
4023 return PTR_ERR(group);
4025 data->groups[num_attr_groups++] = group;
4027 group = nct6775_create_attr_group(dev, &nct6775_temp_template_group,
4028 fls(data->have_temp));
4030 return PTR_ERR(group);
4032 data->groups[num_attr_groups++] = group;
4033 data->groups[num_attr_groups++] = &nct6775_group_other;
4035 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4036 err = sysfs_create_groups(&dev->kobj, data->groups);
4039 hwmon_dev = hwmon_device_register(dev);
4040 if (IS_ERR(hwmon_dev)) {
4041 sysfs_remove_groups(&dev->kobj, data->groups);
4042 return PTR_ERR(hwmon_dev);
4044 data->hwmon_dev = hwmon_dev;
4046 hwmon_dev = devm_hwmon_device_register_with_groups(dev, data->name,
4047 data, data->groups);
4049 return PTR_ERR_OR_ZERO(hwmon_dev);
4052 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4053 static int nct6775_remove(struct platform_device *pdev)
4055 struct nct6775_data *data = platform_get_drvdata(pdev);
4057 hwmon_device_unregister(data->hwmon_dev);
4058 sysfs_remove_groups(&pdev->dev.kobj, data->groups);
4063 static void nct6791_enable_io_mapping(int sioaddr)
4067 val = superio_inb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE);
4069 pr_info("Enabling hardware monitor logical device mappings.\n");
4070 superio_outb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE,
4075 static int __maybe_unused nct6775_suspend(struct device *dev)
4077 struct nct6775_data *data = nct6775_update_device(dev);
4079 mutex_lock(&data->update_lock);
4080 data->vbat = nct6775_read_value(data, data->REG_VBAT);
4081 if (data->kind == nct6775) {
4082 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
4083 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
4085 mutex_unlock(&data->update_lock);
4090 static int __maybe_unused nct6775_resume(struct device *dev)
4092 struct nct6775_data *data = dev_get_drvdata(dev);
4093 int sioreg = data->sioreg;
4097 mutex_lock(&data->update_lock);
4098 data->bank = 0xff; /* Force initial bank selection */
4100 err = superio_enter(sioreg);
4104 superio_select(sioreg, NCT6775_LD_HWM);
4105 reg = superio_inb(sioreg, SIO_REG_ENABLE);
4106 if (reg != data->sio_reg_enable)
4107 superio_outb(sioreg, SIO_REG_ENABLE, data->sio_reg_enable);
4109 if (data->kind == nct6791 || data->kind == nct6792 ||
4110 data->kind == nct6793)
4111 nct6791_enable_io_mapping(sioreg);
4113 superio_exit(sioreg);
4115 /* Restore limits */
4116 for (i = 0; i < data->in_num; i++) {
4117 if (!(data->have_in & (1 << i)))
4120 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
4122 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
4126 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
4127 if (!(data->has_fan_min & (1 << i)))
4130 nct6775_write_value(data, data->REG_FAN_MIN[i],
4134 for (i = 0; i < NUM_TEMP; i++) {
4135 if (!(data->have_temp & (1 << i)))
4138 for (j = 1; j < ARRAY_SIZE(data->reg_temp); j++)
4139 if (data->reg_temp[j][i])
4140 nct6775_write_temp(data, data->reg_temp[j][i],
4144 /* Restore other settings */
4145 nct6775_write_value(data, data->REG_VBAT, data->vbat);
4146 if (data->kind == nct6775) {
4147 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
4148 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
4152 /* Force re-reading all values */
4153 data->valid = false;
4154 mutex_unlock(&data->update_lock);
4159 static SIMPLE_DEV_PM_OPS(nct6775_dev_pm_ops, nct6775_suspend, nct6775_resume);
4161 static struct platform_driver nct6775_driver = {
4163 .owner = THIS_MODULE,
4165 .pm = &nct6775_dev_pm_ops,
4167 .probe = nct6775_probe,
4168 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4169 .remove = nct6775_remove,
4173 static const char * const nct6775_sio_names[] __initconst = {
4183 /* nct6775_find() looks for a '627 in the Super-I/O config space */
4184 static int __init nct6775_find(int sioaddr, struct nct6775_sio_data *sio_data)
4190 err = superio_enter(sioaddr);
4197 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
4198 | superio_inb(sioaddr, SIO_REG_DEVID + 1);
4199 switch (val & SIO_ID_MASK) {
4200 case SIO_NCT6106_ID:
4201 sio_data->kind = nct6106;
4203 case SIO_NCT6775_ID:
4204 sio_data->kind = nct6775;
4206 case SIO_NCT6776_ID:
4207 sio_data->kind = nct6776;
4209 case SIO_NCT6779_ID:
4210 sio_data->kind = nct6779;
4212 case SIO_NCT6791_ID:
4213 sio_data->kind = nct6791;
4215 case SIO_NCT6792_ID:
4216 sio_data->kind = nct6792;
4218 case SIO_NCT6793_ID:
4219 sio_data->kind = nct6793;
4223 pr_debug("unsupported chip ID: 0x%04x\n", val);
4224 superio_exit(sioaddr);
4228 /* We have a known chip, find the HWM I/O address */
4229 superio_select(sioaddr, NCT6775_LD_HWM);
4230 val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
4231 | superio_inb(sioaddr, SIO_REG_ADDR + 1);
4232 addr = val & IOREGION_ALIGNMENT;
4234 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
4235 superio_exit(sioaddr);
4239 /* Activate logical device if needed */
4240 val = superio_inb(sioaddr, SIO_REG_ENABLE);
4241 if (!(val & 0x01)) {
4242 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
4243 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
4246 if (sio_data->kind == nct6791 || sio_data->kind == nct6792 ||
4247 sio_data->kind == nct6793)
4248 nct6791_enable_io_mapping(sioaddr);
4250 superio_exit(sioaddr);
4251 pr_info("Found %s or compatible chip at %#x:%#x\n",
4252 nct6775_sio_names[sio_data->kind], sioaddr, addr);
4253 sio_data->sioreg = sioaddr;
4259 * when Super-I/O functions move to a separate file, the Super-I/O
4260 * bus will manage the lifetime of the device and this module will only keep
4261 * track of the nct6775 driver. But since we use platform_device_alloc(), we
4262 * must keep track of the device
4264 static struct platform_device *pdev[2];
4266 static int __init sensors_nct6775_init(void)
4271 struct resource res;
4272 struct nct6775_sio_data sio_data;
4273 int sioaddr[2] = { 0x2e, 0x4e };
4275 err = platform_driver_register(&nct6775_driver);
4280 * initialize sio_data->kind and sio_data->sioreg.
4282 * when Super-I/O functions move to a separate file, the Super-I/O
4283 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
4284 * nct6775 hardware monitor, and call probe()
4286 for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4287 address = nct6775_find(sioaddr[i], &sio_data);
4293 pdev[i] = platform_device_alloc(DRVNAME, address);
4296 goto exit_device_unregister;
4299 err = platform_device_add_data(pdev[i], &sio_data,
4300 sizeof(struct nct6775_sio_data));
4302 goto exit_device_put;
4304 memset(&res, 0, sizeof(res));
4306 res.start = address + IOREGION_OFFSET;
4307 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
4308 res.flags = IORESOURCE_IO;
4310 err = acpi_check_resource_conflict(&res);
4312 platform_device_put(pdev[i]);
4317 err = platform_device_add_resources(pdev[i], &res, 1);
4319 goto exit_device_put;
4321 /* platform_device_add calls probe() */
4322 err = platform_device_add(pdev[i]);
4324 goto exit_device_put;
4328 goto exit_unregister;
4334 platform_device_put(pdev[i]);
4335 exit_device_unregister:
4338 platform_device_unregister(pdev[i]);
4341 platform_driver_unregister(&nct6775_driver);
4345 static void __exit sensors_nct6775_exit(void)
4349 for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4351 platform_device_unregister(pdev[i]);
4353 platform_driver_unregister(&nct6775_driver);
4356 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4357 MODULE_DESCRIPTION("Driver for NCT6775F and compatible chips");
4358 MODULE_LICENSE("GPL");
4360 module_init(sensors_nct6775_init);
4361 module_exit(sensors_nct6775_exit);