2 * nct6775 - Driver for the hardware monitoring functionality of
3 * Nuvoton NCT677x Super-I/O chips
5 * Copyright (C) 2012 Guenter Roeck <linux@roeck-us.net>
7 * Derived from w83627ehf driver
8 * Copyright (C) 2005-2012 Jean Delvare <khali@linux-fr.org>
9 * Copyright (C) 2006 Yuan Mu (Winbond),
10 * Rudolf Marek <r.marek@assembler.cz>
11 * David Hubbard <david.c.hubbard@gmail.com>
12 * Daniel J Blueman <daniel.blueman@gmail.com>
13 * Copyright (C) 2010 Sheng-Yuan Huang (Nuvoton) (PS00)
15 * Shamelessly ripped from the w83627hf driver
16 * Copyright (C) 2003 Mark Studebaker
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
33 * Supports the following chips:
35 * Chip #vin #fan #pwm #temp chip IDs man ID
36 * nct6106d 9 3 3 6+3 0xc450 0xc1 0x5ca3
37 * nct6775f 9 4 3 6+3 0xb470 0xc1 0x5ca3
38 * nct6776f 9 5 3 6+3 0xc330 0xc1 0x5ca3
39 * nct6779d 15 5 5 2+6 0xc560 0xc1 0x5ca3
40 * nct6791d 15 6 6 2+6 0xc800 0xc1 0x5ca3
42 * #temp lists the number of monitored temperature sources (first value) plus
43 * the number of directly connectable temperature sensors (second value).
46 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
48 #include <linux/module.h>
49 #include <linux/init.h>
50 #include <linux/slab.h>
51 #include <linux/jiffies.h>
52 #include <linux/platform_device.h>
53 #include <linux/hwmon.h>
54 #include <linux/hwmon-sysfs.h>
55 #include <linux/hwmon-vid.h>
56 #include <linux/err.h>
57 #include <linux/mutex.h>
58 #include <linux/acpi.h>
65 enum kinds { nct6106, nct6775, nct6776, nct6779, nct6791 };
67 /* used to set data->name = nct6775_device_names[data->sio_kind] */
68 static const char * const nct6775_device_names[] = {
76 static unsigned short force_id;
77 module_param(force_id, ushort, 0);
78 MODULE_PARM_DESC(force_id, "Override the detected device ID");
80 static unsigned short fan_debounce;
81 module_param(fan_debounce, ushort, 0);
82 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
84 #define DRVNAME "nct6775"
87 * Super-I/O constants and functions
90 #define NCT6775_LD_ACPI 0x0a
91 #define NCT6775_LD_HWM 0x0b
92 #define NCT6775_LD_VID 0x0d
94 #define SIO_REG_LDSEL 0x07 /* Logical device select */
95 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
96 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
97 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
99 #define SIO_NCT6106_ID 0xc450
100 #define SIO_NCT6775_ID 0xb470
101 #define SIO_NCT6776_ID 0xc330
102 #define SIO_NCT6779_ID 0xc560
103 #define SIO_NCT6791_ID 0xc800
104 #define SIO_ID_MASK 0xFFF0
106 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
109 superio_outb(int ioreg, int reg, int val)
112 outb(val, ioreg + 1);
116 superio_inb(int ioreg, int reg)
119 return inb(ioreg + 1);
123 superio_select(int ioreg, int ld)
125 outb(SIO_REG_LDSEL, ioreg);
130 superio_enter(int ioreg)
133 * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
135 if (!request_muxed_region(ioreg, 2, DRVNAME))
145 superio_exit(int ioreg)
149 outb(0x02, ioreg + 1);
150 release_region(ioreg, 2);
157 #define IOREGION_ALIGNMENT (~7)
158 #define IOREGION_OFFSET 5
159 #define IOREGION_LENGTH 2
160 #define ADDR_REG_OFFSET 0
161 #define DATA_REG_OFFSET 1
163 #define NCT6775_REG_BANK 0x4E
164 #define NCT6775_REG_CONFIG 0x40
167 * Not currently used:
168 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
169 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
170 * REG_MAN_ID is at port 0x4f
171 * REG_CHIP_ID is at port 0x58
174 #define NUM_TEMP 10 /* Max number of temp attribute sets w/ limits*/
175 #define NUM_TEMP_FIXED 6 /* Max number of fixed temp attribute sets */
177 #define NUM_REG_ALARM 7 /* Max number of alarm registers */
178 #define NUM_REG_BEEP 5 /* Max number of beep registers */
182 /* Common and NCT6775 specific data */
184 /* Voltage min/max registers for nr=7..14 are in bank 5 */
186 static const u16 NCT6775_REG_IN_MAX[] = {
187 0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
188 0x55c, 0x55e, 0x560, 0x562 };
189 static const u16 NCT6775_REG_IN_MIN[] = {
190 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
191 0x55d, 0x55f, 0x561, 0x563 };
192 static const u16 NCT6775_REG_IN[] = {
193 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
196 #define NCT6775_REG_VBAT 0x5D
197 #define NCT6775_REG_DIODE 0x5E
198 #define NCT6775_DIODE_MASK 0x02
200 #define NCT6775_REG_FANDIV1 0x506
201 #define NCT6775_REG_FANDIV2 0x507
203 #define NCT6775_REG_CR_FAN_DEBOUNCE 0xf0
205 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
207 /* 0..15 voltages, 16..23 fans, 24..29 temperatures, 30..31 intrusion */
209 static const s8 NCT6775_ALARM_BITS[] = {
210 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
211 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
213 6, 7, 11, -1, -1, /* fan1..fan5 */
214 -1, -1, -1, /* unused */
215 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
216 12, -1 }; /* intrusion0, intrusion1 */
218 #define FAN_ALARM_BASE 16
219 #define TEMP_ALARM_BASE 24
220 #define INTRUSION_ALARM_BASE 30
222 static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e };
225 * 0..14 voltages, 15 global beep enable, 16..23 fans, 24..29 temperatures,
228 static const s8 NCT6775_BEEP_BITS[] = {
229 0, 1, 2, 3, 8, 9, 10, 16, /* in0.. in7 */
230 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
231 21, /* global beep enable */
232 6, 7, 11, 28, -1, /* fan1..fan5 */
233 -1, -1, -1, /* unused */
234 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
235 12, -1 }; /* intrusion0, intrusion1 */
237 #define BEEP_ENABLE_BASE 15
239 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
240 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
242 /* DC or PWM output fan configuration */
243 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
244 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
246 /* Advanced Fan control, some values are common for all fans */
248 static const u16 NCT6775_REG_TARGET[] = {
249 0x101, 0x201, 0x301, 0x801, 0x901, 0xa01 };
250 static const u16 NCT6775_REG_FAN_MODE[] = {
251 0x102, 0x202, 0x302, 0x802, 0x902, 0xa02 };
252 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
253 0x103, 0x203, 0x303, 0x803, 0x903, 0xa03 };
254 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
255 0x104, 0x204, 0x304, 0x804, 0x904, 0xa04 };
256 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
257 0x105, 0x205, 0x305, 0x805, 0x905, 0xa05 };
258 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = {
259 0x106, 0x206, 0x306, 0x806, 0x906, 0xa06 };
260 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
261 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
263 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
264 0x107, 0x207, 0x307, 0x807, 0x907, 0xa07 };
265 static const u16 NCT6775_REG_PWM[] = {
266 0x109, 0x209, 0x309, 0x809, 0x909, 0xa09 };
267 static const u16 NCT6775_REG_PWM_READ[] = {
268 0x01, 0x03, 0x11, 0x13, 0x15, 0xa09 };
270 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
271 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
272 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
273 static const u16 NCT6775_FAN_PULSE_SHIFT[] = { 0, 0, 0, 0, 0, 0 };
275 static const u16 NCT6775_REG_TEMP[] = {
276 0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
278 static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77 };
280 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
281 0, 0x152, 0x252, 0x628, 0x629, 0x62A };
282 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
283 0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
284 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
285 0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
287 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
288 0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
290 static const u16 NCT6775_REG_TEMP_SEL[] = {
291 0x100, 0x200, 0x300, 0x800, 0x900, 0xa00 };
293 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
294 0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 };
295 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
296 0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a };
297 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
298 0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b };
299 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
300 0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c };
301 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
302 0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d };
304 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
306 static const u16 NCT6775_REG_AUTO_TEMP[] = {
307 0x121, 0x221, 0x321, 0x821, 0x921, 0xa21 };
308 static const u16 NCT6775_REG_AUTO_PWM[] = {
309 0x127, 0x227, 0x327, 0x827, 0x927, 0xa27 };
311 #define NCT6775_AUTO_TEMP(data, nr, p) ((data)->REG_AUTO_TEMP[nr] + (p))
312 #define NCT6775_AUTO_PWM(data, nr, p) ((data)->REG_AUTO_PWM[nr] + (p))
314 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
316 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
317 0x135, 0x235, 0x335, 0x835, 0x935, 0xa35 };
318 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
319 0x138, 0x238, 0x338, 0x838, 0x938, 0xa38 };
321 static const char *const nct6775_temp_label[] = {
335 "PCH_CHIP_CPU_MAX_TEMP",
345 static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
346 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
348 static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
349 = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
352 /* NCT6776 specific data */
354 static const s8 NCT6776_ALARM_BITS[] = {
355 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
356 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
358 6, 7, 11, 10, 23, /* fan1..fan5 */
359 -1, -1, -1, /* unused */
360 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
361 12, 9 }; /* intrusion0, intrusion1 */
363 static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5 };
365 static const s8 NCT6776_BEEP_BITS[] = {
366 0, 1, 2, 3, 4, 5, 6, 7, /* in0.. in7 */
367 8, -1, -1, -1, -1, -1, -1, /* in8..in14 */
368 24, /* global beep enable */
369 25, 26, 27, 28, 29, /* fan1..fan5 */
370 -1, -1, -1, /* unused */
371 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
372 30, 31 }; /* intrusion0, intrusion1 */
374 static const u16 NCT6776_REG_TOLERANCE_H[] = {
375 0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c };
377 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0 };
378 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0 };
380 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
381 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
383 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
384 0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e };
386 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
387 0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
389 static const char *const nct6776_temp_label[] = {
404 "PCH_CHIP_CPU_MAX_TEMP",
415 static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
416 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
418 static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
419 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
421 /* NCT6779 specific data */
423 static const u16 NCT6779_REG_IN[] = {
424 0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
425 0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
427 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
428 0x459, 0x45A, 0x45B, 0x568 };
430 static const s8 NCT6779_ALARM_BITS[] = {
431 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
432 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */
434 6, 7, 11, 10, 23, /* fan1..fan5 */
435 -1, -1, -1, /* unused */
436 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
437 12, 9 }; /* intrusion0, intrusion1 */
439 static const s8 NCT6779_BEEP_BITS[] = {
440 0, 1, 2, 3, 4, 5, 6, 7, /* in0.. in7 */
441 8, 9, 10, 11, 12, 13, 14, /* in8..in14 */
442 24, /* global beep enable */
443 25, 26, 27, 28, 29, /* fan1..fan5 */
444 -1, -1, -1, /* unused */
445 16, 17, -1, -1, -1, -1, /* temp1..temp6 */
446 30, 31 }; /* intrusion0, intrusion1 */
448 static const u16 NCT6779_REG_FAN[] = {
449 0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8, 0x4ba };
450 static const u16 NCT6779_REG_FAN_PULSES[] = {
451 0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
453 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
454 0x136, 0x236, 0x336, 0x836, 0x936, 0xa36 };
455 #define NCT6779_CRITICAL_PWM_ENABLE_MASK 0x01
456 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
457 0x137, 0x237, 0x337, 0x837, 0x937, 0xa37 };
459 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
460 static const u16 NCT6779_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b };
461 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
463 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
465 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
468 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
469 0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
471 static const char *const nct6779_temp_label[] = {
490 "PCH_CHIP_CPU_MAX_TEMP",
501 static const u16 NCT6779_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6779_temp_label) - 1]
502 = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
503 0, 0, 0, 0, 0, 0, 0, 0,
504 0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
507 static const u16 NCT6779_REG_TEMP_CRIT[ARRAY_SIZE(nct6779_temp_label) - 1]
508 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
510 /* NCT6791 specific data */
512 #define NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE 0x28
514 static const u16 NCT6791_REG_WEIGHT_TEMP_SEL[6] = { 0, 0x239 };
515 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP[6] = { 0, 0x23a };
516 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP_TOL[6] = { 0, 0x23b };
517 static const u16 NCT6791_REG_WEIGHT_DUTY_STEP[6] = { 0, 0x23c };
518 static const u16 NCT6791_REG_WEIGHT_TEMP_BASE[6] = { 0, 0x23d };
519 static const u16 NCT6791_REG_WEIGHT_DUTY_BASE[6] = { 0, 0x23e };
521 static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = {
522 0x459, 0x45A, 0x45B, 0x568, 0x45D };
524 static const s8 NCT6791_ALARM_BITS[] = {
525 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
526 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */
528 6, 7, 11, 10, 23, 33, /* fan1..fan6 */
530 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
531 12, 9 }; /* intrusion0, intrusion1 */
534 /* NCT6102D/NCT6106D specific data */
536 #define NCT6106_REG_VBAT 0x318
537 #define NCT6106_REG_DIODE 0x319
538 #define NCT6106_DIODE_MASK 0x01
540 static const u16 NCT6106_REG_IN_MAX[] = {
541 0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
542 static const u16 NCT6106_REG_IN_MIN[] = {
543 0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
544 static const u16 NCT6106_REG_IN[] = {
545 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
547 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
548 static const u16 NCT6106_REG_TEMP_MON[] = { 0x18, 0x19, 0x1a };
549 static const u16 NCT6106_REG_TEMP_HYST[] = {
550 0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
551 static const u16 NCT6106_REG_TEMP_OVER[] = {
552 0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
553 static const u16 NCT6106_REG_TEMP_CRIT_L[] = {
554 0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
555 static const u16 NCT6106_REG_TEMP_CRIT_H[] = {
556 0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
557 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
558 static const u16 NCT6106_REG_TEMP_CONFIG[] = {
559 0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
561 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
562 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
563 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0, 0 };
564 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4, 0, 0 };
566 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
567 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
568 static const u16 NCT6106_REG_PWM[] = { 0x119, 0x129, 0x139 };
569 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c };
570 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
571 static const u16 NCT6106_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130 };
572 static const u16 NCT6106_REG_TEMP_SOURCE[] = {
573 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
575 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
576 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = {
577 0x11b, 0x12b, 0x13b };
579 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
580 #define NCT6106_CRITICAL_PWM_ENABLE_MASK 0x10
581 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
583 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
584 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
585 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
586 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
587 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
588 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
590 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
592 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
593 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
594 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
595 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x17c };
596 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
597 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
599 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
600 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
602 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = {
603 0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
605 static const s8 NCT6106_ALARM_BITS[] = {
606 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */
607 9, -1, -1, -1, -1, -1, -1, /* in8..in14 */
609 32, 33, 34, -1, -1, /* fan1..fan5 */
610 -1, -1, -1, /* unused */
611 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
612 48, -1 /* intrusion0, intrusion1 */
615 static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = {
616 0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 };
618 static const s8 NCT6106_BEEP_BITS[] = {
619 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */
620 9, 10, 11, 12, -1, -1, -1, /* in8..in14 */
621 32, /* global beep enable */
622 24, 25, 26, 27, 28, /* fan1..fan5 */
623 -1, -1, -1, /* unused */
624 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
625 34, -1 /* intrusion0, intrusion1 */
628 static const u16 NCT6106_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
629 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x51, 0x52, 0x54 };
631 static const u16 NCT6106_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
632 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x204, 0x205 };
634 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
636 if (mode == 0 && pwm == 255)
641 static int pwm_enable_to_reg(enum pwm_enable mode)
652 /* 1 is DC mode, output in ms */
653 static unsigned int step_time_from_reg(u8 reg, u8 mode)
655 return mode ? 400 * reg : 100 * reg;
658 static u8 step_time_to_reg(unsigned int msec, u8 mode)
660 return clamp_val((mode ? (msec + 200) / 400 :
661 (msec + 50) / 100), 1, 255);
664 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
666 if (reg == 0 || reg == 255)
668 return 1350000U / (reg << divreg);
671 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
673 if ((reg & 0xff1f) == 0xff1f)
676 reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
681 return 1350000U / reg;
684 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
686 if (reg == 0 || reg == 0xffff)
690 * Even though the registers are 16 bit wide, the fan divisor
693 return 1350000U / (reg << divreg);
696 static u16 fan_to_reg(u32 fan, unsigned int divreg)
701 return (1350000U / fan) >> divreg;
704 static inline unsigned int
711 * Some of the voltage inputs have internal scaling, the tables below
712 * contain 8 (the ADC LSB in mV) * scaling factor * 100
714 static const u16 scale_in[15] = {
715 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
719 static inline long in_from_reg(u8 reg, u8 nr)
721 return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
724 static inline u8 in_to_reg(u32 val, u8 nr)
726 return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
730 * Data structures and manipulation thereof
733 struct nct6775_data {
734 int addr; /* IO base of hw monitor block */
735 int sioreg; /* SIO register address */
739 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
740 struct device *hwmon_dev;
744 const struct attribute_group *groups[6];
746 u16 reg_temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
747 * 3=temp_crit, 4=temp_lcrit
749 u8 temp_src[NUM_TEMP];
750 u16 reg_temp_config[NUM_TEMP];
751 const char * const *temp_label;
759 const s8 *ALARM_BITS;
763 const u16 *REG_IN_MINMAX[2];
765 const u16 *REG_TARGET;
767 const u16 *REG_FAN_MODE;
768 const u16 *REG_FAN_MIN;
769 const u16 *REG_FAN_PULSES;
770 const u16 *FAN_PULSE_SHIFT;
771 const u16 *REG_FAN_TIME[3];
773 const u16 *REG_TOLERANCE_H;
775 const u8 *REG_PWM_MODE;
776 const u8 *PWM_MODE_MASK;
778 const u16 *REG_PWM[7]; /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
779 * [3]=pwm_max, [4]=pwm_step,
780 * [5]=weight_duty_step, [6]=weight_duty_base
782 const u16 *REG_PWM_READ;
784 const u16 *REG_CRITICAL_PWM_ENABLE;
785 u8 CRITICAL_PWM_ENABLE_MASK;
786 const u16 *REG_CRITICAL_PWM;
788 const u16 *REG_AUTO_TEMP;
789 const u16 *REG_AUTO_PWM;
791 const u16 *REG_CRITICAL_TEMP;
792 const u16 *REG_CRITICAL_TEMP_TOLERANCE;
794 const u16 *REG_TEMP_SOURCE; /* temp register sources */
795 const u16 *REG_TEMP_SEL;
796 const u16 *REG_WEIGHT_TEMP_SEL;
797 const u16 *REG_WEIGHT_TEMP[3]; /* 0=base, 1=tolerance, 2=step */
799 const u16 *REG_TEMP_OFFSET;
801 const u16 *REG_ALARM;
804 unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
805 unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
807 struct mutex update_lock;
808 bool valid; /* true if following fields are valid */
809 unsigned long last_updated; /* In jiffies */
811 /* Register values */
812 u8 bank; /* current register bank */
813 u8 in_num; /* number of in inputs we have */
814 u8 in[15][3]; /* [0]=in, [1]=in_max, [2]=in_min */
815 unsigned int rpm[NUM_FAN];
816 u16 fan_min[NUM_FAN];
817 u8 fan_pulses[NUM_FAN];
820 u8 has_fan; /* some fan inputs can be disabled */
821 u8 has_fan_min; /* some fans don't have min register */
824 u8 num_temp_alarms; /* 2, 3, or 6 */
825 u8 num_temp_beeps; /* 2, 3, or 6 */
826 u8 temp_fixed_num; /* 3 or 6 */
827 u8 temp_type[NUM_TEMP_FIXED];
828 s8 temp_offset[NUM_TEMP_FIXED];
829 s16 temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
830 * 3=temp_crit, 4=temp_lcrit */
834 u8 pwm_num; /* number of pwm */
835 u8 pwm_mode[NUM_FAN]; /* 1->DC variable voltage,
836 * 0->PWM variable duty cycle
838 enum pwm_enable pwm_enable[NUM_FAN];
841 * 2->thermal cruise mode (also called SmartFan I)
842 * 3->fan speed cruise mode
844 * 5->enhanced variable thermal cruise (SmartFan IV)
846 u8 pwm[7][NUM_FAN]; /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
847 * [3]=pwm_max, [4]=pwm_step,
848 * [5]=weight_duty_step, [6]=weight_duty_base
851 u8 target_temp[NUM_FAN];
853 u32 target_speed[NUM_FAN];
854 u32 target_speed_tolerance[NUM_FAN];
855 u8 speed_tolerance_limit;
857 u8 temp_tolerance[2][NUM_FAN];
860 u8 fan_time[3][NUM_FAN]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
862 /* Automatic fan speed control registers */
864 u8 auto_pwm[NUM_FAN][7];
865 u8 auto_temp[NUM_FAN][7];
866 u8 pwm_temp_sel[NUM_FAN];
867 u8 pwm_weight_temp_sel[NUM_FAN];
868 u8 weight_temp[3][NUM_FAN]; /* 0->temp_step, 1->temp_step_tol,
881 /* Remember extra register values over suspend/resume */
888 struct nct6775_sio_data {
893 struct sensor_device_template {
894 struct device_attribute dev_attr;
902 bool s2; /* true if both index and nr are used */
905 struct sensor_device_attr_u {
907 struct sensor_device_attribute a1;
908 struct sensor_device_attribute_2 a2;
913 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) { \
914 .attr = {.name = _template, .mode = _mode }, \
919 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \
920 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
924 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \
926 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
927 .u.s.index = _index, \
931 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
932 static struct sensor_device_template sensor_dev_template_##_name \
933 = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, \
936 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store, \
938 static struct sensor_device_template sensor_dev_template_##_name \
939 = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \
942 struct sensor_template_group {
943 struct sensor_device_template **templates;
944 umode_t (*is_visible)(struct kobject *, struct attribute *, int);
948 static struct attribute_group *
949 nct6775_create_attr_group(struct device *dev, struct sensor_template_group *tg,
952 struct attribute_group *group;
953 struct sensor_device_attr_u *su;
954 struct sensor_device_attribute *a;
955 struct sensor_device_attribute_2 *a2;
956 struct attribute **attrs;
957 struct sensor_device_template **t;
961 return ERR_PTR(-EINVAL);
964 for (count = 0; *t; t++, count++)
968 return ERR_PTR(-EINVAL);
970 group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
972 return ERR_PTR(-ENOMEM);
974 attrs = devm_kzalloc(dev, sizeof(*attrs) * (repeat * count + 1),
977 return ERR_PTR(-ENOMEM);
979 su = devm_kzalloc(dev, sizeof(*su) * repeat * count,
982 return ERR_PTR(-ENOMEM);
984 group->attrs = attrs;
985 group->is_visible = tg->is_visible;
987 for (i = 0; i < repeat; i++) {
990 snprintf(su->name, sizeof(su->name),
991 (*t)->dev_attr.attr.name, tg->base + i);
994 a2->dev_attr.attr.name = su->name;
995 a2->nr = (*t)->u.s.nr + i;
996 a2->index = (*t)->u.s.index;
997 a2->dev_attr.attr.mode =
998 (*t)->dev_attr.attr.mode;
999 a2->dev_attr.show = (*t)->dev_attr.show;
1000 a2->dev_attr.store = (*t)->dev_attr.store;
1001 *attrs = &a2->dev_attr.attr;
1004 a->dev_attr.attr.name = su->name;
1005 a->index = (*t)->u.index + i;
1006 a->dev_attr.attr.mode =
1007 (*t)->dev_attr.attr.mode;
1008 a->dev_attr.show = (*t)->dev_attr.show;
1009 a->dev_attr.store = (*t)->dev_attr.store;
1010 *attrs = &a->dev_attr.attr;
1021 static bool is_word_sized(struct nct6775_data *data, u16 reg)
1023 switch (data->kind) {
1025 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1026 reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
1027 reg == 0x111 || reg == 0x121 || reg == 0x131;
1029 return (((reg & 0xff00) == 0x100 ||
1030 (reg & 0xff00) == 0x200) &&
1031 ((reg & 0x00ff) == 0x50 ||
1032 (reg & 0x00ff) == 0x53 ||
1033 (reg & 0x00ff) == 0x55)) ||
1034 (reg & 0xfff0) == 0x630 ||
1035 reg == 0x640 || reg == 0x642 ||
1037 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1038 reg == 0x73 || reg == 0x75 || reg == 0x77;
1040 return (((reg & 0xff00) == 0x100 ||
1041 (reg & 0xff00) == 0x200) &&
1042 ((reg & 0x00ff) == 0x50 ||
1043 (reg & 0x00ff) == 0x53 ||
1044 (reg & 0x00ff) == 0x55)) ||
1045 (reg & 0xfff0) == 0x630 ||
1047 reg == 0x640 || reg == 0x642 ||
1048 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1049 reg == 0x73 || reg == 0x75 || reg == 0x77;
1052 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
1053 ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x0b) ||
1055 reg == 0x63a || reg == 0x63c || reg == 0x63e ||
1056 reg == 0x640 || reg == 0x642 ||
1057 reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
1064 * On older chips, only registers 0x50-0x5f are banked.
1065 * On more recent chips, all registers are banked.
1066 * Assume that is the case and set the bank number for each access.
1067 * Cache the bank number so it only needs to be set if it changes.
1069 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
1072 if (data->bank != bank) {
1073 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
1074 outb_p(bank, data->addr + DATA_REG_OFFSET);
1079 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
1081 int res, word_sized = is_word_sized(data, reg);
1083 nct6775_set_bank(data, reg);
1084 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1085 res = inb_p(data->addr + DATA_REG_OFFSET);
1087 outb_p((reg & 0xff) + 1,
1088 data->addr + ADDR_REG_OFFSET);
1089 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
1094 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
1096 int word_sized = is_word_sized(data, reg);
1098 nct6775_set_bank(data, reg);
1099 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1101 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
1102 outb_p((reg & 0xff) + 1,
1103 data->addr + ADDR_REG_OFFSET);
1105 outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
1109 /* We left-align 8-bit temperature values to make the code simpler */
1110 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
1114 res = nct6775_read_value(data, reg);
1115 if (!is_word_sized(data, reg))
1121 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
1123 if (!is_word_sized(data, reg))
1125 return nct6775_write_value(data, reg, value);
1128 /* This function assumes that the caller holds data->update_lock */
1129 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
1135 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
1136 | (data->fan_div[0] & 0x7);
1137 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1140 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
1141 | ((data->fan_div[1] << 4) & 0x70);
1142 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1145 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
1146 | (data->fan_div[2] & 0x7);
1147 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1150 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
1151 | ((data->fan_div[3] << 4) & 0x70);
1152 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1157 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
1159 if (data->kind == nct6775)
1160 nct6775_write_fan_div(data, nr);
1163 static void nct6775_update_fan_div(struct nct6775_data *data)
1167 i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
1168 data->fan_div[0] = i & 0x7;
1169 data->fan_div[1] = (i & 0x70) >> 4;
1170 i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
1171 data->fan_div[2] = i & 0x7;
1172 if (data->has_fan & (1 << 3))
1173 data->fan_div[3] = (i & 0x70) >> 4;
1176 static void nct6775_update_fan_div_common(struct nct6775_data *data)
1178 if (data->kind == nct6775)
1179 nct6775_update_fan_div(data);
1182 static void nct6775_init_fan_div(struct nct6775_data *data)
1186 nct6775_update_fan_div_common(data);
1188 * For all fans, start with highest divider value if the divider
1189 * register is not initialized. This ensures that we get a
1190 * reading from the fan count register, even if it is not optimal.
1191 * We'll compute a better divider later on.
1193 for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
1194 if (!(data->has_fan & (1 << i)))
1196 if (data->fan_div[i] == 0) {
1197 data->fan_div[i] = 7;
1198 nct6775_write_fan_div_common(data, i);
1203 static void nct6775_init_fan_common(struct device *dev,
1204 struct nct6775_data *data)
1209 if (data->has_fan_div)
1210 nct6775_init_fan_div(data);
1213 * If fan_min is not set (0), set it to 0xff to disable it. This
1214 * prevents the unnecessary warning when fanX_min is reported as 0.
1216 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1217 if (data->has_fan_min & (1 << i)) {
1218 reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
1220 nct6775_write_value(data, data->REG_FAN_MIN[i],
1221 data->has_fan_div ? 0xff
1227 static void nct6775_select_fan_div(struct device *dev,
1228 struct nct6775_data *data, int nr, u16 reg)
1230 u8 fan_div = data->fan_div[nr];
1233 if (!data->has_fan_div)
1237 * If we failed to measure the fan speed, or the reported value is not
1238 * in the optimal range, and the clock divider can be modified,
1239 * let's try that for next time.
1241 if (reg == 0x00 && fan_div < 0x07)
1243 else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1246 if (fan_div != data->fan_div[nr]) {
1247 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1248 nr + 1, div_from_reg(data->fan_div[nr]),
1249 div_from_reg(fan_div));
1251 /* Preserve min limit if possible */
1252 if (data->has_fan_min & (1 << nr)) {
1253 fan_min = data->fan_min[nr];
1254 if (fan_div > data->fan_div[nr]) {
1255 if (fan_min != 255 && fan_min > 1)
1258 if (fan_min != 255) {
1264 if (fan_min != data->fan_min[nr]) {
1265 data->fan_min[nr] = fan_min;
1266 nct6775_write_value(data, data->REG_FAN_MIN[nr],
1270 data->fan_div[nr] = fan_div;
1271 nct6775_write_fan_div_common(data, nr);
1275 static void nct6775_update_pwm(struct device *dev)
1277 struct nct6775_data *data = dev_get_drvdata(dev);
1279 int fanmodecfg, reg;
1282 for (i = 0; i < data->pwm_num; i++) {
1283 if (!(data->has_pwm & (1 << i)))
1286 duty_is_dc = data->REG_PWM_MODE[i] &&
1287 (nct6775_read_value(data, data->REG_PWM_MODE[i])
1288 & data->PWM_MODE_MASK[i]);
1289 data->pwm_mode[i] = duty_is_dc;
1291 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
1292 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1293 if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1295 = nct6775_read_value(data,
1296 data->REG_PWM[j][i]);
1300 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1301 (fanmodecfg >> 4) & 7);
1303 if (!data->temp_tolerance[0][i] ||
1304 data->pwm_enable[i] != speed_cruise)
1305 data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1306 if (!data->target_speed_tolerance[i] ||
1307 data->pwm_enable[i] == speed_cruise) {
1308 u8 t = fanmodecfg & 0x0f;
1309 if (data->REG_TOLERANCE_H) {
1310 t |= (nct6775_read_value(data,
1311 data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
1313 data->target_speed_tolerance[i] = t;
1316 data->temp_tolerance[1][i] =
1317 nct6775_read_value(data,
1318 data->REG_CRITICAL_TEMP_TOLERANCE[i]);
1320 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
1321 data->pwm_temp_sel[i] = reg & 0x1f;
1322 /* If fan can stop, report floor as 0 */
1324 data->pwm[2][i] = 0;
1326 if (!data->REG_WEIGHT_TEMP_SEL[i])
1329 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
1330 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1331 /* If weight is disabled, report weight source as 0 */
1332 if (j == 1 && !(reg & 0x80))
1333 data->pwm_weight_temp_sel[i] = 0;
1335 /* Weight temp data */
1336 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
1337 data->weight_temp[j][i]
1338 = nct6775_read_value(data,
1339 data->REG_WEIGHT_TEMP[j][i]);
1344 static void nct6775_update_pwm_limits(struct device *dev)
1346 struct nct6775_data *data = dev_get_drvdata(dev);
1351 for (i = 0; i < data->pwm_num; i++) {
1352 if (!(data->has_pwm & (1 << i)))
1355 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1356 data->fan_time[j][i] =
1357 nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1360 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1361 /* Update only in matching mode or if never updated */
1362 if (!data->target_temp[i] ||
1363 data->pwm_enable[i] == thermal_cruise)
1364 data->target_temp[i] = reg_t & data->target_temp_mask;
1365 if (!data->target_speed[i] ||
1366 data->pwm_enable[i] == speed_cruise) {
1367 if (data->REG_TOLERANCE_H) {
1368 reg_t |= (nct6775_read_value(data,
1369 data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1371 data->target_speed[i] = reg_t;
1374 for (j = 0; j < data->auto_pwm_num; j++) {
1375 data->auto_pwm[i][j] =
1376 nct6775_read_value(data,
1377 NCT6775_AUTO_PWM(data, i, j));
1378 data->auto_temp[i][j] =
1379 nct6775_read_value(data,
1380 NCT6775_AUTO_TEMP(data, i, j));
1383 /* critical auto_pwm temperature data */
1384 data->auto_temp[i][data->auto_pwm_num] =
1385 nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1387 switch (data->kind) {
1389 reg = nct6775_read_value(data,
1390 NCT6775_REG_CRITICAL_ENAB[i]);
1391 data->auto_pwm[i][data->auto_pwm_num] =
1392 (reg & 0x02) ? 0xff : 0x00;
1395 data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1400 reg = nct6775_read_value(data,
1401 data->REG_CRITICAL_PWM_ENABLE[i]);
1402 if (reg & data->CRITICAL_PWM_ENABLE_MASK)
1403 reg = nct6775_read_value(data,
1404 data->REG_CRITICAL_PWM[i]);
1407 data->auto_pwm[i][data->auto_pwm_num] = reg;
1413 static struct nct6775_data *nct6775_update_device(struct device *dev)
1415 struct nct6775_data *data = dev_get_drvdata(dev);
1418 mutex_lock(&data->update_lock);
1420 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1422 /* Fan clock dividers */
1423 nct6775_update_fan_div_common(data);
1425 /* Measured voltages and limits */
1426 for (i = 0; i < data->in_num; i++) {
1427 if (!(data->have_in & (1 << i)))
1430 data->in[i][0] = nct6775_read_value(data,
1432 data->in[i][1] = nct6775_read_value(data,
1433 data->REG_IN_MINMAX[0][i]);
1434 data->in[i][2] = nct6775_read_value(data,
1435 data->REG_IN_MINMAX[1][i]);
1438 /* Measured fan speeds and limits */
1439 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
1442 if (!(data->has_fan & (1 << i)))
1445 reg = nct6775_read_value(data, data->REG_FAN[i]);
1446 data->rpm[i] = data->fan_from_reg(reg,
1449 if (data->has_fan_min & (1 << i))
1450 data->fan_min[i] = nct6775_read_value(data,
1451 data->REG_FAN_MIN[i]);
1452 data->fan_pulses[i] =
1453 (nct6775_read_value(data, data->REG_FAN_PULSES[i])
1454 >> data->FAN_PULSE_SHIFT[i]) & 0x03;
1456 nct6775_select_fan_div(dev, data, i, reg);
1459 nct6775_update_pwm(dev);
1460 nct6775_update_pwm_limits(dev);
1462 /* Measured temperatures and limits */
1463 for (i = 0; i < NUM_TEMP; i++) {
1464 if (!(data->have_temp & (1 << i)))
1466 for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1467 if (data->reg_temp[j][i])
1469 = nct6775_read_temp(data,
1470 data->reg_temp[j][i]);
1472 if (i >= NUM_TEMP_FIXED ||
1473 !(data->have_temp_fixed & (1 << i)))
1475 data->temp_offset[i]
1476 = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1480 for (i = 0; i < NUM_REG_ALARM; i++) {
1482 if (!data->REG_ALARM[i])
1484 alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1485 data->alarms |= ((u64)alarm) << (i << 3);
1489 for (i = 0; i < NUM_REG_BEEP; i++) {
1491 if (!data->REG_BEEP[i])
1493 beep = nct6775_read_value(data, data->REG_BEEP[i]);
1494 data->beeps |= ((u64)beep) << (i << 3);
1497 data->last_updated = jiffies;
1501 mutex_unlock(&data->update_lock);
1506 * Sysfs callback functions
1509 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1511 struct nct6775_data *data = nct6775_update_device(dev);
1512 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1514 int index = sattr->index;
1515 return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1519 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1522 struct nct6775_data *data = dev_get_drvdata(dev);
1523 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1525 int index = sattr->index;
1527 int err = kstrtoul(buf, 10, &val);
1530 mutex_lock(&data->update_lock);
1531 data->in[nr][index] = in_to_reg(val, nr);
1532 nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr],
1533 data->in[nr][index]);
1534 mutex_unlock(&data->update_lock);
1539 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1541 struct nct6775_data *data = nct6775_update_device(dev);
1542 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1543 int nr = data->ALARM_BITS[sattr->index];
1544 return sprintf(buf, "%u\n",
1545 (unsigned int)((data->alarms >> nr) & 0x01));
1548 static int find_temp_source(struct nct6775_data *data, int index, int count)
1550 int source = data->temp_src[index];
1553 for (nr = 0; nr < count; nr++) {
1556 src = nct6775_read_value(data,
1557 data->REG_TEMP_SOURCE[nr]) & 0x1f;
1565 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1567 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1568 struct nct6775_data *data = nct6775_update_device(dev);
1569 unsigned int alarm = 0;
1573 * For temperatures, there is no fixed mapping from registers to alarm
1574 * bits. Alarm bits are determined by the temperature source mapping.
1576 nr = find_temp_source(data, sattr->index, data->num_temp_alarms);
1578 int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE];
1579 alarm = (data->alarms >> bit) & 0x01;
1581 return sprintf(buf, "%u\n", alarm);
1585 show_beep(struct device *dev, struct device_attribute *attr, char *buf)
1587 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1588 struct nct6775_data *data = nct6775_update_device(dev);
1589 int nr = data->BEEP_BITS[sattr->index];
1591 return sprintf(buf, "%u\n",
1592 (unsigned int)((data->beeps >> nr) & 0x01));
1596 store_beep(struct device *dev, struct device_attribute *attr, const char *buf,
1599 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1600 struct nct6775_data *data = dev_get_drvdata(dev);
1601 int nr = data->BEEP_BITS[sattr->index];
1602 int regindex = nr >> 3;
1605 int err = kstrtoul(buf, 10, &val);
1611 mutex_lock(&data->update_lock);
1613 data->beeps |= (1ULL << nr);
1615 data->beeps &= ~(1ULL << nr);
1616 nct6775_write_value(data, data->REG_BEEP[regindex],
1617 (data->beeps >> (regindex << 3)) & 0xff);
1618 mutex_unlock(&data->update_lock);
1623 show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf)
1625 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1626 struct nct6775_data *data = nct6775_update_device(dev);
1627 unsigned int beep = 0;
1631 * For temperatures, there is no fixed mapping from registers to beep
1632 * enable bits. Beep enable bits are determined by the temperature
1635 nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1637 int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1638 beep = (data->beeps >> bit) & 0x01;
1640 return sprintf(buf, "%u\n", beep);
1644 store_temp_beep(struct device *dev, struct device_attribute *attr,
1645 const char *buf, size_t count)
1647 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1648 struct nct6775_data *data = dev_get_drvdata(dev);
1649 int nr, bit, regindex;
1652 int err = kstrtoul(buf, 10, &val);
1658 nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1662 bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1663 regindex = bit >> 3;
1665 mutex_lock(&data->update_lock);
1667 data->beeps |= (1ULL << bit);
1669 data->beeps &= ~(1ULL << bit);
1670 nct6775_write_value(data, data->REG_BEEP[regindex],
1671 (data->beeps >> (regindex << 3)) & 0xff);
1672 mutex_unlock(&data->update_lock);
1677 static umode_t nct6775_in_is_visible(struct kobject *kobj,
1678 struct attribute *attr, int index)
1680 struct device *dev = container_of(kobj, struct device, kobj);
1681 struct nct6775_data *data = dev_get_drvdata(dev);
1682 int in = index / 5; /* voltage index */
1684 if (!(data->have_in & (1 << in)))
1690 SENSOR_TEMPLATE_2(in_input, "in%d_input", S_IRUGO, show_in_reg, NULL, 0, 0);
1691 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", S_IRUGO, show_alarm, NULL, 0);
1692 SENSOR_TEMPLATE(in_beep, "in%d_beep", S_IWUSR | S_IRUGO, show_beep, store_beep,
1694 SENSOR_TEMPLATE_2(in_min, "in%d_min", S_IWUSR | S_IRUGO, show_in_reg,
1695 store_in_reg, 0, 1);
1696 SENSOR_TEMPLATE_2(in_max, "in%d_max", S_IWUSR | S_IRUGO, show_in_reg,
1697 store_in_reg, 0, 2);
1700 * nct6775_in_is_visible uses the index into the following array
1701 * to determine if attributes should be created or not.
1702 * Any change in order or content must be matched.
1704 static struct sensor_device_template *nct6775_attributes_in_template[] = {
1705 &sensor_dev_template_in_input,
1706 &sensor_dev_template_in_alarm,
1707 &sensor_dev_template_in_beep,
1708 &sensor_dev_template_in_min,
1709 &sensor_dev_template_in_max,
1713 static struct sensor_template_group nct6775_in_template_group = {
1714 .templates = nct6775_attributes_in_template,
1715 .is_visible = nct6775_in_is_visible,
1719 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1721 struct nct6775_data *data = nct6775_update_device(dev);
1722 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1723 int nr = sattr->index;
1724 return sprintf(buf, "%d\n", data->rpm[nr]);
1728 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1730 struct nct6775_data *data = nct6775_update_device(dev);
1731 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1732 int nr = sattr->index;
1733 return sprintf(buf, "%d\n",
1734 data->fan_from_reg_min(data->fan_min[nr],
1735 data->fan_div[nr]));
1739 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1741 struct nct6775_data *data = nct6775_update_device(dev);
1742 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1743 int nr = sattr->index;
1744 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1748 store_fan_min(struct device *dev, struct device_attribute *attr,
1749 const char *buf, size_t count)
1751 struct nct6775_data *data = dev_get_drvdata(dev);
1752 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1753 int nr = sattr->index;
1759 err = kstrtoul(buf, 10, &val);
1763 mutex_lock(&data->update_lock);
1764 if (!data->has_fan_div) {
1765 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1771 val = 1350000U / val;
1772 val = (val & 0x1f) | ((val << 3) & 0xff00);
1774 data->fan_min[nr] = val;
1775 goto write_min; /* Leave fan divider alone */
1778 /* No min limit, alarm disabled */
1779 data->fan_min[nr] = 255;
1780 new_div = data->fan_div[nr]; /* No change */
1781 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1784 reg = 1350000U / val;
1785 if (reg >= 128 * 255) {
1787 * Speed below this value cannot possibly be represented,
1788 * even with the highest divider (128)
1790 data->fan_min[nr] = 254;
1791 new_div = 7; /* 128 == (1 << 7) */
1793 "fan%u low limit %lu below minimum %u, set to minimum\n",
1794 nr + 1, val, data->fan_from_reg_min(254, 7));
1797 * Speed above this value cannot possibly be represented,
1798 * even with the lowest divider (1)
1800 data->fan_min[nr] = 1;
1801 new_div = 0; /* 1 == (1 << 0) */
1803 "fan%u low limit %lu above maximum %u, set to maximum\n",
1804 nr + 1, val, data->fan_from_reg_min(1, 0));
1807 * Automatically pick the best divider, i.e. the one such
1808 * that the min limit will correspond to a register value
1809 * in the 96..192 range
1812 while (reg > 192 && new_div < 7) {
1816 data->fan_min[nr] = reg;
1821 * Write both the fan clock divider (if it changed) and the new
1822 * fan min (unconditionally)
1824 if (new_div != data->fan_div[nr]) {
1825 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1826 nr + 1, div_from_reg(data->fan_div[nr]),
1827 div_from_reg(new_div));
1828 data->fan_div[nr] = new_div;
1829 nct6775_write_fan_div_common(data, nr);
1830 /* Give the chip time to sample a new speed value */
1831 data->last_updated = jiffies;
1835 nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1836 mutex_unlock(&data->update_lock);
1842 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
1844 struct nct6775_data *data = nct6775_update_device(dev);
1845 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1846 int p = data->fan_pulses[sattr->index];
1848 return sprintf(buf, "%d\n", p ? : 4);
1852 store_fan_pulses(struct device *dev, struct device_attribute *attr,
1853 const char *buf, size_t count)
1855 struct nct6775_data *data = dev_get_drvdata(dev);
1856 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1857 int nr = sattr->index;
1862 err = kstrtoul(buf, 10, &val);
1869 mutex_lock(&data->update_lock);
1870 data->fan_pulses[nr] = val & 3;
1871 reg = nct6775_read_value(data, data->REG_FAN_PULSES[nr]);
1872 reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
1873 reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
1874 nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
1875 mutex_unlock(&data->update_lock);
1880 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
1881 struct attribute *attr, int index)
1883 struct device *dev = container_of(kobj, struct device, kobj);
1884 struct nct6775_data *data = dev_get_drvdata(dev);
1885 int fan = index / 6; /* fan index */
1886 int nr = index % 6; /* attribute index */
1888 if (!(data->has_fan & (1 << fan)))
1891 if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1)
1893 if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1)
1895 if (nr == 4 && !(data->has_fan_min & (1 << fan)))
1897 if (nr == 5 && data->kind != nct6775)
1903 SENSOR_TEMPLATE(fan_input, "fan%d_input", S_IRUGO, show_fan, NULL, 0);
1904 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", S_IRUGO, show_alarm, NULL,
1906 SENSOR_TEMPLATE(fan_beep, "fan%d_beep", S_IWUSR | S_IRUGO, show_beep,
1907 store_beep, FAN_ALARM_BASE);
1908 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", S_IWUSR | S_IRUGO, show_fan_pulses,
1909 store_fan_pulses, 0);
1910 SENSOR_TEMPLATE(fan_min, "fan%d_min", S_IWUSR | S_IRUGO, show_fan_min,
1912 SENSOR_TEMPLATE(fan_div, "fan%d_div", S_IRUGO, show_fan_div, NULL, 0);
1915 * nct6775_fan_is_visible uses the index into the following array
1916 * to determine if attributes should be created or not.
1917 * Any change in order or content must be matched.
1919 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
1920 &sensor_dev_template_fan_input,
1921 &sensor_dev_template_fan_alarm, /* 1 */
1922 &sensor_dev_template_fan_beep, /* 2 */
1923 &sensor_dev_template_fan_pulses,
1924 &sensor_dev_template_fan_min, /* 4 */
1925 &sensor_dev_template_fan_div, /* 5 */
1929 static struct sensor_template_group nct6775_fan_template_group = {
1930 .templates = nct6775_attributes_fan_template,
1931 .is_visible = nct6775_fan_is_visible,
1936 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1938 struct nct6775_data *data = nct6775_update_device(dev);
1939 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1940 int nr = sattr->index;
1941 return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1945 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1947 struct nct6775_data *data = nct6775_update_device(dev);
1948 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1950 int index = sattr->index;
1952 return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
1956 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
1959 struct nct6775_data *data = dev_get_drvdata(dev);
1960 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1962 int index = sattr->index;
1966 err = kstrtol(buf, 10, &val);
1970 mutex_lock(&data->update_lock);
1971 data->temp[index][nr] = LM75_TEMP_TO_REG(val);
1972 nct6775_write_temp(data, data->reg_temp[index][nr],
1973 data->temp[index][nr]);
1974 mutex_unlock(&data->update_lock);
1979 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
1981 struct nct6775_data *data = nct6775_update_device(dev);
1982 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1984 return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
1988 store_temp_offset(struct device *dev, struct device_attribute *attr,
1989 const char *buf, size_t count)
1991 struct nct6775_data *data = dev_get_drvdata(dev);
1992 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1993 int nr = sattr->index;
1997 err = kstrtol(buf, 10, &val);
2001 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
2003 mutex_lock(&data->update_lock);
2004 data->temp_offset[nr] = val;
2005 nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
2006 mutex_unlock(&data->update_lock);
2012 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
2014 struct nct6775_data *data = nct6775_update_device(dev);
2015 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2016 int nr = sattr->index;
2017 return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
2021 store_temp_type(struct device *dev, struct device_attribute *attr,
2022 const char *buf, size_t count)
2024 struct nct6775_data *data = nct6775_update_device(dev);
2025 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2026 int nr = sattr->index;
2029 u8 vbat, diode, vbit, dbit;
2031 err = kstrtoul(buf, 10, &val);
2035 if (val != 1 && val != 3 && val != 4)
2038 mutex_lock(&data->update_lock);
2040 data->temp_type[nr] = val;
2042 dbit = data->DIODE_MASK << nr;
2043 vbat = nct6775_read_value(data, data->REG_VBAT) & ~vbit;
2044 diode = nct6775_read_value(data, data->REG_DIODE) & ~dbit;
2046 case 1: /* CPU diode (diode, current mode) */
2050 case 3: /* diode, voltage mode */
2053 case 4: /* thermistor */
2056 nct6775_write_value(data, data->REG_VBAT, vbat);
2057 nct6775_write_value(data, data->REG_DIODE, diode);
2059 mutex_unlock(&data->update_lock);
2063 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
2064 struct attribute *attr, int index)
2066 struct device *dev = container_of(kobj, struct device, kobj);
2067 struct nct6775_data *data = dev_get_drvdata(dev);
2068 int temp = index / 10; /* temp index */
2069 int nr = index % 10; /* attribute index */
2071 if (!(data->have_temp & (1 << temp)))
2074 if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0)
2075 return 0; /* alarm */
2077 if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0)
2078 return 0; /* beep */
2080 if (nr == 4 && !data->reg_temp[1][temp]) /* max */
2083 if (nr == 5 && !data->reg_temp[2][temp]) /* max_hyst */
2086 if (nr == 6 && !data->reg_temp[3][temp]) /* crit */
2089 if (nr == 7 && !data->reg_temp[4][temp]) /* lcrit */
2092 /* offset and type only apply to fixed sensors */
2093 if (nr > 7 && !(data->have_temp_fixed & (1 << temp)))
2099 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", S_IRUGO, show_temp, NULL, 0, 0);
2100 SENSOR_TEMPLATE(temp_label, "temp%d_label", S_IRUGO, show_temp_label, NULL, 0);
2101 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", S_IRUGO | S_IWUSR, show_temp,
2103 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", S_IRUGO | S_IWUSR,
2104 show_temp, store_temp, 0, 2);
2105 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", S_IRUGO | S_IWUSR, show_temp,
2107 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", S_IRUGO | S_IWUSR, show_temp,
2109 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", S_IRUGO | S_IWUSR,
2110 show_temp_offset, store_temp_offset, 0);
2111 SENSOR_TEMPLATE(temp_type, "temp%d_type", S_IRUGO | S_IWUSR, show_temp_type,
2112 store_temp_type, 0);
2113 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", S_IRUGO, show_temp_alarm, NULL, 0);
2114 SENSOR_TEMPLATE(temp_beep, "temp%d_beep", S_IRUGO | S_IWUSR, show_temp_beep,
2115 store_temp_beep, 0);
2118 * nct6775_temp_is_visible uses the index into the following array
2119 * to determine if attributes should be created or not.
2120 * Any change in order or content must be matched.
2122 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
2123 &sensor_dev_template_temp_input,
2124 &sensor_dev_template_temp_label,
2125 &sensor_dev_template_temp_alarm, /* 2 */
2126 &sensor_dev_template_temp_beep, /* 3 */
2127 &sensor_dev_template_temp_max, /* 4 */
2128 &sensor_dev_template_temp_max_hyst, /* 5 */
2129 &sensor_dev_template_temp_crit, /* 6 */
2130 &sensor_dev_template_temp_lcrit, /* 7 */
2131 &sensor_dev_template_temp_offset, /* 8 */
2132 &sensor_dev_template_temp_type, /* 9 */
2136 static struct sensor_template_group nct6775_temp_template_group = {
2137 .templates = nct6775_attributes_temp_template,
2138 .is_visible = nct6775_temp_is_visible,
2143 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
2145 struct nct6775_data *data = nct6775_update_device(dev);
2146 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2148 return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
2152 store_pwm_mode(struct device *dev, struct device_attribute *attr,
2153 const char *buf, size_t count)
2155 struct nct6775_data *data = dev_get_drvdata(dev);
2156 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2157 int nr = sattr->index;
2162 err = kstrtoul(buf, 10, &val);
2169 /* Setting DC mode is not supported for all chips/channels */
2170 if (data->REG_PWM_MODE[nr] == 0) {
2176 mutex_lock(&data->update_lock);
2177 data->pwm_mode[nr] = val;
2178 reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
2179 reg &= ~data->PWM_MODE_MASK[nr];
2181 reg |= data->PWM_MODE_MASK[nr];
2182 nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
2183 mutex_unlock(&data->update_lock);
2188 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2190 struct nct6775_data *data = nct6775_update_device(dev);
2191 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2193 int index = sattr->index;
2197 * For automatic fan control modes, show current pwm readings.
2198 * Otherwise, show the configured value.
2200 if (index == 0 && data->pwm_enable[nr] > manual)
2201 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
2203 pwm = data->pwm[index][nr];
2205 return sprintf(buf, "%d\n", pwm);
2209 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
2212 struct nct6775_data *data = dev_get_drvdata(dev);
2213 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2215 int index = sattr->index;
2217 int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
2219 = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
2223 err = kstrtoul(buf, 10, &val);
2226 val = clamp_val(val, minval[index], maxval[index]);
2228 mutex_lock(&data->update_lock);
2229 data->pwm[index][nr] = val;
2230 nct6775_write_value(data, data->REG_PWM[index][nr], val);
2231 if (index == 2) { /* floor: disable if val == 0 */
2232 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2236 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2238 mutex_unlock(&data->update_lock);
2242 /* Returns 0 if OK, -EINVAL otherwise */
2243 static int check_trip_points(struct nct6775_data *data, int nr)
2247 for (i = 0; i < data->auto_pwm_num - 1; i++) {
2248 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
2251 for (i = 0; i < data->auto_pwm_num - 1; i++) {
2252 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
2255 /* validate critical temperature and pwm if enabled (pwm > 0) */
2256 if (data->auto_pwm[nr][data->auto_pwm_num]) {
2257 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2258 data->auto_temp[nr][data->auto_pwm_num] ||
2259 data->auto_pwm[nr][data->auto_pwm_num - 1] >
2260 data->auto_pwm[nr][data->auto_pwm_num])
2266 static void pwm_update_registers(struct nct6775_data *data, int nr)
2270 switch (data->pwm_enable[nr]) {
2275 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2276 reg = (reg & ~data->tolerance_mask) |
2277 (data->target_speed_tolerance[nr] & data->tolerance_mask);
2278 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2279 nct6775_write_value(data, data->REG_TARGET[nr],
2280 data->target_speed[nr] & 0xff);
2281 if (data->REG_TOLERANCE_H) {
2282 reg = (data->target_speed[nr] >> 8) & 0x0f;
2283 reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2284 nct6775_write_value(data,
2285 data->REG_TOLERANCE_H[nr],
2289 case thermal_cruise:
2290 nct6775_write_value(data, data->REG_TARGET[nr],
2291 data->target_temp[nr]);
2294 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2295 reg = (reg & ~data->tolerance_mask) |
2296 data->temp_tolerance[0][nr];
2297 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2303 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2305 struct nct6775_data *data = nct6775_update_device(dev);
2306 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2308 return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2312 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2313 const char *buf, size_t count)
2315 struct nct6775_data *data = dev_get_drvdata(dev);
2316 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2317 int nr = sattr->index;
2322 err = kstrtoul(buf, 10, &val);
2329 if (val == sf3 && data->kind != nct6775)
2332 if (val == sf4 && check_trip_points(data, nr)) {
2333 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2334 dev_err(dev, "Adjust trip points and try again\n");
2338 mutex_lock(&data->update_lock);
2339 data->pwm_enable[nr] = val;
2342 * turn off pwm control: select manual mode, set pwm to maximum
2344 data->pwm[0][nr] = 255;
2345 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2347 pwm_update_registers(data, nr);
2348 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2350 reg |= pwm_enable_to_reg(val) << 4;
2351 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2352 mutex_unlock(&data->update_lock);
2357 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2361 for (i = 0; i < NUM_TEMP; i++) {
2362 if (!(data->have_temp & (1 << i)))
2364 if (src == data->temp_src[i]) {
2370 return sprintf(buf, "%d\n", sel);
2374 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2376 struct nct6775_data *data = nct6775_update_device(dev);
2377 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2378 int index = sattr->index;
2380 return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2384 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2385 const char *buf, size_t count)
2387 struct nct6775_data *data = nct6775_update_device(dev);
2388 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2389 int nr = sattr->index;
2393 err = kstrtoul(buf, 10, &val);
2396 if (val == 0 || val > NUM_TEMP)
2398 if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
2401 mutex_lock(&data->update_lock);
2402 src = data->temp_src[val - 1];
2403 data->pwm_temp_sel[nr] = src;
2404 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2407 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2408 mutex_unlock(&data->update_lock);
2414 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2417 struct nct6775_data *data = nct6775_update_device(dev);
2418 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2419 int index = sattr->index;
2421 return show_pwm_temp_sel_common(data, buf,
2422 data->pwm_weight_temp_sel[index]);
2426 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2427 const char *buf, size_t count)
2429 struct nct6775_data *data = nct6775_update_device(dev);
2430 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2431 int nr = sattr->index;
2435 err = kstrtoul(buf, 10, &val);
2440 if (val && (!(data->have_temp & (1 << (val - 1))) ||
2441 !data->temp_src[val - 1]))
2444 mutex_lock(&data->update_lock);
2446 src = data->temp_src[val - 1];
2447 data->pwm_weight_temp_sel[nr] = src;
2448 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2450 reg |= (src | 0x80);
2451 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2453 data->pwm_weight_temp_sel[nr] = 0;
2454 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2456 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2458 mutex_unlock(&data->update_lock);
2464 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2466 struct nct6775_data *data = nct6775_update_device(dev);
2467 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2469 return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2473 store_target_temp(struct device *dev, struct device_attribute *attr,
2474 const char *buf, size_t count)
2476 struct nct6775_data *data = dev_get_drvdata(dev);
2477 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2478 int nr = sattr->index;
2482 err = kstrtoul(buf, 10, &val);
2486 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2487 data->target_temp_mask);
2489 mutex_lock(&data->update_lock);
2490 data->target_temp[nr] = val;
2491 pwm_update_registers(data, nr);
2492 mutex_unlock(&data->update_lock);
2497 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2499 struct nct6775_data *data = nct6775_update_device(dev);
2500 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2501 int nr = sattr->index;
2503 return sprintf(buf, "%d\n",
2504 fan_from_reg16(data->target_speed[nr],
2505 data->fan_div[nr]));
2509 store_target_speed(struct device *dev, struct device_attribute *attr,
2510 const char *buf, size_t count)
2512 struct nct6775_data *data = dev_get_drvdata(dev);
2513 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2514 int nr = sattr->index;
2519 err = kstrtoul(buf, 10, &val);
2523 val = clamp_val(val, 0, 1350000U);
2524 speed = fan_to_reg(val, data->fan_div[nr]);
2526 mutex_lock(&data->update_lock);
2527 data->target_speed[nr] = speed;
2528 pwm_update_registers(data, nr);
2529 mutex_unlock(&data->update_lock);
2534 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2537 struct nct6775_data *data = nct6775_update_device(dev);
2538 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2540 int index = sattr->index;
2542 return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2546 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2547 const char *buf, size_t count)
2549 struct nct6775_data *data = dev_get_drvdata(dev);
2550 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2552 int index = sattr->index;
2556 err = kstrtoul(buf, 10, &val);
2560 /* Limit tolerance as needed */
2561 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2563 mutex_lock(&data->update_lock);
2564 data->temp_tolerance[index][nr] = val;
2566 pwm_update_registers(data, nr);
2568 nct6775_write_value(data,
2569 data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2571 mutex_unlock(&data->update_lock);
2576 * Fan speed tolerance is a tricky beast, since the associated register is
2577 * a tick counter, but the value is reported and configured as rpm.
2578 * Compute resulting low and high rpm values and report the difference.
2581 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2584 struct nct6775_data *data = nct6775_update_device(dev);
2585 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2586 int nr = sattr->index;
2587 int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2588 int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2598 tolerance = (fan_from_reg16(low, data->fan_div[nr])
2599 - fan_from_reg16(high, data->fan_div[nr])) / 2;
2601 return sprintf(buf, "%d\n", tolerance);
2605 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2606 const char *buf, size_t count)
2608 struct nct6775_data *data = dev_get_drvdata(dev);
2609 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2610 int nr = sattr->index;
2615 err = kstrtoul(buf, 10, &val);
2619 high = fan_from_reg16(data->target_speed[nr],
2620 data->fan_div[nr]) + val;
2621 low = fan_from_reg16(data->target_speed[nr],
2622 data->fan_div[nr]) - val;
2628 val = (fan_to_reg(low, data->fan_div[nr]) -
2629 fan_to_reg(high, data->fan_div[nr])) / 2;
2631 /* Limit tolerance as needed */
2632 val = clamp_val(val, 0, data->speed_tolerance_limit);
2634 mutex_lock(&data->update_lock);
2635 data->target_speed_tolerance[nr] = val;
2636 pwm_update_registers(data, nr);
2637 mutex_unlock(&data->update_lock);
2641 SENSOR_TEMPLATE_2(pwm, "pwm%d", S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2642 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", S_IWUSR | S_IRUGO, show_pwm_mode,
2644 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", S_IWUSR | S_IRUGO, show_pwm_enable,
2645 store_pwm_enable, 0);
2646 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", S_IWUSR | S_IRUGO,
2647 show_pwm_temp_sel, store_pwm_temp_sel, 0);
2648 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", S_IWUSR | S_IRUGO,
2649 show_target_temp, store_target_temp, 0);
2650 SENSOR_TEMPLATE(fan_target, "fan%d_target", S_IWUSR | S_IRUGO,
2651 show_target_speed, store_target_speed, 0);
2652 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", S_IWUSR | S_IRUGO,
2653 show_speed_tolerance, store_speed_tolerance, 0);
2655 /* Smart Fan registers */
2658 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2660 struct nct6775_data *data = nct6775_update_device(dev);
2661 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2663 int index = sattr->index;
2665 return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2669 store_weight_temp(struct device *dev, struct device_attribute *attr,
2670 const char *buf, size_t count)
2672 struct nct6775_data *data = dev_get_drvdata(dev);
2673 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2675 int index = sattr->index;
2679 err = kstrtoul(buf, 10, &val);
2683 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2685 mutex_lock(&data->update_lock);
2686 data->weight_temp[index][nr] = val;
2687 nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2688 mutex_unlock(&data->update_lock);
2692 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", S_IWUSR | S_IRUGO,
2693 show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
2694 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step",
2695 S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 0);
2696 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol",
2697 S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 1);
2698 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base",
2699 S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 2);
2700 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step",
2701 S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 5);
2702 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base",
2703 S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 6);
2706 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2708 struct nct6775_data *data = nct6775_update_device(dev);
2709 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2711 int index = sattr->index;
2713 return sprintf(buf, "%d\n",
2714 step_time_from_reg(data->fan_time[index][nr],
2715 data->pwm_mode[nr]));
2719 store_fan_time(struct device *dev, struct device_attribute *attr,
2720 const char *buf, size_t count)
2722 struct nct6775_data *data = dev_get_drvdata(dev);
2723 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2725 int index = sattr->index;
2729 err = kstrtoul(buf, 10, &val);
2733 val = step_time_to_reg(val, data->pwm_mode[nr]);
2734 mutex_lock(&data->update_lock);
2735 data->fan_time[index][nr] = val;
2736 nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2737 mutex_unlock(&data->update_lock);
2741 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
2743 show_name(struct device *dev, struct device_attribute *attr, char *buf)
2745 struct nct6775_data *data = dev_get_drvdata(dev);
2747 return sprintf(buf, "%s\n", data->name);
2750 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
2754 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2756 struct nct6775_data *data = nct6775_update_device(dev);
2757 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2759 return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2763 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2764 const char *buf, size_t count)
2766 struct nct6775_data *data = dev_get_drvdata(dev);
2767 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2769 int point = sattr->index;
2774 err = kstrtoul(buf, 10, &val);
2780 if (point == data->auto_pwm_num) {
2781 if (data->kind != nct6775 && !val)
2783 if (data->kind != nct6779 && val)
2787 mutex_lock(&data->update_lock);
2788 data->auto_pwm[nr][point] = val;
2789 if (point < data->auto_pwm_num) {
2790 nct6775_write_value(data,
2791 NCT6775_AUTO_PWM(data, nr, point),
2792 data->auto_pwm[nr][point]);
2794 switch (data->kind) {
2796 /* disable if needed (pwm == 0) */
2797 reg = nct6775_read_value(data,
2798 NCT6775_REG_CRITICAL_ENAB[nr]);
2803 nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
2807 break; /* always enabled, nothing to do */
2811 nct6775_write_value(data, data->REG_CRITICAL_PWM[nr],
2813 reg = nct6775_read_value(data,
2814 data->REG_CRITICAL_PWM_ENABLE[nr]);
2816 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
2818 reg |= data->CRITICAL_PWM_ENABLE_MASK;
2819 nct6775_write_value(data,
2820 data->REG_CRITICAL_PWM_ENABLE[nr],
2825 mutex_unlock(&data->update_lock);
2830 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
2832 struct nct6775_data *data = nct6775_update_device(dev);
2833 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2835 int point = sattr->index;
2838 * We don't know for sure if the temperature is signed or unsigned.
2839 * Assume it is unsigned.
2841 return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
2845 store_auto_temp(struct device *dev, struct device_attribute *attr,
2846 const char *buf, size_t count)
2848 struct nct6775_data *data = dev_get_drvdata(dev);
2849 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2851 int point = sattr->index;
2855 err = kstrtoul(buf, 10, &val);
2861 mutex_lock(&data->update_lock);
2862 data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
2863 if (point < data->auto_pwm_num) {
2864 nct6775_write_value(data,
2865 NCT6775_AUTO_TEMP(data, nr, point),
2866 data->auto_temp[nr][point]);
2868 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
2869 data->auto_temp[nr][point]);
2871 mutex_unlock(&data->update_lock);
2875 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
2876 struct attribute *attr, int index)
2878 struct device *dev = container_of(kobj, struct device, kobj);
2879 struct nct6775_data *data = dev_get_drvdata(dev);
2880 int pwm = index / 36; /* pwm index */
2881 int nr = index % 36; /* attribute index */
2883 if (!(data->has_pwm & (1 << pwm)))
2886 if ((nr >= 14 && nr <= 18) || nr == 21) /* weight */
2887 if (!data->REG_WEIGHT_TEMP_SEL[pwm])
2889 if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
2891 if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
2893 if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
2896 if (nr >= 22 && nr <= 35) { /* auto point */
2897 int api = (nr - 22) / 2; /* auto point index */
2899 if (api > data->auto_pwm_num)
2905 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", S_IWUSR | S_IRUGO,
2906 show_fan_time, store_fan_time, 0, 0);
2907 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", S_IWUSR | S_IRUGO,
2908 show_fan_time, store_fan_time, 0, 1);
2909 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", S_IWUSR | S_IRUGO,
2910 show_fan_time, store_fan_time, 0, 2);
2911 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", S_IWUSR | S_IRUGO, show_pwm,
2913 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", S_IWUSR | S_IRUGO, show_pwm,
2915 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", S_IWUSR | S_IRUGO,
2916 show_temp_tolerance, store_temp_tolerance, 0, 0);
2917 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance",
2918 S_IWUSR | S_IRUGO, show_temp_tolerance, store_temp_tolerance,
2921 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2924 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", S_IWUSR | S_IRUGO, show_pwm,
2927 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm",
2928 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 0);
2929 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp",
2930 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 0);
2932 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm",
2933 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 1);
2934 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp",
2935 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 1);
2937 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm",
2938 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 2);
2939 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp",
2940 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 2);
2942 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm",
2943 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 3);
2944 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp",
2945 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 3);
2947 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm",
2948 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 4);
2949 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp",
2950 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 4);
2952 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm",
2953 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 5);
2954 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp",
2955 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 5);
2957 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm",
2958 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 6);
2959 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp",
2960 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 6);
2963 * nct6775_pwm_is_visible uses the index into the following array
2964 * to determine if attributes should be created or not.
2965 * Any change in order or content must be matched.
2967 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
2968 &sensor_dev_template_pwm,
2969 &sensor_dev_template_pwm_mode,
2970 &sensor_dev_template_pwm_enable,
2971 &sensor_dev_template_pwm_temp_sel,
2972 &sensor_dev_template_pwm_temp_tolerance,
2973 &sensor_dev_template_pwm_crit_temp_tolerance,
2974 &sensor_dev_template_pwm_target_temp,
2975 &sensor_dev_template_fan_target,
2976 &sensor_dev_template_fan_tolerance,
2977 &sensor_dev_template_pwm_stop_time,
2978 &sensor_dev_template_pwm_step_up_time,
2979 &sensor_dev_template_pwm_step_down_time,
2980 &sensor_dev_template_pwm_start,
2981 &sensor_dev_template_pwm_floor,
2982 &sensor_dev_template_pwm_weight_temp_sel, /* 14 */
2983 &sensor_dev_template_pwm_weight_temp_step,
2984 &sensor_dev_template_pwm_weight_temp_step_tol,
2985 &sensor_dev_template_pwm_weight_temp_step_base,
2986 &sensor_dev_template_pwm_weight_duty_step, /* 18 */
2987 &sensor_dev_template_pwm_max, /* 19 */
2988 &sensor_dev_template_pwm_step, /* 20 */
2989 &sensor_dev_template_pwm_weight_duty_base, /* 21 */
2990 &sensor_dev_template_pwm_auto_point1_pwm, /* 22 */
2991 &sensor_dev_template_pwm_auto_point1_temp,
2992 &sensor_dev_template_pwm_auto_point2_pwm,
2993 &sensor_dev_template_pwm_auto_point2_temp,
2994 &sensor_dev_template_pwm_auto_point3_pwm,
2995 &sensor_dev_template_pwm_auto_point3_temp,
2996 &sensor_dev_template_pwm_auto_point4_pwm,
2997 &sensor_dev_template_pwm_auto_point4_temp,
2998 &sensor_dev_template_pwm_auto_point5_pwm,
2999 &sensor_dev_template_pwm_auto_point5_temp,
3000 &sensor_dev_template_pwm_auto_point6_pwm,
3001 &sensor_dev_template_pwm_auto_point6_temp,
3002 &sensor_dev_template_pwm_auto_point7_pwm,
3003 &sensor_dev_template_pwm_auto_point7_temp, /* 35 */
3007 static struct sensor_template_group nct6775_pwm_template_group = {
3008 .templates = nct6775_attributes_pwm_template,
3009 .is_visible = nct6775_pwm_is_visible,
3014 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
3016 struct nct6775_data *data = dev_get_drvdata(dev);
3017 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
3020 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
3022 /* Case open detection */
3025 clear_caseopen(struct device *dev, struct device_attribute *attr,
3026 const char *buf, size_t count)
3028 struct nct6775_data *data = dev_get_drvdata(dev);
3029 int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
3034 if (kstrtoul(buf, 10, &val) || val != 0)
3037 mutex_lock(&data->update_lock);
3040 * Use CR registers to clear caseopen status.
3041 * The CR registers are the same for all chips, and not all chips
3042 * support clearing the caseopen status through "regular" registers.
3044 ret = superio_enter(data->sioreg);
3050 superio_select(data->sioreg, NCT6775_LD_ACPI);
3051 reg = superio_inb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
3052 reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3053 superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3054 reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3055 superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3056 superio_exit(data->sioreg);
3058 data->valid = false; /* Force cache refresh */
3060 mutex_unlock(&data->update_lock);
3064 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
3065 clear_caseopen, INTRUSION_ALARM_BASE);
3066 static SENSOR_DEVICE_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
3067 clear_caseopen, INTRUSION_ALARM_BASE + 1);
3068 static SENSOR_DEVICE_ATTR(intrusion0_beep, S_IWUSR | S_IRUGO, show_beep,
3069 store_beep, INTRUSION_ALARM_BASE);
3070 static SENSOR_DEVICE_ATTR(intrusion1_beep, S_IWUSR | S_IRUGO, show_beep,
3071 store_beep, INTRUSION_ALARM_BASE + 1);
3072 static SENSOR_DEVICE_ATTR(beep_enable, S_IWUSR | S_IRUGO, show_beep,
3073 store_beep, BEEP_ENABLE_BASE);
3075 static umode_t nct6775_other_is_visible(struct kobject *kobj,
3076 struct attribute *attr, int index)
3078 struct device *dev = container_of(kobj, struct device, kobj);
3079 struct nct6775_data *data = dev_get_drvdata(dev);
3081 if (index == 0 && !data->have_vid)
3084 if (index == 1 || index == 2) {
3085 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + index - 1] < 0)
3089 if (index == 3 || index == 4) {
3090 if (data->BEEP_BITS[INTRUSION_ALARM_BASE + index - 3] < 0)
3098 * nct6775_other_is_visible uses the index into the following array
3099 * to determine if attributes should be created or not.
3100 * Any change in order or content must be matched.
3102 static struct attribute *nct6775_attributes_other[] = {
3103 &dev_attr_cpu0_vid.attr, /* 0 */
3104 &sensor_dev_attr_intrusion0_alarm.dev_attr.attr, /* 1 */
3105 &sensor_dev_attr_intrusion1_alarm.dev_attr.attr, /* 2 */
3106 &sensor_dev_attr_intrusion0_beep.dev_attr.attr, /* 3 */
3107 &sensor_dev_attr_intrusion1_beep.dev_attr.attr, /* 4 */
3108 &sensor_dev_attr_beep_enable.dev_attr.attr, /* 5 */
3109 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
3110 &dev_attr_name.attr,
3115 static const struct attribute_group nct6775_group_other = {
3116 .attrs = nct6775_attributes_other,
3117 .is_visible = nct6775_other_is_visible,
3120 static inline void nct6775_init_device(struct nct6775_data *data)
3125 /* Start monitoring if needed */
3126 if (data->REG_CONFIG) {
3127 tmp = nct6775_read_value(data, data->REG_CONFIG);
3129 nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
3132 /* Enable temperature sensors if needed */
3133 for (i = 0; i < NUM_TEMP; i++) {
3134 if (!(data->have_temp & (1 << i)))
3136 if (!data->reg_temp_config[i])
3138 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
3140 nct6775_write_value(data, data->reg_temp_config[i],
3144 /* Enable VBAT monitoring if needed */
3145 tmp = nct6775_read_value(data, data->REG_VBAT);
3147 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
3149 diode = nct6775_read_value(data, data->REG_DIODE);
3151 for (i = 0; i < data->temp_fixed_num; i++) {
3152 if (!(data->have_temp_fixed & (1 << i)))
3154 if ((tmp & (data->DIODE_MASK << i))) /* diode */
3156 = 3 - ((diode >> i) & data->DIODE_MASK);
3157 else /* thermistor */
3158 data->temp_type[i] = 4;
3163 nct6775_check_fan_inputs(struct nct6775_data *data)
3165 bool fan3pin, fan4pin, fan4min, fan5pin, fan6pin;
3166 bool pwm3pin, pwm4pin, pwm5pin, pwm6pin;
3167 int sioreg = data->sioreg;
3170 /* fan4 and fan5 share some pins with the GPIO and serial flash */
3171 if (data->kind == nct6775) {
3172 regval = superio_inb(sioreg, 0x2c);
3174 fan3pin = regval & (1 << 6);
3175 pwm3pin = regval & (1 << 7);
3177 /* On NCT6775, fan4 shares pins with the fdc interface */
3178 fan4pin = !(superio_inb(sioreg, 0x2A) & 0x80);
3185 } else if (data->kind == nct6776) {
3186 bool gpok = superio_inb(sioreg, 0x27) & 0x80;
3188 superio_select(sioreg, NCT6775_LD_HWM);
3189 regval = superio_inb(sioreg, SIO_REG_ENABLE);
3194 fan3pin = !(superio_inb(sioreg, 0x24) & 0x40);
3199 fan4pin = superio_inb(sioreg, 0x1C) & 0x01;
3204 fan5pin = superio_inb(sioreg, 0x1C) & 0x02;
3212 } else if (data->kind == nct6106) {
3213 regval = superio_inb(sioreg, 0x24);
3214 fan3pin = !(regval & 0x80);
3215 pwm3pin = regval & 0x08;
3224 } else { /* NCT6779D or NCT6791D */
3225 regval = superio_inb(sioreg, 0x1c);
3227 fan3pin = !(regval & (1 << 5));
3228 fan4pin = !(regval & (1 << 6));
3229 fan5pin = !(regval & (1 << 7));
3231 pwm3pin = !(regval & (1 << 0));
3232 pwm4pin = !(regval & (1 << 1));
3233 pwm5pin = !(regval & (1 << 2));
3237 if (data->kind == nct6791) {
3238 regval = superio_inb(sioreg, 0x2d);
3239 fan6pin = (regval & (1 << 1));
3240 pwm6pin = (regval & (1 << 0));
3241 } else { /* NCT6779D */
3247 /* fan 1 and 2 (0x03) are always present */
3248 data->has_fan = 0x03 | (fan3pin << 2) | (fan4pin << 3) |
3249 (fan5pin << 4) | (fan6pin << 5);
3250 data->has_fan_min = 0x03 | (fan3pin << 2) | (fan4min << 3) |
3252 data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) |
3253 (pwm5pin << 4) | (pwm6pin << 5);
3256 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
3257 int *available, int *mask)
3262 for (i = 0; i < data->pwm_num && *available; i++) {
3267 src = nct6775_read_value(data, regp[i]);
3269 if (!src || (*mask & (1 << src)))
3271 if (src >= data->temp_label_num ||
3272 !strlen(data->temp_label[src]))
3275 index = __ffs(*available);
3276 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3277 *available &= ~(1 << index);
3282 static int nct6775_probe(struct platform_device *pdev)
3284 struct device *dev = &pdev->dev;
3285 struct nct6775_sio_data *sio_data = dev_get_platdata(dev);
3286 struct nct6775_data *data;
3287 struct resource *res;
3289 int src, mask, available;
3290 const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3291 const u16 *reg_temp_mon, *reg_temp_alternate, *reg_temp_crit;
3292 const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL;
3293 int num_reg_temp, num_reg_temp_mon;
3295 struct attribute_group *group;
3296 struct device *hwmon_dev;
3298 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3299 if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3303 data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3308 data->kind = sio_data->kind;
3309 data->sioreg = sio_data->sioreg;
3310 data->addr = res->start;
3311 mutex_init(&data->update_lock);
3312 data->name = nct6775_device_names[data->kind];
3313 data->bank = 0xff; /* Force initial bank selection */
3314 platform_set_drvdata(pdev, data);
3316 switch (data->kind) {
3320 data->auto_pwm_num = 4;
3321 data->temp_fixed_num = 3;
3322 data->num_temp_alarms = 6;
3323 data->num_temp_beeps = 6;
3325 data->fan_from_reg = fan_from_reg13;
3326 data->fan_from_reg_min = fan_from_reg13;
3328 data->temp_label = nct6776_temp_label;
3329 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3331 data->REG_VBAT = NCT6106_REG_VBAT;
3332 data->REG_DIODE = NCT6106_REG_DIODE;
3333 data->DIODE_MASK = NCT6106_DIODE_MASK;
3334 data->REG_VIN = NCT6106_REG_IN;
3335 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3336 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3337 data->REG_TARGET = NCT6106_REG_TARGET;
3338 data->REG_FAN = NCT6106_REG_FAN;
3339 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
3340 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
3341 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
3342 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
3343 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
3344 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
3345 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
3346 data->REG_PWM[0] = NCT6106_REG_PWM;
3347 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
3348 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
3349 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3350 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3351 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3352 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3353 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3354 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
3355 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
3356 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
3357 data->REG_CRITICAL_TEMP_TOLERANCE
3358 = NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
3359 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
3360 data->CRITICAL_PWM_ENABLE_MASK
3361 = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3362 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
3363 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3364 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3365 data->REG_TEMP_SEL = NCT6106_REG_TEMP_SEL;
3366 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3367 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3368 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3369 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3370 data->REG_ALARM = NCT6106_REG_ALARM;
3371 data->ALARM_BITS = NCT6106_ALARM_BITS;
3372 data->REG_BEEP = NCT6106_REG_BEEP;
3373 data->BEEP_BITS = NCT6106_BEEP_BITS;
3375 reg_temp = NCT6106_REG_TEMP;
3376 reg_temp_mon = NCT6106_REG_TEMP_MON;
3377 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3378 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON);
3379 reg_temp_over = NCT6106_REG_TEMP_OVER;
3380 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3381 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3382 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3383 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3384 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3385 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3391 data->auto_pwm_num = 6;
3392 data->has_fan_div = true;
3393 data->temp_fixed_num = 3;
3394 data->num_temp_alarms = 3;
3395 data->num_temp_beeps = 3;
3397 data->ALARM_BITS = NCT6775_ALARM_BITS;
3398 data->BEEP_BITS = NCT6775_BEEP_BITS;
3400 data->fan_from_reg = fan_from_reg16;
3401 data->fan_from_reg_min = fan_from_reg8;
3402 data->target_temp_mask = 0x7f;
3403 data->tolerance_mask = 0x0f;
3404 data->speed_tolerance_limit = 15;
3406 data->temp_label = nct6775_temp_label;
3407 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
3409 data->REG_CONFIG = NCT6775_REG_CONFIG;
3410 data->REG_VBAT = NCT6775_REG_VBAT;
3411 data->REG_DIODE = NCT6775_REG_DIODE;
3412 data->DIODE_MASK = NCT6775_DIODE_MASK;
3413 data->REG_VIN = NCT6775_REG_IN;
3414 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3415 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3416 data->REG_TARGET = NCT6775_REG_TARGET;
3417 data->REG_FAN = NCT6775_REG_FAN;
3418 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3419 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3420 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3421 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3422 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3423 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3424 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3425 data->REG_PWM[0] = NCT6775_REG_PWM;
3426 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3427 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3428 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3429 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3430 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3431 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3432 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3433 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3434 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3435 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3436 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3437 data->REG_CRITICAL_TEMP_TOLERANCE
3438 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3439 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3440 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3441 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3442 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3443 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3444 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3445 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3446 data->REG_ALARM = NCT6775_REG_ALARM;
3447 data->REG_BEEP = NCT6775_REG_BEEP;
3449 reg_temp = NCT6775_REG_TEMP;
3450 reg_temp_mon = NCT6775_REG_TEMP_MON;
3451 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3452 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3453 reg_temp_over = NCT6775_REG_TEMP_OVER;
3454 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3455 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3456 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3457 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3463 data->auto_pwm_num = 4;
3464 data->has_fan_div = false;
3465 data->temp_fixed_num = 3;
3466 data->num_temp_alarms = 3;
3467 data->num_temp_beeps = 6;
3469 data->ALARM_BITS = NCT6776_ALARM_BITS;
3470 data->BEEP_BITS = NCT6776_BEEP_BITS;
3472 data->fan_from_reg = fan_from_reg13;
3473 data->fan_from_reg_min = fan_from_reg13;
3474 data->target_temp_mask = 0xff;
3475 data->tolerance_mask = 0x07;
3476 data->speed_tolerance_limit = 63;
3478 data->temp_label = nct6776_temp_label;
3479 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3481 data->REG_CONFIG = NCT6775_REG_CONFIG;
3482 data->REG_VBAT = NCT6775_REG_VBAT;
3483 data->REG_DIODE = NCT6775_REG_DIODE;
3484 data->DIODE_MASK = NCT6775_DIODE_MASK;
3485 data->REG_VIN = NCT6775_REG_IN;
3486 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3487 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3488 data->REG_TARGET = NCT6775_REG_TARGET;
3489 data->REG_FAN = NCT6775_REG_FAN;
3490 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3491 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3492 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3493 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3494 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3495 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3496 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3497 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3498 data->REG_PWM[0] = NCT6775_REG_PWM;
3499 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3500 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3501 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3502 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3503 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3504 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3505 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3506 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3507 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3508 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3509 data->REG_CRITICAL_TEMP_TOLERANCE
3510 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3511 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3512 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3513 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3514 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3515 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3516 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3517 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3518 data->REG_ALARM = NCT6775_REG_ALARM;
3519 data->REG_BEEP = NCT6776_REG_BEEP;
3521 reg_temp = NCT6775_REG_TEMP;
3522 reg_temp_mon = NCT6775_REG_TEMP_MON;
3523 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3524 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3525 reg_temp_over = NCT6775_REG_TEMP_OVER;
3526 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3527 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3528 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3529 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3535 data->auto_pwm_num = 4;
3536 data->has_fan_div = false;
3537 data->temp_fixed_num = 6;
3538 data->num_temp_alarms = 2;
3539 data->num_temp_beeps = 2;
3541 data->ALARM_BITS = NCT6779_ALARM_BITS;
3542 data->BEEP_BITS = NCT6779_BEEP_BITS;
3544 data->fan_from_reg = fan_from_reg13;
3545 data->fan_from_reg_min = fan_from_reg13;
3546 data->target_temp_mask = 0xff;
3547 data->tolerance_mask = 0x07;
3548 data->speed_tolerance_limit = 63;
3550 data->temp_label = nct6779_temp_label;
3551 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3553 data->REG_CONFIG = NCT6775_REG_CONFIG;
3554 data->REG_VBAT = NCT6775_REG_VBAT;
3555 data->REG_DIODE = NCT6775_REG_DIODE;
3556 data->DIODE_MASK = NCT6775_DIODE_MASK;
3557 data->REG_VIN = NCT6779_REG_IN;
3558 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3559 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3560 data->REG_TARGET = NCT6775_REG_TARGET;
3561 data->REG_FAN = NCT6779_REG_FAN;
3562 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3563 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3564 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3565 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3566 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3567 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3568 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3569 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3570 data->REG_PWM[0] = NCT6775_REG_PWM;
3571 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3572 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3573 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3574 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3575 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3576 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3577 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3578 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3579 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3580 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3581 data->REG_CRITICAL_TEMP_TOLERANCE
3582 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3583 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3584 data->CRITICAL_PWM_ENABLE_MASK
3585 = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3586 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3587 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3588 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3589 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3590 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3591 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3592 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3593 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3594 data->REG_ALARM = NCT6779_REG_ALARM;
3595 data->REG_BEEP = NCT6776_REG_BEEP;
3597 reg_temp = NCT6779_REG_TEMP;
3598 reg_temp_mon = NCT6779_REG_TEMP_MON;
3599 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3600 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3601 reg_temp_over = NCT6779_REG_TEMP_OVER;
3602 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3603 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3604 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3605 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3611 data->auto_pwm_num = 4;
3612 data->has_fan_div = false;
3613 data->temp_fixed_num = 6;
3614 data->num_temp_alarms = 2;
3615 data->num_temp_beeps = 2;
3617 data->ALARM_BITS = NCT6791_ALARM_BITS;
3618 data->BEEP_BITS = NCT6779_BEEP_BITS;
3620 data->fan_from_reg = fan_from_reg13;
3621 data->fan_from_reg_min = fan_from_reg13;
3622 data->target_temp_mask = 0xff;
3623 data->tolerance_mask = 0x07;
3624 data->speed_tolerance_limit = 63;
3626 data->temp_label = nct6779_temp_label;
3627 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3629 data->REG_CONFIG = NCT6775_REG_CONFIG;
3630 data->REG_VBAT = NCT6775_REG_VBAT;
3631 data->REG_DIODE = NCT6775_REG_DIODE;
3632 data->DIODE_MASK = NCT6775_DIODE_MASK;
3633 data->REG_VIN = NCT6779_REG_IN;
3634 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3635 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3636 data->REG_TARGET = NCT6775_REG_TARGET;
3637 data->REG_FAN = NCT6779_REG_FAN;
3638 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3639 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3640 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3641 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3642 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3643 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3644 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3645 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3646 data->REG_PWM[0] = NCT6775_REG_PWM;
3647 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3648 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3649 data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP;
3650 data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE;
3651 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3652 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3653 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3654 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3655 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3656 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3657 data->REG_CRITICAL_TEMP_TOLERANCE
3658 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3659 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3660 data->CRITICAL_PWM_ENABLE_MASK
3661 = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3662 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3663 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3664 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3665 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3666 data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL;
3667 data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP;
3668 data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL;
3669 data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE;
3670 data->REG_ALARM = NCT6791_REG_ALARM;
3671 data->REG_BEEP = NCT6776_REG_BEEP;
3673 reg_temp = NCT6779_REG_TEMP;
3674 reg_temp_mon = NCT6779_REG_TEMP_MON;
3675 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3676 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3677 reg_temp_over = NCT6779_REG_TEMP_OVER;
3678 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3679 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3680 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3681 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3687 data->have_in = (1 << data->in_num) - 1;
3688 data->have_temp = 0;
3691 * On some boards, not all available temperature sources are monitored,
3692 * even though some of the monitoring registers are unused.
3693 * Get list of unused monitoring registers, then detect if any fan
3694 * controls are configured to use unmonitored temperature sources.
3695 * If so, assign the unmonitored temperature sources to available
3696 * monitoring registers.
3700 for (i = 0; i < num_reg_temp; i++) {
3701 if (reg_temp[i] == 0)
3704 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3705 if (!src || (mask & (1 << src)))
3706 available |= 1 << i;
3712 * Now find unmonitored temperature registers and enable monitoring
3713 * if additional monitoring registers are available.
3715 add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
3716 add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
3719 s = NUM_TEMP_FIXED; /* First dynamic temperature attribute */
3720 for (i = 0; i < num_reg_temp; i++) {
3721 if (reg_temp[i] == 0)
3724 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3725 if (!src || (mask & (1 << src)))
3728 if (src >= data->temp_label_num ||
3729 !strlen(data->temp_label[src])) {
3731 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3732 src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
3738 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3739 if (src <= data->temp_fixed_num) {
3740 data->have_temp |= 1 << (src - 1);
3741 data->have_temp_fixed |= 1 << (src - 1);
3742 data->reg_temp[0][src - 1] = reg_temp[i];
3743 data->reg_temp[1][src - 1] = reg_temp_over[i];
3744 data->reg_temp[2][src - 1] = reg_temp_hyst[i];
3745 if (reg_temp_crit_h && reg_temp_crit_h[i])
3746 data->reg_temp[3][src - 1] = reg_temp_crit_h[i];
3747 else if (reg_temp_crit[src - 1])
3748 data->reg_temp[3][src - 1]
3749 = reg_temp_crit[src - 1];
3750 if (reg_temp_crit_l && reg_temp_crit_l[i])
3751 data->reg_temp[4][src - 1] = reg_temp_crit_l[i];
3752 data->reg_temp_config[src - 1] = reg_temp_config[i];
3753 data->temp_src[src - 1] = src;
3760 /* Use dynamic index for other sources */
3761 data->have_temp |= 1 << s;
3762 data->reg_temp[0][s] = reg_temp[i];
3763 data->reg_temp[1][s] = reg_temp_over[i];
3764 data->reg_temp[2][s] = reg_temp_hyst[i];
3765 data->reg_temp_config[s] = reg_temp_config[i];
3766 if (reg_temp_crit_h && reg_temp_crit_h[i])
3767 data->reg_temp[3][s] = reg_temp_crit_h[i];
3768 else if (reg_temp_crit[src - 1])
3769 data->reg_temp[3][s] = reg_temp_crit[src - 1];
3770 if (reg_temp_crit_l && reg_temp_crit_l[i])
3771 data->reg_temp[4][s] = reg_temp_crit_l[i];
3773 data->temp_src[s] = src;
3778 * Repeat with temperatures used for fan control.
3779 * This set of registers does not support limits.
3781 for (i = 0; i < num_reg_temp_mon; i++) {
3782 if (reg_temp_mon[i] == 0)
3785 src = nct6775_read_value(data, data->REG_TEMP_SEL[i]) & 0x1f;
3786 if (!src || (mask & (1 << src)))
3789 if (src >= data->temp_label_num ||
3790 !strlen(data->temp_label[src])) {
3792 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3793 src, i, data->REG_TEMP_SEL[i],
3800 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3801 if (src <= data->temp_fixed_num) {
3802 if (data->have_temp & (1 << (src - 1)))
3804 data->have_temp |= 1 << (src - 1);
3805 data->have_temp_fixed |= 1 << (src - 1);
3806 data->reg_temp[0][src - 1] = reg_temp_mon[i];
3807 data->temp_src[src - 1] = src;
3814 /* Use dynamic index for other sources */
3815 data->have_temp |= 1 << s;
3816 data->reg_temp[0][s] = reg_temp_mon[i];
3817 data->temp_src[s] = src;
3821 #ifdef USE_ALTERNATE
3823 * Go through the list of alternate temp registers and enable
3825 * The temperature is already monitored if the respective bit in <mask>
3828 for (i = 0; i < data->temp_label_num - 1; i++) {
3829 if (!reg_temp_alternate[i])
3831 if (mask & (1 << (i + 1)))
3833 if (i < data->temp_fixed_num) {
3834 if (data->have_temp & (1 << i))
3836 data->have_temp |= 1 << i;
3837 data->have_temp_fixed |= 1 << i;
3838 data->reg_temp[0][i] = reg_temp_alternate[i];
3839 if (i < num_reg_temp) {
3840 data->reg_temp[1][i] = reg_temp_over[i];
3841 data->reg_temp[2][i] = reg_temp_hyst[i];
3843 data->temp_src[i] = i + 1;
3847 if (s >= NUM_TEMP) /* Abort if no more space */
3850 data->have_temp |= 1 << s;
3851 data->reg_temp[0][s] = reg_temp_alternate[i];
3852 data->temp_src[s] = i + 1;
3855 #endif /* USE_ALTERNATE */
3857 /* Initialize the chip */
3858 nct6775_init_device(data);
3860 err = superio_enter(sio_data->sioreg);
3864 cr2a = superio_inb(sio_data->sioreg, 0x2a);
3865 switch (data->kind) {
3867 data->have_vid = (cr2a & 0x40);
3870 data->have_vid = (cr2a & 0x60) == 0x40;
3880 * We can get the VID input values directly at logical device D 0xe3.
3882 if (data->have_vid) {
3883 superio_select(sio_data->sioreg, NCT6775_LD_VID);
3884 data->vid = superio_inb(sio_data->sioreg, 0xe3);
3885 data->vrm = vid_which_vrm();
3891 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3892 tmp = superio_inb(sio_data->sioreg,
3893 NCT6775_REG_CR_FAN_DEBOUNCE);
3894 switch (data->kind) {
3909 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
3911 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
3915 nct6775_check_fan_inputs(data);
3917 superio_exit(sio_data->sioreg);
3919 /* Read fan clock dividers immediately */
3920 nct6775_init_fan_common(dev, data);
3922 /* Register sysfs hooks */
3923 group = nct6775_create_attr_group(dev, &nct6775_pwm_template_group,
3926 return PTR_ERR(group);
3928 data->groups[data->num_attr_groups++] = group;
3930 group = nct6775_create_attr_group(dev, &nct6775_in_template_group,
3931 fls(data->have_in));
3933 return PTR_ERR(group);
3935 data->groups[data->num_attr_groups++] = group;
3937 group = nct6775_create_attr_group(dev, &nct6775_fan_template_group,
3938 fls(data->has_fan));
3940 return PTR_ERR(group);
3942 data->groups[data->num_attr_groups++] = group;
3944 group = nct6775_create_attr_group(dev, &nct6775_temp_template_group,
3945 fls(data->have_temp));
3947 return PTR_ERR(group);
3949 data->groups[data->num_attr_groups++] = group;
3950 data->groups[data->num_attr_groups++] = &nct6775_group_other;
3952 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
3953 err = sysfs_create_groups(&dev->kobj, data->groups);
3956 hwmon_dev = hwmon_device_register(dev);
3957 if (IS_ERR(hwmon_dev)) {
3958 sysfs_remove_groups(&dev->kobj, data->groups);
3959 return PTR_ERR(hwmon_dev);
3961 data->hwmon_dev = hwmon_dev;
3963 hwmon_dev = devm_hwmon_device_register_with_groups(dev, data->name,
3964 data, data->groups);
3966 return PTR_ERR_OR_ZERO(hwmon_dev);
3969 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
3970 static int nct6775_remove(struct platform_device *pdev)
3972 struct nct6775_data *data = platform_get_drvdata(pdev);
3974 hwmon_device_unregister(data->hwmon_dev);
3975 sysfs_remove_groups(&pdev->dev.kobj, data->groups);
3980 static void nct6791_enable_io_mapping(int sioaddr)
3984 val = superio_inb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE);
3986 pr_info("Enabling hardware monitor logical device mappings.\n");
3987 superio_outb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE,
3993 static int nct6775_suspend(struct device *dev)
3995 struct nct6775_data *data = nct6775_update_device(dev);
3997 mutex_lock(&data->update_lock);
3998 data->vbat = nct6775_read_value(data, data->REG_VBAT);
3999 if (data->kind == nct6775) {
4000 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
4001 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
4003 mutex_unlock(&data->update_lock);
4008 static int nct6775_resume(struct device *dev)
4010 struct nct6775_data *data = dev_get_drvdata(dev);
4013 mutex_lock(&data->update_lock);
4014 data->bank = 0xff; /* Force initial bank selection */
4016 if (data->kind == nct6791) {
4017 err = superio_enter(data->sioreg);
4021 nct6791_enable_io_mapping(data->sioreg);
4022 superio_exit(data->sioreg);
4025 /* Restore limits */
4026 for (i = 0; i < data->in_num; i++) {
4027 if (!(data->have_in & (1 << i)))
4030 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
4032 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
4036 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
4037 if (!(data->has_fan_min & (1 << i)))
4040 nct6775_write_value(data, data->REG_FAN_MIN[i],
4044 for (i = 0; i < NUM_TEMP; i++) {
4045 if (!(data->have_temp & (1 << i)))
4048 for (j = 1; j < ARRAY_SIZE(data->reg_temp); j++)
4049 if (data->reg_temp[j][i])
4050 nct6775_write_temp(data, data->reg_temp[j][i],
4054 /* Restore other settings */
4055 nct6775_write_value(data, data->REG_VBAT, data->vbat);
4056 if (data->kind == nct6775) {
4057 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
4058 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
4062 /* Force re-reading all values */
4063 data->valid = false;
4064 mutex_unlock(&data->update_lock);
4069 static const struct dev_pm_ops nct6775_dev_pm_ops = {
4070 .suspend = nct6775_suspend,
4071 .resume = nct6775_resume,
4072 .freeze = nct6775_suspend,
4073 .restore = nct6775_resume,
4076 #define NCT6775_DEV_PM_OPS (&nct6775_dev_pm_ops)
4078 #define NCT6775_DEV_PM_OPS NULL
4079 #endif /* CONFIG_PM */
4081 static struct platform_driver nct6775_driver = {
4083 .owner = THIS_MODULE,
4085 .pm = NCT6775_DEV_PM_OPS,
4087 .probe = nct6775_probe,
4088 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4089 .remove = nct6775_remove,
4093 static const char * const nct6775_sio_names[] __initconst = {
4101 /* nct6775_find() looks for a '627 in the Super-I/O config space */
4102 static int __init nct6775_find(int sioaddr, struct nct6775_sio_data *sio_data)
4108 err = superio_enter(sioaddr);
4115 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
4116 | superio_inb(sioaddr, SIO_REG_DEVID + 1);
4117 switch (val & SIO_ID_MASK) {
4118 case SIO_NCT6106_ID:
4119 sio_data->kind = nct6106;
4121 case SIO_NCT6775_ID:
4122 sio_data->kind = nct6775;
4124 case SIO_NCT6776_ID:
4125 sio_data->kind = nct6776;
4127 case SIO_NCT6779_ID:
4128 sio_data->kind = nct6779;
4130 case SIO_NCT6791_ID:
4131 sio_data->kind = nct6791;
4135 pr_debug("unsupported chip ID: 0x%04x\n", val);
4136 superio_exit(sioaddr);
4140 /* We have a known chip, find the HWM I/O address */
4141 superio_select(sioaddr, NCT6775_LD_HWM);
4142 val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
4143 | superio_inb(sioaddr, SIO_REG_ADDR + 1);
4144 addr = val & IOREGION_ALIGNMENT;
4146 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
4147 superio_exit(sioaddr);
4151 /* Activate logical device if needed */
4152 val = superio_inb(sioaddr, SIO_REG_ENABLE);
4153 if (!(val & 0x01)) {
4154 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
4155 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
4158 if (sio_data->kind == nct6791)
4159 nct6791_enable_io_mapping(sioaddr);
4161 superio_exit(sioaddr);
4162 pr_info("Found %s or compatible chip at %#x:%#x\n",
4163 nct6775_sio_names[sio_data->kind], sioaddr, addr);
4164 sio_data->sioreg = sioaddr;
4170 * when Super-I/O functions move to a separate file, the Super-I/O
4171 * bus will manage the lifetime of the device and this module will only keep
4172 * track of the nct6775 driver. But since we use platform_device_alloc(), we
4173 * must keep track of the device
4175 static struct platform_device *pdev[2];
4177 static int __init sensors_nct6775_init(void)
4182 struct resource res;
4183 struct nct6775_sio_data sio_data;
4184 int sioaddr[2] = { 0x2e, 0x4e };
4186 err = platform_driver_register(&nct6775_driver);
4191 * initialize sio_data->kind and sio_data->sioreg.
4193 * when Super-I/O functions move to a separate file, the Super-I/O
4194 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
4195 * nct6775 hardware monitor, and call probe()
4197 for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4198 address = nct6775_find(sioaddr[i], &sio_data);
4204 pdev[i] = platform_device_alloc(DRVNAME, address);
4207 goto exit_device_put;
4210 err = platform_device_add_data(pdev[i], &sio_data,
4211 sizeof(struct nct6775_sio_data));
4213 goto exit_device_put;
4215 memset(&res, 0, sizeof(res));
4217 res.start = address + IOREGION_OFFSET;
4218 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
4219 res.flags = IORESOURCE_IO;
4221 err = acpi_check_resource_conflict(&res);
4223 platform_device_put(pdev[i]);
4228 err = platform_device_add_resources(pdev[i], &res, 1);
4230 goto exit_device_put;
4232 /* platform_device_add calls probe() */
4233 err = platform_device_add(pdev[i]);
4235 goto exit_device_put;
4239 goto exit_unregister;
4245 for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4247 platform_device_put(pdev[i]);
4250 platform_driver_unregister(&nct6775_driver);
4254 static void __exit sensors_nct6775_exit(void)
4258 for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4260 platform_device_unregister(pdev[i]);
4262 platform_driver_unregister(&nct6775_driver);
4265 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4266 MODULE_DESCRIPTION("NCT6775F/NCT6776F/NCT6779D driver");
4267 MODULE_LICENSE("GPL");
4269 module_init(sensors_nct6775_init);
4270 module_exit(sensors_nct6775_exit);