2 * nct6775 - Driver for the hardware monitoring functionality of
3 * Nuvoton NCT677x Super-I/O chips
5 * Copyright (C) 2012 Guenter Roeck <linux@roeck-us.net>
7 * Derived from w83627ehf driver
8 * Copyright (C) 2005-2012 Jean Delvare <jdelvare@suse.de>
9 * Copyright (C) 2006 Yuan Mu (Winbond),
10 * Rudolf Marek <r.marek@assembler.cz>
11 * David Hubbard <david.c.hubbard@gmail.com>
12 * Daniel J Blueman <daniel.blueman@gmail.com>
13 * Copyright (C) 2010 Sheng-Yuan Huang (Nuvoton) (PS00)
15 * Shamelessly ripped from the w83627hf driver
16 * Copyright (C) 2003 Mark Studebaker
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
33 * Supports the following chips:
35 * Chip #vin #fan #pwm #temp chip IDs man ID
36 * nct6106d 9 3 3 6+3 0xc450 0xc1 0x5ca3
37 * nct6775f 9 4 3 6+3 0xb470 0xc1 0x5ca3
38 * nct6776f 9 5 3 6+3 0xc330 0xc1 0x5ca3
39 * nct6779d 15 5 5 2+6 0xc560 0xc1 0x5ca3
40 * nct6791d 15 6 6 2+6 0xc800 0xc1 0x5ca3
41 * nct6792d 15 6 6 2+6 0xc911 0xc1 0x5ca3
43 * #temp lists the number of monitored temperature sources (first value) plus
44 * the number of directly connectable temperature sensors (second value).
47 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
49 #include <linux/module.h>
50 #include <linux/init.h>
51 #include <linux/slab.h>
52 #include <linux/jiffies.h>
53 #include <linux/platform_device.h>
54 #include <linux/hwmon.h>
55 #include <linux/hwmon-sysfs.h>
56 #include <linux/hwmon-vid.h>
57 #include <linux/err.h>
58 #include <linux/mutex.h>
59 #include <linux/acpi.h>
66 enum kinds { nct6106, nct6775, nct6776, nct6779, nct6791, nct6792 };
68 /* used to set data->name = nct6775_device_names[data->sio_kind] */
69 static const char * const nct6775_device_names[] = {
78 static unsigned short force_id;
79 module_param(force_id, ushort, 0);
80 MODULE_PARM_DESC(force_id, "Override the detected device ID");
82 static unsigned short fan_debounce;
83 module_param(fan_debounce, ushort, 0);
84 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
86 #define DRVNAME "nct6775"
89 * Super-I/O constants and functions
92 #define NCT6775_LD_ACPI 0x0a
93 #define NCT6775_LD_HWM 0x0b
94 #define NCT6775_LD_VID 0x0d
96 #define SIO_REG_LDSEL 0x07 /* Logical device select */
97 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
98 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
99 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
101 #define SIO_NCT6106_ID 0xc450
102 #define SIO_NCT6775_ID 0xb470
103 #define SIO_NCT6776_ID 0xc330
104 #define SIO_NCT6779_ID 0xc560
105 #define SIO_NCT6791_ID 0xc800
106 #define SIO_NCT6792_ID 0xc910
107 #define SIO_ID_MASK 0xFFF0
109 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
112 superio_outb(int ioreg, int reg, int val)
115 outb(val, ioreg + 1);
119 superio_inb(int ioreg, int reg)
122 return inb(ioreg + 1);
126 superio_select(int ioreg, int ld)
128 outb(SIO_REG_LDSEL, ioreg);
133 superio_enter(int ioreg)
136 * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
138 if (!request_muxed_region(ioreg, 2, DRVNAME))
148 superio_exit(int ioreg)
152 outb(0x02, ioreg + 1);
153 release_region(ioreg, 2);
160 #define IOREGION_ALIGNMENT (~7)
161 #define IOREGION_OFFSET 5
162 #define IOREGION_LENGTH 2
163 #define ADDR_REG_OFFSET 0
164 #define DATA_REG_OFFSET 1
166 #define NCT6775_REG_BANK 0x4E
167 #define NCT6775_REG_CONFIG 0x40
170 * Not currently used:
171 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
172 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
173 * REG_MAN_ID is at port 0x4f
174 * REG_CHIP_ID is at port 0x58
177 #define NUM_TEMP 10 /* Max number of temp attribute sets w/ limits*/
178 #define NUM_TEMP_FIXED 6 /* Max number of fixed temp attribute sets */
180 #define NUM_REG_ALARM 7 /* Max number of alarm registers */
181 #define NUM_REG_BEEP 5 /* Max number of beep registers */
185 /* Common and NCT6775 specific data */
187 /* Voltage min/max registers for nr=7..14 are in bank 5 */
189 static const u16 NCT6775_REG_IN_MAX[] = {
190 0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
191 0x55c, 0x55e, 0x560, 0x562 };
192 static const u16 NCT6775_REG_IN_MIN[] = {
193 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
194 0x55d, 0x55f, 0x561, 0x563 };
195 static const u16 NCT6775_REG_IN[] = {
196 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
199 #define NCT6775_REG_VBAT 0x5D
200 #define NCT6775_REG_DIODE 0x5E
201 #define NCT6775_DIODE_MASK 0x02
203 #define NCT6775_REG_FANDIV1 0x506
204 #define NCT6775_REG_FANDIV2 0x507
206 #define NCT6775_REG_CR_FAN_DEBOUNCE 0xf0
208 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
210 /* 0..15 voltages, 16..23 fans, 24..29 temperatures, 30..31 intrusion */
212 static const s8 NCT6775_ALARM_BITS[] = {
213 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
214 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
216 6, 7, 11, -1, -1, /* fan1..fan5 */
217 -1, -1, -1, /* unused */
218 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
219 12, -1 }; /* intrusion0, intrusion1 */
221 #define FAN_ALARM_BASE 16
222 #define TEMP_ALARM_BASE 24
223 #define INTRUSION_ALARM_BASE 30
225 static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e };
228 * 0..14 voltages, 15 global beep enable, 16..23 fans, 24..29 temperatures,
231 static const s8 NCT6775_BEEP_BITS[] = {
232 0, 1, 2, 3, 8, 9, 10, 16, /* in0.. in7 */
233 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
234 21, /* global beep enable */
235 6, 7, 11, 28, -1, /* fan1..fan5 */
236 -1, -1, -1, /* unused */
237 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
238 12, -1 }; /* intrusion0, intrusion1 */
240 #define BEEP_ENABLE_BASE 15
242 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
243 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
245 /* DC or PWM output fan configuration */
246 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
247 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
249 /* Advanced Fan control, some values are common for all fans */
251 static const u16 NCT6775_REG_TARGET[] = {
252 0x101, 0x201, 0x301, 0x801, 0x901, 0xa01 };
253 static const u16 NCT6775_REG_FAN_MODE[] = {
254 0x102, 0x202, 0x302, 0x802, 0x902, 0xa02 };
255 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
256 0x103, 0x203, 0x303, 0x803, 0x903, 0xa03 };
257 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
258 0x104, 0x204, 0x304, 0x804, 0x904, 0xa04 };
259 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
260 0x105, 0x205, 0x305, 0x805, 0x905, 0xa05 };
261 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = {
262 0x106, 0x206, 0x306, 0x806, 0x906, 0xa06 };
263 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
264 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
266 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
267 0x107, 0x207, 0x307, 0x807, 0x907, 0xa07 };
268 static const u16 NCT6775_REG_PWM[] = {
269 0x109, 0x209, 0x309, 0x809, 0x909, 0xa09 };
270 static const u16 NCT6775_REG_PWM_READ[] = {
271 0x01, 0x03, 0x11, 0x13, 0x15, 0xa09 };
273 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
274 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
275 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
276 static const u16 NCT6775_FAN_PULSE_SHIFT[] = { 0, 0, 0, 0, 0, 0 };
278 static const u16 NCT6775_REG_TEMP[] = {
279 0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
281 static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77 };
283 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
284 0, 0x152, 0x252, 0x628, 0x629, 0x62A };
285 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
286 0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
287 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
288 0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
290 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
291 0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
293 static const u16 NCT6775_REG_TEMP_SEL[] = {
294 0x100, 0x200, 0x300, 0x800, 0x900, 0xa00 };
296 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
297 0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 };
298 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
299 0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a };
300 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
301 0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b };
302 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
303 0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c };
304 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
305 0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d };
307 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
309 static const u16 NCT6775_REG_AUTO_TEMP[] = {
310 0x121, 0x221, 0x321, 0x821, 0x921, 0xa21 };
311 static const u16 NCT6775_REG_AUTO_PWM[] = {
312 0x127, 0x227, 0x327, 0x827, 0x927, 0xa27 };
314 #define NCT6775_AUTO_TEMP(data, nr, p) ((data)->REG_AUTO_TEMP[nr] + (p))
315 #define NCT6775_AUTO_PWM(data, nr, p) ((data)->REG_AUTO_PWM[nr] + (p))
317 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
319 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
320 0x135, 0x235, 0x335, 0x835, 0x935, 0xa35 };
321 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
322 0x138, 0x238, 0x338, 0x838, 0x938, 0xa38 };
324 static const char *const nct6775_temp_label[] = {
338 "PCH_CHIP_CPU_MAX_TEMP",
348 static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
349 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
351 static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
352 = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
355 /* NCT6776 specific data */
357 static const s8 NCT6776_ALARM_BITS[] = {
358 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
359 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
361 6, 7, 11, 10, 23, /* fan1..fan5 */
362 -1, -1, -1, /* unused */
363 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
364 12, 9 }; /* intrusion0, intrusion1 */
366 static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5 };
368 static const s8 NCT6776_BEEP_BITS[] = {
369 0, 1, 2, 3, 4, 5, 6, 7, /* in0.. in7 */
370 8, -1, -1, -1, -1, -1, -1, /* in8..in14 */
371 24, /* global beep enable */
372 25, 26, 27, 28, 29, /* fan1..fan5 */
373 -1, -1, -1, /* unused */
374 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
375 30, 31 }; /* intrusion0, intrusion1 */
377 static const u16 NCT6776_REG_TOLERANCE_H[] = {
378 0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c };
380 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0 };
381 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0 };
383 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
384 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
386 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
387 0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e };
389 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
390 0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
392 static const char *const nct6776_temp_label[] = {
407 "PCH_CHIP_CPU_MAX_TEMP",
418 static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
419 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
421 static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
422 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
424 /* NCT6779 specific data */
426 static const u16 NCT6779_REG_IN[] = {
427 0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
428 0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
430 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
431 0x459, 0x45A, 0x45B, 0x568 };
433 static const s8 NCT6779_ALARM_BITS[] = {
434 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
435 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */
437 6, 7, 11, 10, 23, /* fan1..fan5 */
438 -1, -1, -1, /* unused */
439 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
440 12, 9 }; /* intrusion0, intrusion1 */
442 static const s8 NCT6779_BEEP_BITS[] = {
443 0, 1, 2, 3, 4, 5, 6, 7, /* in0.. in7 */
444 8, 9, 10, 11, 12, 13, 14, /* in8..in14 */
445 24, /* global beep enable */
446 25, 26, 27, 28, 29, /* fan1..fan5 */
447 -1, -1, -1, /* unused */
448 16, 17, -1, -1, -1, -1, /* temp1..temp6 */
449 30, 31 }; /* intrusion0, intrusion1 */
451 static const u16 NCT6779_REG_FAN[] = {
452 0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8, 0x4ba };
453 static const u16 NCT6779_REG_FAN_PULSES[] = {
454 0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
456 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
457 0x136, 0x236, 0x336, 0x836, 0x936, 0xa36 };
458 #define NCT6779_CRITICAL_PWM_ENABLE_MASK 0x01
459 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
460 0x137, 0x237, 0x337, 0x837, 0x937, 0xa37 };
462 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
463 static const u16 NCT6779_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b };
464 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
466 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
468 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
471 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
472 0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
474 static const char *const nct6779_temp_label[] = {
493 "PCH_CHIP_CPU_MAX_TEMP",
504 static const u16 NCT6779_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6779_temp_label) - 1]
505 = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
506 0, 0, 0, 0, 0, 0, 0, 0,
507 0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
510 static const u16 NCT6779_REG_TEMP_CRIT[ARRAY_SIZE(nct6779_temp_label) - 1]
511 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
513 /* NCT6791 specific data */
515 #define NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE 0x28
517 static const u16 NCT6791_REG_WEIGHT_TEMP_SEL[6] = { 0, 0x239 };
518 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP[6] = { 0, 0x23a };
519 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP_TOL[6] = { 0, 0x23b };
520 static const u16 NCT6791_REG_WEIGHT_DUTY_STEP[6] = { 0, 0x23c };
521 static const u16 NCT6791_REG_WEIGHT_TEMP_BASE[6] = { 0, 0x23d };
522 static const u16 NCT6791_REG_WEIGHT_DUTY_BASE[6] = { 0, 0x23e };
524 static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = {
525 0x459, 0x45A, 0x45B, 0x568, 0x45D };
527 static const s8 NCT6791_ALARM_BITS[] = {
528 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
529 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */
531 6, 7, 11, 10, 23, 33, /* fan1..fan6 */
533 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
534 12, 9 }; /* intrusion0, intrusion1 */
536 /* NCT6792 specific data */
538 static const u16 NCT6792_REG_TEMP_MON[] = {
539 0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d };
540 static const u16 NCT6792_REG_BEEP[NUM_REG_BEEP] = {
541 0xb2, 0xb3, 0xb4, 0xb5, 0xbf };
543 /* NCT6102D/NCT6106D specific data */
545 #define NCT6106_REG_VBAT 0x318
546 #define NCT6106_REG_DIODE 0x319
547 #define NCT6106_DIODE_MASK 0x01
549 static const u16 NCT6106_REG_IN_MAX[] = {
550 0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
551 static const u16 NCT6106_REG_IN_MIN[] = {
552 0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
553 static const u16 NCT6106_REG_IN[] = {
554 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
556 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
557 static const u16 NCT6106_REG_TEMP_MON[] = { 0x18, 0x19, 0x1a };
558 static const u16 NCT6106_REG_TEMP_HYST[] = {
559 0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
560 static const u16 NCT6106_REG_TEMP_OVER[] = {
561 0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
562 static const u16 NCT6106_REG_TEMP_CRIT_L[] = {
563 0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
564 static const u16 NCT6106_REG_TEMP_CRIT_H[] = {
565 0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
566 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
567 static const u16 NCT6106_REG_TEMP_CONFIG[] = {
568 0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
570 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
571 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
572 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0, 0 };
573 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4, 0, 0 };
575 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
576 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
577 static const u16 NCT6106_REG_PWM[] = { 0x119, 0x129, 0x139 };
578 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c };
579 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
580 static const u16 NCT6106_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130 };
581 static const u16 NCT6106_REG_TEMP_SOURCE[] = {
582 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
584 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
585 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = {
586 0x11b, 0x12b, 0x13b };
588 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
589 #define NCT6106_CRITICAL_PWM_ENABLE_MASK 0x10
590 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
592 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
593 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
594 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
595 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
596 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
597 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
599 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
601 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
602 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
603 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
604 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x17c };
605 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
606 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
608 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
609 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
611 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = {
612 0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
614 static const s8 NCT6106_ALARM_BITS[] = {
615 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */
616 9, -1, -1, -1, -1, -1, -1, /* in8..in14 */
618 32, 33, 34, -1, -1, /* fan1..fan5 */
619 -1, -1, -1, /* unused */
620 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
621 48, -1 /* intrusion0, intrusion1 */
624 static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = {
625 0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 };
627 static const s8 NCT6106_BEEP_BITS[] = {
628 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */
629 9, 10, 11, 12, -1, -1, -1, /* in8..in14 */
630 32, /* global beep enable */
631 24, 25, 26, 27, 28, /* fan1..fan5 */
632 -1, -1, -1, /* unused */
633 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
634 34, -1 /* intrusion0, intrusion1 */
637 static const u16 NCT6106_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
638 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x51, 0x52, 0x54 };
640 static const u16 NCT6106_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
641 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x204, 0x205 };
643 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
645 if (mode == 0 && pwm == 255)
650 static int pwm_enable_to_reg(enum pwm_enable mode)
661 /* 1 is DC mode, output in ms */
662 static unsigned int step_time_from_reg(u8 reg, u8 mode)
664 return mode ? 400 * reg : 100 * reg;
667 static u8 step_time_to_reg(unsigned int msec, u8 mode)
669 return clamp_val((mode ? (msec + 200) / 400 :
670 (msec + 50) / 100), 1, 255);
673 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
675 if (reg == 0 || reg == 255)
677 return 1350000U / (reg << divreg);
680 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
682 if ((reg & 0xff1f) == 0xff1f)
685 reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
690 return 1350000U / reg;
693 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
695 if (reg == 0 || reg == 0xffff)
699 * Even though the registers are 16 bit wide, the fan divisor
702 return 1350000U / (reg << divreg);
705 static u16 fan_to_reg(u32 fan, unsigned int divreg)
710 return (1350000U / fan) >> divreg;
713 static inline unsigned int
720 * Some of the voltage inputs have internal scaling, the tables below
721 * contain 8 (the ADC LSB in mV) * scaling factor * 100
723 static const u16 scale_in[15] = {
724 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
728 static inline long in_from_reg(u8 reg, u8 nr)
730 return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
733 static inline u8 in_to_reg(u32 val, u8 nr)
735 return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
739 * Data structures and manipulation thereof
742 struct nct6775_data {
743 int addr; /* IO base of hw monitor block */
744 int sioreg; /* SIO register address */
748 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
749 struct device *hwmon_dev;
752 const struct attribute_group *groups[6];
754 u16 reg_temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
755 * 3=temp_crit, 4=temp_lcrit
757 u8 temp_src[NUM_TEMP];
758 u16 reg_temp_config[NUM_TEMP];
759 const char * const *temp_label;
767 const s8 *ALARM_BITS;
771 const u16 *REG_IN_MINMAX[2];
773 const u16 *REG_TARGET;
775 const u16 *REG_FAN_MODE;
776 const u16 *REG_FAN_MIN;
777 const u16 *REG_FAN_PULSES;
778 const u16 *FAN_PULSE_SHIFT;
779 const u16 *REG_FAN_TIME[3];
781 const u16 *REG_TOLERANCE_H;
783 const u8 *REG_PWM_MODE;
784 const u8 *PWM_MODE_MASK;
786 const u16 *REG_PWM[7]; /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
787 * [3]=pwm_max, [4]=pwm_step,
788 * [5]=weight_duty_step, [6]=weight_duty_base
790 const u16 *REG_PWM_READ;
792 const u16 *REG_CRITICAL_PWM_ENABLE;
793 u8 CRITICAL_PWM_ENABLE_MASK;
794 const u16 *REG_CRITICAL_PWM;
796 const u16 *REG_AUTO_TEMP;
797 const u16 *REG_AUTO_PWM;
799 const u16 *REG_CRITICAL_TEMP;
800 const u16 *REG_CRITICAL_TEMP_TOLERANCE;
802 const u16 *REG_TEMP_SOURCE; /* temp register sources */
803 const u16 *REG_TEMP_SEL;
804 const u16 *REG_WEIGHT_TEMP_SEL;
805 const u16 *REG_WEIGHT_TEMP[3]; /* 0=base, 1=tolerance, 2=step */
807 const u16 *REG_TEMP_OFFSET;
809 const u16 *REG_ALARM;
812 unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
813 unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
815 struct mutex update_lock;
816 bool valid; /* true if following fields are valid */
817 unsigned long last_updated; /* In jiffies */
819 /* Register values */
820 u8 bank; /* current register bank */
821 u8 in_num; /* number of in inputs we have */
822 u8 in[15][3]; /* [0]=in, [1]=in_max, [2]=in_min */
823 unsigned int rpm[NUM_FAN];
824 u16 fan_min[NUM_FAN];
825 u8 fan_pulses[NUM_FAN];
828 u8 has_fan; /* some fan inputs can be disabled */
829 u8 has_fan_min; /* some fans don't have min register */
832 u8 num_temp_alarms; /* 2, 3, or 6 */
833 u8 num_temp_beeps; /* 2, 3, or 6 */
834 u8 temp_fixed_num; /* 3 or 6 */
835 u8 temp_type[NUM_TEMP_FIXED];
836 s8 temp_offset[NUM_TEMP_FIXED];
837 s16 temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
838 * 3=temp_crit, 4=temp_lcrit */
842 u8 pwm_num; /* number of pwm */
843 u8 pwm_mode[NUM_FAN]; /* 1->DC variable voltage,
844 * 0->PWM variable duty cycle
846 enum pwm_enable pwm_enable[NUM_FAN];
849 * 2->thermal cruise mode (also called SmartFan I)
850 * 3->fan speed cruise mode
852 * 5->enhanced variable thermal cruise (SmartFan IV)
854 u8 pwm[7][NUM_FAN]; /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
855 * [3]=pwm_max, [4]=pwm_step,
856 * [5]=weight_duty_step, [6]=weight_duty_base
859 u8 target_temp[NUM_FAN];
861 u32 target_speed[NUM_FAN];
862 u32 target_speed_tolerance[NUM_FAN];
863 u8 speed_tolerance_limit;
865 u8 temp_tolerance[2][NUM_FAN];
868 u8 fan_time[3][NUM_FAN]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
870 /* Automatic fan speed control registers */
872 u8 auto_pwm[NUM_FAN][7];
873 u8 auto_temp[NUM_FAN][7];
874 u8 pwm_temp_sel[NUM_FAN];
875 u8 pwm_weight_temp_sel[NUM_FAN];
876 u8 weight_temp[3][NUM_FAN]; /* 0->temp_step, 1->temp_step_tol,
889 /* Remember extra register values over suspend/resume */
895 struct nct6775_sio_data {
900 struct sensor_device_template {
901 struct device_attribute dev_attr;
909 bool s2; /* true if both index and nr are used */
912 struct sensor_device_attr_u {
914 struct sensor_device_attribute a1;
915 struct sensor_device_attribute_2 a2;
920 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) { \
921 .attr = {.name = _template, .mode = _mode }, \
926 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \
927 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
931 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \
933 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
934 .u.s.index = _index, \
938 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
939 static struct sensor_device_template sensor_dev_template_##_name \
940 = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, \
943 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store, \
945 static struct sensor_device_template sensor_dev_template_##_name \
946 = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \
949 struct sensor_template_group {
950 struct sensor_device_template **templates;
951 umode_t (*is_visible)(struct kobject *, struct attribute *, int);
955 static struct attribute_group *
956 nct6775_create_attr_group(struct device *dev, struct sensor_template_group *tg,
959 struct attribute_group *group;
960 struct sensor_device_attr_u *su;
961 struct sensor_device_attribute *a;
962 struct sensor_device_attribute_2 *a2;
963 struct attribute **attrs;
964 struct sensor_device_template **t;
968 return ERR_PTR(-EINVAL);
971 for (count = 0; *t; t++, count++)
975 return ERR_PTR(-EINVAL);
977 group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
979 return ERR_PTR(-ENOMEM);
981 attrs = devm_kzalloc(dev, sizeof(*attrs) * (repeat * count + 1),
984 return ERR_PTR(-ENOMEM);
986 su = devm_kzalloc(dev, sizeof(*su) * repeat * count,
989 return ERR_PTR(-ENOMEM);
991 group->attrs = attrs;
992 group->is_visible = tg->is_visible;
994 for (i = 0; i < repeat; i++) {
997 snprintf(su->name, sizeof(su->name),
998 (*t)->dev_attr.attr.name, tg->base + i);
1001 a2->dev_attr.attr.name = su->name;
1002 a2->nr = (*t)->u.s.nr + i;
1003 a2->index = (*t)->u.s.index;
1004 a2->dev_attr.attr.mode =
1005 (*t)->dev_attr.attr.mode;
1006 a2->dev_attr.show = (*t)->dev_attr.show;
1007 a2->dev_attr.store = (*t)->dev_attr.store;
1008 *attrs = &a2->dev_attr.attr;
1011 a->dev_attr.attr.name = su->name;
1012 a->index = (*t)->u.index + i;
1013 a->dev_attr.attr.mode =
1014 (*t)->dev_attr.attr.mode;
1015 a->dev_attr.show = (*t)->dev_attr.show;
1016 a->dev_attr.store = (*t)->dev_attr.store;
1017 *attrs = &a->dev_attr.attr;
1028 static bool is_word_sized(struct nct6775_data *data, u16 reg)
1030 switch (data->kind) {
1032 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1033 reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
1034 reg == 0x111 || reg == 0x121 || reg == 0x131;
1036 return (((reg & 0xff00) == 0x100 ||
1037 (reg & 0xff00) == 0x200) &&
1038 ((reg & 0x00ff) == 0x50 ||
1039 (reg & 0x00ff) == 0x53 ||
1040 (reg & 0x00ff) == 0x55)) ||
1041 (reg & 0xfff0) == 0x630 ||
1042 reg == 0x640 || reg == 0x642 ||
1044 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1045 reg == 0x73 || reg == 0x75 || reg == 0x77;
1047 return (((reg & 0xff00) == 0x100 ||
1048 (reg & 0xff00) == 0x200) &&
1049 ((reg & 0x00ff) == 0x50 ||
1050 (reg & 0x00ff) == 0x53 ||
1051 (reg & 0x00ff) == 0x55)) ||
1052 (reg & 0xfff0) == 0x630 ||
1054 reg == 0x640 || reg == 0x642 ||
1055 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1056 reg == 0x73 || reg == 0x75 || reg == 0x77;
1060 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
1061 ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x0b) ||
1063 reg == 0x63a || reg == 0x63c || reg == 0x63e ||
1064 reg == 0x640 || reg == 0x642 ||
1065 reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
1066 reg == 0x7b || reg == 0x7d;
1072 * On older chips, only registers 0x50-0x5f are banked.
1073 * On more recent chips, all registers are banked.
1074 * Assume that is the case and set the bank number for each access.
1075 * Cache the bank number so it only needs to be set if it changes.
1077 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
1081 if (data->bank != bank) {
1082 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
1083 outb_p(bank, data->addr + DATA_REG_OFFSET);
1088 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
1090 int res, word_sized = is_word_sized(data, reg);
1092 nct6775_set_bank(data, reg);
1093 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1094 res = inb_p(data->addr + DATA_REG_OFFSET);
1096 outb_p((reg & 0xff) + 1,
1097 data->addr + ADDR_REG_OFFSET);
1098 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
1103 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
1105 int word_sized = is_word_sized(data, reg);
1107 nct6775_set_bank(data, reg);
1108 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1110 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
1111 outb_p((reg & 0xff) + 1,
1112 data->addr + ADDR_REG_OFFSET);
1114 outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
1118 /* We left-align 8-bit temperature values to make the code simpler */
1119 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
1123 res = nct6775_read_value(data, reg);
1124 if (!is_word_sized(data, reg))
1130 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
1132 if (!is_word_sized(data, reg))
1134 return nct6775_write_value(data, reg, value);
1137 /* This function assumes that the caller holds data->update_lock */
1138 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
1144 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
1145 | (data->fan_div[0] & 0x7);
1146 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1149 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
1150 | ((data->fan_div[1] << 4) & 0x70);
1151 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1154 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
1155 | (data->fan_div[2] & 0x7);
1156 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1159 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
1160 | ((data->fan_div[3] << 4) & 0x70);
1161 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1166 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
1168 if (data->kind == nct6775)
1169 nct6775_write_fan_div(data, nr);
1172 static void nct6775_update_fan_div(struct nct6775_data *data)
1176 i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
1177 data->fan_div[0] = i & 0x7;
1178 data->fan_div[1] = (i & 0x70) >> 4;
1179 i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
1180 data->fan_div[2] = i & 0x7;
1181 if (data->has_fan & (1 << 3))
1182 data->fan_div[3] = (i & 0x70) >> 4;
1185 static void nct6775_update_fan_div_common(struct nct6775_data *data)
1187 if (data->kind == nct6775)
1188 nct6775_update_fan_div(data);
1191 static void nct6775_init_fan_div(struct nct6775_data *data)
1195 nct6775_update_fan_div_common(data);
1197 * For all fans, start with highest divider value if the divider
1198 * register is not initialized. This ensures that we get a
1199 * reading from the fan count register, even if it is not optimal.
1200 * We'll compute a better divider later on.
1202 for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
1203 if (!(data->has_fan & (1 << i)))
1205 if (data->fan_div[i] == 0) {
1206 data->fan_div[i] = 7;
1207 nct6775_write_fan_div_common(data, i);
1212 static void nct6775_init_fan_common(struct device *dev,
1213 struct nct6775_data *data)
1218 if (data->has_fan_div)
1219 nct6775_init_fan_div(data);
1222 * If fan_min is not set (0), set it to 0xff to disable it. This
1223 * prevents the unnecessary warning when fanX_min is reported as 0.
1225 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1226 if (data->has_fan_min & (1 << i)) {
1227 reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
1229 nct6775_write_value(data, data->REG_FAN_MIN[i],
1230 data->has_fan_div ? 0xff
1236 static void nct6775_select_fan_div(struct device *dev,
1237 struct nct6775_data *data, int nr, u16 reg)
1239 u8 fan_div = data->fan_div[nr];
1242 if (!data->has_fan_div)
1246 * If we failed to measure the fan speed, or the reported value is not
1247 * in the optimal range, and the clock divider can be modified,
1248 * let's try that for next time.
1250 if (reg == 0x00 && fan_div < 0x07)
1252 else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1255 if (fan_div != data->fan_div[nr]) {
1256 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1257 nr + 1, div_from_reg(data->fan_div[nr]),
1258 div_from_reg(fan_div));
1260 /* Preserve min limit if possible */
1261 if (data->has_fan_min & (1 << nr)) {
1262 fan_min = data->fan_min[nr];
1263 if (fan_div > data->fan_div[nr]) {
1264 if (fan_min != 255 && fan_min > 1)
1267 if (fan_min != 255) {
1273 if (fan_min != data->fan_min[nr]) {
1274 data->fan_min[nr] = fan_min;
1275 nct6775_write_value(data, data->REG_FAN_MIN[nr],
1279 data->fan_div[nr] = fan_div;
1280 nct6775_write_fan_div_common(data, nr);
1284 static void nct6775_update_pwm(struct device *dev)
1286 struct nct6775_data *data = dev_get_drvdata(dev);
1288 int fanmodecfg, reg;
1291 for (i = 0; i < data->pwm_num; i++) {
1292 if (!(data->has_pwm & (1 << i)))
1295 duty_is_dc = data->REG_PWM_MODE[i] &&
1296 (nct6775_read_value(data, data->REG_PWM_MODE[i])
1297 & data->PWM_MODE_MASK[i]);
1298 data->pwm_mode[i] = duty_is_dc;
1300 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
1301 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1302 if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1304 = nct6775_read_value(data,
1305 data->REG_PWM[j][i]);
1309 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1310 (fanmodecfg >> 4) & 7);
1312 if (!data->temp_tolerance[0][i] ||
1313 data->pwm_enable[i] != speed_cruise)
1314 data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1315 if (!data->target_speed_tolerance[i] ||
1316 data->pwm_enable[i] == speed_cruise) {
1317 u8 t = fanmodecfg & 0x0f;
1319 if (data->REG_TOLERANCE_H) {
1320 t |= (nct6775_read_value(data,
1321 data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
1323 data->target_speed_tolerance[i] = t;
1326 data->temp_tolerance[1][i] =
1327 nct6775_read_value(data,
1328 data->REG_CRITICAL_TEMP_TOLERANCE[i]);
1330 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
1331 data->pwm_temp_sel[i] = reg & 0x1f;
1332 /* If fan can stop, report floor as 0 */
1334 data->pwm[2][i] = 0;
1336 if (!data->REG_WEIGHT_TEMP_SEL[i])
1339 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
1340 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1341 /* If weight is disabled, report weight source as 0 */
1342 if (j == 1 && !(reg & 0x80))
1343 data->pwm_weight_temp_sel[i] = 0;
1345 /* Weight temp data */
1346 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
1347 data->weight_temp[j][i]
1348 = nct6775_read_value(data,
1349 data->REG_WEIGHT_TEMP[j][i]);
1354 static void nct6775_update_pwm_limits(struct device *dev)
1356 struct nct6775_data *data = dev_get_drvdata(dev);
1361 for (i = 0; i < data->pwm_num; i++) {
1362 if (!(data->has_pwm & (1 << i)))
1365 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1366 data->fan_time[j][i] =
1367 nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1370 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1371 /* Update only in matching mode or if never updated */
1372 if (!data->target_temp[i] ||
1373 data->pwm_enable[i] == thermal_cruise)
1374 data->target_temp[i] = reg_t & data->target_temp_mask;
1375 if (!data->target_speed[i] ||
1376 data->pwm_enable[i] == speed_cruise) {
1377 if (data->REG_TOLERANCE_H) {
1378 reg_t |= (nct6775_read_value(data,
1379 data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1381 data->target_speed[i] = reg_t;
1384 for (j = 0; j < data->auto_pwm_num; j++) {
1385 data->auto_pwm[i][j] =
1386 nct6775_read_value(data,
1387 NCT6775_AUTO_PWM(data, i, j));
1388 data->auto_temp[i][j] =
1389 nct6775_read_value(data,
1390 NCT6775_AUTO_TEMP(data, i, j));
1393 /* critical auto_pwm temperature data */
1394 data->auto_temp[i][data->auto_pwm_num] =
1395 nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1397 switch (data->kind) {
1399 reg = nct6775_read_value(data,
1400 NCT6775_REG_CRITICAL_ENAB[i]);
1401 data->auto_pwm[i][data->auto_pwm_num] =
1402 (reg & 0x02) ? 0xff : 0x00;
1405 data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1411 reg = nct6775_read_value(data,
1412 data->REG_CRITICAL_PWM_ENABLE[i]);
1413 if (reg & data->CRITICAL_PWM_ENABLE_MASK)
1414 reg = nct6775_read_value(data,
1415 data->REG_CRITICAL_PWM[i]);
1418 data->auto_pwm[i][data->auto_pwm_num] = reg;
1424 static struct nct6775_data *nct6775_update_device(struct device *dev)
1426 struct nct6775_data *data = dev_get_drvdata(dev);
1429 mutex_lock(&data->update_lock);
1431 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1433 /* Fan clock dividers */
1434 nct6775_update_fan_div_common(data);
1436 /* Measured voltages and limits */
1437 for (i = 0; i < data->in_num; i++) {
1438 if (!(data->have_in & (1 << i)))
1441 data->in[i][0] = nct6775_read_value(data,
1443 data->in[i][1] = nct6775_read_value(data,
1444 data->REG_IN_MINMAX[0][i]);
1445 data->in[i][2] = nct6775_read_value(data,
1446 data->REG_IN_MINMAX[1][i]);
1449 /* Measured fan speeds and limits */
1450 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
1453 if (!(data->has_fan & (1 << i)))
1456 reg = nct6775_read_value(data, data->REG_FAN[i]);
1457 data->rpm[i] = data->fan_from_reg(reg,
1460 if (data->has_fan_min & (1 << i))
1461 data->fan_min[i] = nct6775_read_value(data,
1462 data->REG_FAN_MIN[i]);
1463 data->fan_pulses[i] =
1464 (nct6775_read_value(data, data->REG_FAN_PULSES[i])
1465 >> data->FAN_PULSE_SHIFT[i]) & 0x03;
1467 nct6775_select_fan_div(dev, data, i, reg);
1470 nct6775_update_pwm(dev);
1471 nct6775_update_pwm_limits(dev);
1473 /* Measured temperatures and limits */
1474 for (i = 0; i < NUM_TEMP; i++) {
1475 if (!(data->have_temp & (1 << i)))
1477 for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1478 if (data->reg_temp[j][i])
1480 = nct6775_read_temp(data,
1481 data->reg_temp[j][i]);
1483 if (i >= NUM_TEMP_FIXED ||
1484 !(data->have_temp_fixed & (1 << i)))
1486 data->temp_offset[i]
1487 = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1491 for (i = 0; i < NUM_REG_ALARM; i++) {
1494 if (!data->REG_ALARM[i])
1496 alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1497 data->alarms |= ((u64)alarm) << (i << 3);
1501 for (i = 0; i < NUM_REG_BEEP; i++) {
1504 if (!data->REG_BEEP[i])
1506 beep = nct6775_read_value(data, data->REG_BEEP[i]);
1507 data->beeps |= ((u64)beep) << (i << 3);
1510 data->last_updated = jiffies;
1514 mutex_unlock(&data->update_lock);
1519 * Sysfs callback functions
1522 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1524 struct nct6775_data *data = nct6775_update_device(dev);
1525 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1526 int index = sattr->index;
1529 return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1533 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1536 struct nct6775_data *data = dev_get_drvdata(dev);
1537 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1538 int index = sattr->index;
1543 err = kstrtoul(buf, 10, &val);
1546 mutex_lock(&data->update_lock);
1547 data->in[nr][index] = in_to_reg(val, nr);
1548 nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr],
1549 data->in[nr][index]);
1550 mutex_unlock(&data->update_lock);
1555 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1557 struct nct6775_data *data = nct6775_update_device(dev);
1558 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1559 int nr = data->ALARM_BITS[sattr->index];
1561 return sprintf(buf, "%u\n",
1562 (unsigned int)((data->alarms >> nr) & 0x01));
1565 static int find_temp_source(struct nct6775_data *data, int index, int count)
1567 int source = data->temp_src[index];
1570 for (nr = 0; nr < count; nr++) {
1573 src = nct6775_read_value(data,
1574 data->REG_TEMP_SOURCE[nr]) & 0x1f;
1582 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1584 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1585 struct nct6775_data *data = nct6775_update_device(dev);
1586 unsigned int alarm = 0;
1590 * For temperatures, there is no fixed mapping from registers to alarm
1591 * bits. Alarm bits are determined by the temperature source mapping.
1593 nr = find_temp_source(data, sattr->index, data->num_temp_alarms);
1595 int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE];
1597 alarm = (data->alarms >> bit) & 0x01;
1599 return sprintf(buf, "%u\n", alarm);
1603 show_beep(struct device *dev, struct device_attribute *attr, char *buf)
1605 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1606 struct nct6775_data *data = nct6775_update_device(dev);
1607 int nr = data->BEEP_BITS[sattr->index];
1609 return sprintf(buf, "%u\n",
1610 (unsigned int)((data->beeps >> nr) & 0x01));
1614 store_beep(struct device *dev, struct device_attribute *attr, const char *buf,
1617 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1618 struct nct6775_data *data = dev_get_drvdata(dev);
1619 int nr = data->BEEP_BITS[sattr->index];
1620 int regindex = nr >> 3;
1624 err = kstrtoul(buf, 10, &val);
1630 mutex_lock(&data->update_lock);
1632 data->beeps |= (1ULL << nr);
1634 data->beeps &= ~(1ULL << nr);
1635 nct6775_write_value(data, data->REG_BEEP[regindex],
1636 (data->beeps >> (regindex << 3)) & 0xff);
1637 mutex_unlock(&data->update_lock);
1642 show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf)
1644 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1645 struct nct6775_data *data = nct6775_update_device(dev);
1646 unsigned int beep = 0;
1650 * For temperatures, there is no fixed mapping from registers to beep
1651 * enable bits. Beep enable bits are determined by the temperature
1654 nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1656 int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1658 beep = (data->beeps >> bit) & 0x01;
1660 return sprintf(buf, "%u\n", beep);
1664 store_temp_beep(struct device *dev, struct device_attribute *attr,
1665 const char *buf, size_t count)
1667 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1668 struct nct6775_data *data = dev_get_drvdata(dev);
1669 int nr, bit, regindex;
1673 err = kstrtoul(buf, 10, &val);
1679 nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1683 bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1684 regindex = bit >> 3;
1686 mutex_lock(&data->update_lock);
1688 data->beeps |= (1ULL << bit);
1690 data->beeps &= ~(1ULL << bit);
1691 nct6775_write_value(data, data->REG_BEEP[regindex],
1692 (data->beeps >> (regindex << 3)) & 0xff);
1693 mutex_unlock(&data->update_lock);
1698 static umode_t nct6775_in_is_visible(struct kobject *kobj,
1699 struct attribute *attr, int index)
1701 struct device *dev = container_of(kobj, struct device, kobj);
1702 struct nct6775_data *data = dev_get_drvdata(dev);
1703 int in = index / 5; /* voltage index */
1705 if (!(data->have_in & (1 << in)))
1711 SENSOR_TEMPLATE_2(in_input, "in%d_input", S_IRUGO, show_in_reg, NULL, 0, 0);
1712 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", S_IRUGO, show_alarm, NULL, 0);
1713 SENSOR_TEMPLATE(in_beep, "in%d_beep", S_IWUSR | S_IRUGO, show_beep, store_beep,
1715 SENSOR_TEMPLATE_2(in_min, "in%d_min", S_IWUSR | S_IRUGO, show_in_reg,
1716 store_in_reg, 0, 1);
1717 SENSOR_TEMPLATE_2(in_max, "in%d_max", S_IWUSR | S_IRUGO, show_in_reg,
1718 store_in_reg, 0, 2);
1721 * nct6775_in_is_visible uses the index into the following array
1722 * to determine if attributes should be created or not.
1723 * Any change in order or content must be matched.
1725 static struct sensor_device_template *nct6775_attributes_in_template[] = {
1726 &sensor_dev_template_in_input,
1727 &sensor_dev_template_in_alarm,
1728 &sensor_dev_template_in_beep,
1729 &sensor_dev_template_in_min,
1730 &sensor_dev_template_in_max,
1734 static struct sensor_template_group nct6775_in_template_group = {
1735 .templates = nct6775_attributes_in_template,
1736 .is_visible = nct6775_in_is_visible,
1740 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1742 struct nct6775_data *data = nct6775_update_device(dev);
1743 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1744 int nr = sattr->index;
1746 return sprintf(buf, "%d\n", data->rpm[nr]);
1750 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1752 struct nct6775_data *data = nct6775_update_device(dev);
1753 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1754 int nr = sattr->index;
1756 return sprintf(buf, "%d\n",
1757 data->fan_from_reg_min(data->fan_min[nr],
1758 data->fan_div[nr]));
1762 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1764 struct nct6775_data *data = nct6775_update_device(dev);
1765 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1766 int nr = sattr->index;
1768 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1772 store_fan_min(struct device *dev, struct device_attribute *attr,
1773 const char *buf, size_t count)
1775 struct nct6775_data *data = dev_get_drvdata(dev);
1776 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1777 int nr = sattr->index;
1783 err = kstrtoul(buf, 10, &val);
1787 mutex_lock(&data->update_lock);
1788 if (!data->has_fan_div) {
1789 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1795 val = 1350000U / val;
1796 val = (val & 0x1f) | ((val << 3) & 0xff00);
1798 data->fan_min[nr] = val;
1799 goto write_min; /* Leave fan divider alone */
1802 /* No min limit, alarm disabled */
1803 data->fan_min[nr] = 255;
1804 new_div = data->fan_div[nr]; /* No change */
1805 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1808 reg = 1350000U / val;
1809 if (reg >= 128 * 255) {
1811 * Speed below this value cannot possibly be represented,
1812 * even with the highest divider (128)
1814 data->fan_min[nr] = 254;
1815 new_div = 7; /* 128 == (1 << 7) */
1817 "fan%u low limit %lu below minimum %u, set to minimum\n",
1818 nr + 1, val, data->fan_from_reg_min(254, 7));
1821 * Speed above this value cannot possibly be represented,
1822 * even with the lowest divider (1)
1824 data->fan_min[nr] = 1;
1825 new_div = 0; /* 1 == (1 << 0) */
1827 "fan%u low limit %lu above maximum %u, set to maximum\n",
1828 nr + 1, val, data->fan_from_reg_min(1, 0));
1831 * Automatically pick the best divider, i.e. the one such
1832 * that the min limit will correspond to a register value
1833 * in the 96..192 range
1836 while (reg > 192 && new_div < 7) {
1840 data->fan_min[nr] = reg;
1845 * Write both the fan clock divider (if it changed) and the new
1846 * fan min (unconditionally)
1848 if (new_div != data->fan_div[nr]) {
1849 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1850 nr + 1, div_from_reg(data->fan_div[nr]),
1851 div_from_reg(new_div));
1852 data->fan_div[nr] = new_div;
1853 nct6775_write_fan_div_common(data, nr);
1854 /* Give the chip time to sample a new speed value */
1855 data->last_updated = jiffies;
1859 nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1860 mutex_unlock(&data->update_lock);
1866 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
1868 struct nct6775_data *data = nct6775_update_device(dev);
1869 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1870 int p = data->fan_pulses[sattr->index];
1872 return sprintf(buf, "%d\n", p ? : 4);
1876 store_fan_pulses(struct device *dev, struct device_attribute *attr,
1877 const char *buf, size_t count)
1879 struct nct6775_data *data = dev_get_drvdata(dev);
1880 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1881 int nr = sattr->index;
1886 err = kstrtoul(buf, 10, &val);
1893 mutex_lock(&data->update_lock);
1894 data->fan_pulses[nr] = val & 3;
1895 reg = nct6775_read_value(data, data->REG_FAN_PULSES[nr]);
1896 reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
1897 reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
1898 nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
1899 mutex_unlock(&data->update_lock);
1904 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
1905 struct attribute *attr, int index)
1907 struct device *dev = container_of(kobj, struct device, kobj);
1908 struct nct6775_data *data = dev_get_drvdata(dev);
1909 int fan = index / 6; /* fan index */
1910 int nr = index % 6; /* attribute index */
1912 if (!(data->has_fan & (1 << fan)))
1915 if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1)
1917 if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1)
1919 if (nr == 4 && !(data->has_fan_min & (1 << fan)))
1921 if (nr == 5 && data->kind != nct6775)
1927 SENSOR_TEMPLATE(fan_input, "fan%d_input", S_IRUGO, show_fan, NULL, 0);
1928 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", S_IRUGO, show_alarm, NULL,
1930 SENSOR_TEMPLATE(fan_beep, "fan%d_beep", S_IWUSR | S_IRUGO, show_beep,
1931 store_beep, FAN_ALARM_BASE);
1932 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", S_IWUSR | S_IRUGO, show_fan_pulses,
1933 store_fan_pulses, 0);
1934 SENSOR_TEMPLATE(fan_min, "fan%d_min", S_IWUSR | S_IRUGO, show_fan_min,
1936 SENSOR_TEMPLATE(fan_div, "fan%d_div", S_IRUGO, show_fan_div, NULL, 0);
1939 * nct6775_fan_is_visible uses the index into the following array
1940 * to determine if attributes should be created or not.
1941 * Any change in order or content must be matched.
1943 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
1944 &sensor_dev_template_fan_input,
1945 &sensor_dev_template_fan_alarm, /* 1 */
1946 &sensor_dev_template_fan_beep, /* 2 */
1947 &sensor_dev_template_fan_pulses,
1948 &sensor_dev_template_fan_min, /* 4 */
1949 &sensor_dev_template_fan_div, /* 5 */
1953 static struct sensor_template_group nct6775_fan_template_group = {
1954 .templates = nct6775_attributes_fan_template,
1955 .is_visible = nct6775_fan_is_visible,
1960 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1962 struct nct6775_data *data = nct6775_update_device(dev);
1963 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1964 int nr = sattr->index;
1966 return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1970 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1972 struct nct6775_data *data = nct6775_update_device(dev);
1973 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1975 int index = sattr->index;
1977 return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
1981 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
1984 struct nct6775_data *data = dev_get_drvdata(dev);
1985 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1987 int index = sattr->index;
1991 err = kstrtol(buf, 10, &val);
1995 mutex_lock(&data->update_lock);
1996 data->temp[index][nr] = LM75_TEMP_TO_REG(val);
1997 nct6775_write_temp(data, data->reg_temp[index][nr],
1998 data->temp[index][nr]);
1999 mutex_unlock(&data->update_lock);
2004 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
2006 struct nct6775_data *data = nct6775_update_device(dev);
2007 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2009 return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
2013 store_temp_offset(struct device *dev, struct device_attribute *attr,
2014 const char *buf, size_t count)
2016 struct nct6775_data *data = dev_get_drvdata(dev);
2017 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2018 int nr = sattr->index;
2022 err = kstrtol(buf, 10, &val);
2026 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
2028 mutex_lock(&data->update_lock);
2029 data->temp_offset[nr] = val;
2030 nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
2031 mutex_unlock(&data->update_lock);
2037 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
2039 struct nct6775_data *data = nct6775_update_device(dev);
2040 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2041 int nr = sattr->index;
2043 return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
2047 store_temp_type(struct device *dev, struct device_attribute *attr,
2048 const char *buf, size_t count)
2050 struct nct6775_data *data = nct6775_update_device(dev);
2051 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2052 int nr = sattr->index;
2055 u8 vbat, diode, vbit, dbit;
2057 err = kstrtoul(buf, 10, &val);
2061 if (val != 1 && val != 3 && val != 4)
2064 mutex_lock(&data->update_lock);
2066 data->temp_type[nr] = val;
2068 dbit = data->DIODE_MASK << nr;
2069 vbat = nct6775_read_value(data, data->REG_VBAT) & ~vbit;
2070 diode = nct6775_read_value(data, data->REG_DIODE) & ~dbit;
2072 case 1: /* CPU diode (diode, current mode) */
2076 case 3: /* diode, voltage mode */
2079 case 4: /* thermistor */
2082 nct6775_write_value(data, data->REG_VBAT, vbat);
2083 nct6775_write_value(data, data->REG_DIODE, diode);
2085 mutex_unlock(&data->update_lock);
2089 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
2090 struct attribute *attr, int index)
2092 struct device *dev = container_of(kobj, struct device, kobj);
2093 struct nct6775_data *data = dev_get_drvdata(dev);
2094 int temp = index / 10; /* temp index */
2095 int nr = index % 10; /* attribute index */
2097 if (!(data->have_temp & (1 << temp)))
2100 if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0)
2101 return 0; /* alarm */
2103 if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0)
2104 return 0; /* beep */
2106 if (nr == 4 && !data->reg_temp[1][temp]) /* max */
2109 if (nr == 5 && !data->reg_temp[2][temp]) /* max_hyst */
2112 if (nr == 6 && !data->reg_temp[3][temp]) /* crit */
2115 if (nr == 7 && !data->reg_temp[4][temp]) /* lcrit */
2118 /* offset and type only apply to fixed sensors */
2119 if (nr > 7 && !(data->have_temp_fixed & (1 << temp)))
2125 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", S_IRUGO, show_temp, NULL, 0, 0);
2126 SENSOR_TEMPLATE(temp_label, "temp%d_label", S_IRUGO, show_temp_label, NULL, 0);
2127 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", S_IRUGO | S_IWUSR, show_temp,
2129 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", S_IRUGO | S_IWUSR,
2130 show_temp, store_temp, 0, 2);
2131 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", S_IRUGO | S_IWUSR, show_temp,
2133 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", S_IRUGO | S_IWUSR, show_temp,
2135 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", S_IRUGO | S_IWUSR,
2136 show_temp_offset, store_temp_offset, 0);
2137 SENSOR_TEMPLATE(temp_type, "temp%d_type", S_IRUGO | S_IWUSR, show_temp_type,
2138 store_temp_type, 0);
2139 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", S_IRUGO, show_temp_alarm, NULL, 0);
2140 SENSOR_TEMPLATE(temp_beep, "temp%d_beep", S_IRUGO | S_IWUSR, show_temp_beep,
2141 store_temp_beep, 0);
2144 * nct6775_temp_is_visible uses the index into the following array
2145 * to determine if attributes should be created or not.
2146 * Any change in order or content must be matched.
2148 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
2149 &sensor_dev_template_temp_input,
2150 &sensor_dev_template_temp_label,
2151 &sensor_dev_template_temp_alarm, /* 2 */
2152 &sensor_dev_template_temp_beep, /* 3 */
2153 &sensor_dev_template_temp_max, /* 4 */
2154 &sensor_dev_template_temp_max_hyst, /* 5 */
2155 &sensor_dev_template_temp_crit, /* 6 */
2156 &sensor_dev_template_temp_lcrit, /* 7 */
2157 &sensor_dev_template_temp_offset, /* 8 */
2158 &sensor_dev_template_temp_type, /* 9 */
2162 static struct sensor_template_group nct6775_temp_template_group = {
2163 .templates = nct6775_attributes_temp_template,
2164 .is_visible = nct6775_temp_is_visible,
2169 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
2171 struct nct6775_data *data = nct6775_update_device(dev);
2172 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2174 return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
2178 store_pwm_mode(struct device *dev, struct device_attribute *attr,
2179 const char *buf, size_t count)
2181 struct nct6775_data *data = dev_get_drvdata(dev);
2182 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2183 int nr = sattr->index;
2188 err = kstrtoul(buf, 10, &val);
2195 /* Setting DC mode is not supported for all chips/channels */
2196 if (data->REG_PWM_MODE[nr] == 0) {
2202 mutex_lock(&data->update_lock);
2203 data->pwm_mode[nr] = val;
2204 reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
2205 reg &= ~data->PWM_MODE_MASK[nr];
2207 reg |= data->PWM_MODE_MASK[nr];
2208 nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
2209 mutex_unlock(&data->update_lock);
2214 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2216 struct nct6775_data *data = nct6775_update_device(dev);
2217 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2219 int index = sattr->index;
2223 * For automatic fan control modes, show current pwm readings.
2224 * Otherwise, show the configured value.
2226 if (index == 0 && data->pwm_enable[nr] > manual)
2227 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
2229 pwm = data->pwm[index][nr];
2231 return sprintf(buf, "%d\n", pwm);
2235 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
2238 struct nct6775_data *data = dev_get_drvdata(dev);
2239 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2241 int index = sattr->index;
2243 int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
2245 = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
2249 err = kstrtoul(buf, 10, &val);
2252 val = clamp_val(val, minval[index], maxval[index]);
2254 mutex_lock(&data->update_lock);
2255 data->pwm[index][nr] = val;
2256 nct6775_write_value(data, data->REG_PWM[index][nr], val);
2257 if (index == 2) { /* floor: disable if val == 0 */
2258 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2262 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2264 mutex_unlock(&data->update_lock);
2268 /* Returns 0 if OK, -EINVAL otherwise */
2269 static int check_trip_points(struct nct6775_data *data, int nr)
2273 for (i = 0; i < data->auto_pwm_num - 1; i++) {
2274 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
2277 for (i = 0; i < data->auto_pwm_num - 1; i++) {
2278 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
2281 /* validate critical temperature and pwm if enabled (pwm > 0) */
2282 if (data->auto_pwm[nr][data->auto_pwm_num]) {
2283 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2284 data->auto_temp[nr][data->auto_pwm_num] ||
2285 data->auto_pwm[nr][data->auto_pwm_num - 1] >
2286 data->auto_pwm[nr][data->auto_pwm_num])
2292 static void pwm_update_registers(struct nct6775_data *data, int nr)
2296 switch (data->pwm_enable[nr]) {
2301 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2302 reg = (reg & ~data->tolerance_mask) |
2303 (data->target_speed_tolerance[nr] & data->tolerance_mask);
2304 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2305 nct6775_write_value(data, data->REG_TARGET[nr],
2306 data->target_speed[nr] & 0xff);
2307 if (data->REG_TOLERANCE_H) {
2308 reg = (data->target_speed[nr] >> 8) & 0x0f;
2309 reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2310 nct6775_write_value(data,
2311 data->REG_TOLERANCE_H[nr],
2315 case thermal_cruise:
2316 nct6775_write_value(data, data->REG_TARGET[nr],
2317 data->target_temp[nr]);
2320 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2321 reg = (reg & ~data->tolerance_mask) |
2322 data->temp_tolerance[0][nr];
2323 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2329 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2331 struct nct6775_data *data = nct6775_update_device(dev);
2332 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2334 return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2338 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2339 const char *buf, size_t count)
2341 struct nct6775_data *data = dev_get_drvdata(dev);
2342 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2343 int nr = sattr->index;
2348 err = kstrtoul(buf, 10, &val);
2355 if (val == sf3 && data->kind != nct6775)
2358 if (val == sf4 && check_trip_points(data, nr)) {
2359 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2360 dev_err(dev, "Adjust trip points and try again\n");
2364 mutex_lock(&data->update_lock);
2365 data->pwm_enable[nr] = val;
2368 * turn off pwm control: select manual mode, set pwm to maximum
2370 data->pwm[0][nr] = 255;
2371 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2373 pwm_update_registers(data, nr);
2374 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2376 reg |= pwm_enable_to_reg(val) << 4;
2377 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2378 mutex_unlock(&data->update_lock);
2383 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2387 for (i = 0; i < NUM_TEMP; i++) {
2388 if (!(data->have_temp & (1 << i)))
2390 if (src == data->temp_src[i]) {
2396 return sprintf(buf, "%d\n", sel);
2400 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2402 struct nct6775_data *data = nct6775_update_device(dev);
2403 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2404 int index = sattr->index;
2406 return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2410 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2411 const char *buf, size_t count)
2413 struct nct6775_data *data = nct6775_update_device(dev);
2414 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2415 int nr = sattr->index;
2419 err = kstrtoul(buf, 10, &val);
2422 if (val == 0 || val > NUM_TEMP)
2424 if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
2427 mutex_lock(&data->update_lock);
2428 src = data->temp_src[val - 1];
2429 data->pwm_temp_sel[nr] = src;
2430 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2433 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2434 mutex_unlock(&data->update_lock);
2440 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2443 struct nct6775_data *data = nct6775_update_device(dev);
2444 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2445 int index = sattr->index;
2447 return show_pwm_temp_sel_common(data, buf,
2448 data->pwm_weight_temp_sel[index]);
2452 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2453 const char *buf, size_t count)
2455 struct nct6775_data *data = nct6775_update_device(dev);
2456 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2457 int nr = sattr->index;
2461 err = kstrtoul(buf, 10, &val);
2466 if (val && (!(data->have_temp & (1 << (val - 1))) ||
2467 !data->temp_src[val - 1]))
2470 mutex_lock(&data->update_lock);
2472 src = data->temp_src[val - 1];
2473 data->pwm_weight_temp_sel[nr] = src;
2474 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2476 reg |= (src | 0x80);
2477 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2479 data->pwm_weight_temp_sel[nr] = 0;
2480 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2482 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2484 mutex_unlock(&data->update_lock);
2490 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2492 struct nct6775_data *data = nct6775_update_device(dev);
2493 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2495 return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2499 store_target_temp(struct device *dev, struct device_attribute *attr,
2500 const char *buf, size_t count)
2502 struct nct6775_data *data = dev_get_drvdata(dev);
2503 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2504 int nr = sattr->index;
2508 err = kstrtoul(buf, 10, &val);
2512 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2513 data->target_temp_mask);
2515 mutex_lock(&data->update_lock);
2516 data->target_temp[nr] = val;
2517 pwm_update_registers(data, nr);
2518 mutex_unlock(&data->update_lock);
2523 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2525 struct nct6775_data *data = nct6775_update_device(dev);
2526 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2527 int nr = sattr->index;
2529 return sprintf(buf, "%d\n",
2530 fan_from_reg16(data->target_speed[nr],
2531 data->fan_div[nr]));
2535 store_target_speed(struct device *dev, struct device_attribute *attr,
2536 const char *buf, size_t count)
2538 struct nct6775_data *data = dev_get_drvdata(dev);
2539 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2540 int nr = sattr->index;
2545 err = kstrtoul(buf, 10, &val);
2549 val = clamp_val(val, 0, 1350000U);
2550 speed = fan_to_reg(val, data->fan_div[nr]);
2552 mutex_lock(&data->update_lock);
2553 data->target_speed[nr] = speed;
2554 pwm_update_registers(data, nr);
2555 mutex_unlock(&data->update_lock);
2560 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2563 struct nct6775_data *data = nct6775_update_device(dev);
2564 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2566 int index = sattr->index;
2568 return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2572 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2573 const char *buf, size_t count)
2575 struct nct6775_data *data = dev_get_drvdata(dev);
2576 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2578 int index = sattr->index;
2582 err = kstrtoul(buf, 10, &val);
2586 /* Limit tolerance as needed */
2587 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2589 mutex_lock(&data->update_lock);
2590 data->temp_tolerance[index][nr] = val;
2592 pwm_update_registers(data, nr);
2594 nct6775_write_value(data,
2595 data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2597 mutex_unlock(&data->update_lock);
2602 * Fan speed tolerance is a tricky beast, since the associated register is
2603 * a tick counter, but the value is reported and configured as rpm.
2604 * Compute resulting low and high rpm values and report the difference.
2607 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2610 struct nct6775_data *data = nct6775_update_device(dev);
2611 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2612 int nr = sattr->index;
2613 int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2614 int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2624 tolerance = (fan_from_reg16(low, data->fan_div[nr])
2625 - fan_from_reg16(high, data->fan_div[nr])) / 2;
2627 return sprintf(buf, "%d\n", tolerance);
2631 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2632 const char *buf, size_t count)
2634 struct nct6775_data *data = dev_get_drvdata(dev);
2635 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2636 int nr = sattr->index;
2641 err = kstrtoul(buf, 10, &val);
2645 high = fan_from_reg16(data->target_speed[nr],
2646 data->fan_div[nr]) + val;
2647 low = fan_from_reg16(data->target_speed[nr],
2648 data->fan_div[nr]) - val;
2654 val = (fan_to_reg(low, data->fan_div[nr]) -
2655 fan_to_reg(high, data->fan_div[nr])) / 2;
2657 /* Limit tolerance as needed */
2658 val = clamp_val(val, 0, data->speed_tolerance_limit);
2660 mutex_lock(&data->update_lock);
2661 data->target_speed_tolerance[nr] = val;
2662 pwm_update_registers(data, nr);
2663 mutex_unlock(&data->update_lock);
2667 SENSOR_TEMPLATE_2(pwm, "pwm%d", S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2668 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", S_IWUSR | S_IRUGO, show_pwm_mode,
2670 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", S_IWUSR | S_IRUGO, show_pwm_enable,
2671 store_pwm_enable, 0);
2672 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", S_IWUSR | S_IRUGO,
2673 show_pwm_temp_sel, store_pwm_temp_sel, 0);
2674 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", S_IWUSR | S_IRUGO,
2675 show_target_temp, store_target_temp, 0);
2676 SENSOR_TEMPLATE(fan_target, "fan%d_target", S_IWUSR | S_IRUGO,
2677 show_target_speed, store_target_speed, 0);
2678 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", S_IWUSR | S_IRUGO,
2679 show_speed_tolerance, store_speed_tolerance, 0);
2681 /* Smart Fan registers */
2684 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2686 struct nct6775_data *data = nct6775_update_device(dev);
2687 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2689 int index = sattr->index;
2691 return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2695 store_weight_temp(struct device *dev, struct device_attribute *attr,
2696 const char *buf, size_t count)
2698 struct nct6775_data *data = dev_get_drvdata(dev);
2699 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2701 int index = sattr->index;
2705 err = kstrtoul(buf, 10, &val);
2709 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2711 mutex_lock(&data->update_lock);
2712 data->weight_temp[index][nr] = val;
2713 nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2714 mutex_unlock(&data->update_lock);
2718 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", S_IWUSR | S_IRUGO,
2719 show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
2720 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step",
2721 S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 0);
2722 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol",
2723 S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 1);
2724 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base",
2725 S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 2);
2726 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step",
2727 S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 5);
2728 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base",
2729 S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 6);
2732 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2734 struct nct6775_data *data = nct6775_update_device(dev);
2735 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2737 int index = sattr->index;
2739 return sprintf(buf, "%d\n",
2740 step_time_from_reg(data->fan_time[index][nr],
2741 data->pwm_mode[nr]));
2745 store_fan_time(struct device *dev, struct device_attribute *attr,
2746 const char *buf, size_t count)
2748 struct nct6775_data *data = dev_get_drvdata(dev);
2749 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2751 int index = sattr->index;
2755 err = kstrtoul(buf, 10, &val);
2759 val = step_time_to_reg(val, data->pwm_mode[nr]);
2760 mutex_lock(&data->update_lock);
2761 data->fan_time[index][nr] = val;
2762 nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2763 mutex_unlock(&data->update_lock);
2767 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
2769 show_name(struct device *dev, struct device_attribute *attr, char *buf)
2771 struct nct6775_data *data = dev_get_drvdata(dev);
2773 return sprintf(buf, "%s\n", data->name);
2776 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
2780 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2782 struct nct6775_data *data = nct6775_update_device(dev);
2783 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2785 return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2789 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2790 const char *buf, size_t count)
2792 struct nct6775_data *data = dev_get_drvdata(dev);
2793 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2795 int point = sattr->index;
2800 err = kstrtoul(buf, 10, &val);
2806 if (point == data->auto_pwm_num) {
2807 if (data->kind != nct6775 && !val)
2809 if (data->kind != nct6779 && val)
2813 mutex_lock(&data->update_lock);
2814 data->auto_pwm[nr][point] = val;
2815 if (point < data->auto_pwm_num) {
2816 nct6775_write_value(data,
2817 NCT6775_AUTO_PWM(data, nr, point),
2818 data->auto_pwm[nr][point]);
2820 switch (data->kind) {
2822 /* disable if needed (pwm == 0) */
2823 reg = nct6775_read_value(data,
2824 NCT6775_REG_CRITICAL_ENAB[nr]);
2829 nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
2833 break; /* always enabled, nothing to do */
2838 nct6775_write_value(data, data->REG_CRITICAL_PWM[nr],
2840 reg = nct6775_read_value(data,
2841 data->REG_CRITICAL_PWM_ENABLE[nr]);
2843 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
2845 reg |= data->CRITICAL_PWM_ENABLE_MASK;
2846 nct6775_write_value(data,
2847 data->REG_CRITICAL_PWM_ENABLE[nr],
2852 mutex_unlock(&data->update_lock);
2857 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
2859 struct nct6775_data *data = nct6775_update_device(dev);
2860 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2862 int point = sattr->index;
2865 * We don't know for sure if the temperature is signed or unsigned.
2866 * Assume it is unsigned.
2868 return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
2872 store_auto_temp(struct device *dev, struct device_attribute *attr,
2873 const char *buf, size_t count)
2875 struct nct6775_data *data = dev_get_drvdata(dev);
2876 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2878 int point = sattr->index;
2882 err = kstrtoul(buf, 10, &val);
2888 mutex_lock(&data->update_lock);
2889 data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
2890 if (point < data->auto_pwm_num) {
2891 nct6775_write_value(data,
2892 NCT6775_AUTO_TEMP(data, nr, point),
2893 data->auto_temp[nr][point]);
2895 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
2896 data->auto_temp[nr][point]);
2898 mutex_unlock(&data->update_lock);
2902 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
2903 struct attribute *attr, int index)
2905 struct device *dev = container_of(kobj, struct device, kobj);
2906 struct nct6775_data *data = dev_get_drvdata(dev);
2907 int pwm = index / 36; /* pwm index */
2908 int nr = index % 36; /* attribute index */
2910 if (!(data->has_pwm & (1 << pwm)))
2913 if ((nr >= 14 && nr <= 18) || nr == 21) /* weight */
2914 if (!data->REG_WEIGHT_TEMP_SEL[pwm])
2916 if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
2918 if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
2920 if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
2923 if (nr >= 22 && nr <= 35) { /* auto point */
2924 int api = (nr - 22) / 2; /* auto point index */
2926 if (api > data->auto_pwm_num)
2932 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", S_IWUSR | S_IRUGO,
2933 show_fan_time, store_fan_time, 0, 0);
2934 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", S_IWUSR | S_IRUGO,
2935 show_fan_time, store_fan_time, 0, 1);
2936 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", S_IWUSR | S_IRUGO,
2937 show_fan_time, store_fan_time, 0, 2);
2938 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", S_IWUSR | S_IRUGO, show_pwm,
2940 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", S_IWUSR | S_IRUGO, show_pwm,
2942 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", S_IWUSR | S_IRUGO,
2943 show_temp_tolerance, store_temp_tolerance, 0, 0);
2944 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance",
2945 S_IWUSR | S_IRUGO, show_temp_tolerance, store_temp_tolerance,
2948 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2951 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", S_IWUSR | S_IRUGO, show_pwm,
2954 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm",
2955 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 0);
2956 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp",
2957 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 0);
2959 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm",
2960 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 1);
2961 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp",
2962 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 1);
2964 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm",
2965 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 2);
2966 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp",
2967 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 2);
2969 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm",
2970 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 3);
2971 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp",
2972 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 3);
2974 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm",
2975 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 4);
2976 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp",
2977 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 4);
2979 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm",
2980 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 5);
2981 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp",
2982 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 5);
2984 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm",
2985 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 6);
2986 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp",
2987 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 6);
2990 * nct6775_pwm_is_visible uses the index into the following array
2991 * to determine if attributes should be created or not.
2992 * Any change in order or content must be matched.
2994 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
2995 &sensor_dev_template_pwm,
2996 &sensor_dev_template_pwm_mode,
2997 &sensor_dev_template_pwm_enable,
2998 &sensor_dev_template_pwm_temp_sel,
2999 &sensor_dev_template_pwm_temp_tolerance,
3000 &sensor_dev_template_pwm_crit_temp_tolerance,
3001 &sensor_dev_template_pwm_target_temp,
3002 &sensor_dev_template_fan_target,
3003 &sensor_dev_template_fan_tolerance,
3004 &sensor_dev_template_pwm_stop_time,
3005 &sensor_dev_template_pwm_step_up_time,
3006 &sensor_dev_template_pwm_step_down_time,
3007 &sensor_dev_template_pwm_start,
3008 &sensor_dev_template_pwm_floor,
3009 &sensor_dev_template_pwm_weight_temp_sel, /* 14 */
3010 &sensor_dev_template_pwm_weight_temp_step,
3011 &sensor_dev_template_pwm_weight_temp_step_tol,
3012 &sensor_dev_template_pwm_weight_temp_step_base,
3013 &sensor_dev_template_pwm_weight_duty_step, /* 18 */
3014 &sensor_dev_template_pwm_max, /* 19 */
3015 &sensor_dev_template_pwm_step, /* 20 */
3016 &sensor_dev_template_pwm_weight_duty_base, /* 21 */
3017 &sensor_dev_template_pwm_auto_point1_pwm, /* 22 */
3018 &sensor_dev_template_pwm_auto_point1_temp,
3019 &sensor_dev_template_pwm_auto_point2_pwm,
3020 &sensor_dev_template_pwm_auto_point2_temp,
3021 &sensor_dev_template_pwm_auto_point3_pwm,
3022 &sensor_dev_template_pwm_auto_point3_temp,
3023 &sensor_dev_template_pwm_auto_point4_pwm,
3024 &sensor_dev_template_pwm_auto_point4_temp,
3025 &sensor_dev_template_pwm_auto_point5_pwm,
3026 &sensor_dev_template_pwm_auto_point5_temp,
3027 &sensor_dev_template_pwm_auto_point6_pwm,
3028 &sensor_dev_template_pwm_auto_point6_temp,
3029 &sensor_dev_template_pwm_auto_point7_pwm,
3030 &sensor_dev_template_pwm_auto_point7_temp, /* 35 */
3035 static struct sensor_template_group nct6775_pwm_template_group = {
3036 .templates = nct6775_attributes_pwm_template,
3037 .is_visible = nct6775_pwm_is_visible,
3042 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
3044 struct nct6775_data *data = dev_get_drvdata(dev);
3046 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
3049 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
3051 /* Case open detection */
3054 clear_caseopen(struct device *dev, struct device_attribute *attr,
3055 const char *buf, size_t count)
3057 struct nct6775_data *data = dev_get_drvdata(dev);
3058 int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
3063 if (kstrtoul(buf, 10, &val) || val != 0)
3066 mutex_lock(&data->update_lock);
3069 * Use CR registers to clear caseopen status.
3070 * The CR registers are the same for all chips, and not all chips
3071 * support clearing the caseopen status through "regular" registers.
3073 ret = superio_enter(data->sioreg);
3079 superio_select(data->sioreg, NCT6775_LD_ACPI);
3080 reg = superio_inb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
3081 reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3082 superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3083 reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3084 superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3085 superio_exit(data->sioreg);
3087 data->valid = false; /* Force cache refresh */
3089 mutex_unlock(&data->update_lock);
3093 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
3094 clear_caseopen, INTRUSION_ALARM_BASE);
3095 static SENSOR_DEVICE_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
3096 clear_caseopen, INTRUSION_ALARM_BASE + 1);
3097 static SENSOR_DEVICE_ATTR(intrusion0_beep, S_IWUSR | S_IRUGO, show_beep,
3098 store_beep, INTRUSION_ALARM_BASE);
3099 static SENSOR_DEVICE_ATTR(intrusion1_beep, S_IWUSR | S_IRUGO, show_beep,
3100 store_beep, INTRUSION_ALARM_BASE + 1);
3101 static SENSOR_DEVICE_ATTR(beep_enable, S_IWUSR | S_IRUGO, show_beep,
3102 store_beep, BEEP_ENABLE_BASE);
3104 static umode_t nct6775_other_is_visible(struct kobject *kobj,
3105 struct attribute *attr, int index)
3107 struct device *dev = container_of(kobj, struct device, kobj);
3108 struct nct6775_data *data = dev_get_drvdata(dev);
3110 if (index == 0 && !data->have_vid)
3113 if (index == 1 || index == 2) {
3114 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + index - 1] < 0)
3118 if (index == 3 || index == 4) {
3119 if (data->BEEP_BITS[INTRUSION_ALARM_BASE + index - 3] < 0)
3127 * nct6775_other_is_visible uses the index into the following array
3128 * to determine if attributes should be created or not.
3129 * Any change in order or content must be matched.
3131 static struct attribute *nct6775_attributes_other[] = {
3132 &dev_attr_cpu0_vid.attr, /* 0 */
3133 &sensor_dev_attr_intrusion0_alarm.dev_attr.attr, /* 1 */
3134 &sensor_dev_attr_intrusion1_alarm.dev_attr.attr, /* 2 */
3135 &sensor_dev_attr_intrusion0_beep.dev_attr.attr, /* 3 */
3136 &sensor_dev_attr_intrusion1_beep.dev_attr.attr, /* 4 */
3137 &sensor_dev_attr_beep_enable.dev_attr.attr, /* 5 */
3138 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
3139 &dev_attr_name.attr,
3144 static const struct attribute_group nct6775_group_other = {
3145 .attrs = nct6775_attributes_other,
3146 .is_visible = nct6775_other_is_visible,
3149 static inline void nct6775_init_device(struct nct6775_data *data)
3154 /* Start monitoring if needed */
3155 if (data->REG_CONFIG) {
3156 tmp = nct6775_read_value(data, data->REG_CONFIG);
3158 nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
3161 /* Enable temperature sensors if needed */
3162 for (i = 0; i < NUM_TEMP; i++) {
3163 if (!(data->have_temp & (1 << i)))
3165 if (!data->reg_temp_config[i])
3167 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
3169 nct6775_write_value(data, data->reg_temp_config[i],
3173 /* Enable VBAT monitoring if needed */
3174 tmp = nct6775_read_value(data, data->REG_VBAT);
3176 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
3178 diode = nct6775_read_value(data, data->REG_DIODE);
3180 for (i = 0; i < data->temp_fixed_num; i++) {
3181 if (!(data->have_temp_fixed & (1 << i)))
3183 if ((tmp & (data->DIODE_MASK << i))) /* diode */
3185 = 3 - ((diode >> i) & data->DIODE_MASK);
3186 else /* thermistor */
3187 data->temp_type[i] = 4;
3192 nct6775_check_fan_inputs(struct nct6775_data *data)
3194 bool fan3pin, fan4pin, fan4min, fan5pin, fan6pin;
3195 bool pwm3pin, pwm4pin, pwm5pin, pwm6pin;
3196 int sioreg = data->sioreg;
3199 /* fan4 and fan5 share some pins with the GPIO and serial flash */
3200 if (data->kind == nct6775) {
3201 regval = superio_inb(sioreg, 0x2c);
3203 fan3pin = regval & (1 << 6);
3204 pwm3pin = regval & (1 << 7);
3206 /* On NCT6775, fan4 shares pins with the fdc interface */
3207 fan4pin = !(superio_inb(sioreg, 0x2A) & 0x80);
3214 } else if (data->kind == nct6776) {
3215 bool gpok = superio_inb(sioreg, 0x27) & 0x80;
3217 superio_select(sioreg, NCT6775_LD_HWM);
3218 regval = superio_inb(sioreg, SIO_REG_ENABLE);
3223 fan3pin = !(superio_inb(sioreg, 0x24) & 0x40);
3228 fan4pin = superio_inb(sioreg, 0x1C) & 0x01;
3233 fan5pin = superio_inb(sioreg, 0x1C) & 0x02;
3241 } else if (data->kind == nct6106) {
3242 regval = superio_inb(sioreg, 0x24);
3243 fan3pin = !(regval & 0x80);
3244 pwm3pin = regval & 0x08;
3253 } else { /* NCT6779D, NCT6791D, or NCT6792D */
3254 regval = superio_inb(sioreg, 0x1c);
3256 fan3pin = !(regval & (1 << 5));
3257 fan4pin = !(regval & (1 << 6));
3258 fan5pin = !(regval & (1 << 7));
3260 pwm3pin = !(regval & (1 << 0));
3261 pwm4pin = !(regval & (1 << 1));
3262 pwm5pin = !(regval & (1 << 2));
3266 if (data->kind == nct6791 || data->kind == nct6792) {
3267 regval = superio_inb(sioreg, 0x2d);
3268 fan6pin = (regval & (1 << 1));
3269 pwm6pin = (regval & (1 << 0));
3270 } else { /* NCT6779D */
3276 /* fan 1 and 2 (0x03) are always present */
3277 data->has_fan = 0x03 | (fan3pin << 2) | (fan4pin << 3) |
3278 (fan5pin << 4) | (fan6pin << 5);
3279 data->has_fan_min = 0x03 | (fan3pin << 2) | (fan4min << 3) |
3281 data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) |
3282 (pwm5pin << 4) | (pwm6pin << 5);
3285 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
3286 int *available, int *mask)
3291 for (i = 0; i < data->pwm_num && *available; i++) {
3296 src = nct6775_read_value(data, regp[i]);
3298 if (!src || (*mask & (1 << src)))
3300 if (src >= data->temp_label_num ||
3301 !strlen(data->temp_label[src]))
3304 index = __ffs(*available);
3305 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3306 *available &= ~(1 << index);
3311 static int nct6775_probe(struct platform_device *pdev)
3313 struct device *dev = &pdev->dev;
3314 struct nct6775_sio_data *sio_data = dev_get_platdata(dev);
3315 struct nct6775_data *data;
3316 struct resource *res;
3318 int src, mask, available;
3319 const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3320 const u16 *reg_temp_mon, *reg_temp_alternate, *reg_temp_crit;
3321 const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL;
3322 int num_reg_temp, num_reg_temp_mon;
3324 struct attribute_group *group;
3325 struct device *hwmon_dev;
3326 int num_attr_groups = 0;
3328 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3329 if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3333 data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3338 data->kind = sio_data->kind;
3339 data->sioreg = sio_data->sioreg;
3340 data->addr = res->start;
3341 mutex_init(&data->update_lock);
3342 data->name = nct6775_device_names[data->kind];
3343 data->bank = 0xff; /* Force initial bank selection */
3344 platform_set_drvdata(pdev, data);
3346 switch (data->kind) {
3350 data->auto_pwm_num = 4;
3351 data->temp_fixed_num = 3;
3352 data->num_temp_alarms = 6;
3353 data->num_temp_beeps = 6;
3355 data->fan_from_reg = fan_from_reg13;
3356 data->fan_from_reg_min = fan_from_reg13;
3358 data->temp_label = nct6776_temp_label;
3359 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3361 data->REG_VBAT = NCT6106_REG_VBAT;
3362 data->REG_DIODE = NCT6106_REG_DIODE;
3363 data->DIODE_MASK = NCT6106_DIODE_MASK;
3364 data->REG_VIN = NCT6106_REG_IN;
3365 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3366 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3367 data->REG_TARGET = NCT6106_REG_TARGET;
3368 data->REG_FAN = NCT6106_REG_FAN;
3369 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
3370 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
3371 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
3372 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
3373 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
3374 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
3375 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
3376 data->REG_PWM[0] = NCT6106_REG_PWM;
3377 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
3378 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
3379 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3380 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3381 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3382 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3383 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3384 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
3385 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
3386 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
3387 data->REG_CRITICAL_TEMP_TOLERANCE
3388 = NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
3389 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
3390 data->CRITICAL_PWM_ENABLE_MASK
3391 = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3392 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
3393 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3394 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3395 data->REG_TEMP_SEL = NCT6106_REG_TEMP_SEL;
3396 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3397 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3398 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3399 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3400 data->REG_ALARM = NCT6106_REG_ALARM;
3401 data->ALARM_BITS = NCT6106_ALARM_BITS;
3402 data->REG_BEEP = NCT6106_REG_BEEP;
3403 data->BEEP_BITS = NCT6106_BEEP_BITS;
3405 reg_temp = NCT6106_REG_TEMP;
3406 reg_temp_mon = NCT6106_REG_TEMP_MON;
3407 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3408 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON);
3409 reg_temp_over = NCT6106_REG_TEMP_OVER;
3410 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3411 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3412 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3413 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3414 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3415 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3421 data->auto_pwm_num = 6;
3422 data->has_fan_div = true;
3423 data->temp_fixed_num = 3;
3424 data->num_temp_alarms = 3;
3425 data->num_temp_beeps = 3;
3427 data->ALARM_BITS = NCT6775_ALARM_BITS;
3428 data->BEEP_BITS = NCT6775_BEEP_BITS;
3430 data->fan_from_reg = fan_from_reg16;
3431 data->fan_from_reg_min = fan_from_reg8;
3432 data->target_temp_mask = 0x7f;
3433 data->tolerance_mask = 0x0f;
3434 data->speed_tolerance_limit = 15;
3436 data->temp_label = nct6775_temp_label;
3437 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
3439 data->REG_CONFIG = NCT6775_REG_CONFIG;
3440 data->REG_VBAT = NCT6775_REG_VBAT;
3441 data->REG_DIODE = NCT6775_REG_DIODE;
3442 data->DIODE_MASK = NCT6775_DIODE_MASK;
3443 data->REG_VIN = NCT6775_REG_IN;
3444 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3445 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3446 data->REG_TARGET = NCT6775_REG_TARGET;
3447 data->REG_FAN = NCT6775_REG_FAN;
3448 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3449 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3450 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3451 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3452 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3453 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3454 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3455 data->REG_PWM[0] = NCT6775_REG_PWM;
3456 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3457 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3458 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3459 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3460 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3461 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3462 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3463 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3464 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3465 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3466 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3467 data->REG_CRITICAL_TEMP_TOLERANCE
3468 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3469 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3470 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3471 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3472 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3473 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3474 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3475 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3476 data->REG_ALARM = NCT6775_REG_ALARM;
3477 data->REG_BEEP = NCT6775_REG_BEEP;
3479 reg_temp = NCT6775_REG_TEMP;
3480 reg_temp_mon = NCT6775_REG_TEMP_MON;
3481 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3482 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3483 reg_temp_over = NCT6775_REG_TEMP_OVER;
3484 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3485 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3486 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3487 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3493 data->auto_pwm_num = 4;
3494 data->has_fan_div = false;
3495 data->temp_fixed_num = 3;
3496 data->num_temp_alarms = 3;
3497 data->num_temp_beeps = 6;
3499 data->ALARM_BITS = NCT6776_ALARM_BITS;
3500 data->BEEP_BITS = NCT6776_BEEP_BITS;
3502 data->fan_from_reg = fan_from_reg13;
3503 data->fan_from_reg_min = fan_from_reg13;
3504 data->target_temp_mask = 0xff;
3505 data->tolerance_mask = 0x07;
3506 data->speed_tolerance_limit = 63;
3508 data->temp_label = nct6776_temp_label;
3509 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3511 data->REG_CONFIG = NCT6775_REG_CONFIG;
3512 data->REG_VBAT = NCT6775_REG_VBAT;
3513 data->REG_DIODE = NCT6775_REG_DIODE;
3514 data->DIODE_MASK = NCT6775_DIODE_MASK;
3515 data->REG_VIN = NCT6775_REG_IN;
3516 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3517 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3518 data->REG_TARGET = NCT6775_REG_TARGET;
3519 data->REG_FAN = NCT6775_REG_FAN;
3520 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3521 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3522 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3523 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3524 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3525 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3526 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3527 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3528 data->REG_PWM[0] = NCT6775_REG_PWM;
3529 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3530 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3531 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3532 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3533 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3534 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3535 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3536 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3537 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3538 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3539 data->REG_CRITICAL_TEMP_TOLERANCE
3540 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3541 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3542 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3543 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3544 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3545 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3546 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3547 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3548 data->REG_ALARM = NCT6775_REG_ALARM;
3549 data->REG_BEEP = NCT6776_REG_BEEP;
3551 reg_temp = NCT6775_REG_TEMP;
3552 reg_temp_mon = NCT6775_REG_TEMP_MON;
3553 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3554 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3555 reg_temp_over = NCT6775_REG_TEMP_OVER;
3556 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3557 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3558 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3559 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3565 data->auto_pwm_num = 4;
3566 data->has_fan_div = false;
3567 data->temp_fixed_num = 6;
3568 data->num_temp_alarms = 2;
3569 data->num_temp_beeps = 2;
3571 data->ALARM_BITS = NCT6779_ALARM_BITS;
3572 data->BEEP_BITS = NCT6779_BEEP_BITS;
3574 data->fan_from_reg = fan_from_reg13;
3575 data->fan_from_reg_min = fan_from_reg13;
3576 data->target_temp_mask = 0xff;
3577 data->tolerance_mask = 0x07;
3578 data->speed_tolerance_limit = 63;
3580 data->temp_label = nct6779_temp_label;
3581 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3583 data->REG_CONFIG = NCT6775_REG_CONFIG;
3584 data->REG_VBAT = NCT6775_REG_VBAT;
3585 data->REG_DIODE = NCT6775_REG_DIODE;
3586 data->DIODE_MASK = NCT6775_DIODE_MASK;
3587 data->REG_VIN = NCT6779_REG_IN;
3588 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3589 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3590 data->REG_TARGET = NCT6775_REG_TARGET;
3591 data->REG_FAN = NCT6779_REG_FAN;
3592 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3593 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3594 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3595 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3596 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3597 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3598 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3599 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3600 data->REG_PWM[0] = NCT6775_REG_PWM;
3601 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3602 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3603 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3604 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3605 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3606 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3607 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3608 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3609 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3610 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3611 data->REG_CRITICAL_TEMP_TOLERANCE
3612 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3613 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3614 data->CRITICAL_PWM_ENABLE_MASK
3615 = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3616 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3617 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3618 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3619 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3620 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3621 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3622 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3623 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3624 data->REG_ALARM = NCT6779_REG_ALARM;
3625 data->REG_BEEP = NCT6776_REG_BEEP;
3627 reg_temp = NCT6779_REG_TEMP;
3628 reg_temp_mon = NCT6779_REG_TEMP_MON;
3629 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3630 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3631 reg_temp_over = NCT6779_REG_TEMP_OVER;
3632 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3633 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3634 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3635 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3642 data->auto_pwm_num = 4;
3643 data->has_fan_div = false;
3644 data->temp_fixed_num = 6;
3645 data->num_temp_alarms = 2;
3646 data->num_temp_beeps = 2;
3648 data->ALARM_BITS = NCT6791_ALARM_BITS;
3649 data->BEEP_BITS = NCT6779_BEEP_BITS;
3651 data->fan_from_reg = fan_from_reg13;
3652 data->fan_from_reg_min = fan_from_reg13;
3653 data->target_temp_mask = 0xff;
3654 data->tolerance_mask = 0x07;
3655 data->speed_tolerance_limit = 63;
3657 data->temp_label = nct6779_temp_label;
3658 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3660 data->REG_CONFIG = NCT6775_REG_CONFIG;
3661 data->REG_VBAT = NCT6775_REG_VBAT;
3662 data->REG_DIODE = NCT6775_REG_DIODE;
3663 data->DIODE_MASK = NCT6775_DIODE_MASK;
3664 data->REG_VIN = NCT6779_REG_IN;
3665 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3666 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3667 data->REG_TARGET = NCT6775_REG_TARGET;
3668 data->REG_FAN = NCT6779_REG_FAN;
3669 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3670 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3671 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3672 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3673 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3674 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3675 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3676 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3677 data->REG_PWM[0] = NCT6775_REG_PWM;
3678 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3679 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3680 data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP;
3681 data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE;
3682 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3683 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3684 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3685 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3686 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3687 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3688 data->REG_CRITICAL_TEMP_TOLERANCE
3689 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3690 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3691 data->CRITICAL_PWM_ENABLE_MASK
3692 = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3693 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3694 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3695 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3696 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3697 data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL;
3698 data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP;
3699 data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL;
3700 data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE;
3701 data->REG_ALARM = NCT6791_REG_ALARM;
3702 if (data->kind == nct6791)
3703 data->REG_BEEP = NCT6776_REG_BEEP;
3705 data->REG_BEEP = NCT6792_REG_BEEP;
3707 reg_temp = NCT6779_REG_TEMP;
3708 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3709 if (data->kind == nct6791) {
3710 reg_temp_mon = NCT6779_REG_TEMP_MON;
3711 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3713 reg_temp_mon = NCT6792_REG_TEMP_MON;
3714 num_reg_temp_mon = ARRAY_SIZE(NCT6792_REG_TEMP_MON);
3716 reg_temp_over = NCT6779_REG_TEMP_OVER;
3717 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3718 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3719 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3720 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3726 data->have_in = (1 << data->in_num) - 1;
3727 data->have_temp = 0;
3730 * On some boards, not all available temperature sources are monitored,
3731 * even though some of the monitoring registers are unused.
3732 * Get list of unused monitoring registers, then detect if any fan
3733 * controls are configured to use unmonitored temperature sources.
3734 * If so, assign the unmonitored temperature sources to available
3735 * monitoring registers.
3739 for (i = 0; i < num_reg_temp; i++) {
3740 if (reg_temp[i] == 0)
3743 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3744 if (!src || (mask & (1 << src)))
3745 available |= 1 << i;
3751 * Now find unmonitored temperature registers and enable monitoring
3752 * if additional monitoring registers are available.
3754 add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
3755 add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
3758 s = NUM_TEMP_FIXED; /* First dynamic temperature attribute */
3759 for (i = 0; i < num_reg_temp; i++) {
3760 if (reg_temp[i] == 0)
3763 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3764 if (!src || (mask & (1 << src)))
3767 if (src >= data->temp_label_num ||
3768 !strlen(data->temp_label[src])) {
3770 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3771 src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
3777 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3778 if (src <= data->temp_fixed_num) {
3779 data->have_temp |= 1 << (src - 1);
3780 data->have_temp_fixed |= 1 << (src - 1);
3781 data->reg_temp[0][src - 1] = reg_temp[i];
3782 data->reg_temp[1][src - 1] = reg_temp_over[i];
3783 data->reg_temp[2][src - 1] = reg_temp_hyst[i];
3784 if (reg_temp_crit_h && reg_temp_crit_h[i])
3785 data->reg_temp[3][src - 1] = reg_temp_crit_h[i];
3786 else if (reg_temp_crit[src - 1])
3787 data->reg_temp[3][src - 1]
3788 = reg_temp_crit[src - 1];
3789 if (reg_temp_crit_l && reg_temp_crit_l[i])
3790 data->reg_temp[4][src - 1] = reg_temp_crit_l[i];
3791 data->reg_temp_config[src - 1] = reg_temp_config[i];
3792 data->temp_src[src - 1] = src;
3799 /* Use dynamic index for other sources */
3800 data->have_temp |= 1 << s;
3801 data->reg_temp[0][s] = reg_temp[i];
3802 data->reg_temp[1][s] = reg_temp_over[i];
3803 data->reg_temp[2][s] = reg_temp_hyst[i];
3804 data->reg_temp_config[s] = reg_temp_config[i];
3805 if (reg_temp_crit_h && reg_temp_crit_h[i])
3806 data->reg_temp[3][s] = reg_temp_crit_h[i];
3807 else if (reg_temp_crit[src - 1])
3808 data->reg_temp[3][s] = reg_temp_crit[src - 1];
3809 if (reg_temp_crit_l && reg_temp_crit_l[i])
3810 data->reg_temp[4][s] = reg_temp_crit_l[i];
3812 data->temp_src[s] = src;
3817 * Repeat with temperatures used for fan control.
3818 * This set of registers does not support limits.
3820 for (i = 0; i < num_reg_temp_mon; i++) {
3821 if (reg_temp_mon[i] == 0)
3824 src = nct6775_read_value(data, data->REG_TEMP_SEL[i]) & 0x1f;
3825 if (!src || (mask & (1 << src)))
3828 if (src >= data->temp_label_num ||
3829 !strlen(data->temp_label[src])) {
3831 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3832 src, i, data->REG_TEMP_SEL[i],
3839 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3840 if (src <= data->temp_fixed_num) {
3841 if (data->have_temp & (1 << (src - 1)))
3843 data->have_temp |= 1 << (src - 1);
3844 data->have_temp_fixed |= 1 << (src - 1);
3845 data->reg_temp[0][src - 1] = reg_temp_mon[i];
3846 data->temp_src[src - 1] = src;
3853 /* Use dynamic index for other sources */
3854 data->have_temp |= 1 << s;
3855 data->reg_temp[0][s] = reg_temp_mon[i];
3856 data->temp_src[s] = src;
3860 #ifdef USE_ALTERNATE
3862 * Go through the list of alternate temp registers and enable
3864 * The temperature is already monitored if the respective bit in <mask>
3867 for (i = 0; i < data->temp_label_num - 1; i++) {
3868 if (!reg_temp_alternate[i])
3870 if (mask & (1 << (i + 1)))
3872 if (i < data->temp_fixed_num) {
3873 if (data->have_temp & (1 << i))
3875 data->have_temp |= 1 << i;
3876 data->have_temp_fixed |= 1 << i;
3877 data->reg_temp[0][i] = reg_temp_alternate[i];
3878 if (i < num_reg_temp) {
3879 data->reg_temp[1][i] = reg_temp_over[i];
3880 data->reg_temp[2][i] = reg_temp_hyst[i];
3882 data->temp_src[i] = i + 1;
3886 if (s >= NUM_TEMP) /* Abort if no more space */
3889 data->have_temp |= 1 << s;
3890 data->reg_temp[0][s] = reg_temp_alternate[i];
3891 data->temp_src[s] = i + 1;
3894 #endif /* USE_ALTERNATE */
3896 /* Initialize the chip */
3897 nct6775_init_device(data);
3899 err = superio_enter(sio_data->sioreg);
3903 cr2a = superio_inb(sio_data->sioreg, 0x2a);
3904 switch (data->kind) {
3906 data->have_vid = (cr2a & 0x40);
3909 data->have_vid = (cr2a & 0x60) == 0x40;
3920 * We can get the VID input values directly at logical device D 0xe3.
3922 if (data->have_vid) {
3923 superio_select(sio_data->sioreg, NCT6775_LD_VID);
3924 data->vid = superio_inb(sio_data->sioreg, 0xe3);
3925 data->vrm = vid_which_vrm();
3931 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3932 tmp = superio_inb(sio_data->sioreg,
3933 NCT6775_REG_CR_FAN_DEBOUNCE);
3934 switch (data->kind) {
3950 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
3952 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
3956 nct6775_check_fan_inputs(data);
3958 superio_exit(sio_data->sioreg);
3960 /* Read fan clock dividers immediately */
3961 nct6775_init_fan_common(dev, data);
3963 /* Register sysfs hooks */
3964 group = nct6775_create_attr_group(dev, &nct6775_pwm_template_group,
3967 return PTR_ERR(group);
3969 data->groups[num_attr_groups++] = group;
3971 group = nct6775_create_attr_group(dev, &nct6775_in_template_group,
3972 fls(data->have_in));
3974 return PTR_ERR(group);
3976 data->groups[num_attr_groups++] = group;
3978 group = nct6775_create_attr_group(dev, &nct6775_fan_template_group,
3979 fls(data->has_fan));
3981 return PTR_ERR(group);
3983 data->groups[num_attr_groups++] = group;
3985 group = nct6775_create_attr_group(dev, &nct6775_temp_template_group,
3986 fls(data->have_temp));
3988 return PTR_ERR(group);
3990 data->groups[num_attr_groups++] = group;
3991 data->groups[num_attr_groups++] = &nct6775_group_other;
3993 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
3994 err = sysfs_create_groups(&dev->kobj, data->groups);
3997 hwmon_dev = hwmon_device_register(dev);
3998 if (IS_ERR(hwmon_dev)) {
3999 sysfs_remove_groups(&dev->kobj, data->groups);
4000 return PTR_ERR(hwmon_dev);
4002 data->hwmon_dev = hwmon_dev;
4004 hwmon_dev = devm_hwmon_device_register_with_groups(dev, data->name,
4005 data, data->groups);
4007 return PTR_ERR_OR_ZERO(hwmon_dev);
4010 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4011 static int nct6775_remove(struct platform_device *pdev)
4013 struct nct6775_data *data = platform_get_drvdata(pdev);
4015 hwmon_device_unregister(data->hwmon_dev);
4016 sysfs_remove_groups(&pdev->dev.kobj, data->groups);
4021 static void nct6791_enable_io_mapping(int sioaddr)
4025 val = superio_inb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE);
4027 pr_info("Enabling hardware monitor logical device mappings.\n");
4028 superio_outb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE,
4033 static int __maybe_unused nct6775_suspend(struct device *dev)
4035 struct nct6775_data *data = nct6775_update_device(dev);
4037 mutex_lock(&data->update_lock);
4038 data->vbat = nct6775_read_value(data, data->REG_VBAT);
4039 if (data->kind == nct6775) {
4040 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
4041 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
4043 mutex_unlock(&data->update_lock);
4048 static int __maybe_unused nct6775_resume(struct device *dev)
4050 struct nct6775_data *data = dev_get_drvdata(dev);
4053 mutex_lock(&data->update_lock);
4054 data->bank = 0xff; /* Force initial bank selection */
4056 if (data->kind == nct6791 || data->kind == nct6792) {
4057 err = superio_enter(data->sioreg);
4061 nct6791_enable_io_mapping(data->sioreg);
4062 superio_exit(data->sioreg);
4065 /* Restore limits */
4066 for (i = 0; i < data->in_num; i++) {
4067 if (!(data->have_in & (1 << i)))
4070 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
4072 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
4076 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
4077 if (!(data->has_fan_min & (1 << i)))
4080 nct6775_write_value(data, data->REG_FAN_MIN[i],
4084 for (i = 0; i < NUM_TEMP; i++) {
4085 if (!(data->have_temp & (1 << i)))
4088 for (j = 1; j < ARRAY_SIZE(data->reg_temp); j++)
4089 if (data->reg_temp[j][i])
4090 nct6775_write_temp(data, data->reg_temp[j][i],
4094 /* Restore other settings */
4095 nct6775_write_value(data, data->REG_VBAT, data->vbat);
4096 if (data->kind == nct6775) {
4097 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
4098 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
4102 /* Force re-reading all values */
4103 data->valid = false;
4104 mutex_unlock(&data->update_lock);
4109 static SIMPLE_DEV_PM_OPS(nct6775_dev_pm_ops, nct6775_suspend, nct6775_resume);
4111 static struct platform_driver nct6775_driver = {
4113 .owner = THIS_MODULE,
4115 .pm = &nct6775_dev_pm_ops,
4117 .probe = nct6775_probe,
4118 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4119 .remove = nct6775_remove,
4123 static const char * const nct6775_sio_names[] __initconst = {
4132 /* nct6775_find() looks for a '627 in the Super-I/O config space */
4133 static int __init nct6775_find(int sioaddr, struct nct6775_sio_data *sio_data)
4139 err = superio_enter(sioaddr);
4146 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
4147 | superio_inb(sioaddr, SIO_REG_DEVID + 1);
4148 switch (val & SIO_ID_MASK) {
4149 case SIO_NCT6106_ID:
4150 sio_data->kind = nct6106;
4152 case SIO_NCT6775_ID:
4153 sio_data->kind = nct6775;
4155 case SIO_NCT6776_ID:
4156 sio_data->kind = nct6776;
4158 case SIO_NCT6779_ID:
4159 sio_data->kind = nct6779;
4161 case SIO_NCT6791_ID:
4162 sio_data->kind = nct6791;
4164 case SIO_NCT6792_ID:
4165 sio_data->kind = nct6792;
4169 pr_debug("unsupported chip ID: 0x%04x\n", val);
4170 superio_exit(sioaddr);
4174 /* We have a known chip, find the HWM I/O address */
4175 superio_select(sioaddr, NCT6775_LD_HWM);
4176 val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
4177 | superio_inb(sioaddr, SIO_REG_ADDR + 1);
4178 addr = val & IOREGION_ALIGNMENT;
4180 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
4181 superio_exit(sioaddr);
4185 /* Activate logical device if needed */
4186 val = superio_inb(sioaddr, SIO_REG_ENABLE);
4187 if (!(val & 0x01)) {
4188 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
4189 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
4192 if (sio_data->kind == nct6791 || sio_data->kind == nct6792)
4193 nct6791_enable_io_mapping(sioaddr);
4195 superio_exit(sioaddr);
4196 pr_info("Found %s or compatible chip at %#x:%#x\n",
4197 nct6775_sio_names[sio_data->kind], sioaddr, addr);
4198 sio_data->sioreg = sioaddr;
4204 * when Super-I/O functions move to a separate file, the Super-I/O
4205 * bus will manage the lifetime of the device and this module will only keep
4206 * track of the nct6775 driver. But since we use platform_device_alloc(), we
4207 * must keep track of the device
4209 static struct platform_device *pdev[2];
4211 static int __init sensors_nct6775_init(void)
4216 struct resource res;
4217 struct nct6775_sio_data sio_data;
4218 int sioaddr[2] = { 0x2e, 0x4e };
4220 err = platform_driver_register(&nct6775_driver);
4225 * initialize sio_data->kind and sio_data->sioreg.
4227 * when Super-I/O functions move to a separate file, the Super-I/O
4228 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
4229 * nct6775 hardware monitor, and call probe()
4231 for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4232 address = nct6775_find(sioaddr[i], &sio_data);
4238 pdev[i] = platform_device_alloc(DRVNAME, address);
4241 goto exit_device_unregister;
4244 err = platform_device_add_data(pdev[i], &sio_data,
4245 sizeof(struct nct6775_sio_data));
4247 goto exit_device_put;
4249 memset(&res, 0, sizeof(res));
4251 res.start = address + IOREGION_OFFSET;
4252 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
4253 res.flags = IORESOURCE_IO;
4255 err = acpi_check_resource_conflict(&res);
4257 platform_device_put(pdev[i]);
4262 err = platform_device_add_resources(pdev[i], &res, 1);
4264 goto exit_device_put;
4266 /* platform_device_add calls probe() */
4267 err = platform_device_add(pdev[i]);
4269 goto exit_device_put;
4273 goto exit_unregister;
4279 platform_device_put(pdev[i]);
4280 exit_device_unregister:
4283 platform_device_unregister(pdev[i]);
4286 platform_driver_unregister(&nct6775_driver);
4290 static void __exit sensors_nct6775_exit(void)
4294 for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4296 platform_device_unregister(pdev[i]);
4298 platform_driver_unregister(&nct6775_driver);
4301 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4302 MODULE_DESCRIPTION("NCT6106D/NCT6775F/NCT6776F/NCT6779D/NCT6791D/NCT6792D driver");
4303 MODULE_LICENSE("GPL");
4305 module_init(sensors_nct6775_init);
4306 module_exit(sensors_nct6775_exit);