git.sur5r.net Git - groeck-nct6775/blob - nct6775.c

   1 /*
   2  * nct6775 - Driver for the hardware monitoring functionality of
   3  *             Nuvoton NCT677x Super-I/O chips
   4  *
   5  * Copyright (C) 2012  Guenter Roeck <linux@roeck-us.net>
   6  *
   7  * Derived from w83627ehf driver
   8  * Copyright (C) 2005-2012  Jean Delvare <jdelvare@suse.de>
   9  * Copyright (C) 2006  Yuan Mu (Winbond),
  10  *                     Rudolf Marek <r.marek@assembler.cz>
  11  *                     David Hubbard <david.c.hubbard@gmail.com>
  12  *                     Daniel J Blueman <daniel.blueman@gmail.com>
  13  * Copyright (C) 2010  Sheng-Yuan Huang (Nuvoton) (PS00)
  14  *
  15  * Shamelessly ripped from the w83627hf driver
  16  * Copyright (C) 2003  Mark Studebaker
  17  *
  18  * This program is free software; you can redistribute it and/or modify
  19  * it under the terms of the GNU General Public License as published by
  20  * the Free Software Foundation; either version 2 of the License, or
  21  * (at your option) any later version.
  22  *
  23  * This program is distributed in the hope that it will be useful,
  24  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26  * GNU General Public License for more details.
  27  *
  28  * You should have received a copy of the GNU General Public License
  29  * along with this program; if not, write to the Free Software
  30  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  31  *
  32  *
  33  * Supports the following chips:
  34  *
  35  * Chip        #vin    #fan    #pwm    #temp  chip IDs       man ID
  36  * nct6106d     9      3       3       6+3    0xc450 0xc1    0x5ca3
  37  * nct6775f     9      4       3       6+3    0xb470 0xc1    0x5ca3
  38  * nct6776f     9      5       3       6+3    0xc330 0xc1    0x5ca3
  39  * nct6779d    15      5       5       2+6    0xc560 0xc1    0x5ca3
  40  * nct6791d    15      6       6       2+6    0xc800 0xc1    0x5ca3
  41  * nct6792d    15      6       6       2+6    0xc910 0xc1    0x5ca3
  42  * nct6793d    15      6       6       2+6    0xd120 0xc1    0x5ca3
  43  *
  44  * #temp lists the number of monitored temperature sources (first value) plus
  45  * the number of directly connectable temperature sensors (second value).
  46  */
  47
  48 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  49
  50 #include <linux/module.h>
  51 #include <linux/init.h>
  52 #include <linux/slab.h>
  53 #include <linux/jiffies.h>
  54 #include <linux/platform_device.h>
  55 #include <linux/hwmon.h>
  56 #include <linux/hwmon-sysfs.h>
  57 #include <linux/hwmon-vid.h>
  58 #include <linux/err.h>
  59 #include <linux/mutex.h>
  60 #include <linux/acpi.h>
  61 #include <linux/dmi.h>
  62 #include <linux/io.h>
  63 #include "lm75.h"
  64 #include "compat.h"
  65
  66 #define USE_ALTERNATE
  67
  68 enum kinds { nct6106, nct6775, nct6776, nct6779, nct6791, nct6792, nct6793 };
  69
  70 /* used to set data->name = nct6775_device_names[data->sio_kind] */
  71 static const char * const nct6775_device_names[] = {
  72         "nct6106",
  73         "nct6775",
  74         "nct6776",
  75         "nct6779",
  76         "nct6791",
  77         "nct6792",
  78         "nct6793",
  79 };
  80
  81 static const char * const nct6775_sio_names[] __initconst = {
  82         "NCT6106D",
  83         "NCT6775F",
  84         "NCT6776D/F",
  85         "NCT6779D",
  86         "NCT6791D",
  87         "NCT6792D",
  88         "NCT6793D",
  89 };
  90
  91 static unsigned short force_id;
  92 module_param(force_id, ushort, 0);
  93 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  94
  95 static unsigned short fan_debounce;
  96 module_param(fan_debounce, ushort, 0);
  97 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
  98
  99 #define DRVNAME "nct6775"
 100
 101 /*
 102  * Super-I/O constants and functions
 103  */
 104
 105 #define NCT6775_LD_ACPI         0x0a
 106 #define NCT6775_LD_HWM          0x0b
 107 #define NCT6775_LD_VID          0x0d
 108
 109 #define SIO_REG_LDSEL           0x07    /* Logical device select */
 110 #define SIO_REG_DEVID           0x20    /* Device ID (2 bytes) */
 111 #define SIO_REG_ENABLE          0x30    /* Logical device enable */
 112 #define SIO_REG_ADDR            0x60    /* Logical device address (2 bytes) */
 113
 114 #define SIO_NCT6106_ID          0xc450
 115 #define SIO_NCT6775_ID          0xb470
 116 #define SIO_NCT6776_ID          0xc330
 117 #define SIO_NCT6779_ID          0xc560
 118 #define SIO_NCT6791_ID          0xc800
 119 #define SIO_NCT6792_ID          0xc910
 120 #define SIO_NCT6793_ID          0xd120
 121 #define SIO_ID_MASK             0xFFF0
 122
 123 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
 124
 125 static inline void
 126 superio_outb(int ioreg, int reg, int val)
 127 {
 128         outb(reg, ioreg);
 129         outb(val, ioreg + 1);
 130 }
 131
 132 static inline int
 133 superio_inb(int ioreg, int reg)
 134 {
 135         outb(reg, ioreg);
 136         return inb(ioreg + 1);
 137 }
 138
 139 static inline void
 140 superio_select(int ioreg, int ld)
 141 {
 142         outb(SIO_REG_LDSEL, ioreg);
 143         outb(ld, ioreg + 1);
 144 }
 145
 146 static inline int
 147 superio_enter(int ioreg)
 148 {
 149         /*
 150          * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
 151          */
 152         if (!request_muxed_region(ioreg, 2, DRVNAME))
 153                 return -EBUSY;
 154
 155         outb(0x87, ioreg);
 156         outb(0x87, ioreg);
 157
 158         return 0;
 159 }
 160
 161 static inline void
 162 superio_exit(int ioreg)
 163 {
 164         outb(0xaa, ioreg);
 165         outb(0x02, ioreg);
 166         outb(0x02, ioreg + 1);
 167         release_region(ioreg, 2);
 168 }
 169
 170 /*
 171  * ISA constants
 172  */
 173
 174 #define IOREGION_ALIGNMENT      (~7)
 175 #define IOREGION_OFFSET         5
 176 #define IOREGION_LENGTH         2
 177 #define ADDR_REG_OFFSET         0
 178 #define DATA_REG_OFFSET         1
 179
 180 #define NCT6775_REG_BANK        0x4E
 181 #define NCT6775_REG_CONFIG      0x40
 182
 183 /*
 184  * Not currently used:
 185  * REG_MAN_ID has the value 0x5ca3 for all supported chips.
 186  * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
 187  * REG_MAN_ID is at port 0x4f
 188  * REG_CHIP_ID is at port 0x58
 189  */
 190
 191 #define NUM_TEMP        10      /* Max number of temp attribute sets w/ limits*/
 192 #define NUM_TEMP_FIXED  6       /* Max number of fixed temp attribute sets */
 193
 194 #define NUM_REG_ALARM   7       /* Max number of alarm registers */
 195 #define NUM_REG_BEEP    5       /* Max number of beep registers */
 196
 197 #define NUM_FAN         6
 198
 199 #define TEMP_SOURCE_VIRTUAL     0x1f
 200
 201 /* Common and NCT6775 specific data */
 202
 203 /* Voltage min/max registers for nr=7..14 are in bank 5 */
 204
 205 static const u16 NCT6775_REG_IN_MAX[] = {
 206         0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
 207         0x55c, 0x55e, 0x560, 0x562 };
 208 static const u16 NCT6775_REG_IN_MIN[] = {
 209         0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
 210         0x55d, 0x55f, 0x561, 0x563 };
 211 static const u16 NCT6775_REG_IN[] = {
 212         0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
 213 };
 214
 215 #define NCT6775_REG_VBAT                0x5D
 216 #define NCT6775_REG_DIODE               0x5E
 217 #define NCT6775_DIODE_MASK              0x02
 218
 219 #define NCT6775_REG_FANDIV1             0x506
 220 #define NCT6775_REG_FANDIV2             0x507
 221
 222 #define NCT6775_REG_CR_FAN_DEBOUNCE     0xf0
 223
 224 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
 225
 226 /* 0..15 voltages, 16..23 fans, 24..29 temperatures, 30..31 intrusion */
 227
 228 static const s8 NCT6775_ALARM_BITS[] = {
 229         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 230         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 231         -1,                             /* unused */
 232         6, 7, 11, -1, -1,               /* fan1..fan5 */
 233         -1, -1, -1,                     /* unused */
 234         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 235         12, -1 };                       /* intrusion0, intrusion1 */
 236
 237 #define FAN_ALARM_BASE          16
 238 #define TEMP_ALARM_BASE         24
 239 #define INTRUSION_ALARM_BASE    30
 240
 241 static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e };
 242
 243 /*
 244  * 0..14 voltages, 15 global beep enable, 16..23 fans, 24..29 temperatures,
 245  * 30..31 intrusion
 246  */
 247 static const s8 NCT6775_BEEP_BITS[] = {
 248         0, 1, 2, 3, 8, 9, 10, 16,       /* in0.. in7 */
 249         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 250         21,                             /* global beep enable */
 251         6, 7, 11, 28, -1,               /* fan1..fan5 */
 252         -1, -1, -1,                     /* unused */
 253         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 254         12, -1 };                       /* intrusion0, intrusion1 */
 255
 256 #define BEEP_ENABLE_BASE                15
 257
 258 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
 259 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
 260
 261 /* DC or PWM output fan configuration */
 262 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
 263 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
 264
 265 /* Advanced Fan control, some values are common for all fans */
 266
 267 static const u16 NCT6775_REG_TARGET[] = {
 268         0x101, 0x201, 0x301, 0x801, 0x901, 0xa01 };
 269 static const u16 NCT6775_REG_FAN_MODE[] = {
 270         0x102, 0x202, 0x302, 0x802, 0x902, 0xa02 };
 271 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
 272         0x103, 0x203, 0x303, 0x803, 0x903, 0xa03 };
 273 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
 274         0x104, 0x204, 0x304, 0x804, 0x904, 0xa04 };
 275 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
 276         0x105, 0x205, 0x305, 0x805, 0x905, 0xa05 };
 277 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = {
 278         0x106, 0x206, 0x306, 0x806, 0x906, 0xa06 };
 279 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
 280 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
 281
 282 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
 283         0x107, 0x207, 0x307, 0x807, 0x907, 0xa07 };
 284 static const u16 NCT6775_REG_PWM[] = {
 285         0x109, 0x209, 0x309, 0x809, 0x909, 0xa09 };
 286 static const u16 NCT6775_REG_PWM_READ[] = {
 287         0x01, 0x03, 0x11, 0x13, 0x15, 0xa09 };
 288
 289 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
 290 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
 291 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
 292 static const u16 NCT6775_FAN_PULSE_SHIFT[] = { 0, 0, 0, 0, 0, 0 };
 293
 294 static const u16 NCT6775_REG_TEMP[] = {
 295         0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
 296
 297 static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77 };
 298
 299 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 300         0, 0x152, 0x252, 0x628, 0x629, 0x62A };
 301 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 302         0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
 303 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 304         0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
 305
 306 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 307         0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
 308
 309 static const u16 NCT6775_REG_TEMP_SEL[] = {
 310         0x100, 0x200, 0x300, 0x800, 0x900, 0xa00 };
 311
 312 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
 313         0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 };
 314 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
 315         0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a };
 316 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
 317         0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b };
 318 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
 319         0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c };
 320 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
 321         0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d };
 322
 323 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
 324
 325 static const u16 NCT6775_REG_AUTO_TEMP[] = {
 326         0x121, 0x221, 0x321, 0x821, 0x921, 0xa21 };
 327 static const u16 NCT6775_REG_AUTO_PWM[] = {
 328         0x127, 0x227, 0x327, 0x827, 0x927, 0xa27 };
 329
 330 #define NCT6775_AUTO_TEMP(data, nr, p)  ((data)->REG_AUTO_TEMP[nr] + (p))
 331 #define NCT6775_AUTO_PWM(data, nr, p)   ((data)->REG_AUTO_PWM[nr] + (p))
 332
 333 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
 334
 335 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
 336         0x135, 0x235, 0x335, 0x835, 0x935, 0xa35 };
 337 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
 338         0x138, 0x238, 0x338, 0x838, 0x938, 0xa38 };
 339
 340 static const char *const nct6775_temp_label[] = {
 341         "",
 342         "SYSTIN",
 343         "CPUTIN",
 344         "AUXTIN",
 345         "AMD SB-TSI",
 346         "PECI Agent 0",
 347         "PECI Agent 1",
 348         "PECI Agent 2",
 349         "PECI Agent 3",
 350         "PECI Agent 4",
 351         "PECI Agent 5",
 352         "PECI Agent 6",
 353         "PECI Agent 7",
 354         "PCH_CHIP_CPU_MAX_TEMP",
 355         "PCH_CHIP_TEMP",
 356         "PCH_CPU_TEMP",
 357         "PCH_MCH_TEMP",
 358         "PCH_DIM0_TEMP",
 359         "PCH_DIM1_TEMP",
 360         "PCH_DIM2_TEMP",
 361         "PCH_DIM3_TEMP"
 362 };
 363
 364 static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
 365         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
 366
 367 static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
 368         = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
 369             0xa07 };
 370
 371 /* NCT6776 specific data */
 372
 373 /* STEP_UP_TIME and STEP_DOWN_TIME regs are swapped for all chips but NCT6775 */
 374 #define NCT6776_REG_FAN_STEP_UP_TIME NCT6775_REG_FAN_STEP_DOWN_TIME
 375 #define NCT6776_REG_FAN_STEP_DOWN_TIME NCT6775_REG_FAN_STEP_UP_TIME
 376
 377 static const s8 NCT6776_ALARM_BITS[] = {
 378         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 379         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 380         -1,                             /* unused */
 381         6, 7, 11, 10, 23,               /* fan1..fan5 */
 382         -1, -1, -1,                     /* unused */
 383         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 384         12, 9 };                        /* intrusion0, intrusion1 */
 385
 386 static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5 };
 387
 388 static const s8 NCT6776_BEEP_BITS[] = {
 389         0, 1, 2, 3, 4, 5, 6, 7,         /* in0.. in7 */
 390         8, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 391         24,                             /* global beep enable */
 392         25, 26, 27, 28, 29,             /* fan1..fan5 */
 393         -1, -1, -1,                     /* unused */
 394         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 395         30, 31 };                       /* intrusion0, intrusion1 */
 396
 397 static const u16 NCT6776_REG_TOLERANCE_H[] = {
 398         0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c };
 399
 400 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0 };
 401 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0 };
 402
 403 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
 404 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
 405
 406 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
 407         0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e };
 408
 409 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 410         0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
 411
 412 static const char *const nct6776_temp_label[] = {
 413         "",
 414         "SYSTIN",
 415         "CPUTIN",
 416         "AUXTIN",
 417         "SMBUSMASTER 0",
 418         "SMBUSMASTER 1",
 419         "SMBUSMASTER 2",
 420         "SMBUSMASTER 3",
 421         "SMBUSMASTER 4",
 422         "SMBUSMASTER 5",
 423         "SMBUSMASTER 6",
 424         "SMBUSMASTER 7",
 425         "PECI Agent 0",
 426         "PECI Agent 1",
 427         "PCH_CHIP_CPU_MAX_TEMP",
 428         "PCH_CHIP_TEMP",
 429         "PCH_CPU_TEMP",
 430         "PCH_MCH_TEMP",
 431         "PCH_DIM0_TEMP",
 432         "PCH_DIM1_TEMP",
 433         "PCH_DIM2_TEMP",
 434         "PCH_DIM3_TEMP",
 435         "BYTE_TEMP"
 436 };
 437
 438 static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
 439         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
 440
 441 static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
 442         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
 443
 444 /* NCT6779 specific data */
 445
 446 static const u16 NCT6779_REG_IN[] = {
 447         0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
 448         0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
 449
 450 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
 451         0x459, 0x45A, 0x45B, 0x568 };
 452
 453 static const s8 NCT6779_ALARM_BITS[] = {
 454         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 455         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 456         -1,                             /* unused */
 457         6, 7, 11, 10, 23,               /* fan1..fan5 */
 458         -1, -1, -1,                     /* unused */
 459         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 460         12, 9 };                        /* intrusion0, intrusion1 */
 461
 462 static const s8 NCT6779_BEEP_BITS[] = {
 463         0, 1, 2, 3, 4, 5, 6, 7,         /* in0.. in7 */
 464         8, 9, 10, 11, 12, 13, 14,       /* in8..in14 */
 465         24,                             /* global beep enable */
 466         25, 26, 27, 28, 29,             /* fan1..fan5 */
 467         -1, -1, -1,                     /* unused */
 468         16, 17, -1, -1, -1, -1,         /* temp1..temp6 */
 469         30, 31 };                       /* intrusion0, intrusion1 */
 470
 471 static const u16 NCT6779_REG_FAN[] = {
 472         0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8, 0x4ba };
 473 static const u16 NCT6779_REG_FAN_PULSES[] = {
 474         0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
 475
 476 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
 477         0x136, 0x236, 0x336, 0x836, 0x936, 0xa36 };
 478 #define NCT6779_CRITICAL_PWM_ENABLE_MASK        0x01
 479 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
 480         0x137, 0x237, 0x337, 0x837, 0x937, 0xa37 };
 481
 482 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
 483 static const u16 NCT6779_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b };
 484 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 485         0x18, 0x152 };
 486 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 487         0x3a, 0x153 };
 488 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 489         0x39, 0x155 };
 490
 491 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
 492         0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
 493
 494 static const char *const nct6779_temp_label[] = {
 495         "",
 496         "SYSTIN",
 497         "CPUTIN",
 498         "AUXTIN0",
 499         "AUXTIN1",
 500         "AUXTIN2",
 501         "AUXTIN3",
 502         "",
 503         "SMBUSMASTER 0",
 504         "SMBUSMASTER 1",
 505         "SMBUSMASTER 2",
 506         "SMBUSMASTER 3",
 507         "SMBUSMASTER 4",
 508         "SMBUSMASTER 5",
 509         "SMBUSMASTER 6",
 510         "SMBUSMASTER 7",
 511         "PECI Agent 0",
 512         "PECI Agent 1",
 513         "PCH_CHIP_CPU_MAX_TEMP",
 514         "PCH_CHIP_TEMP",
 515         "PCH_CPU_TEMP",
 516         "PCH_MCH_TEMP",
 517         "PCH_DIM0_TEMP",
 518         "PCH_DIM1_TEMP",
 519         "PCH_DIM2_TEMP",
 520         "PCH_DIM3_TEMP",
 521         "BYTE_TEMP",
 522         "",
 523         "",
 524         "",
 525         "",
 526         "Virtual_TEMP"
 527 };
 528
 529 #define NCT6779_NUM_LABELS      (ARRAY_SIZE(nct6779_temp_label) - 5)
 530 #define NCT6791_NUM_LABELS      ARRAY_SIZE(nct6779_temp_label)
 531
 532 static const u16 NCT6779_REG_TEMP_ALTERNATE[NCT6791_NUM_LABELS - 1]
 533         = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
 534             0, 0, 0, 0, 0, 0, 0, 0,
 535             0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
 536             0x408, 0 };
 537
 538 static const u16 NCT6779_REG_TEMP_CRIT[NCT6791_NUM_LABELS - 1]
 539         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
 540
 541 /* NCT6791 specific data */
 542
 543 #define NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE     0x28
 544
 545 static const u16 NCT6791_REG_WEIGHT_TEMP_SEL[6] = { 0, 0x239 };
 546 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP[6] = { 0, 0x23a };
 547 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP_TOL[6] = { 0, 0x23b };
 548 static const u16 NCT6791_REG_WEIGHT_DUTY_STEP[6] = { 0, 0x23c };
 549 static const u16 NCT6791_REG_WEIGHT_TEMP_BASE[6] = { 0, 0x23d };
 550 static const u16 NCT6791_REG_WEIGHT_DUTY_BASE[6] = { 0, 0x23e };
 551
 552 static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = {
 553         0x459, 0x45A, 0x45B, 0x568, 0x45D };
 554
 555 static const s8 NCT6791_ALARM_BITS[] = {
 556         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 557         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 558         -1,                             /* unused */
 559         6, 7, 11, 10, 23, 33,           /* fan1..fan6 */
 560         -1, -1,                         /* unused */
 561         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 562         12, 9 };                        /* intrusion0, intrusion1 */
 563
 564 /* NCT6792/NCT6793 specific data */
 565
 566 static const u16 NCT6792_REG_TEMP_MON[] = {
 567         0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d };
 568 static const u16 NCT6792_REG_BEEP[NUM_REG_BEEP] = {
 569         0xb2, 0xb3, 0xb4, 0xb5, 0xbf };
 570
 571 static const char *const nct6792_temp_label[] = {
 572         "",
 573         "SYSTIN",
 574         "CPUTIN",
 575         "AUXTIN0",
 576         "AUXTIN1",
 577         "AUXTIN2",
 578         "AUXTIN3",
 579         "",
 580         "SMBUSMASTER 0",
 581         "SMBUSMASTER 1",
 582         "SMBUSMASTER 2",
 583         "SMBUSMASTER 3",
 584         "SMBUSMASTER 4",
 585         "SMBUSMASTER 5",
 586         "SMBUSMASTER 6",
 587         "SMBUSMASTER 7",
 588         "PECI Agent 0",
 589         "PECI Agent 1",
 590         "PCH_CHIP_CPU_MAX_TEMP",
 591         "PCH_CHIP_TEMP",
 592         "PCH_CPU_TEMP",
 593         "PCH_MCH_TEMP",
 594         "PCH_DIM0_TEMP",
 595         "PCH_DIM1_TEMP",
 596         "PCH_DIM2_TEMP",
 597         "PCH_DIM3_TEMP",
 598         "BYTE_TEMP",
 599         "PECI Agent 0 Calibration",
 600         "PECI Agent 1 Calibration",
 601         "",
 602         "",
 603         "Virtual_TEMP"
 604 };
 605
 606 static const char *const nct6793_temp_label[] = {
 607         "",
 608         "SYSTIN",
 609         "CPUTIN",
 610         "AUXTIN0",
 611         "AUXTIN1",
 612         "AUXTIN2",
 613         "AUXTIN3",
 614         "",
 615         "SMBUSMASTER 0",
 616         "SMBUSMASTER 1",
 617         "",
 618         "",
 619         "",
 620         "",
 621         "",
 622         "",
 623         "PECI Agent 0",
 624         "PECI Agent 1",
 625         "PCH_CHIP_CPU_MAX_TEMP",
 626         "PCH_CHIP_TEMP",
 627         "PCH_CPU_TEMP",
 628         "PCH_MCH_TEMP",
 629         "Agent0 Dimm0 ",
 630         "Agent0 Dimm1",
 631         "Agent1 Dimm0",
 632         "Agent1 Dimm1",
 633         "BYTE_TEMP0",
 634         "BYTE_TEMP1",
 635         "PECI Agent 0 Calibration",
 636         "PECI Agent 1 Calibration",
 637         "",
 638         "Virtual_TEMP"
 639 };
 640
 641 /* NCT6102D/NCT6106D specific data */
 642
 643 #define NCT6106_REG_VBAT        0x318
 644 #define NCT6106_REG_DIODE       0x319
 645 #define NCT6106_DIODE_MASK      0x01
 646
 647 static const u16 NCT6106_REG_IN_MAX[] = {
 648         0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
 649 static const u16 NCT6106_REG_IN_MIN[] = {
 650         0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
 651 static const u16 NCT6106_REG_IN[] = {
 652         0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
 653
 654 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
 655 static const u16 NCT6106_REG_TEMP_MON[] = { 0x18, 0x19, 0x1a };
 656 static const u16 NCT6106_REG_TEMP_HYST[] = {
 657         0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
 658 static const u16 NCT6106_REG_TEMP_OVER[] = {
 659         0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
 660 static const u16 NCT6106_REG_TEMP_CRIT_L[] = {
 661         0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
 662 static const u16 NCT6106_REG_TEMP_CRIT_H[] = {
 663         0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
 664 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
 665 static const u16 NCT6106_REG_TEMP_CONFIG[] = {
 666         0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
 667
 668 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
 669 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
 670 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0, 0 };
 671 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4, 0, 0 };
 672
 673 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
 674 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
 675 static const u16 NCT6106_REG_PWM[] = { 0x119, 0x129, 0x139 };
 676 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c };
 677 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
 678 static const u16 NCT6106_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130 };
 679 static const u16 NCT6106_REG_TEMP_SOURCE[] = {
 680         0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
 681
 682 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
 683 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = {
 684         0x11b, 0x12b, 0x13b };
 685
 686 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
 687 #define NCT6106_CRITICAL_PWM_ENABLE_MASK        0x10
 688 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
 689
 690 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
 691 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
 692 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
 693 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
 694 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
 695 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
 696
 697 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
 698
 699 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
 700 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
 701 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
 702 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x17c };
 703 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
 704 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
 705
 706 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
 707 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
 708
 709 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = {
 710         0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
 711
 712 static const s8 NCT6106_ALARM_BITS[] = {
 713         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 714         9, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 715         -1,                             /* unused */
 716         32, 33, 34, -1, -1,             /* fan1..fan5 */
 717         -1, -1, -1,                     /* unused */
 718         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 719         48, -1                          /* intrusion0, intrusion1 */
 720 };
 721
 722 static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = {
 723         0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 };
 724
 725 static const s8 NCT6106_BEEP_BITS[] = {
 726         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 727         9, 10, 11, 12, -1, -1, -1,      /* in8..in14 */
 728         32,                             /* global beep enable */
 729         24, 25, 26, 27, 28,             /* fan1..fan5 */
 730         -1, -1, -1,                     /* unused */
 731         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 732         34, -1                          /* intrusion0, intrusion1 */
 733 };
 734
 735 static const u16 NCT6106_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
 736         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x51, 0x52, 0x54 };
 737
 738 static const u16 NCT6106_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
 739         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x204, 0x205 };
 740
 741 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
 742 {
 743         if (mode == 0 && pwm == 255)
 744                 return off;
 745         return mode + 1;
 746 }
 747
 748 static int pwm_enable_to_reg(enum pwm_enable mode)
 749 {
 750         if (mode == off)
 751                 return 0;
 752         return mode - 1;
 753 }
 754
 755 /*
 756  * Conversions
 757  */
 758
 759 /* 1 is DC mode, output in ms */
 760 static unsigned int step_time_from_reg(u8 reg, u8 mode)
 761 {
 762         return mode ? 400 * reg : 100 * reg;
 763 }
 764
 765 static u8 step_time_to_reg(unsigned int msec, u8 mode)
 766 {
 767         return clamp_val((mode ? (msec + 200) / 400 :
 768                                         (msec + 50) / 100), 1, 255);
 769 }
 770
 771 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
 772 {
 773         if (reg == 0 || reg == 255)
 774                 return 0;
 775         return 1350000U / (reg << divreg);
 776 }
 777
 778 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
 779 {
 780         if ((reg & 0xff1f) == 0xff1f)
 781                 return 0;
 782
 783         reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
 784
 785         if (reg == 0)
 786                 return 0;
 787
 788         return 1350000U / reg;
 789 }
 790
 791 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
 792 {
 793         if (reg == 0 || reg == 0xffff)
 794                 return 0;
 795
 796         /*
 797          * Even though the registers are 16 bit wide, the fan divisor
 798          * still applies.
 799          */
 800         return 1350000U / (reg << divreg);
 801 }
 802
 803 static u16 fan_to_reg(u32 fan, unsigned int divreg)
 804 {
 805         if (!fan)
 806                 return 0;
 807
 808         return (1350000U / fan) >> divreg;
 809 }
 810
 811 static inline unsigned int
 812 div_from_reg(u8 reg)
 813 {
 814         return 1 << reg;
 815 }
 816
 817 /*
 818  * Some of the voltage inputs have internal scaling, the tables below
 819  * contain 8 (the ADC LSB in mV) * scaling factor * 100
 820  */
 821 static const u16 scale_in[15] = {
 822         800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
 823         800, 800
 824 };
 825
 826 static inline long in_from_reg(u8 reg, u8 nr)
 827 {
 828         return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
 829 }
 830
 831 static inline u8 in_to_reg(u32 val, u8 nr)
 832 {
 833         return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
 834 }
 835
 836 /*
 837  * Data structures and manipulation thereof
 838  */
 839
 840 struct nct6775_data {
 841         int addr;       /* IO base of hw monitor block */
 842         int sioreg;     /* SIO register address */
 843         enum kinds kind;
 844         const char *name;
 845
 846 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
 847         struct device *hwmon_dev;
 848 #endif
 849
 850         const struct attribute_group *groups[6];
 851
 852         u16 reg_temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 853                                     * 3=temp_crit, 4=temp_lcrit
 854                                     */
 855         u8 temp_src[NUM_TEMP];
 856         u16 reg_temp_config[NUM_TEMP];
 857         const char * const *temp_label;
 858         int temp_label_num;
 859
 860         u16 REG_CONFIG;
 861         u16 REG_VBAT;
 862         u16 REG_DIODE;
 863         u8 DIODE_MASK;
 864
 865         const s8 *ALARM_BITS;
 866         const s8 *BEEP_BITS;
 867
 868         const u16 *REG_VIN;
 869         const u16 *REG_IN_MINMAX[2];
 870
 871         const u16 *REG_TARGET;
 872         const u16 *REG_FAN;
 873         const u16 *REG_FAN_MODE;
 874         const u16 *REG_FAN_MIN;
 875         const u16 *REG_FAN_PULSES;
 876         const u16 *FAN_PULSE_SHIFT;
 877         const u16 *REG_FAN_TIME[3];
 878
 879         const u16 *REG_TOLERANCE_H;
 880
 881         const u8 *REG_PWM_MODE;
 882         const u8 *PWM_MODE_MASK;
 883
 884         const u16 *REG_PWM[7];  /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 885                                  * [3]=pwm_max, [4]=pwm_step,
 886                                  * [5]=weight_duty_step, [6]=weight_duty_base
 887                                  */
 888         const u16 *REG_PWM_READ;
 889
 890         const u16 *REG_CRITICAL_PWM_ENABLE;
 891         u8 CRITICAL_PWM_ENABLE_MASK;
 892         const u16 *REG_CRITICAL_PWM;
 893
 894         const u16 *REG_AUTO_TEMP;
 895         const u16 *REG_AUTO_PWM;
 896
 897         const u16 *REG_CRITICAL_TEMP;
 898         const u16 *REG_CRITICAL_TEMP_TOLERANCE;
 899
 900         const u16 *REG_TEMP_SOURCE;     /* temp register sources */
 901         const u16 *REG_TEMP_SEL;
 902         const u16 *REG_WEIGHT_TEMP_SEL;
 903         const u16 *REG_WEIGHT_TEMP[3];  /* 0=base, 1=tolerance, 2=step */
 904
 905         const u16 *REG_TEMP_OFFSET;
 906
 907         const u16 *REG_ALARM;
 908         const u16 *REG_BEEP;
 909
 910         unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
 911         unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
 912
 913         struct mutex update_lock;
 914         bool valid;             /* true if following fields are valid */
 915         unsigned long last_updated;     /* In jiffies */
 916
 917         /* Register values */
 918         u8 bank;                /* current register bank */
 919         u8 in_num;              /* number of in inputs we have */
 920         u8 in[15][3];           /* [0]=in, [1]=in_max, [2]=in_min */
 921         unsigned int rpm[NUM_FAN];
 922         u16 fan_min[NUM_FAN];
 923         u8 fan_pulses[NUM_FAN];
 924         u8 fan_div[NUM_FAN];
 925         u8 has_pwm;
 926         u8 has_fan;             /* some fan inputs can be disabled */
 927         u8 has_fan_min;         /* some fans don't have min register */
 928         bool has_fan_div;
 929
 930         u8 num_temp_alarms;     /* 2, 3, or 6 */
 931         u8 num_temp_beeps;      /* 2, 3, or 6 */
 932         u8 temp_fixed_num;      /* 3 or 6 */
 933         u8 temp_type[NUM_TEMP_FIXED];
 934         s8 temp_offset[NUM_TEMP_FIXED];
 935         s16 temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 936                                 * 3=temp_crit, 4=temp_lcrit */
 937         u64 alarms;
 938         u64 beeps;
 939
 940         u8 pwm_num;     /* number of pwm */
 941         u8 pwm_mode[NUM_FAN];   /* 1->DC variable voltage,
 942                                  * 0->PWM variable duty cycle
 943                                  */
 944         enum pwm_enable pwm_enable[NUM_FAN];
 945                         /* 0->off
 946                          * 1->manual
 947                          * 2->thermal cruise mode (also called SmartFan I)
 948                          * 3->fan speed cruise mode
 949                          * 4->SmartFan III
 950                          * 5->enhanced variable thermal cruise (SmartFan IV)
 951                          */
 952         u8 pwm[7][NUM_FAN];     /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 953                                  * [3]=pwm_max, [4]=pwm_step,
 954                                  * [5]=weight_duty_step, [6]=weight_duty_base
 955                                  */
 956
 957         u8 target_temp[NUM_FAN];
 958         u8 target_temp_mask;
 959         u32 target_speed[NUM_FAN];
 960         u32 target_speed_tolerance[NUM_FAN];
 961         u8 speed_tolerance_limit;
 962
 963         u8 temp_tolerance[2][NUM_FAN];
 964         u8 tolerance_mask;
 965
 966         u8 fan_time[3][NUM_FAN]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
 967
 968         /* Automatic fan speed control registers */
 969         int auto_pwm_num;
 970         u8 auto_pwm[NUM_FAN][7];
 971         u8 auto_temp[NUM_FAN][7];
 972         u8 pwm_temp_sel[NUM_FAN];
 973         u8 pwm_weight_temp_sel[NUM_FAN];
 974         u8 weight_temp[3][NUM_FAN];     /* 0->temp_step, 1->temp_step_tol,
 975                                          * 2->temp_base
 976                                          */
 977
 978         u8 vid;
 979         u8 vrm;
 980
 981         bool have_vid;
 982
 983         u16 have_temp;
 984         u16 have_temp_fixed;
 985         u16 have_in;
 986
 987         /* Remember extra register values over suspend/resume */
 988         u8 vbat;
 989         u8 fandiv1;
 990         u8 fandiv2;
 991         u8 sio_reg_enable;
 992 };
 993
 994 struct nct6775_sio_data {
 995         int sioreg;
 996         enum kinds kind;
 997 };
 998
 999 struct sensor_device_template {
1000         struct device_attribute dev_attr;
1001         union {
1002                 struct {
1003                         u8 nr;
1004                         u8 index;
1005                 } s;
1006                 int index;
1007         } u;
1008         bool s2;        /* true if both index and nr are used */
1009 };
1010
1011 struct sensor_device_attr_u {
1012         union {
1013                 struct sensor_device_attribute a1;
1014                 struct sensor_device_attribute_2 a2;
1015         } u;
1016         char name[32];
1017 };
1018
1019 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) {      \
1020         .attr = {.name = _template, .mode = _mode },            \
1021         .show   = _show,                                        \
1022         .store  = _store,                                       \
1023 }
1024
1025 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \
1026         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
1027           .u.index = _index,                                            \
1028           .s2 = false }
1029
1030 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,       \
1031                                  _nr, _index)                           \
1032         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
1033           .u.s.index = _index,                                          \
1034           .u.s.nr = _nr,                                                \
1035           .s2 = true }
1036
1037 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
1038 static struct sensor_device_template sensor_dev_template_##_name        \
1039         = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store,       \
1040                                  _index)
1041
1042 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store,       \
1043                           _nr, _index)                                  \
1044 static struct sensor_device_template sensor_dev_template_##_name        \
1045         = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,     \
1046                                  _nr, _index)
1047
1048 struct sensor_template_group {
1049         struct sensor_device_template **templates;
1050         umode_t (*is_visible)(struct kobject *, struct attribute *, int);
1051         int base;
1052 };
1053
1054 static struct attribute_group *
1055 nct6775_create_attr_group(struct device *dev,
1056                           const struct sensor_template_group *tg,
1057                           int repeat)
1058 {
1059         struct attribute_group *group;
1060         struct sensor_device_attr_u *su;
1061         struct sensor_device_attribute *a;
1062         struct sensor_device_attribute_2 *a2;
1063         struct attribute **attrs;
1064         struct sensor_device_template **t;
1065         int i, count;
1066
1067         if (repeat <= 0)
1068                 return ERR_PTR(-EINVAL);
1069
1070         t = tg->templates;
1071         for (count = 0; *t; t++, count++)
1072                 ;
1073
1074         if (count == 0)
1075                 return ERR_PTR(-EINVAL);
1076
1077         group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
1078         if (group == NULL)
1079                 return ERR_PTR(-ENOMEM);
1080
1081         attrs = devm_kzalloc(dev, sizeof(*attrs) * (repeat * count + 1),
1082                              GFP_KERNEL);
1083         if (attrs == NULL)
1084                 return ERR_PTR(-ENOMEM);
1085
1086         su = devm_kzalloc(dev, sizeof(*su) * repeat * count,
1087                                GFP_KERNEL);
1088         if (su == NULL)
1089                 return ERR_PTR(-ENOMEM);
1090
1091         group->attrs = attrs;
1092         group->is_visible = tg->is_visible;
1093
1094         for (i = 0; i < repeat; i++) {
1095                 t = tg->templates;
1096                 while (*t != NULL) {
1097                         snprintf(su->name, sizeof(su->name),
1098                                  (*t)->dev_attr.attr.name, tg->base + i);
1099                         if ((*t)->s2) {
1100                                 a2 = &su->u.a2;
1101                                 sysfs_attr_init(&a2->dev_attr.attr);
1102                                 a2->dev_attr.attr.name = su->name;
1103                                 a2->nr = (*t)->u.s.nr + i;
1104                                 a2->index = (*t)->u.s.index;
1105                                 a2->dev_attr.attr.mode =
1106                                   (*t)->dev_attr.attr.mode;
1107                                 a2->dev_attr.show = (*t)->dev_attr.show;
1108                                 a2->dev_attr.store = (*t)->dev_attr.store;
1109                                 *attrs = &a2->dev_attr.attr;
1110                         } else {
1111                                 a = &su->u.a1;
1112                                 sysfs_attr_init(&a->dev_attr.attr);
1113                                 a->dev_attr.attr.name = su->name;
1114                                 a->index = (*t)->u.index + i;
1115                                 a->dev_attr.attr.mode =
1116                                   (*t)->dev_attr.attr.mode;
1117                                 a->dev_attr.show = (*t)->dev_attr.show;
1118                                 a->dev_attr.store = (*t)->dev_attr.store;
1119                                 *attrs = &a->dev_attr.attr;
1120                         }
1121                         attrs++;
1122                         su++;
1123                         t++;
1124                 }
1125         }
1126
1127         return group;
1128 }
1129
1130 static bool is_word_sized(struct nct6775_data *data, u16 reg)
1131 {
1132         switch (data->kind) {
1133         case nct6106:
1134                 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1135                   reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
1136                   reg == 0x111 || reg == 0x121 || reg == 0x131;
1137         case nct6775:
1138                 return (((reg & 0xff00) == 0x100 ||
1139                     (reg & 0xff00) == 0x200) &&
1140                    ((reg & 0x00ff) == 0x50 ||
1141                     (reg & 0x00ff) == 0x53 ||
1142                     (reg & 0x00ff) == 0x55)) ||
1143                   (reg & 0xfff0) == 0x630 ||
1144                   reg == 0x640 || reg == 0x642 ||
1145                   reg == 0x662 ||
1146                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1147                   reg == 0x73 || reg == 0x75 || reg == 0x77;
1148         case nct6776:
1149                 return (((reg & 0xff00) == 0x100 ||
1150                     (reg & 0xff00) == 0x200) &&
1151                    ((reg & 0x00ff) == 0x50 ||
1152                     (reg & 0x00ff) == 0x53 ||
1153                     (reg & 0x00ff) == 0x55)) ||
1154                   (reg & 0xfff0) == 0x630 ||
1155                   reg == 0x402 ||
1156                   reg == 0x640 || reg == 0x642 ||
1157                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1158                   reg == 0x73 || reg == 0x75 || reg == 0x77;
1159         case nct6779:
1160         case nct6791:
1161         case nct6792:
1162         case nct6793:
1163                 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
1164                   ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x0b) ||
1165                   reg == 0x402 ||
1166                   reg == 0x63a || reg == 0x63c || reg == 0x63e ||
1167                   reg == 0x640 || reg == 0x642 ||
1168                   reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
1169                   reg == 0x7b || reg == 0x7d;
1170         }
1171         return false;
1172 }
1173
1174 /*
1175  * On older chips, only registers 0x50-0x5f are banked.
1176  * On more recent chips, all registers are banked.
1177  * Assume that is the case and set the bank number for each access.
1178  * Cache the bank number so it only needs to be set if it changes.
1179  */
1180 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
1181 {
1182         u8 bank = reg >> 8;
1183
1184         if (data->bank != bank) {
1185                 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
1186                 outb_p(bank, data->addr + DATA_REG_OFFSET);
1187                 data->bank = bank;
1188         }
1189 }
1190
1191 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
1192 {
1193         int res, word_sized = is_word_sized(data, reg);
1194
1195         nct6775_set_bank(data, reg);
1196         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1197         res = inb_p(data->addr + DATA_REG_OFFSET);
1198         if (word_sized) {
1199                 outb_p((reg & 0xff) + 1,
1200                        data->addr + ADDR_REG_OFFSET);
1201                 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
1202         }
1203         return res;
1204 }
1205
1206 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
1207 {
1208         int word_sized = is_word_sized(data, reg);
1209
1210         nct6775_set_bank(data, reg);
1211         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1212         if (word_sized) {
1213                 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
1214                 outb_p((reg & 0xff) + 1,
1215                        data->addr + ADDR_REG_OFFSET);
1216         }
1217         outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
1218         return 0;
1219 }
1220
1221 /* We left-align 8-bit temperature values to make the code simpler */
1222 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
1223 {
1224         u16 res;
1225
1226         res = nct6775_read_value(data, reg);
1227         if (!is_word_sized(data, reg))
1228                 res <<= 8;
1229
1230         return res;
1231 }
1232
1233 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
1234 {
1235         if (!is_word_sized(data, reg))
1236                 value >>= 8;
1237         return nct6775_write_value(data, reg, value);
1238 }
1239
1240 /* This function assumes that the caller holds data->update_lock */
1241 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
1242 {
1243         u8 reg;
1244
1245         switch (nr) {
1246         case 0:
1247                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
1248                     | (data->fan_div[0] & 0x7);
1249                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1250                 break;
1251         case 1:
1252                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
1253                     | ((data->fan_div[1] << 4) & 0x70);
1254                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1255                 break;
1256         case 2:
1257                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
1258                     | (data->fan_div[2] & 0x7);
1259                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1260                 break;
1261         case 3:
1262                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
1263                     | ((data->fan_div[3] << 4) & 0x70);
1264                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1265                 break;
1266         }
1267 }
1268
1269 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
1270 {
1271         if (data->kind == nct6775)
1272                 nct6775_write_fan_div(data, nr);
1273 }
1274
1275 static void nct6775_update_fan_div(struct nct6775_data *data)
1276 {
1277         u8 i;
1278
1279         i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
1280         data->fan_div[0] = i & 0x7;
1281         data->fan_div[1] = (i & 0x70) >> 4;
1282         i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
1283         data->fan_div[2] = i & 0x7;
1284         if (data->has_fan & (1 << 3))
1285                 data->fan_div[3] = (i & 0x70) >> 4;
1286 }
1287
1288 static void nct6775_update_fan_div_common(struct nct6775_data *data)
1289 {
1290         if (data->kind == nct6775)
1291                 nct6775_update_fan_div(data);
1292 }
1293
1294 static void nct6775_init_fan_div(struct nct6775_data *data)
1295 {
1296         int i;
1297
1298         nct6775_update_fan_div_common(data);
1299         /*
1300          * For all fans, start with highest divider value if the divider
1301          * register is not initialized. This ensures that we get a
1302          * reading from the fan count register, even if it is not optimal.
1303          * We'll compute a better divider later on.
1304          */
1305         for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
1306                 if (!(data->has_fan & (1 << i)))
1307                         continue;
1308                 if (data->fan_div[i] == 0) {
1309                         data->fan_div[i] = 7;
1310                         nct6775_write_fan_div_common(data, i);
1311                 }
1312         }
1313 }
1314
1315 static void nct6775_init_fan_common(struct device *dev,
1316                                     struct nct6775_data *data)
1317 {
1318         int i;
1319         u8 reg;
1320
1321         if (data->has_fan_div)
1322                 nct6775_init_fan_div(data);
1323
1324         /*
1325          * If fan_min is not set (0), set it to 0xff to disable it. This
1326          * prevents the unnecessary warning when fanX_min is reported as 0.
1327          */
1328         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1329                 if (data->has_fan_min & (1 << i)) {
1330                         reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
1331                         if (!reg)
1332                                 nct6775_write_value(data, data->REG_FAN_MIN[i],
1333                                                     data->has_fan_div ? 0xff
1334                                                                       : 0xff1f);
1335                 }
1336         }
1337 }
1338
1339 static void nct6775_select_fan_div(struct device *dev,
1340                                    struct nct6775_data *data, int nr, u16 reg)
1341 {
1342         u8 fan_div = data->fan_div[nr];
1343         u16 fan_min;
1344
1345         if (!data->has_fan_div)
1346                 return;
1347
1348         /*
1349          * If we failed to measure the fan speed, or the reported value is not
1350          * in the optimal range, and the clock divider can be modified,
1351          * let's try that for next time.
1352          */
1353         if (reg == 0x00 && fan_div < 0x07)
1354                 fan_div++;
1355         else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1356                 fan_div--;
1357
1358         if (fan_div != data->fan_div[nr]) {
1359                 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1360                         nr + 1, div_from_reg(data->fan_div[nr]),
1361                         div_from_reg(fan_div));
1362
1363                 /* Preserve min limit if possible */
1364                 if (data->has_fan_min & (1 << nr)) {
1365                         fan_min = data->fan_min[nr];
1366                         if (fan_div > data->fan_div[nr]) {
1367                                 if (fan_min != 255 && fan_min > 1)
1368                                         fan_min >>= 1;
1369                         } else {
1370                                 if (fan_min != 255) {
1371                                         fan_min <<= 1;
1372                                         if (fan_min > 254)
1373                                                 fan_min = 254;
1374                                 }
1375                         }
1376                         if (fan_min != data->fan_min[nr]) {
1377                                 data->fan_min[nr] = fan_min;
1378                                 nct6775_write_value(data, data->REG_FAN_MIN[nr],
1379                                                     fan_min);
1380                         }
1381                 }
1382                 data->fan_div[nr] = fan_div;
1383                 nct6775_write_fan_div_common(data, nr);
1384         }
1385 }
1386
1387 static void nct6775_update_pwm(struct device *dev)
1388 {
1389         struct nct6775_data *data = dev_get_drvdata(dev);
1390         int i, j;
1391         int fanmodecfg, reg;
1392         bool duty_is_dc;
1393
1394         for (i = 0; i < data->pwm_num; i++) {
1395                 if (!(data->has_pwm & (1 << i)))
1396                         continue;
1397
1398                 duty_is_dc = data->REG_PWM_MODE[i] &&
1399                   (nct6775_read_value(data, data->REG_PWM_MODE[i])
1400                    & data->PWM_MODE_MASK[i]);
1401                 data->pwm_mode[i] = duty_is_dc;
1402
1403                 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
1404                 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1405                         if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1406                                 data->pwm[j][i]
1407                                   = nct6775_read_value(data,
1408                                                        data->REG_PWM[j][i]);
1409                         }
1410                 }
1411
1412                 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1413                                                         (fanmodecfg >> 4) & 7);
1414
1415                 if (!data->temp_tolerance[0][i] ||
1416                     data->pwm_enable[i] != speed_cruise)
1417                         data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1418                 if (!data->target_speed_tolerance[i] ||
1419                     data->pwm_enable[i] == speed_cruise) {
1420                         u8 t = fanmodecfg & 0x0f;
1421
1422                         if (data->REG_TOLERANCE_H) {
1423                                 t |= (nct6775_read_value(data,
1424                                       data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
1425                         }
1426                         data->target_speed_tolerance[i] = t;
1427                 }
1428
1429                 data->temp_tolerance[1][i] =
1430                         nct6775_read_value(data,
1431                                         data->REG_CRITICAL_TEMP_TOLERANCE[i]);
1432
1433                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
1434                 data->pwm_temp_sel[i] = reg & 0x1f;
1435                 /* If fan can stop, report floor as 0 */
1436                 if (reg & 0x80)
1437                         data->pwm[2][i] = 0;
1438
1439                 if (!data->REG_WEIGHT_TEMP_SEL[i])
1440                         continue;
1441
1442                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
1443                 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1444                 /* If weight is disabled, report weight source as 0 */
1445                 if (j == 1 && !(reg & 0x80))
1446                         data->pwm_weight_temp_sel[i] = 0;
1447
1448                 /* Weight temp data */
1449                 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
1450                         data->weight_temp[j][i]
1451                           = nct6775_read_value(data,
1452                                                data->REG_WEIGHT_TEMP[j][i]);
1453                 }
1454         }
1455 }
1456
1457 static void nct6775_update_pwm_limits(struct device *dev)
1458 {
1459         struct nct6775_data *data = dev_get_drvdata(dev);
1460         int i, j;
1461         u8 reg;
1462         u16 reg_t;
1463
1464         for (i = 0; i < data->pwm_num; i++) {
1465                 if (!(data->has_pwm & (1 << i)))
1466                         continue;
1467
1468                 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1469                         data->fan_time[j][i] =
1470                           nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1471                 }
1472
1473                 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1474                 /* Update only in matching mode or if never updated */
1475                 if (!data->target_temp[i] ||
1476                     data->pwm_enable[i] == thermal_cruise)
1477                         data->target_temp[i] = reg_t & data->target_temp_mask;
1478                 if (!data->target_speed[i] ||
1479                     data->pwm_enable[i] == speed_cruise) {
1480                         if (data->REG_TOLERANCE_H) {
1481                                 reg_t |= (nct6775_read_value(data,
1482                                         data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1483                         }
1484                         data->target_speed[i] = reg_t;
1485                 }
1486
1487                 for (j = 0; j < data->auto_pwm_num; j++) {
1488                         data->auto_pwm[i][j] =
1489                           nct6775_read_value(data,
1490                                              NCT6775_AUTO_PWM(data, i, j));
1491                         data->auto_temp[i][j] =
1492                           nct6775_read_value(data,
1493                                              NCT6775_AUTO_TEMP(data, i, j));
1494                 }
1495
1496                 /* critical auto_pwm temperature data */
1497                 data->auto_temp[i][data->auto_pwm_num] =
1498                         nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1499
1500                 switch (data->kind) {
1501                 case nct6775:
1502                         reg = nct6775_read_value(data,
1503                                                  NCT6775_REG_CRITICAL_ENAB[i]);
1504                         data->auto_pwm[i][data->auto_pwm_num] =
1505                                                 (reg & 0x02) ? 0xff : 0x00;
1506                         break;
1507                 case nct6776:
1508                         data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1509                         break;
1510                 case nct6106:
1511                 case nct6779:
1512                 case nct6791:
1513                 case nct6792:
1514                 case nct6793:
1515                         reg = nct6775_read_value(data,
1516                                         data->REG_CRITICAL_PWM_ENABLE[i]);
1517                         if (reg & data->CRITICAL_PWM_ENABLE_MASK)
1518                                 reg = nct6775_read_value(data,
1519                                         data->REG_CRITICAL_PWM[i]);
1520                         else
1521                                 reg = 0xff;
1522                         data->auto_pwm[i][data->auto_pwm_num] = reg;
1523                         break;
1524                 }
1525         }
1526 }
1527
1528 static struct nct6775_data *nct6775_update_device(struct device *dev)
1529 {
1530         struct nct6775_data *data = dev_get_drvdata(dev);
1531         int i, j;
1532
1533         mutex_lock(&data->update_lock);
1534
1535         if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1536             || !data->valid) {
1537                 /* Fan clock dividers */
1538                 nct6775_update_fan_div_common(data);
1539
1540                 /* Measured voltages and limits */
1541                 for (i = 0; i < data->in_num; i++) {
1542                         if (!(data->have_in & (1 << i)))
1543                                 continue;
1544
1545                         data->in[i][0] = nct6775_read_value(data,
1546                                                             data->REG_VIN[i]);
1547                         data->in[i][1] = nct6775_read_value(data,
1548                                           data->REG_IN_MINMAX[0][i]);
1549                         data->in[i][2] = nct6775_read_value(data,
1550                                           data->REG_IN_MINMAX[1][i]);
1551                 }
1552
1553                 /* Measured fan speeds and limits */
1554                 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
1555                         u16 reg;
1556
1557                         if (!(data->has_fan & (1 << i)))
1558                                 continue;
1559
1560                         reg = nct6775_read_value(data, data->REG_FAN[i]);
1561                         data->rpm[i] = data->fan_from_reg(reg,
1562                                                           data->fan_div[i]);
1563
1564                         if (data->has_fan_min & (1 << i))
1565                                 data->fan_min[i] = nct6775_read_value(data,
1566                                            data->REG_FAN_MIN[i]);
1567                         data->fan_pulses[i] =
1568                           (nct6775_read_value(data, data->REG_FAN_PULSES[i])
1569                                 >> data->FAN_PULSE_SHIFT[i]) & 0x03;
1570
1571                         nct6775_select_fan_div(dev, data, i, reg);
1572                 }
1573
1574                 nct6775_update_pwm(dev);
1575                 nct6775_update_pwm_limits(dev);
1576
1577                 /* Measured temperatures and limits */
1578                 for (i = 0; i < NUM_TEMP; i++) {
1579                         if (!(data->have_temp & (1 << i)))
1580                                 continue;
1581                         for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1582                                 if (data->reg_temp[j][i])
1583                                         data->temp[j][i]
1584                                           = nct6775_read_temp(data,
1585                                                 data->reg_temp[j][i]);
1586                         }
1587                         if (i >= NUM_TEMP_FIXED ||
1588                             !(data->have_temp_fixed & (1 << i)))
1589                                 continue;
1590                         data->temp_offset[i]
1591                           = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1592                 }
1593
1594                 data->alarms = 0;
1595                 for (i = 0; i < NUM_REG_ALARM; i++) {
1596                         u8 alarm;
1597
1598                         if (!data->REG_ALARM[i])
1599                                 continue;
1600                         alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1601                         data->alarms |= ((u64)alarm) << (i << 3);
1602                 }
1603
1604                 data->beeps = 0;
1605                 for (i = 0; i < NUM_REG_BEEP; i++) {
1606                         u8 beep;
1607
1608                         if (!data->REG_BEEP[i])
1609                                 continue;
1610                         beep = nct6775_read_value(data, data->REG_BEEP[i]);
1611                         data->beeps |= ((u64)beep) << (i << 3);
1612                 }
1613
1614                 data->last_updated = jiffies;
1615                 data->valid = true;
1616         }
1617
1618         mutex_unlock(&data->update_lock);
1619         return data;
1620 }
1621
1622 /*
1623  * Sysfs callback functions
1624  */
1625 static ssize_t
1626 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1627 {
1628         struct nct6775_data *data = nct6775_update_device(dev);
1629         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1630         int index = sattr->index;
1631         int nr = sattr->nr;
1632
1633         return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1634 }
1635
1636 static ssize_t
1637 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1638              size_t count)
1639 {
1640         struct nct6775_data *data = dev_get_drvdata(dev);
1641         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1642         int index = sattr->index;
1643         int nr = sattr->nr;
1644         unsigned long val;
1645         int err;
1646
1647         err = kstrtoul(buf, 10, &val);
1648         if (err < 0)
1649                 return err;
1650         mutex_lock(&data->update_lock);
1651         data->in[nr][index] = in_to_reg(val, nr);
1652         nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr],
1653                             data->in[nr][index]);
1654         mutex_unlock(&data->update_lock);
1655         return count;
1656 }
1657
1658 static ssize_t
1659 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1660 {
1661         struct nct6775_data *data = nct6775_update_device(dev);
1662         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1663         int nr = data->ALARM_BITS[sattr->index];
1664
1665         return sprintf(buf, "%u\n",
1666                        (unsigned int)((data->alarms >> nr) & 0x01));
1667 }
1668
1669 static int find_temp_source(struct nct6775_data *data, int index, int count)
1670 {
1671         int source = data->temp_src[index];
1672         int nr;
1673
1674         for (nr = 0; nr < count; nr++) {
1675                 int src;
1676
1677                 src = nct6775_read_value(data,
1678                                          data->REG_TEMP_SOURCE[nr]) & 0x1f;
1679                 if (src == source)
1680                         return nr;
1681         }
1682         return -ENODEV;
1683 }
1684
1685 static ssize_t
1686 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1687 {
1688         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1689         struct nct6775_data *data = nct6775_update_device(dev);
1690         unsigned int alarm = 0;
1691         int nr;
1692
1693         /*
1694          * For temperatures, there is no fixed mapping from registers to alarm
1695          * bits. Alarm bits are determined by the temperature source mapping.
1696          */
1697         nr = find_temp_source(data, sattr->index, data->num_temp_alarms);
1698         if (nr >= 0) {
1699                 int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE];
1700
1701                 alarm = (data->alarms >> bit) & 0x01;
1702         }
1703         return sprintf(buf, "%u\n", alarm);
1704 }
1705
1706 static ssize_t
1707 show_beep(struct device *dev, struct device_attribute *attr, char *buf)
1708 {
1709         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1710         struct nct6775_data *data = nct6775_update_device(dev);
1711         int nr = data->BEEP_BITS[sattr->index];
1712
1713         return sprintf(buf, "%u\n",
1714                        (unsigned int)((data->beeps >> nr) & 0x01));
1715 }
1716
1717 static ssize_t
1718 store_beep(struct device *dev, struct device_attribute *attr, const char *buf,
1719            size_t count)
1720 {
1721         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1722         struct nct6775_data *data = dev_get_drvdata(dev);
1723         int nr = data->BEEP_BITS[sattr->index];
1724         int regindex = nr >> 3;
1725         unsigned long val;
1726         int err;
1727
1728         err = kstrtoul(buf, 10, &val);
1729         if (err < 0)
1730                 return err;
1731         if (val > 1)
1732                 return -EINVAL;
1733
1734         mutex_lock(&data->update_lock);
1735         if (val)
1736                 data->beeps |= (1ULL << nr);
1737         else
1738                 data->beeps &= ~(1ULL << nr);
1739         nct6775_write_value(data, data->REG_BEEP[regindex],
1740                             (data->beeps >> (regindex << 3)) & 0xff);
1741         mutex_unlock(&data->update_lock);
1742         return count;
1743 }
1744
1745 static ssize_t
1746 show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf)
1747 {
1748         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1749         struct nct6775_data *data = nct6775_update_device(dev);
1750         unsigned int beep = 0;
1751         int nr;
1752
1753         /*
1754          * For temperatures, there is no fixed mapping from registers to beep
1755          * enable bits. Beep enable bits are determined by the temperature
1756          * source mapping.
1757          */
1758         nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1759         if (nr >= 0) {
1760                 int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1761
1762                 beep = (data->beeps >> bit) & 0x01;
1763         }
1764         return sprintf(buf, "%u\n", beep);
1765 }
1766
1767 static ssize_t
1768 store_temp_beep(struct device *dev, struct device_attribute *attr,
1769                 const char *buf, size_t count)
1770 {
1771         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1772         struct nct6775_data *data = dev_get_drvdata(dev);
1773         int nr, bit, regindex;
1774         unsigned long val;
1775         int err;
1776
1777         err = kstrtoul(buf, 10, &val);
1778         if (err < 0)
1779                 return err;
1780         if (val > 1)
1781                 return -EINVAL;
1782
1783         nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1784         if (nr < 0)
1785                 return nr;
1786
1787         bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1788         regindex = bit >> 3;
1789
1790         mutex_lock(&data->update_lock);
1791         if (val)
1792                 data->beeps |= (1ULL << bit);
1793         else
1794                 data->beeps &= ~(1ULL << bit);
1795         nct6775_write_value(data, data->REG_BEEP[regindex],
1796                             (data->beeps >> (regindex << 3)) & 0xff);
1797         mutex_unlock(&data->update_lock);
1798
1799         return count;
1800 }
1801
1802 static umode_t nct6775_in_is_visible(struct kobject *kobj,
1803                                      struct attribute *attr, int index)
1804 {
1805         struct device *dev = container_of(kobj, struct device, kobj);
1806         struct nct6775_data *data = dev_get_drvdata(dev);
1807         int in = index / 5;     /* voltage index */
1808
1809         if (!(data->have_in & (1 << in)))
1810                 return 0;
1811
1812         return attr->mode;
1813 }
1814
1815 SENSOR_TEMPLATE_2(in_input, "in%d_input", S_IRUGO, show_in_reg, NULL, 0, 0);
1816 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", S_IRUGO, show_alarm, NULL, 0);
1817 SENSOR_TEMPLATE(in_beep, "in%d_beep", S_IWUSR | S_IRUGO, show_beep, store_beep,
1818                 0);
1819 SENSOR_TEMPLATE_2(in_min, "in%d_min", S_IWUSR | S_IRUGO, show_in_reg,
1820                   store_in_reg, 0, 1);
1821 SENSOR_TEMPLATE_2(in_max, "in%d_max", S_IWUSR | S_IRUGO, show_in_reg,
1822                   store_in_reg, 0, 2);
1823
1824 /*
1825  * nct6775_in_is_visible uses the index into the following array
1826  * to determine if attributes should be created or not.
1827  * Any change in order or content must be matched.
1828  */
1829 static struct sensor_device_template *nct6775_attributes_in_template[] = {
1830         &sensor_dev_template_in_input,
1831         &sensor_dev_template_in_alarm,
1832         &sensor_dev_template_in_beep,
1833         &sensor_dev_template_in_min,
1834         &sensor_dev_template_in_max,
1835         NULL
1836 };
1837
1838 static const struct sensor_template_group nct6775_in_template_group = {
1839         .templates = nct6775_attributes_in_template,
1840         .is_visible = nct6775_in_is_visible,
1841 };
1842
1843 static ssize_t
1844 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1845 {
1846         struct nct6775_data *data = nct6775_update_device(dev);
1847         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1848         int nr = sattr->index;
1849
1850         return sprintf(buf, "%d\n", data->rpm[nr]);
1851 }
1852
1853 static ssize_t
1854 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1855 {
1856         struct nct6775_data *data = nct6775_update_device(dev);
1857         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1858         int nr = sattr->index;
1859
1860         return sprintf(buf, "%d\n",
1861                        data->fan_from_reg_min(data->fan_min[nr],
1862                                               data->fan_div[nr]));
1863 }
1864
1865 static ssize_t
1866 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1867 {
1868         struct nct6775_data *data = nct6775_update_device(dev);
1869         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1870         int nr = sattr->index;
1871
1872         return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1873 }
1874
1875 static ssize_t
1876 store_fan_min(struct device *dev, struct device_attribute *attr,
1877               const char *buf, size_t count)
1878 {
1879         struct nct6775_data *data = dev_get_drvdata(dev);
1880         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1881         int nr = sattr->index;
1882         unsigned long val;
1883         unsigned int reg;
1884         u8 new_div;
1885         int err;
1886
1887         err = kstrtoul(buf, 10, &val);
1888         if (err < 0)
1889                 return err;
1890
1891         mutex_lock(&data->update_lock);
1892         if (!data->has_fan_div) {
1893                 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1894                 if (!val) {
1895                         val = 0xff1f;
1896                 } else {
1897                         if (val > 1350000U)
1898                                 val = 135000U;
1899                         val = 1350000U / val;
1900                         val = (val & 0x1f) | ((val << 3) & 0xff00);
1901                 }
1902                 data->fan_min[nr] = val;
1903                 goto write_min; /* Leave fan divider alone */
1904         }
1905         if (!val) {
1906                 /* No min limit, alarm disabled */
1907                 data->fan_min[nr] = 255;
1908                 new_div = data->fan_div[nr]; /* No change */
1909                 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1910                 goto write_div;
1911         }
1912         reg = 1350000U / val;
1913         if (reg >= 128 * 255) {
1914                 /*
1915                  * Speed below this value cannot possibly be represented,
1916                  * even with the highest divider (128)
1917                  */
1918                 data->fan_min[nr] = 254;
1919                 new_div = 7; /* 128 == (1 << 7) */
1920                 dev_warn(dev,
1921                          "fan%u low limit %lu below minimum %u, set to minimum\n",
1922                          nr + 1, val, data->fan_from_reg_min(254, 7));
1923         } else if (!reg) {
1924                 /*
1925                  * Speed above this value cannot possibly be represented,
1926                  * even with the lowest divider (1)
1927                  */
1928                 data->fan_min[nr] = 1;
1929                 new_div = 0; /* 1 == (1 << 0) */
1930                 dev_warn(dev,
1931                          "fan%u low limit %lu above maximum %u, set to maximum\n",
1932                          nr + 1, val, data->fan_from_reg_min(1, 0));
1933         } else {
1934                 /*
1935                  * Automatically pick the best divider, i.e. the one such
1936                  * that the min limit will correspond to a register value
1937                  * in the 96..192 range
1938                  */
1939                 new_div = 0;
1940                 while (reg > 192 && new_div < 7) {
1941                         reg >>= 1;
1942                         new_div++;
1943                 }
1944                 data->fan_min[nr] = reg;
1945         }
1946
1947 write_div:
1948         /*
1949          * Write both the fan clock divider (if it changed) and the new
1950          * fan min (unconditionally)
1951          */
1952         if (new_div != data->fan_div[nr]) {
1953                 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1954                         nr + 1, div_from_reg(data->fan_div[nr]),
1955                         div_from_reg(new_div));
1956                 data->fan_div[nr] = new_div;
1957                 nct6775_write_fan_div_common(data, nr);
1958                 /* Give the chip time to sample a new speed value */
1959                 data->last_updated = jiffies;
1960         }
1961
1962 write_min:
1963         nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1964         mutex_unlock(&data->update_lock);
1965
1966         return count;
1967 }
1968
1969 static ssize_t
1970 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
1971 {
1972         struct nct6775_data *data = nct6775_update_device(dev);
1973         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1974         int p = data->fan_pulses[sattr->index];
1975
1976         return sprintf(buf, "%d\n", p ? : 4);
1977 }
1978
1979 static ssize_t
1980 store_fan_pulses(struct device *dev, struct device_attribute *attr,
1981                  const char *buf, size_t count)
1982 {
1983         struct nct6775_data *data = dev_get_drvdata(dev);
1984         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1985         int nr = sattr->index;
1986         unsigned long val;
1987         int err;
1988         u8 reg;
1989
1990         err = kstrtoul(buf, 10, &val);
1991         if (err < 0)
1992                 return err;
1993
1994         if (val > 4)
1995                 return -EINVAL;
1996
1997         mutex_lock(&data->update_lock);
1998         data->fan_pulses[nr] = val & 3;
1999         reg = nct6775_read_value(data, data->REG_FAN_PULSES[nr]);
2000         reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
2001         reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
2002         nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
2003         mutex_unlock(&data->update_lock);
2004
2005         return count;
2006 }
2007
2008 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
2009                                       struct attribute *attr, int index)
2010 {
2011         struct device *dev = container_of(kobj, struct device, kobj);
2012         struct nct6775_data *data = dev_get_drvdata(dev);
2013         int fan = index / 6;    /* fan index */
2014         int nr = index % 6;     /* attribute index */
2015
2016         if (!(data->has_fan & (1 << fan)))
2017                 return 0;
2018
2019         if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1)
2020                 return 0;
2021         if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1)
2022                 return 0;
2023         if (nr == 4 && !(data->has_fan_min & (1 << fan)))
2024                 return 0;
2025         if (nr == 5 && data->kind != nct6775)
2026                 return 0;
2027
2028         return attr->mode;
2029 }
2030
2031 SENSOR_TEMPLATE(fan_input, "fan%d_input", S_IRUGO, show_fan, NULL, 0);
2032 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", S_IRUGO, show_alarm, NULL,
2033                 FAN_ALARM_BASE);
2034 SENSOR_TEMPLATE(fan_beep, "fan%d_beep", S_IWUSR | S_IRUGO, show_beep,
2035                 store_beep, FAN_ALARM_BASE);
2036 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", S_IWUSR | S_IRUGO, show_fan_pulses,
2037                 store_fan_pulses, 0);
2038 SENSOR_TEMPLATE(fan_min, "fan%d_min", S_IWUSR | S_IRUGO, show_fan_min,
2039                 store_fan_min, 0);
2040 SENSOR_TEMPLATE(fan_div, "fan%d_div", S_IRUGO, show_fan_div, NULL, 0);
2041
2042 /*
2043  * nct6775_fan_is_visible uses the index into the following array
2044  * to determine if attributes should be created or not.
2045  * Any change in order or content must be matched.
2046  */
2047 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
2048         &sensor_dev_template_fan_input,
2049         &sensor_dev_template_fan_alarm, /* 1 */
2050         &sensor_dev_template_fan_beep,  /* 2 */
2051         &sensor_dev_template_fan_pulses,
2052         &sensor_dev_template_fan_min,   /* 4 */
2053         &sensor_dev_template_fan_div,   /* 5 */
2054         NULL
2055 };
2056
2057 static const struct sensor_template_group nct6775_fan_template_group = {
2058         .templates = nct6775_attributes_fan_template,
2059         .is_visible = nct6775_fan_is_visible,
2060         .base = 1,
2061 };
2062
2063 static ssize_t
2064 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
2065 {
2066         struct nct6775_data *data = nct6775_update_device(dev);
2067         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2068         int nr = sattr->index;
2069
2070         return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
2071 }
2072
2073 static ssize_t
2074 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
2075 {
2076         struct nct6775_data *data = nct6775_update_device(dev);
2077         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2078         int nr = sattr->nr;
2079         int index = sattr->index;
2080
2081         return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
2082 }
2083
2084 static ssize_t
2085 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
2086            size_t count)
2087 {
2088         struct nct6775_data *data = dev_get_drvdata(dev);
2089         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2090         int nr = sattr->nr;
2091         int index = sattr->index;
2092         int err;
2093         long val;
2094
2095         err = kstrtol(buf, 10, &val);
2096         if (err < 0)
2097                 return err;
2098
2099         mutex_lock(&data->update_lock);
2100         data->temp[index][nr] = LM75_TEMP_TO_REG(val);
2101         nct6775_write_temp(data, data->reg_temp[index][nr],
2102                            data->temp[index][nr]);
2103         mutex_unlock(&data->update_lock);
2104         return count;
2105 }
2106
2107 static ssize_t
2108 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
2109 {
2110         struct nct6775_data *data = nct6775_update_device(dev);
2111         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2112
2113         return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
2114 }
2115
2116 static ssize_t
2117 store_temp_offset(struct device *dev, struct device_attribute *attr,
2118                   const char *buf, size_t count)
2119 {
2120         struct nct6775_data *data = dev_get_drvdata(dev);
2121         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2122         int nr = sattr->index;
2123         long val;
2124         int err;
2125
2126         err = kstrtol(buf, 10, &val);
2127         if (err < 0)
2128                 return err;
2129
2130         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
2131
2132         mutex_lock(&data->update_lock);
2133         data->temp_offset[nr] = val;
2134         nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
2135         mutex_unlock(&data->update_lock);
2136
2137         return count;
2138 }
2139
2140 static ssize_t
2141 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
2142 {
2143         struct nct6775_data *data = nct6775_update_device(dev);
2144         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2145         int nr = sattr->index;
2146
2147         return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
2148 }
2149
2150 static ssize_t
2151 store_temp_type(struct device *dev, struct device_attribute *attr,
2152                 const char *buf, size_t count)
2153 {
2154         struct nct6775_data *data = nct6775_update_device(dev);
2155         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2156         int nr = sattr->index;
2157         unsigned long val;
2158         int err;
2159         u8 vbat, diode, vbit, dbit;
2160
2161         err = kstrtoul(buf, 10, &val);
2162         if (err < 0)
2163                 return err;
2164
2165         if (val != 1 && val != 3 && val != 4)
2166                 return -EINVAL;
2167
2168         mutex_lock(&data->update_lock);
2169
2170         data->temp_type[nr] = val;
2171         vbit = 0x02 << nr;
2172         dbit = data->DIODE_MASK << nr;
2173         vbat = nct6775_read_value(data, data->REG_VBAT) & ~vbit;
2174         diode = nct6775_read_value(data, data->REG_DIODE) & ~dbit;
2175         switch (val) {
2176         case 1: /* CPU diode (diode, current mode) */
2177                 vbat |= vbit;
2178                 diode |= dbit;
2179                 break;
2180         case 3: /* diode, voltage mode */
2181                 vbat |= dbit;
2182                 break;
2183         case 4: /* thermistor */
2184                 break;
2185         }
2186         nct6775_write_value(data, data->REG_VBAT, vbat);
2187         nct6775_write_value(data, data->REG_DIODE, diode);
2188
2189         mutex_unlock(&data->update_lock);
2190         return count;
2191 }
2192
2193 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
2194                                        struct attribute *attr, int index)
2195 {
2196         struct device *dev = container_of(kobj, struct device, kobj);
2197         struct nct6775_data *data = dev_get_drvdata(dev);
2198         int temp = index / 10;  /* temp index */
2199         int nr = index % 10;    /* attribute index */
2200
2201         if (!(data->have_temp & (1 << temp)))
2202                 return 0;
2203
2204         if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0)
2205                 return 0;                               /* alarm */
2206
2207         if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0)
2208                 return 0;                               /* beep */
2209
2210         if (nr == 4 && !data->reg_temp[1][temp])        /* max */
2211                 return 0;
2212
2213         if (nr == 5 && !data->reg_temp[2][temp])        /* max_hyst */
2214                 return 0;
2215
2216         if (nr == 6 && !data->reg_temp[3][temp])        /* crit */
2217                 return 0;
2218
2219         if (nr == 7 && !data->reg_temp[4][temp])        /* lcrit */
2220                 return 0;
2221
2222         /* offset and type only apply to fixed sensors */
2223         if (nr > 7 && !(data->have_temp_fixed & (1 << temp)))
2224                 return 0;
2225
2226         return attr->mode;
2227 }
2228
2229 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", S_IRUGO, show_temp, NULL, 0, 0);
2230 SENSOR_TEMPLATE(temp_label, "temp%d_label", S_IRUGO, show_temp_label, NULL, 0);
2231 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", S_IRUGO | S_IWUSR, show_temp,
2232                   store_temp, 0, 1);
2233 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", S_IRUGO | S_IWUSR,
2234                   show_temp, store_temp, 0, 2);
2235 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", S_IRUGO | S_IWUSR, show_temp,
2236                   store_temp, 0, 3);
2237 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", S_IRUGO | S_IWUSR, show_temp,
2238                   store_temp, 0, 4);
2239 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", S_IRUGO | S_IWUSR,
2240                 show_temp_offset, store_temp_offset, 0);
2241 SENSOR_TEMPLATE(temp_type, "temp%d_type", S_IRUGO | S_IWUSR, show_temp_type,
2242                 store_temp_type, 0);
2243 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", S_IRUGO, show_temp_alarm, NULL, 0);
2244 SENSOR_TEMPLATE(temp_beep, "temp%d_beep", S_IRUGO | S_IWUSR, show_temp_beep,
2245                 store_temp_beep, 0);
2246
2247 /*
2248  * nct6775_temp_is_visible uses the index into the following array
2249  * to determine if attributes should be created or not.
2250  * Any change in order or content must be matched.
2251  */
2252 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
2253         &sensor_dev_template_temp_input,
2254         &sensor_dev_template_temp_label,
2255         &sensor_dev_template_temp_alarm,        /* 2 */
2256         &sensor_dev_template_temp_beep,         /* 3 */
2257         &sensor_dev_template_temp_max,          /* 4 */
2258         &sensor_dev_template_temp_max_hyst,     /* 5 */
2259         &sensor_dev_template_temp_crit,         /* 6 */
2260         &sensor_dev_template_temp_lcrit,        /* 7 */
2261         &sensor_dev_template_temp_offset,       /* 8 */
2262         &sensor_dev_template_temp_type,         /* 9 */
2263         NULL
2264 };
2265
2266 static const struct sensor_template_group nct6775_temp_template_group = {
2267         .templates = nct6775_attributes_temp_template,
2268         .is_visible = nct6775_temp_is_visible,
2269         .base = 1,
2270 };
2271
2272 static ssize_t
2273 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
2274 {
2275         struct nct6775_data *data = nct6775_update_device(dev);
2276         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2277
2278         return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
2279 }
2280
2281 static ssize_t
2282 store_pwm_mode(struct device *dev, struct device_attribute *attr,
2283                const char *buf, size_t count)
2284 {
2285         struct nct6775_data *data = dev_get_drvdata(dev);
2286         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2287         int nr = sattr->index;
2288         unsigned long val;
2289         int err;
2290         u8 reg;
2291
2292         err = kstrtoul(buf, 10, &val);
2293         if (err < 0)
2294                 return err;
2295
2296         if (val > 1)
2297                 return -EINVAL;
2298
2299         /* Setting DC mode is not supported for all chips/channels */
2300         if (data->REG_PWM_MODE[nr] == 0) {
2301                 if (val)
2302                         return -EINVAL;
2303                 return count;
2304         }
2305
2306         mutex_lock(&data->update_lock);
2307         data->pwm_mode[nr] = val;
2308         reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
2309         reg &= ~data->PWM_MODE_MASK[nr];
2310         if (val)
2311                 reg |= data->PWM_MODE_MASK[nr];
2312         nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
2313         mutex_unlock(&data->update_lock);
2314         return count;
2315 }
2316
2317 static ssize_t
2318 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2319 {
2320         struct nct6775_data *data = nct6775_update_device(dev);
2321         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2322         int nr = sattr->nr;
2323         int index = sattr->index;
2324         int pwm;
2325
2326         /*
2327          * For automatic fan control modes, show current pwm readings.
2328          * Otherwise, show the configured value.
2329          */
2330         if (index == 0 && data->pwm_enable[nr] > manual)
2331                 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
2332         else
2333                 pwm = data->pwm[index][nr];
2334
2335         return sprintf(buf, "%d\n", pwm);
2336 }
2337
2338 static ssize_t
2339 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
2340           size_t count)
2341 {
2342         struct nct6775_data *data = dev_get_drvdata(dev);
2343         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2344         int nr = sattr->nr;
2345         int index = sattr->index;
2346         unsigned long val;
2347         int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
2348         int maxval[7]
2349           = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
2350         int err;
2351         u8 reg;
2352
2353         err = kstrtoul(buf, 10, &val);
2354         if (err < 0)
2355                 return err;
2356         val = clamp_val(val, minval[index], maxval[index]);
2357
2358         mutex_lock(&data->update_lock);
2359         data->pwm[index][nr] = val;
2360         nct6775_write_value(data, data->REG_PWM[index][nr], val);
2361         if (index == 2) { /* floor: disable if val == 0 */
2362                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2363                 reg &= 0x7f;
2364                 if (val)
2365                         reg |= 0x80;
2366                 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2367         }
2368         mutex_unlock(&data->update_lock);
2369         return count;
2370 }
2371
2372 /* Returns 0 if OK, -EINVAL otherwise */
2373 static int check_trip_points(struct nct6775_data *data, int nr)
2374 {
2375         int i;
2376
2377         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2378                 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
2379                         return -EINVAL;
2380         }
2381         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2382                 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
2383                         return -EINVAL;
2384         }
2385         /* validate critical temperature and pwm if enabled (pwm > 0) */
2386         if (data->auto_pwm[nr][data->auto_pwm_num]) {
2387                 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2388                                 data->auto_temp[nr][data->auto_pwm_num] ||
2389                     data->auto_pwm[nr][data->auto_pwm_num - 1] >
2390                                 data->auto_pwm[nr][data->auto_pwm_num])
2391                         return -EINVAL;
2392         }
2393         return 0;
2394 }
2395
2396 static void pwm_update_registers(struct nct6775_data *data, int nr)
2397 {
2398         u8 reg;
2399
2400         switch (data->pwm_enable[nr]) {
2401         case off:
2402         case manual:
2403                 break;
2404         case speed_cruise:
2405                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2406                 reg = (reg & ~data->tolerance_mask) |
2407                   (data->target_speed_tolerance[nr] & data->tolerance_mask);
2408                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2409                 nct6775_write_value(data, data->REG_TARGET[nr],
2410                                     data->target_speed[nr] & 0xff);
2411                 if (data->REG_TOLERANCE_H) {
2412                         reg = (data->target_speed[nr] >> 8) & 0x0f;
2413                         reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2414                         nct6775_write_value(data,
2415                                             data->REG_TOLERANCE_H[nr],
2416                                             reg);
2417                 }
2418                 break;
2419         case thermal_cruise:
2420                 nct6775_write_value(data, data->REG_TARGET[nr],
2421                                     data->target_temp[nr]);
2422                 /* intentional */
2423         default:
2424                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2425                 reg = (reg & ~data->tolerance_mask) |
2426                   data->temp_tolerance[0][nr];
2427                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2428                 break;
2429         }
2430 }
2431
2432 static ssize_t
2433 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2434 {
2435         struct nct6775_data *data = nct6775_update_device(dev);
2436         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2437
2438         return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2439 }
2440
2441 static ssize_t
2442 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2443                  const char *buf, size_t count)
2444 {
2445         struct nct6775_data *data = dev_get_drvdata(dev);
2446         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2447         int nr = sattr->index;
2448         unsigned long val;
2449         int err;
2450         u16 reg;
2451
2452         err = kstrtoul(buf, 10, &val);
2453         if (err < 0)
2454                 return err;
2455
2456         if (val > sf4)
2457                 return -EINVAL;
2458
2459         if (val == sf3 && data->kind != nct6775)
2460                 return -EINVAL;
2461
2462         if (val == sf4 && check_trip_points(data, nr)) {
2463                 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2464                 dev_err(dev, "Adjust trip points and try again\n");
2465                 return -EINVAL;
2466         }
2467
2468         mutex_lock(&data->update_lock);
2469         data->pwm_enable[nr] = val;
2470         if (val == off) {
2471                 /*
2472                  * turn off pwm control: select manual mode, set pwm to maximum
2473                  */
2474                 data->pwm[0][nr] = 255;
2475                 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2476         }
2477         pwm_update_registers(data, nr);
2478         reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2479         reg &= 0x0f;
2480         reg |= pwm_enable_to_reg(val) << 4;
2481         nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2482         mutex_unlock(&data->update_lock);
2483         return count;
2484 }
2485
2486 static ssize_t
2487 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2488 {
2489         int i, sel = 0;
2490
2491         for (i = 0; i < NUM_TEMP; i++) {
2492                 if (!(data->have_temp & (1 << i)))
2493                         continue;
2494                 if (src == data->temp_src[i]) {
2495                         sel = i + 1;
2496                         break;
2497                 }
2498         }
2499
2500         return sprintf(buf, "%d\n", sel);
2501 }
2502
2503 static ssize_t
2504 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2505 {
2506         struct nct6775_data *data = nct6775_update_device(dev);
2507         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2508         int index = sattr->index;
2509
2510         return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2511 }
2512
2513 static ssize_t
2514 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2515                    const char *buf, size_t count)
2516 {
2517         struct nct6775_data *data = nct6775_update_device(dev);
2518         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2519         int nr = sattr->index;
2520         unsigned long val;
2521         int err, reg, src;
2522
2523         err = kstrtoul(buf, 10, &val);
2524         if (err < 0)
2525                 return err;
2526         if (val == 0 || val > NUM_TEMP)
2527                 return -EINVAL;
2528         if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
2529                 return -EINVAL;
2530
2531         mutex_lock(&data->update_lock);
2532         src = data->temp_src[val - 1];
2533         data->pwm_temp_sel[nr] = src;
2534         reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2535         reg &= 0xe0;
2536         reg |= src;
2537         nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2538         mutex_unlock(&data->update_lock);
2539
2540         return count;
2541 }
2542
2543 static ssize_t
2544 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2545                          char *buf)
2546 {
2547         struct nct6775_data *data = nct6775_update_device(dev);
2548         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2549         int index = sattr->index;
2550
2551         return show_pwm_temp_sel_common(data, buf,
2552                                         data->pwm_weight_temp_sel[index]);
2553 }
2554
2555 static ssize_t
2556 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2557                           const char *buf, size_t count)
2558 {
2559         struct nct6775_data *data = nct6775_update_device(dev);
2560         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2561         int nr = sattr->index;
2562         unsigned long val;
2563         int err, reg, src;
2564
2565         err = kstrtoul(buf, 10, &val);
2566         if (err < 0)
2567                 return err;
2568         if (val > NUM_TEMP)
2569                 return -EINVAL;
2570         if (val && (!(data->have_temp & (1 << (val - 1))) ||
2571                     !data->temp_src[val - 1]))
2572                 return -EINVAL;
2573
2574         mutex_lock(&data->update_lock);
2575         if (val) {
2576                 src = data->temp_src[val - 1];
2577                 data->pwm_weight_temp_sel[nr] = src;
2578                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2579                 reg &= 0xe0;
2580                 reg |= (src | 0x80);
2581                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2582         } else {
2583                 data->pwm_weight_temp_sel[nr] = 0;
2584                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2585                 reg &= 0x7f;
2586                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2587         }
2588         mutex_unlock(&data->update_lock);
2589
2590         return count;
2591 }
2592
2593 static ssize_t
2594 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2595 {
2596         struct nct6775_data *data = nct6775_update_device(dev);
2597         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2598
2599         return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2600 }
2601
2602 static ssize_t
2603 store_target_temp(struct device *dev, struct device_attribute *attr,
2604                   const char *buf, size_t count)
2605 {
2606         struct nct6775_data *data = dev_get_drvdata(dev);
2607         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2608         int nr = sattr->index;
2609         unsigned long val;
2610         int err;
2611
2612         err = kstrtoul(buf, 10, &val);
2613         if (err < 0)
2614                 return err;
2615
2616         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2617                         data->target_temp_mask);
2618
2619         mutex_lock(&data->update_lock);
2620         data->target_temp[nr] = val;
2621         pwm_update_registers(data, nr);
2622         mutex_unlock(&data->update_lock);
2623         return count;
2624 }
2625
2626 static ssize_t
2627 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2628 {
2629         struct nct6775_data *data = nct6775_update_device(dev);
2630         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2631         int nr = sattr->index;
2632
2633         return sprintf(buf, "%d\n",
2634                        fan_from_reg16(data->target_speed[nr],
2635                                       data->fan_div[nr]));
2636 }
2637
2638 static ssize_t
2639 store_target_speed(struct device *dev, struct device_attribute *attr,
2640                    const char *buf, size_t count)
2641 {
2642         struct nct6775_data *data = dev_get_drvdata(dev);
2643         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2644         int nr = sattr->index;
2645         unsigned long val;
2646         int err;
2647         u16 speed;
2648
2649         err = kstrtoul(buf, 10, &val);
2650         if (err < 0)
2651                 return err;
2652
2653         val = clamp_val(val, 0, 1350000U);
2654         speed = fan_to_reg(val, data->fan_div[nr]);
2655
2656         mutex_lock(&data->update_lock);
2657         data->target_speed[nr] = speed;
2658         pwm_update_registers(data, nr);
2659         mutex_unlock(&data->update_lock);
2660         return count;
2661 }
2662
2663 static ssize_t
2664 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2665                     char *buf)
2666 {
2667         struct nct6775_data *data = nct6775_update_device(dev);
2668         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2669         int nr = sattr->nr;
2670         int index = sattr->index;
2671
2672         return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2673 }
2674
2675 static ssize_t
2676 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2677                      const char *buf, size_t count)
2678 {
2679         struct nct6775_data *data = dev_get_drvdata(dev);
2680         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2681         int nr = sattr->nr;
2682         int index = sattr->index;
2683         unsigned long val;
2684         int err;
2685
2686         err = kstrtoul(buf, 10, &val);
2687         if (err < 0)
2688                 return err;
2689
2690         /* Limit tolerance as needed */
2691         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2692
2693         mutex_lock(&data->update_lock);
2694         data->temp_tolerance[index][nr] = val;
2695         if (index)
2696                 pwm_update_registers(data, nr);
2697         else
2698                 nct6775_write_value(data,
2699                                     data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2700                                     val);
2701         mutex_unlock(&data->update_lock);
2702         return count;
2703 }
2704
2705 /*
2706  * Fan speed tolerance is a tricky beast, since the associated register is
2707  * a tick counter, but the value is reported and configured as rpm.
2708  * Compute resulting low and high rpm values and report the difference.
2709  */
2710 static ssize_t
2711 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2712                      char *buf)
2713 {
2714         struct nct6775_data *data = nct6775_update_device(dev);
2715         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2716         int nr = sattr->index;
2717         int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2718         int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2719         int tolerance;
2720
2721         if (low <= 0)
2722                 low = 1;
2723         if (high > 0xffff)
2724                 high = 0xffff;
2725         if (high < low)
2726                 high = low;
2727
2728         tolerance = (fan_from_reg16(low, data->fan_div[nr])
2729                      - fan_from_reg16(high, data->fan_div[nr])) / 2;
2730
2731         return sprintf(buf, "%d\n", tolerance);
2732 }
2733
2734 static ssize_t
2735 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2736                       const char *buf, size_t count)
2737 {
2738         struct nct6775_data *data = dev_get_drvdata(dev);
2739         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2740         int nr = sattr->index;
2741         unsigned long val;
2742         int err;
2743         int low, high;
2744
2745         err = kstrtoul(buf, 10, &val);
2746         if (err < 0)
2747                 return err;
2748
2749         high = fan_from_reg16(data->target_speed[nr],
2750                               data->fan_div[nr]) + val;
2751         low = fan_from_reg16(data->target_speed[nr],
2752                              data->fan_div[nr]) - val;
2753         if (low <= 0)
2754                 low = 1;
2755         if (high < low)
2756                 high = low;
2757
2758         val = (fan_to_reg(low, data->fan_div[nr]) -
2759                fan_to_reg(high, data->fan_div[nr])) / 2;
2760
2761         /* Limit tolerance as needed */
2762         val = clamp_val(val, 0, data->speed_tolerance_limit);
2763
2764         mutex_lock(&data->update_lock);
2765         data->target_speed_tolerance[nr] = val;
2766         pwm_update_registers(data, nr);
2767         mutex_unlock(&data->update_lock);
2768         return count;
2769 }
2770
2771 SENSOR_TEMPLATE_2(pwm, "pwm%d", S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2772 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", S_IWUSR | S_IRUGO, show_pwm_mode,
2773                 store_pwm_mode, 0);
2774 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", S_IWUSR | S_IRUGO, show_pwm_enable,
2775                 store_pwm_enable, 0);
2776 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", S_IWUSR | S_IRUGO,
2777                 show_pwm_temp_sel, store_pwm_temp_sel, 0);
2778 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", S_IWUSR | S_IRUGO,
2779                 show_target_temp, store_target_temp, 0);
2780 SENSOR_TEMPLATE(fan_target, "fan%d_target", S_IWUSR | S_IRUGO,
2781                 show_target_speed, store_target_speed, 0);
2782 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", S_IWUSR | S_IRUGO,
2783                 show_speed_tolerance, store_speed_tolerance, 0);
2784
2785 /* Smart Fan registers */
2786
2787 static ssize_t
2788 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2789 {
2790         struct nct6775_data *data = nct6775_update_device(dev);
2791         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2792         int nr = sattr->nr;
2793         int index = sattr->index;
2794
2795         return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2796 }
2797
2798 static ssize_t
2799 store_weight_temp(struct device *dev, struct device_attribute *attr,
2800                   const char *buf, size_t count)
2801 {
2802         struct nct6775_data *data = dev_get_drvdata(dev);
2803         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2804         int nr = sattr->nr;
2805         int index = sattr->index;
2806         unsigned long val;
2807         int err;
2808
2809         err = kstrtoul(buf, 10, &val);
2810         if (err < 0)
2811                 return err;
2812
2813         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2814
2815         mutex_lock(&data->update_lock);
2816         data->weight_temp[index][nr] = val;
2817         nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2818         mutex_unlock(&data->update_lock);
2819         return count;
2820 }
2821
2822 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", S_IWUSR | S_IRUGO,
2823                   show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
2824 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step",
2825                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 0);
2826 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol",
2827                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 1);
2828 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base",
2829                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 2);
2830 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step",
2831                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 5);
2832 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base",
2833                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 6);
2834
2835 static ssize_t
2836 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2837 {
2838         struct nct6775_data *data = nct6775_update_device(dev);
2839         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2840         int nr = sattr->nr;
2841         int index = sattr->index;
2842
2843         return sprintf(buf, "%d\n",
2844                        step_time_from_reg(data->fan_time[index][nr],
2845                                           data->pwm_mode[nr]));
2846 }
2847
2848 static ssize_t
2849 store_fan_time(struct device *dev, struct device_attribute *attr,
2850                const char *buf, size_t count)
2851 {
2852         struct nct6775_data *data = dev_get_drvdata(dev);
2853         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2854         int nr = sattr->nr;
2855         int index = sattr->index;
2856         unsigned long val;
2857         int err;
2858
2859         err = kstrtoul(buf, 10, &val);
2860         if (err < 0)
2861                 return err;
2862
2863         val = step_time_to_reg(val, data->pwm_mode[nr]);
2864         mutex_lock(&data->update_lock);
2865         data->fan_time[index][nr] = val;
2866         nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2867         mutex_unlock(&data->update_lock);
2868         return count;
2869 }
2870
2871 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
2872 static ssize_t
2873 show_name(struct device *dev, struct device_attribute *attr, char *buf)
2874 {
2875         struct nct6775_data *data = dev_get_drvdata(dev);
2876
2877         return sprintf(buf, "%s\n", data->name);
2878 }
2879
2880 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
2881 #endif
2882
2883 static ssize_t
2884 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2885 {
2886         struct nct6775_data *data = nct6775_update_device(dev);
2887         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2888
2889         return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2890 }
2891
2892 static ssize_t
2893 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2894                const char *buf, size_t count)
2895 {
2896         struct nct6775_data *data = dev_get_drvdata(dev);
2897         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2898         int nr = sattr->nr;
2899         int point = sattr->index;
2900         unsigned long val;
2901         int err;
2902         u8 reg;
2903
2904         err = kstrtoul(buf, 10, &val);
2905         if (err < 0)
2906                 return err;
2907         if (val > 255)
2908                 return -EINVAL;
2909
2910         if (point == data->auto_pwm_num) {
2911                 if (data->kind != nct6775 && !val)
2912                         return -EINVAL;
2913                 if (data->kind != nct6779 && val)
2914                         val = 0xff;
2915         }
2916
2917         mutex_lock(&data->update_lock);
2918         data->auto_pwm[nr][point] = val;
2919         if (point < data->auto_pwm_num) {
2920                 nct6775_write_value(data,
2921                                     NCT6775_AUTO_PWM(data, nr, point),
2922                                     data->auto_pwm[nr][point]);
2923         } else {
2924                 switch (data->kind) {
2925                 case nct6775:
2926                         /* disable if needed (pwm == 0) */
2927                         reg = nct6775_read_value(data,
2928                                                  NCT6775_REG_CRITICAL_ENAB[nr]);
2929                         if (val)
2930                                 reg |= 0x02;
2931                         else
2932                                 reg &= ~0x02;
2933                         nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
2934                                             reg);
2935                         break;
2936                 case nct6776:
2937                         break; /* always enabled, nothing to do */
2938                 case nct6106:
2939                 case nct6779:
2940                 case nct6791:
2941                 case nct6792:
2942                 case nct6793:
2943                         nct6775_write_value(data, data->REG_CRITICAL_PWM[nr],
2944                                             val);
2945                         reg = nct6775_read_value(data,
2946                                         data->REG_CRITICAL_PWM_ENABLE[nr]);
2947                         if (val == 255)
2948                                 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
2949                         else
2950                                 reg |= data->CRITICAL_PWM_ENABLE_MASK;
2951                         nct6775_write_value(data,
2952                                             data->REG_CRITICAL_PWM_ENABLE[nr],
2953                                             reg);
2954                         break;
2955                 }
2956         }
2957         mutex_unlock(&data->update_lock);
2958         return count;
2959 }
2960
2961 static ssize_t
2962 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
2963 {
2964         struct nct6775_data *data = nct6775_update_device(dev);
2965         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2966         int nr = sattr->nr;
2967         int point = sattr->index;
2968
2969         /*
2970          * We don't know for sure if the temperature is signed or unsigned.
2971          * Assume it is unsigned.
2972          */
2973         return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
2974 }
2975
2976 static ssize_t
2977 store_auto_temp(struct device *dev, struct device_attribute *attr,
2978                 const char *buf, size_t count)
2979 {
2980         struct nct6775_data *data = dev_get_drvdata(dev);
2981         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2982         int nr = sattr->nr;
2983         int point = sattr->index;
2984         unsigned long val;
2985         int err;
2986
2987         err = kstrtoul(buf, 10, &val);
2988         if (err)
2989                 return err;
2990         if (val > 255000)
2991                 return -EINVAL;
2992
2993         mutex_lock(&data->update_lock);
2994         data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
2995         if (point < data->auto_pwm_num) {
2996                 nct6775_write_value(data,
2997                                     NCT6775_AUTO_TEMP(data, nr, point),
2998                                     data->auto_temp[nr][point]);
2999         } else {
3000                 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
3001                                     data->auto_temp[nr][point]);
3002         }
3003         mutex_unlock(&data->update_lock);
3004         return count;
3005 }
3006
3007 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
3008                                       struct attribute *attr, int index)
3009 {
3010         struct device *dev = container_of(kobj, struct device, kobj);
3011         struct nct6775_data *data = dev_get_drvdata(dev);
3012         int pwm = index / 36;   /* pwm index */
3013         int nr = index % 36;    /* attribute index */
3014
3015         if (!(data->has_pwm & (1 << pwm)))
3016                 return 0;
3017
3018         if ((nr >= 14 && nr <= 18) || nr == 21)   /* weight */
3019                 if (!data->REG_WEIGHT_TEMP_SEL[pwm])
3020                         return 0;
3021         if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
3022                 return 0;
3023         if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
3024                 return 0;
3025         if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
3026                 return 0;
3027
3028         if (nr >= 22 && nr <= 35) {             /* auto point */
3029                 int api = (nr - 22) / 2;        /* auto point index */
3030
3031                 if (api > data->auto_pwm_num)
3032                         return 0;
3033         }
3034         return attr->mode;
3035 }
3036
3037 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", S_IWUSR | S_IRUGO,
3038                   show_fan_time, store_fan_time, 0, 0);
3039 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", S_IWUSR | S_IRUGO,
3040                   show_fan_time, store_fan_time, 0, 1);
3041 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", S_IWUSR | S_IRUGO,
3042                   show_fan_time, store_fan_time, 0, 2);
3043 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", S_IWUSR | S_IRUGO, show_pwm,
3044                   store_pwm, 0, 1);
3045 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", S_IWUSR | S_IRUGO, show_pwm,
3046                   store_pwm, 0, 2);
3047 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", S_IWUSR | S_IRUGO,
3048                   show_temp_tolerance, store_temp_tolerance, 0, 0);
3049 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance",
3050                   S_IWUSR | S_IRUGO, show_temp_tolerance, store_temp_tolerance,
3051                   0, 1);
3052
3053 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", S_IWUSR | S_IRUGO, show_pwm, store_pwm,
3054                   0, 3);
3055
3056 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", S_IWUSR | S_IRUGO, show_pwm,
3057                   store_pwm, 0, 4);
3058
3059 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm",
3060                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 0);
3061 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp",
3062                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 0);
3063
3064 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm",
3065                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 1);
3066 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp",
3067                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 1);
3068
3069 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm",
3070                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 2);
3071 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp",
3072                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 2);
3073
3074 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm",
3075                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 3);
3076 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp",
3077                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 3);
3078
3079 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm",
3080                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 4);
3081 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp",
3082                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 4);
3083
3084 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm",
3085                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 5);
3086 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp",
3087                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 5);
3088
3089 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm",
3090                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 6);
3091 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp",
3092                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 6);
3093
3094 /*
3095  * nct6775_pwm_is_visible uses the index into the following array
3096  * to determine if attributes should be created or not.
3097  * Any change in order or content must be matched.
3098  */
3099 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
3100         &sensor_dev_template_pwm,
3101         &sensor_dev_template_pwm_mode,
3102         &sensor_dev_template_pwm_enable,
3103         &sensor_dev_template_pwm_temp_sel,
3104         &sensor_dev_template_pwm_temp_tolerance,
3105         &sensor_dev_template_pwm_crit_temp_tolerance,
3106         &sensor_dev_template_pwm_target_temp,
3107         &sensor_dev_template_fan_target,
3108         &sensor_dev_template_fan_tolerance,
3109         &sensor_dev_template_pwm_stop_time,
3110         &sensor_dev_template_pwm_step_up_time,
3111         &sensor_dev_template_pwm_step_down_time,
3112         &sensor_dev_template_pwm_start,
3113         &sensor_dev_template_pwm_floor,
3114         &sensor_dev_template_pwm_weight_temp_sel,       /* 14 */
3115         &sensor_dev_template_pwm_weight_temp_step,
3116         &sensor_dev_template_pwm_weight_temp_step_tol,
3117         &sensor_dev_template_pwm_weight_temp_step_base,
3118         &sensor_dev_template_pwm_weight_duty_step,      /* 18 */
3119         &sensor_dev_template_pwm_max,                   /* 19 */
3120         &sensor_dev_template_pwm_step,                  /* 20 */
3121         &sensor_dev_template_pwm_weight_duty_base,      /* 21 */
3122         &sensor_dev_template_pwm_auto_point1_pwm,       /* 22 */
3123         &sensor_dev_template_pwm_auto_point1_temp,
3124         &sensor_dev_template_pwm_auto_point2_pwm,
3125         &sensor_dev_template_pwm_auto_point2_temp,
3126         &sensor_dev_template_pwm_auto_point3_pwm,
3127         &sensor_dev_template_pwm_auto_point3_temp,
3128         &sensor_dev_template_pwm_auto_point4_pwm,
3129         &sensor_dev_template_pwm_auto_point4_temp,
3130         &sensor_dev_template_pwm_auto_point5_pwm,
3131         &sensor_dev_template_pwm_auto_point5_temp,
3132         &sensor_dev_template_pwm_auto_point6_pwm,
3133         &sensor_dev_template_pwm_auto_point6_temp,
3134         &sensor_dev_template_pwm_auto_point7_pwm,
3135         &sensor_dev_template_pwm_auto_point7_temp,      /* 35 */
3136
3137         NULL
3138 };
3139
3140 static const struct sensor_template_group nct6775_pwm_template_group = {
3141         .templates = nct6775_attributes_pwm_template,
3142         .is_visible = nct6775_pwm_is_visible,
3143         .base = 1,
3144 };
3145
3146 static ssize_t
3147 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
3148 {
3149         struct nct6775_data *data = dev_get_drvdata(dev);
3150
3151         return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
3152 }
3153
3154 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
3155
3156 /* Case open detection */
3157
3158 static ssize_t
3159 clear_caseopen(struct device *dev, struct device_attribute *attr,
3160                const char *buf, size_t count)
3161 {
3162         struct nct6775_data *data = dev_get_drvdata(dev);
3163         int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
3164         unsigned long val;
3165         u8 reg;
3166         int ret;
3167
3168         if (kstrtoul(buf, 10, &val) || val != 0)
3169                 return -EINVAL;
3170
3171         mutex_lock(&data->update_lock);
3172
3173         /*
3174          * Use CR registers to clear caseopen status.
3175          * The CR registers are the same for all chips, and not all chips
3176          * support clearing the caseopen status through "regular" registers.
3177          */
3178         ret = superio_enter(data->sioreg);
3179         if (ret) {
3180                 count = ret;
3181                 goto error;
3182         }
3183
3184         superio_select(data->sioreg, NCT6775_LD_ACPI);
3185         reg = superio_inb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
3186         reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3187         superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3188         reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3189         superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3190         superio_exit(data->sioreg);
3191
3192         data->valid = false;    /* Force cache refresh */
3193 error:
3194         mutex_unlock(&data->update_lock);
3195         return count;
3196 }
3197
3198 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
3199                           clear_caseopen, INTRUSION_ALARM_BASE);
3200 static SENSOR_DEVICE_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
3201                           clear_caseopen, INTRUSION_ALARM_BASE + 1);
3202 static SENSOR_DEVICE_ATTR(intrusion0_beep, S_IWUSR | S_IRUGO, show_beep,
3203                           store_beep, INTRUSION_ALARM_BASE);
3204 static SENSOR_DEVICE_ATTR(intrusion1_beep, S_IWUSR | S_IRUGO, show_beep,
3205                           store_beep, INTRUSION_ALARM_BASE + 1);
3206 static SENSOR_DEVICE_ATTR(beep_enable, S_IWUSR | S_IRUGO, show_beep,
3207                           store_beep, BEEP_ENABLE_BASE);
3208
3209 static umode_t nct6775_other_is_visible(struct kobject *kobj,
3210                                         struct attribute *attr, int index)
3211 {
3212         struct device *dev = container_of(kobj, struct device, kobj);
3213         struct nct6775_data *data = dev_get_drvdata(dev);
3214
3215         if (index == 0 && !data->have_vid)
3216                 return 0;
3217
3218         if (index == 1 || index == 2) {
3219                 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + index - 1] < 0)
3220                         return 0;
3221         }
3222
3223         if (index == 3 || index == 4) {
3224                 if (data->BEEP_BITS[INTRUSION_ALARM_BASE + index - 3] < 0)
3225                         return 0;
3226         }
3227
3228         return attr->mode;
3229 }
3230
3231 /*
3232  * nct6775_other_is_visible uses the index into the following array
3233  * to determine if attributes should be created or not.
3234  * Any change in order or content must be matched.
3235  */
3236 static struct attribute *nct6775_attributes_other[] = {
3237         &dev_attr_cpu0_vid.attr,                                /* 0 */
3238         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,        /* 1 */
3239         &sensor_dev_attr_intrusion1_alarm.dev_attr.attr,        /* 2 */
3240         &sensor_dev_attr_intrusion0_beep.dev_attr.attr,         /* 3 */
3241         &sensor_dev_attr_intrusion1_beep.dev_attr.attr,         /* 4 */
3242         &sensor_dev_attr_beep_enable.dev_attr.attr,             /* 5 */
3243 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
3244         &dev_attr_name.attr,
3245 #endif
3246         NULL
3247 };
3248
3249 static const struct attribute_group nct6775_group_other = {
3250         .attrs = nct6775_attributes_other,
3251         .is_visible = nct6775_other_is_visible,
3252 };
3253
3254 static inline void nct6775_init_device(struct nct6775_data *data)
3255 {
3256         int i;
3257         u8 tmp, diode;
3258
3259         /* Start monitoring if needed */
3260         if (data->REG_CONFIG) {
3261                 tmp = nct6775_read_value(data, data->REG_CONFIG);
3262                 if (!(tmp & 0x01))
3263                         nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
3264         }
3265
3266         /* Enable temperature sensors if needed */
3267         for (i = 0; i < NUM_TEMP; i++) {
3268                 if (!(data->have_temp & (1 << i)))
3269                         continue;
3270                 if (!data->reg_temp_config[i])
3271                         continue;
3272                 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
3273                 if (tmp & 0x01)
3274                         nct6775_write_value(data, data->reg_temp_config[i],
3275                                             tmp & 0xfe);
3276         }
3277
3278         /* Enable VBAT monitoring if needed */
3279         tmp = nct6775_read_value(data, data->REG_VBAT);
3280         if (!(tmp & 0x01))
3281                 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
3282
3283         diode = nct6775_read_value(data, data->REG_DIODE);
3284
3285         for (i = 0; i < data->temp_fixed_num; i++) {
3286                 if (!(data->have_temp_fixed & (1 << i)))
3287                         continue;
3288                 if ((tmp & (data->DIODE_MASK << i)))    /* diode */
3289                         data->temp_type[i]
3290                           = 3 - ((diode >> i) & data->DIODE_MASK);
3291                 else                            /* thermistor */
3292                         data->temp_type[i] = 4;
3293         }
3294 }
3295
3296 static void
3297 nct6775_check_fan_inputs(struct nct6775_data *data)
3298 {
3299         bool fan3pin, fan4pin, fan4min, fan5pin, fan6pin;
3300         bool pwm3pin, pwm4pin, pwm5pin, pwm6pin;
3301         int sioreg = data->sioreg;
3302         int regval;
3303
3304         /* Store SIO_REG_ENABLE for use during resume */
3305         superio_select(sioreg, NCT6775_LD_HWM);
3306         data->sio_reg_enable = superio_inb(sioreg, SIO_REG_ENABLE);
3307
3308         /* fan4 and fan5 share some pins with the GPIO and serial flash */
3309         if (data->kind == nct6775) {
3310                 regval = superio_inb(sioreg, 0x2c);
3311
3312                 fan3pin = regval & (1 << 6);
3313                 pwm3pin = regval & (1 << 7);
3314
3315                 /* On NCT6775, fan4 shares pins with the fdc interface */
3316                 fan4pin = !(superio_inb(sioreg, 0x2A) & 0x80);
3317                 fan4min = false;
3318                 fan5pin = false;
3319                 fan6pin = false;
3320                 pwm4pin = false;
3321                 pwm5pin = false;
3322                 pwm6pin = false;
3323         } else if (data->kind == nct6776) {
3324                 bool gpok = superio_inb(sioreg, 0x27) & 0x80;
3325                 const char *board_vendor, *board_name;
3326
3327                 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
3328                 board_name = dmi_get_system_info(DMI_BOARD_NAME);
3329
3330                 if (board_name && board_vendor &&
3331                     !strcmp(board_vendor, "ASRock")) {
3332                         /*
3333                          * Auxiliary fan monitoring is not enabled on ASRock
3334                          * Z77 Pro4-M if booted in UEFI Ultra-FastBoot mode.
3335                          * Observed with BIOS version 2.00.
3336                          */
3337                         if (!strcmp(board_name, "Z77 Pro4-M")) {
3338                                 if ((data->sio_reg_enable & 0xe0) != 0xe0) {
3339                                         data->sio_reg_enable |= 0xe0;
3340                                         superio_outb(sioreg, SIO_REG_ENABLE,
3341                                                      data->sio_reg_enable);
3342                                 }
3343                         }
3344                 }
3345
3346                 if (data->sio_reg_enable & 0x80)
3347                         fan3pin = gpok;
3348                 else
3349                         fan3pin = !(superio_inb(sioreg, 0x24) & 0x40);
3350
3351                 if (data->sio_reg_enable & 0x40)
3352                         fan4pin = gpok;
3353                 else
3354                         fan4pin = superio_inb(sioreg, 0x1C) & 0x01;
3355
3356                 if (data->sio_reg_enable & 0x20)
3357                         fan5pin = gpok;
3358                 else
3359                         fan5pin = superio_inb(sioreg, 0x1C) & 0x02;
3360
3361                 fan4min = fan4pin;
3362                 fan6pin = false;
3363                 pwm3pin = fan3pin;
3364                 pwm4pin = false;
3365                 pwm5pin = false;
3366                 pwm6pin = false;
3367         } else if (data->kind == nct6106) {
3368                 regval = superio_inb(sioreg, 0x24);
3369                 fan3pin = !(regval & 0x80);
3370                 pwm3pin = regval & 0x08;
3371
3372                 fan4pin = false;
3373                 fan4min = false;
3374                 fan5pin = false;
3375                 fan6pin = false;
3376                 pwm4pin = false;
3377                 pwm5pin = false;
3378                 pwm6pin = false;
3379         } else {        /* NCT6779D, NCT6791D, NCT6792D, or NCT6793D */
3380                 regval = superio_inb(sioreg, 0x1c);
3381
3382                 fan3pin = !(regval & (1 << 5));
3383                 fan4pin = !(regval & (1 << 6));
3384                 fan5pin = !(regval & (1 << 7));
3385
3386                 pwm3pin = !(regval & (1 << 0));
3387                 pwm4pin = !(regval & (1 << 1));
3388                 pwm5pin = !(regval & (1 << 2));
3389
3390                 fan4min = fan4pin;
3391
3392                 if (data->kind == nct6791 || data->kind == nct6792 ||
3393                     data->kind == nct6793) {
3394                         regval = superio_inb(sioreg, 0x2d);
3395                         fan6pin = (regval & (1 << 1));
3396                         pwm6pin = (regval & (1 << 0));
3397                 } else {        /* NCT6779D */
3398                         fan6pin = false;
3399                         pwm6pin = false;
3400                 }
3401         }
3402
3403         /* fan 1 and 2 (0x03) are always present */
3404         data->has_fan = 0x03 | (fan3pin << 2) | (fan4pin << 3) |
3405                 (fan5pin << 4) | (fan6pin << 5);
3406         data->has_fan_min = 0x03 | (fan3pin << 2) | (fan4min << 3) |
3407                 (fan5pin << 4);
3408         data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) |
3409                 (pwm5pin << 4) | (pwm6pin << 5);
3410 }
3411
3412 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
3413                              int *available, int *mask)
3414 {
3415         int i;
3416         u8 src;
3417
3418         for (i = 0; i < data->pwm_num && *available; i++) {
3419                 int index;
3420
3421                 if (!regp[i])
3422                         continue;
3423                 src = nct6775_read_value(data, regp[i]);
3424                 src &= 0x1f;
3425                 if (!src || (*mask & (1 << src)))
3426                         continue;
3427                 if (src >= data->temp_label_num ||
3428                     !strlen(data->temp_label[src]))
3429                         continue;
3430
3431                 index = __ffs(*available);
3432                 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3433                 *available &= ~(1 << index);
3434                 *mask |= 1 << src;
3435         }
3436 }
3437
3438 static int nct6775_probe(struct platform_device *pdev)
3439 {
3440         struct device *dev = &pdev->dev;
3441         struct nct6775_sio_data *sio_data = dev_get_platdata(dev);
3442         struct nct6775_data *data;
3443         struct resource *res;
3444         int i, s, err = 0;
3445         int src, mask, available;
3446         const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3447         const u16 *reg_temp_mon, *reg_temp_alternate, *reg_temp_crit;
3448         const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL;
3449         int num_reg_temp, num_reg_temp_mon;
3450         u8 cr2a;
3451         struct attribute_group *group;
3452         struct device *hwmon_dev;
3453         int num_attr_groups = 0;
3454
3455         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3456         if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3457                                  DRVNAME))
3458                 return -EBUSY;
3459
3460         data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3461                             GFP_KERNEL);
3462         if (!data)
3463                 return -ENOMEM;
3464
3465         data->kind = sio_data->kind;
3466         data->sioreg = sio_data->sioreg;
3467         data->addr = res->start;
3468         mutex_init(&data->update_lock);
3469         data->name = nct6775_device_names[data->kind];
3470         data->bank = 0xff;              /* Force initial bank selection */
3471         platform_set_drvdata(pdev, data);
3472
3473         switch (data->kind) {
3474         case nct6106:
3475                 data->in_num = 9;
3476                 data->pwm_num = 3;
3477                 data->auto_pwm_num = 4;
3478                 data->temp_fixed_num = 3;
3479                 data->num_temp_alarms = 6;
3480                 data->num_temp_beeps = 6;
3481
3482                 data->fan_from_reg = fan_from_reg13;
3483                 data->fan_from_reg_min = fan_from_reg13;
3484
3485                 data->temp_label = nct6776_temp_label;
3486                 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3487
3488                 data->REG_VBAT = NCT6106_REG_VBAT;
3489                 data->REG_DIODE = NCT6106_REG_DIODE;
3490                 data->DIODE_MASK = NCT6106_DIODE_MASK;
3491                 data->REG_VIN = NCT6106_REG_IN;
3492                 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3493                 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3494                 data->REG_TARGET = NCT6106_REG_TARGET;
3495                 data->REG_FAN = NCT6106_REG_FAN;
3496                 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
3497                 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
3498                 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
3499                 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
3500                 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
3501                 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
3502                 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
3503                 data->REG_PWM[0] = NCT6106_REG_PWM;
3504                 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
3505                 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
3506                 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3507                 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3508                 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3509                 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3510                 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3511                 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
3512                 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
3513                 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
3514                 data->REG_CRITICAL_TEMP_TOLERANCE
3515                   = NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
3516                 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
3517                 data->CRITICAL_PWM_ENABLE_MASK
3518                   = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3519                 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
3520                 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3521                 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3522                 data->REG_TEMP_SEL = NCT6106_REG_TEMP_SEL;
3523                 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3524                 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3525                 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3526                 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3527                 data->REG_ALARM = NCT6106_REG_ALARM;
3528                 data->ALARM_BITS = NCT6106_ALARM_BITS;
3529                 data->REG_BEEP = NCT6106_REG_BEEP;
3530                 data->BEEP_BITS = NCT6106_BEEP_BITS;
3531
3532                 reg_temp = NCT6106_REG_TEMP;
3533                 reg_temp_mon = NCT6106_REG_TEMP_MON;
3534                 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3535                 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON);
3536                 reg_temp_over = NCT6106_REG_TEMP_OVER;
3537                 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3538                 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3539                 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3540                 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3541                 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3542                 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3543
3544                 break;
3545         case nct6775:
3546                 data->in_num = 9;
3547                 data->pwm_num = 3;
3548                 data->auto_pwm_num = 6;
3549                 data->has_fan_div = true;
3550                 data->temp_fixed_num = 3;
3551                 data->num_temp_alarms = 3;
3552                 data->num_temp_beeps = 3;
3553
3554                 data->ALARM_BITS = NCT6775_ALARM_BITS;
3555                 data->BEEP_BITS = NCT6775_BEEP_BITS;
3556
3557                 data->fan_from_reg = fan_from_reg16;
3558                 data->fan_from_reg_min = fan_from_reg8;
3559                 data->target_temp_mask = 0x7f;
3560                 data->tolerance_mask = 0x0f;
3561                 data->speed_tolerance_limit = 15;
3562
3563                 data->temp_label = nct6775_temp_label;
3564                 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
3565
3566                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3567                 data->REG_VBAT = NCT6775_REG_VBAT;
3568                 data->REG_DIODE = NCT6775_REG_DIODE;
3569                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3570                 data->REG_VIN = NCT6775_REG_IN;
3571                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3572                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3573                 data->REG_TARGET = NCT6775_REG_TARGET;
3574                 data->REG_FAN = NCT6775_REG_FAN;
3575                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3576                 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3577                 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3578                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3579                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3580                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3581                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3582                 data->REG_PWM[0] = NCT6775_REG_PWM;
3583                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3584                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3585                 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3586                 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3587                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3588                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3589                 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3590                 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3591                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3592                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3593                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3594                 data->REG_CRITICAL_TEMP_TOLERANCE
3595                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3596                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3597                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3598                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3599                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3600                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3601                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3602                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3603                 data->REG_ALARM = NCT6775_REG_ALARM;
3604                 data->REG_BEEP = NCT6775_REG_BEEP;
3605
3606                 reg_temp = NCT6775_REG_TEMP;
3607                 reg_temp_mon = NCT6775_REG_TEMP_MON;
3608                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3609                 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3610                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3611                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3612                 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3613                 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3614                 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3615
3616                 break;
3617         case nct6776:
3618                 data->in_num = 9;
3619                 data->pwm_num = 3;
3620                 data->auto_pwm_num = 4;
3621                 data->has_fan_div = false;
3622                 data->temp_fixed_num = 3;
3623                 data->num_temp_alarms = 3;
3624                 data->num_temp_beeps = 6;
3625
3626                 data->ALARM_BITS = NCT6776_ALARM_BITS;
3627                 data->BEEP_BITS = NCT6776_BEEP_BITS;
3628
3629                 data->fan_from_reg = fan_from_reg13;
3630                 data->fan_from_reg_min = fan_from_reg13;
3631                 data->target_temp_mask = 0xff;
3632                 data->tolerance_mask = 0x07;
3633                 data->speed_tolerance_limit = 63;
3634
3635                 data->temp_label = nct6776_temp_label;
3636                 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3637
3638                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3639                 data->REG_VBAT = NCT6775_REG_VBAT;
3640                 data->REG_DIODE = NCT6775_REG_DIODE;
3641                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3642                 data->REG_VIN = NCT6775_REG_IN;
3643                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3644                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3645                 data->REG_TARGET = NCT6775_REG_TARGET;
3646                 data->REG_FAN = NCT6775_REG_FAN;
3647                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3648                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3649                 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3650                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3651                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3652                 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3653                 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3654                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3655                 data->REG_PWM[0] = NCT6775_REG_PWM;
3656                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3657                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3658                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3659                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3660                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3661                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3662                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3663                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3664                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3665                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3666                 data->REG_CRITICAL_TEMP_TOLERANCE
3667                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3668                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3669                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3670                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3671                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3672                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3673                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3674                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3675                 data->REG_ALARM = NCT6775_REG_ALARM;
3676                 data->REG_BEEP = NCT6776_REG_BEEP;
3677
3678                 reg_temp = NCT6775_REG_TEMP;
3679                 reg_temp_mon = NCT6775_REG_TEMP_MON;
3680                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3681                 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3682                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3683                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3684                 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3685                 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3686                 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3687
3688                 break;
3689         case nct6779:
3690                 data->in_num = 15;
3691                 data->pwm_num = 5;
3692                 data->auto_pwm_num = 4;
3693                 data->has_fan_div = false;
3694                 data->temp_fixed_num = 6;
3695                 data->num_temp_alarms = 2;
3696                 data->num_temp_beeps = 2;
3697
3698                 data->ALARM_BITS = NCT6779_ALARM_BITS;
3699                 data->BEEP_BITS = NCT6779_BEEP_BITS;
3700
3701                 data->fan_from_reg = fan_from_reg13;
3702                 data->fan_from_reg_min = fan_from_reg13;
3703                 data->target_temp_mask = 0xff;
3704                 data->tolerance_mask = 0x07;
3705                 data->speed_tolerance_limit = 63;
3706
3707                 data->temp_label = nct6779_temp_label;
3708                 data->temp_label_num = NCT6779_NUM_LABELS;
3709
3710                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3711                 data->REG_VBAT = NCT6775_REG_VBAT;
3712                 data->REG_DIODE = NCT6775_REG_DIODE;
3713                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3714                 data->REG_VIN = NCT6779_REG_IN;
3715                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3716                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3717                 data->REG_TARGET = NCT6775_REG_TARGET;
3718                 data->REG_FAN = NCT6779_REG_FAN;
3719                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3720                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3721                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3722                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3723                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3724                 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3725                 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3726                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3727                 data->REG_PWM[0] = NCT6775_REG_PWM;
3728                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3729                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3730                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3731                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3732                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3733                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3734                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3735                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3736                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3737                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3738                 data->REG_CRITICAL_TEMP_TOLERANCE
3739                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3740                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3741                 data->CRITICAL_PWM_ENABLE_MASK
3742                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3743                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3744                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3745                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3746                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3747                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3748                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3749                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3750                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3751                 data->REG_ALARM = NCT6779_REG_ALARM;
3752                 data->REG_BEEP = NCT6776_REG_BEEP;
3753
3754                 reg_temp = NCT6779_REG_TEMP;
3755                 reg_temp_mon = NCT6779_REG_TEMP_MON;
3756                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3757                 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3758                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3759                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3760                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3761                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3762                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3763
3764                 break;
3765         case nct6791:
3766         case nct6792:
3767         case nct6793:
3768                 data->in_num = 15;
3769                 data->pwm_num = 6;
3770                 data->auto_pwm_num = 4;
3771                 data->has_fan_div = false;
3772                 data->temp_fixed_num = 6;
3773                 data->num_temp_alarms = 2;
3774                 data->num_temp_beeps = 2;
3775
3776                 data->ALARM_BITS = NCT6791_ALARM_BITS;
3777                 data->BEEP_BITS = NCT6779_BEEP_BITS;
3778
3779                 data->fan_from_reg = fan_from_reg13;
3780                 data->fan_from_reg_min = fan_from_reg13;
3781                 data->target_temp_mask = 0xff;
3782                 data->tolerance_mask = 0x07;
3783                 data->speed_tolerance_limit = 63;
3784
3785                 switch (data->kind) {
3786                 default:
3787                 case nct6791:
3788                         data->temp_label = nct6779_temp_label;
3789                         break;
3790                 case nct6792:
3791                         data->temp_label = nct6792_temp_label;
3792                         break;
3793                 case nct6793:
3794                         data->temp_label = nct6793_temp_label;
3795                         break;
3796                 }
3797                 data->temp_label_num = NCT6791_NUM_LABELS;
3798
3799                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3800                 data->REG_VBAT = NCT6775_REG_VBAT;
3801                 data->REG_DIODE = NCT6775_REG_DIODE;
3802                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3803                 data->REG_VIN = NCT6779_REG_IN;
3804                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3805                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3806                 data->REG_TARGET = NCT6775_REG_TARGET;
3807                 data->REG_FAN = NCT6779_REG_FAN;
3808                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3809                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3810                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3811                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3812                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3813                 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3814                 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3815                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3816                 data->REG_PWM[0] = NCT6775_REG_PWM;
3817                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3818                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3819                 data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP;
3820                 data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE;
3821                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3822                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3823                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3824                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3825                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3826                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3827                 data->REG_CRITICAL_TEMP_TOLERANCE
3828                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3829                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3830                 data->CRITICAL_PWM_ENABLE_MASK
3831                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3832                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3833                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3834                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3835                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3836                 data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL;
3837                 data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP;
3838                 data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL;
3839                 data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE;
3840                 data->REG_ALARM = NCT6791_REG_ALARM;
3841                 if (data->kind == nct6791)
3842                         data->REG_BEEP = NCT6776_REG_BEEP;
3843                 else
3844                         data->REG_BEEP = NCT6792_REG_BEEP;
3845
3846                 reg_temp = NCT6779_REG_TEMP;
3847                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3848                 if (data->kind == nct6791) {
3849                         reg_temp_mon = NCT6779_REG_TEMP_MON;
3850                         num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3851                 } else {
3852                         reg_temp_mon = NCT6792_REG_TEMP_MON;
3853                         num_reg_temp_mon = ARRAY_SIZE(NCT6792_REG_TEMP_MON);
3854                 }
3855                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3856                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3857                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3858                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3859                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3860
3861                 break;
3862         default:
3863                 return -ENODEV;
3864         }
3865         data->have_in = (1 << data->in_num) - 1;
3866         data->have_temp = 0;
3867
3868         /*
3869          * On some boards, not all available temperature sources are monitored,
3870          * even though some of the monitoring registers are unused.
3871          * Get list of unused monitoring registers, then detect if any fan
3872          * controls are configured to use unmonitored temperature sources.
3873          * If so, assign the unmonitored temperature sources to available
3874          * monitoring registers.
3875          */
3876         mask = 0;
3877         available = 0;
3878         for (i = 0; i < num_reg_temp; i++) {
3879                 if (reg_temp[i] == 0)
3880                         continue;
3881
3882                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3883                 if (!src || (mask & (1 << src)))
3884                         available |= 1 << i;
3885
3886                 mask |= 1 << src;
3887         }
3888
3889         /*
3890          * Now find unmonitored temperature registers and enable monitoring
3891          * if additional monitoring registers are available.
3892          */
3893         add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
3894         add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
3895
3896         mask = 0;
3897         s = NUM_TEMP_FIXED;     /* First dynamic temperature attribute */
3898         for (i = 0; i < num_reg_temp; i++) {
3899                 if (reg_temp[i] == 0)
3900                         continue;
3901
3902                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3903                 if (!src || (mask & (1 << src)))
3904                         continue;
3905
3906                 if (src >= data->temp_label_num ||
3907                     !strlen(data->temp_label[src])) {
3908                         dev_info(dev,
3909                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3910                                  src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
3911                         continue;
3912                 }
3913
3914                 mask |= 1 << src;
3915
3916                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3917                 if (src <= data->temp_fixed_num) {
3918                         data->have_temp |= 1 << (src - 1);
3919                         data->have_temp_fixed |= 1 << (src - 1);
3920                         data->reg_temp[0][src - 1] = reg_temp[i];
3921                         data->reg_temp[1][src - 1] = reg_temp_over[i];
3922                         data->reg_temp[2][src - 1] = reg_temp_hyst[i];
3923                         if (reg_temp_crit_h && reg_temp_crit_h[i])
3924                                 data->reg_temp[3][src - 1] = reg_temp_crit_h[i];
3925                         else if (reg_temp_crit[src - 1])
3926                                 data->reg_temp[3][src - 1]
3927                                   = reg_temp_crit[src - 1];
3928                         if (reg_temp_crit_l && reg_temp_crit_l[i])
3929                                 data->reg_temp[4][src - 1] = reg_temp_crit_l[i];
3930                         data->reg_temp_config[src - 1] = reg_temp_config[i];
3931                         data->temp_src[src - 1] = src;
3932                         continue;
3933                 }
3934
3935                 if (s >= NUM_TEMP)
3936                         continue;
3937
3938                 /* Use dynamic index for other sources */
3939                 data->have_temp |= 1 << s;
3940                 data->reg_temp[0][s] = reg_temp[i];
3941                 data->reg_temp[1][s] = reg_temp_over[i];
3942                 data->reg_temp[2][s] = reg_temp_hyst[i];
3943                 data->reg_temp_config[s] = reg_temp_config[i];
3944                 if (reg_temp_crit_h && reg_temp_crit_h[i])
3945                         data->reg_temp[3][s] = reg_temp_crit_h[i];
3946                 else if (reg_temp_crit[src - 1])
3947                         data->reg_temp[3][s] = reg_temp_crit[src - 1];
3948                 if (reg_temp_crit_l && reg_temp_crit_l[i])
3949                         data->reg_temp[4][s] = reg_temp_crit_l[i];
3950
3951                 data->temp_src[s] = src;
3952                 s++;
3953         }
3954
3955         /*
3956          * Repeat with temperatures used for fan control.
3957          * This set of registers does not support limits.
3958          */
3959         for (i = 0; i < num_reg_temp_mon; i++) {
3960                 if (reg_temp_mon[i] == 0)
3961                         continue;
3962
3963                 src = nct6775_read_value(data, data->REG_TEMP_SEL[i]) & 0x1f;
3964                 if (!src)
3965                         continue;
3966
3967                 if (src >= data->temp_label_num ||
3968                     !strlen(data->temp_label[src])) {
3969                         dev_info(dev,
3970                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3971                                  src, i, data->REG_TEMP_SEL[i],
3972                                  reg_temp_mon[i]);
3973                         continue;
3974                 }
3975
3976                 /*
3977                  * For virtual temperature sources, the 'virtual' temperature
3978                  * for each fan reflects a different temperature, and there
3979                  * are no duplicates.
3980                  */
3981                 if (src != TEMP_SOURCE_VIRTUAL) {
3982                         if (mask & (1 << src))
3983                                 continue;
3984                         mask |= 1 << src;
3985                 }
3986
3987                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3988                 if (src <= data->temp_fixed_num) {
3989                         if (data->have_temp & (1 << (src - 1)))
3990                                 continue;
3991                         data->have_temp |= 1 << (src - 1);
3992                         data->have_temp_fixed |= 1 << (src - 1);
3993                         data->reg_temp[0][src - 1] = reg_temp_mon[i];
3994                         data->temp_src[src - 1] = src;
3995                         continue;
3996                 }
3997
3998                 if (s >= NUM_TEMP)
3999                         continue;
4000
4001                 /* Use dynamic index for other sources */
4002                 data->have_temp |= 1 << s;
4003                 data->reg_temp[0][s] = reg_temp_mon[i];
4004                 data->temp_src[s] = src;
4005                 s++;
4006         }
4007
4008 #ifdef USE_ALTERNATE
4009         /*
4010          * Go through the list of alternate temp registers and enable
4011          * if possible.
4012          * The temperature is already monitored if the respective bit in <mask>
4013          * is set.
4014          */
4015         for (i = 0; i < data->temp_label_num - 1; i++) {
4016                 if (!reg_temp_alternate[i])
4017                         continue;
4018                 if (mask & (1 << (i + 1)))
4019                         continue;
4020                 if (i < data->temp_fixed_num) {
4021                         if (data->have_temp & (1 << i))
4022                                 continue;
4023                         data->have_temp |= 1 << i;
4024                         data->have_temp_fixed |= 1 << i;
4025                         data->reg_temp[0][i] = reg_temp_alternate[i];
4026                         if (i < num_reg_temp) {
4027                                 data->reg_temp[1][i] = reg_temp_over[i];
4028                                 data->reg_temp[2][i] = reg_temp_hyst[i];
4029                         }
4030                         data->temp_src[i] = i + 1;
4031                         continue;
4032                 }
4033
4034                 if (s >= NUM_TEMP)      /* Abort if no more space */
4035                         break;
4036
4037                 data->have_temp |= 1 << s;
4038                 data->reg_temp[0][s] = reg_temp_alternate[i];
4039                 data->temp_src[s] = i + 1;
4040                 s++;
4041         }
4042 #endif /* USE_ALTERNATE */
4043
4044         /* Initialize the chip */
4045         nct6775_init_device(data);
4046
4047         err = superio_enter(sio_data->sioreg);
4048         if (err)
4049                 return err;
4050
4051         cr2a = superio_inb(sio_data->sioreg, 0x2a);
4052         switch (data->kind) {
4053         case nct6775:
4054                 data->have_vid = (cr2a & 0x40);
4055                 break;
4056         case nct6776:
4057                 data->have_vid = (cr2a & 0x60) == 0x40;
4058                 break;
4059         case nct6106:
4060         case nct6779:
4061         case nct6791:
4062         case nct6792:
4063         case nct6793:
4064                 break;
4065         }
4066
4067         /*
4068          * Read VID value
4069          * We can get the VID input values directly at logical device D 0xe3.
4070          */
4071         if (data->have_vid) {
4072                 superio_select(sio_data->sioreg, NCT6775_LD_VID);
4073                 data->vid = superio_inb(sio_data->sioreg, 0xe3);
4074                 data->vrm = vid_which_vrm();
4075         }
4076
4077         if (fan_debounce) {
4078                 u8 tmp;
4079
4080                 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
4081                 tmp = superio_inb(sio_data->sioreg,
4082                                   NCT6775_REG_CR_FAN_DEBOUNCE);
4083                 switch (data->kind) {
4084                 case nct6106:
4085                         tmp |= 0xe0;
4086                         break;
4087                 case nct6775:
4088                         tmp |= 0x1e;
4089                         break;
4090                 case nct6776:
4091                 case nct6779:
4092                         tmp |= 0x3e;
4093                         break;
4094                 case nct6791:
4095                 case nct6792:
4096                 case nct6793:
4097                         tmp |= 0x7e;
4098                         break;
4099                 }
4100                 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
4101                              tmp);
4102                 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
4103                          data->name);
4104         }
4105
4106         nct6775_check_fan_inputs(data);
4107
4108         superio_exit(sio_data->sioreg);
4109
4110         /* Read fan clock dividers immediately */
4111         nct6775_init_fan_common(dev, data);
4112
4113         /* Register sysfs hooks */
4114         group = nct6775_create_attr_group(dev, &nct6775_pwm_template_group,
4115                                           data->pwm_num);
4116         if (IS_ERR(group))
4117                 return PTR_ERR(group);
4118
4119         data->groups[num_attr_groups++] = group;
4120
4121         group = nct6775_create_attr_group(dev, &nct6775_in_template_group,
4122                                           fls(data->have_in));
4123         if (IS_ERR(group))
4124                 return PTR_ERR(group);
4125
4126         data->groups[num_attr_groups++] = group;
4127
4128         group = nct6775_create_attr_group(dev, &nct6775_fan_template_group,
4129                                           fls(data->has_fan));
4130         if (IS_ERR(group))
4131                 return PTR_ERR(group);
4132
4133         data->groups[num_attr_groups++] = group;
4134
4135         group = nct6775_create_attr_group(dev, &nct6775_temp_template_group,
4136                                           fls(data->have_temp));
4137         if (IS_ERR(group))
4138                 return PTR_ERR(group);
4139
4140         data->groups[num_attr_groups++] = group;
4141         data->groups[num_attr_groups++] = &nct6775_group_other;
4142
4143 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4144         err = sysfs_create_groups(&dev->kobj, data->groups);
4145         if (err < 0)
4146                 return err;
4147         hwmon_dev = hwmon_device_register(dev);
4148         if (IS_ERR(hwmon_dev)) {
4149                 sysfs_remove_groups(&dev->kobj, data->groups);
4150                 return PTR_ERR(hwmon_dev);
4151         }
4152         data->hwmon_dev = hwmon_dev;
4153 #else
4154         hwmon_dev = devm_hwmon_device_register_with_groups(dev, data->name,
4155                                                            data, data->groups);
4156 #endif
4157         return PTR_ERR_OR_ZERO(hwmon_dev);
4158 }
4159
4160 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4161 static int nct6775_remove(struct platform_device *pdev)
4162 {
4163         struct nct6775_data *data = platform_get_drvdata(pdev);
4164
4165         hwmon_device_unregister(data->hwmon_dev);
4166         sysfs_remove_groups(&pdev->dev.kobj, data->groups);
4167         return 0;
4168 }
4169 #endif
4170
4171 static void nct6791_enable_io_mapping(int sioaddr)
4172 {
4173         int val;
4174
4175         val = superio_inb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE);
4176         if (val & 0x10) {
4177                 pr_info("Enabling hardware monitor logical device mappings.\n");
4178                 superio_outb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE,
4179                              val & ~0x10);
4180         }
4181 }
4182
4183 static int __maybe_unused nct6775_suspend(struct device *dev)
4184 {
4185         struct nct6775_data *data = nct6775_update_device(dev);
4186
4187         mutex_lock(&data->update_lock);
4188         data->vbat = nct6775_read_value(data, data->REG_VBAT);
4189         if (data->kind == nct6775) {
4190                 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
4191                 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
4192         }
4193         mutex_unlock(&data->update_lock);
4194
4195         return 0;
4196 }
4197
4198 static int __maybe_unused nct6775_resume(struct device *dev)
4199 {
4200         struct nct6775_data *data = dev_get_drvdata(dev);
4201         int sioreg = data->sioreg;
4202         int i, j, err = 0;
4203         u8 reg;
4204
4205         mutex_lock(&data->update_lock);
4206         data->bank = 0xff;              /* Force initial bank selection */
4207
4208         err = superio_enter(sioreg);
4209         if (err)
4210                 goto abort;
4211
4212         superio_select(sioreg, NCT6775_LD_HWM);
4213         reg = superio_inb(sioreg, SIO_REG_ENABLE);
4214         if (reg != data->sio_reg_enable)
4215                 superio_outb(sioreg, SIO_REG_ENABLE, data->sio_reg_enable);
4216
4217         if (data->kind == nct6791 || data->kind == nct6792 ||
4218             data->kind == nct6793)
4219                 nct6791_enable_io_mapping(sioreg);
4220
4221         superio_exit(sioreg);
4222
4223         /* Restore limits */
4224         for (i = 0; i < data->in_num; i++) {
4225                 if (!(data->have_in & (1 << i)))
4226                         continue;
4227
4228                 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
4229                                     data->in[i][1]);
4230                 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
4231                                     data->in[i][2]);
4232         }
4233
4234         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
4235                 if (!(data->has_fan_min & (1 << i)))
4236                         continue;
4237
4238                 nct6775_write_value(data, data->REG_FAN_MIN[i],
4239                                     data->fan_min[i]);
4240         }
4241
4242         for (i = 0; i < NUM_TEMP; i++) {
4243                 if (!(data->have_temp & (1 << i)))
4244                         continue;
4245
4246                 for (j = 1; j < ARRAY_SIZE(data->reg_temp); j++)
4247                         if (data->reg_temp[j][i])
4248                                 nct6775_write_temp(data, data->reg_temp[j][i],
4249                                                    data->temp[j][i]);
4250         }
4251
4252         /* Restore other settings */
4253         nct6775_write_value(data, data->REG_VBAT, data->vbat);
4254         if (data->kind == nct6775) {
4255                 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
4256                 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
4257         }
4258
4259 abort:
4260         /* Force re-reading all values */
4261         data->valid = false;
4262         mutex_unlock(&data->update_lock);
4263
4264         return err;
4265 }
4266
4267 static SIMPLE_DEV_PM_OPS(nct6775_dev_pm_ops, nct6775_suspend, nct6775_resume);
4268
4269 static struct platform_driver nct6775_driver = {
4270         .driver = {
4271                 .owner  = THIS_MODULE,
4272                 .name   = DRVNAME,
4273                 .pm     = &nct6775_dev_pm_ops,
4274         },
4275         .probe          = nct6775_probe,
4276 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4277         .remove         = nct6775_remove,
4278 #endif
4279 };
4280
4281 /* nct6775_find() looks for a '627 in the Super-I/O config space */
4282 static int __init nct6775_find(int sioaddr, struct nct6775_sio_data *sio_data)
4283 {
4284         u16 val;
4285         int err;
4286         int addr;
4287
4288         err = superio_enter(sioaddr);
4289         if (err)
4290                 return err;
4291
4292         val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8) |
4293                 superio_inb(sioaddr, SIO_REG_DEVID + 1);
4294         if (force_id && val != 0xffff)
4295                 val = force_id;
4296
4297         switch (val & SIO_ID_MASK) {
4298         case SIO_NCT6106_ID:
4299                 sio_data->kind = nct6106;
4300                 break;
4301         case SIO_NCT6775_ID:
4302                 sio_data->kind = nct6775;
4303                 break;
4304         case SIO_NCT6776_ID:
4305                 sio_data->kind = nct6776;
4306                 break;
4307         case SIO_NCT6779_ID:
4308                 sio_data->kind = nct6779;
4309                 break;
4310         case SIO_NCT6791_ID:
4311                 sio_data->kind = nct6791;
4312                 break;
4313         case SIO_NCT6792_ID:
4314                 sio_data->kind = nct6792;
4315                 break;
4316         case SIO_NCT6793_ID:
4317                 sio_data->kind = nct6793;
4318                 break;
4319         default:
4320                 if (val != 0xffff)
4321                         pr_debug("unsupported chip ID: 0x%04x\n", val);
4322                 superio_exit(sioaddr);
4323                 return -ENODEV;
4324         }
4325
4326         /* We have a known chip, find the HWM I/O address */
4327         superio_select(sioaddr, NCT6775_LD_HWM);
4328         val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
4329             | superio_inb(sioaddr, SIO_REG_ADDR + 1);
4330         addr = val & IOREGION_ALIGNMENT;
4331         if (addr == 0) {
4332                 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
4333                 superio_exit(sioaddr);
4334                 return -ENODEV;
4335         }
4336
4337         /* Activate logical device if needed */
4338         val = superio_inb(sioaddr, SIO_REG_ENABLE);
4339         if (!(val & 0x01)) {
4340                 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
4341                 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
4342         }
4343
4344         if (sio_data->kind == nct6791 || sio_data->kind == nct6792 ||
4345             sio_data->kind == nct6793)
4346                 nct6791_enable_io_mapping(sioaddr);
4347
4348         superio_exit(sioaddr);
4349         pr_info("Found %s or compatible chip at %#x:%#x\n",
4350                 nct6775_sio_names[sio_data->kind], sioaddr, addr);
4351         sio_data->sioreg = sioaddr;
4352
4353         return addr;
4354 }
4355
4356 /*
4357  * when Super-I/O functions move to a separate file, the Super-I/O
4358  * bus will manage the lifetime of the device and this module will only keep
4359  * track of the nct6775 driver. But since we use platform_device_alloc(), we
4360  * must keep track of the device
4361  */
4362 static struct platform_device *pdev[2];
4363
4364 static int __init sensors_nct6775_init(void)
4365 {
4366         int i, err;
4367         bool found = false;
4368         int address;
4369         struct resource res;
4370         struct nct6775_sio_data sio_data;
4371         int sioaddr[2] = { 0x2e, 0x4e };
4372
4373         err = platform_driver_register(&nct6775_driver);
4374         if (err)
4375                 return err;
4376
4377         /*
4378          * initialize sio_data->kind and sio_data->sioreg.
4379          *
4380          * when Super-I/O functions move to a separate file, the Super-I/O
4381          * driver will probe 0x2e and 0x4e and auto-detect the presence of a
4382          * nct6775 hardware monitor, and call probe()
4383          */
4384         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4385                 address = nct6775_find(sioaddr[i], &sio_data);
4386                 if (address <= 0)
4387                         continue;
4388
4389                 found = true;
4390
4391                 pdev[i] = platform_device_alloc(DRVNAME, address);
4392                 if (!pdev[i]) {
4393                         err = -ENOMEM;
4394                         goto exit_device_unregister;
4395                 }
4396
4397                 err = platform_device_add_data(pdev[i], &sio_data,
4398                                                sizeof(struct nct6775_sio_data));
4399                 if (err)
4400                         goto exit_device_put;
4401
4402                 memset(&res, 0, sizeof(res));
4403                 res.name = DRVNAME;
4404                 res.start = address + IOREGION_OFFSET;
4405                 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
4406                 res.flags = IORESOURCE_IO;
4407
4408                 err = acpi_check_resource_conflict(&res);
4409                 if (err) {
4410                         platform_device_put(pdev[i]);
4411                         pdev[i] = NULL;
4412                         continue;
4413                 }
4414
4415                 err = platform_device_add_resources(pdev[i], &res, 1);
4416                 if (err)
4417                         goto exit_device_put;
4418
4419                 /* platform_device_add calls probe() */
4420                 err = platform_device_add(pdev[i]);
4421                 if (err)
4422                         goto exit_device_put;
4423         }
4424         if (!found) {
4425                 err = -ENODEV;
4426                 goto exit_unregister;
4427         }
4428
4429         return 0;
4430
4431 exit_device_put:
4432         platform_device_put(pdev[i]);
4433 exit_device_unregister:
4434         while (--i >= 0) {
4435                 if (pdev[i])
4436                         platform_device_unregister(pdev[i]);
4437         }
4438 exit_unregister:
4439         platform_driver_unregister(&nct6775_driver);
4440         return err;
4441 }
4442
4443 static void __exit sensors_nct6775_exit(void)
4444 {
4445         int i;
4446
4447         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4448                 if (pdev[i])
4449                         platform_device_unregister(pdev[i]);
4450         }
4451         platform_driver_unregister(&nct6775_driver);
4452 }
4453
4454 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4455 MODULE_DESCRIPTION("Driver for NCT6775F and compatible chips");
4456 MODULE_LICENSE("GPL");
4457
4458 module_init(sensors_nct6775_init);
4459 module_exit(sensors_nct6775_exit);