2 * nct6775 - Driver for the hardware monitoring functionality of
3 * Nuvoton NCT677x Super-I/O chips
5 * Copyright (C) 2012 Guenter Roeck <linux@roeck-us.net>
7 * Derived from w83627ehf driver
8 * Copyright (C) 2005-2011 Jean Delvare <khali@linux-fr.org>
9 * Copyright (C) 2006 Yuan Mu (Winbond),
10 * Rudolf Marek <r.marek@assembler.cz>
11 * David Hubbard <david.c.hubbard@gmail.com>
12 * Daniel J Blueman <daniel.blueman@gmail.com>
13 * Copyright (C) 2010 Sheng-Yuan Huang (Nuvoton) (PS00)
15 * Shamelessly ripped from the w83627hf driver
16 * Copyright (C) 2003 Mark Studebaker
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
33 * Supports the following chips:
35 * Chip #vin #fan #pwm #temp chip IDs man ID
36 * nct6775f 9 4 3 6+3 0xb470 0xc1 0x5ca3
37 * nct6776f 9 5 3 6+3 0xc330 0xc1 0x5ca3
38 * nct6779d 15 5 5 2+5 0xc560 0xc1 0x5ca3
41 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
43 #include <linux/module.h>
44 #include <linux/init.h>
45 #include <linux/slab.h>
46 #include <linux/jiffies.h>
47 #include <linux/platform_device.h>
48 #include <linux/hwmon.h>
49 #include <linux/hwmon-sysfs.h>
50 #include <linux/hwmon-vid.h>
51 #include <linux/err.h>
52 #include <linux/mutex.h>
53 #include <linux/acpi.h>
57 enum kinds { nct6775, nct6776, nct6779 };
59 /* used to set data->name = nct6775_device_names[data->sio_kind] */
60 static const char * const nct6775_device_names[] = {
66 static unsigned short force_id;
67 module_param(force_id, ushort, 0);
68 MODULE_PARM_DESC(force_id, "Override the detected device ID");
70 static unsigned short fan_debounce;
71 module_param(fan_debounce, ushort, 0);
72 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
74 #define DRVNAME "nct6775"
77 * Super-I/O constants and functions
80 #define NCT6775_LD_ACPI 0x0a
81 #define NCT6775_LD_HWM 0x0b
82 #define NCT6775_LD_VID 0x0d
84 #define SIO_REG_LDSEL 0x07 /* Logical device select */
85 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
86 #define SIO_REG_EN_VRM10 0x2C /* GPIO3, GPIO4 selection */
87 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
88 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
89 #define SIO_REG_VID_CTRL 0xF0 /* VID control */
90 #define SIO_REG_VID_DATA 0xF1 /* VID data */
92 #define SIO_NCT6775_ID 0xb470
93 #define SIO_NCT6776_ID 0xc330
94 #define SIO_NCT6779_ID 0xc560
95 #define SIO_ID_MASK 0xFFF0
98 superio_outb(int ioreg, int reg, int val)
101 outb(val, ioreg + 1);
105 superio_inb(int ioreg, int reg)
108 return inb(ioreg + 1);
112 superio_select(int ioreg, int ld)
114 outb(SIO_REG_LDSEL, ioreg);
119 superio_enter(int ioreg)
126 superio_exit(int ioreg)
130 outb(0x02, ioreg + 1);
137 #define IOREGION_ALIGNMENT (~7)
138 #define IOREGION_OFFSET 5
139 #define IOREGION_LENGTH 2
140 #define ADDR_REG_OFFSET 0
141 #define DATA_REG_OFFSET 1
143 #define NCT6775_REG_BANK 0x4E
144 #define NCT6775_REG_CONFIG 0x40
147 * Not currently used:
148 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
149 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
150 * REG_MAN_ID is at port 0x4f
151 * REG_CHIP_ID is at port 0x58
154 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
156 /* Voltage min/max registers for nr=7..14 are in bank 5 */
158 static const u16 NCT6775_REG_IN_MAX[] = {
159 0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556 };
160 static const u16 NCT6775_REG_IN_MIN[] = {
161 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557 };
162 static const u16 NCT6775_REG_IN[] = {
163 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
166 static const u16 NCT6779_REG_IN[] = {
167 0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
168 0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e
171 #define NCT6775_REG_VBAT 0x5D
172 #define NCT6775_REG_DIODE 0x5E
174 #define NCT6775_REG_FANDIV1 0x506
175 #define NCT6775_REG_FANDIV2 0x507
177 #define NCT6775_REG_CR_FAN_DEBOUNCE 0xf0
179 static const u16 NCT6775_REG_ALARM[6] = { 0x459, 0x45A, 0x45B };
180 static const u16 NCT6779_REG_ALARM[6] = { 0x459, 0x45A, 0x45B, 0x568 };
182 #define NCT6775_REG_CASEOPEN 0x42
184 static const u8 NCT6775_CASEOPEN_MASK[] = { 0x10, 0x00 };
185 static const u8 NCT6776_CASEOPEN_MASK[] = { 0x10, 0x40 };
187 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
188 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
190 /* DC or PWM output fan configuration */
191 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
192 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
194 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0 };
195 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0 };
197 /* Advanced Fan control, some values are common for all fans */
199 static const u16 NCT6775_REG_TARGET[] = { 0x101, 0x201, 0x301, 0x801, 0x901 };
200 static const u16 NCT6775_REG_FAN_MODE[] = { 0x102, 0x202, 0x302, 0x802, 0x902 };
201 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
202 0x103, 0x203, 0x303, 0x803, 0x903 };
203 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
204 0x104, 0x204, 0x304, 0x804, 0x904 };
205 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
206 0x105, 0x205, 0x305, 0x805, 0x905 };
207 static const u16 NCT6775_REG_FAN_START_OUTPUT[]
208 = { 0x106, 0x206, 0x306, 0x806, 0x906 };
209 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
210 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
212 static const u16 NCT6775_REG_FAN_STOP_TIME[]
213 = { 0x107, 0x207, 0x307, 0x807, 0x907 };
214 static const u16 NCT6775_REG_PWM[] = { 0x109, 0x209, 0x309, 0x809, 0x909 };
215 static const u16 NCT6775_REG_PWM_READ[] = { 0x01, 0x03, 0x11, 0x13, 0x15 };
217 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
219 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642};
221 static const u16 NCT6779_REG_TOLERANCE_H[]
222 = { 0x10c, 0x20c, 0x30c, 0x40c, 0x50c };
224 static const u16 NCT6779_REG_FAN[] = { 0x4c0, 0x4c2, 0x4c4, 0x4c6, 0x4c8 };
226 static const u16 NCT6775_REG_TEMP[]
227 = { 0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
228 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
229 static const u16 NCT6779_REG_TEMP_FIXED[]
230 = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495};
232 static const u16 NCT6775_REG_TEMP_CONFIG[]
233 = { 0, 0x152, 0x252, 0x628, 0x629, 0x62A };
234 static const u16 NCT6775_REG_TEMP_HYST[]
235 = { 0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
236 static const u16 NCT6775_REG_TEMP_OVER[]
237 = { 0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
239 static const u16 NCT6775_REG_TEMP_SOURCE[]
240 = { 0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
242 static const u16 NCT6775_REG_TEMP_SEL[]
243 = { 0x100, 0x200, 0x300, 0x800, 0x900 };
245 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[]
246 = { 0x139, 0x239, 0x339, 0x839, 0x939 };
247 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[]
248 = { 0x13a, 0x23a, 0x33a, 0x83a, 0x93a };
249 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[]
250 = { 0x13b, 0x23b, 0x33b, 0x83b, 0x93b };
251 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[]
252 = { 0x13c, 0x23c, 0x33c, 0x83c, 0x93c };
253 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[]
254 = { 0x13d, 0x23d, 0x33d, 0x83d, 0x93d };
256 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[]
257 = { 0x13e, 0x23e, 0x33e, 0x83e, 0x93e };
259 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
261 static const u16 NCT6779_REG_TEMP_OFFSET[]
262 = { 0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
264 static const u16 NCT6776_REG_TEMP_CONFIG[11]
265 = { 0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
267 static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b };
269 static const u16 NCT6775_REG_AUTO_TEMP[]
270 = { 0x121, 0x221, 0x321, 0x821, 0x921 };
271 static const u16 NCT6775_REG_AUTO_PWM[]
272 = { 0x127, 0x227, 0x327, 0x827, 0x927 };
274 #define NCT6775_AUTO_TEMP(data, nr, p) ((data)->REG_AUTO_TEMP[nr] + (p))
275 #define NCT6775_AUTO_PWM(data, nr, p) ((data)->REG_AUTO_PWM[nr] + (p))
277 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
279 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
280 0x135, 0x235, 0x335, 0x835, 0x935 };
281 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
282 0x138, 0x238, 0x338, 0x838, 0x938 };
284 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
285 0x136, 0x236, 0x336, 0x836, 0x936 };
286 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
287 0x137, 0x237, 0x337, 0x837, 0x937 };
289 static const char *const nct6775_temp_label[] = {
303 "PCH_CHIP_CPU_MAX_TEMP",
313 static const char *const nct6776_temp_label[] = {
328 "PCH_CHIP_CPU_MAX_TEMP",
339 static const char *const nct6779_temp_label[] = {
358 "PCH_CHIP_CPU_MAX_TEMP",
369 #define NUM_TEMP 10 /* Max number of temp attribute sets w/ limits*/
370 #define NUM_TEMP_FIXED 6 /* Max number of fixed temp attribute sets */
372 #define NUM_REG_TEMP ARRAY_SIZE(NCT6775_REG_TEMP)
374 static inline int reg_to_pwm_enable(int pwm, int mode)
376 if (mode == 0 && pwm == 255)
381 static inline int pwm_enable_to_reg(int mode)
392 /* 1 is DC mode, output in ms */
393 static inline unsigned int step_time_from_reg(u8 reg, u8 mode)
395 return mode ? 400 * reg : 100 * reg;
398 static inline u8 step_time_to_reg(unsigned int msec, u8 mode)
400 return SENSORS_LIMIT((mode ? (msec + 200) / 400 :
401 (msec + 50) / 100), 1, 255);
404 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
406 if (reg == 0 || reg == 255)
408 return 1350000U / (reg << divreg);
411 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
413 if ((reg & 0xff1f) == 0xff1f)
416 reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
421 return 1350000U / reg;
424 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
426 if (reg == 0 || reg == 0xffff)
430 * Even though the registers are 16 bit wide, the fan divisor
433 return 1350000U / (reg << divreg);
436 static inline unsigned int
443 * Some of the voltage inputs have internal scaling, the tables below
444 * contain 8 (the ADC LSB in mV) * scaling factor * 100
446 static const u16 scale_in[15] = {
447 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
451 static inline long in_from_reg(u8 reg, u8 nr)
453 return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
456 static inline u8 in_to_reg(u32 val, u8 nr)
458 return SENSORS_LIMIT(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0,
463 * Data structures and manipulation thereof
466 struct nct6775_data {
467 int addr; /* IO base of hw monitor block */
471 struct device *hwmon_dev;
474 u16 reg_temp[3][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst */
475 u8 temp_src[NUM_TEMP];
476 u16 reg_temp_config[NUM_TEMP];
477 const char * const *temp_label;
484 const u16 *REG_IN_MINMAX[2];
486 const u16 *REG_TARGET;
488 const u16 *REG_FAN_MODE;
489 const u16 *REG_FAN_MIN;
490 const u16 *REG_FAN_TIME[3];
492 const u8 *REG_PWM_MODE;
493 const u8 *PWM_MODE_MASK;
495 const u16 *REG_PWM[7]; /* [0]=pwm, [1]=start_output, [2]=stop_output,
496 * [3]=max_output, [4]=step_output,
497 * [5]=weight_duty_step, [6]=weight_duty_base
499 const u16 *REG_PWM_READ;
501 const u16 *REG_TEMP_FIXED;
502 const u16 *REG_TEMP_MON;
503 const u16 *REG_AUTO_TEMP;
504 const u16 *REG_AUTO_PWM;
506 const u16 *REG_CRITICAL_TEMP;
507 const u16 *REG_CRITICAL_TEMP_TOLERANCE;
509 const u16 *REG_TEMP_SOURCE; /* temp register sources */
510 const u16 *REG_TEMP_SEL[2]; /* pwm temp, 0=base, 1=weight */
512 const u16 *REG_WEIGHT_TEMP[3]; /* 0=base, 1=hyst, 2=step */
514 const u16 *REG_TEMP_OFFSET;
516 const u16 *REG_ALARM;
519 const u8 *CASEOPEN_MASK;
521 unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
522 unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
524 struct mutex update_lock;
525 char valid; /* !=0 if following fields are valid */
526 unsigned long last_updated; /* In jiffies */
528 /* Register values */
529 u8 bank; /* current register bank */
530 u8 in_num; /* number of in inputs we have */
531 u8 in[15][3]; /* [0]=in, [1]=in_max, [2]=in_min */
536 u8 has_fan; /* some fan inputs can be disabled */
537 u8 has_fan_min; /* some fans don't have min register */
540 u8 temp_fixed_num; /* 3 or 6 */
541 u8 temp_type[NUM_TEMP_FIXED];
542 s8 temp_offset[NUM_TEMP_FIXED];
543 s16 temp[3][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst */
547 u8 pwm_num; /* number of pwm */
549 u8 pwm_mode[5]; /* 1->DC variable voltage, 0->PWM variable duty cycle */
550 u8 pwm_enable[5]; /* 0->off
552 * 2->thermal cruise mode (also called SmartFan I)
553 * 3->fan speed cruise mode
555 * 5->enhanced variable thermal cruise (SmartFan IV)
557 u8 pwm[7][5]; /* [0]=pwm, [1]=start_output, [2]=stop_output,
558 * [3]=max_output, [4]=step_output,
559 * [5]=weight_duty_step, [6]=weight_duty_base
565 u8 fan_time[3][5]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
567 /* Automatic fan speed control registers */
572 u8 pwm_temp_sel[2][5];
574 bool pwm_sel_enable[2][5];/* 0->stop_val, 1->weight;
575 * false->off, true->on
577 u8 weight_temp[3][5]; /* 0->temp_step, 1->temp_step_tol,
589 struct nct6775_sio_data {
594 static bool is_word_sized(struct nct6775_data *data, u16 reg)
596 switch (data->kind) {
599 return (((reg & 0xff00) == 0x100 ||
600 (reg & 0xff00) == 0x200) &&
601 ((reg & 0x00ff) == 0x50 ||
602 (reg & 0x00ff) == 0x53 ||
603 (reg & 0x00ff) == 0x55)) ||
604 (reg & 0xfff0) == 0x630 ||
605 reg == 0x640 || reg == 0x642 ||
606 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
607 reg == 0x73 || reg == 0x75 || reg == 0x77;
609 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
610 ((reg & 0xfff0) == 0x4c0 && (reg & 0x000f) < 0x09) ||
611 reg == 0x63a || reg == 0x63c || reg == 0x63e ||
612 reg == 0x640 || reg == 0x642 ||
613 reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
620 * On older chips, only registers 0x50-0x5f are banked.
621 * On more recent chips, all registers are banked.
622 * Assume that is the case and set the bank number for each access.
623 * Cache the bank number so it only needs to be set if it changes.
625 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
628 if (data->bank != bank) {
629 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
630 outb_p(bank, data->addr + DATA_REG_OFFSET);
635 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
637 int res, word_sized = is_word_sized(data, reg);
639 mutex_lock(&data->lock);
641 nct6775_set_bank(data, reg);
642 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
643 res = inb_p(data->addr + DATA_REG_OFFSET);
645 outb_p((reg & 0xff) + 1,
646 data->addr + ADDR_REG_OFFSET);
647 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
650 mutex_unlock(&data->lock);
654 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
656 int word_sized = is_word_sized(data, reg);
658 mutex_lock(&data->lock);
660 nct6775_set_bank(data, reg);
661 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
663 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
664 outb_p((reg & 0xff) + 1,
665 data->addr + ADDR_REG_OFFSET);
667 outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
669 mutex_unlock(&data->lock);
673 /* We left-align 8-bit temperature values to make the code simpler */
674 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
678 res = nct6775_read_value(data, reg);
679 if (!is_word_sized(data, reg))
685 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
687 if (!is_word_sized(data, reg))
689 return nct6775_write_value(data, reg, value);
692 /* This function assumes that the caller holds data->update_lock */
693 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
699 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
700 | (data->fan_div[0] & 0x7);
701 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
704 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
705 | ((data->fan_div[1] << 4) & 0x70);
706 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
708 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
709 | (data->fan_div[2] & 0x7);
710 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
713 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
714 | ((data->fan_div[3] << 4) & 0x70);
715 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
720 static void nct6775_write_fan_div_common(struct device *dev,
721 struct nct6775_data *data, int nr)
723 if (data->kind == nct6775)
724 nct6775_write_fan_div(data, nr);
727 static void nct6775_update_fan_div(struct nct6775_data *data)
731 i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
732 data->fan_div[0] = i & 0x7;
733 data->fan_div[1] = (i & 0x70) >> 4;
734 i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
735 data->fan_div[2] = i & 0x7;
736 if (data->has_fan & (1<<3))
737 data->fan_div[3] = (i & 0x70) >> 4;
740 static void nct6775_update_fan_div_common(struct device *dev,
741 struct nct6775_data *data)
743 if (data->kind == nct6775)
744 nct6775_update_fan_div(data);
747 static void nct6775_update_pwm(struct device *dev)
749 struct nct6775_data *data = dev_get_drvdata(dev);
754 for (i = 0; i < data->pwm_num; i++) {
755 if (!(data->has_pwm & (1 << i)))
758 duty_is_dc = data->REG_PWM_MODE[i] &&
759 (nct6775_read_value(data, data->REG_PWM_MODE[i])
760 & data->PWM_MODE_MASK[i]);
761 data->pwm_mode[i] = duty_is_dc;
763 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
764 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
765 if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
767 = nct6775_read_value(data,
768 data->REG_PWM[j][i]);
772 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
773 (fanmodecfg >> 4) & 7);
775 data->tolerance[i][0] = fanmodecfg & 0x0f;
776 if (data->kind == nct6779) {
777 reg = nct6775_read_value(data,
778 NCT6779_REG_TOLERANCE_H[i]);
779 data->tolerance[i][0] |= (reg & 0x70) >> 1;
781 data->tolerance[i][1] =
782 nct6775_read_value(data,
783 data->REG_CRITICAL_TEMP_TOLERANCE[i]);
785 data->pwm_sel_enable[0][i] =
786 nct6775_read_value(data, data->REG_TEMP_SEL[0][i])
788 data->pwm_sel_enable[1][i] =
789 nct6775_read_value(data, data->REG_TEMP_SEL[1][i])
793 for (j = 0; j < 2; j++) {
794 reg = nct6775_read_value(data,
795 data->REG_TEMP_SEL[j][i]);
796 data->pwm_temp_sel[j][i] = reg & 0x1f;
798 /* Weight temp data */
799 for (j = 0; j < 3; j++) {
800 data->weight_temp[j][i]
801 = nct6775_read_value(data,
802 data->REG_WEIGHT_TEMP[j][i]);
807 static void nct6775_update_pwm_limits(struct device *dev)
809 struct nct6775_data *data = dev_get_drvdata(dev);
813 for (i = 0; i < data->pwm_num; i++) {
814 if (!(data->has_pwm & (1 << i)))
817 for (j = 0; j < 3; j++) {
818 data->fan_time[j][i] =
819 nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
822 data->target_temp[i] =
823 nct6775_read_value(data, data->REG_TARGET[i]) &
824 (data->pwm_mode[i] ? 0xff : 0x7f);
826 nct6775_read_value(data, data->REG_TEMP_MON[i]);
828 for (j = 0; j < data->auto_pwm_num; j++) {
829 data->auto_pwm[i][j] =
830 nct6775_read_value(data,
831 NCT6775_AUTO_PWM(data, i, j));
832 data->auto_temp[i][j] =
833 nct6775_read_value(data,
834 NCT6775_AUTO_TEMP(data, i, j));
837 /* critical auto_pwm temperature data */
838 data->auto_temp[i][data->auto_pwm_num] =
839 nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
841 switch (data->kind) {
843 reg = nct6775_read_value(data,
844 NCT6775_REG_CRITICAL_ENAB[i]);
845 data->auto_pwm[i][data->auto_pwm_num] =
846 (reg & 0x02) ? 0xff : 0x00;
849 data->auto_pwm[i][data->auto_pwm_num] = 0xff;
852 reg = nct6775_read_value(data,
853 NCT6779_REG_CRITICAL_PWM_ENABLE[i]);
855 data->auto_pwm[i][data->auto_pwm_num] =
856 nct6775_read_value(data,
857 NCT6779_REG_CRITICAL_PWM[i]);
859 data->auto_pwm[i][data->auto_pwm_num] = 0xff;
865 static struct nct6775_data *nct6775_update_device(struct device *dev)
867 struct nct6775_data *data = dev_get_drvdata(dev);
870 mutex_lock(&data->update_lock);
872 if (time_after(jiffies, data->last_updated + HZ + HZ/2)
874 /* Fan clock dividers */
875 nct6775_update_fan_div_common(dev, data);
877 /* Measured voltages and limits */
878 for (i = 0; i < data->in_num; i++) {
879 if (!(data->have_in & (1 << i)))
882 data->in[i][0] = nct6775_read_value(data,
884 data->in[i][1] = nct6775_read_value(data,
885 data->REG_IN_MINMAX[0][i]);
886 data->in[i][2] = nct6775_read_value(data,
887 data->REG_IN_MINMAX[1][i]);
890 /* Measured fan speeds and limits */
891 for (i = 0; i < 5; i++) {
894 if (!(data->has_fan & (1 << i)))
897 reg = nct6775_read_value(data, data->REG_FAN[i]);
898 data->rpm[i] = data->fan_from_reg(reg,
901 if (data->has_fan_min & (1 << i))
902 data->fan_min[i] = nct6775_read_value(data,
903 data->REG_FAN_MIN[i]);
906 * If we failed to measure the fan speed and clock
907 * divider can be increased, let's try that for next
910 if (data->has_fan_div
911 && (reg >= 0xff || (data->kind == nct6775
913 && data->fan_div[i] < 0x07) {
914 dev_dbg(dev, "Increasing fan%d "
915 "clock divider from %u to %u\n",
916 i + 1, div_from_reg(data->fan_div[i]),
917 div_from_reg(data->fan_div[i] + 1));
919 nct6775_write_fan_div_common(dev, data, i);
920 /* Preserve min limit if possible */
921 if ((data->has_fan_min & (1 << i))
922 && data->fan_min[i] >= 2
923 && data->fan_min[i] != 255)
924 nct6775_write_value(data,
925 data->REG_FAN_MIN[i],
926 (data->fan_min[i] /= 2));
930 nct6775_update_pwm(dev);
931 nct6775_update_pwm_limits(dev);
933 /* Measured temperatures and limits */
934 for (i = 0; i < NUM_TEMP; i++) {
935 if (!(data->have_temp & (1 << i)))
937 for (j = 0; j < 3; j++) {
938 if (data->reg_temp[j][i])
940 = nct6775_read_temp(data,
941 data->reg_temp[j][i]);
943 if (!(data->have_temp_fixed & (1 << i)))
946 = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
950 for (i = 0; i < 6; i++) {
952 if (!data->REG_ALARM[i])
954 alarm = nct6775_read_value(data, data->REG_ALARM[i]);
955 data->alarms |= ((u64)alarm) << (i << 3);
958 data->caseopen = nct6775_read_value(data, data->REG_CASEOPEN);
960 data->last_updated = jiffies;
964 mutex_unlock(&data->update_lock);
969 * Sysfs callback functions
972 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
974 struct nct6775_data *data = nct6775_update_device(dev);
975 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
977 int index = sattr->index;
978 return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
982 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
985 struct nct6775_data *data = dev_get_drvdata(dev);
986 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
988 int index = sattr->index;
990 int err = kstrtoul(buf, 10, &val);
993 mutex_lock(&data->update_lock);
994 data->in[nr][index] = in_to_reg(val, nr);
995 nct6775_write_value(data, data->REG_IN_MINMAX[index-1][nr],
996 data->in[nr][index]);
997 mutex_unlock(&data->update_lock);
1002 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1004 struct nct6775_data *data = nct6775_update_device(dev);
1005 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1006 int nr = sattr->index;
1007 return sprintf(buf, "%u\n",
1008 (unsigned int)((data->alarms >> nr) & 0x01));
1011 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in_reg, NULL, 0, 0);
1012 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in_reg, NULL, 1, 0);
1013 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in_reg, NULL, 2, 0);
1014 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in_reg, NULL, 3, 0);
1015 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in_reg, NULL, 4, 0);
1016 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in_reg, NULL, 5, 0);
1017 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in_reg, NULL, 6, 0);
1018 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in_reg, NULL, 7, 0);
1019 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in_reg, NULL, 8, 0);
1020 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in_reg, NULL, 9, 0);
1021 static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in_reg, NULL, 10, 0);
1022 static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in_reg, NULL, 11, 0);
1023 static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in_reg, NULL, 12, 0);
1024 static SENSOR_DEVICE_ATTR_2(in13_input, S_IRUGO, show_in_reg, NULL, 13, 0);
1025 static SENSOR_DEVICE_ATTR_2(in14_input, S_IRUGO, show_in_reg, NULL, 14, 0);
1027 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
1028 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
1029 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
1030 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
1031 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8);
1032 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 21);
1033 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 20);
1034 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16);
1035 static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17);
1036 static SENSOR_DEVICE_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 24);
1037 static SENSOR_DEVICE_ATTR(in10_alarm, S_IRUGO, show_alarm, NULL, 25);
1038 static SENSOR_DEVICE_ATTR(in11_alarm, S_IRUGO, show_alarm, NULL, 26);
1039 static SENSOR_DEVICE_ATTR(in12_alarm, S_IRUGO, show_alarm, NULL, 27);
1040 static SENSOR_DEVICE_ATTR(in13_alarm, S_IRUGO, show_alarm, NULL, 28);
1041 static SENSOR_DEVICE_ATTR(in14_alarm, S_IRUGO, show_alarm, NULL, 29);
1043 static SENSOR_DEVICE_ATTR_2(in0_min, S_IWUSR | S_IRUGO, show_in_reg,
1044 store_in_reg, 0, 1);
1045 static SENSOR_DEVICE_ATTR_2(in1_min, S_IWUSR | S_IRUGO, show_in_reg,
1046 store_in_reg, 1, 1);
1047 static SENSOR_DEVICE_ATTR_2(in2_min, S_IWUSR | S_IRUGO, show_in_reg,
1048 store_in_reg, 2, 1);
1049 static SENSOR_DEVICE_ATTR_2(in3_min, S_IWUSR | S_IRUGO, show_in_reg,
1050 store_in_reg, 3, 1);
1051 static SENSOR_DEVICE_ATTR_2(in4_min, S_IWUSR | S_IRUGO, show_in_reg,
1052 store_in_reg, 4, 1);
1053 static SENSOR_DEVICE_ATTR_2(in5_min, S_IWUSR | S_IRUGO, show_in_reg,
1054 store_in_reg, 5, 1);
1055 static SENSOR_DEVICE_ATTR_2(in6_min, S_IWUSR | S_IRUGO, show_in_reg,
1056 store_in_reg, 6, 1);
1057 static SENSOR_DEVICE_ATTR_2(in7_min, S_IWUSR | S_IRUGO, show_in_reg,
1058 store_in_reg, 7, 1);
1059 static SENSOR_DEVICE_ATTR_2(in8_min, S_IWUSR | S_IRUGO, show_in_reg,
1060 store_in_reg, 8, 1);
1061 static SENSOR_DEVICE_ATTR_2(in9_min, S_IWUSR | S_IRUGO, show_in_reg,
1062 store_in_reg, 9, 1);
1063 static SENSOR_DEVICE_ATTR_2(in10_min, S_IWUSR | S_IRUGO, show_in_reg,
1064 store_in_reg, 10, 1);
1065 static SENSOR_DEVICE_ATTR_2(in11_min, S_IWUSR | S_IRUGO, show_in_reg,
1066 store_in_reg, 11, 1);
1067 static SENSOR_DEVICE_ATTR_2(in12_min, S_IWUSR | S_IRUGO, show_in_reg,
1068 store_in_reg, 12, 1);
1069 static SENSOR_DEVICE_ATTR_2(in13_min, S_IWUSR | S_IRUGO, show_in_reg,
1070 store_in_reg, 13, 1);
1071 static SENSOR_DEVICE_ATTR_2(in14_min, S_IWUSR | S_IRUGO, show_in_reg,
1072 store_in_reg, 14, 1);
1074 static SENSOR_DEVICE_ATTR_2(in0_max, S_IWUSR | S_IRUGO, show_in_reg,
1075 store_in_reg, 0, 2);
1076 static SENSOR_DEVICE_ATTR_2(in1_max, S_IWUSR | S_IRUGO, show_in_reg,
1077 store_in_reg, 1, 2);
1078 static SENSOR_DEVICE_ATTR_2(in2_max, S_IWUSR | S_IRUGO, show_in_reg,
1079 store_in_reg, 2, 2);
1080 static SENSOR_DEVICE_ATTR_2(in3_max, S_IWUSR | S_IRUGO, show_in_reg,
1081 store_in_reg, 3, 2);
1082 static SENSOR_DEVICE_ATTR_2(in4_max, S_IWUSR | S_IRUGO, show_in_reg,
1083 store_in_reg, 4, 2);
1084 static SENSOR_DEVICE_ATTR_2(in5_max, S_IWUSR | S_IRUGO, show_in_reg,
1085 store_in_reg, 5, 2);
1086 static SENSOR_DEVICE_ATTR_2(in6_max, S_IWUSR | S_IRUGO, show_in_reg,
1087 store_in_reg, 6, 2);
1088 static SENSOR_DEVICE_ATTR_2(in7_max, S_IWUSR | S_IRUGO, show_in_reg,
1089 store_in_reg, 7, 2);
1090 static SENSOR_DEVICE_ATTR_2(in8_max, S_IWUSR | S_IRUGO, show_in_reg,
1091 store_in_reg, 8, 2);
1092 static SENSOR_DEVICE_ATTR_2(in9_max, S_IWUSR | S_IRUGO, show_in_reg,
1093 store_in_reg, 9, 2);
1094 static SENSOR_DEVICE_ATTR_2(in10_max, S_IWUSR | S_IRUGO, show_in_reg,
1095 store_in_reg, 10, 2);
1096 static SENSOR_DEVICE_ATTR_2(in11_max, S_IWUSR | S_IRUGO, show_in_reg,
1097 store_in_reg, 11, 2);
1098 static SENSOR_DEVICE_ATTR_2(in12_max, S_IWUSR | S_IRUGO, show_in_reg,
1099 store_in_reg, 12, 2);
1100 static SENSOR_DEVICE_ATTR_2(in13_max, S_IWUSR | S_IRUGO, show_in_reg,
1101 store_in_reg, 13, 2);
1102 static SENSOR_DEVICE_ATTR_2(in14_max, S_IWUSR | S_IRUGO, show_in_reg,
1103 store_in_reg, 14, 2);
1105 static struct attribute *nct6775_attributes_in[15][5] = {
1107 &sensor_dev_attr_in0_input.dev_attr.attr,
1108 &sensor_dev_attr_in0_min.dev_attr.attr,
1109 &sensor_dev_attr_in0_max.dev_attr.attr,
1110 &sensor_dev_attr_in0_alarm.dev_attr.attr,
1114 &sensor_dev_attr_in1_input.dev_attr.attr,
1115 &sensor_dev_attr_in1_min.dev_attr.attr,
1116 &sensor_dev_attr_in1_max.dev_attr.attr,
1117 &sensor_dev_attr_in1_alarm.dev_attr.attr,
1121 &sensor_dev_attr_in2_input.dev_attr.attr,
1122 &sensor_dev_attr_in2_min.dev_attr.attr,
1123 &sensor_dev_attr_in2_max.dev_attr.attr,
1124 &sensor_dev_attr_in2_alarm.dev_attr.attr,
1128 &sensor_dev_attr_in3_input.dev_attr.attr,
1129 &sensor_dev_attr_in3_min.dev_attr.attr,
1130 &sensor_dev_attr_in3_max.dev_attr.attr,
1131 &sensor_dev_attr_in3_alarm.dev_attr.attr,
1135 &sensor_dev_attr_in4_input.dev_attr.attr,
1136 &sensor_dev_attr_in4_min.dev_attr.attr,
1137 &sensor_dev_attr_in4_max.dev_attr.attr,
1138 &sensor_dev_attr_in4_alarm.dev_attr.attr,
1142 &sensor_dev_attr_in5_input.dev_attr.attr,
1143 &sensor_dev_attr_in5_min.dev_attr.attr,
1144 &sensor_dev_attr_in5_max.dev_attr.attr,
1145 &sensor_dev_attr_in5_alarm.dev_attr.attr,
1149 &sensor_dev_attr_in6_input.dev_attr.attr,
1150 &sensor_dev_attr_in6_min.dev_attr.attr,
1151 &sensor_dev_attr_in6_max.dev_attr.attr,
1152 &sensor_dev_attr_in6_alarm.dev_attr.attr,
1156 &sensor_dev_attr_in7_input.dev_attr.attr,
1157 &sensor_dev_attr_in7_min.dev_attr.attr,
1158 &sensor_dev_attr_in7_max.dev_attr.attr,
1159 &sensor_dev_attr_in7_alarm.dev_attr.attr,
1163 &sensor_dev_attr_in8_input.dev_attr.attr,
1164 &sensor_dev_attr_in8_min.dev_attr.attr,
1165 &sensor_dev_attr_in8_max.dev_attr.attr,
1166 &sensor_dev_attr_in8_alarm.dev_attr.attr,
1170 &sensor_dev_attr_in9_input.dev_attr.attr,
1171 &sensor_dev_attr_in9_min.dev_attr.attr,
1172 &sensor_dev_attr_in9_max.dev_attr.attr,
1173 &sensor_dev_attr_in9_alarm.dev_attr.attr,
1177 &sensor_dev_attr_in10_input.dev_attr.attr,
1178 &sensor_dev_attr_in10_min.dev_attr.attr,
1179 &sensor_dev_attr_in10_max.dev_attr.attr,
1180 &sensor_dev_attr_in10_alarm.dev_attr.attr,
1184 &sensor_dev_attr_in11_input.dev_attr.attr,
1185 &sensor_dev_attr_in11_min.dev_attr.attr,
1186 &sensor_dev_attr_in11_max.dev_attr.attr,
1187 &sensor_dev_attr_in11_alarm.dev_attr.attr,
1191 &sensor_dev_attr_in12_input.dev_attr.attr,
1192 &sensor_dev_attr_in12_min.dev_attr.attr,
1193 &sensor_dev_attr_in12_max.dev_attr.attr,
1194 &sensor_dev_attr_in12_alarm.dev_attr.attr,
1198 &sensor_dev_attr_in13_input.dev_attr.attr,
1199 &sensor_dev_attr_in13_min.dev_attr.attr,
1200 &sensor_dev_attr_in13_max.dev_attr.attr,
1201 &sensor_dev_attr_in13_alarm.dev_attr.attr,
1205 &sensor_dev_attr_in14_input.dev_attr.attr,
1206 &sensor_dev_attr_in14_min.dev_attr.attr,
1207 &sensor_dev_attr_in14_max.dev_attr.attr,
1208 &sensor_dev_attr_in14_alarm.dev_attr.attr,
1213 static const struct attribute_group nct6775_group_in[15] = {
1214 { .attrs = nct6775_attributes_in[0] },
1215 { .attrs = nct6775_attributes_in[1] },
1216 { .attrs = nct6775_attributes_in[2] },
1217 { .attrs = nct6775_attributes_in[3] },
1218 { .attrs = nct6775_attributes_in[4] },
1219 { .attrs = nct6775_attributes_in[5] },
1220 { .attrs = nct6775_attributes_in[6] },
1221 { .attrs = nct6775_attributes_in[7] },
1222 { .attrs = nct6775_attributes_in[8] },
1223 { .attrs = nct6775_attributes_in[9] },
1224 { .attrs = nct6775_attributes_in[10] },
1225 { .attrs = nct6775_attributes_in[11] },
1226 { .attrs = nct6775_attributes_in[12] },
1227 { .attrs = nct6775_attributes_in[13] },
1228 { .attrs = nct6775_attributes_in[14] },
1232 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1234 struct nct6775_data *data = nct6775_update_device(dev);
1235 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1236 int nr = sattr->index;
1237 return sprintf(buf, "%d\n", data->rpm[nr]);
1241 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1243 struct nct6775_data *data = nct6775_update_device(dev);
1244 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1245 int nr = sattr->index;
1246 return sprintf(buf, "%d\n",
1247 data->fan_from_reg_min(data->fan_min[nr],
1248 data->fan_div[nr]));
1252 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1254 struct nct6775_data *data = nct6775_update_device(dev);
1255 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1256 int nr = sattr->index;
1257 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1261 store_fan_min(struct device *dev, struct device_attribute *attr,
1262 const char *buf, size_t count)
1264 struct nct6775_data *data = dev_get_drvdata(dev);
1265 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1266 int nr = sattr->index;
1272 err = kstrtoul(buf, 10, &val);
1276 mutex_lock(&data->update_lock);
1277 if (!data->has_fan_div) {
1279 * Only NCT6776F for now, so we know that this is a 13 bit
1287 val = 1350000U / val;
1288 val = (val & 0x1f) | ((val << 3) & 0xff00);
1290 data->fan_min[nr] = val;
1291 goto write_min; /* Leave fan divider alone */
1294 /* No min limit, alarm disabled */
1295 data->fan_min[nr] = 255;
1296 new_div = data->fan_div[nr]; /* No change */
1297 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1300 reg = 1350000U / val;
1301 if (reg >= 128 * 255) {
1303 * Speed below this value cannot possibly be represented,
1304 * even with the highest divider (128)
1306 data->fan_min[nr] = 254;
1307 new_div = 7; /* 128 == (1 << 7) */
1308 dev_warn(dev, "fan%u low limit %lu below minimum %u, set to "
1309 "minimum\n", nr + 1, val,
1310 data->fan_from_reg_min(254, 7));
1313 * Speed above this value cannot possibly be represented,
1314 * even with the lowest divider (1)
1316 data->fan_min[nr] = 1;
1317 new_div = 0; /* 1 == (1 << 0) */
1318 dev_warn(dev, "fan%u low limit %lu above maximum %u, set to "
1319 "maximum\n", nr + 1, val,
1320 data->fan_from_reg_min(1, 0));
1323 * Automatically pick the best divider, i.e. the one such
1324 * that the min limit will correspond to a register value
1325 * in the 96..192 range
1328 while (reg > 192 && new_div < 7) {
1332 data->fan_min[nr] = reg;
1337 * Write both the fan clock divider (if it changed) and the new
1338 * fan min (unconditionally)
1340 if (new_div != data->fan_div[nr]) {
1341 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1342 nr + 1, div_from_reg(data->fan_div[nr]),
1343 div_from_reg(new_div));
1344 data->fan_div[nr] = new_div;
1345 nct6775_write_fan_div_common(dev, data, nr);
1346 /* Give the chip time to sample a new speed value */
1347 data->last_updated = jiffies;
1351 nct6775_write_value(data, data->REG_FAN_MIN[nr],
1353 mutex_unlock(&data->update_lock);
1358 static struct sensor_device_attribute sda_fan_input[] = {
1359 SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
1360 SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
1361 SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),
1362 SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3),
1363 SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4),
1366 static struct sensor_device_attribute sda_fan_alarm[] = {
1367 SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6),
1368 SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7),
1369 SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11),
1370 SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 10),
1371 SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 23),
1374 static struct sensor_device_attribute sda_fan_min[] = {
1375 SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min,
1377 SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min,
1379 SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, show_fan_min,
1381 SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, show_fan_min,
1383 SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, show_fan_min,
1387 static struct sensor_device_attribute sda_fan_div[] = {
1388 SENSOR_ATTR(fan1_div, S_IRUGO, show_fan_div, NULL, 0),
1389 SENSOR_ATTR(fan2_div, S_IRUGO, show_fan_div, NULL, 1),
1390 SENSOR_ATTR(fan3_div, S_IRUGO, show_fan_div, NULL, 2),
1391 SENSOR_ATTR(fan4_div, S_IRUGO, show_fan_div, NULL, 3),
1392 SENSOR_ATTR(fan5_div, S_IRUGO, show_fan_div, NULL, 4),
1396 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1398 struct nct6775_data *data = nct6775_update_device(dev);
1399 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1400 int nr = sattr->index;
1401 return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1405 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1407 struct nct6775_data *data = nct6775_update_device(dev);
1408 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1410 int index = sattr->index;
1412 return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
1416 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
1419 struct nct6775_data *data = dev_get_drvdata(dev);
1420 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1422 int index = sattr->index;
1426 err = kstrtol(buf, 10, &val);
1430 mutex_lock(&data->update_lock);
1431 data->temp[index][nr] = LM75_TEMP_TO_REG(val);
1432 nct6775_write_temp(data, data->reg_temp[index][nr],
1433 data->temp[index][nr]);
1434 mutex_unlock(&data->update_lock);
1439 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
1441 struct nct6775_data *data = nct6775_update_device(dev);
1442 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1444 return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
1448 store_temp_offset(struct device *dev, struct device_attribute *attr,
1449 const char *buf, size_t count)
1451 struct nct6775_data *data = dev_get_drvdata(dev);
1452 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1453 int nr = sattr->index;
1457 err = kstrtol(buf, 10, &val);
1461 val = SENSORS_LIMIT(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
1463 mutex_lock(&data->update_lock);
1464 data->temp_offset[nr] = val;
1465 nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
1466 mutex_unlock(&data->update_lock);
1472 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
1474 struct nct6775_data *data = nct6775_update_device(dev);
1475 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1476 int nr = sattr->index;
1477 return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
1481 store_temp_type(struct device *dev, struct device_attribute *attr,
1482 const char *buf, size_t count)
1484 struct nct6775_data *data = nct6775_update_device(dev);
1485 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1486 int nr = sattr->index;
1489 u8 vbat, diode, bit;
1491 err = kstrtoul(buf, 10, &val);
1495 if (val != 1 && val != 3 && val != 4)
1498 mutex_lock(&data->update_lock);
1500 data->temp_type[nr] = val;
1501 vbat = nct6775_read_value(data, data->REG_VBAT) & ~(0x02 << nr);
1502 diode = nct6775_read_value(data, data->REG_DIODE) & ~(0x02 << nr);
1505 case 1: /* CPU diode (diode, current mode) */
1509 case 3: /* diode, voltage mode */
1512 case 4: /* thermistor */
1515 nct6775_write_value(data, data->REG_VBAT, vbat);
1516 nct6775_write_value(data, data->REG_DIODE, diode);
1518 mutex_unlock(&data->update_lock);
1522 static struct sensor_device_attribute_2 sda_temp_input[] = {
1523 SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0),
1524 SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0),
1525 SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0),
1526 SENSOR_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0),
1527 SENSOR_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0),
1528 SENSOR_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0),
1529 SENSOR_ATTR_2(temp7_input, S_IRUGO, show_temp, NULL, 6, 0),
1530 SENSOR_ATTR_2(temp8_input, S_IRUGO, show_temp, NULL, 7, 0),
1531 SENSOR_ATTR_2(temp9_input, S_IRUGO, show_temp, NULL, 8, 0),
1532 SENSOR_ATTR_2(temp10_input, S_IRUGO, show_temp, NULL, 9, 0),
1535 static struct sensor_device_attribute sda_temp_label[] = {
1536 SENSOR_ATTR(temp1_label, S_IRUGO, show_temp_label, NULL, 0),
1537 SENSOR_ATTR(temp2_label, S_IRUGO, show_temp_label, NULL, 1),
1538 SENSOR_ATTR(temp3_label, S_IRUGO, show_temp_label, NULL, 2),
1539 SENSOR_ATTR(temp4_label, S_IRUGO, show_temp_label, NULL, 3),
1540 SENSOR_ATTR(temp5_label, S_IRUGO, show_temp_label, NULL, 4),
1541 SENSOR_ATTR(temp6_label, S_IRUGO, show_temp_label, NULL, 5),
1542 SENSOR_ATTR(temp7_label, S_IRUGO, show_temp_label, NULL, 6),
1543 SENSOR_ATTR(temp8_label, S_IRUGO, show_temp_label, NULL, 7),
1544 SENSOR_ATTR(temp9_label, S_IRUGO, show_temp_label, NULL, 8),
1545 SENSOR_ATTR(temp10_label, S_IRUGO, show_temp_label, NULL, 9),
1548 static struct sensor_device_attribute_2 sda_temp_max[] = {
1549 SENSOR_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1551 SENSOR_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1553 SENSOR_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1555 SENSOR_ATTR_2(temp4_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1557 SENSOR_ATTR_2(temp5_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1559 SENSOR_ATTR_2(temp6_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1561 SENSOR_ATTR_2(temp7_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1563 SENSOR_ATTR_2(temp8_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1565 SENSOR_ATTR_2(temp9_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1567 SENSOR_ATTR_2(temp10_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1571 static struct sensor_device_attribute_2 sda_temp_max_hyst[] = {
1572 SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1574 SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1576 SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1578 SENSOR_ATTR_2(temp4_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1580 SENSOR_ATTR_2(temp5_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1582 SENSOR_ATTR_2(temp6_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1584 SENSOR_ATTR_2(temp7_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1586 SENSOR_ATTR_2(temp8_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1588 SENSOR_ATTR_2(temp9_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1590 SENSOR_ATTR_2(temp9_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1594 static struct sensor_device_attribute sda_temp_offset[] = {
1595 SENSOR_ATTR(temp1_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1596 store_temp_offset, 0),
1597 SENSOR_ATTR(temp2_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1598 store_temp_offset, 1),
1599 SENSOR_ATTR(temp3_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1600 store_temp_offset, 2),
1601 SENSOR_ATTR(temp4_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1602 store_temp_offset, 3),
1603 SENSOR_ATTR(temp5_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1604 store_temp_offset, 4),
1605 SENSOR_ATTR(temp6_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1606 store_temp_offset, 5),
1609 static struct sensor_device_attribute sda_temp_type[] = {
1610 SENSOR_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1611 store_temp_type, 0),
1612 SENSOR_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1613 store_temp_type, 1),
1614 SENSOR_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1615 store_temp_type, 2),
1616 SENSOR_ATTR(temp4_type, S_IRUGO | S_IWUSR, show_temp_type,
1617 store_temp_type, 3),
1618 SENSOR_ATTR(temp5_type, S_IRUGO | S_IWUSR, show_temp_type,
1619 store_temp_type, 4),
1620 SENSOR_ATTR(temp6_type, S_IRUGO | S_IWUSR, show_temp_type,
1621 store_temp_type, 5),
1624 static struct sensor_device_attribute sda_temp_alarm[] = {
1625 SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4),
1626 SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5),
1627 SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13),
1630 #define NUM_TEMP_ALARM ARRAY_SIZE(sda_temp_alarm)
1633 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
1635 struct nct6775_data *data = nct6775_update_device(dev);
1636 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1638 return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
1642 store_pwm_mode(struct device *dev, struct device_attribute *attr,
1643 const char *buf, size_t count)
1645 struct nct6775_data *data = dev_get_drvdata(dev);
1646 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1647 int nr = sattr->index;
1652 err = kstrtoul(buf, 10, &val);
1659 /* Setting DC mode is not supported for all chips/channels */
1660 if (data->REG_PWM_MODE[nr] == 0) {
1666 mutex_lock(&data->update_lock);
1667 data->pwm_mode[nr] = val;
1668 reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
1669 reg &= ~data->PWM_MODE_MASK[nr];
1671 reg |= data->PWM_MODE_MASK[nr];
1672 nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
1673 mutex_unlock(&data->update_lock);
1678 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
1680 struct nct6775_data *data = nct6775_update_device(dev);
1681 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1683 return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
1687 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1689 struct nct6775_data *data = nct6775_update_device(dev);
1690 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1692 int index = sattr->index;
1696 * For automatic fan control modes, show current pwm readings.
1697 * Otherwise, show the configured value.
1699 if (index == 0 && data->pwm_enable[nr] > 1)
1700 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
1702 pwm = data->pwm[index][nr];
1704 return sprintf(buf, "%d\n", pwm);
1708 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
1711 struct nct6775_data *data = dev_get_drvdata(dev);
1712 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1714 int index = sattr->index;
1716 int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
1718 = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
1721 err = kstrtoul(buf, 10, &val);
1724 val = SENSORS_LIMIT(val, minval[index], maxval[index]);
1726 mutex_lock(&data->update_lock);
1727 data->pwm[index][nr] = val;
1728 nct6775_write_value(data, data->REG_PWM[index][nr], val);
1729 mutex_unlock(&data->update_lock);
1733 /* Returns 0 if OK, -EINVAL otherwise */
1734 static int check_trip_points(struct nct6775_data *data, int nr)
1738 for (i = 0; i < data->auto_pwm_num - 1; i++) {
1739 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1742 for (i = 0; i < data->auto_pwm_num - 1; i++) {
1743 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1746 /* validate critical temperature and pwm if enabled (pwm > 0) */
1747 if (data->auto_pwm[nr][data->auto_pwm_num]) {
1748 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
1749 data->auto_temp[nr][data->auto_pwm_num] ||
1750 data->auto_pwm[nr][data->auto_pwm_num - 1] >
1751 data->auto_pwm[nr][data->auto_pwm_num])
1758 store_pwm_enable(struct device *dev, struct device_attribute *attr,
1759 const char *buf, size_t count)
1761 struct nct6775_data *data = dev_get_drvdata(dev);
1762 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1763 int nr = sattr->index;
1768 err = kstrtoul(buf, 10, &val);
1775 if (val == 4 && data->kind != nct6775)
1778 if (val == 5 && check_trip_points(data, nr)) {
1779 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
1780 dev_err(dev, "Adjust trip points and try again\n");
1784 mutex_lock(&data->update_lock);
1785 data->pwm_enable[nr] = val;
1788 * turn off pwm control: select manual mode, set pwm to maximum
1790 data->pwm[0][nr] = 255;
1791 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
1793 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
1795 reg |= pwm_enable_to_reg(val) << 4;
1796 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
1797 mutex_unlock(&data->update_lock);
1802 show_pwm_temp(struct device *dev, struct device_attribute *attr, char *buf)
1804 struct nct6775_data *data = nct6775_update_device(dev);
1805 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1806 int nr = sattr->index;
1808 return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->pwm_temp[nr]));
1812 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
1814 struct nct6775_data *data = nct6775_update_device(dev);
1815 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1817 return sprintf(buf, "%d\n",
1818 data->pwm_temp_sel[sattr->index][sattr->nr]);
1822 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
1823 const char *buf, size_t count)
1825 struct nct6775_data *data = nct6775_update_device(dev);
1826 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1828 int index = sattr->index;
1832 static const int max_src[] = {
1833 ARRAY_SIZE(nct6775_temp_label) - 1,
1834 ARRAY_SIZE(nct6776_temp_label) - 1,
1835 ARRAY_SIZE(nct6779_temp_label) - 1
1838 err = kstrtoul(buf, 10, &val);
1841 if (val == 0 || val > 0x1f)
1844 val = SENSORS_LIMIT(val, 1, max_src[data->kind]);
1846 if (!strlen(data->temp_label[val]))
1849 mutex_lock(&data->update_lock);
1850 data->pwm_temp_sel[index][nr] = val;
1851 reg = nct6775_read_value(data, data->REG_TEMP_SEL[index][nr]);
1854 nct6775_write_value(data, data->REG_TEMP_SEL[index][nr], reg);
1855 mutex_unlock(&data->update_lock);
1861 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
1863 struct nct6775_data *data = nct6775_update_device(dev);
1864 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1866 return sprintf(buf, "%d\n",
1867 data->target_temp[sattr->index] * 1000);
1871 store_target_temp(struct device *dev, struct device_attribute *attr,
1872 const char *buf, size_t count)
1874 struct nct6775_data *data = dev_get_drvdata(dev);
1875 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1876 int nr = sattr->index;
1880 err = kstrtol(buf, 10, &val);
1884 val = SENSORS_LIMIT(DIV_ROUND_CLOSEST(val, 1000), 0, 127);
1886 mutex_lock(&data->update_lock);
1887 data->target_temp[nr] = val;
1888 nct6775_write_value(data, data->REG_TARGET[nr], val);
1889 mutex_unlock(&data->update_lock);
1894 show_auto_temp_hyst(struct device *dev, struct device_attribute *attr,
1897 struct nct6775_data *data = nct6775_update_device(dev);
1898 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1900 int point = sattr->index >= data->auto_pwm_num ? 1 : 0;
1901 int tolerance = data->tolerance[nr][point];
1902 int temp = data->auto_temp[nr][sattr->index];
1904 return sprintf(buf, "%d\n", (temp - tolerance) * 1000);
1908 store_auto_temp_hyst(struct device *dev, struct device_attribute *attr,
1909 const char *buf, size_t count)
1911 struct nct6775_data *data = dev_get_drvdata(dev);
1912 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1914 int point = sattr->index >= data->auto_pwm_num ? 1 : 0;
1918 int maxlimit[2][3] = { { 15, 7, 63 }, { 15, 7, 7 } };
1919 int mask[] = { 0x0f, 0x07, 0x07 };
1922 err = kstrtol(buf, 10, &val);
1926 temp = data->auto_temp[nr][sattr->index];
1927 val = temp - DIV_ROUND_CLOSEST(val, 1000);
1929 /* Limit tolerance as needed */
1930 val = SENSORS_LIMIT(val, 0, maxlimit[point][data->kind]);
1932 mutex_lock(&data->update_lock);
1934 nct6775_write_value(data,
1935 data->REG_CRITICAL_TEMP_TOLERANCE[nr],
1938 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
1939 reg = (reg & ~mask[nr]) | (val & mask[nr]);
1940 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
1941 if (data->kind == nct6779) {
1942 reg = nct6775_read_value(data,
1943 NCT6779_REG_TOLERANCE_H[nr]);
1944 reg = (reg & 0x70) | ((val & 0x38) << 1);
1945 nct6775_write_value(data,
1946 NCT6779_REG_TOLERANCE_H[nr], reg);
1950 data->tolerance[nr][point] = val;
1951 mutex_unlock(&data->update_lock);
1955 static SENSOR_DEVICE_ATTR_2(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
1956 static SENSOR_DEVICE_ATTR_2(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1, 0);
1957 static SENSOR_DEVICE_ATTR_2(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2, 0);
1958 static SENSOR_DEVICE_ATTR_2(pwm4, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3, 0);
1959 static SENSOR_DEVICE_ATTR_2(pwm5, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 4, 0);
1961 static SENSOR_DEVICE_ATTR(pwm1_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1963 static SENSOR_DEVICE_ATTR(pwm2_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1965 static SENSOR_DEVICE_ATTR(pwm3_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1967 static SENSOR_DEVICE_ATTR(pwm4_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1969 static SENSOR_DEVICE_ATTR(pwm5_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1972 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1973 store_pwm_enable, 0);
1974 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1975 store_pwm_enable, 1);
1976 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1977 store_pwm_enable, 2);
1978 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1979 store_pwm_enable, 3);
1980 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1981 store_pwm_enable, 4);
1983 static SENSOR_DEVICE_ATTR_2(pwm1_temp_sel, S_IWUSR | S_IRUGO,
1984 show_pwm_temp_sel, store_pwm_temp_sel, 0, 0);
1985 static SENSOR_DEVICE_ATTR_2(pwm2_temp_sel, S_IWUSR | S_IRUGO,
1986 show_pwm_temp_sel, store_pwm_temp_sel, 1, 0);
1987 static SENSOR_DEVICE_ATTR_2(pwm3_temp_sel, S_IWUSR | S_IRUGO,
1988 show_pwm_temp_sel, store_pwm_temp_sel, 2, 0);
1989 static SENSOR_DEVICE_ATTR_2(pwm4_temp_sel, S_IWUSR | S_IRUGO,
1990 show_pwm_temp_sel, store_pwm_temp_sel, 3, 0);
1991 static SENSOR_DEVICE_ATTR_2(pwm5_temp_sel, S_IWUSR | S_IRUGO,
1992 show_pwm_temp_sel, store_pwm_temp_sel, 4, 0);
1994 static SENSOR_DEVICE_ATTR(pwm1_target, S_IWUSR | S_IRUGO, show_target_temp,
1995 store_target_temp, 0);
1996 static SENSOR_DEVICE_ATTR(pwm2_target, S_IWUSR | S_IRUGO, show_target_temp,
1997 store_target_temp, 1);
1998 static SENSOR_DEVICE_ATTR(pwm3_target, S_IWUSR | S_IRUGO, show_target_temp,
1999 store_target_temp, 2);
2000 static SENSOR_DEVICE_ATTR(pwm4_target, S_IWUSR | S_IRUGO, show_target_temp,
2001 store_target_temp, 3);
2002 static SENSOR_DEVICE_ATTR(pwm5_target, S_IWUSR | S_IRUGO, show_target_temp,
2003 store_target_temp, 4);
2005 /* Monitored pwm temperatures */
2006 static SENSOR_DEVICE_ATTR(temp11_input, S_IRUGO, show_pwm_temp, NULL, 0);
2007 static SENSOR_DEVICE_ATTR(temp12_input, S_IRUGO, show_pwm_temp, NULL, 1);
2008 static SENSOR_DEVICE_ATTR(temp13_input, S_IRUGO, show_pwm_temp, NULL, 2);
2009 static SENSOR_DEVICE_ATTR(temp14_input, S_IRUGO, show_pwm_temp, NULL, 3);
2010 static SENSOR_DEVICE_ATTR(temp15_input, S_IRUGO, show_pwm_temp, NULL, 4);
2012 /* Smart Fan registers */
2015 show_pwm_sel_enable(struct device *dev, struct device_attribute *attr,
2018 struct nct6775_data *data = nct6775_update_device(dev);
2019 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2021 return sprintf(buf, "%d\n",
2022 data->pwm_sel_enable[sattr->index][sattr->nr]);
2026 store_pwm_sel_enable(struct device *dev, struct device_attribute *attr,
2027 const char *buf, size_t count)
2029 struct nct6775_data *data = dev_get_drvdata(dev);
2030 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2032 int index = sattr->index;
2037 err = kstrtoul(buf, 10, &val);
2044 mutex_lock(&data->update_lock);
2045 data->pwm_sel_enable[index][nr] = val;
2046 reg = nct6775_read_value(data, data->REG_TEMP_SEL[index][nr]);
2050 nct6775_write_value(data, data->REG_TEMP_SEL[index][nr], reg);
2051 mutex_unlock(&data->update_lock);
2056 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2058 struct nct6775_data *data = nct6775_update_device(dev);
2059 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2061 int index = sattr->index;
2063 return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2067 store_weight_temp(struct device *dev, struct device_attribute *attr,
2068 const char *buf, size_t count)
2070 struct nct6775_data *data = dev_get_drvdata(dev);
2071 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2073 int index = sattr->index;
2077 err = kstrtoul(buf, 10, &val);
2081 val = SENSORS_LIMIT(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2083 mutex_lock(&data->update_lock);
2084 data->weight_temp[index][nr] = val;
2085 nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2086 mutex_unlock(&data->update_lock);
2090 static SENSOR_DEVICE_ATTR_2(pwm1_stop_output_enable, S_IWUSR | S_IRUGO,
2091 show_pwm_sel_enable, store_pwm_sel_enable, 0, 0);
2092 static SENSOR_DEVICE_ATTR_2(pwm2_stop_output_enable, S_IWUSR | S_IRUGO,
2093 show_pwm_sel_enable, store_pwm_sel_enable, 1, 0);
2094 static SENSOR_DEVICE_ATTR_2(pwm3_stop_output_enable, S_IWUSR | S_IRUGO,
2095 show_pwm_sel_enable, store_pwm_sel_enable, 2, 0);
2096 static SENSOR_DEVICE_ATTR_2(pwm4_stop_output_enable, S_IWUSR | S_IRUGO,
2097 show_pwm_sel_enable, store_pwm_sel_enable, 3, 0);
2098 static SENSOR_DEVICE_ATTR_2(pwm5_stop_output_enable, S_IWUSR | S_IRUGO,
2099 show_pwm_sel_enable, store_pwm_sel_enable, 4, 0);
2101 static SENSOR_DEVICE_ATTR_2(pwm1_weight_enable, S_IWUSR | S_IRUGO,
2102 show_pwm_sel_enable, store_pwm_sel_enable, 0, 1);
2103 static SENSOR_DEVICE_ATTR_2(pwm2_weight_enable, S_IWUSR | S_IRUGO,
2104 show_pwm_sel_enable, store_pwm_sel_enable, 1, 1);
2105 static SENSOR_DEVICE_ATTR_2(pwm3_weight_enable, S_IWUSR | S_IRUGO,
2106 show_pwm_sel_enable, store_pwm_sel_enable, 2, 1);
2107 static SENSOR_DEVICE_ATTR_2(pwm4_weight_enable, S_IWUSR | S_IRUGO,
2108 show_pwm_sel_enable, store_pwm_sel_enable, 3, 1);
2109 static SENSOR_DEVICE_ATTR_2(pwm5_weight_enable, S_IWUSR | S_IRUGO,
2110 show_pwm_sel_enable, store_pwm_sel_enable, 4, 1);
2112 static SENSOR_DEVICE_ATTR_2(pwm1_weight_temp_sel, S_IWUSR | S_IRUGO,
2113 show_pwm_temp_sel, store_pwm_temp_sel, 0, 1);
2114 static SENSOR_DEVICE_ATTR_2(pwm2_weight_temp_sel, S_IWUSR | S_IRUGO,
2115 show_pwm_temp_sel, store_pwm_temp_sel, 1, 1);
2116 static SENSOR_DEVICE_ATTR_2(pwm3_weight_temp_sel, S_IWUSR | S_IRUGO,
2117 show_pwm_temp_sel, store_pwm_temp_sel, 2, 1);
2118 static SENSOR_DEVICE_ATTR_2(pwm4_weight_temp_sel, S_IWUSR | S_IRUGO,
2119 show_pwm_temp_sel, store_pwm_temp_sel, 3, 1);
2120 static SENSOR_DEVICE_ATTR_2(pwm5_weight_temp_sel, S_IWUSR | S_IRUGO,
2121 show_pwm_temp_sel, store_pwm_temp_sel, 4, 1);
2123 static SENSOR_DEVICE_ATTR_2(pwm1_weight_temp_step, S_IWUSR | S_IRUGO,
2124 show_weight_temp, store_weight_temp, 0, 0);
2125 static SENSOR_DEVICE_ATTR_2(pwm2_weight_temp_step, S_IWUSR | S_IRUGO,
2126 show_weight_temp, store_weight_temp, 1, 0);
2127 static SENSOR_DEVICE_ATTR_2(pwm3_weight_temp_step, S_IWUSR | S_IRUGO,
2128 show_weight_temp, store_weight_temp, 2, 0);
2129 static SENSOR_DEVICE_ATTR_2(pwm4_weight_temp_step, S_IWUSR | S_IRUGO,
2130 show_weight_temp, store_weight_temp, 3, 0);
2131 static SENSOR_DEVICE_ATTR_2(pwm5_weight_temp_step, S_IWUSR | S_IRUGO,
2132 show_weight_temp, store_weight_temp, 4, 0);
2134 static SENSOR_DEVICE_ATTR_2(pwm1_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2135 show_weight_temp, store_weight_temp, 0, 1);
2136 static SENSOR_DEVICE_ATTR_2(pwm2_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2137 show_weight_temp, store_weight_temp, 1, 1);
2138 static SENSOR_DEVICE_ATTR_2(pwm3_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2139 show_weight_temp, store_weight_temp, 2, 1);
2140 static SENSOR_DEVICE_ATTR_2(pwm4_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2141 show_weight_temp, store_weight_temp, 3, 1);
2142 static SENSOR_DEVICE_ATTR_2(pwm5_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2143 show_weight_temp, store_weight_temp, 4, 1);
2145 static SENSOR_DEVICE_ATTR_2(pwm1_weight_temp_step_base, S_IWUSR | S_IRUGO,
2146 show_weight_temp, store_weight_temp, 0, 2);
2147 static SENSOR_DEVICE_ATTR_2(pwm2_weight_temp_step_base, S_IWUSR | S_IRUGO,
2148 show_weight_temp, store_weight_temp, 1, 2);
2149 static SENSOR_DEVICE_ATTR_2(pwm3_weight_temp_step_base, S_IWUSR | S_IRUGO,
2150 show_weight_temp, store_weight_temp, 2, 2);
2151 static SENSOR_DEVICE_ATTR_2(pwm4_weight_temp_step_base, S_IWUSR | S_IRUGO,
2152 show_weight_temp, store_weight_temp, 3, 2);
2153 static SENSOR_DEVICE_ATTR_2(pwm5_weight_temp_step_base, S_IWUSR | S_IRUGO,
2154 show_weight_temp, store_weight_temp, 4, 2);
2156 static SENSOR_DEVICE_ATTR_2(pwm1_weight_duty_step, S_IWUSR | S_IRUGO,
2157 show_pwm, store_pwm, 0, 5);
2158 static SENSOR_DEVICE_ATTR_2(pwm2_weight_duty_step, S_IWUSR | S_IRUGO,
2159 show_pwm, store_pwm, 1, 5);
2160 static SENSOR_DEVICE_ATTR_2(pwm3_weight_duty_step, S_IWUSR | S_IRUGO,
2161 show_pwm, store_pwm, 2, 5);
2162 static SENSOR_DEVICE_ATTR_2(pwm4_weight_duty_step, S_IWUSR | S_IRUGO,
2163 show_pwm, store_pwm, 3, 5);
2164 static SENSOR_DEVICE_ATTR_2(pwm5_weight_duty_step, S_IWUSR | S_IRUGO,
2165 show_pwm, store_pwm, 4, 5);
2167 /* duty_base is not supported on all chips */
2168 static struct sensor_device_attribute_2 sda_weight_duty_base[] = {
2169 SENSOR_ATTR_2(pwm1_weight_duty_base, S_IWUSR | S_IRUGO,
2170 show_pwm, store_pwm, 0, 6),
2171 SENSOR_ATTR_2(pwm2_weight_duty_base, S_IWUSR | S_IRUGO,
2172 show_pwm, store_pwm, 1, 6),
2173 SENSOR_ATTR_2(pwm3_weight_duty_base, S_IWUSR | S_IRUGO,
2174 show_pwm, store_pwm, 2, 6),
2175 SENSOR_ATTR_2(pwm4_weight_duty_base, S_IWUSR | S_IRUGO,
2176 show_pwm, store_pwm, 3, 6),
2177 SENSOR_ATTR_2(pwm5_weight_duty_base, S_IWUSR | S_IRUGO,
2178 show_pwm, store_pwm, 4, 6),
2182 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2184 struct nct6775_data *data = nct6775_update_device(dev);
2185 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2187 int index = sattr->index;
2189 return sprintf(buf, "%d\n",
2190 step_time_from_reg(data->fan_time[index][nr],
2191 data->pwm_mode[nr]));
2195 store_fan_time(struct device *dev, struct device_attribute *attr,
2196 const char *buf, size_t count)
2198 struct nct6775_data *data = dev_get_drvdata(dev);
2199 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2201 int index = sattr->index;
2205 err = kstrtoul(buf, 10, &val);
2209 val = step_time_to_reg(val, data->pwm_mode[nr]);
2210 mutex_lock(&data->update_lock);
2211 data->fan_time[index][nr] = val;
2212 nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2213 mutex_unlock(&data->update_lock);
2218 show_name(struct device *dev, struct device_attribute *attr, char *buf)
2220 struct nct6775_data *data = dev_get_drvdata(dev);
2222 return sprintf(buf, "%s\n", data->name);
2225 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
2227 static SENSOR_DEVICE_ATTR_2(pwm1_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2228 store_fan_time, 0, 0);
2229 static SENSOR_DEVICE_ATTR_2(pwm2_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2230 store_fan_time, 1, 0);
2231 static SENSOR_DEVICE_ATTR_2(pwm3_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2232 store_fan_time, 2, 0);
2233 static SENSOR_DEVICE_ATTR_2(pwm4_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2234 store_fan_time, 3, 0);
2235 static SENSOR_DEVICE_ATTR_2(pwm5_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2236 store_fan_time, 4, 0);
2238 static SENSOR_DEVICE_ATTR_2(pwm1_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2239 store_fan_time, 0, 1);
2240 static SENSOR_DEVICE_ATTR_2(pwm2_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2241 store_fan_time, 1, 1);
2242 static SENSOR_DEVICE_ATTR_2(pwm3_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2243 store_fan_time, 2, 1);
2244 static SENSOR_DEVICE_ATTR_2(pwm4_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2245 store_fan_time, 3, 1);
2246 static SENSOR_DEVICE_ATTR_2(pwm5_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2247 store_fan_time, 4, 1);
2249 static SENSOR_DEVICE_ATTR_2(pwm1_step_down_time, S_IWUSR | S_IRUGO,
2250 show_fan_time, store_fan_time, 0, 2);
2251 static SENSOR_DEVICE_ATTR_2(pwm2_step_down_time, S_IWUSR | S_IRUGO,
2252 show_fan_time, store_fan_time, 1, 2);
2253 static SENSOR_DEVICE_ATTR_2(pwm3_step_down_time, S_IWUSR | S_IRUGO,
2254 show_fan_time, store_fan_time, 2, 2);
2255 static SENSOR_DEVICE_ATTR_2(pwm4_step_down_time, S_IWUSR | S_IRUGO,
2256 show_fan_time, store_fan_time, 3, 2);
2257 static SENSOR_DEVICE_ATTR_2(pwm5_step_down_time, S_IWUSR | S_IRUGO,
2258 show_fan_time, store_fan_time, 4, 2);
2260 static SENSOR_DEVICE_ATTR_2(pwm1_start_output, S_IWUSR | S_IRUGO, show_pwm,
2262 static SENSOR_DEVICE_ATTR_2(pwm2_start_output, S_IWUSR | S_IRUGO, show_pwm,
2264 static SENSOR_DEVICE_ATTR_2(pwm3_start_output, S_IWUSR | S_IRUGO, show_pwm,
2266 static SENSOR_DEVICE_ATTR_2(pwm4_start_output, S_IWUSR | S_IRUGO, show_pwm,
2268 static SENSOR_DEVICE_ATTR_2(pwm5_start_output, S_IWUSR | S_IRUGO, show_pwm,
2271 static SENSOR_DEVICE_ATTR_2(pwm1_stop_output, S_IWUSR | S_IRUGO, show_pwm,
2273 static SENSOR_DEVICE_ATTR_2(pwm2_stop_output, S_IWUSR | S_IRUGO, show_pwm,
2275 static SENSOR_DEVICE_ATTR_2(pwm3_stop_output, S_IWUSR | S_IRUGO, show_pwm,
2277 static SENSOR_DEVICE_ATTR_2(pwm4_stop_output, S_IWUSR | S_IRUGO, show_pwm,
2279 static SENSOR_DEVICE_ATTR_2(pwm5_stop_output, S_IWUSR | S_IRUGO, show_pwm,
2282 /* max_output is not supported on all chips */
2283 static struct sensor_device_attribute_2 sda_max_output[] = {
2284 SENSOR_ATTR_2(pwm1_max_output, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2286 SENSOR_ATTR_2(pwm2_max_output, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2288 SENSOR_ATTR_2(pwm3_max_output, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2290 SENSOR_ATTR_2(pwm4_max_output, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2292 SENSOR_ATTR_2(pwm5_max_output, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2296 /* step_output is not supported on all chips */
2297 static struct sensor_device_attribute_2 sda_step_output[] = {
2298 SENSOR_ATTR_2(pwm1_step_output, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2300 SENSOR_ATTR_2(pwm2_step_output, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2302 SENSOR_ATTR_2(pwm3_step_output, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2304 SENSOR_ATTR_2(pwm4_step_output, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2306 SENSOR_ATTR_2(pwm5_step_output, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2310 static struct attribute *nct6775_attributes_pwm[5][20] = {
2312 &sensor_dev_attr_temp11_input.dev_attr.attr,
2313 &sensor_dev_attr_pwm1.dev_attr.attr,
2314 &sensor_dev_attr_pwm1_mode.dev_attr.attr,
2315 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2316 &sensor_dev_attr_pwm1_stop_output_enable.dev_attr.attr,
2317 &sensor_dev_attr_pwm1_weight_enable.dev_attr.attr,
2318 &sensor_dev_attr_pwm1_temp_sel.dev_attr.attr,
2319 &sensor_dev_attr_pwm1_target.dev_attr.attr,
2320 &sensor_dev_attr_pwm1_stop_time.dev_attr.attr,
2321 &sensor_dev_attr_pwm1_step_up_time.dev_attr.attr,
2322 &sensor_dev_attr_pwm1_step_down_time.dev_attr.attr,
2323 &sensor_dev_attr_pwm1_start_output.dev_attr.attr,
2324 &sensor_dev_attr_pwm1_stop_output.dev_attr.attr,
2325 &sensor_dev_attr_pwm1_weight_temp_sel.dev_attr.attr,
2326 &sensor_dev_attr_pwm1_weight_temp_step.dev_attr.attr,
2327 &sensor_dev_attr_pwm1_weight_temp_step_tol.dev_attr.attr,
2328 &sensor_dev_attr_pwm1_weight_temp_step_base.dev_attr.attr,
2329 &sensor_dev_attr_pwm1_weight_duty_step.dev_attr.attr,
2333 &sensor_dev_attr_temp12_input.dev_attr.attr,
2334 &sensor_dev_attr_pwm2.dev_attr.attr,
2335 &sensor_dev_attr_pwm2_mode.dev_attr.attr,
2336 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2337 &sensor_dev_attr_pwm2_stop_output_enable.dev_attr.attr,
2338 &sensor_dev_attr_pwm2_weight_enable.dev_attr.attr,
2339 &sensor_dev_attr_pwm2_temp_sel.dev_attr.attr,
2340 &sensor_dev_attr_pwm2_target.dev_attr.attr,
2341 &sensor_dev_attr_pwm2_stop_time.dev_attr.attr,
2342 &sensor_dev_attr_pwm2_step_up_time.dev_attr.attr,
2343 &sensor_dev_attr_pwm2_step_down_time.dev_attr.attr,
2344 &sensor_dev_attr_pwm2_start_output.dev_attr.attr,
2345 &sensor_dev_attr_pwm2_stop_output.dev_attr.attr,
2346 &sensor_dev_attr_pwm2_weight_temp_sel.dev_attr.attr,
2347 &sensor_dev_attr_pwm2_weight_temp_step.dev_attr.attr,
2348 &sensor_dev_attr_pwm2_weight_temp_step_tol.dev_attr.attr,
2349 &sensor_dev_attr_pwm2_weight_temp_step_base.dev_attr.attr,
2350 &sensor_dev_attr_pwm2_weight_duty_step.dev_attr.attr,
2354 &sensor_dev_attr_temp13_input.dev_attr.attr,
2355 &sensor_dev_attr_pwm3.dev_attr.attr,
2356 &sensor_dev_attr_pwm3_mode.dev_attr.attr,
2357 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2358 &sensor_dev_attr_pwm3_stop_output_enable.dev_attr.attr,
2359 &sensor_dev_attr_pwm3_weight_enable.dev_attr.attr,
2360 &sensor_dev_attr_pwm3_temp_sel.dev_attr.attr,
2361 &sensor_dev_attr_pwm3_target.dev_attr.attr,
2362 &sensor_dev_attr_pwm3_stop_time.dev_attr.attr,
2363 &sensor_dev_attr_pwm3_step_up_time.dev_attr.attr,
2364 &sensor_dev_attr_pwm3_step_down_time.dev_attr.attr,
2365 &sensor_dev_attr_pwm3_start_output.dev_attr.attr,
2366 &sensor_dev_attr_pwm3_stop_output.dev_attr.attr,
2367 &sensor_dev_attr_pwm3_weight_temp_sel.dev_attr.attr,
2368 &sensor_dev_attr_pwm3_weight_temp_step.dev_attr.attr,
2369 &sensor_dev_attr_pwm3_weight_temp_step_tol.dev_attr.attr,
2370 &sensor_dev_attr_pwm3_weight_temp_step_base.dev_attr.attr,
2371 &sensor_dev_attr_pwm3_weight_duty_step.dev_attr.attr,
2375 &sensor_dev_attr_temp14_input.dev_attr.attr,
2376 &sensor_dev_attr_pwm4.dev_attr.attr,
2377 &sensor_dev_attr_pwm4_mode.dev_attr.attr,
2378 &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2379 &sensor_dev_attr_pwm4_stop_output_enable.dev_attr.attr,
2380 &sensor_dev_attr_pwm4_weight_enable.dev_attr.attr,
2381 &sensor_dev_attr_pwm4_temp_sel.dev_attr.attr,
2382 &sensor_dev_attr_pwm4_target.dev_attr.attr,
2383 &sensor_dev_attr_pwm4_stop_time.dev_attr.attr,
2384 &sensor_dev_attr_pwm4_step_up_time.dev_attr.attr,
2385 &sensor_dev_attr_pwm4_step_down_time.dev_attr.attr,
2386 &sensor_dev_attr_pwm4_start_output.dev_attr.attr,
2387 &sensor_dev_attr_pwm4_stop_output.dev_attr.attr,
2388 &sensor_dev_attr_pwm4_weight_temp_sel.dev_attr.attr,
2389 &sensor_dev_attr_pwm4_weight_temp_step.dev_attr.attr,
2390 &sensor_dev_attr_pwm4_weight_temp_step_tol.dev_attr.attr,
2391 &sensor_dev_attr_pwm4_weight_temp_step_base.dev_attr.attr,
2392 &sensor_dev_attr_pwm4_weight_duty_step.dev_attr.attr,
2396 &sensor_dev_attr_temp15_input.dev_attr.attr,
2397 &sensor_dev_attr_pwm5.dev_attr.attr,
2398 &sensor_dev_attr_pwm5_mode.dev_attr.attr,
2399 &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2400 &sensor_dev_attr_pwm5_stop_output_enable.dev_attr.attr,
2401 &sensor_dev_attr_pwm5_weight_enable.dev_attr.attr,
2402 &sensor_dev_attr_pwm5_temp_sel.dev_attr.attr,
2403 &sensor_dev_attr_pwm5_target.dev_attr.attr,
2404 &sensor_dev_attr_pwm5_stop_time.dev_attr.attr,
2405 &sensor_dev_attr_pwm5_step_up_time.dev_attr.attr,
2406 &sensor_dev_attr_pwm5_step_down_time.dev_attr.attr,
2407 &sensor_dev_attr_pwm5_start_output.dev_attr.attr,
2408 &sensor_dev_attr_pwm5_stop_output.dev_attr.attr,
2409 &sensor_dev_attr_pwm5_weight_temp_sel.dev_attr.attr,
2410 &sensor_dev_attr_pwm5_weight_temp_step.dev_attr.attr,
2411 &sensor_dev_attr_pwm5_weight_temp_step_tol.dev_attr.attr,
2412 &sensor_dev_attr_pwm5_weight_temp_step_base.dev_attr.attr,
2413 &sensor_dev_attr_pwm5_weight_duty_step.dev_attr.attr,
2418 static const struct attribute_group nct6775_group_pwm[5] = {
2419 { .attrs = nct6775_attributes_pwm[0] },
2420 { .attrs = nct6775_attributes_pwm[1] },
2421 { .attrs = nct6775_attributes_pwm[2] },
2422 { .attrs = nct6775_attributes_pwm[3] },
2423 { .attrs = nct6775_attributes_pwm[4] },
2427 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2429 struct nct6775_data *data = nct6775_update_device(dev);
2430 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2432 return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2436 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2437 const char *buf, size_t count)
2439 struct nct6775_data *data = dev_get_drvdata(dev);
2440 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2442 int point = sattr->index;
2447 err = kstrtoul(buf, 10, &val);
2453 if (point == data->auto_pwm_num) {
2454 if (data->kind != nct6775 && !val)
2456 if (data->kind != nct6779 && val)
2460 mutex_lock(&data->update_lock);
2461 data->auto_pwm[nr][point] = val;
2462 if (point < data->auto_pwm_num) {
2463 nct6775_write_value(data,
2464 NCT6775_AUTO_PWM(data, nr, point),
2465 data->auto_pwm[nr][point]);
2467 switch (data->kind) {
2469 /* disable if needed (pwm == 0) */
2470 reg = nct6775_read_value(data,
2471 NCT6775_REG_CRITICAL_ENAB[nr]);
2476 nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
2480 break; /* always enabled, nothing to do */
2482 nct6775_write_value(data, NCT6779_REG_CRITICAL_PWM[nr],
2484 reg = nct6775_read_value(data,
2485 NCT6779_REG_CRITICAL_PWM_ENABLE[nr]);
2490 nct6775_write_value(data,
2491 NCT6779_REG_CRITICAL_PWM_ENABLE[nr],
2496 mutex_unlock(&data->update_lock);
2501 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
2503 struct nct6775_data *data = nct6775_update_device(dev);
2504 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2506 int point = sattr->index;
2509 * We don't know for sure if the temperature is signed or unsigned.
2510 * Assume it is unsigned.
2512 return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
2516 store_auto_temp(struct device *dev, struct device_attribute *attr,
2517 const char *buf, size_t count)
2519 struct nct6775_data *data = dev_get_drvdata(dev);
2520 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2522 int point = sattr->index;
2526 err = kstrtoul(buf, 10, &val);
2532 mutex_lock(&data->update_lock);
2533 data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
2534 if (point < data->auto_pwm_num) {
2535 nct6775_write_value(data,
2536 NCT6775_AUTO_TEMP(data, nr, point),
2537 data->auto_temp[nr][point]);
2539 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
2540 data->auto_temp[nr][point]);
2542 mutex_unlock(&data->update_lock);
2547 * The number of auto-point trip points is chip dependent.
2548 * Need to check support while generating/removing attribute files.
2550 static struct sensor_device_attribute_2 sda_auto_pwm_arrays[] = {
2551 SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IWUSR | S_IRUGO,
2552 show_auto_pwm, store_auto_pwm, 0, 0),
2553 SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IWUSR | S_IRUGO,
2554 show_auto_temp, store_auto_temp, 0, 0),
2555 SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IWUSR | S_IRUGO,
2556 show_auto_temp_hyst, store_auto_temp_hyst, 0, 0),
2557 SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IWUSR | S_IRUGO,
2558 show_auto_pwm, store_auto_pwm, 0, 1),
2559 SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IWUSR | S_IRUGO,
2560 show_auto_temp, store_auto_temp, 0, 1),
2561 SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IWUSR | S_IRUGO,
2562 show_auto_temp_hyst, store_auto_temp_hyst, 0, 1),
2563 SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IWUSR | S_IRUGO,
2564 show_auto_pwm, store_auto_pwm, 0, 2),
2565 SENSOR_ATTR_2(pwm1_auto_point3_temp, S_IWUSR | S_IRUGO,
2566 show_auto_temp, store_auto_temp, 0, 2),
2567 SENSOR_ATTR_2(pwm1_auto_point3_temp_hyst, S_IWUSR | S_IRUGO,
2568 show_auto_temp_hyst, store_auto_temp_hyst, 0, 2),
2569 SENSOR_ATTR_2(pwm1_auto_point4_pwm, S_IWUSR | S_IRUGO,
2570 show_auto_pwm, store_auto_pwm, 0, 3),
2571 SENSOR_ATTR_2(pwm1_auto_point4_temp, S_IWUSR | S_IRUGO,
2572 show_auto_temp, store_auto_temp, 0, 3),
2573 SENSOR_ATTR_2(pwm1_auto_point4_temp_hyst, S_IWUSR | S_IRUGO,
2574 show_auto_temp_hyst, store_auto_temp_hyst, 0, 3),
2575 SENSOR_ATTR_2(pwm1_auto_point5_pwm, S_IWUSR | S_IRUGO,
2576 show_auto_pwm, store_auto_pwm, 0, 4),
2577 SENSOR_ATTR_2(pwm1_auto_point5_temp, S_IWUSR | S_IRUGO,
2578 show_auto_temp, store_auto_temp, 0, 4),
2579 SENSOR_ATTR_2(pwm1_auto_point5_temp_hyst, S_IWUSR | S_IRUGO,
2580 show_auto_temp_hyst, store_auto_temp_hyst, 0, 4),
2581 SENSOR_ATTR_2(pwm1_auto_point6_pwm, S_IWUSR | S_IRUGO,
2582 show_auto_pwm, store_auto_pwm, 0, 5),
2583 SENSOR_ATTR_2(pwm1_auto_point6_temp, S_IWUSR | S_IRUGO,
2584 show_auto_temp, store_auto_temp, 0, 5),
2585 SENSOR_ATTR_2(pwm1_auto_point6_temp_hyst, S_IWUSR | S_IRUGO,
2586 show_auto_temp_hyst, store_auto_temp_hyst, 0, 5),
2587 SENSOR_ATTR_2(pwm1_auto_point7_pwm, S_IWUSR | S_IRUGO,
2588 show_auto_pwm, store_auto_pwm, 0, 6),
2589 SENSOR_ATTR_2(pwm1_auto_point7_temp, S_IWUSR | S_IRUGO,
2590 show_auto_temp, store_auto_temp, 0, 6),
2591 SENSOR_ATTR_2(pwm1_auto_point7_temp_hyst, S_IWUSR | S_IRUGO,
2592 show_auto_temp_hyst, store_auto_temp_hyst, 0, 6),
2594 SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IWUSR | S_IRUGO,
2595 show_auto_pwm, store_auto_pwm, 1, 0),
2596 SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IWUSR | S_IRUGO,
2597 show_auto_temp, store_auto_temp, 1, 0),
2598 SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IWUSR | S_IRUGO,
2599 show_auto_temp_hyst, store_auto_temp_hyst, 1, 0),
2600 SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IWUSR | S_IRUGO,
2601 show_auto_pwm, store_auto_pwm, 1, 1),
2602 SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IWUSR | S_IRUGO,
2603 show_auto_temp, store_auto_temp, 1, 1),
2604 SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IWUSR | S_IRUGO,
2605 show_auto_temp_hyst, store_auto_temp_hyst, 1, 1),
2606 SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IWUSR | S_IRUGO,
2607 show_auto_pwm, store_auto_pwm, 1, 2),
2608 SENSOR_ATTR_2(pwm2_auto_point3_temp, S_IWUSR | S_IRUGO,
2609 show_auto_temp, store_auto_temp, 1, 2),
2610 SENSOR_ATTR_2(pwm2_auto_point3_temp_hyst, S_IWUSR | S_IRUGO,
2611 show_auto_temp_hyst, store_auto_temp_hyst, 1, 2),
2612 SENSOR_ATTR_2(pwm2_auto_point4_pwm, S_IWUSR | S_IRUGO,
2613 show_auto_pwm, store_auto_pwm, 1, 3),
2614 SENSOR_ATTR_2(pwm2_auto_point4_temp, S_IWUSR | S_IRUGO,
2615 show_auto_temp, store_auto_temp, 1, 3),
2616 SENSOR_ATTR_2(pwm2_auto_point4_temp_hyst, S_IWUSR | S_IRUGO,
2617 show_auto_temp_hyst, store_auto_temp_hyst, 1, 3),
2618 SENSOR_ATTR_2(pwm2_auto_point5_pwm, S_IWUSR | S_IRUGO,
2619 show_auto_pwm, store_auto_pwm, 1, 4),
2620 SENSOR_ATTR_2(pwm2_auto_point5_temp, S_IWUSR | S_IRUGO,
2621 show_auto_temp, store_auto_temp, 1, 4),
2622 SENSOR_ATTR_2(pwm2_auto_point5_temp_hyst, S_IWUSR | S_IRUGO,
2623 show_auto_temp_hyst, store_auto_temp_hyst, 1, 4),
2624 SENSOR_ATTR_2(pwm2_auto_point6_pwm, S_IWUSR | S_IRUGO,
2625 show_auto_pwm, store_auto_pwm, 1, 5),
2626 SENSOR_ATTR_2(pwm2_auto_point6_temp, S_IWUSR | S_IRUGO,
2627 show_auto_temp, store_auto_temp, 1, 5),
2628 SENSOR_ATTR_2(pwm2_auto_point6_temp_hyst, S_IWUSR | S_IRUGO,
2629 show_auto_temp_hyst, store_auto_temp_hyst, 1, 5),
2630 SENSOR_ATTR_2(pwm2_auto_point7_pwm, S_IWUSR | S_IRUGO,
2631 show_auto_pwm, store_auto_pwm, 1, 6),
2632 SENSOR_ATTR_2(pwm2_auto_point7_temp, S_IWUSR | S_IRUGO,
2633 show_auto_temp, store_auto_temp, 1, 6),
2634 SENSOR_ATTR_2(pwm2_auto_point7_temp_hyst, S_IWUSR | S_IRUGO,
2635 show_auto_temp_hyst, store_auto_temp_hyst, 1, 6),
2637 SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IWUSR | S_IRUGO,
2638 show_auto_pwm, store_auto_pwm, 2, 0),
2639 SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IWUSR | S_IRUGO,
2640 show_auto_temp, store_auto_temp, 2, 0),
2641 SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IWUSR | S_IRUGO,
2642 show_auto_temp_hyst, store_auto_temp_hyst, 2, 0),
2643 SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IWUSR | S_IRUGO,
2644 show_auto_pwm, store_auto_pwm, 2, 1),
2645 SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IWUSR | S_IRUGO,
2646 show_auto_temp, store_auto_temp, 2, 1),
2647 SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IWUSR | S_IRUGO,
2648 show_auto_temp_hyst, store_auto_temp_hyst, 2, 1),
2649 SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IWUSR | S_IRUGO,
2650 show_auto_pwm, store_auto_pwm, 2, 2),
2651 SENSOR_ATTR_2(pwm3_auto_point3_temp, S_IWUSR | S_IRUGO,
2652 show_auto_temp, store_auto_temp, 2, 2),
2653 SENSOR_ATTR_2(pwm3_auto_point3_temp_hyst, S_IWUSR | S_IRUGO,
2654 show_auto_temp_hyst, store_auto_temp_hyst, 2, 2),
2655 SENSOR_ATTR_2(pwm3_auto_point4_pwm, S_IWUSR | S_IRUGO,
2656 show_auto_pwm, store_auto_pwm, 2, 3),
2657 SENSOR_ATTR_2(pwm3_auto_point4_temp, S_IWUSR | S_IRUGO,
2658 show_auto_temp, store_auto_temp, 2, 3),
2659 SENSOR_ATTR_2(pwm3_auto_point4_temp_hyst, S_IWUSR | S_IRUGO,
2660 show_auto_temp_hyst, store_auto_temp_hyst, 2, 3),
2661 SENSOR_ATTR_2(pwm3_auto_point5_pwm, S_IWUSR | S_IRUGO,
2662 show_auto_pwm, store_auto_pwm, 2, 4),
2663 SENSOR_ATTR_2(pwm3_auto_point5_temp, S_IWUSR | S_IRUGO,
2664 show_auto_temp, store_auto_temp, 2, 4),
2665 SENSOR_ATTR_2(pwm3_auto_point5_temp_hyst, S_IWUSR | S_IRUGO,
2666 show_auto_temp_hyst, store_auto_temp_hyst, 2, 4),
2667 SENSOR_ATTR_2(pwm3_auto_point6_pwm, S_IWUSR | S_IRUGO,
2668 show_auto_pwm, store_auto_pwm, 2, 5),
2669 SENSOR_ATTR_2(pwm3_auto_point6_temp, S_IWUSR | S_IRUGO,
2670 show_auto_temp, store_auto_temp, 2, 5),
2671 SENSOR_ATTR_2(pwm3_auto_point6_temp_hyst, S_IWUSR | S_IRUGO,
2672 show_auto_temp_hyst, store_auto_temp_hyst, 2, 5),
2673 SENSOR_ATTR_2(pwm3_auto_point7_pwm, S_IWUSR | S_IRUGO,
2674 show_auto_pwm, store_auto_pwm, 2, 6),
2675 SENSOR_ATTR_2(pwm3_auto_point7_temp, S_IWUSR | S_IRUGO,
2676 show_auto_temp, store_auto_temp, 2, 6),
2677 SENSOR_ATTR_2(pwm3_auto_point7_temp_hyst, S_IWUSR | S_IRUGO,
2678 show_auto_temp_hyst, store_auto_temp_hyst, 2, 6),
2680 SENSOR_ATTR_2(pwm4_auto_point1_pwm, S_IWUSR | S_IRUGO,
2681 show_auto_pwm, store_auto_pwm, 3, 0),
2682 SENSOR_ATTR_2(pwm4_auto_point1_temp, S_IWUSR | S_IRUGO,
2683 show_auto_temp, store_auto_temp, 3, 0),
2684 SENSOR_ATTR_2(pwm4_auto_point1_temp_hyst, S_IWUSR | S_IRUGO,
2685 show_auto_temp_hyst, store_auto_temp_hyst, 3, 0),
2686 SENSOR_ATTR_2(pwm4_auto_point2_pwm, S_IWUSR | S_IRUGO,
2687 show_auto_pwm, store_auto_pwm, 3, 1),
2688 SENSOR_ATTR_2(pwm4_auto_point2_temp, S_IWUSR | S_IRUGO,
2689 show_auto_temp, store_auto_temp, 3, 1),
2690 SENSOR_ATTR_2(pwm4_auto_point2_temp_hyst, S_IWUSR | S_IRUGO,
2691 show_auto_temp_hyst, store_auto_temp_hyst, 3, 1),
2692 SENSOR_ATTR_2(pwm4_auto_point3_pwm, S_IWUSR | S_IRUGO,
2693 show_auto_pwm, store_auto_pwm, 3, 2),
2694 SENSOR_ATTR_2(pwm4_auto_point3_temp, S_IWUSR | S_IRUGO,
2695 show_auto_temp, store_auto_temp, 3, 2),
2696 SENSOR_ATTR_2(pwm4_auto_point3_temp_hyst, S_IWUSR | S_IRUGO,
2697 show_auto_temp_hyst, store_auto_temp_hyst, 3, 2),
2698 SENSOR_ATTR_2(pwm4_auto_point4_pwm, S_IWUSR | S_IRUGO,
2699 show_auto_pwm, store_auto_pwm, 3, 3),
2700 SENSOR_ATTR_2(pwm4_auto_point4_temp, S_IWUSR | S_IRUGO,
2701 show_auto_temp, store_auto_temp, 3, 3),
2702 SENSOR_ATTR_2(pwm4_auto_point4_temp_hyst, S_IWUSR | S_IRUGO,
2703 show_auto_temp_hyst, store_auto_temp_hyst, 3, 3),
2704 SENSOR_ATTR_2(pwm4_auto_point5_pwm, S_IWUSR | S_IRUGO,
2705 show_auto_pwm, store_auto_pwm, 3, 4),
2706 SENSOR_ATTR_2(pwm4_auto_point5_temp, S_IWUSR | S_IRUGO,
2707 show_auto_temp, store_auto_temp, 3, 4),
2708 SENSOR_ATTR_2(pwm4_auto_point5_temp_hyst, S_IWUSR | S_IRUGO,
2709 show_auto_temp_hyst, store_auto_temp_hyst, 3, 4),
2710 SENSOR_ATTR_2(pwm4_auto_point6_pwm, S_IWUSR | S_IRUGO,
2711 show_auto_pwm, store_auto_pwm, 3, 5),
2712 SENSOR_ATTR_2(pwm4_auto_point6_temp, S_IWUSR | S_IRUGO,
2713 show_auto_temp, store_auto_temp, 3, 5),
2714 SENSOR_ATTR_2(pwm4_auto_point6_temp_hyst, S_IWUSR | S_IRUGO,
2715 show_auto_temp_hyst, store_auto_temp_hyst, 3, 5),
2716 SENSOR_ATTR_2(pwm4_auto_point7_pwm, S_IWUSR | S_IRUGO,
2717 show_auto_pwm, store_auto_pwm, 3, 6),
2718 SENSOR_ATTR_2(pwm4_auto_point7_temp, S_IWUSR | S_IRUGO,
2719 show_auto_temp, store_auto_temp, 3, 6),
2720 SENSOR_ATTR_2(pwm4_auto_point7_temp_hyst, S_IWUSR | S_IRUGO,
2721 show_auto_temp_hyst, store_auto_temp_hyst, 3, 6),
2723 SENSOR_ATTR_2(pwm5_auto_point1_pwm, S_IWUSR | S_IRUGO,
2724 show_auto_pwm, store_auto_pwm, 4, 0),
2725 SENSOR_ATTR_2(pwm5_auto_point1_temp, S_IWUSR | S_IRUGO,
2726 show_auto_temp, store_auto_temp, 4, 0),
2727 SENSOR_ATTR_2(pwm5_auto_point1_temp_hyst, S_IWUSR | S_IRUGO,
2728 show_auto_temp_hyst, store_auto_temp_hyst, 4, 0),
2729 SENSOR_ATTR_2(pwm5_auto_point2_pwm, S_IWUSR | S_IRUGO,
2730 show_auto_pwm, store_auto_pwm, 4, 1),
2731 SENSOR_ATTR_2(pwm5_auto_point2_temp, S_IWUSR | S_IRUGO,
2732 show_auto_temp, store_auto_temp, 4, 1),
2733 SENSOR_ATTR_2(pwm5_auto_point2_temp_hyst, S_IWUSR | S_IRUGO,
2734 show_auto_temp_hyst, store_auto_temp_hyst, 4, 1),
2735 SENSOR_ATTR_2(pwm5_auto_point3_pwm, S_IWUSR | S_IRUGO,
2736 show_auto_pwm, store_auto_pwm, 4, 2),
2737 SENSOR_ATTR_2(pwm5_auto_point3_temp, S_IWUSR | S_IRUGO,
2738 show_auto_temp, store_auto_temp, 4, 2),
2739 SENSOR_ATTR_2(pwm5_auto_point3_temp_hyst, S_IWUSR | S_IRUGO,
2740 show_auto_temp_hyst, store_auto_temp_hyst, 4, 2),
2741 SENSOR_ATTR_2(pwm5_auto_point4_pwm, S_IWUSR | S_IRUGO,
2742 show_auto_pwm, store_auto_pwm, 4, 3),
2743 SENSOR_ATTR_2(pwm5_auto_point4_temp, S_IWUSR | S_IRUGO,
2744 show_auto_temp, store_auto_temp, 4, 3),
2745 SENSOR_ATTR_2(pwm5_auto_point4_temp_hyst, S_IWUSR | S_IRUGO,
2746 show_auto_temp_hyst, store_auto_temp_hyst, 4, 3),
2747 SENSOR_ATTR_2(pwm5_auto_point5_pwm, S_IWUSR | S_IRUGO,
2748 show_auto_pwm, store_auto_pwm, 4, 4),
2749 SENSOR_ATTR_2(pwm5_auto_point5_temp, S_IWUSR | S_IRUGO,
2750 show_auto_temp, store_auto_temp, 4, 4),
2751 SENSOR_ATTR_2(pwm5_auto_point5_temp_hyst, S_IWUSR | S_IRUGO,
2752 show_auto_temp_hyst, store_auto_temp_hyst, 4, 4),
2753 SENSOR_ATTR_2(pwm5_auto_point6_pwm, S_IWUSR | S_IRUGO,
2754 show_auto_pwm, store_auto_pwm, 4, 5),
2755 SENSOR_ATTR_2(pwm5_auto_point6_temp, S_IWUSR | S_IRUGO,
2756 show_auto_temp, store_auto_temp, 4, 5),
2757 SENSOR_ATTR_2(pwm5_auto_point6_temp_hyst, S_IWUSR | S_IRUGO,
2758 show_auto_temp_hyst, store_auto_temp_hyst, 4, 5),
2759 SENSOR_ATTR_2(pwm5_auto_point7_pwm, S_IWUSR | S_IRUGO,
2760 show_auto_pwm, store_auto_pwm, 4, 6),
2761 SENSOR_ATTR_2(pwm5_auto_point7_temp, S_IWUSR | S_IRUGO,
2762 show_auto_temp, store_auto_temp, 4, 6),
2763 SENSOR_ATTR_2(pwm5_auto_point7_temp_hyst, S_IWUSR | S_IRUGO,
2764 show_auto_temp_hyst, store_auto_temp_hyst, 4, 6),
2768 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
2770 struct nct6775_data *data = dev_get_drvdata(dev);
2771 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
2774 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
2776 /* Case open detection */
2779 show_caseopen(struct device *dev, struct device_attribute *attr, char *buf)
2781 struct nct6775_data *data = nct6775_update_device(dev);
2783 return sprintf(buf, "%d\n",
2784 !!(data->caseopen & to_sensor_dev_attr_2(attr)->index));
2788 clear_caseopen(struct device *dev, struct device_attribute *attr,
2789 const char *buf, size_t count)
2791 struct nct6775_data *data = dev_get_drvdata(dev);
2792 struct nct6775_sio_data *sio_data = dev->platform_data;
2793 int nr = to_sensor_dev_attr(attr)->index;
2797 if (kstrtoul(buf, 10, &val) || val != 0)
2800 mutex_lock(&data->update_lock);
2803 * Use CR registers to clear caseopen status.
2804 * The CR registers are the same for all chips, and not all chips
2805 * support clearing the caseopen status through "regular" registers.
2807 superio_enter(sio_data->sioreg);
2808 superio_select(sio_data->sioreg, NCT6775_LD_ACPI);
2809 reg = superio_inb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
2810 reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
2811 superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
2812 superio_exit(sio_data->sioreg);
2814 data->valid = 0; /* Force cache refresh */
2816 mutex_unlock(&data->update_lock);
2821 static struct sensor_device_attribute sda_caseopen[] = {
2822 SENSOR_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_caseopen,
2824 SENSOR_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_caseopen,
2829 * Driver and device management
2832 static void nct6775_device_remove_files(struct device *dev)
2835 * some entries in the following arrays may not have been used in
2836 * device_create_file(), but device_remove_file() will ignore them
2839 struct nct6775_data *data = dev_get_drvdata(dev);
2841 for (i = 0; i < data->pwm_num; i++)
2842 sysfs_remove_group(&dev->kobj, &nct6775_group_pwm[i]);
2844 for (i = 0; i < ARRAY_SIZE(sda_max_output); i++)
2845 device_remove_file(dev, &sda_max_output[i].dev_attr);
2847 for (i = 0; i < ARRAY_SIZE(sda_step_output); i++)
2848 device_remove_file(dev, &sda_max_output[i].dev_attr);
2850 for (i = 0; i < ARRAY_SIZE(sda_weight_duty_base); i++)
2851 device_remove_file(dev, &sda_weight_duty_base[i].dev_attr);
2853 for (i = 0; i < ARRAY_SIZE(sda_auto_pwm_arrays); i++)
2854 device_remove_file(dev, &sda_auto_pwm_arrays[i].dev_attr);
2856 for (i = 0; i < data->in_num; i++)
2857 sysfs_remove_group(&dev->kobj, &nct6775_group_in[i]);
2859 for (i = 0; i < 5; i++) {
2860 device_remove_file(dev, &sda_fan_input[i].dev_attr);
2861 device_remove_file(dev, &sda_fan_alarm[i].dev_attr);
2862 device_remove_file(dev, &sda_fan_div[i].dev_attr);
2863 device_remove_file(dev, &sda_fan_min[i].dev_attr);
2865 for (i = 0; i < NUM_TEMP; i++) {
2866 if (!(data->have_temp & (1 << i)))
2868 device_remove_file(dev, &sda_temp_input[i].dev_attr);
2869 device_remove_file(dev, &sda_temp_label[i].dev_attr);
2870 device_remove_file(dev, &sda_temp_max[i].dev_attr);
2871 device_remove_file(dev, &sda_temp_max_hyst[i].dev_attr);
2872 if (!(data->have_temp_fixed & (1 << i)))
2874 device_remove_file(dev, &sda_temp_type[i].dev_attr);
2875 device_remove_file(dev, &sda_temp_offset[i].dev_attr);
2876 if (i >= NUM_TEMP_ALARM)
2878 device_remove_file(dev, &sda_temp_alarm[i].dev_attr);
2881 device_remove_file(dev, &sda_caseopen[0].dev_attr);
2882 device_remove_file(dev, &sda_caseopen[1].dev_attr);
2884 device_remove_file(dev, &dev_attr_name);
2885 device_remove_file(dev, &dev_attr_cpu0_vid);
2888 /* Get the monitoring functions started */
2889 static inline void __devinit nct6775_init_device(struct nct6775_data *data)
2894 /* Start monitoring if needed */
2895 if (data->REG_CONFIG) {
2896 tmp = nct6775_read_value(data, data->REG_CONFIG);
2898 nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
2901 /* Enable temperature sensors if needed */
2902 for (i = 0; i < NUM_TEMP; i++) {
2903 if (!(data->have_temp & (1 << i)))
2905 if (!data->reg_temp_config[i])
2907 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
2909 nct6775_write_value(data, data->reg_temp_config[i],
2913 /* Enable VBAT monitoring if needed */
2914 tmp = nct6775_read_value(data, data->REG_VBAT);
2916 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
2918 diode = nct6775_read_value(data, data->REG_DIODE);
2920 for (i = 0; i < data->temp_fixed_num; i++) {
2921 if (!(data->have_temp_fixed & (1 << i)))
2923 if ((tmp & (0x02 << i))) /* diode */
2924 data->temp_type[i] = 3 - ((diode >> i) & 0x02);
2925 else /* thermistor */
2926 data->temp_type[i] = 4;
2930 static void __devinit
2931 nct6775_check_fan_inputs(const struct nct6775_sio_data *sio_data,
2932 struct nct6775_data *data)
2935 bool fan3pin, fan3min, fan4pin, fan4min, fan5pin;
2936 bool pwm3pin, pwm4pin, pwm5pin;
2938 superio_enter(sio_data->sioreg);
2940 /* fan4 and fan5 share some pins with the GPIO and serial flash */
2941 if (data->kind == nct6775) {
2942 regval = superio_inb(sio_data->sioreg, 0x2c);
2944 fan3pin = regval & (1 << 6);
2946 pwm3pin = regval & (1 << 7);
2948 /* On NCT6775, fan4 shares pins with the fdc interface */
2949 fan4pin = !(superio_inb(sio_data->sioreg, 0x2A) & 0x80);
2954 } else if (data->kind == nct6776) {
2955 bool gpok = superio_inb(sio_data->sioreg, 0x27) & 0x80;
2957 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
2958 regval = superio_inb(sio_data->sioreg, SIO_REG_ENABLE);
2963 fan3pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x40);
2968 fan4pin = superio_inb(sio_data->sioreg, 0x1C) & 0x01;
2973 fan5pin = superio_inb(sio_data->sioreg, 0x1C) & 0x02;
2980 } else { /* NCT6779D */
2981 regval = superio_inb(sio_data->sioreg, 0x1c);
2983 fan3pin = !(regval & (1 << 5));
2984 fan4pin = !(regval & (1 << 6));
2985 fan5pin = !(regval & (1 << 7));
2987 pwm3pin = !(regval & (1 << 0));
2988 pwm4pin = !(regval & (1 << 1));
2989 pwm5pin = !(regval & (1 << 2));
2995 superio_exit(sio_data->sioreg);
2997 data->has_fan = data->has_fan_min = 0x03; /* fan1 and fan2 */
2998 data->has_fan |= fan3pin << 2;
2999 data->has_fan_min |= fan3min << 2;
3001 data->has_fan |= (fan4pin << 3) | (fan5pin << 4);
3002 data->has_fan_min |= (fan4min << 3) | (fan5pin << 4);
3004 data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) | (pwm5pin << 4);
3007 static int __devinit nct6775_probe(struct platform_device *pdev)
3009 struct device *dev = &pdev->dev;
3010 struct nct6775_sio_data *sio_data = dev->platform_data;
3011 struct nct6775_data *data;
3012 struct resource *res;
3014 int src, mask, available;
3015 const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3017 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3018 if (!request_region(res->start, IOREGION_LENGTH, DRVNAME)) {
3020 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
3021 (unsigned long)res->start,
3022 (unsigned long)res->start + IOREGION_LENGTH - 1);
3026 data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3033 data->kind = sio_data->kind;
3034 data->addr = res->start;
3035 mutex_init(&data->lock);
3036 mutex_init(&data->update_lock);
3037 data->name = nct6775_device_names[data->kind];
3038 platform_set_drvdata(pdev, data);
3040 switch (data->kind) {
3043 data->have_in = 0x1ff;
3045 data->auto_pwm_num = 6;
3046 data->has_fan_div = true;
3047 data->temp_fixed_num = 3;
3049 data->fan_from_reg = fan_from_reg16;
3050 data->fan_from_reg_min = fan_from_reg8;
3052 data->REG_CONFIG = NCT6775_REG_CONFIG;
3053 data->REG_VBAT = NCT6775_REG_VBAT;
3054 data->REG_DIODE = NCT6775_REG_DIODE;
3055 data->REG_VIN = NCT6775_REG_IN;
3056 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3057 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3058 data->REG_TARGET = NCT6775_REG_TARGET;
3059 data->REG_FAN = NCT6775_REG_FAN;
3060 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3061 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3062 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3063 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3064 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3065 data->REG_PWM[0] = NCT6775_REG_PWM;
3066 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3067 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3068 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3069 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3070 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3071 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3072 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3073 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3074 data->REG_TEMP_MON = NCT6775_REG_TEMP_MON;
3075 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3076 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3077 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3078 data->REG_CRITICAL_TEMP_TOLERANCE
3079 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3080 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3081 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3082 data->REG_TEMP_SEL[0] = NCT6775_REG_TEMP_SEL;
3083 data->REG_TEMP_SEL[1] = NCT6775_REG_WEIGHT_TEMP_SEL;
3084 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3085 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3086 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3087 data->REG_ALARM = NCT6775_REG_ALARM;
3088 data->REG_CASEOPEN = NCT6775_REG_CASEOPEN;
3089 data->CASEOPEN_MASK = NCT6775_CASEOPEN_MASK;
3091 reg_temp = NCT6775_REG_TEMP;
3092 reg_temp_over = NCT6775_REG_TEMP_OVER;
3093 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3094 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3099 data->have_in = 0x1ff;
3101 data->auto_pwm_num = 4;
3102 data->has_fan_div = false;
3103 data->temp_fixed_num = 3;
3105 data->fan_from_reg = fan_from_reg13;
3106 data->fan_from_reg_min = fan_from_reg13;
3108 data->REG_CONFIG = NCT6775_REG_CONFIG;
3109 data->REG_VBAT = NCT6775_REG_VBAT;
3110 data->REG_DIODE = NCT6775_REG_DIODE;
3111 data->REG_VIN = NCT6775_REG_IN;
3112 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3113 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3114 data->REG_TARGET = NCT6775_REG_TARGET;
3115 data->REG_FAN = NCT6775_REG_FAN;
3116 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3117 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3118 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3119 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3120 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3121 data->REG_PWM[0] = NCT6775_REG_PWM;
3122 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3123 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3124 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3125 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3126 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3127 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3128 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3129 data->REG_TEMP_MON = NCT6775_REG_TEMP_MON;
3130 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3131 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3132 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3133 data->REG_CRITICAL_TEMP_TOLERANCE
3134 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3135 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3136 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3137 data->REG_TEMP_SEL[0] = NCT6775_REG_TEMP_SEL;
3138 data->REG_TEMP_SEL[1] = NCT6775_REG_WEIGHT_TEMP_SEL;
3139 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3140 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3141 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3142 data->REG_ALARM = NCT6775_REG_ALARM;
3143 data->REG_CASEOPEN = NCT6775_REG_CASEOPEN;
3144 data->CASEOPEN_MASK = NCT6776_CASEOPEN_MASK;
3146 reg_temp = NCT6775_REG_TEMP;
3147 reg_temp_over = NCT6775_REG_TEMP_OVER;
3148 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3149 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3154 data->have_in = 0x7fff;
3156 data->auto_pwm_num = 4;
3157 data->has_fan_div = false;
3158 data->temp_fixed_num = 6;
3160 data->fan_from_reg = fan_from_reg13;
3161 data->fan_from_reg_min = fan_from_reg13;
3163 data->REG_CONFIG = NCT6775_REG_CONFIG;
3164 data->REG_VBAT = NCT6775_REG_VBAT;
3165 data->REG_DIODE = NCT6775_REG_DIODE;
3166 data->REG_VIN = NCT6779_REG_IN;
3167 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3168 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3169 data->REG_TARGET = NCT6775_REG_TARGET;
3170 data->REG_FAN = NCT6779_REG_FAN;
3171 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3172 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3173 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3174 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3175 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3176 data->REG_PWM[0] = NCT6775_REG_PWM;
3177 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3178 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3179 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3180 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3181 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3182 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3183 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3184 data->REG_TEMP_FIXED = NCT6779_REG_TEMP_FIXED;
3185 data->REG_TEMP_MON = NCT6775_REG_TEMP_MON;
3186 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3187 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3188 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3189 data->REG_CRITICAL_TEMP_TOLERANCE
3190 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3191 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3192 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3193 data->REG_TEMP_SEL[0] = NCT6775_REG_TEMP_SEL;
3194 data->REG_TEMP_SEL[1] = NCT6775_REG_WEIGHT_TEMP_SEL;
3195 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3196 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3197 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3198 data->REG_ALARM = NCT6779_REG_ALARM;
3199 data->REG_CASEOPEN = NCT6775_REG_CASEOPEN;
3200 data->CASEOPEN_MASK = NCT6776_CASEOPEN_MASK;
3202 reg_temp = NCT6779_REG_TEMP;
3203 reg_temp_over = NCT6775_REG_TEMP_OVER;
3204 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3205 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3213 data->have_temp = 0;
3216 * On some boards, not all available temperature sources are monitored,
3217 * even though some of the monitoring registers are unused.
3218 * Get list of unused monitoring registers, then detect if any fan
3219 * controls are configured to use unmonitored temperature sources.
3220 * If so, assign the unmonitored temperature sources to available
3221 * monitoring registers.
3225 for (i = 0; i < NUM_REG_TEMP; i++) {
3226 if (reg_temp[i] == 0)
3229 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3230 if (!src || (mask & (1 << src)))
3231 available |= 1 << i;
3237 * Now find unmonitored temperature registers and enable monitoring
3238 * if additional monitoring registers are available.
3240 for (i = 0; i < ARRAY_SIZE(data->REG_TEMP_SEL) && available; i++) {
3243 if (!data->REG_TEMP_SEL[i])
3245 for (j = 0; j < data->pwm_num && available; j++) {
3248 if (!data->REG_TEMP_SEL[i][j])
3250 src = nct6775_read_value(data,
3251 data->REG_TEMP_SEL[i][j]);
3253 if (!src || (mask & (1 << src)))
3256 index = __ffs(available);
3257 nct6775_write_value(data,
3258 data->REG_TEMP_SOURCE[index],
3260 available &= ~(1 << index);
3266 s = NUM_TEMP_FIXED; /* First dynamic temperature attribute */
3267 for (i = 0; i < NUM_REG_TEMP; i++) {
3268 if (reg_temp[i] == 0)
3271 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3272 if (!src || (mask & (1 << src)))
3275 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3276 if (src <= data->temp_fixed_num) {
3277 data->have_temp |= 1 << (src - 1);
3278 data->have_temp_fixed |= 1 << (src - 1);
3280 data->reg_temp[0][src - 1] = reg_temp[i];
3281 data->reg_temp[1][src - 1] = reg_temp_over[i];
3282 data->reg_temp[2][src - 1] = reg_temp_hyst[i];
3283 data->reg_temp_config[src - 1] = reg_temp_config[i];
3284 data->temp_src[src - 1] = src;
3291 /* Use dynamic index for other sources */
3292 data->have_temp |= 1 << s;
3295 data->reg_temp[0][s] = reg_temp[i];
3296 data->reg_temp[1][s] = reg_temp_over[i];
3297 data->reg_temp[2][s] = reg_temp_hyst[i];
3298 data->reg_temp_config[s] = reg_temp_config[i];
3300 data->temp_src[s] = src;
3304 if (data->REG_TEMP_FIXED) {
3305 for (i = 0; i < NUM_TEMP_FIXED; i++) {
3306 if (data->have_temp & (1 << i))
3308 if (!data->REG_TEMP_FIXED[i])
3310 data->have_temp |= 1 << i;
3311 data->reg_temp[0][i] = data->REG_TEMP_FIXED[i];
3312 data->temp_src[i] = i + 1;
3316 switch (data->kind) {
3318 data->temp_label = nct6775_temp_label;
3322 * On NCT6776, AUXTIN and VIN3 pins are shared.
3323 * Only way to detect it is to check if AUXTIN is used
3324 * as a temperature source, and if that source is
3327 * If that is the case, disable in6, which reports VIN3.
3328 * Otherwise disable temp3.
3330 if (data->have_temp & (1 << 2)) {
3331 u8 reg = nct6775_read_value(data,
3332 data->reg_temp_config[2]);
3334 data->have_temp &= ~(1 << 2);
3336 data->have_in &= ~(1 << 6);
3338 data->temp_label = nct6776_temp_label;
3347 * Assume voltage is disabled if the respective temperature is
3348 * used as temperature source.
3350 for (i = 0; i < ARRAY_SIZE(NCT6779_REG_TEMP); i++) {
3351 if (!(data->have_temp & (1 << i)))
3353 if (i == 2) /* AUXTIN0 */
3354 data->have_in &= ~(1 << 6); /* no VIN4 */
3355 if (i == 3) /* AUXTIN1 */
3356 data->have_in &= ~(1 << 10); /* no VIN5 */
3357 if (i == 4) /* AUXTIN2 */
3358 data->have_in &= ~(1 << 11); /* no VIN6 */
3359 if (i == 5) /* AUXTIN3 */
3360 data->have_in &= ~(1 << 14); /* no VIN7 */
3362 data->temp_label = nct6779_temp_label;
3366 /* Initialize the chip */
3367 nct6775_init_device(data);
3369 data->vrm = vid_which_vrm();
3370 superio_enter(sio_data->sioreg);
3373 * We can get the VID input values directly at logical device D 0xe3.
3375 superio_select(sio_data->sioreg, NCT6775_LD_VID);
3376 data->vid = superio_inb(sio_data->sioreg, 0xe3);
3377 err = device_create_file(dev, &dev_attr_cpu0_vid);
3384 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3385 tmp = superio_inb(sio_data->sioreg,
3386 NCT6775_REG_CR_FAN_DEBOUNCE);
3387 switch (data->kind) {
3396 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
3398 pr_info("Enabled fan debounce for chip %s\n", data->name);
3401 superio_exit(sio_data->sioreg);
3403 nct6775_check_fan_inputs(sio_data, data);
3405 /* Read fan clock dividers immediately */
3406 nct6775_update_fan_div_common(dev, data);
3408 /* Register sysfs hooks */
3409 for (i = 0; i < data->pwm_num; i++) {
3410 if (!(data->has_pwm & (1 << i)))
3413 err = sysfs_create_group(&dev->kobj, &nct6775_group_pwm[i]);
3417 if (data->REG_PWM[3]) {
3418 err = device_create_file(dev,
3419 &sda_max_output[i].dev_attr);
3423 if (data->REG_PWM[4]) {
3424 err = device_create_file(dev,
3425 &sda_step_output[i].dev_attr);
3429 if (data->REG_PWM[6]) {
3430 err = device_create_file(dev,
3431 &sda_weight_duty_base[i].dev_attr);
3436 for (i = 0; i < ARRAY_SIZE(sda_auto_pwm_arrays); i++) {
3437 struct sensor_device_attribute_2 *attr =
3438 &sda_auto_pwm_arrays[i];
3440 if (!(data->has_pwm & (1 << attr->nr)))
3442 if (attr->index > data->auto_pwm_num)
3444 err = device_create_file(dev, &attr->dev_attr);
3449 for (i = 0; i < data->in_num; i++) {
3450 if (!(data->have_in & (1 << i)))
3452 err = sysfs_create_group(&dev->kobj, &nct6775_group_in[i]);
3457 for (i = 0; i < 5; i++) {
3458 if (data->has_fan & (1 << i)) {
3459 err = device_create_file(dev,
3460 &sda_fan_input[i].dev_attr);
3463 err = device_create_file(dev,
3464 &sda_fan_alarm[i].dev_attr);
3467 if (data->kind != nct6776 &&
3468 data->kind != nct6779) {
3469 err = device_create_file(dev,
3470 &sda_fan_div[i].dev_attr);
3474 if (data->has_fan_min & (1 << i)) {
3475 err = device_create_file(dev,
3476 &sda_fan_min[i].dev_attr);
3483 for (i = 0; i < NUM_TEMP; i++) {
3484 if (!(data->have_temp & (1 << i)))
3486 err = device_create_file(dev, &sda_temp_input[i].dev_attr);
3489 if (data->temp_label) {
3490 err = device_create_file(dev,
3491 &sda_temp_label[i].dev_attr);
3495 if (data->reg_temp[1][i]) {
3496 err = device_create_file(dev,
3497 &sda_temp_max[i].dev_attr);
3501 if (data->reg_temp[2][i]) {
3502 err = device_create_file(dev,
3503 &sda_temp_max_hyst[i].dev_attr);
3507 if (!(data->have_temp_fixed & (1 << i)))
3509 err = device_create_file(dev, &sda_temp_type[i].dev_attr);
3512 err = device_create_file(dev,
3513 &sda_temp_offset[i].dev_attr);
3516 if (i >= NUM_TEMP_ALARM)
3518 err = device_create_file(dev, &sda_temp_alarm[i].dev_attr);
3523 for (i = 0; i < ARRAY_SIZE(sda_caseopen); i++) {
3524 if (!data->CASEOPEN_MASK[i])
3526 err = device_create_file(dev, &sda_caseopen[i].dev_attr);
3531 err = device_create_file(dev, &dev_attr_name);
3535 data->hwmon_dev = hwmon_device_register(dev);
3536 if (IS_ERR(data->hwmon_dev)) {
3537 err = PTR_ERR(data->hwmon_dev);
3544 nct6775_device_remove_files(dev);
3546 release_region(res->start, IOREGION_LENGTH);
3551 static int __devexit nct6775_remove(struct platform_device *pdev)
3553 struct nct6775_data *data = platform_get_drvdata(pdev);
3555 hwmon_device_unregister(data->hwmon_dev);
3556 nct6775_device_remove_files(&pdev->dev);
3557 release_region(data->addr, IOREGION_LENGTH);
3562 static struct platform_driver nct6775_driver = {
3564 .owner = THIS_MODULE,
3567 .probe = nct6775_probe,
3568 .remove = __devexit_p(nct6775_remove),
3571 /* nct6775_find() looks for a '627 in the Super-I/O config space */
3572 static int __init nct6775_find(int sioaddr, unsigned short *addr,
3573 struct nct6775_sio_data *sio_data)
3575 static const char __initdata sio_name_NCT6775[] = "NCT6775F";
3576 static const char __initdata sio_name_NCT6776[] = "NCT6776F";
3577 static const char __initdata sio_name_NCT6779[] = "NCT6779D";
3580 const char *sio_name;
3582 superio_enter(sioaddr);
3587 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
3588 | superio_inb(sioaddr, SIO_REG_DEVID + 1);
3589 switch (val & SIO_ID_MASK) {
3590 case SIO_NCT6775_ID:
3591 sio_data->kind = nct6775;
3592 sio_name = sio_name_NCT6775;
3594 case SIO_NCT6776_ID:
3595 sio_data->kind = nct6776;
3596 sio_name = sio_name_NCT6776;
3598 case SIO_NCT6779_ID:
3599 sio_data->kind = nct6779;
3600 sio_name = sio_name_NCT6779;
3604 pr_debug("unsupported chip ID: 0x%04x\n", val);
3605 superio_exit(sioaddr);
3609 /* We have a known chip, find the HWM I/O address */
3610 superio_select(sioaddr, NCT6775_LD_HWM);
3611 val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
3612 | superio_inb(sioaddr, SIO_REG_ADDR + 1);
3613 *addr = val & IOREGION_ALIGNMENT;
3615 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
3616 superio_exit(sioaddr);
3620 /* Activate logical device if needed */
3621 val = superio_inb(sioaddr, SIO_REG_ENABLE);
3622 if (!(val & 0x01)) {
3623 pr_warn("Forcibly enabling Super-I/O. "
3624 "Sensor is probably unusable.\n");
3625 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
3628 superio_exit(sioaddr);
3629 pr_info("Found %s chip at %#x\n", sio_name, *addr);
3630 sio_data->sioreg = sioaddr;
3636 * when Super-I/O functions move to a separate file, the Super-I/O
3637 * bus will manage the lifetime of the device and this module will only keep
3638 * track of the nct6775 driver. But since we platform_device_alloc(), we
3639 * must keep track of the device
3641 static struct platform_device *pdev;
3643 static int __init sensors_nct6775_init(void)
3646 unsigned short address;
3647 struct resource res;
3648 struct nct6775_sio_data sio_data;
3651 * initialize sio_data->kind and sio_data->sioreg.
3653 * when Super-I/O functions move to a separate file, the Super-I/O
3654 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
3655 * nct6775 hardware monitor, and call probe()
3657 if (nct6775_find(0x2e, &address, &sio_data) &&
3658 nct6775_find(0x4e, &address, &sio_data))
3661 err = platform_driver_register(&nct6775_driver);
3665 pdev = platform_device_alloc(DRVNAME, address);
3668 pr_err("Device allocation failed\n");
3669 goto exit_unregister;
3672 err = platform_device_add_data(pdev, &sio_data,
3673 sizeof(struct nct6775_sio_data));
3675 pr_err("Platform data allocation failed\n");
3676 goto exit_device_put;
3679 memset(&res, 0, sizeof(res));
3681 res.start = address + IOREGION_OFFSET;
3682 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
3683 res.flags = IORESOURCE_IO;
3685 err = acpi_check_resource_conflict(&res);
3687 goto exit_device_put;
3689 err = platform_device_add_resources(pdev, &res, 1);
3691 pr_err("Device resource addition failed (%d)\n", err);
3692 goto exit_device_put;
3695 /* platform_device_add calls probe() */
3696 err = platform_device_add(pdev);
3698 pr_err("Device addition failed (%d)\n", err);
3699 goto exit_device_put;
3705 platform_device_put(pdev);
3707 platform_driver_unregister(&nct6775_driver);
3712 static void __exit sensors_nct6775_exit(void)
3714 platform_device_unregister(pdev);
3715 platform_driver_unregister(&nct6775_driver);
3718 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
3719 MODULE_DESCRIPTION("NCT6775F/NCT6776F/NCT6779D driver");
3720 MODULE_LICENSE("GPL");
3722 module_init(sensors_nct6775_init);
3723 module_exit(sensors_nct6775_exit);