git.sur5r.net Git - groeck-nct6775/blob - nct6775.c

   1 /*
   2  * nct6775 - Driver for the hardware monitoring functionality of
   3  *             Nuvoton NCT677x Super-I/O chips
   4  *
   5  * Copyright (C) 2012  Guenter Roeck <linux@roeck-us.net>
   6  *
   7  * Derived from w83627ehf driver
   8  * Copyright (C) 2005-2012  Jean Delvare <jdelvare@suse.de>
   9  * Copyright (C) 2006  Yuan Mu (Winbond),
  10  *                     Rudolf Marek <r.marek@assembler.cz>
  11  *                     David Hubbard <david.c.hubbard@gmail.com>
  12  *                     Daniel J Blueman <daniel.blueman@gmail.com>
  13  * Copyright (C) 2010  Sheng-Yuan Huang (Nuvoton) (PS00)
  14  *
  15  * Shamelessly ripped from the w83627hf driver
  16  * Copyright (C) 2003  Mark Studebaker
  17  *
  18  * This program is free software; you can redistribute it and/or modify
  19  * it under the terms of the GNU General Public License as published by
  20  * the Free Software Foundation; either version 2 of the License, or
  21  * (at your option) any later version.
  22  *
  23  * This program is distributed in the hope that it will be useful,
  24  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26  * GNU General Public License for more details.
  27  *
  28  * You should have received a copy of the GNU General Public License
  29  * along with this program; if not, write to the Free Software
  30  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  31  *
  32  *
  33  * Supports the following chips:
  34  *
  35  * Chip        #vin    #fan    #pwm    #temp  chip IDs       man ID
  36  * nct6106d     9      3       3       6+3    0xc450 0xc1    0x5ca3
  37  * nct6775f     9      4       3       6+3    0xb470 0xc1    0x5ca3
  38  * nct6776f     9      5       3       6+3    0xc330 0xc1    0x5ca3
  39  * nct6779d    15      5       5       2+6    0xc560 0xc1    0x5ca3
  40  * nct6791d    15      6       6       2+6    0xc800 0xc1    0x5ca3
  41  * nct6792d    15      6       6       2+6    0xc911 0xc1    0x5ca3
  42  *
  43  * #temp lists the number of monitored temperature sources (first value) plus
  44  * the number of directly connectable temperature sensors (second value).
  45  */
  46
  47 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  48
  49 #include <linux/module.h>
  50 #include <linux/init.h>
  51 #include <linux/slab.h>
  52 #include <linux/jiffies.h>
  53 #include <linux/platform_device.h>
  54 #include <linux/hwmon.h>
  55 #include <linux/hwmon-sysfs.h>
  56 #include <linux/hwmon-vid.h>
  57 #include <linux/err.h>
  58 #include <linux/mutex.h>
  59 #include <linux/acpi.h>
  60 #include <linux/dmi.h>
  61 #include <linux/io.h>
  62 #include "lm75.h"
  63 #include "compat.h"
  64
  65 #define USE_ALTERNATE
  66
  67 enum kinds { nct6106, nct6775, nct6776, nct6779, nct6791, nct6792 };
  68
  69 /* used to set data->name = nct6775_device_names[data->sio_kind] */
  70 static const char * const nct6775_device_names[] = {
  71         "nct6106",
  72         "nct6775",
  73         "nct6776",
  74         "nct6779",
  75         "nct6791",
  76         "nct6792",
  77 };
  78
  79 static unsigned short force_id;
  80 module_param(force_id, ushort, 0);
  81 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  82
  83 static unsigned short fan_debounce;
  84 module_param(fan_debounce, ushort, 0);
  85 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
  86
  87 #define DRVNAME "nct6775"
  88
  89 /*
  90  * Super-I/O constants and functions
  91  */
  92
  93 #define NCT6775_LD_ACPI         0x0a
  94 #define NCT6775_LD_HWM          0x0b
  95 #define NCT6775_LD_VID          0x0d
  96
  97 #define SIO_REG_LDSEL           0x07    /* Logical device select */
  98 #define SIO_REG_DEVID           0x20    /* Device ID (2 bytes) */
  99 #define SIO_REG_ENABLE          0x30    /* Logical device enable */
 100 #define SIO_REG_ADDR            0x60    /* Logical device address (2 bytes) */
 101
 102 #define SIO_NCT6106_ID          0xc450
 103 #define SIO_NCT6775_ID          0xb470
 104 #define SIO_NCT6776_ID          0xc330
 105 #define SIO_NCT6779_ID          0xc560
 106 #define SIO_NCT6791_ID          0xc800
 107 #define SIO_NCT6792_ID          0xc910
 108 #define SIO_ID_MASK             0xFFF0
 109
 110 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
 111
 112 static inline void
 113 superio_outb(int ioreg, int reg, int val)
 114 {
 115         outb(reg, ioreg);
 116         outb(val, ioreg + 1);
 117 }
 118
 119 static inline int
 120 superio_inb(int ioreg, int reg)
 121 {
 122         outb(reg, ioreg);
 123         return inb(ioreg + 1);
 124 }
 125
 126 static inline void
 127 superio_select(int ioreg, int ld)
 128 {
 129         outb(SIO_REG_LDSEL, ioreg);
 130         outb(ld, ioreg + 1);
 131 }
 132
 133 static inline int
 134 superio_enter(int ioreg)
 135 {
 136         /*
 137          * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
 138          */
 139         if (!request_muxed_region(ioreg, 2, DRVNAME))
 140                 return -EBUSY;
 141
 142         outb(0x87, ioreg);
 143         outb(0x87, ioreg);
 144
 145         return 0;
 146 }
 147
 148 static inline void
 149 superio_exit(int ioreg)
 150 {
 151         outb(0xaa, ioreg);
 152         outb(0x02, ioreg);
 153         outb(0x02, ioreg + 1);
 154         release_region(ioreg, 2);
 155 }
 156
 157 /*
 158  * ISA constants
 159  */
 160
 161 #define IOREGION_ALIGNMENT      (~7)
 162 #define IOREGION_OFFSET         5
 163 #define IOREGION_LENGTH         2
 164 #define ADDR_REG_OFFSET         0
 165 #define DATA_REG_OFFSET         1
 166
 167 #define NCT6775_REG_BANK        0x4E
 168 #define NCT6775_REG_CONFIG      0x40
 169
 170 /*
 171  * Not currently used:
 172  * REG_MAN_ID has the value 0x5ca3 for all supported chips.
 173  * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
 174  * REG_MAN_ID is at port 0x4f
 175  * REG_CHIP_ID is at port 0x58
 176  */
 177
 178 #define NUM_TEMP        10      /* Max number of temp attribute sets w/ limits*/
 179 #define NUM_TEMP_FIXED  6       /* Max number of fixed temp attribute sets */
 180
 181 #define NUM_REG_ALARM   7       /* Max number of alarm registers */
 182 #define NUM_REG_BEEP    5       /* Max number of beep registers */
 183
 184 #define NUM_FAN         6
 185
 186 /* Common and NCT6775 specific data */
 187
 188 /* Voltage min/max registers for nr=7..14 are in bank 5 */
 189
 190 static const u16 NCT6775_REG_IN_MAX[] = {
 191         0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
 192         0x55c, 0x55e, 0x560, 0x562 };
 193 static const u16 NCT6775_REG_IN_MIN[] = {
 194         0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
 195         0x55d, 0x55f, 0x561, 0x563 };
 196 static const u16 NCT6775_REG_IN[] = {
 197         0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
 198 };
 199
 200 #define NCT6775_REG_VBAT                0x5D
 201 #define NCT6775_REG_DIODE               0x5E
 202 #define NCT6775_DIODE_MASK              0x02
 203
 204 #define NCT6775_REG_FANDIV1             0x506
 205 #define NCT6775_REG_FANDIV2             0x507
 206
 207 #define NCT6775_REG_CR_FAN_DEBOUNCE     0xf0
 208
 209 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
 210
 211 /* 0..15 voltages, 16..23 fans, 24..29 temperatures, 30..31 intrusion */
 212
 213 static const s8 NCT6775_ALARM_BITS[] = {
 214         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 215         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 216         -1,                             /* unused */
 217         6, 7, 11, -1, -1,               /* fan1..fan5 */
 218         -1, -1, -1,                     /* unused */
 219         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 220         12, -1 };                       /* intrusion0, intrusion1 */
 221
 222 #define FAN_ALARM_BASE          16
 223 #define TEMP_ALARM_BASE         24
 224 #define INTRUSION_ALARM_BASE    30
 225
 226 static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e };
 227
 228 /*
 229  * 0..14 voltages, 15 global beep enable, 16..23 fans, 24..29 temperatures,
 230  * 30..31 intrusion
 231  */
 232 static const s8 NCT6775_BEEP_BITS[] = {
 233         0, 1, 2, 3, 8, 9, 10, 16,       /* in0.. in7 */
 234         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 235         21,                             /* global beep enable */
 236         6, 7, 11, 28, -1,               /* fan1..fan5 */
 237         -1, -1, -1,                     /* unused */
 238         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 239         12, -1 };                       /* intrusion0, intrusion1 */
 240
 241 #define BEEP_ENABLE_BASE                15
 242
 243 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
 244 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
 245
 246 /* DC or PWM output fan configuration */
 247 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
 248 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
 249
 250 /* Advanced Fan control, some values are common for all fans */
 251
 252 static const u16 NCT6775_REG_TARGET[] = {
 253         0x101, 0x201, 0x301, 0x801, 0x901, 0xa01 };
 254 static const u16 NCT6775_REG_FAN_MODE[] = {
 255         0x102, 0x202, 0x302, 0x802, 0x902, 0xa02 };
 256 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
 257         0x103, 0x203, 0x303, 0x803, 0x903, 0xa03 };
 258 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
 259         0x104, 0x204, 0x304, 0x804, 0x904, 0xa04 };
 260 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
 261         0x105, 0x205, 0x305, 0x805, 0x905, 0xa05 };
 262 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = {
 263         0x106, 0x206, 0x306, 0x806, 0x906, 0xa06 };
 264 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
 265 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
 266
 267 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
 268         0x107, 0x207, 0x307, 0x807, 0x907, 0xa07 };
 269 static const u16 NCT6775_REG_PWM[] = {
 270         0x109, 0x209, 0x309, 0x809, 0x909, 0xa09 };
 271 static const u16 NCT6775_REG_PWM_READ[] = {
 272         0x01, 0x03, 0x11, 0x13, 0x15, 0xa09 };
 273
 274 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
 275 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
 276 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
 277 static const u16 NCT6775_FAN_PULSE_SHIFT[] = { 0, 0, 0, 0, 0, 0 };
 278
 279 static const u16 NCT6775_REG_TEMP[] = {
 280         0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
 281
 282 static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77 };
 283
 284 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 285         0, 0x152, 0x252, 0x628, 0x629, 0x62A };
 286 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 287         0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
 288 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 289         0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
 290
 291 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 292         0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
 293
 294 static const u16 NCT6775_REG_TEMP_SEL[] = {
 295         0x100, 0x200, 0x300, 0x800, 0x900, 0xa00 };
 296
 297 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
 298         0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 };
 299 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
 300         0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a };
 301 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
 302         0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b };
 303 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
 304         0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c };
 305 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
 306         0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d };
 307
 308 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
 309
 310 static const u16 NCT6775_REG_AUTO_TEMP[] = {
 311         0x121, 0x221, 0x321, 0x821, 0x921, 0xa21 };
 312 static const u16 NCT6775_REG_AUTO_PWM[] = {
 313         0x127, 0x227, 0x327, 0x827, 0x927, 0xa27 };
 314
 315 #define NCT6775_AUTO_TEMP(data, nr, p)  ((data)->REG_AUTO_TEMP[nr] + (p))
 316 #define NCT6775_AUTO_PWM(data, nr, p)   ((data)->REG_AUTO_PWM[nr] + (p))
 317
 318 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
 319
 320 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
 321         0x135, 0x235, 0x335, 0x835, 0x935, 0xa35 };
 322 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
 323         0x138, 0x238, 0x338, 0x838, 0x938, 0xa38 };
 324
 325 static const char *const nct6775_temp_label[] = {
 326         "",
 327         "SYSTIN",
 328         "CPUTIN",
 329         "AUXTIN",
 330         "AMD SB-TSI",
 331         "PECI Agent 0",
 332         "PECI Agent 1",
 333         "PECI Agent 2",
 334         "PECI Agent 3",
 335         "PECI Agent 4",
 336         "PECI Agent 5",
 337         "PECI Agent 6",
 338         "PECI Agent 7",
 339         "PCH_CHIP_CPU_MAX_TEMP",
 340         "PCH_CHIP_TEMP",
 341         "PCH_CPU_TEMP",
 342         "PCH_MCH_TEMP",
 343         "PCH_DIM0_TEMP",
 344         "PCH_DIM1_TEMP",
 345         "PCH_DIM2_TEMP",
 346         "PCH_DIM3_TEMP"
 347 };
 348
 349 static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
 350         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
 351
 352 static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
 353         = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
 354             0xa07 };
 355
 356 /* NCT6776 specific data */
 357
 358 static const s8 NCT6776_ALARM_BITS[] = {
 359         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 360         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 361         -1,                             /* unused */
 362         6, 7, 11, 10, 23,               /* fan1..fan5 */
 363         -1, -1, -1,                     /* unused */
 364         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 365         12, 9 };                        /* intrusion0, intrusion1 */
 366
 367 static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5 };
 368
 369 static const s8 NCT6776_BEEP_BITS[] = {
 370         0, 1, 2, 3, 4, 5, 6, 7,         /* in0.. in7 */
 371         8, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 372         24,                             /* global beep enable */
 373         25, 26, 27, 28, 29,             /* fan1..fan5 */
 374         -1, -1, -1,                     /* unused */
 375         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 376         30, 31 };                       /* intrusion0, intrusion1 */
 377
 378 static const u16 NCT6776_REG_TOLERANCE_H[] = {
 379         0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c };
 380
 381 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0 };
 382 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0 };
 383
 384 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
 385 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
 386
 387 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
 388         0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e };
 389
 390 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 391         0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
 392
 393 static const char *const nct6776_temp_label[] = {
 394         "",
 395         "SYSTIN",
 396         "CPUTIN",
 397         "AUXTIN",
 398         "SMBUSMASTER 0",
 399         "SMBUSMASTER 1",
 400         "SMBUSMASTER 2",
 401         "SMBUSMASTER 3",
 402         "SMBUSMASTER 4",
 403         "SMBUSMASTER 5",
 404         "SMBUSMASTER 6",
 405         "SMBUSMASTER 7",
 406         "PECI Agent 0",
 407         "PECI Agent 1",
 408         "PCH_CHIP_CPU_MAX_TEMP",
 409         "PCH_CHIP_TEMP",
 410         "PCH_CPU_TEMP",
 411         "PCH_MCH_TEMP",
 412         "PCH_DIM0_TEMP",
 413         "PCH_DIM1_TEMP",
 414         "PCH_DIM2_TEMP",
 415         "PCH_DIM3_TEMP",
 416         "BYTE_TEMP"
 417 };
 418
 419 static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
 420         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
 421
 422 static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
 423         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
 424
 425 /* NCT6779 specific data */
 426
 427 static const u16 NCT6779_REG_IN[] = {
 428         0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
 429         0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
 430
 431 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
 432         0x459, 0x45A, 0x45B, 0x568 };
 433
 434 static const s8 NCT6779_ALARM_BITS[] = {
 435         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 436         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 437         -1,                             /* unused */
 438         6, 7, 11, 10, 23,               /* fan1..fan5 */
 439         -1, -1, -1,                     /* unused */
 440         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 441         12, 9 };                        /* intrusion0, intrusion1 */
 442
 443 static const s8 NCT6779_BEEP_BITS[] = {
 444         0, 1, 2, 3, 4, 5, 6, 7,         /* in0.. in7 */
 445         8, 9, 10, 11, 12, 13, 14,       /* in8..in14 */
 446         24,                             /* global beep enable */
 447         25, 26, 27, 28, 29,             /* fan1..fan5 */
 448         -1, -1, -1,                     /* unused */
 449         16, 17, -1, -1, -1, -1,         /* temp1..temp6 */
 450         30, 31 };                       /* intrusion0, intrusion1 */
 451
 452 static const u16 NCT6779_REG_FAN[] = {
 453         0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8, 0x4ba };
 454 static const u16 NCT6779_REG_FAN_PULSES[] = {
 455         0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
 456
 457 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
 458         0x136, 0x236, 0x336, 0x836, 0x936, 0xa36 };
 459 #define NCT6779_CRITICAL_PWM_ENABLE_MASK        0x01
 460 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
 461         0x137, 0x237, 0x337, 0x837, 0x937, 0xa37 };
 462
 463 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
 464 static const u16 NCT6779_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b };
 465 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 466         0x18, 0x152 };
 467 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 468         0x3a, 0x153 };
 469 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 470         0x39, 0x155 };
 471
 472 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
 473         0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
 474
 475 static const char *const nct6779_temp_label[] = {
 476         "",
 477         "SYSTIN",
 478         "CPUTIN",
 479         "AUXTIN0",
 480         "AUXTIN1",
 481         "AUXTIN2",
 482         "AUXTIN3",
 483         "",
 484         "SMBUSMASTER 0",
 485         "SMBUSMASTER 1",
 486         "SMBUSMASTER 2",
 487         "SMBUSMASTER 3",
 488         "SMBUSMASTER 4",
 489         "SMBUSMASTER 5",
 490         "SMBUSMASTER 6",
 491         "SMBUSMASTER 7",
 492         "PECI Agent 0",
 493         "PECI Agent 1",
 494         "PCH_CHIP_CPU_MAX_TEMP",
 495         "PCH_CHIP_TEMP",
 496         "PCH_CPU_TEMP",
 497         "PCH_MCH_TEMP",
 498         "PCH_DIM0_TEMP",
 499         "PCH_DIM1_TEMP",
 500         "PCH_DIM2_TEMP",
 501         "PCH_DIM3_TEMP",
 502         "BYTE_TEMP"
 503 };
 504
 505 static const u16 NCT6779_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6779_temp_label) - 1]
 506         = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
 507             0, 0, 0, 0, 0, 0, 0, 0,
 508             0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
 509             0x408, 0 };
 510
 511 static const u16 NCT6779_REG_TEMP_CRIT[ARRAY_SIZE(nct6779_temp_label) - 1]
 512         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
 513
 514 /* NCT6791 specific data */
 515
 516 #define NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE     0x28
 517
 518 static const u16 NCT6791_REG_WEIGHT_TEMP_SEL[6] = { 0, 0x239 };
 519 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP[6] = { 0, 0x23a };
 520 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP_TOL[6] = { 0, 0x23b };
 521 static const u16 NCT6791_REG_WEIGHT_DUTY_STEP[6] = { 0, 0x23c };
 522 static const u16 NCT6791_REG_WEIGHT_TEMP_BASE[6] = { 0, 0x23d };
 523 static const u16 NCT6791_REG_WEIGHT_DUTY_BASE[6] = { 0, 0x23e };
 524
 525 static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = {
 526         0x459, 0x45A, 0x45B, 0x568, 0x45D };
 527
 528 static const s8 NCT6791_ALARM_BITS[] = {
 529         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 530         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 531         -1,                             /* unused */
 532         6, 7, 11, 10, 23, 33,           /* fan1..fan6 */
 533         -1, -1,                         /* unused */
 534         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 535         12, 9 };                        /* intrusion0, intrusion1 */
 536
 537 /* NCT6792 specific data */
 538
 539 static const u16 NCT6792_REG_TEMP_MON[] = {
 540         0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d };
 541 static const u16 NCT6792_REG_BEEP[NUM_REG_BEEP] = {
 542         0xb2, 0xb3, 0xb4, 0xb5, 0xbf };
 543
 544 /* NCT6102D/NCT6106D specific data */
 545
 546 #define NCT6106_REG_VBAT        0x318
 547 #define NCT6106_REG_DIODE       0x319
 548 #define NCT6106_DIODE_MASK      0x01
 549
 550 static const u16 NCT6106_REG_IN_MAX[] = {
 551         0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
 552 static const u16 NCT6106_REG_IN_MIN[] = {
 553         0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
 554 static const u16 NCT6106_REG_IN[] = {
 555         0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
 556
 557 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
 558 static const u16 NCT6106_REG_TEMP_MON[] = { 0x18, 0x19, 0x1a };
 559 static const u16 NCT6106_REG_TEMP_HYST[] = {
 560         0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
 561 static const u16 NCT6106_REG_TEMP_OVER[] = {
 562         0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
 563 static const u16 NCT6106_REG_TEMP_CRIT_L[] = {
 564         0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
 565 static const u16 NCT6106_REG_TEMP_CRIT_H[] = {
 566         0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
 567 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
 568 static const u16 NCT6106_REG_TEMP_CONFIG[] = {
 569         0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
 570
 571 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
 572 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
 573 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0, 0 };
 574 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4, 0, 0 };
 575
 576 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
 577 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
 578 static const u16 NCT6106_REG_PWM[] = { 0x119, 0x129, 0x139 };
 579 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c };
 580 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
 581 static const u16 NCT6106_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130 };
 582 static const u16 NCT6106_REG_TEMP_SOURCE[] = {
 583         0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
 584
 585 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
 586 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = {
 587         0x11b, 0x12b, 0x13b };
 588
 589 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
 590 #define NCT6106_CRITICAL_PWM_ENABLE_MASK        0x10
 591 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
 592
 593 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
 594 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
 595 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
 596 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
 597 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
 598 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
 599
 600 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
 601
 602 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
 603 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
 604 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
 605 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x17c };
 606 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
 607 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
 608
 609 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
 610 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
 611
 612 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = {
 613         0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
 614
 615 static const s8 NCT6106_ALARM_BITS[] = {
 616         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 617         9, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 618         -1,                             /* unused */
 619         32, 33, 34, -1, -1,             /* fan1..fan5 */
 620         -1, -1, -1,                     /* unused */
 621         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 622         48, -1                          /* intrusion0, intrusion1 */
 623 };
 624
 625 static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = {
 626         0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 };
 627
 628 static const s8 NCT6106_BEEP_BITS[] = {
 629         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 630         9, 10, 11, 12, -1, -1, -1,      /* in8..in14 */
 631         32,                             /* global beep enable */
 632         24, 25, 26, 27, 28,             /* fan1..fan5 */
 633         -1, -1, -1,                     /* unused */
 634         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 635         34, -1                          /* intrusion0, intrusion1 */
 636 };
 637
 638 static const u16 NCT6106_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
 639         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x51, 0x52, 0x54 };
 640
 641 static const u16 NCT6106_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
 642         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x204, 0x205 };
 643
 644 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
 645 {
 646         if (mode == 0 && pwm == 255)
 647                 return off;
 648         return mode + 1;
 649 }
 650
 651 static int pwm_enable_to_reg(enum pwm_enable mode)
 652 {
 653         if (mode == off)
 654                 return 0;
 655         return mode - 1;
 656 }
 657
 658 /*
 659  * Conversions
 660  */
 661
 662 /* 1 is DC mode, output in ms */
 663 static unsigned int step_time_from_reg(u8 reg, u8 mode)
 664 {
 665         return mode ? 400 * reg : 100 * reg;
 666 }
 667
 668 static u8 step_time_to_reg(unsigned int msec, u8 mode)
 669 {
 670         return clamp_val((mode ? (msec + 200) / 400 :
 671                                         (msec + 50) / 100), 1, 255);
 672 }
 673
 674 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
 675 {
 676         if (reg == 0 || reg == 255)
 677                 return 0;
 678         return 1350000U / (reg << divreg);
 679 }
 680
 681 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
 682 {
 683         if ((reg & 0xff1f) == 0xff1f)
 684                 return 0;
 685
 686         reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
 687
 688         if (reg == 0)
 689                 return 0;
 690
 691         return 1350000U / reg;
 692 }
 693
 694 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
 695 {
 696         if (reg == 0 || reg == 0xffff)
 697                 return 0;
 698
 699         /*
 700          * Even though the registers are 16 bit wide, the fan divisor
 701          * still applies.
 702          */
 703         return 1350000U / (reg << divreg);
 704 }
 705
 706 static u16 fan_to_reg(u32 fan, unsigned int divreg)
 707 {
 708         if (!fan)
 709                 return 0;
 710
 711         return (1350000U / fan) >> divreg;
 712 }
 713
 714 static inline unsigned int
 715 div_from_reg(u8 reg)
 716 {
 717         return 1 << reg;
 718 }
 719
 720 /*
 721  * Some of the voltage inputs have internal scaling, the tables below
 722  * contain 8 (the ADC LSB in mV) * scaling factor * 100
 723  */
 724 static const u16 scale_in[15] = {
 725         800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
 726         800, 800
 727 };
 728
 729 static inline long in_from_reg(u8 reg, u8 nr)
 730 {
 731         return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
 732 }
 733
 734 static inline u8 in_to_reg(u32 val, u8 nr)
 735 {
 736         return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
 737 }
 738
 739 /*
 740  * Data structures and manipulation thereof
 741  */
 742
 743 struct nct6775_data {
 744         int addr;       /* IO base of hw monitor block */
 745         int sioreg;     /* SIO register address */
 746         enum kinds kind;
 747         const char *name;
 748
 749 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
 750         struct device *hwmon_dev;
 751 #endif
 752
 753         const struct attribute_group *groups[6];
 754
 755         u16 reg_temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 756                                     * 3=temp_crit, 4=temp_lcrit
 757                                     */
 758         u8 temp_src[NUM_TEMP];
 759         u16 reg_temp_config[NUM_TEMP];
 760         const char * const *temp_label;
 761         int temp_label_num;
 762
 763         u16 REG_CONFIG;
 764         u16 REG_VBAT;
 765         u16 REG_DIODE;
 766         u8 DIODE_MASK;
 767
 768         const s8 *ALARM_BITS;
 769         const s8 *BEEP_BITS;
 770
 771         const u16 *REG_VIN;
 772         const u16 *REG_IN_MINMAX[2];
 773
 774         const u16 *REG_TARGET;
 775         const u16 *REG_FAN;
 776         const u16 *REG_FAN_MODE;
 777         const u16 *REG_FAN_MIN;
 778         const u16 *REG_FAN_PULSES;
 779         const u16 *FAN_PULSE_SHIFT;
 780         const u16 *REG_FAN_TIME[3];
 781
 782         const u16 *REG_TOLERANCE_H;
 783
 784         const u8 *REG_PWM_MODE;
 785         const u8 *PWM_MODE_MASK;
 786
 787         const u16 *REG_PWM[7];  /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 788                                  * [3]=pwm_max, [4]=pwm_step,
 789                                  * [5]=weight_duty_step, [6]=weight_duty_base
 790                                  */
 791         const u16 *REG_PWM_READ;
 792
 793         const u16 *REG_CRITICAL_PWM_ENABLE;
 794         u8 CRITICAL_PWM_ENABLE_MASK;
 795         const u16 *REG_CRITICAL_PWM;
 796
 797         const u16 *REG_AUTO_TEMP;
 798         const u16 *REG_AUTO_PWM;
 799
 800         const u16 *REG_CRITICAL_TEMP;
 801         const u16 *REG_CRITICAL_TEMP_TOLERANCE;
 802
 803         const u16 *REG_TEMP_SOURCE;     /* temp register sources */
 804         const u16 *REG_TEMP_SEL;
 805         const u16 *REG_WEIGHT_TEMP_SEL;
 806         const u16 *REG_WEIGHT_TEMP[3];  /* 0=base, 1=tolerance, 2=step */
 807
 808         const u16 *REG_TEMP_OFFSET;
 809
 810         const u16 *REG_ALARM;
 811         const u16 *REG_BEEP;
 812
 813         unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
 814         unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
 815
 816         struct mutex update_lock;
 817         bool valid;             /* true if following fields are valid */
 818         unsigned long last_updated;     /* In jiffies */
 819
 820         /* Register values */
 821         u8 bank;                /* current register bank */
 822         u8 in_num;              /* number of in inputs we have */
 823         u8 in[15][3];           /* [0]=in, [1]=in_max, [2]=in_min */
 824         unsigned int rpm[NUM_FAN];
 825         u16 fan_min[NUM_FAN];
 826         u8 fan_pulses[NUM_FAN];
 827         u8 fan_div[NUM_FAN];
 828         u8 has_pwm;
 829         u8 has_fan;             /* some fan inputs can be disabled */
 830         u8 has_fan_min;         /* some fans don't have min register */
 831         bool has_fan_div;
 832
 833         u8 num_temp_alarms;     /* 2, 3, or 6 */
 834         u8 num_temp_beeps;      /* 2, 3, or 6 */
 835         u8 temp_fixed_num;      /* 3 or 6 */
 836         u8 temp_type[NUM_TEMP_FIXED];
 837         s8 temp_offset[NUM_TEMP_FIXED];
 838         s16 temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 839                                 * 3=temp_crit, 4=temp_lcrit */
 840         u64 alarms;
 841         u64 beeps;
 842
 843         u8 pwm_num;     /* number of pwm */
 844         u8 pwm_mode[NUM_FAN];   /* 1->DC variable voltage,
 845                                  * 0->PWM variable duty cycle
 846                                  */
 847         enum pwm_enable pwm_enable[NUM_FAN];
 848                         /* 0->off
 849                          * 1->manual
 850                          * 2->thermal cruise mode (also called SmartFan I)
 851                          * 3->fan speed cruise mode
 852                          * 4->SmartFan III
 853                          * 5->enhanced variable thermal cruise (SmartFan IV)
 854                          */
 855         u8 pwm[7][NUM_FAN];     /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 856                                  * [3]=pwm_max, [4]=pwm_step,
 857                                  * [5]=weight_duty_step, [6]=weight_duty_base
 858                                  */
 859
 860         u8 target_temp[NUM_FAN];
 861         u8 target_temp_mask;
 862         u32 target_speed[NUM_FAN];
 863         u32 target_speed_tolerance[NUM_FAN];
 864         u8 speed_tolerance_limit;
 865
 866         u8 temp_tolerance[2][NUM_FAN];
 867         u8 tolerance_mask;
 868
 869         u8 fan_time[3][NUM_FAN]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
 870
 871         /* Automatic fan speed control registers */
 872         int auto_pwm_num;
 873         u8 auto_pwm[NUM_FAN][7];
 874         u8 auto_temp[NUM_FAN][7];
 875         u8 pwm_temp_sel[NUM_FAN];
 876         u8 pwm_weight_temp_sel[NUM_FAN];
 877         u8 weight_temp[3][NUM_FAN];     /* 0->temp_step, 1->temp_step_tol,
 878                                          * 2->temp_base
 879                                          */
 880
 881         u8 vid;
 882         u8 vrm;
 883
 884         bool have_vid;
 885
 886         u16 have_temp;
 887         u16 have_temp_fixed;
 888         u16 have_in;
 889
 890         /* Remember extra register values over suspend/resume */
 891         u8 vbat;
 892         u8 fandiv1;
 893         u8 fandiv2;
 894         u8 sio_reg_enable;
 895 };
 896
 897 struct nct6775_sio_data {
 898         int sioreg;
 899         enum kinds kind;
 900 };
 901
 902 struct sensor_device_template {
 903         struct device_attribute dev_attr;
 904         union {
 905                 struct {
 906                         u8 nr;
 907                         u8 index;
 908                 } s;
 909                 int index;
 910         } u;
 911         bool s2;        /* true if both index and nr are used */
 912 };
 913
 914 struct sensor_device_attr_u {
 915         union {
 916                 struct sensor_device_attribute a1;
 917                 struct sensor_device_attribute_2 a2;
 918         } u;
 919         char name[32];
 920 };
 921
 922 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) {      \
 923         .attr = {.name = _template, .mode = _mode },            \
 924         .show   = _show,                                        \
 925         .store  = _store,                                       \
 926 }
 927
 928 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \
 929         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
 930           .u.index = _index,                                            \
 931           .s2 = false }
 932
 933 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,       \
 934                                  _nr, _index)                           \
 935         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
 936           .u.s.index = _index,                                          \
 937           .u.s.nr = _nr,                                                \
 938           .s2 = true }
 939
 940 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
 941 static struct sensor_device_template sensor_dev_template_##_name        \
 942         = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store,       \
 943                                  _index)
 944
 945 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store,       \
 946                           _nr, _index)                                  \
 947 static struct sensor_device_template sensor_dev_template_##_name        \
 948         = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,     \
 949                                  _nr, _index)
 950
 951 struct sensor_template_group {
 952         struct sensor_device_template **templates;
 953         umode_t (*is_visible)(struct kobject *, struct attribute *, int);
 954         int base;
 955 };
 956
 957 static struct attribute_group *
 958 nct6775_create_attr_group(struct device *dev, struct sensor_template_group *tg,
 959                           int repeat)
 960 {
 961         struct attribute_group *group;
 962         struct sensor_device_attr_u *su;
 963         struct sensor_device_attribute *a;
 964         struct sensor_device_attribute_2 *a2;
 965         struct attribute **attrs;
 966         struct sensor_device_template **t;
 967         int i, count;
 968
 969         if (repeat <= 0)
 970                 return ERR_PTR(-EINVAL);
 971
 972         t = tg->templates;
 973         for (count = 0; *t; t++, count++)
 974                 ;
 975
 976         if (count == 0)
 977                 return ERR_PTR(-EINVAL);
 978
 979         group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
 980         if (group == NULL)
 981                 return ERR_PTR(-ENOMEM);
 982
 983         attrs = devm_kzalloc(dev, sizeof(*attrs) * (repeat * count + 1),
 984                              GFP_KERNEL);
 985         if (attrs == NULL)
 986                 return ERR_PTR(-ENOMEM);
 987
 988         su = devm_kzalloc(dev, sizeof(*su) * repeat * count,
 989                                GFP_KERNEL);
 990         if (su == NULL)
 991                 return ERR_PTR(-ENOMEM);
 992
 993         group->attrs = attrs;
 994         group->is_visible = tg->is_visible;
 995
 996         for (i = 0; i < repeat; i++) {
 997                 t = tg->templates;
 998                 while (*t != NULL) {
 999                         snprintf(su->name, sizeof(su->name),
1000                                  (*t)->dev_attr.attr.name, tg->base + i);
1001                         if ((*t)->s2) {
1002                                 a2 = &su->u.a2;
1003                                 a2->dev_attr.attr.name = su->name;
1004                                 a2->nr = (*t)->u.s.nr + i;
1005                                 a2->index = (*t)->u.s.index;
1006                                 a2->dev_attr.attr.mode =
1007                                   (*t)->dev_attr.attr.mode;
1008                                 a2->dev_attr.show = (*t)->dev_attr.show;
1009                                 a2->dev_attr.store = (*t)->dev_attr.store;
1010                                 *attrs = &a2->dev_attr.attr;
1011                         } else {
1012                                 a = &su->u.a1;
1013                                 a->dev_attr.attr.name = su->name;
1014                                 a->index = (*t)->u.index + i;
1015                                 a->dev_attr.attr.mode =
1016                                   (*t)->dev_attr.attr.mode;
1017                                 a->dev_attr.show = (*t)->dev_attr.show;
1018                                 a->dev_attr.store = (*t)->dev_attr.store;
1019                                 *attrs = &a->dev_attr.attr;
1020                         }
1021                         attrs++;
1022                         su++;
1023                         t++;
1024                 }
1025         }
1026
1027         return group;
1028 }
1029
1030 static bool is_word_sized(struct nct6775_data *data, u16 reg)
1031 {
1032         switch (data->kind) {
1033         case nct6106:
1034                 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1035                   reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
1036                   reg == 0x111 || reg == 0x121 || reg == 0x131;
1037         case nct6775:
1038                 return (((reg & 0xff00) == 0x100 ||
1039                     (reg & 0xff00) == 0x200) &&
1040                    ((reg & 0x00ff) == 0x50 ||
1041                     (reg & 0x00ff) == 0x53 ||
1042                     (reg & 0x00ff) == 0x55)) ||
1043                   (reg & 0xfff0) == 0x630 ||
1044                   reg == 0x640 || reg == 0x642 ||
1045                   reg == 0x662 ||
1046                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1047                   reg == 0x73 || reg == 0x75 || reg == 0x77;
1048         case nct6776:
1049                 return (((reg & 0xff00) == 0x100 ||
1050                     (reg & 0xff00) == 0x200) &&
1051                    ((reg & 0x00ff) == 0x50 ||
1052                     (reg & 0x00ff) == 0x53 ||
1053                     (reg & 0x00ff) == 0x55)) ||
1054                   (reg & 0xfff0) == 0x630 ||
1055                   reg == 0x402 ||
1056                   reg == 0x640 || reg == 0x642 ||
1057                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1058                   reg == 0x73 || reg == 0x75 || reg == 0x77;
1059         case nct6779:
1060         case nct6791:
1061         case nct6792:
1062                 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
1063                   ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x0b) ||
1064                   reg == 0x402 ||
1065                   reg == 0x63a || reg == 0x63c || reg == 0x63e ||
1066                   reg == 0x640 || reg == 0x642 ||
1067                   reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
1068                   reg == 0x7b || reg == 0x7d;
1069         }
1070         return false;
1071 }
1072
1073 /*
1074  * On older chips, only registers 0x50-0x5f are banked.
1075  * On more recent chips, all registers are banked.
1076  * Assume that is the case and set the bank number for each access.
1077  * Cache the bank number so it only needs to be set if it changes.
1078  */
1079 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
1080 {
1081         u8 bank = reg >> 8;
1082
1083         if (data->bank != bank) {
1084                 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
1085                 outb_p(bank, data->addr + DATA_REG_OFFSET);
1086                 data->bank = bank;
1087         }
1088 }
1089
1090 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
1091 {
1092         int res, word_sized = is_word_sized(data, reg);
1093
1094         nct6775_set_bank(data, reg);
1095         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1096         res = inb_p(data->addr + DATA_REG_OFFSET);
1097         if (word_sized) {
1098                 outb_p((reg & 0xff) + 1,
1099                        data->addr + ADDR_REG_OFFSET);
1100                 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
1101         }
1102         return res;
1103 }
1104
1105 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
1106 {
1107         int word_sized = is_word_sized(data, reg);
1108
1109         nct6775_set_bank(data, reg);
1110         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1111         if (word_sized) {
1112                 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
1113                 outb_p((reg & 0xff) + 1,
1114                        data->addr + ADDR_REG_OFFSET);
1115         }
1116         outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
1117         return 0;
1118 }
1119
1120 /* We left-align 8-bit temperature values to make the code simpler */
1121 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
1122 {
1123         u16 res;
1124
1125         res = nct6775_read_value(data, reg);
1126         if (!is_word_sized(data, reg))
1127                 res <<= 8;
1128
1129         return res;
1130 }
1131
1132 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
1133 {
1134         if (!is_word_sized(data, reg))
1135                 value >>= 8;
1136         return nct6775_write_value(data, reg, value);
1137 }
1138
1139 /* This function assumes that the caller holds data->update_lock */
1140 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
1141 {
1142         u8 reg;
1143
1144         switch (nr) {
1145         case 0:
1146                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
1147                     | (data->fan_div[0] & 0x7);
1148                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1149                 break;
1150         case 1:
1151                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
1152                     | ((data->fan_div[1] << 4) & 0x70);
1153                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1154                 break;
1155         case 2:
1156                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
1157                     | (data->fan_div[2] & 0x7);
1158                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1159                 break;
1160         case 3:
1161                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
1162                     | ((data->fan_div[3] << 4) & 0x70);
1163                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1164                 break;
1165         }
1166 }
1167
1168 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
1169 {
1170         if (data->kind == nct6775)
1171                 nct6775_write_fan_div(data, nr);
1172 }
1173
1174 static void nct6775_update_fan_div(struct nct6775_data *data)
1175 {
1176         u8 i;
1177
1178         i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
1179         data->fan_div[0] = i & 0x7;
1180         data->fan_div[1] = (i & 0x70) >> 4;
1181         i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
1182         data->fan_div[2] = i & 0x7;
1183         if (data->has_fan & (1 << 3))
1184                 data->fan_div[3] = (i & 0x70) >> 4;
1185 }
1186
1187 static void nct6775_update_fan_div_common(struct nct6775_data *data)
1188 {
1189         if (data->kind == nct6775)
1190                 nct6775_update_fan_div(data);
1191 }
1192
1193 static void nct6775_init_fan_div(struct nct6775_data *data)
1194 {
1195         int i;
1196
1197         nct6775_update_fan_div_common(data);
1198         /*
1199          * For all fans, start with highest divider value if the divider
1200          * register is not initialized. This ensures that we get a
1201          * reading from the fan count register, even if it is not optimal.
1202          * We'll compute a better divider later on.
1203          */
1204         for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
1205                 if (!(data->has_fan & (1 << i)))
1206                         continue;
1207                 if (data->fan_div[i] == 0) {
1208                         data->fan_div[i] = 7;
1209                         nct6775_write_fan_div_common(data, i);
1210                 }
1211         }
1212 }
1213
1214 static void nct6775_init_fan_common(struct device *dev,
1215                                     struct nct6775_data *data)
1216 {
1217         int i;
1218         u8 reg;
1219
1220         if (data->has_fan_div)
1221                 nct6775_init_fan_div(data);
1222
1223         /*
1224          * If fan_min is not set (0), set it to 0xff to disable it. This
1225          * prevents the unnecessary warning when fanX_min is reported as 0.
1226          */
1227         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1228                 if (data->has_fan_min & (1 << i)) {
1229                         reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
1230                         if (!reg)
1231                                 nct6775_write_value(data, data->REG_FAN_MIN[i],
1232                                                     data->has_fan_div ? 0xff
1233                                                                       : 0xff1f);
1234                 }
1235         }
1236 }
1237
1238 static void nct6775_select_fan_div(struct device *dev,
1239                                    struct nct6775_data *data, int nr, u16 reg)
1240 {
1241         u8 fan_div = data->fan_div[nr];
1242         u16 fan_min;
1243
1244         if (!data->has_fan_div)
1245                 return;
1246
1247         /*
1248          * If we failed to measure the fan speed, or the reported value is not
1249          * in the optimal range, and the clock divider can be modified,
1250          * let's try that for next time.
1251          */
1252         if (reg == 0x00 && fan_div < 0x07)
1253                 fan_div++;
1254         else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1255                 fan_div--;
1256
1257         if (fan_div != data->fan_div[nr]) {
1258                 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1259                         nr + 1, div_from_reg(data->fan_div[nr]),
1260                         div_from_reg(fan_div));
1261
1262                 /* Preserve min limit if possible */
1263                 if (data->has_fan_min & (1 << nr)) {
1264                         fan_min = data->fan_min[nr];
1265                         if (fan_div > data->fan_div[nr]) {
1266                                 if (fan_min != 255 && fan_min > 1)
1267                                         fan_min >>= 1;
1268                         } else {
1269                                 if (fan_min != 255) {
1270                                         fan_min <<= 1;
1271                                         if (fan_min > 254)
1272                                                 fan_min = 254;
1273                                 }
1274                         }
1275                         if (fan_min != data->fan_min[nr]) {
1276                                 data->fan_min[nr] = fan_min;
1277                                 nct6775_write_value(data, data->REG_FAN_MIN[nr],
1278                                                     fan_min);
1279                         }
1280                 }
1281                 data->fan_div[nr] = fan_div;
1282                 nct6775_write_fan_div_common(data, nr);
1283         }
1284 }
1285
1286 static void nct6775_update_pwm(struct device *dev)
1287 {
1288         struct nct6775_data *data = dev_get_drvdata(dev);
1289         int i, j;
1290         int fanmodecfg, reg;
1291         bool duty_is_dc;
1292
1293         for (i = 0; i < data->pwm_num; i++) {
1294                 if (!(data->has_pwm & (1 << i)))
1295                         continue;
1296
1297                 duty_is_dc = data->REG_PWM_MODE[i] &&
1298                   (nct6775_read_value(data, data->REG_PWM_MODE[i])
1299                    & data->PWM_MODE_MASK[i]);
1300                 data->pwm_mode[i] = duty_is_dc;
1301
1302                 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
1303                 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1304                         if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1305                                 data->pwm[j][i]
1306                                   = nct6775_read_value(data,
1307                                                        data->REG_PWM[j][i]);
1308                         }
1309                 }
1310
1311                 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1312                                                         (fanmodecfg >> 4) & 7);
1313
1314                 if (!data->temp_tolerance[0][i] ||
1315                     data->pwm_enable[i] != speed_cruise)
1316                         data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1317                 if (!data->target_speed_tolerance[i] ||
1318                     data->pwm_enable[i] == speed_cruise) {
1319                         u8 t = fanmodecfg & 0x0f;
1320
1321                         if (data->REG_TOLERANCE_H) {
1322                                 t |= (nct6775_read_value(data,
1323                                       data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
1324                         }
1325                         data->target_speed_tolerance[i] = t;
1326                 }
1327
1328                 data->temp_tolerance[1][i] =
1329                         nct6775_read_value(data,
1330                                         data->REG_CRITICAL_TEMP_TOLERANCE[i]);
1331
1332                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
1333                 data->pwm_temp_sel[i] = reg & 0x1f;
1334                 /* If fan can stop, report floor as 0 */
1335                 if (reg & 0x80)
1336                         data->pwm[2][i] = 0;
1337
1338                 if (!data->REG_WEIGHT_TEMP_SEL[i])
1339                         continue;
1340
1341                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
1342                 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1343                 /* If weight is disabled, report weight source as 0 */
1344                 if (j == 1 && !(reg & 0x80))
1345                         data->pwm_weight_temp_sel[i] = 0;
1346
1347                 /* Weight temp data */
1348                 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
1349                         data->weight_temp[j][i]
1350                           = nct6775_read_value(data,
1351                                                data->REG_WEIGHT_TEMP[j][i]);
1352                 }
1353         }
1354 }
1355
1356 static void nct6775_update_pwm_limits(struct device *dev)
1357 {
1358         struct nct6775_data *data = dev_get_drvdata(dev);
1359         int i, j;
1360         u8 reg;
1361         u16 reg_t;
1362
1363         for (i = 0; i < data->pwm_num; i++) {
1364                 if (!(data->has_pwm & (1 << i)))
1365                         continue;
1366
1367                 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1368                         data->fan_time[j][i] =
1369                           nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1370                 }
1371
1372                 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1373                 /* Update only in matching mode or if never updated */
1374                 if (!data->target_temp[i] ||
1375                     data->pwm_enable[i] == thermal_cruise)
1376                         data->target_temp[i] = reg_t & data->target_temp_mask;
1377                 if (!data->target_speed[i] ||
1378                     data->pwm_enable[i] == speed_cruise) {
1379                         if (data->REG_TOLERANCE_H) {
1380                                 reg_t |= (nct6775_read_value(data,
1381                                         data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1382                         }
1383                         data->target_speed[i] = reg_t;
1384                 }
1385
1386                 for (j = 0; j < data->auto_pwm_num; j++) {
1387                         data->auto_pwm[i][j] =
1388                           nct6775_read_value(data,
1389                                              NCT6775_AUTO_PWM(data, i, j));
1390                         data->auto_temp[i][j] =
1391                           nct6775_read_value(data,
1392                                              NCT6775_AUTO_TEMP(data, i, j));
1393                 }
1394
1395                 /* critical auto_pwm temperature data */
1396                 data->auto_temp[i][data->auto_pwm_num] =
1397                         nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1398
1399                 switch (data->kind) {
1400                 case nct6775:
1401                         reg = nct6775_read_value(data,
1402                                                  NCT6775_REG_CRITICAL_ENAB[i]);
1403                         data->auto_pwm[i][data->auto_pwm_num] =
1404                                                 (reg & 0x02) ? 0xff : 0x00;
1405                         break;
1406                 case nct6776:
1407                         data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1408                         break;
1409                 case nct6106:
1410                 case nct6779:
1411                 case nct6791:
1412                 case nct6792:
1413                         reg = nct6775_read_value(data,
1414                                         data->REG_CRITICAL_PWM_ENABLE[i]);
1415                         if (reg & data->CRITICAL_PWM_ENABLE_MASK)
1416                                 reg = nct6775_read_value(data,
1417                                         data->REG_CRITICAL_PWM[i]);
1418                         else
1419                                 reg = 0xff;
1420                         data->auto_pwm[i][data->auto_pwm_num] = reg;
1421                         break;
1422                 }
1423         }
1424 }
1425
1426 static struct nct6775_data *nct6775_update_device(struct device *dev)
1427 {
1428         struct nct6775_data *data = dev_get_drvdata(dev);
1429         int i, j;
1430
1431         mutex_lock(&data->update_lock);
1432
1433         if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1434             || !data->valid) {
1435                 /* Fan clock dividers */
1436                 nct6775_update_fan_div_common(data);
1437
1438                 /* Measured voltages and limits */
1439                 for (i = 0; i < data->in_num; i++) {
1440                         if (!(data->have_in & (1 << i)))
1441                                 continue;
1442
1443                         data->in[i][0] = nct6775_read_value(data,
1444                                                             data->REG_VIN[i]);
1445                         data->in[i][1] = nct6775_read_value(data,
1446                                           data->REG_IN_MINMAX[0][i]);
1447                         data->in[i][2] = nct6775_read_value(data,
1448                                           data->REG_IN_MINMAX[1][i]);
1449                 }
1450
1451                 /* Measured fan speeds and limits */
1452                 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
1453                         u16 reg;
1454
1455                         if (!(data->has_fan & (1 << i)))
1456                                 continue;
1457
1458                         reg = nct6775_read_value(data, data->REG_FAN[i]);
1459                         data->rpm[i] = data->fan_from_reg(reg,
1460                                                           data->fan_div[i]);
1461
1462                         if (data->has_fan_min & (1 << i))
1463                                 data->fan_min[i] = nct6775_read_value(data,
1464                                            data->REG_FAN_MIN[i]);
1465                         data->fan_pulses[i] =
1466                           (nct6775_read_value(data, data->REG_FAN_PULSES[i])
1467                                 >> data->FAN_PULSE_SHIFT[i]) & 0x03;
1468
1469                         nct6775_select_fan_div(dev, data, i, reg);
1470                 }
1471
1472                 nct6775_update_pwm(dev);
1473                 nct6775_update_pwm_limits(dev);
1474
1475                 /* Measured temperatures and limits */
1476                 for (i = 0; i < NUM_TEMP; i++) {
1477                         if (!(data->have_temp & (1 << i)))
1478                                 continue;
1479                         for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1480                                 if (data->reg_temp[j][i])
1481                                         data->temp[j][i]
1482                                           = nct6775_read_temp(data,
1483                                                 data->reg_temp[j][i]);
1484                         }
1485                         if (i >= NUM_TEMP_FIXED ||
1486                             !(data->have_temp_fixed & (1 << i)))
1487                                 continue;
1488                         data->temp_offset[i]
1489                           = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1490                 }
1491
1492                 data->alarms = 0;
1493                 for (i = 0; i < NUM_REG_ALARM; i++) {
1494                         u8 alarm;
1495
1496                         if (!data->REG_ALARM[i])
1497                                 continue;
1498                         alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1499                         data->alarms |= ((u64)alarm) << (i << 3);
1500                 }
1501
1502                 data->beeps = 0;
1503                 for (i = 0; i < NUM_REG_BEEP; i++) {
1504                         u8 beep;
1505
1506                         if (!data->REG_BEEP[i])
1507                                 continue;
1508                         beep = nct6775_read_value(data, data->REG_BEEP[i]);
1509                         data->beeps |= ((u64)beep) << (i << 3);
1510                 }
1511
1512                 data->last_updated = jiffies;
1513                 data->valid = true;
1514         }
1515
1516         mutex_unlock(&data->update_lock);
1517         return data;
1518 }
1519
1520 /*
1521  * Sysfs callback functions
1522  */
1523 static ssize_t
1524 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1525 {
1526         struct nct6775_data *data = nct6775_update_device(dev);
1527         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1528         int index = sattr->index;
1529         int nr = sattr->nr;
1530
1531         return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1532 }
1533
1534 static ssize_t
1535 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1536              size_t count)
1537 {
1538         struct nct6775_data *data = dev_get_drvdata(dev);
1539         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1540         int index = sattr->index;
1541         int nr = sattr->nr;
1542         unsigned long val;
1543         int err;
1544
1545         err = kstrtoul(buf, 10, &val);
1546         if (err < 0)
1547                 return err;
1548         mutex_lock(&data->update_lock);
1549         data->in[nr][index] = in_to_reg(val, nr);
1550         nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr],
1551                             data->in[nr][index]);
1552         mutex_unlock(&data->update_lock);
1553         return count;
1554 }
1555
1556 static ssize_t
1557 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1558 {
1559         struct nct6775_data *data = nct6775_update_device(dev);
1560         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1561         int nr = data->ALARM_BITS[sattr->index];
1562
1563         return sprintf(buf, "%u\n",
1564                        (unsigned int)((data->alarms >> nr) & 0x01));
1565 }
1566
1567 static int find_temp_source(struct nct6775_data *data, int index, int count)
1568 {
1569         int source = data->temp_src[index];
1570         int nr;
1571
1572         for (nr = 0; nr < count; nr++) {
1573                 int src;
1574
1575                 src = nct6775_read_value(data,
1576                                          data->REG_TEMP_SOURCE[nr]) & 0x1f;
1577                 if (src == source)
1578                         return nr;
1579         }
1580         return -ENODEV;
1581 }
1582
1583 static ssize_t
1584 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1585 {
1586         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1587         struct nct6775_data *data = nct6775_update_device(dev);
1588         unsigned int alarm = 0;
1589         int nr;
1590
1591         /*
1592          * For temperatures, there is no fixed mapping from registers to alarm
1593          * bits. Alarm bits are determined by the temperature source mapping.
1594          */
1595         nr = find_temp_source(data, sattr->index, data->num_temp_alarms);
1596         if (nr >= 0) {
1597                 int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE];
1598
1599                 alarm = (data->alarms >> bit) & 0x01;
1600         }
1601         return sprintf(buf, "%u\n", alarm);
1602 }
1603
1604 static ssize_t
1605 show_beep(struct device *dev, struct device_attribute *attr, char *buf)
1606 {
1607         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1608         struct nct6775_data *data = nct6775_update_device(dev);
1609         int nr = data->BEEP_BITS[sattr->index];
1610
1611         return sprintf(buf, "%u\n",
1612                        (unsigned int)((data->beeps >> nr) & 0x01));
1613 }
1614
1615 static ssize_t
1616 store_beep(struct device *dev, struct device_attribute *attr, const char *buf,
1617            size_t count)
1618 {
1619         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1620         struct nct6775_data *data = dev_get_drvdata(dev);
1621         int nr = data->BEEP_BITS[sattr->index];
1622         int regindex = nr >> 3;
1623         unsigned long val;
1624         int err;
1625
1626         err = kstrtoul(buf, 10, &val);
1627         if (err < 0)
1628                 return err;
1629         if (val > 1)
1630                 return -EINVAL;
1631
1632         mutex_lock(&data->update_lock);
1633         if (val)
1634                 data->beeps |= (1ULL << nr);
1635         else
1636                 data->beeps &= ~(1ULL << nr);
1637         nct6775_write_value(data, data->REG_BEEP[regindex],
1638                             (data->beeps >> (regindex << 3)) & 0xff);
1639         mutex_unlock(&data->update_lock);
1640         return count;
1641 }
1642
1643 static ssize_t
1644 show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf)
1645 {
1646         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1647         struct nct6775_data *data = nct6775_update_device(dev);
1648         unsigned int beep = 0;
1649         int nr;
1650
1651         /*
1652          * For temperatures, there is no fixed mapping from registers to beep
1653          * enable bits. Beep enable bits are determined by the temperature
1654          * source mapping.
1655          */
1656         nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1657         if (nr >= 0) {
1658                 int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1659
1660                 beep = (data->beeps >> bit) & 0x01;
1661         }
1662         return sprintf(buf, "%u\n", beep);
1663 }
1664
1665 static ssize_t
1666 store_temp_beep(struct device *dev, struct device_attribute *attr,
1667                 const char *buf, size_t count)
1668 {
1669         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1670         struct nct6775_data *data = dev_get_drvdata(dev);
1671         int nr, bit, regindex;
1672         unsigned long val;
1673         int err;
1674
1675         err = kstrtoul(buf, 10, &val);
1676         if (err < 0)
1677                 return err;
1678         if (val > 1)
1679                 return -EINVAL;
1680
1681         nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1682         if (nr < 0)
1683                 return nr;
1684
1685         bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1686         regindex = bit >> 3;
1687
1688         mutex_lock(&data->update_lock);
1689         if (val)
1690                 data->beeps |= (1ULL << bit);
1691         else
1692                 data->beeps &= ~(1ULL << bit);
1693         nct6775_write_value(data, data->REG_BEEP[regindex],
1694                             (data->beeps >> (regindex << 3)) & 0xff);
1695         mutex_unlock(&data->update_lock);
1696
1697         return count;
1698 }
1699
1700 static umode_t nct6775_in_is_visible(struct kobject *kobj,
1701                                      struct attribute *attr, int index)
1702 {
1703         struct device *dev = container_of(kobj, struct device, kobj);
1704         struct nct6775_data *data = dev_get_drvdata(dev);
1705         int in = index / 5;     /* voltage index */
1706
1707         if (!(data->have_in & (1 << in)))
1708                 return 0;
1709
1710         return attr->mode;
1711 }
1712
1713 SENSOR_TEMPLATE_2(in_input, "in%d_input", S_IRUGO, show_in_reg, NULL, 0, 0);
1714 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", S_IRUGO, show_alarm, NULL, 0);
1715 SENSOR_TEMPLATE(in_beep, "in%d_beep", S_IWUSR | S_IRUGO, show_beep, store_beep,
1716                 0);
1717 SENSOR_TEMPLATE_2(in_min, "in%d_min", S_IWUSR | S_IRUGO, show_in_reg,
1718                   store_in_reg, 0, 1);
1719 SENSOR_TEMPLATE_2(in_max, "in%d_max", S_IWUSR | S_IRUGO, show_in_reg,
1720                   store_in_reg, 0, 2);
1721
1722 /*
1723  * nct6775_in_is_visible uses the index into the following array
1724  * to determine if attributes should be created or not.
1725  * Any change in order or content must be matched.
1726  */
1727 static struct sensor_device_template *nct6775_attributes_in_template[] = {
1728         &sensor_dev_template_in_input,
1729         &sensor_dev_template_in_alarm,
1730         &sensor_dev_template_in_beep,
1731         &sensor_dev_template_in_min,
1732         &sensor_dev_template_in_max,
1733         NULL
1734 };
1735
1736 static struct sensor_template_group nct6775_in_template_group = {
1737         .templates = nct6775_attributes_in_template,
1738         .is_visible = nct6775_in_is_visible,
1739 };
1740
1741 static ssize_t
1742 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1743 {
1744         struct nct6775_data *data = nct6775_update_device(dev);
1745         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1746         int nr = sattr->index;
1747
1748         return sprintf(buf, "%d\n", data->rpm[nr]);
1749 }
1750
1751 static ssize_t
1752 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1753 {
1754         struct nct6775_data *data = nct6775_update_device(dev);
1755         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1756         int nr = sattr->index;
1757
1758         return sprintf(buf, "%d\n",
1759                        data->fan_from_reg_min(data->fan_min[nr],
1760                                               data->fan_div[nr]));
1761 }
1762
1763 static ssize_t
1764 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1765 {
1766         struct nct6775_data *data = nct6775_update_device(dev);
1767         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1768         int nr = sattr->index;
1769
1770         return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1771 }
1772
1773 static ssize_t
1774 store_fan_min(struct device *dev, struct device_attribute *attr,
1775               const char *buf, size_t count)
1776 {
1777         struct nct6775_data *data = dev_get_drvdata(dev);
1778         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1779         int nr = sattr->index;
1780         unsigned long val;
1781         unsigned int reg;
1782         u8 new_div;
1783         int err;
1784
1785         err = kstrtoul(buf, 10, &val);
1786         if (err < 0)
1787                 return err;
1788
1789         mutex_lock(&data->update_lock);
1790         if (!data->has_fan_div) {
1791                 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1792                 if (!val) {
1793                         val = 0xff1f;
1794                 } else {
1795                         if (val > 1350000U)
1796                                 val = 135000U;
1797                         val = 1350000U / val;
1798                         val = (val & 0x1f) | ((val << 3) & 0xff00);
1799                 }
1800                 data->fan_min[nr] = val;
1801                 goto write_min; /* Leave fan divider alone */
1802         }
1803         if (!val) {
1804                 /* No min limit, alarm disabled */
1805                 data->fan_min[nr] = 255;
1806                 new_div = data->fan_div[nr]; /* No change */
1807                 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1808                 goto write_div;
1809         }
1810         reg = 1350000U / val;
1811         if (reg >= 128 * 255) {
1812                 /*
1813                  * Speed below this value cannot possibly be represented,
1814                  * even with the highest divider (128)
1815                  */
1816                 data->fan_min[nr] = 254;
1817                 new_div = 7; /* 128 == (1 << 7) */
1818                 dev_warn(dev,
1819                          "fan%u low limit %lu below minimum %u, set to minimum\n",
1820                          nr + 1, val, data->fan_from_reg_min(254, 7));
1821         } else if (!reg) {
1822                 /*
1823                  * Speed above this value cannot possibly be represented,
1824                  * even with the lowest divider (1)
1825                  */
1826                 data->fan_min[nr] = 1;
1827                 new_div = 0; /* 1 == (1 << 0) */
1828                 dev_warn(dev,
1829                          "fan%u low limit %lu above maximum %u, set to maximum\n",
1830                          nr + 1, val, data->fan_from_reg_min(1, 0));
1831         } else {
1832                 /*
1833                  * Automatically pick the best divider, i.e. the one such
1834                  * that the min limit will correspond to a register value
1835                  * in the 96..192 range
1836                  */
1837                 new_div = 0;
1838                 while (reg > 192 && new_div < 7) {
1839                         reg >>= 1;
1840                         new_div++;
1841                 }
1842                 data->fan_min[nr] = reg;
1843         }
1844
1845 write_div:
1846         /*
1847          * Write both the fan clock divider (if it changed) and the new
1848          * fan min (unconditionally)
1849          */
1850         if (new_div != data->fan_div[nr]) {
1851                 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1852                         nr + 1, div_from_reg(data->fan_div[nr]),
1853                         div_from_reg(new_div));
1854                 data->fan_div[nr] = new_div;
1855                 nct6775_write_fan_div_common(data, nr);
1856                 /* Give the chip time to sample a new speed value */
1857                 data->last_updated = jiffies;
1858         }
1859
1860 write_min:
1861         nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1862         mutex_unlock(&data->update_lock);
1863
1864         return count;
1865 }
1866
1867 static ssize_t
1868 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
1869 {
1870         struct nct6775_data *data = nct6775_update_device(dev);
1871         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1872         int p = data->fan_pulses[sattr->index];
1873
1874         return sprintf(buf, "%d\n", p ? : 4);
1875 }
1876
1877 static ssize_t
1878 store_fan_pulses(struct device *dev, struct device_attribute *attr,
1879                  const char *buf, size_t count)
1880 {
1881         struct nct6775_data *data = dev_get_drvdata(dev);
1882         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1883         int nr = sattr->index;
1884         unsigned long val;
1885         int err;
1886         u8 reg;
1887
1888         err = kstrtoul(buf, 10, &val);
1889         if (err < 0)
1890                 return err;
1891
1892         if (val > 4)
1893                 return -EINVAL;
1894
1895         mutex_lock(&data->update_lock);
1896         data->fan_pulses[nr] = val & 3;
1897         reg = nct6775_read_value(data, data->REG_FAN_PULSES[nr]);
1898         reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
1899         reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
1900         nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
1901         mutex_unlock(&data->update_lock);
1902
1903         return count;
1904 }
1905
1906 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
1907                                       struct attribute *attr, int index)
1908 {
1909         struct device *dev = container_of(kobj, struct device, kobj);
1910         struct nct6775_data *data = dev_get_drvdata(dev);
1911         int fan = index / 6;    /* fan index */
1912         int nr = index % 6;     /* attribute index */
1913
1914         if (!(data->has_fan & (1 << fan)))
1915                 return 0;
1916
1917         if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1)
1918                 return 0;
1919         if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1)
1920                 return 0;
1921         if (nr == 4 && !(data->has_fan_min & (1 << fan)))
1922                 return 0;
1923         if (nr == 5 && data->kind != nct6775)
1924                 return 0;
1925
1926         return attr->mode;
1927 }
1928
1929 SENSOR_TEMPLATE(fan_input, "fan%d_input", S_IRUGO, show_fan, NULL, 0);
1930 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", S_IRUGO, show_alarm, NULL,
1931                 FAN_ALARM_BASE);
1932 SENSOR_TEMPLATE(fan_beep, "fan%d_beep", S_IWUSR | S_IRUGO, show_beep,
1933                 store_beep, FAN_ALARM_BASE);
1934 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", S_IWUSR | S_IRUGO, show_fan_pulses,
1935                 store_fan_pulses, 0);
1936 SENSOR_TEMPLATE(fan_min, "fan%d_min", S_IWUSR | S_IRUGO, show_fan_min,
1937                 store_fan_min, 0);
1938 SENSOR_TEMPLATE(fan_div, "fan%d_div", S_IRUGO, show_fan_div, NULL, 0);
1939
1940 /*
1941  * nct6775_fan_is_visible uses the index into the following array
1942  * to determine if attributes should be created or not.
1943  * Any change in order or content must be matched.
1944  */
1945 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
1946         &sensor_dev_template_fan_input,
1947         &sensor_dev_template_fan_alarm, /* 1 */
1948         &sensor_dev_template_fan_beep,  /* 2 */
1949         &sensor_dev_template_fan_pulses,
1950         &sensor_dev_template_fan_min,   /* 4 */
1951         &sensor_dev_template_fan_div,   /* 5 */
1952         NULL
1953 };
1954
1955 static struct sensor_template_group nct6775_fan_template_group = {
1956         .templates = nct6775_attributes_fan_template,
1957         .is_visible = nct6775_fan_is_visible,
1958         .base = 1,
1959 };
1960
1961 static ssize_t
1962 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1963 {
1964         struct nct6775_data *data = nct6775_update_device(dev);
1965         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1966         int nr = sattr->index;
1967
1968         return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1969 }
1970
1971 static ssize_t
1972 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1973 {
1974         struct nct6775_data *data = nct6775_update_device(dev);
1975         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1976         int nr = sattr->nr;
1977         int index = sattr->index;
1978
1979         return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
1980 }
1981
1982 static ssize_t
1983 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
1984            size_t count)
1985 {
1986         struct nct6775_data *data = dev_get_drvdata(dev);
1987         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1988         int nr = sattr->nr;
1989         int index = sattr->index;
1990         int err;
1991         long val;
1992
1993         err = kstrtol(buf, 10, &val);
1994         if (err < 0)
1995                 return err;
1996
1997         mutex_lock(&data->update_lock);
1998         data->temp[index][nr] = LM75_TEMP_TO_REG(val);
1999         nct6775_write_temp(data, data->reg_temp[index][nr],
2000                            data->temp[index][nr]);
2001         mutex_unlock(&data->update_lock);
2002         return count;
2003 }
2004
2005 static ssize_t
2006 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
2007 {
2008         struct nct6775_data *data = nct6775_update_device(dev);
2009         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2010
2011         return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
2012 }
2013
2014 static ssize_t
2015 store_temp_offset(struct device *dev, struct device_attribute *attr,
2016                   const char *buf, size_t count)
2017 {
2018         struct nct6775_data *data = dev_get_drvdata(dev);
2019         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2020         int nr = sattr->index;
2021         long val;
2022         int err;
2023
2024         err = kstrtol(buf, 10, &val);
2025         if (err < 0)
2026                 return err;
2027
2028         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
2029
2030         mutex_lock(&data->update_lock);
2031         data->temp_offset[nr] = val;
2032         nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
2033         mutex_unlock(&data->update_lock);
2034
2035         return count;
2036 }
2037
2038 static ssize_t
2039 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
2040 {
2041         struct nct6775_data *data = nct6775_update_device(dev);
2042         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2043         int nr = sattr->index;
2044
2045         return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
2046 }
2047
2048 static ssize_t
2049 store_temp_type(struct device *dev, struct device_attribute *attr,
2050                 const char *buf, size_t count)
2051 {
2052         struct nct6775_data *data = nct6775_update_device(dev);
2053         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2054         int nr = sattr->index;
2055         unsigned long val;
2056         int err;
2057         u8 vbat, diode, vbit, dbit;
2058
2059         err = kstrtoul(buf, 10, &val);
2060         if (err < 0)
2061                 return err;
2062
2063         if (val != 1 && val != 3 && val != 4)
2064                 return -EINVAL;
2065
2066         mutex_lock(&data->update_lock);
2067
2068         data->temp_type[nr] = val;
2069         vbit = 0x02 << nr;
2070         dbit = data->DIODE_MASK << nr;
2071         vbat = nct6775_read_value(data, data->REG_VBAT) & ~vbit;
2072         diode = nct6775_read_value(data, data->REG_DIODE) & ~dbit;
2073         switch (val) {
2074         case 1: /* CPU diode (diode, current mode) */
2075                 vbat |= vbit;
2076                 diode |= dbit;
2077                 break;
2078         case 3: /* diode, voltage mode */
2079                 vbat |= dbit;
2080                 break;
2081         case 4: /* thermistor */
2082                 break;
2083         }
2084         nct6775_write_value(data, data->REG_VBAT, vbat);
2085         nct6775_write_value(data, data->REG_DIODE, diode);
2086
2087         mutex_unlock(&data->update_lock);
2088         return count;
2089 }
2090
2091 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
2092                                        struct attribute *attr, int index)
2093 {
2094         struct device *dev = container_of(kobj, struct device, kobj);
2095         struct nct6775_data *data = dev_get_drvdata(dev);
2096         int temp = index / 10;  /* temp index */
2097         int nr = index % 10;    /* attribute index */
2098
2099         if (!(data->have_temp & (1 << temp)))
2100                 return 0;
2101
2102         if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0)
2103                 return 0;                               /* alarm */
2104
2105         if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0)
2106                 return 0;                               /* beep */
2107
2108         if (nr == 4 && !data->reg_temp[1][temp])        /* max */
2109                 return 0;
2110
2111         if (nr == 5 && !data->reg_temp[2][temp])        /* max_hyst */
2112                 return 0;
2113
2114         if (nr == 6 && !data->reg_temp[3][temp])        /* crit */
2115                 return 0;
2116
2117         if (nr == 7 && !data->reg_temp[4][temp])        /* lcrit */
2118                 return 0;
2119
2120         /* offset and type only apply to fixed sensors */
2121         if (nr > 7 && !(data->have_temp_fixed & (1 << temp)))
2122                 return 0;
2123
2124         return attr->mode;
2125 }
2126
2127 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", S_IRUGO, show_temp, NULL, 0, 0);
2128 SENSOR_TEMPLATE(temp_label, "temp%d_label", S_IRUGO, show_temp_label, NULL, 0);
2129 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", S_IRUGO | S_IWUSR, show_temp,
2130                   store_temp, 0, 1);
2131 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", S_IRUGO | S_IWUSR,
2132                   show_temp, store_temp, 0, 2);
2133 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", S_IRUGO | S_IWUSR, show_temp,
2134                   store_temp, 0, 3);
2135 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", S_IRUGO | S_IWUSR, show_temp,
2136                   store_temp, 0, 4);
2137 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", S_IRUGO | S_IWUSR,
2138                 show_temp_offset, store_temp_offset, 0);
2139 SENSOR_TEMPLATE(temp_type, "temp%d_type", S_IRUGO | S_IWUSR, show_temp_type,
2140                 store_temp_type, 0);
2141 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", S_IRUGO, show_temp_alarm, NULL, 0);
2142 SENSOR_TEMPLATE(temp_beep, "temp%d_beep", S_IRUGO | S_IWUSR, show_temp_beep,
2143                 store_temp_beep, 0);
2144
2145 /*
2146  * nct6775_temp_is_visible uses the index into the following array
2147  * to determine if attributes should be created or not.
2148  * Any change in order or content must be matched.
2149  */
2150 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
2151         &sensor_dev_template_temp_input,
2152         &sensor_dev_template_temp_label,
2153         &sensor_dev_template_temp_alarm,        /* 2 */
2154         &sensor_dev_template_temp_beep,         /* 3 */
2155         &sensor_dev_template_temp_max,          /* 4 */
2156         &sensor_dev_template_temp_max_hyst,     /* 5 */
2157         &sensor_dev_template_temp_crit,         /* 6 */
2158         &sensor_dev_template_temp_lcrit,        /* 7 */
2159         &sensor_dev_template_temp_offset,       /* 8 */
2160         &sensor_dev_template_temp_type,         /* 9 */
2161         NULL
2162 };
2163
2164 static struct sensor_template_group nct6775_temp_template_group = {
2165         .templates = nct6775_attributes_temp_template,
2166         .is_visible = nct6775_temp_is_visible,
2167         .base = 1,
2168 };
2169
2170 static ssize_t
2171 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
2172 {
2173         struct nct6775_data *data = nct6775_update_device(dev);
2174         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2175
2176         return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
2177 }
2178
2179 static ssize_t
2180 store_pwm_mode(struct device *dev, struct device_attribute *attr,
2181                const char *buf, size_t count)
2182 {
2183         struct nct6775_data *data = dev_get_drvdata(dev);
2184         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2185         int nr = sattr->index;
2186         unsigned long val;
2187         int err;
2188         u8 reg;
2189
2190         err = kstrtoul(buf, 10, &val);
2191         if (err < 0)
2192                 return err;
2193
2194         if (val > 1)
2195                 return -EINVAL;
2196
2197         /* Setting DC mode is not supported for all chips/channels */
2198         if (data->REG_PWM_MODE[nr] == 0) {
2199                 if (val)
2200                         return -EINVAL;
2201                 return count;
2202         }
2203
2204         mutex_lock(&data->update_lock);
2205         data->pwm_mode[nr] = val;
2206         reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
2207         reg &= ~data->PWM_MODE_MASK[nr];
2208         if (val)
2209                 reg |= data->PWM_MODE_MASK[nr];
2210         nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
2211         mutex_unlock(&data->update_lock);
2212         return count;
2213 }
2214
2215 static ssize_t
2216 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2217 {
2218         struct nct6775_data *data = nct6775_update_device(dev);
2219         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2220         int nr = sattr->nr;
2221         int index = sattr->index;
2222         int pwm;
2223
2224         /*
2225          * For automatic fan control modes, show current pwm readings.
2226          * Otherwise, show the configured value.
2227          */
2228         if (index == 0 && data->pwm_enable[nr] > manual)
2229                 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
2230         else
2231                 pwm = data->pwm[index][nr];
2232
2233         return sprintf(buf, "%d\n", pwm);
2234 }
2235
2236 static ssize_t
2237 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
2238           size_t count)
2239 {
2240         struct nct6775_data *data = dev_get_drvdata(dev);
2241         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2242         int nr = sattr->nr;
2243         int index = sattr->index;
2244         unsigned long val;
2245         int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
2246         int maxval[7]
2247           = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
2248         int err;
2249         u8 reg;
2250
2251         err = kstrtoul(buf, 10, &val);
2252         if (err < 0)
2253                 return err;
2254         val = clamp_val(val, minval[index], maxval[index]);
2255
2256         mutex_lock(&data->update_lock);
2257         data->pwm[index][nr] = val;
2258         nct6775_write_value(data, data->REG_PWM[index][nr], val);
2259         if (index == 2) { /* floor: disable if val == 0 */
2260                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2261                 reg &= 0x7f;
2262                 if (val)
2263                         reg |= 0x80;
2264                 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2265         }
2266         mutex_unlock(&data->update_lock);
2267         return count;
2268 }
2269
2270 /* Returns 0 if OK, -EINVAL otherwise */
2271 static int check_trip_points(struct nct6775_data *data, int nr)
2272 {
2273         int i;
2274
2275         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2276                 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
2277                         return -EINVAL;
2278         }
2279         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2280                 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
2281                         return -EINVAL;
2282         }
2283         /* validate critical temperature and pwm if enabled (pwm > 0) */
2284         if (data->auto_pwm[nr][data->auto_pwm_num]) {
2285                 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2286                                 data->auto_temp[nr][data->auto_pwm_num] ||
2287                     data->auto_pwm[nr][data->auto_pwm_num - 1] >
2288                                 data->auto_pwm[nr][data->auto_pwm_num])
2289                         return -EINVAL;
2290         }
2291         return 0;
2292 }
2293
2294 static void pwm_update_registers(struct nct6775_data *data, int nr)
2295 {
2296         u8 reg;
2297
2298         switch (data->pwm_enable[nr]) {
2299         case off:
2300         case manual:
2301                 break;
2302         case speed_cruise:
2303                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2304                 reg = (reg & ~data->tolerance_mask) |
2305                   (data->target_speed_tolerance[nr] & data->tolerance_mask);
2306                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2307                 nct6775_write_value(data, data->REG_TARGET[nr],
2308                                     data->target_speed[nr] & 0xff);
2309                 if (data->REG_TOLERANCE_H) {
2310                         reg = (data->target_speed[nr] >> 8) & 0x0f;
2311                         reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2312                         nct6775_write_value(data,
2313                                             data->REG_TOLERANCE_H[nr],
2314                                             reg);
2315                 }
2316                 break;
2317         case thermal_cruise:
2318                 nct6775_write_value(data, data->REG_TARGET[nr],
2319                                     data->target_temp[nr]);
2320                 /* intentional */
2321         default:
2322                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2323                 reg = (reg & ~data->tolerance_mask) |
2324                   data->temp_tolerance[0][nr];
2325                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2326                 break;
2327         }
2328 }
2329
2330 static ssize_t
2331 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2332 {
2333         struct nct6775_data *data = nct6775_update_device(dev);
2334         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2335
2336         return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2337 }
2338
2339 static ssize_t
2340 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2341                  const char *buf, size_t count)
2342 {
2343         struct nct6775_data *data = dev_get_drvdata(dev);
2344         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2345         int nr = sattr->index;
2346         unsigned long val;
2347         int err;
2348         u16 reg;
2349
2350         err = kstrtoul(buf, 10, &val);
2351         if (err < 0)
2352                 return err;
2353
2354         if (val > sf4)
2355                 return -EINVAL;
2356
2357         if (val == sf3 && data->kind != nct6775)
2358                 return -EINVAL;
2359
2360         if (val == sf4 && check_trip_points(data, nr)) {
2361                 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2362                 dev_err(dev, "Adjust trip points and try again\n");
2363                 return -EINVAL;
2364         }
2365
2366         mutex_lock(&data->update_lock);
2367         data->pwm_enable[nr] = val;
2368         if (val == off) {
2369                 /*
2370                  * turn off pwm control: select manual mode, set pwm to maximum
2371                  */
2372                 data->pwm[0][nr] = 255;
2373                 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2374         }
2375         pwm_update_registers(data, nr);
2376         reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2377         reg &= 0x0f;
2378         reg |= pwm_enable_to_reg(val) << 4;
2379         nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2380         mutex_unlock(&data->update_lock);
2381         return count;
2382 }
2383
2384 static ssize_t
2385 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2386 {
2387         int i, sel = 0;
2388
2389         for (i = 0; i < NUM_TEMP; i++) {
2390                 if (!(data->have_temp & (1 << i)))
2391                         continue;
2392                 if (src == data->temp_src[i]) {
2393                         sel = i + 1;
2394                         break;
2395                 }
2396         }
2397
2398         return sprintf(buf, "%d\n", sel);
2399 }
2400
2401 static ssize_t
2402 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2403 {
2404         struct nct6775_data *data = nct6775_update_device(dev);
2405         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2406         int index = sattr->index;
2407
2408         return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2409 }
2410
2411 static ssize_t
2412 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2413                    const char *buf, size_t count)
2414 {
2415         struct nct6775_data *data = nct6775_update_device(dev);
2416         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2417         int nr = sattr->index;
2418         unsigned long val;
2419         int err, reg, src;
2420
2421         err = kstrtoul(buf, 10, &val);
2422         if (err < 0)
2423                 return err;
2424         if (val == 0 || val > NUM_TEMP)
2425                 return -EINVAL;
2426         if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
2427                 return -EINVAL;
2428
2429         mutex_lock(&data->update_lock);
2430         src = data->temp_src[val - 1];
2431         data->pwm_temp_sel[nr] = src;
2432         reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2433         reg &= 0xe0;
2434         reg |= src;
2435         nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2436         mutex_unlock(&data->update_lock);
2437
2438         return count;
2439 }
2440
2441 static ssize_t
2442 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2443                          char *buf)
2444 {
2445         struct nct6775_data *data = nct6775_update_device(dev);
2446         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2447         int index = sattr->index;
2448
2449         return show_pwm_temp_sel_common(data, buf,
2450                                         data->pwm_weight_temp_sel[index]);
2451 }
2452
2453 static ssize_t
2454 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2455                           const char *buf, size_t count)
2456 {
2457         struct nct6775_data *data = nct6775_update_device(dev);
2458         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2459         int nr = sattr->index;
2460         unsigned long val;
2461         int err, reg, src;
2462
2463         err = kstrtoul(buf, 10, &val);
2464         if (err < 0)
2465                 return err;
2466         if (val > NUM_TEMP)
2467                 return -EINVAL;
2468         if (val && (!(data->have_temp & (1 << (val - 1))) ||
2469                     !data->temp_src[val - 1]))
2470                 return -EINVAL;
2471
2472         mutex_lock(&data->update_lock);
2473         if (val) {
2474                 src = data->temp_src[val - 1];
2475                 data->pwm_weight_temp_sel[nr] = src;
2476                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2477                 reg &= 0xe0;
2478                 reg |= (src | 0x80);
2479                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2480         } else {
2481                 data->pwm_weight_temp_sel[nr] = 0;
2482                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2483                 reg &= 0x7f;
2484                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2485         }
2486         mutex_unlock(&data->update_lock);
2487
2488         return count;
2489 }
2490
2491 static ssize_t
2492 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2493 {
2494         struct nct6775_data *data = nct6775_update_device(dev);
2495         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2496
2497         return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2498 }
2499
2500 static ssize_t
2501 store_target_temp(struct device *dev, struct device_attribute *attr,
2502                   const char *buf, size_t count)
2503 {
2504         struct nct6775_data *data = dev_get_drvdata(dev);
2505         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2506         int nr = sattr->index;
2507         unsigned long val;
2508         int err;
2509
2510         err = kstrtoul(buf, 10, &val);
2511         if (err < 0)
2512                 return err;
2513
2514         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2515                         data->target_temp_mask);
2516
2517         mutex_lock(&data->update_lock);
2518         data->target_temp[nr] = val;
2519         pwm_update_registers(data, nr);
2520         mutex_unlock(&data->update_lock);
2521         return count;
2522 }
2523
2524 static ssize_t
2525 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2526 {
2527         struct nct6775_data *data = nct6775_update_device(dev);
2528         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2529         int nr = sattr->index;
2530
2531         return sprintf(buf, "%d\n",
2532                        fan_from_reg16(data->target_speed[nr],
2533                                       data->fan_div[nr]));
2534 }
2535
2536 static ssize_t
2537 store_target_speed(struct device *dev, struct device_attribute *attr,
2538                    const char *buf, size_t count)
2539 {
2540         struct nct6775_data *data = dev_get_drvdata(dev);
2541         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2542         int nr = sattr->index;
2543         unsigned long val;
2544         int err;
2545         u16 speed;
2546
2547         err = kstrtoul(buf, 10, &val);
2548         if (err < 0)
2549                 return err;
2550
2551         val = clamp_val(val, 0, 1350000U);
2552         speed = fan_to_reg(val, data->fan_div[nr]);
2553
2554         mutex_lock(&data->update_lock);
2555         data->target_speed[nr] = speed;
2556         pwm_update_registers(data, nr);
2557         mutex_unlock(&data->update_lock);
2558         return count;
2559 }
2560
2561 static ssize_t
2562 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2563                     char *buf)
2564 {
2565         struct nct6775_data *data = nct6775_update_device(dev);
2566         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2567         int nr = sattr->nr;
2568         int index = sattr->index;
2569
2570         return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2571 }
2572
2573 static ssize_t
2574 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2575                      const char *buf, size_t count)
2576 {
2577         struct nct6775_data *data = dev_get_drvdata(dev);
2578         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2579         int nr = sattr->nr;
2580         int index = sattr->index;
2581         unsigned long val;
2582         int err;
2583
2584         err = kstrtoul(buf, 10, &val);
2585         if (err < 0)
2586                 return err;
2587
2588         /* Limit tolerance as needed */
2589         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2590
2591         mutex_lock(&data->update_lock);
2592         data->temp_tolerance[index][nr] = val;
2593         if (index)
2594                 pwm_update_registers(data, nr);
2595         else
2596                 nct6775_write_value(data,
2597                                     data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2598                                     val);
2599         mutex_unlock(&data->update_lock);
2600         return count;
2601 }
2602
2603 /*
2604  * Fan speed tolerance is a tricky beast, since the associated register is
2605  * a tick counter, but the value is reported and configured as rpm.
2606  * Compute resulting low and high rpm values and report the difference.
2607  */
2608 static ssize_t
2609 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2610                      char *buf)
2611 {
2612         struct nct6775_data *data = nct6775_update_device(dev);
2613         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2614         int nr = sattr->index;
2615         int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2616         int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2617         int tolerance;
2618
2619         if (low <= 0)
2620                 low = 1;
2621         if (high > 0xffff)
2622                 high = 0xffff;
2623         if (high < low)
2624                 high = low;
2625
2626         tolerance = (fan_from_reg16(low, data->fan_div[nr])
2627                      - fan_from_reg16(high, data->fan_div[nr])) / 2;
2628
2629         return sprintf(buf, "%d\n", tolerance);
2630 }
2631
2632 static ssize_t
2633 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2634                       const char *buf, size_t count)
2635 {
2636         struct nct6775_data *data = dev_get_drvdata(dev);
2637         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2638         int nr = sattr->index;
2639         unsigned long val;
2640         int err;
2641         int low, high;
2642
2643         err = kstrtoul(buf, 10, &val);
2644         if (err < 0)
2645                 return err;
2646
2647         high = fan_from_reg16(data->target_speed[nr],
2648                               data->fan_div[nr]) + val;
2649         low = fan_from_reg16(data->target_speed[nr],
2650                              data->fan_div[nr]) - val;
2651         if (low <= 0)
2652                 low = 1;
2653         if (high < low)
2654                 high = low;
2655
2656         val = (fan_to_reg(low, data->fan_div[nr]) -
2657                fan_to_reg(high, data->fan_div[nr])) / 2;
2658
2659         /* Limit tolerance as needed */
2660         val = clamp_val(val, 0, data->speed_tolerance_limit);
2661
2662         mutex_lock(&data->update_lock);
2663         data->target_speed_tolerance[nr] = val;
2664         pwm_update_registers(data, nr);
2665         mutex_unlock(&data->update_lock);
2666         return count;
2667 }
2668
2669 SENSOR_TEMPLATE_2(pwm, "pwm%d", S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2670 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", S_IWUSR | S_IRUGO, show_pwm_mode,
2671                 store_pwm_mode, 0);
2672 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", S_IWUSR | S_IRUGO, show_pwm_enable,
2673                 store_pwm_enable, 0);
2674 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", S_IWUSR | S_IRUGO,
2675                 show_pwm_temp_sel, store_pwm_temp_sel, 0);
2676 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", S_IWUSR | S_IRUGO,
2677                 show_target_temp, store_target_temp, 0);
2678 SENSOR_TEMPLATE(fan_target, "fan%d_target", S_IWUSR | S_IRUGO,
2679                 show_target_speed, store_target_speed, 0);
2680 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", S_IWUSR | S_IRUGO,
2681                 show_speed_tolerance, store_speed_tolerance, 0);
2682
2683 /* Smart Fan registers */
2684
2685 static ssize_t
2686 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2687 {
2688         struct nct6775_data *data = nct6775_update_device(dev);
2689         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2690         int nr = sattr->nr;
2691         int index = sattr->index;
2692
2693         return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2694 }
2695
2696 static ssize_t
2697 store_weight_temp(struct device *dev, struct device_attribute *attr,
2698                   const char *buf, size_t count)
2699 {
2700         struct nct6775_data *data = dev_get_drvdata(dev);
2701         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2702         int nr = sattr->nr;
2703         int index = sattr->index;
2704         unsigned long val;
2705         int err;
2706
2707         err = kstrtoul(buf, 10, &val);
2708         if (err < 0)
2709                 return err;
2710
2711         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2712
2713         mutex_lock(&data->update_lock);
2714         data->weight_temp[index][nr] = val;
2715         nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2716         mutex_unlock(&data->update_lock);
2717         return count;
2718 }
2719
2720 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", S_IWUSR | S_IRUGO,
2721                   show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
2722 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step",
2723                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 0);
2724 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol",
2725                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 1);
2726 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base",
2727                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 2);
2728 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step",
2729                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 5);
2730 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base",
2731                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 6);
2732
2733 static ssize_t
2734 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2735 {
2736         struct nct6775_data *data = nct6775_update_device(dev);
2737         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2738         int nr = sattr->nr;
2739         int index = sattr->index;
2740
2741         return sprintf(buf, "%d\n",
2742                        step_time_from_reg(data->fan_time[index][nr],
2743                                           data->pwm_mode[nr]));
2744 }
2745
2746 static ssize_t
2747 store_fan_time(struct device *dev, struct device_attribute *attr,
2748                const char *buf, size_t count)
2749 {
2750         struct nct6775_data *data = dev_get_drvdata(dev);
2751         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2752         int nr = sattr->nr;
2753         int index = sattr->index;
2754         unsigned long val;
2755         int err;
2756
2757         err = kstrtoul(buf, 10, &val);
2758         if (err < 0)
2759                 return err;
2760
2761         val = step_time_to_reg(val, data->pwm_mode[nr]);
2762         mutex_lock(&data->update_lock);
2763         data->fan_time[index][nr] = val;
2764         nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2765         mutex_unlock(&data->update_lock);
2766         return count;
2767 }
2768
2769 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
2770 static ssize_t
2771 show_name(struct device *dev, struct device_attribute *attr, char *buf)
2772 {
2773         struct nct6775_data *data = dev_get_drvdata(dev);
2774
2775         return sprintf(buf, "%s\n", data->name);
2776 }
2777
2778 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
2779 #endif
2780
2781 static ssize_t
2782 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2783 {
2784         struct nct6775_data *data = nct6775_update_device(dev);
2785         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2786
2787         return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2788 }
2789
2790 static ssize_t
2791 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2792                const char *buf, size_t count)
2793 {
2794         struct nct6775_data *data = dev_get_drvdata(dev);
2795         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2796         int nr = sattr->nr;
2797         int point = sattr->index;
2798         unsigned long val;
2799         int err;
2800         u8 reg;
2801
2802         err = kstrtoul(buf, 10, &val);
2803         if (err < 0)
2804                 return err;
2805         if (val > 255)
2806                 return -EINVAL;
2807
2808         if (point == data->auto_pwm_num) {
2809                 if (data->kind != nct6775 && !val)
2810                         return -EINVAL;
2811                 if (data->kind != nct6779 && val)
2812                         val = 0xff;
2813         }
2814
2815         mutex_lock(&data->update_lock);
2816         data->auto_pwm[nr][point] = val;
2817         if (point < data->auto_pwm_num) {
2818                 nct6775_write_value(data,
2819                                     NCT6775_AUTO_PWM(data, nr, point),
2820                                     data->auto_pwm[nr][point]);
2821         } else {
2822                 switch (data->kind) {
2823                 case nct6775:
2824                         /* disable if needed (pwm == 0) */
2825                         reg = nct6775_read_value(data,
2826                                                  NCT6775_REG_CRITICAL_ENAB[nr]);
2827                         if (val)
2828                                 reg |= 0x02;
2829                         else
2830                                 reg &= ~0x02;
2831                         nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
2832                                             reg);
2833                         break;
2834                 case nct6776:
2835                         break; /* always enabled, nothing to do */
2836                 case nct6106:
2837                 case nct6779:
2838                 case nct6791:
2839                 case nct6792:
2840                         nct6775_write_value(data, data->REG_CRITICAL_PWM[nr],
2841                                             val);
2842                         reg = nct6775_read_value(data,
2843                                         data->REG_CRITICAL_PWM_ENABLE[nr]);
2844                         if (val == 255)
2845                                 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
2846                         else
2847                                 reg |= data->CRITICAL_PWM_ENABLE_MASK;
2848                         nct6775_write_value(data,
2849                                             data->REG_CRITICAL_PWM_ENABLE[nr],
2850                                             reg);
2851                         break;
2852                 }
2853         }
2854         mutex_unlock(&data->update_lock);
2855         return count;
2856 }
2857
2858 static ssize_t
2859 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
2860 {
2861         struct nct6775_data *data = nct6775_update_device(dev);
2862         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2863         int nr = sattr->nr;
2864         int point = sattr->index;
2865
2866         /*
2867          * We don't know for sure if the temperature is signed or unsigned.
2868          * Assume it is unsigned.
2869          */
2870         return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
2871 }
2872
2873 static ssize_t
2874 store_auto_temp(struct device *dev, struct device_attribute *attr,
2875                 const char *buf, size_t count)
2876 {
2877         struct nct6775_data *data = dev_get_drvdata(dev);
2878         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2879         int nr = sattr->nr;
2880         int point = sattr->index;
2881         unsigned long val;
2882         int err;
2883
2884         err = kstrtoul(buf, 10, &val);
2885         if (err)
2886                 return err;
2887         if (val > 255000)
2888                 return -EINVAL;
2889
2890         mutex_lock(&data->update_lock);
2891         data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
2892         if (point < data->auto_pwm_num) {
2893                 nct6775_write_value(data,
2894                                     NCT6775_AUTO_TEMP(data, nr, point),
2895                                     data->auto_temp[nr][point]);
2896         } else {
2897                 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
2898                                     data->auto_temp[nr][point]);
2899         }
2900         mutex_unlock(&data->update_lock);
2901         return count;
2902 }
2903
2904 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
2905                                       struct attribute *attr, int index)
2906 {
2907         struct device *dev = container_of(kobj, struct device, kobj);
2908         struct nct6775_data *data = dev_get_drvdata(dev);
2909         int pwm = index / 36;   /* pwm index */
2910         int nr = index % 36;    /* attribute index */
2911
2912         if (!(data->has_pwm & (1 << pwm)))
2913                 return 0;
2914
2915         if ((nr >= 14 && nr <= 18) || nr == 21)   /* weight */
2916                 if (!data->REG_WEIGHT_TEMP_SEL[pwm])
2917                         return 0;
2918         if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
2919                 return 0;
2920         if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
2921                 return 0;
2922         if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
2923                 return 0;
2924
2925         if (nr >= 22 && nr <= 35) {             /* auto point */
2926                 int api = (nr - 22) / 2;        /* auto point index */
2927
2928                 if (api > data->auto_pwm_num)
2929                         return 0;
2930         }
2931         return attr->mode;
2932 }
2933
2934 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", S_IWUSR | S_IRUGO,
2935                   show_fan_time, store_fan_time, 0, 0);
2936 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", S_IWUSR | S_IRUGO,
2937                   show_fan_time, store_fan_time, 0, 1);
2938 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", S_IWUSR | S_IRUGO,
2939                   show_fan_time, store_fan_time, 0, 2);
2940 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", S_IWUSR | S_IRUGO, show_pwm,
2941                   store_pwm, 0, 1);
2942 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", S_IWUSR | S_IRUGO, show_pwm,
2943                   store_pwm, 0, 2);
2944 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", S_IWUSR | S_IRUGO,
2945                   show_temp_tolerance, store_temp_tolerance, 0, 0);
2946 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance",
2947                   S_IWUSR | S_IRUGO, show_temp_tolerance, store_temp_tolerance,
2948                   0, 1);
2949
2950 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2951                   0, 3);
2952
2953 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", S_IWUSR | S_IRUGO, show_pwm,
2954                   store_pwm, 0, 4);
2955
2956 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm",
2957                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 0);
2958 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp",
2959                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 0);
2960
2961 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm",
2962                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 1);
2963 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp",
2964                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 1);
2965
2966 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm",
2967                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 2);
2968 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp",
2969                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 2);
2970
2971 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm",
2972                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 3);
2973 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp",
2974                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 3);
2975
2976 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm",
2977                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 4);
2978 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp",
2979                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 4);
2980
2981 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm",
2982                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 5);
2983 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp",
2984                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 5);
2985
2986 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm",
2987                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 6);
2988 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp",
2989                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 6);
2990
2991 /*
2992  * nct6775_pwm_is_visible uses the index into the following array
2993  * to determine if attributes should be created or not.
2994  * Any change in order or content must be matched.
2995  */
2996 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
2997         &sensor_dev_template_pwm,
2998         &sensor_dev_template_pwm_mode,
2999         &sensor_dev_template_pwm_enable,
3000         &sensor_dev_template_pwm_temp_sel,
3001         &sensor_dev_template_pwm_temp_tolerance,
3002         &sensor_dev_template_pwm_crit_temp_tolerance,
3003         &sensor_dev_template_pwm_target_temp,
3004         &sensor_dev_template_fan_target,
3005         &sensor_dev_template_fan_tolerance,
3006         &sensor_dev_template_pwm_stop_time,
3007         &sensor_dev_template_pwm_step_up_time,
3008         &sensor_dev_template_pwm_step_down_time,
3009         &sensor_dev_template_pwm_start,
3010         &sensor_dev_template_pwm_floor,
3011         &sensor_dev_template_pwm_weight_temp_sel,       /* 14 */
3012         &sensor_dev_template_pwm_weight_temp_step,
3013         &sensor_dev_template_pwm_weight_temp_step_tol,
3014         &sensor_dev_template_pwm_weight_temp_step_base,
3015         &sensor_dev_template_pwm_weight_duty_step,      /* 18 */
3016         &sensor_dev_template_pwm_max,                   /* 19 */
3017         &sensor_dev_template_pwm_step,                  /* 20 */
3018         &sensor_dev_template_pwm_weight_duty_base,      /* 21 */
3019         &sensor_dev_template_pwm_auto_point1_pwm,       /* 22 */
3020         &sensor_dev_template_pwm_auto_point1_temp,
3021         &sensor_dev_template_pwm_auto_point2_pwm,
3022         &sensor_dev_template_pwm_auto_point2_temp,
3023         &sensor_dev_template_pwm_auto_point3_pwm,
3024         &sensor_dev_template_pwm_auto_point3_temp,
3025         &sensor_dev_template_pwm_auto_point4_pwm,
3026         &sensor_dev_template_pwm_auto_point4_temp,
3027         &sensor_dev_template_pwm_auto_point5_pwm,
3028         &sensor_dev_template_pwm_auto_point5_temp,
3029         &sensor_dev_template_pwm_auto_point6_pwm,
3030         &sensor_dev_template_pwm_auto_point6_temp,
3031         &sensor_dev_template_pwm_auto_point7_pwm,
3032         &sensor_dev_template_pwm_auto_point7_temp,      /* 35 */
3033
3034         NULL
3035 };
3036
3037 static struct sensor_template_group nct6775_pwm_template_group = {
3038         .templates = nct6775_attributes_pwm_template,
3039         .is_visible = nct6775_pwm_is_visible,
3040         .base = 1,
3041 };
3042
3043 static ssize_t
3044 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
3045 {
3046         struct nct6775_data *data = dev_get_drvdata(dev);
3047
3048         return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
3049 }
3050
3051 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
3052
3053 /* Case open detection */
3054
3055 static ssize_t
3056 clear_caseopen(struct device *dev, struct device_attribute *attr,
3057                const char *buf, size_t count)
3058 {
3059         struct nct6775_data *data = dev_get_drvdata(dev);
3060         int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
3061         unsigned long val;
3062         u8 reg;
3063         int ret;
3064
3065         if (kstrtoul(buf, 10, &val) || val != 0)
3066                 return -EINVAL;
3067
3068         mutex_lock(&data->update_lock);
3069
3070         /*
3071          * Use CR registers to clear caseopen status.
3072          * The CR registers are the same for all chips, and not all chips
3073          * support clearing the caseopen status through "regular" registers.
3074          */
3075         ret = superio_enter(data->sioreg);
3076         if (ret) {
3077                 count = ret;
3078                 goto error;
3079         }
3080
3081         superio_select(data->sioreg, NCT6775_LD_ACPI);
3082         reg = superio_inb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
3083         reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3084         superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3085         reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3086         superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3087         superio_exit(data->sioreg);
3088
3089         data->valid = false;    /* Force cache refresh */
3090 error:
3091         mutex_unlock(&data->update_lock);
3092         return count;
3093 }
3094
3095 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
3096                           clear_caseopen, INTRUSION_ALARM_BASE);
3097 static SENSOR_DEVICE_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
3098                           clear_caseopen, INTRUSION_ALARM_BASE + 1);
3099 static SENSOR_DEVICE_ATTR(intrusion0_beep, S_IWUSR | S_IRUGO, show_beep,
3100                           store_beep, INTRUSION_ALARM_BASE);
3101 static SENSOR_DEVICE_ATTR(intrusion1_beep, S_IWUSR | S_IRUGO, show_beep,
3102                           store_beep, INTRUSION_ALARM_BASE + 1);
3103 static SENSOR_DEVICE_ATTR(beep_enable, S_IWUSR | S_IRUGO, show_beep,
3104                           store_beep, BEEP_ENABLE_BASE);
3105
3106 static umode_t nct6775_other_is_visible(struct kobject *kobj,
3107                                         struct attribute *attr, int index)
3108 {
3109         struct device *dev = container_of(kobj, struct device, kobj);
3110         struct nct6775_data *data = dev_get_drvdata(dev);
3111
3112         if (index == 0 && !data->have_vid)
3113                 return 0;
3114
3115         if (index == 1 || index == 2) {
3116                 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + index - 1] < 0)
3117                         return 0;
3118         }
3119
3120         if (index == 3 || index == 4) {
3121                 if (data->BEEP_BITS[INTRUSION_ALARM_BASE + index - 3] < 0)
3122                         return 0;
3123         }
3124
3125         return attr->mode;
3126 }
3127
3128 /*
3129  * nct6775_other_is_visible uses the index into the following array
3130  * to determine if attributes should be created or not.
3131  * Any change in order or content must be matched.
3132  */
3133 static struct attribute *nct6775_attributes_other[] = {
3134         &dev_attr_cpu0_vid.attr,                                /* 0 */
3135         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,        /* 1 */
3136         &sensor_dev_attr_intrusion1_alarm.dev_attr.attr,        /* 2 */
3137         &sensor_dev_attr_intrusion0_beep.dev_attr.attr,         /* 3 */
3138         &sensor_dev_attr_intrusion1_beep.dev_attr.attr,         /* 4 */
3139         &sensor_dev_attr_beep_enable.dev_attr.attr,             /* 5 */
3140 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
3141         &dev_attr_name.attr,
3142 #endif
3143         NULL
3144 };
3145
3146 static const struct attribute_group nct6775_group_other = {
3147         .attrs = nct6775_attributes_other,
3148         .is_visible = nct6775_other_is_visible,
3149 };
3150
3151 static inline void nct6775_init_device(struct nct6775_data *data)
3152 {
3153         int i;
3154         u8 tmp, diode;
3155
3156         /* Start monitoring if needed */
3157         if (data->REG_CONFIG) {
3158                 tmp = nct6775_read_value(data, data->REG_CONFIG);
3159                 if (!(tmp & 0x01))
3160                         nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
3161         }
3162
3163         /* Enable temperature sensors if needed */
3164         for (i = 0; i < NUM_TEMP; i++) {
3165                 if (!(data->have_temp & (1 << i)))
3166                         continue;
3167                 if (!data->reg_temp_config[i])
3168                         continue;
3169                 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
3170                 if (tmp & 0x01)
3171                         nct6775_write_value(data, data->reg_temp_config[i],
3172                                             tmp & 0xfe);
3173         }
3174
3175         /* Enable VBAT monitoring if needed */
3176         tmp = nct6775_read_value(data, data->REG_VBAT);
3177         if (!(tmp & 0x01))
3178                 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
3179
3180         diode = nct6775_read_value(data, data->REG_DIODE);
3181
3182         for (i = 0; i < data->temp_fixed_num; i++) {
3183                 if (!(data->have_temp_fixed & (1 << i)))
3184                         continue;
3185                 if ((tmp & (data->DIODE_MASK << i)))    /* diode */
3186                         data->temp_type[i]
3187                           = 3 - ((diode >> i) & data->DIODE_MASK);
3188                 else                            /* thermistor */
3189                         data->temp_type[i] = 4;
3190         }
3191 }
3192
3193 static void
3194 nct6775_check_fan_inputs(struct nct6775_data *data)
3195 {
3196         bool fan3pin, fan4pin, fan4min, fan5pin, fan6pin;
3197         bool pwm3pin, pwm4pin, pwm5pin, pwm6pin;
3198         int sioreg = data->sioreg;
3199         int regval;
3200
3201         /* Store SIO_REG_ENABLE for use during resume */
3202         superio_select(sioreg, NCT6775_LD_HWM);
3203         data->sio_reg_enable = superio_inb(sioreg, SIO_REG_ENABLE);
3204
3205         /* fan4 and fan5 share some pins with the GPIO and serial flash */
3206         if (data->kind == nct6775) {
3207                 regval = superio_inb(sioreg, 0x2c);
3208
3209                 fan3pin = regval & (1 << 6);
3210                 pwm3pin = regval & (1 << 7);
3211
3212                 /* On NCT6775, fan4 shares pins with the fdc interface */
3213                 fan4pin = !(superio_inb(sioreg, 0x2A) & 0x80);
3214                 fan4min = false;
3215                 fan5pin = false;
3216                 fan6pin = false;
3217                 pwm4pin = false;
3218                 pwm5pin = false;
3219                 pwm6pin = false;
3220         } else if (data->kind == nct6776) {
3221                 bool gpok = superio_inb(sioreg, 0x27) & 0x80;
3222                 const char *board_vendor, *board_name;
3223
3224                 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
3225                 board_name = dmi_get_system_info(DMI_BOARD_NAME);
3226
3227                 if (board_name && board_vendor &&
3228                     !strcmp(board_vendor, "ASRock")) {
3229                         /*
3230                          * Auxiliary fan monitoring is not enabled on ASRock
3231                          * Z77 Pro4-M if booted in UEFI Ultra-FastBoot mode.
3232                          * Observed with BIOS version 2.00.
3233                          */
3234                         if (!strcmp(board_name, "Z77 Pro4-M")) {
3235                                 if ((data->sio_reg_enable & 0xe0) != 0xe0) {
3236                                         data->sio_reg_enable |= 0xe0;
3237                                         superio_outb(sioreg, SIO_REG_ENABLE,
3238                                                      data->sio_reg_enable);
3239                                 }
3240                         }
3241                 }
3242
3243                 if (data->sio_reg_enable & 0x80)
3244                         fan3pin = gpok;
3245                 else
3246                         fan3pin = !(superio_inb(sioreg, 0x24) & 0x40);
3247
3248                 if (data->sio_reg_enable & 0x40)
3249                         fan4pin = gpok;
3250                 else
3251                         fan4pin = superio_inb(sioreg, 0x1C) & 0x01;
3252
3253                 if (data->sio_reg_enable & 0x20)
3254                         fan5pin = gpok;
3255                 else
3256                         fan5pin = superio_inb(sioreg, 0x1C) & 0x02;
3257
3258                 fan4min = fan4pin;
3259                 fan6pin = false;
3260                 pwm3pin = fan3pin;
3261                 pwm4pin = false;
3262                 pwm5pin = false;
3263                 pwm6pin = false;
3264         } else if (data->kind == nct6106) {
3265                 regval = superio_inb(sioreg, 0x24);
3266                 fan3pin = !(regval & 0x80);
3267                 pwm3pin = regval & 0x08;
3268
3269                 fan4pin = false;
3270                 fan4min = false;
3271                 fan5pin = false;
3272                 fan6pin = false;
3273                 pwm4pin = false;
3274                 pwm5pin = false;
3275                 pwm6pin = false;
3276         } else {        /* NCT6779D, NCT6791D, or NCT6792D */
3277                 regval = superio_inb(sioreg, 0x1c);
3278
3279                 fan3pin = !(regval & (1 << 5));
3280                 fan4pin = !(regval & (1 << 6));
3281                 fan5pin = !(regval & (1 << 7));
3282
3283                 pwm3pin = !(regval & (1 << 0));
3284                 pwm4pin = !(regval & (1 << 1));
3285                 pwm5pin = !(regval & (1 << 2));
3286
3287                 fan4min = fan4pin;
3288
3289                 if (data->kind == nct6791 || data->kind == nct6792) {
3290                         regval = superio_inb(sioreg, 0x2d);
3291                         fan6pin = (regval & (1 << 1));
3292                         pwm6pin = (regval & (1 << 0));
3293                 } else {        /* NCT6779D */
3294                         fan6pin = false;
3295                         pwm6pin = false;
3296                 }
3297         }
3298
3299         /* fan 1 and 2 (0x03) are always present */
3300         data->has_fan = 0x03 | (fan3pin << 2) | (fan4pin << 3) |
3301                 (fan5pin << 4) | (fan6pin << 5);
3302         data->has_fan_min = 0x03 | (fan3pin << 2) | (fan4min << 3) |
3303                 (fan5pin << 4);
3304         data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) |
3305                 (pwm5pin << 4) | (pwm6pin << 5);
3306 }
3307
3308 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
3309                              int *available, int *mask)
3310 {
3311         int i;
3312         u8 src;
3313
3314         for (i = 0; i < data->pwm_num && *available; i++) {
3315                 int index;
3316
3317                 if (!regp[i])
3318                         continue;
3319                 src = nct6775_read_value(data, regp[i]);
3320                 src &= 0x1f;
3321                 if (!src || (*mask & (1 << src)))
3322                         continue;
3323                 if (src >= data->temp_label_num ||
3324                     !strlen(data->temp_label[src]))
3325                         continue;
3326
3327                 index = __ffs(*available);
3328                 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3329                 *available &= ~(1 << index);
3330                 *mask |= 1 << src;
3331         }
3332 }
3333
3334 static int nct6775_probe(struct platform_device *pdev)
3335 {
3336         struct device *dev = &pdev->dev;
3337         struct nct6775_sio_data *sio_data = dev_get_platdata(dev);
3338         struct nct6775_data *data;
3339         struct resource *res;
3340         int i, s, err = 0;
3341         int src, mask, available;
3342         const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3343         const u16 *reg_temp_mon, *reg_temp_alternate, *reg_temp_crit;
3344         const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL;
3345         int num_reg_temp, num_reg_temp_mon;
3346         u8 cr2a;
3347         struct attribute_group *group;
3348         struct device *hwmon_dev;
3349         int num_attr_groups = 0;
3350
3351         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3352         if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3353                                  DRVNAME))
3354                 return -EBUSY;
3355
3356         data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3357                             GFP_KERNEL);
3358         if (!data)
3359                 return -ENOMEM;
3360
3361         data->kind = sio_data->kind;
3362         data->sioreg = sio_data->sioreg;
3363         data->addr = res->start;
3364         mutex_init(&data->update_lock);
3365         data->name = nct6775_device_names[data->kind];
3366         data->bank = 0xff;              /* Force initial bank selection */
3367         platform_set_drvdata(pdev, data);
3368
3369         switch (data->kind) {
3370         case nct6106:
3371                 data->in_num = 9;
3372                 data->pwm_num = 3;
3373                 data->auto_pwm_num = 4;
3374                 data->temp_fixed_num = 3;
3375                 data->num_temp_alarms = 6;
3376                 data->num_temp_beeps = 6;
3377
3378                 data->fan_from_reg = fan_from_reg13;
3379                 data->fan_from_reg_min = fan_from_reg13;
3380
3381                 data->temp_label = nct6776_temp_label;
3382                 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3383
3384                 data->REG_VBAT = NCT6106_REG_VBAT;
3385                 data->REG_DIODE = NCT6106_REG_DIODE;
3386                 data->DIODE_MASK = NCT6106_DIODE_MASK;
3387                 data->REG_VIN = NCT6106_REG_IN;
3388                 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3389                 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3390                 data->REG_TARGET = NCT6106_REG_TARGET;
3391                 data->REG_FAN = NCT6106_REG_FAN;
3392                 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
3393                 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
3394                 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
3395                 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
3396                 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
3397                 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
3398                 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
3399                 data->REG_PWM[0] = NCT6106_REG_PWM;
3400                 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
3401                 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
3402                 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3403                 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3404                 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3405                 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3406                 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3407                 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
3408                 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
3409                 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
3410                 data->REG_CRITICAL_TEMP_TOLERANCE
3411                   = NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
3412                 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
3413                 data->CRITICAL_PWM_ENABLE_MASK
3414                   = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3415                 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
3416                 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3417                 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3418                 data->REG_TEMP_SEL = NCT6106_REG_TEMP_SEL;
3419                 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3420                 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3421                 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3422                 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3423                 data->REG_ALARM = NCT6106_REG_ALARM;
3424                 data->ALARM_BITS = NCT6106_ALARM_BITS;
3425                 data->REG_BEEP = NCT6106_REG_BEEP;
3426                 data->BEEP_BITS = NCT6106_BEEP_BITS;
3427
3428                 reg_temp = NCT6106_REG_TEMP;
3429                 reg_temp_mon = NCT6106_REG_TEMP_MON;
3430                 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3431                 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON);
3432                 reg_temp_over = NCT6106_REG_TEMP_OVER;
3433                 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3434                 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3435                 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3436                 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3437                 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3438                 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3439
3440                 break;
3441         case nct6775:
3442                 data->in_num = 9;
3443                 data->pwm_num = 3;
3444                 data->auto_pwm_num = 6;
3445                 data->has_fan_div = true;
3446                 data->temp_fixed_num = 3;
3447                 data->num_temp_alarms = 3;
3448                 data->num_temp_beeps = 3;
3449
3450                 data->ALARM_BITS = NCT6775_ALARM_BITS;
3451                 data->BEEP_BITS = NCT6775_BEEP_BITS;
3452
3453                 data->fan_from_reg = fan_from_reg16;
3454                 data->fan_from_reg_min = fan_from_reg8;
3455                 data->target_temp_mask = 0x7f;
3456                 data->tolerance_mask = 0x0f;
3457                 data->speed_tolerance_limit = 15;
3458
3459                 data->temp_label = nct6775_temp_label;
3460                 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
3461
3462                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3463                 data->REG_VBAT = NCT6775_REG_VBAT;
3464                 data->REG_DIODE = NCT6775_REG_DIODE;
3465                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3466                 data->REG_VIN = NCT6775_REG_IN;
3467                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3468                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3469                 data->REG_TARGET = NCT6775_REG_TARGET;
3470                 data->REG_FAN = NCT6775_REG_FAN;
3471                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3472                 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3473                 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3474                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3475                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3476                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3477                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3478                 data->REG_PWM[0] = NCT6775_REG_PWM;
3479                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3480                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3481                 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3482                 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3483                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3484                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3485                 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3486                 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3487                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3488                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3489                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3490                 data->REG_CRITICAL_TEMP_TOLERANCE
3491                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3492                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3493                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3494                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3495                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3496                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3497                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3498                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3499                 data->REG_ALARM = NCT6775_REG_ALARM;
3500                 data->REG_BEEP = NCT6775_REG_BEEP;
3501
3502                 reg_temp = NCT6775_REG_TEMP;
3503                 reg_temp_mon = NCT6775_REG_TEMP_MON;
3504                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3505                 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3506                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3507                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3508                 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3509                 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3510                 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3511
3512                 break;
3513         case nct6776:
3514                 data->in_num = 9;
3515                 data->pwm_num = 3;
3516                 data->auto_pwm_num = 4;
3517                 data->has_fan_div = false;
3518                 data->temp_fixed_num = 3;
3519                 data->num_temp_alarms = 3;
3520                 data->num_temp_beeps = 6;
3521
3522                 data->ALARM_BITS = NCT6776_ALARM_BITS;
3523                 data->BEEP_BITS = NCT6776_BEEP_BITS;
3524
3525                 data->fan_from_reg = fan_from_reg13;
3526                 data->fan_from_reg_min = fan_from_reg13;
3527                 data->target_temp_mask = 0xff;
3528                 data->tolerance_mask = 0x07;
3529                 data->speed_tolerance_limit = 63;
3530
3531                 data->temp_label = nct6776_temp_label;
3532                 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3533
3534                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3535                 data->REG_VBAT = NCT6775_REG_VBAT;
3536                 data->REG_DIODE = NCT6775_REG_DIODE;
3537                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3538                 data->REG_VIN = NCT6775_REG_IN;
3539                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3540                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3541                 data->REG_TARGET = NCT6775_REG_TARGET;
3542                 data->REG_FAN = NCT6775_REG_FAN;
3543                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3544                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3545                 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3546                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3547                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3548                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3549                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3550                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3551                 data->REG_PWM[0] = NCT6775_REG_PWM;
3552                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3553                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3554                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3555                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3556                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3557                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3558                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3559                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3560                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3561                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3562                 data->REG_CRITICAL_TEMP_TOLERANCE
3563                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3564                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3565                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3566                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3567                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3568                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3569                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3570                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3571                 data->REG_ALARM = NCT6775_REG_ALARM;
3572                 data->REG_BEEP = NCT6776_REG_BEEP;
3573
3574                 reg_temp = NCT6775_REG_TEMP;
3575                 reg_temp_mon = NCT6775_REG_TEMP_MON;
3576                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3577                 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3578                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3579                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3580                 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3581                 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3582                 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3583
3584                 break;
3585         case nct6779:
3586                 data->in_num = 15;
3587                 data->pwm_num = 5;
3588                 data->auto_pwm_num = 4;
3589                 data->has_fan_div = false;
3590                 data->temp_fixed_num = 6;
3591                 data->num_temp_alarms = 2;
3592                 data->num_temp_beeps = 2;
3593
3594                 data->ALARM_BITS = NCT6779_ALARM_BITS;
3595                 data->BEEP_BITS = NCT6779_BEEP_BITS;
3596
3597                 data->fan_from_reg = fan_from_reg13;
3598                 data->fan_from_reg_min = fan_from_reg13;
3599                 data->target_temp_mask = 0xff;
3600                 data->tolerance_mask = 0x07;
3601                 data->speed_tolerance_limit = 63;
3602
3603                 data->temp_label = nct6779_temp_label;
3604                 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3605
3606                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3607                 data->REG_VBAT = NCT6775_REG_VBAT;
3608                 data->REG_DIODE = NCT6775_REG_DIODE;
3609                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3610                 data->REG_VIN = NCT6779_REG_IN;
3611                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3612                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3613                 data->REG_TARGET = NCT6775_REG_TARGET;
3614                 data->REG_FAN = NCT6779_REG_FAN;
3615                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3616                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3617                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3618                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3619                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3620                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3621                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3622                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3623                 data->REG_PWM[0] = NCT6775_REG_PWM;
3624                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3625                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3626                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3627                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3628                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3629                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3630                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3631                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3632                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3633                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3634                 data->REG_CRITICAL_TEMP_TOLERANCE
3635                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3636                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3637                 data->CRITICAL_PWM_ENABLE_MASK
3638                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3639                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3640                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3641                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3642                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3643                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3644                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3645                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3646                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3647                 data->REG_ALARM = NCT6779_REG_ALARM;
3648                 data->REG_BEEP = NCT6776_REG_BEEP;
3649
3650                 reg_temp = NCT6779_REG_TEMP;
3651                 reg_temp_mon = NCT6779_REG_TEMP_MON;
3652                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3653                 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3654                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3655                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3656                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3657                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3658                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3659
3660                 break;
3661         case nct6791:
3662         case nct6792:
3663                 data->in_num = 15;
3664                 data->pwm_num = 6;
3665                 data->auto_pwm_num = 4;
3666                 data->has_fan_div = false;
3667                 data->temp_fixed_num = 6;
3668                 data->num_temp_alarms = 2;
3669                 data->num_temp_beeps = 2;
3670
3671                 data->ALARM_BITS = NCT6791_ALARM_BITS;
3672                 data->BEEP_BITS = NCT6779_BEEP_BITS;
3673
3674                 data->fan_from_reg = fan_from_reg13;
3675                 data->fan_from_reg_min = fan_from_reg13;
3676                 data->target_temp_mask = 0xff;
3677                 data->tolerance_mask = 0x07;
3678                 data->speed_tolerance_limit = 63;
3679
3680                 data->temp_label = nct6779_temp_label;
3681                 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3682
3683                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3684                 data->REG_VBAT = NCT6775_REG_VBAT;
3685                 data->REG_DIODE = NCT6775_REG_DIODE;
3686                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3687                 data->REG_VIN = NCT6779_REG_IN;
3688                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3689                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3690                 data->REG_TARGET = NCT6775_REG_TARGET;
3691                 data->REG_FAN = NCT6779_REG_FAN;
3692                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3693                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3694                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3695                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3696                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3697                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3698                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3699                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3700                 data->REG_PWM[0] = NCT6775_REG_PWM;
3701                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3702                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3703                 data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP;
3704                 data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE;
3705                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3706                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3707                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3708                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3709                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3710                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3711                 data->REG_CRITICAL_TEMP_TOLERANCE
3712                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3713                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3714                 data->CRITICAL_PWM_ENABLE_MASK
3715                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3716                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3717                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3718                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3719                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3720                 data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL;
3721                 data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP;
3722                 data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL;
3723                 data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE;
3724                 data->REG_ALARM = NCT6791_REG_ALARM;
3725                 if (data->kind == nct6791)
3726                         data->REG_BEEP = NCT6776_REG_BEEP;
3727                 else
3728                         data->REG_BEEP = NCT6792_REG_BEEP;
3729
3730                 reg_temp = NCT6779_REG_TEMP;
3731                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3732                 if (data->kind == nct6791) {
3733                         reg_temp_mon = NCT6779_REG_TEMP_MON;
3734                         num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3735                 } else {
3736                         reg_temp_mon = NCT6792_REG_TEMP_MON;
3737                         num_reg_temp_mon = ARRAY_SIZE(NCT6792_REG_TEMP_MON);
3738                 }
3739                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3740                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3741                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3742                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3743                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3744
3745                 break;
3746         default:
3747                 return -ENODEV;
3748         }
3749         data->have_in = (1 << data->in_num) - 1;
3750         data->have_temp = 0;
3751
3752         /*
3753          * On some boards, not all available temperature sources are monitored,
3754          * even though some of the monitoring registers are unused.
3755          * Get list of unused monitoring registers, then detect if any fan
3756          * controls are configured to use unmonitored temperature sources.
3757          * If so, assign the unmonitored temperature sources to available
3758          * monitoring registers.
3759          */
3760         mask = 0;
3761         available = 0;
3762         for (i = 0; i < num_reg_temp; i++) {
3763                 if (reg_temp[i] == 0)
3764                         continue;
3765
3766                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3767                 if (!src || (mask & (1 << src)))
3768                         available |= 1 << i;
3769
3770                 mask |= 1 << src;
3771         }
3772
3773         /*
3774          * Now find unmonitored temperature registers and enable monitoring
3775          * if additional monitoring registers are available.
3776          */
3777         add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
3778         add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
3779
3780         mask = 0;
3781         s = NUM_TEMP_FIXED;     /* First dynamic temperature attribute */
3782         for (i = 0; i < num_reg_temp; i++) {
3783                 if (reg_temp[i] == 0)
3784                         continue;
3785
3786                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3787                 if (!src || (mask & (1 << src)))
3788                         continue;
3789
3790                 if (src >= data->temp_label_num ||
3791                     !strlen(data->temp_label[src])) {
3792                         dev_info(dev,
3793                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3794                                  src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
3795                         continue;
3796                 }
3797
3798                 mask |= 1 << src;
3799
3800                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3801                 if (src <= data->temp_fixed_num) {
3802                         data->have_temp |= 1 << (src - 1);
3803                         data->have_temp_fixed |= 1 << (src - 1);
3804                         data->reg_temp[0][src - 1] = reg_temp[i];
3805                         data->reg_temp[1][src - 1] = reg_temp_over[i];
3806                         data->reg_temp[2][src - 1] = reg_temp_hyst[i];
3807                         if (reg_temp_crit_h && reg_temp_crit_h[i])
3808                                 data->reg_temp[3][src - 1] = reg_temp_crit_h[i];
3809                         else if (reg_temp_crit[src - 1])
3810                                 data->reg_temp[3][src - 1]
3811                                   = reg_temp_crit[src - 1];
3812                         if (reg_temp_crit_l && reg_temp_crit_l[i])
3813                                 data->reg_temp[4][src - 1] = reg_temp_crit_l[i];
3814                         data->reg_temp_config[src - 1] = reg_temp_config[i];
3815                         data->temp_src[src - 1] = src;
3816                         continue;
3817                 }
3818
3819                 if (s >= NUM_TEMP)
3820                         continue;
3821
3822                 /* Use dynamic index for other sources */
3823                 data->have_temp |= 1 << s;
3824                 data->reg_temp[0][s] = reg_temp[i];
3825                 data->reg_temp[1][s] = reg_temp_over[i];
3826                 data->reg_temp[2][s] = reg_temp_hyst[i];
3827                 data->reg_temp_config[s] = reg_temp_config[i];
3828                 if (reg_temp_crit_h && reg_temp_crit_h[i])
3829                         data->reg_temp[3][s] = reg_temp_crit_h[i];
3830                 else if (reg_temp_crit[src - 1])
3831                         data->reg_temp[3][s] = reg_temp_crit[src - 1];
3832                 if (reg_temp_crit_l && reg_temp_crit_l[i])
3833                         data->reg_temp[4][s] = reg_temp_crit_l[i];
3834
3835                 data->temp_src[s] = src;
3836                 s++;
3837         }
3838
3839         /*
3840          * Repeat with temperatures used for fan control.
3841          * This set of registers does not support limits.
3842          */
3843         for (i = 0; i < num_reg_temp_mon; i++) {
3844                 if (reg_temp_mon[i] == 0)
3845                         continue;
3846
3847                 src = nct6775_read_value(data, data->REG_TEMP_SEL[i]) & 0x1f;
3848                 if (!src || (mask & (1 << src)))
3849                         continue;
3850
3851                 if (src >= data->temp_label_num ||
3852                     !strlen(data->temp_label[src])) {
3853                         dev_info(dev,
3854                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3855                                  src, i, data->REG_TEMP_SEL[i],
3856                                  reg_temp_mon[i]);
3857                         continue;
3858                 }
3859
3860                 mask |= 1 << src;
3861
3862                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3863                 if (src <= data->temp_fixed_num) {
3864                         if (data->have_temp & (1 << (src - 1)))
3865                                 continue;
3866                         data->have_temp |= 1 << (src - 1);
3867                         data->have_temp_fixed |= 1 << (src - 1);
3868                         data->reg_temp[0][src - 1] = reg_temp_mon[i];
3869                         data->temp_src[src - 1] = src;
3870                         continue;
3871                 }
3872
3873                 if (s >= NUM_TEMP)
3874                         continue;
3875
3876                 /* Use dynamic index for other sources */
3877                 data->have_temp |= 1 << s;
3878                 data->reg_temp[0][s] = reg_temp_mon[i];
3879                 data->temp_src[s] = src;
3880                 s++;
3881         }
3882
3883 #ifdef USE_ALTERNATE
3884         /*
3885          * Go through the list of alternate temp registers and enable
3886          * if possible.
3887          * The temperature is already monitored if the respective bit in <mask>
3888          * is set.
3889          */
3890         for (i = 0; i < data->temp_label_num - 1; i++) {
3891                 if (!reg_temp_alternate[i])
3892                         continue;
3893                 if (mask & (1 << (i + 1)))
3894                         continue;
3895                 if (i < data->temp_fixed_num) {
3896                         if (data->have_temp & (1 << i))
3897                                 continue;
3898                         data->have_temp |= 1 << i;
3899                         data->have_temp_fixed |= 1 << i;
3900                         data->reg_temp[0][i] = reg_temp_alternate[i];
3901                         if (i < num_reg_temp) {
3902                                 data->reg_temp[1][i] = reg_temp_over[i];
3903                                 data->reg_temp[2][i] = reg_temp_hyst[i];
3904                         }
3905                         data->temp_src[i] = i + 1;
3906                         continue;
3907                 }
3908
3909                 if (s >= NUM_TEMP)      /* Abort if no more space */
3910                         break;
3911
3912                 data->have_temp |= 1 << s;
3913                 data->reg_temp[0][s] = reg_temp_alternate[i];
3914                 data->temp_src[s] = i + 1;
3915                 s++;
3916         }
3917 #endif /* USE_ALTERNATE */
3918
3919         /* Initialize the chip */
3920         nct6775_init_device(data);
3921
3922         err = superio_enter(sio_data->sioreg);
3923         if (err)
3924                 return err;
3925
3926         cr2a = superio_inb(sio_data->sioreg, 0x2a);
3927         switch (data->kind) {
3928         case nct6775:
3929                 data->have_vid = (cr2a & 0x40);
3930                 break;
3931         case nct6776:
3932                 data->have_vid = (cr2a & 0x60) == 0x40;
3933                 break;
3934         case nct6106:
3935         case nct6779:
3936         case nct6791:
3937         case nct6792:
3938                 break;
3939         }
3940
3941         /*
3942          * Read VID value
3943          * We can get the VID input values directly at logical device D 0xe3.
3944          */
3945         if (data->have_vid) {
3946                 superio_select(sio_data->sioreg, NCT6775_LD_VID);
3947                 data->vid = superio_inb(sio_data->sioreg, 0xe3);
3948                 data->vrm = vid_which_vrm();
3949         }
3950
3951         if (fan_debounce) {
3952                 u8 tmp;
3953
3954                 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3955                 tmp = superio_inb(sio_data->sioreg,
3956                                   NCT6775_REG_CR_FAN_DEBOUNCE);
3957                 switch (data->kind) {
3958                 case nct6106:
3959                         tmp |= 0xe0;
3960                         break;
3961                 case nct6775:
3962                         tmp |= 0x1e;
3963                         break;
3964                 case nct6776:
3965                 case nct6779:
3966                         tmp |= 0x3e;
3967                         break;
3968                 case nct6791:
3969                 case nct6792:
3970                         tmp |= 0x7e;
3971                         break;
3972                 }
3973                 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
3974                              tmp);
3975                 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
3976                          data->name);
3977         }
3978
3979         nct6775_check_fan_inputs(data);
3980
3981         superio_exit(sio_data->sioreg);
3982
3983         /* Read fan clock dividers immediately */
3984         nct6775_init_fan_common(dev, data);
3985
3986         /* Register sysfs hooks */
3987         group = nct6775_create_attr_group(dev, &nct6775_pwm_template_group,
3988                                           data->pwm_num);
3989         if (IS_ERR(group))
3990                 return PTR_ERR(group);
3991
3992         data->groups[num_attr_groups++] = group;
3993
3994         group = nct6775_create_attr_group(dev, &nct6775_in_template_group,
3995                                           fls(data->have_in));
3996         if (IS_ERR(group))
3997                 return PTR_ERR(group);
3998
3999         data->groups[num_attr_groups++] = group;
4000
4001         group = nct6775_create_attr_group(dev, &nct6775_fan_template_group,
4002                                           fls(data->has_fan));
4003         if (IS_ERR(group))
4004                 return PTR_ERR(group);
4005
4006         data->groups[num_attr_groups++] = group;
4007
4008         group = nct6775_create_attr_group(dev, &nct6775_temp_template_group,
4009                                           fls(data->have_temp));
4010         if (IS_ERR(group))
4011                 return PTR_ERR(group);
4012
4013         data->groups[num_attr_groups++] = group;
4014         data->groups[num_attr_groups++] = &nct6775_group_other;
4015
4016 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4017         err = sysfs_create_groups(&dev->kobj, data->groups);
4018         if (err < 0)
4019                 return err;
4020         hwmon_dev = hwmon_device_register(dev);
4021         if (IS_ERR(hwmon_dev)) {
4022                 sysfs_remove_groups(&dev->kobj, data->groups);
4023                 return PTR_ERR(hwmon_dev);
4024         }
4025         data->hwmon_dev = hwmon_dev;
4026 #else
4027         hwmon_dev = devm_hwmon_device_register_with_groups(dev, data->name,
4028                                                            data, data->groups);
4029 #endif
4030         return PTR_ERR_OR_ZERO(hwmon_dev);
4031 }
4032
4033 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4034 static int nct6775_remove(struct platform_device *pdev)
4035 {
4036         struct nct6775_data *data = platform_get_drvdata(pdev);
4037
4038         hwmon_device_unregister(data->hwmon_dev);
4039         sysfs_remove_groups(&pdev->dev.kobj, data->groups);
4040         return 0;
4041 }
4042 #endif
4043
4044 static void nct6791_enable_io_mapping(int sioaddr)
4045 {
4046         int val;
4047
4048         val = superio_inb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE);
4049         if (val & 0x10) {
4050                 pr_info("Enabling hardware monitor logical device mappings.\n");
4051                 superio_outb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE,
4052                              val & ~0x10);
4053         }
4054 }
4055
4056 static int __maybe_unused nct6775_suspend(struct device *dev)
4057 {
4058         struct nct6775_data *data = nct6775_update_device(dev);
4059
4060         mutex_lock(&data->update_lock);
4061         data->vbat = nct6775_read_value(data, data->REG_VBAT);
4062         if (data->kind == nct6775) {
4063                 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
4064                 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
4065         }
4066         mutex_unlock(&data->update_lock);
4067
4068         return 0;
4069 }
4070
4071 static int __maybe_unused nct6775_resume(struct device *dev)
4072 {
4073         struct nct6775_data *data = dev_get_drvdata(dev);
4074         int sioreg = data->sioreg;
4075         int i, j, err = 0;
4076         u8 reg;
4077
4078         mutex_lock(&data->update_lock);
4079         data->bank = 0xff;              /* Force initial bank selection */
4080
4081         err = superio_enter(sioreg);
4082         if (err)
4083                 goto abort;
4084
4085         superio_select(sioreg, NCT6775_LD_HWM);
4086         reg = superio_inb(sioreg, SIO_REG_ENABLE);
4087         if (reg != data->sio_reg_enable)
4088                 superio_outb(sioreg, SIO_REG_ENABLE, data->sio_reg_enable);
4089
4090         if (data->kind == nct6791 || data->kind == nct6792)
4091                 nct6791_enable_io_mapping(sioreg);
4092
4093         superio_exit(sioreg);
4094
4095         /* Restore limits */
4096         for (i = 0; i < data->in_num; i++) {
4097                 if (!(data->have_in & (1 << i)))
4098                         continue;
4099
4100                 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
4101                                     data->in[i][1]);
4102                 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
4103                                     data->in[i][2]);
4104         }
4105
4106         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
4107                 if (!(data->has_fan_min & (1 << i)))
4108                         continue;
4109
4110                 nct6775_write_value(data, data->REG_FAN_MIN[i],
4111                                     data->fan_min[i]);
4112         }
4113
4114         for (i = 0; i < NUM_TEMP; i++) {
4115                 if (!(data->have_temp & (1 << i)))
4116                         continue;
4117
4118                 for (j = 1; j < ARRAY_SIZE(data->reg_temp); j++)
4119                         if (data->reg_temp[j][i])
4120                                 nct6775_write_temp(data, data->reg_temp[j][i],
4121                                                    data->temp[j][i]);
4122         }
4123
4124         /* Restore other settings */
4125         nct6775_write_value(data, data->REG_VBAT, data->vbat);
4126         if (data->kind == nct6775) {
4127                 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
4128                 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
4129         }
4130
4131 abort:
4132         /* Force re-reading all values */
4133         data->valid = false;
4134         mutex_unlock(&data->update_lock);
4135
4136         return err;
4137 }
4138
4139 static SIMPLE_DEV_PM_OPS(nct6775_dev_pm_ops, nct6775_suspend, nct6775_resume);
4140
4141 static struct platform_driver nct6775_driver = {
4142         .driver = {
4143                 .owner  = THIS_MODULE,
4144                 .name   = DRVNAME,
4145                 .pm     = &nct6775_dev_pm_ops,
4146         },
4147         .probe          = nct6775_probe,
4148 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4149         .remove         = nct6775_remove,
4150 #endif
4151 };
4152
4153 static const char * const nct6775_sio_names[] __initconst = {
4154         "NCT6106D",
4155         "NCT6775F",
4156         "NCT6776D/F",
4157         "NCT6779D",
4158         "NCT6791D",
4159         "NCT6792D",
4160 };
4161
4162 /* nct6775_find() looks for a '627 in the Super-I/O config space */
4163 static int __init nct6775_find(int sioaddr, struct nct6775_sio_data *sio_data)
4164 {
4165         u16 val;
4166         int err;
4167         int addr;
4168
4169         err = superio_enter(sioaddr);
4170         if (err)
4171                 return err;
4172
4173         if (force_id)
4174                 val = force_id;
4175         else
4176                 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
4177                     | superio_inb(sioaddr, SIO_REG_DEVID + 1);
4178         switch (val & SIO_ID_MASK) {
4179         case SIO_NCT6106_ID:
4180                 sio_data->kind = nct6106;
4181                 break;
4182         case SIO_NCT6775_ID:
4183                 sio_data->kind = nct6775;
4184                 break;
4185         case SIO_NCT6776_ID:
4186                 sio_data->kind = nct6776;
4187                 break;
4188         case SIO_NCT6779_ID:
4189                 sio_data->kind = nct6779;
4190                 break;
4191         case SIO_NCT6791_ID:
4192                 sio_data->kind = nct6791;
4193                 break;
4194         case SIO_NCT6792_ID:
4195                 sio_data->kind = nct6792;
4196                 break;
4197         default:
4198                 if (val != 0xffff)
4199                         pr_debug("unsupported chip ID: 0x%04x\n", val);
4200                 superio_exit(sioaddr);
4201                 return -ENODEV;
4202         }
4203
4204         /* We have a known chip, find the HWM I/O address */
4205         superio_select(sioaddr, NCT6775_LD_HWM);
4206         val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
4207             | superio_inb(sioaddr, SIO_REG_ADDR + 1);
4208         addr = val & IOREGION_ALIGNMENT;
4209         if (addr == 0) {
4210                 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
4211                 superio_exit(sioaddr);
4212                 return -ENODEV;
4213         }
4214
4215         /* Activate logical device if needed */
4216         val = superio_inb(sioaddr, SIO_REG_ENABLE);
4217         if (!(val & 0x01)) {
4218                 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
4219                 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
4220         }
4221
4222         if (sio_data->kind == nct6791 || sio_data->kind == nct6792)
4223                 nct6791_enable_io_mapping(sioaddr);
4224
4225         superio_exit(sioaddr);
4226         pr_info("Found %s or compatible chip at %#x:%#x\n",
4227                 nct6775_sio_names[sio_data->kind], sioaddr, addr);
4228         sio_data->sioreg = sioaddr;
4229
4230         return addr;
4231 }
4232
4233 /*
4234  * when Super-I/O functions move to a separate file, the Super-I/O
4235  * bus will manage the lifetime of the device and this module will only keep
4236  * track of the nct6775 driver. But since we use platform_device_alloc(), we
4237  * must keep track of the device
4238  */
4239 static struct platform_device *pdev[2];
4240
4241 static int __init sensors_nct6775_init(void)
4242 {
4243         int i, err;
4244         bool found = false;
4245         int address;
4246         struct resource res;
4247         struct nct6775_sio_data sio_data;
4248         int sioaddr[2] = { 0x2e, 0x4e };
4249
4250         err = platform_driver_register(&nct6775_driver);
4251         if (err)
4252                 return err;
4253
4254         /*
4255          * initialize sio_data->kind and sio_data->sioreg.
4256          *
4257          * when Super-I/O functions move to a separate file, the Super-I/O
4258          * driver will probe 0x2e and 0x4e and auto-detect the presence of a
4259          * nct6775 hardware monitor, and call probe()
4260          */
4261         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4262                 address = nct6775_find(sioaddr[i], &sio_data);
4263                 if (address <= 0)
4264                         continue;
4265
4266                 found = true;
4267
4268                 pdev[i] = platform_device_alloc(DRVNAME, address);
4269                 if (!pdev[i]) {
4270                         err = -ENOMEM;
4271                         goto exit_device_unregister;
4272                 }
4273
4274                 err = platform_device_add_data(pdev[i], &sio_data,
4275                                                sizeof(struct nct6775_sio_data));
4276                 if (err)
4277                         goto exit_device_put;
4278
4279                 memset(&res, 0, sizeof(res));
4280                 res.name = DRVNAME;
4281                 res.start = address + IOREGION_OFFSET;
4282                 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
4283                 res.flags = IORESOURCE_IO;
4284
4285                 err = acpi_check_resource_conflict(&res);
4286                 if (err) {
4287                         platform_device_put(pdev[i]);
4288                         pdev[i] = NULL;
4289                         continue;
4290                 }
4291
4292                 err = platform_device_add_resources(pdev[i], &res, 1);
4293                 if (err)
4294                         goto exit_device_put;
4295
4296                 /* platform_device_add calls probe() */
4297                 err = platform_device_add(pdev[i]);
4298                 if (err)
4299                         goto exit_device_put;
4300         }
4301         if (!found) {
4302                 err = -ENODEV;
4303                 goto exit_unregister;
4304         }
4305
4306         return 0;
4307
4308 exit_device_put:
4309         platform_device_put(pdev[i]);
4310 exit_device_unregister:
4311         while (--i >= 0) {
4312                 if (pdev[i])
4313                         platform_device_unregister(pdev[i]);
4314         }
4315 exit_unregister:
4316         platform_driver_unregister(&nct6775_driver);
4317         return err;
4318 }
4319
4320 static void __exit sensors_nct6775_exit(void)
4321 {
4322         int i;
4323
4324         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4325                 if (pdev[i])
4326                         platform_device_unregister(pdev[i]);
4327         }
4328         platform_driver_unregister(&nct6775_driver);
4329 }
4330
4331 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4332 MODULE_DESCRIPTION("NCT6106D/NCT6775F/NCT6776F/NCT6779D/NCT6791D/NCT6792D driver");
4333 MODULE_LICENSE("GPL");
4334
4335 module_init(sensors_nct6775_init);
4336 module_exit(sensors_nct6775_exit);