2 * nct6775 - Driver for the hardware monitoring functionality of
3 * Nuvoton NCT677x Super-I/O chips
5 * Copyright (C) 2012 Guenter Roeck <linux@roeck-us.net>
7 * Derived from w83627ehf driver
8 * Copyright (C) 2005-2011 Jean Delvare <khali@linux-fr.org>
9 * Copyright (C) 2006 Yuan Mu (Winbond),
10 * Rudolf Marek <r.marek@assembler.cz>
11 * David Hubbard <david.c.hubbard@gmail.com>
12 * Daniel J Blueman <daniel.blueman@gmail.com>
13 * Copyright (C) 2010 Sheng-Yuan Huang (Nuvoton) (PS00)
15 * Shamelessly ripped from the w83627hf driver
16 * Copyright (C) 2003 Mark Studebaker
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
33 * Supports the following chips:
35 * Chip #vin #fan #pwm #temp chip IDs man ID
36 * nct6775f 9 4 3 6+3 0xb470 0xc1 0x5ca3
37 * nct6776f 9 5 3 6+3 0xc330 0xc1 0x5ca3
38 * nct6779d 15 5 5 2+5 0xc560 0xc1 0x5ca3
41 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
43 #include <linux/module.h>
44 #include <linux/init.h>
45 #include <linux/slab.h>
46 #include <linux/jiffies.h>
47 #include <linux/platform_device.h>
48 #include <linux/hwmon.h>
49 #include <linux/hwmon-sysfs.h>
50 #include <linux/hwmon-vid.h>
51 #include <linux/err.h>
52 #include <linux/mutex.h>
53 #include <linux/acpi.h>
59 enum kinds { nct6775, nct6776, nct6779 };
61 /* used to set data->name = nct6775_device_names[data->sio_kind] */
62 static const char * const nct6775_device_names[] = {
68 static unsigned short force_id;
69 module_param(force_id, ushort, 0);
70 MODULE_PARM_DESC(force_id, "Override the detected device ID");
72 static unsigned short fan_debounce;
73 module_param(fan_debounce, ushort, 0);
74 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
76 #define DRVNAME "nct6775"
79 * Super-I/O constants and functions
82 #define NCT6775_LD_ACPI 0x0a
83 #define NCT6775_LD_HWM 0x0b
84 #define NCT6775_LD_VID 0x0d
86 #define SIO_REG_LDSEL 0x07 /* Logical device select */
87 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
88 #define SIO_REG_EN_VRM10 0x2C /* GPIO3, GPIO4 selection */
89 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
90 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
91 #define SIO_REG_VID_CTRL 0xF0 /* VID control */
92 #define SIO_REG_VID_DATA 0xF1 /* VID data */
94 #define SIO_NCT6775_ID 0xb470
95 #define SIO_NCT6776_ID 0xc330
96 #define SIO_NCT6779_ID 0xc560
97 #define SIO_ID_MASK 0xFFF0
100 superio_outb(int ioreg, int reg, int val)
103 outb(val, ioreg + 1);
107 superio_inb(int ioreg, int reg)
110 return inb(ioreg + 1);
114 superio_select(int ioreg, int ld)
116 outb(SIO_REG_LDSEL, ioreg);
121 superio_enter(int ioreg)
128 superio_exit(int ioreg)
132 outb(0x02, ioreg + 1);
139 #define IOREGION_ALIGNMENT (~7)
140 #define IOREGION_OFFSET 5
141 #define IOREGION_LENGTH 2
142 #define ADDR_REG_OFFSET 0
143 #define DATA_REG_OFFSET 1
145 #define NCT6775_REG_BANK 0x4E
146 #define NCT6775_REG_CONFIG 0x40
149 * Not currently used:
150 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
151 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
152 * REG_MAN_ID is at port 0x4f
153 * REG_CHIP_ID is at port 0x58
156 /* Voltage min/max registers for nr=7..14 are in bank 5 */
158 static const u16 NCT6775_REG_IN_MAX[] = {
159 0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
160 0x55c, 0x55e, 0x560, 0x562 };
161 static const u16 NCT6775_REG_IN_MIN[] = {
162 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
163 0x55d, 0x55f, 0x561, 0x563 };
164 static const u16 NCT6775_REG_IN[] = {
165 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
168 static const u16 NCT6779_REG_IN[] = {
169 0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
170 0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e
173 #define NCT6775_REG_VBAT 0x5D
174 #define NCT6775_REG_DIODE 0x5E
176 #define NCT6775_REG_FANDIV1 0x506
177 #define NCT6775_REG_FANDIV2 0x507
179 #define NCT6775_REG_CR_FAN_DEBOUNCE 0xf0
181 static const u16 NCT6775_REG_ALARM[6] = { 0x459, 0x45A, 0x45B };
182 static const u16 NCT6779_REG_ALARM[6] = { 0x459, 0x45A, 0x45B, 0x568 };
184 /* 0..15 voltages, 16..23 fans, 24..31 temperatures */
186 static const s8 NCT6775_ALARM_BITS[]
187 = { 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
188 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
190 6, 7, 11, 10, 23, /* fan1..fan5 */
191 -1, -1, -1, /* unused */
192 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
193 12, -1 }; /* intrusion0, intrusion1 */
195 static const s8 NCT6776_ALARM_BITS[]
196 = { 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
197 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
199 6, 7, 11, 10, 23, /* fan1..fan5 */
200 -1, -1, -1, /* unused */
201 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
202 12, 9 }; /* intrusion0, intrusion1 */
204 static const s8 NCT6779_ALARM_BITS[]
205 = { 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
206 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */
208 6, 7, 11, 10, 23, /* fan1..fan5 */
209 -1, -1, -1, /* unused */
210 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
211 12, 9 }; /* intrusion0, intrusion1 */
213 #define FAN_ALARM_BASE 16
214 #define TEMP_ALARM_BASE 24
215 #define INTRUSION_ALARM_BASE 30
217 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
218 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
220 /* DC or PWM output fan configuration */
221 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
222 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
224 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0 };
225 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0 };
227 /* Advanced Fan control, some values are common for all fans */
229 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
230 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
231 static const u16 NCT6779_REG_FAN_PULSES[]
232 = { 0x644, 0x645, 0x646, 0x647, 0x648 };
234 static const u16 NCT6775_REG_TARGET[] = { 0x101, 0x201, 0x301, 0x801, 0x901 };
235 static const u16 NCT6775_REG_FAN_MODE[] = { 0x102, 0x202, 0x302, 0x802, 0x902 };
236 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
237 0x103, 0x203, 0x303, 0x803, 0x903 };
238 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
239 0x104, 0x204, 0x304, 0x804, 0x904 };
240 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
241 0x105, 0x205, 0x305, 0x805, 0x905 };
242 static const u16 NCT6775_REG_FAN_START_OUTPUT[]
243 = { 0x106, 0x206, 0x306, 0x806, 0x906 };
244 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
245 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
247 static const u16 NCT6775_REG_FAN_STOP_TIME[]
248 = { 0x107, 0x207, 0x307, 0x807, 0x907 };
249 static const u16 NCT6775_REG_PWM[] = { 0x109, 0x209, 0x309, 0x809, 0x909 };
250 static const u16 NCT6775_REG_PWM_READ[] = { 0x01, 0x03, 0x11, 0x13, 0x15 };
252 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
253 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
255 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642};
257 static const u16 NCT6779_REG_FAN[] = { 0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8 };
259 static const u16 NCT6779_REG_TOLERANCE_H[]
260 = { 0x10c, 0x20c, 0x30c, 0x80c, 0x90c };
262 static const u16 NCT6775_REG_TEMP[]
263 = { 0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
264 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
266 static const u16 NCT6775_REG_TEMP_CONFIG[]
267 = { 0, 0x152, 0x252, 0x628, 0x629, 0x62A };
268 static const u16 NCT6775_REG_TEMP_HYST[]
269 = { 0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
270 static const u16 NCT6775_REG_TEMP_OVER[]
271 = { 0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
273 static const u16 NCT6775_REG_TEMP_SOURCE[]
274 = { 0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
276 static const u16 NCT6775_REG_TEMP_SEL[]
277 = { 0x100, 0x200, 0x300, 0x800, 0x900 };
279 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[]
280 = { 0x139, 0x239, 0x339, 0x839, 0x939 };
281 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[]
282 = { 0x13a, 0x23a, 0x33a, 0x83a, 0x93a };
283 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[]
284 = { 0x13b, 0x23b, 0x33b, 0x83b, 0x93b };
285 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[]
286 = { 0x13c, 0x23c, 0x33c, 0x83c, 0x93c };
287 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[]
288 = { 0x13d, 0x23d, 0x33d, 0x83d, 0x93d };
290 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[]
291 = { 0x13e, 0x23e, 0x33e, 0x83e, 0x93e };
293 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
295 static const u16 NCT6779_REG_TEMP_OFFSET[]
296 = { 0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
298 static const u16 NCT6776_REG_TEMP_CONFIG[11]
299 = { 0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
301 static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b };
303 static const u16 NCT6775_REG_AUTO_TEMP[]
304 = { 0x121, 0x221, 0x321, 0x821, 0x921 };
305 static const u16 NCT6775_REG_AUTO_PWM[]
306 = { 0x127, 0x227, 0x327, 0x827, 0x927 };
308 #define NCT6775_AUTO_TEMP(data, nr, p) ((data)->REG_AUTO_TEMP[nr] + (p))
309 #define NCT6775_AUTO_PWM(data, nr, p) ((data)->REG_AUTO_PWM[nr] + (p))
311 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
313 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
314 0x135, 0x235, 0x335, 0x835, 0x935 };
315 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
316 0x138, 0x238, 0x338, 0x838, 0x938 };
318 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
319 0x136, 0x236, 0x336, 0x836, 0x936 };
320 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
321 0x137, 0x237, 0x337, 0x837, 0x937 };
323 static const char *const nct6775_temp_label[] = {
337 "PCH_CHIP_CPU_MAX_TEMP",
347 static const char *const nct6776_temp_label[] = {
362 "PCH_CHIP_CPU_MAX_TEMP",
373 static const char *const nct6779_temp_label[] = {
392 "PCH_CHIP_CPU_MAX_TEMP",
403 static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
404 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
406 static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
407 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
409 static const u16 NCT6779_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6779_temp_label) - 1]
410 = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
411 0, 0, 0, 0, 0, 0, 0, 0,
412 0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
415 #define NUM_TEMP 10 /* Max number of temp attribute sets w/ limits*/
416 #define NUM_TEMP_FIXED 6 /* Max number of fixed temp attribute sets */
418 static inline int reg_to_pwm_enable(int pwm, int mode)
420 if (mode == 0 && pwm == 255)
425 static inline int pwm_enable_to_reg(int mode)
436 /* 1 is DC mode, output in ms */
437 static inline unsigned int step_time_from_reg(u8 reg, u8 mode)
439 return mode ? 400 * reg : 100 * reg;
442 static inline u8 step_time_to_reg(unsigned int msec, u8 mode)
444 return SENSORS_LIMIT((mode ? (msec + 200) / 400 :
445 (msec + 50) / 100), 1, 255);
448 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
450 if (reg == 0 || reg == 255)
452 return 1350000U / (reg << divreg);
455 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
457 if ((reg & 0xff1f) == 0xff1f)
460 reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
465 return 1350000U / reg;
468 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
470 if (reg == 0 || reg == 0xffff)
474 * Even though the registers are 16 bit wide, the fan divisor
477 return 1350000U / (reg << divreg);
480 static inline unsigned int
487 * Some of the voltage inputs have internal scaling, the tables below
488 * contain 8 (the ADC LSB in mV) * scaling factor * 100
490 static const u16 scale_in[15] = {
491 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
495 static inline long in_from_reg(u8 reg, u8 nr)
497 return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
500 static inline u8 in_to_reg(u32 val, u8 nr)
502 return SENSORS_LIMIT(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0,
507 * Data structures and manipulation thereof
510 struct nct6775_data {
511 int addr; /* IO base of hw monitor block */
515 struct device *hwmon_dev;
518 u16 reg_temp[3][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst */
519 u8 temp_src[NUM_TEMP];
520 u16 reg_temp_config[NUM_TEMP];
521 const char * const *temp_label;
528 const s8 *ALARM_BITS;
531 const u16 *REG_IN_MINMAX[2];
533 const u16 *REG_TARGET;
535 const u16 *REG_FAN_MODE;
536 const u16 *REG_FAN_MIN;
537 const u16 *REG_FAN_TIME[3];
539 const u8 *REG_PWM_MODE;
540 const u8 *PWM_MODE_MASK;
542 const u16 *REG_PWM[7]; /* [0]=pwm, [1]=start_output, [2]=stop_output,
543 * [3]=max_output, [4]=step_output,
544 * [5]=weight_duty_step, [6]=weight_duty_base
546 const u16 *REG_PWM_READ;
548 const u16 *REG_TEMP_MON;
549 const u16 *REG_AUTO_TEMP;
550 const u16 *REG_AUTO_PWM;
552 const u16 *REG_CRITICAL_TEMP;
553 const u16 *REG_CRITICAL_TEMP_TOLERANCE;
555 const u16 *REG_TEMP_SOURCE; /* temp register sources */
556 const u16 *REG_TEMP_SEL[2]; /* pwm temp, 0=base, 1=weight */
558 const u16 *REG_WEIGHT_TEMP[3]; /* 0=base, 1=hyst, 2=step */
560 const u16 *REG_TEMP_OFFSET;
562 const u16 *REG_ALARM;
564 unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
565 unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
567 struct mutex update_lock;
568 char valid; /* !=0 if following fields are valid */
569 unsigned long last_updated; /* In jiffies */
571 /* Register values */
572 u8 bank; /* current register bank */
573 u8 in_num; /* number of in inputs we have */
574 u8 in[15][3]; /* [0]=in, [1]=in_max, [2]=in_min */
579 u8 has_fan; /* some fan inputs can be disabled */
580 u8 has_fan_min; /* some fans don't have min register */
583 u8 temp_fixed_num; /* 3 or 6 */
584 u8 temp_type[NUM_TEMP_FIXED];
585 s8 temp_offset[NUM_TEMP_FIXED];
586 s16 temp[3][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst */
589 u8 pwm_num; /* number of pwm */
591 u8 pwm_mode[5]; /* 1->DC variable voltage, 0->PWM variable duty cycle */
592 u8 pwm_enable[5]; /* 0->off
594 * 2->thermal cruise mode (also called SmartFan I)
595 * 3->fan speed cruise mode
597 * 5->enhanced variable thermal cruise (SmartFan IV)
599 u8 pwm[7][5]; /* [0]=pwm, [1]=start_output, [2]=stop_output,
600 * [3]=max_output, [4]=step_output,
601 * [5]=weight_duty_step, [6]=weight_duty_base
607 u8 fan_time[3][5]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
609 /* Automatic fan speed control registers */
614 u8 pwm_temp_sel[2][5];
616 bool pwm_sel_enable[2][5];/* 0->stop_val, 1->weight;
617 * false->off, true->on
619 u8 weight_temp[3][5]; /* 0->temp_step, 1->temp_step_tol,
631 struct nct6775_sio_data {
636 static bool is_word_sized(struct nct6775_data *data, u16 reg)
638 switch (data->kind) {
640 return (((reg & 0xff00) == 0x100 ||
641 (reg & 0xff00) == 0x200) &&
642 ((reg & 0x00ff) == 0x50 ||
643 (reg & 0x00ff) == 0x53 ||
644 (reg & 0x00ff) == 0x55)) ||
645 (reg & 0xfff0) == 0x630 ||
646 reg == 0x640 || reg == 0x642 ||
648 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
649 reg == 0x73 || reg == 0x75 || reg == 0x77;
651 return (((reg & 0xff00) == 0x100 ||
652 (reg & 0xff00) == 0x200) &&
653 ((reg & 0x00ff) == 0x50 ||
654 (reg & 0x00ff) == 0x53 ||
655 (reg & 0x00ff) == 0x55)) ||
656 (reg & 0xfff0) == 0x630 ||
658 reg == 0x640 || reg == 0x642 ||
659 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
660 reg == 0x73 || reg == 0x75 || reg == 0x77;
662 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
663 ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x09) ||
665 reg == 0x63a || reg == 0x63c || reg == 0x63e ||
666 reg == 0x640 || reg == 0x642 ||
667 reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
674 * On older chips, only registers 0x50-0x5f are banked.
675 * On more recent chips, all registers are banked.
676 * Assume that is the case and set the bank number for each access.
677 * Cache the bank number so it only needs to be set if it changes.
679 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
682 if (data->bank != bank) {
683 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
684 outb_p(bank, data->addr + DATA_REG_OFFSET);
689 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
691 int res, word_sized = is_word_sized(data, reg);
693 mutex_lock(&data->lock);
695 nct6775_set_bank(data, reg);
696 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
697 res = inb_p(data->addr + DATA_REG_OFFSET);
699 outb_p((reg & 0xff) + 1,
700 data->addr + ADDR_REG_OFFSET);
701 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
704 mutex_unlock(&data->lock);
708 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
710 int word_sized = is_word_sized(data, reg);
712 mutex_lock(&data->lock);
714 nct6775_set_bank(data, reg);
715 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
717 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
718 outb_p((reg & 0xff) + 1,
719 data->addr + ADDR_REG_OFFSET);
721 outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
723 mutex_unlock(&data->lock);
727 /* We left-align 8-bit temperature values to make the code simpler */
728 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
732 res = nct6775_read_value(data, reg);
733 if (!is_word_sized(data, reg))
739 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
741 if (!is_word_sized(data, reg))
743 return nct6775_write_value(data, reg, value);
746 /* This function assumes that the caller holds data->update_lock */
747 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
753 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
754 | (data->fan_div[0] & 0x7);
755 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
758 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
759 | ((data->fan_div[1] << 4) & 0x70);
760 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
762 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
763 | (data->fan_div[2] & 0x7);
764 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
767 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
768 | ((data->fan_div[3] << 4) & 0x70);
769 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
774 static void nct6775_write_fan_div_common(struct device *dev,
775 struct nct6775_data *data, int nr)
777 if (data->kind == nct6775)
778 nct6775_write_fan_div(data, nr);
781 static void nct6775_update_fan_div(struct nct6775_data *data)
785 i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
786 data->fan_div[0] = i & 0x7;
787 data->fan_div[1] = (i & 0x70) >> 4;
788 i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
789 data->fan_div[2] = i & 0x7;
790 if (data->has_fan & (1<<3))
791 data->fan_div[3] = (i & 0x70) >> 4;
794 static void nct6775_update_fan_div_common(struct device *dev,
795 struct nct6775_data *data)
797 if (data->kind == nct6775)
798 nct6775_update_fan_div(data);
801 static void nct6775_update_pwm(struct device *dev)
803 struct nct6775_data *data = dev_get_drvdata(dev);
808 for (i = 0; i < data->pwm_num; i++) {
809 if (!(data->has_pwm & (1 << i)))
812 duty_is_dc = data->REG_PWM_MODE[i] &&
813 (nct6775_read_value(data, data->REG_PWM_MODE[i])
814 & data->PWM_MODE_MASK[i]);
815 data->pwm_mode[i] = duty_is_dc;
817 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
818 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
819 if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
821 = nct6775_read_value(data,
822 data->REG_PWM[j][i]);
826 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
827 (fanmodecfg >> 4) & 7);
829 data->tolerance[i][0] = fanmodecfg & 0x0f;
830 if (data->kind == nct6779) {
831 reg = nct6775_read_value(data,
832 NCT6779_REG_TOLERANCE_H[i]);
833 data->tolerance[i][0] |= (reg & 0x70) >> 1;
835 data->tolerance[i][1] =
836 nct6775_read_value(data,
837 data->REG_CRITICAL_TEMP_TOLERANCE[i]);
839 data->pwm_sel_enable[0][i] =
840 nct6775_read_value(data, data->REG_TEMP_SEL[0][i])
842 data->pwm_sel_enable[1][i] =
843 nct6775_read_value(data, data->REG_TEMP_SEL[1][i])
847 for (j = 0; j < 2; j++) {
848 reg = nct6775_read_value(data,
849 data->REG_TEMP_SEL[j][i]);
850 data->pwm_temp_sel[j][i] = reg & 0x1f;
852 /* Weight temp data */
853 for (j = 0; j < 3; j++) {
854 data->weight_temp[j][i]
855 = nct6775_read_value(data,
856 data->REG_WEIGHT_TEMP[j][i]);
861 static void nct6775_update_pwm_limits(struct device *dev)
863 struct nct6775_data *data = dev_get_drvdata(dev);
867 for (i = 0; i < data->pwm_num; i++) {
868 if (!(data->has_pwm & (1 << i)))
871 for (j = 0; j < 3; j++) {
872 data->fan_time[j][i] =
873 nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
876 data->target_temp[i] =
877 nct6775_read_value(data, data->REG_TARGET[i]) &
878 (data->pwm_mode[i] ? 0xff : 0x7f);
880 nct6775_read_value(data, data->REG_TEMP_MON[i]);
882 for (j = 0; j < data->auto_pwm_num; j++) {
883 data->auto_pwm[i][j] =
884 nct6775_read_value(data,
885 NCT6775_AUTO_PWM(data, i, j));
886 data->auto_temp[i][j] =
887 nct6775_read_value(data,
888 NCT6775_AUTO_TEMP(data, i, j));
891 /* critical auto_pwm temperature data */
892 data->auto_temp[i][data->auto_pwm_num] =
893 nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
895 switch (data->kind) {
897 reg = nct6775_read_value(data,
898 NCT6775_REG_CRITICAL_ENAB[i]);
899 data->auto_pwm[i][data->auto_pwm_num] =
900 (reg & 0x02) ? 0xff : 0x00;
903 data->auto_pwm[i][data->auto_pwm_num] = 0xff;
906 reg = nct6775_read_value(data,
907 NCT6779_REG_CRITICAL_PWM_ENABLE[i]);
909 data->auto_pwm[i][data->auto_pwm_num] =
910 nct6775_read_value(data,
911 NCT6779_REG_CRITICAL_PWM[i]);
913 data->auto_pwm[i][data->auto_pwm_num] = 0xff;
919 static struct nct6775_data *nct6775_update_device(struct device *dev)
921 struct nct6775_data *data = dev_get_drvdata(dev);
924 mutex_lock(&data->update_lock);
926 if (time_after(jiffies, data->last_updated + HZ + HZ/2)
928 /* Fan clock dividers */
929 nct6775_update_fan_div_common(dev, data);
931 /* Measured voltages and limits */
932 for (i = 0; i < data->in_num; i++) {
933 if (!(data->have_in & (1 << i)))
936 data->in[i][0] = nct6775_read_value(data,
938 data->in[i][1] = nct6775_read_value(data,
939 data->REG_IN_MINMAX[0][i]);
940 data->in[i][2] = nct6775_read_value(data,
941 data->REG_IN_MINMAX[1][i]);
944 /* Measured fan speeds and limits */
945 for (i = 0; i < 5; i++) {
948 if (!(data->has_fan & (1 << i)))
951 reg = nct6775_read_value(data, data->REG_FAN[i]);
952 data->rpm[i] = data->fan_from_reg(reg,
955 if (data->has_fan_min & (1 << i))
956 data->fan_min[i] = nct6775_read_value(data,
957 data->REG_FAN_MIN[i]);
960 * If we failed to measure the fan speed and clock
961 * divider can be increased, let's try that for next
964 if (data->has_fan_div && (reg >= 0xff || reg == 0x00)
965 && data->fan_div[i] < 0x07) {
967 "Increasing fan%d clock divider from %u to %u\n",
968 i + 1, div_from_reg(data->fan_div[i]),
969 div_from_reg(data->fan_div[i] + 1));
971 nct6775_write_fan_div_common(dev, data, i);
972 /* Preserve min limit if possible */
973 if ((data->has_fan_min & (1 << i))
974 && data->fan_min[i] >= 2
975 && data->fan_min[i] != 255)
976 nct6775_write_value(data,
977 data->REG_FAN_MIN[i],
978 (data->fan_min[i] /= 2));
982 nct6775_update_pwm(dev);
983 nct6775_update_pwm_limits(dev);
985 /* Measured temperatures and limits */
986 for (i = 0; i < NUM_TEMP; i++) {
987 if (!(data->have_temp & (1 << i)))
989 for (j = 0; j < 3; j++) {
990 if (data->reg_temp[j][i])
992 = nct6775_read_temp(data,
993 data->reg_temp[j][i]);
995 if (!(data->have_temp_fixed & (1 << i)))
998 = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1002 for (i = 0; i < 6; i++) {
1004 if (!data->REG_ALARM[i])
1006 alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1007 data->alarms |= ((u64)alarm) << (i << 3);
1010 data->last_updated = jiffies;
1014 mutex_unlock(&data->update_lock);
1019 * Sysfs callback functions
1022 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1024 struct nct6775_data *data = nct6775_update_device(dev);
1025 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1027 int index = sattr->index;
1028 return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1032 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1035 struct nct6775_data *data = dev_get_drvdata(dev);
1036 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1038 int index = sattr->index;
1040 int err = kstrtoul(buf, 10, &val);
1043 mutex_lock(&data->update_lock);
1044 data->in[nr][index] = in_to_reg(val, nr);
1045 nct6775_write_value(data, data->REG_IN_MINMAX[index-1][nr],
1046 data->in[nr][index]);
1047 mutex_unlock(&data->update_lock);
1052 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1054 struct nct6775_data *data = nct6775_update_device(dev);
1055 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1056 int nr = data->ALARM_BITS[sattr->index];
1057 return sprintf(buf, "%u\n",
1058 (unsigned int)((data->alarms >> nr) & 0x01));
1061 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in_reg, NULL, 0, 0);
1062 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in_reg, NULL, 1, 0);
1063 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in_reg, NULL, 2, 0);
1064 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in_reg, NULL, 3, 0);
1065 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in_reg, NULL, 4, 0);
1066 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in_reg, NULL, 5, 0);
1067 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in_reg, NULL, 6, 0);
1068 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in_reg, NULL, 7, 0);
1069 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in_reg, NULL, 8, 0);
1070 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in_reg, NULL, 9, 0);
1071 static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in_reg, NULL, 10, 0);
1072 static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in_reg, NULL, 11, 0);
1073 static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in_reg, NULL, 12, 0);
1074 static SENSOR_DEVICE_ATTR_2(in13_input, S_IRUGO, show_in_reg, NULL, 13, 0);
1075 static SENSOR_DEVICE_ATTR_2(in14_input, S_IRUGO, show_in_reg, NULL, 14, 0);
1077 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
1078 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
1079 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
1080 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
1081 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 4);
1082 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 5);
1083 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 6);
1084 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 7);
1085 static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 8);
1086 static SENSOR_DEVICE_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 9);
1087 static SENSOR_DEVICE_ATTR(in10_alarm, S_IRUGO, show_alarm, NULL, 10);
1088 static SENSOR_DEVICE_ATTR(in11_alarm, S_IRUGO, show_alarm, NULL, 11);
1089 static SENSOR_DEVICE_ATTR(in12_alarm, S_IRUGO, show_alarm, NULL, 12);
1090 static SENSOR_DEVICE_ATTR(in13_alarm, S_IRUGO, show_alarm, NULL, 13);
1091 static SENSOR_DEVICE_ATTR(in14_alarm, S_IRUGO, show_alarm, NULL, 14);
1093 static SENSOR_DEVICE_ATTR_2(in0_min, S_IWUSR | S_IRUGO, show_in_reg,
1094 store_in_reg, 0, 1);
1095 static SENSOR_DEVICE_ATTR_2(in1_min, S_IWUSR | S_IRUGO, show_in_reg,
1096 store_in_reg, 1, 1);
1097 static SENSOR_DEVICE_ATTR_2(in2_min, S_IWUSR | S_IRUGO, show_in_reg,
1098 store_in_reg, 2, 1);
1099 static SENSOR_DEVICE_ATTR_2(in3_min, S_IWUSR | S_IRUGO, show_in_reg,
1100 store_in_reg, 3, 1);
1101 static SENSOR_DEVICE_ATTR_2(in4_min, S_IWUSR | S_IRUGO, show_in_reg,
1102 store_in_reg, 4, 1);
1103 static SENSOR_DEVICE_ATTR_2(in5_min, S_IWUSR | S_IRUGO, show_in_reg,
1104 store_in_reg, 5, 1);
1105 static SENSOR_DEVICE_ATTR_2(in6_min, S_IWUSR | S_IRUGO, show_in_reg,
1106 store_in_reg, 6, 1);
1107 static SENSOR_DEVICE_ATTR_2(in7_min, S_IWUSR | S_IRUGO, show_in_reg,
1108 store_in_reg, 7, 1);
1109 static SENSOR_DEVICE_ATTR_2(in8_min, S_IWUSR | S_IRUGO, show_in_reg,
1110 store_in_reg, 8, 1);
1111 static SENSOR_DEVICE_ATTR_2(in9_min, S_IWUSR | S_IRUGO, show_in_reg,
1112 store_in_reg, 9, 1);
1113 static SENSOR_DEVICE_ATTR_2(in10_min, S_IWUSR | S_IRUGO, show_in_reg,
1114 store_in_reg, 10, 1);
1115 static SENSOR_DEVICE_ATTR_2(in11_min, S_IWUSR | S_IRUGO, show_in_reg,
1116 store_in_reg, 11, 1);
1117 static SENSOR_DEVICE_ATTR_2(in12_min, S_IWUSR | S_IRUGO, show_in_reg,
1118 store_in_reg, 12, 1);
1119 static SENSOR_DEVICE_ATTR_2(in13_min, S_IWUSR | S_IRUGO, show_in_reg,
1120 store_in_reg, 13, 1);
1121 static SENSOR_DEVICE_ATTR_2(in14_min, S_IWUSR | S_IRUGO, show_in_reg,
1122 store_in_reg, 14, 1);
1124 static SENSOR_DEVICE_ATTR_2(in0_max, S_IWUSR | S_IRUGO, show_in_reg,
1125 store_in_reg, 0, 2);
1126 static SENSOR_DEVICE_ATTR_2(in1_max, S_IWUSR | S_IRUGO, show_in_reg,
1127 store_in_reg, 1, 2);
1128 static SENSOR_DEVICE_ATTR_2(in2_max, S_IWUSR | S_IRUGO, show_in_reg,
1129 store_in_reg, 2, 2);
1130 static SENSOR_DEVICE_ATTR_2(in3_max, S_IWUSR | S_IRUGO, show_in_reg,
1131 store_in_reg, 3, 2);
1132 static SENSOR_DEVICE_ATTR_2(in4_max, S_IWUSR | S_IRUGO, show_in_reg,
1133 store_in_reg, 4, 2);
1134 static SENSOR_DEVICE_ATTR_2(in5_max, S_IWUSR | S_IRUGO, show_in_reg,
1135 store_in_reg, 5, 2);
1136 static SENSOR_DEVICE_ATTR_2(in6_max, S_IWUSR | S_IRUGO, show_in_reg,
1137 store_in_reg, 6, 2);
1138 static SENSOR_DEVICE_ATTR_2(in7_max, S_IWUSR | S_IRUGO, show_in_reg,
1139 store_in_reg, 7, 2);
1140 static SENSOR_DEVICE_ATTR_2(in8_max, S_IWUSR | S_IRUGO, show_in_reg,
1141 store_in_reg, 8, 2);
1142 static SENSOR_DEVICE_ATTR_2(in9_max, S_IWUSR | S_IRUGO, show_in_reg,
1143 store_in_reg, 9, 2);
1144 static SENSOR_DEVICE_ATTR_2(in10_max, S_IWUSR | S_IRUGO, show_in_reg,
1145 store_in_reg, 10, 2);
1146 static SENSOR_DEVICE_ATTR_2(in11_max, S_IWUSR | S_IRUGO, show_in_reg,
1147 store_in_reg, 11, 2);
1148 static SENSOR_DEVICE_ATTR_2(in12_max, S_IWUSR | S_IRUGO, show_in_reg,
1149 store_in_reg, 12, 2);
1150 static SENSOR_DEVICE_ATTR_2(in13_max, S_IWUSR | S_IRUGO, show_in_reg,
1151 store_in_reg, 13, 2);
1152 static SENSOR_DEVICE_ATTR_2(in14_max, S_IWUSR | S_IRUGO, show_in_reg,
1153 store_in_reg, 14, 2);
1155 static struct attribute *nct6775_attributes_in[15][5] = {
1157 &sensor_dev_attr_in0_input.dev_attr.attr,
1158 &sensor_dev_attr_in0_min.dev_attr.attr,
1159 &sensor_dev_attr_in0_max.dev_attr.attr,
1160 &sensor_dev_attr_in0_alarm.dev_attr.attr,
1164 &sensor_dev_attr_in1_input.dev_attr.attr,
1165 &sensor_dev_attr_in1_min.dev_attr.attr,
1166 &sensor_dev_attr_in1_max.dev_attr.attr,
1167 &sensor_dev_attr_in1_alarm.dev_attr.attr,
1171 &sensor_dev_attr_in2_input.dev_attr.attr,
1172 &sensor_dev_attr_in2_min.dev_attr.attr,
1173 &sensor_dev_attr_in2_max.dev_attr.attr,
1174 &sensor_dev_attr_in2_alarm.dev_attr.attr,
1178 &sensor_dev_attr_in3_input.dev_attr.attr,
1179 &sensor_dev_attr_in3_min.dev_attr.attr,
1180 &sensor_dev_attr_in3_max.dev_attr.attr,
1181 &sensor_dev_attr_in3_alarm.dev_attr.attr,
1185 &sensor_dev_attr_in4_input.dev_attr.attr,
1186 &sensor_dev_attr_in4_min.dev_attr.attr,
1187 &sensor_dev_attr_in4_max.dev_attr.attr,
1188 &sensor_dev_attr_in4_alarm.dev_attr.attr,
1192 &sensor_dev_attr_in5_input.dev_attr.attr,
1193 &sensor_dev_attr_in5_min.dev_attr.attr,
1194 &sensor_dev_attr_in5_max.dev_attr.attr,
1195 &sensor_dev_attr_in5_alarm.dev_attr.attr,
1199 &sensor_dev_attr_in6_input.dev_attr.attr,
1200 &sensor_dev_attr_in6_min.dev_attr.attr,
1201 &sensor_dev_attr_in6_max.dev_attr.attr,
1202 &sensor_dev_attr_in6_alarm.dev_attr.attr,
1206 &sensor_dev_attr_in7_input.dev_attr.attr,
1207 &sensor_dev_attr_in7_min.dev_attr.attr,
1208 &sensor_dev_attr_in7_max.dev_attr.attr,
1209 &sensor_dev_attr_in7_alarm.dev_attr.attr,
1213 &sensor_dev_attr_in8_input.dev_attr.attr,
1214 &sensor_dev_attr_in8_min.dev_attr.attr,
1215 &sensor_dev_attr_in8_max.dev_attr.attr,
1216 &sensor_dev_attr_in8_alarm.dev_attr.attr,
1220 &sensor_dev_attr_in9_input.dev_attr.attr,
1221 &sensor_dev_attr_in9_min.dev_attr.attr,
1222 &sensor_dev_attr_in9_max.dev_attr.attr,
1223 &sensor_dev_attr_in9_alarm.dev_attr.attr,
1227 &sensor_dev_attr_in10_input.dev_attr.attr,
1228 &sensor_dev_attr_in10_min.dev_attr.attr,
1229 &sensor_dev_attr_in10_max.dev_attr.attr,
1230 &sensor_dev_attr_in10_alarm.dev_attr.attr,
1234 &sensor_dev_attr_in11_input.dev_attr.attr,
1235 &sensor_dev_attr_in11_min.dev_attr.attr,
1236 &sensor_dev_attr_in11_max.dev_attr.attr,
1237 &sensor_dev_attr_in11_alarm.dev_attr.attr,
1241 &sensor_dev_attr_in12_input.dev_attr.attr,
1242 &sensor_dev_attr_in12_min.dev_attr.attr,
1243 &sensor_dev_attr_in12_max.dev_attr.attr,
1244 &sensor_dev_attr_in12_alarm.dev_attr.attr,
1248 &sensor_dev_attr_in13_input.dev_attr.attr,
1249 &sensor_dev_attr_in13_min.dev_attr.attr,
1250 &sensor_dev_attr_in13_max.dev_attr.attr,
1251 &sensor_dev_attr_in13_alarm.dev_attr.attr,
1255 &sensor_dev_attr_in14_input.dev_attr.attr,
1256 &sensor_dev_attr_in14_min.dev_attr.attr,
1257 &sensor_dev_attr_in14_max.dev_attr.attr,
1258 &sensor_dev_attr_in14_alarm.dev_attr.attr,
1263 static const struct attribute_group nct6775_group_in[15] = {
1264 { .attrs = nct6775_attributes_in[0] },
1265 { .attrs = nct6775_attributes_in[1] },
1266 { .attrs = nct6775_attributes_in[2] },
1267 { .attrs = nct6775_attributes_in[3] },
1268 { .attrs = nct6775_attributes_in[4] },
1269 { .attrs = nct6775_attributes_in[5] },
1270 { .attrs = nct6775_attributes_in[6] },
1271 { .attrs = nct6775_attributes_in[7] },
1272 { .attrs = nct6775_attributes_in[8] },
1273 { .attrs = nct6775_attributes_in[9] },
1274 { .attrs = nct6775_attributes_in[10] },
1275 { .attrs = nct6775_attributes_in[11] },
1276 { .attrs = nct6775_attributes_in[12] },
1277 { .attrs = nct6775_attributes_in[13] },
1278 { .attrs = nct6775_attributes_in[14] },
1282 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1284 struct nct6775_data *data = nct6775_update_device(dev);
1285 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1286 int nr = sattr->index;
1287 return sprintf(buf, "%d\n", data->rpm[nr]);
1291 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1293 struct nct6775_data *data = nct6775_update_device(dev);
1294 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1295 int nr = sattr->index;
1296 return sprintf(buf, "%d\n",
1297 data->fan_from_reg_min(data->fan_min[nr],
1298 data->fan_div[nr]));
1302 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1304 struct nct6775_data *data = nct6775_update_device(dev);
1305 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1306 int nr = sattr->index;
1307 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1311 store_fan_min(struct device *dev, struct device_attribute *attr,
1312 const char *buf, size_t count)
1314 struct nct6775_data *data = dev_get_drvdata(dev);
1315 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1316 int nr = sattr->index;
1322 err = kstrtoul(buf, 10, &val);
1326 mutex_lock(&data->update_lock);
1327 if (!data->has_fan_div) {
1328 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1334 val = 1350000U / val;
1335 val = (val & 0x1f) | ((val << 3) & 0xff00);
1337 data->fan_min[nr] = val;
1338 goto write_min; /* Leave fan divider alone */
1341 /* No min limit, alarm disabled */
1342 data->fan_min[nr] = 255;
1343 new_div = data->fan_div[nr]; /* No change */
1344 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1347 reg = 1350000U / val;
1348 if (reg >= 128 * 255) {
1350 * Speed below this value cannot possibly be represented,
1351 * even with the highest divider (128)
1353 data->fan_min[nr] = 254;
1354 new_div = 7; /* 128 == (1 << 7) */
1356 "fan%u low limit %lu below minimum %u, set to minimum\n",
1357 nr + 1, val, data->fan_from_reg_min(254, 7));
1360 * Speed above this value cannot possibly be represented,
1361 * even with the lowest divider (1)
1363 data->fan_min[nr] = 1;
1364 new_div = 0; /* 1 == (1 << 0) */
1366 "fan%u low limit %lu above maximum %u, set to maximum\n",
1367 nr + 1, val, data->fan_from_reg_min(1, 0));
1370 * Automatically pick the best divider, i.e. the one such
1371 * that the min limit will correspond to a register value
1372 * in the 96..192 range
1375 while (reg > 192 && new_div < 7) {
1379 data->fan_min[nr] = reg;
1384 * Write both the fan clock divider (if it changed) and the new
1385 * fan min (unconditionally)
1387 if (new_div != data->fan_div[nr]) {
1388 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1389 nr + 1, div_from_reg(data->fan_div[nr]),
1390 div_from_reg(new_div));
1391 data->fan_div[nr] = new_div;
1392 nct6775_write_fan_div_common(dev, data, nr);
1393 /* Give the chip time to sample a new speed value */
1394 data->last_updated = jiffies;
1398 nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1399 mutex_unlock(&data->update_lock);
1404 static struct sensor_device_attribute sda_fan_input[] = {
1405 SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
1406 SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
1407 SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),
1408 SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3),
1409 SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4),
1412 static struct sensor_device_attribute sda_fan_alarm[] = {
1413 SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE),
1414 SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 1),
1415 SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 2),
1416 SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 3),
1417 SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 4),
1420 static struct sensor_device_attribute sda_fan_min[] = {
1421 SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min,
1423 SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min,
1425 SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, show_fan_min,
1427 SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, show_fan_min,
1429 SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, show_fan_min,
1433 static struct sensor_device_attribute sda_fan_div[] = {
1434 SENSOR_ATTR(fan1_div, S_IRUGO, show_fan_div, NULL, 0),
1435 SENSOR_ATTR(fan2_div, S_IRUGO, show_fan_div, NULL, 1),
1436 SENSOR_ATTR(fan3_div, S_IRUGO, show_fan_div, NULL, 2),
1437 SENSOR_ATTR(fan4_div, S_IRUGO, show_fan_div, NULL, 3),
1438 SENSOR_ATTR(fan5_div, S_IRUGO, show_fan_div, NULL, 4),
1442 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1444 struct nct6775_data *data = nct6775_update_device(dev);
1445 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1446 int nr = sattr->index;
1447 return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1451 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1453 struct nct6775_data *data = nct6775_update_device(dev);
1454 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1456 int index = sattr->index;
1458 return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
1462 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
1465 struct nct6775_data *data = dev_get_drvdata(dev);
1466 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1468 int index = sattr->index;
1472 err = kstrtol(buf, 10, &val);
1476 mutex_lock(&data->update_lock);
1477 data->temp[index][nr] = LM75_TEMP_TO_REG(val);
1478 nct6775_write_temp(data, data->reg_temp[index][nr],
1479 data->temp[index][nr]);
1480 mutex_unlock(&data->update_lock);
1485 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
1487 struct nct6775_data *data = nct6775_update_device(dev);
1488 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1490 return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
1494 store_temp_offset(struct device *dev, struct device_attribute *attr,
1495 const char *buf, size_t count)
1497 struct nct6775_data *data = dev_get_drvdata(dev);
1498 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1499 int nr = sattr->index;
1503 err = kstrtol(buf, 10, &val);
1507 val = SENSORS_LIMIT(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
1509 mutex_lock(&data->update_lock);
1510 data->temp_offset[nr] = val;
1511 nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
1512 mutex_unlock(&data->update_lock);
1518 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
1520 struct nct6775_data *data = nct6775_update_device(dev);
1521 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1522 int nr = sattr->index;
1523 return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
1527 store_temp_type(struct device *dev, struct device_attribute *attr,
1528 const char *buf, size_t count)
1530 struct nct6775_data *data = nct6775_update_device(dev);
1531 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1532 int nr = sattr->index;
1535 u8 vbat, diode, bit;
1537 err = kstrtoul(buf, 10, &val);
1541 if (val != 1 && val != 3 && val != 4)
1544 mutex_lock(&data->update_lock);
1546 data->temp_type[nr] = val;
1547 vbat = nct6775_read_value(data, data->REG_VBAT) & ~(0x02 << nr);
1548 diode = nct6775_read_value(data, data->REG_DIODE) & ~(0x02 << nr);
1551 case 1: /* CPU diode (diode, current mode) */
1555 case 3: /* diode, voltage mode */
1558 case 4: /* thermistor */
1561 nct6775_write_value(data, data->REG_VBAT, vbat);
1562 nct6775_write_value(data, data->REG_DIODE, diode);
1564 mutex_unlock(&data->update_lock);
1568 static struct sensor_device_attribute_2 sda_temp_input[] = {
1569 SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0),
1570 SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0),
1571 SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0),
1572 SENSOR_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0),
1573 SENSOR_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0),
1574 SENSOR_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0),
1575 SENSOR_ATTR_2(temp7_input, S_IRUGO, show_temp, NULL, 6, 0),
1576 SENSOR_ATTR_2(temp8_input, S_IRUGO, show_temp, NULL, 7, 0),
1577 SENSOR_ATTR_2(temp9_input, S_IRUGO, show_temp, NULL, 8, 0),
1578 SENSOR_ATTR_2(temp10_input, S_IRUGO, show_temp, NULL, 9, 0),
1581 static struct sensor_device_attribute sda_temp_label[] = {
1582 SENSOR_ATTR(temp1_label, S_IRUGO, show_temp_label, NULL, 0),
1583 SENSOR_ATTR(temp2_label, S_IRUGO, show_temp_label, NULL, 1),
1584 SENSOR_ATTR(temp3_label, S_IRUGO, show_temp_label, NULL, 2),
1585 SENSOR_ATTR(temp4_label, S_IRUGO, show_temp_label, NULL, 3),
1586 SENSOR_ATTR(temp5_label, S_IRUGO, show_temp_label, NULL, 4),
1587 SENSOR_ATTR(temp6_label, S_IRUGO, show_temp_label, NULL, 5),
1588 SENSOR_ATTR(temp7_label, S_IRUGO, show_temp_label, NULL, 6),
1589 SENSOR_ATTR(temp8_label, S_IRUGO, show_temp_label, NULL, 7),
1590 SENSOR_ATTR(temp9_label, S_IRUGO, show_temp_label, NULL, 8),
1591 SENSOR_ATTR(temp10_label, S_IRUGO, show_temp_label, NULL, 9),
1594 static struct sensor_device_attribute_2 sda_temp_max[] = {
1595 SENSOR_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1597 SENSOR_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1599 SENSOR_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1601 SENSOR_ATTR_2(temp4_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1603 SENSOR_ATTR_2(temp5_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1605 SENSOR_ATTR_2(temp6_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1607 SENSOR_ATTR_2(temp7_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1609 SENSOR_ATTR_2(temp8_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1611 SENSOR_ATTR_2(temp9_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1613 SENSOR_ATTR_2(temp10_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1617 static struct sensor_device_attribute_2 sda_temp_max_hyst[] = {
1618 SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1620 SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1622 SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1624 SENSOR_ATTR_2(temp4_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1626 SENSOR_ATTR_2(temp5_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1628 SENSOR_ATTR_2(temp6_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1630 SENSOR_ATTR_2(temp7_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1632 SENSOR_ATTR_2(temp8_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1634 SENSOR_ATTR_2(temp9_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1636 SENSOR_ATTR_2(temp10_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1640 static struct sensor_device_attribute sda_temp_offset[] = {
1641 SENSOR_ATTR(temp1_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1642 store_temp_offset, 0),
1643 SENSOR_ATTR(temp2_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1644 store_temp_offset, 1),
1645 SENSOR_ATTR(temp3_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1646 store_temp_offset, 2),
1647 SENSOR_ATTR(temp4_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1648 store_temp_offset, 3),
1649 SENSOR_ATTR(temp5_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1650 store_temp_offset, 4),
1651 SENSOR_ATTR(temp6_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1652 store_temp_offset, 5),
1655 static struct sensor_device_attribute sda_temp_type[] = {
1656 SENSOR_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1657 store_temp_type, 0),
1658 SENSOR_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1659 store_temp_type, 1),
1660 SENSOR_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1661 store_temp_type, 2),
1662 SENSOR_ATTR(temp4_type, S_IRUGO | S_IWUSR, show_temp_type,
1663 store_temp_type, 3),
1664 SENSOR_ATTR(temp5_type, S_IRUGO | S_IWUSR, show_temp_type,
1665 store_temp_type, 4),
1666 SENSOR_ATTR(temp6_type, S_IRUGO | S_IWUSR, show_temp_type,
1667 store_temp_type, 5),
1670 static struct sensor_device_attribute sda_temp_alarm[] = {
1671 SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL,
1673 SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL,
1674 TEMP_ALARM_BASE + 1),
1675 SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL,
1676 TEMP_ALARM_BASE + 2),
1677 SENSOR_ATTR(temp4_alarm, S_IRUGO, show_alarm, NULL,
1678 TEMP_ALARM_BASE + 3),
1679 SENSOR_ATTR(temp5_alarm, S_IRUGO, show_alarm, NULL,
1680 TEMP_ALARM_BASE + 4),
1681 SENSOR_ATTR(temp6_alarm, S_IRUGO, show_alarm, NULL,
1682 TEMP_ALARM_BASE + 5),
1685 #define NUM_TEMP_ALARM ARRAY_SIZE(sda_temp_alarm)
1688 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
1690 struct nct6775_data *data = nct6775_update_device(dev);
1691 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1693 return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
1697 store_pwm_mode(struct device *dev, struct device_attribute *attr,
1698 const char *buf, size_t count)
1700 struct nct6775_data *data = dev_get_drvdata(dev);
1701 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1702 int nr = sattr->index;
1707 err = kstrtoul(buf, 10, &val);
1714 /* Setting DC mode is not supported for all chips/channels */
1715 if (data->REG_PWM_MODE[nr] == 0) {
1721 mutex_lock(&data->update_lock);
1722 data->pwm_mode[nr] = val;
1723 reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
1724 reg &= ~data->PWM_MODE_MASK[nr];
1726 reg |= data->PWM_MODE_MASK[nr];
1727 nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
1728 mutex_unlock(&data->update_lock);
1733 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
1735 struct nct6775_data *data = nct6775_update_device(dev);
1736 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1738 return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
1742 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1744 struct nct6775_data *data = nct6775_update_device(dev);
1745 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1747 int index = sattr->index;
1751 * For automatic fan control modes, show current pwm readings.
1752 * Otherwise, show the configured value.
1754 if (index == 0 && data->pwm_enable[nr] > 1)
1755 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
1757 pwm = data->pwm[index][nr];
1759 return sprintf(buf, "%d\n", pwm);
1763 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
1766 struct nct6775_data *data = dev_get_drvdata(dev);
1767 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1769 int index = sattr->index;
1771 int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
1773 = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
1776 err = kstrtoul(buf, 10, &val);
1779 val = SENSORS_LIMIT(val, minval[index], maxval[index]);
1781 mutex_lock(&data->update_lock);
1782 data->pwm[index][nr] = val;
1783 nct6775_write_value(data, data->REG_PWM[index][nr], val);
1784 mutex_unlock(&data->update_lock);
1788 /* Returns 0 if OK, -EINVAL otherwise */
1789 static int check_trip_points(struct nct6775_data *data, int nr)
1793 for (i = 0; i < data->auto_pwm_num - 1; i++) {
1794 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1797 for (i = 0; i < data->auto_pwm_num - 1; i++) {
1798 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1801 /* validate critical temperature and pwm if enabled (pwm > 0) */
1802 if (data->auto_pwm[nr][data->auto_pwm_num]) {
1803 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
1804 data->auto_temp[nr][data->auto_pwm_num] ||
1805 data->auto_pwm[nr][data->auto_pwm_num - 1] >
1806 data->auto_pwm[nr][data->auto_pwm_num])
1813 store_pwm_enable(struct device *dev, struct device_attribute *attr,
1814 const char *buf, size_t count)
1816 struct nct6775_data *data = dev_get_drvdata(dev);
1817 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1818 int nr = sattr->index;
1823 err = kstrtoul(buf, 10, &val);
1830 if (val == 4 && data->kind != nct6775)
1833 if (val == 5 && check_trip_points(data, nr)) {
1834 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
1835 dev_err(dev, "Adjust trip points and try again\n");
1839 mutex_lock(&data->update_lock);
1840 data->pwm_enable[nr] = val;
1843 * turn off pwm control: select manual mode, set pwm to maximum
1845 data->pwm[0][nr] = 255;
1846 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
1848 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
1850 reg |= pwm_enable_to_reg(val) << 4;
1851 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
1852 mutex_unlock(&data->update_lock);
1857 show_pwm_temp(struct device *dev, struct device_attribute *attr, char *buf)
1859 struct nct6775_data *data = nct6775_update_device(dev);
1860 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1861 int nr = sattr->index;
1863 return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->pwm_temp[nr]));
1867 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
1869 struct nct6775_data *data = nct6775_update_device(dev);
1870 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1872 return sprintf(buf, "%d\n",
1873 data->pwm_temp_sel[sattr->index][sattr->nr]);
1877 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
1878 const char *buf, size_t count)
1880 struct nct6775_data *data = nct6775_update_device(dev);
1881 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1883 int index = sattr->index;
1888 err = kstrtoul(buf, 10, &val);
1891 if (val == 0 || val > 0x1f)
1894 val = SENSORS_LIMIT(val, 1, data->temp_label_num - 1);
1896 if (!strlen(data->temp_label[val]))
1899 mutex_lock(&data->update_lock);
1900 data->pwm_temp_sel[index][nr] = val;
1901 reg = nct6775_read_value(data, data->REG_TEMP_SEL[index][nr]);
1904 nct6775_write_value(data, data->REG_TEMP_SEL[index][nr], reg);
1905 mutex_unlock(&data->update_lock);
1911 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
1913 struct nct6775_data *data = nct6775_update_device(dev);
1914 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1916 return sprintf(buf, "%d\n",
1917 data->target_temp[sattr->index] * 1000);
1921 store_target_temp(struct device *dev, struct device_attribute *attr,
1922 const char *buf, size_t count)
1924 struct nct6775_data *data = dev_get_drvdata(dev);
1925 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1926 int nr = sattr->index;
1930 err = kstrtol(buf, 10, &val);
1934 val = SENSORS_LIMIT(DIV_ROUND_CLOSEST(val, 1000), 0, 127);
1936 mutex_lock(&data->update_lock);
1937 data->target_temp[nr] = val;
1938 nct6775_write_value(data, data->REG_TARGET[nr], val);
1939 mutex_unlock(&data->update_lock);
1944 show_auto_temp_hyst(struct device *dev, struct device_attribute *attr,
1947 struct nct6775_data *data = nct6775_update_device(dev);
1948 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1950 int point = sattr->index >= data->auto_pwm_num ? 1 : 0;
1951 int tolerance = data->tolerance[nr][point];
1952 int temp = data->auto_temp[nr][sattr->index];
1954 return sprintf(buf, "%d\n", (temp - tolerance) * 1000);
1958 store_auto_temp_hyst(struct device *dev, struct device_attribute *attr,
1959 const char *buf, size_t count)
1961 struct nct6775_data *data = dev_get_drvdata(dev);
1962 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1964 int point = sattr->index >= data->auto_pwm_num ? 1 : 0;
1968 int maxlimit[2][3] = { { 15, 7, 63 }, { 15, 7, 7 } };
1969 int mask[] = { 0x0f, 0x07, 0x07 };
1972 err = kstrtol(buf, 10, &val);
1976 temp = data->auto_temp[nr][sattr->index];
1977 val = temp - DIV_ROUND_CLOSEST(val, 1000);
1979 /* Limit tolerance as needed */
1980 val = SENSORS_LIMIT(val, 0, maxlimit[point][data->kind]);
1982 mutex_lock(&data->update_lock);
1984 nct6775_write_value(data,
1985 data->REG_CRITICAL_TEMP_TOLERANCE[nr],
1988 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
1989 reg = (reg & ~mask[nr]) | (val & mask[nr]);
1990 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
1991 if (data->kind == nct6779) {
1992 reg = nct6775_read_value(data,
1993 NCT6779_REG_TOLERANCE_H[nr]);
1994 reg = (reg & 0x70) | ((val & 0x38) << 1);
1995 nct6775_write_value(data,
1996 NCT6779_REG_TOLERANCE_H[nr], reg);
2000 data->tolerance[nr][point] = val;
2001 mutex_unlock(&data->update_lock);
2005 static SENSOR_DEVICE_ATTR_2(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2006 static SENSOR_DEVICE_ATTR_2(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1, 0);
2007 static SENSOR_DEVICE_ATTR_2(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2, 0);
2008 static SENSOR_DEVICE_ATTR_2(pwm4, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3, 0);
2009 static SENSOR_DEVICE_ATTR_2(pwm5, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 4, 0);
2011 static SENSOR_DEVICE_ATTR(pwm1_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2013 static SENSOR_DEVICE_ATTR(pwm2_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2015 static SENSOR_DEVICE_ATTR(pwm3_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2017 static SENSOR_DEVICE_ATTR(pwm4_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2019 static SENSOR_DEVICE_ATTR(pwm5_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2022 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2023 store_pwm_enable, 0);
2024 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2025 store_pwm_enable, 1);
2026 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2027 store_pwm_enable, 2);
2028 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2029 store_pwm_enable, 3);
2030 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2031 store_pwm_enable, 4);
2033 static SENSOR_DEVICE_ATTR_2(pwm1_temp_sel, S_IWUSR | S_IRUGO,
2034 show_pwm_temp_sel, store_pwm_temp_sel, 0, 0);
2035 static SENSOR_DEVICE_ATTR_2(pwm2_temp_sel, S_IWUSR | S_IRUGO,
2036 show_pwm_temp_sel, store_pwm_temp_sel, 1, 0);
2037 static SENSOR_DEVICE_ATTR_2(pwm3_temp_sel, S_IWUSR | S_IRUGO,
2038 show_pwm_temp_sel, store_pwm_temp_sel, 2, 0);
2039 static SENSOR_DEVICE_ATTR_2(pwm4_temp_sel, S_IWUSR | S_IRUGO,
2040 show_pwm_temp_sel, store_pwm_temp_sel, 3, 0);
2041 static SENSOR_DEVICE_ATTR_2(pwm5_temp_sel, S_IWUSR | S_IRUGO,
2042 show_pwm_temp_sel, store_pwm_temp_sel, 4, 0);
2044 static SENSOR_DEVICE_ATTR(pwm1_target, S_IWUSR | S_IRUGO, show_target_temp,
2045 store_target_temp, 0);
2046 static SENSOR_DEVICE_ATTR(pwm2_target, S_IWUSR | S_IRUGO, show_target_temp,
2047 store_target_temp, 1);
2048 static SENSOR_DEVICE_ATTR(pwm3_target, S_IWUSR | S_IRUGO, show_target_temp,
2049 store_target_temp, 2);
2050 static SENSOR_DEVICE_ATTR(pwm4_target, S_IWUSR | S_IRUGO, show_target_temp,
2051 store_target_temp, 3);
2052 static SENSOR_DEVICE_ATTR(pwm5_target, S_IWUSR | S_IRUGO, show_target_temp,
2053 store_target_temp, 4);
2055 /* Monitored pwm temperatures */
2056 static SENSOR_DEVICE_ATTR(temp11_input, S_IRUGO, show_pwm_temp, NULL, 0);
2057 static SENSOR_DEVICE_ATTR(temp12_input, S_IRUGO, show_pwm_temp, NULL, 1);
2058 static SENSOR_DEVICE_ATTR(temp13_input, S_IRUGO, show_pwm_temp, NULL, 2);
2059 static SENSOR_DEVICE_ATTR(temp14_input, S_IRUGO, show_pwm_temp, NULL, 3);
2060 static SENSOR_DEVICE_ATTR(temp15_input, S_IRUGO, show_pwm_temp, NULL, 4);
2062 /* Smart Fan registers */
2065 show_pwm_sel_enable(struct device *dev, struct device_attribute *attr,
2068 struct nct6775_data *data = nct6775_update_device(dev);
2069 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2071 return sprintf(buf, "%d\n",
2072 data->pwm_sel_enable[sattr->index][sattr->nr]);
2076 store_pwm_sel_enable(struct device *dev, struct device_attribute *attr,
2077 const char *buf, size_t count)
2079 struct nct6775_data *data = dev_get_drvdata(dev);
2080 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2082 int index = sattr->index;
2087 err = kstrtoul(buf, 10, &val);
2094 mutex_lock(&data->update_lock);
2095 data->pwm_sel_enable[index][nr] = val;
2096 reg = nct6775_read_value(data, data->REG_TEMP_SEL[index][nr]);
2100 nct6775_write_value(data, data->REG_TEMP_SEL[index][nr], reg);
2101 mutex_unlock(&data->update_lock);
2106 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2108 struct nct6775_data *data = nct6775_update_device(dev);
2109 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2111 int index = sattr->index;
2113 return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2117 store_weight_temp(struct device *dev, struct device_attribute *attr,
2118 const char *buf, size_t count)
2120 struct nct6775_data *data = dev_get_drvdata(dev);
2121 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2123 int index = sattr->index;
2127 err = kstrtoul(buf, 10, &val);
2131 val = SENSORS_LIMIT(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2133 mutex_lock(&data->update_lock);
2134 data->weight_temp[index][nr] = val;
2135 nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2136 mutex_unlock(&data->update_lock);
2140 static SENSOR_DEVICE_ATTR_2(pwm1_stop_output_enable, S_IWUSR | S_IRUGO,
2141 show_pwm_sel_enable, store_pwm_sel_enable, 0, 0);
2142 static SENSOR_DEVICE_ATTR_2(pwm2_stop_output_enable, S_IWUSR | S_IRUGO,
2143 show_pwm_sel_enable, store_pwm_sel_enable, 1, 0);
2144 static SENSOR_DEVICE_ATTR_2(pwm3_stop_output_enable, S_IWUSR | S_IRUGO,
2145 show_pwm_sel_enable, store_pwm_sel_enable, 2, 0);
2146 static SENSOR_DEVICE_ATTR_2(pwm4_stop_output_enable, S_IWUSR | S_IRUGO,
2147 show_pwm_sel_enable, store_pwm_sel_enable, 3, 0);
2148 static SENSOR_DEVICE_ATTR_2(pwm5_stop_output_enable, S_IWUSR | S_IRUGO,
2149 show_pwm_sel_enable, store_pwm_sel_enable, 4, 0);
2151 static SENSOR_DEVICE_ATTR_2(pwm1_weight_enable, S_IWUSR | S_IRUGO,
2152 show_pwm_sel_enable, store_pwm_sel_enable, 0, 1);
2153 static SENSOR_DEVICE_ATTR_2(pwm2_weight_enable, S_IWUSR | S_IRUGO,
2154 show_pwm_sel_enable, store_pwm_sel_enable, 1, 1);
2155 static SENSOR_DEVICE_ATTR_2(pwm3_weight_enable, S_IWUSR | S_IRUGO,
2156 show_pwm_sel_enable, store_pwm_sel_enable, 2, 1);
2157 static SENSOR_DEVICE_ATTR_2(pwm4_weight_enable, S_IWUSR | S_IRUGO,
2158 show_pwm_sel_enable, store_pwm_sel_enable, 3, 1);
2159 static SENSOR_DEVICE_ATTR_2(pwm5_weight_enable, S_IWUSR | S_IRUGO,
2160 show_pwm_sel_enable, store_pwm_sel_enable, 4, 1);
2162 static SENSOR_DEVICE_ATTR_2(pwm1_weight_temp_sel, S_IWUSR | S_IRUGO,
2163 show_pwm_temp_sel, store_pwm_temp_sel, 0, 1);
2164 static SENSOR_DEVICE_ATTR_2(pwm2_weight_temp_sel, S_IWUSR | S_IRUGO,
2165 show_pwm_temp_sel, store_pwm_temp_sel, 1, 1);
2166 static SENSOR_DEVICE_ATTR_2(pwm3_weight_temp_sel, S_IWUSR | S_IRUGO,
2167 show_pwm_temp_sel, store_pwm_temp_sel, 2, 1);
2168 static SENSOR_DEVICE_ATTR_2(pwm4_weight_temp_sel, S_IWUSR | S_IRUGO,
2169 show_pwm_temp_sel, store_pwm_temp_sel, 3, 1);
2170 static SENSOR_DEVICE_ATTR_2(pwm5_weight_temp_sel, S_IWUSR | S_IRUGO,
2171 show_pwm_temp_sel, store_pwm_temp_sel, 4, 1);
2173 static SENSOR_DEVICE_ATTR_2(pwm1_weight_temp_step, S_IWUSR | S_IRUGO,
2174 show_weight_temp, store_weight_temp, 0, 0);
2175 static SENSOR_DEVICE_ATTR_2(pwm2_weight_temp_step, S_IWUSR | S_IRUGO,
2176 show_weight_temp, store_weight_temp, 1, 0);
2177 static SENSOR_DEVICE_ATTR_2(pwm3_weight_temp_step, S_IWUSR | S_IRUGO,
2178 show_weight_temp, store_weight_temp, 2, 0);
2179 static SENSOR_DEVICE_ATTR_2(pwm4_weight_temp_step, S_IWUSR | S_IRUGO,
2180 show_weight_temp, store_weight_temp, 3, 0);
2181 static SENSOR_DEVICE_ATTR_2(pwm5_weight_temp_step, S_IWUSR | S_IRUGO,
2182 show_weight_temp, store_weight_temp, 4, 0);
2184 static SENSOR_DEVICE_ATTR_2(pwm1_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2185 show_weight_temp, store_weight_temp, 0, 1);
2186 static SENSOR_DEVICE_ATTR_2(pwm2_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2187 show_weight_temp, store_weight_temp, 1, 1);
2188 static SENSOR_DEVICE_ATTR_2(pwm3_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2189 show_weight_temp, store_weight_temp, 2, 1);
2190 static SENSOR_DEVICE_ATTR_2(pwm4_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2191 show_weight_temp, store_weight_temp, 3, 1);
2192 static SENSOR_DEVICE_ATTR_2(pwm5_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2193 show_weight_temp, store_weight_temp, 4, 1);
2195 static SENSOR_DEVICE_ATTR_2(pwm1_weight_temp_step_base, S_IWUSR | S_IRUGO,
2196 show_weight_temp, store_weight_temp, 0, 2);
2197 static SENSOR_DEVICE_ATTR_2(pwm2_weight_temp_step_base, S_IWUSR | S_IRUGO,
2198 show_weight_temp, store_weight_temp, 1, 2);
2199 static SENSOR_DEVICE_ATTR_2(pwm3_weight_temp_step_base, S_IWUSR | S_IRUGO,
2200 show_weight_temp, store_weight_temp, 2, 2);
2201 static SENSOR_DEVICE_ATTR_2(pwm4_weight_temp_step_base, S_IWUSR | S_IRUGO,
2202 show_weight_temp, store_weight_temp, 3, 2);
2203 static SENSOR_DEVICE_ATTR_2(pwm5_weight_temp_step_base, S_IWUSR | S_IRUGO,
2204 show_weight_temp, store_weight_temp, 4, 2);
2206 static SENSOR_DEVICE_ATTR_2(pwm1_weight_duty_step, S_IWUSR | S_IRUGO,
2207 show_pwm, store_pwm, 0, 5);
2208 static SENSOR_DEVICE_ATTR_2(pwm2_weight_duty_step, S_IWUSR | S_IRUGO,
2209 show_pwm, store_pwm, 1, 5);
2210 static SENSOR_DEVICE_ATTR_2(pwm3_weight_duty_step, S_IWUSR | S_IRUGO,
2211 show_pwm, store_pwm, 2, 5);
2212 static SENSOR_DEVICE_ATTR_2(pwm4_weight_duty_step, S_IWUSR | S_IRUGO,
2213 show_pwm, store_pwm, 3, 5);
2214 static SENSOR_DEVICE_ATTR_2(pwm5_weight_duty_step, S_IWUSR | S_IRUGO,
2215 show_pwm, store_pwm, 4, 5);
2217 /* duty_base is not supported on all chips */
2218 static struct sensor_device_attribute_2 sda_weight_duty_base[] = {
2219 SENSOR_ATTR_2(pwm1_weight_duty_base, S_IWUSR | S_IRUGO,
2220 show_pwm, store_pwm, 0, 6),
2221 SENSOR_ATTR_2(pwm2_weight_duty_base, S_IWUSR | S_IRUGO,
2222 show_pwm, store_pwm, 1, 6),
2223 SENSOR_ATTR_2(pwm3_weight_duty_base, S_IWUSR | S_IRUGO,
2224 show_pwm, store_pwm, 2, 6),
2225 SENSOR_ATTR_2(pwm4_weight_duty_base, S_IWUSR | S_IRUGO,
2226 show_pwm, store_pwm, 3, 6),
2227 SENSOR_ATTR_2(pwm5_weight_duty_base, S_IWUSR | S_IRUGO,
2228 show_pwm, store_pwm, 4, 6),
2232 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2234 struct nct6775_data *data = nct6775_update_device(dev);
2235 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2237 int index = sattr->index;
2239 return sprintf(buf, "%d\n",
2240 step_time_from_reg(data->fan_time[index][nr],
2241 data->pwm_mode[nr]));
2245 store_fan_time(struct device *dev, struct device_attribute *attr,
2246 const char *buf, size_t count)
2248 struct nct6775_data *data = dev_get_drvdata(dev);
2249 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2251 int index = sattr->index;
2255 err = kstrtoul(buf, 10, &val);
2259 val = step_time_to_reg(val, data->pwm_mode[nr]);
2260 mutex_lock(&data->update_lock);
2261 data->fan_time[index][nr] = val;
2262 nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2263 mutex_unlock(&data->update_lock);
2268 show_name(struct device *dev, struct device_attribute *attr, char *buf)
2270 struct nct6775_data *data = dev_get_drvdata(dev);
2272 return sprintf(buf, "%s\n", data->name);
2275 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
2277 static SENSOR_DEVICE_ATTR_2(pwm1_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2278 store_fan_time, 0, 0);
2279 static SENSOR_DEVICE_ATTR_2(pwm2_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2280 store_fan_time, 1, 0);
2281 static SENSOR_DEVICE_ATTR_2(pwm3_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2282 store_fan_time, 2, 0);
2283 static SENSOR_DEVICE_ATTR_2(pwm4_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2284 store_fan_time, 3, 0);
2285 static SENSOR_DEVICE_ATTR_2(pwm5_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2286 store_fan_time, 4, 0);
2288 static SENSOR_DEVICE_ATTR_2(pwm1_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2289 store_fan_time, 0, 1);
2290 static SENSOR_DEVICE_ATTR_2(pwm2_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2291 store_fan_time, 1, 1);
2292 static SENSOR_DEVICE_ATTR_2(pwm3_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2293 store_fan_time, 2, 1);
2294 static SENSOR_DEVICE_ATTR_2(pwm4_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2295 store_fan_time, 3, 1);
2296 static SENSOR_DEVICE_ATTR_2(pwm5_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2297 store_fan_time, 4, 1);
2299 static SENSOR_DEVICE_ATTR_2(pwm1_step_down_time, S_IWUSR | S_IRUGO,
2300 show_fan_time, store_fan_time, 0, 2);
2301 static SENSOR_DEVICE_ATTR_2(pwm2_step_down_time, S_IWUSR | S_IRUGO,
2302 show_fan_time, store_fan_time, 1, 2);
2303 static SENSOR_DEVICE_ATTR_2(pwm3_step_down_time, S_IWUSR | S_IRUGO,
2304 show_fan_time, store_fan_time, 2, 2);
2305 static SENSOR_DEVICE_ATTR_2(pwm4_step_down_time, S_IWUSR | S_IRUGO,
2306 show_fan_time, store_fan_time, 3, 2);
2307 static SENSOR_DEVICE_ATTR_2(pwm5_step_down_time, S_IWUSR | S_IRUGO,
2308 show_fan_time, store_fan_time, 4, 2);
2310 static SENSOR_DEVICE_ATTR_2(pwm1_start_output, S_IWUSR | S_IRUGO, show_pwm,
2312 static SENSOR_DEVICE_ATTR_2(pwm2_start_output, S_IWUSR | S_IRUGO, show_pwm,
2314 static SENSOR_DEVICE_ATTR_2(pwm3_start_output, S_IWUSR | S_IRUGO, show_pwm,
2316 static SENSOR_DEVICE_ATTR_2(pwm4_start_output, S_IWUSR | S_IRUGO, show_pwm,
2318 static SENSOR_DEVICE_ATTR_2(pwm5_start_output, S_IWUSR | S_IRUGO, show_pwm,
2321 static SENSOR_DEVICE_ATTR_2(pwm1_stop_output, S_IWUSR | S_IRUGO, show_pwm,
2323 static SENSOR_DEVICE_ATTR_2(pwm2_stop_output, S_IWUSR | S_IRUGO, show_pwm,
2325 static SENSOR_DEVICE_ATTR_2(pwm3_stop_output, S_IWUSR | S_IRUGO, show_pwm,
2327 static SENSOR_DEVICE_ATTR_2(pwm4_stop_output, S_IWUSR | S_IRUGO, show_pwm,
2329 static SENSOR_DEVICE_ATTR_2(pwm5_stop_output, S_IWUSR | S_IRUGO, show_pwm,
2332 /* max_output is not supported on all chips */
2333 static struct sensor_device_attribute_2 sda_max_output[] = {
2334 SENSOR_ATTR_2(pwm1_max_output, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2336 SENSOR_ATTR_2(pwm2_max_output, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2338 SENSOR_ATTR_2(pwm3_max_output, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2340 SENSOR_ATTR_2(pwm4_max_output, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2342 SENSOR_ATTR_2(pwm5_max_output, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2346 /* step_output is not supported on all chips */
2347 static struct sensor_device_attribute_2 sda_step_output[] = {
2348 SENSOR_ATTR_2(pwm1_step_output, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2350 SENSOR_ATTR_2(pwm2_step_output, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2352 SENSOR_ATTR_2(pwm3_step_output, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2354 SENSOR_ATTR_2(pwm4_step_output, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2356 SENSOR_ATTR_2(pwm5_step_output, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2360 static struct attribute *nct6775_attributes_pwm[5][20] = {
2362 &sensor_dev_attr_temp11_input.dev_attr.attr,
2363 &sensor_dev_attr_pwm1.dev_attr.attr,
2364 &sensor_dev_attr_pwm1_mode.dev_attr.attr,
2365 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2366 &sensor_dev_attr_pwm1_stop_output_enable.dev_attr.attr,
2367 &sensor_dev_attr_pwm1_weight_enable.dev_attr.attr,
2368 &sensor_dev_attr_pwm1_temp_sel.dev_attr.attr,
2369 &sensor_dev_attr_pwm1_target.dev_attr.attr,
2370 &sensor_dev_attr_pwm1_stop_time.dev_attr.attr,
2371 &sensor_dev_attr_pwm1_step_up_time.dev_attr.attr,
2372 &sensor_dev_attr_pwm1_step_down_time.dev_attr.attr,
2373 &sensor_dev_attr_pwm1_start_output.dev_attr.attr,
2374 &sensor_dev_attr_pwm1_stop_output.dev_attr.attr,
2375 &sensor_dev_attr_pwm1_weight_temp_sel.dev_attr.attr,
2376 &sensor_dev_attr_pwm1_weight_temp_step.dev_attr.attr,
2377 &sensor_dev_attr_pwm1_weight_temp_step_tol.dev_attr.attr,
2378 &sensor_dev_attr_pwm1_weight_temp_step_base.dev_attr.attr,
2379 &sensor_dev_attr_pwm1_weight_duty_step.dev_attr.attr,
2383 &sensor_dev_attr_temp12_input.dev_attr.attr,
2384 &sensor_dev_attr_pwm2.dev_attr.attr,
2385 &sensor_dev_attr_pwm2_mode.dev_attr.attr,
2386 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2387 &sensor_dev_attr_pwm2_stop_output_enable.dev_attr.attr,
2388 &sensor_dev_attr_pwm2_weight_enable.dev_attr.attr,
2389 &sensor_dev_attr_pwm2_temp_sel.dev_attr.attr,
2390 &sensor_dev_attr_pwm2_target.dev_attr.attr,
2391 &sensor_dev_attr_pwm2_stop_time.dev_attr.attr,
2392 &sensor_dev_attr_pwm2_step_up_time.dev_attr.attr,
2393 &sensor_dev_attr_pwm2_step_down_time.dev_attr.attr,
2394 &sensor_dev_attr_pwm2_start_output.dev_attr.attr,
2395 &sensor_dev_attr_pwm2_stop_output.dev_attr.attr,
2396 &sensor_dev_attr_pwm2_weight_temp_sel.dev_attr.attr,
2397 &sensor_dev_attr_pwm2_weight_temp_step.dev_attr.attr,
2398 &sensor_dev_attr_pwm2_weight_temp_step_tol.dev_attr.attr,
2399 &sensor_dev_attr_pwm2_weight_temp_step_base.dev_attr.attr,
2400 &sensor_dev_attr_pwm2_weight_duty_step.dev_attr.attr,
2404 &sensor_dev_attr_temp13_input.dev_attr.attr,
2405 &sensor_dev_attr_pwm3.dev_attr.attr,
2406 &sensor_dev_attr_pwm3_mode.dev_attr.attr,
2407 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2408 &sensor_dev_attr_pwm3_stop_output_enable.dev_attr.attr,
2409 &sensor_dev_attr_pwm3_weight_enable.dev_attr.attr,
2410 &sensor_dev_attr_pwm3_temp_sel.dev_attr.attr,
2411 &sensor_dev_attr_pwm3_target.dev_attr.attr,
2412 &sensor_dev_attr_pwm3_stop_time.dev_attr.attr,
2413 &sensor_dev_attr_pwm3_step_up_time.dev_attr.attr,
2414 &sensor_dev_attr_pwm3_step_down_time.dev_attr.attr,
2415 &sensor_dev_attr_pwm3_start_output.dev_attr.attr,
2416 &sensor_dev_attr_pwm3_stop_output.dev_attr.attr,
2417 &sensor_dev_attr_pwm3_weight_temp_sel.dev_attr.attr,
2418 &sensor_dev_attr_pwm3_weight_temp_step.dev_attr.attr,
2419 &sensor_dev_attr_pwm3_weight_temp_step_tol.dev_attr.attr,
2420 &sensor_dev_attr_pwm3_weight_temp_step_base.dev_attr.attr,
2421 &sensor_dev_attr_pwm3_weight_duty_step.dev_attr.attr,
2425 &sensor_dev_attr_temp14_input.dev_attr.attr,
2426 &sensor_dev_attr_pwm4.dev_attr.attr,
2427 &sensor_dev_attr_pwm4_mode.dev_attr.attr,
2428 &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2429 &sensor_dev_attr_pwm4_stop_output_enable.dev_attr.attr,
2430 &sensor_dev_attr_pwm4_weight_enable.dev_attr.attr,
2431 &sensor_dev_attr_pwm4_temp_sel.dev_attr.attr,
2432 &sensor_dev_attr_pwm4_target.dev_attr.attr,
2433 &sensor_dev_attr_pwm4_stop_time.dev_attr.attr,
2434 &sensor_dev_attr_pwm4_step_up_time.dev_attr.attr,
2435 &sensor_dev_attr_pwm4_step_down_time.dev_attr.attr,
2436 &sensor_dev_attr_pwm4_start_output.dev_attr.attr,
2437 &sensor_dev_attr_pwm4_stop_output.dev_attr.attr,
2438 &sensor_dev_attr_pwm4_weight_temp_sel.dev_attr.attr,
2439 &sensor_dev_attr_pwm4_weight_temp_step.dev_attr.attr,
2440 &sensor_dev_attr_pwm4_weight_temp_step_tol.dev_attr.attr,
2441 &sensor_dev_attr_pwm4_weight_temp_step_base.dev_attr.attr,
2442 &sensor_dev_attr_pwm4_weight_duty_step.dev_attr.attr,
2446 &sensor_dev_attr_temp15_input.dev_attr.attr,
2447 &sensor_dev_attr_pwm5.dev_attr.attr,
2448 &sensor_dev_attr_pwm5_mode.dev_attr.attr,
2449 &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2450 &sensor_dev_attr_pwm5_stop_output_enable.dev_attr.attr,
2451 &sensor_dev_attr_pwm5_weight_enable.dev_attr.attr,
2452 &sensor_dev_attr_pwm5_temp_sel.dev_attr.attr,
2453 &sensor_dev_attr_pwm5_target.dev_attr.attr,
2454 &sensor_dev_attr_pwm5_stop_time.dev_attr.attr,
2455 &sensor_dev_attr_pwm5_step_up_time.dev_attr.attr,
2456 &sensor_dev_attr_pwm5_step_down_time.dev_attr.attr,
2457 &sensor_dev_attr_pwm5_start_output.dev_attr.attr,
2458 &sensor_dev_attr_pwm5_stop_output.dev_attr.attr,
2459 &sensor_dev_attr_pwm5_weight_temp_sel.dev_attr.attr,
2460 &sensor_dev_attr_pwm5_weight_temp_step.dev_attr.attr,
2461 &sensor_dev_attr_pwm5_weight_temp_step_tol.dev_attr.attr,
2462 &sensor_dev_attr_pwm5_weight_temp_step_base.dev_attr.attr,
2463 &sensor_dev_attr_pwm5_weight_duty_step.dev_attr.attr,
2468 static const struct attribute_group nct6775_group_pwm[5] = {
2469 { .attrs = nct6775_attributes_pwm[0] },
2470 { .attrs = nct6775_attributes_pwm[1] },
2471 { .attrs = nct6775_attributes_pwm[2] },
2472 { .attrs = nct6775_attributes_pwm[3] },
2473 { .attrs = nct6775_attributes_pwm[4] },
2477 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2479 struct nct6775_data *data = nct6775_update_device(dev);
2480 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2482 return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2486 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2487 const char *buf, size_t count)
2489 struct nct6775_data *data = dev_get_drvdata(dev);
2490 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2492 int point = sattr->index;
2497 err = kstrtoul(buf, 10, &val);
2503 if (point == data->auto_pwm_num) {
2504 if (data->kind != nct6775 && !val)
2506 if (data->kind != nct6779 && val)
2510 mutex_lock(&data->update_lock);
2511 data->auto_pwm[nr][point] = val;
2512 if (point < data->auto_pwm_num) {
2513 nct6775_write_value(data,
2514 NCT6775_AUTO_PWM(data, nr, point),
2515 data->auto_pwm[nr][point]);
2517 switch (data->kind) {
2519 /* disable if needed (pwm == 0) */
2520 reg = nct6775_read_value(data,
2521 NCT6775_REG_CRITICAL_ENAB[nr]);
2526 nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
2530 break; /* always enabled, nothing to do */
2532 nct6775_write_value(data, NCT6779_REG_CRITICAL_PWM[nr],
2534 reg = nct6775_read_value(data,
2535 NCT6779_REG_CRITICAL_PWM_ENABLE[nr]);
2540 nct6775_write_value(data,
2541 NCT6779_REG_CRITICAL_PWM_ENABLE[nr],
2546 mutex_unlock(&data->update_lock);
2551 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
2553 struct nct6775_data *data = nct6775_update_device(dev);
2554 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2556 int point = sattr->index;
2559 * We don't know for sure if the temperature is signed or unsigned.
2560 * Assume it is unsigned.
2562 return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
2566 store_auto_temp(struct device *dev, struct device_attribute *attr,
2567 const char *buf, size_t count)
2569 struct nct6775_data *data = dev_get_drvdata(dev);
2570 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2572 int point = sattr->index;
2576 err = kstrtoul(buf, 10, &val);
2582 mutex_lock(&data->update_lock);
2583 data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
2584 if (point < data->auto_pwm_num) {
2585 nct6775_write_value(data,
2586 NCT6775_AUTO_TEMP(data, nr, point),
2587 data->auto_temp[nr][point]);
2589 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
2590 data->auto_temp[nr][point]);
2592 mutex_unlock(&data->update_lock);
2597 * The number of auto-point trip points is chip dependent.
2598 * Need to check support while generating/removing attribute files.
2600 static struct sensor_device_attribute_2 sda_auto_pwm_arrays[] = {
2601 SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IWUSR | S_IRUGO,
2602 show_auto_pwm, store_auto_pwm, 0, 0),
2603 SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IWUSR | S_IRUGO,
2604 show_auto_temp, store_auto_temp, 0, 0),
2605 SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IWUSR | S_IRUGO,
2606 show_auto_temp_hyst, store_auto_temp_hyst, 0, 0),
2607 SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IWUSR | S_IRUGO,
2608 show_auto_pwm, store_auto_pwm, 0, 1),
2609 SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IWUSR | S_IRUGO,
2610 show_auto_temp, store_auto_temp, 0, 1),
2611 SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IWUSR | S_IRUGO,
2612 show_auto_temp_hyst, store_auto_temp_hyst, 0, 1),
2613 SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IWUSR | S_IRUGO,
2614 show_auto_pwm, store_auto_pwm, 0, 2),
2615 SENSOR_ATTR_2(pwm1_auto_point3_temp, S_IWUSR | S_IRUGO,
2616 show_auto_temp, store_auto_temp, 0, 2),
2617 SENSOR_ATTR_2(pwm1_auto_point3_temp_hyst, S_IWUSR | S_IRUGO,
2618 show_auto_temp_hyst, store_auto_temp_hyst, 0, 2),
2619 SENSOR_ATTR_2(pwm1_auto_point4_pwm, S_IWUSR | S_IRUGO,
2620 show_auto_pwm, store_auto_pwm, 0, 3),
2621 SENSOR_ATTR_2(pwm1_auto_point4_temp, S_IWUSR | S_IRUGO,
2622 show_auto_temp, store_auto_temp, 0, 3),
2623 SENSOR_ATTR_2(pwm1_auto_point4_temp_hyst, S_IWUSR | S_IRUGO,
2624 show_auto_temp_hyst, store_auto_temp_hyst, 0, 3),
2625 SENSOR_ATTR_2(pwm1_auto_point5_pwm, S_IWUSR | S_IRUGO,
2626 show_auto_pwm, store_auto_pwm, 0, 4),
2627 SENSOR_ATTR_2(pwm1_auto_point5_temp, S_IWUSR | S_IRUGO,
2628 show_auto_temp, store_auto_temp, 0, 4),
2629 SENSOR_ATTR_2(pwm1_auto_point5_temp_hyst, S_IWUSR | S_IRUGO,
2630 show_auto_temp_hyst, store_auto_temp_hyst, 0, 4),
2631 SENSOR_ATTR_2(pwm1_auto_point6_pwm, S_IWUSR | S_IRUGO,
2632 show_auto_pwm, store_auto_pwm, 0, 5),
2633 SENSOR_ATTR_2(pwm1_auto_point6_temp, S_IWUSR | S_IRUGO,
2634 show_auto_temp, store_auto_temp, 0, 5),
2635 SENSOR_ATTR_2(pwm1_auto_point6_temp_hyst, S_IWUSR | S_IRUGO,
2636 show_auto_temp_hyst, store_auto_temp_hyst, 0, 5),
2637 SENSOR_ATTR_2(pwm1_auto_point7_pwm, S_IWUSR | S_IRUGO,
2638 show_auto_pwm, store_auto_pwm, 0, 6),
2639 SENSOR_ATTR_2(pwm1_auto_point7_temp, S_IWUSR | S_IRUGO,
2640 show_auto_temp, store_auto_temp, 0, 6),
2641 SENSOR_ATTR_2(pwm1_auto_point7_temp_hyst, S_IWUSR | S_IRUGO,
2642 show_auto_temp_hyst, store_auto_temp_hyst, 0, 6),
2644 SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IWUSR | S_IRUGO,
2645 show_auto_pwm, store_auto_pwm, 1, 0),
2646 SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IWUSR | S_IRUGO,
2647 show_auto_temp, store_auto_temp, 1, 0),
2648 SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IWUSR | S_IRUGO,
2649 show_auto_temp_hyst, store_auto_temp_hyst, 1, 0),
2650 SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IWUSR | S_IRUGO,
2651 show_auto_pwm, store_auto_pwm, 1, 1),
2652 SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IWUSR | S_IRUGO,
2653 show_auto_temp, store_auto_temp, 1, 1),
2654 SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IWUSR | S_IRUGO,
2655 show_auto_temp_hyst, store_auto_temp_hyst, 1, 1),
2656 SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IWUSR | S_IRUGO,
2657 show_auto_pwm, store_auto_pwm, 1, 2),
2658 SENSOR_ATTR_2(pwm2_auto_point3_temp, S_IWUSR | S_IRUGO,
2659 show_auto_temp, store_auto_temp, 1, 2),
2660 SENSOR_ATTR_2(pwm2_auto_point3_temp_hyst, S_IWUSR | S_IRUGO,
2661 show_auto_temp_hyst, store_auto_temp_hyst, 1, 2),
2662 SENSOR_ATTR_2(pwm2_auto_point4_pwm, S_IWUSR | S_IRUGO,
2663 show_auto_pwm, store_auto_pwm, 1, 3),
2664 SENSOR_ATTR_2(pwm2_auto_point4_temp, S_IWUSR | S_IRUGO,
2665 show_auto_temp, store_auto_temp, 1, 3),
2666 SENSOR_ATTR_2(pwm2_auto_point4_temp_hyst, S_IWUSR | S_IRUGO,
2667 show_auto_temp_hyst, store_auto_temp_hyst, 1, 3),
2668 SENSOR_ATTR_2(pwm2_auto_point5_pwm, S_IWUSR | S_IRUGO,
2669 show_auto_pwm, store_auto_pwm, 1, 4),
2670 SENSOR_ATTR_2(pwm2_auto_point5_temp, S_IWUSR | S_IRUGO,
2671 show_auto_temp, store_auto_temp, 1, 4),
2672 SENSOR_ATTR_2(pwm2_auto_point5_temp_hyst, S_IWUSR | S_IRUGO,
2673 show_auto_temp_hyst, store_auto_temp_hyst, 1, 4),
2674 SENSOR_ATTR_2(pwm2_auto_point6_pwm, S_IWUSR | S_IRUGO,
2675 show_auto_pwm, store_auto_pwm, 1, 5),
2676 SENSOR_ATTR_2(pwm2_auto_point6_temp, S_IWUSR | S_IRUGO,
2677 show_auto_temp, store_auto_temp, 1, 5),
2678 SENSOR_ATTR_2(pwm2_auto_point6_temp_hyst, S_IWUSR | S_IRUGO,
2679 show_auto_temp_hyst, store_auto_temp_hyst, 1, 5),
2680 SENSOR_ATTR_2(pwm2_auto_point7_pwm, S_IWUSR | S_IRUGO,
2681 show_auto_pwm, store_auto_pwm, 1, 6),
2682 SENSOR_ATTR_2(pwm2_auto_point7_temp, S_IWUSR | S_IRUGO,
2683 show_auto_temp, store_auto_temp, 1, 6),
2684 SENSOR_ATTR_2(pwm2_auto_point7_temp_hyst, S_IWUSR | S_IRUGO,
2685 show_auto_temp_hyst, store_auto_temp_hyst, 1, 6),
2687 SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IWUSR | S_IRUGO,
2688 show_auto_pwm, store_auto_pwm, 2, 0),
2689 SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IWUSR | S_IRUGO,
2690 show_auto_temp, store_auto_temp, 2, 0),
2691 SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IWUSR | S_IRUGO,
2692 show_auto_temp_hyst, store_auto_temp_hyst, 2, 0),
2693 SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IWUSR | S_IRUGO,
2694 show_auto_pwm, store_auto_pwm, 2, 1),
2695 SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IWUSR | S_IRUGO,
2696 show_auto_temp, store_auto_temp, 2, 1),
2697 SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IWUSR | S_IRUGO,
2698 show_auto_temp_hyst, store_auto_temp_hyst, 2, 1),
2699 SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IWUSR | S_IRUGO,
2700 show_auto_pwm, store_auto_pwm, 2, 2),
2701 SENSOR_ATTR_2(pwm3_auto_point3_temp, S_IWUSR | S_IRUGO,
2702 show_auto_temp, store_auto_temp, 2, 2),
2703 SENSOR_ATTR_2(pwm3_auto_point3_temp_hyst, S_IWUSR | S_IRUGO,
2704 show_auto_temp_hyst, store_auto_temp_hyst, 2, 2),
2705 SENSOR_ATTR_2(pwm3_auto_point4_pwm, S_IWUSR | S_IRUGO,
2706 show_auto_pwm, store_auto_pwm, 2, 3),
2707 SENSOR_ATTR_2(pwm3_auto_point4_temp, S_IWUSR | S_IRUGO,
2708 show_auto_temp, store_auto_temp, 2, 3),
2709 SENSOR_ATTR_2(pwm3_auto_point4_temp_hyst, S_IWUSR | S_IRUGO,
2710 show_auto_temp_hyst, store_auto_temp_hyst, 2, 3),
2711 SENSOR_ATTR_2(pwm3_auto_point5_pwm, S_IWUSR | S_IRUGO,
2712 show_auto_pwm, store_auto_pwm, 2, 4),
2713 SENSOR_ATTR_2(pwm3_auto_point5_temp, S_IWUSR | S_IRUGO,
2714 show_auto_temp, store_auto_temp, 2, 4),
2715 SENSOR_ATTR_2(pwm3_auto_point5_temp_hyst, S_IWUSR | S_IRUGO,
2716 show_auto_temp_hyst, store_auto_temp_hyst, 2, 4),
2717 SENSOR_ATTR_2(pwm3_auto_point6_pwm, S_IWUSR | S_IRUGO,
2718 show_auto_pwm, store_auto_pwm, 2, 5),
2719 SENSOR_ATTR_2(pwm3_auto_point6_temp, S_IWUSR | S_IRUGO,
2720 show_auto_temp, store_auto_temp, 2, 5),
2721 SENSOR_ATTR_2(pwm3_auto_point6_temp_hyst, S_IWUSR | S_IRUGO,
2722 show_auto_temp_hyst, store_auto_temp_hyst, 2, 5),
2723 SENSOR_ATTR_2(pwm3_auto_point7_pwm, S_IWUSR | S_IRUGO,
2724 show_auto_pwm, store_auto_pwm, 2, 6),
2725 SENSOR_ATTR_2(pwm3_auto_point7_temp, S_IWUSR | S_IRUGO,
2726 show_auto_temp, store_auto_temp, 2, 6),
2727 SENSOR_ATTR_2(pwm3_auto_point7_temp_hyst, S_IWUSR | S_IRUGO,
2728 show_auto_temp_hyst, store_auto_temp_hyst, 2, 6),
2730 SENSOR_ATTR_2(pwm4_auto_point1_pwm, S_IWUSR | S_IRUGO,
2731 show_auto_pwm, store_auto_pwm, 3, 0),
2732 SENSOR_ATTR_2(pwm4_auto_point1_temp, S_IWUSR | S_IRUGO,
2733 show_auto_temp, store_auto_temp, 3, 0),
2734 SENSOR_ATTR_2(pwm4_auto_point1_temp_hyst, S_IWUSR | S_IRUGO,
2735 show_auto_temp_hyst, store_auto_temp_hyst, 3, 0),
2736 SENSOR_ATTR_2(pwm4_auto_point2_pwm, S_IWUSR | S_IRUGO,
2737 show_auto_pwm, store_auto_pwm, 3, 1),
2738 SENSOR_ATTR_2(pwm4_auto_point2_temp, S_IWUSR | S_IRUGO,
2739 show_auto_temp, store_auto_temp, 3, 1),
2740 SENSOR_ATTR_2(pwm4_auto_point2_temp_hyst, S_IWUSR | S_IRUGO,
2741 show_auto_temp_hyst, store_auto_temp_hyst, 3, 1),
2742 SENSOR_ATTR_2(pwm4_auto_point3_pwm, S_IWUSR | S_IRUGO,
2743 show_auto_pwm, store_auto_pwm, 3, 2),
2744 SENSOR_ATTR_2(pwm4_auto_point3_temp, S_IWUSR | S_IRUGO,
2745 show_auto_temp, store_auto_temp, 3, 2),
2746 SENSOR_ATTR_2(pwm4_auto_point3_temp_hyst, S_IWUSR | S_IRUGO,
2747 show_auto_temp_hyst, store_auto_temp_hyst, 3, 2),
2748 SENSOR_ATTR_2(pwm4_auto_point4_pwm, S_IWUSR | S_IRUGO,
2749 show_auto_pwm, store_auto_pwm, 3, 3),
2750 SENSOR_ATTR_2(pwm4_auto_point4_temp, S_IWUSR | S_IRUGO,
2751 show_auto_temp, store_auto_temp, 3, 3),
2752 SENSOR_ATTR_2(pwm4_auto_point4_temp_hyst, S_IWUSR | S_IRUGO,
2753 show_auto_temp_hyst, store_auto_temp_hyst, 3, 3),
2754 SENSOR_ATTR_2(pwm4_auto_point5_pwm, S_IWUSR | S_IRUGO,
2755 show_auto_pwm, store_auto_pwm, 3, 4),
2756 SENSOR_ATTR_2(pwm4_auto_point5_temp, S_IWUSR | S_IRUGO,
2757 show_auto_temp, store_auto_temp, 3, 4),
2758 SENSOR_ATTR_2(pwm4_auto_point5_temp_hyst, S_IWUSR | S_IRUGO,
2759 show_auto_temp_hyst, store_auto_temp_hyst, 3, 4),
2760 SENSOR_ATTR_2(pwm4_auto_point6_pwm, S_IWUSR | S_IRUGO,
2761 show_auto_pwm, store_auto_pwm, 3, 5),
2762 SENSOR_ATTR_2(pwm4_auto_point6_temp, S_IWUSR | S_IRUGO,
2763 show_auto_temp, store_auto_temp, 3, 5),
2764 SENSOR_ATTR_2(pwm4_auto_point6_temp_hyst, S_IWUSR | S_IRUGO,
2765 show_auto_temp_hyst, store_auto_temp_hyst, 3, 5),
2766 SENSOR_ATTR_2(pwm4_auto_point7_pwm, S_IWUSR | S_IRUGO,
2767 show_auto_pwm, store_auto_pwm, 3, 6),
2768 SENSOR_ATTR_2(pwm4_auto_point7_temp, S_IWUSR | S_IRUGO,
2769 show_auto_temp, store_auto_temp, 3, 6),
2770 SENSOR_ATTR_2(pwm4_auto_point7_temp_hyst, S_IWUSR | S_IRUGO,
2771 show_auto_temp_hyst, store_auto_temp_hyst, 3, 6),
2773 SENSOR_ATTR_2(pwm5_auto_point1_pwm, S_IWUSR | S_IRUGO,
2774 show_auto_pwm, store_auto_pwm, 4, 0),
2775 SENSOR_ATTR_2(pwm5_auto_point1_temp, S_IWUSR | S_IRUGO,
2776 show_auto_temp, store_auto_temp, 4, 0),
2777 SENSOR_ATTR_2(pwm5_auto_point1_temp_hyst, S_IWUSR | S_IRUGO,
2778 show_auto_temp_hyst, store_auto_temp_hyst, 4, 0),
2779 SENSOR_ATTR_2(pwm5_auto_point2_pwm, S_IWUSR | S_IRUGO,
2780 show_auto_pwm, store_auto_pwm, 4, 1),
2781 SENSOR_ATTR_2(pwm5_auto_point2_temp, S_IWUSR | S_IRUGO,
2782 show_auto_temp, store_auto_temp, 4, 1),
2783 SENSOR_ATTR_2(pwm5_auto_point2_temp_hyst, S_IWUSR | S_IRUGO,
2784 show_auto_temp_hyst, store_auto_temp_hyst, 4, 1),
2785 SENSOR_ATTR_2(pwm5_auto_point3_pwm, S_IWUSR | S_IRUGO,
2786 show_auto_pwm, store_auto_pwm, 4, 2),
2787 SENSOR_ATTR_2(pwm5_auto_point3_temp, S_IWUSR | S_IRUGO,
2788 show_auto_temp, store_auto_temp, 4, 2),
2789 SENSOR_ATTR_2(pwm5_auto_point3_temp_hyst, S_IWUSR | S_IRUGO,
2790 show_auto_temp_hyst, store_auto_temp_hyst, 4, 2),
2791 SENSOR_ATTR_2(pwm5_auto_point4_pwm, S_IWUSR | S_IRUGO,
2792 show_auto_pwm, store_auto_pwm, 4, 3),
2793 SENSOR_ATTR_2(pwm5_auto_point4_temp, S_IWUSR | S_IRUGO,
2794 show_auto_temp, store_auto_temp, 4, 3),
2795 SENSOR_ATTR_2(pwm5_auto_point4_temp_hyst, S_IWUSR | S_IRUGO,
2796 show_auto_temp_hyst, store_auto_temp_hyst, 4, 3),
2797 SENSOR_ATTR_2(pwm5_auto_point5_pwm, S_IWUSR | S_IRUGO,
2798 show_auto_pwm, store_auto_pwm, 4, 4),
2799 SENSOR_ATTR_2(pwm5_auto_point5_temp, S_IWUSR | S_IRUGO,
2800 show_auto_temp, store_auto_temp, 4, 4),
2801 SENSOR_ATTR_2(pwm5_auto_point5_temp_hyst, S_IWUSR | S_IRUGO,
2802 show_auto_temp_hyst, store_auto_temp_hyst, 4, 4),
2803 SENSOR_ATTR_2(pwm5_auto_point6_pwm, S_IWUSR | S_IRUGO,
2804 show_auto_pwm, store_auto_pwm, 4, 5),
2805 SENSOR_ATTR_2(pwm5_auto_point6_temp, S_IWUSR | S_IRUGO,
2806 show_auto_temp, store_auto_temp, 4, 5),
2807 SENSOR_ATTR_2(pwm5_auto_point6_temp_hyst, S_IWUSR | S_IRUGO,
2808 show_auto_temp_hyst, store_auto_temp_hyst, 4, 5),
2809 SENSOR_ATTR_2(pwm5_auto_point7_pwm, S_IWUSR | S_IRUGO,
2810 show_auto_pwm, store_auto_pwm, 4, 6),
2811 SENSOR_ATTR_2(pwm5_auto_point7_temp, S_IWUSR | S_IRUGO,
2812 show_auto_temp, store_auto_temp, 4, 6),
2813 SENSOR_ATTR_2(pwm5_auto_point7_temp_hyst, S_IWUSR | S_IRUGO,
2814 show_auto_temp_hyst, store_auto_temp_hyst, 4, 6),
2818 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
2820 struct nct6775_data *data = dev_get_drvdata(dev);
2821 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
2824 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
2826 /* Case open detection */
2829 clear_caseopen(struct device *dev, struct device_attribute *attr,
2830 const char *buf, size_t count)
2832 struct nct6775_data *data = dev_get_drvdata(dev);
2833 struct nct6775_sio_data *sio_data = dev->platform_data;
2834 int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
2838 if (kstrtoul(buf, 10, &val) || val != 0)
2841 mutex_lock(&data->update_lock);
2844 * Use CR registers to clear caseopen status.
2845 * The CR registers are the same for all chips, and not all chips
2846 * support clearing the caseopen status through "regular" registers.
2848 superio_enter(sio_data->sioreg);
2849 superio_select(sio_data->sioreg, NCT6775_LD_ACPI);
2850 reg = superio_inb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
2851 reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
2852 superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
2853 reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
2854 superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
2855 superio_exit(sio_data->sioreg);
2857 data->valid = 0; /* Force cache refresh */
2859 mutex_unlock(&data->update_lock);
2864 static struct sensor_device_attribute sda_caseopen[] = {
2865 SENSOR_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
2866 clear_caseopen, INTRUSION_ALARM_BASE),
2867 SENSOR_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
2868 clear_caseopen, INTRUSION_ALARM_BASE + 1),
2872 * Driver and device management
2875 static void nct6775_device_remove_files(struct device *dev)
2878 * some entries in the following arrays may not have been used in
2879 * device_create_file(), but device_remove_file() will ignore them
2882 struct nct6775_data *data = dev_get_drvdata(dev);
2884 for (i = 0; i < data->pwm_num; i++)
2885 sysfs_remove_group(&dev->kobj, &nct6775_group_pwm[i]);
2887 for (i = 0; i < ARRAY_SIZE(sda_max_output); i++)
2888 device_remove_file(dev, &sda_max_output[i].dev_attr);
2890 for (i = 0; i < ARRAY_SIZE(sda_step_output); i++)
2891 device_remove_file(dev, &sda_max_output[i].dev_attr);
2893 for (i = 0; i < ARRAY_SIZE(sda_weight_duty_base); i++)
2894 device_remove_file(dev, &sda_weight_duty_base[i].dev_attr);
2896 for (i = 0; i < ARRAY_SIZE(sda_auto_pwm_arrays); i++)
2897 device_remove_file(dev, &sda_auto_pwm_arrays[i].dev_attr);
2899 for (i = 0; i < data->in_num; i++)
2900 sysfs_remove_group(&dev->kobj, &nct6775_group_in[i]);
2902 for (i = 0; i < 5; i++) {
2903 device_remove_file(dev, &sda_fan_input[i].dev_attr);
2904 device_remove_file(dev, &sda_fan_alarm[i].dev_attr);
2905 device_remove_file(dev, &sda_fan_div[i].dev_attr);
2906 device_remove_file(dev, &sda_fan_min[i].dev_attr);
2908 for (i = 0; i < NUM_TEMP; i++) {
2909 if (!(data->have_temp & (1 << i)))
2911 device_remove_file(dev, &sda_temp_input[i].dev_attr);
2912 device_remove_file(dev, &sda_temp_label[i].dev_attr);
2913 device_remove_file(dev, &sda_temp_max[i].dev_attr);
2914 device_remove_file(dev, &sda_temp_max_hyst[i].dev_attr);
2915 if (!(data->have_temp_fixed & (1 << i)))
2917 device_remove_file(dev, &sda_temp_type[i].dev_attr);
2918 device_remove_file(dev, &sda_temp_offset[i].dev_attr);
2919 if (i >= NUM_TEMP_ALARM)
2921 device_remove_file(dev, &sda_temp_alarm[i].dev_attr);
2924 device_remove_file(dev, &sda_caseopen[0].dev_attr);
2925 device_remove_file(dev, &sda_caseopen[1].dev_attr);
2927 device_remove_file(dev, &dev_attr_name);
2928 device_remove_file(dev, &dev_attr_cpu0_vid);
2931 /* Get the monitoring functions started */
2932 static inline void __devinit nct6775_init_device(struct nct6775_data *data)
2937 /* Start monitoring if needed */
2938 if (data->REG_CONFIG) {
2939 tmp = nct6775_read_value(data, data->REG_CONFIG);
2941 nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
2944 /* Enable temperature sensors if needed */
2945 for (i = 0; i < NUM_TEMP; i++) {
2946 if (!(data->have_temp & (1 << i)))
2948 if (!data->reg_temp_config[i])
2950 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
2952 nct6775_write_value(data, data->reg_temp_config[i],
2956 /* Enable VBAT monitoring if needed */
2957 tmp = nct6775_read_value(data, data->REG_VBAT);
2959 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
2961 diode = nct6775_read_value(data, data->REG_DIODE);
2963 for (i = 0; i < data->temp_fixed_num; i++) {
2964 if (!(data->have_temp_fixed & (1 << i)))
2966 if ((tmp & (0x02 << i))) /* diode */
2967 data->temp_type[i] = 3 - ((diode >> i) & 0x02);
2968 else /* thermistor */
2969 data->temp_type[i] = 4;
2973 static void __devinit
2974 nct6775_check_fan_inputs(const struct nct6775_sio_data *sio_data,
2975 struct nct6775_data *data)
2978 bool fan3pin, fan3min, fan4pin, fan4min, fan5pin;
2979 bool pwm3pin, pwm4pin, pwm5pin;
2981 superio_enter(sio_data->sioreg);
2983 /* fan4 and fan5 share some pins with the GPIO and serial flash */
2984 if (data->kind == nct6775) {
2985 regval = superio_inb(sio_data->sioreg, 0x2c);
2987 fan3pin = regval & (1 << 6);
2989 pwm3pin = regval & (1 << 7);
2991 /* On NCT6775, fan4 shares pins with the fdc interface */
2992 fan4pin = !(superio_inb(sio_data->sioreg, 0x2A) & 0x80);
2997 } else if (data->kind == nct6776) {
2998 bool gpok = superio_inb(sio_data->sioreg, 0x27) & 0x80;
3000 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3001 regval = superio_inb(sio_data->sioreg, SIO_REG_ENABLE);
3006 fan3pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x40);
3011 fan4pin = superio_inb(sio_data->sioreg, 0x1C) & 0x01;
3016 fan5pin = superio_inb(sio_data->sioreg, 0x1C) & 0x02;
3023 } else { /* NCT6779D */
3024 regval = superio_inb(sio_data->sioreg, 0x1c);
3026 fan3pin = !(regval & (1 << 5));
3027 fan4pin = !(regval & (1 << 6));
3028 fan5pin = !(regval & (1 << 7));
3030 pwm3pin = !(regval & (1 << 0));
3031 pwm4pin = !(regval & (1 << 1));
3032 pwm5pin = !(regval & (1 << 2));
3038 superio_exit(sio_data->sioreg);
3040 data->has_fan = data->has_fan_min = 0x03; /* fan1 and fan2 */
3041 data->has_fan |= fan3pin << 2;
3042 data->has_fan_min |= fan3min << 2;
3044 data->has_fan |= (fan4pin << 3) | (fan5pin << 4);
3045 data->has_fan_min |= (fan4min << 3) | (fan5pin << 4);
3047 data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) | (pwm5pin << 4);
3050 static int __devinit nct6775_probe(struct platform_device *pdev)
3052 struct device *dev = &pdev->dev;
3053 struct nct6775_sio_data *sio_data = dev->platform_data;
3054 struct nct6775_data *data;
3055 struct resource *res;
3057 int src, mask, available;
3058 const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3059 const u16 *reg_temp_alternate;
3062 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3063 if (!request_region(res->start, IOREGION_LENGTH, DRVNAME)) {
3065 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
3066 (unsigned long)res->start,
3067 (unsigned long)res->start + IOREGION_LENGTH - 1);
3071 data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3078 data->kind = sio_data->kind;
3079 data->addr = res->start;
3080 mutex_init(&data->lock);
3081 mutex_init(&data->update_lock);
3082 data->name = nct6775_device_names[data->kind];
3083 platform_set_drvdata(pdev, data);
3085 switch (data->kind) {
3089 data->auto_pwm_num = 6;
3090 data->has_fan_div = true;
3091 data->temp_fixed_num = 3;
3093 data->ALARM_BITS = NCT6775_ALARM_BITS;
3095 data->fan_from_reg = fan_from_reg16;
3096 data->fan_from_reg_min = fan_from_reg8;
3098 data->temp_label = nct6775_temp_label;
3099 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
3101 data->REG_CONFIG = NCT6775_REG_CONFIG;
3102 data->REG_VBAT = NCT6775_REG_VBAT;
3103 data->REG_DIODE = NCT6775_REG_DIODE;
3104 data->REG_VIN = NCT6775_REG_IN;
3105 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3106 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3107 data->REG_TARGET = NCT6775_REG_TARGET;
3108 data->REG_FAN = NCT6775_REG_FAN;
3109 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3110 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3111 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3112 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3113 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3114 data->REG_PWM[0] = NCT6775_REG_PWM;
3115 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3116 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3117 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3118 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3119 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3120 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3121 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3122 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3123 data->REG_TEMP_MON = NCT6775_REG_TEMP_MON;
3124 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3125 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3126 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3127 data->REG_CRITICAL_TEMP_TOLERANCE
3128 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3129 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3130 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3131 data->REG_TEMP_SEL[0] = NCT6775_REG_TEMP_SEL;
3132 data->REG_TEMP_SEL[1] = NCT6775_REG_WEIGHT_TEMP_SEL;
3133 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3134 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3135 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3136 data->REG_ALARM = NCT6775_REG_ALARM;
3138 reg_temp = NCT6775_REG_TEMP;
3139 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3140 reg_temp_over = NCT6775_REG_TEMP_OVER;
3141 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3142 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3143 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3149 data->auto_pwm_num = 4;
3150 data->has_fan_div = false;
3151 data->temp_fixed_num = 3;
3153 data->ALARM_BITS = NCT6776_ALARM_BITS;
3155 data->fan_from_reg = fan_from_reg13;
3156 data->fan_from_reg_min = fan_from_reg13;
3158 data->temp_label = nct6776_temp_label;
3159 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3161 data->REG_CONFIG = NCT6775_REG_CONFIG;
3162 data->REG_VBAT = NCT6775_REG_VBAT;
3163 data->REG_DIODE = NCT6775_REG_DIODE;
3164 data->REG_VIN = NCT6775_REG_IN;
3165 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3166 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3167 data->REG_TARGET = NCT6775_REG_TARGET;
3168 data->REG_FAN = NCT6775_REG_FAN;
3169 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3170 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3171 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3172 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3173 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3174 data->REG_PWM[0] = NCT6775_REG_PWM;
3175 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3176 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3177 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3178 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3179 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3180 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3181 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3182 data->REG_TEMP_MON = NCT6775_REG_TEMP_MON;
3183 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3184 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3185 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3186 data->REG_CRITICAL_TEMP_TOLERANCE
3187 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3188 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3189 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3190 data->REG_TEMP_SEL[0] = NCT6775_REG_TEMP_SEL;
3191 data->REG_TEMP_SEL[1] = NCT6775_REG_WEIGHT_TEMP_SEL;
3192 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3193 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3194 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3195 data->REG_ALARM = NCT6775_REG_ALARM;
3197 reg_temp = NCT6775_REG_TEMP;
3198 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3199 reg_temp_over = NCT6775_REG_TEMP_OVER;
3200 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3201 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3202 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3208 data->auto_pwm_num = 4;
3209 data->has_fan_div = false;
3210 data->temp_fixed_num = 6;
3212 data->ALARM_BITS = NCT6779_ALARM_BITS;
3214 data->fan_from_reg = fan_from_reg13;
3215 data->fan_from_reg_min = fan_from_reg13;
3217 data->temp_label = nct6779_temp_label;
3218 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3220 data->REG_CONFIG = NCT6775_REG_CONFIG;
3221 data->REG_VBAT = NCT6775_REG_VBAT;
3222 data->REG_DIODE = NCT6775_REG_DIODE;
3223 data->REG_VIN = NCT6779_REG_IN;
3224 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3225 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3226 data->REG_TARGET = NCT6775_REG_TARGET;
3227 data->REG_FAN = NCT6779_REG_FAN;
3228 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3229 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3230 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3231 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3232 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3233 data->REG_PWM[0] = NCT6775_REG_PWM;
3234 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3235 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3236 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3237 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3238 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3239 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3240 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3241 data->REG_TEMP_MON = NCT6775_REG_TEMP_MON;
3242 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3243 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3244 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3245 data->REG_CRITICAL_TEMP_TOLERANCE
3246 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3247 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3248 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3249 data->REG_TEMP_SEL[0] = NCT6775_REG_TEMP_SEL;
3250 data->REG_TEMP_SEL[1] = NCT6775_REG_WEIGHT_TEMP_SEL;
3251 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3252 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3253 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3254 data->REG_ALARM = NCT6779_REG_ALARM;
3256 reg_temp = NCT6779_REG_TEMP;
3257 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3258 reg_temp_over = NCT6775_REG_TEMP_OVER;
3259 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3260 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3261 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3268 data->have_in = (1 << data->in_num) - 1;
3269 data->have_temp = 0;
3272 * On some boards, not all available temperature sources are monitored,
3273 * even though some of the monitoring registers are unused.
3274 * Get list of unused monitoring registers, then detect if any fan
3275 * controls are configured to use unmonitored temperature sources.
3276 * If so, assign the unmonitored temperature sources to available
3277 * monitoring registers.
3281 for (i = 0; i < num_reg_temp; i++) {
3282 if (reg_temp[i] == 0)
3285 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3286 if (!src || (mask & (1 << src)))
3287 available |= 1 << i;
3293 * Now find unmonitored temperature registers and enable monitoring
3294 * if additional monitoring registers are available.
3296 for (i = 0; i < ARRAY_SIZE(data->REG_TEMP_SEL) && available; i++) {
3299 if (!data->REG_TEMP_SEL[i])
3301 for (j = 0; j < data->pwm_num && available; j++) {
3304 if (!data->REG_TEMP_SEL[i][j])
3306 src = nct6775_read_value(data,
3307 data->REG_TEMP_SEL[i][j]);
3309 if (!src || (mask & (1 << src)))
3311 if (src >= data->temp_label_num ||
3312 !strlen(data->temp_label[src])) {
3314 "Select source %d:%d reg 0x%x invalid (%d)\n",
3315 i, j, data->REG_TEMP_SEL[i][j], src);
3319 index = __ffs(available);
3320 nct6775_write_value(data,
3321 data->REG_TEMP_SOURCE[index],
3323 available &= ~(1 << index);
3329 s = NUM_TEMP_FIXED; /* First dynamic temperature attribute */
3330 for (i = 0; i < num_reg_temp; i++) {
3331 if (reg_temp[i] == 0)
3334 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3335 if (!src || (mask & (1 << src)))
3338 if (src >= data->temp_label_num ||
3339 !strlen(data->temp_label[src])) {
3341 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3342 src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
3348 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3349 if (src <= data->temp_fixed_num) {
3350 data->have_temp |= 1 << (src - 1);
3351 data->have_temp_fixed |= 1 << (src - 1);
3352 data->reg_temp[0][src - 1] = reg_temp[i];
3353 data->reg_temp[1][src - 1] = reg_temp_over[i];
3354 data->reg_temp[2][src - 1] = reg_temp_hyst[i];
3355 data->reg_temp_config[src - 1] = reg_temp_config[i];
3356 data->temp_src[src - 1] = src;
3363 /* Use dynamic index for other sources */
3364 data->have_temp |= 1 << s;
3365 data->reg_temp[0][s] = reg_temp[i];
3366 data->reg_temp[1][s] = reg_temp_over[i];
3367 data->reg_temp[2][s] = reg_temp_hyst[i];
3368 data->reg_temp_config[s] = reg_temp_config[i];
3370 data->temp_src[s] = src;
3376 * Go through the list of alternate temp registers and enable
3378 * The temperature is already monitored if the respective bit in <mask>
3381 for (i = 0; i < data->temp_label_num - 1; i++) {
3382 if (!reg_temp_alternate[i])
3384 if (mask & (1 << (i + 1)))
3386 if (i < data->temp_fixed_num) {
3387 if (data->have_temp & (1 << i))
3389 data->have_temp |= 1 << i;
3390 data->reg_temp[0][i] = reg_temp_alternate[i];
3391 data->temp_src[i] = i + 1;
3395 if (s >= NUM_TEMP) /* Abort if no more space */
3398 data->have_temp |= 1 << s;
3399 data->reg_temp[0][s] = reg_temp_alternate[i];
3400 data->temp_src[s] = i + 1;
3403 #endif /* TESTING */
3405 switch (data->kind) {
3410 * On NCT6776, AUXTIN and VIN3 pins are shared.
3411 * Only way to detect it is to check if AUXTIN is used
3412 * as a temperature source, and if that source is
3415 * If that is the case, disable in6, which reports VIN3.
3416 * Otherwise disable temp3.
3418 if (data->have_temp & (1 << 2)) {
3419 u8 reg = nct6775_read_value(data,
3420 data->reg_temp_config[2]);
3422 data->have_temp &= ~(1 << 2);
3424 data->have_in &= ~(1 << 6);
3434 * Assume voltage is disabled if the respective temperature is
3435 * used as temperature source.
3437 for (i = 0; i < ARRAY_SIZE(NCT6779_REG_TEMP); i++) {
3438 if (!(data->have_temp & (1 << i)))
3440 if (i == 2) /* AUXTIN0 */
3441 data->have_in &= ~(1 << 6); /* no VIN4 */
3442 if (i == 3) /* AUXTIN1 */
3443 data->have_in &= ~(1 << 10); /* no VIN5 */
3444 if (i == 4) /* AUXTIN2 */
3445 data->have_in &= ~(1 << 11); /* no VIN6 */
3446 if (i == 5) /* AUXTIN3 */
3447 data->have_in &= ~(1 << 14); /* no VIN7 */
3452 /* Initialize the chip */
3453 nct6775_init_device(data);
3455 data->vrm = vid_which_vrm();
3456 superio_enter(sio_data->sioreg);
3459 * We can get the VID input values directly at logical device D 0xe3.
3461 superio_select(sio_data->sioreg, NCT6775_LD_VID);
3462 data->vid = superio_inb(sio_data->sioreg, 0xe3);
3463 err = device_create_file(dev, &dev_attr_cpu0_vid);
3470 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3471 tmp = superio_inb(sio_data->sioreg,
3472 NCT6775_REG_CR_FAN_DEBOUNCE);
3473 switch (data->kind) {
3482 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
3484 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
3488 superio_exit(sio_data->sioreg);
3490 nct6775_check_fan_inputs(sio_data, data);
3492 /* Read fan clock dividers immediately */
3493 nct6775_update_fan_div_common(dev, data);
3495 /* Register sysfs hooks */
3496 for (i = 0; i < data->pwm_num; i++) {
3497 if (!(data->has_pwm & (1 << i)))
3500 err = sysfs_create_group(&dev->kobj, &nct6775_group_pwm[i]);
3504 if (data->REG_PWM[3]) {
3505 err = device_create_file(dev,
3506 &sda_max_output[i].dev_attr);
3510 if (data->REG_PWM[4]) {
3511 err = device_create_file(dev,
3512 &sda_step_output[i].dev_attr);
3516 if (data->REG_PWM[6]) {
3517 err = device_create_file(dev,
3518 &sda_weight_duty_base[i].dev_attr);
3523 for (i = 0; i < ARRAY_SIZE(sda_auto_pwm_arrays); i++) {
3524 struct sensor_device_attribute_2 *attr =
3525 &sda_auto_pwm_arrays[i];
3527 if (!(data->has_pwm & (1 << attr->nr)))
3529 if (attr->index > data->auto_pwm_num)
3531 err = device_create_file(dev, &attr->dev_attr);
3536 for (i = 0; i < data->in_num; i++) {
3537 if (!(data->have_in & (1 << i)))
3539 err = sysfs_create_group(&dev->kobj, &nct6775_group_in[i]);
3544 for (i = 0; i < 5; i++) {
3545 if (data->has_fan & (1 << i)) {
3546 err = device_create_file(dev,
3547 &sda_fan_input[i].dev_attr);
3550 err = device_create_file(dev,
3551 &sda_fan_alarm[i].dev_attr);
3554 if (data->kind != nct6776 &&
3555 data->kind != nct6779) {
3556 err = device_create_file(dev,
3557 &sda_fan_div[i].dev_attr);
3561 if (data->has_fan_min & (1 << i)) {
3562 err = device_create_file(dev,
3563 &sda_fan_min[i].dev_attr);
3570 for (i = 0; i < NUM_TEMP; i++) {
3571 if (!(data->have_temp & (1 << i)))
3573 err = device_create_file(dev, &sda_temp_input[i].dev_attr);
3576 if (data->temp_label) {
3577 err = device_create_file(dev,
3578 &sda_temp_label[i].dev_attr);
3582 if (data->reg_temp[1][i]) {
3583 err = device_create_file(dev,
3584 &sda_temp_max[i].dev_attr);
3588 if (data->reg_temp[2][i]) {
3589 err = device_create_file(dev,
3590 &sda_temp_max_hyst[i].dev_attr);
3594 if (!(data->have_temp_fixed & (1 << i)))
3596 err = device_create_file(dev, &sda_temp_type[i].dev_attr);
3599 err = device_create_file(dev, &sda_temp_offset[i].dev_attr);
3602 if (i >= NUM_TEMP_ALARM ||
3603 data->ALARM_BITS[TEMP_ALARM_BASE + i] < 0)
3605 err = device_create_file(dev, &sda_temp_alarm[i].dev_attr);
3610 for (i = 0; i < ARRAY_SIZE(sda_caseopen); i++) {
3611 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + i] < 0)
3613 err = device_create_file(dev, &sda_caseopen[i].dev_attr);
3618 err = device_create_file(dev, &dev_attr_name);
3622 data->hwmon_dev = hwmon_device_register(dev);
3623 if (IS_ERR(data->hwmon_dev)) {
3624 err = PTR_ERR(data->hwmon_dev);
3631 nct6775_device_remove_files(dev);
3633 release_region(res->start, IOREGION_LENGTH);
3638 static int __devexit nct6775_remove(struct platform_device *pdev)
3640 struct nct6775_data *data = platform_get_drvdata(pdev);
3642 hwmon_device_unregister(data->hwmon_dev);
3643 nct6775_device_remove_files(&pdev->dev);
3644 release_region(data->addr, IOREGION_LENGTH);
3649 static struct platform_driver nct6775_driver = {
3651 .owner = THIS_MODULE,
3654 .probe = nct6775_probe,
3655 .remove = __devexit_p(nct6775_remove),
3658 /* nct6775_find() looks for a '627 in the Super-I/O config space */
3659 static int __init nct6775_find(int sioaddr, unsigned short *addr,
3660 struct nct6775_sio_data *sio_data)
3662 static const char __initdata sio_name_NCT6775[] = "NCT6775F";
3663 static const char __initdata sio_name_NCT6776[] = "NCT6776F";
3664 static const char __initdata sio_name_NCT6779[] = "NCT6779D";
3667 const char *sio_name;
3669 superio_enter(sioaddr);
3674 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
3675 | superio_inb(sioaddr, SIO_REG_DEVID + 1);
3676 switch (val & SIO_ID_MASK) {
3677 case SIO_NCT6775_ID:
3678 sio_data->kind = nct6775;
3679 sio_name = sio_name_NCT6775;
3681 case SIO_NCT6776_ID:
3682 sio_data->kind = nct6776;
3683 sio_name = sio_name_NCT6776;
3685 case SIO_NCT6779_ID:
3686 sio_data->kind = nct6779;
3687 sio_name = sio_name_NCT6779;
3691 pr_debug("unsupported chip ID: 0x%04x\n", val);
3692 superio_exit(sioaddr);
3696 /* We have a known chip, find the HWM I/O address */
3697 superio_select(sioaddr, NCT6775_LD_HWM);
3698 val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
3699 | superio_inb(sioaddr, SIO_REG_ADDR + 1);
3700 *addr = val & IOREGION_ALIGNMENT;
3702 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
3703 superio_exit(sioaddr);
3707 /* Activate logical device if needed */
3708 val = superio_inb(sioaddr, SIO_REG_ENABLE);
3709 if (!(val & 0x01)) {
3710 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
3711 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
3714 superio_exit(sioaddr);
3715 pr_info("Found %s chip at %#x\n", sio_name, *addr);
3716 sio_data->sioreg = sioaddr;
3722 * when Super-I/O functions move to a separate file, the Super-I/O
3723 * bus will manage the lifetime of the device and this module will only keep
3724 * track of the nct6775 driver. But since we platform_device_alloc(), we
3725 * must keep track of the device
3727 static struct platform_device *pdev;
3729 static int __init sensors_nct6775_init(void)
3732 unsigned short address;
3733 struct resource res;
3734 struct nct6775_sio_data sio_data;
3737 * initialize sio_data->kind and sio_data->sioreg.
3739 * when Super-I/O functions move to a separate file, the Super-I/O
3740 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
3741 * nct6775 hardware monitor, and call probe()
3743 if (nct6775_find(0x2e, &address, &sio_data) &&
3744 nct6775_find(0x4e, &address, &sio_data))
3747 err = platform_driver_register(&nct6775_driver);
3751 pdev = platform_device_alloc(DRVNAME, address);
3754 pr_err("Device allocation failed\n");
3755 goto exit_unregister;
3758 err = platform_device_add_data(pdev, &sio_data,
3759 sizeof(struct nct6775_sio_data));
3761 pr_err("Platform data allocation failed\n");
3762 goto exit_device_put;
3765 memset(&res, 0, sizeof(res));
3767 res.start = address + IOREGION_OFFSET;
3768 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
3769 res.flags = IORESOURCE_IO;
3771 err = acpi_check_resource_conflict(&res);
3773 goto exit_device_put;
3775 err = platform_device_add_resources(pdev, &res, 1);
3777 pr_err("Device resource addition failed (%d)\n", err);
3778 goto exit_device_put;
3781 /* platform_device_add calls probe() */
3782 err = platform_device_add(pdev);
3784 pr_err("Device addition failed (%d)\n", err);
3785 goto exit_device_put;
3791 platform_device_put(pdev);
3793 platform_driver_unregister(&nct6775_driver);
3798 static void __exit sensors_nct6775_exit(void)
3800 platform_device_unregister(pdev);
3801 platform_driver_unregister(&nct6775_driver);
3804 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
3805 MODULE_DESCRIPTION("NCT6775F/NCT6776F/NCT6779D driver");
3806 MODULE_LICENSE("GPL");
3808 module_init(sensors_nct6775_init);
3809 module_exit(sensors_nct6775_exit);