2 * nct6775 - Driver for the hardware monitoring functionality of
3 * Nuvoton NCT677x Super-I/O chips
5 * Copyright (C) 2012 Guenter Roeck <linux@roeck-us.net>
7 * Derived from w83627ehf driver
8 * Copyright (C) 2005-2012 Jean Delvare <khali@linux-fr.org>
9 * Copyright (C) 2006 Yuan Mu (Winbond),
10 * Rudolf Marek <r.marek@assembler.cz>
11 * David Hubbard <david.c.hubbard@gmail.com>
12 * Daniel J Blueman <daniel.blueman@gmail.com>
13 * Copyright (C) 2010 Sheng-Yuan Huang (Nuvoton) (PS00)
15 * Shamelessly ripped from the w83627hf driver
16 * Copyright (C) 2003 Mark Studebaker
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
33 * Supports the following chips:
35 * Chip #vin #fan #pwm #temp chip IDs man ID
36 * nct6106d 9 3 3 6+3 0xc450 0xc1 0x5ca3
37 * nct6775f 9 4 3 6+3 0xb470 0xc1 0x5ca3
38 * nct6776f 9 5 3 6+3 0xc330 0xc1 0x5ca3
39 * nct6779d 15 5 5 2+6 0xc560 0xc1 0x5ca3
41 * #temp lists the number of monitored temperature sources (first value) plus
42 * the number of directly connectable temperature sensors (second value).
45 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
47 #include <linux/module.h>
48 #include <linux/init.h>
49 #include <linux/slab.h>
50 #include <linux/jiffies.h>
51 #include <linux/platform_device.h>
52 #include <linux/hwmon.h>
53 #include <linux/hwmon-sysfs.h>
54 #include <linux/hwmon-vid.h>
55 #include <linux/err.h>
56 #include <linux/mutex.h>
57 #include <linux/acpi.h>
64 enum kinds { nct6106, nct6775, nct6776, nct6779 };
66 /* used to set data->name = nct6775_device_names[data->sio_kind] */
67 static const char * const nct6775_device_names[] = {
74 static unsigned short force_id;
75 module_param(force_id, ushort, 0);
76 MODULE_PARM_DESC(force_id, "Override the detected device ID");
78 static unsigned short fan_debounce;
79 module_param(fan_debounce, ushort, 0);
80 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
82 #define DRVNAME "nct6775"
85 * Super-I/O constants and functions
88 #define NCT6775_LD_ACPI 0x0a
89 #define NCT6775_LD_HWM 0x0b
90 #define NCT6775_LD_VID 0x0d
92 #define SIO_REG_LDSEL 0x07 /* Logical device select */
93 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
94 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
95 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
97 #define SIO_NCT6106_ID 0xc450
98 #define SIO_NCT6775_ID 0xb470
99 #define SIO_NCT6776_ID 0xc330
100 #define SIO_NCT6779_ID 0xc560
101 #define SIO_ID_MASK 0xFFF0
103 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
106 superio_outb(int ioreg, int reg, int val)
109 outb(val, ioreg + 1);
113 superio_inb(int ioreg, int reg)
116 return inb(ioreg + 1);
120 superio_select(int ioreg, int ld)
122 outb(SIO_REG_LDSEL, ioreg);
127 superio_enter(int ioreg)
130 * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
132 if (!request_muxed_region(ioreg, 2, DRVNAME))
142 superio_exit(int ioreg)
146 outb(0x02, ioreg + 1);
147 release_region(ioreg, 2);
154 #define IOREGION_ALIGNMENT (~7)
155 #define IOREGION_OFFSET 5
156 #define IOREGION_LENGTH 2
157 #define ADDR_REG_OFFSET 0
158 #define DATA_REG_OFFSET 1
160 #define NCT6775_REG_BANK 0x4E
161 #define NCT6775_REG_CONFIG 0x40
164 * Not currently used:
165 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
166 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
167 * REG_MAN_ID is at port 0x4f
168 * REG_CHIP_ID is at port 0x58
171 #define NUM_TEMP 10 /* Max number of temp attribute sets w/ limits*/
172 #define NUM_TEMP_FIXED 6 /* Max number of fixed temp attribute sets */
174 #define NUM_REG_ALARM 7 /* Max number of alarm registers */
176 /* Common and NCT6775 specific data */
178 /* Voltage min/max registers for nr=7..14 are in bank 5 */
180 static const u16 NCT6775_REG_IN_MAX[] = {
181 0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
182 0x55c, 0x55e, 0x560, 0x562 };
183 static const u16 NCT6775_REG_IN_MIN[] = {
184 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
185 0x55d, 0x55f, 0x561, 0x563 };
186 static const u16 NCT6775_REG_IN[] = {
187 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
190 #define NCT6775_REG_VBAT 0x5D
191 #define NCT6775_REG_DIODE 0x5E
192 #define NCT6775_DIODE_MASK 0x02
194 #define NCT6775_REG_FANDIV1 0x506
195 #define NCT6775_REG_FANDIV2 0x507
197 #define NCT6775_REG_CR_FAN_DEBOUNCE 0xf0
199 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
201 /* 0..15 voltages, 16..23 fans, 24..31 temperatures */
203 static const s8 NCT6775_ALARM_BITS[] = {
204 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
205 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
207 6, 7, 11, 10, 23, /* fan1..fan5 */
208 -1, -1, -1, /* unused */
209 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
210 12, -1 }; /* intrusion0, intrusion1 */
212 #define FAN_ALARM_BASE 16
213 #define TEMP_ALARM_BASE 24
214 #define INTRUSION_ALARM_BASE 30
216 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
217 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
219 /* DC or PWM output fan configuration */
220 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
221 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
223 /* Advanced Fan control, some values are common for all fans */
225 static const u16 NCT6775_REG_TARGET[] = { 0x101, 0x201, 0x301, 0x801, 0x901 };
226 static const u16 NCT6775_REG_FAN_MODE[] = { 0x102, 0x202, 0x302, 0x802, 0x902 };
227 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
228 0x103, 0x203, 0x303, 0x803, 0x903 };
229 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
230 0x104, 0x204, 0x304, 0x804, 0x904 };
231 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
232 0x105, 0x205, 0x305, 0x805, 0x905 };
233 static const u16 NCT6775_REG_FAN_START_OUTPUT[]
234 = { 0x106, 0x206, 0x306, 0x806, 0x906 };
235 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
236 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
238 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
239 0x107, 0x207, 0x307, 0x807, 0x907 };
240 static const u16 NCT6775_REG_PWM[] = { 0x109, 0x209, 0x309, 0x809, 0x909 };
241 static const u16 NCT6775_REG_PWM_READ[] = { 0x01, 0x03, 0x11, 0x13, 0x15 };
243 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
244 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
245 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
246 static const u16 NCT6775_FAN_PULSE_SHIFT[] = { 0, 0, 0, 0, 0 };
248 static const u16 NCT6775_REG_TEMP[] = {
249 0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
251 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
252 0, 0x152, 0x252, 0x628, 0x629, 0x62A };
253 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
254 0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
255 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
256 0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
258 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
259 0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
261 static const u16 NCT6775_REG_TEMP_SEL[] = {
262 0x100, 0x200, 0x300, 0x800, 0x900 };
264 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
265 0x139, 0x239, 0x339, 0x839, 0x939 };
266 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
267 0x13a, 0x23a, 0x33a, 0x83a, 0x93a };
268 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
269 0x13b, 0x23b, 0x33b, 0x83b, 0x93b };
270 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
271 0x13c, 0x23c, 0x33c, 0x83c, 0x93c };
272 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
273 0x13d, 0x23d, 0x33d, 0x83d, 0x93d };
275 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
277 static const u16 NCT6775_REG_AUTO_TEMP[] = {
278 0x121, 0x221, 0x321, 0x821, 0x921 };
279 static const u16 NCT6775_REG_AUTO_PWM[] = {
280 0x127, 0x227, 0x327, 0x827, 0x927 };
282 #define NCT6775_AUTO_TEMP(data, nr, p) ((data)->REG_AUTO_TEMP[nr] + (p))
283 #define NCT6775_AUTO_PWM(data, nr, p) ((data)->REG_AUTO_PWM[nr] + (p))
285 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
287 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
288 0x135, 0x235, 0x335, 0x835, 0x935 };
289 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
290 0x138, 0x238, 0x338, 0x838, 0x938 };
292 static const char *const nct6775_temp_label[] = {
306 "PCH_CHIP_CPU_MAX_TEMP",
316 static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
317 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
319 static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
320 = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
323 /* NCT6776 specific data */
325 static const s8 NCT6776_ALARM_BITS[] = {
326 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
327 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
329 6, 7, 11, 10, 23, /* fan1..fan5 */
330 -1, -1, -1, /* unused */
331 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
332 12, 9 }; /* intrusion0, intrusion1 */
334 static const u16 NCT6776_REG_TOLERANCE_H[] = {
335 0x10c, 0x20c, 0x30c, 0x80c, 0x90c };
337 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0 };
338 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0 };
340 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
341 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
343 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
344 0x13e, 0x23e, 0x33e, 0x83e, 0x93e };
346 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
347 0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
349 static const char *const nct6776_temp_label[] = {
364 "PCH_CHIP_CPU_MAX_TEMP",
375 static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
376 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
378 static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
379 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
381 /* NCT6779 specific data */
383 static const u16 NCT6779_REG_IN[] = {
384 0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
385 0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
387 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
388 0x459, 0x45A, 0x45B, 0x568 };
390 static const s8 NCT6779_ALARM_BITS[] = {
391 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
392 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */
394 6, 7, 11, 10, 23, /* fan1..fan5 */
395 -1, -1, -1, /* unused */
396 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
397 12, 9 }; /* intrusion0, intrusion1 */
399 static const u16 NCT6779_REG_FAN[] = { 0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8 };
400 static const u16 NCT6779_REG_FAN_PULSES[] = {
401 0x644, 0x645, 0x646, 0x647, 0x648 };
403 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
404 0x136, 0x236, 0x336, 0x836, 0x936 };
405 #define NCT6779_CRITICAL_PWM_ENABLE_MASK 0x01
406 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
407 0x137, 0x237, 0x337, 0x837, 0x937 };
409 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
410 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
412 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
414 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
417 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
418 0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
420 static const char *const nct6779_temp_label[] = {
439 "PCH_CHIP_CPU_MAX_TEMP",
450 static const u16 NCT6779_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6779_temp_label) - 1]
451 = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
452 0, 0, 0, 0, 0, 0, 0, 0,
453 0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
456 static const u16 NCT6779_REG_TEMP_CRIT[ARRAY_SIZE(nct6779_temp_label) - 1]
457 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
459 /* NCT6102D/NCT6106D specific data */
461 #define NCT6106_REG_VBAT 0x318
462 #define NCT6106_REG_DIODE 0x319
463 #define NCT6106_DIODE_MASK 0x01
465 static const u16 NCT6106_REG_IN_MAX[] = {
466 0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
467 static const u16 NCT6106_REG_IN_MIN[] = {
468 0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
469 static const u16 NCT6106_REG_IN[] = {
470 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
472 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
473 static const u16 NCT6106_REG_TEMP_HYST[] = {
474 0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
475 static const u16 NCT6106_REG_TEMP_OVER[] = {
476 0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
477 static const u16 NCT6106_REG_TEMP_CRIT_L[] = {
478 0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
479 static const u16 NCT6106_REG_TEMP_CRIT_H[] = {
480 0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
481 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
482 static const u16 NCT6106_REG_TEMP_CONFIG[] = {
483 0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
485 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
486 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
487 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0, 0 };
488 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4, 0, 0 };
490 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
491 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
492 static const u16 NCT6106_REG_PWM[] = { 0x119, 0x129, 0x139 };
493 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c };
494 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
495 static const u16 NCT6106_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130 };
496 static const u16 NCT6106_REG_TEMP_SOURCE[] = {
497 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
499 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
500 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = { 0x11b, 0x12b, 0x13b };
502 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
503 #define NCT6106_CRITICAL_PWM_ENABLE_MASK 0x10
504 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
506 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
507 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
508 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
509 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
510 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
511 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
513 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
515 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
516 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
517 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
518 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x17c };
519 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
520 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
522 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
523 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
525 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] =
526 { 0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
528 static const s8 NCT6106_ALARM_BITS[]
529 = { 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */
530 9, -1, -1, -1, -1, -1, -1, /* in8..in14 */
532 32, 33, 34, -1, -1, /* fan1..fan5 */
533 -1, -1, -1, /* unused */
534 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
535 48, -1 }; /* intrusion0, intrusion1 */
537 static const u16 NCT6106_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
538 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x51, 0x52, 0x54 };
540 static const u16 NCT6106_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
541 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x204, 0x205 };
543 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
545 if (mode == 0 && pwm == 255)
550 static int pwm_enable_to_reg(enum pwm_enable mode)
561 /* 1 is DC mode, output in ms */
562 static unsigned int step_time_from_reg(u8 reg, u8 mode)
564 return mode ? 400 * reg : 100 * reg;
567 static u8 step_time_to_reg(unsigned int msec, u8 mode)
569 return clamp_val((mode ? (msec + 200) / 400 :
570 (msec + 50) / 100), 1, 255);
573 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
575 if (reg == 0 || reg == 255)
577 return 1350000U / (reg << divreg);
580 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
582 if ((reg & 0xff1f) == 0xff1f)
585 reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
590 return 1350000U / reg;
593 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
595 if (reg == 0 || reg == 0xffff)
599 * Even though the registers are 16 bit wide, the fan divisor
602 return 1350000U / (reg << divreg);
605 static u16 fan_to_reg(u32 fan, unsigned int divreg)
610 return (1350000U / fan) >> divreg;
613 static inline unsigned int
620 * Some of the voltage inputs have internal scaling, the tables below
621 * contain 8 (the ADC LSB in mV) * scaling factor * 100
623 static const u16 scale_in[15] = {
624 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
628 static inline long in_from_reg(u8 reg, u8 nr)
630 return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
633 static inline u8 in_to_reg(u32 val, u8 nr)
635 return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
639 * Data structures and manipulation thereof
642 struct nct6775_data {
643 int addr; /* IO base of hw monitor block */
647 struct device *hwmon_dev;
648 struct attribute_group *group_in;
649 struct attribute_group *group_fan;
650 struct attribute_group *group_temp;
651 struct attribute_group *group_pwm;
653 u16 reg_temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
654 * 3=temp_crit, 4=temp_lcrit
656 u8 temp_src[NUM_TEMP];
657 u16 reg_temp_config[NUM_TEMP];
658 const char * const *temp_label;
666 const s8 *ALARM_BITS;
669 const u16 *REG_IN_MINMAX[2];
671 const u16 *REG_TARGET;
673 const u16 *REG_FAN_MODE;
674 const u16 *REG_FAN_MIN;
675 const u16 *REG_FAN_PULSES;
676 const u16 *FAN_PULSE_SHIFT;
677 const u16 *REG_FAN_TIME[3];
679 const u16 *REG_TOLERANCE_H;
681 const u8 *REG_PWM_MODE;
682 const u8 *PWM_MODE_MASK;
684 const u16 *REG_PWM[7]; /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
685 * [3]=pwm_max, [4]=pwm_step,
686 * [5]=weight_duty_step, [6]=weight_duty_base
688 const u16 *REG_PWM_READ;
690 const u16 *REG_CRITICAL_PWM_ENABLE;
691 u8 CRITICAL_PWM_ENABLE_MASK;
692 const u16 *REG_CRITICAL_PWM;
694 const u16 *REG_AUTO_TEMP;
695 const u16 *REG_AUTO_PWM;
697 const u16 *REG_CRITICAL_TEMP;
698 const u16 *REG_CRITICAL_TEMP_TOLERANCE;
700 const u16 *REG_TEMP_SOURCE; /* temp register sources */
701 const u16 *REG_TEMP_SEL;
702 const u16 *REG_WEIGHT_TEMP_SEL;
703 const u16 *REG_WEIGHT_TEMP[3]; /* 0=base, 1=tolerance, 2=step */
705 const u16 *REG_TEMP_OFFSET;
707 const u16 *REG_ALARM;
709 unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
710 unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
712 struct mutex update_lock;
713 bool valid; /* true if following fields are valid */
714 unsigned long last_updated; /* In jiffies */
716 /* Register values */
717 u8 bank; /* current register bank */
718 u8 in_num; /* number of in inputs we have */
719 u8 in[15][3]; /* [0]=in, [1]=in_max, [2]=in_min */
725 u8 has_fan; /* some fan inputs can be disabled */
726 u8 has_fan_min; /* some fans don't have min register */
729 u8 temp_fixed_num; /* 3 or 6 */
730 u8 temp_type[NUM_TEMP_FIXED];
731 s8 temp_offset[NUM_TEMP_FIXED];
732 s16 temp[4][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
736 u8 pwm_num; /* number of pwm */
737 u8 pwm_mode[5]; /* 1->DC variable voltage, 0->PWM variable duty cycle */
738 enum pwm_enable pwm_enable[5];
741 * 2->thermal cruise mode (also called SmartFan I)
742 * 3->fan speed cruise mode
744 * 5->enhanced variable thermal cruise (SmartFan IV)
746 u8 pwm[7][5]; /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
747 * [3]=pwm_max, [4]=pwm_step,
748 * [5]=weight_duty_step, [6]=weight_duty_base
754 u32 target_speed_tolerance[5];
755 u8 speed_tolerance_limit;
757 u8 temp_tolerance[2][5];
760 u8 fan_time[3][5]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
762 /* Automatic fan speed control registers */
767 u8 pwm_weight_temp_sel[5];
768 u8 weight_temp[3][5]; /* 0->temp_step, 1->temp_step_tol,
781 /* Remember extra register values over suspend/resume */
788 struct nct6775_sio_data {
793 struct sensor_device_template {
794 struct device_attribute dev_attr;
802 bool s2; /* true if both index and nr are used */
805 struct sensor_device_attr_u {
807 struct sensor_device_attribute a1;
808 struct sensor_device_attribute_2 a2;
813 #define SENSOR_DEVICE_TEMPLATE(_name, _mode, _show, _store, _index) \
814 { .dev_attr = __ATTR(_name, _mode, _show, _store), \
818 #define SENSOR_DEVICE_TEMPLATE_2(_name, _mode, _show, _store, \
820 { .dev_attr = __ATTR(_name, _mode, _show, _store), \
821 .u.s.index = _index, \
825 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
826 static struct sensor_device_template sensor_dev_template_##_name \
827 = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, \
830 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store, \
832 static struct sensor_device_template sensor_dev_template_##_name \
833 = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \
836 struct sensor_template_group {
837 struct sensor_device_template **templates;
838 umode_t (*is_visible)(struct kobject *, struct attribute *, int);
842 static struct attribute_group *
843 nct6775_create_attr_group(struct device *dev, struct sensor_template_group *tg,
846 struct attribute_group *group;
847 struct sensor_device_attr_u *su;
848 struct sensor_device_attribute *a;
849 struct sensor_device_attribute_2 *a2;
850 struct attribute **attrs;
851 struct sensor_device_template **t;
852 int err, i, j, count;
855 return ERR_PTR(-EINVAL);
858 for (count = 0; *t; t++, count++)
862 return ERR_PTR(-EINVAL);
864 group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
866 return ERR_PTR(-ENOMEM);
868 attrs = devm_kzalloc(dev, sizeof(*attrs) * (repeat * count + 1),
871 return ERR_PTR(-ENOMEM);
873 su = devm_kzalloc(dev, sizeof(*su) * repeat * count,
876 return ERR_PTR(-ENOMEM);
878 group->attrs = attrs;
879 group->is_visible = tg->is_visible;
881 for (i = 0; i < repeat; i++) {
883 for (j = 0; *t != NULL; j++) {
884 snprintf(su->name, sizeof(su->name),
885 (*t)->dev_attr.attr.name, tg->base + i);
888 a2->dev_attr.attr.name = su->name;
889 a2->nr = (*t)->u.s.nr + i;
890 a2->index = (*t)->u.s.index;
891 a2->dev_attr.attr.mode =
892 (*t)->dev_attr.attr.mode;
893 a2->dev_attr.show = (*t)->dev_attr.show;
894 a2->dev_attr.store = (*t)->dev_attr.store;
895 *attrs = &a2->dev_attr.attr;
898 a->dev_attr.attr.name = su->name;
899 a->index = (*t)->u.index + i;
900 a->dev_attr.attr.mode =
901 (*t)->dev_attr.attr.mode;
902 a->dev_attr.show = (*t)->dev_attr.show;
903 a->dev_attr.store = (*t)->dev_attr.store;
904 *attrs = &a->dev_attr.attr;
912 err = sysfs_create_group(&dev->kobj, group);
914 return ERR_PTR(-ENOMEM);
919 static bool is_word_sized(struct nct6775_data *data, u16 reg)
921 switch (data->kind) {
923 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
924 reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
925 reg == 0x111 || reg == 0x121 || reg == 0x131;
927 return (((reg & 0xff00) == 0x100 ||
928 (reg & 0xff00) == 0x200) &&
929 ((reg & 0x00ff) == 0x50 ||
930 (reg & 0x00ff) == 0x53 ||
931 (reg & 0x00ff) == 0x55)) ||
932 (reg & 0xfff0) == 0x630 ||
933 reg == 0x640 || reg == 0x642 ||
935 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
936 reg == 0x73 || reg == 0x75 || reg == 0x77;
938 return (((reg & 0xff00) == 0x100 ||
939 (reg & 0xff00) == 0x200) &&
940 ((reg & 0x00ff) == 0x50 ||
941 (reg & 0x00ff) == 0x53 ||
942 (reg & 0x00ff) == 0x55)) ||
943 (reg & 0xfff0) == 0x630 ||
945 reg == 0x640 || reg == 0x642 ||
946 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
947 reg == 0x73 || reg == 0x75 || reg == 0x77;
949 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
950 ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x09) ||
952 reg == 0x63a || reg == 0x63c || reg == 0x63e ||
953 reg == 0x640 || reg == 0x642 ||
954 reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
961 * On older chips, only registers 0x50-0x5f are banked.
962 * On more recent chips, all registers are banked.
963 * Assume that is the case and set the bank number for each access.
964 * Cache the bank number so it only needs to be set if it changes.
966 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
969 if (data->bank != bank) {
970 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
971 outb_p(bank, data->addr + DATA_REG_OFFSET);
976 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
978 int res, word_sized = is_word_sized(data, reg);
980 nct6775_set_bank(data, reg);
981 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
982 res = inb_p(data->addr + DATA_REG_OFFSET);
984 outb_p((reg & 0xff) + 1,
985 data->addr + ADDR_REG_OFFSET);
986 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
991 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
993 int word_sized = is_word_sized(data, reg);
995 nct6775_set_bank(data, reg);
996 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
998 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
999 outb_p((reg & 0xff) + 1,
1000 data->addr + ADDR_REG_OFFSET);
1002 outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
1006 /* We left-align 8-bit temperature values to make the code simpler */
1007 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
1011 res = nct6775_read_value(data, reg);
1012 if (!is_word_sized(data, reg))
1018 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
1020 if (!is_word_sized(data, reg))
1022 return nct6775_write_value(data, reg, value);
1025 /* This function assumes that the caller holds data->update_lock */
1026 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
1032 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
1033 | (data->fan_div[0] & 0x7);
1034 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1037 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
1038 | ((data->fan_div[1] << 4) & 0x70);
1039 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1042 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
1043 | (data->fan_div[2] & 0x7);
1044 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1047 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
1048 | ((data->fan_div[3] << 4) & 0x70);
1049 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1054 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
1056 if (data->kind == nct6775)
1057 nct6775_write_fan_div(data, nr);
1060 static void nct6775_update_fan_div(struct nct6775_data *data)
1064 i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
1065 data->fan_div[0] = i & 0x7;
1066 data->fan_div[1] = (i & 0x70) >> 4;
1067 i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
1068 data->fan_div[2] = i & 0x7;
1069 if (data->has_fan & (1<<3))
1070 data->fan_div[3] = (i & 0x70) >> 4;
1073 static void nct6775_update_fan_div_common(struct nct6775_data *data)
1075 if (data->kind == nct6775)
1076 nct6775_update_fan_div(data);
1079 static void nct6775_init_fan_div(struct nct6775_data *data)
1083 nct6775_update_fan_div_common(data);
1085 * For all fans, start with highest divider value if the divider
1086 * register is not initialized. This ensures that we get a
1087 * reading from the fan count register, even if it is not optimal.
1088 * We'll compute a better divider later on.
1090 for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
1091 if (!(data->has_fan & (1 << i)))
1093 if (data->fan_div[i] == 0) {
1094 data->fan_div[i] = 7;
1095 nct6775_write_fan_div_common(data, i);
1100 static void nct6775_init_fan_common(struct device *dev,
1101 struct nct6775_data *data)
1106 if (data->has_fan_div)
1107 nct6775_init_fan_div(data);
1110 * If fan_min is not set (0), set it to 0xff to disable it. This
1111 * prevents the unnecessary warning when fanX_min is reported as 0.
1113 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1114 if (data->has_fan_min & (1 << i)) {
1115 reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
1117 nct6775_write_value(data, data->REG_FAN_MIN[i],
1118 data->has_fan_div ? 0xff
1124 static void nct6775_select_fan_div(struct device *dev,
1125 struct nct6775_data *data, int nr, u16 reg)
1127 u8 fan_div = data->fan_div[nr];
1130 if (!data->has_fan_div)
1134 * If we failed to measure the fan speed, or the reported value is not
1135 * in the optimal range, and the clock divider can be modified,
1136 * let's try that for next time.
1138 if (reg == 0x00 && fan_div < 0x07)
1140 else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1143 if (fan_div != data->fan_div[nr]) {
1144 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1145 nr + 1, div_from_reg(data->fan_div[nr]),
1146 div_from_reg(fan_div));
1148 /* Preserve min limit if possible */
1149 if (data->has_fan_min & (1 << nr)) {
1150 fan_min = data->fan_min[nr];
1151 if (fan_div > data->fan_div[nr]) {
1152 if (fan_min != 255 && fan_min > 1)
1155 if (fan_min != 255) {
1161 if (fan_min != data->fan_min[nr]) {
1162 data->fan_min[nr] = fan_min;
1163 nct6775_write_value(data, data->REG_FAN_MIN[nr],
1167 data->fan_div[nr] = fan_div;
1168 nct6775_write_fan_div_common(data, nr);
1172 static void nct6775_update_pwm(struct device *dev)
1174 struct nct6775_data *data = dev_get_drvdata(dev);
1176 int fanmodecfg, reg;
1179 for (i = 0; i < data->pwm_num; i++) {
1180 if (!(data->has_pwm & (1 << i)))
1183 duty_is_dc = data->REG_PWM_MODE[i] &&
1184 (nct6775_read_value(data, data->REG_PWM_MODE[i])
1185 & data->PWM_MODE_MASK[i]);
1186 data->pwm_mode[i] = duty_is_dc;
1188 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
1189 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1190 if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1192 = nct6775_read_value(data,
1193 data->REG_PWM[j][i]);
1197 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1198 (fanmodecfg >> 4) & 7);
1200 if (!data->temp_tolerance[0][i] ||
1201 data->pwm_enable[i] != speed_cruise)
1202 data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1203 if (!data->target_speed_tolerance[i] ||
1204 data->pwm_enable[i] == speed_cruise) {
1205 u8 t = fanmodecfg & 0x0f;
1206 if (data->REG_TOLERANCE_H) {
1207 t |= (nct6775_read_value(data,
1208 data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
1210 data->target_speed_tolerance[i] = t;
1213 data->temp_tolerance[1][i] =
1214 nct6775_read_value(data,
1215 data->REG_CRITICAL_TEMP_TOLERANCE[i]);
1217 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
1218 data->pwm_temp_sel[i] = reg & 0x1f;
1219 /* If fan can stop, report floor as 0 */
1221 data->pwm[2][i] = 0;
1223 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
1224 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1225 /* If weight is disabled, report weight source as 0 */
1226 if (j == 1 && !(reg & 0x80))
1227 data->pwm_weight_temp_sel[i] = 0;
1229 /* Weight temp data */
1230 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
1231 data->weight_temp[j][i]
1232 = nct6775_read_value(data,
1233 data->REG_WEIGHT_TEMP[j][i]);
1238 static void nct6775_update_pwm_limits(struct device *dev)
1240 struct nct6775_data *data = dev_get_drvdata(dev);
1245 for (i = 0; i < data->pwm_num; i++) {
1246 if (!(data->has_pwm & (1 << i)))
1249 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1250 data->fan_time[j][i] =
1251 nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1254 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1255 /* Update only in matching mode or if never updated */
1256 if (!data->target_temp[i] ||
1257 data->pwm_enable[i] == thermal_cruise)
1258 data->target_temp[i] = reg_t & data->target_temp_mask;
1259 if (!data->target_speed[i] ||
1260 data->pwm_enable[i] == speed_cruise) {
1261 if (data->REG_TOLERANCE_H) {
1262 reg_t |= (nct6775_read_value(data,
1263 data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1265 data->target_speed[i] = reg_t;
1268 for (j = 0; j < data->auto_pwm_num; j++) {
1269 data->auto_pwm[i][j] =
1270 nct6775_read_value(data,
1271 NCT6775_AUTO_PWM(data, i, j));
1272 data->auto_temp[i][j] =
1273 nct6775_read_value(data,
1274 NCT6775_AUTO_TEMP(data, i, j));
1277 /* critical auto_pwm temperature data */
1278 data->auto_temp[i][data->auto_pwm_num] =
1279 nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1281 switch (data->kind) {
1283 reg = nct6775_read_value(data,
1284 NCT6775_REG_CRITICAL_ENAB[i]);
1285 data->auto_pwm[i][data->auto_pwm_num] =
1286 (reg & 0x02) ? 0xff : 0x00;
1289 data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1293 reg = nct6775_read_value(data,
1294 data->REG_CRITICAL_PWM_ENABLE[i]);
1295 if (reg & data->CRITICAL_PWM_ENABLE_MASK)
1296 reg = nct6775_read_value(data,
1297 data->REG_CRITICAL_PWM[i]);
1300 data->auto_pwm[i][data->auto_pwm_num] = reg;
1306 static struct nct6775_data *nct6775_update_device(struct device *dev)
1308 struct nct6775_data *data = dev_get_drvdata(dev);
1311 mutex_lock(&data->update_lock);
1313 if (time_after(jiffies, data->last_updated + HZ + HZ/2)
1315 /* Fan clock dividers */
1316 nct6775_update_fan_div_common(data);
1318 /* Measured voltages and limits */
1319 for (i = 0; i < data->in_num; i++) {
1320 if (!(data->have_in & (1 << i)))
1323 data->in[i][0] = nct6775_read_value(data,
1325 data->in[i][1] = nct6775_read_value(data,
1326 data->REG_IN_MINMAX[0][i]);
1327 data->in[i][2] = nct6775_read_value(data,
1328 data->REG_IN_MINMAX[1][i]);
1331 /* Measured fan speeds and limits */
1332 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
1335 if (!(data->has_fan & (1 << i)))
1338 reg = nct6775_read_value(data, data->REG_FAN[i]);
1339 data->rpm[i] = data->fan_from_reg(reg,
1342 if (data->has_fan_min & (1 << i))
1343 data->fan_min[i] = nct6775_read_value(data,
1344 data->REG_FAN_MIN[i]);
1345 data->fan_pulses[i] =
1346 (nct6775_read_value(data, data->REG_FAN_PULSES[i])
1347 >> data->FAN_PULSE_SHIFT[i]) & 0x03;
1349 nct6775_select_fan_div(dev, data, i, reg);
1352 nct6775_update_pwm(dev);
1353 nct6775_update_pwm_limits(dev);
1355 /* Measured temperatures and limits */
1356 for (i = 0; i < NUM_TEMP; i++) {
1357 if (!(data->have_temp & (1 << i)))
1359 for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1360 if (data->reg_temp[j][i])
1362 = nct6775_read_temp(data,
1363 data->reg_temp[j][i]);
1365 if (!(data->have_temp_fixed & (1 << i)))
1367 data->temp_offset[i]
1368 = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1372 for (i = 0; i < NUM_REG_ALARM; i++) {
1374 if (!data->REG_ALARM[i])
1376 alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1377 data->alarms |= ((u64)alarm) << (i << 3);
1380 data->last_updated = jiffies;
1384 mutex_unlock(&data->update_lock);
1389 * Sysfs callback functions
1392 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1394 struct nct6775_data *data = nct6775_update_device(dev);
1395 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1397 int index = sattr->index;
1398 return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1402 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1405 struct nct6775_data *data = dev_get_drvdata(dev);
1406 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1408 int index = sattr->index;
1410 int err = kstrtoul(buf, 10, &val);
1413 mutex_lock(&data->update_lock);
1414 data->in[nr][index] = in_to_reg(val, nr);
1415 nct6775_write_value(data, data->REG_IN_MINMAX[index-1][nr],
1416 data->in[nr][index]);
1417 mutex_unlock(&data->update_lock);
1422 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1424 struct nct6775_data *data = nct6775_update_device(dev);
1425 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1426 int nr = data->ALARM_BITS[sattr->index];
1427 return sprintf(buf, "%u\n",
1428 (unsigned int)((data->alarms >> nr) & 0x01));
1431 static umode_t nct6775_in_is_visible(struct kobject *kobj,
1432 struct attribute *attr, int index)
1434 struct device *dev = container_of(kobj, struct device, kobj);
1435 struct nct6775_data *data = dev_get_drvdata(dev);
1436 int in = index / 4; /* voltage index */
1438 if (!(data->have_in & (1 << in)))
1444 SENSOR_TEMPLATE_2(in_input, in%d_input, S_IRUGO, show_in_reg, NULL, 0, 0);
1445 SENSOR_TEMPLATE(in_alarm, in%d_alarm, S_IRUGO, show_alarm, NULL, 0);
1446 SENSOR_TEMPLATE_2(in_min, in%d_min, S_IWUSR | S_IRUGO, show_in_reg,
1447 store_in_reg, 0, 1);
1448 SENSOR_TEMPLATE_2(in_max, in%d_max, S_IWUSR | S_IRUGO, show_in_reg,
1449 store_in_reg, 0, 2);
1452 * nct6775_in_is_visible uses the index into the following array
1453 * to determine if attributes should be created or not.
1454 * Any change in order or content must be matched.
1456 static struct sensor_device_template *nct6775_attributes_in_template[] = {
1457 &sensor_dev_template_in_input,
1458 &sensor_dev_template_in_alarm,
1459 &sensor_dev_template_in_min,
1460 &sensor_dev_template_in_max,
1464 static struct sensor_template_group nct6775_in_template_group = {
1465 .templates = nct6775_attributes_in_template,
1466 .is_visible = nct6775_in_is_visible,
1470 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1472 struct nct6775_data *data = nct6775_update_device(dev);
1473 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1474 int nr = sattr->index;
1475 return sprintf(buf, "%d\n", data->rpm[nr]);
1479 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1481 struct nct6775_data *data = nct6775_update_device(dev);
1482 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1483 int nr = sattr->index;
1484 return sprintf(buf, "%d\n",
1485 data->fan_from_reg_min(data->fan_min[nr],
1486 data->fan_div[nr]));
1490 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1492 struct nct6775_data *data = nct6775_update_device(dev);
1493 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1494 int nr = sattr->index;
1495 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1499 store_fan_min(struct device *dev, struct device_attribute *attr,
1500 const char *buf, size_t count)
1502 struct nct6775_data *data = dev_get_drvdata(dev);
1503 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1504 int nr = sattr->index;
1510 err = kstrtoul(buf, 10, &val);
1514 mutex_lock(&data->update_lock);
1515 if (!data->has_fan_div) {
1516 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1522 val = 1350000U / val;
1523 val = (val & 0x1f) | ((val << 3) & 0xff00);
1525 data->fan_min[nr] = val;
1526 goto write_min; /* Leave fan divider alone */
1529 /* No min limit, alarm disabled */
1530 data->fan_min[nr] = 255;
1531 new_div = data->fan_div[nr]; /* No change */
1532 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1535 reg = 1350000U / val;
1536 if (reg >= 128 * 255) {
1538 * Speed below this value cannot possibly be represented,
1539 * even with the highest divider (128)
1541 data->fan_min[nr] = 254;
1542 new_div = 7; /* 128 == (1 << 7) */
1544 "fan%u low limit %lu below minimum %u, set to minimum\n",
1545 nr + 1, val, data->fan_from_reg_min(254, 7));
1548 * Speed above this value cannot possibly be represented,
1549 * even with the lowest divider (1)
1551 data->fan_min[nr] = 1;
1552 new_div = 0; /* 1 == (1 << 0) */
1554 "fan%u low limit %lu above maximum %u, set to maximum\n",
1555 nr + 1, val, data->fan_from_reg_min(1, 0));
1558 * Automatically pick the best divider, i.e. the one such
1559 * that the min limit will correspond to a register value
1560 * in the 96..192 range
1563 while (reg > 192 && new_div < 7) {
1567 data->fan_min[nr] = reg;
1572 * Write both the fan clock divider (if it changed) and the new
1573 * fan min (unconditionally)
1575 if (new_div != data->fan_div[nr]) {
1576 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1577 nr + 1, div_from_reg(data->fan_div[nr]),
1578 div_from_reg(new_div));
1579 data->fan_div[nr] = new_div;
1580 nct6775_write_fan_div_common(data, nr);
1581 /* Give the chip time to sample a new speed value */
1582 data->last_updated = jiffies;
1586 nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1587 mutex_unlock(&data->update_lock);
1593 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
1595 struct nct6775_data *data = nct6775_update_device(dev);
1596 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1597 int p = data->fan_pulses[sattr->index];
1599 return sprintf(buf, "%d\n", p ? : 4);
1603 store_fan_pulses(struct device *dev, struct device_attribute *attr,
1604 const char *buf, size_t count)
1606 struct nct6775_data *data = dev_get_drvdata(dev);
1607 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1608 int nr = sattr->index;
1613 err = kstrtoul(buf, 10, &val);
1620 mutex_lock(&data->update_lock);
1621 data->fan_pulses[nr] = val & 3;
1622 reg = nct6775_read_value(data, data->REG_FAN_PULSES[nr]);
1623 reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
1624 reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
1625 nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
1626 mutex_unlock(&data->update_lock);
1631 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
1632 struct attribute *attr, int index)
1634 struct device *dev = container_of(kobj, struct device, kobj);
1635 struct nct6775_data *data = dev_get_drvdata(dev);
1636 int fan = index / 5; /* fan index */
1637 int nr = index % 5; /* attribute index */
1639 if (!(data->has_fan & (1 << fan)))
1642 if (nr == 3 && !(data->has_fan_min & (1 << fan)))
1644 if (nr == 4 && data->kind != nct6775)
1650 SENSOR_TEMPLATE(fan_input, fan%d_input, S_IRUGO, show_fan, NULL, 0);
1651 SENSOR_TEMPLATE(fan_alarm, fan%d_alarm, S_IRUGO, show_alarm, NULL,
1653 SENSOR_TEMPLATE(fan_pulses, fan%d_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1654 store_fan_pulses, 0);
1655 SENSOR_TEMPLATE(fan_min, fan%d_min, S_IWUSR | S_IRUGO, show_fan_min,
1657 SENSOR_TEMPLATE(fan_div, fan%d_div, S_IRUGO, show_fan_div, NULL, 0);
1660 * nct6775_fan_is_visible uses the index into the following array
1661 * to determine if attributes should be created or not.
1662 * Any change in order or content must be matched.
1664 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
1665 &sensor_dev_template_fan_input,
1666 &sensor_dev_template_fan_alarm,
1667 &sensor_dev_template_fan_pulses,
1668 &sensor_dev_template_fan_min, /* 3 */
1669 &sensor_dev_template_fan_div, /* 4 */
1673 static struct sensor_template_group nct6775_fan_template_group = {
1674 .templates = nct6775_attributes_fan_template,
1675 .is_visible = nct6775_fan_is_visible,
1680 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1682 struct nct6775_data *data = nct6775_update_device(dev);
1683 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1684 int nr = sattr->index;
1685 return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1689 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1691 struct nct6775_data *data = nct6775_update_device(dev);
1692 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1694 int index = sattr->index;
1696 return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
1700 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
1703 struct nct6775_data *data = dev_get_drvdata(dev);
1704 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1706 int index = sattr->index;
1710 err = kstrtol(buf, 10, &val);
1714 mutex_lock(&data->update_lock);
1715 data->temp[index][nr] = LM75_TEMP_TO_REG(val);
1716 nct6775_write_temp(data, data->reg_temp[index][nr],
1717 data->temp[index][nr]);
1718 mutex_unlock(&data->update_lock);
1723 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
1725 struct nct6775_data *data = nct6775_update_device(dev);
1726 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1728 return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
1732 store_temp_offset(struct device *dev, struct device_attribute *attr,
1733 const char *buf, size_t count)
1735 struct nct6775_data *data = dev_get_drvdata(dev);
1736 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1737 int nr = sattr->index;
1741 err = kstrtol(buf, 10, &val);
1745 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
1747 mutex_lock(&data->update_lock);
1748 data->temp_offset[nr] = val;
1749 nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
1750 mutex_unlock(&data->update_lock);
1756 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
1758 struct nct6775_data *data = nct6775_update_device(dev);
1759 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1760 int nr = sattr->index;
1761 return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
1765 store_temp_type(struct device *dev, struct device_attribute *attr,
1766 const char *buf, size_t count)
1768 struct nct6775_data *data = nct6775_update_device(dev);
1769 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1770 int nr = sattr->index;
1773 u8 vbat, diode, vbit, dbit;
1775 err = kstrtoul(buf, 10, &val);
1779 if (val != 1 && val != 3 && val != 4)
1782 mutex_lock(&data->update_lock);
1784 data->temp_type[nr] = val;
1786 dbit = data->DIODE_MASK << nr;
1787 vbat = nct6775_read_value(data, data->REG_VBAT) & ~vbit;
1788 diode = nct6775_read_value(data, data->REG_DIODE) & ~dbit;
1790 case 1: /* CPU diode (diode, current mode) */
1794 case 3: /* diode, voltage mode */
1797 case 4: /* thermistor */
1800 nct6775_write_value(data, data->REG_VBAT, vbat);
1801 nct6775_write_value(data, data->REG_DIODE, diode);
1803 mutex_unlock(&data->update_lock);
1807 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
1808 struct attribute *attr, int index)
1810 struct device *dev = container_of(kobj, struct device, kobj);
1811 struct nct6775_data *data = dev_get_drvdata(dev);
1812 int temp = index / 9; /* temp index */
1813 int nr = index % 9; /* attribute index */
1815 if (!(data->have_temp & (1 << temp)))
1818 if (nr == 2 && !data->reg_temp[1][temp]) /* max */
1821 if (nr == 3 && !data->reg_temp[2][temp]) /* max_hyst */
1824 if (nr == 4 && !data->reg_temp[3][temp]) /* crit */
1827 if (nr == 5 && !data->reg_temp[4][temp]) /* lcrit */
1830 if (nr > 5 && !(data->have_temp_fixed & (1 << temp)))
1833 if (nr == 8 && data->ALARM_BITS[TEMP_ALARM_BASE + temp] < 0)
1839 SENSOR_TEMPLATE_2(temp_input, temp%d_input, S_IRUGO, show_temp, NULL, 0, 0);
1840 SENSOR_TEMPLATE(temp_label, temp%d_label, S_IRUGO, show_temp_label, NULL, 0);
1841 SENSOR_TEMPLATE_2(temp_max, temp%d_max, S_IRUGO | S_IWUSR, show_temp,
1843 SENSOR_TEMPLATE_2(temp_max_hyst, temp%d_max_hyst, S_IRUGO | S_IWUSR, show_temp,
1845 SENSOR_TEMPLATE_2(temp_crit, temp%d_crit, S_IRUGO | S_IWUSR, show_temp,
1847 SENSOR_TEMPLATE(temp_offset, temp%d_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1848 store_temp_offset, 0);
1849 SENSOR_TEMPLATE(temp_type, temp%d_type, S_IRUGO | S_IWUSR, show_temp_type,
1850 store_temp_type, 0);
1851 SENSOR_TEMPLATE(temp_alarm, temp%d_alarm, S_IRUGO, show_alarm, NULL,
1853 SENSOR_TEMPLATE_2(temp_lcrit, temp%d_lcrit, S_IRUGO | S_IWUSR, show_temp,
1857 * nct6775_temp_is_visible uses the index into the following array
1858 * to determine if attributes should be created or not.
1859 * Any change in order or content must be matched.
1861 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
1862 &sensor_dev_template_temp_input,
1863 &sensor_dev_template_temp_label,
1864 &sensor_dev_template_temp_max, /* 2 */
1865 &sensor_dev_template_temp_max_hyst, /* 3 */
1866 &sensor_dev_template_temp_crit, /* 4 */
1867 &sensor_dev_template_temp_lcrit, /* 5 */
1868 &sensor_dev_template_temp_offset, /* 6 */
1869 &sensor_dev_template_temp_type, /* 7 */
1870 &sensor_dev_template_temp_alarm, /* 8 */
1874 static struct sensor_template_group nct6775_temp_template_group = {
1875 .templates = nct6775_attributes_temp_template,
1876 .is_visible = nct6775_temp_is_visible,
1881 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
1883 struct nct6775_data *data = nct6775_update_device(dev);
1884 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1886 return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
1890 store_pwm_mode(struct device *dev, struct device_attribute *attr,
1891 const char *buf, size_t count)
1893 struct nct6775_data *data = dev_get_drvdata(dev);
1894 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1895 int nr = sattr->index;
1900 err = kstrtoul(buf, 10, &val);
1907 /* Setting DC mode is not supported for all chips/channels */
1908 if (data->REG_PWM_MODE[nr] == 0) {
1914 mutex_lock(&data->update_lock);
1915 data->pwm_mode[nr] = val;
1916 reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
1917 reg &= ~data->PWM_MODE_MASK[nr];
1919 reg |= data->PWM_MODE_MASK[nr];
1920 nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
1921 mutex_unlock(&data->update_lock);
1926 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1928 struct nct6775_data *data = nct6775_update_device(dev);
1929 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1931 int index = sattr->index;
1935 * For automatic fan control modes, show current pwm readings.
1936 * Otherwise, show the configured value.
1938 if (index == 0 && data->pwm_enable[nr] > manual)
1939 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
1941 pwm = data->pwm[index][nr];
1943 return sprintf(buf, "%d\n", pwm);
1947 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
1950 struct nct6775_data *data = dev_get_drvdata(dev);
1951 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1953 int index = sattr->index;
1955 int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
1957 = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
1961 err = kstrtoul(buf, 10, &val);
1964 val = clamp_val(val, minval[index], maxval[index]);
1966 mutex_lock(&data->update_lock);
1967 data->pwm[index][nr] = val;
1968 nct6775_write_value(data, data->REG_PWM[index][nr], val);
1969 if (index == 2) { /* floor: disable if val == 0 */
1970 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
1974 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
1976 mutex_unlock(&data->update_lock);
1980 /* Returns 0 if OK, -EINVAL otherwise */
1981 static int check_trip_points(struct nct6775_data *data, int nr)
1985 for (i = 0; i < data->auto_pwm_num - 1; i++) {
1986 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1989 for (i = 0; i < data->auto_pwm_num - 1; i++) {
1990 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1993 /* validate critical temperature and pwm if enabled (pwm > 0) */
1994 if (data->auto_pwm[nr][data->auto_pwm_num]) {
1995 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
1996 data->auto_temp[nr][data->auto_pwm_num] ||
1997 data->auto_pwm[nr][data->auto_pwm_num - 1] >
1998 data->auto_pwm[nr][data->auto_pwm_num])
2004 static void pwm_update_registers(struct nct6775_data *data, int nr)
2008 switch (data->pwm_enable[nr]) {
2013 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2014 reg = (reg & ~data->tolerance_mask) |
2015 (data->target_speed_tolerance[nr] & data->tolerance_mask);
2016 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2017 nct6775_write_value(data, data->REG_TARGET[nr],
2018 data->target_speed[nr] & 0xff);
2019 if (data->REG_TOLERANCE_H) {
2020 reg = (data->target_speed[nr] >> 8) & 0x0f;
2021 reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2022 nct6775_write_value(data,
2023 data->REG_TOLERANCE_H[nr],
2027 case thermal_cruise:
2028 nct6775_write_value(data, data->REG_TARGET[nr],
2029 data->target_temp[nr]);
2032 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2033 reg = (reg & ~data->tolerance_mask) |
2034 data->temp_tolerance[0][nr];
2035 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2041 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2043 struct nct6775_data *data = nct6775_update_device(dev);
2044 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2046 return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2050 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2051 const char *buf, size_t count)
2053 struct nct6775_data *data = dev_get_drvdata(dev);
2054 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2055 int nr = sattr->index;
2060 err = kstrtoul(buf, 10, &val);
2067 if (val == sf3 && data->kind != nct6775)
2070 if (val == sf4 && check_trip_points(data, nr)) {
2071 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2072 dev_err(dev, "Adjust trip points and try again\n");
2076 mutex_lock(&data->update_lock);
2077 data->pwm_enable[nr] = val;
2080 * turn off pwm control: select manual mode, set pwm to maximum
2082 data->pwm[0][nr] = 255;
2083 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2085 pwm_update_registers(data, nr);
2086 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2088 reg |= pwm_enable_to_reg(val) << 4;
2089 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2090 mutex_unlock(&data->update_lock);
2095 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2099 for (i = 0; i < NUM_TEMP; i++) {
2100 if (!(data->have_temp & (1 << i)))
2102 if (src == data->temp_src[i]) {
2108 return sprintf(buf, "%d\n", sel);
2112 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2114 struct nct6775_data *data = nct6775_update_device(dev);
2115 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2116 int index = sattr->index;
2118 return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2122 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2123 const char *buf, size_t count)
2125 struct nct6775_data *data = nct6775_update_device(dev);
2126 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2127 int nr = sattr->index;
2131 err = kstrtoul(buf, 10, &val);
2134 if (val == 0 || val > NUM_TEMP)
2136 if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
2139 mutex_lock(&data->update_lock);
2140 src = data->temp_src[val - 1];
2141 data->pwm_temp_sel[nr] = src;
2142 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2145 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2146 mutex_unlock(&data->update_lock);
2152 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2155 struct nct6775_data *data = nct6775_update_device(dev);
2156 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2157 int index = sattr->index;
2159 return show_pwm_temp_sel_common(data, buf,
2160 data->pwm_weight_temp_sel[index]);
2164 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2165 const char *buf, size_t count)
2167 struct nct6775_data *data = nct6775_update_device(dev);
2168 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2169 int nr = sattr->index;
2173 err = kstrtoul(buf, 10, &val);
2178 if (val && (!(data->have_temp & (1 << (val - 1))) ||
2179 !data->temp_src[val - 1]))
2182 mutex_lock(&data->update_lock);
2184 src = data->temp_src[val - 1];
2185 data->pwm_weight_temp_sel[nr] = src;
2186 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2188 reg |= (src | 0x80);
2189 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2191 data->pwm_weight_temp_sel[nr] = 0;
2192 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2194 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2196 mutex_unlock(&data->update_lock);
2202 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2204 struct nct6775_data *data = nct6775_update_device(dev);
2205 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2207 return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2211 store_target_temp(struct device *dev, struct device_attribute *attr,
2212 const char *buf, size_t count)
2214 struct nct6775_data *data = dev_get_drvdata(dev);
2215 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2216 int nr = sattr->index;
2220 err = kstrtoul(buf, 10, &val);
2224 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2225 data->target_temp_mask);
2227 mutex_lock(&data->update_lock);
2228 data->target_temp[nr] = val;
2229 pwm_update_registers(data, nr);
2230 mutex_unlock(&data->update_lock);
2235 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2237 struct nct6775_data *data = nct6775_update_device(dev);
2238 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2239 int nr = sattr->index;
2241 return sprintf(buf, "%d\n",
2242 fan_from_reg16(data->target_speed[nr],
2243 data->fan_div[nr]));
2247 store_target_speed(struct device *dev, struct device_attribute *attr,
2248 const char *buf, size_t count)
2250 struct nct6775_data *data = dev_get_drvdata(dev);
2251 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2252 int nr = sattr->index;
2257 err = kstrtoul(buf, 10, &val);
2261 val = clamp_val(val, 0, 1350000U);
2262 speed = fan_to_reg(val, data->fan_div[nr]);
2264 mutex_lock(&data->update_lock);
2265 data->target_speed[nr] = speed;
2266 pwm_update_registers(data, nr);
2267 mutex_unlock(&data->update_lock);
2272 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2275 struct nct6775_data *data = nct6775_update_device(dev);
2276 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2278 int index = sattr->index;
2280 return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2284 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2285 const char *buf, size_t count)
2287 struct nct6775_data *data = dev_get_drvdata(dev);
2288 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2290 int index = sattr->index;
2294 err = kstrtoul(buf, 10, &val);
2298 /* Limit tolerance as needed */
2299 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2301 mutex_lock(&data->update_lock);
2302 data->temp_tolerance[index][nr] = val;
2304 pwm_update_registers(data, nr);
2306 nct6775_write_value(data,
2307 data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2309 mutex_unlock(&data->update_lock);
2314 * Fan speed tolerance is a tricky beast, since the associated register is
2315 * a tick counter, but the value is reported and configured as rpm.
2316 * Compute resulting low and high rpm values and report the difference.
2319 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2322 struct nct6775_data *data = nct6775_update_device(dev);
2323 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2324 int nr = sattr->index;
2325 int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2326 int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2336 tolerance = (fan_from_reg16(low, data->fan_div[nr])
2337 - fan_from_reg16(high, data->fan_div[nr])) / 2;
2339 return sprintf(buf, "%d\n", tolerance);
2343 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2344 const char *buf, size_t count)
2346 struct nct6775_data *data = dev_get_drvdata(dev);
2347 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2348 int nr = sattr->index;
2353 err = kstrtoul(buf, 10, &val);
2357 high = fan_from_reg16(data->target_speed[nr],
2358 data->fan_div[nr]) + val;
2359 low = fan_from_reg16(data->target_speed[nr],
2360 data->fan_div[nr]) - val;
2366 val = (fan_to_reg(low, data->fan_div[nr]) -
2367 fan_to_reg(high, data->fan_div[nr])) / 2;
2369 /* Limit tolerance as needed */
2370 val = clamp_val(val, 0, data->speed_tolerance_limit);
2372 mutex_lock(&data->update_lock);
2373 data->target_speed_tolerance[nr] = val;
2374 pwm_update_registers(data, nr);
2375 mutex_unlock(&data->update_lock);
2379 SENSOR_TEMPLATE_2(pwm, pwm%d, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2380 SENSOR_TEMPLATE(pwm_mode, pwm%d_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2382 SENSOR_TEMPLATE(pwm_enable, pwm%d_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2383 store_pwm_enable, 0);
2384 SENSOR_TEMPLATE(pwm_temp_sel, pwm%d_temp_sel, S_IWUSR | S_IRUGO,
2385 show_pwm_temp_sel, store_pwm_temp_sel, 0);
2386 SENSOR_TEMPLATE(pwm_target_temp, pwm%d_target_temp, S_IWUSR | S_IRUGO,
2387 show_target_temp, store_target_temp, 0);
2388 SENSOR_TEMPLATE(fan_target, fan%d_target, S_IWUSR | S_IRUGO, show_target_speed,
2389 store_target_speed, 0);
2390 SENSOR_TEMPLATE(fan_tolerance, fan%d_tolerance, S_IWUSR | S_IRUGO,
2391 show_speed_tolerance, store_speed_tolerance, 0);
2393 /* Smart Fan registers */
2396 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2398 struct nct6775_data *data = nct6775_update_device(dev);
2399 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2401 int index = sattr->index;
2403 return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2407 store_weight_temp(struct device *dev, struct device_attribute *attr,
2408 const char *buf, size_t count)
2410 struct nct6775_data *data = dev_get_drvdata(dev);
2411 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2413 int index = sattr->index;
2417 err = kstrtoul(buf, 10, &val);
2421 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2423 mutex_lock(&data->update_lock);
2424 data->weight_temp[index][nr] = val;
2425 nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2426 mutex_unlock(&data->update_lock);
2430 SENSOR_TEMPLATE(pwm_weight_temp_sel, pwm%d_weight_temp_sel, S_IWUSR | S_IRUGO,
2431 show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
2432 SENSOR_TEMPLATE_2(pwm_weight_temp_step, pwm%d_weight_temp_step,
2433 S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 0);
2434 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, pwm%d_weight_temp_step_tol,
2435 S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 1);
2436 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, pwm%d_weight_temp_step_base,
2437 S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 2);
2438 SENSOR_TEMPLATE_2(pwm_weight_duty_step, pwm%d_weight_duty_step,
2439 S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 5);
2440 SENSOR_TEMPLATE_2(pwm_weight_duty_base, pwm%d_weight_duty_base,
2441 S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 6);
2444 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2446 struct nct6775_data *data = nct6775_update_device(dev);
2447 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2449 int index = sattr->index;
2451 return sprintf(buf, "%d\n",
2452 step_time_from_reg(data->fan_time[index][nr],
2453 data->pwm_mode[nr]));
2457 store_fan_time(struct device *dev, struct device_attribute *attr,
2458 const char *buf, size_t count)
2460 struct nct6775_data *data = dev_get_drvdata(dev);
2461 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2463 int index = sattr->index;
2467 err = kstrtoul(buf, 10, &val);
2471 val = step_time_to_reg(val, data->pwm_mode[nr]);
2472 mutex_lock(&data->update_lock);
2473 data->fan_time[index][nr] = val;
2474 nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2475 mutex_unlock(&data->update_lock);
2480 show_name(struct device *dev, struct device_attribute *attr, char *buf)
2482 struct nct6775_data *data = dev_get_drvdata(dev);
2484 return sprintf(buf, "%s\n", data->name);
2487 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
2490 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2492 struct nct6775_data *data = nct6775_update_device(dev);
2493 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2495 return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2499 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2500 const char *buf, size_t count)
2502 struct nct6775_data *data = dev_get_drvdata(dev);
2503 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2505 int point = sattr->index;
2510 err = kstrtoul(buf, 10, &val);
2516 if (point == data->auto_pwm_num) {
2517 if (data->kind != nct6775 && !val)
2519 if (data->kind != nct6779 && val)
2523 mutex_lock(&data->update_lock);
2524 data->auto_pwm[nr][point] = val;
2525 if (point < data->auto_pwm_num) {
2526 nct6775_write_value(data,
2527 NCT6775_AUTO_PWM(data, nr, point),
2528 data->auto_pwm[nr][point]);
2530 switch (data->kind) {
2532 /* disable if needed (pwm == 0) */
2533 reg = nct6775_read_value(data,
2534 NCT6775_REG_CRITICAL_ENAB[nr]);
2539 nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
2543 break; /* always enabled, nothing to do */
2546 nct6775_write_value(data, data->REG_CRITICAL_PWM[nr],
2548 reg = nct6775_read_value(data,
2549 data->REG_CRITICAL_PWM_ENABLE[nr]);
2551 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
2553 reg |= data->CRITICAL_PWM_ENABLE_MASK;
2554 nct6775_write_value(data,
2555 data->REG_CRITICAL_PWM_ENABLE[nr],
2560 mutex_unlock(&data->update_lock);
2565 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
2567 struct nct6775_data *data = nct6775_update_device(dev);
2568 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2570 int point = sattr->index;
2573 * We don't know for sure if the temperature is signed or unsigned.
2574 * Assume it is unsigned.
2576 return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
2580 store_auto_temp(struct device *dev, struct device_attribute *attr,
2581 const char *buf, size_t count)
2583 struct nct6775_data *data = dev_get_drvdata(dev);
2584 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2586 int point = sattr->index;
2590 err = kstrtoul(buf, 10, &val);
2596 mutex_lock(&data->update_lock);
2597 data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
2598 if (point < data->auto_pwm_num) {
2599 nct6775_write_value(data,
2600 NCT6775_AUTO_TEMP(data, nr, point),
2601 data->auto_temp[nr][point]);
2603 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
2604 data->auto_temp[nr][point]);
2606 mutex_unlock(&data->update_lock);
2610 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
2611 struct attribute *attr, int index)
2613 struct device *dev = container_of(kobj, struct device, kobj);
2614 struct nct6775_data *data = dev_get_drvdata(dev);
2615 int pwm = index / 36; /* pwm index */
2616 int nr = index % 36; /* attribute index */
2618 if (!(data->has_pwm & (1 << pwm)))
2621 if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
2623 if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
2625 if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
2628 if (nr >= 22 && nr <= 35) { /* auto point */
2629 int api = (nr - 22) / 2; /* auto point index */
2631 if (api > data->auto_pwm_num)
2637 SENSOR_TEMPLATE_2(pwm_stop_time, pwm%d_stop_time, S_IWUSR | S_IRUGO,
2638 show_fan_time, store_fan_time, 0, 0);
2639 SENSOR_TEMPLATE_2(pwm_step_up_time, pwm%d_step_up_time, S_IWUSR | S_IRUGO,
2640 show_fan_time, store_fan_time, 0, 1);
2641 SENSOR_TEMPLATE_2(pwm_step_down_time, pwm%d_step_down_time, S_IWUSR | S_IRUGO,
2642 show_fan_time, store_fan_time, 0, 2);
2643 SENSOR_TEMPLATE_2(pwm_start, pwm%d_start, S_IWUSR | S_IRUGO, show_pwm,
2645 SENSOR_TEMPLATE_2(pwm_floor, pwm%d_floor, S_IWUSR | S_IRUGO, show_pwm,
2647 SENSOR_TEMPLATE_2(pwm_temp_tolerance, pwm%d_temp_tolerance, S_IWUSR | S_IRUGO,
2648 show_temp_tolerance, store_temp_tolerance, 0, 0);
2649 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, pwm%d_crit_temp_tolerance,
2650 S_IWUSR | S_IRUGO, show_temp_tolerance, store_temp_tolerance,
2653 SENSOR_TEMPLATE_2(pwm_max, pwm%d_max, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2656 SENSOR_TEMPLATE_2(pwm_step, pwm%d_step, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2659 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, pwm%d_auto_point1_pwm, S_IWUSR | S_IRUGO,
2660 show_auto_pwm, store_auto_pwm, 0, 0);
2661 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, pwm%d_auto_point1_temp,
2662 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 0);
2664 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, pwm%d_auto_point2_pwm, S_IWUSR | S_IRUGO,
2665 show_auto_pwm, store_auto_pwm, 0, 1);
2666 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, pwm%d_auto_point2_temp,
2667 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 1);
2669 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, pwm%d_auto_point3_pwm, S_IWUSR | S_IRUGO,
2670 show_auto_pwm, store_auto_pwm, 0, 2);
2671 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, pwm%d_auto_point3_temp,
2672 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 2);
2674 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, pwm%d_auto_point4_pwm, S_IWUSR | S_IRUGO,
2675 show_auto_pwm, store_auto_pwm, 0, 3);
2676 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, pwm%d_auto_point4_temp,
2677 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 3);
2679 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, pwm%d_auto_point5_pwm, S_IWUSR | S_IRUGO,
2680 show_auto_pwm, store_auto_pwm, 0, 4);
2681 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, pwm%d_auto_point5_temp,
2682 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 4);
2684 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, pwm%d_auto_point6_pwm, S_IWUSR | S_IRUGO,
2685 show_auto_pwm, store_auto_pwm, 0, 5);
2686 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, pwm%d_auto_point6_temp,
2687 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 5);
2689 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, pwm%d_auto_point7_pwm, S_IWUSR | S_IRUGO,
2690 show_auto_pwm, store_auto_pwm, 0, 6);
2691 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, pwm%d_auto_point7_temp,
2692 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 6);
2695 * nct6775_pwm_is_visible uses the index into the following array
2696 * to determine if attributes should be created or not.
2697 * Any change in order or content must be matched.
2699 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
2700 &sensor_dev_template_pwm,
2701 &sensor_dev_template_pwm_mode,
2702 &sensor_dev_template_pwm_enable,
2703 &sensor_dev_template_pwm_temp_sel,
2704 &sensor_dev_template_pwm_temp_tolerance,
2705 &sensor_dev_template_pwm_crit_temp_tolerance,
2706 &sensor_dev_template_pwm_target_temp,
2707 &sensor_dev_template_fan_target,
2708 &sensor_dev_template_fan_tolerance,
2709 &sensor_dev_template_pwm_stop_time,
2710 &sensor_dev_template_pwm_step_up_time,
2711 &sensor_dev_template_pwm_step_down_time,
2712 &sensor_dev_template_pwm_start,
2713 &sensor_dev_template_pwm_floor,
2714 &sensor_dev_template_pwm_weight_temp_sel,
2715 &sensor_dev_template_pwm_weight_temp_step,
2716 &sensor_dev_template_pwm_weight_temp_step_tol,
2717 &sensor_dev_template_pwm_weight_temp_step_base,
2718 &sensor_dev_template_pwm_weight_duty_step,
2719 &sensor_dev_template_pwm_max, /* 19 */
2720 &sensor_dev_template_pwm_step, /* 20 */
2721 &sensor_dev_template_pwm_weight_duty_base, /* 21 */
2722 &sensor_dev_template_pwm_auto_point1_pwm, /* 22 */
2723 &sensor_dev_template_pwm_auto_point1_temp,
2724 &sensor_dev_template_pwm_auto_point2_pwm,
2725 &sensor_dev_template_pwm_auto_point2_temp,
2726 &sensor_dev_template_pwm_auto_point3_pwm,
2727 &sensor_dev_template_pwm_auto_point3_temp,
2728 &sensor_dev_template_pwm_auto_point4_pwm,
2729 &sensor_dev_template_pwm_auto_point4_temp,
2730 &sensor_dev_template_pwm_auto_point5_pwm,
2731 &sensor_dev_template_pwm_auto_point5_temp,
2732 &sensor_dev_template_pwm_auto_point6_pwm,
2733 &sensor_dev_template_pwm_auto_point6_temp,
2734 &sensor_dev_template_pwm_auto_point7_pwm,
2735 &sensor_dev_template_pwm_auto_point7_temp, /* 35 */
2740 static struct sensor_template_group nct6775_pwm_template_group = {
2741 .templates = nct6775_attributes_pwm_template,
2742 .is_visible = nct6775_pwm_is_visible,
2747 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
2749 struct nct6775_data *data = dev_get_drvdata(dev);
2750 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
2753 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
2755 /* Case open detection */
2758 clear_caseopen(struct device *dev, struct device_attribute *attr,
2759 const char *buf, size_t count)
2761 struct nct6775_data *data = dev_get_drvdata(dev);
2762 struct nct6775_sio_data *sio_data = dev->platform_data;
2763 int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
2768 if (kstrtoul(buf, 10, &val) || val != 0)
2771 mutex_lock(&data->update_lock);
2774 * Use CR registers to clear caseopen status.
2775 * The CR registers are the same for all chips, and not all chips
2776 * support clearing the caseopen status through "regular" registers.
2778 ret = superio_enter(sio_data->sioreg);
2784 superio_select(sio_data->sioreg, NCT6775_LD_ACPI);
2785 reg = superio_inb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
2786 reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
2787 superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
2788 reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
2789 superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
2790 superio_exit(sio_data->sioreg);
2792 data->valid = false; /* Force cache refresh */
2794 mutex_unlock(&data->update_lock);
2798 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
2799 clear_caseopen, INTRUSION_ALARM_BASE);
2800 static SENSOR_DEVICE_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
2801 clear_caseopen, INTRUSION_ALARM_BASE + 1);
2803 static umode_t nct6775_other_is_visible(struct kobject *kobj,
2804 struct attribute *attr, int index)
2806 struct device *dev = container_of(kobj, struct device, kobj);
2807 struct nct6775_data *data = dev_get_drvdata(dev);
2809 if (index == 1 && !data->have_vid)
2812 if (index == 2 || index == 3) {
2813 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + index - 2] < 0)
2821 * nct6775_other_is_visible uses the index into the following array
2822 * to determine if attributes should be created or not.
2823 * Any change in order or content must be matched.
2825 static struct attribute *nct6775_attributes_other[] = {
2826 &dev_attr_name.attr,
2827 &dev_attr_cpu0_vid.attr, /* 1 */
2828 &sensor_dev_attr_intrusion0_alarm.dev_attr.attr, /* 2 */
2829 &sensor_dev_attr_intrusion1_alarm.dev_attr.attr, /* 3 */
2834 static const struct attribute_group nct6775_group_other = {
2835 .attrs = nct6775_attributes_other,
2836 .is_visible = nct6775_other_is_visible,
2840 * Driver and device management
2843 static void nct6775_device_remove_files(struct device *dev)
2845 struct nct6775_data *data = dev_get_drvdata(dev);
2847 if (data->group_pwm)
2848 sysfs_remove_group(&dev->kobj, data->group_pwm);
2850 sysfs_remove_group(&dev->kobj, data->group_in);
2851 if (data->group_fan)
2852 sysfs_remove_group(&dev->kobj, data->group_fan);
2853 if (data->group_temp)
2854 sysfs_remove_group(&dev->kobj, data->group_temp);
2856 sysfs_remove_group(&dev->kobj, &nct6775_group_other);
2859 /* Get the monitoring functions started */
2860 static inline void nct6775_init_device(struct nct6775_data *data)
2865 /* Start monitoring if needed */
2866 if (data->REG_CONFIG) {
2867 tmp = nct6775_read_value(data, data->REG_CONFIG);
2869 nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
2872 /* Enable temperature sensors if needed */
2873 for (i = 0; i < NUM_TEMP; i++) {
2874 if (!(data->have_temp & (1 << i)))
2876 if (!data->reg_temp_config[i])
2878 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
2880 nct6775_write_value(data, data->reg_temp_config[i],
2884 /* Enable VBAT monitoring if needed */
2885 tmp = nct6775_read_value(data, data->REG_VBAT);
2887 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
2889 diode = nct6775_read_value(data, data->REG_DIODE);
2891 for (i = 0; i < data->temp_fixed_num; i++) {
2892 if (!(data->have_temp_fixed & (1 << i)))
2894 if ((tmp & (data->DIODE_MASK << i))) /* diode */
2896 = 3 - ((diode >> i) & data->DIODE_MASK);
2897 else /* thermistor */
2898 data->temp_type[i] = 4;
2903 nct6775_check_fan_inputs(const struct nct6775_sio_data *sio_data,
2904 struct nct6775_data *data)
2907 bool fan3pin, fan3min, fan4pin, fan4min, fan5pin;
2908 bool pwm3pin, pwm4pin, pwm5pin;
2910 /* fan4 and fan5 share some pins with the GPIO and serial flash */
2911 if (data->kind == nct6775) {
2912 regval = superio_inb(sio_data->sioreg, 0x2c);
2914 fan3pin = regval & (1 << 6);
2916 pwm3pin = regval & (1 << 7);
2918 /* On NCT6775, fan4 shares pins with the fdc interface */
2919 fan4pin = !(superio_inb(sio_data->sioreg, 0x2A) & 0x80);
2924 } else if (data->kind == nct6776) {
2925 bool gpok = superio_inb(sio_data->sioreg, 0x27) & 0x80;
2927 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
2928 regval = superio_inb(sio_data->sioreg, SIO_REG_ENABLE);
2933 fan3pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x40);
2938 fan4pin = superio_inb(sio_data->sioreg, 0x1C) & 0x01;
2943 fan5pin = superio_inb(sio_data->sioreg, 0x1C) & 0x02;
2950 } else if (data->kind == nct6106) {
2951 regval = superio_inb(sio_data->sioreg, 0x24);
2952 fan3pin = !(regval & 0x80);
2953 pwm3pin = regval & 0x08;
2961 } else { /* NCT6779D */
2962 regval = superio_inb(sio_data->sioreg, 0x1c);
2964 fan3pin = !(regval & (1 << 5));
2965 fan4pin = !(regval & (1 << 6));
2966 fan5pin = !(regval & (1 << 7));
2968 pwm3pin = !(regval & (1 << 0));
2969 pwm4pin = !(regval & (1 << 1));
2970 pwm5pin = !(regval & (1 << 2));
2976 data->has_fan = data->has_fan_min = 0x03; /* fan1 and fan2 */
2977 data->has_fan |= fan3pin << 2;
2978 data->has_fan_min |= fan3min << 2;
2980 data->has_fan |= (fan4pin << 3) | (fan5pin << 4);
2981 data->has_fan_min |= (fan4min << 3) | (fan5pin << 4);
2983 data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) | (pwm5pin << 4);
2986 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
2987 int *available, int *mask)
2992 for (i = 0; i < data->pwm_num && *available; i++) {
2997 src = nct6775_read_value(data, regp[i]);
2999 if (!src || (*mask & (1 << src)))
3001 if (src >= data->temp_label_num ||
3002 !strlen(data->temp_label[src]))
3005 index = __ffs(*available);
3006 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3007 *available &= ~(1 << index);
3012 static int nct6775_probe(struct platform_device *pdev)
3014 struct device *dev = &pdev->dev;
3015 struct nct6775_sio_data *sio_data = dev->platform_data;
3016 struct nct6775_data *data;
3017 struct resource *res;
3019 int src, mask, available;
3020 const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3021 const u16 *reg_temp_alternate, *reg_temp_crit;
3022 const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL;
3025 struct attribute_group *group;
3027 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3028 if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3032 data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3037 data->kind = sio_data->kind;
3038 data->addr = res->start;
3039 mutex_init(&data->update_lock);
3040 data->name = nct6775_device_names[data->kind];
3041 data->bank = 0xff; /* Force initial bank selection */
3042 platform_set_drvdata(pdev, data);
3044 switch (data->kind) {
3048 data->auto_pwm_num = 4;
3049 data->temp_fixed_num = 3;
3051 data->fan_from_reg = fan_from_reg13;
3052 data->fan_from_reg_min = fan_from_reg13;
3054 data->temp_label = nct6776_temp_label;
3055 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3057 data->REG_VBAT = NCT6106_REG_VBAT;
3058 data->REG_DIODE = NCT6106_REG_DIODE;
3059 data->DIODE_MASK = NCT6106_DIODE_MASK;
3060 data->REG_VIN = NCT6106_REG_IN;
3061 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3062 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3063 data->REG_TARGET = NCT6106_REG_TARGET;
3064 data->REG_FAN = NCT6106_REG_FAN;
3065 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
3066 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
3067 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
3068 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
3069 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
3070 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
3071 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
3072 data->REG_PWM[0] = NCT6106_REG_PWM;
3073 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
3074 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
3075 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3076 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3077 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3078 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3079 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3080 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
3081 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
3082 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
3083 data->REG_CRITICAL_TEMP_TOLERANCE
3084 = NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
3085 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
3086 data->CRITICAL_PWM_ENABLE_MASK
3087 = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3088 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
3089 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3090 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3091 data->REG_TEMP_SEL = NCT6106_REG_TEMP_SEL;
3092 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3093 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3094 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3095 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3096 data->REG_ALARM = NCT6106_REG_ALARM;
3097 data->ALARM_BITS = NCT6106_ALARM_BITS;
3099 reg_temp = NCT6106_REG_TEMP;
3100 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3101 reg_temp_over = NCT6106_REG_TEMP_OVER;
3102 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3103 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3104 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3105 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3106 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3107 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3113 data->auto_pwm_num = 6;
3114 data->has_fan_div = true;
3115 data->temp_fixed_num = 3;
3117 data->ALARM_BITS = NCT6775_ALARM_BITS;
3119 data->fan_from_reg = fan_from_reg16;
3120 data->fan_from_reg_min = fan_from_reg8;
3121 data->target_temp_mask = 0x7f;
3122 data->tolerance_mask = 0x0f;
3123 data->speed_tolerance_limit = 15;
3125 data->temp_label = nct6775_temp_label;
3126 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
3128 data->REG_CONFIG = NCT6775_REG_CONFIG;
3129 data->REG_VBAT = NCT6775_REG_VBAT;
3130 data->REG_DIODE = NCT6775_REG_DIODE;
3131 data->DIODE_MASK = NCT6775_DIODE_MASK;
3132 data->REG_VIN = NCT6775_REG_IN;
3133 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3134 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3135 data->REG_TARGET = NCT6775_REG_TARGET;
3136 data->REG_FAN = NCT6775_REG_FAN;
3137 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3138 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3139 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3140 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3141 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3142 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3143 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3144 data->REG_PWM[0] = NCT6775_REG_PWM;
3145 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3146 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3147 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3148 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3149 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3150 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3151 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3152 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3153 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3154 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3155 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3156 data->REG_CRITICAL_TEMP_TOLERANCE
3157 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3158 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3159 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3160 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3161 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3162 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3163 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3164 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3165 data->REG_ALARM = NCT6775_REG_ALARM;
3167 reg_temp = NCT6775_REG_TEMP;
3168 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3169 reg_temp_over = NCT6775_REG_TEMP_OVER;
3170 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3171 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3172 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3173 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3179 data->auto_pwm_num = 4;
3180 data->has_fan_div = false;
3181 data->temp_fixed_num = 3;
3183 data->ALARM_BITS = NCT6776_ALARM_BITS;
3185 data->fan_from_reg = fan_from_reg13;
3186 data->fan_from_reg_min = fan_from_reg13;
3187 data->target_temp_mask = 0xff;
3188 data->tolerance_mask = 0x07;
3189 data->speed_tolerance_limit = 63;
3191 data->temp_label = nct6776_temp_label;
3192 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3194 data->REG_CONFIG = NCT6775_REG_CONFIG;
3195 data->REG_VBAT = NCT6775_REG_VBAT;
3196 data->REG_DIODE = NCT6775_REG_DIODE;
3197 data->DIODE_MASK = NCT6775_DIODE_MASK;
3198 data->REG_VIN = NCT6775_REG_IN;
3199 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3200 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3201 data->REG_TARGET = NCT6775_REG_TARGET;
3202 data->REG_FAN = NCT6775_REG_FAN;
3203 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3204 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3205 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3206 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3207 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3208 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3209 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3210 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3211 data->REG_PWM[0] = NCT6775_REG_PWM;
3212 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3213 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3214 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3215 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3216 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3217 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3218 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3219 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3220 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3221 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3222 data->REG_CRITICAL_TEMP_TOLERANCE
3223 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3224 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3225 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3226 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3227 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3228 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3229 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3230 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3231 data->REG_ALARM = NCT6775_REG_ALARM;
3233 reg_temp = NCT6775_REG_TEMP;
3234 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3235 reg_temp_over = NCT6775_REG_TEMP_OVER;
3236 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3237 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3238 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3239 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3245 data->auto_pwm_num = 4;
3246 data->has_fan_div = false;
3247 data->temp_fixed_num = 6;
3249 data->ALARM_BITS = NCT6779_ALARM_BITS;
3251 data->fan_from_reg = fan_from_reg13;
3252 data->fan_from_reg_min = fan_from_reg13;
3253 data->target_temp_mask = 0xff;
3254 data->tolerance_mask = 0x07;
3255 data->speed_tolerance_limit = 63;
3257 data->temp_label = nct6779_temp_label;
3258 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3260 data->REG_CONFIG = NCT6775_REG_CONFIG;
3261 data->REG_VBAT = NCT6775_REG_VBAT;
3262 data->REG_DIODE = NCT6775_REG_DIODE;
3263 data->DIODE_MASK = NCT6775_DIODE_MASK;
3264 data->REG_VIN = NCT6779_REG_IN;
3265 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3266 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3267 data->REG_TARGET = NCT6775_REG_TARGET;
3268 data->REG_FAN = NCT6779_REG_FAN;
3269 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3270 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3271 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3272 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3273 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3274 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3275 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3276 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3277 data->REG_PWM[0] = NCT6775_REG_PWM;
3278 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3279 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3280 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3281 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3282 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3283 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3284 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3285 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3286 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3287 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3288 data->REG_CRITICAL_TEMP_TOLERANCE
3289 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3290 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3291 data->CRITICAL_PWM_ENABLE_MASK
3292 = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3293 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3294 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3295 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3296 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3297 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3298 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3299 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3300 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3301 data->REG_ALARM = NCT6779_REG_ALARM;
3303 reg_temp = NCT6779_REG_TEMP;
3304 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3305 reg_temp_over = NCT6779_REG_TEMP_OVER;
3306 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3307 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3308 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3309 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3315 data->have_in = (1 << data->in_num) - 1;
3316 data->have_temp = 0;
3319 * On some boards, not all available temperature sources are monitored,
3320 * even though some of the monitoring registers are unused.
3321 * Get list of unused monitoring registers, then detect if any fan
3322 * controls are configured to use unmonitored temperature sources.
3323 * If so, assign the unmonitored temperature sources to available
3324 * monitoring registers.
3328 for (i = 0; i < num_reg_temp; i++) {
3329 if (reg_temp[i] == 0)
3332 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3333 if (!src || (mask & (1 << src)))
3334 available |= 1 << i;
3340 * Now find unmonitored temperature registers and enable monitoring
3341 * if additional monitoring registers are available.
3343 add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
3344 add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
3347 s = NUM_TEMP_FIXED; /* First dynamic temperature attribute */
3348 for (i = 0; i < num_reg_temp; i++) {
3349 if (reg_temp[i] == 0)
3352 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3353 if (!src || (mask & (1 << src)))
3356 if (src >= data->temp_label_num ||
3357 !strlen(data->temp_label[src])) {
3359 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3360 src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
3366 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3367 if (src <= data->temp_fixed_num) {
3368 data->have_temp |= 1 << (src - 1);
3369 data->have_temp_fixed |= 1 << (src - 1);
3370 data->reg_temp[0][src - 1] = reg_temp[i];
3371 data->reg_temp[1][src - 1] = reg_temp_over[i];
3372 data->reg_temp[2][src - 1] = reg_temp_hyst[i];
3373 if (reg_temp_crit_h && reg_temp_crit_h[i])
3374 data->reg_temp[3][src - 1] = reg_temp_crit_h[i];
3375 else if (reg_temp_crit[src - 1])
3376 data->reg_temp[3][src - 1] = reg_temp_crit[src - 1];
3377 if (reg_temp_crit_l && reg_temp_crit_l[i])
3378 data->reg_temp[4][src - 1] = reg_temp_crit_l[i];
3379 data->reg_temp_config[src - 1] = reg_temp_config[i];
3380 data->temp_src[src - 1] = src;
3387 /* Use dynamic index for other sources */
3388 data->have_temp |= 1 << s;
3389 data->reg_temp[0][s] = reg_temp[i];
3390 data->reg_temp[1][s] = reg_temp_over[i];
3391 data->reg_temp[2][s] = reg_temp_hyst[i];
3392 data->reg_temp_config[s] = reg_temp_config[i];
3393 if (reg_temp_crit_h && reg_temp_crit_h[i])
3394 data->reg_temp[3][s] = reg_temp_crit_h[i];
3395 else if (reg_temp_crit[src - 1])
3396 data->reg_temp[3][s] = reg_temp_crit[src - 1];
3397 if (reg_temp_crit_l && reg_temp_crit_l[i])
3398 data->reg_temp[4][s] = reg_temp_crit_l[i];
3400 data->temp_src[s] = src;
3404 #ifdef USE_ALTERNATE
3406 * Go through the list of alternate temp registers and enable
3408 * The temperature is already monitored if the respective bit in <mask>
3411 for (i = 0; i < data->temp_label_num - 1; i++) {
3412 if (!reg_temp_alternate[i])
3414 if (mask & (1 << (i + 1)))
3416 if (i < data->temp_fixed_num) {
3417 if (data->have_temp & (1 << i))
3419 data->have_temp |= 1 << i;
3420 data->have_temp_fixed |= 1 << i;
3421 data->reg_temp[0][i] = reg_temp_alternate[i];
3422 data->reg_temp[1][i] = reg_temp_over[i];
3423 data->reg_temp[2][i] = reg_temp_hyst[i];
3424 data->temp_src[i] = i + 1;
3428 if (s >= NUM_TEMP) /* Abort if no more space */
3431 data->have_temp |= 1 << s;
3432 data->reg_temp[0][s] = reg_temp_alternate[i];
3433 data->temp_src[s] = i + 1;
3436 #endif /* USE_ALTERNATE */
3438 /* Initialize the chip */
3439 nct6775_init_device(data);
3441 err = superio_enter(sio_data->sioreg);
3445 cr2a = superio_inb(sio_data->sioreg, 0x2a);
3446 switch (data->kind) {
3448 data->have_vid = (cr2a & 0x40);
3451 data->have_vid = (cr2a & 0x60) == 0x40;
3460 * We can get the VID input values directly at logical device D 0xe3.
3462 if (data->have_vid) {
3463 superio_select(sio_data->sioreg, NCT6775_LD_VID);
3464 data->vid = superio_inb(sio_data->sioreg, 0xe3);
3465 data->vrm = vid_which_vrm();
3471 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3472 tmp = superio_inb(sio_data->sioreg,
3473 NCT6775_REG_CR_FAN_DEBOUNCE);
3474 switch (data->kind) {
3486 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
3488 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
3492 nct6775_check_fan_inputs(sio_data, data);
3494 superio_exit(sio_data->sioreg);
3496 /* Read fan clock dividers immediately */
3497 nct6775_init_fan_common(dev, data);
3499 /* Register sysfs hooks */
3500 group = nct6775_create_attr_group(dev, &nct6775_pwm_template_group,
3502 if (IS_ERR(group)) {
3503 err = PTR_ERR(group);
3506 data->group_pwm = group;
3508 group = nct6775_create_attr_group(dev, &nct6775_in_template_group,
3509 fls(data->have_in));
3510 if (IS_ERR(group)) {
3511 err = PTR_ERR(group);
3514 data->group_in = group;
3516 group = nct6775_create_attr_group(dev, &nct6775_fan_template_group,
3517 fls(data->has_fan));
3518 if (IS_ERR(group)) {
3519 err = PTR_ERR(group);
3522 data->group_fan = group;
3524 group = nct6775_create_attr_group(dev, &nct6775_temp_template_group,
3525 fls(data->have_temp));
3526 if (IS_ERR(group)) {
3527 err = PTR_ERR(group);
3530 data->group_temp = group;
3532 err = sysfs_create_group(&dev->kobj, &nct6775_group_other);
3536 data->hwmon_dev = hwmon_device_register(dev);
3537 if (IS_ERR(data->hwmon_dev)) {
3538 err = PTR_ERR(data->hwmon_dev);
3545 nct6775_device_remove_files(dev);
3549 static int nct6775_remove(struct platform_device *pdev)
3551 struct nct6775_data *data = platform_get_drvdata(pdev);
3553 hwmon_device_unregister(data->hwmon_dev);
3554 nct6775_device_remove_files(&pdev->dev);
3560 static int nct6775_suspend(struct device *dev)
3562 struct nct6775_data *data = nct6775_update_device(dev);
3563 struct nct6775_sio_data *sio_data = dev->platform_data;
3565 mutex_lock(&data->update_lock);
3566 data->vbat = nct6775_read_value(data, data->REG_VBAT);
3567 if (sio_data->kind == nct6775) {
3568 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
3569 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
3571 mutex_unlock(&data->update_lock);
3576 static int nct6775_resume(struct device *dev)
3578 struct nct6775_data *data = dev_get_drvdata(dev);
3579 struct nct6775_sio_data *sio_data = dev->platform_data;
3582 mutex_lock(&data->update_lock);
3583 data->bank = 0xff; /* Force initial bank selection */
3585 /* Restore limits */
3586 for (i = 0; i < data->in_num; i++) {
3587 if (!(data->have_in & (1 << i)))
3590 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
3592 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
3596 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
3597 if (!(data->has_fan_min & (1 << i)))
3600 nct6775_write_value(data, data->REG_FAN_MIN[i],
3604 for (i = 0; i < NUM_TEMP; i++) {
3605 if (!(data->have_temp & (1 << i)))
3608 for (j = 1; j < ARRAY_SIZE(data->reg_temp); j++)
3609 if (data->reg_temp[j][i])
3610 nct6775_write_temp(data, data->reg_temp[j][i],
3614 /* Restore other settings */
3615 nct6775_write_value(data, data->REG_VBAT, data->vbat);
3616 if (sio_data->kind == nct6775) {
3617 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
3618 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
3621 /* Force re-reading all values */
3622 data->valid = false;
3623 mutex_unlock(&data->update_lock);
3628 static const struct dev_pm_ops nct6775_dev_pm_ops = {
3629 .suspend = nct6775_suspend,
3630 .resume = nct6775_resume,
3633 #define NCT6775_DEV_PM_OPS (&nct6775_dev_pm_ops)
3635 #define NCT6775_DEV_PM_OPS NULL
3636 #endif /* CONFIG_PM */
3638 static struct platform_driver nct6775_driver = {
3640 .owner = THIS_MODULE,
3642 .pm = NCT6775_DEV_PM_OPS,
3644 .probe = nct6775_probe,
3645 .remove = nct6775_remove,
3648 static const char *nct6775_sio_names[] __initconst = {
3655 /* nct6775_find() looks for a '627 in the Super-I/O config space */
3656 static int __init nct6775_find(int sioaddr, unsigned short *addr,
3657 struct nct6775_sio_data *sio_data)
3662 err = superio_enter(sioaddr);
3669 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
3670 | superio_inb(sioaddr, SIO_REG_DEVID + 1);
3671 switch (val & SIO_ID_MASK) {
3672 case SIO_NCT6106_ID:
3673 sio_data->kind = nct6106;
3675 case SIO_NCT6775_ID:
3676 sio_data->kind = nct6775;
3678 case SIO_NCT6776_ID:
3679 sio_data->kind = nct6776;
3681 case SIO_NCT6779_ID:
3682 sio_data->kind = nct6779;
3686 pr_debug("unsupported chip ID: 0x%04x\n", val);
3687 superio_exit(sioaddr);
3691 /* We have a known chip, find the HWM I/O address */
3692 superio_select(sioaddr, NCT6775_LD_HWM);
3693 val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
3694 | superio_inb(sioaddr, SIO_REG_ADDR + 1);
3695 *addr = val & IOREGION_ALIGNMENT;
3697 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
3698 superio_exit(sioaddr);
3702 /* Activate logical device if needed */
3703 val = superio_inb(sioaddr, SIO_REG_ENABLE);
3704 if (!(val & 0x01)) {
3705 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
3706 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
3709 superio_exit(sioaddr);
3710 pr_info("Found %s or compatible chip at %#x:%#x\n",
3711 nct6775_sio_names[sio_data->kind], sioaddr, *addr);
3712 sio_data->sioreg = sioaddr;
3718 * when Super-I/O functions move to a separate file, the Super-I/O
3719 * bus will manage the lifetime of the device and this module will only keep
3720 * track of the nct6775 driver. But since we platform_device_alloc(), we
3721 * must keep track of the device
3723 static struct platform_device *pdev[2];
3725 static int __init sensors_nct6775_init(void)
3729 unsigned short address;
3730 struct resource res;
3731 struct nct6775_sio_data sio_data;
3732 int sioaddr[2] = { 0x2e, 0x4e };
3734 err = platform_driver_register(&nct6775_driver);
3739 * initialize sio_data->kind and sio_data->sioreg.
3741 * when Super-I/O functions move to a separate file, the Super-I/O
3742 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
3743 * nct6775 hardware monitor, and call probe()
3745 for (i = 0; i < ARRAY_SIZE(pdev); i++) {
3746 if (nct6775_find(sioaddr[i], &address, &sio_data))
3751 pdev[i] = platform_device_alloc(DRVNAME, address);
3754 goto exit_device_put;
3757 err = platform_device_add_data(pdev[i], &sio_data,
3758 sizeof(struct nct6775_sio_data));
3760 goto exit_device_put;
3762 memset(&res, 0, sizeof(res));
3764 res.start = address + IOREGION_OFFSET;
3765 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
3766 res.flags = IORESOURCE_IO;
3768 err = acpi_check_resource_conflict(&res);
3770 platform_device_put(pdev[i]);
3775 err = platform_device_add_resources(pdev[i], &res, 1);
3777 goto exit_device_put;
3779 /* platform_device_add calls probe() */
3780 err = platform_device_add(pdev[i]);
3782 goto exit_device_put;
3786 goto exit_unregister;
3792 for (i = 0; i < ARRAY_SIZE(pdev); i++) {
3794 platform_device_put(pdev[i]);
3797 platform_driver_unregister(&nct6775_driver);
3801 static void __exit sensors_nct6775_exit(void)
3805 for (i = 0; i < ARRAY_SIZE(pdev); i++) {
3807 platform_device_unregister(pdev[i]);
3809 platform_driver_unregister(&nct6775_driver);
3812 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
3813 MODULE_DESCRIPTION("NCT6775F/NCT6776F/NCT6779D driver");
3814 MODULE_LICENSE("GPL");
3816 module_init(sensors_nct6775_init);
3817 module_exit(sensors_nct6775_exit);